From 0ee74a71e27b86b89ca737f50a8e2c09753a3875 Mon Sep 17 00:00:00 2001
From: Rafael Silva <rafaelsilva@ajtec.pt>
Date: Mon, 7 Mar 2022 14:09:08 +0000
Subject: [PATCH 001/691] add renesas fsp submodule

Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
---
 .gitmodules        | 3 +++
 hw/mcu/renesas/fsp | 1 +
 2 files changed, 4 insertions(+)
 create mode 160000 hw/mcu/renesas/fsp

diff --git a/.gitmodules b/.gitmodules
index 044ac24ec..08ce4f447 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -149,3 +149,6 @@
 [submodule "hw/mcu/raspberry_pi/Pico-PIO-USB"]
 	path = hw/mcu/raspberry_pi/Pico-PIO-USB
 	url = https://github.com/sekigon-gonnoc/Pico-PIO-USB.git
+[submodule "hw/mcu/renesas/fsp"]
+	path = hw/mcu/renesas/fsp
+	url = https://github.com/renesas/fsp
diff --git a/hw/mcu/renesas/fsp b/hw/mcu/renesas/fsp
new file mode 160000
index 000000000..8dc14709f
--- /dev/null
+++ b/hw/mcu/renesas/fsp
@@ -0,0 +1 @@
+Subproject commit 8dc14709f2a6518b43f71efad70d900b7718d9f1

From f2e8a60e6d910170bf514087e1de24088d712ba8 Mon Sep 17 00:00:00 2001
From: Rafael Silva <rafaelsilva@ajtec.pt>
Date: Tue, 8 Mar 2022 15:29:58 +0000
Subject: [PATCH 002/691] add .vscode to gitignore

Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
---
 .gitignore | 1 +
 1 file changed, 1 insertion(+)

diff --git a/.gitignore b/.gitignore
index 87a5faa80..4a12f6ab7 100644
--- a/.gitignore
+++ b/.gitignore
@@ -13,6 +13,7 @@ latex
 .env
 .settings/
 .idea/
+.vscode/
 .gdb_history
 /examples/*/*/build*
 test_old/

From dcadbf3364778814c8a0e7e73481d12e8687f1bd Mon Sep 17 00:00:00 2001
From: Rafael Silva <rafaelsilva@ajtec.pt>
Date: Tue, 8 Mar 2022 16:05:29 +0000
Subject: [PATCH 003/691] rename renesas driver to link

	link was chosen according to the name for the usb core on datasheets, LINK core

Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
---
 docs/reference/supported.rst                              | 6 +++---
 hw/bsp/rx/family.mk                                       | 4 ++--
 src/portable/renesas/{usba/dcd_usba.c => link/dcd_link.c} | 0
 src/portable/renesas/{usba/hcd_usba.c => link/hcd_link.c} | 0
 4 files changed, 5 insertions(+), 5 deletions(-)
 rename src/portable/renesas/{usba/dcd_usba.c => link/dcd_link.c} (100%)
 rename src/portable/renesas/{usba/hcd_usba.c => link/hcd_link.c} (100%)

diff --git a/docs/reference/supported.rst b/docs/reference/supported.rst
index 7ce982713..3c1b94623 100644
--- a/docs/reference/supported.rst
+++ b/docs/reference/supported.rst
@@ -59,9 +59,9 @@ Supported MCUs
 |              |         | 55          | ✔      |      | ✔         | lpc_ip3511        |              |
 +--------------+---------+-------------+--------+------+-----------+-------------------+--------------+
 | Raspberry Pi | RP2040                | ✔      | ✔    | ✖         | rp2040            |              |
-+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
-| Renesas      | RX 63N, 65N, 72N      | ✔      | ✔    | ✖         | usba              |              |
-+--------------+-----------------------+--------+------+-----------+-------------------+--------------+
++--------------+-----+-----------------+--------+------+-----------+-------------------+--------------+
+| Renesas      | RX  | 63N, 65N, 72N   | ✔      | ✔    | ✖         | link              |              |
++--------------+-----+-----------------+--------+------+-----------+-------------------+--------------+
 | Silabs       | EFM32GG12             | ✔      |      | ✖         | dwc2              |              |
 +--------------+-----------------------+--------+------+-----------+-------------------+--------------+
 | Sony         | CXD56                 | ✔      | ✖    | ✔         | cxd56             |              |
diff --git a/hw/bsp/rx/family.mk b/hw/bsp/rx/family.mk
index aba05812d..22b9031b3 100644
--- a/hw/bsp/rx/family.mk
+++ b/hw/bsp/rx/family.mk
@@ -14,8 +14,8 @@ CFLAGS += \
   -DSSIZE_MAX=__INT_MAX__
 
 SRC_C += \
-	src/portable/renesas/usba/dcd_usba.c \
-	src/portable/renesas/usba/hcd_usba.c \
+	src/portable/renesas/link/dcd_link.c \
+	src/portable/renesas/link/hcd_link.c \
 	$(MCU_DIR)/vects.c
 
 INC += \
diff --git a/src/portable/renesas/usba/dcd_usba.c b/src/portable/renesas/link/dcd_link.c
similarity index 100%
rename from src/portable/renesas/usba/dcd_usba.c
rename to src/portable/renesas/link/dcd_link.c
diff --git a/src/portable/renesas/usba/hcd_usba.c b/src/portable/renesas/link/hcd_link.c
similarity index 100%
rename from src/portable/renesas/usba/hcd_usba.c
rename to src/portable/renesas/link/hcd_link.c

From 03777f4a467c7ff7e0e764cfcf79d04235a2659d Mon Sep 17 00:00:00 2001
From: Rafael Silva <rafaelsilva@ajtec.pt>
Date: Wed, 9 Mar 2022 11:52:39 +0000
Subject: [PATCH 004/691] generalize renesas LINK core driver

	create local register access struct and move mcu specific code
	in preparation of support for other mcu families that use the LINK usb core

Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
---
 hw/bsp/rx/boards/gr_citrus/gr_citrus.c       |    5 +
 hw/bsp/rx/boards/rx65n_target/rx65n_target.c |    5 +
 src/portable/renesas/link/dcd_link.c         |  357 ++--
 src/portable/renesas/link/hcd_link.c         |  421 ++---
 src/portable/renesas/link/link_rx.h          |   76 +
 src/portable/renesas/link/link_type.h        | 1658 ++++++++++++++++++
 6 files changed, 2034 insertions(+), 488 deletions(-)
 create mode 100644 src/portable/renesas/link/link_rx.h
 create mode 100644 src/portable/renesas/link/link_type.h

diff --git a/hw/bsp/rx/boards/gr_citrus/gr_citrus.c b/hw/bsp/rx/boards/gr_citrus/gr_citrus.c
index 633ddad16..9bd9399f6 100644
--- a/hw/bsp/rx/boards/gr_citrus/gr_citrus.c
+++ b/hw/bsp/rx/boards/gr_citrus/gr_citrus.c
@@ -201,6 +201,11 @@ void board_init(void)
   IEN(SCI0, RXI0) = 1;
   IEN(SCI0, TXI0) = 1;
   IEN(SCI0, TEI0) = 1;
+
+  /* Enable USB0 */
+  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
+  MSTP(USB0) = 0;
+  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
 }
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
index f189e40e4..3c729ad50 100644
--- a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
+++ b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
@@ -248,6 +248,11 @@ void board_init(void)
   IEN(ICU,GROUPBL0)  = 1;
   EN(SCI5, TEI5)     = 1;
 
+  /* Enable USB0 */
+  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
+  MSTP(USB0) = 0;
+  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
+
   /* setup USBI0 interrupt. */
   IR(USB0, USBI0)  = 0;
   IPR(USB0, USBI0) = IRQ_PRIORITY_USBI0;
diff --git a/src/portable/renesas/link/dcd_link.c b/src/portable/renesas/link/dcd_link.c
index fa87c9f4d..3aeda9e4c 100644
--- a/src/portable/renesas/link/dcd_link.c
+++ b/src/portable/renesas/link/dcd_link.c
@@ -31,79 +31,29 @@
 // We disable SOF for now until needed later on
 #define USE_SOF     0
 
-#if CFG_TUD_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_RX63X || \
-                                 CFG_TUSB_MCU == OPT_MCU_RX65X || \
-                                 CFG_TUSB_MCU == OPT_MCU_RX72N )
+#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N)
+
 #include "device/dcd.h"
-#include "iodefine.h"
+#include "link_type.h"
+
+#if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
+#include "link_rx.h"
+#else
+#error "Unsupported MCU"
+#endif
 
 //--------------------------------------------------------------------+
-// MACRO TYPEDEF CONSTANT ENUM DECLARATION
+// MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
-#define SYSTEM_PRCR_PRC1     (1<<1)
-#define SYSTEM_PRCR_PRKEY    (0xA5u<<8)
 
-#define USB_FIFOSEL_TX       ((uint16_t)(1u<<5))
-#define USB_FIFOSEL_BIGEND   ((uint16_t)(1u<<8))
-#define USB_FIFOSEL_MBW_8    ((uint16_t)(0u<<10))
-#define USB_FIFOSEL_MBW_16   ((uint16_t)(1u<<10))
-#define USB_IS0_CTSQ         ((uint16_t)(7u))
-#define USB_IS0_DVSQ         ((uint16_t)(7u<<4))
-#define USB_IS0_VALID        ((uint16_t)(1u<<3))
-#define USB_IS0_BRDY         ((uint16_t)(1u<<8))
-#define USB_IS0_NRDY         ((uint16_t)(1u<<9))
-#define USB_IS0_BEMP         ((uint16_t)(1u<<10))
-#define USB_IS0_CTRT         ((uint16_t)(1u<<11))
-#define USB_IS0_DVST         ((uint16_t)(1u<<12))
-#define USB_IS0_SOFR         ((uint16_t)(1u<<13))
-#define USB_IS0_RESM         ((uint16_t)(1u<<14))
-#define USB_IS0_VBINT        ((uint16_t)(1u<<15))
-#define USB_IS1_SACK         ((uint16_t)(1u<<4))
-#define USB_IS1_SIGN         ((uint16_t)(1u<<5))
-#define USB_IS1_EOFERR       ((uint16_t)(1u<<6))
-#define USB_IS1_ATTCH        ((uint16_t)(1u<<11))
-#define USB_IS1_DTCH         ((uint16_t)(1u<<12))
-#define USB_IS1_BCHG         ((uint16_t)(1u<<14))
-#define USB_IS1_OVRCR        ((uint16_t)(1u<<15))
+/* LINK core registers */
+#define LINK_REG ((LINK_REG_t*)LINK_REG_BASE)
 
-#define USB_IS0_CTSQ_MSK     (7u)
-#define USB_IS0_CTSQ_SETUP   (1u)
-#define USB_IS0_DVSQ_DEF     (1u<<4)
-#define USB_IS0_DVSQ_ADDR    (2u<<4)
-#define USB_IS0_DVSQ_SUSP0   (4u<<4)
-#define USB_IS0_DVSQ_SUSP1   (5u<<4)
-#define USB_IS0_DVSQ_SUSP2   (6u<<4)
-#define USB_IS0_DVSQ_SUSP3   (7u<<4)
-
-#define USB_PIPECTR_PID_NAK   (0u)
-#define USB_PIPECTR_PID_BUF   (1u)
-#define USB_PIPECTR_PID_STALL (2u)
-#define USB_PIPECTR_CCPL      (1u<<2)
-#define USB_PIPECTR_SQMON     (1u<<6)
-#define USB_PIPECTR_SQCLR     (1u<<8)
-#define USB_PIPECTR_ACLRM     (1u<<9)
-#define USB_PIPECTR_INBUFM    (1u<<14)
-#define USB_PIPECTR_BSTS      (1u<<15)
-
-#define USB_FIFOCTR_DTLN     (0x1FF)
-#define USB_FIFOCTR_FRDY     (1u<<13)
-#define USB_FIFOCTR_BCLR     (1u<<14)
-#define USB_FIFOCTR_BVAL     (1u<<15)
-
-#define USB_PIPECFG_SHTNAK   (1u<<7)
-#define USB_PIPECFG_DBLB     (1u<<9)
-#define USB_PIPECFG_BULK     (1u<<14)
-#define USB_PIPECFG_ISO      (3u<<14)
-#define USB_PIPECFG_INT      (2u<<14)
-
-#define FIFO_REQ_CLR         (1u)
-#define FIFO_COMPLETE        (1u<<1)
-
-// Start of definition of packed structs (used by the CCRX toolchain)
+/* Start of definition of packed structs (used by the CCRX toolchain) */
 TU_ATTR_PACKED_BEGIN
 TU_ATTR_BIT_FIELD_ORDER_BEGIN
 
-typedef struct {
+typedef struct TU_ATTR_PACKED {
   union {
     struct {
       uint16_t      : 8;
@@ -116,7 +66,7 @@ typedef struct {
   uint16_t TRN;
 } reg_pipetre_t;
 
-typedef union {
+typedef union TU_ATTR_PACKED {
   struct {
     volatile uint16_t u8: 8;
     volatile uint16_t   : 0;
@@ -150,28 +100,6 @@ typedef struct
 //--------------------------------------------------------------------+
 static dcd_data_t _dcd;
 
-static uint32_t disable_interrupt(void)
-{
-  uint32_t pswi;
-#if defined(__CCRX__)
-  pswi = get_psw() & 0x010000;
-  clrpsw_i();
-#else
-  pswi = __builtin_rx_mvfc(0) & 0x010000;
-  __builtin_rx_clrpsw('I');
-#endif
-  return pswi;
-}
-
-static void enable_interrupt(uint32_t pswi)
-{
-#if defined(__CCRX__)
-  set_psw(get_psw() | pswi);
-#else
-  __builtin_rx_mvtc(0, __builtin_rx_mvfc(0) | pswi);
-#endif
-}
-
 static unsigned find_pipe(unsigned xfer)
 {
   switch (xfer) {
@@ -202,22 +130,18 @@ static unsigned find_pipe(unsigned xfer)
 
 static volatile uint16_t* get_pipectr(unsigned num)
 {
-  volatile uint16_t *ctr = NULL;
   if (num) {
-    ctr = (volatile uint16_t*)&USB0.PIPE1CTR.WORD;
-    ctr += num - 1;
+    return (volatile uint16_t*)&(LINK_REG->PIPE_CTR[num - 1]);
   } else {
-    ctr = (volatile uint16_t*)&USB0.DCPCTR.WORD;
+    return (volatile uint16_t*)&(LINK_REG->DCPCTR);
   }
-  return ctr;
 }
 
 static volatile reg_pipetre_t* get_pipetre(unsigned num)
 {
   volatile reg_pipetre_t* tre = NULL;
   if ((1 <= num) && (num <= 5)) {
-    tre = (volatile reg_pipetre_t*)&USB0.PIPE1TRE.WORD;
-    tre += num - 1;
+    tre = (volatile reg_pipetre_t*)&(LINK_REG->PIPE_TR[num - 1].E);
   }
   return tre;
 }
@@ -225,36 +149,31 @@ static volatile reg_pipetre_t* get_pipetre(unsigned num)
 static volatile uint16_t* ep_addr_to_pipectr(uint8_t rhport, unsigned ep_addr)
 {
   (void)rhport;
-  volatile uint16_t *ctr = NULL;
-  const unsigned epn   = tu_edpt_number(ep_addr);
+  const unsigned epn = tu_edpt_number(ep_addr);
   if (epn) {
     const unsigned dir = tu_edpt_dir(ep_addr);
     const unsigned num = _dcd.ep[dir][epn];
-    if (num) {
-      ctr = (volatile uint16_t*)&USB0.PIPE1CTR.WORD;
-      ctr += num - 1;
-    }
+    return get_pipectr(num);
   } else {
-    ctr = (volatile uint16_t*)&USB0.DCPCTR.WORD;
+    return get_pipectr(0);
   }
-  return ctr;
 }
 
 static unsigned edpt0_max_packet_size(void)
 {
-  return USB0.DCPMAXP.BIT.MXPS;
+  return LINK_REG->DCPMAXP_b.MXPS;
 }
 
 static unsigned edpt_max_packet_size(unsigned num)
 {
-  USB0.PIPESEL.WORD = num;
-  return USB0.PIPEMAXP.WORD;
+  LINK_REG->PIPESEL = num;
+  return LINK_REG->PIPEMAXP;
 }
 
 static inline void pipe_wait_for_ready(unsigned num)
 {
-  while (USB0.D0FIFOSEL.BIT.CURPIPE != num) ;
-  while (!USB0.D0FIFOCTR.BIT.FRDY) ;
+  while (LINK_REG->D0FIFOSEL_b.CURPIPE != num) ;
+  while (!LINK_REG->D0FIFOCTR_b.FRDY) ;
 }
 
 static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
@@ -316,13 +235,14 @@ static bool pipe0_xfer_in(void)
   void          *buf = pipe->buf;
   if (len) {
     if (pipe->ff) {
-      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&USB0.CFIFO.WORD, len, TUSB_DIR_IN);
+      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&LINK_REG->CFIFO, len, TUSB_DIR_IN);
     } else {
-      pipe_write_packet(buf, (volatile void*)&USB0.CFIFO.WORD, len);
+      pipe_write_packet(buf, (volatile void*)&LINK_REG->CFIFO, len);
       pipe->buf = (uint8_t*)buf + len;
     }
   }
-  if (len < mps) USB0.CFIFOCTR.WORD = USB_FIFOCTR_BVAL;
+  if (len < mps)
+    LINK_REG->CFIFOCTR = USB_FIFOCTR_BVAL;
   pipe->remaining = rem - len;
   return false;
 }
@@ -333,18 +253,19 @@ static bool pipe0_xfer_out(void)
   const unsigned rem = pipe->remaining;
 
   const unsigned mps = edpt0_max_packet_size();
-  const unsigned vld = USB0.CFIFOCTR.BIT.DTLN;
+  const unsigned vld = LINK_REG->CFIFOCTR_b.DTLN;
   const unsigned len = TU_MIN(TU_MIN(rem, mps), vld);
   void          *buf = pipe->buf;
   if (len) {
     if (pipe->ff) {
-      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&USB0.CFIFO.WORD, len, TUSB_DIR_OUT);
+      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&LINK_REG->CFIFO, len, TUSB_DIR_OUT);
     } else {
-      pipe_read_packet(buf, (volatile void*)&USB0.CFIFO.WORD, len);
+      pipe_read_packet(buf, (volatile void*)&LINK_REG->CFIFO, len);
       pipe->buf = (uint8_t*)buf + len;
     }
   }
-  if (len < mps) USB0.CFIFOCTR.WORD = USB_FIFOCTR_BCLR;
+  if (len < mps)
+    LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR;
   pipe->remaining = rem - len;
   if ((len < mps) || (rem == len)) {
     pipe->buf = NULL;
@@ -363,22 +284,23 @@ static bool pipe_xfer_in(unsigned num)
     return true;
   }
 
-  USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
+  LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
   const unsigned mps  = edpt_max_packet_size(num);
   pipe_wait_for_ready(num);
   const unsigned len  = TU_MIN(rem, mps);
   void          *buf  = pipe->buf;
   if (len) {
     if (pipe->ff) {
-      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&USB0.D0FIFO.WORD, len, TUSB_DIR_IN);
+      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&LINK_REG->D0FIFO, len, TUSB_DIR_IN);
     } else {
-      pipe_write_packet(buf, (volatile void*)&USB0.D0FIFO.WORD, len);
+      pipe_write_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len);
       pipe->buf = (uint8_t*)buf + len;
     }
   }
-  if (len < mps) USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BVAL;
-  USB0.D0FIFOSEL.WORD = 0;
-  while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
+  if (len < mps)
+    LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL;
+  LINK_REG->D0FIFOSEL = 0;
+  while (LINK_REG->D0FIFOSEL_b.CURPIPE) continue; /* if CURPIPE bits changes, check written value */
   pipe->remaining = rem - len;
   return false;
 }
@@ -388,24 +310,25 @@ static bool pipe_xfer_out(unsigned num)
   pipe_state_t  *pipe = &_dcd.pipe[num];
   const unsigned rem  = pipe->remaining;
 
-  USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_8;
+  LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_8;
   const unsigned mps  = edpt_max_packet_size(num);
   pipe_wait_for_ready(num);
-  const unsigned vld  = USB0.D0FIFOCTR.BIT.DTLN;
+  const unsigned vld  = LINK_REG->D0FIFOCTR_b.DTLN;
   const unsigned len  = TU_MIN(TU_MIN(rem, mps), vld);
   void          *buf  = pipe->buf;
   if (len) {
     if (pipe->ff) {
-      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&USB0.D0FIFO.WORD, len, TUSB_DIR_OUT);
+      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&LINK_REG->D0FIFO, len, TUSB_DIR_OUT);
     } else {
-      pipe_read_packet(buf, (volatile void*)&USB0.D0FIFO.WORD, len);
+      pipe_read_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len);
       pipe->buf = (uint8_t*)buf + len;
     }
   }
-  if (len < mps) USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BCLR;
-  USB0.D0FIFOSEL.WORD = 0;
-  while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
-  pipe->remaining     = rem - len;
+  if (len < mps)
+    LINK_REG->D0FIFOCTR = USB_FIFOCTR_BCLR;
+  LINK_REG->D0FIFOSEL = 0;
+  while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
+  pipe->remaining = rem - len;
   if ((len < mps) || (rem == len)) {
     pipe->buf = NULL;
     return NULL != buf;
@@ -416,13 +339,13 @@ static bool pipe_xfer_out(unsigned num)
 static void process_setup_packet(uint8_t rhport)
 {
   uint16_t setup_packet[4];
-  if (0 == (USB0.INTSTS0.WORD & USB_IS0_VALID)) return;
-  USB0.CFIFOCTR.WORD = USB_FIFOCTR_BCLR;
-  setup_packet[0] = tu_le16toh(USB0.USBREQ.WORD);
-  setup_packet[1] = USB0.USBVAL;
-  setup_packet[2] = USB0.USBINDX;
-  setup_packet[3] = USB0.USBLENG;
-  USB0.INTSTS0.WORD = ~USB_IS0_VALID;
+  if (0 == (LINK_REG->INTSTS0 & USB_IS0_VALID)) return;
+  LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR;
+  setup_packet[0] = tu_le16toh(LINK_REG->USBREQ);
+  setup_packet[1] = LINK_REG->USBVAL;
+  setup_packet[2] = LINK_REG->USBINDX;
+  setup_packet[3] = LINK_REG->USBLENG;
+  LINK_REG->INTSTS0 = ~USB_IS0_VALID;
   dcd_event_setup_received(rhport, (const uint8_t*)&setup_packet[0], true);
 }
 
@@ -430,7 +353,7 @@ static void process_status_completion(uint8_t rhport)
 {
   uint8_t ep_addr;
   /* Check the data stage direction */
-  if (USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX) {
+  if (LINK_REG->CFIFOSEL & USB_FIFOSEL_TX) {
     /* IN transfer. */
     ep_addr = tu_edpt_addr(0, TUSB_DIR_IN);
   } else {
@@ -444,11 +367,12 @@ static bool process_pipe0_xfer(int buffer_type, uint8_t ep_addr, void* buffer, u
 {
   /* configure fifo direction and access unit settings */
   if (ep_addr) { /* IN, 2 bytes */
-    USB0.CFIFOSEL.WORD = USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
-    while (!(USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX)) ;
-  } else {       /* OUT, a byte */
-    USB0.CFIFOSEL.WORD = USB_FIFOSEL_MBW_8;
-    while (USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX) ;
+    LINK_REG->CFIFOSEL =
+      USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
+    while (!(LINK_REG->CFIFOSEL & USB_FIFOSEL_TX)) ;
+  } else { /* OUT, a byte */
+    LINK_REG->CFIFOSEL = USB_FIFOSEL_MBW_8;
+    while (LINK_REG->CFIFOSEL & USB_FIFOSEL_TX) ;
   }
 
   pipe_state_t *pipe = &_dcd.pipe[0];
@@ -458,14 +382,14 @@ static bool process_pipe0_xfer(int buffer_type, uint8_t ep_addr, void* buffer, u
   if (total_bytes) {
     pipe->buf     = buffer;
     if (ep_addr) { /* IN */
-      TU_ASSERT(USB0.DCPCTR.BIT.BSTS && (USB0.USBREQ.WORD & 0x80));
+      TU_ASSERT(LINK_REG->DCPCTR_b.BSTS && (LINK_REG->USBREQ & 0x80));
       pipe0_xfer_in();
     }
-    USB0.DCPCTR.WORD = USB_PIPECTR_PID_BUF;
+    LINK_REG->DCPCTR = USB_PIPECTR_PID_BUF;
   } else {
     /* ZLP */
     pipe->buf        = NULL;
-    USB0.DCPCTR.WORD = USB_PIPECTR_CCPL | USB_PIPECTR_PID_BUF;
+    LINK_REG->DCPCTR = USB_PIPECTR_CCPL | USB_PIPECTR_PID_BUF;
   }
   return true;
 }
@@ -487,11 +411,11 @@ static bool process_pipe_xfer(int buffer_type, uint8_t ep_addr, void* buffer, ui
     if (total_bytes) {
       pipe_xfer_in(num);
     } else { /* ZLP */
-      USB0.D0FIFOSEL.WORD = num;
+      LINK_REG->D0FIFOSEL = num;
       pipe_wait_for_ready(num);
-      USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BVAL;
-      USB0.D0FIFOSEL.WORD = 0;
-      while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
+      LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL;
+      LINK_REG->D0FIFOSEL = 0;
+      while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
     }
   } else {
 #if defined(__CCRX__)
@@ -558,18 +482,18 @@ static void process_pipe_brdy(uint8_t rhport, unsigned num)
 
 static void process_bus_reset(uint8_t rhport)
 {
-  USB0.BEMPENB.WORD   = 1;
-  USB0.BRDYENB.WORD   = 1;
-  USB0.CFIFOCTR.WORD  = USB_FIFOCTR_BCLR;
-  USB0.D0FIFOSEL.WORD = 0;
-  while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
-  USB0.D1FIFOSEL.WORD = 0;
-  while (USB0.D1FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
-  volatile uint16_t *ctr = (volatile uint16_t*)((uintptr_t)(&USB0.PIPE1CTR.WORD));
-  volatile uint16_t *tre = (volatile uint16_t*)((uintptr_t)(&USB0.PIPE1TRE.WORD));
+  LINK_REG->BEMPENB = 1;
+  LINK_REG->BRDYENB = 1;
+  LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR;
+  LINK_REG->D0FIFOSEL = 0;
+  while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
+  LINK_REG->D1FIFOSEL = 0;
+  while (LINK_REG->D1FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
+  volatile uint16_t *ctr = (volatile uint16_t*)((uintptr_t) (&LINK_REG->PIPE_CTR[0]));
+  volatile uint16_t *tre = (volatile uint16_t*)((uintptr_t) (&LINK_REG->PIPE_TR[0].E));
   for (int i = 1; i <= 5; ++i) {
-    USB0.PIPESEL.WORD  = i;
-    USB0.PIPECFG.WORD  = 0;
+    LINK_REG->PIPESEL = i;
+    LINK_REG->PIPECFG = 0;
     *ctr = USB_PIPECTR_ACLRM;
     *ctr = 0;
     ++ctr;
@@ -577,8 +501,8 @@ static void process_bus_reset(uint8_t rhport)
     tre += 2;
   }
   for (int i = 6; i <= 9; ++i) {
-    USB0.PIPESEL.WORD  = i;
-    USB0.PIPECFG.WORD  = 0;
+    LINK_REG->PIPESEL = i;
+    LINK_REG->PIPECFG = 0;
     *ctr = USB_PIPECTR_ACLRM;
     *ctr = 0;
     ++ctr;
@@ -589,7 +513,7 @@ static void process_bus_reset(uint8_t rhport)
 
 static void process_set_address(uint8_t rhport)
 {
-  const uint32_t addr = USB0.USBADDR.BIT.USBADDR;
+  const uint32_t addr = LINK_REG->USBADDR_b.USBADDR;
   if (!addr) return;
   const tusb_control_request_t setup_packet = {
 #if defined(__CCRX__)
@@ -611,56 +535,39 @@ static void process_set_address(uint8_t rhport)
 void dcd_init(uint8_t rhport)
 {
   (void)rhport;
-  /* Enable USB0 */
-  uint32_t pswi = disable_interrupt();
-  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
-  MSTP(USB0) = 0;
-  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
-  enable_interrupt(pswi);
-  USB0.SYSCFG.BIT.SCKE = 1;
-  while (!USB0.SYSCFG.BIT.SCKE) ;
-  USB0.SYSCFG.BIT.DRPD = 0;
-  USB0.SYSCFG.BIT.DCFM = 0;
-  USB0.SYSCFG.BIT.USBE = 1;
 
-  USB.DPUSR0R.BIT.FIXPHY0 = 0u;    /* USB0 Transceiver Output fixed */
-#if ( CFG_TUSB_MCU == OPT_MCU_RX72N )
-  USB0.PHYSLEW.LONG = 0x5;
-  IR(PERIB, INTB185) = 0;
-#else
-  IR(USB0, USBI0)   = 0;
-#endif
+  LINK_REG->SYSCFG_b.SCKE = 1;
+  while (!LINK_REG->SYSCFG_b.SCKE) ;
+  LINK_REG->SYSCFG_b.DRPD = 0;
+  LINK_REG->SYSCFG_b.DCFM = 0;
+  LINK_REG->SYSCFG_b.USBE = 1;
+
+  // MCU specific PHY init
+  link_phy_init();
+
+  LINK_REG->PHYSLEW = 0x5;
+  LINK_REG->DPUSR0R_FS_b.FIXPHY0 = 0u; /* USB_BASE Transceiver Output fixed */
 
   /* Setup default control pipe */
-  USB0.DCPMAXP.BIT.MXPS  = 64;
-  USB0.INTENB0.WORD = USB_IS0_VBINT | USB_IS0_BRDY | USB_IS0_BEMP |
-    USB_IS0_DVST | USB_IS0_CTRT | (USE_SOF ? USB_IS0_SOFR: 0) | USB_IS0_RESM;
-  USB0.BEMPENB.WORD = 1;
-  USB0.BRDYENB.WORD = 1;
+  LINK_REG->DCPMAXP_b.MXPS = 64;
+  LINK_REG->INTENB0 = USB_IS0_VBINT | USB_IS0_BRDY | USB_IS0_BEMP | USB_IS0_DVST | USB_IS0_CTRT |
+          (USE_SOF ? USB_IS0_SOFR : 0) | USB_IS0_RESM;
+  LINK_REG->BEMPENB = 1;
+  LINK_REG->BRDYENB = 1;
 
-  if (USB0.INTSTS0.BIT.VBSTS) {
+  if (LINK_REG->INTSTS0_b.VBSTS) {
     dcd_connect(rhport);
   }
 }
 
 void dcd_int_enable(uint8_t rhport)
 {
-  (void)rhport;
-#if ( CFG_TUSB_MCU == OPT_MCU_RX72N )
-  IEN(PERIB, INTB185) = 1;
-#else
-  IEN(USB0, USBI0) = 1;
-#endif
+  link_int_enable(rhport);
 }
 
 void dcd_int_disable(uint8_t rhport)
 {
-  (void)rhport;
-#if ( CFG_TUSB_MCU == OPT_MCU_RX72N )
-  IEN(PERIB, INTB185) = 0;
-#else
-  IEN(USB0, USBI0) = 0;
-#endif
+  link_int_disable(rhport);
 }
 
 void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
@@ -672,19 +579,19 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
 void dcd_remote_wakeup(uint8_t rhport)
 {
   (void)rhport;
-  USB0.DVSTCTR0.BIT.WKUP = 1;
+  LINK_REG->DVSTCTR0_b.WKUP = 1;
 }
 
 void dcd_connect(uint8_t rhport)
 {
   (void)rhport;
-  USB0.SYSCFG.BIT.DPRPU = 1;
+  LINK_REG->SYSCFG_b.DPRPU = 1;
 }
 
 void dcd_disconnect(uint8_t rhport)
 {
   (void)rhport;
-  USB0.SYSCFG.BIT.DPRPU = 0;
+  LINK_REG->SYSCFG_b.DPRPU = 0;
 }
 
 void dcd_sof_enable(uint8_t rhport, bool en)
@@ -720,8 +627,8 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
 
   /* setup pipe */
   dcd_int_disable(rhport);
-  USB0.PIPESEL.WORD  = num;
-  USB0.PIPEMAXP.WORD = mps;
+  LINK_REG->PIPESEL = num;
+  LINK_REG->PIPEMAXP = mps;
   volatile uint16_t *ctr = get_pipectr(num);
   *ctr = USB_PIPECTR_ACLRM | USB_PIPECTR_SQCLR;
   *ctr = 0;
@@ -733,13 +640,13 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   } else {
     cfg |= (USB_PIPECFG_ISO | USB_PIPECFG_DBLB);
   }
-  USB0.PIPECFG.WORD  = cfg;
-  USB0.BRDYSTS.WORD  = 0x1FFu ^ TU_BIT(num);
-  USB0.BRDYENB.WORD |= TU_BIT(num);
+  LINK_REG->PIPECFG = cfg;
+  LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num);
+  LINK_REG->BRDYENB |= TU_BIT(num);
   if (dir || (xfer != TUSB_XFER_BULK)) {
     *ctr = USB_PIPECTR_PID_BUF;
   }
-  // TU_LOG1("O %d %x %x\r\n", USB0.PIPESEL.WORD, USB0.PIPECFG.WORD, USB0.PIPEMAXP.WORD);
+  // TU_LOG1("O %d %x %x\r\n", LINK_REG->PIPESEL, LINK_REG->PIPECFG, LINK_REG->PIPEMAXP);
   dcd_int_enable(rhport);
 
   return true;
@@ -764,11 +671,11 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
   const unsigned dir = tu_edpt_dir(ep_addr);
   const unsigned num = _dcd.ep[dir][epn];
 
-  USB0.BRDYENB.WORD &= ~TU_BIT(num);
+  LINK_REG->BRDYENB &= ~TU_BIT(num);
   volatile uint16_t *ctr = get_pipectr(num);
   *ctr = 0;
-  USB0.PIPESEL.WORD = num;
-  USB0.PIPECFG.WORD = 0;
+  LINK_REG->PIPESEL = num;
+  LINK_REG->PIPECFG = 0;
   _dcd.pipe[num].ep = 0;
   _dcd.ep[dir][epn] = 0;
 }
@@ -815,8 +722,8 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
     *ctr = USB_PIPECTR_PID_BUF;
   } else {
     const unsigned num = _dcd.ep[0][tu_edpt_number(ep_addr)];
-    USB0.PIPESEL.WORD  = num;
-    if (USB0.PIPECFG.BIT.TYPE != 1) {
+    LINK_REG->PIPESEL = num;
+    if (LINK_REG->PIPECFG_b.TYPE != 1) {
       *ctr = USB_PIPECTR_PID_BUF;
     }
   }
@@ -830,11 +737,11 @@ void dcd_int_handler(uint8_t rhport)
 {
   (void)rhport;
 
-  unsigned is0 = USB0.INTSTS0.WORD;
+  unsigned is0 = LINK_REG->INTSTS0;
   /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */
-  USB0.INTSTS0.WORD = ~((USB_IS0_CTRT | USB_IS0_DVST | USB_IS0_SOFR | USB_IS0_RESM | USB_IS0_VBINT) & is0) | USB_IS0_VALID;
+  LINK_REG->INTSTS0 = ~((USB_IS0_CTRT | USB_IS0_DVST | USB_IS0_SOFR | USB_IS0_RESM | USB_IS0_VBINT) & is0) | USB_IS0_VALID;
   if (is0 & USB_IS0_VBINT) {
-    if (USB0.INTSTS0.BIT.VBSTS) {
+    if (LINK_REG->INTSTS0_b.VBSTS) {
       dcd_connect(rhport);
     } else {
       dcd_disconnect(rhport);
@@ -843,14 +750,14 @@ void dcd_int_handler(uint8_t rhport)
   if (is0 & USB_IS0_RESM) {
     dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true);
 #if (0==USE_SOF)
-    USB0.INTENB0.BIT.SOFE = 0;
+    LINK_REG->INTENB0_b.SOFE = 0;
 #endif
   }
-  if ((is0 & USB_IS0_SOFR) && USB0.INTENB0.BIT.SOFE) {
+  if ((is0 & USB_IS0_SOFR) && LINK_REG->INTENB0_b.SOFE) {
     // USBD will exit suspended mode when SOF event is received
     dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true);
-#if (0==USE_SOF)
-    USB0.INTENB0.BIT.SOFE = 0;
+#if (0 == USE_SOF)
+    LINK_REG->INTENB0_b.SOFE = 0;
 #endif
   }
   if (is0 & USB_IS0_DVST) {
@@ -867,7 +774,7 @@ void dcd_int_handler(uint8_t rhport)
     case USB_IS0_DVSQ_SUSP3:
        dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true);
 #if (0==USE_SOF)
-       USB0.INTENB0.BIT.SOFE = 1;
+      LINK_REG->INTENB0_b.SOFE = 1;
 #endif
     default:
       break;
@@ -883,17 +790,17 @@ void dcd_int_handler(uint8_t rhport)
     }
   }
   if (is0 & USB_IS0_BEMP) {
-    const unsigned s = USB0.BEMPSTS.WORD;
-    USB0.BEMPSTS.WORD = 0;
+    const unsigned s = LINK_REG->BEMPSTS;
+    LINK_REG->BEMPSTS = 0;
     if (s & 1) {
       process_pipe0_bemp(rhport);
     }
   }
   if (is0 & USB_IS0_BRDY) {
-    const unsigned m = USB0.BRDYENB.WORD;
-    unsigned s       = USB0.BRDYSTS.WORD & m;
+    const unsigned m = LINK_REG->BRDYENB;
+    unsigned s = LINK_REG->BRDYSTS & m;
     /* clear active bits (don't write 0 to already cleared bits according to the HW manual) */
-    USB0.BRDYSTS.WORD = ~s;
+    LINK_REG->BRDYSTS = ~s;
     while (s) {
 #if defined(__CCRX__)
       static const int Mod37BitPosition[] = {
diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/link/hcd_link.c
index 5246ecb94..46a4aae8f 100644
--- a/src/portable/renesas/link/hcd_link.c
+++ b/src/portable/renesas/link/hcd_link.c
@@ -27,86 +27,28 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUH_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_RX63X || \
-                               CFG_TUSB_MCU == OPT_MCU_RX65X || \
-                               CFG_TUSB_MCU == OPT_MCU_RX72N )
+#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N)
+
 #include "host/hcd.h"
-#include "iodefine.h"
+#include "link_type.h"
+
+#if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
+#include "link_rx.h"
+#else
+#error "Unsupported MCU"
+#endif
 
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM DECLARATION
 //--------------------------------------------------------------------+
-#define SYSTEM_PRCR_PRC1     (1<<1)
-#define SYSTEM_PRCR_PRKEY    (0xA5u<<8)
 
-#define USB_DVSTCTR0_LOW     (1u)
-#define USB_DVSTCTR0_FULL    (2u)
+/* LINK core registers */
+#define LINK_REG ((LINK_REG_t*)LINK_REG_BASE)
 
-#define USB_FIFOSEL_TX       ((uint16_t)(1u<<5))
-#define USB_FIFOSEL_BIGEND   ((uint16_t)(1u<<8))
-#define USB_FIFOSEL_MBW_8    ((uint16_t)(0u<<10))
-#define USB_FIFOSEL_MBW_16   ((uint16_t)(1u<<10))
-#define USB_IS0_CTSQ         ((uint16_t)(7u))
-#define USB_IS0_DVSQ         ((uint16_t)(7u<<4))
-#define USB_IS0_VALID        ((uint16_t)(1u<<3))
-#define USB_IS0_BRDY         ((uint16_t)(1u<<8))
-#define USB_IS0_NRDY         ((uint16_t)(1u<<9))
-#define USB_IS0_BEMP         ((uint16_t)(1u<<10))
-#define USB_IS0_CTRT         ((uint16_t)(1u<<11))
-#define USB_IS0_DVST         ((uint16_t)(1u<<12))
-#define USB_IS0_SOFR         ((uint16_t)(1u<<13))
-#define USB_IS0_RESM         ((uint16_t)(1u<<14))
-#define USB_IS0_VBINT        ((uint16_t)(1u<<15))
-#define USB_IS1_SACK         ((uint16_t)(1u<<4))
-#define USB_IS1_SIGN         ((uint16_t)(1u<<5))
-#define USB_IS1_EOFERR       ((uint16_t)(1u<<6))
-#define USB_IS1_ATTCH        ((uint16_t)(1u<<11))
-#define USB_IS1_DTCH         ((uint16_t)(1u<<12))
-#define USB_IS1_BCHG         ((uint16_t)(1u<<14))
-#define USB_IS1_OVRCR        ((uint16_t)(1u<<15))
-
-#define USB_IS0_CTSQ_MSK     (7u)
-#define USB_IS0_CTSQ_SETUP   (1u)
-#define USB_IS0_DVSQ_DEF     (1u<<4)
-#define USB_IS0_DVSQ_ADDR    (2u<<4)
-#define USB_IS0_DVSQ_SUSP0   (4u<<4)
-#define USB_IS0_DVSQ_SUSP1   (5u<<4)
-#define USB_IS0_DVSQ_SUSP2   (6u<<4)
-#define USB_IS0_DVSQ_SUSP3   (7u<<4)
-
-#define USB_PIPECTR_PID_MSK   (3u)
-#define USB_PIPECTR_PID_NAK   (0u)
-#define USB_PIPECTR_PID_BUF   (1u)
-#define USB_PIPECTR_PID_STALL (2u)
-#define USB_PIPECTR_CCPL      (1u<<2)
-#define USB_PIPECTR_SQMON     (1u<<6)
-#define USB_PIPECTR_SQCLR     (1u<<8)
-#define USB_PIPECTR_ACLRM     (1u<<9)
-#define USB_PIPECTR_INBUFM    (1u<<14)
-#define USB_PIPECTR_BSTS      (1u<<15)
-
-#define USB_FIFOCTR_DTLN     (0x1FF)
-#define USB_FIFOCTR_FRDY     (1u<<13)
-#define USB_FIFOCTR_BCLR     (1u<<14)
-#define USB_FIFOCTR_BVAL     (1u<<15)
-
-#define USB_PIPECFG_SHTNAK   (1u<<7)
-#define USB_PIPECFG_DBLB     (1u<<9)
-#define USB_PIPECFG_BULK     (1u<<14)
-#define USB_PIPECFG_ISO      (3u<<14)
-#define USB_PIPECFG_INT      (2u<<14)
-
-#define USB_DEVADD_LOW       (1u<<6)
-#define USB_DEVADD_FULL      (2u<<6)
-
-#define FIFO_REQ_CLR         (1u)
-#define FIFO_COMPLETE        (1u<<1)
-
-// Start of definition of packed structs (used by the CCRX toolchain)
 TU_ATTR_PACKED_BEGIN
 TU_ATTR_BIT_FIELD_ORDER_BEGIN
 
-typedef struct {
+typedef struct TU_ATTR_PACKED {
   union {
     struct {
       uint16_t      : 8;
@@ -119,7 +61,7 @@ typedef struct {
   uint16_t TRN;
 } reg_pipetre_t;
 
-typedef union {
+typedef union TU_ATTR_PACKED {
   struct {
     volatile uint16_t u8: 8;
     volatile uint16_t   : 0;
@@ -127,8 +69,7 @@ typedef union {
   volatile uint16_t u16;
 } hw_fifo_t;
 
-typedef struct TU_ATTR_PACKED
-{
+typedef struct TU_ATTR_PACKED {
   void      *buf;      /* the start address of a transfer data buffer */
   uint16_t  length;    /* the number of bytes in the buffer */
   uint16_t  remaining; /* the number of bytes remaining in the buffer */
@@ -156,28 +97,6 @@ typedef struct
 //--------------------------------------------------------------------+
 static hcd_data_t _hcd;
 
-static uint32_t disable_interrupt(void)
-{
-  uint32_t pswi;
-#if defined(__CCRX__)
-  pswi = get_psw() & 0x010000;
-  clrpsw_i();
-#else
-  pswi = __builtin_rx_mvfc(0) & 0x010000;
-  __builtin_rx_clrpsw('I');
-#endif
-  return pswi;
-}
-
-static void enable_interrupt(uint32_t pswi)
-{
-#if defined(__CCRX__)
-  set_psw(get_psw() | pswi);
-#else
-  __builtin_rx_mvtc(0, __builtin_rx_mvfc(0) | pswi);
-#endif
-}
-
 static unsigned find_pipe(unsigned xfer)
 {
   switch (xfer) {
@@ -208,58 +127,49 @@ static unsigned find_pipe(unsigned xfer)
 
 static volatile uint16_t* get_pipectr(unsigned num)
 {
-  volatile uint16_t *ctr = NULL;
   if (num) {
-    ctr = (volatile uint16_t*)&USB0.PIPE1CTR.WORD;
-    ctr += num - 1;
+    return (volatile uint16_t*)&(LINK_REG->PIPE_CTR[num - 1]);
   } else {
-    ctr = (volatile uint16_t*)&USB0.DCPCTR.WORD;
+    return (volatile uint16_t*)&(LINK_REG->DCPCTR);
   }
-  return ctr;
 }
 
 static volatile reg_pipetre_t* get_pipetre(unsigned num)
 {
   volatile reg_pipetre_t* tre = NULL;
   if ((1 <= num) && (num <= 5)) {
-    tre = (volatile reg_pipetre_t*)&USB0.PIPE1TRE.WORD;
-    tre += num - 1;
+    tre = (volatile reg_pipetre_t*)&(LINK_REG->PIPE_TR[num - 1].E);
   }
   return tre;
 }
 
 static volatile uint16_t* addr_to_pipectr(uint8_t dev_addr, unsigned ep_addr)
 {
-  volatile uint16_t *ctr = NULL;
-  const unsigned epn   = tu_edpt_number(ep_addr);
+  const unsigned epn = tu_edpt_number(ep_addr);
   if (epn) {
     const unsigned dir_in = tu_edpt_dir(ep_addr);
-    const unsigned num    = _hcd.ep[dev_addr][dir_in][epn - 1];
-    if (num) {
-      ctr = (volatile uint16_t*)&USB0.PIPE1CTR.WORD;
-      ctr += num - 1;
-    }
+    const unsigned num = _hcd.ep[dev_addr][dir_in][epn - 1];
+    return get_pipectr(num);
   } else {
-    ctr = (volatile uint16_t*)&USB0.DCPCTR.WORD;
+    return get_pipectr(0);
   }
-  return ctr;
 }
 
 static unsigned edpt0_max_packet_size(void)
 {
-  return USB0.DCPMAXP.BIT.MXPS;
+  return LINK_REG->DCPMAXP_b.MXPS;
 }
 
 static unsigned edpt_max_packet_size(unsigned num)
 {
-  USB0.PIPESEL.WORD = num;
-  return USB0.PIPEMAXP.BIT.MXPS;
+  LINK_REG->PIPESEL = num;
+  return LINK_REG->PIPEMAXP_b.MXPS;
 }
 
 static inline void pipe_wait_for_ready(unsigned num)
 {
-  while (USB0.D0FIFOSEL.BIT.CURPIPE != num) ;
-  while (!USB0.D0FIFOCTR.BIT.FRDY) ;
+  while (LINK_REG->D0FIFOSEL_b.CURPIPE != num) ;
+  while (!LINK_REG->D0FIFOCTR_b.FRDY) ;
 }
 
 static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
@@ -290,21 +200,22 @@ static bool pipe0_xfer_in(void)
   const unsigned rem = pipe->remaining;
 
   const unsigned mps = edpt0_max_packet_size();
-  const unsigned vld = USB0.CFIFOCTR.BIT.DTLN;
+  const unsigned vld = LINK_REG->CFIFOCTR_b.DTLN;
   const unsigned len = TU_MIN(TU_MIN(rem, mps), vld);
   void          *buf = pipe->buf;
   if (len) {
-    USB0.DCPCTR.WORD = USB_PIPECTR_PID_NAK;
-    pipe_read_packet(buf, (volatile void*)&USB0.CFIFO.WORD, len);
+    LINK_REG->DCPCTR = USB_PIPECTR_PID_NAK;
+    pipe_read_packet(buf, (volatile void*)&LINK_REG->CFIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
-  if (len < mps) USB0.CFIFOCTR.WORD = USB_FIFOCTR_BCLR;
+  if (len < mps)
+    LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR;
   pipe->remaining = rem - len;
   if ((len < mps) || (rem == len)) {
     pipe->buf = NULL;
     return true;
   }
-  USB0.DCPCTR.WORD = USB_PIPECTR_PID_BUF;
+  LINK_REG->DCPCTR = USB_PIPECTR_PID_BUF;
   return false;
 }
 
@@ -320,10 +231,11 @@ static bool pipe0_xfer_out(void)
   const unsigned len = TU_MIN(mps, rem);
   void          *buf = pipe->buf;
   if (len) {
-    pipe_write_packet(buf, (volatile void*)&USB0.CFIFO.WORD, len);
+    pipe_write_packet(buf, (volatile void*)&LINK_REG->CFIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
-  if (len < mps) USB0.CFIFOCTR.WORD = USB_FIFOCTR_BVAL;
+  if (len < mps)
+    LINK_REG->CFIFOCTR = USB_FIFOCTR_BVAL;
   pipe->remaining = rem - len;
   return false;
 }
@@ -333,20 +245,21 @@ static bool pipe_xfer_in(unsigned num)
   pipe_state_t  *pipe = &_hcd.pipe[num];
   const unsigned rem  = pipe->remaining;
 
-  USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_8;
+  LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_8;
   const unsigned mps  = edpt_max_packet_size(num);
   pipe_wait_for_ready(num);
-  const unsigned vld  = USB0.D0FIFOCTR.BIT.DTLN;
+  const unsigned vld  = LINK_REG->D0FIFOCTR_b.DTLN;
   const unsigned len  = TU_MIN(TU_MIN(rem, mps), vld);
   void          *buf  = pipe->buf;
   if (len) {
-    pipe_read_packet(buf, (volatile void*)&USB0.D0FIFO.WORD, len);
+    pipe_read_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
-  if (len < mps) USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BCLR;
-  USB0.D0FIFOSEL.WORD = 0;
-  while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
-  pipe->remaining     = rem - len;
+  if (len < mps)
+    LINK_REG->D0FIFOCTR = USB_FIFOCTR_BCLR;
+  LINK_REG->D0FIFOSEL = 0;
+  while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
+  pipe->remaining = rem - len;
   if ((len < mps) || (rem == len)) {
     pipe->buf = NULL;
     return NULL != buf;
@@ -364,18 +277,19 @@ static bool pipe_xfer_out(unsigned num)
     return true;
   }
 
-  USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
+  LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
   const unsigned mps  = edpt_max_packet_size(num);
   pipe_wait_for_ready(num);
   const unsigned len  = TU_MIN(rem, mps);
   void          *buf  = pipe->buf;
   if (len) {
-    pipe_write_packet(buf, (volatile void*)&USB0.D0FIFO.WORD, len);
+    pipe_write_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
-  if (len < mps) USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BVAL;
-  USB0.D0FIFOSEL.WORD = 0;
-  while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
+  if (len < mps)
+    LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL;
+  LINK_REG->D0FIFOSEL = 0;
+  while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
   pipe->remaining = rem - len;
   return false;
 }
@@ -387,11 +301,12 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer,
 
   /* configure fifo direction and access unit settings */
   if (dir_in) { /* IN, a byte */
-    USB0.CFIFOSEL.WORD  = USB_FIFOSEL_MBW_8;
-    while (USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX) ;
-  } else {       /* OUT, 2 bytes */
-    USB0.CFIFOSEL.WORD  = USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
-    while (!(USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX)) ;
+    LINK_REG->CFIFOSEL = USB_FIFOSEL_MBW_8;
+    while (LINK_REG->CFIFOSEL & USB_FIFOSEL_TX) ;
+  } else { /* OUT, 2 bytes */
+    LINK_REG->CFIFOSEL =
+      USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
+    while (!(LINK_REG->CFIFOSEL & USB_FIFOSEL_TX)) ;
   }
 
   pipe_state_t *pipe = &_hcd.pipe[0];
@@ -401,25 +316,25 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer,
   if (buflen) {
     pipe->buf     = buffer;
     if (!dir_in) { /* OUT */
-      TU_ASSERT(USB0.DCPCTR.BIT.BSTS && (USB0.USBREQ.WORD & 0x80));
+      TU_ASSERT(LINK_REG->DCPCTR_b.BSTS && (LINK_REG->USBREQ & 0x80));
       pipe0_xfer_out();
     }
   } else { /* ZLP */
     pipe->buf        = NULL;
     if (!dir_in) { /* OUT */
-      USB0.CFIFOCTR.WORD = USB_FIFOCTR_BVAL;
+      LINK_REG->CFIFOCTR = USB_FIFOCTR_BVAL;
     }
-    if (dir_in == USB0.DCPCFG.BIT.DIR) {
-      TU_ASSERT(USB_PIPECTR_PID_NAK == USB0.DCPCTR.BIT.PID);
-      USB0.DCPCTR.BIT.SQSET = 1;
-      USB0.DCPCFG.BIT.DIR = dir_in ^ 1;
+    if (dir_in == LINK_REG->DCPCFG_b.DIR) {
+      TU_ASSERT(USB_PIPECTR_PID_NAK == LINK_REG->DCPCTR_b.PID);
+      LINK_REG->DCPCTR_b.SQSET = 1;
+      LINK_REG->DCPCFG_b.DIR = dir_in ^ 1;
     }
   }
-  USB0.DCPCTR.WORD = USB_PIPECTR_PID_BUF;
+  LINK_REG->DCPCTR = USB_PIPECTR_PID_BUF;
   return true;
 }
 
-static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, uint16_t buflen)
+static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void *buffer, uint16_t buflen)
 {
   const unsigned epn    = tu_edpt_number(ep_addr);
   const unsigned dir_in = tu_edpt_dir(ep_addr);
@@ -435,11 +350,11 @@ static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, u
     if (buflen) {
       pipe_xfer_out(num);
     } else { /* ZLP */
-      USB0.D0FIFOSEL.WORD = num;
+      LINK_REG->D0FIFOSEL = num;
       pipe_wait_for_ready(num);
-      USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BVAL;
-      USB0.D0FIFOSEL.WORD = 0;
-      while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
+      LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL;
+      LINK_REG->D0FIFOSEL = 0;
+      while (LINK_REG->D0FIFOSEL_b.CURPIPE) continue; /* if CURPIPE bits changes, check written value */
     }
   } else {
     volatile uint16_t     *ctr = get_pipectr(num);
@@ -520,69 +435,51 @@ static void process_pipe_brdy(uint8_t rhport, unsigned num)
   }
 }
 
-
 /*------------------------------------------------------------------*/
 /* Host API
  *------------------------------------------------------------------*/
 bool hcd_init(uint8_t rhport)
 {
   (void)rhport;
-  /* Enable USB0 */
-  uint32_t pswi = disable_interrupt();
-  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
-  MSTP(USB0) = 0;
-  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
-  enable_interrupt(pswi);
-  USB0.SYSCFG.BIT.SCKE = 1;
-  while (!USB0.SYSCFG.BIT.SCKE) ;
-  USB0.SYSCFG.BIT.DPRPU = 0;
-  USB0.SYSCFG.BIT.DRPD = 0;
-  USB0.SYSCFG.BIT.DCFM = 1;
 
-  USB0.DVSTCTR0.BIT.VBUSEN = 1;
+  LINK_REG->SYSCFG_b.SCKE = 1;
+  while (!LINK_REG->SYSCFG_b.SCKE) ;
+  LINK_REG->SYSCFG_b.DPRPU = 0;
+  LINK_REG->SYSCFG_b.DRPD = 0;
+  LINK_REG->SYSCFG_b.DCFM = 1;
 
-  USB0.SYSCFG.BIT.DRPD = 1;
+  LINK_REG->DVSTCTR0_b.VBUSEN = 1;
+
+  LINK_REG->SYSCFG_b.DRPD = 1;
   for (volatile int i = 0; i < 30000; ++i) ;
-  USB0.SYSCFG.BIT.USBE = 1;
+  LINK_REG->SYSCFG_b.USBE = 1;
 
-  USB.DPUSR0R.BIT.FIXPHY0 = 0u;    /* USB0 Transceiver Output fixed */
-#if ( CFG_TUSB_MCU == OPT_MCU_RX72N )
-  USB0.PHYSLEW.LONG = 0x5;
-  IR(PERIB, INTB185) = 0;
-#else
-  IR(USB0, USBI0)   = 0;
-#endif
+  // MCU specific PHY init
+  link_phy_init();
+
+  LINK_REG->PHYSLEW = 0x5;
+  LINK_REG->DPUSR0R_FS_b.FIXPHY0 = 0u; /* Transceiver Output fixed */
 
   /* Setup default control pipe */
-  USB0.DCPCFG.WORD  = USB_PIPECFG_SHTNAK;
-  USB0.DCPMAXP.WORD = 64;
-  USB0.INTENB0.WORD = USB_IS0_BRDY | USB_IS0_NRDY | USB_IS0_BEMP;
-  USB0.INTENB1.WORD = USB_IS1_SACK | USB_IS1_SIGN |
-    USB_IS1_ATTCH | USB_IS1_DTCH;
-  USB0.BEMPENB.WORD = 1;
-  USB0.NRDYENB.WORD = 1;
-  USB0.BRDYENB.WORD = 1;
+  LINK_REG->DCPCFG = USB_PIPECFG_SHTNAK;
+  LINK_REG->DCPMAXP = 64;
+  LINK_REG->INTENB0 = USB_IS0_BRDY | USB_IS0_NRDY | USB_IS0_BEMP;
+  LINK_REG->INTENB1 = USB_IS1_SACK | USB_IS1_SIGN | USB_IS1_ATTCH | USB_IS1_DTCH;
+  LINK_REG->BEMPENB = 1;
+  LINK_REG->NRDYENB = 1;
+  LINK_REG->BRDYENB = 1;
+
   return true;
 }
 
 void hcd_int_enable(uint8_t rhport)
 {
-  (void)rhport;
-#if ( CFG_TUSB_MCU == OPT_MCU_RX72N )
-  IEN(PERIB, INTB185) = 1;
-#else
-  IEN(USB0, USBI0) = 1;
-#endif
+  link_int_enable(rhport);
 }
 
 void hcd_int_disable(uint8_t rhport)
 {
-  (void)rhport;
-#if ( CFG_TUSB_MCU == OPT_MCU_RX72N )
-  IEN(PERIB, INTB185) = 0;
-#else
-  IEN(USB0, USBI0) = 0;
-#endif
+  link_int_disable(rhport);
 }
 
 uint32_t hcd_frame_number(uint8_t rhport)
@@ -591,7 +488,7 @@ uint32_t hcd_frame_number(uint8_t rhport)
   /* The device must be reset at least once after connection 
    * in order to start the frame counter. */
   if (_hcd.need_reset) hcd_port_reset(rhport);
-  return USB0.FRMNUM.BIT.FRNM;
+  return LINK_REG->FRMNUM_b.FRNM;
 }
 
 /*--------------------------------------------------------------------+
@@ -600,23 +497,23 @@ uint32_t hcd_frame_number(uint8_t rhport)
 bool hcd_port_connect_status(uint8_t rhport)
 {
   (void)rhport;
-  return USB0.INTSTS1.BIT.ATTCH ? true: false;
+  return LINK_REG->INTSTS1_b.ATTCH ? true : false;
 }
 
 void hcd_port_reset(uint8_t rhport)
 {
-  USB0.DCPCTR.WORD = USB_PIPECTR_PID_NAK;
-  while (USB0.DCPCTR.BIT.PBUSY) ;
+  LINK_REG->DCPCTR = USB_PIPECTR_PID_NAK;
+  while (LINK_REG->DCPCTR_b.PBUSY) ;
   hcd_int_disable(rhport);
-  USB0.DVSTCTR0.BIT.UACT   = 0;
-  if (USB0.DCPCTR.BIT.SUREQ)
-    USB0.DCPCTR.BIT.SUREQCLR = 1;
+  LINK_REG->DVSTCTR0_b.UACT = 0;
+  if (LINK_REG->DCPCTR_b.SUREQ)
+    LINK_REG->DCPCTR_b.SUREQCLR = 1;
   hcd_int_enable(rhport);
   /* Reset should be asserted 10-20ms. */
-  USB0.DVSTCTR0.BIT.USBRST = 1;
+  LINK_REG->DVSTCTR0_b.USBRST = 1;
   for (volatile int i = 0; i < 2400000; ++i) ;
-  USB0.DVSTCTR0.BIT.USBRST = 0;
-  USB0.DVSTCTR0.BIT.UACT   = 1;
+  LINK_REG->DVSTCTR0_b.USBRST = 0;
+  LINK_REG->DVSTCTR0_b.UACT = 1;
   _hcd.need_reset = false;
 }
 
@@ -628,7 +525,7 @@ void hcd_port_reset_end(uint8_t rhport)
 tusb_speed_t hcd_port_speed_get(uint8_t rhport)
 {
   (void)rhport;
-  switch (USB0.DVSTCTR0.BIT.RHST) {
+  switch (LINK_REG->DVSTCTR0_b.RHST) {
     default: return TUSB_SPEED_INVALID;
     case USB_DVSTCTR0_FULL: return TUSB_SPEED_FULL;
     case USB_DVSTCTR0_LOW:  return TUSB_SPEED_LOW;
@@ -647,13 +544,13 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
     unsigned num = *ep;
     if (!num || dev_addr != _hcd.pipe[num].dev) continue;
 
-    ctr  = (uint16_t volatile*)&USB0.PIPE1CTR.WORD + num - 1;
+    ctr = (uint16_t volatile*)&LINK_REG->PIPE_CTR[num - 1];
     *ctr = 0;
-    USB0.NRDYENB.WORD &= ~TU_BIT(num);
-    USB0.BRDYENB.WORD &= ~TU_BIT(num);
-    USB0.PIPESEL.WORD  = num;
-    USB0.PIPECFG.WORD  = 0;
-    USB0.PIPEMAXP.WORD = 0;
+    LINK_REG->NRDYENB &= ~TU_BIT(num);
+    LINK_REG->BRDYENB &= ~TU_BIT(num);
+    LINK_REG->PIPESEL = num;
+    LINK_REG->PIPECFG = 0;
+    LINK_REG->PIPEMAXP = 0;
 
     _hcd.pipe[num].ep  = 0;
     _hcd.pipe[num].dev = 0;
@@ -667,36 +564,36 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
 bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8])
 {
   (void)rhport;
-  //  TU_LOG1("S %d %x\n", dev_addr, USB0.DCPCTR.WORD);
+  //  TU_LOG1("S %d %x\n", dev_addr, LINK_REG->DCPCTR);
 
   TU_ASSERT(dev_addr < 6); /* USBa can only handle addresses from 0 to 5. */
-  TU_ASSERT(0 == USB0.DCPCTR.BIT.SUREQ);
+  TU_ASSERT(0 == LINK_REG->DCPCTR_b.SUREQ);
 
-  USB0.DCPCTR.WORD = USB_PIPECTR_PID_NAK;
+  LINK_REG->DCPCTR = USB_PIPECTR_PID_NAK;
 
-  _hcd.pipe[0].buf       = NULL;
-  _hcd.pipe[0].length    = 8;
+  _hcd.pipe[0].buf = NULL;
+  _hcd.pipe[0].length = 8;
   _hcd.pipe[0].remaining = 0;
-  _hcd.pipe[0].dev       = dev_addr;
+  _hcd.pipe[0].dev = dev_addr;
 
-  while (USB0.DCPCTR.BIT.PBUSY) ;
-  USB0.DCPMAXP.WORD      = (dev_addr << 12) | _hcd.ctl_mps[dev_addr];
+  while (LINK_REG->DCPCTR_b.PBUSY) ;
+  LINK_REG->DCPMAXP = (dev_addr << 12) | _hcd.ctl_mps[dev_addr];
 
   /* Set direction in advance for DATA stage */
   uint8_t const bmRequesttype = setup_packet[0];
-  USB0.DCPCFG.BIT.DIR = tu_edpt_dir(bmRequesttype) ? 0: 1;
+  LINK_REG->DCPCFG_b.DIR = tu_edpt_dir(bmRequesttype) ? 0: 1;
 
   uint16_t const* p = (uint16_t const*)(uintptr_t)&setup_packet[0];
-  USB0.USBREQ.WORD = tu_htole16(p[0]);
-  USB0.USBVAL      = p[1];
-  USB0.USBINDX     = p[2];
-  USB0.USBLENG     = p[3];
+  LINK_REG->USBREQ = tu_htole16(p[0]);
+  LINK_REG->USBVAL = p[1];
+  LINK_REG->USBINDX = p[2];
+  LINK_REG->USBLENG = p[3];
 
-  USB0.DCPCTR.BIT.SUREQ = 1;
+  LINK_REG->DCPCTR_b.SUREQ = 1;
   return true;
 }
 
-bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc)
+bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const *ep_desc)
 {
   (void)rhport;
   TU_ASSERT(dev_addr < 6); /* USBa can only handle addresses from 0 to 5. */
@@ -705,13 +602,13 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
   const unsigned epn     = tu_edpt_number(ep_addr);
   const unsigned mps     = tu_edpt_packet_size(ep_desc);
   if (0 == epn) {
-    USB0.DCPCTR.WORD = USB_PIPECTR_PID_NAK;
+    LINK_REG->DCPCTR = USB_PIPECTR_PID_NAK;
     hcd_devtree_info_t devtree;
     hcd_devtree_get_info(dev_addr, &devtree);
-    uint16_t volatile *devadd = (uint16_t volatile *)(uintptr_t)&USB0.DEVADD0.WORD;
+    uint16_t volatile *devadd = (uint16_t volatile *)(uintptr_t) &LINK_REG->DEVADD[0];
     devadd += dev_addr;
-    while (USB0.DCPCTR.BIT.PBUSY) ;
-    USB0.DCPMAXP.WORD = (dev_addr << 12) | mps;
+    while (LINK_REG->DCPCTR_b.PBUSY) ;
+    LINK_REG->DCPMAXP = (dev_addr << 12) | mps;
     *devadd = (TUSB_SPEED_FULL == devtree.speed) ? USB_DEVADD_FULL : USB_DEVADD_LOW;
     _hcd.ctl_mps[dev_addr] = mps;
     return true;
@@ -731,8 +628,8 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
 
   /* setup pipe */
   hcd_int_disable(rhport);
-  USB0.PIPESEL.WORD  = num;
-  USB0.PIPEMAXP.WORD = (dev_addr << 12) | mps;
+  LINK_REG->PIPESEL = num;
+  LINK_REG->PIPEMAXP = (dev_addr << 12) | mps;
   volatile uint16_t *ctr = get_pipectr(num);
   *ctr = USB_PIPECTR_ACLRM | USB_PIPECTR_SQCLR;
   *ctr = 0;
@@ -744,10 +641,10 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
   } else {
     cfg |= USB_PIPECFG_ISO | USB_PIPECFG_DBLB;
   }
-  USB0.PIPECFG.WORD  = cfg;
-  USB0.BRDYSTS.WORD  = 0x1FFu ^ TU_BIT(num);
-  USB0.NRDYENB.WORD |= TU_BIT(num);
-  USB0.BRDYENB.WORD |= TU_BIT(num);
+  LINK_REG->PIPECFG = cfg;
+  LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num);
+  LINK_REG->NRDYENB |= TU_BIT(num);
+  LINK_REG->BRDYENB |= TU_BIT(num);
   if (!dir_in) {
     *ctr = USB_PIPECTR_PID_BUF;
   }
@@ -799,52 +696,50 @@ void hcd_int_handler(uint8_t rhport)
     20, 8, 19, 18};
 #endif
 
-  unsigned is1 = USB0.INTSTS1.WORD;
-  unsigned is0 = USB0.INTSTS0.WORD;
+  unsigned is1 = LINK_REG->INTSTS1;
+  unsigned is0 = LINK_REG->INTSTS0;
   /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */
-  USB0.INTSTS1.WORD = ~((USB_IS1_SACK | USB_IS1_SIGN | USB_IS1_ATTCH | USB_IS1_DTCH) & is1);
-  USB0.INTSTS0.WORD = ~((USB_IS0_BRDY | USB_IS0_NRDY | USB_IS0_BEMP) & is0);
+  LINK_REG->INTSTS1 = ~((USB_IS1_SACK | USB_IS1_SIGN | USB_IS1_ATTCH | USB_IS1_DTCH) & is1);
+  LINK_REG->INTSTS0 = ~((USB_IS0_BRDY | USB_IS0_NRDY | USB_IS0_BEMP) & is0);
   // TU_LOG1("IS %04x %04x\n", is0, is1);
-  is1 &= USB0.INTENB1.WORD;
-  is0 &= USB0.INTENB0.WORD;
+  is1 &= LINK_REG->INTENB1;
+  is0 &= LINK_REG->INTENB0;
 
   if (is1 & USB_IS1_SACK) {
     /* Set DATA1 in advance for the next transfer. */
-    USB0.DCPCTR.BIT.SQSET = 1;
-    hcd_event_xfer_complete(USB0.DCPMAXP.BIT.DEVSEL,
-                            tu_edpt_addr(0, TUSB_DIR_OUT),
-                            8, XFER_RESULT_SUCCESS, true);
+    LINK_REG->DCPCTR_b.SQSET = 1;
+    hcd_event_xfer_complete(
+      LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true);
   }
   if (is1 & USB_IS1_SIGN) {
-    hcd_event_xfer_complete(USB0.DCPMAXP.BIT.DEVSEL,
-                            tu_edpt_addr(0, TUSB_DIR_OUT),
-                            8, XFER_RESULT_FAILED, true);
+    hcd_event_xfer_complete(
+      LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true);
   }
   if (is1 & USB_IS1_ATTCH) {
-    USB0.DVSTCTR0.BIT.UACT = 1;
+    LINK_REG->DVSTCTR0_b.UACT = 1;
     _hcd.need_reset = true;
-    USB0.INTENB1.WORD = (USB0.INTENB1.WORD & ~USB_IS1_ATTCH) | USB_IS1_DTCH;
+    LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~USB_IS1_ATTCH) | USB_IS1_DTCH;
     hcd_event_device_attach(rhport, true);
   }
   if (is1 & USB_IS1_DTCH) {
-    USB0.DVSTCTR0.BIT.UACT = 0;
-    if (USB0.DCPCTR.BIT.SUREQ)
-      USB0.DCPCTR.BIT.SUREQCLR = 1;
-    USB0.INTENB1.WORD = (USB0.INTENB1.WORD & ~USB_IS1_DTCH) | USB_IS1_ATTCH;
+    LINK_REG->DVSTCTR0_b.UACT = 0;
+    if (LINK_REG->DCPCTR_b.SUREQ)
+      LINK_REG->DCPCTR_b.SUREQCLR = 1;
+    LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~USB_IS1_DTCH) | USB_IS1_ATTCH;
     hcd_event_device_remove(rhport, true);
   }
 
   if (is0 & USB_IS0_BEMP) {
-    const unsigned s = USB0.BEMPSTS.WORD;
-    USB0.BEMPSTS.WORD = 0;
+    const unsigned s = LINK_REG->BEMPSTS;
+    LINK_REG->BEMPSTS = 0;
     if (s & 1) {
       process_pipe0_bemp(rhport);
     }
   }
   if (is0 & USB_IS0_NRDY) {
-    const unsigned m = USB0.NRDYENB.WORD;
-    unsigned s       = USB0.NRDYSTS.WORD & m;
-    USB0.NRDYSTS.WORD = ~s;
+    const unsigned m = LINK_REG->NRDYENB;
+    unsigned s = LINK_REG->NRDYSTS & m;
+    LINK_REG->NRDYSTS = ~s;
     while (s) {
 #if defined(__CCRX__)
       const unsigned num = Mod37BitPosition[(-s & s) % 37];
@@ -856,10 +751,10 @@ void hcd_int_handler(uint8_t rhport)
     }
   }
   if (is0 & USB_IS0_BRDY) {
-    const unsigned m = USB0.BRDYENB.WORD;
-    unsigned s       = USB0.BRDYSTS.WORD & m;
+    const unsigned m = LINK_REG->BRDYENB;
+    unsigned s = LINK_REG->BRDYSTS & m;
     /* clear active bits (don't write 0 to already cleared bits according to the HW manual) */
-    USB0.BRDYSTS.WORD = ~s;
+    LINK_REG->BRDYSTS = ~s;
     while (s) {
 #if defined(__CCRX__)
       const unsigned num = Mod37BitPosition[(-s & s) % 37];
diff --git a/src/portable/renesas/link/link_rx.h b/src/portable/renesas/link/link_rx.h
new file mode 100644
index 000000000..b15084bb3
--- /dev/null
+++ b/src/portable/renesas/link/link_rx.h
@@ -0,0 +1,76 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Koji Kitayama
+ * Portions copyrighted (c) 2021 Roland Winistoerfer
+ * Copyright (c) 2022 Rafael Silva (@perigoso)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _LINK_RX_H_
+#define _LINK_RX_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "link_type.h"
+
+#include "iodefine.h"
+
+#define LINK_REG_BASE (0x000A0000)
+
+static inline void link_int_enable(uint8_t rhport)
+{
+	(void) rhport;
+#if (CFG_TUSB_MCU == OPT_MCU_RX72N)
+	IEN(PERIB, INTB185) = 1;
+#else
+	IEN(USB0, USBI0) = 1;
+#endif
+}
+
+static inline void link_int_disable(uint8_t rhport)
+{
+	(void) rhport;
+#if (CFG_TUSB_MCU == OPT_MCU_RX72N)
+	IEN(PERIB, INTB185) = 0;
+#else
+	IEN(USB0, USBI0) = 0;
+#endif
+}
+
+// MCU specific PHY init
+static inline void link_phy_init(void)
+{
+#if (CFG_TUSB_MCU == OPT_MCU_RX72N)
+	IR(PERIB, INTB185) = 0;
+#else
+	IR(USB0, USBI0) = 0;
+#endif
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _LINK_RX_H_ */
diff --git a/src/portable/renesas/link/link_type.h b/src/portable/renesas/link/link_type.h
new file mode 100644
index 000000000..33cf7879e
--- /dev/null
+++ b/src/portable/renesas/link/link_type.h
@@ -0,0 +1,1658 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2022 Rafael Silva (@perigoso)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_LINK_TYPE_H_
+#define _TUSB_LINK_TYPE_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM DECLARATION
+//--------------------------------------------------------------------+
+#define USB_DVSTCTR0_LOW  (1u)
+#define USB_DVSTCTR0_FULL (2u)
+
+#define USB_FIFOSEL_TX	   ((uint16_t) (1u << 5))
+#define USB_FIFOSEL_BIGEND ((uint16_t) (1u << 8))
+#define USB_FIFOSEL_MBW_8  ((uint16_t) (0u << 10))
+#define USB_FIFOSEL_MBW_16 ((uint16_t) (1u << 10))
+#define USB_IS0_CTSQ	   ((uint16_t) (7u))
+#define USB_IS0_DVSQ	   ((uint16_t) (7u << 4))
+#define USB_IS0_VALID	   ((uint16_t) (1u << 3))
+#define USB_IS0_BRDY	   ((uint16_t) (1u << 8))
+#define USB_IS0_NRDY	   ((uint16_t) (1u << 9))
+#define USB_IS0_BEMP	   ((uint16_t) (1u << 10))
+#define USB_IS0_CTRT	   ((uint16_t) (1u << 11))
+#define USB_IS0_DVST	   ((uint16_t) (1u << 12))
+#define USB_IS0_SOFR	   ((uint16_t) (1u << 13))
+#define USB_IS0_RESM	   ((uint16_t) (1u << 14))
+#define USB_IS0_VBINT	   ((uint16_t) (1u << 15))
+#define USB_IS1_SACK	   ((uint16_t) (1u << 4))
+#define USB_IS1_SIGN	   ((uint16_t) (1u << 5))
+#define USB_IS1_EOFERR	   ((uint16_t) (1u << 6))
+#define USB_IS1_ATTCH	   ((uint16_t) (1u << 11))
+#define USB_IS1_DTCH	   ((uint16_t) (1u << 12))
+#define USB_IS1_BCHG	   ((uint16_t) (1u << 14))
+#define USB_IS1_OVRCR	   ((uint16_t) (1u << 15))
+
+#define USB_IS0_CTSQ_MSK   (7u)
+#define USB_IS0_CTSQ_SETUP (1u)
+#define USB_IS0_DVSQ_DEF   (1u << 4)
+#define USB_IS0_DVSQ_ADDR  (2u << 4)
+#define USB_IS0_DVSQ_SUSP0 (4u << 4)
+#define USB_IS0_DVSQ_SUSP1 (5u << 4)
+#define USB_IS0_DVSQ_SUSP2 (6u << 4)
+#define USB_IS0_DVSQ_SUSP3 (7u << 4)
+
+#define USB_PIPECTR_PID_MSK   (3u)
+#define USB_PIPECTR_PID_NAK   (0u)
+#define USB_PIPECTR_PID_BUF   (1u)
+#define USB_PIPECTR_PID_STALL (2u)
+#define USB_PIPECTR_CCPL      (1u << 2)
+#define USB_PIPECTR_SQMON     (1u << 6)
+#define USB_PIPECTR_SQCLR     (1u << 8)
+#define USB_PIPECTR_ACLRM     (1u << 9)
+#define USB_PIPECTR_INBUFM    (1u << 14)
+#define USB_PIPECTR_BSTS      (1u << 15)
+
+#define USB_FIFOCTR_DTLN (0x1FF)
+#define USB_FIFOCTR_FRDY (1u << 13)
+#define USB_FIFOCTR_BCLR (1u << 14)
+#define USB_FIFOCTR_BVAL (1u << 15)
+
+#define USB_PIPECFG_SHTNAK (1u << 7)
+#define USB_PIPECFG_DBLB   (1u << 9)
+#define USB_PIPECFG_BULK   (1u << 14)
+#define USB_PIPECFG_ISO	   (3u << 14)
+#define USB_PIPECFG_INT	   (2u << 14)
+
+#define FIFO_REQ_CLR  (1u)
+#define FIFO_COMPLETE (1u << 1)
+
+#define USB_DEVADD_LOW	(1u << 6)
+#define USB_DEVADD_FULL (2u << 6)
+
+/*--------------------------------------------------------------------*/
+/* Register Definitions                                           */
+/*--------------------------------------------------------------------*/
+
+/* Start of definition of packed structs (used by the CCRX toolchain) */
+TU_ATTR_PACKED_BEGIN
+TU_ATTR_BIT_FIELD_ORDER_BEGIN
+
+typedef struct TU_ATTR_PACKED {
+	union {
+		volatile uint16_t E; /* (@ 0x00000000) Pipe Transaction Counter Enable Register */
+
+		struct {
+			uint16_t : 8;
+			volatile uint16_t TRCLR : 1; /* [8..8] Transaction Counter Clear */
+			volatile uint16_t TRENB : 1; /* [9..9] Transaction Counter Enable */
+			uint16_t : 6;
+		} E_b;
+	};
+
+	union {
+		volatile uint16_t N; /* (@ 0x00000002) Pipe Transaction Counter Register */
+
+		struct {
+			volatile uint16_t TRNCNT : 16; /* [15..0] Transaction Counter */
+		} N_b;
+	};
+} LINK_REG_PIPE_TR_t; /* Size = 4 (0x4) */
+
+TU_VERIFY_STATIC(sizeof(LINK_REG_PIPE_TR_t) == 4, "incorrect size");
+
+/* LINK_REG Structure */
+typedef struct TU_ATTR_PACKED {
+	union {
+		volatile uint16_t SYSCFG; /* (@ 0x00000000) System Configuration Control Register */
+
+		struct {
+			volatile uint16_t USBE : 1; /* [0..0] USB Operation Enable */
+			uint16_t : 2;
+			volatile uint16_t DMRPU : 1; /* [3..3] D- Line Resistor Control */
+			volatile uint16_t DPRPU : 1; /* [4..4] D+ Line Resistor Control */
+			volatile uint16_t DRPD : 1;  /* [5..5] D+/D- Line Resistor Control */
+			volatile uint16_t DCFM : 1;  /* [6..6] Controller Function Select */
+			uint16_t : 1;
+			volatile uint16_t CNEN : 1; /* [8..8] CNEN Single End Receiver Enable */
+			uint16_t : 1;
+			volatile uint16_t SCKE : 1; /* [10..10] USB Clock Enable */
+			uint16_t : 5;
+		} SYSCFG_b;
+	};
+
+	union {
+		volatile uint16_t BUSWAIT; /* (@ 0x00000002) CPU Bus Wait Register */
+
+		struct {
+			volatile uint16_t
+				BWAIT : 4; /* [3..0] CPU Bus Access Wait Specification BWAIT waits (BWAIT+2 access cycles) */
+			uint16_t : 12;
+		} BUSWAIT_b;
+	};
+
+	union {
+		volatile const uint16_t SYSSTS0; /* (@ 0x00000004) System Configuration Status Register 0 */
+
+		struct {
+			volatile const uint16_t LNST : 2;  /* [1..0] USB Data Line Status Monitor */
+			volatile const uint16_t IDMON : 1; /* [2..2] External ID0 Input Pin Monitor */
+			uint16_t : 2;
+			volatile const uint16_t
+				SOFEA : 1; /* [5..5] SOF Active Monitor While Host Controller Function is Selected. */
+			volatile const uint16_t HTACT : 1; /* [6..6] USB Host Sequencer Status Monitor */
+			uint16_t : 7;
+			volatile const uint16_t
+				OVCMON : 2; /* [15..14] External USB0_OVRCURA/ USB0_OVRCURB Input Pin Monitor */
+		} SYSSTS0_b;
+	};
+
+	union {
+		volatile const uint16_t PLLSTA; /* (@ 0x00000006) PLL Status Register */
+
+		struct {
+			volatile const uint16_t PLLLOCK : 1; /* [0..0] PLL Lock Flag */
+			uint16_t : 15;
+		} PLLSTA_b;
+	};
+
+	union {
+		volatile uint16_t DVSTCTR0; /* (@ 0x00000008) Device State Control Register 0 */
+
+		struct {
+			volatile const uint16_t RHST : 3; /* [2..0] USB Bus Reset Status */
+			uint16_t : 1;
+			volatile uint16_t UACT : 1;    /* [4..4] USB Bus Enable */
+			volatile uint16_t RESUME : 1;  /* [5..5] Resume Output */
+			volatile uint16_t USBRST : 1;  /* [6..6] USB Bus Reset Output */
+			volatile uint16_t RWUPE : 1;   /* [7..7] Wakeup Detection Enable */
+			volatile uint16_t WKUP : 1;    /* [8..8] Wakeup Output */
+			volatile uint16_t VBUSEN : 1;  /* [9..9] USB_VBUSEN Output Pin Control */
+			volatile uint16_t EXICEN : 1;  /* [10..10] USB_EXICEN Output Pin Control */
+			volatile uint16_t HNPBTOA : 1; /* [11..11] Host Negotiation Protocol (HNP) */
+			uint16_t : 4;
+		} DVSTCTR0_b;
+	};
+	volatile const uint16_t RESERVED;
+
+	union {
+		volatile uint16_t TESTMODE; /* (@ 0x0000000C) USB Test Mode Register */
+
+		struct {
+			volatile uint16_t UTST : 4; /* [3..0] Test Mode */
+			uint16_t : 12;
+		} TESTMODE_b;
+	};
+	volatile const uint16_t RESERVED1;
+	volatile const uint32_t RESERVED2;
+
+	union {
+		volatile uint32_t CFIFO; /* (@ 0x00000014) CFIFO Port Register */
+
+		struct {
+			union {
+				volatile uint16_t CFIFOL; /* (@ 0x00000014) CFIFO Port Register L */
+				volatile uint8_t CFIFOLL; /* (@ 0x00000014) CFIFO Port Register LL */
+			};
+
+			union {
+				volatile uint16_t CFIFOH; /* (@ 0x00000016) CFIFO Port Register H */
+
+				struct {
+					volatile const uint8_t RESERVED3;
+					volatile uint8_t CFIFOHH; /* (@ 0x00000017) CFIFO Port Register HH */
+				};
+			};
+		};
+	};
+
+	union {
+		volatile uint32_t D0FIFO; /* (@ 0x00000018) D0FIFO Port Register */
+
+		struct {
+			union {
+				volatile uint16_t D0FIFOL; /* (@ 0x00000018) D0FIFO Port Register L */
+				volatile uint8_t D0FIFOLL; /* (@ 0x00000018) D0FIFO Port Register LL */
+			};
+
+			union {
+				volatile uint16_t D0FIFOH; /* (@ 0x0000001A) D0FIFO Port Register H */
+
+				struct {
+					volatile const uint8_t RESERVED4;
+					volatile uint8_t D0FIFOHH; /* (@ 0x0000001B) D0FIFO Port Register HH */
+				};
+			};
+		};
+	};
+
+	union {
+		volatile uint32_t D1FIFO; /* (@ 0x0000001C) D1FIFO Port Register */
+
+		struct {
+			union {
+				volatile uint16_t D1FIFOL; /* (@ 0x0000001C) D1FIFO Port Register L */
+				volatile uint8_t D1FIFOLL; /* (@ 0x0000001C) D1FIFO Port Register LL */
+			};
+
+			union {
+				volatile uint16_t D1FIFOH; /* (@ 0x0000001E) D1FIFO Port Register H */
+
+				struct {
+					volatile const uint8_t RESERVED5;
+					volatile uint8_t D1FIFOHH; /* (@ 0x0000001F) D1FIFO Port Register HH */
+				};
+			};
+		};
+	};
+
+	union {
+		volatile uint16_t CFIFOSEL; /* (@ 0x00000020) CFIFO Port Select Register */
+
+		struct {
+			volatile uint16_t CURPIPE : 4; /* [3..0] CFIFO Port Access Pipe Specification */
+			uint16_t : 1;
+			volatile uint16_t ISEL : 1; /* [5..5] CFIFO Port Access Direction When DCP is Selected */
+			uint16_t : 2;
+			volatile uint16_t BIGEND : 1; /* [8..8] CFIFO Port Endian Control */
+			uint16_t : 1;
+			volatile uint16_t MBW : 2; /* [11..10] CFIFO Port Access Bit Width */
+			uint16_t : 2;
+			volatile uint16_t REW : 1;  /* [14..14] Buffer Pointer Rewind */
+			volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */
+		} CFIFOSEL_b;
+	};
+
+	union {
+		volatile uint16_t CFIFOCTR; /* (@ 0x00000022) CFIFO Port Control Register */
+
+		struct {
+			volatile const uint16_t
+				DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */
+			uint16_t : 1;
+			volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */
+			volatile uint16_t BCLR : 1;	  /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */
+			volatile uint16_t BVAL : 1;	  /* [15..15] Buffer Memory Valid Flag */
+		} CFIFOCTR_b;
+	};
+	volatile const uint32_t RESERVED6;
+
+	union {
+		volatile uint16_t D0FIFOSEL; /* (@ 0x00000028) D0FIFO Port Select Register */
+
+		struct {
+			volatile uint16_t CURPIPE : 4; /* [3..0] FIFO Port Access Pipe Specification */
+			uint16_t : 4;
+			volatile uint16_t BIGEND : 1; /* [8..8] FIFO Port Endian Control */
+			uint16_t : 1;
+			volatile uint16_t MBW : 2;   /* [11..10] FIFO Port Access Bit Width */
+			volatile uint16_t DREQE : 1; /* [12..12] DMA/DTC Transfer Request Enable */
+			volatile uint16_t
+				DCLRM : 1; /* [13..13] Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read */
+			volatile uint16_t REW : 1;  /* [14..14] Buffer Pointer RewindNote: Only 0 can be read. */
+			volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */
+		} D0FIFOSEL_b;
+	};
+
+	union {
+		volatile uint16_t D0FIFOCTR; /* (@ 0x0000002A) D0FIFO Port Control Register */
+
+		struct {
+			volatile const uint16_t
+				DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */
+			uint16_t : 1;
+			volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */
+			volatile uint16_t BCLR : 1;	  /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */
+			volatile uint16_t BVAL : 1;	  /* [15..15] Buffer Memory Valid Flag */
+		} D0FIFOCTR_b;
+	};
+
+	union {
+		volatile uint16_t D1FIFOSEL; /* (@ 0x0000002C) D1FIFO Port Select Register */
+
+		struct {
+			volatile uint16_t CURPIPE : 4; /* [3..0] FIFO Port Access Pipe Specification */
+			uint16_t : 4;
+			volatile uint16_t BIGEND : 1; /* [8..8] FIFO Port Endian Control */
+			uint16_t : 1;
+			volatile uint16_t MBW : 2;   /* [11..10] FIFO Port Access Bit Width */
+			volatile uint16_t DREQE : 1; /* [12..12] DMA/DTC Transfer Request Enable */
+			volatile uint16_t
+				DCLRM : 1; /* [13..13] Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read */
+			volatile uint16_t REW : 1;  /* [14..14] Buffer Pointer Rewind */
+			volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */
+		} D1FIFOSEL_b;
+	};
+
+	union {
+		volatile uint16_t D1FIFOCTR; /* (@ 0x0000002E) D1FIFO Port Control Register */
+
+		struct {
+			volatile const uint16_t
+				DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */
+			uint16_t : 1;
+			volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */
+			volatile uint16_t BCLR : 1;	  /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */
+			volatile uint16_t BVAL : 1;	  /* [15..15] Buffer Memory Valid Flag */
+		} D1FIFOCTR_b;
+	};
+
+	union {
+		volatile uint16_t INTENB0; /* (@ 0x00000030) Interrupt Enable Register 0 */
+
+		struct {
+			uint16_t : 8;
+			volatile uint16_t BRDYE : 1; /* [8..8] Buffer Ready Interrupt Enable */
+			volatile uint16_t NRDYE : 1; /* [9..9] Buffer Not Ready Response Interrupt Enable */
+			volatile uint16_t BEMPE : 1; /* [10..10] Buffer Empty Interrupt Enable */
+			volatile uint16_t CTRE : 1;  /* [11..11] Control Transfer Stage Transition Interrupt Enable */
+			volatile uint16_t DVSE : 1;  /* [12..12] Device State Transition Interrupt Enable */
+			volatile uint16_t SOFE : 1;  /* [13..13] Frame Number Update Interrupt Enable */
+			volatile uint16_t RSME : 1;  /* [14..14] Resume Interrupt Enable */
+			volatile uint16_t VBSE : 1;  /* [15..15] VBUS Interrupt Enable */
+		} INTENB0_b;
+	};
+
+	union {
+		volatile uint16_t INTENB1; /* (@ 0x00000032) Interrupt Enable Register 1 */
+
+		struct {
+			volatile uint16_t PDDETINTE0 : 1; /* [0..0] PDDETINT0 Detection Interrupt Enable */
+			uint16_t : 3;
+			volatile uint16_t SACKE : 1;   /* [4..4] Setup Transaction Normal Response Interrupt Enable */
+			volatile uint16_t SIGNE : 1;   /* [5..5] Setup Transaction Error Interrupt Enable */
+			volatile uint16_t EOFERRE : 1; /* [6..6] EOF Error Detection Interrupt Enable */
+			uint16_t : 4;
+			volatile uint16_t ATTCHE : 1; /* [11..11] Connection Detection Interrupt Enable */
+			volatile uint16_t DTCHE : 1;  /* [12..12] Disconnection Detection Interrupt Enable */
+			uint16_t : 1;
+			volatile uint16_t BCHGE : 1;  /* [14..14] USB Bus Change Interrupt Enable */
+			volatile uint16_t OVRCRE : 1; /* [15..15] Overcurrent Input Change Interrupt Enable */
+		} INTENB1_b;
+	};
+	volatile const uint16_t RESERVED7;
+
+	union {
+		volatile uint16_t BRDYENB; /* (@ 0x00000036) BRDY Interrupt Enable Register */
+
+		struct {
+			volatile uint16_t PIPE0BRDYE : 1; /* [0..0] BRDY Interrupt Enable for PIPE */
+			volatile uint16_t PIPE1BRDYE : 1; /* [1..1] BRDY Interrupt Enable for PIPE */
+			volatile uint16_t PIPE2BRDYE : 1; /* [2..2] BRDY Interrupt Enable for PIPE */
+			volatile uint16_t PIPE3BRDYE : 1; /* [3..3] BRDY Interrupt Enable for PIPE */
+			volatile uint16_t PIPE4BRDYE : 1; /* [4..4] BRDY Interrupt Enable for PIPE */
+			volatile uint16_t PIPE5BRDYE : 1; /* [5..5] BRDY Interrupt Enable for PIPE */
+			volatile uint16_t PIPE6BRDYE : 1; /* [6..6] BRDY Interrupt Enable for PIPE */
+			volatile uint16_t PIPE7BRDYE : 1; /* [7..7] BRDY Interrupt Enable for PIPE */
+			volatile uint16_t PIPE8BRDYE : 1; /* [8..8] BRDY Interrupt Enable for PIPE */
+			volatile uint16_t PIPE9BRDYE : 1; /* [9..9] BRDY Interrupt Enable for PIPE */
+			uint16_t : 6;
+		} BRDYENB_b;
+	};
+
+	union {
+		volatile uint16_t NRDYENB; /* (@ 0x00000038) NRDY Interrupt Enable Register */
+
+		struct {
+			volatile uint16_t PIPE0NRDYE : 1; /* [0..0] NRDY Interrupt Enable for PIPE */
+			volatile uint16_t PIPE1NRDYE : 1; /* [1..1] NRDY Interrupt Enable for PIPE */
+			volatile uint16_t PIPE2NRDYE : 1; /* [2..2] NRDY Interrupt Enable for PIPE */
+			volatile uint16_t PIPE3NRDYE : 1; /* [3..3] NRDY Interrupt Enable for PIPE */
+			volatile uint16_t PIPE4NRDYE : 1; /* [4..4] NRDY Interrupt Enable for PIPE */
+			volatile uint16_t PIPE5NRDYE : 1; /* [5..5] NRDY Interrupt Enable for PIPE */
+			volatile uint16_t PIPE6NRDYE : 1; /* [6..6] NRDY Interrupt Enable for PIPE */
+			volatile uint16_t PIPE7NRDYE : 1; /* [7..7] NRDY Interrupt Enable for PIPE */
+			volatile uint16_t PIPE8NRDYE : 1; /* [8..8] NRDY Interrupt Enable for PIPE */
+			volatile uint16_t PIPE9NRDYE : 1; /* [9..9] NRDY Interrupt Enable for PIPE */
+			uint16_t : 6;
+		} NRDYENB_b;
+	};
+
+	union {
+		volatile uint16_t BEMPENB; /* (@ 0x0000003A) BEMP Interrupt Enable Register */
+
+		struct {
+			volatile uint16_t PIPE0BEMPE : 1; /* [0..0] BEMP Interrupt Enable for PIPE */
+			volatile uint16_t PIPE1BEMPE : 1; /* [1..1] BEMP Interrupt Enable for PIPE */
+			volatile uint16_t PIPE2BEMPE : 1; /* [2..2] BEMP Interrupt Enable for PIPE */
+			volatile uint16_t PIPE3BEMPE : 1; /* [3..3] BEMP Interrupt Enable for PIPE */
+			volatile uint16_t PIPE4BEMPE : 1; /* [4..4] BEMP Interrupt Enable for PIPE */
+			volatile uint16_t PIPE5BEMPE : 1; /* [5..5] BEMP Interrupt Enable for PIPE */
+			volatile uint16_t PIPE6BEMPE : 1; /* [6..6] BEMP Interrupt Enable for PIPE */
+			volatile uint16_t PIPE7BEMPE : 1; /* [7..7] BEMP Interrupt Enable for PIPE */
+			volatile uint16_t PIPE8BEMPE : 1; /* [8..8] BEMP Interrupt Enable for PIPE */
+			volatile uint16_t PIPE9BEMPE : 1; /* [9..9] BEMP Interrupt Enable for PIPE */
+			uint16_t : 6;
+		} BEMPENB_b;
+	};
+
+	union {
+		volatile uint16_t SOFCFG; /* (@ 0x0000003C) SOF Output Configuration Register */
+
+		struct {
+			uint16_t : 4;
+			volatile const uint16_t EDGESTS : 1; /* [4..4] Edge Interrupt Output Status Monitor */
+			volatile uint16_t INTL : 1;	     /* [5..5] Interrupt Output Sense Select */
+			volatile uint16_t BRDYM : 1;	     /* [6..6] BRDY Interrupt Status Clear Timing */
+			uint16_t : 1;
+			volatile uint16_t TRNENSEL : 1; /* [8..8] Transaction-Enabled Time Select */
+			uint16_t : 7;
+		} SOFCFG_b;
+	};
+
+	union {
+		volatile uint16_t PHYSET; /* (@ 0x0000003E) PHY Setting Register */
+
+		struct {
+			volatile uint16_t DIRPD : 1;	/* [0..0] Power-Down Control */
+			volatile uint16_t PLLRESET : 1; /* [1..1] PLL Reset Control */
+			uint16_t : 1;
+			volatile uint16_t CDPEN : 1;  /* [3..3] Charging Downstream Port Enable */
+			volatile uint16_t CLKSEL : 2; /* [5..4] Input System Clock Frequency */
+			uint16_t : 2;
+			volatile uint16_t REPSEL : 2; /* [9..8] Terminating Resistance Adjustment Cycle */
+			uint16_t : 1;
+			volatile uint16_t REPSTART : 1; /* [11..11] Forcibly Start Terminating Resistance Adjustment */
+			uint16_t : 3;
+			volatile uint16_t HSEB : 1; /* [15..15] CL-Only Mode */
+		} PHYSET_b;
+	};
+
+	union {
+		volatile uint16_t INTSTS0; /* (@ 0x00000040) Interrupt Status Register 0 */
+
+		struct {
+			volatile const uint16_t CTSQ : 3;  /* [2..0] Control Transfer Stage */
+			volatile uint16_t VALID : 1;	   /* [3..3] USB Request Reception */
+			volatile const uint16_t DVSQ : 3;  /* [6..4] Device State */
+			volatile const uint16_t VBSTS : 1; /* [7..7] VBUS Input Status */
+			volatile const uint16_t BRDY : 1;  /* [8..8] Buffer Ready Interrupt Status */
+			volatile const uint16_t NRDY : 1;  /* [9..9] Buffer Not Ready Interrupt Status */
+			volatile const uint16_t BEMP : 1;  /* [10..10] Buffer Empty Interrupt Status */
+			volatile uint16_t CTRT : 1;	   /* [11..11] Control Transfer Stage Transition Interrupt Status */
+			volatile uint16_t DVST : 1;	   /* [12..12] Device State Transition Interrupt Status */
+			volatile uint16_t SOFR : 1;	   /* [13..13] Frame Number Refresh Interrupt Status */
+			volatile uint16_t RESM : 1;	   /* [14..14] Resume Interrupt Status */
+			volatile uint16_t VBINT : 1;	   /* [15..15] VBUS Interrupt Status */
+		} INTSTS0_b;
+	};
+
+	union {
+		volatile uint16_t INTSTS1; /* (@ 0x00000042) Interrupt Status Register 1 */
+
+		struct {
+			volatile uint16_t PDDETINT0 : 1; /* [0..0] PDDET0 Detection Interrupt Status */
+			uint16_t : 3;
+			volatile uint16_t SACK : 1;   /* [4..4] Setup Transaction Normal Response Interrupt Status */
+			volatile uint16_t SIGN : 1;   /* [5..5] Setup Transaction Error Interrupt Status */
+			volatile uint16_t EOFERR : 1; /* [6..6] EOF Error Detection Interrupt Status */
+			uint16_t : 1;
+			volatile uint16_t LPMEND : 1;	/* [8..8] LPM Transaction End Interrupt Status */
+			volatile uint16_t L1RSMEND : 1; /* [9..9] L1 Resume End Interrupt Status */
+			uint16_t : 1;
+			volatile uint16_t ATTCH : 1; /* [11..11] ATTCH Interrupt Status */
+			volatile uint16_t DTCH : 1;  /* [12..12] USB Disconnection Detection Interrupt Status */
+			uint16_t : 1;
+			volatile uint16_t BCHG : 1;  /* [14..14] USB Bus Change Interrupt Status */
+			volatile uint16_t OVRCR : 1; /* [15..15] Overcurrent Input Change Interrupt Status */
+		} INTSTS1_b;
+	};
+	volatile const uint16_t RESERVED8;
+
+	union {
+		volatile uint16_t BRDYSTS; /* (@ 0x00000046) BRDY Interrupt Status Register */
+
+		struct {
+			volatile uint16_t PIPE0BRDY : 1; /* [0..0] BRDY Interrupt Status for PIPE */
+			volatile uint16_t PIPE1BRDY : 1; /* [1..1] BRDY Interrupt Status for PIPE */
+			volatile uint16_t PIPE2BRDY : 1; /* [2..2] BRDY Interrupt Status for PIPE */
+			volatile uint16_t PIPE3BRDY : 1; /* [3..3] BRDY Interrupt Status for PIPE */
+			volatile uint16_t PIPE4BRDY : 1; /* [4..4] BRDY Interrupt Status for PIPE */
+			volatile uint16_t PIPE5BRDY : 1; /* [5..5] BRDY Interrupt Status for PIPE */
+			volatile uint16_t PIPE6BRDY : 1; /* [6..6] BRDY Interrupt Status for PIPE */
+			volatile uint16_t PIPE7BRDY : 1; /* [7..7] BRDY Interrupt Status for PIPE */
+			volatile uint16_t PIPE8BRDY : 1; /* [8..8] BRDY Interrupt Status for PIPE */
+			volatile uint16_t PIPE9BRDY : 1; /* [9..9] BRDY Interrupt Status for PIPE */
+			uint16_t : 6;
+		} BRDYSTS_b;
+	};
+
+	union {
+		volatile uint16_t NRDYSTS; /* (@ 0x00000048) NRDY Interrupt Status Register */
+
+		struct {
+			volatile uint16_t PIPE0NRDY : 1; /* [0..0] NRDY Interrupt Status for PIPE */
+			volatile uint16_t PIPE1NRDY : 1; /* [1..1] NRDY Interrupt Status for PIPE */
+			volatile uint16_t PIPE2NRDY : 1; /* [2..2] NRDY Interrupt Status for PIPE */
+			volatile uint16_t PIPE3NRDY : 1; /* [3..3] NRDY Interrupt Status for PIPE */
+			volatile uint16_t PIPE4NRDY : 1; /* [4..4] NRDY Interrupt Status for PIPE */
+			volatile uint16_t PIPE5NRDY : 1; /* [5..5] NRDY Interrupt Status for PIPE */
+			volatile uint16_t PIPE6NRDY : 1; /* [6..6] NRDY Interrupt Status for PIPE */
+			volatile uint16_t PIPE7NRDY : 1; /* [7..7] NRDY Interrupt Status for PIPE */
+			volatile uint16_t PIPE8NRDY : 1; /* [8..8] NRDY Interrupt Status for PIPE */
+			volatile uint16_t PIPE9NRDY : 1; /* [9..9] NRDY Interrupt Status for PIPE */
+			uint16_t : 6;
+		} NRDYSTS_b;
+	};
+
+	union {
+		volatile uint16_t BEMPSTS; /* (@ 0x0000004A) BEMP Interrupt Status Register */
+
+		struct {
+			volatile uint16_t PIPE0BEMP : 1; /* [0..0] BEMP Interrupt Status for PIPE */
+			volatile uint16_t PIPE1BEMP : 1; /* [1..1] BEMP Interrupt Status for PIPE */
+			volatile uint16_t PIPE2BEMP : 1; /* [2..2] BEMP Interrupt Status for PIPE */
+			volatile uint16_t PIPE3BEMP : 1; /* [3..3] BEMP Interrupt Status for PIPE */
+			volatile uint16_t PIPE4BEMP : 1; /* [4..4] BEMP Interrupt Status for PIPE */
+			volatile uint16_t PIPE5BEMP : 1; /* [5..5] BEMP Interrupt Status for PIPE */
+			volatile uint16_t PIPE6BEMP : 1; /* [6..6] BEMP Interrupt Status for PIPE */
+			volatile uint16_t PIPE7BEMP : 1; /* [7..7] BEMP Interrupt Status for PIPE */
+			volatile uint16_t PIPE8BEMP : 1; /* [8..8] BEMP Interrupt Status for PIPE */
+			volatile uint16_t PIPE9BEMP : 1; /* [9..9] BEMP Interrupt Status for PIPE */
+			uint16_t : 6;
+		} BEMPSTS_b;
+	};
+
+	union {
+		volatile uint16_t FRMNUM; /* (@ 0x0000004C) Frame Number Register */
+
+		struct {
+			volatile const uint16_t FRNM : 11; /* [10..0] Frame NumberLatest frame number */
+			uint16_t : 3;
+			volatile uint16_t CRCE : 1; /* [14..14] Receive Data Error */
+			volatile uint16_t OVRN : 1; /* [15..15] Overrun/Underrun Detection Status */
+		} FRMNUM_b;
+	};
+
+	union {
+		volatile uint16_t UFRMNUM; /* (@ 0x0000004E) uFrame Number Register */
+
+		struct {
+			volatile const uint16_t UFRNM : 3; /* [2..0] MicroframeIndicate the microframe number. */
+			uint16_t : 12;
+			volatile uint16_t DVCHG : 1; /* [15..15] Device State Change */
+		} UFRMNUM_b;
+	};
+
+	union {
+		volatile uint16_t USBADDR; /* (@ 0x00000050) USB Address Register */
+
+		struct {
+			volatile const uint16_t USBADDR : 7; /* [6..0] USB Address In device controller mode */
+			uint16_t : 1;
+			volatile uint16_t STSRECOV0 : 3; /* [10..8] Status Recovery */
+			uint16_t : 5;
+		} USBADDR_b;
+	};
+	volatile const uint16_t RESERVED9;
+
+	union {
+		volatile uint16_t USBREQ; /* (@ 0x00000054) USB Request Type Register */
+
+		struct {
+			volatile uint16_t
+				BMREQUESTTYPE : 8; /* [7..0] Request TypeThese bits store the USB request bmRequestType value. */
+			volatile uint16_t BREQUEST : 8; /* [15..8] RequestThese bits store the USB request bRequest value. */
+		} USBREQ_b;
+	};
+
+	union {
+		volatile uint16_t USBVAL; /* (@ 0x00000056) USB Request Value Register */
+
+		struct {
+			volatile uint16_t WVALUE : 16; /* [15..0] ValueThese bits store the USB request Value value. */
+		} USBVAL_b;
+	};
+
+	union {
+		volatile uint16_t USBINDX; /* (@ 0x00000058) USB Request Index Register */
+
+		struct {
+			volatile uint16_t WINDEX : 16; /* [15..0] IndexThese bits store the USB request wIndex value. */
+		} USBINDX_b;
+	};
+
+	union {
+		volatile uint16_t USBLENG; /* (@ 0x0000005A) USB Request Length Register */
+
+		struct {
+			volatile uint16_t WLENGTH : 16; /* [15..0] LengthThese bits store the USB request wLength value. */
+		} USBLENG_b;
+	};
+
+	union {
+		volatile uint16_t DCPCFG; /* (@ 0x0000005C) DCP Configuration Register */
+
+		struct {
+			uint16_t : 4;
+			volatile uint16_t DIR : 1; /* [4..4] Transfer Direction */
+			uint16_t : 2;
+			volatile uint16_t SHTNAK : 1; /* [7..7] Pipe Disabled at End of Transfer */
+			volatile uint16_t CNTMD : 1;  /* [8..8] Continuous Transfer Mode */
+			uint16_t : 7;
+		} DCPCFG_b;
+	};
+
+	union {
+		volatile uint16_t DCPMAXP; /* (@ 0x0000005E) DCP Maximum Packet Size Register */
+
+		struct {
+			volatile uint16_t MXPS : 7; /* [6..0] Maximum Packet Size */
+			uint16_t : 5;
+			volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */
+		} DCPMAXP_b;
+	};
+
+	union {
+		volatile uint16_t DCPCTR; /* (@ 0x00000060) DCP Control Register */
+
+		struct {
+			volatile uint16_t PID : 2;  /* [1..0] Response PID */
+			volatile uint16_t CCPL : 1; /* [2..2] Control Transfer End Enable */
+			uint16_t : 2;
+			volatile const uint16_t PBUSY : 1; /* [5..5] Pipe Busy */
+			volatile const uint16_t SQMON : 1; /* [6..6] Sequence Toggle Bit Monitor */
+			volatile uint16_t SQSET : 1;	   /* [7..7] Sequence Toggle Bit Set */
+			volatile uint16_t SQCLR : 1;	   /* [8..8] Sequence Toggle Bit Clear */
+			uint16_t : 2;
+			volatile uint16_t SUREQCLR : 1; /* [11..11] SUREQ Bit Clear */
+			uint16_t : 2;
+			volatile uint16_t SUREQ : 1;	  /* [14..14] Setup Token Transmission */
+			volatile const uint16_t BSTS : 1; /* [15..15] Buffer Status */
+		} DCPCTR_b;
+	};
+	volatile const uint16_t RESERVED10;
+
+	union {
+		volatile uint16_t PIPESEL; /* (@ 0x00000064) Pipe Window Select Register */
+
+		struct {
+			volatile uint16_t PIPESEL : 4; /* [3..0] Pipe Window Select */
+			uint16_t : 12;
+		} PIPESEL_b;
+	};
+	volatile const uint16_t RESERVED11;
+
+	union {
+		volatile uint16_t PIPECFG; /* (@ 0x00000068) Pipe Configuration Register */
+
+		struct {
+			volatile uint16_t EPNUM : 4; /* [3..0] Endpoint Number */
+			volatile uint16_t DIR : 1;   /* [4..4] Transfer Direction */
+			uint16_t : 2;
+			volatile uint16_t SHTNAK : 1; /* [7..7] Pipe Disabled at End of Transfer */
+			uint16_t : 1;
+			volatile uint16_t DBLB : 1; /* [9..9] Double Buffer Mode */
+			volatile uint16_t BFRE : 1; /* [10..10] BRDY Interrupt Operation Specification */
+			uint16_t : 3;
+			volatile uint16_t TYPE : 2; /* [15..14] Transfer Type */
+		} PIPECFG_b;
+	};
+	volatile const uint16_t RESERVED12;
+
+	union {
+		volatile uint16_t PIPEMAXP; /* (@ 0x0000006C) Pipe Maximum Packet Size Register */
+
+		struct {
+			volatile uint16_t MXPS : 9; /* [8..0] Maximum Packet Size */
+			uint16_t : 3;
+			volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */
+		} PIPEMAXP_b;
+	};
+
+	union {
+		volatile uint16_t PIPEPERI; /* (@ 0x0000006E) Pipe Cycle Control Register */
+
+		struct {
+			volatile uint16_t IITV : 3; /* [2..0] Interval Error Detection Interval */
+			uint16_t : 9;
+			volatile uint16_t IFIS : 1; /* [12..12] Isochronous IN Buffer Flush */
+			uint16_t : 3;
+		} PIPEPERI_b;
+	};
+
+	union {
+		volatile uint16_t PIPE_CTR[9]; /* (@ 0x00000070) Pipe [0..8] Control Register */
+
+		struct {
+			volatile uint16_t PID : 2; /* [1..0] Response PID */
+			uint16_t : 3;
+			volatile const uint16_t PBUSY : 1; /* [5..5] Pipe Busy */
+			volatile const uint16_t SQMON : 1; /* [6..6] Sequence Toggle Bit Confirmation */
+			volatile uint16_t SQSET : 1;	   /* [7..7] Sequence Toggle Bit Set */
+			volatile uint16_t SQCLR : 1;	   /* [8..8] Sequence Toggle Bit Clear */
+			volatile uint16_t ACLRM : 1;	   /* [9..9] Auto Buffer Clear Mode */
+			volatile uint16_t ATREPM : 1;	   /* [10..10] Auto Response Mode */
+			uint16_t : 1;
+			volatile const uint16_t CSSTS : 1;  /* [12..12] CSSTS Status */
+			volatile uint16_t CSCLR : 1;	    /* [13..13] CSPLIT Status Clear */
+			volatile const uint16_t INBUFM : 1; /* [14..14] Transmit Buffer Monitor */
+			volatile const uint16_t BSTS : 1;   /* [15..15] Buffer Status */
+		} PIPE_CTR_b[9];
+	};
+	volatile const uint16_t RESERVED13;
+	volatile const uint32_t RESERVED14[3];
+	volatile LINK_REG_PIPE_TR_t PIPE_TR[5]; /* (@ 0x00000090) Pipe Transaction Counter Registers */
+	volatile const uint32_t RESERVED15[3];
+
+	union {
+		volatile uint16_t USBBCCTRL0; /* (@ 0x000000B0) BC Control Register 0 */
+
+		struct {
+			volatile uint16_t RPDME0 : 1;	/* [0..0] D- Pin Pull-Down Control */
+			volatile uint16_t IDPSRCE0 : 1; /* [1..1] D+ Pin IDPSRC Output Control */
+			volatile uint16_t
+				IDMSINKE0 : 1;		/* [2..2] D- Pin 0.6 V Input Detection (Comparator and Sink) Control */
+			volatile uint16_t VDPSRCE0 : 1; /* [3..3] D+ Pin VDPSRC (0.6 V) Output Control */
+			volatile uint16_t
+				IDPSINKE0 : 1;		/* [4..4] D+ Pin 0.6 V Input Detection (Comparator and Sink) Control */
+			volatile uint16_t VDMSRCE0 : 1; /* [5..5] D- Pin VDMSRC (0.6 V) Output Control */
+			uint16_t : 1;
+			volatile uint16_t BATCHGE0 : 1; /* [7..7] BC (Battery Charger) Function Ch0 General Enable Control */
+			volatile const uint16_t CHGDETSTS0 : 1; /* [8..8] D- Pin 0.6 V Input Detection Status */
+			volatile const uint16_t PDDETSTS0 : 1;	/* [9..9] D+ Pin 0.6 V Input Detection Status */
+			uint16_t : 6;
+		} USBBCCTRL0_b;
+	};
+	volatile const uint16_t RESERVED16;
+	volatile const uint32_t RESERVED17[4];
+
+	union {
+		volatile uint16_t UCKSEL; /* (@ 0x000000C4) USB Clock Selection Register */
+
+		struct {
+			volatile uint16_t UCKSELC : 1; /* [0..0] USB Clock Selection */
+			uint16_t : 15;
+		} UCKSEL_b;
+	};
+	volatile const uint16_t RESERVED18;
+	volatile const uint32_t RESERVED19;
+
+	union {
+		volatile uint16_t USBMC; /* (@ 0x000000CC) USB Module Control Register */
+
+		struct {
+			volatile uint16_t VDDUSBE : 1; /* [0..0] USB Reference Power Supply Circuit On/Off Control */
+			uint16_t : 6;
+			volatile uint16_t VDCEN : 1; /* [7..7] USB Regulator On/Off Control */
+			uint16_t : 8;
+		} USBMC_b;
+	};
+	volatile const uint16_t RESERVED20;
+
+	union {
+		volatile uint16_t DEVADD[10]; /* (@ 0x000000D0) Device Address Configuration Register */
+
+		struct {
+			uint16_t : 6;
+			volatile uint16_t USBSPD : 2;  /* [7..6] Transfer Speed of Communication Target Device */
+			volatile uint16_t HUBPORT : 3; /* [10..8] Communication Target Connecting Hub Port */
+			volatile uint16_t UPPHUB : 4;  /* [14..11] Communication Target Connecting Hub Register */
+			uint16_t : 1;
+		} DEVADD_b[10];
+	};
+	volatile const uint32_t RESERVED21[3];
+
+	union {
+		volatile uint32_t PHYSLEW; /* (@ 0x000000F0) PHY Cross Point Adjustment Register */
+
+		struct {
+			volatile uint32_t SLEWR00 : 1; /* [0..0] Receiver Cross Point Adjustment 00 */
+			volatile uint32_t SLEWR01 : 1; /* [1..1] Receiver Cross Point Adjustment 01 */
+			volatile uint32_t SLEWF00 : 1; /* [2..2] Receiver Cross Point Adjustment 00 */
+			volatile uint32_t SLEWF01 : 1; /* [3..3] Receiver Cross Point Adjustment 01 */
+			uint32_t : 28;
+		} PHYSLEW_b;
+	};
+	volatile const uint32_t RESERVED22[3];
+
+	union {
+		volatile uint16_t LPCTRL; /* (@ 0x00000100) Low Power Control Register */
+
+		struct {
+			uint16_t : 7;
+			volatile uint16_t HWUPM : 1; /* [7..7] Resume Return Mode Setting */
+			uint16_t : 8;
+		} LPCTRL_b;
+	};
+
+	union {
+		volatile uint16_t LPSTS; /* (@ 0x00000102) Low Power Status Register */
+
+		struct {
+			uint16_t : 14;
+			volatile uint16_t SUSPENDM : 1; /* [14..14] UTMI SuspendM Control */
+			uint16_t : 1;
+		} LPSTS_b;
+	};
+	volatile const uint32_t RESERVED23[15];
+
+	union {
+		volatile uint16_t BCCTRL; /* (@ 0x00000140) Battery Charging Control Register */
+
+		struct {
+			volatile uint16_t IDPSRCE : 1;	/* [0..0] IDPSRC Control */
+			volatile uint16_t IDMSINKE : 1; /* [1..1] IDMSINK Control */
+			volatile uint16_t VDPSRCE : 1;	/* [2..2] VDPSRC Control */
+			volatile uint16_t IDPSINKE : 1; /* [3..3] IDPSINK Control */
+			volatile uint16_t VDMSRCE : 1;	/* [4..4] VDMSRC Control */
+			volatile uint16_t DCPMODE : 1;	/* [5..5] DCP Mode Control */
+			uint16_t : 2;
+			volatile const uint16_t CHGDETSTS : 1; /* [8..8] CHGDET Status */
+			volatile const uint16_t PDDETSTS : 1;  /* [9..9] PDDET Status */
+			uint16_t : 6;
+		} BCCTRL_b;
+	};
+	volatile const uint16_t RESERVED24;
+
+	union {
+		volatile uint16_t PL1CTRL1; /* (@ 0x00000144) Function L1 Control Register 1 */
+
+		struct {
+			volatile uint16_t L1RESPEN : 1; /* [0..0] L1 Response Enable */
+			volatile uint16_t L1RESPMD : 2; /* [2..1] L1 Response Mode */
+			volatile uint16_t L1NEGOMD : 1; /* [3..3] L1 Response Negotiation Control. */
+			volatile const uint16_t
+				DVSQ : 4;	       /* [7..4] DVSQ Extension.DVSQ[3] is Mirror of DVSQ[2:0] in INTSTS0. */
+			volatile uint16_t HIRDTHR : 4; /* [11..8] L1 Response Negotiation Threshold Value */
+			uint16_t : 2;
+			volatile uint16_t L1EXTMD : 1; /* [14..14] PHY Control Mode at L1 Return */
+			uint16_t : 1;
+		} PL1CTRL1_b;
+	};
+
+	union {
+		volatile uint16_t PL1CTRL2; /* (@ 0x00000146) Function L1 Control Register 2 */
+
+		struct {
+			uint16_t : 8;
+			volatile uint16_t HIRDMON : 4; /* [11..8] HIRD Value Monitor */
+			volatile uint16_t RWEMON : 1;  /* [12..12] RWE Value Monitor */
+			uint16_t : 3;
+		} PL1CTRL2_b;
+	};
+
+	union {
+		volatile uint16_t HL1CTRL1; /* (@ 0x00000148) Host L1 Control Register 1 */
+
+		struct {
+			volatile uint16_t L1REQ : 1;	      /* [0..0] L1 Transition Request */
+			volatile const uint16_t L1STATUS : 2; /* [2..1] L1 Request Completion Status */
+			uint16_t : 13;
+		} HL1CTRL1_b;
+	};
+
+	union {
+		volatile uint16_t HL1CTRL2; /* (@ 0x0000014A) Host L1 Control Register 2 */
+
+		struct {
+			volatile uint16_t L1ADDR : 4; /* [3..0] LPM Token DeviceAddress */
+			uint16_t : 4;
+			volatile uint16_t HIRD : 4;  /* [11..8] LPM Token HIRD */
+			volatile uint16_t L1RWE : 1; /* [12..12] LPM Token L1 Remote Wake Enable */
+			uint16_t : 2;
+			volatile uint16_t BESL : 1; /* [15..15] BESL & Alternate HIRD */
+		} HL1CTRL2_b;
+	};
+	volatile const uint32_t RESERVED25[5];
+
+	union {
+		volatile const uint32_t DPUSR0R; /* (@ 0x00000160) Deep Standby USB Transceiver Control/Pin Monitor Register */
+
+		struct {
+			uint32_t : 20;
+			volatile const uint32_t
+				DOVCAHM : 1; /* [20..20] OVRCURA InputIndicates OVRCURA input signal on the HS side of USB port. */
+			volatile const uint32_t
+				DOVCBHM : 1; /* [21..21] OVRCURB InputIndicates OVRCURB input signal on the HS side of USB port. */
+			uint32_t : 1;
+			volatile const uint32_t
+				DVBSTSHM : 1; /* [23..23] VBUS InputIndicates VBUS input signal on the HS side of USB port. */
+			uint32_t : 8;
+		} DPUSR0R_b;
+	};
+
+	union {
+		volatile uint32_t DPUSR1R; /* (@ 0x00000164) Deep Standby USB Suspend/Resume Interrupt Register */
+
+		struct {
+			uint32_t : 4;
+			volatile uint32_t DOVCAHE : 1; /* [4..4] OVRCURA Interrupt Enable Clear */
+			volatile uint32_t DOVCBHE : 1; /* [5..5] OVRCURB Interrupt Enable Clear */
+			uint32_t : 1;
+			volatile uint32_t DVBSTSHE : 1; /* [7..7] VBUS Interrupt Enable/Clear */
+			uint32_t : 12;
+			volatile const uint32_t DOVCAH : 1; /* [20..20] Indication of Return from OVRCURA Interrupt Source */
+			volatile const uint32_t DOVCBH : 1; /* [21..21] Indication of Return from OVRCURB Interrupt Source */
+			uint32_t : 1;
+			volatile const uint32_t DVBSTSH : 1; /* [23..23] Indication of Return from VBUS Interrupt Source */
+			uint32_t : 8;
+		} DPUSR1R_b;
+	};
+
+	union {
+		volatile uint16_t DPUSR2R; /* (@ 0x00000168) Deep Standby USB Suspend/Resume Interrupt Register */
+
+		struct {
+			volatile const uint16_t DPINT : 1; /* [0..0] Indication of Return from DP Interrupt Source */
+			volatile const uint16_t DMINT : 1; /* [1..1] Indication of Return from DM Interrupt Source */
+			uint16_t : 2;
+			volatile const uint16_t
+				DPVAL : 1; /* [4..4] DP InputIndicates DP input signal on the HS side of USB port. */
+			volatile const uint16_t
+				DMVAL : 1; /* [5..5] DM InputIndicates DM input signal on the HS side of USB port. */
+			uint16_t : 2;
+			volatile uint16_t DPINTE : 1; /* [8..8] DP Interrupt Enable Clear */
+			volatile uint16_t DMINTE : 1; /* [9..9] DM Interrupt Enable Clear */
+			uint16_t : 6;
+		} DPUSR2R_b;
+	};
+
+	union {
+		volatile uint16_t DPUSRCR; /* (@ 0x0000016A) Deep Standby USB Suspend/Resume Command Register */
+
+		struct {
+			volatile uint16_t FIXPHY : 1;	/* [0..0] USB Transceiver Control Fix */
+			volatile uint16_t FIXPHYPD : 1; /* [1..1] USB Transceiver Control Fix for PLL */
+			uint16_t : 14;
+		} DPUSRCR_b;
+	};
+	volatile const uint32_t RESERVED26[165];
+
+	union {
+		volatile uint32_t
+			DPUSR0R_FS; /* (@ 0x00000400) Deep Software Standby USB Transceiver Control/Pin Monitor Register */
+
+		struct {
+			volatile uint32_t SRPC0 : 1; /* [0..0] USB Single End Receiver Control */
+			volatile uint32_t RPUE0 : 1; /* [1..1] DP Pull-Up Resistor Control */
+			uint32_t : 1;
+			volatile uint32_t DRPD0 : 1;   /* [3..3] D+/D- Pull-Down Resistor Control */
+			volatile uint32_t FIXPHY0 : 1; /* [4..4] USB Transceiver Output Fix */
+			uint32_t : 11;
+			volatile const uint32_t DP0 : 1; /* [16..16] USB0 D+ InputIndicates the D+ input signal of the USB. */
+			volatile const uint32_t DM0 : 1; /* [17..17] USB D-InputIndicates the D- input signal of the USB. */
+			uint32_t : 2;
+			volatile const uint32_t
+				DOVCA0 : 1; /* [20..20] USB OVRCURA InputIndicates the OVRCURA input signal of the USB. */
+			volatile const uint32_t
+				DOVCB0 : 1; /* [21..21] USB OVRCURB InputIndicates the OVRCURB input signal of the USB. */
+			uint32_t : 1;
+			volatile const uint32_t
+				DVBSTS0 : 1; /* [23..23] USB VBUS InputIndicates the VBUS input signal of the USB. */
+			uint32_t : 8;
+		} DPUSR0R_FS_b;
+	};
+
+	union {
+		volatile uint32_t DPUSR1R_FS; /* (@ 0x00000404) Deep Software Standby USB Suspend/Resume Interrupt Register */
+
+		struct {
+			volatile uint32_t DPINTE0 : 1; /* [0..0] USB DP Interrupt Enable/Clear */
+			volatile uint32_t DMINTE0 : 1; /* [1..1] USB DM Interrupt Enable/Clear */
+			uint32_t : 2;
+			volatile uint32_t DOVRCRAE0 : 1; /* [4..4] USB OVRCURA Interrupt Enable/Clear */
+			volatile uint32_t DOVRCRBE0 : 1; /* [5..5] USB OVRCURB Interrupt Enable/Clear */
+			uint32_t : 1;
+			volatile uint32_t DVBSE0 : 1; /* [7..7] USB VBUS Interrupt Enable/Clear */
+			uint32_t : 8;
+			volatile const uint32_t DPINT0 : 1; /* [16..16] USB DP Interrupt Source Recovery */
+			volatile const uint32_t DMINT0 : 1; /* [17..17] USB DM Interrupt Source Recovery */
+			uint32_t : 2;
+			volatile const uint32_t DOVRCRA0 : 1; /* [20..20] USB OVRCURA Interrupt Source Recovery */
+			volatile const uint32_t DOVRCRB0 : 1; /* [21..21] USB OVRCURB Interrupt Source Recovery */
+			uint32_t : 1;
+			volatile const uint32_t DVBINT0 : 1; /* [23..23] USB VBUS Interrupt Source Recovery */
+			uint32_t : 8;
+		} DPUSR1R_FS_b;
+	};
+} LINK_REG_t; /* Size = 1032 (0x408) */
+
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, SYSCFG) == 0x00000000, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, BUSWAIT) == 0x00000002, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, SYSSTS0) == 0x00000004, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PLLSTA) == 0x00000006, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DVSTCTR0) == 0x00000008, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, TESTMODE) == 0x0000000C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFO) == 0x00000014, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFO) == 0x00000018, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFO) == 0x0000001C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFOSEL) == 0x00000020, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFOCTR) == 0x00000022, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFOSEL) == 0x00000028, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFOCTR) == 0x0000002A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFOSEL) == 0x0000002C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFOCTR) == 0x0000002E, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTENB0) == 0x00000030, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTENB1) == 0x00000032, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, BRDYENB) == 0x00000036, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, NRDYENB) == 0x00000038, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, BEMPENB) == 0x0000003A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, SOFCFG) == 0x0000003C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PHYSET) == 0x0000003E, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTSTS0) == 0x00000040, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTSTS1) == 0x00000042, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, BRDYSTS) == 0x00000046, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, NRDYSTS) == 0x00000048, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, BEMPSTS) == 0x0000004A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, FRMNUM) == 0x0000004C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, UFRMNUM) == 0x0000004E, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBADDR) == 0x00000050, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBREQ) == 0x00000054, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBVAL) == 0x00000056, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBINDX) == 0x00000058, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBLENG) == 0x0000005A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPCFG) == 0x0000005C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPMAXP) == 0x0000005E, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPCTR) == 0x00000060, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPESEL) == 0x00000064, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPECFG) == 0x00000068, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPEMAXP) == 0x0000006C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPEPERI) == 0x0000006E, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPE_CTR) == 0x00000070, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPE_TR) == 0x00000090, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBBCCTRL0) == 0x000000B0, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, UCKSEL) == 0x000000C4, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBMC) == 0x000000CC, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DEVADD) == 0x000000D0, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PHYSLEW) == 0x000000F0, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, LPCTRL) == 0x00000100, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, LPSTS) == 0x00000102, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, BCCTRL) == 0x00000140, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PL1CTRL1) == 0x00000144, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PL1CTRL2) == 0x00000146, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, HL1CTRL1) == 0x00000148, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, HL1CTRL2) == 0x0000014A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR0R) == 0x00000160, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR1R) == 0x00000164, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR2R) == 0x00000168, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSRCR) == 0x0000016A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR0R_FS) == 0x00000400, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR1R_FS) == 0x00000404, "incorrect offset");
+
+TU_ATTR_PACKED_END /* End of definition of packed structs (used by the CCRX toolchain) */
+	TU_ATTR_BIT_FIELD_ORDER_END
+
+/*--------------------------------------------------------------------*/
+/* Register Bit Definitions                                           */
+/*--------------------------------------------------------------------*/
+
+/* PIPE_TR */
+/* E */
+#define LINK_REG_PIPE_TR_E_TRENB_Pos (9UL)     /* TRENB (Bit 9) */
+#define LINK_REG_PIPE_TR_E_TRENB_Msk (0x200UL) /* TRENB (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_TR_E_TRCLR_Pos (8UL)     /* TRCLR (Bit 8) */
+#define LINK_REG_PIPE_TR_E_TRCLR_Msk (0x100UL) /* TRCLR (Bitfield-Mask: 0x01) */
+/* N */
+#define LINK_REG_PIPE_TR_N_TRNCNT_Pos (0UL)	 /* TRNCNT (Bit 0) */
+#define LINK_REG_PIPE_TR_N_TRNCNT_Msk (0xffffUL) /* TRNCNT (Bitfield-Mask: 0xffff) */
+
+/* LINK_REG */
+/* SYSCFG */
+#define LINK_REG_SYSCFG_SCKE_Pos  (10UL)    /* SCKE (Bit 10) */
+#define LINK_REG_SYSCFG_SCKE_Msk  (0x400UL) /* SCKE (Bitfield-Mask: 0x01) */
+#define LINK_REG_SYSCFG_CNEN_Pos  (8UL)	    /* CNEN (Bit 8) */
+#define LINK_REG_SYSCFG_CNEN_Msk  (0x100UL) /* CNEN (Bitfield-Mask: 0x01) */
+#define LINK_REG_SYSCFG_DCFM_Pos  (6UL)	    /* DCFM (Bit 6) */
+#define LINK_REG_SYSCFG_DCFM_Msk  (0x40UL)  /* DCFM (Bitfield-Mask: 0x01) */
+#define LINK_REG_SYSCFG_DRPD_Pos  (5UL)	    /* DRPD (Bit 5) */
+#define LINK_REG_SYSCFG_DRPD_Msk  (0x20UL)  /* DRPD (Bitfield-Mask: 0x01) */
+#define LINK_REG_SYSCFG_DPRPU_Pos (4UL)	    /* DPRPU (Bit 4) */
+#define LINK_REG_SYSCFG_DPRPU_Msk (0x10UL)  /* DPRPU (Bitfield-Mask: 0x01) */
+#define LINK_REG_SYSCFG_DMRPU_Pos (3UL)	    /* DMRPU (Bit 3) */
+#define LINK_REG_SYSCFG_DMRPU_Msk (0x8UL)   /* DMRPU (Bitfield-Mask: 0x01) */
+#define LINK_REG_SYSCFG_USBE_Pos  (0UL)	    /* USBE (Bit 0) */
+#define LINK_REG_SYSCFG_USBE_Msk  (0x1UL)   /* USBE (Bitfield-Mask: 0x01) */
+/* BUSWAIT */
+#define LINK_REG_BUSWAIT_BWAIT_Pos (0UL)   /* BWAIT (Bit 0) */
+#define LINK_REG_BUSWAIT_BWAIT_Msk (0xfUL) /* BWAIT (Bitfield-Mask: 0x0f) */
+/* SYSSTS0 */
+#define LINK_REG_SYSSTS0_OVCMON_Pos (14UL)     /* OVCMON (Bit 14) */
+#define LINK_REG_SYSSTS0_OVCMON_Msk (0xc000UL) /* OVCMON (Bitfield-Mask: 0x03) */
+#define LINK_REG_SYSSTS0_HTACT_Pos  (6UL)      /* HTACT (Bit 6) */
+#define LINK_REG_SYSSTS0_HTACT_Msk  (0x40UL)   /* HTACT (Bitfield-Mask: 0x01) */
+#define LINK_REG_SYSSTS0_SOFEA_Pos  (5UL)      /* SOFEA (Bit 5) */
+#define LINK_REG_SYSSTS0_SOFEA_Msk  (0x20UL)   /* SOFEA (Bitfield-Mask: 0x01) */
+#define LINK_REG_SYSSTS0_IDMON_Pos  (2UL)      /* IDMON (Bit 2) */
+#define LINK_REG_SYSSTS0_IDMON_Msk  (0x4UL)    /* IDMON (Bitfield-Mask: 0x01) */
+#define LINK_REG_SYSSTS0_LNST_Pos   (0UL)      /* LNST (Bit 0) */
+#define LINK_REG_SYSSTS0_LNST_Msk   (0x3UL)    /* LNST (Bitfield-Mask: 0x03) */
+/* PLLSTA */
+#define LINK_REG_PLLSTA_PLLLOCK_Pos (0UL)   /* PLLLOCK (Bit 0) */
+#define LINK_REG_PLLSTA_PLLLOCK_Msk (0x1UL) /* PLLLOCK (Bitfield-Mask: 0x01) */
+/* DVSTCTR0 */
+#define LINK_REG_DVSTCTR0_HNPBTOA_Pos (11UL)	/* HNPBTOA (Bit 11) */
+#define LINK_REG_DVSTCTR0_HNPBTOA_Msk (0x800UL) /* HNPBTOA (Bitfield-Mask: 0x01) */
+#define LINK_REG_DVSTCTR0_EXICEN_Pos  (10UL)	/* EXICEN (Bit 10) */
+#define LINK_REG_DVSTCTR0_EXICEN_Msk  (0x400UL) /* EXICEN (Bitfield-Mask: 0x01) */
+#define LINK_REG_DVSTCTR0_VBUSEN_Pos  (9UL)	/* VBUSEN (Bit 9) */
+#define LINK_REG_DVSTCTR0_VBUSEN_Msk  (0x200UL) /* VBUSEN (Bitfield-Mask: 0x01) */
+#define LINK_REG_DVSTCTR0_WKUP_Pos    (8UL)	/* WKUP (Bit 8) */
+#define LINK_REG_DVSTCTR0_WKUP_Msk    (0x100UL) /* WKUP (Bitfield-Mask: 0x01) */
+#define LINK_REG_DVSTCTR0_RWUPE_Pos   (7UL)	/* RWUPE (Bit 7) */
+#define LINK_REG_DVSTCTR0_RWUPE_Msk   (0x80UL)	/* RWUPE (Bitfield-Mask: 0x01) */
+#define LINK_REG_DVSTCTR0_USBRST_Pos  (6UL)	/* USBRST (Bit 6) */
+#define LINK_REG_DVSTCTR0_USBRST_Msk  (0x40UL)	/* USBRST (Bitfield-Mask: 0x01) */
+#define LINK_REG_DVSTCTR0_RESUME_Pos  (5UL)	/* RESUME (Bit 5) */
+#define LINK_REG_DVSTCTR0_RESUME_Msk  (0x20UL)	/* RESUME (Bitfield-Mask: 0x01) */
+#define LINK_REG_DVSTCTR0_UACT_Pos    (4UL)	/* UACT (Bit 4) */
+#define LINK_REG_DVSTCTR0_UACT_Msk    (0x10UL)	/* UACT (Bitfield-Mask: 0x01) */
+#define LINK_REG_DVSTCTR0_RHST_Pos    (0UL)	/* RHST (Bit 0) */
+#define LINK_REG_DVSTCTR0_RHST_Msk    (0x7UL)	/* RHST (Bitfield-Mask: 0x07) */
+/* TESTMODE */
+#define LINK_REG_TESTMODE_UTST_Pos (0UL)   /* UTST (Bit 0) */
+#define LINK_REG_TESTMODE_UTST_Msk (0xfUL) /* UTST (Bitfield-Mask: 0x0f) */
+/* CFIFOSEL */
+#define LINK_REG_CFIFOSEL_RCNT_Pos    (15UL)	 /* RCNT (Bit 15) */
+#define LINK_REG_CFIFOSEL_RCNT_Msk    (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */
+#define LINK_REG_CFIFOSEL_REW_Pos     (14UL)	 /* REW (Bit 14) */
+#define LINK_REG_CFIFOSEL_REW_Msk     (0x4000UL) /* REW (Bitfield-Mask: 0x01) */
+#define LINK_REG_CFIFOSEL_MBW_Pos     (10UL)	 /* MBW (Bit 10) */
+#define LINK_REG_CFIFOSEL_MBW_Msk     (0xc00UL)	 /* MBW (Bitfield-Mask: 0x03) */
+#define LINK_REG_CFIFOSEL_BIGEND_Pos  (8UL)	 /* BIGEND (Bit 8) */
+#define LINK_REG_CFIFOSEL_BIGEND_Msk  (0x100UL)	 /* BIGEND (Bitfield-Mask: 0x01) */
+#define LINK_REG_CFIFOSEL_ISEL_Pos    (5UL)	 /* ISEL (Bit 5) */
+#define LINK_REG_CFIFOSEL_ISEL_Msk    (0x20UL)	 /* ISEL (Bitfield-Mask: 0x01) */
+#define LINK_REG_CFIFOSEL_CURPIPE_Pos (0UL)	 /* CURPIPE (Bit 0) */
+#define LINK_REG_CFIFOSEL_CURPIPE_Msk (0xfUL)	 /* CURPIPE (Bitfield-Mask: 0x0f) */
+/* CFIFOCTR */
+#define LINK_REG_CFIFOCTR_BVAL_Pos (15UL)     /* BVAL (Bit 15) */
+#define LINK_REG_CFIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */
+#define LINK_REG_CFIFOCTR_BCLR_Pos (14UL)     /* BCLR (Bit 14) */
+#define LINK_REG_CFIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */
+#define LINK_REG_CFIFOCTR_FRDY_Pos (13UL)     /* FRDY (Bit 13) */
+#define LINK_REG_CFIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */
+#define LINK_REG_CFIFOCTR_DTLN_Pos (0UL)      /* DTLN (Bit 0) */
+#define LINK_REG_CFIFOCTR_DTLN_Msk (0xfffUL)  /* DTLN (Bitfield-Mask: 0xfff) */
+/* D0FIFOSEL */
+#define LINK_REG_D0FIFOSEL_RCNT_Pos    (15UL)	  /* RCNT (Bit 15) */
+#define LINK_REG_D0FIFOSEL_RCNT_Msk    (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */
+#define LINK_REG_D0FIFOSEL_REW_Pos     (14UL)	  /* REW (Bit 14) */
+#define LINK_REG_D0FIFOSEL_REW_Msk     (0x4000UL) /* REW (Bitfield-Mask: 0x01) */
+#define LINK_REG_D0FIFOSEL_DCLRM_Pos   (13UL)	  /* DCLRM (Bit 13) */
+#define LINK_REG_D0FIFOSEL_DCLRM_Msk   (0x2000UL) /* DCLRM (Bitfield-Mask: 0x01) */
+#define LINK_REG_D0FIFOSEL_DREQE_Pos   (12UL)	  /* DREQE (Bit 12) */
+#define LINK_REG_D0FIFOSEL_DREQE_Msk   (0x1000UL) /* DREQE (Bitfield-Mask: 0x01) */
+#define LINK_REG_D0FIFOSEL_MBW_Pos     (10UL)	  /* MBW (Bit 10) */
+#define LINK_REG_D0FIFOSEL_MBW_Msk     (0xc00UL)  /* MBW (Bitfield-Mask: 0x03) */
+#define LINK_REG_D0FIFOSEL_BIGEND_Pos  (8UL)	  /* BIGEND (Bit 8) */
+#define LINK_REG_D0FIFOSEL_BIGEND_Msk  (0x100UL)  /* BIGEND (Bitfield-Mask: 0x01) */
+#define LINK_REG_D0FIFOSEL_CURPIPE_Pos (0UL)	  /* CURPIPE (Bit 0) */
+#define LINK_REG_D0FIFOSEL_CURPIPE_Msk (0xfUL)	  /* CURPIPE (Bitfield-Mask: 0x0f) */
+/* D0FIFOCTR */
+#define LINK_REG_D0FIFOCTR_BVAL_Pos (15UL)     /* BVAL (Bit 15) */
+#define LINK_REG_D0FIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */
+#define LINK_REG_D0FIFOCTR_BCLR_Pos (14UL)     /* BCLR (Bit 14) */
+#define LINK_REG_D0FIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */
+#define LINK_REG_D0FIFOCTR_FRDY_Pos (13UL)     /* FRDY (Bit 13) */
+#define LINK_REG_D0FIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */
+#define LINK_REG_D0FIFOCTR_DTLN_Pos (0UL)      /* DTLN (Bit 0) */
+#define LINK_REG_D0FIFOCTR_DTLN_Msk (0xfffUL)  /* DTLN (Bitfield-Mask: 0xfff) */
+/* D1FIFOSEL */
+#define LINK_REG_D1FIFOSEL_RCNT_Pos    (15UL)	  /* RCNT (Bit 15) */
+#define LINK_REG_D1FIFOSEL_RCNT_Msk    (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */
+#define LINK_REG_D1FIFOSEL_REW_Pos     (14UL)	  /* REW (Bit 14) */
+#define LINK_REG_D1FIFOSEL_REW_Msk     (0x4000UL) /* REW (Bitfield-Mask: 0x01) */
+#define LINK_REG_D1FIFOSEL_DCLRM_Pos   (13UL)	  /* DCLRM (Bit 13) */
+#define LINK_REG_D1FIFOSEL_DCLRM_Msk   (0x2000UL) /* DCLRM (Bitfield-Mask: 0x01) */
+#define LINK_REG_D1FIFOSEL_DREQE_Pos   (12UL)	  /* DREQE (Bit 12) */
+#define LINK_REG_D1FIFOSEL_DREQE_Msk   (0x1000UL) /* DREQE (Bitfield-Mask: 0x01) */
+#define LINK_REG_D1FIFOSEL_MBW_Pos     (10UL)	  /* MBW (Bit 10) */
+#define LINK_REG_D1FIFOSEL_MBW_Msk     (0xc00UL)  /* MBW (Bitfield-Mask: 0x03) */
+#define LINK_REG_D1FIFOSEL_BIGEND_Pos  (8UL)	  /* BIGEND (Bit 8) */
+#define LINK_REG_D1FIFOSEL_BIGEND_Msk  (0x100UL)  /* BIGEND (Bitfield-Mask: 0x01) */
+#define LINK_REG_D1FIFOSEL_CURPIPE_Pos (0UL)	  /* CURPIPE (Bit 0) */
+#define LINK_REG_D1FIFOSEL_CURPIPE_Msk (0xfUL)	  /* CURPIPE (Bitfield-Mask: 0x0f) */
+/* D1FIFOCTR */
+#define LINK_REG_D1FIFOCTR_BVAL_Pos (15UL)     /* BVAL (Bit 15) */
+#define LINK_REG_D1FIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */
+#define LINK_REG_D1FIFOCTR_BCLR_Pos (14UL)     /* BCLR (Bit 14) */
+#define LINK_REG_D1FIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */
+#define LINK_REG_D1FIFOCTR_FRDY_Pos (13UL)     /* FRDY (Bit 13) */
+#define LINK_REG_D1FIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */
+#define LINK_REG_D1FIFOCTR_DTLN_Pos (0UL)      /* DTLN (Bit 0) */
+#define LINK_REG_D1FIFOCTR_DTLN_Msk (0xfffUL)  /* DTLN (Bitfield-Mask: 0xfff) */
+/* INTENB0 */
+#define LINK_REG_INTENB0_VBSE_Pos  (15UL)     /* VBSE (Bit 15) */
+#define LINK_REG_INTENB0_VBSE_Msk  (0x8000UL) /* VBSE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB0_RSME_Pos  (14UL)     /* RSME (Bit 14) */
+#define LINK_REG_INTENB0_RSME_Msk  (0x4000UL) /* RSME (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB0_SOFE_Pos  (13UL)     /* SOFE (Bit 13) */
+#define LINK_REG_INTENB0_SOFE_Msk  (0x2000UL) /* SOFE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB0_DVSE_Pos  (12UL)     /* DVSE (Bit 12) */
+#define LINK_REG_INTENB0_DVSE_Msk  (0x1000UL) /* DVSE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB0_CTRE_Pos  (11UL)     /* CTRE (Bit 11) */
+#define LINK_REG_INTENB0_CTRE_Msk  (0x800UL)  /* CTRE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB0_BEMPE_Pos (10UL)     /* BEMPE (Bit 10) */
+#define LINK_REG_INTENB0_BEMPE_Msk (0x400UL)  /* BEMPE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB0_NRDYE_Pos (9UL)      /* NRDYE (Bit 9) */
+#define LINK_REG_INTENB0_NRDYE_Msk (0x200UL)  /* NRDYE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB0_BRDYE_Pos (8UL)      /* BRDYE (Bit 8) */
+#define LINK_REG_INTENB0_BRDYE_Msk (0x100UL)  /* BRDYE (Bitfield-Mask: 0x01) */
+/* INTENB1 */
+#define LINK_REG_INTENB1_OVRCRE_Pos	(15UL)	   /* OVRCRE (Bit 15) */
+#define LINK_REG_INTENB1_OVRCRE_Msk	(0x8000UL) /* OVRCRE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB1_BCHGE_Pos	(14UL)	   /* BCHGE (Bit 14) */
+#define LINK_REG_INTENB1_BCHGE_Msk	(0x4000UL) /* BCHGE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB1_DTCHE_Pos	(12UL)	   /* DTCHE (Bit 12) */
+#define LINK_REG_INTENB1_DTCHE_Msk	(0x1000UL) /* DTCHE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB1_ATTCHE_Pos	(11UL)	   /* ATTCHE (Bit 11) */
+#define LINK_REG_INTENB1_ATTCHE_Msk	(0x800UL)  /* ATTCHE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB1_EOFERRE_Pos	(6UL)	   /* EOFERRE (Bit 6) */
+#define LINK_REG_INTENB1_EOFERRE_Msk	(0x40UL)   /* EOFERRE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB1_SIGNE_Pos	(5UL)	   /* SIGNE (Bit 5) */
+#define LINK_REG_INTENB1_SIGNE_Msk	(0x20UL)   /* SIGNE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB1_SACKE_Pos	(4UL)	   /* SACKE (Bit 4) */
+#define LINK_REG_INTENB1_SACKE_Msk	(0x10UL)   /* SACKE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB1_PDDETINTE0_Pos (0UL)	   /* PDDETINTE0 (Bit 0) */
+#define LINK_REG_INTENB1_PDDETINTE0_Msk (0x1UL)	   /* PDDETINTE0 (Bitfield-Mask: 0x01) */
+/* BRDYENB */
+#define LINK_REG_BRDYENB_PIPEBRDYE_Pos (0UL)   /* PIPEBRDYE (Bit 0) */
+#define LINK_REG_BRDYENB_PIPEBRDYE_Msk (0x1UL) /* PIPEBRDYE (Bitfield-Mask: 0x01) */
+/* NRDYENB */
+#define LINK_REG_NRDYENB_PIPENRDYE_Pos (0UL)   /* PIPENRDYE (Bit 0) */
+#define LINK_REG_NRDYENB_PIPENRDYE_Msk (0x1UL) /* PIPENRDYE (Bitfield-Mask: 0x01) */
+/* BEMPENB */
+#define LINK_REG_BEMPENB_PIPEBEMPE_Pos (0UL)   /* PIPEBEMPE (Bit 0) */
+#define LINK_REG_BEMPENB_PIPEBEMPE_Msk (0x1UL) /* PIPEBEMPE (Bitfield-Mask: 0x01) */
+/* SOFCFG */
+#define LINK_REG_SOFCFG_TRNENSEL_Pos (8UL)     /* TRNENSEL (Bit 8) */
+#define LINK_REG_SOFCFG_TRNENSEL_Msk (0x100UL) /* TRNENSEL (Bitfield-Mask: 0x01) */
+#define LINK_REG_SOFCFG_BRDYM_Pos    (6UL)     /* BRDYM (Bit 6) */
+#define LINK_REG_SOFCFG_BRDYM_Msk    (0x40UL)  /* BRDYM (Bitfield-Mask: 0x01) */
+#define LINK_REG_SOFCFG_INTL_Pos     (5UL)     /* INTL (Bit 5) */
+#define LINK_REG_SOFCFG_INTL_Msk     (0x20UL)  /* INTL (Bitfield-Mask: 0x01) */
+#define LINK_REG_SOFCFG_EDGESTS_Pos  (4UL)     /* EDGESTS (Bit 4) */
+#define LINK_REG_SOFCFG_EDGESTS_Msk  (0x10UL)  /* EDGESTS (Bitfield-Mask: 0x01) */
+/* PHYSET */
+#define LINK_REG_PHYSET_HSEB_Pos     (15UL)	/* HSEB (Bit 15) */
+#define LINK_REG_PHYSET_HSEB_Msk     (0x8000UL) /* HSEB (Bitfield-Mask: 0x01) */
+#define LINK_REG_PHYSET_REPSTART_Pos (11UL)	/* REPSTART (Bit 11) */
+#define LINK_REG_PHYSET_REPSTART_Msk (0x800UL)	/* REPSTART (Bitfield-Mask: 0x01) */
+#define LINK_REG_PHYSET_REPSEL_Pos   (8UL)	/* REPSEL (Bit 8) */
+#define LINK_REG_PHYSET_REPSEL_Msk   (0x300UL)	/* REPSEL (Bitfield-Mask: 0x03) */
+#define LINK_REG_PHYSET_CLKSEL_Pos   (4UL)	/* CLKSEL (Bit 4) */
+#define LINK_REG_PHYSET_CLKSEL_Msk   (0x30UL)	/* CLKSEL (Bitfield-Mask: 0x03) */
+#define LINK_REG_PHYSET_CDPEN_Pos    (3UL)	/* CDPEN (Bit 3) */
+#define LINK_REG_PHYSET_CDPEN_Msk    (0x8UL)	/* CDPEN (Bitfield-Mask: 0x01) */
+#define LINK_REG_PHYSET_PLLRESET_Pos (1UL)	/* PLLRESET (Bit 1) */
+#define LINK_REG_PHYSET_PLLRESET_Msk (0x2UL)	/* PLLRESET (Bitfield-Mask: 0x01) */
+#define LINK_REG_PHYSET_DIRPD_Pos    (0UL)	/* DIRPD (Bit 0) */
+#define LINK_REG_PHYSET_DIRPD_Msk    (0x1UL)	/* DIRPD (Bitfield-Mask: 0x01) */
+/* INTSTS0 */
+#define LINK_REG_INTSTS0_VBINT_Pos (15UL)     /* VBINT (Bit 15) */
+#define LINK_REG_INTSTS0_VBINT_Msk (0x8000UL) /* VBINT (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS0_RESM_Pos  (14UL)     /* RESM (Bit 14) */
+#define LINK_REG_INTSTS0_RESM_Msk  (0x4000UL) /* RESM (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS0_SOFR_Pos  (13UL)     /* SOFR (Bit 13) */
+#define LINK_REG_INTSTS0_SOFR_Msk  (0x2000UL) /* SOFR (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS0_DVST_Pos  (12UL)     /* DVST (Bit 12) */
+#define LINK_REG_INTSTS0_DVST_Msk  (0x1000UL) /* DVST (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS0_CTRT_Pos  (11UL)     /* CTRT (Bit 11) */
+#define LINK_REG_INTSTS0_CTRT_Msk  (0x800UL)  /* CTRT (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS0_BEMP_Pos  (10UL)     /* BEMP (Bit 10) */
+#define LINK_REG_INTSTS0_BEMP_Msk  (0x400UL)  /* BEMP (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS0_NRDY_Pos  (9UL)      /* NRDY (Bit 9) */
+#define LINK_REG_INTSTS0_NRDY_Msk  (0x200UL)  /* NRDY (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS0_BRDY_Pos  (8UL)      /* BRDY (Bit 8) */
+#define LINK_REG_INTSTS0_BRDY_Msk  (0x100UL)  /* BRDY (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS0_VBSTS_Pos (7UL)      /* VBSTS (Bit 7) */
+#define LINK_REG_INTSTS0_VBSTS_Msk (0x80UL)   /* VBSTS (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS0_DVSQ_Pos  (4UL)      /* DVSQ (Bit 4) */
+#define LINK_REG_INTSTS0_DVSQ_Msk  (0x70UL)   /* DVSQ (Bitfield-Mask: 0x07) */
+#define LINK_REG_INTSTS0_VALID_Pos (3UL)      /* VALID (Bit 3) */
+#define LINK_REG_INTSTS0_VALID_Msk (0x8UL)    /* VALID (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS0_CTSQ_Pos  (0UL)      /* CTSQ (Bit 0) */
+#define LINK_REG_INTSTS0_CTSQ_Msk  (0x7UL)    /* CTSQ (Bitfield-Mask: 0x07) */
+/* INTSTS1 */
+#define LINK_REG_INTSTS1_OVRCR_Pos     (15UL)	  /* OVRCR (Bit 15) */
+#define LINK_REG_INTSTS1_OVRCR_Msk     (0x8000UL) /* OVRCR (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS1_BCHG_Pos      (14UL)	  /* BCHG (Bit 14) */
+#define LINK_REG_INTSTS1_BCHG_Msk      (0x4000UL) /* BCHG (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS1_DTCH_Pos      (12UL)	  /* DTCH (Bit 12) */
+#define LINK_REG_INTSTS1_DTCH_Msk      (0x1000UL) /* DTCH (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS1_ATTCH_Pos     (11UL)	  /* ATTCH (Bit 11) */
+#define LINK_REG_INTSTS1_ATTCH_Msk     (0x800UL)  /* ATTCH (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS1_L1RSMEND_Pos  (9UL)	  /* L1RSMEND (Bit 9) */
+#define LINK_REG_INTSTS1_L1RSMEND_Msk  (0x200UL)  /* L1RSMEND (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS1_LPMEND_Pos    (8UL)	  /* LPMEND (Bit 8) */
+#define LINK_REG_INTSTS1_LPMEND_Msk    (0x100UL)  /* LPMEND (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS1_EOFERR_Pos    (6UL)	  /* EOFERR (Bit 6) */
+#define LINK_REG_INTSTS1_EOFERR_Msk    (0x40UL)	  /* EOFERR (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS1_SIGN_Pos      (5UL)	  /* SIGN (Bit 5) */
+#define LINK_REG_INTSTS1_SIGN_Msk      (0x20UL)	  /* SIGN (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS1_SACK_Pos      (4UL)	  /* SACK (Bit 4) */
+#define LINK_REG_INTSTS1_SACK_Msk      (0x10UL)	  /* SACK (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS1_PDDETINT0_Pos (0UL)	  /* PDDETINT0 (Bit 0) */
+#define LINK_REG_INTSTS1_PDDETINT0_Msk (0x1UL)	  /* PDDETINT0 (Bitfield-Mask: 0x01) */
+/* BRDYSTS */
+#define LINK_REG_BRDYSTS_PIPEBRDY_Pos (0UL)   /* PIPEBRDY (Bit 0) */
+#define LINK_REG_BRDYSTS_PIPEBRDY_Msk (0x1UL) /* PIPEBRDY (Bitfield-Mask: 0x01) */
+/* NRDYSTS */
+#define LINK_REG_NRDYSTS_PIPENRDY_Pos (0UL)   /* PIPENRDY (Bit 0) */
+#define LINK_REG_NRDYSTS_PIPENRDY_Msk (0x1UL) /* PIPENRDY (Bitfield-Mask: 0x01) */
+/* BEMPSTS */
+#define LINK_REG_BEMPSTS_PIPEBEMP_Pos (0UL)   /* PIPEBEMP (Bit 0) */
+#define LINK_REG_BEMPSTS_PIPEBEMP_Msk (0x1UL) /* PIPEBEMP (Bitfield-Mask: 0x01) */
+/* FRMNUM */
+#define LINK_REG_FRMNUM_OVRN_Pos (15UL)	    /* OVRN (Bit 15) */
+#define LINK_REG_FRMNUM_OVRN_Msk (0x8000UL) /* OVRN (Bitfield-Mask: 0x01) */
+#define LINK_REG_FRMNUM_CRCE_Pos (14UL)	    /* CRCE (Bit 14) */
+#define LINK_REG_FRMNUM_CRCE_Msk (0x4000UL) /* CRCE (Bitfield-Mask: 0x01) */
+#define LINK_REG_FRMNUM_FRNM_Pos (0UL)	    /* FRNM (Bit 0) */
+#define LINK_REG_FRMNUM_FRNM_Msk (0x7ffUL)  /* FRNM (Bitfield-Mask: 0x7ff) */
+/* UFRMNUM */
+#define LINK_REG_UFRMNUM_DVCHG_Pos (15UL)     /* DVCHG (Bit 15) */
+#define LINK_REG_UFRMNUM_DVCHG_Msk (0x8000UL) /* DVCHG (Bitfield-Mask: 0x01) */
+#define LINK_REG_UFRMNUM_UFRNM_Pos (0UL)      /* UFRNM (Bit 0) */
+#define LINK_REG_UFRMNUM_UFRNM_Msk (0x7UL)    /* UFRNM (Bitfield-Mask: 0x07) */
+/* USBADDR */
+#define LINK_REG_USBADDR_STSRECOV0_Pos (8UL)	 /* STSRECOV0 (Bit 8) */
+#define LINK_REG_USBADDR_STSRECOV0_Msk (0x700UL) /* STSRECOV0 (Bitfield-Mask: 0x07) */
+#define LINK_REG_USBADDR_USBADDR_Pos   (0UL)	 /* USBADDR (Bit 0) */
+#define LINK_REG_USBADDR_USBADDR_Msk   (0x7fUL)	 /* USBADDR (Bitfield-Mask: 0x7f) */
+/* USBREQ */
+#define LINK_REG_USBREQ_BREQUEST_Pos	  (8UL)	     /* BREQUEST (Bit 8) */
+#define LINK_REG_USBREQ_BREQUEST_Msk	  (0xff00UL) /* BREQUEST (Bitfield-Mask: 0xff) */
+#define LINK_REG_USBREQ_BMREQUESTTYPE_Pos (0UL)	     /* BMREQUESTTYPE (Bit 0) */
+#define LINK_REG_USBREQ_BMREQUESTTYPE_Msk (0xffUL)   /* BMREQUESTTYPE (Bitfield-Mask: 0xff) */
+/* USBVAL */
+#define LINK_REG_USBVAL_WVALUE_Pos (0UL)      /* WVALUE (Bit 0) */
+#define LINK_REG_USBVAL_WVALUE_Msk (0xffffUL) /* WVALUE (Bitfield-Mask: 0xffff) */
+/* USBINDX */
+#define LINK_REG_USBINDX_WINDEX_Pos (0UL)      /* WINDEX (Bit 0) */
+#define LINK_REG_USBINDX_WINDEX_Msk (0xffffUL) /* WINDEX (Bitfield-Mask: 0xffff) */
+/* USBLENG */
+#define LINK_REG_USBLENG_WLENGTH_Pos (0UL)	/* WLENGTH (Bit 0) */
+#define LINK_REG_USBLENG_WLENGTH_Msk (0xffffUL) /* WLENGTH (Bitfield-Mask: 0xffff) */
+/* DCPCFG */
+#define LINK_REG_DCPCFG_CNTMD_Pos  (8UL)     /* CNTMD (Bit 8) */
+#define LINK_REG_DCPCFG_CNTMD_Msk  (0x100UL) /* CNTMD (Bitfield-Mask: 0x01) */
+#define LINK_REG_DCPCFG_SHTNAK_Pos (7UL)     /* SHTNAK (Bit 7) */
+#define LINK_REG_DCPCFG_SHTNAK_Msk (0x80UL)  /* SHTNAK (Bitfield-Mask: 0x01) */
+#define LINK_REG_DCPCFG_DIR_Pos	   (4UL)     /* DIR (Bit 4) */
+#define LINK_REG_DCPCFG_DIR_Msk	   (0x10UL)  /* DIR (Bitfield-Mask: 0x01) */
+/* DCPMAXP */
+#define LINK_REG_DCPMAXP_DEVSEL_Pos (12UL)     /* DEVSEL (Bit 12) */
+#define LINK_REG_DCPMAXP_DEVSEL_Msk (0xf000UL) /* DEVSEL (Bitfield-Mask: 0x0f) */
+#define LINK_REG_DCPMAXP_MXPS_Pos   (0UL)      /* MXPS (Bit 0) */
+#define LINK_REG_DCPMAXP_MXPS_Msk   (0x7fUL)   /* MXPS (Bitfield-Mask: 0x7f) */
+/* DCPCTR */
+#define LINK_REG_DCPCTR_BSTS_Pos     (15UL)	/* BSTS (Bit 15) */
+#define LINK_REG_DCPCTR_BSTS_Msk     (0x8000UL) /* BSTS (Bitfield-Mask: 0x01) */
+#define LINK_REG_DCPCTR_SUREQ_Pos    (14UL)	/* SUREQ (Bit 14) */
+#define LINK_REG_DCPCTR_SUREQ_Msk    (0x4000UL) /* SUREQ (Bitfield-Mask: 0x01) */
+#define LINK_REG_DCPCTR_SUREQCLR_Pos (11UL)	/* SUREQCLR (Bit 11) */
+#define LINK_REG_DCPCTR_SUREQCLR_Msk (0x800UL)	/* SUREQCLR (Bitfield-Mask: 0x01) */
+#define LINK_REG_DCPCTR_SQCLR_Pos    (8UL)	/* SQCLR (Bit 8) */
+#define LINK_REG_DCPCTR_SQCLR_Msk    (0x100UL)	/* SQCLR (Bitfield-Mask: 0x01) */
+#define LINK_REG_DCPCTR_SQSET_Pos    (7UL)	/* SQSET (Bit 7) */
+#define LINK_REG_DCPCTR_SQSET_Msk    (0x80UL)	/* SQSET (Bitfield-Mask: 0x01) */
+#define LINK_REG_DCPCTR_SQMON_Pos    (6UL)	/* SQMON (Bit 6) */
+#define LINK_REG_DCPCTR_SQMON_Msk    (0x40UL)	/* SQMON (Bitfield-Mask: 0x01) */
+#define LINK_REG_DCPCTR_PBUSY_Pos    (5UL)	/* PBUSY (Bit 5) */
+#define LINK_REG_DCPCTR_PBUSY_Msk    (0x20UL)	/* PBUSY (Bitfield-Mask: 0x01) */
+#define LINK_REG_DCPCTR_CCPL_Pos     (2UL)	/* CCPL (Bit 2) */
+#define LINK_REG_DCPCTR_CCPL_Msk     (0x4UL)	/* CCPL (Bitfield-Mask: 0x01) */
+#define LINK_REG_DCPCTR_PID_Pos	     (0UL)	/* PID (Bit 0) */
+#define LINK_REG_DCPCTR_PID_Msk	     (0x3UL)	/* PID (Bitfield-Mask: 0x03) */
+/* PIPESEL */
+#define LINK_REG_PIPESEL_PIPESEL_Pos (0UL)   /* PIPESEL (Bit 0) */
+#define LINK_REG_PIPESEL_PIPESEL_Msk (0xfUL) /* PIPESEL (Bitfield-Mask: 0x0f) */
+/* PIPECFG */
+#define LINK_REG_PIPECFG_TYPE_Pos   (14UL)     /* TYPE (Bit 14) */
+#define LINK_REG_PIPECFG_TYPE_Msk   (0xc000UL) /* TYPE (Bitfield-Mask: 0x03) */
+#define LINK_REG_PIPECFG_BFRE_Pos   (10UL)     /* BFRE (Bit 10) */
+#define LINK_REG_PIPECFG_BFRE_Msk   (0x400UL)  /* BFRE (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPECFG_DBLB_Pos   (9UL)      /* DBLB (Bit 9) */
+#define LINK_REG_PIPECFG_DBLB_Msk   (0x200UL)  /* DBLB (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPECFG_SHTNAK_Pos (7UL)      /* SHTNAK (Bit 7) */
+#define LINK_REG_PIPECFG_SHTNAK_Msk (0x80UL)   /* SHTNAK (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPECFG_DIR_Pos    (4UL)      /* DIR (Bit 4) */
+#define LINK_REG_PIPECFG_DIR_Msk    (0x10UL)   /* DIR (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPECFG_EPNUM_Pos  (0UL)      /* EPNUM (Bit 0) */
+#define LINK_REG_PIPECFG_EPNUM_Msk  (0xfUL)    /* EPNUM (Bitfield-Mask: 0x0f) */
+/* PIPEMAXP */
+#define LINK_REG_PIPEMAXP_DEVSEL_Pos (12UL)	/* DEVSEL (Bit 12) */
+#define LINK_REG_PIPEMAXP_DEVSEL_Msk (0xf000UL) /* DEVSEL (Bitfield-Mask: 0x0f) */
+#define LINK_REG_PIPEMAXP_MXPS_Pos   (0UL)	/* MXPS (Bit 0) */
+#define LINK_REG_PIPEMAXP_MXPS_Msk   (0x1ffUL)	/* MXPS (Bitfield-Mask: 0x1ff) */
+/* PIPEPERI */
+#define LINK_REG_PIPEPERI_IFIS_Pos (12UL)     /* IFIS (Bit 12) */
+#define LINK_REG_PIPEPERI_IFIS_Msk (0x1000UL) /* IFIS (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPEPERI_IITV_Pos (0UL)      /* IITV (Bit 0) */
+#define LINK_REG_PIPEPERI_IITV_Msk (0x7UL)    /* IITV (Bitfield-Mask: 0x07) */
+/* PIPE_CTR */
+#define LINK_REG_PIPE_CTR_BSTS_Pos   (15UL)	/* BSTS (Bit 15) */
+#define LINK_REG_PIPE_CTR_BSTS_Msk   (0x8000UL) /* BSTS (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_CTR_INBUFM_Pos (14UL)	/* INBUFM (Bit 14) */
+#define LINK_REG_PIPE_CTR_INBUFM_Msk (0x4000UL) /* INBUFM (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_CTR_CSCLR_Pos  (13UL)	/* CSCLR (Bit 13) */
+#define LINK_REG_PIPE_CTR_CSCLR_Msk  (0x2000UL) /* CSCLR (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_CTR_CSSTS_Pos  (12UL)	/* CSSTS (Bit 12) */
+#define LINK_REG_PIPE_CTR_CSSTS_Msk  (0x1000UL) /* CSSTS (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_CTR_ATREPM_Pos (10UL)	/* ATREPM (Bit 10) */
+#define LINK_REG_PIPE_CTR_ATREPM_Msk (0x400UL)	/* ATREPM (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_CTR_ACLRM_Pos  (9UL)	/* ACLRM (Bit 9) */
+#define LINK_REG_PIPE_CTR_ACLRM_Msk  (0x200UL)	/* ACLRM (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_CTR_SQCLR_Pos  (8UL)	/* SQCLR (Bit 8) */
+#define LINK_REG_PIPE_CTR_SQCLR_Msk  (0x100UL)	/* SQCLR (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_CTR_SQSET_Pos  (7UL)	/* SQSET (Bit 7) */
+#define LINK_REG_PIPE_CTR_SQSET_Msk  (0x80UL)	/* SQSET (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_CTR_SQMON_Pos  (6UL)	/* SQMON (Bit 6) */
+#define LINK_REG_PIPE_CTR_SQMON_Msk  (0x40UL)	/* SQMON (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_CTR_PBUSY_Pos  (5UL)	/* PBUSY (Bit 5) */
+#define LINK_REG_PIPE_CTR_PBUSY_Msk  (0x20UL)	/* PBUSY (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_CTR_PID_Pos    (0UL)	/* PID (Bit 0) */
+#define LINK_REG_PIPE_CTR_PID_Msk    (0x3UL)	/* PID (Bitfield-Mask: 0x03) */
+/* DEVADD */
+#define LINK_REG_DEVADD_UPPHUB_Pos  (11UL)     /* UPPHUB (Bit 11) */
+#define LINK_REG_DEVADD_UPPHUB_Msk  (0x7800UL) /* UPPHUB (Bitfield-Mask: 0x0f) */
+#define LINK_REG_DEVADD_HUBPORT_Pos (8UL)      /* HUBPORT (Bit 8) */
+#define LINK_REG_DEVADD_HUBPORT_Msk (0x700UL)  /* HUBPORT (Bitfield-Mask: 0x07) */
+#define LINK_REG_DEVADD_USBSPD_Pos  (6UL)      /* USBSPD (Bit 6) */
+#define LINK_REG_DEVADD_USBSPD_Msk  (0xc0UL)   /* USBSPD (Bitfield-Mask: 0x03) */
+/* USBBCCTRL0 */
+#define LINK_REG_USBBCCTRL0_PDDETSTS0_Pos  (9UL)     /* PDDETSTS0 (Bit 9) */
+#define LINK_REG_USBBCCTRL0_PDDETSTS0_Msk  (0x200UL) /* PDDETSTS0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_USBBCCTRL0_CHGDETSTS0_Pos (8UL)     /* CHGDETSTS0 (Bit 8) */
+#define LINK_REG_USBBCCTRL0_CHGDETSTS0_Msk (0x100UL) /* CHGDETSTS0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_USBBCCTRL0_BATCHGE0_Pos   (7UL)     /* BATCHGE0 (Bit 7) */
+#define LINK_REG_USBBCCTRL0_BATCHGE0_Msk   (0x80UL)  /* BATCHGE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_USBBCCTRL0_VDMSRCE0_Pos   (5UL)     /* VDMSRCE0 (Bit 5) */
+#define LINK_REG_USBBCCTRL0_VDMSRCE0_Msk   (0x20UL)  /* VDMSRCE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_USBBCCTRL0_IDPSINKE0_Pos  (4UL)     /* IDPSINKE0 (Bit 4) */
+#define LINK_REG_USBBCCTRL0_IDPSINKE0_Msk  (0x10UL)  /* IDPSINKE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_USBBCCTRL0_VDPSRCE0_Pos   (3UL)     /* VDPSRCE0 (Bit 3) */
+#define LINK_REG_USBBCCTRL0_VDPSRCE0_Msk   (0x8UL)   /* VDPSRCE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_USBBCCTRL0_IDMSINKE0_Pos  (2UL)     /* IDMSINKE0 (Bit 2) */
+#define LINK_REG_USBBCCTRL0_IDMSINKE0_Msk  (0x4UL)   /* IDMSINKE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_USBBCCTRL0_IDPSRCE0_Pos   (1UL)     /* IDPSRCE0 (Bit 1) */
+#define LINK_REG_USBBCCTRL0_IDPSRCE0_Msk   (0x2UL)   /* IDPSRCE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_USBBCCTRL0_RPDME0_Pos	   (0UL)     /* RPDME0 (Bit 0) */
+#define LINK_REG_USBBCCTRL0_RPDME0_Msk	   (0x1UL)   /* RPDME0 (Bitfield-Mask: 0x01) */
+/* UCKSEL */
+#define LINK_REG_UCKSEL_UCKSELC_Pos (0UL)   /* UCKSELC (Bit 0) */
+#define LINK_REG_UCKSEL_UCKSELC_Msk (0x1UL) /* UCKSELC (Bitfield-Mask: 0x01) */
+/* USBMC */
+#define LINK_REG_USBMC_VDCEN_Pos   (7UL)    /* VDCEN (Bit 7) */
+#define LINK_REG_USBMC_VDCEN_Msk   (0x80UL) /* VDCEN (Bitfield-Mask: 0x01) */
+#define LINK_REG_USBMC_VDDUSBE_Pos (0UL)    /* VDDUSBE (Bit 0) */
+#define LINK_REG_USBMC_VDDUSBE_Msk (0x1UL)  /* VDDUSBE (Bitfield-Mask: 0x01) */
+/* PHYSLEW */
+#define LINK_REG_PHYSLEW_SLEWF01_Pos (3UL)   /* SLEWF01 (Bit 3) */
+#define LINK_REG_PHYSLEW_SLEWF01_Msk (0x8UL) /* SLEWF01 (Bitfield-Mask: 0x01) */
+#define LINK_REG_PHYSLEW_SLEWF00_Pos (2UL)   /* SLEWF00 (Bit 2) */
+#define LINK_REG_PHYSLEW_SLEWF00_Msk (0x4UL) /* SLEWF00 (Bitfield-Mask: 0x01) */
+#define LINK_REG_PHYSLEW_SLEWR01_Pos (1UL)   /* SLEWR01 (Bit 1) */
+#define LINK_REG_PHYSLEW_SLEWR01_Msk (0x2UL) /* SLEWR01 (Bitfield-Mask: 0x01) */
+#define LINK_REG_PHYSLEW_SLEWR00_Pos (0UL)   /* SLEWR00 (Bit 0) */
+#define LINK_REG_PHYSLEW_SLEWR00_Msk (0x1UL) /* SLEWR00 (Bitfield-Mask: 0x01) */
+/* LPCTRL */
+#define LINK_REG_LPCTRL_HWUPM_Pos (7UL)	   /* HWUPM (Bit 7) */
+#define LINK_REG_LPCTRL_HWUPM_Msk (0x80UL) /* HWUPM (Bitfield-Mask: 0x01) */
+/* LPSTS */
+#define LINK_REG_LPSTS_SUSPENDM_Pos (14UL)     /* SUSPENDM (Bit 14) */
+#define LINK_REG_LPSTS_SUSPENDM_Msk (0x4000UL) /* SUSPENDM (Bitfield-Mask: 0x01) */
+/* BCCTRL */
+#define LINK_REG_BCCTRL_PDDETSTS_Pos  (9UL)	/* PDDETSTS (Bit 9) */
+#define LINK_REG_BCCTRL_PDDETSTS_Msk  (0x200UL) /* PDDETSTS (Bitfield-Mask: 0x01) */
+#define LINK_REG_BCCTRL_CHGDETSTS_Pos (8UL)	/* CHGDETSTS (Bit 8) */
+#define LINK_REG_BCCTRL_CHGDETSTS_Msk (0x100UL) /* CHGDETSTS (Bitfield-Mask: 0x01) */
+#define LINK_REG_BCCTRL_DCPMODE_Pos   (5UL)	/* DCPMODE (Bit 5) */
+#define LINK_REG_BCCTRL_DCPMODE_Msk   (0x20UL)	/* DCPMODE (Bitfield-Mask: 0x01) */
+#define LINK_REG_BCCTRL_VDMSRCE_Pos   (4UL)	/* VDMSRCE (Bit 4) */
+#define LINK_REG_BCCTRL_VDMSRCE_Msk   (0x10UL)	/* VDMSRCE (Bitfield-Mask: 0x01) */
+#define LINK_REG_BCCTRL_IDPSINKE_Pos  (3UL)	/* IDPSINKE (Bit 3) */
+#define LINK_REG_BCCTRL_IDPSINKE_Msk  (0x8UL)	/* IDPSINKE (Bitfield-Mask: 0x01) */
+#define LINK_REG_BCCTRL_VDPSRCE_Pos   (2UL)	/* VDPSRCE (Bit 2) */
+#define LINK_REG_BCCTRL_VDPSRCE_Msk   (0x4UL)	/* VDPSRCE (Bitfield-Mask: 0x01) */
+#define LINK_REG_BCCTRL_IDMSINKE_Pos  (1UL)	/* IDMSINKE (Bit 1) */
+#define LINK_REG_BCCTRL_IDMSINKE_Msk  (0x2UL)	/* IDMSINKE (Bitfield-Mask: 0x01) */
+#define LINK_REG_BCCTRL_IDPSRCE_Pos   (0UL)	/* IDPSRCE (Bit 0) */
+#define LINK_REG_BCCTRL_IDPSRCE_Msk   (0x1UL)	/* IDPSRCE (Bitfield-Mask: 0x01) */
+/* PL1CTRL1 */
+#define LINK_REG_PL1CTRL1_L1EXTMD_Pos  (14UL)	  /* L1EXTMD (Bit 14) */
+#define LINK_REG_PL1CTRL1_L1EXTMD_Msk  (0x4000UL) /* L1EXTMD (Bitfield-Mask: 0x01) */
+#define LINK_REG_PL1CTRL1_HIRDTHR_Pos  (8UL)	  /* HIRDTHR (Bit 8) */
+#define LINK_REG_PL1CTRL1_HIRDTHR_Msk  (0xf00UL)  /* HIRDTHR (Bitfield-Mask: 0x0f) */
+#define LINK_REG_PL1CTRL1_DVSQ_Pos     (4UL)	  /* DVSQ (Bit 4) */
+#define LINK_REG_PL1CTRL1_DVSQ_Msk     (0xf0UL)	  /* DVSQ (Bitfield-Mask: 0x0f) */
+#define LINK_REG_PL1CTRL1_L1NEGOMD_Pos (3UL)	  /* L1NEGOMD (Bit 3) */
+#define LINK_REG_PL1CTRL1_L1NEGOMD_Msk (0x8UL)	  /* L1NEGOMD (Bitfield-Mask: 0x01) */
+#define LINK_REG_PL1CTRL1_L1RESPMD_Pos (1UL)	  /* L1RESPMD (Bit 1) */
+#define LINK_REG_PL1CTRL1_L1RESPMD_Msk (0x6UL)	  /* L1RESPMD (Bitfield-Mask: 0x03) */
+#define LINK_REG_PL1CTRL1_L1RESPEN_Pos (0UL)	  /* L1RESPEN (Bit 0) */
+#define LINK_REG_PL1CTRL1_L1RESPEN_Msk (0x1UL)	  /* L1RESPEN (Bitfield-Mask: 0x01) */
+/* PL1CTRL2 */
+#define LINK_REG_PL1CTRL2_RWEMON_Pos  (12UL)	 /* RWEMON (Bit 12) */
+#define LINK_REG_PL1CTRL2_RWEMON_Msk  (0x1000UL) /* RWEMON (Bitfield-Mask: 0x01) */
+#define LINK_REG_PL1CTRL2_HIRDMON_Pos (8UL)	 /* HIRDMON (Bit 8) */
+#define LINK_REG_PL1CTRL2_HIRDMON_Msk (0xf00UL)	 /* HIRDMON (Bitfield-Mask: 0x0f) */
+/* HL1CTRL1 */
+#define LINK_REG_HL1CTRL1_L1STATUS_Pos (1UL)   /* L1STATUS (Bit 1) */
+#define LINK_REG_HL1CTRL1_L1STATUS_Msk (0x6UL) /* L1STATUS (Bitfield-Mask: 0x03) */
+#define LINK_REG_HL1CTRL1_L1REQ_Pos    (0UL)   /* L1REQ (Bit 0) */
+#define LINK_REG_HL1CTRL1_L1REQ_Msk    (0x1UL) /* L1REQ (Bitfield-Mask: 0x01) */
+/* HL1CTRL2 */
+#define LINK_REG_HL1CTRL2_BESL_Pos   (15UL)	/* BESL (Bit 15) */
+#define LINK_REG_HL1CTRL2_BESL_Msk   (0x8000UL) /* BESL (Bitfield-Mask: 0x01) */
+#define LINK_REG_HL1CTRL2_L1RWE_Pos  (12UL)	/* L1RWE (Bit 12) */
+#define LINK_REG_HL1CTRL2_L1RWE_Msk  (0x1000UL) /* L1RWE (Bitfield-Mask: 0x01) */
+#define LINK_REG_HL1CTRL2_HIRD_Pos   (8UL)	/* HIRD (Bit 8) */
+#define LINK_REG_HL1CTRL2_HIRD_Msk   (0xf00UL)	/* HIRD (Bitfield-Mask: 0x0f) */
+#define LINK_REG_HL1CTRL2_L1ADDR_Pos (0UL)	/* L1ADDR (Bit 0) */
+#define LINK_REG_HL1CTRL2_L1ADDR_Msk (0xfUL)	/* L1ADDR (Bitfield-Mask: 0x0f) */
+/* DPUSR0R */
+#define LINK_REG_DPUSR0R_DVBSTSHM_Pos (23UL)	   /* DVBSTSHM (Bit 23) */
+#define LINK_REG_DPUSR0R_DVBSTSHM_Msk (0x800000UL) /* DVBSTSHM (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR0R_DOVCBHM_Pos  (21UL)	   /* DOVCBHM (Bit 21) */
+#define LINK_REG_DPUSR0R_DOVCBHM_Msk  (0x200000UL) /* DOVCBHM (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR0R_DOVCAHM_Pos  (20UL)	   /* DOVCAHM (Bit 20) */
+#define LINK_REG_DPUSR0R_DOVCAHM_Msk  (0x100000UL) /* DOVCAHM (Bitfield-Mask: 0x01) */
+/* DPUSR1R */
+#define LINK_REG_DPUSR1R_DVBSTSH_Pos  (23UL)	   /* DVBSTSH (Bit 23) */
+#define LINK_REG_DPUSR1R_DVBSTSH_Msk  (0x800000UL) /* DVBSTSH (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_DOVCBH_Pos   (21UL)	   /* DOVCBH (Bit 21) */
+#define LINK_REG_DPUSR1R_DOVCBH_Msk   (0x200000UL) /* DOVCBH (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_DOVCAH_Pos   (20UL)	   /* DOVCAH (Bit 20) */
+#define LINK_REG_DPUSR1R_DOVCAH_Msk   (0x100000UL) /* DOVCAH (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_DVBSTSHE_Pos (7UL)	   /* DVBSTSHE (Bit 7) */
+#define LINK_REG_DPUSR1R_DVBSTSHE_Msk (0x80UL)	   /* DVBSTSHE (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_DOVCBHE_Pos  (5UL)	   /* DOVCBHE (Bit 5) */
+#define LINK_REG_DPUSR1R_DOVCBHE_Msk  (0x20UL)	   /* DOVCBHE (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_DOVCAHE_Pos  (4UL)	   /* DOVCAHE (Bit 4) */
+#define LINK_REG_DPUSR1R_DOVCAHE_Msk  (0x10UL)	   /* DOVCAHE (Bitfield-Mask: 0x01) */
+/* DPUSR2R */
+#define LINK_REG_DPUSR2R_DMINTE_Pos (9UL)     /* DMINTE (Bit 9) */
+#define LINK_REG_DPUSR2R_DMINTE_Msk (0x200UL) /* DMINTE (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR2R_DPINTE_Pos (8UL)     /* DPINTE (Bit 8) */
+#define LINK_REG_DPUSR2R_DPINTE_Msk (0x100UL) /* DPINTE (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR2R_DMVAL_Pos  (5UL)     /* DMVAL (Bit 5) */
+#define LINK_REG_DPUSR2R_DMVAL_Msk  (0x20UL)  /* DMVAL (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR2R_DPVAL_Pos  (4UL)     /* DPVAL (Bit 4) */
+#define LINK_REG_DPUSR2R_DPVAL_Msk  (0x10UL)  /* DPVAL (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR2R_DMINT_Pos  (1UL)     /* DMINT (Bit 1) */
+#define LINK_REG_DPUSR2R_DMINT_Msk  (0x2UL)   /* DMINT (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR2R_DPINT_Pos  (0UL)     /* DPINT (Bit 0) */
+#define LINK_REG_DPUSR2R_DPINT_Msk  (0x1UL)   /* DPINT (Bitfield-Mask: 0x01) */
+/* DPUSRCR */
+#define LINK_REG_DPUSRCR_FIXPHYPD_Pos (1UL)   /* FIXPHYPD (Bit 1) */
+#define LINK_REG_DPUSRCR_FIXPHYPD_Msk (0x2UL) /* FIXPHYPD (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSRCR_FIXPHY_Pos   (0UL)   /* FIXPHY (Bit 0) */
+#define LINK_REG_DPUSRCR_FIXPHY_Msk   (0x1UL) /* FIXPHY (Bitfield-Mask: 0x01) */
+/* DPUSR0R_FS */
+#define LINK_REG_DPUSR0R_FS_DVBSTS0_Pos (23UL)	     /* DVBSTS0 (Bit 23) */
+#define LINK_REG_DPUSR0R_FS_DVBSTS0_Msk (0x800000UL) /* DVBSTS0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR0R_FS_DOVCB0_Pos	(21UL)	     /* DOVCB0 (Bit 21) */
+#define LINK_REG_DPUSR0R_FS_DOVCB0_Msk	(0x200000UL) /* DOVCB0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR0R_FS_DOVCA0_Pos	(20UL)	     /* DOVCA0 (Bit 20) */
+#define LINK_REG_DPUSR0R_FS_DOVCA0_Msk	(0x100000UL) /* DOVCA0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR0R_FS_DM0_Pos	(17UL)	     /* DM0 (Bit 17) */
+#define LINK_REG_DPUSR0R_FS_DM0_Msk	(0x20000UL)  /* DM0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR0R_FS_DP0_Pos	(16UL)	     /* DP0 (Bit 16) */
+#define LINK_REG_DPUSR0R_FS_DP0_Msk	(0x10000UL)  /* DP0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR0R_FS_FIXPHY0_Pos (4UL)	     /* FIXPHY0 (Bit 4) */
+#define LINK_REG_DPUSR0R_FS_FIXPHY0_Msk (0x10UL)     /* FIXPHY0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR0R_FS_DRPD0_Pos	(3UL)	     /* DRPD0 (Bit 3) */
+#define LINK_REG_DPUSR0R_FS_DRPD0_Msk	(0x8UL)	     /* DRPD0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR0R_FS_RPUE0_Pos	(1UL)	     /* RPUE0 (Bit 1) */
+#define LINK_REG_DPUSR0R_FS_RPUE0_Msk	(0x2UL)	     /* RPUE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR0R_FS_SRPC0_Pos	(0UL)	     /* SRPC0 (Bit 0) */
+#define LINK_REG_DPUSR0R_FS_SRPC0_Msk	(0x1UL)	     /* SRPC0 (Bitfield-Mask: 0x01) */
+/* DPUSR1R_FS */
+#define LINK_REG_DPUSR1R_FS_DVBINT0_Pos	  (23UL)       /* DVBINT0 (Bit 23) */
+#define LINK_REG_DPUSR1R_FS_DVBINT0_Msk	  (0x800000UL) /* DVBINT0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_FS_DOVRCRB0_Pos  (21UL)       /* DOVRCRB0 (Bit 21) */
+#define LINK_REG_DPUSR1R_FS_DOVRCRB0_Msk  (0x200000UL) /* DOVRCRB0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_FS_DOVRCRA0_Pos  (20UL)       /* DOVRCRA0 (Bit 20) */
+#define LINK_REG_DPUSR1R_FS_DOVRCRA0_Msk  (0x100000UL) /* DOVRCRA0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_FS_DMINT0_Pos	  (17UL)       /* DMINT0 (Bit 17) */
+#define LINK_REG_DPUSR1R_FS_DMINT0_Msk	  (0x20000UL)  /* DMINT0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_FS_DPINT0_Pos	  (16UL)       /* DPINT0 (Bit 16) */
+#define LINK_REG_DPUSR1R_FS_DPINT0_Msk	  (0x10000UL)  /* DPINT0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_FS_DVBSE0_Pos	  (7UL)	       /* DVBSE0 (Bit 7) */
+#define LINK_REG_DPUSR1R_FS_DVBSE0_Msk	  (0x80UL)     /* DVBSE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_FS_DOVRCRBE0_Pos (5UL)	       /* DOVRCRBE0 (Bit 5) */
+#define LINK_REG_DPUSR1R_FS_DOVRCRBE0_Msk (0x20UL)     /* DOVRCRBE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_FS_DOVRCRAE0_Pos (4UL)	       /* DOVRCRAE0 (Bit 4) */
+#define LINK_REG_DPUSR1R_FS_DOVRCRAE0_Msk (0x10UL)     /* DOVRCRAE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_FS_DMINTE0_Pos	  (1UL)	       /* DMINTE0 (Bit 1) */
+#define LINK_REG_DPUSR1R_FS_DMINTE0_Msk	  (0x2UL)      /* DMINTE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_FS_DPINTE0_Pos	  (0UL)	       /* DPINTE0 (Bit 0) */
+#define LINK_REG_DPUSR1R_FS_DPINTE0_Msk	  (0x1UL)      /* DPINTE0 (Bitfield-Mask: 0x01) */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _TUSB_LINK_TYPE_H_ */

From 2a17a7e8f851c1a29d7e06ff520d15f36b7a652c Mon Sep 17 00:00:00 2001
From: Rafael Silva <rafaelsilva@ajtec.pt>
Date: Wed, 9 Mar 2022 12:14:55 +0000
Subject: [PATCH 005/691] rework make freertos port handling

	this allows ports to specify a freertos port outside the FreeRTOS-Kernel lib directory, which would otherwise not be possible

Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
---
 examples/device/cdc_msc_freertos/Makefile       | 7 ++++---
 examples/device/hid_composite_freertos/Makefile | 7 ++++---
 hw/bsp/d5035_01/board.mk                        | 2 +-
 hw/bsp/da14695_dk_usb/board.mk                  | 2 +-
 hw/bsp/da1469x_dk_pro/board.mk                  | 2 +-
 hw/bsp/ea4088qs/board.mk                        | 2 +-
 hw/bsp/ea4357/board.mk                          | 2 +-
 hw/bsp/fomu/family.mk                           | 2 +-
 hw/bsp/frdm_k32l2b/board.mk                     | 2 +-
 hw/bsp/frdm_kl25z/board.mk                      | 2 +-
 hw/bsp/gd32vf103/family.mk                      | 2 +-
 hw/bsp/imxrt/family.mk                          | 2 +-
 hw/bsp/kuiic/board.mk                           | 2 +-
 hw/bsp/lpc15/family.mk                          | 2 +-
 hw/bsp/lpc18/family.mk                          | 2 +-
 hw/bsp/lpc54/family.mk                          | 2 +-
 hw/bsp/lpc55/family.mk                          | 2 +-
 hw/bsp/lpcxpresso11u37/board.mk                 | 2 +-
 hw/bsp/lpcxpresso11u68/board.mk                 | 2 +-
 hw/bsp/lpcxpresso1347/board.mk                  | 2 +-
 hw/bsp/lpcxpresso1769/board.mk                  | 2 +-
 hw/bsp/lpcxpresso51u68/board.mk                 | 2 +-
 hw/bsp/mbed1768/board.mk                        | 2 +-
 hw/bsp/mm32/family.mk                           | 2 +-
 hw/bsp/msp432e4/family.mk                       | 2 +-
 hw/bsp/ngx4330/board.mk                         | 2 +-
 hw/bsp/nrf/family.mk                            | 2 +-
 hw/bsp/nutiny_nuc121s/board.mk                  | 2 +-
 hw/bsp/nutiny_nuc125s/board.mk                  | 2 +-
 hw/bsp/nutiny_nuc126v/board.mk                  | 2 +-
 hw/bsp/nutiny_sdk_nuc120/board.mk               | 2 +-
 hw/bsp/nutiny_sdk_nuc505/board.mk               | 2 +-
 hw/bsp/rx/boards/gr_citrus/board.mk             | 2 +-
 hw/bsp/rx/boards/rx65n_target/board.mk          | 2 +-
 hw/bsp/samd11/family.mk                         | 2 +-
 hw/bsp/samd21/family.mk                         | 2 +-
 hw/bsp/samd51/family.mk                         | 2 +-
 hw/bsp/same54xplainedpro/board.mk               | 2 +-
 hw/bsp/same70_qmtech/board.mk                   | 2 +-
 hw/bsp/same70_xplained/board.mk                 | 2 +-
 hw/bsp/samg55xplained/board.mk                  | 2 +-
 hw/bsp/saml2x/family.mk                         | 2 +-
 hw/bsp/sltb009a/board.mk                        | 2 +-
 hw/bsp/stm32f0/family.mk                        | 2 +-
 hw/bsp/stm32f1/family.mk                        | 2 +-
 hw/bsp/stm32f207nucleo/board.mk                 | 2 +-
 hw/bsp/stm32f303disco/board.mk                  | 2 +-
 hw/bsp/stm32f4/family.mk                        | 2 +-
 hw/bsp/stm32f7/family.mk                        | 2 +-
 hw/bsp/stm32g4/family.mk                        | 2 +-
 hw/bsp/stm32h7/family.mk                        | 2 +-
 hw/bsp/stm32l0538disco/board.mk                 | 2 +-
 hw/bsp/stm32l4/family.mk                        | 2 +-
 hw/bsp/stm32wb/family.mk                        | 2 +-
 hw/bsp/tm4c123/family.mk                        | 2 +-
 hw/bsp/xmc4000/family.mk                        | 2 +-
 56 files changed, 62 insertions(+), 60 deletions(-)

diff --git a/examples/device/cdc_msc_freertos/Makefile b/examples/device/cdc_msc_freertos/Makefile
index a155d6cb7..368bc8cfa 100644
--- a/examples/device/cdc_msc_freertos/Makefile
+++ b/examples/device/cdc_msc_freertos/Makefile
@@ -4,14 +4,15 @@ include ../../../tools/top.mk
 include ../../make.mk
 
 FREERTOS_SRC = lib/FreeRTOS-Kernel
+FREERTOS_PORT_PATH = lib/FreeRTOS-Kernel/portable/GCC
 
 INC += \
 	src \
 	src/FreeRTOSConfig \
 	$(TOP)/hw \
 	$(TOP)/$(FREERTOS_SRC)/include \
-	$(TOP)/$(FREERTOS_SRC)/portable/GCC/$(FREERTOS_PORT)
-	
+	$(TOP)/$(FREERTOS_PORT)
+
 # Example source
 EXAMPLE_SOURCE = \
 	src/freertos_hook.c \
@@ -27,7 +28,7 @@ SRC_C += \
 	$(FREERTOS_SRC)/queue.c \
 	$(FREERTOS_SRC)/tasks.c \
 	$(FREERTOS_SRC)/timers.c \
-	$(subst ../../../,,$(wildcard ../../../$(FREERTOS_SRC)/portable/GCC/$(FREERTOS_PORT)/*.c))
+	$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORT)/*.c))
 
 # Suppress FreeRTOS warnings
 CFLAGS += -Wno-error=cast-qual
diff --git a/examples/device/hid_composite_freertos/Makefile b/examples/device/hid_composite_freertos/Makefile
index c9b7abdf5..f2e0210ae 100644
--- a/examples/device/hid_composite_freertos/Makefile
+++ b/examples/device/hid_composite_freertos/Makefile
@@ -4,20 +4,21 @@ include ../../../tools/top.mk
 include ../../make.mk
 
 FREERTOS_SRC = lib/FreeRTOS-Kernel
+FREERTOS_PORT_PATH = lib/FreeRTOS-Kernel/portable/GCC
 
 INC += \
 	src \
 	src/FreeRTOSConfig \
 	$(TOP)/hw \
 	$(TOP)/$(FREERTOS_SRC)/include \
-	$(TOP)/$(FREERTOS_SRC)/portable/GCC/$(FREERTOS_PORT)	
+	$(TOP)/$(FREERTOS_PORT)
 
 # Example source
 EXAMPLE_SOURCE = \
 	src/freertos_hook.c \
 	src/main.c \
 	src/usb_descriptors.c
-	
+
 SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
 
 # FreeRTOS source, all files in port folder
@@ -26,7 +27,7 @@ SRC_C += \
 	$(FREERTOS_SRC)/queue.c \
 	$(FREERTOS_SRC)/tasks.c \
 	$(FREERTOS_SRC)/timers.c \
-	$(subst ../../../,,$(wildcard ../../../$(FREERTOS_SRC)/portable/GCC/$(FREERTOS_PORT)/*.c))
+	$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORT)/*.c))
 
 # Suppress FreeRTOS warnings
 CFLAGS += -Wno-error=cast-qual
diff --git a/hw/bsp/d5035_01/board.mk b/hw/bsp/d5035_01/board.mk
index b7796b9d8..cefd8c935 100644
--- a/hw/bsp/d5035_01/board.mk
+++ b/hw/bsp/d5035_01/board.mk
@@ -52,7 +52,7 @@ INC += \
 	$(TOP)/hw/mcu/microchip/same51/CMSIS/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM4F
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = ATSAME51J19
diff --git a/hw/bsp/da14695_dk_usb/board.mk b/hw/bsp/da14695_dk_usb/board.mk
index e969c79c2..2ca7f8529 100644
--- a/hw/bsp/da14695_dk_usb/board.mk
+++ b/hw/bsp/da14695_dk_usb/board.mk
@@ -31,7 +31,7 @@ INC += \
 	$(TOP)/$(MCU_FAMILY_DIR)/SDK_10.0.8.105/sdk/bsp/include
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM33_NTZ/non_secure
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM33_NTZ/non_secure
 
 # For flash-jlink target
 JLINK_DEVICE = DA14695
diff --git a/hw/bsp/da1469x_dk_pro/board.mk b/hw/bsp/da1469x_dk_pro/board.mk
index 980fc422f..d9dd5cd65 100644
--- a/hw/bsp/da1469x_dk_pro/board.mk
+++ b/hw/bsp/da1469x_dk_pro/board.mk
@@ -31,7 +31,7 @@ INC += \
 	$(TOP)/$(MCU_FAMILY_DIR)/SDK_10.0.8.105/sdk/bsp/include
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM33_NTZ/non_secure
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM33_NTZ/non_secure
 
 # For flash-jlink target
 JLINK_DEVICE = DA14699
diff --git a/hw/bsp/ea4088qs/board.mk b/hw/bsp/ea4088qs/board.mk
index b325dfeb4..54195b20c 100644
--- a/hw/bsp/ea4088qs/board.mk
+++ b/hw/bsp/ea4088qs/board.mk
@@ -37,7 +37,7 @@ INC += \
 	$(TOP)/$(MCU_DIR)/inc
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM4F
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = LPC4088
diff --git a/hw/bsp/ea4357/board.mk b/hw/bsp/ea4357/board.mk
index 6f243c6a2..4556e98f6 100644
--- a/hw/bsp/ea4357/board.mk
+++ b/hw/bsp/ea4357/board.mk
@@ -39,7 +39,7 @@ INC += \
 	$(TOP)/$(MCU_DIR)/inc/config_43xx
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM4F
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = LPC4357_M4
diff --git a/hw/bsp/fomu/family.mk b/hw/bsp/fomu/family.mk
index 165535c6b..8f8f3d011 100644
--- a/hw/bsp/fomu/family.mk
+++ b/hw/bsp/fomu/family.mk
@@ -19,7 +19,7 @@ INC += \
 	$(TOP)/$(FAMILY_PATH)/include
 
 # For freeRTOS port source
-FREERTOS_PORT = RISC-V
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/RISC-V
 
 # flash using dfu-util
 $(BUILD)/$(PROJECT).dfu: $(BUILD)/$(PROJECT).bin
diff --git a/hw/bsp/frdm_k32l2b/board.mk b/hw/bsp/frdm_k32l2b/board.mk
index 56df553da..407e5805d 100644
--- a/hw/bsp/frdm_k32l2b/board.mk
+++ b/hw/bsp/frdm_k32l2b/board.mk
@@ -39,7 +39,7 @@ INC += \
 SRC_S += $(MCU_DIR)/gcc/startup_K32L2B31A.S
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM0
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
 
 # For flash-jlink target
 JLINK_DEVICE = MKL25Z128xxx4
diff --git a/hw/bsp/frdm_kl25z/board.mk b/hw/bsp/frdm_kl25z/board.mk
index 3585b8b03..0a2ddad9f 100644
--- a/hw/bsp/frdm_kl25z/board.mk
+++ b/hw/bsp/frdm_kl25z/board.mk
@@ -40,7 +40,7 @@ INC += \
 SRC_S += $(MCU_DIR)/gcc/startup_MKL25Z4.S
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM0
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
 
 # For flash-jlink target
 JLINK_DEVICE = MKL25Z128xxx4
diff --git a/hw/bsp/gd32vf103/family.mk b/hw/bsp/gd32vf103/family.mk
index 49bacdf1b..c0c144f5c 100644
--- a/hw/bsp/gd32vf103/family.mk
+++ b/hw/bsp/gd32vf103/family.mk
@@ -57,7 +57,7 @@ INC += \
 	$(TOP)/$(GD32VF103_SDK_SOC)/Common/Include/Usb
 
 # For freeRTOS port source
-FREERTOS_PORT = RISC-V
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/RISC-V
 
 # For flash-jlink target
 JLINK_IF = jtag
diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk
index 0bf4a0d15..850e54202 100644
--- a/hw/bsp/imxrt/family.mk
+++ b/hw/bsp/imxrt/family.mk
@@ -59,5 +59,5 @@ INC += \
 SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_VARIANT).S
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM7/r0p1
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM7/r0p1
 
diff --git a/hw/bsp/kuiic/board.mk b/hw/bsp/kuiic/board.mk
index 39e9d9deb..94646dbde 100644
--- a/hw/bsp/kuiic/board.mk
+++ b/hw/bsp/kuiic/board.mk
@@ -40,7 +40,7 @@ INC += \
 SRC_S += $(MCU_DIR)/gcc/startup_K32L2B31A.S
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM0
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
 
 # For flash-jlink target
 JLINK_DEVICE = MKL25Z128xxx4
diff --git a/hw/bsp/lpc15/family.mk b/hw/bsp/lpc15/family.mk
index c7dd3f8be..fee0e0106 100644
--- a/hw/bsp/lpc15/family.mk
+++ b/hw/bsp/lpc15/family.mk
@@ -36,4 +36,4 @@ INC += \
 	$(TOP)/$(MCU_DIR)/inc
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM3
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3
diff --git a/hw/bsp/lpc18/family.mk b/hw/bsp/lpc18/family.mk
index 7aa36abc4..8ba05c9c9 100644
--- a/hw/bsp/lpc18/family.mk
+++ b/hw/bsp/lpc18/family.mk
@@ -34,4 +34,4 @@ INC += \
 	$(TOP)/$(MCU_DIR)/inc/config_18xx
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM3
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3
diff --git a/hw/bsp/lpc54/family.mk b/hw/bsp/lpc54/family.mk
index 600df6fd0..3c1059eff 100644
--- a/hw/bsp/lpc54/family.mk
+++ b/hw/bsp/lpc54/family.mk
@@ -51,4 +51,4 @@ INC += \
 SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_CORE).S
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM4F
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
diff --git a/hw/bsp/lpc55/family.mk b/hw/bsp/lpc55/family.mk
index 4e8d65ce9..94e7fea41 100644
--- a/hw/bsp/lpc55/family.mk
+++ b/hw/bsp/lpc55/family.mk
@@ -64,4 +64,4 @@ SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_CORE).S
 LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower_hardabi.a
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM33_NTZ/non_secure
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM33_NTZ/non_secure
diff --git a/hw/bsp/lpcxpresso11u37/board.mk b/hw/bsp/lpcxpresso11u37/board.mk
index b736eebe1..97ac6c01a 100644
--- a/hw/bsp/lpcxpresso11u37/board.mk
+++ b/hw/bsp/lpcxpresso11u37/board.mk
@@ -36,7 +36,7 @@ INC += \
 	$(TOP)/$(MCU_DIR)/inc
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM0
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
 
 # For flash-jlink target
 JLINK_DEVICE = LPC11U37/401
diff --git a/hw/bsp/lpcxpresso11u68/board.mk b/hw/bsp/lpcxpresso11u68/board.mk
index 922414f82..9647b8b8f 100644
--- a/hw/bsp/lpcxpresso11u68/board.mk
+++ b/hw/bsp/lpcxpresso11u68/board.mk
@@ -32,7 +32,7 @@ INC += \
 	$(TOP)/$(MCU_DIR)/inc
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM0
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
 
 # For flash-jlink target
 JLINK_DEVICE = LPC11U68
diff --git a/hw/bsp/lpcxpresso1347/board.mk b/hw/bsp/lpcxpresso1347/board.mk
index 62135c274..38679a66f 100644
--- a/hw/bsp/lpcxpresso1347/board.mk
+++ b/hw/bsp/lpcxpresso1347/board.mk
@@ -36,7 +36,7 @@ INC += \
 	$(TOP)/$(MCU_DIR)/inc
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM3
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3
 
 # For flash-jlink target
 JLINK_DEVICE = LPC1347
diff --git a/hw/bsp/lpcxpresso1769/board.mk b/hw/bsp/lpcxpresso1769/board.mk
index 34b4d6dc0..ecafccc49 100644
--- a/hw/bsp/lpcxpresso1769/board.mk
+++ b/hw/bsp/lpcxpresso1769/board.mk
@@ -34,7 +34,7 @@ INC += \
 	$(TOP)/$(MCU_DIR)/inc
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM3
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3
 
 # For flash-jlink target
 JLINK_DEVICE = LPC1769
diff --git a/hw/bsp/lpcxpresso51u68/board.mk b/hw/bsp/lpcxpresso51u68/board.mk
index 98bef6758..6e39bbcad 100644
--- a/hw/bsp/lpcxpresso51u68/board.mk
+++ b/hw/bsp/lpcxpresso51u68/board.mk
@@ -43,7 +43,7 @@ SRC_S += $(MCU_DIR)/gcc/startup_LPC51U68.S
 LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower.a
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM0
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
 
 JLINK_DEVICE = LPC51U68
 PYOCD_TARGET = LPC51U68
diff --git a/hw/bsp/mbed1768/board.mk b/hw/bsp/mbed1768/board.mk
index b0d885866..a65d6eacb 100644
--- a/hw/bsp/mbed1768/board.mk
+++ b/hw/bsp/mbed1768/board.mk
@@ -34,7 +34,7 @@ INC += \
 	$(TOP)/$(MCU_DIR)/inc
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM3
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3
 
 # For flash-jlink target
 JLINK_DEVICE = LPC1768
diff --git a/hw/bsp/mm32/family.mk b/hw/bsp/mm32/family.mk
index 1a9f51191..c1147b4e9 100644
--- a/hw/bsp/mm32/family.mk
+++ b/hw/bsp/mm32/family.mk
@@ -30,7 +30,7 @@ INC += \
 	$(TOP)/$(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Inc
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM3
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3
 
 # flash target using on-board
 flash: flash-jlink
diff --git a/hw/bsp/msp432e4/family.mk b/hw/bsp/msp432e4/family.mk
index e3cb90abc..7f823b1aa 100644
--- a/hw/bsp/msp432e4/family.mk
+++ b/hw/bsp/msp432e4/family.mk
@@ -34,7 +34,7 @@ INC += \
 SRC_S += $(MCU_DIR)/Source/startup_msp432e411y_gcc.S
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM4F
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = MSP432E401Y
diff --git a/hw/bsp/ngx4330/board.mk b/hw/bsp/ngx4330/board.mk
index 3e901567c..26f8ae760 100644
--- a/hw/bsp/ngx4330/board.mk
+++ b/hw/bsp/ngx4330/board.mk
@@ -37,7 +37,7 @@ INC += \
 	$(TOP)/$(MCU_DIR)/inc/config_43xx
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM4F
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = LPC4330
diff --git a/hw/bsp/nrf/family.mk b/hw/bsp/nrf/family.mk
index d8283a9e6..c79d7e654 100644
--- a/hw/bsp/nrf/family.mk
+++ b/hw/bsp/nrf/family.mk
@@ -42,7 +42,7 @@ SRC_S += hw/mcu/nordic/nrfx/mdk/gcc_startup_$(MCU_VARIANT).S
 ASFLAGS += -D__HEAP_SIZE=0
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM4F
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = $(MCU_VARIANT)_xxaa
diff --git a/hw/bsp/nutiny_nuc121s/board.mk b/hw/bsp/nutiny_nuc121s/board.mk
index ff1d5aa3a..da0226afe 100644
--- a/hw/bsp/nutiny_nuc121s/board.mk
+++ b/hw/bsp/nutiny_nuc121s/board.mk
@@ -32,7 +32,7 @@ INC += \
   $(TOP)/hw/mcu/nuvoton/nuc121_125/CMSIS/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM0
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
 
 # For flash-jlink target
 JLINK_DEVICE = NUC121SC2AE
diff --git a/hw/bsp/nutiny_nuc125s/board.mk b/hw/bsp/nutiny_nuc125s/board.mk
index bb56e42ab..32cb56df1 100644
--- a/hw/bsp/nutiny_nuc125s/board.mk
+++ b/hw/bsp/nutiny_nuc125s/board.mk
@@ -28,7 +28,7 @@ INC += \
   $(TOP)/hw/mcu/nuvoton/nuc121_125/CMSIS/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM0
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
 
 # For flash-jlink target
 JLINK_DEVICE = NUC125SC2AE
diff --git a/hw/bsp/nutiny_nuc126v/board.mk b/hw/bsp/nutiny_nuc126v/board.mk
index 4f0ebf201..d24fdb6e2 100644
--- a/hw/bsp/nutiny_nuc126v/board.mk
+++ b/hw/bsp/nutiny_nuc126v/board.mk
@@ -34,7 +34,7 @@ INC += \
   $(TOP)/hw/mcu/nuvoton/nuc126/CMSIS/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM0
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
 
 # For flash-jlink target
 JLINK_DEVICE = NUC126VG4AE
diff --git a/hw/bsp/nutiny_sdk_nuc120/board.mk b/hw/bsp/nutiny_sdk_nuc120/board.mk
index 4d7aac7f5..b06d4873e 100644
--- a/hw/bsp/nutiny_sdk_nuc120/board.mk
+++ b/hw/bsp/nutiny_sdk_nuc120/board.mk
@@ -30,7 +30,7 @@ INC += \
   $(TOP)/hw/mcu/nuvoton/nuc100_120/CMSIS/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM0
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
 
 # For flash-jlink target
 JLINK_DEVICE = NUC120LE3
diff --git a/hw/bsp/nutiny_sdk_nuc505/board.mk b/hw/bsp/nutiny_sdk_nuc505/board.mk
index e8514347e..357cdec51 100644
--- a/hw/bsp/nutiny_sdk_nuc505/board.mk
+++ b/hw/bsp/nutiny_sdk_nuc505/board.mk
@@ -39,7 +39,7 @@ INC += \
   $(TOP)/hw/mcu/nuvoton/nuc505/CMSIS/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM4F
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = NUC505YO13Y
diff --git a/hw/bsp/rx/boards/gr_citrus/board.mk b/hw/bsp/rx/boards/gr_citrus/board.mk
index 0eba94610..4f2770725 100644
--- a/hw/bsp/rx/boards/gr_citrus/board.mk
+++ b/hw/bsp/rx/boards/gr_citrus/board.mk
@@ -11,7 +11,7 @@ MCU_DIR = hw/mcu/renesas/rx/rx63n
 LD_FILE = $(BOARD_PATH)/r5f5631fd.ld
 
 # For freeRTOS port source
-FREERTOS_PORT = RX600
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/RX600
 
 # For flash-jlink target
 JLINK_DEVICE = R5F5631F
diff --git a/hw/bsp/rx/boards/rx65n_target/board.mk b/hw/bsp/rx/boards/rx65n_target/board.mk
index fc76d79fa..18c7d354d 100644
--- a/hw/bsp/rx/boards/rx65n_target/board.mk
+++ b/hw/bsp/rx/boards/rx65n_target/board.mk
@@ -12,7 +12,7 @@ MCU_DIR = hw/mcu/renesas/rx/rx65n
 LD_FILE = $(BOARD_PATH)/r5f565ne.ld
 
 # For freeRTOS port source
-FREERTOS_PORT = RX600
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/RX600
 
 # For flash-jlink target
 JLINK_DEVICE = R5F565NE
diff --git a/hw/bsp/samd11/family.mk b/hw/bsp/samd11/family.mk
index ae55be75b..fcc163c02 100644
--- a/hw/bsp/samd11/family.mk
+++ b/hw/bsp/samd11/family.mk
@@ -37,4 +37,4 @@ INC += \
 	$(TOP)/hw/mcu/microchip/samd11/CMSIS/Core/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM0
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
diff --git a/hw/bsp/samd21/family.mk b/hw/bsp/samd21/family.mk
index 208f23789..a4935e442 100644
--- a/hw/bsp/samd21/family.mk
+++ b/hw/bsp/samd21/family.mk
@@ -37,7 +37,7 @@ INC += \
 	$(TOP)/hw/mcu/microchip/samd21/CMSIS/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM0
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
 
 # flash using bossac at least version 1.8
 # can be found in arduino15/packages/arduino/tools/bossac/
diff --git a/hw/bsp/samd51/family.mk b/hw/bsp/samd51/family.mk
index 783bed82a..aa3af5318 100644
--- a/hw/bsp/samd51/family.mk
+++ b/hw/bsp/samd51/family.mk
@@ -38,7 +38,7 @@ INC += \
 	$(TOP)/hw/mcu/microchip/samd51/CMSIS/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM4F
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
 
 # flash using bossac at least version 1.8
 # can be found in arduino15/packages/arduino/tools/bossac/
diff --git a/hw/bsp/same54xplainedpro/board.mk b/hw/bsp/same54xplainedpro/board.mk
index 2d0d928ff..7d7ede0f0 100644
--- a/hw/bsp/same54xplainedpro/board.mk
+++ b/hw/bsp/same54xplainedpro/board.mk
@@ -38,7 +38,7 @@ INC += \
 	$(TOP)/hw/mcu/microchip/same54/CMSIS/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM4F
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = ATSAME54P20
diff --git a/hw/bsp/same70_qmtech/board.mk b/hw/bsp/same70_qmtech/board.mk
index ba7088e44..5f53004ed 100644
--- a/hw/bsp/same70_qmtech/board.mk
+++ b/hw/bsp/same70_qmtech/board.mk
@@ -44,7 +44,7 @@ INC += \
 	$(TOP)/$(ASF_DIR)/CMSIS/Core/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM7
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM7
 
 # For flash-jlink target
 JLINK_DEVICE = SAME70N19B
diff --git a/hw/bsp/same70_xplained/board.mk b/hw/bsp/same70_xplained/board.mk
index cb2decf50..138e27b44 100644
--- a/hw/bsp/same70_xplained/board.mk
+++ b/hw/bsp/same70_xplained/board.mk
@@ -44,7 +44,7 @@ INC += \
 	$(TOP)/$(ASF_DIR)/CMSIS/Core/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM7
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM7
 
 # For flash-jlink target
 JLINK_DEVICE = SAME70Q21B
diff --git a/hw/bsp/samg55xplained/board.mk b/hw/bsp/samg55xplained/board.mk
index deff6944c..1d228239e 100644
--- a/hw/bsp/samg55xplained/board.mk
+++ b/hw/bsp/samg55xplained/board.mk
@@ -42,7 +42,7 @@ INC += \
 	$(TOP)/$(ASF_DIR)/CMSIS/Core/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM4F
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = ATSAMG55J19
diff --git a/hw/bsp/saml2x/family.mk b/hw/bsp/saml2x/family.mk
index bb1faeb7f..958b271ad 100644
--- a/hw/bsp/saml2x/family.mk
+++ b/hw/bsp/saml2x/family.mk
@@ -39,7 +39,7 @@ INC += \
 	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM0
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
 
 # flash using bossac at least version 1.8
 # can be found in arduino15/packages/arduino/tools/bossac/
diff --git a/hw/bsp/sltb009a/board.mk b/hw/bsp/sltb009a/board.mk
index f5c240ca2..a5011cce2 100644
--- a/hw/bsp/sltb009a/board.mk
+++ b/hw/bsp/sltb009a/board.mk
@@ -35,7 +35,7 @@ INC += \
   $(TOP)/hw/bsp/$(BOARD)
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM3
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3
 
 # For flash-jlink target
 JLINK_DEVICE = EFM32GG12B810F1024
diff --git a/hw/bsp/stm32f0/family.mk b/hw/bsp/stm32f0/family.mk
index 39831e154..75d14d22c 100644
--- a/hw/bsp/stm32f0/family.mk
+++ b/hw/bsp/stm32f0/family.mk
@@ -37,4 +37,4 @@ INC += \
   $(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM0
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
diff --git a/hw/bsp/stm32f1/family.mk b/hw/bsp/stm32f1/family.mk
index 3fb2e6e70..a9c6f4ec4 100644
--- a/hw/bsp/stm32f1/family.mk
+++ b/hw/bsp/stm32f1/family.mk
@@ -35,7 +35,7 @@ INC += \
   $(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM3
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f103c8
diff --git a/hw/bsp/stm32f207nucleo/board.mk b/hw/bsp/stm32f207nucleo/board.mk
index fa7d28399..f418c6c04 100644
--- a/hw/bsp/stm32f207nucleo/board.mk
+++ b/hw/bsp/stm32f207nucleo/board.mk
@@ -39,7 +39,7 @@ INC += \
   $(TOP)/hw/bsp/$(BOARD)
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM3
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f207zg
diff --git a/hw/bsp/stm32f303disco/board.mk b/hw/bsp/stm32f303disco/board.mk
index 9dd27a857..371aba0f3 100644
--- a/hw/bsp/stm32f303disco/board.mk
+++ b/hw/bsp/stm32f303disco/board.mk
@@ -40,7 +40,7 @@ INC += \
   $(TOP)/hw/bsp/$(BOARD)
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM4F
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f303vc
diff --git a/hw/bsp/stm32f4/family.mk b/hw/bsp/stm32f4/family.mk
index 9811d3371..48cf1427b 100644
--- a/hw/bsp/stm32f4/family.mk
+++ b/hw/bsp/stm32f4/family.mk
@@ -37,7 +37,7 @@ INC += \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM4F
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32f7/family.mk b/hw/bsp/stm32f7/family.mk
index 8482e6dd2..59e421180 100644
--- a/hw/bsp/stm32f7/family.mk
+++ b/hw/bsp/stm32f7/family.mk
@@ -51,4 +51,4 @@ INC += \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM7/r0p1
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM7/r0p1
diff --git a/hw/bsp/stm32g4/family.mk b/hw/bsp/stm32g4/family.mk
index 04222f3bb..72993bc66 100644
--- a/hw/bsp/stm32g4/family.mk
+++ b/hw/bsp/stm32g4/family.mk
@@ -38,7 +38,7 @@ INC += \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM4F
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32h7/family.mk b/hw/bsp/stm32h7/family.mk
index 096d04d0c..d2dda3c1b 100644
--- a/hw/bsp/stm32h7/family.mk
+++ b/hw/bsp/stm32h7/family.mk
@@ -53,5 +53,5 @@ INC += \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM7/r0p1
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM7/r0p1
 
diff --git a/hw/bsp/stm32l0538disco/board.mk b/hw/bsp/stm32l0538disco/board.mk
index e19101d64..434c94ef2 100644
--- a/hw/bsp/stm32l0538disco/board.mk
+++ b/hw/bsp/stm32l0538disco/board.mk
@@ -41,7 +41,7 @@ INC += \
   $(TOP)/hw/bsp/$(BOARD)
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM0
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
 
 # For flash-jlink target
 JLINK_DEVICE = STM32L053R8
diff --git a/hw/bsp/stm32l4/family.mk b/hw/bsp/stm32l4/family.mk
index d6f55e5f9..59d214673 100644
--- a/hw/bsp/stm32l4/family.mk
+++ b/hw/bsp/stm32l4/family.mk
@@ -39,7 +39,7 @@ INC += \
 	$(TOP)/$(BOARD_PATH)
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM4F
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32wb/family.mk b/hw/bsp/stm32wb/family.mk
index f85c5badd..66f8ff4e2 100644
--- a/hw/bsp/stm32wb/family.mk
+++ b/hw/bsp/stm32wb/family.mk
@@ -38,7 +38,7 @@ INC += \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM4F
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/tm4c123/family.mk b/hw/bsp/tm4c123/family.mk
index 751076196..73b65f00c 100644
--- a/hw/bsp/tm4c123/family.mk
+++ b/hw/bsp/tm4c123/family.mk
@@ -33,4 +33,4 @@ SRC_C += \
 	$(MCU_DIR)/Source/GCC/tm4c123_startup.c
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM4F
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
diff --git a/hw/bsp/xmc4000/family.mk b/hw/bsp/xmc4000/family.mk
index 0b32bdeb5..134098dac 100644
--- a/hw/bsp/xmc4000/family.mk
+++ b/hw/bsp/xmc4000/family.mk
@@ -37,4 +37,4 @@ INC += \
 	$(TOP)/$(MCU_DIR)/XMCLib/inc
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM4F
+FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F

From a936bafb8c1e0c6f125fdae90ffe57bf0deed57c Mon Sep 17 00:00:00 2001
From: Rafael Silva <rafaelsilva@ajtec.pt>
Date: Wed, 9 Mar 2022 12:19:45 +0000
Subject: [PATCH 006/691] add support for renesas ra family of mcus

Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
---
 src/common/tusb_mcu.h                |  2 +-
 src/portable/renesas/link/dcd_link.c |  5 ++-
 src/portable/renesas/link/hcd_link.c |  5 ++-
 src/portable/renesas/link/link_ra.h  | 64 ++++++++++++++++++++++++++++
 src/tusb_option.h                    |  2 +
 5 files changed, 75 insertions(+), 3 deletions(-)
 create mode 100644 src/portable/renesas/link/link_ra.h

diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index c1cf2a810..5daa37f04 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -236,7 +236,7 @@
   #define TUP_DCD_ENDPOINT_MAX    7
 
 //------------- Renesas -------------//
-#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
+#elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N, OPT_MCU_RAXXX)
   #define TUP_DCD_ENDPOINT_MAX    10
 
 //------------- GigaDevice -------------//
diff --git a/src/portable/renesas/link/dcd_link.c b/src/portable/renesas/link/dcd_link.c
index 3aeda9e4c..19fbfe293 100644
--- a/src/portable/renesas/link/dcd_link.c
+++ b/src/portable/renesas/link/dcd_link.c
@@ -31,13 +31,16 @@
 // We disable SOF for now until needed later on
 #define USE_SOF     0
 
-#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N)
+#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N || \
+			CFG_TUSB_MCU == OPT_MCU_RAXXX)
 
 #include "device/dcd.h"
 #include "link_type.h"
 
 #if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
 #include "link_rx.h"
+#elif TU_CHECK_MCU(OPT_MCU_RAXXX)
+#include "link_ra.h"
 #else
 #error "Unsupported MCU"
 #endif
diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/link/hcd_link.c
index 46a4aae8f..2ada28105 100644
--- a/src/portable/renesas/link/hcd_link.c
+++ b/src/portable/renesas/link/hcd_link.c
@@ -27,13 +27,16 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N)
+#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N || \
+			CFG_TUSB_MCU == OPT_MCU_RAXXX)
 
 #include "host/hcd.h"
 #include "link_type.h"
 
 #if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
 #include "link_rx.h"
+#elif TU_CHECK_MCU(OPT_MCU_RAXXX)
+#include "link_ra.h"
 #else
 #error "Unsupported MCU"
 #endif
diff --git a/src/portable/renesas/link/link_ra.h b/src/portable/renesas/link/link_ra.h
new file mode 100644
index 000000000..b42def368
--- /dev/null
+++ b/src/portable/renesas/link/link_ra.h
@@ -0,0 +1,64 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2022 Rafael Silva (@perigoso)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _LINK_RA_H_
+#define _LINK_RA_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "link_type.h"
+
+/* renesas fsp api */
+#include "bsp_api.h"
+
+#define LINK_REG_BASE (0x40090000)
+
+TU_ATTR_ALWAYS_INLINE
+static inline void link_int_enable(uint8_t rhport)
+{
+	(void) rhport;
+	NVIC_EnableIRQ(TU_IRQn);
+}
+
+TU_ATTR_ALWAYS_INLINE
+static inline void link_int_disable(uint8_t rhport)
+{
+	(void) rhport;
+	NVIC_DisableIRQ(TU_IRQn);
+}
+
+// MCU specific PHY init
+static inline void link_phy_init(void)
+{
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _LINK_RA_H_ */
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 3b054fc78..16bdedce5 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -127,6 +127,8 @@ typedef int make_iso_compilers_happy ;
 #define OPT_MCU_RX63X            1400 ///< Renesas RX63N/631
 #define OPT_MCU_RX65X            1401 ///< Renesas RX65N/RX651
 #define OPT_MCU_RX72N            1402 ///< Renesas RX72N
+#define OPT_MCU_RAXXX            1403 ///< Renesas RAxxx families
+
 
 // Mind Motion
 #define OPT_MCU_MM32F327X        1500 ///< Mind Motion MM32F327

From 0bf0e0b35f55e6906daeeb3615aa1e35503ee8e6 Mon Sep 17 00:00:00 2001
From: Rafael Silva <rafaelsilva@ajtec.pt>
Date: Wed, 9 Mar 2022 12:22:18 +0000
Subject: [PATCH 007/691] add renesas ra mcu family to supported devices docs

Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
---
 README.rst                   | 6 +++++-
 docs/reference/supported.rst | 2 ++
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/README.rst b/README.rst
index 5b994c357..0877c14d1 100644
--- a/README.rst
+++ b/README.rst
@@ -48,7 +48,11 @@ The stack supports the following MCUs:
   - LPC Series: 11u, 13, 15, 17, 18, 40, 43, 51u, 54, 55
 
 - **Raspberry Pi:** RP2040
-- **Renesas:** RX63N, RX65N, RX72N
+- **Renesas:**
+
+	- RX Series: 63N, 65N, 72N
+	- RA Series: RA2A1, RA2E1, RA2E2, RA2l1, RA4E1, RA4M1, RA4M2, RA4M3, RA4W1, RA6E1, RA6M1, RA6M2, RA6M3, RA6M4, RA6M5, RA6T1, RA6T2
+
 - **Silabs:** EFM32GG
 - **Sony:** CXD56
 - **ST:** STM32 series: F0, F1, F2, F3, F4, F7, H7, G4, L0, L1, L4, L4+
diff --git a/docs/reference/supported.rst b/docs/reference/supported.rst
index 3c1b94623..02da501eb 100644
--- a/docs/reference/supported.rst
+++ b/docs/reference/supported.rst
@@ -61,6 +61,8 @@ Supported MCUs
 | Raspberry Pi | RP2040                | ✔      | ✔    | ✖         | rp2040            |              |
 +--------------+-----+-----------------+--------+------+-----------+-------------------+--------------+
 | Renesas      | RX  | 63N, 65N, 72N   | ✔      | ✔    | ✖         | link              |              |
+|              +-----+-----------------+--------+------+-----------+-------------------+--------------+
+|              | RA  | XXX             | ✔      | ✔    |           | link              |              |
 +--------------+-----+-----------------+--------+------+-----------+-------------------+--------------+
 | Silabs       | EFM32GG12             | ✔      |      | ✖         | dwc2              |              |
 +--------------+-----------------------+--------+------+-----------+-------------------+--------------+

From 4c89776a275b9ae002d5f1dfe5a30fe538bae27e Mon Sep 17 00:00:00 2001
From: Rafael Silva <rafaelsilva@ajtec.pt>
Date: Wed, 9 Mar 2022 12:58:15 +0000
Subject: [PATCH 008/691] add renesas ek-ra4m3 board port

Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
---
 .github/workflows/build_arm.yml               |   1 +
 hw/bsp/board_mcu.h                            |   5 +-
 hw/bsp/ra/boards/ek_ra4m3/board.mk            |  15 +
 hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c          | 210 +++++++
 hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.ld         | 575 ++++++++++++++++++
 hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_cfg.h   |  35 ++
 .../boards/ek_ra4m3/fsp_cfg/bsp_clock_cfg.h   |  27 +
 .../ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h     | 260 ++++++++
 .../ra/boards/ek_ra4m3/fsp_cfg/r_ioport_cfg.h |   7 +
 .../ra/boards/ek_ra4m3/fsp_cfg/vector_data.h  |   5 +
 hw/bsp/ra/family.mk                           |  55 ++
 11 files changed, 1194 insertions(+), 1 deletion(-)
 create mode 100644 hw/bsp/ra/boards/ek_ra4m3/board.mk
 create mode 100644 hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c
 create mode 100755 hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.ld
 create mode 100755 hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_cfg.h
 create mode 100644 hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_clock_cfg.h
 create mode 100644 hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h
 create mode 100755 hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/r_ioport_cfg.h
 create mode 100644 hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/vector_data.h
 create mode 100644 hw/bsp/ra/family.mk

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 5a796a49b..935e83141 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -48,6 +48,7 @@ jobs:
         - 'mm32'
         - 'msp432e4'
         - 'nrf'
+        - 'ra'
         - 'rp2040'
         - 'samd11'
         - 'samd21'
diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h
index b911e1e53..c8dccd3c5 100644
--- a/hw/bsp/board_mcu.h
+++ b/hw/bsp/board_mcu.h
@@ -127,13 +127,16 @@
 
 #elif CFG_TUSB_MCU == OPT_MCU_RP2040
   #include "pico.h"
-  
+
 #elif CFG_TUSB_MCU == OPT_MCU_EFM32GG
   #include "em_device.h"
 
 #elif CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X
   // no header needed
 
+#elif CFG_TUSB_MCU == OPT_MCU_RAXXX
+  #include "bsp_api.h"
+
 #elif CFG_TUSB_MCU == OPT_MCU_GD32VF103
   #include "gd32vf103.h"
 
diff --git a/hw/bsp/ra/boards/ek_ra4m3/board.mk b/hw/bsp/ra/boards/ek_ra4m3/board.mk
new file mode 100644
index 000000000..19f293e54
--- /dev/null
+++ b/hw/bsp/ra/boards/ek_ra4m3/board.mk
@@ -0,0 +1,15 @@
+CFLAGS += \
+	-mcpu=cortex-m33 \
+	-mfloat-abi=hard \
+	-mfpu=fpv5-sp-d16 \
+	-DCFG_TUSB_MCU=OPT_MCU_RAXXX
+
+FSP_MCU_DIR = hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/ra4m3
+FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m3_ek
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/ek_ra4m3.ld
+
+# For flash-jlink target
+JLINK_DEVICE = R7FA4M3AF
+JLINK_IF     = SWD
diff --git a/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c b/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c
new file mode 100644
index 000000000..d79d7b425
--- /dev/null
+++ b/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c
@@ -0,0 +1,210 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2022, Rafael Silva
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include <stdio.h>
+
+#include "bsp/board.h"
+#include "bsp_api.h"
+#include "r_ioport.h"
+#include "r_ioport_api.h"
+#include "renesas.h"
+
+/* Key code for writing PRCR register. */
+#define BSP_PRV_PRCR_KEY	 (0xA500U)
+#define BSP_PRV_PRCR_PRC1_UNLOCK ((BSP_PRV_PRCR_KEY) | 0x2U)
+#define BSP_PRV_PRCR_LOCK	 ((BSP_PRV_PRCR_KEY) | 0x0U)
+
+#define SW1  (BSP_IO_PORT_00_PIN_05)
+#define SW2  (BSP_IO_PORT_00_PIN_06)
+#define LED1 (BSP_IO_PORT_04_PIN_15)
+#define LED3 (BSP_IO_PORT_04_PIN_00)
+#define LED2 (BSP_IO_PORT_04_PIN_04)
+
+/* ISR prototypes */
+void usbfs_interrupt_handler(void);
+void usbfs_resume_handler(void);
+void usbfs_d0fifo_handler(void);
+void usbfs_d1fifo_handler(void);
+
+BSP_DONT_REMOVE const
+	fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = {
+		[0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */
+		[1] = usbfs_resume_handler,    /* USBFS RESUME (USBFS resume interrupt) */
+		[2] = usbfs_d0fifo_handler,    /* USBFS FIFO 0 (DMA transfer request 0) */
+		[3] = usbfs_d1fifo_handler,    /* USBFS FIFO 1 (DMA transfer request 1) */
+};
+const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENTRIES] = {
+	[0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT),    /* USBFS INT (USBFS interrupt) */
+	[1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */
+	[2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */
+	[3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1)  /* USBFS FIFO 1 (DMA transfer request 1) */
+};
+
+const ioport_pin_cfg_t g_bsp_pin_cfg_data[] = {
+	{.pin = BSP_IO_PORT_04_PIN_07,
+	 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
+	{.pin = BSP_IO_PORT_05_PIN_00,
+	 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
+	{.pin = BSP_IO_PORT_05_PIN_01,
+	 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
+	{.pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
+	{.pin = LED2, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
+	{.pin = LED3, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
+	{.pin = SW1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)},
+	{.pin = SW2, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)}};
+
+const ioport_cfg_t g_bsp_pin_cfg = {
+	.number_of_pins = sizeof(g_bsp_pin_cfg_data) / sizeof(ioport_pin_cfg_t),
+	.p_pin_cfg_data = &g_bsp_pin_cfg_data[0],
+};
+ioport_instance_ctrl_t g_ioport_ctrl;
+const ioport_instance_t g_ioport = {.p_api = &g_ioport_on_ioport, .p_ctrl = &g_ioport_ctrl, .p_cfg = &g_bsp_pin_cfg};
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void usbfs_interrupt_handler(void)
+{
+	IRQn_Type irq = R_FSP_CurrentIrqGet();
+	R_BSP_IrqStatusClear(irq);
+
+	tud_int_handler(0);
+}
+void usbfs_resume_handler(void)
+{
+	IRQn_Type irq = R_FSP_CurrentIrqGet();
+	R_BSP_IrqStatusClear(irq);
+
+	tud_int_handler(0);
+}
+void usbfs_d0fifo_handler(void)
+{
+	IRQn_Type irq = R_FSP_CurrentIrqGet();
+	R_BSP_IrqStatusClear(irq);
+
+	tud_int_handler(0);
+}
+void usbfs_d1fifo_handler(void)
+{
+	IRQn_Type irq = R_FSP_CurrentIrqGet();
+	R_BSP_IrqStatusClear(irq);
+
+	tud_int_handler(0);
+}
+
+void board_init(void)
+{
+	/* Configure pins. */
+	R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg);
+
+	/* Enable USB_BASE */
+	R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_PRC1_UNLOCK;
+	R_MSTP->MSTPCRB &= ~(1U << 11U);
+	R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK;
+
+#if CFG_TUSB_OS  == OPT_OS_FREERTOS
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+#endif
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+	/* Init systick */
+  	SysTick_Config(SystemCoreClock / 1000);
+#endif
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+	R_IOPORT_PinWrite(&g_ioport_ctrl, LED1, state);
+	R_IOPORT_PinWrite(&g_ioport_ctrl, LED2, state);
+	R_IOPORT_PinWrite(&g_ioport_ctrl, LED3, state);
+}
+
+uint32_t board_button_read(void)
+{
+	bsp_io_level_t lvl;
+	R_IOPORT_PinRead(&g_ioport_ctrl, SW1, &lvl);
+	return lvl;
+}
+
+int board_uart_read(uint8_t *buf, int len)
+{
+	(void) buf;
+	(void) len;
+	return 0;
+}
+
+int board_uart_write(void const *buf, int len)
+{
+	(void) buf;
+	(void) len;
+	return 0;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler(void)
+{
+	system_ticks++;
+}
+
+uint32_t board_millis(void)
+{
+	return system_ticks;
+}
+#else
+#endif
+
+int close(int fd)
+{
+	(void) fd;
+	return -1;
+}
+int fstat(int fd, void *pstat)
+{
+	(void) fd;
+	(void) pstat;
+	return 0;
+}
+off_t lseek(int fd, off_t pos, int whence)
+{
+	(void) fd;
+	(void) pos;
+	(void) whence;
+	return 0;
+}
+int isatty(int fd)
+{
+	(void) fd;
+	return 1;
+}
diff --git a/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.ld b/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.ld
new file mode 100755
index 000000000..5bc335cb4
--- /dev/null
+++ b/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.ld
@@ -0,0 +1,575 @@
+/* generated memory regions file - do not edit */
+RAM_START = 0x20000000;
+RAM_LENGTH = 0x20000;
+FLASH_START = 0x00000000;
+FLASH_LENGTH = 0x100000;
+DATA_FLASH_START = 0x08000000;
+DATA_FLASH_LENGTH = 0x2000;
+OPTION_SETTING_START = 0x0100A100;
+OPTION_SETTING_LENGTH = 0x100;
+OPTION_SETTING_S_START = 0x0100A200;
+OPTION_SETTING_S_LENGTH = 0x100;
+ID_CODE_START = 0x00000000;
+ID_CODE_LENGTH = 0x0;
+SDRAM_START = 0x90000000;
+SDRAM_LENGTH = 0x0;
+QSPI_FLASH_START = 0x60000000;
+QSPI_FLASH_LENGTH = 0x4000000;
+OSPI_DEVICE_0_START = 0x68000000;
+OSPI_DEVICE_0_LENGTH = 0x0;
+OSPI_DEVICE_1_START = 0x70000000;
+OSPI_DEVICE_1_LENGTH = 0x0;
+
+/*
+    Linker File for Renesas FSP
+*/
+
+QSPI_FLASH_PRV_LENGTH = DEFINED(QSPI_FLASH_SIZE) ? ABSOLUTE(QSPI_FLASH_SIZE) : ABSOLUTE(QSPI_FLASH_LENGTH);
+OSPI_DEVICE_0_PRV_LENGTH = DEFINED(OSPI_DEVICE_0_SIZE) ? ABSOLUTE(OSPI_DEVICE_0_SIZE) : ABSOLUTE(OSPI_DEVICE_0_LENGTH);
+OSPI_DEVICE_1_PRV_LENGTH = DEFINED(OSPI_DEVICE_1_SIZE) ? ABSOLUTE(OSPI_DEVICE_1_SIZE) : ABSOLUTE(OSPI_DEVICE_1_LENGTH);
+
+/* This is a non-secure project if the OPTION_SETTING region is non-zero and it does not start at the base address for
+ * secure option settings (meaning the secure option settings were already allocated in the secure project). */
+__TZ_NS_PROJECT = LENGTH(OPTION_SETTING) && DEFINED(OPTION_SETTING_S_START) && (ABSOLUTE(OPTION_SETTING_START_S) != ORIGIN(OPTION_SETTING));
+
+/* This is a secure project if the option setting base address matches the option setting base address for secure
+ * option settings. This is also set for flat projects because the CPU runs in secure mode for flat projects.
+ * This is not defined for projects that do not support TrustZone. */
+__TZ_S_PROJECT = LENGTH(OPTION_SETTING) && DEFINED(OPTION_SETTING_S_START) && (ABSOLUTE(OPTION_SETTING_START_S) == ORIGIN(OPTION_SETTING));
+
+/* If a flat (secure) project has defined RAM_NS_BUFFER_LENGTH, then emit IDAU symbols to allocate non-secure RAM. */
+__RESERVE_NS_RAM = __TZ_S_PROJECT && DEFINED(RAM_NS_BUFFER_LENGTH);
+
+RAM_NS_BUFFER_BLOCK_LENGTH = DEFINED(RAM_NS_BUFFER_LENGTH) ? ALIGN(RAM_NS_BUFFER_LENGTH, 8192) : 0;
+RAM_NS_BUFFER_LENGTH = DEFINED(RAM_NS_BUFFER_LENGTH) ? RAM_NS_BUFFER_LENGTH : 0;
+RAM_NS_BUFFER_START = RAM_START + RAM_LENGTH - RAM_NS_BUFFER_LENGTH;
+RAM_NS_BUFFER_BLOCK_START = RAM_START + RAM_LENGTH - RAM_NS_BUFFER_BLOCK_LENGTH;
+
+/* Define memory regions. */
+MEMORY
+{
+  FLASH (rx)      : ORIGIN = FLASH_START, LENGTH = FLASH_LENGTH
+  RAM (rwx)       : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
+  DATA_FLASH (rx) : ORIGIN = DATA_FLASH_START, LENGTH = DATA_FLASH_LENGTH
+  QSPI_FLASH (rx) : ORIGIN = QSPI_FLASH_START, LENGTH = QSPI_FLASH_PRV_LENGTH
+  OSPI_DEVICE_0 (rx) : ORIGIN = OSPI_DEVICE_0_START, LENGTH = OSPI_DEVICE_0_PRV_LENGTH
+  OSPI_DEVICE_1 (rx) : ORIGIN = OSPI_DEVICE_1_START, LENGTH = OSPI_DEVICE_1_PRV_LENGTH
+  SDRAM (rwx)     : ORIGIN = SDRAM_START, LENGTH = SDRAM_LENGTH
+  OPTION_SETTING (r): ORIGIN = OPTION_SETTING_START, LENGTH = OPTION_SETTING_LENGTH
+  OPTION_SETTING_S (r): ORIGIN = OPTION_SETTING_S_START, LENGTH = OPTION_SETTING_S_LENGTH
+  ID_CODE (rx)    : ORIGIN = ID_CODE_START, LENGTH = ID_CODE_LENGTH
+}
+
+OPTION_SETTING_START_NS = 0x0100A180;
+OPTION_SETTING_START_S = 0x0100A100;
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __copy_table_start__
+ *   __copy_table_end__
+ *   __zero_table_start__
+ *   __zero_table_end__
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ *   __Vectors_End
+ *   __Vectors_Size
+ *   __qspi_flash_start__
+ *   __qspi_flash_end__
+ *   __qspi_flash_code_size__
+ *   __qspi_region_max_size__
+ *   __qspi_region_start_address__
+ *   __qspi_region_end_address__
+ *   __ospi_device_0_start__
+ *   __ospi_device_0_end__
+ *   __ospi_device_0_code_size__
+ *   __ospi_device_0_region_max_size__
+ *   __ospi_device_0_region_start_address__
+ *   __ospi_device_0_region_end_address__
+ *   __ospi_device_1_start__
+ *   __ospi_device_1_end__
+ *   __ospi_device_1_code_size__
+ *   __ospi_device_1_region_max_size__
+ *   __ospi_device_1_region_start_address__
+ *   __ospi_device_1_region_end_address__
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+    .text :
+    {
+        __tz_FLASH_S = ABSOLUTE(FLASH_START);
+        __ROM_Start = .;
+
+        /* Even though the vector table is not 256 entries (1KB) long, we still allocate that much
+         * space because ROM registers are at address 0x400 and there is very little space
+         * in between. */
+        KEEP(*(.fixed_vectors*))
+        KEEP(*(.application_vectors*))
+        __Vectors_End = .;
+
+        /* ROM Registers start at address 0x00000400 */
+        . = __ROM_Start + 0x400;
+        KEEP(*(.rom_registers*))
+
+        /* Reserving 0x100 bytes of space for ROM registers. */
+        . = __ROM_Start + 0x500;
+
+        *(.text*)
+
+        KEEP(*(.version))
+        KEEP(*(.init))
+        KEEP(*(.fini))
+
+        /* .ctors */
+        *crtbegin.o(.ctors)
+        *crtbegin?.o(.ctors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+        *(SORT(.ctors.*))
+        *(.ctors)
+
+        /* .dtors */
+        *crtbegin.o(.dtors)
+        *crtbegin?.o(.dtors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+        *(SORT(.dtors.*))
+        *(.dtors)
+
+        *(.rodata*)
+        __usb_dev_descriptor_start_fs = .;
+        KEEP(*(.usb_device_desc_fs*))
+        __usb_cfg_descriptor_start_fs = .;
+        KEEP(*(.usb_config_desc_fs*))
+        __usb_interface_descriptor_start_fs = .;
+        KEEP(*(.usb_interface_desc_fs*))
+        __usb_descriptor_end_fs = .;
+        __usb_dev_descriptor_start_hs = .;
+        KEEP(*(.usb_device_desc_hs*))
+        __usb_cfg_descriptor_start_hs = .;
+        KEEP(*(.usb_config_desc_hs*))
+        __usb_interface_descriptor_start_hs = .;
+        KEEP(*(.usb_interface_desc_hs*))
+        __usb_descriptor_end_hs = .;
+
+        KEEP(*(.eh_frame*))
+
+        __ROM_End = .;
+    } > FLASH = 0xFF
+
+    __Vectors_Size = __Vectors_End - __Vectors;
+
+    .ARM.extab :
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > FLASH
+
+    __exidx_start = .;
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > FLASH
+    __exidx_end = .;
+
+    /* To copy multiple ROM to RAM sections,
+     * uncomment .copy.table section and,
+     * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+    /*
+    .copy.table :
+    {
+        . = ALIGN(4);
+        __copy_table_start__ = .;
+        LONG (__etext)
+        LONG (__data_start__)
+        LONG (__data_end__ - __data_start__)
+        LONG (__etext2)
+        LONG (__data2_start__)
+        LONG (__data2_end__ - __data2_start__)
+        __copy_table_end__ = .;
+    } > FLASH
+    */
+
+    /* To clear multiple BSS sections,
+     * uncomment .zero.table section and,
+     * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+    /*
+    .zero.table :
+    {
+        . = ALIGN(4);
+        __zero_table_start__ = .;
+        LONG (__bss_start__)
+        LONG (__bss_end__ - __bss_start__)
+        LONG (__bss2_start__)
+        LONG (__bss2_end__ - __bss2_start__)
+        __zero_table_end__ = .;
+    } > FLASH
+    */
+
+    __etext = .;
+
+    __tz_RAM_S = ORIGIN(RAM);
+
+    /* If DTC is used, put the DTC vector table at the start of SRAM.
+       This avoids memory holes due to 1K alignment required by it. */
+    .fsp_dtc_vector_table (NOLOAD) :
+    {
+        . = ORIGIN(RAM);
+        *(.fsp_dtc_vector_table)
+    } > RAM
+
+    /* Initialized data section. */
+    .data :
+    {
+        __data_start__ = .;
+        . = ALIGN(4);
+
+        __Code_In_RAM_Start = .;
+
+        KEEP(*(.code_in_ram*))
+        __Code_In_RAM_End = .;
+
+        *(vtable)
+        /* Don't use *(.data*) because it will place data meant for .data_flash in this section. */
+        *(.data.*)
+        *(.data)
+
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP(*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
+
+        . = ALIGN(4);
+        /* init data */
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE_HIDDEN (__init_array_end = .);
+
+
+        . = ALIGN(4);
+        /* finit data */
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        KEEP(*(SORT(.fini_array.*)))
+        KEEP(*(.fini_array))
+        PROVIDE_HIDDEN (__fini_array_end = .);
+
+        KEEP(*(.jcr*))
+
+        . = ALIGN(4);
+
+        /* All data end */
+        __data_end__ = .;
+
+    } > RAM AT > FLASH
+
+
+    /* TrustZone Secure Gateway Stubs Section. */
+    .gnu.sgstubs : ALIGN (1024)
+    {
+        . = DEFINED(FLASH_NSC_START) ? ABSOLUTE(FLASH_NSC_START) : ALIGN(1024);
+        __tz_FLASH_C = DEFINED(FLASH_NSC_START) ? ABSOLUTE(FLASH_NSC_START) : __RESERVE_NS_RAM ? ABSOLUTE(FLASH_START + FLASH_LENGTH) : ALIGN(1024);
+        _start_sg = .;
+        *(.gnu.sgstubs*)
+        . = ALIGN(32);
+        _end_sg = .;
+    } > FLASH
+
+    __tz_FLASH_N = DEFINED(FLASH_NS_START) ? ABSOLUTE(FLASH_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(FLASH_START + FLASH_LENGTH) : ALIGN(32768);
+
+    /* Note: There are no secure/non-secure boundaries for QSPI.  These symbols are provided for the RA configuration tool. */
+    __tz_QSPI_FLASH_S = ORIGIN(QSPI_FLASH);
+
+    /* QSPI_FLASH section to be downloaded via debugger */
+    .qspi_flash :
+    {
+        __qspi_flash_start__ = .;
+        KEEP(*(.qspi_flash*))
+        KEEP(*(.code_in_qspi*))
+        __qspi_flash_end__ = .;
+    } > QSPI_FLASH
+    __qspi_flash_code_size__ = __qspi_flash_end__ - __qspi_flash_start__;
+
+    /* QSPI_FLASH non-retentive section, creates a copy in internal flash that can be copied to QSPI */
+    __qspi_flash_code_addr__ = __etext + (__data_end__ - __data_start__);
+    .qspi_non_retentive : AT (__qspi_flash_code_addr__)
+    {
+        __qspi_non_retentive_start__ = .;
+        KEEP(*(.qspi_non_retentive*))
+        __qspi_non_retentive_end__ = .;
+    } > QSPI_FLASH
+    __qspi_non_retentive_size__ = __qspi_non_retentive_end__ - __qspi_non_retentive_start__;
+
+    __qspi_region_max_size__ = 0x4000000;   /* Must be the same as defined in MEMORY above */
+    __qspi_region_start_address__ = __qspi_flash_start__;
+    __qspi_region_end_address__ = __qspi_flash_start__ + __qspi_region_max_size__;
+
+    /* Note: There are no secure/non-secure boundaries for QSPI.  These symbols are provided for the RA configuration tool. */
+    __tz_QSPI_FLASH_N = __qspi_non_retentive_end__;
+
+    /* Note: There are no secure/non-secure boundaries for QSPI.  These symbols are provided for the RA configuration tool. */
+    __tz_OSPI_DEVICE_0_S = ORIGIN(OSPI_DEVICE_0);
+
+    /* OSPI_DEVICE_0 section to be downloaded via debugger */
+    .OSPI_DEVICE_0 :
+    {
+        __ospi_device_0_start__ = .;
+        KEEP(*(.ospi_device_0*))
+        KEEP(*(.code_in_ospi_device_0*))
+        __ospi_device_0_end__ = .;
+    } > OSPI_DEVICE_0
+    __ospi_device_0_code_size__ = __ospi_device_0_end__ - __ospi_device_0_start__;
+
+    /* OSPI_DEVICE_0 non-retentive section, creates a copy in internal flash that can be copied to OSPI */
+    __ospi_device_0_code_addr__ = __etext + (__data_end__ - __data_start__);
+    .ospi_device_0_non_retentive : AT (__ospi_device_0_code_addr__)
+    {
+        __ospi_device_0_non_retentive_start__ = .;
+        KEEP(*(.ospi_device_0_non_retentive*))
+        __ospi_device_0_non_retentive_end__ = .;
+    } > OSPI_DEVICE_0
+    __ospi_device_0_non_retentive_size__ = __ospi_device_0_non_retentive_end__ - __ospi_device_0_non_retentive_start__;
+
+    __ospi_device_0_region_max_size__ = 0x8000000;   /* Must be the same as defined in MEMORY above */
+    __ospi_device_0_region_start_address__ = __ospi_device_0_start__;
+    __ospi_device_0_region_end_address__ = __ospi_device_0_start__ + __ospi_device_0_region_max_size__;
+
+    /* Note: There are no secure/non-secure boundaries for OSPI.  These symbols are provided for the RA configuration tool. */
+    __tz_OSPI_DEVICE_0_N = __ospi_device_0_non_retentive_end__;
+
+    /* Note: There are no secure/non-secure boundaries for OSPI.  These symbols are provided for the RA configuration tool. */
+    __tz_OSPI_DEVICE_1_S = ORIGIN(OSPI_DEVICE_1);
+
+    /* OSPI_DEVICE_1 section to be downloaded via debugger */
+    .OSPI_DEVICE_1 :
+    {
+        __ospi_device_1_start__ = .;
+        KEEP(*(.ospi_device_1*))
+        KEEP(*(.code_in_ospi_device_1*))
+        __ospi_device_1_end__ = .;
+    } > OSPI_DEVICE_1
+    __ospi_device_1_code_size__ = __ospi_device_1_end__ - __ospi_device_1_start__;
+
+    /* OSPI_DEVICE_1 non-retentive section, creates a copy in internal flash that can be copied to OSPI */
+    __ospi_device_1_code_addr__ = __etext + (__data_end__ - __data_start__);
+    .ospi_device_1_non_retentive : AT (__ospi_device_1_code_addr__)
+    {
+        __ospi_device_1_non_retentive_start__ = .;
+        KEEP(*(.ospi_device_1_non_retentive*))
+        __ospi_device_1_non_retentive_end__ = .;
+    } > OSPI_DEVICE_1
+    __ospi_device_1_non_retentive_size__ = __ospi_device_1_non_retentive_end__ - __ospi_device_1_non_retentive_start__;
+
+    __ospi_device_1_region_max_size__ = 0x10000000;   /* Must be the same as defined in MEMORY above */
+    __ospi_device_1_region_start_address__ = __ospi_device_1_start__;
+    __ospi_device_1_region_end_address__ = __ospi_device_1_start__ + __ospi_device_1_region_max_size__;
+
+    /* Note: There are no secure/non-secure boundaries for OSPI.  These symbols are provided for the RA configuration tool. */
+    __tz_OSPI_DEVICE_1_N = __ospi_device_1_non_retentive_end__;
+
+    .noinit (NOLOAD):
+    {
+        . = ALIGN(4);
+        __noinit_start = .;
+        KEEP(*(.noinit*))
+        . = ALIGN(8);
+        /* Place the FreeRTOS heap here so that the __HeapLimit calculation does not include the freertos heap. */
+        KEEP(*(.heap.*))
+        __noinit_end = .;
+    } > RAM
+
+    .bss :
+    {
+        . = ALIGN(4);
+        __bss_start__ = .;
+        *(.bss*)
+        *(COMMON)
+        . = ALIGN(4);
+        __bss_end__ = .;
+    } > RAM
+
+    .heap (NOLOAD):
+    {
+        . = ALIGN(8);
+        __HeapBase = .;
+        /* Place the STD heap here. */
+        KEEP(*(.heap))
+        __HeapLimit = .;
+    } > RAM
+
+    /* Stacks are stored in this section. */
+    .stack_dummy (NOLOAD):
+    {
+        . = ALIGN(8);
+        __StackLimit = .;
+        /* Main stack */
+        KEEP(*(.stack))
+        __StackTop = .;
+        /* Thread stacks */
+        KEEP(*(.stack*))
+        __StackTopAll = .;
+    } > RAM
+
+    PROVIDE(__stack = __StackTopAll);
+
+    /* This symbol represents the end of user allocated RAM. The RAM after this symbol can be used
+       at run time for things such as ThreadX memory pool allocations. */
+    __RAM_segment_used_end__ = ALIGN(__StackTopAll , 4);
+
+    /* RAM_NSC_START can be used to set a fixed address for non-secure callable RAM in secure projects.
+     * If it is not specified, the address for NSC RAM is the end of RAM aligned to a 1K boundary.
+     * In flat projects that require non-secure RAM, this variable is set to the start of non-secure RAM. */
+    __tz_RAM_C = DEFINED(RAM_NSC_START) ? ABSOLUTE(RAM_NSC_START) : __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_BLOCK_START) : ALIGN(__RAM_segment_used_end__, 1024);
+
+    /* RAM_NS_START can be used to set a fixed address for non-secure RAM in secure projects or flat projects.
+     * RAM_NS_BUFFER_BLOCK_LENGTH is used to allocate non-secure buffers in a flat project. If it is not
+     * specified, the address for NSC RAM is the end of RAM aligned to an 8K boundary.
+     * In flat projects that require non-secure RAM, this variable is set to the start of non-secure RAM. */
+    __tz_RAM_N = DEFINED(RAM_NS_START) ? ABSOLUTE(RAM_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_BLOCK_START) : ALIGN(__tz_RAM_C, 8192);
+
+    /* Non-secure buffers must be in non-secure RAM. This is primarily used for the EDMAC in flat projects.
+     * The EDMAC is a non-secure bus master and can only access non-secure RAM. */
+    .ns_buffer (NOLOAD):
+    {
+        /* Allocate RAM on a 32-byte boundary to help with placement of Ethernet buffers. */
+        . = __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_START & 0xFFFFFFE0) : .;
+
+        KEEP(*(.ns_buffer*))
+    } > RAM
+
+    /* Data flash. */
+    .data_flash :
+    {
+        . = ORIGIN(DATA_FLASH);
+        __tz_DATA_FLASH_S = .;
+        __Data_Flash_Start = .;
+        KEEP(*(.data_flash*))
+        __Data_Flash_End = .;
+
+        __tz_DATA_FLASH_N = DEFINED(DATA_FLASH_NS_START) ? ABSOLUTE(DATA_FLASH_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(DATA_FLASH_START + DATA_FLASH_LENGTH) : ALIGN(1024);
+    } > DATA_FLASH
+
+    /* Note: There are no secure/non-secure boundaries for SDRAM.  These symbols are provided for the RA configuration tool. */
+    __tz_SDRAM_S = ORIGIN(SDRAM);
+
+    /* SDRAM */
+    .sdram (NOLOAD):
+    {
+        __SDRAM_Start = .;
+        KEEP(*(.sdram*))
+        KEEP(*(.frame*))
+        __SDRAM_End = .;
+    } > SDRAM
+
+    /* Note: There are no secure/non-secure boundaries for SDRAM.  These symbols are provided for the RA configuration tool. */
+    __tz_SDRAM_N = __SDRAM_End;
+
+    /* Note: There are no secure/non-secure boundaries for ID_CODE.  These symbols are provided for the RA configuration tool. */
+    __tz_ID_CODE_S = ORIGIN(ID_CODE);
+
+    .id_code :
+    {
+        __ID_Code_Start = .;
+        KEEP(*(.id_code*))
+        __ID_Code_End = .;
+    } > ID_CODE
+
+    /* Note: There are no secure/non-secure boundaries for ID_CODE.  These symbols are provided for the RA configuration tool. */
+    __tz_ID_CODE_N = __ID_Code_End;
+
+    /* Symbol required for RA Configuration tool. */
+    __tz_OPTION_SETTING_S = ORIGIN(OPTION_SETTING);
+
+    .option_setting :
+    {
+        __OPTION_SETTING_Start = .;
+        KEEP(*(.option_setting_ofs0))
+        . = __TZ_S_PROJECT ? __OPTION_SETTING_Start + 0x10 : __OPTION_SETTING_Start;
+        KEEP(*(.option_setting_dualsel))
+        . = __TZ_S_PROJECT ? __OPTION_SETTING_Start + 0x34 : __OPTION_SETTING_Start;
+        KEEP(*(.option_setting_sas))
+        __OPTION_SETTING_End = .;
+    } > OPTION_SETTING = 0xFF
+
+    /* Symbol required for RA Configuration tool. */
+    __tz_OPTION_SETTING_N = OPTION_SETTING_START_NS;
+
+    .option_setting_ns :
+    {
+        __OPTION_SETTING_NS_Start = .;
+        KEEP(*(.option_setting_ofs1))
+        . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x10 : __OPTION_SETTING_NS_Start;
+        KEEP(*(.option_setting_banksel))
+        . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x40 : __OPTION_SETTING_NS_Start;
+        KEEP(*(.option_setting_bps0))
+        . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x44 : __OPTION_SETTING_NS_Start;
+        KEEP(*(.option_setting_bps1))
+        . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x48 : __OPTION_SETTING_NS_Start;
+        KEEP(*(.option_setting_bps2))
+        . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x60 : __OPTION_SETTING_NS_Start;
+        KEEP(*(.option_setting_pbps0))
+        . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x64 : __OPTION_SETTING_NS_Start;
+        KEEP(*(.option_setting_pbps1))
+        . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x68 : __OPTION_SETTING_NS_Start;
+        KEEP(*(.option_setting_pbps2))
+        __OPTION_SETTING_NS_End = .;
+    } > OPTION_SETTING = 0xFF
+
+    /* Symbol required for RA Configuration tool. */
+    __tz_OPTION_SETTING_S_S = ORIGIN(OPTION_SETTING_S);
+
+    .option_setting_s :
+    {
+        __OPTION_SETTING_S_Start = .;
+        KEEP(*(.option_setting_ofs1_sec))
+        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x10 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_banksel_sec))
+        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x40 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_bps_sec0))
+        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x44 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_bps_sec1))
+        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x48 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_bps_sec2))
+        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x60 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_pbps_sec0))
+        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x64 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_pbps_sec1))
+        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x68 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_pbps_sec2))
+        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x80 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_ofs1_sel))
+        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x90 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_banksel_sel))
+        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0xC0 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_bps_sel0))
+        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0xC4 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_bps_sel1))
+        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0xC8 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_bps_sel2))
+        __OPTION_SETTING_S_End = .;
+    } > OPTION_SETTING_S = 0xFF
+
+    /* Symbol required for RA Configuration tool. */
+    __tz_OPTION_SETTING_S_N = __OPTION_SETTING_S_End;
+}
diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_cfg.h b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_cfg.h
new file mode 100755
index 000000000..a84d81e8d
--- /dev/null
+++ b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_cfg.h
@@ -0,0 +1,35 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_CFG_H_
+#define BSP_CFG_H_
+
+#include "board.h"
+#include "bsp_clock_cfg.h"
+#include "bsp_mcu_family_cfg.h"
+
+#undef RA_NOT_DEFINED
+#define BSP_CFG_RTOS (0)
+#if defined(_RA_BOOT_IMAGE)
+#define BSP_CFG_BOOT_IMAGE (1)
+#endif
+#define BSP_CFG_MCU_VCC_MV	      (3300)
+#define BSP_CFG_STACK_MAIN_BYTES      (0x400)
+#define BSP_CFG_HEAP_BYTES	      (0x400)
+#define BSP_CFG_PARAM_CHECKING_ENABLE (1)
+#define BSP_CFG_ASSERT		      (0)
+#define BSP_CFG_ERROR_LOG	      (0)
+
+#define BSP_CFG_PFS_PROTECT ((1))
+
+#define BSP_CFG_C_RUNTIME_INIT ((1))
+#define BSP_CFG_EARLY_INIT     ((0))
+
+#define BSP_CFG_STARTUP_CLOCK_REG_NOT_RESET ((0))
+
+#define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (1)
+
+#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE	(0)
+#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE		(0)
+#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED	(1)
+#define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000
+
+#endif /* BSP_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_clock_cfg.h b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_clock_cfg.h
new file mode 100644
index 000000000..4f490f340
--- /dev/null
+++ b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_clock_cfg.h
@@ -0,0 +1,27 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_CLOCK_CFG_H_
+#define BSP_CLOCK_CFG_H_
+
+#define BSP_CFG_CLOCKS_SECURE	(0)
+#define BSP_CFG_CLOCKS_OVERRIDE (0)
+#define BSP_CFG_XTAL_HZ		(24000000)			   /* XTAL 24000000Hz */
+#define BSP_CFG_HOCO_FREQUENCY	(2)				   /* HOCO 20MHz */
+#define BSP_CFG_PLL_SOURCE	(BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL Src: XTAL */
+#define BSP_CFG_PLL_DIV		(BSP_CLOCKS_PLL_DIV_3)		   /* PLL Div /3 */
+#define BSP_CFG_PLL_MUL		BSP_CLOCKS_PLL_MUL_24_0		   /* PLL Mul x24.0 */
+#define BSP_CFG_PLL2_SOURCE	(BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL2 Src: XTAL */
+#define BSP_CFG_PLL2_DIV	(BSP_CLOCKS_PLL_DIV_3)		   /* PLL2 Div /3 */
+#define BSP_CFG_PLL2_MUL	BSP_CLOCKS_PLL_MUL_24_0		   /* PLL2 Mul x24.0 */
+#define BSP_CFG_CLOCK_SOURCE	(BSP_CLOCKS_SOURCE_CLOCK_PLL)	   /* Clock Src: PLL */
+#define BSP_CFG_CLKOUT_SOURCE	(BSP_CLOCKS_CLOCK_DISABLED)	   /* CLKOUT Disabled */
+#define BSP_CFG_UCK_SOURCE	(BSP_CLOCKS_SOURCE_CLOCK_PLL2)	   /* UCLK Src: PLL2 */
+#define BSP_CFG_ICLK_DIV	(BSP_CLOCKS_SYS_CLOCK_DIV_2)	   /* ICLK Div /2 */
+#define BSP_CFG_PCLKA_DIV	(BSP_CLOCKS_SYS_CLOCK_DIV_2)	   /* PCLKA Div /2 */
+#define BSP_CFG_PCLKB_DIV	(BSP_CLOCKS_SYS_CLOCK_DIV_4)	   /* PCLKB Div /4 */
+#define BSP_CFG_PCLKC_DIV	(BSP_CLOCKS_SYS_CLOCK_DIV_4)	   /* PCLKC Div /4 */
+#define BSP_CFG_PCLKD_DIV	(BSP_CLOCKS_SYS_CLOCK_DIV_2)	   /* PCLKD Div /2 */
+#define BSP_CFG_FCLK_DIV	(BSP_CLOCKS_SYS_CLOCK_DIV_4)	   /* FCLK Div /4 */
+#define BSP_CFG_CLKOUT_DIV	(BSP_CLOCKS_SYS_CLOCK_DIV_1)	   /* CLKOUT Div /1 */
+#define BSP_CFG_UCK_DIV		(BSP_CLOCKS_USB_CLOCK_DIV_4)	   /* UCLK Div /4 */
+
+#endif /* BSP_CLOCK_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h
new file mode 100644
index 000000000..0449bb4bc
--- /dev/null
+++ b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h
@@ -0,0 +1,260 @@
+/* generated configuration header file through renesas e2 studio */
+#ifndef BSP_MCU_FAMILY_CFG_H_
+#define BSP_MCU_FAMILY_CFG_H_
+
+#include "bsp_clock_cfg.h"
+#include "bsp_mcu_info.h"
+
+#define BSP_CFG_MCU_PART_SERIES (4)
+#define BSP_MCU_R7FA4M3AF3CFB
+#define BSP_ROM_SIZE_BYTES	  (1048576)
+#define BSP_RAM_SIZE_BYTES	  (131072)
+#define BSP_DATA_FLASH_SIZE_BYTES (8192)
+#define BSP_PACKAGE_LQFP
+#define BSP_PACKAGE_PINS (144)
+
+#define BSP_MCU_GROUP_RA4M3 (1)
+#define BSP_LOCO_HZ	    (32768)
+#define BSP_MOCO_HZ	    (8000000)
+#define BSP_SUB_CLOCK_HZ    (32768)
+#if BSP_CFG_HOCO_FREQUENCY == 0
+#define BSP_HOCO_HZ (16000000)
+#elif BSP_CFG_HOCO_FREQUENCY == 1
+#define BSP_HOCO_HZ (18000000)
+#elif BSP_CFG_HOCO_FREQUENCY == 2
+#define BSP_HOCO_HZ (20000000)
+#else
+#error "Invalid HOCO frequency chosen (BSP_CFG_HOCO_FREQUENCY) in bsp_clock_cfg.h"
+#endif
+
+#define BSP_CFG_FLL_ENABLE (0)
+
+#define BSP_CORTEX_VECTOR_TABLE_ENTRIES (16U)
+#define BSP_VECTOR_TABLE_MAX_ENTRIES	(112U)
+#define BSP_MCU_VBATT_SUPPORT		(1)
+
+#if defined(_RA_TZ_SECURE)
+#define BSP_TZ_SECURE_BUILD    (1)
+#define BSP_TZ_NONSECURE_BUILD (0)
+#elif defined(_RA_TZ_NONSECURE)
+#define BSP_TZ_SECURE_BUILD    (0)
+#define BSP_TZ_NONSECURE_BUILD (1)
+#else
+#define BSP_TZ_SECURE_BUILD    (0)
+#define BSP_TZ_NONSECURE_BUILD (0)
+#endif
+
+/* TrustZone Settings */
+#define BSP_TZ_CFG_INIT_SECURE_ONLY   (BSP_CFG_CLOCKS_SECURE || (!BSP_CFG_CLOCKS_OVERRIDE))
+#define BSP_TZ_CFG_SKIP_INIT	      (BSP_TZ_NONSECURE_BUILD && BSP_TZ_CFG_INIT_SECURE_ONLY)
+#define BSP_TZ_CFG_EXCEPTION_RESPONSE (0)
+
+/* CMSIS TrustZone Settings */
+#define SCB_CSR_AIRCR_INIT	   (1)
+#define SCB_AIRCR_BFHFNMINS_VAL	   (0)
+#define SCB_AIRCR_SYSRESETREQS_VAL (1)
+#define SCB_AIRCR_PRIS_VAL	   (0)
+#define TZ_FPU_NS_USAGE		   (1)
+#define SCB_NSACR_CP10_11_VAL	   (3U)
+
+#define FPU_FPCCR_TS_VAL	(1U)
+#define FPU_FPCCR_CLRONRETS_VAL (1)
+
+#define FPU_FPCCR_CLRONRET_VAL (1)
+
+/* The C-Cache line size that is configured during startup. */
+#define BSP_CFG_C_CACHE_LINE_SIZE (1U)
+
+/* Type 1 Peripheral Security Attribution */
+
+/* Peripheral Security Attribution Register (PSAR) Settings */
+#define BSP_TZ_CFG_PSARB                                                                                             \
+	((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CAN1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* CAN0 */ |   \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* IIC1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9) /* IIC0 */ |   \
+	 (((1 > 0) ? 0U : 1U) << 11) /* USBFS */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 18) /* SPI1 */ |             \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 19) /* SPI0 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* SCI9 */ | \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* SCI8 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* SCI7 */ | \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 25) /* SCI6 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* SCI5 */ | \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* SCI4 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 28) /* SCI3 */ | \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* SCI2 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 30) /* SCI1 */ | \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCI0 */ | 0x33f4f9) /* Unused */
+#define BSP_TZ_CFG_PSARC                                                                                             \
+	((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* CAC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CRC */ |     \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* CTSU */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* SSIE0 */ |  \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* SDHI0 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* DOC */ | \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCE9 */ | 0x7fffcef4) /* Unused */
+#define BSP_TZ_CFG_PSARD                                                                                               \
+	((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* AGT3 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* AGT2 */ |     \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* AGT1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* AGT0 */ |     \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 11) /* POEG3 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* POEG2 */ | \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* POEG1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* POEG0 */ | \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* ADC1 */ | (((1 > 0) ? 0U : 1U) << 16) /* ADC0 */ |                \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 20) /* DAC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* TSN */ |     \
+	 0xffae07f0) /* Unused */
+#define BSP_TZ_CFG_PSARE                                                                                             \
+	((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* WDT */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* IWDT */ |    \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* RTC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* AGT5 */ |   \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* AGT4 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* GPT9 */ | \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* GPT8 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* GPT7 */ | \
+	 (((1 > 0) ? 0U : 1U) << 25) /* GPT6 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* GPT5 */ |              \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* GPT4 */ | (((1 > 0) ? 0U : 1U) << 28) /* GPT3 */ |              \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* GPT2 */ | (((1 > 0) ? 0U : 1U) << 30) /* GPT1 */ |              \
+	 (((1 > 0) ? 0U : 1U) << 31) /* GPT0 */ | 0x3f3ff8) /* Unused */
+#define BSP_TZ_CFG_MSSAR                                                                                              \
+	((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* ELC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* DTC_DMAC */ | \
+	 0xfffffffc) /* Unused */
+
+/* Type 2 Peripheral Security Attribution */
+
+/* Security attribution for Cache registers. */
+#define BSP_TZ_CFG_CSAR (0xFFFFFFFFU)
+
+/* Security attribution for RSTSRn registers. */
+#define BSP_TZ_CFG_RSTSAR (0xFFFFFFFFU)
+
+/* Security attribution for registers of LVD channels. */
+#define BSP_TZ_CFG_LVDSAR                                              \
+	((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) | /* LVD Channel 1 */ \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) | /* LVD Channel 2 */ \
+	 0xFFFFFFFCU)
+
+/* Security attribution for LPM registers. */
+#define BSP_TZ_CFG_LPMSAR ((RA_NOT_DEFINED > 0) ? 0xFFFFFCEAU : 0xFFFFFFFFU)
+/* Deep Standby Interrupt Factor Security Attribution Register. */
+#define BSP_TZ_CFG_DPFSAR ((RA_NOT_DEFINED > 0) ? 0xF2E00000U : 0xFFFFFFFFU)
+
+/* Security attribution for CGC registers. */
+#if BSP_CFG_CLOCKS_SECURE
+/* Protect all CGC registers from Non-secure write access. */
+#define BSP_TZ_CFG_CGFSAR (0xFFFCE402U)
+#else
+/* Allow Secure and Non-secure write access. */
+#define BSP_TZ_CFG_CGFSAR (0xFFFFFFFFU)
+#endif
+
+/* Security attribution for Battery Backup registers. */
+#define BSP_TZ_CFG_BBFSAR (0x00FFFFFF)
+
+/* Security attribution for registers for IRQ channels. */
+#define BSP_TZ_CFG_ICUSARA                                                                                                    \
+	((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* External IRQ0 */ |                                                       \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* External IRQ1 */ |                                                       \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* External IRQ2 */ |                                                       \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* External IRQ3 */ |                                                       \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* External IRQ4 */ |                                                       \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* External IRQ5 */ |                                                       \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* External IRQ6 */ |                                                       \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* External IRQ7 */ |                                                       \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8U) /* External IRQ8 */ |                                                       \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9U) /* External IRQ9 */ | (((1 > 0) ? 0U : 1U) << 10U) /* External IRQ10 */ |   \
+	 (((1 > 0) ? 0U : 1U) << 11U) /* External IRQ11 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12U) /* External IRQ12 */ | \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13U) /* External IRQ13 */ |                                                     \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14U) /* External IRQ14 */ |                                                     \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15U) /* External IRQ15 */ | 0xFFFF0000U)
+
+/* Security attribution for NMI registers. */
+#define BSP_TZ_CFG_ICUSARB (0 | 0xFFFFFFFEU) /* Should match AIRCR.BFHFNMINS. */
+
+/* Security attribution for registers for DMAC channels */
+#define BSP_TZ_CFG_ICUSARC                                               \
+	((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* DMAC Channel 0 */ | \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* DMAC Channel 1 */ | \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* DMAC Channel 2 */ | \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* DMAC Channel 3 */ | \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* DMAC Channel 4 */ | \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* DMAC Channel 5 */ | \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* DMAC Channel 6 */ | \
+	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* DMAC Channel 7 */ | 0xFFFFFF00U)
+
+/* Security attribution registers for SELSR0. */
+#define BSP_TZ_CFG_ICUSARD ((RA_NOT_DEFINED > 0) ? 0xFFFFFFFEU : 0xFFFFFFFFU)
+
+/* Security attribution registers for WUPEN0. */
+#define BSP_TZ_CFG_ICUSARE ((RA_NOT_DEFINED > 0) ? 0x04F2FFFFU : 0xFFFFFFFFU)
+
+/* Security attribution registers for WUPEN1. */
+#define BSP_TZ_CFG_ICUSARF ((RA_NOT_DEFINED > 0) ? 0xFFFFFFF8U : 0xFFFFFFFFU)
+
+/* Set DTCSTSAR if the Secure program uses the DTC. */
+// #if RA_NOT_DEFINED == RA_NOT_DEFINED
+#define BSP_TZ_CFG_DTC_USED (0U)
+// #else
+// #define BSP_TZ_CFG_DTC_USED (1U)
+// #endif
+
+/* Security attribution of FLWT and FCKMHZ registers. */
+/* If the CGC registers are only accessible in Secure mode, than there is no
+ * reason for nonsecure applications to access FLWT and FCKMHZ. */
+#if BSP_CFG_CLOCKS_SECURE
+/* Protect FLWT and FCKMHZ registers from nonsecure write access. */
+#define BSP_TZ_CFG_FSAR (0xFEFEU)
+#else
+/* Allow Secure and Non-secure write access. */
+#define BSP_TZ_CFG_FSAR (0xFFFFU)
+#endif
+
+/* Security attribution for SRAM registers. */
+/* If the CGC registers are only accessible in Secure mode, than there is no
+ * reason for Non Secure applications to access
+ * SRAM0WTEN and therefore there is no reason to access PRCR2. */
+#define BSP_TZ_CFG_SRAMSAR (1 | ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 1U) : 0U) | 4 | 0xFFFFFFF8U)
+
+/* Security attribution for Standby RAM registers. */
+#define BSP_TZ_CFG_STBRAMSAR (0 | 0xFFFFFFF0U)
+
+/* Security attribution for the DMAC Bus Master MPU settings. */
+/* The DMAC Bus Master MPU settings should align with the DMAC channel settings.
+ */
+#define BSP_TZ_CFG_MMPUSARA (BSP_TZ_CFG_ICUSARC)
+
+/* Security Attribution Register A for BUS Control registers. */
+#define BSP_TZ_CFG_BUSSARA (0xFFFFFFFFU)
+/* Security Attribution Register B for BUS Control registers. */
+#define BSP_TZ_CFG_BUSSARB (0xFFFFFFFFU)
+
+#define OFS_SEQ1	     0xA001A001 | (1 << 1) | (3 << 2)
+#define OFS_SEQ2	     (15 << 4) | (3 << 8) | (3 << 10)
+#define OFS_SEQ3	     (1 << 12) | (1 << 14) | (1 << 17)
+#define OFS_SEQ4	     (3 << 18) | (15 << 20) | (3 << 24) | (3 << 26)
+#define OFS_SEQ5	     (1 << 28) | (1 << 30)
+#define BSP_CFG_ROM_REG_OFS0 (OFS_SEQ1 | OFS_SEQ2 | OFS_SEQ3 | OFS_SEQ4 | OFS_SEQ5)
+
+/* Option Function Select Register 1 Security Attribution */
+#if defined(_RA_TZ_SECURE) || defined(_RA_TZ_NONSECURE)
+#define BSP_CFG_ROM_REG_OFS1_SEL \
+	(0xFFFFF8F8U | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0x700U : 0U) | ((RA_NOT_DEFINED > 0) ? 0U : 0x7U))
+#else
+#define BSP_CFG_ROM_REG_OFS1_SEL (0xFFFFF8F8U)
+#endif
+
+#define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (3) | (1 << 8))
+
+/* Used to create IELS values for the interrupt initialization table
+ * g_interrupt_event_link_select. */
+#define BSP_PRV_IELS_ENUM(vector) (ELC_##vector)
+/* Dual Mode Select Register */
+#define BSP_CFG_ROM_REG_DUALSEL (0xFFFFFFFFU)
+/* Block Protection Register 0 */
+#define BSP_CFG_ROM_REG_BPS0 (~(0U))
+/* Block Protection Register 1 */
+#define BSP_CFG_ROM_REG_BPS1 (~(0U))
+/* Block Protection Register 2 */
+#define BSP_CFG_ROM_REG_BPS2 (0xFFFFFFFFU)
+/* Permanent Block Protection Register 0 */
+#define BSP_CFG_ROM_REG_PBPS0 (~(0U))
+/* Permanent Block Protection Register 1 */
+#define BSP_CFG_ROM_REG_PBPS1 (~(0U))
+/* Permanent Block Protection Register 2 */
+#define BSP_CFG_ROM_REG_PBPS2 (0xFFFFFFFFU)
+/* Security Attribution for Block Protection Register 0 (If any blocks are
+ * marked as protected in the secure application, then mark them as secure) */
+#define BSP_CFG_ROM_REG_BPS_SEL0 (BSP_CFG_ROM_REG_BPS0 & BSP_CFG_ROM_REG_PBPS0)
+/* Security Attribution for Block Protection Register 1 (If any blocks are
+ * marked as protected in the secure application, then mark them as secure) */
+#define BSP_CFG_ROM_REG_BPS_SEL1 (BSP_CFG_ROM_REG_BPS1 & BSP_CFG_ROM_REG_PBPS1)
+/* Security Attribution for Block Protection Register 2 (If any blocks are
+ * marked as protected in the secure application, then mark them as secure) */
+#define BSP_CFG_ROM_REG_BPS_SEL2    (0xFFFFFFFFU)
+#define BSP_CLOCK_CFG_MAIN_OSC_WAIT (9)
+
+#endif /* BSP_MCU_FAMILY_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/r_ioport_cfg.h b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/r_ioport_cfg.h
new file mode 100755
index 000000000..cb7c07932
--- /dev/null
+++ b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/r_ioport_cfg.h
@@ -0,0 +1,7 @@
+/* generated configuration header file - do not edit */
+#ifndef R_IOPORT_CFG_H_
+#define R_IOPORT_CFG_H_
+
+#define IOPORT_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
+
+#endif /* R_IOPORT_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/vector_data.h b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/vector_data.h
new file mode 100644
index 000000000..37739c12a
--- /dev/null
+++ b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/vector_data.h
@@ -0,0 +1,5 @@
+/* vector numbers are configurable/dynamic, hence this, it will be used inside the port */
+#define TU_IRQn 0
+#define USBFS_RESUME_IRQn 1
+#define USBFS_FIFO_0_IRQn 2
+#define USBFS_FIFO_1_IRQn 3
diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk
new file mode 100644
index 000000000..6b7f43345
--- /dev/null
+++ b/hw/bsp/ra/family.mk
@@ -0,0 +1,55 @@
+DEPS_SUBMODULES += hw/mcu/renesas/fsp lib/CMSIS_5
+
+# Cross Compiler for RA
+CROSS_COMPILE = arm-none-eabi-
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+CFLAGS += \
+	-Wno-error=undef \
+	-Wno-error=strict-prototypes \
+	-Wno-error=cast-align \
+	-Wno-error=cast-qual \
+	-Wno-error=unused-but-set-variable \
+	-Wno-error=unused-variable \
+	-mthumb \
+	-nostdlib \
+	-nostartfiles \
+	-ffunction-sections \
+	-fdata-sections \
+	-ffreestanding
+
+SRC_C += \
+	src/portable/renesas/link/dcd_link.c \
+	src/portable/renesas/link/hcd_link.c \
+	hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c \
+	hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c \
+	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_clocks.c \
+	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_common.c \
+	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_delay.c \
+	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_group_irq.c \
+	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_guard.c \
+	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_io.c \
+	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_irq.c \
+	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_register_protection.c \
+	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c \
+	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_sbrk.c \
+	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_security.c \
+	hw/mcu/renesas/fsp/ra/fsp/src/r_ioport/r_ioport.c \
+	$(FSP_BOARD_DIR)/board_init.c \
+	$(FSP_BOARD_DIR)/board_leds.c
+
+INC += \
+  	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
+	$(TOP)/hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/$(BOARD_PATH)/fsp_cfg \
+	$(TOP)/hw/mcu/renesas/fsp/ra/fsp/inc \
+	$(TOP)/hw/mcu/renesas/fsp/ra/fsp/inc/api \
+	$(TOP)/hw/mcu/renesas/fsp/ra/fsp/inc/instances \
+	$(TOP)/$(FSP_MCU_DIR) \
+	$(TOP)/$(FSP_BOARD_DIR)
+
+# For freeRTOS port source
+# hack to use the port provided by renesas
+FREERTOS_PORT = hw/mcu/renesas/fsp/ra/fsp/src/rm_freertos_port

From e7027efe7a53fcc3eb383750b8837c91d1d2d31d Mon Sep 17 00:00:00 2001
From: Rafael Silva <rafaelsilva@ajtec.pt>
Date: Wed, 9 Mar 2022 14:12:01 +0000
Subject: [PATCH 009/691] add contributions to docs

Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
---
 CONTRIBUTORS.rst | 1 +
 1 file changed, 1 insertion(+)

diff --git a/CONTRIBUTORS.rst b/CONTRIBUTORS.rst
index 5726169f8..50a33ae33 100644
--- a/CONTRIBUTORS.rst
+++ b/CONTRIBUTORS.rst
@@ -119,6 +119,7 @@ Notable contributors
 
 -  Port DCD Synopsys to support Silabs EFM32GG12 with SLTB009A board
 -  Rewrite documentation in rst and setup for readthedocs
+-  Generalize Renesas driver and support RA family with EK-RA4M3 board
 
 
 `Raspberry Pi Team <https://github.com/raspberrypi>`__

From c529d0b4405aa33b4793d03ce82568990c3f507c Mon Sep 17 00:00:00 2001
From: Rafael Silva <rafaelsilva@ajtec.pt>
Date: Wed, 9 Mar 2022 15:55:35 +0000
Subject: [PATCH 010/691] remove duplicate link register bit macros

Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
---
 src/portable/renesas/link/dcd_link.c  | 108 +++++++++++++-------------
 src/portable/renesas/link/hcd_link.c  |  98 +++++++++++------------
 src/portable/renesas/link/link_type.h |  98 ++++++++---------------
 3 files changed, 136 insertions(+), 168 deletions(-)

diff --git a/src/portable/renesas/link/dcd_link.c b/src/portable/renesas/link/dcd_link.c
index 19fbfe293..f2334140a 100644
--- a/src/portable/renesas/link/dcd_link.c
+++ b/src/portable/renesas/link/dcd_link.c
@@ -32,7 +32,7 @@
 #define USE_SOF     0
 
 #if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N || \
-			CFG_TUSB_MCU == OPT_MCU_RAXXX)
+      CFG_TUSB_MCU == OPT_MCU_RAXXX)
 
 #include "device/dcd.h"
 #include "link_type.h"
@@ -245,7 +245,7 @@ static bool pipe0_xfer_in(void)
     }
   }
   if (len < mps)
-    LINK_REG->CFIFOCTR = USB_FIFOCTR_BVAL;
+    LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
   pipe->remaining = rem - len;
   return false;
 }
@@ -268,7 +268,7 @@ static bool pipe0_xfer_out(void)
     }
   }
   if (len < mps)
-    LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR;
+    LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
   pipe->remaining = rem - len;
   if ((len < mps) || (rem == len)) {
     pipe->buf = NULL;
@@ -287,7 +287,7 @@ static bool pipe_xfer_in(unsigned num)
     return true;
   }
 
-  LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
+  LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_16BIT | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0);
   const unsigned mps  = edpt_max_packet_size(num);
   pipe_wait_for_ready(num);
   const unsigned len  = TU_MIN(rem, mps);
@@ -301,7 +301,7 @@ static bool pipe_xfer_in(unsigned num)
     }
   }
   if (len < mps)
-    LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL;
+    LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
   LINK_REG->D0FIFOSEL = 0;
   while (LINK_REG->D0FIFOSEL_b.CURPIPE) continue; /* if CURPIPE bits changes, check written value */
   pipe->remaining = rem - len;
@@ -313,7 +313,7 @@ static bool pipe_xfer_out(unsigned num)
   pipe_state_t  *pipe = &_dcd.pipe[num];
   const unsigned rem  = pipe->remaining;
 
-  LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_8;
+  LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_8BIT;
   const unsigned mps  = edpt_max_packet_size(num);
   pipe_wait_for_ready(num);
   const unsigned vld  = LINK_REG->D0FIFOCTR_b.DTLN;
@@ -328,7 +328,7 @@ static bool pipe_xfer_out(unsigned num)
     }
   }
   if (len < mps)
-    LINK_REG->D0FIFOCTR = USB_FIFOCTR_BCLR;
+    LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
   LINK_REG->D0FIFOSEL = 0;
   while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
   pipe->remaining = rem - len;
@@ -342,13 +342,13 @@ static bool pipe_xfer_out(unsigned num)
 static void process_setup_packet(uint8_t rhport)
 {
   uint16_t setup_packet[4];
-  if (0 == (LINK_REG->INTSTS0 & USB_IS0_VALID)) return;
-  LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR;
+  if (0 == (LINK_REG->INTSTS0 & LINK_REG_INTSTS0_VALID_Msk)) return;
+  LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
   setup_packet[0] = tu_le16toh(LINK_REG->USBREQ);
   setup_packet[1] = LINK_REG->USBVAL;
   setup_packet[2] = LINK_REG->USBINDX;
   setup_packet[3] = LINK_REG->USBLENG;
-  LINK_REG->INTSTS0 = ~USB_IS0_VALID;
+  LINK_REG->INTSTS0 = ~((uint16_t)LINK_REG_INTSTS0_VALID_Msk);
   dcd_event_setup_received(rhport, (const uint8_t*)&setup_packet[0], true);
 }
 
@@ -356,7 +356,7 @@ static void process_status_completion(uint8_t rhport)
 {
   uint8_t ep_addr;
   /* Check the data stage direction */
-  if (LINK_REG->CFIFOSEL & USB_FIFOSEL_TX) {
+  if (LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE) {
     /* IN transfer. */
     ep_addr = tu_edpt_addr(0, TUSB_DIR_IN);
   } else {
@@ -370,12 +370,12 @@ static bool process_pipe0_xfer(int buffer_type, uint8_t ep_addr, void* buffer, u
 {
   /* configure fifo direction and access unit settings */
   if (ep_addr) { /* IN, 2 bytes */
-    LINK_REG->CFIFOSEL =
-      USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
-    while (!(LINK_REG->CFIFOSEL & USB_FIFOSEL_TX)) ;
+    LINK_REG->CFIFOSEL = LINK_REG_CFIFOSEL_ISEL_WRITE | LINK_REG_FIFOSEL_MBW_16BIT |
+             (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0);
+    while (!(LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE)) ;
   } else { /* OUT, a byte */
-    LINK_REG->CFIFOSEL = USB_FIFOSEL_MBW_8;
-    while (LINK_REG->CFIFOSEL & USB_FIFOSEL_TX) ;
+    LINK_REG->CFIFOSEL = LINK_REG_FIFOSEL_MBW_8BIT;
+    while (LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE) ;
   }
 
   pipe_state_t *pipe = &_dcd.pipe[0];
@@ -388,11 +388,11 @@ static bool process_pipe0_xfer(int buffer_type, uint8_t ep_addr, void* buffer, u
       TU_ASSERT(LINK_REG->DCPCTR_b.BSTS && (LINK_REG->USBREQ & 0x80));
       pipe0_xfer_in();
     }
-    LINK_REG->DCPCTR = USB_PIPECTR_PID_BUF;
+    LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_BUF;
   } else {
     /* ZLP */
     pipe->buf        = NULL;
-    LINK_REG->DCPCTR = USB_PIPECTR_CCPL | USB_PIPECTR_PID_BUF;
+    LINK_REG->DCPCTR = LINK_REG_DCPCTR_CCPL_Msk | LINK_REG_PIPE_CTR_PID_BUF;
   }
   return true;
 }
@@ -416,7 +416,7 @@ static bool process_pipe_xfer(int buffer_type, uint8_t ep_addr, void* buffer, ui
     } else { /* ZLP */
       LINK_REG->D0FIFOSEL = num;
       pipe_wait_for_ready(num);
-      LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL;
+      LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
       LINK_REG->D0FIFOSEL = 0;
       while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
     }
@@ -429,11 +429,11 @@ static bool process_pipe_xfer(int buffer_type, uint8_t ep_addr, void* buffer, ui
     if (pt) {
       const unsigned     mps = edpt_max_packet_size(num);
       volatile uint16_t *ctr = get_pipectr(num);
-      if (*ctr & 0x3) *ctr = USB_PIPECTR_PID_NAK;
+      if (*ctr & 0x3) *ctr = LINK_REG_PIPE_CTR_PID_NAK;
       pt->TRE   = TU_BIT(8);
       pt->TRN   = (total_bytes + mps - 1) / mps;
       pt->TRENB = 1;
-      *ctr = USB_PIPECTR_PID_BUF;
+      *ctr = LINK_REG_PIPE_CTR_PID_BUF;
     }
   }
   //  TU_LOG1("X %x %d %d\r\n", ep_addr, total_bytes, buffer_type);
@@ -487,7 +487,7 @@ static void process_bus_reset(uint8_t rhport)
 {
   LINK_REG->BEMPENB = 1;
   LINK_REG->BRDYENB = 1;
-  LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR;
+  LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
   LINK_REG->D0FIFOSEL = 0;
   while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
   LINK_REG->D1FIFOSEL = 0;
@@ -497,7 +497,7 @@ static void process_bus_reset(uint8_t rhport)
   for (int i = 1; i <= 5; ++i) {
     LINK_REG->PIPESEL = i;
     LINK_REG->PIPECFG = 0;
-    *ctr = USB_PIPECTR_ACLRM;
+    *ctr = LINK_REG_PIPE_CTR_ACLRM_Msk;
     *ctr = 0;
     ++ctr;
     *tre = TU_BIT(8);
@@ -506,7 +506,7 @@ static void process_bus_reset(uint8_t rhport)
   for (int i = 6; i <= 9; ++i) {
     LINK_REG->PIPESEL = i;
     LINK_REG->PIPECFG = 0;
-    *ctr = USB_PIPECTR_ACLRM;
+    *ctr = LINK_REG_PIPE_CTR_ACLRM_Msk;
     *ctr = 0;
     ++ctr;
   }
@@ -553,8 +553,9 @@ void dcd_init(uint8_t rhport)
 
   /* Setup default control pipe */
   LINK_REG->DCPMAXP_b.MXPS = 64;
-  LINK_REG->INTENB0 = USB_IS0_VBINT | USB_IS0_BRDY | USB_IS0_BEMP | USB_IS0_DVST | USB_IS0_CTRT |
-          (USE_SOF ? USB_IS0_SOFR : 0) | USB_IS0_RESM;
+  LINK_REG->INTENB0 = LINK_REG_INTSTS0_VBINT_Msk | LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk |
+          LINK_REG_INTSTS0_DVST_Msk | LINK_REG_INTSTS0_CTRT_Msk | (USE_SOF ? LINK_REG_INTSTS0_SOFR_Msk : 0) |
+          LINK_REG_INTSTS0_RESM_Msk;
   LINK_REG->BEMPENB = 1;
   LINK_REG->BRDYENB = 1;
 
@@ -633,21 +634,21 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   LINK_REG->PIPESEL = num;
   LINK_REG->PIPEMAXP = mps;
   volatile uint16_t *ctr = get_pipectr(num);
-  *ctr = USB_PIPECTR_ACLRM | USB_PIPECTR_SQCLR;
+  *ctr = LINK_REG_PIPE_CTR_ACLRM_Msk | LINK_REG_PIPE_CTR_SQCLR_Msk;
   *ctr = 0;
   unsigned cfg = (dir << 4) | epn;
   if (xfer == TUSB_XFER_BULK) {
-    cfg |= (USB_PIPECFG_BULK | USB_PIPECFG_SHTNAK | USB_PIPECFG_DBLB);
+    cfg |= (LINK_REG_PIPECFG_TYPE_BULK | LINK_REG_PIPECFG_SHTNAK_Msk | LINK_REG_PIPECFG_DBLB_Msk);
   } else if (xfer == TUSB_XFER_INTERRUPT) {
-    cfg |= USB_PIPECFG_INT;
+    cfg |= LINK_REG_PIPECFG_TYPE_ISO;
   } else {
-    cfg |= (USB_PIPECFG_ISO | USB_PIPECFG_DBLB);
+    cfg |= (LINK_REG_PIPECFG_TYPE_INT | LINK_REG_PIPECFG_DBLB_Msk);
   }
   LINK_REG->PIPECFG = cfg;
   LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num);
   LINK_REG->BRDYENB |= TU_BIT(num);
   if (dir || (xfer != TUSB_XFER_BULK)) {
-    *ctr = USB_PIPECTR_PID_BUF;
+    *ctr = LINK_REG_PIPE_CTR_PID_BUF;
   }
   // TU_LOG1("O %d %x %x\r\n", LINK_REG->PIPESEL, LINK_REG->PIPECFG, LINK_REG->PIPEMAXP);
   dcd_int_enable(rhport);
@@ -709,8 +710,8 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
   if (!ctr) return;
   dcd_int_disable(rhport);
   const uint32_t pid = *ctr & 0x3;
-  *ctr = pid | USB_PIPECTR_PID_STALL;
-  *ctr = USB_PIPECTR_PID_STALL;
+  *ctr = pid | LINK_REG_PIPE_CTR_PID_STALL;
+  *ctr = LINK_REG_PIPE_CTR_PID_STALL;
   dcd_int_enable(rhport);
 }
 
@@ -719,15 +720,15 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
   volatile uint16_t *ctr = ep_addr_to_pipectr(rhport, ep_addr);
   if (!ctr) return;
   dcd_int_disable(rhport);
-  *ctr = USB_PIPECTR_SQCLR;
+  *ctr = LINK_REG_PIPE_CTR_SQCLR_Msk;
 
   if (tu_edpt_dir(ep_addr)) { /* IN */
-    *ctr = USB_PIPECTR_PID_BUF;
+    *ctr = LINK_REG_PIPE_CTR_PID_BUF;
   } else {
     const unsigned num = _dcd.ep[0][tu_edpt_number(ep_addr)];
     LINK_REG->PIPESEL = num;
     if (LINK_REG->PIPECFG_b.TYPE != 1) {
-      *ctr = USB_PIPECTR_PID_BUF;
+      *ctr = LINK_REG_PIPE_CTR_PID_BUF;
     }
   }
   dcd_int_enable(rhport);
@@ -742,39 +743,40 @@ void dcd_int_handler(uint8_t rhport)
 
   unsigned is0 = LINK_REG->INTSTS0;
   /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */
-  LINK_REG->INTSTS0 = ~((USB_IS0_CTRT | USB_IS0_DVST | USB_IS0_SOFR | USB_IS0_RESM | USB_IS0_VBINT) & is0) | USB_IS0_VALID;
-  if (is0 & USB_IS0_VBINT) {
+  LINK_REG->INTSTS0 = ~((LINK_REG_INTSTS0_CTRT_Msk | LINK_REG_INTSTS0_DVST_Msk | LINK_REG_INTSTS0_SOFR_Msk |
+                         LINK_REG_INTSTS0_RESM_Msk | LINK_REG_INTSTS0_VBINT_Msk) & is0) | LINK_REG_INTSTS0_VALID_Msk;
+  if (is0 & LINK_REG_INTSTS0_VBINT_Msk) {
     if (LINK_REG->INTSTS0_b.VBSTS) {
       dcd_connect(rhport);
     } else {
       dcd_disconnect(rhport);
     }
   }
-  if (is0 & USB_IS0_RESM) {
+  if (is0 & LINK_REG_INTSTS0_RESM_Msk) {
     dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true);
 #if (0==USE_SOF)
     LINK_REG->INTENB0_b.SOFE = 0;
 #endif
   }
-  if ((is0 & USB_IS0_SOFR) && LINK_REG->INTENB0_b.SOFE) {
+  if ((is0 & LINK_REG_INTSTS0_SOFR_Msk) && LINK_REG->INTENB0_b.SOFE) {
     // USBD will exit suspended mode when SOF event is received
     dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true);
 #if (0 == USE_SOF)
     LINK_REG->INTENB0_b.SOFE = 0;
 #endif
   }
-  if (is0 & USB_IS0_DVST) {
-    switch (is0 & USB_IS0_DVSQ) {
-    case USB_IS0_DVSQ_DEF:
+  if (is0 & LINK_REG_INTSTS0_DVST_Msk) {
+    switch (is0 & LINK_REG_INTSTS0_DVSQ_Msk) {
+    case LINK_REG_INTSTS0_DVSQ_STATE_DEF:
       process_bus_reset(rhport);
       break;
-    case USB_IS0_DVSQ_ADDR:
+    case LINK_REG_INTSTS0_DVSQ_STATE_ADDR:
       process_set_address(rhport);
       break;
-    case USB_IS0_DVSQ_SUSP0:
-    case USB_IS0_DVSQ_SUSP1:
-    case USB_IS0_DVSQ_SUSP2:
-    case USB_IS0_DVSQ_SUSP3:
+    case LINK_REG_INTSTS0_DVSQ_STATE_SUSP0:
+    case LINK_REG_INTSTS0_DVSQ_STATE_SUSP1:
+    case LINK_REG_INTSTS0_DVSQ_STATE_SUSP2:
+    case LINK_REG_INTSTS0_DVSQ_STATE_SUSP3:
        dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true);
 #if (0==USE_SOF)
       LINK_REG->INTENB0_b.SOFE = 1;
@@ -783,23 +785,23 @@ void dcd_int_handler(uint8_t rhport)
       break;
     }
   }
-  if (is0 & USB_IS0_CTRT) {
-    if (is0 & USB_IS0_CTSQ_SETUP) {
+  if (is0 & LINK_REG_INTSTS0_CTRT_Msk) {
+    if (is0 & LINK_REG_INTSTS0_CTSQ_CTRL_RDATA) {
       /* A setup packet has been received. */
       process_setup_packet(rhport);
-    } else if (0 == (is0 & USB_IS0_CTSQ_MSK)) {
+    } else if (0 == (is0 & LINK_REG_INTSTS0_CTSQ_Msk)) {
       /* A ZLP has been sent/received. */
       process_status_completion(rhport);
     }
   }
-  if (is0 & USB_IS0_BEMP) {
+  if (is0 & LINK_REG_INTSTS0_BEMP_Msk) {
     const unsigned s = LINK_REG->BEMPSTS;
     LINK_REG->BEMPSTS = 0;
     if (s & 1) {
       process_pipe0_bemp(rhport);
     }
   }
-  if (is0 & USB_IS0_BRDY) {
+  if (is0 & LINK_REG_INTSTS0_BRDY_Msk) {
     const unsigned m = LINK_REG->BRDYENB;
     unsigned s = LINK_REG->BRDYSTS & m;
     /* clear active bits (don't write 0 to already cleared bits according to the HW manual) */
diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/link/hcd_link.c
index 2ada28105..940013c86 100644
--- a/src/portable/renesas/link/hcd_link.c
+++ b/src/portable/renesas/link/hcd_link.c
@@ -207,18 +207,18 @@ static bool pipe0_xfer_in(void)
   const unsigned len = TU_MIN(TU_MIN(rem, mps), vld);
   void          *buf = pipe->buf;
   if (len) {
-    LINK_REG->DCPCTR = USB_PIPECTR_PID_NAK;
+    LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK;
     pipe_read_packet(buf, (volatile void*)&LINK_REG->CFIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
   if (len < mps)
-    LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR;
+    LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
   pipe->remaining = rem - len;
   if ((len < mps) || (rem == len)) {
     pipe->buf = NULL;
     return true;
   }
-  LINK_REG->DCPCTR = USB_PIPECTR_PID_BUF;
+  LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_BUF;
   return false;
 }
 
@@ -238,7 +238,7 @@ static bool pipe0_xfer_out(void)
     pipe->buf = (uint8_t*)buf + len;
   }
   if (len < mps)
-    LINK_REG->CFIFOCTR = USB_FIFOCTR_BVAL;
+    LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
   pipe->remaining = rem - len;
   return false;
 }
@@ -248,7 +248,7 @@ static bool pipe_xfer_in(unsigned num)
   pipe_state_t  *pipe = &_hcd.pipe[num];
   const unsigned rem  = pipe->remaining;
 
-  LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_8;
+  LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_8BIT;
   const unsigned mps  = edpt_max_packet_size(num);
   pipe_wait_for_ready(num);
   const unsigned vld  = LINK_REG->D0FIFOCTR_b.DTLN;
@@ -259,7 +259,7 @@ static bool pipe_xfer_in(unsigned num)
     pipe->buf = (uint8_t*)buf + len;
   }
   if (len < mps)
-    LINK_REG->D0FIFOCTR = USB_FIFOCTR_BCLR;
+    LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
   LINK_REG->D0FIFOSEL = 0;
   while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
   pipe->remaining = rem - len;
@@ -280,7 +280,7 @@ static bool pipe_xfer_out(unsigned num)
     return true;
   }
 
-  LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
+  LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_16BIT | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0);
   const unsigned mps  = edpt_max_packet_size(num);
   pipe_wait_for_ready(num);
   const unsigned len  = TU_MIN(rem, mps);
@@ -290,7 +290,7 @@ static bool pipe_xfer_out(unsigned num)
     pipe->buf = (uint8_t*)buf + len;
   }
   if (len < mps)
-    LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL;
+    LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
   LINK_REG->D0FIFOSEL = 0;
   while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
   pipe->remaining = rem - len;
@@ -304,12 +304,12 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer,
 
   /* configure fifo direction and access unit settings */
   if (dir_in) { /* IN, a byte */
-    LINK_REG->CFIFOSEL = USB_FIFOSEL_MBW_8;
-    while (LINK_REG->CFIFOSEL & USB_FIFOSEL_TX) ;
+    LINK_REG->CFIFOSEL = LINK_REG_FIFOSEL_MBW_8BIT;
+    while (LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE) ;
   } else { /* OUT, 2 bytes */
-    LINK_REG->CFIFOSEL =
-      USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
-    while (!(LINK_REG->CFIFOSEL & USB_FIFOSEL_TX)) ;
+    LINK_REG->CFIFOSEL = LINK_REG_CFIFOSEL_ISEL_WRITE | LINK_REG_FIFOSEL_MBW_16BIT |
+             (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0);
+    while (!(LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE)) ;
   }
 
   pipe_state_t *pipe = &_hcd.pipe[0];
@@ -325,15 +325,15 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer,
   } else { /* ZLP */
     pipe->buf        = NULL;
     if (!dir_in) { /* OUT */
-      LINK_REG->CFIFOCTR = USB_FIFOCTR_BVAL;
+      LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
     }
     if (dir_in == LINK_REG->DCPCFG_b.DIR) {
-      TU_ASSERT(USB_PIPECTR_PID_NAK == LINK_REG->DCPCTR_b.PID);
+      TU_ASSERT(LINK_REG_PIPE_CTR_PID_NAK == LINK_REG->DCPCTR_b.PID);
       LINK_REG->DCPCTR_b.SQSET = 1;
       LINK_REG->DCPCFG_b.DIR = dir_in ^ 1;
     }
   }
-  LINK_REG->DCPCTR = USB_PIPECTR_PID_BUF;
+  LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_BUF;
   return true;
 }
 
@@ -355,7 +355,7 @@ static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void *buffer, u
     } else { /* ZLP */
       LINK_REG->D0FIFOSEL = num;
       pipe_wait_for_ready(num);
-      LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL;
+      LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
       LINK_REG->D0FIFOSEL = 0;
       while (LINK_REG->D0FIFOSEL_b.CURPIPE) continue; /* if CURPIPE bits changes, check written value */
     }
@@ -364,12 +364,12 @@ static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void *buffer, u
     volatile reg_pipetre_t *pt = get_pipetre(num);
     if (pt) {
       const unsigned     mps = edpt_max_packet_size(num);
-      if (*ctr & 0x3) *ctr = USB_PIPECTR_PID_NAK;
+      if (*ctr & 0x3) *ctr = LINK_REG_PIPE_CTR_PID_NAK;
       pt->TRE   = TU_BIT(8);
       pt->TRN   = (buflen + mps - 1) / mps;
       pt->TRENB = 1;
     }
-    *ctr = USB_PIPECTR_PID_BUF;
+    *ctr = LINK_REG_PIPE_CTR_PID_BUF;
   }
   return true;
 }
@@ -403,10 +403,10 @@ static void process_pipe_nrdy(uint8_t rhport, unsigned num)
   unsigned result;
   uint16_t volatile *ctr = get_pipectr(num);
   // TU_LOG1("NRDY %d %x\n", num, *ctr);
-  switch (*ctr & USB_PIPECTR_PID_MSK) {
+  switch (*ctr & LINK_REG_PIPE_CTR_PID_Msk) {
     default: return;
-    case USB_PIPECTR_PID_STALL: result = XFER_RESULT_STALLED; break;
-    case USB_PIPECTR_PID_NAK:   result = XFER_RESULT_FAILED;  break;
+    case LINK_REG_PIPE_CTR_PID_STALL: result = XFER_RESULT_STALLED; break;
+    case LINK_REG_PIPE_CTR_PID_NAK:   result = XFER_RESULT_FAILED;  break;
   }
   pipe_state_t *pipe = &_hcd.pipe[num];
   hcd_event_xfer_complete(pipe->dev, pipe->ep,
@@ -464,10 +464,10 @@ bool hcd_init(uint8_t rhport)
   LINK_REG->DPUSR0R_FS_b.FIXPHY0 = 0u; /* Transceiver Output fixed */
 
   /* Setup default control pipe */
-  LINK_REG->DCPCFG = USB_PIPECFG_SHTNAK;
+  LINK_REG->DCPCFG = LINK_REG_PIPECFG_SHTNAK_Msk;
   LINK_REG->DCPMAXP = 64;
-  LINK_REG->INTENB0 = USB_IS0_BRDY | USB_IS0_NRDY | USB_IS0_BEMP;
-  LINK_REG->INTENB1 = USB_IS1_SACK | USB_IS1_SIGN | USB_IS1_ATTCH | USB_IS1_DTCH;
+  LINK_REG->INTENB0 = LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_NRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk;
+  LINK_REG->INTENB1 = LINK_REG_INTSTS1_SACK_Msk | LINK_REG_INTSTS1_SIGN_Msk | LINK_REG_INTSTS1_ATTCH_Msk | LINK_REG_INTSTS1_DTCH_Msk;
   LINK_REG->BEMPENB = 1;
   LINK_REG->NRDYENB = 1;
   LINK_REG->BRDYENB = 1;
@@ -505,7 +505,7 @@ bool hcd_port_connect_status(uint8_t rhport)
 
 void hcd_port_reset(uint8_t rhport)
 {
-  LINK_REG->DCPCTR = USB_PIPECTR_PID_NAK;
+  LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK;
   while (LINK_REG->DCPCTR_b.PBUSY) ;
   hcd_int_disable(rhport);
   LINK_REG->DVSTCTR0_b.UACT = 0;
@@ -530,8 +530,8 @@ tusb_speed_t hcd_port_speed_get(uint8_t rhport)
   (void)rhport;
   switch (LINK_REG->DVSTCTR0_b.RHST) {
     default: return TUSB_SPEED_INVALID;
-    case USB_DVSTCTR0_FULL: return TUSB_SPEED_FULL;
-    case USB_DVSTCTR0_LOW:  return TUSB_SPEED_LOW;
+    case LINK_REG_DVSTCTR0_RHST_FS: return TUSB_SPEED_FULL;
+    case LINK_REG_DVSTCTR0_RHST_LS:  return TUSB_SPEED_LOW;
   }
 }
 
@@ -572,7 +572,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
   TU_ASSERT(dev_addr < 6); /* USBa can only handle addresses from 0 to 5. */
   TU_ASSERT(0 == LINK_REG->DCPCTR_b.SUREQ);
 
-  LINK_REG->DCPCTR = USB_PIPECTR_PID_NAK;
+  LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK;
 
   _hcd.pipe[0].buf = NULL;
   _hcd.pipe[0].length = 8;
@@ -605,14 +605,14 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
   const unsigned epn     = tu_edpt_number(ep_addr);
   const unsigned mps     = tu_edpt_packet_size(ep_desc);
   if (0 == epn) {
-    LINK_REG->DCPCTR = USB_PIPECTR_PID_NAK;
+    LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK;
     hcd_devtree_info_t devtree;
     hcd_devtree_get_info(dev_addr, &devtree);
     uint16_t volatile *devadd = (uint16_t volatile *)(uintptr_t) &LINK_REG->DEVADD[0];
     devadd += dev_addr;
     while (LINK_REG->DCPCTR_b.PBUSY) ;
     LINK_REG->DCPMAXP = (dev_addr << 12) | mps;
-    *devadd = (TUSB_SPEED_FULL == devtree.speed) ? USB_DEVADD_FULL : USB_DEVADD_LOW;
+    *devadd = (TUSB_SPEED_FULL == devtree.speed) ? LINK_REG_DEVADD_USBSPD_FS : LINK_REG_DEVADD_USBSPD_LS;
     _hcd.ctl_mps[dev_addr] = mps;
     return true;
   }
@@ -634,22 +634,22 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
   LINK_REG->PIPESEL = num;
   LINK_REG->PIPEMAXP = (dev_addr << 12) | mps;
   volatile uint16_t *ctr = get_pipectr(num);
-  *ctr = USB_PIPECTR_ACLRM | USB_PIPECTR_SQCLR;
+  *ctr = LINK_REG_PIPE_CTR_ACLRM_Msk | LINK_REG_PIPE_CTR_SQCLR_Msk;
   *ctr = 0;
   unsigned cfg = ((1 ^ dir_in) << 4) | epn;
   if (xfer == TUSB_XFER_BULK) {
-    cfg |= USB_PIPECFG_BULK | USB_PIPECFG_SHTNAK | USB_PIPECFG_DBLB;
+    cfg |= LINK_REG_PIPECFG_TYPE_BULK | LINK_REG_PIPECFG_SHTNAK_Msk | LINK_REG_PIPECFG_DBLB_Msk;
   } else if (xfer == TUSB_XFER_INTERRUPT) {
-    cfg |= USB_PIPECFG_INT;
+    cfg |= LINK_REG_PIPECFG_TYPE_ISO;
   } else {
-    cfg |= USB_PIPECFG_ISO | USB_PIPECFG_DBLB;
+    cfg |= LINK_REG_PIPECFG_TYPE_INT | LINK_REG_PIPECFG_DBLB_Msk;
   }
   LINK_REG->PIPECFG = cfg;
   LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num);
   LINK_REG->NRDYENB |= TU_BIT(num);
   LINK_REG->BRDYENB |= TU_BIT(num);
   if (!dir_in) {
-    *ctr = USB_PIPECTR_PID_BUF;
+    *ctr = LINK_REG_PIPE_CTR_PID_BUF;
   }
   hcd_int_enable(rhport);
 
@@ -676,12 +676,12 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
     *ctr = pid & 2;
     *ctr = 0;
   }
-  *ctr = USB_PIPECTR_SQCLR;
+  *ctr = LINK_REG_PIPE_CTR_SQCLR_Msk;
   unsigned const epn = tu_edpt_number(ep_addr);
   if (!epn) return true;
 
   if (!tu_edpt_dir(ep_addr)) { /* OUT */
-    *ctr = USB_PIPECTR_PID_BUF;
+    *ctr = LINK_REG_PIPE_CTR_PID_BUF;
   }
   return true;
 }
@@ -702,44 +702,44 @@ void hcd_int_handler(uint8_t rhport)
   unsigned is1 = LINK_REG->INTSTS1;
   unsigned is0 = LINK_REG->INTSTS0;
   /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */
-  LINK_REG->INTSTS1 = ~((USB_IS1_SACK | USB_IS1_SIGN | USB_IS1_ATTCH | USB_IS1_DTCH) & is1);
-  LINK_REG->INTSTS0 = ~((USB_IS0_BRDY | USB_IS0_NRDY | USB_IS0_BEMP) & is0);
+  LINK_REG->INTSTS1 = ~((LINK_REG_INTSTS1_SACK_Msk | LINK_REG_INTSTS1_SIGN_Msk | LINK_REG_INTSTS1_ATTCH_Msk | LINK_REG_INTSTS1_DTCH_Msk) & is1);
+  LINK_REG->INTSTS0 = ~((LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_NRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk) & is0);
   // TU_LOG1("IS %04x %04x\n", is0, is1);
   is1 &= LINK_REG->INTENB1;
   is0 &= LINK_REG->INTENB0;
 
-  if (is1 & USB_IS1_SACK) {
+  if (is1 & LINK_REG_INTSTS1_SACK_Msk) {
     /* Set DATA1 in advance for the next transfer. */
     LINK_REG->DCPCTR_b.SQSET = 1;
     hcd_event_xfer_complete(
       LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true);
   }
-  if (is1 & USB_IS1_SIGN) {
+  if (is1 & LINK_REG_INTSTS1_SIGN_Msk) {
     hcd_event_xfer_complete(
       LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true);
   }
-  if (is1 & USB_IS1_ATTCH) {
+  if (is1 & LINK_REG_INTSTS1_ATTCH_Msk) {
     LINK_REG->DVSTCTR0_b.UACT = 1;
     _hcd.need_reset = true;
-    LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~USB_IS1_ATTCH) | USB_IS1_DTCH;
+    LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~LINK_REG_INTSTS1_ATTCH_Msk) | LINK_REG_INTSTS1_DTCH_Msk;
     hcd_event_device_attach(rhport, true);
   }
-  if (is1 & USB_IS1_DTCH) {
+  if (is1 & LINK_REG_INTSTS1_DTCH_Msk) {
     LINK_REG->DVSTCTR0_b.UACT = 0;
     if (LINK_REG->DCPCTR_b.SUREQ)
       LINK_REG->DCPCTR_b.SUREQCLR = 1;
-    LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~USB_IS1_DTCH) | USB_IS1_ATTCH;
+    LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~LINK_REG_INTSTS1_DTCH_Msk) | LINK_REG_INTSTS1_ATTCH_Msk;
     hcd_event_device_remove(rhport, true);
   }
 
-  if (is0 & USB_IS0_BEMP) {
+  if (is0 & LINK_REG_INTSTS0_BEMP_Msk) {
     const unsigned s = LINK_REG->BEMPSTS;
     LINK_REG->BEMPSTS = 0;
     if (s & 1) {
       process_pipe0_bemp(rhport);
     }
   }
-  if (is0 & USB_IS0_NRDY) {
+  if (is0 & LINK_REG_INTSTS0_NRDY_Msk) {
     const unsigned m = LINK_REG->NRDYENB;
     unsigned s = LINK_REG->NRDYSTS & m;
     LINK_REG->NRDYSTS = ~s;
@@ -753,7 +753,7 @@ void hcd_int_handler(uint8_t rhport)
       s &= ~TU_BIT(num);
     }
   }
-  if (is0 & USB_IS0_BRDY) {
+  if (is0 & LINK_REG_INTSTS0_BRDY_Msk) {
     const unsigned m = LINK_REG->BRDYENB;
     unsigned s = LINK_REG->BRDYSTS & m;
     /* clear active bits (don't write 0 to already cleared bits according to the HW manual) */
diff --git a/src/portable/renesas/link/link_type.h b/src/portable/renesas/link/link_type.h
index 33cf7879e..f1d0130cc 100644
--- a/src/portable/renesas/link/link_type.h
+++ b/src/portable/renesas/link/link_type.h
@@ -33,72 +33,6 @@
 extern "C" {
 #endif
 
-//--------------------------------------------------------------------+
-// MACRO TYPEDEF CONSTANT ENUM DECLARATION
-//--------------------------------------------------------------------+
-#define USB_DVSTCTR0_LOW  (1u)
-#define USB_DVSTCTR0_FULL (2u)
-
-#define USB_FIFOSEL_TX	   ((uint16_t) (1u << 5))
-#define USB_FIFOSEL_BIGEND ((uint16_t) (1u << 8))
-#define USB_FIFOSEL_MBW_8  ((uint16_t) (0u << 10))
-#define USB_FIFOSEL_MBW_16 ((uint16_t) (1u << 10))
-#define USB_IS0_CTSQ	   ((uint16_t) (7u))
-#define USB_IS0_DVSQ	   ((uint16_t) (7u << 4))
-#define USB_IS0_VALID	   ((uint16_t) (1u << 3))
-#define USB_IS0_BRDY	   ((uint16_t) (1u << 8))
-#define USB_IS0_NRDY	   ((uint16_t) (1u << 9))
-#define USB_IS0_BEMP	   ((uint16_t) (1u << 10))
-#define USB_IS0_CTRT	   ((uint16_t) (1u << 11))
-#define USB_IS0_DVST	   ((uint16_t) (1u << 12))
-#define USB_IS0_SOFR	   ((uint16_t) (1u << 13))
-#define USB_IS0_RESM	   ((uint16_t) (1u << 14))
-#define USB_IS0_VBINT	   ((uint16_t) (1u << 15))
-#define USB_IS1_SACK	   ((uint16_t) (1u << 4))
-#define USB_IS1_SIGN	   ((uint16_t) (1u << 5))
-#define USB_IS1_EOFERR	   ((uint16_t) (1u << 6))
-#define USB_IS1_ATTCH	   ((uint16_t) (1u << 11))
-#define USB_IS1_DTCH	   ((uint16_t) (1u << 12))
-#define USB_IS1_BCHG	   ((uint16_t) (1u << 14))
-#define USB_IS1_OVRCR	   ((uint16_t) (1u << 15))
-
-#define USB_IS0_CTSQ_MSK   (7u)
-#define USB_IS0_CTSQ_SETUP (1u)
-#define USB_IS0_DVSQ_DEF   (1u << 4)
-#define USB_IS0_DVSQ_ADDR  (2u << 4)
-#define USB_IS0_DVSQ_SUSP0 (4u << 4)
-#define USB_IS0_DVSQ_SUSP1 (5u << 4)
-#define USB_IS0_DVSQ_SUSP2 (6u << 4)
-#define USB_IS0_DVSQ_SUSP3 (7u << 4)
-
-#define USB_PIPECTR_PID_MSK   (3u)
-#define USB_PIPECTR_PID_NAK   (0u)
-#define USB_PIPECTR_PID_BUF   (1u)
-#define USB_PIPECTR_PID_STALL (2u)
-#define USB_PIPECTR_CCPL      (1u << 2)
-#define USB_PIPECTR_SQMON     (1u << 6)
-#define USB_PIPECTR_SQCLR     (1u << 8)
-#define USB_PIPECTR_ACLRM     (1u << 9)
-#define USB_PIPECTR_INBUFM    (1u << 14)
-#define USB_PIPECTR_BSTS      (1u << 15)
-
-#define USB_FIFOCTR_DTLN (0x1FF)
-#define USB_FIFOCTR_FRDY (1u << 13)
-#define USB_FIFOCTR_BCLR (1u << 14)
-#define USB_FIFOCTR_BVAL (1u << 15)
-
-#define USB_PIPECFG_SHTNAK (1u << 7)
-#define USB_PIPECFG_DBLB   (1u << 9)
-#define USB_PIPECFG_BULK   (1u << 14)
-#define USB_PIPECFG_ISO	   (3u << 14)
-#define USB_PIPECFG_INT	   (2u << 14)
-
-#define FIFO_REQ_CLR  (1u)
-#define FIFO_COMPLETE (1u << 1)
-
-#define USB_DEVADD_LOW	(1u << 6)
-#define USB_DEVADD_FULL (2u << 6)
-
 /*--------------------------------------------------------------------*/
 /* Register Definitions                                           */
 /*--------------------------------------------------------------------*/
@@ -1651,6 +1585,38 @@ TU_ATTR_PACKED_END /* End of definition of packed structs (used by the CCRX tool
 #define LINK_REG_DPUSR1R_FS_DPINTE0_Pos	  (0UL)	       /* DPINTE0 (Bit 0) */
 #define LINK_REG_DPUSR1R_FS_DPINTE0_Msk	  (0x1UL)      /* DPINTE0 (Bitfield-Mask: 0x01) */
 
+/*--------------------------------------------------------------------*/
+/* Register Bit Utils                                           */
+/*--------------------------------------------------------------------*/
+#define LINK_REG_PIPE_CTR_PID_NAK   (0U << LINK_REG_PIPE_CTR_PID_Pos) /* NAK response */
+#define LINK_REG_PIPE_CTR_PID_BUF   (1U << LINK_REG_PIPE_CTR_PID_Pos) /* BUF response (depends buffer state) */
+#define LINK_REG_PIPE_CTR_PID_STALL (2U << LINK_REG_PIPE_CTR_PID_Pos) /* STALL response */
+
+#define LINK_REG_DVSTCTR0_RHST_LS	(1U << LINK_REG_DVSTCTR0_RHST_Pos) /*  Low-speed connection */
+#define LINK_REG_DVSTCTR0_RHST_FS	(2U << LINK_REG_DVSTCTR0_RHST_Pos) /*  Full-speed connection */
+
+#define LINK_REG_DEVADD_USBSPD_LS (1U << LINK_REG_DEVADD_USBSPD_Pos) /* Target Device Low-speed */
+#define LINK_REG_DEVADD_USBSPD_FS (2U << LINK_REG_DEVADD_USBSPD_Pos) /* Target Device Full-speed */
+
+#define LINK_REG_CFIFOSEL_ISEL_WRITE	(1U << LINK_REG_CFIFOSEL_ISEL_Pos)	/* FIFO write AKA TX*/
+
+#define LINK_REG_FIFOSEL_BIGEND			(1U << LINK_REG_CFIFOSEL_BIGEND_Pos)	/* FIFO Big Endian */
+#define LINK_REG_FIFOSEL_MBW_8BIT			(0U << LINK_REG_CFIFOSEL_MBW_Pos)	/* 8-bit width */
+#define LINK_REG_FIFOSEL_MBW_16BIT			(1U << LINK_REG_CFIFOSEL_MBW_Pos)	/* 16-bit width */
+
+#define LINK_REG_INTSTS0_CTSQ_CTRL_RDATA (1U << LINK_REG_INTSTS0_CTSQ_Pos)
+
+#define LINK_REG_INTSTS0_DVSQ_STATE_DEF (1U << LINK_REG_INTSTS0_DVSQ_Pos) /* Default state */
+#define LINK_REG_INTSTS0_DVSQ_STATE_ADDR (2U << LINK_REG_INTSTS0_DVSQ_Pos) /* Address state */
+#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP0 (4U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */
+#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP1 (5U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */
+#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP2 (6U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */
+#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP3 (7U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */
+
+#define LINK_REG_PIPECFG_TYPE_BULK (1U << LINK_REG_PIPECFG_TYPE_Pos)
+#define LINK_REG_PIPECFG_TYPE_INT (2U << LINK_REG_PIPECFG_TYPE_Pos)
+#define LINK_REG_PIPECFG_TYPE_ISO (3U << LINK_REG_PIPECFG_TYPE_Pos)
+
 #ifdef __cplusplus
 }
 #endif

From e0220c6594f08d5b402994f92c12fc92482e9115 Mon Sep 17 00:00:00 2001
From: Rafael Silva <rafaelsilva@ajtec.pt>
Date: Mon, 21 Mar 2022 15:59:08 +0000
Subject: [PATCH 011/691] fix int handling for host in ek_ra4m3 port

---
 hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c | 38 +++++++++++++++++++++++-----
 1 file changed, 31 insertions(+), 7 deletions(-)

diff --git a/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c b/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c
index d79d7b425..c2f2a0903 100644
--- a/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c
+++ b/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c
@@ -91,28 +91,52 @@ void usbfs_interrupt_handler(void)
 	IRQn_Type irq = R_FSP_CurrentIrqGet();
 	R_BSP_IrqStatusClear(irq);
 
+#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
+	tuh_int_handler(0);
+#endif
+
+#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
 	tud_int_handler(0);
+#endif
 }
 void usbfs_resume_handler(void)
 {
 	IRQn_Type irq = R_FSP_CurrentIrqGet();
 	R_BSP_IrqStatusClear(irq);
 
+#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
+	tuh_int_handler(0);
+#endif
+
+#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
 	tud_int_handler(0);
+#endif
 }
 void usbfs_d0fifo_handler(void)
 {
 	IRQn_Type irq = R_FSP_CurrentIrqGet();
 	R_BSP_IrqStatusClear(irq);
 
+#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
+	tuh_int_handler(0);
+#endif
+
+#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
 	tud_int_handler(0);
+#endif
 }
 void usbfs_d1fifo_handler(void)
 {
 	IRQn_Type irq = R_FSP_CurrentIrqGet();
 	R_BSP_IrqStatusClear(irq);
 
+#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
+	tuh_int_handler(0);
+#endif
+
+#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
 	tud_int_handler(0);
+#endif
 }
 
 void board_init(void)
@@ -125,17 +149,17 @@ void board_init(void)
 	R_MSTP->MSTPCRB &= ~(1U << 11U);
 	R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK;
 
-#if CFG_TUSB_OS  == OPT_OS_FREERTOS
-  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
-  NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-  NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-  NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-  NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+	// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+	NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+	NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+	NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+	NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
 #endif
 
 #if CFG_TUSB_OS == OPT_OS_NONE
 	/* Init systick */
-  	SysTick_Config(SystemCoreClock / 1000);
+	SysTick_Config(SystemCoreClock / 1000);
 #endif
 }
 

From 60aae59eeb1f656bddf87f026fdba48735e03280 Mon Sep 17 00:00:00 2001
From: Rafael Silva <rafaelsilva@ajtec.pt>
Date: Mon, 21 Mar 2022 16:02:11 +0000
Subject: [PATCH 012/691] style code for consistency with existing codebase

---
 hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c          |  152 +-
 .../ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h     |  112 +-
 src/portable/renesas/link/dcd_link.c          |    8 +-
 src/portable/renesas/link/hcd_link.c          |   10 +-
 src/portable/renesas/link/link_ra.h           |    8 +-
 src/portable/renesas/link/link_rx.h           |   16 +-
 src/portable/renesas/link/link_type.h         | 1838 ++++++++---------
 7 files changed, 1074 insertions(+), 1070 deletions(-)

diff --git a/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c b/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c
index c2f2a0903..eab102de9 100644
--- a/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c
+++ b/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c
@@ -50,35 +50,35 @@ void usbfs_d0fifo_handler(void);
 void usbfs_d1fifo_handler(void);
 
 BSP_DONT_REMOVE const
-	fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = {
-		[0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */
-		[1] = usbfs_resume_handler,    /* USBFS RESUME (USBFS resume interrupt) */
-		[2] = usbfs_d0fifo_handler,    /* USBFS FIFO 0 (DMA transfer request 0) */
-		[3] = usbfs_d1fifo_handler,    /* USBFS FIFO 1 (DMA transfer request 1) */
+  fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = {
+    [0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */
+    [1] = usbfs_resume_handler,    /* USBFS RESUME (USBFS resume interrupt) */
+    [2] = usbfs_d0fifo_handler,    /* USBFS FIFO 0 (DMA transfer request 0) */
+    [3] = usbfs_d1fifo_handler,    /* USBFS FIFO 1 (DMA transfer request 1) */
 };
 const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENTRIES] = {
-	[0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT),    /* USBFS INT (USBFS interrupt) */
-	[1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */
-	[2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */
-	[3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1)  /* USBFS FIFO 1 (DMA transfer request 1) */
+  [0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT),    /* USBFS INT (USBFS interrupt) */
+  [1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */
+  [2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */
+  [3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1)  /* USBFS FIFO 1 (DMA transfer request 1) */
 };
 
 const ioport_pin_cfg_t g_bsp_pin_cfg_data[] = {
-	{.pin = BSP_IO_PORT_04_PIN_07,
-	 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
-	{.pin = BSP_IO_PORT_05_PIN_00,
-	 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
-	{.pin = BSP_IO_PORT_05_PIN_01,
-	 .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
-	{.pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
-	{.pin = LED2, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
-	{.pin = LED3, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
-	{.pin = SW1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)},
-	{.pin = SW2, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)}};
+  {.pin = BSP_IO_PORT_04_PIN_07,
+   .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
+  {.pin = BSP_IO_PORT_05_PIN_00,
+   .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
+  {.pin = BSP_IO_PORT_05_PIN_01,
+   .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
+  {.pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
+  {.pin = LED2, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
+  {.pin = LED3, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
+  {.pin = SW1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)},
+  {.pin = SW2, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)}};
 
 const ioport_cfg_t g_bsp_pin_cfg = {
-	.number_of_pins = sizeof(g_bsp_pin_cfg_data) / sizeof(ioport_pin_cfg_t),
-	.p_pin_cfg_data = &g_bsp_pin_cfg_data[0],
+  .number_of_pins = sizeof(g_bsp_pin_cfg_data) / sizeof(ioport_pin_cfg_t),
+  .p_pin_cfg_data = &g_bsp_pin_cfg_data[0],
 };
 ioport_instance_ctrl_t g_ioport_ctrl;
 const ioport_instance_t g_ioport = {.p_api = &g_ioport_on_ioport, .p_ctrl = &g_ioport_ctrl, .p_cfg = &g_bsp_pin_cfg};
@@ -88,78 +88,78 @@ const ioport_instance_t g_ioport = {.p_api = &g_ioport_on_ioport, .p_ctrl = &g_i
 //--------------------------------------------------------------------+
 void usbfs_interrupt_handler(void)
 {
-	IRQn_Type irq = R_FSP_CurrentIrqGet();
-	R_BSP_IrqStatusClear(irq);
+  IRQn_Type irq = R_FSP_CurrentIrqGet();
+  R_BSP_IrqStatusClear(irq);
 
 #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
-	tuh_int_handler(0);
+  tuh_int_handler(0);
 #endif
 
 #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
-	tud_int_handler(0);
+  tud_int_handler(0);
 #endif
 }
 void usbfs_resume_handler(void)
 {
-	IRQn_Type irq = R_FSP_CurrentIrqGet();
-	R_BSP_IrqStatusClear(irq);
+  IRQn_Type irq = R_FSP_CurrentIrqGet();
+  R_BSP_IrqStatusClear(irq);
 
 #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
-	tuh_int_handler(0);
+  tuh_int_handler(0);
 #endif
 
 #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
-	tud_int_handler(0);
+  tud_int_handler(0);
 #endif
 }
 void usbfs_d0fifo_handler(void)
 {
-	IRQn_Type irq = R_FSP_CurrentIrqGet();
-	R_BSP_IrqStatusClear(irq);
+  IRQn_Type irq = R_FSP_CurrentIrqGet();
+  R_BSP_IrqStatusClear(irq);
 
 #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
-	tuh_int_handler(0);
+  tuh_int_handler(0);
 #endif
 
 #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
-	tud_int_handler(0);
+  tud_int_handler(0);
 #endif
 }
 void usbfs_d1fifo_handler(void)
 {
-	IRQn_Type irq = R_FSP_CurrentIrqGet();
-	R_BSP_IrqStatusClear(irq);
+  IRQn_Type irq = R_FSP_CurrentIrqGet();
+  R_BSP_IrqStatusClear(irq);
 
 #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
-	tuh_int_handler(0);
+  tuh_int_handler(0);
 #endif
 
 #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
-	tud_int_handler(0);
+  tud_int_handler(0);
 #endif
 }
 
 void board_init(void)
 {
-	/* Configure pins. */
-	R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg);
+  /* Configure pins. */
+  R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg);
 
-	/* Enable USB_BASE */
-	R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_PRC1_UNLOCK;
-	R_MSTP->MSTPCRB &= ~(1U << 11U);
-	R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK;
+  /* Enable USB_BASE */
+  R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_PRC1_UNLOCK;
+  R_MSTP->MSTPCRB &= ~(1U << 11U);
+  R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK;
 
 #if CFG_TUSB_OS == OPT_OS_FREERTOS
-	// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
-	NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-	NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-	NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-	NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
 #endif
 
 #if CFG_TUSB_OS == OPT_OS_NONE
-	/* Init systick */
-	SysTick_Config(SystemCoreClock / 1000);
+  /* Init systick */
+  SysTick_Config(SystemCoreClock / 1000);
 #endif
 }
 
@@ -169,66 +169,66 @@ void board_init(void)
 
 void board_led_write(bool state)
 {
-	R_IOPORT_PinWrite(&g_ioport_ctrl, LED1, state);
-	R_IOPORT_PinWrite(&g_ioport_ctrl, LED2, state);
-	R_IOPORT_PinWrite(&g_ioport_ctrl, LED3, state);
+  R_IOPORT_PinWrite(&g_ioport_ctrl, LED1, state);
+  R_IOPORT_PinWrite(&g_ioport_ctrl, LED2, state);
+  R_IOPORT_PinWrite(&g_ioport_ctrl, LED3, state);
 }
 
 uint32_t board_button_read(void)
 {
-	bsp_io_level_t lvl;
-	R_IOPORT_PinRead(&g_ioport_ctrl, SW1, &lvl);
-	return lvl;
+  bsp_io_level_t lvl;
+  R_IOPORT_PinRead(&g_ioport_ctrl, SW1, &lvl);
+  return lvl;
 }
 
 int board_uart_read(uint8_t *buf, int len)
 {
-	(void) buf;
-	(void) len;
-	return 0;
+  (void) buf;
+  (void) len;
+  return 0;
 }
 
 int board_uart_write(void const *buf, int len)
 {
-	(void) buf;
-	(void) len;
-	return 0;
+  (void) buf;
+  (void) len;
+  return 0;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
 void SysTick_Handler(void)
 {
-	system_ticks++;
+  system_ticks++;
 }
 
 uint32_t board_millis(void)
 {
-	return system_ticks;
+  return system_ticks;
 }
 #else
 #endif
 
 int close(int fd)
 {
-	(void) fd;
-	return -1;
+  (void) fd;
+  return -1;
 }
 int fstat(int fd, void *pstat)
 {
-	(void) fd;
-	(void) pstat;
-	return 0;
+  (void) fd;
+  (void) pstat;
+  return 0;
 }
 off_t lseek(int fd, off_t pos, int whence)
 {
-	(void) fd;
-	(void) pos;
-	(void) whence;
-	return 0;
+  (void) fd;
+  (void) pos;
+  (void) whence;
+  return 0;
 }
 int isatty(int fd)
 {
-	(void) fd;
-	return 1;
+  (void) fd;
+  return 1;
 }
diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h
index 0449bb4bc..4ecda1c66 100644
--- a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h
+++ b/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h
@@ -69,40 +69,40 @@
 
 /* Peripheral Security Attribution Register (PSAR) Settings */
 #define BSP_TZ_CFG_PSARB                                                                                             \
-	((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CAN1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* CAN0 */ |   \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* IIC1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9) /* IIC0 */ |   \
-	 (((1 > 0) ? 0U : 1U) << 11) /* USBFS */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 18) /* SPI1 */ |             \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 19) /* SPI0 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* SCI9 */ | \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* SCI8 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* SCI7 */ | \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 25) /* SCI6 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* SCI5 */ | \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* SCI4 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 28) /* SCI3 */ | \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* SCI2 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 30) /* SCI1 */ | \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCI0 */ | 0x33f4f9) /* Unused */
+  ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CAN1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* CAN0 */ |   \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* IIC1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9) /* IIC0 */ |   \
+   (((1 > 0) ? 0U : 1U) << 11) /* USBFS */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 18) /* SPI1 */ |             \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 19) /* SPI0 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* SCI9 */ | \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* SCI8 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* SCI7 */ | \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 25) /* SCI6 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* SCI5 */ | \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* SCI4 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 28) /* SCI3 */ | \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* SCI2 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 30) /* SCI1 */ | \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCI0 */ | 0x33f4f9) /* Unused */
 #define BSP_TZ_CFG_PSARC                                                                                             \
-	((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* CAC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CRC */ |     \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* CTSU */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* SSIE0 */ |  \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* SDHI0 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* DOC */ | \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCE9 */ | 0x7fffcef4) /* Unused */
+  ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* CAC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CRC */ |     \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* CTSU */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* SSIE0 */ |  \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* SDHI0 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* DOC */ | \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCE9 */ | 0x7fffcef4) /* Unused */
 #define BSP_TZ_CFG_PSARD                                                                                               \
-	((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* AGT3 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* AGT2 */ |     \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* AGT1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* AGT0 */ |     \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 11) /* POEG3 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* POEG2 */ | \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* POEG1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* POEG0 */ | \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* ADC1 */ | (((1 > 0) ? 0U : 1U) << 16) /* ADC0 */ |                \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 20) /* DAC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* TSN */ |     \
-	 0xffae07f0) /* Unused */
+  ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* AGT3 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* AGT2 */ |     \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* AGT1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* AGT0 */ |     \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 11) /* POEG3 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* POEG2 */ | \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* POEG1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* POEG0 */ | \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* ADC1 */ | (((1 > 0) ? 0U : 1U) << 16) /* ADC0 */ |                \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 20) /* DAC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* TSN */ |     \
+   0xffae07f0) /* Unused */
 #define BSP_TZ_CFG_PSARE                                                                                             \
-	((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* WDT */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* IWDT */ |    \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* RTC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* AGT5 */ |   \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* AGT4 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* GPT9 */ | \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* GPT8 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* GPT7 */ | \
-	 (((1 > 0) ? 0U : 1U) << 25) /* GPT6 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* GPT5 */ |              \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* GPT4 */ | (((1 > 0) ? 0U : 1U) << 28) /* GPT3 */ |              \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* GPT2 */ | (((1 > 0) ? 0U : 1U) << 30) /* GPT1 */ |              \
-	 (((1 > 0) ? 0U : 1U) << 31) /* GPT0 */ | 0x3f3ff8) /* Unused */
+  ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* WDT */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* IWDT */ |    \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* RTC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* AGT5 */ |   \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* AGT4 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* GPT9 */ | \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* GPT8 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* GPT7 */ | \
+   (((1 > 0) ? 0U : 1U) << 25) /* GPT6 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* GPT5 */ |              \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* GPT4 */ | (((1 > 0) ? 0U : 1U) << 28) /* GPT3 */ |              \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* GPT2 */ | (((1 > 0) ? 0U : 1U) << 30) /* GPT1 */ |              \
+   (((1 > 0) ? 0U : 1U) << 31) /* GPT0 */ | 0x3f3ff8) /* Unused */
 #define BSP_TZ_CFG_MSSAR                                                                                              \
-	((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* ELC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* DTC_DMAC */ | \
-	 0xfffffffc) /* Unused */
+  ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* ELC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* DTC_DMAC */ | \
+   0xfffffffc) /* Unused */
 
 /* Type 2 Peripheral Security Attribution */
 
@@ -114,9 +114,9 @@
 
 /* Security attribution for registers of LVD channels. */
 #define BSP_TZ_CFG_LVDSAR                                              \
-	((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) | /* LVD Channel 1 */ \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) | /* LVD Channel 2 */ \
-	 0xFFFFFFFCU)
+  ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) | /* LVD Channel 1 */ \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) | /* LVD Channel 2 */ \
+   0xFFFFFFFCU)
 
 /* Security attribution for LPM registers. */
 #define BSP_TZ_CFG_LPMSAR ((RA_NOT_DEFINED > 0) ? 0xFFFFFCEAU : 0xFFFFFFFFU)
@@ -137,34 +137,34 @@
 
 /* Security attribution for registers for IRQ channels. */
 #define BSP_TZ_CFG_ICUSARA                                                                                                    \
-	((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* External IRQ0 */ |                                                       \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* External IRQ1 */ |                                                       \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* External IRQ2 */ |                                                       \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* External IRQ3 */ |                                                       \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* External IRQ4 */ |                                                       \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* External IRQ5 */ |                                                       \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* External IRQ6 */ |                                                       \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* External IRQ7 */ |                                                       \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8U) /* External IRQ8 */ |                                                       \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9U) /* External IRQ9 */ | (((1 > 0) ? 0U : 1U) << 10U) /* External IRQ10 */ |   \
-	 (((1 > 0) ? 0U : 1U) << 11U) /* External IRQ11 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12U) /* External IRQ12 */ | \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13U) /* External IRQ13 */ |                                                     \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14U) /* External IRQ14 */ |                                                     \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15U) /* External IRQ15 */ | 0xFFFF0000U)
+  ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* External IRQ0 */ |                                                       \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* External IRQ1 */ |                                                       \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* External IRQ2 */ |                                                       \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* External IRQ3 */ |                                                       \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* External IRQ4 */ |                                                       \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* External IRQ5 */ |                                                       \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* External IRQ6 */ |                                                       \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* External IRQ7 */ |                                                       \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8U) /* External IRQ8 */ |                                                       \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9U) /* External IRQ9 */ | (((1 > 0) ? 0U : 1U) << 10U) /* External IRQ10 */ |   \
+   (((1 > 0) ? 0U : 1U) << 11U) /* External IRQ11 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12U) /* External IRQ12 */ | \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13U) /* External IRQ13 */ |                                                     \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14U) /* External IRQ14 */ |                                                     \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15U) /* External IRQ15 */ | 0xFFFF0000U)
 
 /* Security attribution for NMI registers. */
 #define BSP_TZ_CFG_ICUSARB (0 | 0xFFFFFFFEU) /* Should match AIRCR.BFHFNMINS. */
 
 /* Security attribution for registers for DMAC channels */
 #define BSP_TZ_CFG_ICUSARC                                               \
-	((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* DMAC Channel 0 */ | \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* DMAC Channel 1 */ | \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* DMAC Channel 2 */ | \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* DMAC Channel 3 */ | \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* DMAC Channel 4 */ | \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* DMAC Channel 5 */ | \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* DMAC Channel 6 */ | \
-	 (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* DMAC Channel 7 */ | 0xFFFFFF00U)
+  ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* DMAC Channel 0 */ | \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* DMAC Channel 1 */ | \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* DMAC Channel 2 */ | \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* DMAC Channel 3 */ | \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* DMAC Channel 4 */ | \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* DMAC Channel 5 */ | \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* DMAC Channel 6 */ | \
+   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* DMAC Channel 7 */ | 0xFFFFFF00U)
 
 /* Security attribution registers for SELSR0. */
 #define BSP_TZ_CFG_ICUSARD ((RA_NOT_DEFINED > 0) ? 0xFFFFFFFEU : 0xFFFFFFFFU)
@@ -222,7 +222,7 @@
 /* Option Function Select Register 1 Security Attribution */
 #if defined(_RA_TZ_SECURE) || defined(_RA_TZ_NONSECURE)
 #define BSP_CFG_ROM_REG_OFS1_SEL \
-	(0xFFFFF8F8U | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0x700U : 0U) | ((RA_NOT_DEFINED > 0) ? 0U : 0x7U))
+  (0xFFFFF8F8U | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0x700U : 0U) | ((RA_NOT_DEFINED > 0) ? 0U : 0x7U))
 #else
 #define BSP_CFG_ROM_REG_OFS1_SEL (0xFFFFF8F8U)
 #endif
diff --git a/src/portable/renesas/link/dcd_link.c b/src/portable/renesas/link/dcd_link.c
index f2334140a..bb7e3b60a 100644
--- a/src/portable/renesas/link/dcd_link.c
+++ b/src/portable/renesas/link/dcd_link.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 Koji Kitayama
@@ -31,8 +31,10 @@
 // We disable SOF for now until needed later on
 #define USE_SOF     0
 
-#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N || \
-      CFG_TUSB_MCU == OPT_MCU_RAXXX)
+#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || \
+                        CFG_TUSB_MCU == OPT_MCU_RX65X || \
+                        CFG_TUSB_MCU == OPT_MCU_RX72N || \
+                        CFG_TUSB_MCU == OPT_MCU_RAXXX)
 
 #include "device/dcd.h"
 #include "link_type.h"
diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/link/hcd_link.c
index 940013c86..f60c49114 100644
--- a/src/portable/renesas/link/hcd_link.c
+++ b/src/portable/renesas/link/hcd_link.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2021 Koji Kitayama
@@ -27,8 +27,10 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N || \
-			CFG_TUSB_MCU == OPT_MCU_RAXXX)
+#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || \
+                        CFG_TUSB_MCU == OPT_MCU_RX65X || \
+                        CFG_TUSB_MCU == OPT_MCU_RX72N || \
+                        CFG_TUSB_MCU == OPT_MCU_RAXXX)
 
 #include "host/hcd.h"
 #include "link_type.h"
@@ -488,7 +490,7 @@ void hcd_int_disable(uint8_t rhport)
 uint32_t hcd_frame_number(uint8_t rhport)
 {
   (void)rhport;
-  /* The device must be reset at least once after connection 
+  /* The device must be reset at least once after connection
    * in order to start the frame counter. */
   if (_hcd.need_reset) hcd_port_reset(rhport);
   return LINK_REG->FRMNUM_b.FRNM;
diff --git a/src/portable/renesas/link/link_ra.h b/src/portable/renesas/link/link_ra.h
index b42def368..97618ef8f 100644
--- a/src/portable/renesas/link/link_ra.h
+++ b/src/portable/renesas/link/link_ra.h
@@ -41,15 +41,15 @@ extern "C" {
 TU_ATTR_ALWAYS_INLINE
 static inline void link_int_enable(uint8_t rhport)
 {
-	(void) rhport;
-	NVIC_EnableIRQ(TU_IRQn);
+  (void) rhport;
+  NVIC_EnableIRQ(TU_IRQn);
 }
 
 TU_ATTR_ALWAYS_INLINE
 static inline void link_int_disable(uint8_t rhport)
 {
-	(void) rhport;
-	NVIC_DisableIRQ(TU_IRQn);
+  (void) rhport;
+  NVIC_DisableIRQ(TU_IRQn);
 }
 
 // MCU specific PHY init
diff --git a/src/portable/renesas/link/link_rx.h b/src/portable/renesas/link/link_rx.h
index b15084bb3..62f2911c2 100644
--- a/src/portable/renesas/link/link_rx.h
+++ b/src/portable/renesas/link/link_rx.h
@@ -41,21 +41,21 @@ extern "C" {
 
 static inline void link_int_enable(uint8_t rhport)
 {
-	(void) rhport;
+  (void) rhport;
 #if (CFG_TUSB_MCU == OPT_MCU_RX72N)
-	IEN(PERIB, INTB185) = 1;
+  IEN(PERIB, INTB185) = 1;
 #else
-	IEN(USB0, USBI0) = 1;
+  IEN(USB0, USBI0) = 1;
 #endif
 }
 
 static inline void link_int_disable(uint8_t rhport)
 {
-	(void) rhport;
+  (void) rhport;
 #if (CFG_TUSB_MCU == OPT_MCU_RX72N)
-	IEN(PERIB, INTB185) = 0;
+  IEN(PERIB, INTB185) = 0;
 #else
-	IEN(USB0, USBI0) = 0;
+  IEN(USB0, USBI0) = 0;
 #endif
 }
 
@@ -63,9 +63,9 @@ static inline void link_int_disable(uint8_t rhport)
 static inline void link_phy_init(void)
 {
 #if (CFG_TUSB_MCU == OPT_MCU_RX72N)
-	IR(PERIB, INTB185) = 0;
+  IR(PERIB, INTB185) = 0;
 #else
-	IR(USB0, USBI0) = 0;
+  IR(USB0, USBI0) = 0;
 #endif
 }
 
diff --git a/src/portable/renesas/link/link_type.h b/src/portable/renesas/link/link_type.h
index f1d0130cc..eaf0b1ec4 100644
--- a/src/portable/renesas/link/link_type.h
+++ b/src/portable/renesas/link/link_type.h
@@ -42,933 +42,933 @@ TU_ATTR_PACKED_BEGIN
 TU_ATTR_BIT_FIELD_ORDER_BEGIN
 
 typedef struct TU_ATTR_PACKED {
-	union {
-		volatile uint16_t E; /* (@ 0x00000000) Pipe Transaction Counter Enable Register */
+  union {
+    volatile uint16_t E; /* (@ 0x00000000) Pipe Transaction Counter Enable Register */
 
-		struct {
-			uint16_t : 8;
-			volatile uint16_t TRCLR : 1; /* [8..8] Transaction Counter Clear */
-			volatile uint16_t TRENB : 1; /* [9..9] Transaction Counter Enable */
-			uint16_t : 6;
-		} E_b;
-	};
+    struct {
+      uint16_t : 8;
+      volatile uint16_t TRCLR : 1; /* [8..8] Transaction Counter Clear */
+      volatile uint16_t TRENB : 1; /* [9..9] Transaction Counter Enable */
+      uint16_t : 6;
+    } E_b;
+  };
 
-	union {
-		volatile uint16_t N; /* (@ 0x00000002) Pipe Transaction Counter Register */
+  union {
+    volatile uint16_t N; /* (@ 0x00000002) Pipe Transaction Counter Register */
 
-		struct {
-			volatile uint16_t TRNCNT : 16; /* [15..0] Transaction Counter */
-		} N_b;
-	};
+    struct {
+      volatile uint16_t TRNCNT : 16; /* [15..0] Transaction Counter */
+    } N_b;
+  };
 } LINK_REG_PIPE_TR_t; /* Size = 4 (0x4) */
 
 TU_VERIFY_STATIC(sizeof(LINK_REG_PIPE_TR_t) == 4, "incorrect size");
 
 /* LINK_REG Structure */
 typedef struct TU_ATTR_PACKED {
-	union {
-		volatile uint16_t SYSCFG; /* (@ 0x00000000) System Configuration Control Register */
-
-		struct {
-			volatile uint16_t USBE : 1; /* [0..0] USB Operation Enable */
-			uint16_t : 2;
-			volatile uint16_t DMRPU : 1; /* [3..3] D- Line Resistor Control */
-			volatile uint16_t DPRPU : 1; /* [4..4] D+ Line Resistor Control */
-			volatile uint16_t DRPD : 1;  /* [5..5] D+/D- Line Resistor Control */
-			volatile uint16_t DCFM : 1;  /* [6..6] Controller Function Select */
-			uint16_t : 1;
-			volatile uint16_t CNEN : 1; /* [8..8] CNEN Single End Receiver Enable */
-			uint16_t : 1;
-			volatile uint16_t SCKE : 1; /* [10..10] USB Clock Enable */
-			uint16_t : 5;
-		} SYSCFG_b;
-	};
-
-	union {
-		volatile uint16_t BUSWAIT; /* (@ 0x00000002) CPU Bus Wait Register */
-
-		struct {
-			volatile uint16_t
-				BWAIT : 4; /* [3..0] CPU Bus Access Wait Specification BWAIT waits (BWAIT+2 access cycles) */
-			uint16_t : 12;
-		} BUSWAIT_b;
-	};
-
-	union {
-		volatile const uint16_t SYSSTS0; /* (@ 0x00000004) System Configuration Status Register 0 */
-
-		struct {
-			volatile const uint16_t LNST : 2;  /* [1..0] USB Data Line Status Monitor */
-			volatile const uint16_t IDMON : 1; /* [2..2] External ID0 Input Pin Monitor */
-			uint16_t : 2;
-			volatile const uint16_t
-				SOFEA : 1; /* [5..5] SOF Active Monitor While Host Controller Function is Selected. */
-			volatile const uint16_t HTACT : 1; /* [6..6] USB Host Sequencer Status Monitor */
-			uint16_t : 7;
-			volatile const uint16_t
-				OVCMON : 2; /* [15..14] External USB0_OVRCURA/ USB0_OVRCURB Input Pin Monitor */
-		} SYSSTS0_b;
-	};
-
-	union {
-		volatile const uint16_t PLLSTA; /* (@ 0x00000006) PLL Status Register */
-
-		struct {
-			volatile const uint16_t PLLLOCK : 1; /* [0..0] PLL Lock Flag */
-			uint16_t : 15;
-		} PLLSTA_b;
-	};
-
-	union {
-		volatile uint16_t DVSTCTR0; /* (@ 0x00000008) Device State Control Register 0 */
-
-		struct {
-			volatile const uint16_t RHST : 3; /* [2..0] USB Bus Reset Status */
-			uint16_t : 1;
-			volatile uint16_t UACT : 1;    /* [4..4] USB Bus Enable */
-			volatile uint16_t RESUME : 1;  /* [5..5] Resume Output */
-			volatile uint16_t USBRST : 1;  /* [6..6] USB Bus Reset Output */
-			volatile uint16_t RWUPE : 1;   /* [7..7] Wakeup Detection Enable */
-			volatile uint16_t WKUP : 1;    /* [8..8] Wakeup Output */
-			volatile uint16_t VBUSEN : 1;  /* [9..9] USB_VBUSEN Output Pin Control */
-			volatile uint16_t EXICEN : 1;  /* [10..10] USB_EXICEN Output Pin Control */
-			volatile uint16_t HNPBTOA : 1; /* [11..11] Host Negotiation Protocol (HNP) */
-			uint16_t : 4;
-		} DVSTCTR0_b;
-	};
-	volatile const uint16_t RESERVED;
-
-	union {
-		volatile uint16_t TESTMODE; /* (@ 0x0000000C) USB Test Mode Register */
-
-		struct {
-			volatile uint16_t UTST : 4; /* [3..0] Test Mode */
-			uint16_t : 12;
-		} TESTMODE_b;
-	};
-	volatile const uint16_t RESERVED1;
-	volatile const uint32_t RESERVED2;
-
-	union {
-		volatile uint32_t CFIFO; /* (@ 0x00000014) CFIFO Port Register */
-
-		struct {
-			union {
-				volatile uint16_t CFIFOL; /* (@ 0x00000014) CFIFO Port Register L */
-				volatile uint8_t CFIFOLL; /* (@ 0x00000014) CFIFO Port Register LL */
-			};
-
-			union {
-				volatile uint16_t CFIFOH; /* (@ 0x00000016) CFIFO Port Register H */
-
-				struct {
-					volatile const uint8_t RESERVED3;
-					volatile uint8_t CFIFOHH; /* (@ 0x00000017) CFIFO Port Register HH */
-				};
-			};
-		};
-	};
-
-	union {
-		volatile uint32_t D0FIFO; /* (@ 0x00000018) D0FIFO Port Register */
-
-		struct {
-			union {
-				volatile uint16_t D0FIFOL; /* (@ 0x00000018) D0FIFO Port Register L */
-				volatile uint8_t D0FIFOLL; /* (@ 0x00000018) D0FIFO Port Register LL */
-			};
-
-			union {
-				volatile uint16_t D0FIFOH; /* (@ 0x0000001A) D0FIFO Port Register H */
-
-				struct {
-					volatile const uint8_t RESERVED4;
-					volatile uint8_t D0FIFOHH; /* (@ 0x0000001B) D0FIFO Port Register HH */
-				};
-			};
-		};
-	};
-
-	union {
-		volatile uint32_t D1FIFO; /* (@ 0x0000001C) D1FIFO Port Register */
-
-		struct {
-			union {
-				volatile uint16_t D1FIFOL; /* (@ 0x0000001C) D1FIFO Port Register L */
-				volatile uint8_t D1FIFOLL; /* (@ 0x0000001C) D1FIFO Port Register LL */
-			};
-
-			union {
-				volatile uint16_t D1FIFOH; /* (@ 0x0000001E) D1FIFO Port Register H */
-
-				struct {
-					volatile const uint8_t RESERVED5;
-					volatile uint8_t D1FIFOHH; /* (@ 0x0000001F) D1FIFO Port Register HH */
-				};
-			};
-		};
-	};
-
-	union {
-		volatile uint16_t CFIFOSEL; /* (@ 0x00000020) CFIFO Port Select Register */
-
-		struct {
-			volatile uint16_t CURPIPE : 4; /* [3..0] CFIFO Port Access Pipe Specification */
-			uint16_t : 1;
-			volatile uint16_t ISEL : 1; /* [5..5] CFIFO Port Access Direction When DCP is Selected */
-			uint16_t : 2;
-			volatile uint16_t BIGEND : 1; /* [8..8] CFIFO Port Endian Control */
-			uint16_t : 1;
-			volatile uint16_t MBW : 2; /* [11..10] CFIFO Port Access Bit Width */
-			uint16_t : 2;
-			volatile uint16_t REW : 1;  /* [14..14] Buffer Pointer Rewind */
-			volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */
-		} CFIFOSEL_b;
-	};
-
-	union {
-		volatile uint16_t CFIFOCTR; /* (@ 0x00000022) CFIFO Port Control Register */
-
-		struct {
-			volatile const uint16_t
-				DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */
-			uint16_t : 1;
-			volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */
-			volatile uint16_t BCLR : 1;	  /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */
-			volatile uint16_t BVAL : 1;	  /* [15..15] Buffer Memory Valid Flag */
-		} CFIFOCTR_b;
-	};
-	volatile const uint32_t RESERVED6;
-
-	union {
-		volatile uint16_t D0FIFOSEL; /* (@ 0x00000028) D0FIFO Port Select Register */
-
-		struct {
-			volatile uint16_t CURPIPE : 4; /* [3..0] FIFO Port Access Pipe Specification */
-			uint16_t : 4;
-			volatile uint16_t BIGEND : 1; /* [8..8] FIFO Port Endian Control */
-			uint16_t : 1;
-			volatile uint16_t MBW : 2;   /* [11..10] FIFO Port Access Bit Width */
-			volatile uint16_t DREQE : 1; /* [12..12] DMA/DTC Transfer Request Enable */
-			volatile uint16_t
-				DCLRM : 1; /* [13..13] Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read */
-			volatile uint16_t REW : 1;  /* [14..14] Buffer Pointer RewindNote: Only 0 can be read. */
-			volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */
-		} D0FIFOSEL_b;
-	};
-
-	union {
-		volatile uint16_t D0FIFOCTR; /* (@ 0x0000002A) D0FIFO Port Control Register */
-
-		struct {
-			volatile const uint16_t
-				DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */
-			uint16_t : 1;
-			volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */
-			volatile uint16_t BCLR : 1;	  /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */
-			volatile uint16_t BVAL : 1;	  /* [15..15] Buffer Memory Valid Flag */
-		} D0FIFOCTR_b;
-	};
-
-	union {
-		volatile uint16_t D1FIFOSEL; /* (@ 0x0000002C) D1FIFO Port Select Register */
-
-		struct {
-			volatile uint16_t CURPIPE : 4; /* [3..0] FIFO Port Access Pipe Specification */
-			uint16_t : 4;
-			volatile uint16_t BIGEND : 1; /* [8..8] FIFO Port Endian Control */
-			uint16_t : 1;
-			volatile uint16_t MBW : 2;   /* [11..10] FIFO Port Access Bit Width */
-			volatile uint16_t DREQE : 1; /* [12..12] DMA/DTC Transfer Request Enable */
-			volatile uint16_t
-				DCLRM : 1; /* [13..13] Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read */
-			volatile uint16_t REW : 1;  /* [14..14] Buffer Pointer Rewind */
-			volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */
-		} D1FIFOSEL_b;
-	};
-
-	union {
-		volatile uint16_t D1FIFOCTR; /* (@ 0x0000002E) D1FIFO Port Control Register */
-
-		struct {
-			volatile const uint16_t
-				DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */
-			uint16_t : 1;
-			volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */
-			volatile uint16_t BCLR : 1;	  /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */
-			volatile uint16_t BVAL : 1;	  /* [15..15] Buffer Memory Valid Flag */
-		} D1FIFOCTR_b;
-	};
-
-	union {
-		volatile uint16_t INTENB0; /* (@ 0x00000030) Interrupt Enable Register 0 */
-
-		struct {
-			uint16_t : 8;
-			volatile uint16_t BRDYE : 1; /* [8..8] Buffer Ready Interrupt Enable */
-			volatile uint16_t NRDYE : 1; /* [9..9] Buffer Not Ready Response Interrupt Enable */
-			volatile uint16_t BEMPE : 1; /* [10..10] Buffer Empty Interrupt Enable */
-			volatile uint16_t CTRE : 1;  /* [11..11] Control Transfer Stage Transition Interrupt Enable */
-			volatile uint16_t DVSE : 1;  /* [12..12] Device State Transition Interrupt Enable */
-			volatile uint16_t SOFE : 1;  /* [13..13] Frame Number Update Interrupt Enable */
-			volatile uint16_t RSME : 1;  /* [14..14] Resume Interrupt Enable */
-			volatile uint16_t VBSE : 1;  /* [15..15] VBUS Interrupt Enable */
-		} INTENB0_b;
-	};
-
-	union {
-		volatile uint16_t INTENB1; /* (@ 0x00000032) Interrupt Enable Register 1 */
-
-		struct {
-			volatile uint16_t PDDETINTE0 : 1; /* [0..0] PDDETINT0 Detection Interrupt Enable */
-			uint16_t : 3;
-			volatile uint16_t SACKE : 1;   /* [4..4] Setup Transaction Normal Response Interrupt Enable */
-			volatile uint16_t SIGNE : 1;   /* [5..5] Setup Transaction Error Interrupt Enable */
-			volatile uint16_t EOFERRE : 1; /* [6..6] EOF Error Detection Interrupt Enable */
-			uint16_t : 4;
-			volatile uint16_t ATTCHE : 1; /* [11..11] Connection Detection Interrupt Enable */
-			volatile uint16_t DTCHE : 1;  /* [12..12] Disconnection Detection Interrupt Enable */
-			uint16_t : 1;
-			volatile uint16_t BCHGE : 1;  /* [14..14] USB Bus Change Interrupt Enable */
-			volatile uint16_t OVRCRE : 1; /* [15..15] Overcurrent Input Change Interrupt Enable */
-		} INTENB1_b;
-	};
-	volatile const uint16_t RESERVED7;
-
-	union {
-		volatile uint16_t BRDYENB; /* (@ 0x00000036) BRDY Interrupt Enable Register */
-
-		struct {
-			volatile uint16_t PIPE0BRDYE : 1; /* [0..0] BRDY Interrupt Enable for PIPE */
-			volatile uint16_t PIPE1BRDYE : 1; /* [1..1] BRDY Interrupt Enable for PIPE */
-			volatile uint16_t PIPE2BRDYE : 1; /* [2..2] BRDY Interrupt Enable for PIPE */
-			volatile uint16_t PIPE3BRDYE : 1; /* [3..3] BRDY Interrupt Enable for PIPE */
-			volatile uint16_t PIPE4BRDYE : 1; /* [4..4] BRDY Interrupt Enable for PIPE */
-			volatile uint16_t PIPE5BRDYE : 1; /* [5..5] BRDY Interrupt Enable for PIPE */
-			volatile uint16_t PIPE6BRDYE : 1; /* [6..6] BRDY Interrupt Enable for PIPE */
-			volatile uint16_t PIPE7BRDYE : 1; /* [7..7] BRDY Interrupt Enable for PIPE */
-			volatile uint16_t PIPE8BRDYE : 1; /* [8..8] BRDY Interrupt Enable for PIPE */
-			volatile uint16_t PIPE9BRDYE : 1; /* [9..9] BRDY Interrupt Enable for PIPE */
-			uint16_t : 6;
-		} BRDYENB_b;
-	};
-
-	union {
-		volatile uint16_t NRDYENB; /* (@ 0x00000038) NRDY Interrupt Enable Register */
-
-		struct {
-			volatile uint16_t PIPE0NRDYE : 1; /* [0..0] NRDY Interrupt Enable for PIPE */
-			volatile uint16_t PIPE1NRDYE : 1; /* [1..1] NRDY Interrupt Enable for PIPE */
-			volatile uint16_t PIPE2NRDYE : 1; /* [2..2] NRDY Interrupt Enable for PIPE */
-			volatile uint16_t PIPE3NRDYE : 1; /* [3..3] NRDY Interrupt Enable for PIPE */
-			volatile uint16_t PIPE4NRDYE : 1; /* [4..4] NRDY Interrupt Enable for PIPE */
-			volatile uint16_t PIPE5NRDYE : 1; /* [5..5] NRDY Interrupt Enable for PIPE */
-			volatile uint16_t PIPE6NRDYE : 1; /* [6..6] NRDY Interrupt Enable for PIPE */
-			volatile uint16_t PIPE7NRDYE : 1; /* [7..7] NRDY Interrupt Enable for PIPE */
-			volatile uint16_t PIPE8NRDYE : 1; /* [8..8] NRDY Interrupt Enable for PIPE */
-			volatile uint16_t PIPE9NRDYE : 1; /* [9..9] NRDY Interrupt Enable for PIPE */
-			uint16_t : 6;
-		} NRDYENB_b;
-	};
-
-	union {
-		volatile uint16_t BEMPENB; /* (@ 0x0000003A) BEMP Interrupt Enable Register */
-
-		struct {
-			volatile uint16_t PIPE0BEMPE : 1; /* [0..0] BEMP Interrupt Enable for PIPE */
-			volatile uint16_t PIPE1BEMPE : 1; /* [1..1] BEMP Interrupt Enable for PIPE */
-			volatile uint16_t PIPE2BEMPE : 1; /* [2..2] BEMP Interrupt Enable for PIPE */
-			volatile uint16_t PIPE3BEMPE : 1; /* [3..3] BEMP Interrupt Enable for PIPE */
-			volatile uint16_t PIPE4BEMPE : 1; /* [4..4] BEMP Interrupt Enable for PIPE */
-			volatile uint16_t PIPE5BEMPE : 1; /* [5..5] BEMP Interrupt Enable for PIPE */
-			volatile uint16_t PIPE6BEMPE : 1; /* [6..6] BEMP Interrupt Enable for PIPE */
-			volatile uint16_t PIPE7BEMPE : 1; /* [7..7] BEMP Interrupt Enable for PIPE */
-			volatile uint16_t PIPE8BEMPE : 1; /* [8..8] BEMP Interrupt Enable for PIPE */
-			volatile uint16_t PIPE9BEMPE : 1; /* [9..9] BEMP Interrupt Enable for PIPE */
-			uint16_t : 6;
-		} BEMPENB_b;
-	};
-
-	union {
-		volatile uint16_t SOFCFG; /* (@ 0x0000003C) SOF Output Configuration Register */
-
-		struct {
-			uint16_t : 4;
-			volatile const uint16_t EDGESTS : 1; /* [4..4] Edge Interrupt Output Status Monitor */
-			volatile uint16_t INTL : 1;	     /* [5..5] Interrupt Output Sense Select */
-			volatile uint16_t BRDYM : 1;	     /* [6..6] BRDY Interrupt Status Clear Timing */
-			uint16_t : 1;
-			volatile uint16_t TRNENSEL : 1; /* [8..8] Transaction-Enabled Time Select */
-			uint16_t : 7;
-		} SOFCFG_b;
-	};
-
-	union {
-		volatile uint16_t PHYSET; /* (@ 0x0000003E) PHY Setting Register */
-
-		struct {
-			volatile uint16_t DIRPD : 1;	/* [0..0] Power-Down Control */
-			volatile uint16_t PLLRESET : 1; /* [1..1] PLL Reset Control */
-			uint16_t : 1;
-			volatile uint16_t CDPEN : 1;  /* [3..3] Charging Downstream Port Enable */
-			volatile uint16_t CLKSEL : 2; /* [5..4] Input System Clock Frequency */
-			uint16_t : 2;
-			volatile uint16_t REPSEL : 2; /* [9..8] Terminating Resistance Adjustment Cycle */
-			uint16_t : 1;
-			volatile uint16_t REPSTART : 1; /* [11..11] Forcibly Start Terminating Resistance Adjustment */
-			uint16_t : 3;
-			volatile uint16_t HSEB : 1; /* [15..15] CL-Only Mode */
-		} PHYSET_b;
-	};
-
-	union {
-		volatile uint16_t INTSTS0; /* (@ 0x00000040) Interrupt Status Register 0 */
-
-		struct {
-			volatile const uint16_t CTSQ : 3;  /* [2..0] Control Transfer Stage */
-			volatile uint16_t VALID : 1;	   /* [3..3] USB Request Reception */
-			volatile const uint16_t DVSQ : 3;  /* [6..4] Device State */
-			volatile const uint16_t VBSTS : 1; /* [7..7] VBUS Input Status */
-			volatile const uint16_t BRDY : 1;  /* [8..8] Buffer Ready Interrupt Status */
-			volatile const uint16_t NRDY : 1;  /* [9..9] Buffer Not Ready Interrupt Status */
-			volatile const uint16_t BEMP : 1;  /* [10..10] Buffer Empty Interrupt Status */
-			volatile uint16_t CTRT : 1;	   /* [11..11] Control Transfer Stage Transition Interrupt Status */
-			volatile uint16_t DVST : 1;	   /* [12..12] Device State Transition Interrupt Status */
-			volatile uint16_t SOFR : 1;	   /* [13..13] Frame Number Refresh Interrupt Status */
-			volatile uint16_t RESM : 1;	   /* [14..14] Resume Interrupt Status */
-			volatile uint16_t VBINT : 1;	   /* [15..15] VBUS Interrupt Status */
-		} INTSTS0_b;
-	};
-
-	union {
-		volatile uint16_t INTSTS1; /* (@ 0x00000042) Interrupt Status Register 1 */
-
-		struct {
-			volatile uint16_t PDDETINT0 : 1; /* [0..0] PDDET0 Detection Interrupt Status */
-			uint16_t : 3;
-			volatile uint16_t SACK : 1;   /* [4..4] Setup Transaction Normal Response Interrupt Status */
-			volatile uint16_t SIGN : 1;   /* [5..5] Setup Transaction Error Interrupt Status */
-			volatile uint16_t EOFERR : 1; /* [6..6] EOF Error Detection Interrupt Status */
-			uint16_t : 1;
-			volatile uint16_t LPMEND : 1;	/* [8..8] LPM Transaction End Interrupt Status */
-			volatile uint16_t L1RSMEND : 1; /* [9..9] L1 Resume End Interrupt Status */
-			uint16_t : 1;
-			volatile uint16_t ATTCH : 1; /* [11..11] ATTCH Interrupt Status */
-			volatile uint16_t DTCH : 1;  /* [12..12] USB Disconnection Detection Interrupt Status */
-			uint16_t : 1;
-			volatile uint16_t BCHG : 1;  /* [14..14] USB Bus Change Interrupt Status */
-			volatile uint16_t OVRCR : 1; /* [15..15] Overcurrent Input Change Interrupt Status */
-		} INTSTS1_b;
-	};
-	volatile const uint16_t RESERVED8;
-
-	union {
-		volatile uint16_t BRDYSTS; /* (@ 0x00000046) BRDY Interrupt Status Register */
-
-		struct {
-			volatile uint16_t PIPE0BRDY : 1; /* [0..0] BRDY Interrupt Status for PIPE */
-			volatile uint16_t PIPE1BRDY : 1; /* [1..1] BRDY Interrupt Status for PIPE */
-			volatile uint16_t PIPE2BRDY : 1; /* [2..2] BRDY Interrupt Status for PIPE */
-			volatile uint16_t PIPE3BRDY : 1; /* [3..3] BRDY Interrupt Status for PIPE */
-			volatile uint16_t PIPE4BRDY : 1; /* [4..4] BRDY Interrupt Status for PIPE */
-			volatile uint16_t PIPE5BRDY : 1; /* [5..5] BRDY Interrupt Status for PIPE */
-			volatile uint16_t PIPE6BRDY : 1; /* [6..6] BRDY Interrupt Status for PIPE */
-			volatile uint16_t PIPE7BRDY : 1; /* [7..7] BRDY Interrupt Status for PIPE */
-			volatile uint16_t PIPE8BRDY : 1; /* [8..8] BRDY Interrupt Status for PIPE */
-			volatile uint16_t PIPE9BRDY : 1; /* [9..9] BRDY Interrupt Status for PIPE */
-			uint16_t : 6;
-		} BRDYSTS_b;
-	};
-
-	union {
-		volatile uint16_t NRDYSTS; /* (@ 0x00000048) NRDY Interrupt Status Register */
-
-		struct {
-			volatile uint16_t PIPE0NRDY : 1; /* [0..0] NRDY Interrupt Status for PIPE */
-			volatile uint16_t PIPE1NRDY : 1; /* [1..1] NRDY Interrupt Status for PIPE */
-			volatile uint16_t PIPE2NRDY : 1; /* [2..2] NRDY Interrupt Status for PIPE */
-			volatile uint16_t PIPE3NRDY : 1; /* [3..3] NRDY Interrupt Status for PIPE */
-			volatile uint16_t PIPE4NRDY : 1; /* [4..4] NRDY Interrupt Status for PIPE */
-			volatile uint16_t PIPE5NRDY : 1; /* [5..5] NRDY Interrupt Status for PIPE */
-			volatile uint16_t PIPE6NRDY : 1; /* [6..6] NRDY Interrupt Status for PIPE */
-			volatile uint16_t PIPE7NRDY : 1; /* [7..7] NRDY Interrupt Status for PIPE */
-			volatile uint16_t PIPE8NRDY : 1; /* [8..8] NRDY Interrupt Status for PIPE */
-			volatile uint16_t PIPE9NRDY : 1; /* [9..9] NRDY Interrupt Status for PIPE */
-			uint16_t : 6;
-		} NRDYSTS_b;
-	};
-
-	union {
-		volatile uint16_t BEMPSTS; /* (@ 0x0000004A) BEMP Interrupt Status Register */
-
-		struct {
-			volatile uint16_t PIPE0BEMP : 1; /* [0..0] BEMP Interrupt Status for PIPE */
-			volatile uint16_t PIPE1BEMP : 1; /* [1..1] BEMP Interrupt Status for PIPE */
-			volatile uint16_t PIPE2BEMP : 1; /* [2..2] BEMP Interrupt Status for PIPE */
-			volatile uint16_t PIPE3BEMP : 1; /* [3..3] BEMP Interrupt Status for PIPE */
-			volatile uint16_t PIPE4BEMP : 1; /* [4..4] BEMP Interrupt Status for PIPE */
-			volatile uint16_t PIPE5BEMP : 1; /* [5..5] BEMP Interrupt Status for PIPE */
-			volatile uint16_t PIPE6BEMP : 1; /* [6..6] BEMP Interrupt Status for PIPE */
-			volatile uint16_t PIPE7BEMP : 1; /* [7..7] BEMP Interrupt Status for PIPE */
-			volatile uint16_t PIPE8BEMP : 1; /* [8..8] BEMP Interrupt Status for PIPE */
-			volatile uint16_t PIPE9BEMP : 1; /* [9..9] BEMP Interrupt Status for PIPE */
-			uint16_t : 6;
-		} BEMPSTS_b;
-	};
-
-	union {
-		volatile uint16_t FRMNUM; /* (@ 0x0000004C) Frame Number Register */
-
-		struct {
-			volatile const uint16_t FRNM : 11; /* [10..0] Frame NumberLatest frame number */
-			uint16_t : 3;
-			volatile uint16_t CRCE : 1; /* [14..14] Receive Data Error */
-			volatile uint16_t OVRN : 1; /* [15..15] Overrun/Underrun Detection Status */
-		} FRMNUM_b;
-	};
-
-	union {
-		volatile uint16_t UFRMNUM; /* (@ 0x0000004E) uFrame Number Register */
-
-		struct {
-			volatile const uint16_t UFRNM : 3; /* [2..0] MicroframeIndicate the microframe number. */
-			uint16_t : 12;
-			volatile uint16_t DVCHG : 1; /* [15..15] Device State Change */
-		} UFRMNUM_b;
-	};
-
-	union {
-		volatile uint16_t USBADDR; /* (@ 0x00000050) USB Address Register */
-
-		struct {
-			volatile const uint16_t USBADDR : 7; /* [6..0] USB Address In device controller mode */
-			uint16_t : 1;
-			volatile uint16_t STSRECOV0 : 3; /* [10..8] Status Recovery */
-			uint16_t : 5;
-		} USBADDR_b;
-	};
-	volatile const uint16_t RESERVED9;
-
-	union {
-		volatile uint16_t USBREQ; /* (@ 0x00000054) USB Request Type Register */
-
-		struct {
-			volatile uint16_t
-				BMREQUESTTYPE : 8; /* [7..0] Request TypeThese bits store the USB request bmRequestType value. */
-			volatile uint16_t BREQUEST : 8; /* [15..8] RequestThese bits store the USB request bRequest value. */
-		} USBREQ_b;
-	};
-
-	union {
-		volatile uint16_t USBVAL; /* (@ 0x00000056) USB Request Value Register */
-
-		struct {
-			volatile uint16_t WVALUE : 16; /* [15..0] ValueThese bits store the USB request Value value. */
-		} USBVAL_b;
-	};
-
-	union {
-		volatile uint16_t USBINDX; /* (@ 0x00000058) USB Request Index Register */
-
-		struct {
-			volatile uint16_t WINDEX : 16; /* [15..0] IndexThese bits store the USB request wIndex value. */
-		} USBINDX_b;
-	};
-
-	union {
-		volatile uint16_t USBLENG; /* (@ 0x0000005A) USB Request Length Register */
-
-		struct {
-			volatile uint16_t WLENGTH : 16; /* [15..0] LengthThese bits store the USB request wLength value. */
-		} USBLENG_b;
-	};
-
-	union {
-		volatile uint16_t DCPCFG; /* (@ 0x0000005C) DCP Configuration Register */
-
-		struct {
-			uint16_t : 4;
-			volatile uint16_t DIR : 1; /* [4..4] Transfer Direction */
-			uint16_t : 2;
-			volatile uint16_t SHTNAK : 1; /* [7..7] Pipe Disabled at End of Transfer */
-			volatile uint16_t CNTMD : 1;  /* [8..8] Continuous Transfer Mode */
-			uint16_t : 7;
-		} DCPCFG_b;
-	};
-
-	union {
-		volatile uint16_t DCPMAXP; /* (@ 0x0000005E) DCP Maximum Packet Size Register */
-
-		struct {
-			volatile uint16_t MXPS : 7; /* [6..0] Maximum Packet Size */
-			uint16_t : 5;
-			volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */
-		} DCPMAXP_b;
-	};
-
-	union {
-		volatile uint16_t DCPCTR; /* (@ 0x00000060) DCP Control Register */
-
-		struct {
-			volatile uint16_t PID : 2;  /* [1..0] Response PID */
-			volatile uint16_t CCPL : 1; /* [2..2] Control Transfer End Enable */
-			uint16_t : 2;
-			volatile const uint16_t PBUSY : 1; /* [5..5] Pipe Busy */
-			volatile const uint16_t SQMON : 1; /* [6..6] Sequence Toggle Bit Monitor */
-			volatile uint16_t SQSET : 1;	   /* [7..7] Sequence Toggle Bit Set */
-			volatile uint16_t SQCLR : 1;	   /* [8..8] Sequence Toggle Bit Clear */
-			uint16_t : 2;
-			volatile uint16_t SUREQCLR : 1; /* [11..11] SUREQ Bit Clear */
-			uint16_t : 2;
-			volatile uint16_t SUREQ : 1;	  /* [14..14] Setup Token Transmission */
-			volatile const uint16_t BSTS : 1; /* [15..15] Buffer Status */
-		} DCPCTR_b;
-	};
-	volatile const uint16_t RESERVED10;
-
-	union {
-		volatile uint16_t PIPESEL; /* (@ 0x00000064) Pipe Window Select Register */
-
-		struct {
-			volatile uint16_t PIPESEL : 4; /* [3..0] Pipe Window Select */
-			uint16_t : 12;
-		} PIPESEL_b;
-	};
-	volatile const uint16_t RESERVED11;
-
-	union {
-		volatile uint16_t PIPECFG; /* (@ 0x00000068) Pipe Configuration Register */
-
-		struct {
-			volatile uint16_t EPNUM : 4; /* [3..0] Endpoint Number */
-			volatile uint16_t DIR : 1;   /* [4..4] Transfer Direction */
-			uint16_t : 2;
-			volatile uint16_t SHTNAK : 1; /* [7..7] Pipe Disabled at End of Transfer */
-			uint16_t : 1;
-			volatile uint16_t DBLB : 1; /* [9..9] Double Buffer Mode */
-			volatile uint16_t BFRE : 1; /* [10..10] BRDY Interrupt Operation Specification */
-			uint16_t : 3;
-			volatile uint16_t TYPE : 2; /* [15..14] Transfer Type */
-		} PIPECFG_b;
-	};
-	volatile const uint16_t RESERVED12;
-
-	union {
-		volatile uint16_t PIPEMAXP; /* (@ 0x0000006C) Pipe Maximum Packet Size Register */
-
-		struct {
-			volatile uint16_t MXPS : 9; /* [8..0] Maximum Packet Size */
-			uint16_t : 3;
-			volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */
-		} PIPEMAXP_b;
-	};
-
-	union {
-		volatile uint16_t PIPEPERI; /* (@ 0x0000006E) Pipe Cycle Control Register */
-
-		struct {
-			volatile uint16_t IITV : 3; /* [2..0] Interval Error Detection Interval */
-			uint16_t : 9;
-			volatile uint16_t IFIS : 1; /* [12..12] Isochronous IN Buffer Flush */
-			uint16_t : 3;
-		} PIPEPERI_b;
-	};
-
-	union {
-		volatile uint16_t PIPE_CTR[9]; /* (@ 0x00000070) Pipe [0..8] Control Register */
-
-		struct {
-			volatile uint16_t PID : 2; /* [1..0] Response PID */
-			uint16_t : 3;
-			volatile const uint16_t PBUSY : 1; /* [5..5] Pipe Busy */
-			volatile const uint16_t SQMON : 1; /* [6..6] Sequence Toggle Bit Confirmation */
-			volatile uint16_t SQSET : 1;	   /* [7..7] Sequence Toggle Bit Set */
-			volatile uint16_t SQCLR : 1;	   /* [8..8] Sequence Toggle Bit Clear */
-			volatile uint16_t ACLRM : 1;	   /* [9..9] Auto Buffer Clear Mode */
-			volatile uint16_t ATREPM : 1;	   /* [10..10] Auto Response Mode */
-			uint16_t : 1;
-			volatile const uint16_t CSSTS : 1;  /* [12..12] CSSTS Status */
-			volatile uint16_t CSCLR : 1;	    /* [13..13] CSPLIT Status Clear */
-			volatile const uint16_t INBUFM : 1; /* [14..14] Transmit Buffer Monitor */
-			volatile const uint16_t BSTS : 1;   /* [15..15] Buffer Status */
-		} PIPE_CTR_b[9];
-	};
-	volatile const uint16_t RESERVED13;
-	volatile const uint32_t RESERVED14[3];
-	volatile LINK_REG_PIPE_TR_t PIPE_TR[5]; /* (@ 0x00000090) Pipe Transaction Counter Registers */
-	volatile const uint32_t RESERVED15[3];
-
-	union {
-		volatile uint16_t USBBCCTRL0; /* (@ 0x000000B0) BC Control Register 0 */
-
-		struct {
-			volatile uint16_t RPDME0 : 1;	/* [0..0] D- Pin Pull-Down Control */
-			volatile uint16_t IDPSRCE0 : 1; /* [1..1] D+ Pin IDPSRC Output Control */
-			volatile uint16_t
-				IDMSINKE0 : 1;		/* [2..2] D- Pin 0.6 V Input Detection (Comparator and Sink) Control */
-			volatile uint16_t VDPSRCE0 : 1; /* [3..3] D+ Pin VDPSRC (0.6 V) Output Control */
-			volatile uint16_t
-				IDPSINKE0 : 1;		/* [4..4] D+ Pin 0.6 V Input Detection (Comparator and Sink) Control */
-			volatile uint16_t VDMSRCE0 : 1; /* [5..5] D- Pin VDMSRC (0.6 V) Output Control */
-			uint16_t : 1;
-			volatile uint16_t BATCHGE0 : 1; /* [7..7] BC (Battery Charger) Function Ch0 General Enable Control */
-			volatile const uint16_t CHGDETSTS0 : 1; /* [8..8] D- Pin 0.6 V Input Detection Status */
-			volatile const uint16_t PDDETSTS0 : 1;	/* [9..9] D+ Pin 0.6 V Input Detection Status */
-			uint16_t : 6;
-		} USBBCCTRL0_b;
-	};
-	volatile const uint16_t RESERVED16;
-	volatile const uint32_t RESERVED17[4];
-
-	union {
-		volatile uint16_t UCKSEL; /* (@ 0x000000C4) USB Clock Selection Register */
-
-		struct {
-			volatile uint16_t UCKSELC : 1; /* [0..0] USB Clock Selection */
-			uint16_t : 15;
-		} UCKSEL_b;
-	};
-	volatile const uint16_t RESERVED18;
-	volatile const uint32_t RESERVED19;
-
-	union {
-		volatile uint16_t USBMC; /* (@ 0x000000CC) USB Module Control Register */
-
-		struct {
-			volatile uint16_t VDDUSBE : 1; /* [0..0] USB Reference Power Supply Circuit On/Off Control */
-			uint16_t : 6;
-			volatile uint16_t VDCEN : 1; /* [7..7] USB Regulator On/Off Control */
-			uint16_t : 8;
-		} USBMC_b;
-	};
-	volatile const uint16_t RESERVED20;
-
-	union {
-		volatile uint16_t DEVADD[10]; /* (@ 0x000000D0) Device Address Configuration Register */
-
-		struct {
-			uint16_t : 6;
-			volatile uint16_t USBSPD : 2;  /* [7..6] Transfer Speed of Communication Target Device */
-			volatile uint16_t HUBPORT : 3; /* [10..8] Communication Target Connecting Hub Port */
-			volatile uint16_t UPPHUB : 4;  /* [14..11] Communication Target Connecting Hub Register */
-			uint16_t : 1;
-		} DEVADD_b[10];
-	};
-	volatile const uint32_t RESERVED21[3];
-
-	union {
-		volatile uint32_t PHYSLEW; /* (@ 0x000000F0) PHY Cross Point Adjustment Register */
-
-		struct {
-			volatile uint32_t SLEWR00 : 1; /* [0..0] Receiver Cross Point Adjustment 00 */
-			volatile uint32_t SLEWR01 : 1; /* [1..1] Receiver Cross Point Adjustment 01 */
-			volatile uint32_t SLEWF00 : 1; /* [2..2] Receiver Cross Point Adjustment 00 */
-			volatile uint32_t SLEWF01 : 1; /* [3..3] Receiver Cross Point Adjustment 01 */
-			uint32_t : 28;
-		} PHYSLEW_b;
-	};
-	volatile const uint32_t RESERVED22[3];
-
-	union {
-		volatile uint16_t LPCTRL; /* (@ 0x00000100) Low Power Control Register */
-
-		struct {
-			uint16_t : 7;
-			volatile uint16_t HWUPM : 1; /* [7..7] Resume Return Mode Setting */
-			uint16_t : 8;
-		} LPCTRL_b;
-	};
-
-	union {
-		volatile uint16_t LPSTS; /* (@ 0x00000102) Low Power Status Register */
-
-		struct {
-			uint16_t : 14;
-			volatile uint16_t SUSPENDM : 1; /* [14..14] UTMI SuspendM Control */
-			uint16_t : 1;
-		} LPSTS_b;
-	};
-	volatile const uint32_t RESERVED23[15];
-
-	union {
-		volatile uint16_t BCCTRL; /* (@ 0x00000140) Battery Charging Control Register */
-
-		struct {
-			volatile uint16_t IDPSRCE : 1;	/* [0..0] IDPSRC Control */
-			volatile uint16_t IDMSINKE : 1; /* [1..1] IDMSINK Control */
-			volatile uint16_t VDPSRCE : 1;	/* [2..2] VDPSRC Control */
-			volatile uint16_t IDPSINKE : 1; /* [3..3] IDPSINK Control */
-			volatile uint16_t VDMSRCE : 1;	/* [4..4] VDMSRC Control */
-			volatile uint16_t DCPMODE : 1;	/* [5..5] DCP Mode Control */
-			uint16_t : 2;
-			volatile const uint16_t CHGDETSTS : 1; /* [8..8] CHGDET Status */
-			volatile const uint16_t PDDETSTS : 1;  /* [9..9] PDDET Status */
-			uint16_t : 6;
-		} BCCTRL_b;
-	};
-	volatile const uint16_t RESERVED24;
-
-	union {
-		volatile uint16_t PL1CTRL1; /* (@ 0x00000144) Function L1 Control Register 1 */
-
-		struct {
-			volatile uint16_t L1RESPEN : 1; /* [0..0] L1 Response Enable */
-			volatile uint16_t L1RESPMD : 2; /* [2..1] L1 Response Mode */
-			volatile uint16_t L1NEGOMD : 1; /* [3..3] L1 Response Negotiation Control. */
-			volatile const uint16_t
-				DVSQ : 4;	       /* [7..4] DVSQ Extension.DVSQ[3] is Mirror of DVSQ[2:0] in INTSTS0. */
-			volatile uint16_t HIRDTHR : 4; /* [11..8] L1 Response Negotiation Threshold Value */
-			uint16_t : 2;
-			volatile uint16_t L1EXTMD : 1; /* [14..14] PHY Control Mode at L1 Return */
-			uint16_t : 1;
-		} PL1CTRL1_b;
-	};
-
-	union {
-		volatile uint16_t PL1CTRL2; /* (@ 0x00000146) Function L1 Control Register 2 */
-
-		struct {
-			uint16_t : 8;
-			volatile uint16_t HIRDMON : 4; /* [11..8] HIRD Value Monitor */
-			volatile uint16_t RWEMON : 1;  /* [12..12] RWE Value Monitor */
-			uint16_t : 3;
-		} PL1CTRL2_b;
-	};
-
-	union {
-		volatile uint16_t HL1CTRL1; /* (@ 0x00000148) Host L1 Control Register 1 */
-
-		struct {
-			volatile uint16_t L1REQ : 1;	      /* [0..0] L1 Transition Request */
-			volatile const uint16_t L1STATUS : 2; /* [2..1] L1 Request Completion Status */
-			uint16_t : 13;
-		} HL1CTRL1_b;
-	};
-
-	union {
-		volatile uint16_t HL1CTRL2; /* (@ 0x0000014A) Host L1 Control Register 2 */
-
-		struct {
-			volatile uint16_t L1ADDR : 4; /* [3..0] LPM Token DeviceAddress */
-			uint16_t : 4;
-			volatile uint16_t HIRD : 4;  /* [11..8] LPM Token HIRD */
-			volatile uint16_t L1RWE : 1; /* [12..12] LPM Token L1 Remote Wake Enable */
-			uint16_t : 2;
-			volatile uint16_t BESL : 1; /* [15..15] BESL & Alternate HIRD */
-		} HL1CTRL2_b;
-	};
-	volatile const uint32_t RESERVED25[5];
-
-	union {
-		volatile const uint32_t DPUSR0R; /* (@ 0x00000160) Deep Standby USB Transceiver Control/Pin Monitor Register */
-
-		struct {
-			uint32_t : 20;
-			volatile const uint32_t
-				DOVCAHM : 1; /* [20..20] OVRCURA InputIndicates OVRCURA input signal on the HS side of USB port. */
-			volatile const uint32_t
-				DOVCBHM : 1; /* [21..21] OVRCURB InputIndicates OVRCURB input signal on the HS side of USB port. */
-			uint32_t : 1;
-			volatile const uint32_t
-				DVBSTSHM : 1; /* [23..23] VBUS InputIndicates VBUS input signal on the HS side of USB port. */
-			uint32_t : 8;
-		} DPUSR0R_b;
-	};
-
-	union {
-		volatile uint32_t DPUSR1R; /* (@ 0x00000164) Deep Standby USB Suspend/Resume Interrupt Register */
-
-		struct {
-			uint32_t : 4;
-			volatile uint32_t DOVCAHE : 1; /* [4..4] OVRCURA Interrupt Enable Clear */
-			volatile uint32_t DOVCBHE : 1; /* [5..5] OVRCURB Interrupt Enable Clear */
-			uint32_t : 1;
-			volatile uint32_t DVBSTSHE : 1; /* [7..7] VBUS Interrupt Enable/Clear */
-			uint32_t : 12;
-			volatile const uint32_t DOVCAH : 1; /* [20..20] Indication of Return from OVRCURA Interrupt Source */
-			volatile const uint32_t DOVCBH : 1; /* [21..21] Indication of Return from OVRCURB Interrupt Source */
-			uint32_t : 1;
-			volatile const uint32_t DVBSTSH : 1; /* [23..23] Indication of Return from VBUS Interrupt Source */
-			uint32_t : 8;
-		} DPUSR1R_b;
-	};
-
-	union {
-		volatile uint16_t DPUSR2R; /* (@ 0x00000168) Deep Standby USB Suspend/Resume Interrupt Register */
-
-		struct {
-			volatile const uint16_t DPINT : 1; /* [0..0] Indication of Return from DP Interrupt Source */
-			volatile const uint16_t DMINT : 1; /* [1..1] Indication of Return from DM Interrupt Source */
-			uint16_t : 2;
-			volatile const uint16_t
-				DPVAL : 1; /* [4..4] DP InputIndicates DP input signal on the HS side of USB port. */
-			volatile const uint16_t
-				DMVAL : 1; /* [5..5] DM InputIndicates DM input signal on the HS side of USB port. */
-			uint16_t : 2;
-			volatile uint16_t DPINTE : 1; /* [8..8] DP Interrupt Enable Clear */
-			volatile uint16_t DMINTE : 1; /* [9..9] DM Interrupt Enable Clear */
-			uint16_t : 6;
-		} DPUSR2R_b;
-	};
-
-	union {
-		volatile uint16_t DPUSRCR; /* (@ 0x0000016A) Deep Standby USB Suspend/Resume Command Register */
-
-		struct {
-			volatile uint16_t FIXPHY : 1;	/* [0..0] USB Transceiver Control Fix */
-			volatile uint16_t FIXPHYPD : 1; /* [1..1] USB Transceiver Control Fix for PLL */
-			uint16_t : 14;
-		} DPUSRCR_b;
-	};
-	volatile const uint32_t RESERVED26[165];
-
-	union {
-		volatile uint32_t
-			DPUSR0R_FS; /* (@ 0x00000400) Deep Software Standby USB Transceiver Control/Pin Monitor Register */
-
-		struct {
-			volatile uint32_t SRPC0 : 1; /* [0..0] USB Single End Receiver Control */
-			volatile uint32_t RPUE0 : 1; /* [1..1] DP Pull-Up Resistor Control */
-			uint32_t : 1;
-			volatile uint32_t DRPD0 : 1;   /* [3..3] D+/D- Pull-Down Resistor Control */
-			volatile uint32_t FIXPHY0 : 1; /* [4..4] USB Transceiver Output Fix */
-			uint32_t : 11;
-			volatile const uint32_t DP0 : 1; /* [16..16] USB0 D+ InputIndicates the D+ input signal of the USB. */
-			volatile const uint32_t DM0 : 1; /* [17..17] USB D-InputIndicates the D- input signal of the USB. */
-			uint32_t : 2;
-			volatile const uint32_t
-				DOVCA0 : 1; /* [20..20] USB OVRCURA InputIndicates the OVRCURA input signal of the USB. */
-			volatile const uint32_t
-				DOVCB0 : 1; /* [21..21] USB OVRCURB InputIndicates the OVRCURB input signal of the USB. */
-			uint32_t : 1;
-			volatile const uint32_t
-				DVBSTS0 : 1; /* [23..23] USB VBUS InputIndicates the VBUS input signal of the USB. */
-			uint32_t : 8;
-		} DPUSR0R_FS_b;
-	};
-
-	union {
-		volatile uint32_t DPUSR1R_FS; /* (@ 0x00000404) Deep Software Standby USB Suspend/Resume Interrupt Register */
-
-		struct {
-			volatile uint32_t DPINTE0 : 1; /* [0..0] USB DP Interrupt Enable/Clear */
-			volatile uint32_t DMINTE0 : 1; /* [1..1] USB DM Interrupt Enable/Clear */
-			uint32_t : 2;
-			volatile uint32_t DOVRCRAE0 : 1; /* [4..4] USB OVRCURA Interrupt Enable/Clear */
-			volatile uint32_t DOVRCRBE0 : 1; /* [5..5] USB OVRCURB Interrupt Enable/Clear */
-			uint32_t : 1;
-			volatile uint32_t DVBSE0 : 1; /* [7..7] USB VBUS Interrupt Enable/Clear */
-			uint32_t : 8;
-			volatile const uint32_t DPINT0 : 1; /* [16..16] USB DP Interrupt Source Recovery */
-			volatile const uint32_t DMINT0 : 1; /* [17..17] USB DM Interrupt Source Recovery */
-			uint32_t : 2;
-			volatile const uint32_t DOVRCRA0 : 1; /* [20..20] USB OVRCURA Interrupt Source Recovery */
-			volatile const uint32_t DOVRCRB0 : 1; /* [21..21] USB OVRCURB Interrupt Source Recovery */
-			uint32_t : 1;
-			volatile const uint32_t DVBINT0 : 1; /* [23..23] USB VBUS Interrupt Source Recovery */
-			uint32_t : 8;
-		} DPUSR1R_FS_b;
-	};
+  union {
+    volatile uint16_t SYSCFG; /* (@ 0x00000000) System Configuration Control Register */
+
+    struct {
+      volatile uint16_t USBE : 1; /* [0..0] USB Operation Enable */
+      uint16_t : 2;
+      volatile uint16_t DMRPU : 1; /* [3..3] D- Line Resistor Control */
+      volatile uint16_t DPRPU : 1; /* [4..4] D+ Line Resistor Control */
+      volatile uint16_t DRPD : 1;  /* [5..5] D+/D- Line Resistor Control */
+      volatile uint16_t DCFM : 1;  /* [6..6] Controller Function Select */
+      uint16_t : 1;
+      volatile uint16_t CNEN : 1; /* [8..8] CNEN Single End Receiver Enable */
+      uint16_t : 1;
+      volatile uint16_t SCKE : 1; /* [10..10] USB Clock Enable */
+      uint16_t : 5;
+    } SYSCFG_b;
+  };
+
+  union {
+    volatile uint16_t BUSWAIT; /* (@ 0x00000002) CPU Bus Wait Register */
+
+    struct {
+      volatile uint16_t
+        BWAIT : 4; /* [3..0] CPU Bus Access Wait Specification BWAIT waits (BWAIT+2 access cycles) */
+      uint16_t : 12;
+    } BUSWAIT_b;
+  };
+
+  union {
+    volatile const uint16_t SYSSTS0; /* (@ 0x00000004) System Configuration Status Register 0 */
+
+    struct {
+      volatile const uint16_t LNST : 2;  /* [1..0] USB Data Line Status Monitor */
+      volatile const uint16_t IDMON : 1; /* [2..2] External ID0 Input Pin Monitor */
+      uint16_t : 2;
+      volatile const uint16_t
+        SOFEA : 1; /* [5..5] SOF Active Monitor While Host Controller Function is Selected. */
+      volatile const uint16_t HTACT : 1; /* [6..6] USB Host Sequencer Status Monitor */
+      uint16_t : 7;
+      volatile const uint16_t
+        OVCMON : 2; /* [15..14] External USB0_OVRCURA/ USB0_OVRCURB Input Pin Monitor */
+    } SYSSTS0_b;
+  };
+
+  union {
+    volatile const uint16_t PLLSTA; /* (@ 0x00000006) PLL Status Register */
+
+    struct {
+      volatile const uint16_t PLLLOCK : 1; /* [0..0] PLL Lock Flag */
+      uint16_t : 15;
+    } PLLSTA_b;
+  };
+
+  union {
+    volatile uint16_t DVSTCTR0; /* (@ 0x00000008) Device State Control Register 0 */
+
+    struct {
+      volatile const uint16_t RHST : 3; /* [2..0] USB Bus Reset Status */
+      uint16_t : 1;
+      volatile uint16_t UACT : 1;    /* [4..4] USB Bus Enable */
+      volatile uint16_t RESUME : 1;  /* [5..5] Resume Output */
+      volatile uint16_t USBRST : 1;  /* [6..6] USB Bus Reset Output */
+      volatile uint16_t RWUPE : 1;   /* [7..7] Wakeup Detection Enable */
+      volatile uint16_t WKUP : 1;    /* [8..8] Wakeup Output */
+      volatile uint16_t VBUSEN : 1;  /* [9..9] USB_VBUSEN Output Pin Control */
+      volatile uint16_t EXICEN : 1;  /* [10..10] USB_EXICEN Output Pin Control */
+      volatile uint16_t HNPBTOA : 1; /* [11..11] Host Negotiation Protocol (HNP) */
+      uint16_t : 4;
+    } DVSTCTR0_b;
+  };
+  volatile const uint16_t RESERVED;
+
+  union {
+    volatile uint16_t TESTMODE; /* (@ 0x0000000C) USB Test Mode Register */
+
+    struct {
+      volatile uint16_t UTST : 4; /* [3..0] Test Mode */
+      uint16_t : 12;
+    } TESTMODE_b;
+  };
+  volatile const uint16_t RESERVED1;
+  volatile const uint32_t RESERVED2;
+
+  union {
+    volatile uint32_t CFIFO; /* (@ 0x00000014) CFIFO Port Register */
+
+    struct {
+      union {
+        volatile uint16_t CFIFOL; /* (@ 0x00000014) CFIFO Port Register L */
+        volatile uint8_t CFIFOLL; /* (@ 0x00000014) CFIFO Port Register LL */
+      };
+
+      union {
+        volatile uint16_t CFIFOH; /* (@ 0x00000016) CFIFO Port Register H */
+
+        struct {
+          volatile const uint8_t RESERVED3;
+          volatile uint8_t CFIFOHH; /* (@ 0x00000017) CFIFO Port Register HH */
+        };
+      };
+    };
+  };
+
+  union {
+    volatile uint32_t D0FIFO; /* (@ 0x00000018) D0FIFO Port Register */
+
+    struct {
+      union {
+        volatile uint16_t D0FIFOL; /* (@ 0x00000018) D0FIFO Port Register L */
+        volatile uint8_t D0FIFOLL; /* (@ 0x00000018) D0FIFO Port Register LL */
+      };
+
+      union {
+        volatile uint16_t D0FIFOH; /* (@ 0x0000001A) D0FIFO Port Register H */
+
+        struct {
+          volatile const uint8_t RESERVED4;
+          volatile uint8_t D0FIFOHH; /* (@ 0x0000001B) D0FIFO Port Register HH */
+        };
+      };
+    };
+  };
+
+  union {
+    volatile uint32_t D1FIFO; /* (@ 0x0000001C) D1FIFO Port Register */
+
+    struct {
+      union {
+        volatile uint16_t D1FIFOL; /* (@ 0x0000001C) D1FIFO Port Register L */
+        volatile uint8_t D1FIFOLL; /* (@ 0x0000001C) D1FIFO Port Register LL */
+      };
+
+      union {
+        volatile uint16_t D1FIFOH; /* (@ 0x0000001E) D1FIFO Port Register H */
+
+        struct {
+          volatile const uint8_t RESERVED5;
+          volatile uint8_t D1FIFOHH; /* (@ 0x0000001F) D1FIFO Port Register HH */
+        };
+      };
+    };
+  };
+
+  union {
+    volatile uint16_t CFIFOSEL; /* (@ 0x00000020) CFIFO Port Select Register */
+
+    struct {
+      volatile uint16_t CURPIPE : 4; /* [3..0] CFIFO Port Access Pipe Specification */
+      uint16_t : 1;
+      volatile uint16_t ISEL : 1; /* [5..5] CFIFO Port Access Direction When DCP is Selected */
+      uint16_t : 2;
+      volatile uint16_t BIGEND : 1; /* [8..8] CFIFO Port Endian Control */
+      uint16_t : 1;
+      volatile uint16_t MBW : 2; /* [11..10] CFIFO Port Access Bit Width */
+      uint16_t : 2;
+      volatile uint16_t REW : 1;  /* [14..14] Buffer Pointer Rewind */
+      volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */
+    } CFIFOSEL_b;
+  };
+
+  union {
+    volatile uint16_t CFIFOCTR; /* (@ 0x00000022) CFIFO Port Control Register */
+
+    struct {
+      volatile const uint16_t
+        DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */
+      uint16_t : 1;
+      volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */
+      volatile uint16_t BCLR : 1;	  /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */
+      volatile uint16_t BVAL : 1;	  /* [15..15] Buffer Memory Valid Flag */
+    } CFIFOCTR_b;
+  };
+  volatile const uint32_t RESERVED6;
+
+  union {
+    volatile uint16_t D0FIFOSEL; /* (@ 0x00000028) D0FIFO Port Select Register */
+
+    struct {
+      volatile uint16_t CURPIPE : 4; /* [3..0] FIFO Port Access Pipe Specification */
+      uint16_t : 4;
+      volatile uint16_t BIGEND : 1; /* [8..8] FIFO Port Endian Control */
+      uint16_t : 1;
+      volatile uint16_t MBW : 2;   /* [11..10] FIFO Port Access Bit Width */
+      volatile uint16_t DREQE : 1; /* [12..12] DMA/DTC Transfer Request Enable */
+      volatile uint16_t
+        DCLRM : 1; /* [13..13] Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read */
+      volatile uint16_t REW : 1;  /* [14..14] Buffer Pointer RewindNote: Only 0 can be read. */
+      volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */
+    } D0FIFOSEL_b;
+  };
+
+  union {
+    volatile uint16_t D0FIFOCTR; /* (@ 0x0000002A) D0FIFO Port Control Register */
+
+    struct {
+      volatile const uint16_t
+        DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */
+      uint16_t : 1;
+      volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */
+      volatile uint16_t BCLR : 1;	  /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */
+      volatile uint16_t BVAL : 1;	  /* [15..15] Buffer Memory Valid Flag */
+    } D0FIFOCTR_b;
+  };
+
+  union {
+    volatile uint16_t D1FIFOSEL; /* (@ 0x0000002C) D1FIFO Port Select Register */
+
+    struct {
+      volatile uint16_t CURPIPE : 4; /* [3..0] FIFO Port Access Pipe Specification */
+      uint16_t : 4;
+      volatile uint16_t BIGEND : 1; /* [8..8] FIFO Port Endian Control */
+      uint16_t : 1;
+      volatile uint16_t MBW : 2;   /* [11..10] FIFO Port Access Bit Width */
+      volatile uint16_t DREQE : 1; /* [12..12] DMA/DTC Transfer Request Enable */
+      volatile uint16_t
+        DCLRM : 1; /* [13..13] Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read */
+      volatile uint16_t REW : 1;  /* [14..14] Buffer Pointer Rewind */
+      volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */
+    } D1FIFOSEL_b;
+  };
+
+  union {
+    volatile uint16_t D1FIFOCTR; /* (@ 0x0000002E) D1FIFO Port Control Register */
+
+    struct {
+      volatile const uint16_t
+        DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */
+      uint16_t : 1;
+      volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */
+      volatile uint16_t BCLR : 1;	  /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */
+      volatile uint16_t BVAL : 1;	  /* [15..15] Buffer Memory Valid Flag */
+    } D1FIFOCTR_b;
+  };
+
+  union {
+    volatile uint16_t INTENB0; /* (@ 0x00000030) Interrupt Enable Register 0 */
+
+    struct {
+      uint16_t : 8;
+      volatile uint16_t BRDYE : 1; /* [8..8] Buffer Ready Interrupt Enable */
+      volatile uint16_t NRDYE : 1; /* [9..9] Buffer Not Ready Response Interrupt Enable */
+      volatile uint16_t BEMPE : 1; /* [10..10] Buffer Empty Interrupt Enable */
+      volatile uint16_t CTRE : 1;  /* [11..11] Control Transfer Stage Transition Interrupt Enable */
+      volatile uint16_t DVSE : 1;  /* [12..12] Device State Transition Interrupt Enable */
+      volatile uint16_t SOFE : 1;  /* [13..13] Frame Number Update Interrupt Enable */
+      volatile uint16_t RSME : 1;  /* [14..14] Resume Interrupt Enable */
+      volatile uint16_t VBSE : 1;  /* [15..15] VBUS Interrupt Enable */
+    } INTENB0_b;
+  };
+
+  union {
+    volatile uint16_t INTENB1; /* (@ 0x00000032) Interrupt Enable Register 1 */
+
+    struct {
+      volatile uint16_t PDDETINTE0 : 1; /* [0..0] PDDETINT0 Detection Interrupt Enable */
+      uint16_t : 3;
+      volatile uint16_t SACKE : 1;   /* [4..4] Setup Transaction Normal Response Interrupt Enable */
+      volatile uint16_t SIGNE : 1;   /* [5..5] Setup Transaction Error Interrupt Enable */
+      volatile uint16_t EOFERRE : 1; /* [6..6] EOF Error Detection Interrupt Enable */
+      uint16_t : 4;
+      volatile uint16_t ATTCHE : 1; /* [11..11] Connection Detection Interrupt Enable */
+      volatile uint16_t DTCHE : 1;  /* [12..12] Disconnection Detection Interrupt Enable */
+      uint16_t : 1;
+      volatile uint16_t BCHGE : 1;  /* [14..14] USB Bus Change Interrupt Enable */
+      volatile uint16_t OVRCRE : 1; /* [15..15] Overcurrent Input Change Interrupt Enable */
+    } INTENB1_b;
+  };
+  volatile const uint16_t RESERVED7;
+
+  union {
+    volatile uint16_t BRDYENB; /* (@ 0x00000036) BRDY Interrupt Enable Register */
+
+    struct {
+      volatile uint16_t PIPE0BRDYE : 1; /* [0..0] BRDY Interrupt Enable for PIPE */
+      volatile uint16_t PIPE1BRDYE : 1; /* [1..1] BRDY Interrupt Enable for PIPE */
+      volatile uint16_t PIPE2BRDYE : 1; /* [2..2] BRDY Interrupt Enable for PIPE */
+      volatile uint16_t PIPE3BRDYE : 1; /* [3..3] BRDY Interrupt Enable for PIPE */
+      volatile uint16_t PIPE4BRDYE : 1; /* [4..4] BRDY Interrupt Enable for PIPE */
+      volatile uint16_t PIPE5BRDYE : 1; /* [5..5] BRDY Interrupt Enable for PIPE */
+      volatile uint16_t PIPE6BRDYE : 1; /* [6..6] BRDY Interrupt Enable for PIPE */
+      volatile uint16_t PIPE7BRDYE : 1; /* [7..7] BRDY Interrupt Enable for PIPE */
+      volatile uint16_t PIPE8BRDYE : 1; /* [8..8] BRDY Interrupt Enable for PIPE */
+      volatile uint16_t PIPE9BRDYE : 1; /* [9..9] BRDY Interrupt Enable for PIPE */
+      uint16_t : 6;
+    } BRDYENB_b;
+  };
+
+  union {
+    volatile uint16_t NRDYENB; /* (@ 0x00000038) NRDY Interrupt Enable Register */
+
+    struct {
+      volatile uint16_t PIPE0NRDYE : 1; /* [0..0] NRDY Interrupt Enable for PIPE */
+      volatile uint16_t PIPE1NRDYE : 1; /* [1..1] NRDY Interrupt Enable for PIPE */
+      volatile uint16_t PIPE2NRDYE : 1; /* [2..2] NRDY Interrupt Enable for PIPE */
+      volatile uint16_t PIPE3NRDYE : 1; /* [3..3] NRDY Interrupt Enable for PIPE */
+      volatile uint16_t PIPE4NRDYE : 1; /* [4..4] NRDY Interrupt Enable for PIPE */
+      volatile uint16_t PIPE5NRDYE : 1; /* [5..5] NRDY Interrupt Enable for PIPE */
+      volatile uint16_t PIPE6NRDYE : 1; /* [6..6] NRDY Interrupt Enable for PIPE */
+      volatile uint16_t PIPE7NRDYE : 1; /* [7..7] NRDY Interrupt Enable for PIPE */
+      volatile uint16_t PIPE8NRDYE : 1; /* [8..8] NRDY Interrupt Enable for PIPE */
+      volatile uint16_t PIPE9NRDYE : 1; /* [9..9] NRDY Interrupt Enable for PIPE */
+      uint16_t : 6;
+    } NRDYENB_b;
+  };
+
+  union {
+    volatile uint16_t BEMPENB; /* (@ 0x0000003A) BEMP Interrupt Enable Register */
+
+    struct {
+      volatile uint16_t PIPE0BEMPE : 1; /* [0..0] BEMP Interrupt Enable for PIPE */
+      volatile uint16_t PIPE1BEMPE : 1; /* [1..1] BEMP Interrupt Enable for PIPE */
+      volatile uint16_t PIPE2BEMPE : 1; /* [2..2] BEMP Interrupt Enable for PIPE */
+      volatile uint16_t PIPE3BEMPE : 1; /* [3..3] BEMP Interrupt Enable for PIPE */
+      volatile uint16_t PIPE4BEMPE : 1; /* [4..4] BEMP Interrupt Enable for PIPE */
+      volatile uint16_t PIPE5BEMPE : 1; /* [5..5] BEMP Interrupt Enable for PIPE */
+      volatile uint16_t PIPE6BEMPE : 1; /* [6..6] BEMP Interrupt Enable for PIPE */
+      volatile uint16_t PIPE7BEMPE : 1; /* [7..7] BEMP Interrupt Enable for PIPE */
+      volatile uint16_t PIPE8BEMPE : 1; /* [8..8] BEMP Interrupt Enable for PIPE */
+      volatile uint16_t PIPE9BEMPE : 1; /* [9..9] BEMP Interrupt Enable for PIPE */
+      uint16_t : 6;
+    } BEMPENB_b;
+  };
+
+  union {
+    volatile uint16_t SOFCFG; /* (@ 0x0000003C) SOF Output Configuration Register */
+
+    struct {
+      uint16_t : 4;
+      volatile const uint16_t EDGESTS : 1; /* [4..4] Edge Interrupt Output Status Monitor */
+      volatile uint16_t INTL : 1;	     /* [5..5] Interrupt Output Sense Select */
+      volatile uint16_t BRDYM : 1;	     /* [6..6] BRDY Interrupt Status Clear Timing */
+      uint16_t : 1;
+      volatile uint16_t TRNENSEL : 1; /* [8..8] Transaction-Enabled Time Select */
+      uint16_t : 7;
+    } SOFCFG_b;
+  };
+
+  union {
+    volatile uint16_t PHYSET; /* (@ 0x0000003E) PHY Setting Register */
+
+    struct {
+      volatile uint16_t DIRPD : 1;	/* [0..0] Power-Down Control */
+      volatile uint16_t PLLRESET : 1; /* [1..1] PLL Reset Control */
+      uint16_t : 1;
+      volatile uint16_t CDPEN : 1;  /* [3..3] Charging Downstream Port Enable */
+      volatile uint16_t CLKSEL : 2; /* [5..4] Input System Clock Frequency */
+      uint16_t : 2;
+      volatile uint16_t REPSEL : 2; /* [9..8] Terminating Resistance Adjustment Cycle */
+      uint16_t : 1;
+      volatile uint16_t REPSTART : 1; /* [11..11] Forcibly Start Terminating Resistance Adjustment */
+      uint16_t : 3;
+      volatile uint16_t HSEB : 1; /* [15..15] CL-Only Mode */
+    } PHYSET_b;
+  };
+
+  union {
+    volatile uint16_t INTSTS0; /* (@ 0x00000040) Interrupt Status Register 0 */
+
+    struct {
+      volatile const uint16_t CTSQ : 3;  /* [2..0] Control Transfer Stage */
+      volatile uint16_t VALID : 1;	   /* [3..3] USB Request Reception */
+      volatile const uint16_t DVSQ : 3;  /* [6..4] Device State */
+      volatile const uint16_t VBSTS : 1; /* [7..7] VBUS Input Status */
+      volatile const uint16_t BRDY : 1;  /* [8..8] Buffer Ready Interrupt Status */
+      volatile const uint16_t NRDY : 1;  /* [9..9] Buffer Not Ready Interrupt Status */
+      volatile const uint16_t BEMP : 1;  /* [10..10] Buffer Empty Interrupt Status */
+      volatile uint16_t CTRT : 1;	   /* [11..11] Control Transfer Stage Transition Interrupt Status */
+      volatile uint16_t DVST : 1;	   /* [12..12] Device State Transition Interrupt Status */
+      volatile uint16_t SOFR : 1;	   /* [13..13] Frame Number Refresh Interrupt Status */
+      volatile uint16_t RESM : 1;	   /* [14..14] Resume Interrupt Status */
+      volatile uint16_t VBINT : 1;	   /* [15..15] VBUS Interrupt Status */
+    } INTSTS0_b;
+  };
+
+  union {
+    volatile uint16_t INTSTS1; /* (@ 0x00000042) Interrupt Status Register 1 */
+
+    struct {
+      volatile uint16_t PDDETINT0 : 1; /* [0..0] PDDET0 Detection Interrupt Status */
+      uint16_t : 3;
+      volatile uint16_t SACK : 1;   /* [4..4] Setup Transaction Normal Response Interrupt Status */
+      volatile uint16_t SIGN : 1;   /* [5..5] Setup Transaction Error Interrupt Status */
+      volatile uint16_t EOFERR : 1; /* [6..6] EOF Error Detection Interrupt Status */
+      uint16_t : 1;
+      volatile uint16_t LPMEND : 1;	/* [8..8] LPM Transaction End Interrupt Status */
+      volatile uint16_t L1RSMEND : 1; /* [9..9] L1 Resume End Interrupt Status */
+      uint16_t : 1;
+      volatile uint16_t ATTCH : 1; /* [11..11] ATTCH Interrupt Status */
+      volatile uint16_t DTCH : 1;  /* [12..12] USB Disconnection Detection Interrupt Status */
+      uint16_t : 1;
+      volatile uint16_t BCHG : 1;  /* [14..14] USB Bus Change Interrupt Status */
+      volatile uint16_t OVRCR : 1; /* [15..15] Overcurrent Input Change Interrupt Status */
+    } INTSTS1_b;
+  };
+  volatile const uint16_t RESERVED8;
+
+  union {
+    volatile uint16_t BRDYSTS; /* (@ 0x00000046) BRDY Interrupt Status Register */
+
+    struct {
+      volatile uint16_t PIPE0BRDY : 1; /* [0..0] BRDY Interrupt Status for PIPE */
+      volatile uint16_t PIPE1BRDY : 1; /* [1..1] BRDY Interrupt Status for PIPE */
+      volatile uint16_t PIPE2BRDY : 1; /* [2..2] BRDY Interrupt Status for PIPE */
+      volatile uint16_t PIPE3BRDY : 1; /* [3..3] BRDY Interrupt Status for PIPE */
+      volatile uint16_t PIPE4BRDY : 1; /* [4..4] BRDY Interrupt Status for PIPE */
+      volatile uint16_t PIPE5BRDY : 1; /* [5..5] BRDY Interrupt Status for PIPE */
+      volatile uint16_t PIPE6BRDY : 1; /* [6..6] BRDY Interrupt Status for PIPE */
+      volatile uint16_t PIPE7BRDY : 1; /* [7..7] BRDY Interrupt Status for PIPE */
+      volatile uint16_t PIPE8BRDY : 1; /* [8..8] BRDY Interrupt Status for PIPE */
+      volatile uint16_t PIPE9BRDY : 1; /* [9..9] BRDY Interrupt Status for PIPE */
+      uint16_t : 6;
+    } BRDYSTS_b;
+  };
+
+  union {
+    volatile uint16_t NRDYSTS; /* (@ 0x00000048) NRDY Interrupt Status Register */
+
+    struct {
+      volatile uint16_t PIPE0NRDY : 1; /* [0..0] NRDY Interrupt Status for PIPE */
+      volatile uint16_t PIPE1NRDY : 1; /* [1..1] NRDY Interrupt Status for PIPE */
+      volatile uint16_t PIPE2NRDY : 1; /* [2..2] NRDY Interrupt Status for PIPE */
+      volatile uint16_t PIPE3NRDY : 1; /* [3..3] NRDY Interrupt Status for PIPE */
+      volatile uint16_t PIPE4NRDY : 1; /* [4..4] NRDY Interrupt Status for PIPE */
+      volatile uint16_t PIPE5NRDY : 1; /* [5..5] NRDY Interrupt Status for PIPE */
+      volatile uint16_t PIPE6NRDY : 1; /* [6..6] NRDY Interrupt Status for PIPE */
+      volatile uint16_t PIPE7NRDY : 1; /* [7..7] NRDY Interrupt Status for PIPE */
+      volatile uint16_t PIPE8NRDY : 1; /* [8..8] NRDY Interrupt Status for PIPE */
+      volatile uint16_t PIPE9NRDY : 1; /* [9..9] NRDY Interrupt Status for PIPE */
+      uint16_t : 6;
+    } NRDYSTS_b;
+  };
+
+  union {
+    volatile uint16_t BEMPSTS; /* (@ 0x0000004A) BEMP Interrupt Status Register */
+
+    struct {
+      volatile uint16_t PIPE0BEMP : 1; /* [0..0] BEMP Interrupt Status for PIPE */
+      volatile uint16_t PIPE1BEMP : 1; /* [1..1] BEMP Interrupt Status for PIPE */
+      volatile uint16_t PIPE2BEMP : 1; /* [2..2] BEMP Interrupt Status for PIPE */
+      volatile uint16_t PIPE3BEMP : 1; /* [3..3] BEMP Interrupt Status for PIPE */
+      volatile uint16_t PIPE4BEMP : 1; /* [4..4] BEMP Interrupt Status for PIPE */
+      volatile uint16_t PIPE5BEMP : 1; /* [5..5] BEMP Interrupt Status for PIPE */
+      volatile uint16_t PIPE6BEMP : 1; /* [6..6] BEMP Interrupt Status for PIPE */
+      volatile uint16_t PIPE7BEMP : 1; /* [7..7] BEMP Interrupt Status for PIPE */
+      volatile uint16_t PIPE8BEMP : 1; /* [8..8] BEMP Interrupt Status for PIPE */
+      volatile uint16_t PIPE9BEMP : 1; /* [9..9] BEMP Interrupt Status for PIPE */
+      uint16_t : 6;
+    } BEMPSTS_b;
+  };
+
+  union {
+    volatile uint16_t FRMNUM; /* (@ 0x0000004C) Frame Number Register */
+
+    struct {
+      volatile const uint16_t FRNM : 11; /* [10..0] Frame NumberLatest frame number */
+      uint16_t : 3;
+      volatile uint16_t CRCE : 1; /* [14..14] Receive Data Error */
+      volatile uint16_t OVRN : 1; /* [15..15] Overrun/Underrun Detection Status */
+    } FRMNUM_b;
+  };
+
+  union {
+    volatile uint16_t UFRMNUM; /* (@ 0x0000004E) uFrame Number Register */
+
+    struct {
+      volatile const uint16_t UFRNM : 3; /* [2..0] MicroframeIndicate the microframe number. */
+      uint16_t : 12;
+      volatile uint16_t DVCHG : 1; /* [15..15] Device State Change */
+    } UFRMNUM_b;
+  };
+
+  union {
+    volatile uint16_t USBADDR; /* (@ 0x00000050) USB Address Register */
+
+    struct {
+      volatile const uint16_t USBADDR : 7; /* [6..0] USB Address In device controller mode */
+      uint16_t : 1;
+      volatile uint16_t STSRECOV0 : 3; /* [10..8] Status Recovery */
+      uint16_t : 5;
+    } USBADDR_b;
+  };
+  volatile const uint16_t RESERVED9;
+
+  union {
+    volatile uint16_t USBREQ; /* (@ 0x00000054) USB Request Type Register */
+
+    struct {
+      volatile uint16_t
+        BMREQUESTTYPE : 8; /* [7..0] Request TypeThese bits store the USB request bmRequestType value. */
+      volatile uint16_t BREQUEST : 8; /* [15..8] RequestThese bits store the USB request bRequest value. */
+    } USBREQ_b;
+  };
+
+  union {
+    volatile uint16_t USBVAL; /* (@ 0x00000056) USB Request Value Register */
+
+    struct {
+      volatile uint16_t WVALUE : 16; /* [15..0] ValueThese bits store the USB request Value value. */
+    } USBVAL_b;
+  };
+
+  union {
+    volatile uint16_t USBINDX; /* (@ 0x00000058) USB Request Index Register */
+
+    struct {
+      volatile uint16_t WINDEX : 16; /* [15..0] IndexThese bits store the USB request wIndex value. */
+    } USBINDX_b;
+  };
+
+  union {
+    volatile uint16_t USBLENG; /* (@ 0x0000005A) USB Request Length Register */
+
+    struct {
+      volatile uint16_t WLENGTH : 16; /* [15..0] LengthThese bits store the USB request wLength value. */
+    } USBLENG_b;
+  };
+
+  union {
+    volatile uint16_t DCPCFG; /* (@ 0x0000005C) DCP Configuration Register */
+
+    struct {
+      uint16_t : 4;
+      volatile uint16_t DIR : 1; /* [4..4] Transfer Direction */
+      uint16_t : 2;
+      volatile uint16_t SHTNAK : 1; /* [7..7] Pipe Disabled at End of Transfer */
+      volatile uint16_t CNTMD : 1;  /* [8..8] Continuous Transfer Mode */
+      uint16_t : 7;
+    } DCPCFG_b;
+  };
+
+  union {
+    volatile uint16_t DCPMAXP; /* (@ 0x0000005E) DCP Maximum Packet Size Register */
+
+    struct {
+      volatile uint16_t MXPS : 7; /* [6..0] Maximum Packet Size */
+      uint16_t : 5;
+      volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */
+    } DCPMAXP_b;
+  };
+
+  union {
+    volatile uint16_t DCPCTR; /* (@ 0x00000060) DCP Control Register */
+
+    struct {
+      volatile uint16_t PID : 2;  /* [1..0] Response PID */
+      volatile uint16_t CCPL : 1; /* [2..2] Control Transfer End Enable */
+      uint16_t : 2;
+      volatile const uint16_t PBUSY : 1; /* [5..5] Pipe Busy */
+      volatile const uint16_t SQMON : 1; /* [6..6] Sequence Toggle Bit Monitor */
+      volatile uint16_t SQSET : 1;	   /* [7..7] Sequence Toggle Bit Set */
+      volatile uint16_t SQCLR : 1;	   /* [8..8] Sequence Toggle Bit Clear */
+      uint16_t : 2;
+      volatile uint16_t SUREQCLR : 1; /* [11..11] SUREQ Bit Clear */
+      uint16_t : 2;
+      volatile uint16_t SUREQ : 1;	  /* [14..14] Setup Token Transmission */
+      volatile const uint16_t BSTS : 1; /* [15..15] Buffer Status */
+    } DCPCTR_b;
+  };
+  volatile const uint16_t RESERVED10;
+
+  union {
+    volatile uint16_t PIPESEL; /* (@ 0x00000064) Pipe Window Select Register */
+
+    struct {
+      volatile uint16_t PIPESEL : 4; /* [3..0] Pipe Window Select */
+      uint16_t : 12;
+    } PIPESEL_b;
+  };
+  volatile const uint16_t RESERVED11;
+
+  union {
+    volatile uint16_t PIPECFG; /* (@ 0x00000068) Pipe Configuration Register */
+
+    struct {
+      volatile uint16_t EPNUM : 4; /* [3..0] Endpoint Number */
+      volatile uint16_t DIR : 1;   /* [4..4] Transfer Direction */
+      uint16_t : 2;
+      volatile uint16_t SHTNAK : 1; /* [7..7] Pipe Disabled at End of Transfer */
+      uint16_t : 1;
+      volatile uint16_t DBLB : 1; /* [9..9] Double Buffer Mode */
+      volatile uint16_t BFRE : 1; /* [10..10] BRDY Interrupt Operation Specification */
+      uint16_t : 3;
+      volatile uint16_t TYPE : 2; /* [15..14] Transfer Type */
+    } PIPECFG_b;
+  };
+  volatile const uint16_t RESERVED12;
+
+  union {
+    volatile uint16_t PIPEMAXP; /* (@ 0x0000006C) Pipe Maximum Packet Size Register */
+
+    struct {
+      volatile uint16_t MXPS : 9; /* [8..0] Maximum Packet Size */
+      uint16_t : 3;
+      volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */
+    } PIPEMAXP_b;
+  };
+
+  union {
+    volatile uint16_t PIPEPERI; /* (@ 0x0000006E) Pipe Cycle Control Register */
+
+    struct {
+      volatile uint16_t IITV : 3; /* [2..0] Interval Error Detection Interval */
+      uint16_t : 9;
+      volatile uint16_t IFIS : 1; /* [12..12] Isochronous IN Buffer Flush */
+      uint16_t : 3;
+    } PIPEPERI_b;
+  };
+
+  union {
+    volatile uint16_t PIPE_CTR[9]; /* (@ 0x00000070) Pipe [0..8] Control Register */
+
+    struct {
+      volatile uint16_t PID : 2; /* [1..0] Response PID */
+      uint16_t : 3;
+      volatile const uint16_t PBUSY : 1; /* [5..5] Pipe Busy */
+      volatile const uint16_t SQMON : 1; /* [6..6] Sequence Toggle Bit Confirmation */
+      volatile uint16_t SQSET : 1;	   /* [7..7] Sequence Toggle Bit Set */
+      volatile uint16_t SQCLR : 1;	   /* [8..8] Sequence Toggle Bit Clear */
+      volatile uint16_t ACLRM : 1;	   /* [9..9] Auto Buffer Clear Mode */
+      volatile uint16_t ATREPM : 1;	   /* [10..10] Auto Response Mode */
+      uint16_t : 1;
+      volatile const uint16_t CSSTS : 1;  /* [12..12] CSSTS Status */
+      volatile uint16_t CSCLR : 1;	    /* [13..13] CSPLIT Status Clear */
+      volatile const uint16_t INBUFM : 1; /* [14..14] Transmit Buffer Monitor */
+      volatile const uint16_t BSTS : 1;   /* [15..15] Buffer Status */
+    } PIPE_CTR_b[9];
+  };
+  volatile const uint16_t RESERVED13;
+  volatile const uint32_t RESERVED14[3];
+  volatile LINK_REG_PIPE_TR_t PIPE_TR[5]; /* (@ 0x00000090) Pipe Transaction Counter Registers */
+  volatile const uint32_t RESERVED15[3];
+
+  union {
+    volatile uint16_t USBBCCTRL0; /* (@ 0x000000B0) BC Control Register 0 */
+
+    struct {
+      volatile uint16_t RPDME0 : 1;	/* [0..0] D- Pin Pull-Down Control */
+      volatile uint16_t IDPSRCE0 : 1; /* [1..1] D+ Pin IDPSRC Output Control */
+      volatile uint16_t
+        IDMSINKE0 : 1;		/* [2..2] D- Pin 0.6 V Input Detection (Comparator and Sink) Control */
+      volatile uint16_t VDPSRCE0 : 1; /* [3..3] D+ Pin VDPSRC (0.6 V) Output Control */
+      volatile uint16_t
+        IDPSINKE0 : 1;		/* [4..4] D+ Pin 0.6 V Input Detection (Comparator and Sink) Control */
+      volatile uint16_t VDMSRCE0 : 1; /* [5..5] D- Pin VDMSRC (0.6 V) Output Control */
+      uint16_t : 1;
+      volatile uint16_t BATCHGE0 : 1; /* [7..7] BC (Battery Charger) Function Ch0 General Enable Control */
+      volatile const uint16_t CHGDETSTS0 : 1; /* [8..8] D- Pin 0.6 V Input Detection Status */
+      volatile const uint16_t PDDETSTS0 : 1;	/* [9..9] D+ Pin 0.6 V Input Detection Status */
+      uint16_t : 6;
+    } USBBCCTRL0_b;
+  };
+  volatile const uint16_t RESERVED16;
+  volatile const uint32_t RESERVED17[4];
+
+  union {
+    volatile uint16_t UCKSEL; /* (@ 0x000000C4) USB Clock Selection Register */
+
+    struct {
+      volatile uint16_t UCKSELC : 1; /* [0..0] USB Clock Selection */
+      uint16_t : 15;
+    } UCKSEL_b;
+  };
+  volatile const uint16_t RESERVED18;
+  volatile const uint32_t RESERVED19;
+
+  union {
+    volatile uint16_t USBMC; /* (@ 0x000000CC) USB Module Control Register */
+
+    struct {
+      volatile uint16_t VDDUSBE : 1; /* [0..0] USB Reference Power Supply Circuit On/Off Control */
+      uint16_t : 6;
+      volatile uint16_t VDCEN : 1; /* [7..7] USB Regulator On/Off Control */
+      uint16_t : 8;
+    } USBMC_b;
+  };
+  volatile const uint16_t RESERVED20;
+
+  union {
+    volatile uint16_t DEVADD[10]; /* (@ 0x000000D0) Device Address Configuration Register */
+
+    struct {
+      uint16_t : 6;
+      volatile uint16_t USBSPD : 2;  /* [7..6] Transfer Speed of Communication Target Device */
+      volatile uint16_t HUBPORT : 3; /* [10..8] Communication Target Connecting Hub Port */
+      volatile uint16_t UPPHUB : 4;  /* [14..11] Communication Target Connecting Hub Register */
+      uint16_t : 1;
+    } DEVADD_b[10];
+  };
+  volatile const uint32_t RESERVED21[3];
+
+  union {
+    volatile uint32_t PHYSLEW; /* (@ 0x000000F0) PHY Cross Point Adjustment Register */
+
+    struct {
+      volatile uint32_t SLEWR00 : 1; /* [0..0] Receiver Cross Point Adjustment 00 */
+      volatile uint32_t SLEWR01 : 1; /* [1..1] Receiver Cross Point Adjustment 01 */
+      volatile uint32_t SLEWF00 : 1; /* [2..2] Receiver Cross Point Adjustment 00 */
+      volatile uint32_t SLEWF01 : 1; /* [3..3] Receiver Cross Point Adjustment 01 */
+      uint32_t : 28;
+    } PHYSLEW_b;
+  };
+  volatile const uint32_t RESERVED22[3];
+
+  union {
+    volatile uint16_t LPCTRL; /* (@ 0x00000100) Low Power Control Register */
+
+    struct {
+      uint16_t : 7;
+      volatile uint16_t HWUPM : 1; /* [7..7] Resume Return Mode Setting */
+      uint16_t : 8;
+    } LPCTRL_b;
+  };
+
+  union {
+    volatile uint16_t LPSTS; /* (@ 0x00000102) Low Power Status Register */
+
+    struct {
+      uint16_t : 14;
+      volatile uint16_t SUSPENDM : 1; /* [14..14] UTMI SuspendM Control */
+      uint16_t : 1;
+    } LPSTS_b;
+  };
+  volatile const uint32_t RESERVED23[15];
+
+  union {
+    volatile uint16_t BCCTRL; /* (@ 0x00000140) Battery Charging Control Register */
+
+    struct {
+      volatile uint16_t IDPSRCE : 1;	/* [0..0] IDPSRC Control */
+      volatile uint16_t IDMSINKE : 1; /* [1..1] IDMSINK Control */
+      volatile uint16_t VDPSRCE : 1;	/* [2..2] VDPSRC Control */
+      volatile uint16_t IDPSINKE : 1; /* [3..3] IDPSINK Control */
+      volatile uint16_t VDMSRCE : 1;	/* [4..4] VDMSRC Control */
+      volatile uint16_t DCPMODE : 1;	/* [5..5] DCP Mode Control */
+      uint16_t : 2;
+      volatile const uint16_t CHGDETSTS : 1; /* [8..8] CHGDET Status */
+      volatile const uint16_t PDDETSTS : 1;  /* [9..9] PDDET Status */
+      uint16_t : 6;
+    } BCCTRL_b;
+  };
+  volatile const uint16_t RESERVED24;
+
+  union {
+    volatile uint16_t PL1CTRL1; /* (@ 0x00000144) Function L1 Control Register 1 */
+
+    struct {
+      volatile uint16_t L1RESPEN : 1; /* [0..0] L1 Response Enable */
+      volatile uint16_t L1RESPMD : 2; /* [2..1] L1 Response Mode */
+      volatile uint16_t L1NEGOMD : 1; /* [3..3] L1 Response Negotiation Control. */
+      volatile const uint16_t
+        DVSQ : 4;	       /* [7..4] DVSQ Extension.DVSQ[3] is Mirror of DVSQ[2:0] in INTSTS0. */
+      volatile uint16_t HIRDTHR : 4; /* [11..8] L1 Response Negotiation Threshold Value */
+      uint16_t : 2;
+      volatile uint16_t L1EXTMD : 1; /* [14..14] PHY Control Mode at L1 Return */
+      uint16_t : 1;
+    } PL1CTRL1_b;
+  };
+
+  union {
+    volatile uint16_t PL1CTRL2; /* (@ 0x00000146) Function L1 Control Register 2 */
+
+    struct {
+      uint16_t : 8;
+      volatile uint16_t HIRDMON : 4; /* [11..8] HIRD Value Monitor */
+      volatile uint16_t RWEMON : 1;  /* [12..12] RWE Value Monitor */
+      uint16_t : 3;
+    } PL1CTRL2_b;
+  };
+
+  union {
+    volatile uint16_t HL1CTRL1; /* (@ 0x00000148) Host L1 Control Register 1 */
+
+    struct {
+      volatile uint16_t L1REQ : 1;	      /* [0..0] L1 Transition Request */
+      volatile const uint16_t L1STATUS : 2; /* [2..1] L1 Request Completion Status */
+      uint16_t : 13;
+    } HL1CTRL1_b;
+  };
+
+  union {
+    volatile uint16_t HL1CTRL2; /* (@ 0x0000014A) Host L1 Control Register 2 */
+
+    struct {
+      volatile uint16_t L1ADDR : 4; /* [3..0] LPM Token DeviceAddress */
+      uint16_t : 4;
+      volatile uint16_t HIRD : 4;  /* [11..8] LPM Token HIRD */
+      volatile uint16_t L1RWE : 1; /* [12..12] LPM Token L1 Remote Wake Enable */
+      uint16_t : 2;
+      volatile uint16_t BESL : 1; /* [15..15] BESL & Alternate HIRD */
+    } HL1CTRL2_b;
+  };
+  volatile const uint32_t RESERVED25[5];
+
+  union {
+    volatile const uint32_t DPUSR0R; /* (@ 0x00000160) Deep Standby USB Transceiver Control/Pin Monitor Register */
+
+    struct {
+      uint32_t : 20;
+      volatile const uint32_t
+        DOVCAHM : 1; /* [20..20] OVRCURA InputIndicates OVRCURA input signal on the HS side of USB port. */
+      volatile const uint32_t
+        DOVCBHM : 1; /* [21..21] OVRCURB InputIndicates OVRCURB input signal on the HS side of USB port. */
+      uint32_t : 1;
+      volatile const uint32_t
+        DVBSTSHM : 1; /* [23..23] VBUS InputIndicates VBUS input signal on the HS side of USB port. */
+      uint32_t : 8;
+    } DPUSR0R_b;
+  };
+
+  union {
+    volatile uint32_t DPUSR1R; /* (@ 0x00000164) Deep Standby USB Suspend/Resume Interrupt Register */
+
+    struct {
+      uint32_t : 4;
+      volatile uint32_t DOVCAHE : 1; /* [4..4] OVRCURA Interrupt Enable Clear */
+      volatile uint32_t DOVCBHE : 1; /* [5..5] OVRCURB Interrupt Enable Clear */
+      uint32_t : 1;
+      volatile uint32_t DVBSTSHE : 1; /* [7..7] VBUS Interrupt Enable/Clear */
+      uint32_t : 12;
+      volatile const uint32_t DOVCAH : 1; /* [20..20] Indication of Return from OVRCURA Interrupt Source */
+      volatile const uint32_t DOVCBH : 1; /* [21..21] Indication of Return from OVRCURB Interrupt Source */
+      uint32_t : 1;
+      volatile const uint32_t DVBSTSH : 1; /* [23..23] Indication of Return from VBUS Interrupt Source */
+      uint32_t : 8;
+    } DPUSR1R_b;
+  };
+
+  union {
+    volatile uint16_t DPUSR2R; /* (@ 0x00000168) Deep Standby USB Suspend/Resume Interrupt Register */
+
+    struct {
+      volatile const uint16_t DPINT : 1; /* [0..0] Indication of Return from DP Interrupt Source */
+      volatile const uint16_t DMINT : 1; /* [1..1] Indication of Return from DM Interrupt Source */
+      uint16_t : 2;
+      volatile const uint16_t
+        DPVAL : 1; /* [4..4] DP InputIndicates DP input signal on the HS side of USB port. */
+      volatile const uint16_t
+        DMVAL : 1; /* [5..5] DM InputIndicates DM input signal on the HS side of USB port. */
+      uint16_t : 2;
+      volatile uint16_t DPINTE : 1; /* [8..8] DP Interrupt Enable Clear */
+      volatile uint16_t DMINTE : 1; /* [9..9] DM Interrupt Enable Clear */
+      uint16_t : 6;
+    } DPUSR2R_b;
+  };
+
+  union {
+    volatile uint16_t DPUSRCR; /* (@ 0x0000016A) Deep Standby USB Suspend/Resume Command Register */
+
+    struct {
+      volatile uint16_t FIXPHY : 1;	/* [0..0] USB Transceiver Control Fix */
+      volatile uint16_t FIXPHYPD : 1; /* [1..1] USB Transceiver Control Fix for PLL */
+      uint16_t : 14;
+    } DPUSRCR_b;
+  };
+  volatile const uint32_t RESERVED26[165];
+
+  union {
+    volatile uint32_t
+      DPUSR0R_FS; /* (@ 0x00000400) Deep Software Standby USB Transceiver Control/Pin Monitor Register */
+
+    struct {
+      volatile uint32_t SRPC0 : 1; /* [0..0] USB Single End Receiver Control */
+      volatile uint32_t RPUE0 : 1; /* [1..1] DP Pull-Up Resistor Control */
+      uint32_t : 1;
+      volatile uint32_t DRPD0 : 1;   /* [3..3] D+/D- Pull-Down Resistor Control */
+      volatile uint32_t FIXPHY0 : 1; /* [4..4] USB Transceiver Output Fix */
+      uint32_t : 11;
+      volatile const uint32_t DP0 : 1; /* [16..16] USB0 D+ InputIndicates the D+ input signal of the USB. */
+      volatile const uint32_t DM0 : 1; /* [17..17] USB D-InputIndicates the D- input signal of the USB. */
+      uint32_t : 2;
+      volatile const uint32_t
+        DOVCA0 : 1; /* [20..20] USB OVRCURA InputIndicates the OVRCURA input signal of the USB. */
+      volatile const uint32_t
+        DOVCB0 : 1; /* [21..21] USB OVRCURB InputIndicates the OVRCURB input signal of the USB. */
+      uint32_t : 1;
+      volatile const uint32_t
+        DVBSTS0 : 1; /* [23..23] USB VBUS InputIndicates the VBUS input signal of the USB. */
+      uint32_t : 8;
+    } DPUSR0R_FS_b;
+  };
+
+  union {
+    volatile uint32_t DPUSR1R_FS; /* (@ 0x00000404) Deep Software Standby USB Suspend/Resume Interrupt Register */
+
+    struct {
+      volatile uint32_t DPINTE0 : 1; /* [0..0] USB DP Interrupt Enable/Clear */
+      volatile uint32_t DMINTE0 : 1; /* [1..1] USB DM Interrupt Enable/Clear */
+      uint32_t : 2;
+      volatile uint32_t DOVRCRAE0 : 1; /* [4..4] USB OVRCURA Interrupt Enable/Clear */
+      volatile uint32_t DOVRCRBE0 : 1; /* [5..5] USB OVRCURB Interrupt Enable/Clear */
+      uint32_t : 1;
+      volatile uint32_t DVBSE0 : 1; /* [7..7] USB VBUS Interrupt Enable/Clear */
+      uint32_t : 8;
+      volatile const uint32_t DPINT0 : 1; /* [16..16] USB DP Interrupt Source Recovery */
+      volatile const uint32_t DMINT0 : 1; /* [17..17] USB DM Interrupt Source Recovery */
+      uint32_t : 2;
+      volatile const uint32_t DOVRCRA0 : 1; /* [20..20] USB OVRCURA Interrupt Source Recovery */
+      volatile const uint32_t DOVRCRB0 : 1; /* [21..21] USB OVRCURB Interrupt Source Recovery */
+      uint32_t : 1;
+      volatile const uint32_t DVBINT0 : 1; /* [23..23] USB VBUS Interrupt Source Recovery */
+      uint32_t : 8;
+    } DPUSR1R_FS_b;
+  };
 } LINK_REG_t; /* Size = 1032 (0x408) */
 
 TU_VERIFY_STATIC(offsetof(LINK_REG_t, SYSCFG) == 0x00000000, "incorrect offset");
@@ -1034,7 +1034,7 @@ TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR0R_FS) == 0x00000400, "incorrect offs
 TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR1R_FS) == 0x00000404, "incorrect offset");
 
 TU_ATTR_PACKED_END /* End of definition of packed structs (used by the CCRX toolchain) */
-	TU_ATTR_BIT_FIELD_ORDER_END
+TU_ATTR_BIT_FIELD_ORDER_END
 
 /*--------------------------------------------------------------------*/
 /* Register Bit Definitions                                           */

From 79fd23974c04b18a7ebb2dfe14a170cb7c3e6f41 Mon Sep 17 00:00:00 2001
From: Rafael Silva <perigoso@riseup.net>
Date: Wed, 30 Mar 2022 13:56:00 +0100
Subject: [PATCH 013/691] fix host preprocessor flag typo

Co-authored-by: Koji KITAYAMA <45088311+kkitayam@users.noreply.github.com>
---
 src/portable/renesas/link/hcd_link.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/link/hcd_link.c
index f60c49114..4bb103936 100644
--- a/src/portable/renesas/link/hcd_link.c
+++ b/src/portable/renesas/link/hcd_link.c
@@ -27,7 +27,7 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || \
+#if CFG_TUH_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || \
                         CFG_TUSB_MCU == OPT_MCU_RX65X || \
                         CFG_TUSB_MCU == OPT_MCU_RX72N || \
                         CFG_TUSB_MCU == OPT_MCU_RAXXX)

From fbc29794287b1f22388a09e289ff7b7698ef3eab Mon Sep 17 00:00:00 2001
From: Rafael Silva <perigoso@riseup.net>
Date: Wed, 30 Mar 2022 15:38:31 +0100
Subject: [PATCH 014/691] fix iso int register typo

druing the renaming int and iso endpoint configurations were swapped

Co-authored-by: Koji KITAYAMA <45088311+kkitayam@users.noreply.github.com>
---
 src/portable/renesas/link/dcd_link.c | 4 ++--
 src/portable/renesas/link/hcd_link.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/portable/renesas/link/dcd_link.c b/src/portable/renesas/link/dcd_link.c
index bb7e3b60a..0f9037593 100644
--- a/src/portable/renesas/link/dcd_link.c
+++ b/src/portable/renesas/link/dcd_link.c
@@ -642,9 +642,9 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   if (xfer == TUSB_XFER_BULK) {
     cfg |= (LINK_REG_PIPECFG_TYPE_BULK | LINK_REG_PIPECFG_SHTNAK_Msk | LINK_REG_PIPECFG_DBLB_Msk);
   } else if (xfer == TUSB_XFER_INTERRUPT) {
-    cfg |= LINK_REG_PIPECFG_TYPE_ISO;
+    cfg |= LINK_REG_PIPECFG_TYPE_INT;
   } else {
-    cfg |= (LINK_REG_PIPECFG_TYPE_INT | LINK_REG_PIPECFG_DBLB_Msk);
+    cfg |= (LINK_REG_PIPECFG_TYPE_ISO | LINK_REG_PIPECFG_DBLB_Msk);
   }
   LINK_REG->PIPECFG = cfg;
   LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num);
diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/link/hcd_link.c
index 4bb103936..1197e1de5 100644
--- a/src/portable/renesas/link/hcd_link.c
+++ b/src/portable/renesas/link/hcd_link.c
@@ -642,9 +642,9 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
   if (xfer == TUSB_XFER_BULK) {
     cfg |= LINK_REG_PIPECFG_TYPE_BULK | LINK_REG_PIPECFG_SHTNAK_Msk | LINK_REG_PIPECFG_DBLB_Msk;
   } else if (xfer == TUSB_XFER_INTERRUPT) {
-    cfg |= LINK_REG_PIPECFG_TYPE_ISO;
+    cfg |= LINK_REG_PIPECFG_TYPE_INT;
   } else {
-    cfg |= LINK_REG_PIPECFG_TYPE_INT | LINK_REG_PIPECFG_DBLB_Msk;
+    cfg |= LINK_REG_PIPECFG_TYPE_ISO | LINK_REG_PIPECFG_DBLB_Msk;
   }
   LINK_REG->PIPECFG = cfg;
   LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num);

From ea81d22f184fa8fd6c46c35c8be86e47996b46c8 Mon Sep 17 00:00:00 2001
From: Rafael Silva <rafaelsilva@ajtec.pt>
Date: Thu, 7 Apr 2022 11:13:34 +0100
Subject: [PATCH 015/691] add __evenaccess keyword for CCRX compiler
 compatibility

Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
---
 src/portable/renesas/link/dcd_link.c | 4 ++++
 src/portable/renesas/link/hcd_link.c | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/src/portable/renesas/link/dcd_link.c b/src/portable/renesas/link/dcd_link.c
index 0f9037593..dcbd68b8d 100644
--- a/src/portable/renesas/link/dcd_link.c
+++ b/src/portable/renesas/link/dcd_link.c
@@ -52,7 +52,11 @@
 //--------------------------------------------------------------------+
 
 /* LINK core registers */
+#if defined(__CCRX__)
+#define LINK_REG ((LINK_REG_t __evenaccess*)LINK_REG_BASE)
+#else
 #define LINK_REG ((LINK_REG_t*)LINK_REG_BASE)
+#endif
 
 /* Start of definition of packed structs (used by the CCRX toolchain) */
 TU_ATTR_PACKED_BEGIN
diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/link/hcd_link.c
index 1197e1de5..f1ea2b821 100644
--- a/src/portable/renesas/link/hcd_link.c
+++ b/src/portable/renesas/link/hcd_link.c
@@ -48,7 +48,11 @@
 //--------------------------------------------------------------------+
 
 /* LINK core registers */
+#if defined(__CCRX__)
+#define LINK_REG ((LINK_REG_t __evenaccess*)LINK_REG_BASE)
+#else
 #define LINK_REG ((LINK_REG_t*)LINK_REG_BASE)
+#endif
 
 TU_ATTR_PACKED_BEGIN
 TU_ATTR_BIT_FIELD_ORDER_BEGIN

From d28ff1175d185c399add10be7824310b2b8dcd47 Mon Sep 17 00:00:00 2001
From: Ben Avison <code@piccolosystems.com>
Date: Thu, 1 Sep 2022 14:28:00 +0100
Subject: [PATCH 016/691] IAR declares strncasecmp in string.h not strings.h

strings.h is not an ISO header file, so IAR generates fatal error Pe1696
'cannot open source file "strings.h"'. Even though strncasecmp isn't an
ISO C library function, IAR's runtime library defines it, though it
declares it in string.h instead.
---
 examples/device/usbtmc/src/usbtmc_app.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/examples/device/usbtmc/src/usbtmc_app.c b/examples/device/usbtmc/src/usbtmc_app.c
index 8f87a6dca..115163c7f 100644
--- a/examples/device/usbtmc/src/usbtmc_app.c
+++ b/examples/device/usbtmc/src/usbtmc_app.c
@@ -23,7 +23,11 @@
  *
  */
 
+#ifdef __ICCARM__
+#include <string.h>
+#else
 #include <strings.h>
+#endif
 #include <stdlib.h>     /* atoi */
 #include "tusb.h"
 #include "bsp/board.h"

From e5355d0335082541ae47b128add049a9d91ec070 Mon Sep 17 00:00:00 2001
From: Ben Avison <code@piccolosystems.com>
Date: Fri, 15 Jul 2022 17:32:20 +0100
Subject: [PATCH 017/691] [rp2040] Remove non-portable return statements

IAR generates error Pe118 'a void function may not return a value'.
---
 src/portable/raspberrypi/rp2040/rp2040_usb.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.h b/src/portable/raspberrypi/rp2040/rp2040_usb.h
index c72dae64c..87fa999ca 100644
--- a/src/portable/raspberrypi/rp2040/rp2040_usb.h
+++ b/src/portable/raspberrypi/rp2040/rp2040_usb.h
@@ -87,15 +87,15 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t _hw_endpoint_buffer_control_get_val
 }
 
 TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_buffer_control_set_value32(struct hw_endpoint *ep, uint32_t value) {
-    return _hw_endpoint_buffer_control_update32(ep, 0, value);
+    _hw_endpoint_buffer_control_update32(ep, 0, value);
 }
 
 TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_buffer_control_set_mask32(struct hw_endpoint *ep, uint32_t value) {
-    return _hw_endpoint_buffer_control_update32(ep, ~value, value);
+    _hw_endpoint_buffer_control_update32(ep, ~value, value);
 }
 
 TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_buffer_control_clear_mask32(struct hw_endpoint *ep, uint32_t value) {
-    return _hw_endpoint_buffer_control_update32(ep, ~value, 0);
+    _hw_endpoint_buffer_control_update32(ep, ~value, 0);
 }
 
 static inline uintptr_t hw_data_offset(uint8_t *buf)

From 6dfc857b916855e57a15813f423987449dd1a935 Mon Sep 17 00:00:00 2001
From: Ben Avison <code@piccolosystems.com>
Date: Wed, 24 Aug 2022 19:53:12 +0100
Subject: [PATCH 018/691] [rp2040] Explicit cast value of `hw_set_alias`

Some compilers don't support the GNU extension `typeof` so their definitions
of `hw_set_alias` can't inherit their type from their argument, and the best
we can do is have `hw_set_alias` act the same as `hw_set_alias_untyped`.
This requires an explicit cast when the macro is used instead, otherwise
IAR generates error Pe132 'expression must have pointer-to-struct-or-union
type but it has type "void *"'.

The same goes for `hw_clear_alias`.
---
 src/portable/raspberrypi/rp2040/dcd_rp2040.c | 4 ++--
 src/portable/raspberrypi/rp2040/hcd_rp2040.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
index 2003f72fd..89fd6b82d 100644
--- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
@@ -46,8 +46,8 @@
 /* Low level controller
  *------------------------------------------------------------------*/
 
-#define usb_hw_set hw_set_alias(usb_hw)
-#define usb_hw_clear hw_clear_alias(usb_hw)
+#define usb_hw_set ((usb_hw_t *)hw_set_alias(usb_hw))
+#define usb_hw_clear ((usb_hw_t *)hw_clear_alias(usb_hw))
 
 // Init these in dcd_init
 static uint8_t *next_buffer_ptr;
diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c
index e9118c6a3..5badb261a 100644
--- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c
@@ -56,8 +56,8 @@ static_assert(PICO_USB_HOST_INTERRUPT_ENDPOINTS <= USB_MAX_ENDPOINTS, "");
 static struct hw_endpoint ep_pool[1 + PICO_USB_HOST_INTERRUPT_ENDPOINTS];
 #define epx (ep_pool[0])
 
-#define usb_hw_set   hw_set_alias(usb_hw)
-#define usb_hw_clear hw_clear_alias(usb_hw)
+#define usb_hw_set   ((usb_hw_t *)hw_set_alias(usb_hw))
+#define usb_hw_clear ((usb_hw_t *)hw_clear_alias(usb_hw))
 
 // Flags we set by default in sie_ctrl (we add other bits on top)
 enum {

From 16518dcbbb6f20182a6f69556908afe35a7f6e25 Mon Sep 17 00:00:00 2001
From: Ben Avison <code@piccolosystems.com>
Date: Mon, 5 Sep 2022 12:50:05 +0100
Subject: [PATCH 019/691] Refactor pointer arithmetic on void*

This is a GCC extension, illegal in ISO C. IAR generates errors Pa152
'these operand types cannot be used here' and Pe852 'expression must be a
pointer to a complete object type'.

Replace with uint8_t*.
---
 src/class/video/video_device.c | 89 +++++++++++++++++-----------------
 1 file changed, 44 insertions(+), 45 deletions(-)

diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c
index 7636db5fe..1f653f5c5 100644
--- a/src/class/video/video_device.c
+++ b/src/class/video/video_device.c
@@ -80,7 +80,7 @@ typedef struct TU_ATTR_PACKED {
 
 /* video control interface */
 typedef struct TU_ATTR_PACKED {
-  void const *beg;  /* The head of the first video control interface descriptor */
+  uint8_t const *beg;  /* The head of the first video control interface descriptor */
   uint16_t    len;  /* Byte length of the descriptors */
   uint16_t    cur;  /* offset for current video control interface */
   uint8_t     stm[CFG_TUD_VIDEO_STREAMING]; /* Indices of streaming interface */
@@ -108,9 +108,9 @@ static uint8_t const _cap_get_set = 0x3u; /* support for GET and SET */
  * @param[in] desc    interface descriptor
  *
  * @return bInterfaceNumber */
-static inline uint8_t _desc_itfnum(void const *desc)
+static inline uint8_t _desc_itfnum(uint8_t const *desc)
 {
-  return ((uint8_t const*)desc)[2];
+  return desc[2];
 }
 
 /** Get endpoint address from the endpoint descriptor
@@ -118,9 +118,9 @@ static inline uint8_t _desc_itfnum(void const *desc)
  * @param[in] desc    endpoint descriptor
  *
  * @return bEndpointAddress */
-static inline uint8_t _desc_ep_addr(void const *desc)
+static inline uint8_t _desc_ep_addr(uint8_t const *desc)
 {
-  return ((uint8_t const*)desc)[2];
+  return desc[2];
 }
 
 /** Get instance of streaming interface
@@ -146,7 +146,7 @@ static tusb_desc_vc_itf_t const* _get_desc_vc(videod_interface_t const *self)
 static tusb_desc_vs_itf_t const* _get_desc_vs(videod_streaming_interface_t const *self)
 {
   if (!self->desc.cur) return NULL;
-  void const *desc = _videod_itf[self->index_vc].beg;
+  uint8_t const *desc = _videod_itf[self->index_vc].beg;
   return (tusb_desc_vs_itf_t const*)(desc + self->desc.cur);
 }
 
@@ -158,9 +158,9 @@ static tusb_desc_vs_itf_t const* _get_desc_vs(videod_streaming_interface_t const
  *
  * @return The pointer for interface descriptor.
  * @retval end   did not found interface descriptor */
-static void const* _find_desc(void const *beg, void const *end, uint_fast8_t desc_type)
+static uint8_t const* _find_desc(uint8_t const *beg, uint8_t const *end, uint_fast8_t desc_type)
 {
-  void const *cur = beg;
+  uint8_t const *cur = beg;
   while ((cur < end) && (desc_type != tu_desc_type(cur))) {
     cur = tu_desc_next(cur);
   }
@@ -177,14 +177,13 @@ static void const* _find_desc(void const *beg, void const *end, uint_fast8_t des
  *
  * @return The pointer for interface descriptor.
  * @retval end   did not found interface descriptor */
-static void const* _find_desc_3(void const *beg, void const *end,
-                                uint_fast8_t desc_type,
-                                uint_fast8_t element_0,
-                                uint_fast8_t element_1)
+static uint8_t const* _find_desc_3(uint8_t const *beg, uint8_t const *end,
+                                   uint_fast8_t desc_type,
+                                   uint_fast8_t element_0,
+                                   uint_fast8_t element_1)
 {
-  for (void const *cur = beg; cur < end; cur = _find_desc(cur, end, desc_type)) {
-    uint8_t const *p = (uint8_t const *)cur;
-    if ((p[2] == element_0) && (p[3] == element_1)) {
+  for (uint8_t const *cur = beg; cur < end; cur = _find_desc(cur, end, desc_type)) {
+    if ((cur[2] == element_0) && (cur[3] == element_1)) {
       return cur;
     }
     cur = tu_desc_next(cur);
@@ -199,9 +198,9 @@ static void const* _find_desc_3(void const *beg, void const *end,
  *
  * @return The pointer for interface descriptor.
  * @retval end   did not found interface descriptor */
-static void const* _next_desc_itf(void const *beg, void const *end)
+static uint8_t const* _next_desc_itf(void const *beg, uint8_t const *end)
 {
-  void const *cur = beg;
+  uint8_t const *cur = beg;
   uint_fast8_t itfnum = ((tusb_desc_interface_t const*)cur)->bInterfaceNumber;
   while ((cur < end) &&
          (itfnum == ((tusb_desc_interface_t const*)cur)->bInterfaceNumber)) {
@@ -219,7 +218,7 @@ static void const* _next_desc_itf(void const *beg, void const *end)
  *
  * @return The pointer for interface descriptor.
  * @retval end   did not found interface descriptor */
-static inline void const* _find_desc_itf(void const *beg, void const *end, uint_fast8_t itfnum, uint_fast8_t altnum)
+static inline uint8_t const* _find_desc_itf(uint8_t const *beg, uint8_t const *end, uint_fast8_t itfnum, uint_fast8_t altnum)
 {
   return _find_desc_3(beg, end, TUSB_DESC_INTERFACE, itfnum, altnum);
 }
@@ -233,9 +232,9 @@ static inline void const* _find_desc_itf(void const *beg, void const *end, uint_
  *
  * @return The pointer for endpoint descriptor.
  * @retval end   did not found endpoint descriptor */
-static void const* _find_desc_ep(void const *beg, void const *end)
+static uint8_t const* _find_desc_ep(uint8_t const *beg, uint8_t const *end)
 {
-  for (void const *cur = beg; cur < end; cur = tu_desc_next(cur)) {
+  for (uint8_t const *cur = beg; cur < end; cur = tu_desc_next(cur)) {
     uint_fast8_t desc_type = tu_desc_type(cur);
     if (TUSB_DESC_ENDPOINT == desc_type) return cur;
     if (TUSB_DESC_INTERFACE == desc_type) break;
@@ -251,17 +250,17 @@ static void const* _find_desc_ep(void const *beg, void const *end)
  *
  * @return The pointer for interface descriptor.
  * @retval end   did not found interface descriptor */
-static void const* _find_desc_entity(void const *desc, uint_fast8_t entityid)
+static uint8_t const* _find_desc_entity(void const *desc, uint_fast8_t entityid)
 {
   tusb_desc_vc_itf_t const *vc = (tusb_desc_vc_itf_t const*)desc;
-  void const *beg = vc;
-  void const *end = beg + vc->std.bLength + vc->ctl.wTotalLength;
-  for (void const *cur = beg; cur < end; cur = _find_desc(cur, end, TUSB_DESC_CS_INTERFACE)) {
+  uint8_t const *beg = desc;
+  uint8_t const *end = beg + vc->std.bLength + vc->ctl.wTotalLength;
+  for (uint8_t const *cur = beg; cur < end; cur = _find_desc(cur, end, TUSB_DESC_CS_INTERFACE)) {
     tusb_desc_cs_video_entity_itf_t const *itf = (tusb_desc_cs_video_entity_itf_t const *)cur;
     if ((VIDEO_CS_ITF_VC_INPUT_TERMINAL  <= itf->bDescriptorSubtype
          && itf->bDescriptorSubtype < VIDEO_CS_ITF_VC_MAX)
         && itf->bEntityId == entityid) {
-      return itf;
+      return cur;
     }
     cur = tu_desc_next(cur);
   }
@@ -272,18 +271,18 @@ static void const* _find_desc_entity(void const *desc, uint_fast8_t entityid)
 static inline void const* _end_of_streaming_descriptor(void const *desc)
 {
   tusb_desc_vs_itf_t const *vs = (tusb_desc_vs_itf_t const *)desc;
-  return desc + vs->std.bLength + vs->stm.wTotalLength;
+  return (uint8_t const *)desc + vs->std.bLength + vs->stm.wTotalLength;
 }
 
 /** Find the first format descriptor with the specified format number. */
-static inline tusb_desc_cs_video_fmt_uncompressed_t const *_find_desc_format(void const *beg, void const *end, uint_fast8_t fmtnum)
+static inline tusb_desc_cs_video_fmt_uncompressed_t const *_find_desc_format(uint8_t const *beg, uint8_t const *end, uint_fast8_t fmtnum)
 {
   return (tusb_desc_cs_video_fmt_uncompressed_t const*)
     _find_desc_3(beg, end, TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VS_FORMAT_UNCOMPRESSED, fmtnum);
 }
 
 /** Find the first frame descriptor with the specified format number. */
-static inline tusb_desc_cs_video_frm_uncompressed_t const *_find_desc_frame(void const *beg, void const *end, uint_fast8_t frmnum)
+static inline tusb_desc_cs_video_frm_uncompressed_t const *_find_desc_frame(uint8_t const *beg, uint8_t const *end, uint_fast8_t frmnum)
 {
   return (tusb_desc_cs_video_frm_uncompressed_t const*)
     _find_desc_3(beg, end, TUSB_DESC_CS_INTERFACE, VIDEO_CS_ITF_VS_FRAME_UNCOMPRESSED, frmnum);
@@ -485,9 +484,9 @@ static bool _close_vc_itf(uint8_t rhport, videod_interface_t *self)
 {
   tusb_desc_vc_itf_t const *vc = _get_desc_vc(self);
   /* The next descriptor after the class-specific VC interface header descriptor. */
-  void const *cur = (void const*)vc + vc->std.bLength + vc->ctl.bLength;
+  uint8_t const *cur = (uint8_t const*)vc + vc->std.bLength + vc->ctl.bLength;
   /* The end of the video control interface descriptor. */
-  void const *end = (void const*)vc + vc->std.bLength + vc->ctl.wTotalLength;
+  uint8_t const *end = (uint8_t const*)vc + vc->std.bLength + vc->ctl.wTotalLength;
   if (vc->std.bNumEndpoints) {
     /* Find the notification endpoint descriptor. */
     cur = _find_desc(cur, end, TUSB_DESC_ENDPOINT);
@@ -506,10 +505,10 @@ static bool _close_vc_itf(uint8_t rhport, videod_interface_t *self)
 static bool _open_vc_itf(uint8_t rhport, videod_interface_t *self, uint_fast8_t altnum)
 {
   TU_LOG2("    open VC %d\n", altnum);
-  void const *beg = self->beg;
-  void const *end = beg + self->len;
+  uint8_t const *beg = self->beg;
+  uint8_t const *end = beg + self->len;
   /* The first descriptor is a video control interface descriptor. */
-  void const *cur = _find_desc_itf(beg, end, _desc_itfnum(beg), altnum);
+  uint8_t const *cur = _find_desc_itf(beg, end, _desc_itfnum(beg), altnum);
   TU_LOG2("    cur %d\n", cur - beg);
   TU_VERIFY(cur < end);
 
@@ -534,7 +533,7 @@ static bool _open_vc_itf(uint8_t rhport, videod_interface_t *self, uint_fast8_t
     /* Open the notification endpoint */
     TU_ASSERT(usbd_edpt_open(rhport, notif));
   }
-  self->cur = (uint16_t) ((void const*)vc - beg);
+  self->cur = (uint16_t) ((uint8_t const*)vc - beg);
   return true;
 }
 
@@ -546,7 +545,7 @@ static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint
 {
   uint_fast8_t i;
   TU_LOG2("    reopen VS %d\n", altnum);
-  void const *desc = _videod_itf[stm->index_vc].beg;
+  uint8_t const *desc = _videod_itf[stm->index_vc].beg;
 
   /* Close endpoints of previous settings. */
   for (i = 0; i < TU_ARRAY_SIZE(stm->desc.ep); ++i) {
@@ -563,9 +562,9 @@ static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint
   stm->offset  = 0;
 
   /* Find a alternate interface */
-  void const *beg = desc + stm->desc.beg;
-  void const *end = desc + stm->desc.end;
-  void const *cur = _find_desc_itf(beg, end, _desc_itfnum(beg), altnum);
+  uint8_t const *beg = desc + stm->desc.beg;
+  uint8_t const *end = desc + stm->desc.end;
+  uint8_t const *cur = _find_desc_itf(beg, end, _desc_itfnum(beg), altnum);
   TU_VERIFY(cur < end);
   uint_fast8_t numeps = ((tusb_desc_interface_t const *)cur)->bNumEndpoints;
   TU_ASSERT(numeps <= TU_ARRAY_SIZE(stm->desc.ep));
@@ -977,7 +976,7 @@ bool tud_video_n_frame_xfer(uint_fast8_t ctl_idx, uint_fast8_t stm_idx, void *bu
   if (!stm || !stm->desc.ep[0] || stm->buffer) return false;
 
   /* Find EP address */
-  void const *desc = _videod_itf[stm->index_vc].beg;
+  uint8_t const *desc = _videod_itf[stm->index_vc].beg;
   uint8_t ep_addr = 0;
   for (uint_fast8_t i = 0; i < CFG_TUD_VIDEO_STREAMING; ++i) {
     uint_fast16_t ofs_ep = stm->desc.ep[i];
@@ -1044,15 +1043,15 @@ uint16_t videod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
   }
   TU_ASSERT(ctl_idx < CFG_TUD_VIDEO, 0);
 
-  void const *end = (void const*)itf_desc + max_len;
-  self->beg = itf_desc;
+  uint8_t const *end = (uint8_t const*)itf_desc + max_len;
+  self->beg = (uint8_t const *)itf_desc;
   self->len = max_len;
   /*------------- Video Control Interface -------------*/
   TU_VERIFY(_open_vc_itf(rhport, self, 0), 0);
   tusb_desc_vc_itf_t const *vc = _get_desc_vc(self);
   uint_fast8_t bInCollection   = vc->ctl.bInCollection;
   /* Find the end of the video interface descriptor */
-  void const *cur = _next_desc_itf(itf_desc, end);
+  uint8_t const *cur = _next_desc_itf(itf_desc, end);
   for (uint8_t stm_idx = 0; stm_idx < bInCollection; ++stm_idx) {
     videod_streaming_interface_t *stm = NULL;
     /* find free streaming interface handle */
@@ -1085,7 +1084,7 @@ bool videod_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_
   /* Identify which control interface to use */
   uint_fast8_t itf;
   for (itf = 0; itf < CFG_TUD_VIDEO; ++itf) {
-    void const *desc = _videod_itf[itf].beg;
+    uint8_t const *desc = _videod_itf[itf].beg;
     if (!desc) continue;
     if (itfnum == _desc_itfnum(desc)) break;
   }
@@ -1101,7 +1100,7 @@ bool videod_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_
   for (itf = 0; itf < CFG_TUD_VIDEO_STREAMING; ++itf) {
     videod_streaming_interface_t *stm = &_videod_streaming_itf[itf];
     if (!stm->desc.beg) continue;
-    void const *desc = _videod_itf[stm->index_vc].beg;
+    uint8_t const *desc = _videod_itf[stm->index_vc].beg;
     if (itfnum == _desc_itfnum(desc + stm->desc.beg)) break;
   }
 
@@ -1127,7 +1126,7 @@ bool videod_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint3
     uint_fast16_t const ep_ofs = stm->desc.ep[0];
     if (!ep_ofs) continue;
     ctl = &_videod_itf[stm->index_vc];
-    void const *desc = ctl->beg;
+    uint8_t const *desc = ctl->beg;
     if (ep_addr == _desc_ep_addr(desc + ep_ofs)) break;
   }
 

From 65ba15c37d50fa470fa24c38dbf0e30eba3147c0 Mon Sep 17 00:00:00 2001
From: Ben Avison <code@piccolosystems.com>
Date: Mon, 5 Sep 2022 12:53:49 +0100
Subject: [PATCH 020/691] Remove unreachable code

IAR generates warning Pe111 'statement is unreachable'. In a couple of
cases, replace return statements with TU_ATTR_FALLTHROUGH; because some
compilers apparently can't figure out that the return statements are
unreachable but do whinge about an imagined fall-through without them!
---
 examples/device/audio_4_channel_mic/src/main.c    |  3 ---
 examples/device/audio_test/src/main.c             |  3 ---
 examples/device/board_test/src/main.c             |  2 --
 examples/device/cdc_dual_ports/src/main.c         |  2 --
 examples/device/cdc_msc/src/main.c                |  2 --
 examples/device/dfu/src/main.c                    |  2 --
 examples/device/dfu_runtime/src/main.c            |  2 --
 examples/device/dynamic_configuration/src/main.c  |  2 --
 examples/device/hid_composite/src/main.c          |  2 --
 examples/device/hid_generic_inout/src/main.c      |  2 --
 examples/device/hid_multiple_interface/src/main.c |  2 --
 examples/device/midi_test/src/main.c              |  3 ---
 examples/device/msc_dual_lun/src/main.c           |  2 --
 examples/device/uac2_headset/src/main.c           |  2 --
 examples/device/usbtmc/src/main.c                 |  2 --
 examples/device/usbtmc/src/usbtmc_app.c           |  1 -
 examples/device/video_capture/src/main.c          |  2 --
 examples/device/webusb_serial/src/main.c          |  2 --
 examples/host/cdc_msc_hid/src/main.c              |  2 --
 examples/host/hid_controller/src/main.c           |  2 --
 src/class/usbtmc/usbtmc_device.c                  | 10 +++-------
 src/class/video/video_device.c                    |  1 -
 src/portable/raspberrypi/rp2040/hcd_rp2040.c      |  6 ++----
 23 files changed, 5 insertions(+), 54 deletions(-)

diff --git a/examples/device/audio_4_channel_mic/src/main.c b/examples/device/audio_4_channel_mic/src/main.c
index a6af5fd19..662f67df3 100644
--- a/examples/device/audio_4_channel_mic/src/main.c
+++ b/examples/device/audio_4_channel_mic/src/main.c
@@ -99,9 +99,6 @@ int main(void)
     led_blinking_task();
     audio_task();
   }
-
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/audio_test/src/main.c b/examples/device/audio_test/src/main.c
index d0849c7ac..4b88c2883 100644
--- a/examples/device/audio_test/src/main.c
+++ b/examples/device/audio_test/src/main.c
@@ -100,9 +100,6 @@ int main(void)
     led_blinking_task();
     audio_task();
   }
-
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/board_test/src/main.c b/examples/device/board_test/src/main.c
index 5e28cbb27..207ca6294 100644
--- a/examples/device/board_test/src/main.c
+++ b/examples/device/board_test/src/main.c
@@ -67,8 +67,6 @@ int main(void)
       led_state = 1 - led_state; // toggle
     }
   }
-
-  return 0;
 }
 
 #if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3
diff --git a/examples/device/cdc_dual_ports/src/main.c b/examples/device/cdc_dual_ports/src/main.c
index 0264f0566..893b0dbc5 100644
--- a/examples/device/cdc_dual_ports/src/main.c
+++ b/examples/device/cdc_dual_ports/src/main.c
@@ -47,8 +47,6 @@ int main(void)
     tud_task(); // tinyusb device task
     cdc_task();
   }
-
-  return 0;
 }
 
 // echo to either Serial0 or Serial1
diff --git a/examples/device/cdc_msc/src/main.c b/examples/device/cdc_msc/src/main.c
index c3666763b..043b4e8f5 100644
--- a/examples/device/cdc_msc/src/main.c
+++ b/examples/device/cdc_msc/src/main.c
@@ -65,8 +65,6 @@ int main(void)
 
     cdc_task();
   }
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/dfu/src/main.c b/examples/device/dfu/src/main.c
index 6bb183819..5f37f25e1 100644
--- a/examples/device/dfu/src/main.c
+++ b/examples/device/dfu/src/main.c
@@ -82,8 +82,6 @@ int main(void)
     tud_task(); // tinyusb device task
     led_blinking_task();
   }
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/dfu_runtime/src/main.c b/examples/device/dfu_runtime/src/main.c
index 55b380353..3c5f04e82 100644
--- a/examples/device/dfu_runtime/src/main.c
+++ b/examples/device/dfu_runtime/src/main.c
@@ -77,8 +77,6 @@ int main(void)
     tud_task(); // tinyusb device task
     led_blinking_task();
   }
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/dynamic_configuration/src/main.c b/examples/device/dynamic_configuration/src/main.c
index 33a603343..69b3acd19 100644
--- a/examples/device/dynamic_configuration/src/main.c
+++ b/examples/device/dynamic_configuration/src/main.c
@@ -66,8 +66,6 @@ int main(void)
     cdc_task();
     midi_task();
   }
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/hid_composite/src/main.c b/examples/device/hid_composite/src/main.c
index f7d76cfc7..75a0633a3 100644
--- a/examples/device/hid_composite/src/main.c
+++ b/examples/device/hid_composite/src/main.c
@@ -67,8 +67,6 @@ int main(void)
 
     hid_task();
   }
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/hid_generic_inout/src/main.c b/examples/device/hid_generic_inout/src/main.c
index 5b7daf118..e692d3bd3 100644
--- a/examples/device/hid_generic_inout/src/main.c
+++ b/examples/device/hid_generic_inout/src/main.c
@@ -88,8 +88,6 @@ int main(void)
     tud_task(); // tinyusb device task
     led_blinking_task();
   }
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/hid_multiple_interface/src/main.c b/examples/device/hid_multiple_interface/src/main.c
index 29ba74398..72240b208 100644
--- a/examples/device/hid_multiple_interface/src/main.c
+++ b/examples/device/hid_multiple_interface/src/main.c
@@ -71,8 +71,6 @@ int main(void)
 
     hid_task();
   }
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/midi_test/src/main.c b/examples/device/midi_test/src/main.c
index 3310348bd..ddf419fe9 100644
--- a/examples/device/midi_test/src/main.c
+++ b/examples/device/midi_test/src/main.c
@@ -71,9 +71,6 @@ int main(void)
     led_blinking_task();
     midi_task();
   }
-
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/msc_dual_lun/src/main.c b/examples/device/msc_dual_lun/src/main.c
index 96790d20c..18038e442 100644
--- a/examples/device/msc_dual_lun/src/main.c
+++ b/examples/device/msc_dual_lun/src/main.c
@@ -62,8 +62,6 @@ int main(void)
     tud_task(); // tinyusb device task
     led_blinking_task();
   }
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/uac2_headset/src/main.c b/examples/device/uac2_headset/src/main.c
index 003dc2a74..3256bc272 100644
--- a/examples/device/uac2_headset/src/main.c
+++ b/examples/device/uac2_headset/src/main.c
@@ -113,8 +113,6 @@ int main(void)
     audio_task();
     led_blinking_task();
   }
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/usbtmc/src/main.c b/examples/device/usbtmc/src/main.c
index 6945d8743..8fc06b56c 100644
--- a/examples/device/usbtmc/src/main.c
+++ b/examples/device/usbtmc/src/main.c
@@ -63,8 +63,6 @@ int main(void)
     led_blinking_task();
     usbtmc_app_task_iter();
   }
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/usbtmc/src/usbtmc_app.c b/examples/device/usbtmc/src/usbtmc_app.c
index 115163c7f..e1ce115ad 100644
--- a/examples/device/usbtmc/src/usbtmc_app.c
+++ b/examples/device/usbtmc/src/usbtmc_app.c
@@ -254,7 +254,6 @@ void usbtmc_app_task_iter(void) {
     break;
   default:
     TU_ASSERT(false,);
-    return;
   }
 }
 
diff --git a/examples/device/video_capture/src/main.c b/examples/device/video_capture/src/main.c
index 4028352da..0f81c693a 100644
--- a/examples/device/video_capture/src/main.c
+++ b/examples/device/video_capture/src/main.c
@@ -66,8 +66,6 @@ int main(void)
 
     video_task();
   }
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/webusb_serial/src/main.c b/examples/device/webusb_serial/src/main.c
index 604d30a83..23aa79f58 100644
--- a/examples/device/webusb_serial/src/main.c
+++ b/examples/device/webusb_serial/src/main.c
@@ -103,8 +103,6 @@ int main(void)
     webserial_task();
     led_blinking_task();
   }
-
-  return 0;
 }
 
 // send characters to both CDC and WebUSB
diff --git a/examples/host/cdc_msc_hid/src/main.c b/examples/host/cdc_msc_hid/src/main.c
index 664cbf035..091c002ac 100644
--- a/examples/host/cdc_msc_hid/src/main.c
+++ b/examples/host/cdc_msc_hid/src/main.c
@@ -62,8 +62,6 @@ int main(void)
     hid_app_task();
 #endif
   }
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/host/hid_controller/src/main.c b/examples/host/hid_controller/src/main.c
index 299a3ff10..13d1d6cdb 100644
--- a/examples/host/hid_controller/src/main.c
+++ b/examples/host/hid_controller/src/main.c
@@ -68,8 +68,6 @@ int main(void)
     hid_app_task();
 #endif
   }
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/src/class/usbtmc/usbtmc_device.c b/src/class/usbtmc/usbtmc_device.c
index af4a92732..64db85fcf 100644
--- a/src/class/usbtmc/usbtmc_device.c
+++ b/src/class/usbtmc/usbtmc_device.c
@@ -496,7 +496,6 @@ bool usbtmcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint
       default:
         usbd_edpt_stall(rhport, usbtmc_state.ep_bulk_out);
         TU_VERIFY(false);
-        return false;
       }
       return true;
 
@@ -509,8 +508,8 @@ bool usbtmcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint
       return true;
 
     case STATE_ABORTING_BULK_OUT:
-      TU_VERIFY(false);
-      return false; // Should be stalled by now, shouldn't have received a packet.
+      TU_VERIFY(false); // Should be stalled by now, shouldn't have received a packet.
+      TU_ATTR_FALLTHROUGH; // Not really - some compilers can't figure out that the above macro always returns.
 
     case STATE_TX_REQUESTED:
     case STATE_TX_INITIATED:
@@ -567,7 +566,6 @@ bool usbtmcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint
 
     default:
       TU_ASSERT(false);
-      return false;
     }
   }
   else if (ep_addr == usbtmc_state.ep_int_in) {
@@ -872,15 +870,13 @@ bool usbtmcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request
     {
       TU_VERIFY(request->bmRequestType == 0xA1); // in,class,interface
       TU_VERIFY(false);
-      return false;
+      TU_ATTR_FALLTHROUGH; // Not really - some compilers can't figure out that the above macro always returns.
     }
 #endif
 
   default:
     TU_VERIFY(false);
-    return false;
   }
-  TU_VERIFY(false);
 }
 
 #endif /* CFG_TUD_TSMC */
diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c
index 1f653f5c5..a27287360 100644
--- a/src/class/video/video_device.c
+++ b/src/class/video/video_device.c
@@ -943,7 +943,6 @@ static int handle_video_stm_req(uint8_t rhport, uint8_t stage,
 
     default: return VIDEO_ERROR_INVALID_REQUEST;
   }
-  return VIDEO_ERROR_UNKNOWN;
 }
 
 //--------------------------------------------------------------------+
diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c
index 5badb261a..f65749a2f 100644
--- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c
@@ -432,8 +432,7 @@ tusb_speed_t hcd_port_speed_get(uint8_t rhport)
       case 2:
           return TUSB_SPEED_FULL;
       default:
-          panic("Invalid speed\n");
-          return TUSB_SPEED_INVALID;
+          panic("Invalid speed\n"); // does not return
   }
 }
 
@@ -599,8 +598,7 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
     (void) dev_addr;
     (void) ep_addr;
 
-    panic("hcd_clear_stall");
-    return true;
+    panic("hcd_clear_stall"); // does not return
 }
 
 #endif

From 53f0d5538bd2ab171567c9ba3138522accc8145d Mon Sep 17 00:00:00 2001
From: Ben Avison <code@piccolosystems.com>
Date: Thu, 1 Sep 2022 12:34:25 +0100
Subject: [PATCH 021/691] Don't assume ints automatically convert to enums

IAR generates warning Pe188 'enumerated type mixed with another type'.
---
 examples/device/audio_4_channel_mic/src/main.c | 2 +-
 examples/device/audio_test/src/main.c          | 2 +-
 src/class/cdc/cdc_host.c                       | 2 +-
 src/host/usbh.c                                | 6 +++---
 src/portable/raspberrypi/rp2040/dcd_rp2040.c   | 2 +-
 5 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/examples/device/audio_4_channel_mic/src/main.c b/examples/device/audio_4_channel_mic/src/main.c
index 662f67df3..db2e9bf95 100644
--- a/examples/device/audio_4_channel_mic/src/main.c
+++ b/examples/device/audio_4_channel_mic/src/main.c
@@ -287,7 +287,7 @@ bool tud_audio_get_req_entity_cb(uint8_t rhport, tusb_control_request_t const *
 
         // Those are dummy values for now
         ret.bNrChannels = 1;
-        ret.bmChannelConfig = 0;
+        ret.bmChannelConfig = (audio_channel_config_t) 0;
         ret.iChannelNames = 0;
 
         TU_LOG2("    Get terminal connector\r\n");
diff --git a/examples/device/audio_test/src/main.c b/examples/device/audio_test/src/main.c
index 4b88c2883..a3bf767f4 100644
--- a/examples/device/audio_test/src/main.c
+++ b/examples/device/audio_test/src/main.c
@@ -288,7 +288,7 @@ bool tud_audio_get_req_entity_cb(uint8_t rhport, tusb_control_request_t const *
 
         // Those are dummy values for now
         ret.bNrChannels = 1;
-        ret.bmChannelConfig = 0;
+        ret.bmChannelConfig = (audio_channel_config_t) 0;
         ret.iChannelNames = 0;
 
         TU_LOG2("    Get terminal connector\r\n");
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index ee824cb4e..09acc0c70 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -245,7 +245,7 @@ bool cdch_set_config(uint8_t dev_addr, uint8_t itf_num)
 bool cdch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes)
 {
   (void) ep_addr;
-  tuh_cdc_xfer_isr( dev_addr, event, 0, xferred_bytes );
+  tuh_cdc_xfer_isr( dev_addr, event, (cdc_pipeid_t) 0, xferred_bytes );
   return true;
 }
 
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 9d618db92..32f701248 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -449,7 +449,7 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr)
         {
           // device 0 only has control endpoint
           TU_ASSERT(epnum == 0, );
-          usbh_control_xfer_cb(event.dev_addr, ep_addr, event.xfer_complete.result, event.xfer_complete.len);
+          usbh_control_xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result, event.xfer_complete.len);
         }
         else
         {
@@ -461,14 +461,14 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr)
 
           if ( 0 == epnum )
           {
-            usbh_control_xfer_cb(event.dev_addr, ep_addr, event.xfer_complete.result, event.xfer_complete.len);
+            usbh_control_xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result, event.xfer_complete.len);
           }else
           {
             uint8_t drv_id = dev->ep2drv[epnum][ep_dir];
             if(drv_id < USBH_CLASS_DRIVER_COUNT)
             {
               TU_LOG2("%s xfer callback\r\n", usbh_class_drivers[drv_id].name);
-              usbh_class_drivers[drv_id].xfer_cb(event.dev_addr, ep_addr, event.xfer_complete.result, event.xfer_complete.len);
+              usbh_class_drivers[drv_id].xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result, event.xfer_complete.len);
             }
             else
             {
diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
index 89fd6b82d..ebf352d39 100644
--- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
@@ -201,7 +201,7 @@ static void __tusb_irq_path_func(hw_handle_buff_status)(void)
             usb_hw_clear->buf_status = bit;
 
             // IN transfer for even i, OUT transfer for odd i
-            struct hw_endpoint *ep = hw_endpoint_get_by_num(i >> 1u, !(i & 1u));
+            struct hw_endpoint *ep = hw_endpoint_get_by_num(i >> 1u, !(i & 1u) ? TUSB_DIR_IN : TUSB_DIR_OUT);
 
             // Continue xfer
             bool done = hw_endpoint_xfer_continue(ep);

From 6a2d01bae47d2660dc2d10941e767fc0bc0e97bc Mon Sep 17 00:00:00 2001
From: Ben Avison <code@piccolosystems.com>
Date: Thu, 1 Sep 2022 12:33:12 +0100
Subject: [PATCH 022/691] Don't assume different enum types can be combined

IAR generates warning Pa089 'enumerated type mixed with another enumerated
type'.
---
 examples/device/uac2_headset/src/usb_descriptors.h | 8 ++++----
 src/class/video/video.h                            | 2 +-
 src/device/usbd.h                                  | 8 ++++----
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/examples/device/uac2_headset/src/usb_descriptors.h b/examples/device/uac2_headset/src/usb_descriptors.h
index 342b4fac1..7d1f60e82 100644
--- a/examples/device/uac2_headset/src/usb_descriptors.h
+++ b/examples/device/uac2_headset/src/usb_descriptors.h
@@ -114,7 +114,7 @@ enum
     /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
     TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_RESOLUTION_RX),\
     /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
-    TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\
+    TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\
     /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
     TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_MILLISEC, /*_lockdelay*/ 0x0001),\
     /* Interface 1, Alternate 2 - alternate interface for data streaming */\
@@ -124,7 +124,7 @@ enum
     /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
     TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_RESOLUTION_RX),\
     /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
-    TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\
+    TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\
     /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
     TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_MILLISEC, /*_lockdelay*/ 0x0001),\
     /* Standard AS Interface Descriptor(4.9.1) */\
@@ -138,7 +138,7 @@ enum
     /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
     TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_RESOLUTION_TX),\
     /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
-    TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\
+    TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\
     /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
     TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000),\
     /* Interface 2, Alternate 2 - alternate interface for data streaming */\
@@ -148,7 +148,7 @@ enum
     /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
     TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_RESOLUTION_TX),\
     /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
-    TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\
+    TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\
     /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
     TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000)
 
diff --git a/src/class/video/video.h b/src/class/video/video.h
index 844746546..eb2f6adc9 100644
--- a/src/class/video/video.h
+++ b/src/class/video/video.h
@@ -470,7 +470,7 @@ TU_VERIFY_STATIC( sizeof(video_probe_and_commit_control_t) == 48, "size is not c
 
 /* 3.10.1.1 */
 #define TUD_VIDEO_DESC_EP_ISO(_ep, _epsize, _ep_interval) \
-  7, TUSB_DESC_ENDPOINT, _ep, TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS,\
+  7, TUSB_DESC_ENDPOINT, _ep, (uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS,\
   U16_TO_U8S_LE(_epsize), _ep_interval
 
 /* 3.10.1.2 */
diff --git a/src/device/usbd.h b/src/device/usbd.h
index 17b4d927b..64f166826 100644
--- a/src/device/usbd.h
+++ b/src/device/usbd.h
@@ -418,7 +418,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
 /* Standard AS Isochronous Feedback Endpoint Descriptor(4.10.2.1) */
 #define TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN 7
 #define TUD_AUDIO_DESC_STD_AS_ISO_FB_EP(_ep, _interval) \
-  TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN, TUSB_DESC_ENDPOINT, _ep, (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_NO_SYNC | TUSB_ISO_EP_ATT_EXPLICIT_FB), U16_TO_U8S_LE(4), _interval
+  TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN, TUSB_DESC_ENDPOINT, _ep, ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_NO_SYNC | TUSB_ISO_EP_ATT_EXPLICIT_FB), U16_TO_U8S_LE(4), _interval
 
 // AUDIO simple descriptor (UAC2) for 1 microphone input
 // - 1 Input Terminal, 1 Feature Unit (Mute and Volume Control), 1 Output Terminal, 1 Clock Source
@@ -465,7 +465,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
   /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
   TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\
   /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
-  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\
+  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\
   /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
   TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000)
 
@@ -514,7 +514,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
   /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
   TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\
   /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
-  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\
+  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\
   /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
   TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000)
 
@@ -562,7 +562,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
   /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
   TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\
   /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
-  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\
+  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\
   /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
   TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000),\
   /* Standard AS Isochronous Feedback Endpoint Descriptor(4.10.2.1) */\

From caff3b5c54615a0cc4e35dadffb99af543d0165f Mon Sep 17 00:00:00 2001
From: Ben Avison <code@piccolosystems.com>
Date: Thu, 1 Sep 2022 14:29:30 +0100
Subject: [PATCH 023/691] Remove unused static data

This affects struct rspMsg in usbtmc_app.c (unconditionally) and uint8_t
termChar in usbtmc_device.c (when NDEBUG is defined). IAR generates warning
Pe550 'variable was set but never used'.
---
 examples/device/usbtmc/src/usbtmc_app.c | 11 -----------
 src/class/usbtmc/usbtmc_device.c        |  4 ++++
 2 files changed, 4 insertions(+), 11 deletions(-)

diff --git a/examples/device/usbtmc/src/usbtmc_app.c b/examples/device/usbtmc/src/usbtmc_app.c
index e1ce115ad..0057a429f 100644
--- a/examples/device/usbtmc/src/usbtmc_app.c
+++ b/examples/device/usbtmc/src/usbtmc_app.c
@@ -92,14 +92,6 @@ static size_t buffer_tx_ix; // for transmitting using multiple transfers
 static uint8_t buffer[225]; // A few packets long should be enough.
 
 
-static usbtmc_msg_dev_dep_msg_in_header_t rspMsg = {
-    .bmTransferAttributes =
-    {
-      .EOM = 1,
-      .UsingTermChar = 0
-    }
-};
-
 void tud_usbtmc_open_cb(uint8_t interface_id)
 {
   (void)interface_id;
@@ -188,9 +180,6 @@ static unsigned int msgReqLen;
 
 bool tud_usbtmc_msgBulkIn_request_cb(usbtmc_msg_request_dev_dep_in const * request)
 {
-  rspMsg.header.MsgID = request->header.MsgID,
-  rspMsg.header.bTag = request->header.bTag,
-  rspMsg.header.bTagInverse = request->header.bTagInverse;
   msgReqLen = request->TransferSize;
 
 #ifdef xDEBUG
diff --git a/src/class/usbtmc/usbtmc_device.c b/src/class/usbtmc/usbtmc_device.c
index 64db85fcf..e96990c49 100644
--- a/src/class/usbtmc/usbtmc_device.c
+++ b/src/class/usbtmc/usbtmc_device.c
@@ -154,7 +154,9 @@ TU_VERIFY_STATIC(USBTMCD_BUFFER_SIZE >= 32u,"USBTMC dev buffer size too small");
 static bool handle_devMsgOutStart(uint8_t rhport, void *data, size_t len);
 static bool handle_devMsgOut(uint8_t rhport, void *data, size_t len, size_t packetLen);
 
+#ifndef NDEBUG
 static uint8_t termChar;
+#endif
 static uint8_t termCharRequested = false;
 
 osal_mutex_def_t usbtmcLockBuffer;
@@ -440,7 +442,9 @@ static bool handle_devMsgIn(void *data, size_t len)
   usbtmc_state.transfer_size_sent = 0u;
 
   termCharRequested = msg->bmTransferAttributes.TermCharEnabled;
+#ifndef NDEBUG
   termChar = msg->TermChar;
+#endif
 
   if(termCharRequested)
     TU_VERIFY(usbtmc_state.capabilities->bmDevCapabilities.canEndBulkInOnTermChar);

From 62d90c850096277080e4044dd37ef9c18748f06c Mon Sep 17 00:00:00 2001
From: Ben Avison <code@piccolosystems.com>
Date: Thu, 1 Sep 2022 14:33:04 +0100
Subject: [PATCH 024/691] Move variable into its own curly-brace scope

IAR generates warning Pe546 'transfer of control bypasses initialization of
variable "invInvTag"'.
---
 src/class/usbtmc/usbtmc_device.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/class/usbtmc/usbtmc_device.c b/src/class/usbtmc/usbtmc_device.c
index e96990c49..d7ba02d29 100644
--- a/src/class/usbtmc/usbtmc_device.c
+++ b/src/class/usbtmc/usbtmc_device.c
@@ -470,8 +470,10 @@ bool usbtmcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint
     case STATE_IDLE:
       TU_VERIFY(xferred_bytes >= sizeof(usbtmc_msg_generic_t));
       msg = (usbtmc_msg_generic_t*)(usbtmc_state.ep_bulk_out_buf);
-      uint8_t invInvTag = (uint8_t)~(msg->header.bTagInverse);
-      TU_VERIFY(msg->header.bTag == invInvTag);
+      {
+        uint8_t invInvTag = (uint8_t)~(msg->header.bTagInverse);
+        TU_VERIFY(msg->header.bTag == invInvTag);
+      }
       TU_VERIFY(msg->header.bTag != 0x00);
 
       switch(msg->header.MsgID) {

From 01edbb8af6b22fa213bcbbaccd92c9be5f72b376 Mon Sep 17 00:00:00 2001
From: Ben Avison <code@piccolosystems.com>
Date: Thu, 1 Sep 2022 17:10:26 +0100
Subject: [PATCH 025/691] IAR doesn't support __attribute__((fallthrough))

IAR generates warning Pa167 'the "fallthrough" attribute is not supported'.
It doesn't generate warnings when one switch case falls through to another,
so simply make TU_ATTR_FALLTHROUGH expand to an empty string.

Also replace one instance of __attribute__ with the macro.
---
 src/common/tusb_compiler.h | 2 +-
 src/host/usbh.c            | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index 2c30daf6f..894d0178a 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -189,7 +189,7 @@
   #define TU_ATTR_DEPRECATED(mess)      __attribute__ ((deprecated(mess))) // warn if function with this attribute is used
   #define TU_ATTR_UNUSED                __attribute__ ((unused))           // Function/Variable is meant to be possibly unused
   #define TU_ATTR_USED                  __attribute__ ((used))             // Function/Variable is meant to be used
-  #define TU_ATTR_FALLTHROUGH           __attribute__((fallthrough))
+  #define TU_ATTR_FALLTHROUGH
 
   #define TU_ATTR_PACKED_BEGIN
   #define TU_ATTR_PACKED_END
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 32f701248..fb8479419 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -1273,7 +1273,7 @@ static void process_enumeration(tuh_xfer_t* xfer)
         break;
       }
       #endif
-      __attribute__((fallthrough));
+      TU_ATTR_FALLTHROUGH;
 #endif
 
     case ENUM_SET_ADDR:

From 73f22e31c7a31e9b974e27407b906bbc8cb05a7a Mon Sep 17 00:00:00 2001
From: Ben Avison <code@piccolosystems.com>
Date: Mon, 12 Sep 2022 14:46:26 +0100
Subject: [PATCH 026/691] [rp2040] Wrap GCC pragmas in #ifdef __GNUC__

IAR generates warning Pe161 'unrecognized #pragma'.
---
 src/portable/raspberrypi/rp2040/rp2040_usb.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c
index 25c013bd2..adb9151f9 100644
--- a/src/portable/raspberrypi/rp2040/rp2040_usb.c
+++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c
@@ -57,15 +57,19 @@ void rp2040_usb_init(void)
   reset_block(RESETS_RESET_USBCTRL_BITS);
   unreset_block_wait(RESETS_RESET_USBCTRL_BITS);
 
+#ifdef __GNUC__
   // Clear any previous state just in case
 #pragma GCC diagnostic push
 #pragma GCC diagnostic ignored "-Warray-bounds"
 #if __GNUC__ > 6
 #pragma GCC diagnostic ignored "-Wstringop-overflow"
+#endif
 #endif
   memset(usb_hw, 0, sizeof(*usb_hw));
   memset(usb_dpram, 0, sizeof(*usb_dpram));
+#ifdef __GNUC__
 #pragma GCC diagnostic pop
+#endif
 
   // Mux the controller to the onboard usb phy
   usb_hw->muxing = USB_USB_MUXING_TO_PHY_BITS | USB_USB_MUXING_SOFTCON_BITS;

From 9e7e8908a34a4ef2a4b271b9d6b0598ed72e064f Mon Sep 17 00:00:00 2001
From: Louis Burda <quent.burda@gmail.com>
Date: Tue, 13 Dec 2022 11:00:03 +0100
Subject: [PATCH 027/691] Fix ifdefs for disabled uart stdio in rp2040 family

---
 hw/bsp/rp2040/family.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index f7ee56990..75328027b 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -115,7 +115,7 @@ void stdio_rtt_init(void)
 
 #endif
 
-#ifdef UART_DEV
+#if defined(UART_DEV) && defined(LIB_PICO_STDIO_UART)
 static uart_inst_t *uart_inst;
 #endif
 
@@ -191,7 +191,7 @@ uint32_t board_button_read(void)
 
 int board_uart_read(uint8_t* buf, int len)
 {
-#ifdef UART_DEV
+#if defined(UART_DEV) && defined(LIB_PICO_STDIO_UART)
   int count = 0;
   while ( (count < len) && uart_is_readable(uart_inst) )
   {
@@ -207,7 +207,7 @@ int board_uart_read(uint8_t* buf, int len)
 
 int board_uart_write(void const * buf, int len)
 {
-#ifdef UART_DEV
+#if defined(UART_DEV) && defined(LIB_PICO_STDIO_UART)
   char const* bufch = (char const*) buf;
   for(int i=0;i<len;i++) {
     uart_putc(uart_inst, bufch[i]);

From 6d65eaf7a18a498ef686a21e3d3ccb98dd42ec03 Mon Sep 17 00:00:00 2001
From: Simon Kueppers <simon.kueppers@skueppers.de>
Date: Mon, 24 Oct 2022 19:59:59 +0200
Subject: [PATCH 028/691] Implemented very rudimentary support for isochronous
 transfer buffer handling

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 134 ++++++++++--------
 .../st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h   |   2 +
 2 files changed, 75 insertions(+), 61 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 0e78c796e..17b5c7068 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -163,7 +163,7 @@ TU_VERIFY_STATIC(((DCD_STM32_BTABLE_BASE) % 8) == 0, "BTABLE base must be aligne
 typedef struct
 {
   uint8_t * buffer;
-  // tu_fifo_t * ff;  // TODO support dcd_edpt_xfer_fifo API
+  tu_fifo_t * ff;
   uint16_t total_len;
   uint16_t queued_len;
   uint16_t pma_ptr;
@@ -196,8 +196,8 @@ static void dcd_pma_free(uint8_t ep_addr);
 static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, size_t wNBytes);
 static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wNBytes);
 
-//static bool dcd_write_packet_memory_ff(tu_fifo_t * ff, uint16_t dst, uint16_t wNBytes);
-//static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNBytes);
+static bool dcd_write_packet_memory_ff(tu_fifo_t * ff, uint16_t dst, uint16_t wNBytes);
+static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNBytes);
 
 // Using a function due to better type checks
 // This seems better than having to do type casts everywhere else
@@ -222,7 +222,7 @@ void dcd_init (uint8_t rhport)
   {
     asm("NOP");
   }
-	// Perform USB peripheral reset
+  // Perform USB peripheral reset
   USB->CNTR = USB_CNTR_FRES | USB_CNTR_PDWN;
   for(uint32_t i = 0; i<200; i++) // should be a few us
   {
@@ -526,15 +526,15 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
 
     if (count != 0U)
     {
-#if 0 // TODO support dcd_edpt_xfer_fifo API
+      uint16_t addr = *pcd_ep_rx_address_ptr(USB, EPindex);
+
       if (xfer->ff)
       {
-        dcd_read_packet_memory_ff(xfer->ff, *pcd_ep_rx_address_ptr(USB,EPindex), count);
+        dcd_read_packet_memory_ff(xfer->ff, addr, count);
       }
       else
-#endif
       {
-        dcd_read_packet_memory(&(xfer->buffer[xfer->queued_len]), *pcd_ep_rx_address_ptr(USB,EPindex), count);
+        dcd_read_packet_memory(&(xfer->buffer[xfer->queued_len]), addr, count);
       }
 
       xfer->queued_len = (uint16_t)(xfer->queued_len + count);
@@ -683,6 +683,7 @@ void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * re
 
 static void dcd_pma_alloc_reset(void)
 {
+  open_ep_count = 0;
   ep_buf_ptr = DCD_STM32_BTABLE_BASE + 8*MAX_EP_COUNT; // 8 bytes per endpoint (two TX and two RX words, each)
   //TU_LOG2("dcd_pma_alloc_reset()\r\n");
   for(uint32_t i=0; i<MAX_EP_COUNT; i++)
@@ -709,6 +710,7 @@ static uint16_t dcd_pma_alloc(uint8_t ep_addr, size_t length)
   uint8_t const dir   = tu_edpt_dir(ep_addr);
   xfer_ctl_t* epXferCtl = xfer_ctl_ptr(epnum,dir);
 
+  open_ep_count++;
   if(epXferCtl->pma_alloc_size != 0U)
   {
     //TU_LOG2("dcd_pma_alloc(%x,%x)=%x (cached)\r\n",ep_addr,length,epXferCtl->pma_ptr);
@@ -771,9 +773,8 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
   const uint16_t epMaxPktSize = tu_edpt_packet_size(p_endpoint_desc);
   uint16_t pma_addr;
   uint32_t wType;
-  
+
   // Isochronous not supported (yet), and some other driver assumptions.
-  TU_ASSERT(p_endpoint_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS);
   TU_ASSERT(epnum < MAX_EP_COUNT);
 
   // Set type
@@ -781,12 +782,9 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
   case TUSB_XFER_CONTROL:
     wType = USB_EP_CONTROL;
     break;
-#if (0)
-  case TUSB_XFER_ISOCHRONOUS: // FIXME: Not yet supported
+  case TUSB_XFER_ISOCHRONOUS:
     wType = USB_EP_ISOCHRONOUS;
     break;
-#endif
-
   case TUSB_XFER_BULK:
     wType = USB_EP_CONTROL;
     break;
@@ -805,21 +803,41 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
   // or being double-buffered (bulk endpoints)
   pcd_clear_ep_kind(USB,0);
 
+  /* Create a packet memory buffer area. For isochronous endpoints,
+   * use the same buffer as the double buffer, essentially disabling double buffering */
   pma_addr = dcd_pma_alloc(p_endpoint_desc->bEndpointAddress, epMaxPktSize);
 
+#if defined(ISOCHRONOUS_DOUBLEBUFFER)
+  if( (dir == TUSB_DIR_IN) || (wType == USB_EP_ISOCHRONOUS) )
+#else
   if(dir == TUSB_DIR_IN)
+#endif
   {
     *pcd_ep_tx_address_ptr(USB, epnum) = pma_addr;
     pcd_set_ep_tx_cnt(USB, epnum, epMaxPktSize);
     pcd_clear_tx_dtog(USB, epnum);
-    pcd_set_ep_tx_status(USB,epnum,USB_EP_TX_NAK);
+
+    if(wType == USB_EP_ISOCHRONOUS) {
+      pcd_set_ep_tx_status(USB, epnum, USB_EP_TX_DIS);
+    } else {
+      pcd_set_ep_tx_status(USB, epnum, USB_EP_TX_NAK);
+    }
   }
+#if defined(ISOCHRONOUS_DOUBLEBUFFER)
+  if( (dir == TUSB_DIR_OUT) || (wType == USB_EP_ISOCHRONOUS) )
+#else
   else
+#endif
   {
     *pcd_ep_rx_address_ptr(USB, epnum) = pma_addr;
     pcd_set_ep_rx_cnt(USB, epnum, epMaxPktSize);
     pcd_clear_rx_dtog(USB, epnum);
-    pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_NAK);
+
+    if(wType == USB_EP_ISOCHRONOUS) {
+      pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_DIS);
+    } else {
+      pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_NAK);
+    }
   }
 
   xfer_ctl_ptr(epnum, dir)->max_packet_size = epMaxPktSize;
@@ -845,10 +863,10 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr)
   (void)rhport;
   uint32_t const epnum = tu_edpt_number(ep_addr);
   uint32_t const dir   = tu_edpt_dir(ep_addr);
-  
+
   if(dir == TUSB_DIR_IN)
   {
-    pcd_set_ep_tx_status(USB,epnum,USB_EP_TX_DIS);
+    pcd_set_ep_tx_status(USB,epnum, USB_EP_TX_DIS);
   }
   else
   {
@@ -868,15 +886,14 @@ static void dcd_transmit_packet(xfer_ctl_t * xfer, uint16_t ep_ix)
   {
     len = xfer->max_packet_size;
   }
+
   uint16_t oldAddr = *pcd_ep_tx_address_ptr(USB,ep_ix);
 
-#if 0 // TODO support dcd_edpt_xfer_fifo API
   if (xfer->ff)
   {
     dcd_write_packet_memory_ff(xfer->ff, oldAddr, len);
   }
   else
-#endif
   {
     dcd_write_packet_memory(oldAddr, &(xfer->buffer[xfer->queued_len]), len);
   }
@@ -896,7 +913,7 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
   xfer_ctl_t * xfer = xfer_ctl_ptr(epnum,dir);
 
   xfer->buffer = buffer;
-  // xfer->ff     = NULL; // TODO support dcd_edpt_xfer_fifo API
+  xfer->ff     = NULL; // TODO support dcd_edpt_xfer_fifo API
   xfer->total_len = total_bytes;
   xfer->queued_len = 0;
 
@@ -908,6 +925,7 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
     {
         xfer->buffer = (uint8_t*)_setup_packet;
     }
+
     if(total_bytes > xfer->max_packet_size)
     {
       pcd_set_ep_rx_cnt(USB,epnum,xfer->max_packet_size);
@@ -923,7 +941,6 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
   return true;
 }
 
-#if 0 // TODO support dcd_edpt_xfer_fifo API
 bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes)
 {
   (void) rhport;
@@ -934,7 +951,7 @@ bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16
   xfer_ctl_t * xfer = xfer_ctl_ptr(epnum,dir);
 
   xfer->buffer = NULL;
-  // xfer->ff     = ff; // TODO support dcd_edpt_xfer_fifo API
+  xfer->ff     = ff; // TODO support dcd_edpt_xfer_fifo API
   xfer->total_len = total_bytes;
   xfer->queued_len = 0;
 
@@ -954,7 +971,6 @@ bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16
   }
   return true;
 }
-#endif
 
 void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
 {
@@ -978,7 +994,10 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
   { // IN
     ep_addr &= 0x7F;
 
-    pcd_set_ep_tx_status(USB,ep_addr, USB_EP_TX_NAK);
+    uint8_t const epnum = tu_edpt_number(ep_addr);
+    if (pcd_get_eptype(USB, epnum) !=  USB_EP_ISOCHRONOUS) {
+      pcd_set_ep_tx_status(USB,ep_addr, USB_EP_TX_NAK);
+    }
 
     /* Reset to DATA0 if clearing stall condition. */
     pcd_clear_tx_dtog(USB,ep_addr);
@@ -1029,7 +1048,6 @@ static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, si
   return true;
 }
 
-#if 0 // TODO support dcd_edpt_xfer_fifo API
 /**
   * @brief Copy from FIFO to packet memory area (PMA).
   *        Uses byte-access of system memory and 16-bit access of packet memory
@@ -1043,38 +1061,36 @@ static bool dcd_write_packet_memory_ff(tu_fifo_t * ff, uint16_t dst, uint16_t wN
 {
   // Since we copy from a ring buffer FIFO, a wrap might occur making it necessary to conduct two copies
   // Check for first linear part
-  void * src;
-  uint16_t len = tu_fifo_get_linear_read_info(ff, 0, &src, wNBytes);  // We want to read from the FIFO        - THIS FUNCTION CHANGED!!!
-  TU_VERIFY(len && dcd_write_packet_memory(dst, src, len));           // and write it into the PMA
-  tu_fifo_advance_read_pointer(ff, len);
+  tu_fifo_buffer_info_t info;
+  tu_fifo_get_read_info(ff, &info);  // We want to read from the FIFO
+  TU_VERIFY(info.len_lin && dcd_write_packet_memory(dst, info.ptr_lin, info.len_lin));           // and write it into the PMA
+  tu_fifo_advance_read_pointer(ff, info.len_lin);
 
   // Check for wrapped part
-  if (len < wNBytes)
+  if (info.len_wrap)
   {
-    // Get remaining wrapped length
-    uint16_t len2 = tu_fifo_get_linear_read_info(ff, 0, &src, wNBytes - len);
-    TU_VERIFY(len2);
-
     // Update destination pointer
-    dst += len;
+    dst += info.len_lin;
+    uint8_t* src = (uint8_t*)info.ptr_wrap;
+    uint16_t len2 = info.len_wrap;
 
     // Since PMA is accessed 16-bit wise we need to handle the case when a 16 bit value was split
-    if (len % 2)    // If len is uneven there is a byte left to copy
+    if (info.len_lin % 2)    // If len is uneven there is a byte left to copy
     {
-      // Since PMA can accessed only 16 bit-wise we copy the last byte again
-      tu_fifo_backward_read_pointer(ff, 1);                 // Move one byte back and copy two bytes for the PMA
-      tu_fifo_read_n(ff, (void *) &pma[PMA_STRIDE*(dst>>1)], 2);     // Since EP FIFOs must be of item size 1 this is safe to do
-      dst++;
+      TU_ASSERT(false); // TODO: Step through and check -> untested
+
+      uint16_t temp = ((uint8_t *)info.ptr_lin)[info.len_lin-1] | src[0] << 16; // CHECK endianess
+      pma[PMA_STRIDE*(dst>>1)] = temp;
+      src++;
       len2--;
     }
 
     TU_VERIFY(dcd_write_packet_memory(dst, src, len2));
-    tu_fifo_advance_write_pointer(ff, len2);
+    tu_fifo_advance_write_pointer(ff, info.len_wrap);
   }
 
   return true;
 }
-#endif
 
 /**
   * @brief Copy a buffer from packet memory area (PMA) to user memory area.
@@ -1111,7 +1127,6 @@ static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wN
   return true;
 }
 
-#if 0 // TODO support dcd_edpt_xfer_fifo API
 /**
   * @brief Copy a buffer from user packet memory area (PMA) to FIFO.
   *        Uses byte-access of system memory and 16-bit access of packet memory
@@ -1125,32 +1140,31 @@ static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNB
 {
   // Since we copy into a ring buffer FIFO, a wrap might occur making it necessary to conduct two copies
   // Check for first linear part
-  void * dst;
-  uint16_t len = tu_fifo_get_linear_write_info(ff, 0, &dst, wNBytes);           // THIS FUNCTION CHANGED!!!!
-  TU_VERIFY(len && dcd_read_packet_memory(dst, src, len));
-  tu_fifo_advance_write_pointer(ff, len);
+  tu_fifo_buffer_info_t info;
+  tu_fifo_get_write_info(ff, &info);  // We want to read from the FIFO
+
+  TU_VERIFY(info.len_lin && dcd_read_packet_memory(info.ptr_lin, src, info.len_lin));
+  tu_fifo_advance_write_pointer(ff, info.len_lin);
 
   // Check for wrapped part
-  if (len < wNBytes)
+  if (info.len_wrap)
   {
-    // Get remaining wrapped length
-    uint16_t len2 = tu_fifo_get_linear_write_info(ff, 0, &dst, wNBytes - len);
-    TU_VERIFY(len2);
-
     // Update source pointer
-    src += len;
+    src += info.len_lin;
 
     // Since PMA is accessed 16-bit wise we need to handle the case when a 16 bit value was split
-    if (len % 2)    // If len is uneven there is a byte left to copy
+    if (info.len_lin % 2)    // If len is uneven there is a byte left to copy
     {
+      TU_ASSERT(false); //TODO: step through -> untested
       uint32_t temp = pma[PMA_STRIDE*(src>>1)];
-      *((uint8_t *)dst++) = ((temp >> 8) & 0xFF);
+      *((uint8_t *)info.ptr_wrap++) = ((temp >> 8) & 0xFF);
       src++;
-      len2--;
+      tu_fifo_advance_write_pointer(ff, 1);
+      info.len_wrap--;
     }
 
-    TU_VERIFY(dcd_read_packet_memory(dst, src, len2));
-    tu_fifo_advance_write_pointer(ff, len2);
+    TU_VERIFY(dcd_read_packet_memory(info.ptr_wrap, src, info.len_wrap));
+    tu_fifo_advance_write_pointer(ff, info.len_wrap);
   }
 
   return true;
@@ -1158,5 +1172,3 @@ static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNB
 
 #endif
 
-#endif
-
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index bffae4500..40c4003c5 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -66,6 +66,7 @@
       defined(STM32F373xC)
   #include "stm32f3xx.h"
   #define PMA_LENGTH (512u)
+  #define ISOCHRONOUS_DOUBLEBUFFER
   // NO internal Pull-ups
   //         *B, and *C:    1 x 16 bits/word
   // PMA dedicated to USB (no sharing with CAN)
@@ -75,6 +76,7 @@
       defined(STM32F303xD) || defined(STM32F303xE)
   #include "stm32f3xx.h"
   #define PMA_LENGTH (1024u)
+  #define ISOCHRONOUS_DOUBLEBUFFER
   // NO internal Pull-ups
   // *6, *8, *D, and *E:    2 x 16 bits/word     LPM Support
   // When CAN clock is enabled, USB can use first 768 bytes ONLY.

From d9b2c9934a5a7051e6f6c19fa4047109c3e056fb Mon Sep 17 00:00:00 2001
From: Simon Kueppers <simon.kueppers@skueppers.de>
Date: Mon, 24 Oct 2022 22:07:45 +0200
Subject: [PATCH 029/691] Implemented an optional callback function that is
 used instead of tu_edpt_number in the stm32 device driver as a crude tool to
 control mapping of the endpoint address to actual endpoint register

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 48 ++++++++++---------
 .../st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h   |  9 ++++
 2 files changed, 35 insertions(+), 22 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 17b5c7068..73fecb750 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -400,7 +400,7 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
   (void) dev_addr;
 
   // Respond with status
-  dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0);
+  dcd_edpt_xfer(rhport, TUSB_DIR_IN_MASK | 0x00, NULL, 0);
 
   // DCD can only set address after status for this request is complete.
   // do it at dcd_edpt0_status_complete()
@@ -479,7 +479,8 @@ static void dcd_ep_ctr_tx_handler(uint32_t wIstr)
   }
   else /* TX Complete */
   {
-    dcd_event_xfer_complete(0, (uint8_t)(0x80 + EPindex), xfer->total_len, XFER_RESULT_SUCCESS, true);
+    uint8_t ep_addr = wEPRegVal & USB_EPADDR_FIELD;
+    dcd_event_xfer_complete(0, (uint8_t)(TUSB_DIR_IN_MASK | ep_addr), xfer->total_len, XFER_RESULT_SUCCESS, true);
   }
 }
 
@@ -543,7 +544,8 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
     if ((count < xfer->max_packet_size) || (xfer->queued_len == xfer->total_len))
     {
       /* RX COMPLETE */
-      dcd_event_xfer_complete(0, EPindex, xfer->queued_len, XFER_RESULT_SUCCESS, true);
+      uint8_t ep_addr = wEPRegVal & USB_EPADDR_FIELD;
+      dcd_event_xfer_complete(0, ep_addr, xfer->queued_len, XFER_RESULT_SUCCESS, true);
       // Though the host could still send, we don't know.
       // Does the bulk pipe need to be reset to valid to allow for a ZLP?
     }
@@ -706,7 +708,7 @@ static void dcd_pma_alloc_reset(void)
  */
 static uint16_t dcd_pma_alloc(uint8_t ep_addr, size_t length)
 {
-  uint8_t const epnum = tu_edpt_number(ep_addr);
+  uint8_t const epnum = tu_stm32_edpt_number_cb ? tu_stm32_edpt_number_cb(ep_addr) : tu_edpt_number(ep_addr);
   uint8_t const dir   = tu_edpt_dir(ep_addr);
   xfer_ctl_t* epXferCtl = xfer_ctl_ptr(epnum,dir);
 
@@ -737,7 +739,7 @@ static uint16_t dcd_pma_alloc(uint8_t ep_addr, size_t length)
  */
 static void dcd_pma_free(uint8_t ep_addr)
 {
-  uint8_t const epnum = tu_edpt_number(ep_addr);
+  uint8_t const epnum = tu_stm32_edpt_number_cb ? tu_stm32_edpt_number_cb(ep_addr) : tu_edpt_number(ep_addr);
   uint8_t const dir   = tu_edpt_dir(ep_addr);
 
   // Presently, this should never be called for EP0 IN/OUT
@@ -768,7 +770,7 @@ static void dcd_pma_free(uint8_t ep_addr)
 bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
 {
   (void)rhport;
-  uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress);
+  uint8_t const epnum = tu_stm32_edpt_number_cb ? tu_stm32_edpt_number_cb(p_endpoint_desc->bEndpointAddress) : tu_edpt_number(p_endpoint_desc->bEndpointAddress);
   uint8_t const dir   = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
   const uint16_t epMaxPktSize = tu_edpt_packet_size(p_endpoint_desc);
   uint16_t pma_addr;
@@ -798,7 +800,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
   }
 
   pcd_set_eptype(USB, epnum, wType);
-  pcd_set_ep_address(USB, epnum, epnum);
+  pcd_set_ep_address(USB, epnum, tu_edpt_number(p_endpoint_desc->bEndpointAddress));
   // Be normal, for now, instead of only accepting zero-byte packets (on control endpoint)
   // or being double-buffered (bulk endpoints)
   pcd_clear_ep_kind(USB,0);
@@ -861,7 +863,7 @@ void dcd_edpt_close_all (uint8_t rhport)
 void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr)
 {
   (void)rhport;
-  uint32_t const epnum = tu_edpt_number(ep_addr);
+  uint32_t const epnum = tu_stm32_edpt_number_cb ? tu_stm32_edpt_number_cb(ep_addr) : tu_edpt_number(ep_addr);
   uint32_t const dir   = tu_edpt_dir(ep_addr);
 
   if(dir == TUSB_DIR_IN)
@@ -907,7 +909,7 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
 {
   (void) rhport;
 
-  uint8_t const epnum = tu_edpt_number(ep_addr);
+  uint8_t const epnum = tu_stm32_edpt_number_cb ? tu_stm32_edpt_number_cb(ep_addr) : tu_edpt_number(ep_addr);
   uint8_t const dir   = tu_edpt_dir(ep_addr);
 
   xfer_ctl_t * xfer = xfer_ctl_ptr(epnum,dir);
@@ -945,7 +947,7 @@ bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16
 {
   (void) rhport;
 
-  uint8_t const epnum = tu_edpt_number(ep_addr);
+  uint8_t const epnum = tu_stm32_edpt_number_cb ? tu_stm32_edpt_number_cb(ep_addr) : tu_edpt_number(ep_addr);
   uint8_t const dir   = tu_edpt_dir(ep_addr);
 
   xfer_ctl_t * xfer = xfer_ctl_ptr(epnum,dir);
@@ -976,13 +978,16 @@ void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
 {
   (void)rhport;
 
-  if (ep_addr & 0x80)
+  uint8_t const epnum = tu_stm32_edpt_number_cb ? tu_stm32_edpt_number_cb(ep_addr) : tu_edpt_number(ep_addr);
+  uint8_t const dir   = tu_edpt_dir(ep_addr);
+
+  if (dir == TUSB_DIR_IN)
   { // IN
-    pcd_set_ep_tx_status(USB, ep_addr & 0x7F, USB_EP_TX_STALL);
+    pcd_set_ep_tx_status(USB, epnum, USB_EP_TX_STALL);
   }
   else
   { // OUT
-    pcd_set_ep_rx_status(USB, ep_addr, USB_EP_RX_STALL);
+    pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_STALL);
   }
 }
 
@@ -990,24 +995,23 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
 {
   (void)rhport;
 
-  if (ep_addr & 0x80)
-  { // IN
-    ep_addr &= 0x7F;
+  uint8_t const epnum = tu_stm32_edpt_number_cb ? tu_stm32_edpt_number_cb(ep_addr) : tu_edpt_number(ep_addr);
+  uint8_t const dir   = tu_edpt_dir(ep_addr);
 
-    uint8_t const epnum = tu_edpt_number(ep_addr);
+  if (dir == TUSB_DIR_IN)
+  { // IN
     if (pcd_get_eptype(USB, epnum) !=  USB_EP_ISOCHRONOUS) {
-      pcd_set_ep_tx_status(USB,ep_addr, USB_EP_TX_NAK);
+      pcd_set_ep_tx_status(USB, epnum, USB_EP_TX_NAK);
     }
 
     /* Reset to DATA0 if clearing stall condition. */
-    pcd_clear_tx_dtog(USB,ep_addr);
+    pcd_clear_tx_dtog(USB, epnum);
   }
   else
   { // OUT
     /* Reset to DATA0 if clearing stall condition. */
-    pcd_clear_rx_dtog(USB,ep_addr);
-
-    pcd_set_ep_rx_status(USB,ep_addr, USB_EP_RX_NAK);
+    pcd_clear_rx_dtog(USB, epnum);
+    pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_NAK);
   }
 }
 
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index 40c4003c5..5d26d3525 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -117,6 +117,15 @@
 // Volatile is also needed to prevent the optimizer from changing access to 32-bit (as 32-bit access is forbidden)
 static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
 
+// This array maps the endpoint address to a endpoint register in hardware
+// By default the tinyusb stack chooses the endpoint register using the endpoint number
+// However when using ISOCHRONOUS endpoints, the entire endpoint register (RX _and_ TX)
+// are used for a double buffer in a single direction. If you now want to use the same endpoint number with
+// different directions (e.g. 0x02 and 0x82), they would be mapped to the same register
+// In this case, this serves as a crude helper to overcome this limitation by implementing
+// this callback and defining a custom mapping in your application
+TU_ATTR_WEAK uint8_t tu_stm32_edpt_number_cb(uint8_t addr);
+
 // prototypes
 static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum);
 static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum);

From 8c0388f477839810260f578922f17a5197294cc1 Mon Sep 17 00:00:00 2001
From: Simon Kueppers <simon.kueppers@skueppers.de>
Date: Mon, 24 Oct 2022 22:39:38 +0200
Subject: [PATCH 030/691] Fixed wrongly enabling RX and TX status
 simultaneously on ISOCHRONOUS endpoints

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 73fecb750..d2fefde82 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -818,12 +818,6 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
     *pcd_ep_tx_address_ptr(USB, epnum) = pma_addr;
     pcd_set_ep_tx_cnt(USB, epnum, epMaxPktSize);
     pcd_clear_tx_dtog(USB, epnum);
-
-    if(wType == USB_EP_ISOCHRONOUS) {
-      pcd_set_ep_tx_status(USB, epnum, USB_EP_TX_DIS);
-    } else {
-      pcd_set_ep_tx_status(USB, epnum, USB_EP_TX_NAK);
-    }
   }
 #if defined(ISOCHRONOUS_DOUBLEBUFFER)
   if( (dir == TUSB_DIR_OUT) || (wType == USB_EP_ISOCHRONOUS) )
@@ -834,7 +828,18 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
     *pcd_ep_rx_address_ptr(USB, epnum) = pma_addr;
     pcd_set_ep_rx_cnt(USB, epnum, epMaxPktSize);
     pcd_clear_rx_dtog(USB, epnum);
+  }
 
+  /* Enable endpoint */
+  if (dir == TUSB_DIR_IN)
+  {
+    if(wType == USB_EP_ISOCHRONOUS) {
+      pcd_set_ep_tx_status(USB, epnum, USB_EP_TX_DIS);
+    } else {
+      pcd_set_ep_tx_status(USB, epnum, USB_EP_TX_NAK);
+    }
+  } else
+  {
     if(wType == USB_EP_ISOCHRONOUS) {
       pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_DIS);
     } else {

From abf53f927067f84d057d54e31d44d5fc40c76cf7 Mon Sep 17 00:00:00 2001
From: Simon Kueppers <simon.kueppers@skueppers.de>
Date: Tue, 25 Oct 2022 17:45:04 +0200
Subject: [PATCH 031/691] Changed indirection from actual endpoint address to
 hardware endpoint through lookup table. Allocation of endpoint is now only
 performed in dcd_edpt_open

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 71 ++++++++++---------
 1 file changed, 38 insertions(+), 33 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index d2fefde82..7ebaa826c 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -169,12 +169,17 @@ typedef struct
   uint16_t pma_ptr;
   uint8_t max_packet_size;
   uint8_t pma_alloc_size;
+  uint8_t epnum;
 } xfer_ctl_t;
 
 static xfer_ctl_t xfer_status[MAX_EP_COUNT][2];
 
-static inline xfer_ctl_t* xfer_ctl_ptr(uint32_t epnum, uint32_t dir)
+static inline xfer_ctl_t* xfer_ctl_ptr(uint32_t ep_addr)
 {
+  uint8_t epnum = tu_edpt_number(ep_addr);
+  uint8_t dir = tu_edpt_dir(ep_addr);
+  TU_ASSERT(epnum < MAX_EP_COUNT);
+
   return &xfer_status[epnum][dir];
 }
 
@@ -461,6 +466,7 @@ static void dcd_ep_ctr_tx_handler(uint32_t wIstr)
 {
   uint32_t EPindex = wIstr & USB_ISTR_EP_ID;
   uint32_t wEPRegVal = pcd_get_endpoint(USB, EPindex);
+  uint8_t ep_addr = (wEPRegVal & USB_EPADDR_FIELD) | TUSB_DIR_IN_MASK;
 
   // Verify the CTR_TX bit is set. This was in the ST Micro code,
   // but I'm not sure it's actually necessary?
@@ -472,15 +478,14 @@ static void dcd_ep_ctr_tx_handler(uint32_t wIstr)
   /* clear int flag */
   pcd_clear_tx_ep_ctr(USB, EPindex);
 
-  xfer_ctl_t * xfer = xfer_ctl_ptr(EPindex,TUSB_DIR_IN);
+  xfer_ctl_t * xfer = xfer_ctl_ptr(ep_addr);
   if((xfer->total_len != xfer->queued_len)) /* TX not complete */
   {
       dcd_transmit_packet(xfer, EPindex);
   }
   else /* TX Complete */
   {
-    uint8_t ep_addr = wEPRegVal & USB_EPADDR_FIELD;
-    dcd_event_xfer_complete(0, (uint8_t)(TUSB_DIR_IN_MASK | ep_addr), xfer->total_len, XFER_RESULT_SUCCESS, true);
+    dcd_event_xfer_complete(0, ep_addr, xfer->total_len, XFER_RESULT_SUCCESS, true);
   }
 }
 
@@ -492,8 +497,9 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
   uint32_t EPindex = wIstr & USB_ISTR_EP_ID;
   uint32_t wEPRegVal = pcd_get_endpoint(USB, EPindex);
   uint32_t count = pcd_get_ep_rx_cnt(USB,EPindex);
+  uint8_t ep_addr = wEPRegVal & USB_EPADDR_FIELD;
 
-  xfer_ctl_t *xfer = xfer_ctl_ptr(EPindex,TUSB_DIR_OUT);
+  xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
 
   // Verify the CTR_RX bit is set. This was in the ST Micro code,
   // but I'm not sure it's actually necessary?
@@ -544,7 +550,6 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
     if ((count < xfer->max_packet_size) || (xfer->queued_len == xfer->total_len))
     {
       /* RX COMPLETE */
-      uint8_t ep_addr = wEPRegVal & USB_EPADDR_FIELD;
       dcd_event_xfer_complete(0, ep_addr, xfer->queued_len, XFER_RESULT_SUCCESS, true);
       // Though the host could still send, we don't know.
       // Does the bulk pipe need to be reset to valid to allow for a ZLP?
@@ -690,10 +695,10 @@ static void dcd_pma_alloc_reset(void)
   //TU_LOG2("dcd_pma_alloc_reset()\r\n");
   for(uint32_t i=0; i<MAX_EP_COUNT; i++)
   {
-    xfer_ctl_ptr(i,TUSB_DIR_OUT)->pma_alloc_size = 0U;
-    xfer_ctl_ptr(i,TUSB_DIR_IN)->pma_alloc_size = 0U;
-    xfer_ctl_ptr(i,TUSB_DIR_OUT)->pma_ptr = 0U;
-    xfer_ctl_ptr(i,TUSB_DIR_IN)->pma_ptr = 0U;
+    xfer_ctl_ptr(tu_edpt_addr(i,TUSB_DIR_OUT))->pma_alloc_size = 0U;
+    xfer_ctl_ptr(tu_edpt_addr(i,TUSB_DIR_IN))->pma_alloc_size = 0U;
+    xfer_ctl_ptr(tu_edpt_addr(i,TUSB_DIR_OUT))->pma_ptr = 0U;
+    xfer_ctl_ptr(tu_edpt_addr(i,TUSB_DIR_IN))->pma_ptr = 0U;
   }
 }
 
@@ -708,11 +713,8 @@ static void dcd_pma_alloc_reset(void)
  */
 static uint16_t dcd_pma_alloc(uint8_t ep_addr, size_t length)
 {
-  uint8_t const epnum = tu_stm32_edpt_number_cb ? tu_stm32_edpt_number_cb(ep_addr) : tu_edpt_number(ep_addr);
-  uint8_t const dir   = tu_edpt_dir(ep_addr);
-  xfer_ctl_t* epXferCtl = xfer_ctl_ptr(epnum,dir);
+  xfer_ctl_t* epXferCtl = xfer_ctl_ptr(ep_addr);
 
-  open_ep_count++;
   if(epXferCtl->pma_alloc_size != 0U)
   {
     //TU_LOG2("dcd_pma_alloc(%x,%x)=%x (cached)\r\n",ep_addr,length,epXferCtl->pma_ptr);
@@ -739,12 +741,9 @@ static uint16_t dcd_pma_alloc(uint8_t ep_addr, size_t length)
  */
 static void dcd_pma_free(uint8_t ep_addr)
 {
-  uint8_t const epnum = tu_stm32_edpt_number_cb ? tu_stm32_edpt_number_cb(ep_addr) : tu_edpt_number(ep_addr);
-  uint8_t const dir   = tu_edpt_dir(ep_addr);
-
   // Presently, this should never be called for EP0 IN/OUT
   TU_ASSERT(open_ep_count > 2, /**/);
-  TU_ASSERT(xfer_ctl_ptr(epnum,dir)->max_packet_size != 0, /**/);
+  TU_ASSERT(xfer_ctl_ptr(ep_addr)->max_packet_size != 0, /**/);
   open_ep_count--;
 
   // If count is 2, only EP0 should be open, so allocations can be mostly reset.
@@ -756,10 +755,10 @@ static void dcd_pma_free(uint8_t ep_addr)
     // Skip EP0
     for(uint32_t i=1; i<MAX_EP_COUNT; i++)
     {
-      xfer_ctl_ptr(i,TUSB_DIR_OUT)->pma_alloc_size = 0U;
-      xfer_ctl_ptr(i,TUSB_DIR_IN)->pma_alloc_size = 0U;
-      xfer_ctl_ptr(i,TUSB_DIR_OUT)->pma_ptr = 0U;
-      xfer_ctl_ptr(i,TUSB_DIR_IN)->pma_ptr = 0U;
+      xfer_ctl_ptr(tu_edpt_addr(i,TUSB_DIR_OUT))->pma_alloc_size = 0U;
+      xfer_ctl_ptr(tu_edpt_addr(i,TUSB_DIR_IN))->pma_alloc_size = 0U;
+      xfer_ctl_ptr(tu_edpt_addr(i,TUSB_DIR_OUT))->pma_ptr = 0U;
+      xfer_ctl_ptr(tu_edpt_addr(i,TUSB_DIR_IN))->pma_ptr = 0U;
     }
   }
 }
@@ -770,6 +769,7 @@ static void dcd_pma_free(uint8_t ep_addr)
 bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
 {
   (void)rhport;
+  /* TODO: This hardware endpoint allocation could be more sensible. For now, simple allocation or manual allocation using callback */
   uint8_t const epnum = tu_stm32_edpt_number_cb ? tu_stm32_edpt_number_cb(p_endpoint_desc->bEndpointAddress) : tu_edpt_number(p_endpoint_desc->bEndpointAddress);
   uint8_t const dir   = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
   const uint16_t epMaxPktSize = tu_edpt_packet_size(p_endpoint_desc);
@@ -799,6 +799,8 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
     TU_ASSERT(false);
   }
 
+  open_ep_count++;
+
   pcd_set_eptype(USB, epnum, wType);
   pcd_set_ep_address(USB, epnum, tu_edpt_number(p_endpoint_desc->bEndpointAddress));
   // Be normal, for now, instead of only accepting zero-byte packets (on control endpoint)
@@ -847,7 +849,8 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
     }
   }
 
-  xfer_ctl_ptr(epnum, dir)->max_packet_size = epMaxPktSize;
+  xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->max_packet_size = epMaxPktSize;
+  xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->epnum = epnum;
 
   return true;
 }
@@ -868,8 +871,10 @@ void dcd_edpt_close_all (uint8_t rhport)
 void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr)
 {
   (void)rhport;
-  uint32_t const epnum = tu_stm32_edpt_number_cb ? tu_stm32_edpt_number_cb(ep_addr) : tu_edpt_number(ep_addr);
-  uint32_t const dir   = tu_edpt_dir(ep_addr);
+
+  xfer_ctl_t * xfer = xfer_ctl_ptr(ep_addr);
+  uint8_t const epnum = xfer->epnum;
+  uint8_t const dir   = tu_edpt_dir(ep_addr);
 
   if(dir == TUSB_DIR_IN)
   {
@@ -914,11 +919,10 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
 {
   (void) rhport;
 
-  uint8_t const epnum = tu_stm32_edpt_number_cb ? tu_stm32_edpt_number_cb(ep_addr) : tu_edpt_number(ep_addr);
+  xfer_ctl_t * xfer = xfer_ctl_ptr(ep_addr);
+  uint8_t const epnum = xfer->epnum;
   uint8_t const dir   = tu_edpt_dir(ep_addr);
 
-  xfer_ctl_t * xfer = xfer_ctl_ptr(epnum,dir);
-
   xfer->buffer = buffer;
   xfer->ff     = NULL; // TODO support dcd_edpt_xfer_fifo API
   xfer->total_len = total_bytes;
@@ -952,11 +956,10 @@ bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16
 {
   (void) rhport;
 
-  uint8_t const epnum = tu_stm32_edpt_number_cb ? tu_stm32_edpt_number_cb(ep_addr) : tu_edpt_number(ep_addr);
+  xfer_ctl_t * xfer = xfer_ctl_ptr(ep_addr);
+  uint8_t const epnum = xfer->epnum;
   uint8_t const dir   = tu_edpt_dir(ep_addr);
 
-  xfer_ctl_t * xfer = xfer_ctl_ptr(epnum,dir);
-
   xfer->buffer = NULL;
   xfer->ff     = ff; // TODO support dcd_edpt_xfer_fifo API
   xfer->total_len = total_bytes;
@@ -983,7 +986,8 @@ void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
 {
   (void)rhport;
 
-  uint8_t const epnum = tu_stm32_edpt_number_cb ? tu_stm32_edpt_number_cb(ep_addr) : tu_edpt_number(ep_addr);
+  xfer_ctl_t * xfer = xfer_ctl_ptr(ep_addr);
+  uint8_t const epnum = xfer->epnum;
   uint8_t const dir   = tu_edpt_dir(ep_addr);
 
   if (dir == TUSB_DIR_IN)
@@ -1000,7 +1004,8 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
 {
   (void)rhport;
 
-  uint8_t const epnum = tu_stm32_edpt_number_cb ? tu_stm32_edpt_number_cb(ep_addr) : tu_edpt_number(ep_addr);
+  xfer_ctl_t * xfer = xfer_ctl_ptr(ep_addr);
+  uint8_t const epnum = xfer->epnum;
   uint8_t const dir   = tu_edpt_dir(ep_addr);
 
   if (dir == TUSB_DIR_IN)

From ec826732fccf070b4de1369d0ee50d653689bb9c Mon Sep 17 00:00:00 2001
From: Simon Kueppers <simon.kueppers@skueppers.de>
Date: Tue, 25 Oct 2022 18:32:10 +0200
Subject: [PATCH 032/691] Fixed non-aligned allocated memory sizes

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 11 +++--
 .../st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h   | 44 +++++++++----------
 2 files changed, 26 insertions(+), 29 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 7ebaa826c..cb2b5a029 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -723,7 +723,7 @@ static uint16_t dcd_pma_alloc(uint8_t ep_addr, size_t length)
     return epXferCtl->pma_ptr;
   }
   
-  uint16_t addr = ep_buf_ptr; 
+  uint16_t addr = ep_buf_ptr;
   ep_buf_ptr = (uint16_t)(ep_buf_ptr + length); // increment buffer pointer
   
   // Verify no overflow
@@ -772,7 +772,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
   /* TODO: This hardware endpoint allocation could be more sensible. For now, simple allocation or manual allocation using callback */
   uint8_t const epnum = tu_stm32_edpt_number_cb ? tu_stm32_edpt_number_cb(p_endpoint_desc->bEndpointAddress) : tu_edpt_number(p_endpoint_desc->bEndpointAddress);
   uint8_t const dir   = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
-  const uint16_t epMaxPktSize = tu_edpt_packet_size(p_endpoint_desc);
+  const uint16_t buffer_size = pcd_aligned_buffer_size(tu_edpt_packet_size(p_endpoint_desc));
   uint16_t pma_addr;
   uint32_t wType;
 
@@ -809,7 +809,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
 
   /* Create a packet memory buffer area. For isochronous endpoints,
    * use the same buffer as the double buffer, essentially disabling double buffering */
-  pma_addr = dcd_pma_alloc(p_endpoint_desc->bEndpointAddress, epMaxPktSize);
+  pma_addr = dcd_pma_alloc(p_endpoint_desc->bEndpointAddress, buffer_size);
 
 #if defined(ISOCHRONOUS_DOUBLEBUFFER)
   if( (dir == TUSB_DIR_IN) || (wType == USB_EP_ISOCHRONOUS) )
@@ -818,7 +818,6 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
 #endif
   {
     *pcd_ep_tx_address_ptr(USB, epnum) = pma_addr;
-    pcd_set_ep_tx_cnt(USB, epnum, epMaxPktSize);
     pcd_clear_tx_dtog(USB, epnum);
   }
 #if defined(ISOCHRONOUS_DOUBLEBUFFER)
@@ -828,7 +827,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
 #endif
   {
     *pcd_ep_rx_address_ptr(USB, epnum) = pma_addr;
-    pcd_set_ep_rx_cnt(USB, epnum, epMaxPktSize);
+    pcd_set_ep_rx_cnt(USB, epnum, buffer_size);
     pcd_clear_rx_dtog(USB, epnum);
   }
 
@@ -849,7 +848,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
     }
   }
 
-  xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->max_packet_size = epMaxPktSize;
+  xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->max_packet_size = buffer_size;
   xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->epnum = epnum;
 
   return true;
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index 5d26d3525..17726e521 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -131,6 +131,18 @@ static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpN
 static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum);
 static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t bEpNum, uint32_t wRegValue);
 
+/* Aligned buffer size according to hardware */
+static inline uint16_t pcd_aligned_buffer_size(uint16_t size)
+{
+  /* The STM32 full speed USB peripheral supports only a limited set of
+   * buffer sizes given by the RX buffer entry format in the USB_BTABLE. */
+  uint16_t blocksize = (size > 62) ? 32 : 2;
+
+  // Round up while dividing requested size by blocksize
+  uint16_t numblocks = (size + blocksize - 1) / blocksize ;
+
+  return numblocks * blocksize;
+}
 
 /* SetENDPOINT */
 static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t bEpNum, uint32_t wRegValue)
@@ -207,32 +219,18 @@ static inline uint32_t pcd_get_ep_rx_cnt(USB_TypeDef * USBx, uint32_t bEpNum)
   * @param  wNBlocks no. of Blocks.
   * @retval None
   */
+static inline void pcd_set_ep_cnt_rx_reg(__O uint16_t * pdwReg, size_t wCount)
+{
+  /* We assume that the buffer size is already aligned to hardware requirements. */
+  uint16_t blocksize = (wCount > 62) ? 1 : 0;
+  uint16_t numblocks = wCount / (blocksize ? 32 : 2);
 
-static inline void pcd_set_ep_cnt_rx_reg(__O uint16_t * pdwReg, size_t wCount)  {
-  uint32_t wNBlocks;
-  if(wCount > 62u)
-  {
-    wNBlocks = wCount >> 5u;
-    if((wCount & 0x1fU) == 0u)
-    {
-      wNBlocks--;
-    }
-    wNBlocks = wNBlocks << 10u;
-    wNBlocks |= 0x8000u; // Mark block size as 32byte
-    *pdwReg = (uint16_t)wNBlocks;
-  }
-  else
-  {
-    wNBlocks = wCount >> 1u;
-    if((wCount & 0x1U) != 0u)
-    {
-      wNBlocks++;
-    }
-    *pdwReg = (uint16_t)((wNBlocks) << 10u);
-  }
+  /* There should be no remainder in the above calculation */
+  TU_VERIFY((wCount - (numblocks * (blocksize ? 32 : 2))) == 0, /**/);
+
+  *pdwReg = (blocksize << 15) | (numblocks << 10);
 }
 
-
 /**
   * @brief  Sets address in an endpoint register.
   * @param  USBx USB peripheral instance register address.

From 9a8439087864e2c1e19412fb5ce329cf720f5005 Mon Sep 17 00:00:00 2001
From: Simon Kueppers <simon.kueppers@skueppers.de>
Date: Tue, 25 Oct 2022 18:39:09 +0200
Subject: [PATCH 033/691] Changed comments, added define to fail if ISOCHRONOUS
 endpoint is not available but requested

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index cb2b5a029..736150fcd 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -64,10 +64,9 @@
  * - STALL handled, but not tested.
  *   - Does it work? No clue.
  * - All EP BTABLE buffers are created based on max packet size of first EP opened with that address.
- * - No isochronous endpoints
  * - Endpoint index is the ID of the endpoint
  *   - This means that priority is given to endpoints with lower ID numbers
- *   - Code is mixing up EP IX with EP ID. Everywhere.
+ *   - Manual override of this mapping is possible through callback
  * - Packet buffer memory is copied in the interrupt.
  *   - This is better for performance, but means interrupts are disabled for longer
  *   - DMA may be the best choice, but it could also be pushed to the USBD task.
@@ -776,17 +775,19 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
   uint16_t pma_addr;
   uint32_t wType;
 
-  // Isochronous not supported (yet), and some other driver assumptions.
   TU_ASSERT(epnum < MAX_EP_COUNT);
+  TU_ASSERT(buffer_size <= 1024);
 
   // Set type
   switch(p_endpoint_desc->bmAttributes.xfer) {
   case TUSB_XFER_CONTROL:
     wType = USB_EP_CONTROL;
     break;
+#if defined(ISOCHRONOUS_DOUBLEBUFFER)
   case TUSB_XFER_ISOCHRONOUS:
     wType = USB_EP_ISOCHRONOUS;
     break;
+#endif
   case TUSB_XFER_BULK:
     wType = USB_EP_CONTROL;
     break;

From 510720b396eaa610e6ae688d5f46198de4aaee29 Mon Sep 17 00:00:00 2001
From: Simon Kueppers <simon.kueppers@skueppers.de>
Date: Thu, 27 Oct 2022 18:51:16 +0200
Subject: [PATCH 034/691] Renamed pcd_set_ep_rx_cnt because it actually sets
 the maximum buffer size

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c    | 16 ++++++++--------
 .../st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h      | 10 +++++++++-
 2 files changed, 17 insertions(+), 9 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 736150fcd..9ec8ef592 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -557,9 +557,9 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
     {
       uint32_t remaining = (uint32_t)xfer->total_len - (uint32_t)xfer->queued_len;
       if(remaining >= xfer->max_packet_size) {
-        pcd_set_ep_rx_cnt(USB, EPindex,xfer->max_packet_size);
+        pcd_set_ep_rx_bufsize(USB, EPindex,xfer->max_packet_size);
       } else {
-        pcd_set_ep_rx_cnt(USB, EPindex,remaining);
+        pcd_set_ep_rx_bufsize(USB, EPindex,remaining);
       }
       pcd_set_ep_rx_status(USB, EPindex, USB_EP_RX_VALID);
     }
@@ -571,7 +571,7 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
   if(EPindex == 0u)
   {
       // Always be prepared for a status packet...
-    pcd_set_ep_rx_cnt(USB, EPindex, CFG_TUD_ENDPOINT0_SIZE);
+    pcd_set_ep_rx_bufsize(USB, EPindex, CFG_TUD_ENDPOINT0_SIZE);
     pcd_clear_rx_ep_ctr(USB, EPindex);
   }
 }
@@ -828,7 +828,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
 #endif
   {
     *pcd_ep_rx_address_ptr(USB, epnum) = pma_addr;
-    pcd_set_ep_rx_cnt(USB, epnum, buffer_size);
+    pcd_set_ep_rx_bufsize(USB, epnum, buffer_size);
     pcd_clear_rx_dtog(USB, epnum);
   }
 
@@ -939,9 +939,9 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
 
     if(total_bytes > xfer->max_packet_size)
     {
-      pcd_set_ep_rx_cnt(USB,epnum,xfer->max_packet_size);
+      pcd_set_ep_rx_bufsize(USB,epnum,xfer->max_packet_size);
     } else {
-      pcd_set_ep_rx_cnt(USB,epnum,total_bytes);
+      pcd_set_ep_rx_bufsize(USB,epnum,total_bytes);
     }
     pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_VALID);
   }
@@ -969,9 +969,9 @@ bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16
   {
     if(total_bytes > xfer->max_packet_size)
     {
-      pcd_set_ep_rx_cnt(USB,epnum,xfer->max_packet_size);
+      pcd_set_ep_rx_bufsize(USB,epnum,xfer->max_packet_size);
     } else {
-      pcd_set_ep_rx_cnt(USB,epnum,total_bytes);
+      pcd_set_ep_rx_bufsize(USB,epnum,total_bytes);
     }
     pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_VALID);
   }
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index 17726e521..3130953b4 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -276,12 +276,20 @@ static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpN
 
 static inline void pcd_set_ep_tx_cnt(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wCount)
 {
-  *pcd_ep_tx_cnt_ptr(USBx, bEpNum) = (uint16_t)wCount;
+  __IO uint16_t * reg = pcd_ep_tx_cnt_ptr(USBx, bEpNum);
+  *reg = (uint16_t) (*reg & (uint16_t) ~0x3FFU) | (wCount & 0x3FFU);
 }
 
 static inline void pcd_set_ep_rx_cnt(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wCount)
+{
+  __IO uint16_t * reg = pcd_ep_rx_cnt_ptr(USBx, bEpNum);
+  *reg = (uint16_t) (*reg & (uint16_t) ~0x3FFU) | (wCount & 0x3FFU);
+}
+
+static inline void pcd_set_ep_rx_bufsize(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wCount)
 {
   __IO uint16_t *pdwReg = pcd_ep_rx_cnt_ptr((USBx),(bEpNum));
+  wCount = pcd_aligned_buffer_size(wCount);
   pcd_set_ep_cnt_rx_reg(pdwReg, wCount);
 }
 

From d584b07e2c8068a51c89421be2ddc116f4fc9d3e Mon Sep 17 00:00:00 2001
From: Simon Kueppers <simon.kueppers@skueppers.de>
Date: Thu, 27 Oct 2022 19:09:48 +0200
Subject: [PATCH 035/691] Fixed problem where the transmit byte count was
 written into the wrong register on ISOCHRONOUS endpoints

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 9ec8ef592..36548975e 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -899,19 +899,26 @@ static void dcd_transmit_packet(xfer_ctl_t * xfer, uint16_t ep_ix)
     len = xfer->max_packet_size;
   }
 
-  uint16_t oldAddr = *pcd_ep_tx_address_ptr(USB,ep_ix);
+  uint16_t ep_reg = pcd_get_endpoint(USB, ep_ix);
+  uint16_t addr_ptr = *pcd_ep_tx_address_ptr(USB,ep_ix);
 
   if (xfer->ff)
   {
-    dcd_write_packet_memory_ff(xfer->ff, oldAddr, len);
+    dcd_write_packet_memory_ff(xfer->ff, addr_ptr, len);
   }
   else
   {
-    dcd_write_packet_memory(oldAddr, &(xfer->buffer[xfer->queued_len]), len);
+    dcd_write_packet_memory(addr_ptr, &(xfer->buffer[xfer->queued_len]), len);
   }
   xfer->queued_len = (uint16_t)(xfer->queued_len + len);
 
-  pcd_set_ep_tx_cnt(USB,ep_ix,len);
+  /* Write into correct register when ISOCHRONOUS (double buffered) */
+  if ( (ep_reg & USB_EP_DTOG_TX) && ( (ep_reg & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS) ) {
+    pcd_set_ep_rx_cnt(USB, ep_ix, len);
+  } else {
+    pcd_set_ep_tx_cnt(USB, ep_ix, len);
+  }
+
   pcd_set_ep_tx_status(USB, ep_ix, USB_EP_TX_VALID);
 }
 

From b4b619abd6badd664149604c77a0bb05ea579f86 Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Thu, 29 Dec 2022 12:29:28 +0100
Subject: [PATCH 036/691] SHA-1: 5cb3ed518301e2237ee4e468e97e51ece0ba3838

* Correct handling of SOF interrupt
---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 21 +++++++++----------
 1 file changed, 10 insertions(+), 11 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index ee188b65c..ae22bb455 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -149,12 +149,6 @@
 #  define DCD_STM32_BTABLE_LENGTH (PMA_LENGTH - DCD_STM32_BTABLE_BASE)
 #endif
 
-// Since TinyUSB doesn't use SOF for now, and this interrupt too often (1ms interval)
-// We disable SOF for now until needed later on
-#ifndef USE_SOF
-#  define USE_SOF     0
-#endif
-
 /***************************************************
  * Checks, structs, defines, function definitions, etc.
  */
@@ -259,7 +253,7 @@ void dcd_init (uint8_t rhport)
     pcd_set_endpoint(USB,i,0u);
   }
 
-  USB->CNTR |= USB_CNTR_RESETM | (USE_SOF ? USB_CNTR_SOFM : 0) | USB_CNTR_ESOFM | USB_CNTR_CTRM | USB_CNTR_SUSPM | USB_CNTR_WKUPM;
+  USB->CNTR |= USB_CNTR_RESETM | USB_CNTR_ESOFM | USB_CNTR_CTRM | USB_CNTR_SUSPM | USB_CNTR_WKUPM;
   dcd_handle_bus_reset();
   
   // Enable pull-up if supported
@@ -304,7 +298,14 @@ void dcd_sof_enable(uint8_t rhport, bool en)
   (void) rhport;
   (void) en;
 
-  // TODO implement later
+  if (en)
+  {
+    USB->CNTR |= USB_CNTR_SOFM;
+  }
+  else
+  {
+    USB->CNTR &= (uint16_t) ~USB_CNTR_SOFM;
+  }
 }
 
 // Enable device interrupt
@@ -655,12 +656,10 @@ void dcd_int_handler(uint8_t rhport) {
     dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true);
   }
 
-#if USE_SOF
   if(int_status & USB_ISTR_SOF) {
     clear_istr_bits(USB_ISTR_SOF);
-    dcd_event_bus_signal(0, DCD_EVENT_SOF, true);
+    dcd_event_sof(0, USB->FNR & USB_FNR_FN, true);
   }
-#endif 
 
   if(int_status & USB_ISTR_ESOF) {
     if(remoteWakeCountdown == 1u)

From 9ec21248d7f11e14f5011ea015c5ecfba8e0632b Mon Sep 17 00:00:00 2001
From: Simon Kueppers <simon.kueppers@skueppers.de>
Date: Mon, 31 Oct 2022 13:42:52 +0100
Subject: [PATCH 037/691] Fixed various small problems and inaccuracies
 regarding ISOCHRONOUS endpoint

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c    | 16 ++++++++++++----
 .../st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h      |  9 +++++----
 2 files changed, 17 insertions(+), 8 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index ae22bb455..8e8ffec76 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -506,7 +506,6 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
 {
   uint32_t EPindex = wIstr & USB_ISTR_EP_ID;
   uint32_t wEPRegVal = pcd_get_endpoint(USB, EPindex);
-  uint32_t count = pcd_get_ep_rx_cnt(USB,EPindex);
   uint8_t ep_addr = wEPRegVal & USB_EPADDR_FIELD;
 
   xfer_ctl_t *xfer = xfer_ctl_ptr(ep_addr);
@@ -518,11 +517,12 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
     return;
   }
   
-  if((EPindex == 0U) && ((wEPRegVal & USB_EP_SETUP) != 0U)) /* Setup packet */
+  if((ep_addr == 0U) && ((wEPRegVal & USB_EP_SETUP) != 0U)) /* Setup packet */
   {
     // The setup_received function uses memcpy, so this must first copy the setup data into
     // user memory, to allow for the 32-bit access that memcpy performs.
     uint8_t userMemBuf[8];
+    uint32_t count = pcd_get_ep_rx_cnt(USB, EPindex);
     /* Get SETUP Packet*/
     if(count == 8) // Setup packet should always be 8 bytes. If not, ignore it, and try again.
     {
@@ -535,8 +535,16 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
   }
   else
   {
+    uint32_t count;
+    /* Read from correct register when ISOCHRONOUS (double buffered) */
+    if ( (wEPRegVal & USB_EP_DTOG_RX) && ( (wEPRegVal & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS) ) {
+      count = pcd_get_ep_tx_cnt(USB, EPindex);
+    } else {
+      count = pcd_get_ep_rx_cnt(USB, EPindex);
+    }
+
     // Clear RX CTR interrupt flag
-    if(EPindex != 0u)
+    if(ep_addr != 0u)
     {
       pcd_clear_rx_ep_ctr(USB, EPindex);
     }
@@ -579,7 +587,7 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
   // For EP0, prepare to receive another SETUP packet.
   // Clear CTR last so that a new packet does not overwrite the packing being read.
   // (Based on the docs, it seems SETUP will always be accepted after CTR is cleared)
-  if(EPindex == 0u)
+  if(ep_addr == 0u)
   {
       // Always be prepared for a status packet...
     pcd_set_ep_rx_bufsize(USB, EPindex, CFG_TUD_ENDPOINT0_SIZE);
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index 8acce3c71..8ea659124 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -223,16 +223,17 @@ static inline uint32_t pcd_get_ep_rx_cnt(USB_TypeDef * USBx, uint32_t bEpNum)
   * @param  wNBlocks no. of Blocks.
   * @retval None
   */
-static inline void pcd_set_ep_cnt_rx_reg(__O uint16_t * pdwReg, size_t wCount)
+static inline void pcd_set_ep_cnt_reg(__O uint16_t * pdwReg, size_t wCount)
 {
   /* We assume that the buffer size is already aligned to hardware requirements. */
   uint16_t blocksize = (wCount > 62) ? 1 : 0;
   uint16_t numblocks = wCount / (blocksize ? 32 : 2);
 
   /* There should be no remainder in the above calculation */
-  TU_VERIFY((wCount - (numblocks * (blocksize ? 32 : 2))) == 0, /**/);
+  TU_ASSERT((wCount - (numblocks * (blocksize ? 32 : 2))) == 0, /**/);
 
-  *pdwReg = (blocksize << 15) | (numblocks << 10);
+  /* Encode into register. When BLSIZE==1, we need to substract 1 block count */
+  *pdwReg = (blocksize << 15) | ((numblocks - blocksize) << 10);
 }
 
 /**
@@ -294,7 +295,7 @@ static inline void pcd_set_ep_rx_bufsize(USB_TypeDef * USBx,  uint32_t bEpNum, u
 {
   __IO uint16_t *pdwReg = pcd_ep_rx_cnt_ptr((USBx),(bEpNum));
   wCount = pcd_aligned_buffer_size(wCount);
-  pcd_set_ep_cnt_rx_reg(pdwReg, wCount);
+  pcd_set_ep_cnt_reg(pdwReg, wCount);
 }
 
 /**

From 76413a95d4463d11232810e42d4f1a64a30aed2b Mon Sep 17 00:00:00 2001
From: Simon Kueppers <simon.kueppers@skueppers.de>
Date: Mon, 31 Oct 2022 13:47:24 +0100
Subject: [PATCH 038/691] Added TU_ATTR_ALWAYS_INLINE to all static inline
 functions

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c |  6 +-
 .../st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h   | 63 ++++++++++---------
 2 files changed, 35 insertions(+), 34 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 8e8ffec76..fefa7a330 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -175,7 +175,7 @@ typedef struct
 
 static xfer_ctl_t xfer_status[MAX_EP_COUNT][2];
 
-static inline xfer_ctl_t* xfer_ctl_ptr(uint32_t ep_addr)
+TU_ATTR_ALWAYS_INLINE static inline xfer_ctl_t* xfer_ctl_ptr(uint32_t ep_addr)
 {
   uint8_t epnum = tu_edpt_number(ep_addr);
   uint8_t dir = tu_edpt_dir(ep_addr);
@@ -207,12 +207,12 @@ static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNB
 
 // Using a function due to better type checks
 // This seems better than having to do type casts everywhere else
-static inline void reg16_clear_bits(__IO uint16_t *reg, uint16_t mask) {
+TU_ATTR_ALWAYS_INLINE static inline void reg16_clear_bits(__IO uint16_t *reg, uint16_t mask) {
   *reg = (uint16_t)(*reg & ~mask);
 }
 
 // Bits in ISTR are cleared upon writing 0
-static inline void clear_istr_bits(uint16_t mask) {
+TU_ATTR_ALWAYS_INLINE static inline void clear_istr_bits(uint16_t mask) {
   USB->ISTR = ~mask;
 }
 
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index 8ea659124..d6f10c5a9 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -131,12 +131,12 @@ static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
 TU_ATTR_WEAK uint8_t tu_stm32_edpt_number_cb(uint8_t addr);
 
 // prototypes
-static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum);
-static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum);
-static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t bEpNum, uint32_t wRegValue);
+TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum);
+TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum);
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t bEpNum, uint32_t wRegValue);
 
 /* Aligned buffer size according to hardware */
-static inline uint16_t pcd_aligned_buffer_size(uint16_t size)
+TU_ATTR_ALWAYS_INLINE static inline uint16_t pcd_aligned_buffer_size(uint16_t size)
 {
   /* The STM32 full speed USB peripheral supports only a limited set of
    * buffer sizes given by the RX buffer entry format in the USB_BTABLE. */
@@ -149,19 +149,19 @@ static inline uint16_t pcd_aligned_buffer_size(uint16_t size)
 }
 
 /* SetENDPOINT */
-static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t bEpNum, uint32_t wRegValue)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t bEpNum, uint32_t wRegValue)
 {
   __O uint16_t *reg = (__O uint16_t *)((&USBx->EP0R) + bEpNum*2u);
   *reg = (uint16_t)wRegValue;
 }
 
 /* GetENDPOINT */
-static inline uint16_t pcd_get_endpoint(USB_TypeDef * USBx, uint32_t bEpNum) {
+TU_ATTR_ALWAYS_INLINE static inline uint16_t pcd_get_endpoint(USB_TypeDef * USBx, uint32_t bEpNum) {
   __I uint16_t *reg = (__I uint16_t *)((&USBx->EP0R) + bEpNum*2u);
   return *reg;
 }
 
-static inline void pcd_set_eptype(USB_TypeDef * USBx, uint32_t bEpNum, uint32_t wType)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_eptype(USB_TypeDef * USBx, uint32_t bEpNum, uint32_t wType)
 {
   uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
   regVal &= (uint32_t)USB_EP_T_MASK;
@@ -170,7 +170,7 @@ static inline void pcd_set_eptype(USB_TypeDef * USBx, uint32_t bEpNum, uint32_t
   pcd_set_endpoint(USBx, bEpNum, regVal);
 }
 
-static inline uint32_t pcd_get_eptype(USB_TypeDef * USBx, uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_eptype(USB_TypeDef * USBx, uint32_t bEpNum)
 {
   uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
   regVal &= USB_EP_T_FIELD;
@@ -182,7 +182,7 @@ static inline uint32_t pcd_get_eptype(USB_TypeDef * USBx, uint32_t bEpNum)
   * @param  bEpNum Endpoint Number.
   * @retval None
   */
-static inline void pcd_clear_rx_ep_ctr(USB_TypeDef * USBx, uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_rx_ep_ctr(USB_TypeDef * USBx, uint32_t bEpNum)
 {
   uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
   regVal &= USB_EPREG_MASK;
@@ -190,7 +190,8 @@ static inline void pcd_clear_rx_ep_ctr(USB_TypeDef * USBx, uint32_t bEpNum)
   regVal |= USB_EP_CTR_TX; // preserve CTR_TX (clears on writing 0)
   pcd_set_endpoint(USBx, bEpNum, regVal);
 }
-static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx, uint32_t bEpNum)
+
+TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx, uint32_t bEpNum)
 {
   uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
   regVal &= USB_EPREG_MASK;
@@ -204,13 +205,13 @@ static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx, uint32_t bEpNum)
   * @param  bEpNum Endpoint Number.
   * @retval Counter value
   */
-static inline uint32_t pcd_get_ep_tx_cnt(USB_TypeDef * USBx, uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_tx_cnt(USB_TypeDef * USBx, uint32_t bEpNum)
 {
   __I uint16_t *regPtr = pcd_ep_tx_cnt_ptr(USBx, bEpNum);
   return *regPtr & 0x3ffU;
 }
 
-static inline uint32_t pcd_get_ep_rx_cnt(USB_TypeDef * USBx, uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_cnt(USB_TypeDef * USBx, uint32_t bEpNum)
 {
   __I uint16_t *regPtr = pcd_ep_rx_cnt_ptr(USBx, bEpNum);
   return *regPtr & 0x3ffU;
@@ -223,7 +224,7 @@ static inline uint32_t pcd_get_ep_rx_cnt(USB_TypeDef * USBx, uint32_t bEpNum)
   * @param  wNBlocks no. of Blocks.
   * @retval None
   */
-static inline void pcd_set_ep_cnt_reg(__O uint16_t * pdwReg, size_t wCount)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_cnt_reg(__O uint16_t * pdwReg, size_t wCount)
 {
   /* We assume that the buffer size is already aligned to hardware requirements. */
   uint16_t blocksize = (wCount > 62) ? 1 : 0;
@@ -243,7 +244,7 @@ static inline void pcd_set_ep_cnt_reg(__O uint16_t * pdwReg, size_t wCount)
   * @param  bAddr Address.
   * @retval None
   */
-static inline void pcd_set_ep_address(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t bAddr)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_address(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t bAddr)
 {
   uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
   regVal &= USB_EPREG_MASK;
@@ -252,7 +253,7 @@ static inline void pcd_set_ep_address(USB_TypeDef * USBx,  uint32_t bEpNum, uint
   pcd_set_endpoint(USBx, bEpNum,regVal);
 }
 
-static inline __IO uint16_t * pcd_btable_word_ptr(USB_TypeDef * USBx, size_t x)
+TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t * pcd_btable_word_ptr(USB_TypeDef * USBx, size_t x)
 {
   size_t total_word_offset = (((USBx)->BTABLE)>>1) + x;
   total_word_offset *= PMA_STRIDE;
@@ -260,38 +261,38 @@ static inline __IO uint16_t * pcd_btable_word_ptr(USB_TypeDef * USBx, size_t x)
 }
 
 // Pointers to the PMA table entries (using the ARM address space)
-static inline __IO uint16_t* pcd_ep_tx_address_ptr(USB_TypeDef * USBx, uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_tx_address_ptr(USB_TypeDef * USBx, uint32_t bEpNum)
 {
   return pcd_btable_word_ptr(USBx,(bEpNum)*4u + 0u);
 }
-static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum)
 {
   return pcd_btable_word_ptr(USBx,(bEpNum)*4u + 1u);
 }
 
-static inline __IO uint16_t* pcd_ep_rx_address_ptr(USB_TypeDef * USBx, uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_rx_address_ptr(USB_TypeDef * USBx, uint32_t bEpNum)
 {
   return  pcd_btable_word_ptr(USBx,(bEpNum)*4u + 2u);
 }
 
-static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum)
 {
   return pcd_btable_word_ptr(USBx,(bEpNum)*4u + 3u);
 }
 
-static inline void pcd_set_ep_tx_cnt(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wCount)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_cnt(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wCount)
 {
   __IO uint16_t * reg = pcd_ep_tx_cnt_ptr(USBx, bEpNum);
   *reg = (uint16_t) (*reg & (uint16_t) ~0x3FFU) | (wCount & 0x3FFU);
 }
 
-static inline void pcd_set_ep_rx_cnt(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wCount)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_cnt(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wCount)
 {
   __IO uint16_t * reg = pcd_ep_rx_cnt_ptr(USBx, bEpNum);
   *reg = (uint16_t) (*reg & (uint16_t) ~0x3FFU) | (wCount & 0x3FFU);
 }
 
-static inline void pcd_set_ep_rx_bufsize(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wCount)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_bufsize(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wCount)
 {
   __IO uint16_t *pdwReg = pcd_ep_rx_cnt_ptr((USBx),(bEpNum));
   wCount = pcd_aligned_buffer_size(wCount);
@@ -305,7 +306,7 @@ static inline void pcd_set_ep_rx_bufsize(USB_TypeDef * USBx,  uint32_t bEpNum, u
   * @param  wState new state
   * @retval None
   */
-static inline void pcd_set_ep_tx_status(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wState)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_status(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wState)
 {
   uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
   regVal &= USB_EPTX_DTOGMASK;
@@ -332,7 +333,7 @@ static inline void pcd_set_ep_tx_status(USB_TypeDef * USBx,  uint32_t bEpNum, ui
   * @retval None
   */
 
-static inline void pcd_set_ep_rx_status(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wState)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_status(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wState)
 {
   uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
   regVal &= USB_EPRX_DTOGMASK;
@@ -351,7 +352,7 @@ static inline void pcd_set_ep_rx_status(USB_TypeDef * USBx,  uint32_t bEpNum, ui
   pcd_set_endpoint(USBx, bEpNum, regVal);
 } /* pcd_set_ep_rx_status */
 
-static inline uint32_t pcd_get_ep_rx_status(USB_TypeDef * USBx,  uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_status(USB_TypeDef * USBx,  uint32_t bEpNum)
 {
   uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
   return (regVal & USB_EPRX_STAT) >> (12u);
@@ -364,7 +365,7 @@ static inline uint32_t pcd_get_ep_rx_status(USB_TypeDef * USBx,  uint32_t bEpNum
   * @param  bEpNum Endpoint Number.
   * @retval None
   */
-static inline void pcd_rx_dtog(USB_TypeDef * USBx,  uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_rx_dtog(USB_TypeDef * USBx,  uint32_t bEpNum)
 {
   uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
   regVal &= USB_EPREG_MASK;
@@ -372,7 +373,7 @@ static inline void pcd_rx_dtog(USB_TypeDef * USBx,  uint32_t bEpNum)
   pcd_set_endpoint(USBx, bEpNum, regVal);
 }
 
-static inline void pcd_tx_dtog(USB_TypeDef * USBx,  uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_tx_dtog(USB_TypeDef * USBx,  uint32_t bEpNum)
 {
   uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
   regVal &= USB_EPREG_MASK;
@@ -387,7 +388,7 @@ static inline void pcd_tx_dtog(USB_TypeDef * USBx,  uint32_t bEpNum)
   * @retval None
   */
 
-static inline void pcd_clear_rx_dtog(USB_TypeDef * USBx,  uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_rx_dtog(USB_TypeDef * USBx,  uint32_t bEpNum)
 {
   uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
   if((regVal & USB_EP_DTOG_RX) != 0)
@@ -396,7 +397,7 @@ static inline void pcd_clear_rx_dtog(USB_TypeDef * USBx,  uint32_t bEpNum)
   }
 }
 
-static inline void pcd_clear_tx_dtog(USB_TypeDef * USBx,  uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_dtog(USB_TypeDef * USBx,  uint32_t bEpNum)
 {
   uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
   if((regVal & USB_EP_DTOG_TX) != 0)
@@ -412,7 +413,7 @@ static inline void pcd_clear_tx_dtog(USB_TypeDef * USBx,  uint32_t bEpNum)
   * @retval None
   */
 
-static inline void pcd_set_ep_kind(USB_TypeDef * USBx,  uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_kind(USB_TypeDef * USBx,  uint32_t bEpNum)
 {
   uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
   regVal |= USB_EP_KIND;
@@ -420,7 +421,7 @@ static inline void pcd_set_ep_kind(USB_TypeDef * USBx,  uint32_t bEpNum)
   regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
   pcd_set_endpoint(USBx, bEpNum, regVal);
 }
-static inline void pcd_clear_ep_kind(USB_TypeDef * USBx, uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_ep_kind(USB_TypeDef * USBx, uint32_t bEpNum)
 {
   uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
   regVal &= USB_EPKIND_MASK;

From 1d37f5ef9b94d53d8a90b73934913aa4252011e5 Mon Sep 17 00:00:00 2001
From: Simon Kueppers <simon.kueppers@skueppers.de>
Date: Sun, 6 Nov 2022 12:40:14 +0100
Subject: [PATCH 039/691] Added improvements with regards to SOF timing jitter

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c        | 12 +++++++-----
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h |  3 +++
 2 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index fefa7a330..d6ca59756 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -627,6 +627,13 @@ void dcd_int_handler(uint8_t rhport) {
   // dcd_ep_ctr_handler(), so less need to loop here. The other interrupts shouldn't
   // be triggered repeatedly.
 
+  /* Put SOF flag at the beginning of ISR in case to get least amount of jitter if it is used for timing purposes */
+  if(int_status & USB_ISTR_SOF) {
+    clear_istr_bits(USB_ISTR_SOF);
+    if (tu_stm32_sof_cb) tu_stm32_sof_cb();
+    dcd_event_sof(0, USB->FNR & USB_FNR_FN, true);
+  }
+
   if(int_status & USB_ISTR_RESET) {
     // USBRST is start of reset.
     clear_istr_bits(USB_ISTR_RESET);
@@ -664,11 +671,6 @@ void dcd_int_handler(uint8_t rhport) {
     dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true);
   }
 
-  if(int_status & USB_ISTR_SOF) {
-    clear_istr_bits(USB_ISTR_SOF);
-    dcd_event_sof(0, USB->FNR & USB_FNR_FN, true);
-  }
-
   if(int_status & USB_ISTR_ESOF) {
     if(remoteWakeCountdown == 1u)
     {
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index d6f10c5a9..40af9b3a5 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -130,6 +130,9 @@ static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
 // this callback and defining a custom mapping in your application
 TU_ATTR_WEAK uint8_t tu_stm32_edpt_number_cb(uint8_t addr);
 
+// This callback is called on SOF and can be used to e.g. capture a timer value for timing purposes
+TU_ATTR_WEAK void tu_stm32_sof_cb(void);
+
 // prototypes
 TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum);
 TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum);

From 17990025bbe9017eb5a8b636cbf5345a58812587 Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Wed, 28 Dec 2022 17:14:23 +0100
Subject: [PATCH 040/691] dcd_stm32_fsdev : Fix index out of bound in
 dcd_write_packet_memory() If src is odd then src[wNBytes] is accessed.

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 19 ++++++++++++-------
 1 file changed, 12 insertions(+), 7 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index d6ca59756..e5006809d 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -1064,8 +1064,7 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
   */
 static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, size_t wNBytes)
 {
-  uint32_t n =  ((uint32_t)wNBytes + 1U) >> 1U;
-  uint32_t i;
+  uint32_t n = (uint32_t)wNBytes >> 1U;
   uint16_t temp1, temp2;
   const uint8_t * srcVal;
 
@@ -1076,15 +1075,22 @@ static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, si
   srcVal = src;
   pdwVal = &pma[PMA_STRIDE*(dst>>1)];
 
-  for (i = n; i != 0; i--)
+  while (n--)
   {
-    temp1 = (uint16_t) *srcVal;
+    temp1 = (uint16_t)*srcVal;
     srcVal++;
-    temp2 = temp1 | ((uint16_t)((uint16_t) ((*srcVal) << 8U))) ;
+    temp2 = temp1 | ((uint16_t)(((uint16_t)(*srcVal)) << 8U)) ;
     *pdwVal = temp2;
     pdwVal += PMA_STRIDE;
     srcVal++;
   }
+
+  if (wNBytes & 0x01)
+  {
+    temp1 = *srcVal;
+    *pdwVal = temp2;
+  }
+
   return true;
 }
 
@@ -1141,7 +1147,6 @@ static bool dcd_write_packet_memory_ff(tu_fifo_t * ff, uint16_t dst, uint16_t wN
 static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wNBytes)
 {
   uint32_t n = (uint32_t)wNBytes >> 1U;
-  uint32_t i;
   // The GCC optimizer will combine access to 32-bit sizes if we let it. Force
   // it volatile so that it won't do that.
   __IO const uint16_t *pdwVal;
@@ -1150,7 +1155,7 @@ static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wN
   pdwVal = &pma[PMA_STRIDE*(src>>1)];
   uint8_t *dstVal = (uint8_t*)dst;
 
-  for (i = n; i != 0U; i--)
+  while (n--)
   {
     temp = *pdwVal;
     pdwVal += PMA_STRIDE;

From b156a8b78c5ede08849bd30a05c4e43ac211b068 Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Wed, 28 Dec 2022 17:16:49 +0100
Subject: [PATCH 041/691] dcd_stm32_fsdev : Implement FIFO transfer correctly.

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 117 ++++++++++--------
 1 file changed, 68 insertions(+), 49 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index e5006809d..e259991ae 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -6,6 +6,8 @@
  * Portions:
  * Copyright (c) 2016 STMicroelectronics
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ * Copyright (c) 2022 Simon K�ppers (skuep)
+ * Copyright (c) 2022 HiFiPhile
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -987,7 +989,7 @@ bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16
   uint8_t const dir   = tu_edpt_dir(ep_addr);
 
   xfer->buffer = NULL;
-  xfer->ff     = ff; // TODO support dcd_edpt_xfer_fifo API
+  xfer->ff     = ff;
   xfer->total_len = total_bytes;
   xfer->queued_len = 0;
 
@@ -1088,7 +1090,7 @@ static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, si
   if (wNBytes & 0x01)
   {
     temp1 = *srcVal;
-    *pdwVal = temp2;
+    *pdwVal = temp1;
   }
 
   return true;
@@ -1100,40 +1102,46 @@ static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, si
   * @param   wNBytes no. of bytes to be copied.
   * @retval None
   */
-
-// THIS FUNCTION IS UNTESTED
-
 static bool dcd_write_packet_memory_ff(tu_fifo_t * ff, uint16_t dst, uint16_t wNBytes)
 {
   // Since we copy from a ring buffer FIFO, a wrap might occur making it necessary to conduct two copies
-  // Check for first linear part
   tu_fifo_buffer_info_t info;
-  tu_fifo_get_read_info(ff, &info);  // We want to read from the FIFO
-  TU_VERIFY(info.len_lin && dcd_write_packet_memory(dst, info.ptr_lin, info.len_lin));           // and write it into the PMA
-  tu_fifo_advance_read_pointer(ff, info.len_lin);
-
-  // Check for wrapped part
-  if (info.len_wrap)
+  tu_fifo_get_read_info(ff, &info); 
+  
+  uint16_t cnt_lin =  TU_MIN(wNBytes, info.len_lin);
+  uint16_t cnt_wrap = TU_MIN(wNBytes - cnt_lin, info.len_wrap);
+  
+  // We want to read from the FIFO and write it into the PMA, if LIN part is ODD and has WRAPPED part,
+  // last lin byte will be combined with wrapped part
+  // To ensure PMA is always access 16bit aligned (dst aligned to 16 bit)
+  if((cnt_lin & 0x01) && cnt_wrap)
   {
-    // Update destination pointer
-    dst += info.len_lin;
-    uint8_t* src = (uint8_t*)info.ptr_wrap;
-    uint16_t len2 = info.len_wrap;
+    // Copy first linear part
+    dcd_write_packet_memory(dst, info.ptr_lin, cnt_lin &~0x01);
+    dst += cnt_lin &~0x01;
 
-    // Since PMA is accessed 16-bit wise we need to handle the case when a 16 bit value was split
-    if (info.len_lin % 2)    // If len is uneven there is a byte left to copy
-    {
-      TU_ASSERT(false); // TODO: Step through and check -> untested
+    // Copy last linear byte & first wrapped byte
+    uint16_t tmp = ((uint8_t*)info.ptr_lin)[cnt_lin - 1] | ((uint16_t)(((uint8_t*)info.ptr_wrap)[0]) << 8U);
+    dcd_write_packet_memory(dst, &tmp, 2);
+    dst += 2;
 
-      uint16_t temp = ((uint8_t *)info.ptr_lin)[info.len_lin-1] | src[0] << 16; // CHECK endianess
-      pma[PMA_STRIDE*(dst>>1)] = temp;
-      src++;
-      len2--;
-    }
-
-    TU_VERIFY(dcd_write_packet_memory(dst, src, len2));
-    tu_fifo_advance_write_pointer(ff, info.len_wrap);
+    // Copy rest of wrapped byte
+    dcd_write_packet_memory(dst, ((uint8_t*)info.ptr_wrap) + 1, cnt_wrap - 1);
   }
+  else
+  {
+    // Copy linear part
+    dcd_write_packet_memory(dst, info.ptr_lin, cnt_lin);
+    dst += info.len_lin;
+
+    if(info.len_wrap)
+    {
+      // Copy wrapped byte
+      dcd_write_packet_memory(dst, info.ptr_wrap, cnt_wrap);
+    }
+  }
+
+  tu_fifo_advance_read_pointer(ff, cnt_lin + cnt_wrap);
 
   return true;
 }
@@ -1178,9 +1186,6 @@ static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wN
   * @param   wNBytes no. of bytes to be copied.
   * @retval None
   */
-
-// THIS FUNCTION IS UNTESTED
-
 static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNBytes)
 {
   // Since we copy into a ring buffer FIFO, a wrap might occur making it necessary to conduct two copies
@@ -1188,29 +1193,43 @@ static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNB
   tu_fifo_buffer_info_t info;
   tu_fifo_get_write_info(ff, &info);  // We want to read from the FIFO
 
-  TU_VERIFY(info.len_lin && dcd_read_packet_memory(info.ptr_lin, src, info.len_lin));
-  tu_fifo_advance_write_pointer(ff, info.len_lin);
+  uint16_t cnt_lin =  TU_MIN(wNBytes, info.len_lin);
+  uint16_t cnt_wrap = TU_MIN(wNBytes - cnt_lin, info.len_wrap);
 
-  // Check for wrapped part
-  if (info.len_wrap)
+  // We want to read from PMA and write it into the FIFO, if LIN part is ODD and has WRAPPED part,
+  // last lin byte will be combined with wrapped part
+  // To ensure PMA is always access 16bit aligned (src aligned to 16 bit)
+  if((cnt_lin & 0x01) && cnt_wrap)
   {
-    // Update source pointer
-    src += info.len_lin;
+    // Copy first linear part
+    dcd_read_packet_memory(info.ptr_lin, src, cnt_lin &~0x01);
+    src += cnt_lin &~0x01;
 
-    // Since PMA is accessed 16-bit wise we need to handle the case when a 16 bit value was split
-    if (info.len_lin % 2)    // If len is uneven there is a byte left to copy
-    {
-      TU_ASSERT(false); //TODO: step through -> untested
-      uint32_t temp = pma[PMA_STRIDE*(src>>1)];
-      *((uint8_t *)info.ptr_wrap++) = ((temp >> 8) & 0xFF);
-      src++;
-      tu_fifo_advance_write_pointer(ff, 1);
-      info.len_wrap--;
-    }
+    // Copy last linear byte & first wrapped byte
+    uint16_t tmp;
+    dcd_read_packet_memory(&tmp, src, 2);
+    
+    ((uint8_t*)info.ptr_lin)[cnt_lin - 1] = (uint8_t)tmp;
+    ((uint8_t*)info.ptr_wrap)[0] = (uint8_t)(tmp >> 8U);
+    src += 2;
 
-    TU_VERIFY(dcd_read_packet_memory(info.ptr_wrap, src, info.len_wrap));
-    tu_fifo_advance_write_pointer(ff, info.len_wrap);
+    // Copy rest of wrapped byte
+    dcd_read_packet_memory(((uint8_t*)info.ptr_wrap) + 1, src, cnt_wrap - 1);
   }
+  else
+  {
+    // Copy linear part
+    dcd_read_packet_memory(info.ptr_lin, src, cnt_lin);
+    src += cnt_lin;
+
+    if(info.len_wrap)
+    {
+      // Copy wrapped byte
+      dcd_read_packet_memory(info.ptr_wrap, src, cnt_wrap);
+    }
+  }
+
+  tu_fifo_advance_write_pointer(ff, cnt_lin + cnt_wrap);
 
   return true;
 }

From ef2f17a514fb0967261c3a8308af017b5d911e15 Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Wed, 28 Dec 2022 23:45:10 +0100
Subject: [PATCH 042/691] Add hardware endpoint allocator.

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 97 +++++++++++++++++--
 1 file changed, 90 insertions(+), 7 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index e259991ae..0d566da12 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -66,9 +66,6 @@
  * - STALL handled, but not tested.
  *   - Does it work? No clue.
  * - All EP BTABLE buffers are created based on max packet size of first EP opened with that address.
- * - Endpoint index is the ID of the endpoint
- *   - This means that priority is given to endpoints with lower ID numbers
- *   - Manual override of this mapping is possible through callback
  * - Packet buffer memory is copied in the interrupt.
  *   - This is better for performance, but means interrupts are disabled for longer
  *   - DMA may be the best choice, but it could also be pushed to the USBD task.
@@ -186,6 +183,16 @@ TU_ATTR_ALWAYS_INLINE static inline xfer_ctl_t* xfer_ctl_ptr(uint32_t ep_addr)
   return &xfer_status[epnum][dir];
 }
 
+// EP allocator
+typedef struct
+{
+  uint8_t ep_num;
+  uint8_t ep_type;
+  bool allocated[2];
+} ep_alloc_t;
+
+static ep_alloc_t ep_alloc_status[STFSDEV_EP_COUNT];
+
 static TU_ATTR_ALIGNED(4) uint32_t _setup_packet[6];
 
 static uint8_t remoteWakeCountdown; // When wake is requested
@@ -201,6 +208,8 @@ static uint16_t ep_buf_ptr; ///< Points to first free memory location
 static void dcd_pma_alloc_reset(void);
 static uint16_t dcd_pma_alloc(uint8_t ep_addr, size_t length);
 static void dcd_pma_free(uint8_t ep_addr);
+static void dcd_ep_free(uint8_t ep_addr);
+static uint8_t dcd_ep_alloc(tusb_desc_endpoint_t const * p_endpoint_desc);
 static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, size_t wNBytes);
 static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wNBytes);
 
@@ -458,10 +467,17 @@ static void dcd_handle_bus_reset(void)
   //__IO uint16_t * const epreg = &(EPREG(0));
   USB->DADDR = 0u; // disable USB peripheral by clearing the EF flag
 
-  // Clear all EPREG (or maybe this is automatic? I'm not sure)
+  
   for(uint32_t i=0; i<STFSDEV_EP_COUNT; i++)
   {
+    // Clear all EPREG (or maybe this is automatic? I'm not sure)
     pcd_set_endpoint(USB,i,0u);
+    
+    // Clear EP allocation status
+    ep_alloc_status[i].ep_num = 0xFF;
+    ep_alloc_status[i].ep_type = 0xFF;
+    ep_alloc_status[i].allocated[0] = false;
+    ep_alloc_status[i].allocated[1] = false;
   }
 
   dcd_pma_alloc_reset();
@@ -783,20 +799,85 @@ static void dcd_pma_free(uint8_t ep_addr)
   }
 }
 
+/***
+ * Allocate hardware endpoint
+ */
+static uint8_t dcd_ep_alloc(tusb_desc_endpoint_t const * p_endpoint_desc)
+{
+  uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress);
+  uint8_t const dir   = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
+  uint8_t const eptype = p_endpoint_desc->bmAttributes.xfer;
+
+  for(uint8_t i = 0; i < STFSDEV_EP_COUNT; i++)
+  {
+    // If EP of current direction is not allocated
+    // Except for ISO endpoint, both direction should be free
+    if(!ep_alloc_status[i].allocated[dir] &&
+       (eptype != TUSB_XFER_ISOCHRONOUS || !ep_alloc_status[i].allocated[dir ^ 1]))
+    {
+      // Check if EP number is the same
+      if(ep_alloc_status[i].ep_num == 0xFF ||
+         ep_alloc_status[i].ep_num == epnum)
+      {
+        // One EP pair has to be the same type
+        if(ep_alloc_status[i].ep_type == 0xFF ||
+           ep_alloc_status[i].ep_type == eptype)
+        {
+          ep_alloc_status[i].ep_num = epnum;
+          ep_alloc_status[i].ep_type = eptype;
+          ep_alloc_status[i].allocated[dir] = true;
+          
+          return i;
+        }
+      }
+    }
+  }
+
+  // Allocation failed
+  TU_ASSERT(0);
+}
+
+/***
+ * Free hardware endpoint
+ */
+static void dcd_ep_free(uint8_t ep_addr)
+{
+  uint8_t const epnum = tu_edpt_number(ep_addr);
+  uint8_t const dir   = tu_edpt_dir(ep_addr);
+
+  for(uint8_t i = 0; i < STFSDEV_EP_COUNT; i++)
+  {
+    // Check if EP number & dir are the same
+    if(ep_alloc_status[i].ep_num == epnum && 
+       ep_alloc_status[i].allocated[dir] == dir)
+    {
+      ep_alloc_status[i].allocated[dir] = false;
+      // Reset entry if ISO endpoint or both direction are free
+      if(ep_alloc_status[i].ep_type == TUSB_XFER_ISOCHRONOUS ||
+         !ep_alloc_status[i].allocated[dir ^ 1])
+      {
+        ep_alloc_status[i].ep_num = 0xFF;
+        ep_alloc_status[i].ep_type = 0xFF;
+
+        return;
+      }
+    }
+  }
+}
+
 // The STM32F0 doesn't seem to like |= or &= to manipulate the EP#R registers,
 // so I'm using the #define from HAL here, instead.
 
 bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
 {
   (void)rhport;
-  /* TODO: This hardware endpoint allocation could be more sensible. For now, simple allocation or manual allocation using callback */
-  uint8_t const epnum = tu_stm32_edpt_number_cb ? tu_stm32_edpt_number_cb(p_endpoint_desc->bEndpointAddress) : tu_edpt_number(p_endpoint_desc->bEndpointAddress);
+  uint8_t const epnum = dcd_ep_alloc(p_endpoint_desc);
   uint8_t const dir   = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
   const uint16_t buffer_size = pcd_aligned_buffer_size(tu_edpt_packet_size(p_endpoint_desc));
   uint16_t pma_addr;
   uint32_t wType;
 
-  TU_ASSERT(epnum < MAX_EP_COUNT);
+  TU_ASSERT(epnum < STFSDEV_EP_COUNT);
   TU_ASSERT(buffer_size <= 1024);
 
   // Set type
@@ -906,6 +987,8 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr)
     pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_DIS);
   }
 
+  dcd_ep_free(ep_addr);
+
   dcd_pma_free(ep_addr);
 }
 

From cece59df22cdd6d07f49676ff356a781d4536245 Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Thu, 29 Dec 2022 11:44:10 +0100
Subject: [PATCH 043/691] Generally enable ISO xfer.

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c       | 13 ++-----------
 .../st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h         |  2 --
 2 files changed, 2 insertions(+), 13 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 0d566da12..de8802d15 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -885,11 +885,9 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
   case TUSB_XFER_CONTROL:
     wType = USB_EP_CONTROL;
     break;
-#if defined(ISOCHRONOUS_DOUBLEBUFFER)
   case TUSB_XFER_ISOCHRONOUS:
     wType = USB_EP_ISOCHRONOUS;
     break;
-#endif
   case TUSB_XFER_BULK:
     wType = USB_EP_CONTROL;
     break;
@@ -914,20 +912,13 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
    * use the same buffer as the double buffer, essentially disabling double buffering */
   pma_addr = dcd_pma_alloc(p_endpoint_desc->bEndpointAddress, buffer_size);
 
-#if defined(ISOCHRONOUS_DOUBLEBUFFER)
   if( (dir == TUSB_DIR_IN) || (wType == USB_EP_ISOCHRONOUS) )
-#else
-  if(dir == TUSB_DIR_IN)
-#endif
   {
     *pcd_ep_tx_address_ptr(USB, epnum) = pma_addr;
     pcd_clear_tx_dtog(USB, epnum);
   }
-#if defined(ISOCHRONOUS_DOUBLEBUFFER)
+
   if( (dir == TUSB_DIR_OUT) || (wType == USB_EP_ISOCHRONOUS) )
-#else
-  else
-#endif
   {
     *pcd_ep_rx_address_ptr(USB, epnum) = pma_addr;
     pcd_set_ep_rx_bufsize(USB, epnum, buffer_size);
@@ -1035,7 +1026,7 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
   uint8_t const dir   = tu_edpt_dir(ep_addr);
 
   xfer->buffer = buffer;
-  xfer->ff     = NULL; // TODO support dcd_edpt_xfer_fifo API
+  xfer->ff     = NULL;
   xfer->total_len = total_bytes;
   xfer->queued_len = 0;
 
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index 40af9b3a5..b64776fc9 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -66,7 +66,6 @@
       defined(STM32F373xC)
   #include "stm32f3xx.h"
   #define PMA_LENGTH (512u)
-  #define ISOCHRONOUS_DOUBLEBUFFER
   // NO internal Pull-ups
   //         *B, and *C:    1 x 16 bits/word
   // PMA dedicated to USB (no sharing with CAN)
@@ -76,7 +75,6 @@
       defined(STM32F303xD) || defined(STM32F303xE)
   #include "stm32f3xx.h"
   #define PMA_LENGTH (1024u)
-  #define ISOCHRONOUS_DOUBLEBUFFER
   // NO internal Pull-ups
   // *6, *8, *D, and *E:    2 x 16 bits/word     LPM Support
   // When CAN clock is enabled, USB can use first 768 bytes ONLY.

From 8a1184e7b3092d96325f7e252b527d3d0755c727 Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Thu, 29 Dec 2022 14:17:43 +0100
Subject: [PATCH 044/691] Minor audio_test example fix. Fix
 CFG_TUD_AUDIO_EP_SZ_IN size.

---
 examples/device/audio_test/src/main.c                | 6 +++---
 examples/device/audio_test/src/plot_audio_samples.py | 4 ++++
 examples/device/audio_test/src/tusb_config.h         | 2 +-
 3 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/examples/device/audio_test/src/main.c b/examples/device/audio_test/src/main.c
index d0849c7ac..56961e427 100644
--- a/examples/device/audio_test/src/main.c
+++ b/examples/device/audio_test/src/main.c
@@ -71,7 +71,7 @@ audio_control_range_2_n_t(1) volumeRng[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX+1];
 audio_control_range_4_n_t(1) sampleFreqRng; 						// Sample frequency range state
 
 // Audio test data
-uint16_t test_buffer_audio[CFG_TUD_AUDIO_EP_SZ_IN/2];
+uint16_t test_buffer_audio[(CFG_TUD_AUDIO_EP_SZ_IN - 2) / 2];
 uint16_t startVal = 0;
 
 void led_blinking_task(void);
@@ -400,7 +400,7 @@ bool tud_audio_tx_done_pre_load_cb(uint8_t rhport, uint8_t itf, uint8_t ep_in, u
   (void) ep_in;
   (void) cur_alt_setting;
 
-  tud_audio_write ((uint8_t *)test_buffer_audio, CFG_TUD_AUDIO_EP_SZ_IN);
+  tud_audio_write ((uint8_t *)test_buffer_audio, CFG_TUD_AUDIO_EP_SZ_IN - 2);
 
   return true;
 }
@@ -413,7 +413,7 @@ bool tud_audio_tx_done_post_load_cb(uint8_t rhport, uint16_t n_bytes_copied, uin
   (void) ep_in;
   (void) cur_alt_setting;
 
-  for (size_t cnt = 0; cnt < CFG_TUD_AUDIO_EP_SZ_IN/2; cnt++)
+  for (size_t cnt = 0; cnt < (CFG_TUD_AUDIO_EP_SZ_IN - 2) / 2; cnt++)
   {
     test_buffer_audio[cnt] = startVal++;
   }
diff --git a/examples/device/audio_test/src/plot_audio_samples.py b/examples/device/audio_test/src/plot_audio_samples.py
index 6e3c4978e..2303df3d0 100644
--- a/examples/device/audio_test/src/plot_audio_samples.py
+++ b/examples/device/audio_test/src/plot_audio_samples.py
@@ -2,6 +2,7 @@ import sounddevice as sd
 import matplotlib.pyplot as plt
 import numpy as np
 import platform
+import csv
 
 if __name__ == '__main__':
 
@@ -31,4 +32,7 @@ if __name__ == '__main__':
     plt.ylabel('Amplitude')
     plt.title('MicNode')
     plt.show()
+    
+    samples = np.array(myrecording)
+    np.savetxt('Output.csv', samples, delimiter=",", fmt='%s')
     
\ No newline at end of file
diff --git a/examples/device/audio_test/src/tusb_config.h b/examples/device/audio_test/src/tusb_config.h
index 355ed1011..9f38612a9 100644
--- a/examples/device/audio_test/src/tusb_config.h
+++ b/examples/device/audio_test/src/tusb_config.h
@@ -114,7 +114,7 @@ extern "C" {
 #define CFG_TUD_AUDIO_ENABLE_EP_IN                                    1
 #define CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX                    2                                       // Driver gets this info from the descriptors - we define it here to use it to setup the descriptors and to do calculations with it below
 #define CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX                            1                                       // Driver gets this info from the descriptors - we define it here to use it to setup the descriptors and to do calculations with it below - be aware: for different number of channels you need another descriptor!
-#define CFG_TUD_AUDIO_EP_SZ_IN                                        48 * CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX * CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX      // 48 Samples (48 kHz) x 2 Bytes/Sample x 1 Channel
+#define CFG_TUD_AUDIO_EP_SZ_IN                                        (48 + 1) * CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX * CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX      // 48 Samples (48 kHz) x 2 Bytes/Sample x CFG_TUD_AUDIO_N_CHANNELS_TX Channels - One extra sample is needed for asynchronous transfer adjustment, see feedback EP
 #define CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX                             CFG_TUD_AUDIO_EP_SZ_IN                  // Maximum EP IN size for all AS alternate settings used
 #define CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ                          CFG_TUD_AUDIO_EP_SZ_IN + 1
 

From fe8c170c98c40a2fb517cbeaa49336b5af572c0f Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Thu, 29 Dec 2022 19:19:27 +0100
Subject: [PATCH 045/691] Add dcd_edpt_iso_alloc() / dcd_edpt_iso_activate()
 for ISO EP buffer management.

---
 src/device/dcd.h                              |  6 ++
 src/device/usbd.c                             | 19 +++++
 src/device/usbd_pvt.h                         |  6 ++
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 77 +++++++++++++++----
 4 files changed, 94 insertions(+), 14 deletions(-)

diff --git a/src/device/dcd.h b/src/device/dcd.h
index c1780f656..ef92d71d0 100644
--- a/src/device/dcd.h
+++ b/src/device/dcd.h
@@ -167,6 +167,12 @@ void dcd_edpt_stall           (uint8_t rhport, uint8_t ep_addr);
 // This API never calls with control endpoints, since it is auto cleared when receiving setup packet
 void dcd_edpt_clear_stall     (uint8_t rhport, uint8_t ep_addr);
 
+// Allocate packet buffer used by ISO endpoints
+// Some MCU need manual packet buffer allocation, we allocation largest size to avoid clustering
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size);
+
+// Configure and enable an ISO endpoint according to descriptor
+bool dcd_edpt_iso_activate(uint8_t rhport,  tusb_desc_endpoint_t const * p_endpoint_desc);
 //--------------------------------------------------------------------+
 // Event API (implemented by stack)
 //--------------------------------------------------------------------+
diff --git a/src/device/usbd.c b/src/device/usbd.c
index f652a878e..8b5e4d745 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -1380,4 +1380,23 @@ void usbd_sof_enable(uint8_t rhport, bool en)
   dcd_sof_enable(rhport, en);
 }
 
+bool usbd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size)
+{
+  rhport = _usbd_rhport;
+
+  TU_ASSERT(tu_edpt_number(ep_addr) < CFG_TUD_ENDPPOINT_MAX);
+
+  return dcd_edpt_iso_alloc(rhport, ep_addr, largest_packet_size);
+}
+
+bool usbd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep)
+{
+  rhport = _usbd_rhport;
+
+  TU_ASSERT(tu_edpt_number(desc_ep->bEndpointAddress) < CFG_TUD_ENDPPOINT_MAX);
+  TU_ASSERT(tu_edpt_validate(desc_ep, (tusb_speed_t) _usbd_dev.speed));
+
+  return dcd_edpt_iso_activate(rhport, desc_ep);
+}
+
 #endif
diff --git a/src/device/usbd_pvt.h b/src/device/usbd_pvt.h
index 6fad46db3..f860ab0a1 100644
--- a/src/device/usbd_pvt.h
+++ b/src/device/usbd_pvt.h
@@ -96,6 +96,12 @@ void usbd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr);
 // Check if endpoint is stalled
 bool usbd_edpt_stalled(uint8_t rhport, uint8_t ep_addr);
 
+// Allocate packet buffer used by ISO endpoints
+bool usbd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size);
+
+// Configure and enable an ISO endpoint according to descriptor
+bool usbd_edpt_iso_activate(uint8_t rhport,  tusb_desc_endpoint_t const * p_endpoint_desc);
+
 // Check if endpoint is ready (not busy and not stalled)
 TU_ATTR_ALWAYS_INLINE static inline
 bool usbd_edpt_ready(uint8_t rhport, uint8_t ep_addr)
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index de8802d15..59f155111 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -209,7 +209,7 @@ static void dcd_pma_alloc_reset(void);
 static uint16_t dcd_pma_alloc(uint8_t ep_addr, size_t length);
 static void dcd_pma_free(uint8_t ep_addr);
 static void dcd_ep_free(uint8_t ep_addr);
-static uint8_t dcd_ep_alloc(tusb_desc_endpoint_t const * p_endpoint_desc);
+static uint8_t dcd_ep_alloc(uint8_t ep_addr, uint8_t ep_type);
 static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, size_t wNBytes);
 static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wNBytes);
 
@@ -758,13 +758,15 @@ static uint16_t dcd_pma_alloc(uint8_t ep_addr, size_t length)
     TU_ASSERT(length <= epXferCtl->pma_alloc_size, 0xFFFF);  // Verify no larger than previous alloc
     return epXferCtl->pma_ptr;
   }
-  
+
+  open_ep_count++;
+
   uint16_t addr = ep_buf_ptr;
   ep_buf_ptr = (uint16_t)(ep_buf_ptr + length); // increment buffer pointer
-  
+
   // Verify no overflow
   TU_ASSERT(ep_buf_ptr <= PMA_LENGTH, 0xFFFF);
-  
+
   epXferCtl->pma_ptr = addr;
   epXferCtl->pma_alloc_size = length;
   //TU_LOG2("dcd_pma_alloc(%x,%x)=%x\r\n",ep_addr,length,addr);
@@ -802,18 +804,17 @@ static void dcd_pma_free(uint8_t ep_addr)
 /***
  * Allocate hardware endpoint
  */
-static uint8_t dcd_ep_alloc(tusb_desc_endpoint_t const * p_endpoint_desc)
+static uint8_t dcd_ep_alloc(uint8_t ep_addr, uint8_t ep_type)
 {
-  uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress);
-  uint8_t const dir   = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
-  uint8_t const eptype = p_endpoint_desc->bmAttributes.xfer;
+  uint8_t const epnum = tu_edpt_number(ep_addr);
+  uint8_t const dir   = tu_edpt_dir(ep_addr);
 
   for(uint8_t i = 0; i < STFSDEV_EP_COUNT; i++)
   {
     // If EP of current direction is not allocated
     // Except for ISO endpoint, both direction should be free
     if(!ep_alloc_status[i].allocated[dir] &&
-       (eptype != TUSB_XFER_ISOCHRONOUS || !ep_alloc_status[i].allocated[dir ^ 1]))
+       (ep_type != TUSB_XFER_ISOCHRONOUS || !ep_alloc_status[i].allocated[dir ^ 1]))
     {
       // Check if EP number is the same
       if(ep_alloc_status[i].ep_num == 0xFF ||
@@ -821,10 +822,10 @@ static uint8_t dcd_ep_alloc(tusb_desc_endpoint_t const * p_endpoint_desc)
       {
         // One EP pair has to be the same type
         if(ep_alloc_status[i].ep_type == 0xFF ||
-           ep_alloc_status[i].ep_type == eptype)
+           ep_alloc_status[i].ep_type == ep_type)
         {
           ep_alloc_status[i].ep_num = epnum;
-          ep_alloc_status[i].ep_type = eptype;
+          ep_alloc_status[i].ep_type = ep_type;
           ep_alloc_status[i].allocated[dir] = true;
           
           return i;
@@ -871,7 +872,7 @@ static void dcd_ep_free(uint8_t ep_addr)
 bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
 {
   (void)rhport;
-  uint8_t const epnum = dcd_ep_alloc(p_endpoint_desc);
+  uint8_t const epnum = dcd_ep_alloc(p_endpoint_desc->bEndpointAddress, p_endpoint_desc->bmAttributes.xfer);
   uint8_t const dir   = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
   const uint16_t buffer_size = pcd_aligned_buffer_size(tu_edpt_packet_size(p_endpoint_desc));
   uint16_t pma_addr;
@@ -900,8 +901,6 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
     TU_ASSERT(false);
   }
 
-  open_ep_count++;
-
   pcd_set_eptype(USB, epnum, wType);
   pcd_set_ep_address(USB, epnum, tu_edpt_number(p_endpoint_desc->bEndpointAddress));
   // Be normal, for now, instead of only accepting zero-byte packets (on control endpoint)
@@ -983,6 +982,56 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr)
   dcd_pma_free(ep_addr);
 }
 
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size)
+{
+  (void)rhport;
+  
+  TU_ASSERT(largest_packet_size <= 1024);
+  
+  uint8_t const epnum = dcd_ep_alloc(ep_addr, TUSB_XFER_ISOCHRONOUS);
+  const uint16_t buffer_size = pcd_aligned_buffer_size(largest_packet_size);
+
+  /* Create a packet memory buffer area. For isochronous endpoints,
+   * use the same buffer as the double buffer, essentially disabling double buffering */
+  dcd_pma_alloc(ep_addr, buffer_size);
+
+  xfer_ctl_ptr(ep_addr)->epnum = epnum;
+
+  return true;
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport,  tusb_desc_endpoint_t const * p_endpoint_desc)
+{
+  (void)rhport;
+  uint8_t const epnum = xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->epnum;
+  uint8_t const dir   = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
+  const uint16_t packet_size = tu_edpt_packet_size(p_endpoint_desc);
+  uint16_t pma_addr;
+
+  /* Disable endpoint */
+  pcd_set_ep_tx_status(USB, epnum, USB_EP_TX_DIS);
+  pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_DIS);
+
+  pcd_set_eptype(USB, epnum, USB_EP_ISOCHRONOUS);
+  pcd_set_ep_address(USB, epnum, tu_edpt_number(p_endpoint_desc->bEndpointAddress));
+  // Be normal, for now, instead of only accepting zero-byte packets (on control endpoint)
+  // or being double-buffered (bulk endpoints)
+  pcd_clear_ep_kind(USB,0);
+
+  pma_addr = xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->pma_ptr;
+
+  *pcd_ep_tx_address_ptr(USB, epnum) = pma_addr;
+  pcd_clear_tx_dtog(USB, epnum);
+
+  *pcd_ep_rx_address_ptr(USB, epnum) = pma_addr;
+  pcd_set_ep_rx_bufsize(USB, epnum, packet_size);
+  pcd_clear_rx_dtog(USB, epnum);
+
+  xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->max_packet_size = packet_size;
+
+  return true;
+}
+
 // Currently, single-buffered, and only 64 bytes at a time (max)
 
 static void dcd_transmit_packet(xfer_ctl_t * xfer, uint16_t ep_ix)

From e4f07206f8cbb177f3515f1fdbd5ed1f8cc9f668 Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Thu, 29 Dec 2022 19:34:12 +0100
Subject: [PATCH 046/691] UAC : Enable fifo based transfer on stm32_fsdev

---
 src/class/audio/audio_device.c | 25 +++++++++----------------
 src/device/dcd.h               |  4 ++--
 2 files changed, 11 insertions(+), 18 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 698fba566..82682f162 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -76,26 +76,19 @@
 // Linear buffer in case target MCU is not capable of handling a ring buffer FIFO e.g. no hardware buffer
 // is available or driver is would need to be changed dramatically
 
-// Only STM32 synopsys and dcd_transdimension use non-linear buffer for now
-// Synopsys detection copied from dcd_synopsys.c (refactor later on)
-#if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \
-    defined (STM32F107xB) || defined (STM32F107xC)
-#define STM32F1_SYNOPSYS
-#endif
-
-#if defined (STM32L475xx) || defined (STM32L476xx) ||                          \
-    defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || \
-    defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || \
-    defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
-#define STM32L4_SYNOPSYS
-#endif
-
-#if (CFG_TUSB_MCU == OPT_MCU_STM32F1 && defined(STM32F1_SYNOPSYS)) || \
+// Only STM32 and dcd_transdimension use non-linear buffer for now
+#if CFG_TUSB_MCU == OPT_MCU_STM32F0                               || \
+    CFG_TUSB_MCU == OPT_MCU_STM32F1                               || \
     CFG_TUSB_MCU == OPT_MCU_STM32F2                               || \
+    CFG_TUSB_MCU == OPT_MCU_STM32F3                               || \
     CFG_TUSB_MCU == OPT_MCU_STM32F4                               || \
     CFG_TUSB_MCU == OPT_MCU_STM32F7                               || \
     CFG_TUSB_MCU == OPT_MCU_STM32H7                               || \
-    (CFG_TUSB_MCU == OPT_MCU_STM32L4 && defined(STM32L4_SYNOPSYS)) || \
+    CFG_TUSB_MCU == OPT_MCU_STM32L0                               || \
+    CFG_TUSB_MCU == OPT_MCU_STM32L1                               || \
+    CFG_TUSB_MCU == OPT_MCU_STM32L4                               || \
+    CFG_TUSB_MCU == OPT_MCU_STM32G4                               || \
+    CFG_TUSB_MCU == OPT_MCU_STM32WB                               || \
     CFG_TUSB_MCU == OPT_MCU_RX63X                                 || \
     CFG_TUSB_MCU == OPT_MCU_RX65X                                 || \
     CFG_TUSB_MCU == OPT_MCU_RX72N                                 || \
diff --git a/src/device/dcd.h b/src/device/dcd.h
index ef92d71d0..2980cc4e6 100644
--- a/src/device/dcd.h
+++ b/src/device/dcd.h
@@ -169,10 +169,10 @@ void dcd_edpt_clear_stall     (uint8_t rhport, uint8_t ep_addr);
 
 // Allocate packet buffer used by ISO endpoints
 // Some MCU need manual packet buffer allocation, we allocation largest size to avoid clustering
-bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size);
+TU_ATTR_WEAK bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size);
 
 // Configure and enable an ISO endpoint according to descriptor
-bool dcd_edpt_iso_activate(uint8_t rhport,  tusb_desc_endpoint_t const * p_endpoint_desc);
+TU_ATTR_WEAK bool dcd_edpt_iso_activate(uint8_t rhport,  tusb_desc_endpoint_t const * p_endpoint_desc);
 //--------------------------------------------------------------------+
 // Event API (implemented by stack)
 //--------------------------------------------------------------------+

From 0bd41d53549183576553ec2fb84f00926c25e44c Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Thu, 29 Dec 2022 21:02:10 +0100
Subject: [PATCH 047/691] Fix CI.

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c        | 4 ++--
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 59f155111..f3b55cd75 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -178,7 +178,8 @@ TU_ATTR_ALWAYS_INLINE static inline xfer_ctl_t* xfer_ctl_ptr(uint32_t ep_addr)
 {
   uint8_t epnum = tu_edpt_number(ep_addr);
   uint8_t dir = tu_edpt_dir(ep_addr);
-  TU_ASSERT(epnum < MAX_EP_COUNT);
+  // Fix -Werror=null-dereference
+  TU_ASSERT(epnum < MAX_EP_COUNT, &xfer_status[0][0]);
 
   return &xfer_status[epnum][dir];
 }
@@ -1004,7 +1005,6 @@ bool dcd_edpt_iso_activate(uint8_t rhport,  tusb_desc_endpoint_t const * p_endpo
 {
   (void)rhport;
   uint8_t const epnum = xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->epnum;
-  uint8_t const dir   = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
   const uint16_t packet_size = tu_edpt_packet_size(p_endpoint_desc);
   uint16_t pma_addr;
 
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index b64776fc9..382374614 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -234,7 +234,7 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_cnt_reg(__O uint16_t * pdwRe
   /* There should be no remainder in the above calculation */
   TU_ASSERT((wCount - (numblocks * (blocksize ? 32 : 2))) == 0, /**/);
 
-  /* Encode into register. When BLSIZE==1, we need to substract 1 block count */
+  /* Encode into register. When BLSIZE==1, we need to subtract 1 block count */
   *pdwReg = (blocksize << 15) | ((numblocks - blocksize) << 10);
 }
 

From db65759b1eb24c8dc20dfd77f2ff0ea07914e9d2 Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Thu, 29 Dec 2022 23:29:50 +0100
Subject: [PATCH 048/691] Use weak for dcd_edpt_iso_alloc/dcd_edpt_iso_activate

---
 src/device/usbd.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/src/device/usbd.c b/src/device/usbd.c
index 8b5e4d745..ea9ab91b6 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -1386,7 +1386,10 @@ bool usbd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packe
 
   TU_ASSERT(tu_edpt_number(ep_addr) < CFG_TUD_ENDPPOINT_MAX);
 
-  return dcd_edpt_iso_alloc(rhport, ep_addr, largest_packet_size);
+  if (dcd_edpt_iso_alloc)
+    return dcd_edpt_iso_alloc(rhport, ep_addr, largest_packet_size);
+  else
+    return false;
 }
 
 bool usbd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep)
@@ -1396,7 +1399,10 @@ bool usbd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep
   TU_ASSERT(tu_edpt_number(desc_ep->bEndpointAddress) < CFG_TUD_ENDPPOINT_MAX);
   TU_ASSERT(tu_edpt_validate(desc_ep, (tusb_speed_t) _usbd_dev.speed));
 
-  return dcd_edpt_iso_activate(rhport, desc_ep);
+  if (dcd_edpt_iso_activate)
+    return dcd_edpt_iso_activate(rhport, desc_ep);
+  else
+    return false;
 }
 
 #endif

From 07ad64adfe192a3cdc6dc20088d98dbb6beb0f58 Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Thu, 29 Dec 2022 23:30:24 +0100
Subject: [PATCH 049/691] Do not set USB_EP_RX_NAK for ISO EP.

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index f3b55cd75..d462fc649 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -1170,9 +1170,11 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
   }
   else
   { // OUT
+    if (pcd_get_eptype(USB, epnum) !=  USB_EP_ISOCHRONOUS) {
+      pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_NAK);
+    }
     /* Reset to DATA0 if clearing stall condition. */
     pcd_clear_rx_dtog(USB, epnum);
-    pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_NAK);
   }
 }
 

From 21bdafcfef4cfdbd77277da1717c8a33544b8721 Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Fri, 30 Dec 2022 01:05:12 +0100
Subject: [PATCH 050/691] Add ISO buffer allocation.

---
 src/class/audio/audio_device.c                | 123 +++++++++++++++++-
 src/device/usbd.c                             |  12 +-
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c |  37 ++++--
 3 files changed, 155 insertions(+), 17 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 82682f162..a8a2439bc 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -106,6 +106,18 @@
 #define  USE_LINEAR_BUFFER     1
 #endif
 
+// Temporarily put the check here for stm32_fsdev
+#if CFG_TUSB_MCU == OPT_MCU_STM32F0                               || \
+    CFG_TUSB_MCU == OPT_MCU_STM32F3                               || \
+    CFG_TUSB_MCU == OPT_MCU_STM32L0                               || \
+    CFG_TUSB_MCU == OPT_MCU_STM32L1                               || \
+    CFG_TUSB_MCU == OPT_MCU_STM32G4                               || \
+    CFG_TUSB_MCU == OPT_MCU_STM32WB
+#define  USE_ISO_EP_ALLOCATION   1
+#else
+#define  USE_ISO_EP_ALLOCATION   0
+#endif
+
 // Declaration of buffers
 
 // Check for maximum supported numbers
@@ -1467,6 +1479,104 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
 #endif
       }
 
+#if USE_ISO_EP_ALLOCATION
+#if CFG_TUD_AUDIO_ENABLE_EP_IN
+      uint8_t ep_in = 0;
+      uint16_t ep_in_size = 0;
+#endif
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT
+      uint8_t ep_out = 0;
+      uint16_t ep_out_size = 0;
+#endif
+#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+      uint8_t ep_fb = 0;
+#endif
+
+      // First find EP addr
+      uint8_t const *p_desc = _audiod_fct[i].p_desc;
+      uint8_t const *p_desc_end = p_desc + _audiod_fct[i].desc_length - TUD_AUDIO_DESC_IAD_LEN;
+      while (p_desc < p_desc_end)
+      {
+        if (tu_desc_type(p_desc) == TUSB_DESC_ENDPOINT)
+        {
+          tusb_desc_endpoint_t const *desc_ep = (tusb_desc_endpoint_t const *) p_desc;
+          if (desc_ep->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS)
+          {
+#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+            // Explicit feedback EP
+            if (desc_ep->bmAttributes.usage == 1)
+            {
+              ep_fb = desc_ep->bEndpointAddress;
+            }
+#endif      
+            // Data EP
+            if (desc_ep->bmAttributes.usage == 0)
+            {
+              if (tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN)
+              {
+#if CFG_TUD_AUDIO_ENABLE_EP_IN
+                ep_in = desc_ep->bEndpointAddress;
+#endif
+              } else
+              {
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT
+                ep_out = desc_ep->bEndpointAddress;
+#endif
+              }
+            }
+            
+          }
+        }
+        p_desc = tu_desc_next(p_desc);
+      }
+
+      // Then find EP max size
+      p_desc = _audiod_fct[i].p_desc;
+      while (p_desc < p_desc_end)
+      {
+        if (tu_desc_type(p_desc) == TUSB_DESC_ENDPOINT)
+        {
+          tusb_desc_endpoint_t const *desc_ep = (tusb_desc_endpoint_t const *) p_desc;
+          if (desc_ep->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS)
+          {
+#if CFG_TUD_AUDIO_ENABLE_EP_IN
+            if (desc_ep->bEndpointAddress == ep_in)
+            {
+              ep_in_size = TU_MAX(tu_edpt_packet_size(desc_ep), ep_in_size);
+            }
+#endif
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT
+            if (desc_ep->bEndpointAddress == ep_out)
+            {
+              ep_out_size = TU_MAX(tu_edpt_packet_size(desc_ep), ep_out_size);
+            }
+#endif
+          }
+        }
+        p_desc = tu_desc_next(p_desc);
+      }
+
+#if CFG_TUD_AUDIO_ENABLE_EP_IN
+      if (ep_in)
+      {
+        usbd_edpt_iso_alloc(rhport, ep_in, ep_in_size);
+      }
+#endif
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT
+      if (ep_out)
+      {
+        usbd_edpt_iso_alloc(rhport, ep_out, ep_out_size);
+      }
+#endif
+#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+      if (ep_fb)
+      {
+        usbd_edpt_iso_alloc(rhport, ep_fb, 4);
+      }
+#endif
+
+#endif
+
       break;
     }
   }
@@ -1528,8 +1638,9 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
   if (audio->ep_in_as_intf_num == itf)
   {
     audio->ep_in_as_intf_num = 0;
+#if !USE_ISO_EP_ALLOCATION
     usbd_edpt_close(rhport, audio->ep_in);
-
+#endif
     // Clear FIFOs, since data is no longer valid
 #if !CFG_TUD_AUDIO_ENABLE_ENCODING
     tu_fifo_clear(&audio->ep_in_ff);
@@ -1552,8 +1663,9 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
   if (audio->ep_out_as_intf_num == itf)
   {
     audio->ep_out_as_intf_num = 0;
+#if !USE_ISO_EP_ALLOCATION
     usbd_edpt_close(rhport, audio->ep_out);
-
+#endif
     // Clear FIFOs, since data is no longer valid
 #if !CFG_TUD_AUDIO_ENABLE_DECODING
     tu_fifo_clear(&audio->ep_out_ff);
@@ -1571,7 +1683,9 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
 
     // Close corresponding feedback EP
 #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+#if !USE_ISO_EP_ALLOCATION
     usbd_edpt_close(rhport, audio->ep_fb);
+#endif
     audio->ep_fb = 0;
     tu_memclr(&audio->feedback, sizeof(audio->feedback));
 #endif
@@ -1601,8 +1715,11 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
         if (tu_desc_type(p_desc) == TUSB_DESC_ENDPOINT)
         {
           tusb_desc_endpoint_t const* desc_ep = (tusb_desc_endpoint_t const *) p_desc;
+#if USE_ISO_EP_ALLOCATION
+          TU_ASSERT(usbd_edpt_iso_activate(rhport, desc_ep));
+#else
           TU_ASSERT(usbd_edpt_open(rhport, desc_ep));
-
+#endif
           uint8_t const ep_addr = desc_ep->bEndpointAddress;
 
           //TODO: We need to set EP non busy since this is not taken care of right now in ep_close() - THIS IS A WORKAROUND!
diff --git a/src/device/usbd.c b/src/device/usbd.c
index ea9ab91b6..fd4414559 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -1396,11 +1396,19 @@ bool usbd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep
 {
   rhport = _usbd_rhport;
 
-  TU_ASSERT(tu_edpt_number(desc_ep->bEndpointAddress) < CFG_TUD_ENDPPOINT_MAX);
+  uint8_t const epnum = tu_edpt_number(desc_ep->bEndpointAddress);
+  uint8_t const dir   = tu_edpt_dir(desc_ep->bEndpointAddress);
+  
+  TU_ASSERT(epnum < CFG_TUD_ENDPPOINT_MAX);
   TU_ASSERT(tu_edpt_validate(desc_ep, (tusb_speed_t) _usbd_dev.speed));
-
+  
   if (dcd_edpt_iso_activate)
+  {
+    _usbd_dev.ep_status[epnum][dir].stalled = false;
+    _usbd_dev.ep_status[epnum][dir].busy = false;
+    _usbd_dev.ep_status[epnum][dir].claimed = false;
     return dcd_edpt_iso_activate(rhport, desc_ep);
+  }
   else
     return false;
 }
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index d462fc649..a428d546d 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -812,6 +812,13 @@ static uint8_t dcd_ep_alloc(uint8_t ep_addr, uint8_t ep_type)
 
   for(uint8_t i = 0; i < STFSDEV_EP_COUNT; i++)
   {
+    // Check if already allocated
+    if(ep_alloc_status[i].allocated[dir] &&
+       ep_alloc_status[i].ep_type == ep_type &&
+       ep_alloc_status[i].ep_num == epnum)
+    {
+      return i;
+    }
     // If EP of current direction is not allocated
     // Except for ISO endpoint, both direction should be free
     if(!ep_alloc_status[i].allocated[dir] &&
@@ -971,7 +978,7 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr)
 
   if(dir == TUSB_DIR_IN)
   {
-    pcd_set_ep_tx_status(USB,epnum, USB_EP_TX_DIS);
+    pcd_set_ep_tx_status(USB, epnum, USB_EP_TX_DIS);
   }
   else
   {
@@ -994,10 +1001,15 @@ bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet
 
   /* Create a packet memory buffer area. For isochronous endpoints,
    * use the same buffer as the double buffer, essentially disabling double buffering */
-  dcd_pma_alloc(ep_addr, buffer_size);
+  uint16_t pma_addr = dcd_pma_alloc(ep_addr, buffer_size);
 
   xfer_ctl_ptr(ep_addr)->epnum = epnum;
 
+  pcd_set_eptype(USB, epnum, USB_EP_ISOCHRONOUS);
+  
+  *pcd_ep_tx_address_ptr(USB, epnum) = pma_addr;
+  *pcd_ep_rx_address_ptr(USB, epnum) = pma_addr;
+  
   return true;
 }
 
@@ -1005,25 +1017,26 @@ bool dcd_edpt_iso_activate(uint8_t rhport,  tusb_desc_endpoint_t const * p_endpo
 {
   (void)rhport;
   uint8_t const epnum = xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->epnum;
-  const uint16_t packet_size = tu_edpt_packet_size(p_endpoint_desc);
-  uint16_t pma_addr;
+  uint8_t const dir   = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
+  const uint16_t packet_size = pcd_aligned_buffer_size(tu_edpt_packet_size(p_endpoint_desc));
 
   /* Disable endpoint */
-  pcd_set_ep_tx_status(USB, epnum, USB_EP_TX_DIS);
-  pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_DIS);
-
-  pcd_set_eptype(USB, epnum, USB_EP_ISOCHRONOUS);
+  if(dir == TUSB_DIR_IN)
+  {
+    pcd_set_ep_tx_status(USB, epnum, USB_EP_TX_DIS);
+  }
+  else
+  {
+    pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_DIS);
+  }
+  
   pcd_set_ep_address(USB, epnum, tu_edpt_number(p_endpoint_desc->bEndpointAddress));
   // Be normal, for now, instead of only accepting zero-byte packets (on control endpoint)
   // or being double-buffered (bulk endpoints)
   pcd_clear_ep_kind(USB,0);
 
-  pma_addr = xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->pma_ptr;
-
-  *pcd_ep_tx_address_ptr(USB, epnum) = pma_addr;
   pcd_clear_tx_dtog(USB, epnum);
 
-  *pcd_ep_rx_address_ptr(USB, epnum) = pma_addr;
   pcd_set_ep_rx_bufsize(USB, epnum, packet_size);
   pcd_clear_rx_dtog(USB, epnum);
 

From 7ff2f43bfd9a9dd36b3c3aadcd0362db509b367c Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Fri, 30 Dec 2022 15:09:50 +0100
Subject: [PATCH 051/691] Add multi-rate audio test example for new ISO buffer
 allocation.

---
 examples/device/CMakeLists.txt                |   1 +
 .../audio_test_multi_rate/CMakeLists.txt      |  28 +
 .../device/audio_test_multi_rate/Makefile     |  12 +
 .../device/audio_test_multi_rate/skip.txt     |   3 +
 .../device/audio_test_multi_rate/src/main.c   | 521 ++++++++++++++++++
 .../src/plot_audio_samples.py                 |  38 ++
 .../audio_test_multi_rate/src/tusb_config.h   | 141 +++++
 .../src/usb_descriptors.c                     | 169 ++++++
 .../src/usb_descriptors.h                     | 102 ++++
 9 files changed, 1015 insertions(+)
 create mode 100644 examples/device/audio_test_multi_rate/CMakeLists.txt
 create mode 100644 examples/device/audio_test_multi_rate/Makefile
 create mode 100644 examples/device/audio_test_multi_rate/skip.txt
 create mode 100644 examples/device/audio_test_multi_rate/src/main.c
 create mode 100644 examples/device/audio_test_multi_rate/src/plot_audio_samples.py
 create mode 100644 examples/device/audio_test_multi_rate/src/tusb_config.h
 create mode 100644 examples/device/audio_test_multi_rate/src/usb_descriptors.c
 create mode 100644 examples/device/audio_test_multi_rate/src/usb_descriptors.h

diff --git a/examples/device/CMakeLists.txt b/examples/device/CMakeLists.txt
index edf5ab805..5520209e0 100644
--- a/examples/device/CMakeLists.txt
+++ b/examples/device/CMakeLists.txt
@@ -8,6 +8,7 @@ family_initialize_project(tinyusb_device_examples ${CMAKE_CURRENT_LIST_DIR})
 # family_add_subdirectory will filter what to actually add based on selected FAMILY
 family_add_subdirectory(audio_4_channel_mic)
 family_add_subdirectory(audio_test)
+family_add_subdirectory(audio_test_multi_rate)
 family_add_subdirectory(board_test)
 family_add_subdirectory(cdc_dual_ports)
 family_add_subdirectory(cdc_msc)
diff --git a/examples/device/audio_test_multi_rate/CMakeLists.txt b/examples/device/audio_test_multi_rate/CMakeLists.txt
new file mode 100644
index 000000000..cb321f9a8
--- /dev/null
+++ b/examples/device/audio_test_multi_rate/CMakeLists.txt
@@ -0,0 +1,28 @@
+cmake_minimum_required(VERSION 3.5)
+
+include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
+
+# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
+family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
+
+project(${PROJECT})
+
+# Checks this example is valid for the family and initializes the project
+family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+
+add_executable(${PROJECT})
+
+# Example source
+target_sources(${PROJECT} PUBLIC
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
+)
+
+# Example include
+target_include_directories(${PROJECT} PUBLIC
+  ${CMAKE_CURRENT_SOURCE_DIR}/src
+)
+
+# Configure compilation flags and libraries for the example... see the corresponding function
+# in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT})
\ No newline at end of file
diff --git a/examples/device/audio_test_multi_rate/Makefile b/examples/device/audio_test_multi_rate/Makefile
new file mode 100644
index 000000000..5a455078e
--- /dev/null
+++ b/examples/device/audio_test_multi_rate/Makefile
@@ -0,0 +1,12 @@
+include ../../../tools/top.mk
+include ../../make.mk
+
+INC += \
+  src \
+  $(TOP)/hw \
+
+# Example source
+EXAMPLE_SOURCE += $(wildcard src/*.c)
+SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+
+include ../../rules.mk
diff --git a/examples/device/audio_test_multi_rate/skip.txt b/examples/device/audio_test_multi_rate/skip.txt
new file mode 100644
index 000000000..ae9b57f1f
--- /dev/null
+++ b/examples/device/audio_test_multi_rate/skip.txt
@@ -0,0 +1,3 @@
+mcu:SAMD11
+mcu:SAME5X
+mcu:SAMG
\ No newline at end of file
diff --git a/examples/device/audio_test_multi_rate/src/main.c b/examples/device/audio_test_multi_rate/src/main.c
new file mode 100644
index 000000000..e4d2d0253
--- /dev/null
+++ b/examples/device/audio_test_multi_rate/src/main.c
@@ -0,0 +1,521 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Reinhard Panhuber
+ * Copyright (c) 2022 HiFiPhile
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+/* plot_audio_samples.py requires following modules:
+ * $ sudo apt install libportaudio
+ * $ pip3 install sounddevice matplotlib
+ *
+ * Then run
+ * $ python3 plot_audio_samples.py
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+
+#include "bsp/board.h"
+#include "tusb.h"
+#include "usb_descriptors.h"
+
+//--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF PROTYPES
+//--------------------------------------------------------------------+
+
+/* Blink pattern
+ * - 250 ms  : device not mounted
+ * - 1000 ms : device mounted
+ * - 2500 ms : device is suspended
+ */
+enum  {
+  BLINK_NOT_MOUNTED = 250,
+  BLINK_MOUNTED = 1000,
+  BLINK_SUSPENDED = 2500,
+};
+
+static uint32_t blink_interval_ms = BLINK_NOT_MOUNTED;
+
+// Audio controls
+// Current states
+bool mute[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX + 1]; 				          // +1 for master channel 0
+uint16_t volume[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX + 1]; 					// +1 for master channel 0
+uint32_t sampFreq;
+uint8_t bytesPerSample;
+uint8_t clkValid;
+
+// Range states
+// List of supported sample rates
+static const uint32_t sampleRatesList[] =
+{
+    32000, 48000, 96000
+};
+
+#define N_sampleRates  TU_ARRAY_SIZE(sampleRatesList)
+
+// Bytes per format of every Alt settings
+static const uint8_t bytesPerSampleAltList[CFG_TUD_AUDIO_FUNC_1_N_FORMATS] =
+{
+    CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX,
+    CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX,
+};
+
+audio_control_range_2_n_t(1) volumeRng[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX+1]; 			// Volume range state
+
+
+// Audio test data
+CFG_TUSB_MEM_ALIGN uint8_t test_buffer_audio[CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX];
+uint16_t startVal = 0;
+
+void led_blinking_task(void);
+void audio_task(void);
+
+/*------------- MAIN -------------*/
+int main(void)
+{
+  board_init();
+
+  // init device stack on configured roothub port
+  tud_init(BOARD_TUD_RHPORT);
+
+  // Init values
+  sampFreq = sampleRatesList[0];
+  clkValid = 1;
+
+  while (1)
+  {
+    tud_task(); // tinyusb device task
+    led_blinking_task();
+    audio_task();
+  }
+
+
+  return 0;
+}
+
+//--------------------------------------------------------------------+
+// Device callbacks
+//--------------------------------------------------------------------+
+
+// Invoked when device is mounted
+void tud_mount_cb(void)
+{
+  blink_interval_ms = BLINK_MOUNTED;
+}
+
+// Invoked when device is unmounted
+void tud_umount_cb(void)
+{
+  blink_interval_ms = BLINK_NOT_MOUNTED;
+}
+
+// Invoked when usb bus is suspended
+// remote_wakeup_en : if host allow us  to perform remote wakeup
+// Within 7ms, device must draw an average of current less than 2.5 mA from bus
+void tud_suspend_cb(bool remote_wakeup_en)
+{
+  (void) remote_wakeup_en;
+  blink_interval_ms = BLINK_SUSPENDED;
+}
+
+// Invoked when usb bus is resumed
+void tud_resume_cb(void)
+{
+  blink_interval_ms = BLINK_MOUNTED;
+}
+
+//--------------------------------------------------------------------+
+// AUDIO Task
+//--------------------------------------------------------------------+
+
+void audio_task(void)
+{
+  // Yet to be filled - e.g. put meas data into TX FIFOs etc.
+  // asm("nop");
+}
+
+//--------------------------------------------------------------------+
+// Application Callback API Implementations
+//--------------------------------------------------------------------+
+
+// Invoked when set interface is called, typically on start/stop streaming or format change
+bool tud_audio_set_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request)
+{
+  (void)rhport;
+  //uint8_t const itf = tu_u16_low(tu_le16toh(p_request->wIndex));
+  uint8_t const alt = tu_u16_low(tu_le16toh(p_request->wValue));
+  
+  // Clear buffer when streaming format is changed
+  if(alt != 0)
+  {
+    bytesPerSample = bytesPerSampleAltList[alt-1];
+  }
+  return true;
+}
+
+// Invoked when audio class specific set request received for an EP
+bool tud_audio_set_req_ep_cb(uint8_t rhport, tusb_control_request_t const * p_request, uint8_t *pBuff)
+{
+  (void) rhport;
+  (void) pBuff;
+
+  // We do not support any set range requests here, only current value requests
+  TU_VERIFY(p_request->bRequest == AUDIO_CS_REQ_CUR);
+
+  // Page 91 in UAC2 specification
+  uint8_t channelNum = TU_U16_LOW(p_request->wValue);
+  uint8_t ctrlSel = TU_U16_HIGH(p_request->wValue);
+  uint8_t ep = TU_U16_LOW(p_request->wIndex);
+
+  (void) channelNum; (void) ctrlSel; (void) ep;
+
+  return false; 	// Yet not implemented
+}
+
+// Invoked when audio class specific set request received for an interface
+bool tud_audio_set_req_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request, uint8_t *pBuff)
+{
+  (void) rhport;
+  (void) pBuff;
+
+  // We do not support any set range requests here, only current value requests
+  TU_VERIFY(p_request->bRequest == AUDIO_CS_REQ_CUR);
+
+  // Page 91 in UAC2 specification
+  uint8_t channelNum = TU_U16_LOW(p_request->wValue);
+  uint8_t ctrlSel = TU_U16_HIGH(p_request->wValue);
+  uint8_t itf = TU_U16_LOW(p_request->wIndex);
+
+  (void) channelNum; (void) ctrlSel; (void) itf;
+
+  return false; 	// Yet not implemented
+}
+
+// Invoked when audio class specific set request received for an entity
+bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const * p_request, uint8_t *pBuff)
+{
+  (void) rhport;
+
+  // Page 91 in UAC2 specification
+  uint8_t channelNum = TU_U16_LOW(p_request->wValue);
+  uint8_t ctrlSel = TU_U16_HIGH(p_request->wValue);
+  uint8_t itf = TU_U16_LOW(p_request->wIndex);
+  uint8_t entityID = TU_U16_HIGH(p_request->wIndex);
+
+  (void) itf;
+
+  // We do not support any set range requests here, only current value requests
+  TU_VERIFY(p_request->bRequest == AUDIO_CS_REQ_CUR);
+
+  // If request is for our feature unit
+  if ( entityID == UAC2_ENTITY_FEATURE_UNIT )
+  {
+    switch ( ctrlSel )
+    {
+      case AUDIO_FU_CTRL_MUTE:
+        // Request uses format layout 1
+        TU_VERIFY(p_request->wLength == sizeof(audio_control_cur_1_t));
+
+        mute[channelNum] = ((audio_control_cur_1_t*) pBuff)->bCur;
+
+        TU_LOG2("    Set Mute: %d of channel: %u\r\n", mute[channelNum], channelNum);
+      return true;
+
+      case AUDIO_FU_CTRL_VOLUME:
+        // Request uses format layout 2
+        TU_VERIFY(p_request->wLength == sizeof(audio_control_cur_2_t));
+
+        volume[channelNum] = (uint16_t) ((audio_control_cur_2_t*) pBuff)->bCur;
+
+        TU_LOG2("    Set Volume: %d dB of channel: %u\r\n", volume[channelNum], channelNum);
+      return true;
+
+        // Unknown/Unsupported control
+      default:
+        TU_BREAKPOINT();
+      return false;
+    }
+  }
+  
+  // Clock Source unit
+  if ( entityID == UAC2_ENTITY_CLOCK )
+  {
+    switch ( ctrlSel )
+    {
+      case AUDIO_CS_CTRL_SAM_FREQ:
+        TU_VERIFY(p_request->wLength == sizeof(audio_control_cur_4_t));
+
+        sampFreq = ((audio_control_cur_4_t *)pBuff)->bCur;
+
+        TU_LOG2("Clock set current freq: %d\r\n", sampFreq);
+
+        return true;
+      break;
+
+      // Unknown/Unsupported control
+      default:
+        TU_BREAKPOINT();
+        return false;
+    }
+  }
+  
+  return false;    // Yet not implemented
+}
+
+// Invoked when audio class specific get request received for an EP
+bool tud_audio_get_req_ep_cb(uint8_t rhport, tusb_control_request_t const * p_request)
+{
+  (void) rhport;
+
+  // Page 91 in UAC2 specification
+  uint8_t channelNum = TU_U16_LOW(p_request->wValue);
+  uint8_t ctrlSel = TU_U16_HIGH(p_request->wValue);
+  uint8_t ep = TU_U16_LOW(p_request->wIndex);
+
+  (void) channelNum; (void) ctrlSel; (void) ep;
+
+  //	return tud_control_xfer(rhport, p_request, &tmp, 1);
+
+  return false; 	// Yet not implemented
+}
+
+// Invoked when audio class specific get request received for an interface
+bool tud_audio_get_req_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request)
+{
+  (void) rhport;
+
+  // Page 91 in UAC2 specification
+  uint8_t channelNum = TU_U16_LOW(p_request->wValue);
+  uint8_t ctrlSel = TU_U16_HIGH(p_request->wValue);
+  uint8_t itf = TU_U16_LOW(p_request->wIndex);
+
+  (void) channelNum; (void) ctrlSel; (void) itf;
+
+  return false; 	// Yet not implemented
+}
+
+// Invoked when audio class specific get request received for an entity
+bool tud_audio_get_req_entity_cb(uint8_t rhport, tusb_control_request_t const * p_request)
+{
+  (void) rhport;
+
+  // Page 91 in UAC2 specification
+  uint8_t channelNum = TU_U16_LOW(p_request->wValue);
+  uint8_t ctrlSel = TU_U16_HIGH(p_request->wValue);
+  // uint8_t itf = TU_U16_LOW(p_request->wIndex); 			// Since we have only one audio function implemented, we do not need the itf value
+  uint8_t entityID = TU_U16_HIGH(p_request->wIndex);
+
+  // Input terminal (Microphone input)
+  if (entityID == UAC2_ENTITY_INPUT_TERMINAL)
+  {
+    switch ( ctrlSel )
+    {
+      case AUDIO_TE_CTRL_CONNECTOR:
+      {
+        // The terminal connector control only has a get request with only the CUR attribute.
+        audio_desc_channel_cluster_t ret;
+
+        // Those are dummy values for now
+        ret.bNrChannels = 1;
+        ret.bmChannelConfig = 0;
+        ret.iChannelNames = 0;
+
+        TU_LOG2("    Get terminal connector\r\n");
+
+        return tud_audio_buffer_and_schedule_control_xfer(rhport, p_request, (void*) &ret, sizeof(ret));
+      }
+      break;
+
+        // Unknown/Unsupported control selector
+      default:
+        TU_BREAKPOINT();
+        return false;
+    }
+  }
+
+  // Feature unit
+  if (entityID == UAC2_ENTITY_FEATURE_UNIT)
+  {
+    switch ( ctrlSel )
+    {
+      case AUDIO_FU_CTRL_MUTE:
+        // Audio control mute cur parameter block consists of only one byte - we thus can send it right away
+        // There does not exist a range parameter block for mute
+        TU_LOG2("    Get Mute of channel: %u\r\n", channelNum);
+        return tud_control_xfer(rhport, p_request, &mute[channelNum], 1);
+
+      case AUDIO_FU_CTRL_VOLUME:
+        switch ( p_request->bRequest )
+        {
+          case AUDIO_CS_REQ_CUR:
+            TU_LOG2("    Get Volume of channel: %u\r\n", channelNum);
+            return tud_control_xfer(rhport, p_request, &volume[channelNum], sizeof(volume[channelNum]));
+
+          case AUDIO_CS_REQ_RANGE:
+            TU_LOG2("    Get Volume range of channel: %u\r\n", channelNum);
+
+            // Copy values - only for testing - better is version below
+            audio_control_range_2_n_t(1)
+            ret;
+
+            ret.wNumSubRanges = 1;
+            ret.subrange[0].bMin = -90;    // -90 dB
+            ret.subrange[0].bMax = 30;		// +30 dB
+            ret.subrange[0].bRes = 1; 		// 1 dB steps
+
+            return tud_audio_buffer_and_schedule_control_xfer(rhport, p_request, (void*) &ret, sizeof(ret));
+
+            // Unknown/Unsupported control
+          default:
+            TU_BREAKPOINT();
+            return false;
+        }
+      break;
+
+        // Unknown/Unsupported control
+      default:
+        TU_BREAKPOINT();
+        return false;
+    }
+  }
+
+  // Clock Source unit
+  if ( entityID == UAC2_ENTITY_CLOCK )
+  {
+    switch ( ctrlSel )
+    {
+      case AUDIO_CS_CTRL_SAM_FREQ:
+        // channelNum is always zero in this case
+        switch ( p_request->bRequest )
+        {
+          case AUDIO_CS_REQ_CUR:
+            TU_LOG2("    Get Sample Freq.\r\n");
+            return tud_control_xfer(rhport, p_request, &sampFreq, sizeof(sampFreq));
+
+          case AUDIO_CS_REQ_RANGE:
+          {
+            TU_LOG2("    Get Sample Freq. range\r\n");
+            audio_control_range_4_n_t(N_sampleRates) rangef =
+            {
+                .wNumSubRanges = tu_htole16(N_sampleRates)
+            };
+            TU_LOG1("Clock get %d freq ranges\r\n", N_sampleRates);
+            for(uint8_t i = 0; i < N_sampleRates; i++)
+            {
+                rangef.subrange[i].bMin = sampleRatesList[i];
+                rangef.subrange[i].bMax = sampleRatesList[i];
+                rangef.subrange[i].bRes = 0;
+                TU_LOG1("Range %d (%d, %d, %d)\r\n", i, (int)rangef.subrange[i].bMin, (int)rangef.subrange[i].bMax, (int)rangef.subrange[i].bRes);
+            }
+            return tud_audio_buffer_and_schedule_control_xfer(rhport, p_request, &rangef, sizeof(rangef));
+          }
+           // Unknown/Unsupported control
+          default:
+            TU_BREAKPOINT();
+            return false;
+        }
+      break;
+
+      case AUDIO_CS_CTRL_CLK_VALID:
+        // Only cur attribute exists for this request
+        TU_LOG2("    Get Sample Freq. valid\r\n");
+        return tud_control_xfer(rhport, p_request, &clkValid, sizeof(clkValid));
+
+      // Unknown/Unsupported control
+      default:
+        TU_BREAKPOINT();
+        return false;
+    }
+  }
+
+  TU_LOG2("  Unsupported entity: %d\r\n", entityID);
+  return false; 	// Yet not implemented
+}
+
+bool tud_audio_tx_done_pre_load_cb(uint8_t rhport, uint8_t itf, uint8_t ep_in, uint8_t cur_alt_setting)
+{
+  (void) rhport;
+  (void) itf;
+  (void) ep_in;
+  (void) cur_alt_setting;
+
+  tud_audio_write ((uint8_t *)test_buffer_audio, sampFreq / (TUD_OPT_HIGH_SPEED ? 8000 : 1000) * bytesPerSample);
+
+  return true;
+}
+
+bool tud_audio_tx_done_post_load_cb(uint8_t rhport, uint16_t n_bytes_copied, uint8_t itf, uint8_t ep_in, uint8_t cur_alt_setting)
+{
+  (void) rhport;
+  (void) n_bytes_copied;
+  (void) itf;
+  (void) ep_in;
+  (void) cur_alt_setting;
+
+  // 16bit
+  if(bytesPerSample == 2)
+  {
+    uint16_t* pData_16 = (uint16_t*)test_buffer_audio;
+    for (size_t cnt = 0; cnt < sampFreq / (TUD_OPT_HIGH_SPEED ? 8000 : 1000); cnt++)
+    {
+      pData_16[cnt] = startVal++;
+    }
+  }
+  // 24bit in 32bit slot
+  else if(bytesPerSample == 4)
+  {
+    uint32_t* pData_32 = (uint32_t*)test_buffer_audio;
+    for (size_t cnt = 0; cnt < sampFreq / (TUD_OPT_HIGH_SPEED ? 8000 : 1000); cnt++)
+    {
+      pData_32[cnt] = (uint32_t)startVal++ << 16U;
+    }
+  }
+  
+  return true;
+}
+
+bool tud_audio_set_itf_close_EP_cb(uint8_t rhport, tusb_control_request_t const * p_request)
+{
+  (void) rhport;
+  (void) p_request;
+  startVal = 0;
+
+  return true;
+}
+
+//--------------------------------------------------------------------+
+// BLINKING TASK
+//--------------------------------------------------------------------+
+void led_blinking_task(void)
+{
+  static uint32_t start_ms = 0;
+  static bool led_state = false;
+
+  // Blink every interval ms
+  if ( board_millis() - start_ms < blink_interval_ms) return; // not enough time
+  start_ms += blink_interval_ms;
+
+  board_led_write(led_state);
+  led_state = 1 - led_state; // toggle
+}
diff --git a/examples/device/audio_test_multi_rate/src/plot_audio_samples.py b/examples/device/audio_test_multi_rate/src/plot_audio_samples.py
new file mode 100644
index 000000000..4a5f15a9c
--- /dev/null
+++ b/examples/device/audio_test_multi_rate/src/plot_audio_samples.py
@@ -0,0 +1,38 @@
+import sounddevice as sd
+import matplotlib.pyplot as plt
+import numpy as np
+import platform
+import csv
+
+if __name__ == '__main__':
+
+    # If you got "ValueError: No input device matching", that is because your PC name example device
+    # differently from tested list below. Uncomment the next line to see full list and try to pick correct one
+    # print(sd.query_devices())
+
+    fs = 96000           # Sample rate
+    duration = 100e-3    # Duration of recording
+
+    if platform.system() == 'Windows':
+        # MME is needed since there are more than one MicNode device APIs (at least in Windows)
+        device = 'Microphone (MicNode) MME'
+    elif platform.system() == 'Darwin':
+        device = 'MicNode'
+    else:
+        device ='default'
+
+    myrecording = sd.rec(int(duration * fs), samplerate=fs, channels=1, dtype='int16', device=device)
+    print('Waiting...')
+    sd.wait()  # Wait until recording is finished
+    print('Done!')
+
+    time = np.arange(0, duration, 1 / fs)  # time vector
+    plt.plot(time, myrecording)
+    plt.xlabel('Time [s]')
+    plt.ylabel('Amplitude')
+    plt.title('MicNode')
+    plt.show()
+    
+    samples = np.array(myrecording)
+    np.savetxt('Output.csv', samples, delimiter=",", fmt='%s')
+    
\ No newline at end of file
diff --git a/examples/device/audio_test_multi_rate/src/tusb_config.h b/examples/device/audio_test_multi_rate/src/tusb_config.h
new file mode 100644
index 000000000..d8b6511d6
--- /dev/null
+++ b/examples/device/audio_test_multi_rate/src/tusb_config.h
@@ -0,0 +1,141 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#ifndef _TUSB_CONFIG_H_
+#define _TUSB_CONFIG_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "usb_descriptors.h"
+
+//--------------------------------------------------------------------+
+// Board Specific Configuration
+//--------------------------------------------------------------------+
+
+// RHPort number used for device can be defined by board.mk, default to port 0
+#ifndef BOARD_TUD_RHPORT
+#define BOARD_TUD_RHPORT      0
+#endif
+
+// RHPort max operational speed can defined by board.mk
+#ifndef BOARD_TUD_MAX_SPEED
+#define BOARD_TUD_MAX_SPEED   OPT_MODE_DEFAULT_SPEED
+#endif
+
+//--------------------------------------------------------------------
+// COMMON CONFIGURATION
+//--------------------------------------------------------------------
+
+// defined by compiler flags for flexibility
+#ifndef CFG_TUSB_MCU
+#error CFG_TUSB_MCU must be defined
+#endif
+
+#ifndef CFG_TUSB_OS
+#define CFG_TUSB_OS                 OPT_OS_NONE
+#endif
+
+#ifndef CFG_TUSB_DEBUG
+#define CFG_TUSB_DEBUG              0
+#endif
+
+// Enable Device stack
+#define CFG_TUD_ENABLED       1
+
+// Default is max speed that hardware controller could support with on-chip PHY
+#define CFG_TUD_MAX_SPEED     BOARD_TUD_MAX_SPEED
+
+// CFG_TUSB_DEBUG is defined by compiler in DEBUG build
+// #define CFG_TUSB_DEBUG           0
+
+/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
+ * Tinyusb use follows macros to declare transferring memory so that they can be put
+ * into those specific section.
+ * e.g
+ * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") ))
+ * - CFG_TUSB_MEM_ALIGN   : __attribute__ ((aligned(4)))
+ */
+#ifndef CFG_TUSB_MEM_SECTION
+#define CFG_TUSB_MEM_SECTION
+#endif
+
+#ifndef CFG_TUSB_MEM_ALIGN
+#define CFG_TUSB_MEM_ALIGN          __attribute__ ((aligned(4)))
+#endif
+
+//--------------------------------------------------------------------
+// DEVICE CONFIGURATION
+//--------------------------------------------------------------------
+
+#ifndef CFG_TUD_ENDPOINT0_SIZE
+#define CFG_TUD_ENDPOINT0_SIZE    64
+#endif
+
+//------------- CLASS -------------//
+#define CFG_TUD_AUDIO             1
+#define CFG_TUD_CDC               0
+#define CFG_TUD_MSC               0
+#define CFG_TUD_HID               0
+#define CFG_TUD_MIDI              0
+#define CFG_TUD_VENDOR            0
+
+//--------------------------------------------------------------------
+// AUDIO CLASS DRIVER CONFIGURATION
+//--------------------------------------------------------------------
+
+#define CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE                         96000
+
+// How many formats are used, need to adjust USB descriptor if changed
+#define CFG_TUD_AUDIO_FUNC_1_N_FORMATS                               2
+  
+// 16bit in 16bit slots
+#define CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX          2
+#define CFG_TUD_AUDIO_FUNC_1_FORMAT_1_RESOLUTION_RX                  16
+
+// 24bit in 32bit slots
+#define CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX          4
+#define CFG_TUD_AUDIO_FUNC_1_FORMAT_2_RESOLUTION_RX                  24
+
+// Have a look into audio_device.h for all configurations
+
+#define CFG_TUD_AUDIO_FUNC_1_DESC_LEN                                 TUD_AUDIO_MIC_ONE_CH_2_FORMAT_DESC_LEN
+#define CFG_TUD_AUDIO_FUNC_1_N_AS_INT                                 1                                       // Number of Standard AS Interface Descriptors (4.9.1) defined per audio function - this is required to be able to remember the current alternate settings of these interfaces - We restrict us here to have a constant number for all audio functions (which means this has to be the maximum number of AS interfaces an audio function has and a second audio function with less AS interfaces just wastes a few bytes)
+#define CFG_TUD_AUDIO_FUNC_1_CTRL_BUF_SZ                              64                                      // Size of control request buffer
+
+#define CFG_TUD_AUDIO_ENABLE_EP_IN                                    1
+#define CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX                            1                                       // Driver gets this info from the descriptors - we define it here to use it to setup the descriptors and to do calculations with it below - be aware: for different number of channels you need another descriptor!
+
+#define CFG_TUD_AUDIO_FUNC_1_FORMAT_1_EP_SZ_IN                        TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX)
+#define CFG_TUD_AUDIO_FUNC_1_FORMAT_2_EP_SZ_IN                        TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX)
+
+#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX                             TU_MAX(CFG_TUD_AUDIO_FUNC_1_FORMAT_1_EP_SZ_IN, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_EP_SZ_IN)                  // Maximum EP IN size for all AS alternate settings used
+#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ                          CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _TUSB_CONFIG_H_ */
diff --git a/examples/device/audio_test_multi_rate/src/usb_descriptors.c b/examples/device/audio_test_multi_rate/src/usb_descriptors.c
new file mode 100644
index 000000000..92e791a72
--- /dev/null
+++ b/examples/device/audio_test_multi_rate/src/usb_descriptors.c
@@ -0,0 +1,169 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ * Copyright (c) 2022 HiFiPhile
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#include "tusb.h"
+#include "usb_descriptors.h"
+
+/* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
+ * Same VID/PID with different interface e.g MSC (first), then CDC (later) will possibly cause system error on PC.
+ *
+ * Auto ProductID layout's Bitmap:
+ *   [MSB]     AUDIO | MIDI | HID | MSC | CDC          [LSB]
+ */
+#define _PID_MAP(itf, n)  ( (CFG_TUD_##itf) << (n) )
+#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
+    _PID_MAP(MIDI, 3) | _PID_MAP(AUDIO, 4) | _PID_MAP(VENDOR, 5) )
+
+//--------------------------------------------------------------------+
+// Device Descriptors
+//--------------------------------------------------------------------+
+tusb_desc_device_t const desc_device =
+{
+    .bLength            = sizeof(tusb_desc_device_t),
+    .bDescriptorType    = TUSB_DESC_DEVICE,
+    .bcdUSB             = 0x0200,
+
+    // Use Interface Association Descriptor (IAD) for CDC
+    // As required by USB Specs IAD's subclass must be common class (2) and protocol must be IAD (1)
+    .bDeviceClass       = TUSB_CLASS_MISC,
+    .bDeviceSubClass    = MISC_SUBCLASS_COMMON,
+    .bDeviceProtocol    = MISC_PROTOCOL_IAD,
+    .bMaxPacketSize0    = CFG_TUD_ENDPOINT0_SIZE,
+
+    .idVendor           = 0xCafe,
+    .idProduct          = USB_PID,
+    .bcdDevice          = 0x0100,
+
+    .iManufacturer      = 0x01,
+    .iProduct           = 0x02,
+    .iSerialNumber      = 0x03,
+
+    .bNumConfigurations = 0x01
+};
+
+// Invoked when received GET DEVICE DESCRIPTOR
+// Application return pointer to descriptor
+uint8_t const * tud_descriptor_device_cb(void)
+{
+  return (uint8_t const *) &desc_device;
+}
+
+//--------------------------------------------------------------------+
+// Configuration Descriptor
+//--------------------------------------------------------------------+
+enum
+{
+  ITF_NUM_AUDIO_CONTROL = 0,
+  ITF_NUM_AUDIO_STREAMING,
+  ITF_NUM_TOTAL
+};
+
+#define CONFIG_TOTAL_LEN    	(TUD_CONFIG_DESC_LEN + CFG_TUD_AUDIO * TUD_AUDIO_MIC_ONE_CH_2_FORMAT_DESC_LEN)
+
+#if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX
+  // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number
+  // 0 control, 1 In, 2 Bulk, 3 Iso, 4 In etc ...
+  #define EPNUM_AUDIO   0x03
+
+#elif TU_CHECK_MCU(OPT_MCU_NRF5X)
+  // nRF5x ISO can only be endpoint 8
+  #define EPNUM_AUDIO   0x08
+
+#else
+  #define EPNUM_AUDIO   0x01
+#endif
+
+uint8_t const desc_configuration[] =
+{
+    // Interface count, string index, total length, attribute, power in mA
+    TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
+
+    // Interface number, string index, EP Out & EP In address, EP size
+    TUD_AUDIO_MIC_ONE_CH_2_FORMAT_DESCRIPTOR(/*_itfnum*/ ITF_NUM_AUDIO_CONTROL, /*_stridx*/ 0, /*_epin*/ 0x80 | EPNUM_AUDIO)
+};
+
+TU_VERIFY_STATIC(sizeof(desc_configuration) == CONFIG_TOTAL_LEN, "Incorrect size");
+
+// Invoked when received GET CONFIGURATION DESCRIPTOR
+// Application return pointer to descriptor
+// Descriptor contents must exist long enough for transfer to complete
+uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
+{
+  (void) index; // for multiple configurations
+  return desc_configuration;
+}
+
+//--------------------------------------------------------------------+
+// String Descriptors
+//--------------------------------------------------------------------+
+
+// array of pointer to string descriptors
+char const* string_desc_arr [] =
+{
+    (const char[]) { 0x09, 0x04 }, 	// 0: is supported language is English (0x0409)
+    "PaniRCorp",                   	// 1: Manufacturer
+    "MicNode",              		// 2: Product
+    "123456",                      	// 3: Serials, should use chip ID
+    "UAC2",                 	 	// 4: Audio Interface
+};
+
+static uint16_t _desc_str[32];
+
+// Invoked when received GET STRING DESCRIPTOR request
+// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
+uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
+{
+  (void) langid;
+
+  uint8_t chr_count;
+
+  if ( index == 0)
+  {
+    memcpy(&_desc_str[1], string_desc_arr[0], 2);
+    chr_count = 1;
+  }else
+  {
+    // Convert ASCII string into UTF-16
+
+    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+
+    const char* str = string_desc_arr[index];
+
+    // Cap at max char
+    chr_count = (uint8_t) strlen(str);
+    if ( chr_count > 31 ) chr_count = 31;
+
+    for(uint8_t i=0; i<chr_count; i++)
+    {
+      _desc_str[1+i] = str[i];
+    }
+  }
+
+  // first byte is length (including header), second byte is string type
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+
+  return _desc_str;
+}
diff --git a/examples/device/audio_test_multi_rate/src/usb_descriptors.h b/examples/device/audio_test_multi_rate/src/usb_descriptors.h
new file mode 100644
index 000000000..77e2fe6c1
--- /dev/null
+++ b/examples/device/audio_test_multi_rate/src/usb_descriptors.h
@@ -0,0 +1,102 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2022 HiFiPhile
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#ifndef _USB_DESCRIPTORS_H_
+#define _USB_DESCRIPTORS_H_
+
+// #include "tusb.h"
+
+// Unit numbers are arbitrary selected
+#define UAC2_ENTITY_CLOCK                   0x04
+#define UAC2_ENTITY_INPUT_TERMINAL          0x01
+#define UAC2_ENTITY_OUTPUT_TERMINAL         0x03
+#define UAC2_ENTITY_FEATURE_UNIT            0x02
+
+
+#define TUD_AUDIO_MIC_ONE_CH_2_FORMAT_DESC_LEN (TUD_AUDIO_DESC_IAD_LEN\
+    + TUD_AUDIO_DESC_STD_AC_LEN\
+    + TUD_AUDIO_DESC_CS_AC_LEN\
+    + TUD_AUDIO_DESC_CLK_SRC_LEN\
+    + TUD_AUDIO_DESC_INPUT_TERM_LEN\
+    + TUD_AUDIO_DESC_OUTPUT_TERM_LEN\
+    + TUD_AUDIO_DESC_FEATURE_UNIT_ONE_CHANNEL_LEN\
+    /* Interface 1, Alternate 0 */\
+    + TUD_AUDIO_DESC_STD_AS_INT_LEN\
+    /* Interface 1, Alternate 1 */\
+    + TUD_AUDIO_DESC_STD_AS_INT_LEN\
+    + TUD_AUDIO_DESC_CS_AS_INT_LEN\
+    + TUD_AUDIO_DESC_TYPE_I_FORMAT_LEN\
+    + TUD_AUDIO_DESC_STD_AS_ISO_EP_LEN\
+    + TUD_AUDIO_DESC_CS_AS_ISO_EP_LEN\
+    /* Interface 1, Alternate 2 */\
+    + TUD_AUDIO_DESC_STD_AS_INT_LEN\
+    + TUD_AUDIO_DESC_CS_AS_INT_LEN\
+    + TUD_AUDIO_DESC_TYPE_I_FORMAT_LEN\
+    + TUD_AUDIO_DESC_STD_AS_ISO_EP_LEN\
+    + TUD_AUDIO_DESC_CS_AS_ISO_EP_LEN)
+
+
+#define TUD_AUDIO_MIC_ONE_CH_2_FORMAT_DESCRIPTOR(_itfnum, _stridx, _epin) \
+  /* Standard Interface Association Descriptor (IAD) */\
+  TUD_AUDIO_DESC_IAD(/*_firstitfs*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\
+  /* Standard AC Interface Descriptor(4.7.1) */\
+  TUD_AUDIO_DESC_STD_AC(/*_itfnum*/ _itfnum, /*_nEPs*/ 0x00, /*_stridx*/ _stridx),\
+  /* Class-Specific AC Interface Header Descriptor(4.7.2) */\
+  TUD_AUDIO_DESC_CS_AC(/*_bcdADC*/ 0x0200, /*_category*/ AUDIO_FUNC_MICROPHONE, /*_totallen*/ TUD_AUDIO_DESC_CLK_SRC_LEN+TUD_AUDIO_DESC_INPUT_TERM_LEN+TUD_AUDIO_DESC_OUTPUT_TERM_LEN+TUD_AUDIO_DESC_FEATURE_UNIT_ONE_CHANNEL_LEN, /*_ctrl*/ AUDIO_CS_AS_INTERFACE_CTRL_LATENCY_POS),\
+  /* Clock Source Descriptor(4.7.2.1) */\
+  TUD_AUDIO_DESC_CLK_SRC(/*_clkid*/ UAC2_ENTITY_CLOCK, /*_attr*/ AUDIO_CLOCK_SOURCE_ATT_INT_PRO_CLK, /*_ctrl*/ AUDIO_CTRL_RW << AUDIO_CLOCK_SOURCE_CTRL_CLK_FRQ_POS | AUDIO_CTRL_R << AUDIO_CLOCK_SOURCE_CTRL_CLK_VAL_POS, /*_assocTerm*/ 0x01,  /*_stridx*/ 0x00),\
+  /* Input Terminal Descriptor(4.7.2.4) */\
+  TUD_AUDIO_DESC_INPUT_TERM(/*_termid*/ UAC2_ENTITY_INPUT_TERMINAL, /*_termtype*/ AUDIO_TERM_TYPE_IN_GENERIC_MIC, /*_assocTerm*/ UAC2_ENTITY_OUTPUT_TERMINAL, /*_clkid*/ UAC2_ENTITY_CLOCK, /*_nchannelslogical*/ 0x01, /*_channelcfg*/ AUDIO_CHANNEL_CONFIG_NON_PREDEFINED, /*_idxchannelnames*/ 0x00, /*_ctrl*/ AUDIO_CTRL_R << AUDIO_IN_TERM_CTRL_CONNECTOR_POS, /*_stridx*/ 0x00),\
+  /* Output Terminal Descriptor(4.7.2.5) */\
+  TUD_AUDIO_DESC_OUTPUT_TERM(/*_termid*/ UAC2_ENTITY_OUTPUT_TERMINAL, /*_termtype*/ AUDIO_TERM_TYPE_USB_STREAMING, /*_assocTerm*/ UAC2_ENTITY_INPUT_TERMINAL, /*_srcid*/ UAC2_ENTITY_FEATURE_UNIT, /*_clkid*/ UAC2_ENTITY_CLOCK, /*_ctrl*/ 0x0000, /*_stridx*/ 0x00),\
+  /* Feature Unit Descriptor(4.7.2.8) */\
+  TUD_AUDIO_DESC_FEATURE_UNIT_ONE_CHANNEL(/*_unitid*/ UAC2_ENTITY_FEATURE_UNIT, /*_srcid*/ 0x01, /*_ctrlch0master*/ AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS, /*_ctrlch1*/ AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS, /*_stridx*/ 0x00),\
+  /* Standard AS Interface Descriptor(4.9.1) */\
+  /* Interface 1, Alternate 0 - default alternate setting with 0 bandwidth */\
+  TUD_AUDIO_DESC_STD_AS_INT(/*_itfnum*/ (uint8_t)((_itfnum)+1), /*_altset*/ 0x00, /*_nEPs*/ 0x00, /*_stridx*/ 0x00),\
+  /* Standard AS Interface Descriptor(4.9.1) */\
+  /* Interface 1, Alternate 1 - alternate interface for data streaming */\
+  TUD_AUDIO_DESC_STD_AS_INT(/*_itfnum*/ (uint8_t)((_itfnum)+1), /*_altset*/ 0x01, /*_nEPs*/ 0x01, /*_stridx*/ 0x00),\
+  /* Class-Specific AS Interface Descriptor(4.9.2) */\
+  TUD_AUDIO_DESC_CS_AS_INT(/*_termid*/ UAC2_ENTITY_OUTPUT_TERMINAL, /*_ctrl*/ AUDIO_CTRL_NONE, /*_formattype*/ AUDIO_FORMAT_TYPE_I, /*_formats*/ AUDIO_DATA_FORMAT_TYPE_I_PCM, /*_nchannelsphysical*/ 0x01, /*_channelcfg*/ AUDIO_CHANNEL_CONFIG_NON_PREDEFINED, /*_stridx*/ 0x00),\
+  /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
+  TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_RESOLUTION_RX),\
+  /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
+  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ CFG_TUD_AUDIO_FUNC_1_FORMAT_1_EP_SZ_IN, /*_interval*/ 0x01),\
+  /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
+  TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000),\
+  /* Interface 1, Alternate 2 - alternate interface for data streaming */\
+  TUD_AUDIO_DESC_STD_AS_INT(/*_itfnum*/ (uint8_t)((_itfnum)+1), /*_altset*/ 0x02, /*_nEPs*/ 0x01, /*_stridx*/ 0x00),\
+  /* Class-Specific AS Interface Descriptor(4.9.2) */\
+  TUD_AUDIO_DESC_CS_AS_INT(/*_termid*/ UAC2_ENTITY_OUTPUT_TERMINAL, /*_ctrl*/ AUDIO_CTRL_NONE, /*_formattype*/ AUDIO_FORMAT_TYPE_I, /*_formats*/ AUDIO_DATA_FORMAT_TYPE_I_PCM, /*_nchannelsphysical*/ 0x01, /*_channelcfg*/ AUDIO_CHANNEL_CONFIG_NON_PREDEFINED, /*_stridx*/ 0x00),\
+  /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
+  TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_RESOLUTION_RX),\
+  /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
+  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ CFG_TUD_AUDIO_FUNC_1_FORMAT_2_EP_SZ_IN, /*_interval*/ 0x01),\
+  /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
+  TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000)
+
+
+#endif
\ No newline at end of file

From fc32280f42e03ef78e8d43bb9e8382ad4c9b19c0 Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Fri, 30 Dec 2022 15:10:00 +0100
Subject: [PATCH 052/691] Fix buffer allocation overflow.

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index a428d546d..702b32f9c 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -167,8 +167,8 @@ typedef struct
   uint16_t total_len;
   uint16_t queued_len;
   uint16_t pma_ptr;
-  uint8_t max_packet_size;
-  uint8_t pma_alloc_size;
+  uint16_t max_packet_size;
+  uint16_t pma_alloc_size;
   uint8_t epnum;
 } xfer_ctl_t;
 

From 35fa6b660a09ea1b56cfd02e32dbd0e8dd6374fc Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Fri, 30 Dec 2022 15:18:31 +0100
Subject: [PATCH 053/691] Fix CI.

---
 examples/device/audio_test_multi_rate/src/main.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/examples/device/audio_test_multi_rate/src/main.c b/examples/device/audio_test_multi_rate/src/main.c
index e4d2d0253..0e11a509b 100644
--- a/examples/device/audio_test_multi_rate/src/main.c
+++ b/examples/device/audio_test_multi_rate/src/main.c
@@ -266,7 +266,7 @@ bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const *
       case AUDIO_CS_CTRL_SAM_FREQ:
         TU_VERIFY(p_request->wLength == sizeof(audio_control_cur_4_t));
 
-        sampFreq = ((audio_control_cur_4_t *)pBuff)->bCur;
+        sampFreq = (uint32_t)((audio_control_cur_4_t *)pBuff)->bCur;
 
         TU_LOG2("Clock set current freq: %d\r\n", sampFreq);
 
@@ -423,8 +423,8 @@ bool tud_audio_get_req_entity_cb(uint8_t rhport, tusb_control_request_t const *
             TU_LOG1("Clock get %d freq ranges\r\n", N_sampleRates);
             for(uint8_t i = 0; i < N_sampleRates; i++)
             {
-                rangef.subrange[i].bMin = sampleRatesList[i];
-                rangef.subrange[i].bMax = sampleRatesList[i];
+                rangef.subrange[i].bMin = (int32_t)sampleRatesList[i];
+                rangef.subrange[i].bMax = (int32_t)sampleRatesList[i];
                 rangef.subrange[i].bRes = 0;
                 TU_LOG1("Range %d (%d, %d, %d)\r\n", i, (int)rangef.subrange[i].bMin, (int)rangef.subrange[i].bMax, (int)rangef.subrange[i].bRes);
             }
@@ -460,7 +460,7 @@ bool tud_audio_tx_done_pre_load_cb(uint8_t rhport, uint8_t itf, uint8_t ep_in, u
   (void) ep_in;
   (void) cur_alt_setting;
 
-  tud_audio_write ((uint8_t *)test_buffer_audio, sampFreq / (TUD_OPT_HIGH_SPEED ? 8000 : 1000) * bytesPerSample);
+  tud_audio_write((uint8_t *)test_buffer_audio, (uint16_t)(sampFreq / (TUD_OPT_HIGH_SPEED ? 8000 : 1000) * bytesPerSample));
 
   return true;
 }
@@ -476,7 +476,7 @@ bool tud_audio_tx_done_post_load_cb(uint8_t rhport, uint16_t n_bytes_copied, uin
   // 16bit
   if(bytesPerSample == 2)
   {
-    uint16_t* pData_16 = (uint16_t*)test_buffer_audio;
+    uint16_t* pData_16 = (uint16_t*)((void*)test_buffer_audio);
     for (size_t cnt = 0; cnt < sampFreq / (TUD_OPT_HIGH_SPEED ? 8000 : 1000); cnt++)
     {
       pData_16[cnt] = startVal++;
@@ -485,7 +485,7 @@ bool tud_audio_tx_done_post_load_cb(uint8_t rhport, uint16_t n_bytes_copied, uin
   // 24bit in 32bit slot
   else if(bytesPerSample == 4)
   {
-    uint32_t* pData_32 = (uint32_t*)test_buffer_audio;
+    uint32_t* pData_32 = (uint32_t*)((void*)test_buffer_audio);
     for (size_t cnt = 0; cnt < sampFreq / (TUD_OPT_HIGH_SPEED ? 8000 : 1000); cnt++)
     {
       pData_32[cnt] = (uint32_t)startVal++ << 16U;

From 51bb27a131ca57f8f7c7c971024f90e77b81d11a Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Sat, 31 Dec 2022 13:37:22 +0100
Subject: [PATCH 054/691] Optimize descriptor looping.

---
 src/class/audio/audio_device.c | 50 ++++++++++++++--------------------
 1 file changed, 20 insertions(+), 30 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index a8a2439bc..31c4783eb 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -106,13 +106,28 @@
 #define  USE_LINEAR_BUFFER     1
 #endif
 
+#if defined(STM32F102x6) || defined(STM32F102xB) || \
+    defined(STM32F103x6) || defined(STM32F103xB) || \
+    defined(STM32F103xE) || defined(STM32F103xG)
+#define STM32F1_FSDEV
+#endif
+
+#if defined(STM32L412xx) || defined(STM32L422xx) || \
+    defined(STM32L432xx) || defined(STM32L433xx) || \
+    defined(STM32L442xx) || defined(STM32L443xx) || \
+    defined(STM32L452xx) || defined(STM32L462xx)
+#define STM32L4_FSDEV
+#endif
+
 // Temporarily put the check here for stm32_fsdev
 #if CFG_TUSB_MCU == OPT_MCU_STM32F0                               || \
     CFG_TUSB_MCU == OPT_MCU_STM32F3                               || \
     CFG_TUSB_MCU == OPT_MCU_STM32L0                               || \
     CFG_TUSB_MCU == OPT_MCU_STM32L1                               || \
     CFG_TUSB_MCU == OPT_MCU_STM32G4                               || \
-    CFG_TUSB_MCU == OPT_MCU_STM32WB
+    CFG_TUSB_MCU == OPT_MCU_STM32WB                               || \
+    (TU_CHECK_MCU(OPT_MCU_STM32F1) && defined(STM32F1_FSDEV))     || \
+    (TU_CHECK_MCU(OPT_MCU_STM32L4) && defined(STM32L4_FSDEV))
 #define  USE_ISO_EP_ALLOCATION   1
 #else
 #define  USE_ISO_EP_ALLOCATION   0
@@ -1481,18 +1496,17 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
 
 #if USE_ISO_EP_ALLOCATION
 #if CFG_TUD_AUDIO_ENABLE_EP_IN
-      uint8_t ep_in = 0;
+      uint8_t  ep_in = 0;
       uint16_t ep_in_size = 0;
 #endif
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT
-      uint8_t ep_out = 0;
+      uint8_t  ep_out = 0;
       uint16_t ep_out_size = 0;
 #endif
 #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
       uint8_t ep_fb = 0;
 #endif
 
-      // First find EP addr
       uint8_t const *p_desc = _audiod_fct[i].p_desc;
       uint8_t const *p_desc_end = p_desc + _audiod_fct[i].desc_length - TUD_AUDIO_DESC_IAD_LEN;
       while (p_desc < p_desc_end)
@@ -1516,11 +1530,13 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
               {
 #if CFG_TUD_AUDIO_ENABLE_EP_IN
                 ep_in = desc_ep->bEndpointAddress;
+                ep_in_size = TU_MAX(tu_edpt_packet_size(desc_ep), ep_in_size);
 #endif
               } else
               {
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT
                 ep_out = desc_ep->bEndpointAddress;
+                ep_out_size = TU_MAX(tu_edpt_packet_size(desc_ep), ep_out_size);
 #endif
               }
             }
@@ -1530,32 +1546,6 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
         p_desc = tu_desc_next(p_desc);
       }
 
-      // Then find EP max size
-      p_desc = _audiod_fct[i].p_desc;
-      while (p_desc < p_desc_end)
-      {
-        if (tu_desc_type(p_desc) == TUSB_DESC_ENDPOINT)
-        {
-          tusb_desc_endpoint_t const *desc_ep = (tusb_desc_endpoint_t const *) p_desc;
-          if (desc_ep->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS)
-          {
-#if CFG_TUD_AUDIO_ENABLE_EP_IN
-            if (desc_ep->bEndpointAddress == ep_in)
-            {
-              ep_in_size = TU_MAX(tu_edpt_packet_size(desc_ep), ep_in_size);
-            }
-#endif
-#if CFG_TUD_AUDIO_ENABLE_EP_OUT
-            if (desc_ep->bEndpointAddress == ep_out)
-            {
-              ep_out_size = TU_MAX(tu_edpt_packet_size(desc_ep), ep_out_size);
-            }
-#endif
-          }
-        }
-        p_desc = tu_desc_next(p_desc);
-      }
-
 #if CFG_TUD_AUDIO_ENABLE_EP_IN
       if (ep_in)
       {

From 7228239eb94f16281fe98ca3a612ba89995f7b47 Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Mon, 2 Jan 2023 09:43:48 +0100
Subject: [PATCH 055/691] Clean up.

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h | 9 ---------
 1 file changed, 9 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index 382374614..ded13ae14 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -119,15 +119,6 @@
 // Volatile is also needed to prevent the optimizer from changing access to 32-bit (as 32-bit access is forbidden)
 static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
 
-// This array maps the endpoint address to a endpoint register in hardware
-// By default the tinyusb stack chooses the endpoint register using the endpoint number
-// However when using ISOCHRONOUS endpoints, the entire endpoint register (RX _and_ TX)
-// are used for a double buffer in a single direction. If you now want to use the same endpoint number with
-// different directions (e.g. 0x02 and 0x82), they would be mapped to the same register
-// In this case, this serves as a crude helper to overcome this limitation by implementing
-// this callback and defining a custom mapping in your application
-TU_ATTR_WEAK uint8_t tu_stm32_edpt_number_cb(uint8_t addr);
-
 // This callback is called on SOF and can be used to e.g. capture a timer value for timing purposes
 TU_ATTR_WEAK void tu_stm32_sof_cb(void);
 

From 69475cd1bf6c4937bd2bc6570f611a700022cdac Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Mon, 2 Jan 2023 12:06:26 +0100
Subject: [PATCH 056/691] Remove tu_stm32_sof_cb

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c        | 1 -
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h | 3 ---
 2 files changed, 4 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 702b32f9c..648e8f8d0 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -649,7 +649,6 @@ void dcd_int_handler(uint8_t rhport) {
   /* Put SOF flag at the beginning of ISR in case to get least amount of jitter if it is used for timing purposes */
   if(int_status & USB_ISTR_SOF) {
     clear_istr_bits(USB_ISTR_SOF);
-    if (tu_stm32_sof_cb) tu_stm32_sof_cb();
     dcd_event_sof(0, USB->FNR & USB_FNR_FN, true);
   }
 
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index ded13ae14..98cf008d4 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -119,9 +119,6 @@
 // Volatile is also needed to prevent the optimizer from changing access to 32-bit (as 32-bit access is forbidden)
 static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
 
-// This callback is called on SOF and can be used to e.g. capture a timer value for timing purposes
-TU_ATTR_WEAK void tu_stm32_sof_cb(void);
-
 // prototypes
 TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum);
 TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum);

From d6b612257ed1026cccd18c620d3d6cb51d5b2cb2 Mon Sep 17 00:00:00 2001
From: Simon Kueppers <simon.kueppers@skueppers.de>
Date: Thu, 5 Jan 2023 14:39:23 +0100
Subject: [PATCH 057/691] Fixed bug where with some devices, the TU_ASSERT
 inserted with this commit gets triggered for ISOCHRONOUS endpoints. It is
 necessary for those endpoints to set the NUM_BLOCK and BLSIZE for the
 receiving buffer in both, USB_COUNTn_TX and USB_COUNTn_RX. Despite the
 datasheet showing those fields only for the USB_COUNTn_RX register

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c     | 15 ++++++++++++---
 .../st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h       |  9 +++++++++
 2 files changed, 21 insertions(+), 3 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 648e8f8d0..fdcb2c48d 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -562,6 +562,8 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
       count = pcd_get_ep_rx_cnt(USB, EPindex);
     }
 
+    TU_ASSERT(count <= xfer->max_packet_size, /**/);
+
     // Clear RX CTR interrupt flag
     if(ep_addr != 0u)
     {
@@ -599,7 +601,12 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
       } else {
         pcd_set_ep_rx_bufsize(USB, EPindex,remaining);
       }
-      pcd_set_ep_rx_status(USB, EPindex, USB_EP_RX_VALID);
+
+      if (!((wEPRegVal & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS)) {
+        /* Set endpoint active again for receiving more data.
+         * Note that isochronous endpoints stay active always */
+        pcd_set_ep_rx_status(USB, EPindex, USB_EP_RX_VALID);
+      }
     }
   }
 
@@ -881,7 +888,8 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
   (void)rhport;
   uint8_t const epnum = dcd_ep_alloc(p_endpoint_desc->bEndpointAddress, p_endpoint_desc->bmAttributes.xfer);
   uint8_t const dir   = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
-  const uint16_t buffer_size = pcd_aligned_buffer_size(tu_edpt_packet_size(p_endpoint_desc));
+  const uint16_t packet_size = tu_edpt_packet_size(p_endpoint_desc);
+  const uint16_t buffer_size = pcd_aligned_buffer_size(packet_size);
   uint16_t pma_addr;
   uint32_t wType;
 
@@ -921,6 +929,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
   if( (dir == TUSB_DIR_IN) || (wType == USB_EP_ISOCHRONOUS) )
   {
     *pcd_ep_tx_address_ptr(USB, epnum) = pma_addr;
+    pcd_set_ep_tx_bufsize(USB, epnum, buffer_size);
     pcd_clear_tx_dtog(USB, epnum);
   }
 
@@ -948,7 +957,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
     }
   }
 
-  xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->max_packet_size = buffer_size;
+  xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->max_packet_size = packet_size;
   xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->epnum = epnum;
 
   return true;
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index 98cf008d4..f4966907a 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -281,6 +281,13 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_cnt(USB_TypeDef * USBx,
   *reg = (uint16_t) (*reg & (uint16_t) ~0x3FFU) | (wCount & 0x3FFU);
 }
 
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_bufsize(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wCount)
+{
+  __IO uint16_t *pdwReg = pcd_ep_tx_cnt_ptr((USBx),(bEpNum));
+  wCount = pcd_aligned_buffer_size(wCount);
+  pcd_set_ep_cnt_reg(pdwReg, wCount);
+}
+
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_bufsize(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wCount)
 {
   __IO uint16_t *pdwReg = pcd_ep_rx_cnt_ptr((USBx),(bEpNum));
@@ -310,6 +317,7 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_status(USB_TypeDef * USBx
   {
     regVal ^= USB_EPTX_DTOG2;
   }
+
   regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
   pcd_set_endpoint(USBx, bEpNum, regVal);
 } /* pcd_set_ep_tx_status */
@@ -337,6 +345,7 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_status(USB_TypeDef * USBx
   {
     regVal ^= USB_EPRX_DTOG2;
   }
+
   regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
   pcd_set_endpoint(USBx, bEpNum, regVal);
 } /* pcd_set_ep_rx_status */

From 8db462bf6e2cd6d244ab9b3a69471ad085478bf6 Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Thu, 5 Jan 2023 16:54:42 +0100
Subject: [PATCH 058/691] Add fix to dcd_edpt_iso_activate()

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index fdcb2c48d..c9b244c8c 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -1026,7 +1026,8 @@ bool dcd_edpt_iso_activate(uint8_t rhport,  tusb_desc_endpoint_t const * p_endpo
   (void)rhport;
   uint8_t const epnum = xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->epnum;
   uint8_t const dir   = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
-  const uint16_t packet_size = pcd_aligned_buffer_size(tu_edpt_packet_size(p_endpoint_desc));
+  const uint16_t packet_size = tu_edpt_packet_size(p_endpoint_desc);
+  const uint16_t buffer_size = pcd_aligned_buffer_size(packet_size);
 
   /* Disable endpoint */
   if(dir == TUSB_DIR_IN)
@@ -1043,9 +1044,9 @@ bool dcd_edpt_iso_activate(uint8_t rhport,  tusb_desc_endpoint_t const * p_endpo
   // or being double-buffered (bulk endpoints)
   pcd_clear_ep_kind(USB,0);
 
+  pcd_set_ep_tx_bufsize(USB, epnum, buffer_size);
+  pcd_set_ep_rx_bufsize(USB, epnum, buffer_size);
   pcd_clear_tx_dtog(USB, epnum);
-
-  pcd_set_ep_rx_bufsize(USB, epnum, packet_size);
   pcd_clear_rx_dtog(USB, epnum);
 
   xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->max_packet_size = packet_size;

From 546dd6038c57e1a1db2a6711e64bddd869f5667a Mon Sep 17 00:00:00 2001
From: Malik Enes Safak <e.maliksafak@gmail.com>
Date: Fri, 13 Jan 2023 18:28:10 +0300
Subject: [PATCH 059/691] examples/uac2: Fix mute and volume array lengths

---
 examples/device/uac2_headset/src/main.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/examples/device/uac2_headset/src/main.c b/examples/device/uac2_headset/src/main.c
index 003dc2a74..01707d51b 100644
--- a/examples/device/uac2_headset/src/main.c
+++ b/examples/device/uac2_headset/src/main.c
@@ -79,8 +79,8 @@ static uint32_t blink_interval_ms = BLINK_NOT_MOUNTED;
 
 // Audio controls
 // Current states
-int8_t mute[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX + 1];       // +1 for master channel 0
-int16_t volume[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX + 1];    // +1 for master channel 0
+int8_t mute[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX + 1];       // +1 for master channel 0
+int16_t volume[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX + 1];    // +1 for master channel 0
 
 // Buffer for microphone data
 int32_t mic_buf[CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ / 4];

From 2e47210c1af88b88b6f2d92fe2b6d08117041363 Mon Sep 17 00:00:00 2001
From: Nathaniel Brough <nathaniel.brough@gmail.com>
Date: Fri, 13 Jan 2023 13:37:55 -0800
Subject: [PATCH 060/691] fix: Replace device calls to memcpy with tu_memcpy_s

Introduces a new function tu_memcpy_s, which is effectively
a backport of memcpy_s. The change also refactors calls
to memcpy over to the more secure tu_memcpy_s.
---
 src/class/audio/audio_device.c |  7 ++-----
 src/class/dfu/dfu_rt_device.c  |  2 +-
 src/class/hid/hid_device.c     | 18 +++++++-----------
 src/class/midi/midi_device.c   |  2 +-
 src/class/msc/msc_device.c     | 10 +++++-----
 src/common/tusb_common.h       |  8 ++++++++
 src/device/dcd.h               |  2 +-
 src/device/usbd_control.c      |  4 +++-
 src/tusb.c                     | 23 ++++++++++++++++++++++-
 9 files changed, 50 insertions(+), 26 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 698fba566..81df95139 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -823,10 +823,7 @@ uint16_t tud_audio_int_ctr_n_write(uint8_t func_id, uint8_t const* buffer, uint1
   // We write directly into the EP's buffer - abort if previous transfer not complete
   TU_VERIFY(!usbd_edpt_busy(_audiod_fct[func_id].rhport, _audiod_fct[func_id].ep_int_ctr));
 
-  // Check length
-  TU_VERIFY(len <= CFG_TUD_AUDIO_INT_CTR_EP_IN_SW_BUFFER_SIZE);
-
-  memcpy(_audiod_fct[func_id].ep_int_ctr_buf, buffer, len);
+  TU_VERIFY(tu_memcpy_s(_audiod_fct[func_id].ep_int_ctr_buf, CFG_TUD_AUDIO_INT_CTR_EP_IN_SW_BUFFER_SIZE,  buffer, len)==0);
 
   // Schedule transmit
   TU_VERIFY(usbd_edpt_xfer(_audiod_fct[func_id].rhport, _audiod_fct[func_id].ep_int_ctr, _audiod_fct[func_id].ep_int_ctr_buf, len));
@@ -2202,7 +2199,7 @@ bool tud_audio_buffer_and_schedule_control_xfer(uint8_t rhport, tusb_control_req
   if (len > _audiod_fct[func_id].ctrl_buf_sz) len = _audiod_fct[func_id].ctrl_buf_sz;
 
   // Copy into buffer
-  memcpy((void *)_audiod_fct[func_id].ctrl_buf, data, (size_t)len);
+  TU_VERIFY(tu_memcpy_s(_audiod_fct[func_id].ctrl_buf, sizeof(_audiod_fct[func_id].ctrl_buf), data, (size_t)len)==0);
 
   // Schedule transmit
   return tud_control_xfer(rhport, p_request, (void*)_audiod_fct[func_id].ctrl_buf, len);
diff --git a/src/class/dfu/dfu_rt_device.c b/src/class/dfu/dfu_rt_device.c
index b9cd6096b..7b77b3f8f 100644
--- a/src/class/dfu/dfu_rt_device.c
+++ b/src/class/dfu/dfu_rt_device.c
@@ -110,7 +110,7 @@ bool dfu_rtd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request
       TU_LOG2("  DFU RT Request: GETSTATUS\r\n");
       dfu_status_response_t resp;
       // Status = OK, Poll timeout is ignored during RT, State = APP_IDLE, IString = 0
-      memset(&resp, 0x00, sizeof(dfu_status_response_t));
+      TU_VERIFY(tu_memset_s(&resp, sizeof(resp), 0x00, sizeof(resp))==0);
       tud_control_xfer(rhport, request, &resp, sizeof(dfu_status_response_t));
     }
     break;
diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c
index 8077e4deb..40654eef9 100644
--- a/src/class/hid/hid_device.c
+++ b/src/class/hid/hid_device.c
@@ -92,16 +92,12 @@ bool tud_hid_n_report(uint8_t instance, uint8_t report_id, void const* report, u
   // prepare data
   if (report_id)
   {
-    len = tu_min16(len, CFG_TUD_HID_EP_BUFSIZE-1);
-
     p_hid->epin_buf[0] = report_id;
-    memcpy(p_hid->epin_buf+1, report, len);
+    TU_VERIFY(tu_memcpy_s(p_hid->epin_buf+1, CFG_TUD_HID_EP_BUFSIZE-1, report, len)==0);
     len++;
   }else
   {
-    // If report id = 0, skip ID field
-    len = tu_min16(len, CFG_TUD_HID_EP_BUFSIZE);
-    memcpy(p_hid->epin_buf, report, len);
+    TU_VERIFY(tu_memcpy_s(p_hid->epin_buf, CFG_TUD_HID_EP_BUFSIZE, report, len)==0);
   }
 
   return usbd_edpt_xfer(rhport, p_hid->ep_in, p_hid->epin_buf, len);
@@ -126,7 +122,7 @@ bool tud_hid_n_keyboard_report(uint8_t instance, uint8_t report_id, uint8_t modi
 
   if ( keycode )
   {
-    memcpy(report.keycode, keycode, 6);
+    TU_VERIFY(tu_memcpy_s(report.keycode, sizeof(report.keycode), keycode, sizeof(report.keycode))==0);
   }else
   {
     tu_memclr(report.keycode, 6);
@@ -151,8 +147,7 @@ bool tud_hid_n_mouse_report(uint8_t instance, uint8_t report_id,
 }
 
 bool tud_hid_n_gamepad_report(uint8_t instance, uint8_t report_id,
-                              int8_t x, int8_t y, int8_t z, int8_t rz, int8_t rx, int8_t ry, uint8_t hat, uint32_t buttons)
-{
+                              int8_t x, int8_t y, int8_t z, int8_t rz, int8_t rx, int8_t ry, uint8_t hat, uint32_t buttons) {
   hid_gamepad_report_t report =
   {
     .x       = x,
@@ -183,11 +178,12 @@ void hidd_reset(uint8_t rhport)
 }
 
 uint16_t hidd_open(uint8_t rhport, tusb_desc_interface_t const * desc_itf, uint16_t max_len)
-{
+ {
   TU_VERIFY(TUSB_CLASS_HID == desc_itf->bInterfaceClass, 0);
 
   // len = interface + hid + n*endpoints
-  uint16_t const drv_len = (uint16_t) (sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) +
+  uint16_t const drv_len =
+      (uint16_t) (sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) +
                                        desc_itf->bNumEndpoints * sizeof(tusb_desc_endpoint_t));
   TU_ASSERT(max_len >= drv_len, 0);
 
diff --git a/src/class/midi/midi_device.c b/src/class/midi/midi_device.c
index de41706e8..0b52be181 100644
--- a/src/class/midi/midi_device.c
+++ b/src/class/midi/midi_device.c
@@ -182,7 +182,7 @@ uint32_t tud_midi_n_stream_read(uint8_t itf, uint8_t cable_num, void* buffer, ui
     uint8_t const count = (uint8_t) tu_min32(stream->total - stream->index, bufsize);
 
     // Skip the header (1st byte) in the buffer
-    memcpy(buf8, stream->buffer + 1 + stream->index, count);
+    TU_VERIFY(tu_memcpy_s(buf8, bufsize, stream->buffer + 1 + stream->index, count)==0);
 
     total_read += count;
     stream->index += count;
diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c
index 00b0a1d06..ed4a3e86c 100644
--- a/src/class/msc/msc_device.c
+++ b/src/class/msc/msc_device.c
@@ -707,7 +707,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
         read_capa10.block_size = tu_htonl(block_size);
 
         resplen = sizeof(read_capa10);
-        memcpy(buffer, &read_capa10, (size_t) resplen);
+        TU_VERIFY(tu_memcpy_s(buffer, bufsize, &read_capa10, (size_t) resplen));
       }
     }
     break;
@@ -741,7 +741,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
         read_fmt_capa.block_size_u16 = tu_htons(block_size);
 
         resplen = sizeof(read_fmt_capa);
-        memcpy(buffer, &read_fmt_capa, (size_t) resplen);
+        TU_VERIFY(tu_memcpy_s(buffer, bufsize, &read_fmt_capa, (size_t) resplen)==0);
       }
     }
     break;
@@ -764,7 +764,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
       tud_msc_inquiry_cb(lun, inquiry_rsp.vendor_id, inquiry_rsp.product_id, inquiry_rsp.product_rev);
 
       resplen = sizeof(inquiry_rsp);
-      memcpy(buffer, &inquiry_rsp, (size_t) resplen);
+      TU_VERIFY(tu_memcpy_s(buffer, bufsize, &inquiry_rsp, (size_t) resplen)==0);
     }
     break;
 
@@ -788,7 +788,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
       mode_resp.write_protected = !writable;
 
       resplen = sizeof(mode_resp);
-      memcpy(buffer, &mode_resp, (size_t) resplen);
+      TU_VERIFY(tu_memcpy_s(buffer, bufsize, &mode_resp, (size_t) resplen)==0);
     }
     break;
 
@@ -806,7 +806,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
       sense_rsp.add_sense_qualifier = p_msc->add_sense_qualifier;
 
       resplen = sizeof(sense_rsp);
-      memcpy(buffer, &sense_rsp, (size_t) resplen);
+      TU_VERIFY(tu_memcpy_s(buffer, bufsize, &sense_rsp, (size_t) resplen)==0);
 
       // request sense callback could overwrite the sense data
       if (tud_msc_request_sense_cb)
diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index b1ee40a1a..78fdcfe36 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -83,6 +83,14 @@
 #define tu_memclr(buffer, size)  memset((buffer), 0, (size))
 #define tu_varclr(_var)          tu_memclr(_var, sizeof(*(_var)))
 
+// This is a backport of memset_s from c11
+int32_t tu_memset_s(void *dest, size_t destsz, int ch, size_t count); 
+
+// This is a backport of memcpy_s from c11
+int32_t tu_memcpy_s(void *dest, size_t destsz,
+                  const void * src, size_t count );
+
+
 //------------- Bytes -------------//
 TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_u32(uint8_t b3, uint8_t b2, uint8_t b1, uint8_t b0)
 {
diff --git a/src/device/dcd.h b/src/device/dcd.h
index c1780f656..3a7e6c5df 100644
--- a/src/device/dcd.h
+++ b/src/device/dcd.h
@@ -193,7 +193,7 @@ TU_ATTR_ALWAYS_INLINE static inline  void dcd_event_bus_reset (uint8_t rhport, t
 TU_ATTR_ALWAYS_INLINE static inline void dcd_event_setup_received(uint8_t rhport, uint8_t const * setup, bool in_isr)
 {
   dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_SETUP_RECEIVED };
-  memcpy(&event.setup_received, setup, 8);
+  memcpy(&event.setup_received, setup, sizeof(tusb_control_request_t));
 
   dcd_event_handler(&event, in_isr);
 }
diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c
index 0995ef669..ce4ddab66 100644
--- a/src/device/usbd_control.c
+++ b/src/device/usbd_control.c
@@ -93,7 +93,9 @@ static bool _data_stage_xact(uint8_t rhport)
   if ( _ctrl_xfer.request.bmRequestType_bit.direction == TUSB_DIR_IN )
   {
     ep_addr = EDPT_CTRL_IN;
-    if ( xact_len ) memcpy(_usbd_ctrl_buf, _ctrl_xfer.buffer, xact_len);
+    if ( xact_len ) {
+      TU_VERIFY(tu_memcpy_s(_usbd_ctrl_buf, CFG_TUD_ENDPOINT0_SIZE, _ctrl_xfer.buffer, xact_len)==0);
+    }
   }
 
   return usbd_edpt_xfer(rhport, ep_addr, xact_len ? _usbd_ctrl_buf : NULL, xact_len);
diff --git a/src/tusb.c b/src/tusb.c
index a5c820b8d..c918b0248 100644
--- a/src/tusb.c
+++ b/src/tusb.c
@@ -24,6 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
+#include "common/tusb_common.h"
 #include "tusb_option.h"
 
 #if CFG_TUH_ENABLED || CFG_TUD_ENABLED
@@ -460,7 +461,7 @@ void tu_print_mem(void const *buf, uint32_t count, uint8_t indent)
       tu_printf("%04X: ", 16*i/item_per_line);
     }
 
-    memcpy(&value, buf8, size);
+    tu_memcpy_s(&value, sizeof(value), buf8, size);
     buf8 += size;
 
     tu_printf(" ");
@@ -486,3 +487,23 @@ void tu_print_mem(void const *buf, uint32_t count, uint8_t indent)
 #endif
 
 #endif // host or device enabled
+
+//--------------------------------------------------------------------+
+// Common
+//--------------------------------------------------------------------+
+
+int32_t tu_memset_s(void *dest, size_t destsz, int ch, size_t count) {
+  if (count > destsz) {
+    return -1;
+  }
+  memset(dest, ch, count);
+  return 0;
+}
+
+int32_t tu_memcpy_s(void *dest, size_t destsz, const void *src, size_t count) {
+  if (count > destsz) {
+    return -1;
+  }
+  memcpy(dest, src, count);
+  return 0;
+}
\ No newline at end of file

From eb7aacb51f00a55867304d6217dcaaf39f7019c0 Mon Sep 17 00:00:00 2001
From: Howard Su <howard0su@gmail.com>
Date: Sat, 7 Jan 2023 07:01:14 +0000
Subject: [PATCH 061/691] Allow config OS for RP2040

---
 hw/bsp/rp2040/family.cmake | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index 5dba9dc39..350e8bc65 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -23,6 +23,10 @@ if (NOT TARGET _rp2040_family_inclusion_marker)
 		set(PICO_TINYUSB_PATH ${TOP})
 	endif()
 
+	if (NOT TINYUSB_OPT_OS)
+		set(TINYUSB_OPT_OS OPT_OS_PICO)
+	endif()
+
 	#------------------------------------
 	# Base config for both device and host; wrapped by SDK's tinyusb_common
 	#------------------------------------
@@ -54,7 +58,7 @@ if (NOT TARGET _rp2040_family_inclusion_marker)
 	
 	target_compile_definitions(tinyusb_common_base INTERFACE
 			CFG_TUSB_MCU=OPT_MCU_RP2040
-			CFG_TUSB_OS=OPT_OS_PICO
+			CFG_TUSB_OS=${TINYUSB_OPT_OS}
 			#CFG_TUSB_DEBUG=${TINYUSB_DEBUG_LEVEL}
 	)
 

From 18c3095346159a4f5c3db9775b4f7c6aebca77c2 Mon Sep 17 00:00:00 2001
From: Nathaniel Brough <nathaniel.brough@gmail.com>
Date: Fri, 20 Jan 2023 15:40:32 -0800
Subject: [PATCH 062/691] fix: Change all static variables to thread when
 fuzzing

---
 .vscode/settings.json                       |  3 +++
 src/class/cdc/cdc_device.c                  |  2 +-
 src/class/dfu/dfu_device.c                  | 14 +++++++-------
 src/class/hid/hid_device.c                  |  2 +-
 src/class/msc/msc_device.c                  |  8 ++++----
 src/class/net/ecm_rndis_device.c            | 14 +++++++-------
 src/class/net/ncm_device.c                  | 12 ++++++------
 src/class/usbtmc/usbtmc_device.c            |  8 ++++----
 src/class/vendor/vendor_device.c            |  2 +-
 src/class/vendor/vendor_device.h            |  2 +-
 src/class/video/video_device.c              |  8 ++++----
 src/common/tusb_compiler.h                  |  7 +++++++
 src/common/tusb_debug.h                     |  2 +-
 src/common/tusb_types.h                     |  4 ++--
 src/device/usbd.c                           | 18 +++++++++---------
 src/device/usbd_control.c                   |  4 ++--
 test/fuzz/dcd_fuzz.cc                       |  2 +-
 test/fuzz/device/msc/src/usb_descriptors.cc |  4 ++--
 test/fuzz/device/net/src/usb_descriptors.cc |  4 ++--
 test/fuzz/make.mk                           |  3 ++-
 20 files changed, 67 insertions(+), 56 deletions(-)
 create mode 100644 .vscode/settings.json

diff --git a/.vscode/settings.json b/.vscode/settings.json
new file mode 100644
index 000000000..97924983a
--- /dev/null
+++ b/.vscode/settings.json
@@ -0,0 +1,3 @@
+{
+    "editor.formatOnSave": false
+}
\ No newline at end of file
diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c
index 8d10a416c..b943c1caf 100644
--- a/src/class/cdc/cdc_device.c
+++ b/src/class/cdc/cdc_device.c
@@ -76,7 +76,7 @@ typedef struct
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
-CFG_TUSB_MEM_SECTION static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
+CFG_TUSB_MEM_SECTION TU_STATIC cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
 
 static bool _prep_out_transaction (cdcd_interface_t* p_cdc)
 {
diff --git a/src/class/dfu/dfu_device.c b/src/class/dfu/dfu_device.c
index aa5891ca9..a318603d3 100644
--- a/src/class/dfu/dfu_device.c
+++ b/src/class/dfu/dfu_device.c
@@ -56,7 +56,7 @@ typedef struct
 } dfu_state_ctx_t;
 
 // Only a single dfu state is allowed
-CFG_TUSB_MEM_SECTION static dfu_state_ctx_t _dfu_ctx;
+CFG_TUSB_MEM_SECTION TU_STATIC dfu_state_ctx_t _dfu_ctx;
 
 static void reset_state(void)
 {
@@ -74,7 +74,7 @@ static bool process_manifest_get_status(uint8_t rhport, uint8_t stage, tusb_cont
 //--------------------------------------------------------------------+
 #if CFG_TUSB_DEBUG >= 2
 
-static tu_lookup_entry_t const _dfu_request_lookup[] =
+TU_STATIC tu_lookup_entry_t const _dfu_request_lookup[] =
 {
   { .key = DFU_REQUEST_DETACH         , .data = "DETACH"    },
   { .key = DFU_REQUEST_DNLOAD         , .data = "DNLOAD"    },
@@ -85,13 +85,13 @@ static tu_lookup_entry_t const _dfu_request_lookup[] =
   { .key = DFU_REQUEST_ABORT          , .data = "ABORT"     },
 };
 
-static tu_lookup_table_t const _dfu_request_table =
+TU_STATIC tu_lookup_table_t const _dfu_request_table =
 {
   .count = TU_ARRAY_SIZE(_dfu_request_lookup),
   .items = _dfu_request_lookup
 };
 
-static tu_lookup_entry_t const _dfu_state_lookup[] =
+TU_STATIC tu_lookup_entry_t const _dfu_state_lookup[] =
 {
   { .key = APP_IDLE                   , .data = "APP_IDLE"                },
   { .key = APP_DETACH                 , .data = "APP_DETACH"              },
@@ -106,13 +106,13 @@ static tu_lookup_entry_t const _dfu_state_lookup[] =
   { .key = DFU_ERROR                  , .data = "ERROR"               },
 };
 
-static tu_lookup_table_t const _dfu_state_table =
+TU_STATIC tu_lookup_table_t const _dfu_state_table =
 {
   .count = TU_ARRAY_SIZE(_dfu_state_lookup),
   .items = _dfu_state_lookup
 };
 
-static tu_lookup_entry_t const _dfu_status_lookup[] =
+TU_STATIC tu_lookup_entry_t const _dfu_status_lookup[] =
 {
   { .key = DFU_STATUS_OK               , .data = "OK"              },
   { .key = DFU_STATUS_ERR_TARGET       , .data = "errTARGET"       },
@@ -132,7 +132,7 @@ static tu_lookup_entry_t const _dfu_status_lookup[] =
   { .key = DFU_STATUS_ERR_STALLEDPKT   , .data = "errSTALLEDPKT"   },
 };
 
-static tu_lookup_table_t const _dfu_status_table =
+TU_STATIC tu_lookup_table_t const _dfu_status_table =
 {
   .count = TU_ARRAY_SIZE(_dfu_status_lookup),
   .items = _dfu_status_lookup
diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c
index 8077e4deb..c42d1b6de 100644
--- a/src/class/hid/hid_device.c
+++ b/src/class/hid/hid_device.c
@@ -58,7 +58,7 @@ typedef struct
   tusb_hid_descriptor_hid_t const * hid_descriptor;
 } hidd_interface_t;
 
-CFG_TUSB_MEM_SECTION static hidd_interface_t _hidd_itf[CFG_TUD_HID];
+CFG_TUSB_MEM_SECTION TU_STATIC hidd_interface_t _hidd_itf[CFG_TUD_HID];
 
 /*------------- Helpers -------------*/
 static inline uint8_t get_index_by_itfnum(uint8_t itf_num)
diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c
index 00b0a1d06..bf56ed9bf 100644
--- a/src/class/msc/msc_device.c
+++ b/src/class/msc/msc_device.c
@@ -71,8 +71,8 @@ typedef struct
   uint8_t add_sense_qualifier;
 }mscd_interface_t;
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static mscd_interface_t _mscd_itf;
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static uint8_t _mscd_buf[CFG_TUD_MSC_EP_BUFSIZE];
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC mscd_interface_t _mscd_itf;
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC uint8_t _mscd_buf[CFG_TUD_MSC_EP_BUFSIZE];
 
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
@@ -202,7 +202,7 @@ uint8_t rdwr10_validate_cmd(msc_cbw_t const* cbw)
 //--------------------------------------------------------------------+
 #if CFG_TUSB_DEBUG >= 2
 
-TU_ATTR_UNUSED static tu_lookup_entry_t const _msc_scsi_cmd_lookup[] =
+TU_ATTR_UNUSED TU_STATIC tu_lookup_entry_t const _msc_scsi_cmd_lookup[] =
 {
   { .key = SCSI_CMD_TEST_UNIT_READY              , .data = "Test Unit Ready" },
   { .key = SCSI_CMD_INQUIRY                      , .data = "Inquiry" },
@@ -217,7 +217,7 @@ TU_ATTR_UNUSED static tu_lookup_entry_t const _msc_scsi_cmd_lookup[] =
   { .key = SCSI_CMD_WRITE_10                     , .data = "Write10" }
 };
 
-TU_ATTR_UNUSED static tu_lookup_table_t const _msc_scsi_cmd_table =
+TU_ATTR_UNUSED TU_STATIC tu_lookup_table_t const _msc_scsi_cmd_table =
 {
   .count = TU_ARRAY_SIZE(_msc_scsi_cmd_lookup),
   .items = _msc_scsi_cmd_lookup
diff --git a/src/class/net/ecm_rndis_device.c b/src/class/net/ecm_rndis_device.c
index c7428bcda..560e1768d 100644
--- a/src/class/net/ecm_rndis_device.c
+++ b/src/class/net/ecm_rndis_device.c
@@ -61,8 +61,8 @@ typedef struct
 #define CFG_TUD_NET_PACKET_PREFIX_LEN sizeof(rndis_data_packet_t)
 #define CFG_TUD_NET_PACKET_SUFFIX_LEN 0
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static uint8_t received[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN];
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static uint8_t transmitted[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN];
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC uint8_t received[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN];
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC uint8_t transmitted[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN];
 
 struct ecm_notify_struct
 {
@@ -70,7 +70,7 @@ struct ecm_notify_struct
   uint32_t downlink, uplink;
 };
 
-static const struct ecm_notify_struct ecm_notify_nc =
+TU_STATIC const struct ecm_notify_struct ecm_notify_nc =
 {
   .header = {
     .bmRequestType = 0xA1,
@@ -80,7 +80,7 @@ static const struct ecm_notify_struct ecm_notify_nc =
   },
 };
 
-static const struct ecm_notify_struct ecm_notify_csc =
+TU_STATIC const struct ecm_notify_struct ecm_notify_csc =
 {
   .header = {
     .bmRequestType = 0xA1,
@@ -92,7 +92,7 @@ static const struct ecm_notify_struct ecm_notify_csc =
 };
 
 // TODO remove CFG_TUSB_MEM_SECTION, control internal buffer is already in this special section
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static union
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC union
 {
   uint8_t rndis_buf[120];
   struct ecm_notify_struct ecm_buf;
@@ -102,9 +102,9 @@ CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static union
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
 // TODO remove CFG_TUSB_MEM_SECTION
-CFG_TUSB_MEM_SECTION static netd_interface_t _netd_itf;
+CFG_TUSB_MEM_SECTION TU_STATIC netd_interface_t _netd_itf;
 
-static bool can_xmit;
+TU_STATIC bool can_xmit;
 
 void tud_network_recv_renew(void)
 {
diff --git a/src/class/net/ncm_device.c b/src/class/net/ncm_device.c
index 1cbc0ce01..236232191 100644
--- a/src/class/net/ncm_device.c
+++ b/src/class/net/ncm_device.c
@@ -130,7 +130,7 @@ typedef struct
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static const ntb_parameters_t ntb_parameters = {
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC const ntb_parameters_t ntb_parameters = {
     .wLength                 = sizeof(ntb_parameters_t),
     .bmNtbFormatsSupported   = 0x01,
     .dwNtbInMaxSize          = CFG_TUD_NCM_IN_NTB_MAX_SIZE,
@@ -145,11 +145,11 @@ CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static const ntb_parameters_t ntb_parame
     .wNtbOutMaxDatagrams     = 0
 };
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static transmit_ntb_t transmit_ntb[2];
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC transmit_ntb_t transmit_ntb[2];
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static uint8_t receive_ntb[CFG_TUD_NCM_OUT_NTB_MAX_SIZE];
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC uint8_t receive_ntb[CFG_TUD_NCM_OUT_NTB_MAX_SIZE];
 
-static ncm_interface_t ncm_interface;
+TU_STATIC ncm_interface_t ncm_interface;
 
 /*
  * Set up the NTB state in ncm_interface to be ready to add datagrams.
@@ -196,7 +196,7 @@ static void ncm_start_tx(void) {
   ncm_prepare_for_tx();
 }
 
-static struct ecm_notify_struct ncm_notify_connected =
+TU_STATIC struct ecm_notify_struct ncm_notify_connected =
 {
     .header = {
         .bmRequestType_bit = {
@@ -210,7 +210,7 @@ static struct ecm_notify_struct ncm_notify_connected =
     },
 };
 
-static struct ecm_notify_struct ncm_notify_speed_change =
+TU_STATIC struct ecm_notify_struct ncm_notify_speed_change =
 {
     .header = {
         .bmRequestType_bit = {
diff --git a/src/class/usbtmc/usbtmc_device.c b/src/class/usbtmc/usbtmc_device.c
index 0cf0743a7..fd8220c1f 100644
--- a/src/class/usbtmc/usbtmc_device.c
+++ b/src/class/usbtmc/usbtmc_device.c
@@ -78,7 +78,7 @@
 
 #ifdef xDEBUG
 #include "uart_util.h"
-static char logMsg[150];
+TU_STATIC char logMsg[150];
 #endif
 
 // Buffer size must be an exact multiple of the max packet size for both
@@ -143,7 +143,7 @@ typedef struct
   usbtmc_capabilities_specific_t const * capabilities;
 } usbtmc_interface_state_t;
 
-CFG_TUSB_MEM_SECTION static usbtmc_interface_state_t usbtmc_state =
+CFG_TUSB_MEM_SECTION TU_STATIC usbtmc_interface_state_t usbtmc_state =
 {
     .itf_id = 0xFF,
 };
@@ -154,8 +154,8 @@ TU_VERIFY_STATIC(USBTMCD_BUFFER_SIZE >= 32u,"USBTMC dev buffer size too small");
 static bool handle_devMsgOutStart(uint8_t rhport, void *data, size_t len);
 static bool handle_devMsgOut(uint8_t rhport, void *data, size_t len, size_t packetLen);
 
-static uint8_t termChar;
-static uint8_t termCharRequested = false;
+TU_STATIC uint8_t termChar;
+TU_STATIC uint8_t termCharRequested = false;
 
 #if OSAL_MUTEX_REQUIRED
 static OSAL_MUTEX_DEF(usbtmcLockBuffer);
diff --git a/src/class/vendor/vendor_device.c b/src/class/vendor/vendor_device.c
index 3b81a108f..b33cbcf13 100644
--- a/src/class/vendor/vendor_device.c
+++ b/src/class/vendor/vendor_device.c
@@ -59,7 +59,7 @@ typedef struct
   CFG_TUSB_MEM_ALIGN uint8_t epin_buf[CFG_TUD_VENDOR_EPSIZE];
 } vendord_interface_t;
 
-CFG_TUSB_MEM_SECTION static vendord_interface_t _vendord_itf[CFG_TUD_VENDOR];
+CFG_TUSB_MEM_SECTION TU_STATIC vendord_interface_t _vendord_itf[CFG_TUD_VENDOR];
 
 #define ITF_MEM_RESET_SIZE   offsetof(vendord_interface_t, rx_ff)
 
diff --git a/src/class/vendor/vendor_device.h b/src/class/vendor/vendor_device.h
index 4a873e5fc..543500f0c 100644
--- a/src/class/vendor/vendor_device.h
+++ b/src/class/vendor/vendor_device.h
@@ -50,7 +50,7 @@ void     tud_vendor_n_read_flush      (uint8_t itf);
 uint32_t tud_vendor_n_write           (uint8_t itf, void const* buffer, uint32_t bufsize);
 uint32_t tud_vendor_n_write_available (uint8_t itf);
 
-static inline
+TU_STATIC inline
 uint32_t tud_vendor_n_write_str       (uint8_t itf, char const* str);
 uint32_t tud_vendor_n_flush           (uint8_t itf);
 
diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c
index e17d0a90f..14518deac 100644
--- a/src/class/video/video_device.c
+++ b/src/class/video/video_device.c
@@ -125,11 +125,11 @@ typedef struct TU_ATTR_PACKED {
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
-CFG_TUSB_MEM_SECTION static videod_interface_t _videod_itf[CFG_TUD_VIDEO];
-CFG_TUSB_MEM_SECTION static videod_streaming_interface_t _videod_streaming_itf[CFG_TUD_VIDEO_STREAMING];
+CFG_TUSB_MEM_SECTION TU_STATIC videod_interface_t _videod_itf[CFG_TUD_VIDEO];
+CFG_TUSB_MEM_SECTION TU_STATIC videod_streaming_interface_t _videod_streaming_itf[CFG_TUD_VIDEO_STREAMING];
 
-static uint8_t const _cap_get     = 0x1u; /* support for GET */
-static uint8_t const _cap_get_set = 0x3u; /* support for GET and SET */
+TU_STATIC uint8_t const _cap_get     = 0x1u; /* support for GET */
+TU_STATIC uint8_t const _cap_get_set = 0x3u; /* support for GET and SET */
 
 /** Get interface number from the interface descriptor
  *
diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index 2c30daf6f..6a02959ca 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -61,6 +61,13 @@
   #define TU_VERIFY_STATIC(const_expr, _mess) enum { TU_XSTRCAT(_verify_static_, _TU_COUNTER_) = 1/(!!(const_expr)) }
 #endif
 
+/* --------------------- Fuzzing types -------------------------------------- */
+#ifdef FUZZ
+  #define TU_STATIC __thread static
+#else
+  #define TU_STATIC static
+#endif
+
 // for declaration of reserved field, make use of _TU_COUNTER_
 #define TU_RESERVED           TU_XSTRCAT(reserved, _TU_COUNTER_)
 
diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h
index 65fd1920d..8587b6771 100644
--- a/src/common/tusb_debug.h
+++ b/src/common/tusb_debug.h
@@ -114,7 +114,7 @@ typedef struct
 
 static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint32_t key)
 {
-  static char not_found[11];
+  TU_STATIC char not_found[11];
 
   for(uint16_t i=0; i<p_table->count; i++)
   {
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index 32cdba450..56f782ca3 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -529,13 +529,13 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_edpt_packet_size(tusb_desc_endpo
 #if CFG_TUSB_DEBUG
 TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_dir_str(tusb_dir_t dir)
 {
-  static const char *str[] = {"out", "in"};
+  TU_STATIC const char *str[] = {"out", "in"};
   return str[dir];
 }
 
 TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_type_str(tusb_xfer_type_t t)
 {
-  static const char *str[] = {"control", "isochronous", "bulk", "interrupt"};
+  TU_STATIC const char *str[] = {"control", "isochronous", "bulk", "interrupt"};
   return str[t];
 }
 #endif
diff --git a/src/device/usbd.c b/src/device/usbd.c
index 6e0c6710d..72fa2bd4c 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -76,7 +76,7 @@ typedef struct
 
 }usbd_device_t;
 
-static usbd_device_t _usbd_dev;
+TU_STATIC usbd_device_t _usbd_dev;
 
 //--------------------------------------------------------------------+
 // Class Driver
@@ -88,7 +88,7 @@ static usbd_device_t _usbd_dev;
 #endif
 
 // Built-in class drivers
-static usbd_class_driver_t const _usbd_driver[] =
+TU_STATIC usbd_class_driver_t const _usbd_driver[] =
 {
   #if CFG_TUD_CDC
   {
@@ -238,8 +238,8 @@ static usbd_class_driver_t const _usbd_driver[] =
 enum { BUILTIN_DRIVER_COUNT = TU_ARRAY_SIZE(_usbd_driver) };
 
 // Additional class drivers implemented by application
-static usbd_class_driver_t const * _app_driver = NULL;
-static uint8_t _app_driver_count = 0;
+TU_STATIC usbd_class_driver_t const * _app_driver = NULL;
+TU_STATIC uint8_t _app_driver_count = 0;
 
 // virtually joins built-in and application drivers together.
 // Application is positioned first to allow overwriting built-in ones.
@@ -265,17 +265,17 @@ static inline usbd_class_driver_t const * get_driver(uint8_t drvid)
 //--------------------------------------------------------------------+
 
 enum { RHPORT_INVALID = 0xFFu };
-static uint8_t _usbd_rhport = RHPORT_INVALID;
+TU_STATIC uint8_t _usbd_rhport = RHPORT_INVALID;
 
 // Event queue
 // usbd_int_set() is used as mutex in OS NONE config
 OSAL_QUEUE_DEF(usbd_int_set, _usbd_qdef, CFG_TUD_TASK_QUEUE_SZ, dcd_event_t);
-static osal_queue_t _usbd_q;
+TU_STATIC osal_queue_t _usbd_q;
 
 // Mutex for claiming endpoint
 #if OSAL_MUTEX_REQUIRED
-  static osal_mutex_def_t _ubsd_mutexdef;
-  static osal_mutex_t _usbd_mutex;
+  TU_STATIC osal_mutex_def_t _ubsd_mutexdef;
+  TU_STATIC osal_mutex_t _usbd_mutex;
 #else
   #define _usbd_mutex   NULL
 #endif
@@ -299,7 +299,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t event,
 // Debug
 //--------------------------------------------------------------------+
 #if CFG_TUSB_DEBUG >= 2
-static char const* const _usbd_event_str[DCD_EVENT_COUNT] =
+TU_STATIC char const* const _usbd_event_str[DCD_EVENT_COUNT] =
 {
   "Invalid"        ,
   "Bus Reset"      ,
diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c
index 0995ef669..c3ff7459d 100644
--- a/src/device/usbd_control.c
+++ b/src/device/usbd_control.c
@@ -53,10 +53,10 @@ typedef struct
   usbd_control_xfer_cb_t complete_cb;
 } usbd_control_xfer_t;
 
-static usbd_control_xfer_t _ctrl_xfer;
+TU_STATIC usbd_control_xfer_t _ctrl_xfer;
 
 CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN
-static uint8_t _usbd_ctrl_buf[CFG_TUD_ENDPOINT0_SIZE];
+TU_STATIC uint8_t _usbd_ctrl_buf[CFG_TUD_ENDPOINT0_SIZE];
 
 //--------------------------------------------------------------------+
 // Application API
diff --git a/test/fuzz/dcd_fuzz.cc b/test/fuzz/dcd_fuzz.cc
index 7153e20f0..04b5ce6d7 100644
--- a/test/fuzz/dcd_fuzz.cc
+++ b/test/fuzz/dcd_fuzz.cc
@@ -39,7 +39,7 @@ struct State {
   uint8_t address;
 };
 
-static State state = {false, 0, 0};
+TU_STATIC State state = {false, 0, 0};
 
 //--------------------------------------------------------------------+
 // Controller API
diff --git a/test/fuzz/device/msc/src/usb_descriptors.cc b/test/fuzz/device/msc/src/usb_descriptors.cc
index ded401fc9..91db232ac 100644
--- a/test/fuzz/device/msc/src/usb_descriptors.cc
+++ b/test/fuzz/device/msc/src/usb_descriptors.cc
@@ -44,7 +44,7 @@
 // Invoked when received GET DEVICE DESCRIPTOR
 // Application return pointer to descriptor
 uint8_t const *tud_descriptor_device_cb(void) {
-  static tusb_desc_device_t const desc_device = {
+  TU_STATIC tusb_desc_device_t const desc_device = {
       .bLength = sizeof(tusb_desc_device_t),
       .bDescriptorType = TUSB_DESC_DEVICE,
       .bcdUSB = USB_BCD,
@@ -184,7 +184,7 @@ char const *string_desc_arr[] = {
 
 };
 
-static uint16_t _desc_str[32];
+TU_STATIC uint16_t _desc_str[32];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long
diff --git a/test/fuzz/device/net/src/usb_descriptors.cc b/test/fuzz/device/net/src/usb_descriptors.cc
index c600bd801..0223ed298 100644
--- a/test/fuzz/device/net/src/usb_descriptors.cc
+++ b/test/fuzz/device/net/src/usb_descriptors.cc
@@ -45,7 +45,7 @@
 // Invoked when received GET DEVICE DESCRIPTOR
 // Application return pointer to descriptor
 uint8_t const *tud_descriptor_device_cb(void) {
-  static tusb_desc_device_t const desc_device = {
+  TU_STATIC tusb_desc_device_t const desc_device = {
       .bLength = sizeof(tusb_desc_device_t),
       .bDescriptorType = TUSB_DESC_DEVICE,
       .bcdUSB = USB_BCD,
@@ -189,7 +189,7 @@ char const *string_desc_arr[] = {
     "TinyUSB CDC",              // 4: CDC Interface
 };
 
-static uint16_t _desc_str[32];
+TU_STATIC uint16_t _desc_str[32];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long
diff --git a/test/fuzz/make.mk b/test/fuzz/make.mk
index 6717ebc80..5e8658ad0 100644
--- a/test/fuzz/make.mk
+++ b/test/fuzz/make.mk
@@ -78,7 +78,8 @@ CFLAGS += \
 CFLAGS += \
 	-Wno-error=unreachable-code \
   -DOPT_MCU_FUZZ=1 \
-  -DCFG_TUSB_MCU=OPT_MCU_FUZZ 
+  -DCFG_TUSB_MCU=OPT_MCU_FUZZ \
+  -DFUZZ
 
 CXXFLAGS += \
   -xc++ \

From 830849211d866fcafef555269b1376f15802cc68 Mon Sep 17 00:00:00 2001
From: Jannis Achstetter <kripton@kripserver.net>
Date: Sat, 4 Feb 2023 22:37:39 +0100
Subject: [PATCH 063/691] dhserver: Fix a potential DoS vulnerability
 accidentially introduced by #1712

---
 lib/networking/dhserver.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/lib/networking/dhserver.c b/lib/networking/dhserver.c
index def431f75..8cd22ddb9 100644
--- a/lib/networking/dhserver.c
+++ b/lib/networking/dhserver.c
@@ -86,7 +86,7 @@ typedef struct
     uint8_t  dp_giaddr[4];    /* gateway IP address */
     uint8_t  dp_chaddr[16];   /* client hardware address */
     uint8_t  dp_legacy[192];
-    uint8_t  dp_magic[4];     
+    uint8_t  dp_magic[4];
     uint8_t  dp_options[275]; /* options area */
 } DHCP_TYPE;
 
@@ -242,7 +242,11 @@ static void udp_recv_proc(void *arg, struct udp_pcb *upcb, struct pbuf *p, const
 	memcpy(&dhcp_data, p->payload, n);
 
 	ptr = find_dhcp_option(dhcp_data.dp_options, sizeof(dhcp_data.dp_options), DHCP_MESSAGETYPE);
-	if (ptr == NULL) return;
+	if (ptr == NULL)
+	{
+		pbuf_free(p);
+		return;
+	}
 
 	switch (ptr[2])
 	{

From f48ae4aad7dea10e318bf82d1b59a75a3c325697 Mon Sep 17 00:00:00 2001
From: Jeff Trull <edaskel@att.net>
Date: Fri, 10 Feb 2023 15:54:04 -0800
Subject: [PATCH 064/691] Adjust reserved bitfields to make SDCC happy

- keep each field at or under 16b
- For optimal packing, segment fields to 8b boundaries
---
 src/class/cdc/cdc.h | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/class/cdc/cdc.h b/src/class/cdc/cdc.h
index 2fecde3ca..842ea4dfe 100644
--- a/src/class/cdc/cdc.h
+++ b/src/class/cdc/cdc.h
@@ -377,7 +377,9 @@ typedef struct TU_ATTR_PACKED
     uint32_t incoming_distinctive   : 1; ///< 0 : Reports only incoming ringing. 1 : Reports incoming distinctive ringing patterns.
     uint32_t dual_tone_multi_freq   : 1; ///< 0 : Cannot report dual tone multi-frequency (DTMF) digits input remotely over the telephone line. 1 : Can report DTMF digits input remotely over the telephone line.
     uint32_t line_state_change      : 1; ///< 0 : Does not support line state change notification. 1 : Does support line state change notification
-    uint32_t TU_RESERVED            : 26;
+    uint32_t TU_RESERVED0           : 2;
+    uint32_t TU_RESERVED1           : 16;
+    uint32_t TU_RESERVED2           : 4;
   } bmCapabilities;
 }cdc_desc_func_telephone_call_state_reporting_capabilities_t;
 
@@ -404,7 +406,8 @@ typedef struct TU_ATTR_PACKED
 {
   uint16_t dtr : 1;
   uint16_t rts : 1;
-  uint16_t : 14;
+  uint16_t : 6;
+  uint16_t : 8;
 } cdc_line_control_state_t;
 
 TU_VERIFY_STATIC(sizeof(cdc_line_control_state_t) == 2, "size is not correct");

From ec26c6163c9d1cf0422537e8f167a783736aca0c Mon Sep 17 00:00:00 2001
From: caleb crome <caleb@crome.org>
Date: Sun, 12 Feb 2023 11:24:21 -0800
Subject: [PATCH 065/691] Turn data cache on This fixes
 https://github.com/hathach/tinyusb/issues/1894.  I'm not really sure if this
 is the correct way to fix it, and I have not tested on all the rest of the
 family members, however, this lets the i.MX1010 work again.

The problem:  the latest SDK update does not enable the data cache by default
This causes an assert in board_init() when attemping to control clock
gating.  I haven't investigated further as to *why* it's a problem, but it
is a problem.
---
 hw/bsp/imxrt/family.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c
index fc6e9e266..ecd18bad3 100644
--- a/hw/bsp/imxrt/family.c
+++ b/hw/bsp/imxrt/family.c
@@ -55,6 +55,12 @@ const uint8_t dcd_data[] = { 0x00 };
 
 void board_init(void)
 {
+  // make sure the dcache is on.
+#if defined(__DCACHE_PRESENT) && __DCACHE_PRESENT
+    if (SCB_CCR_DC_Msk != (SCB_CCR_DC_Msk & SCB->CCR))
+        SCB_EnableDCache();
+#endif
+
   // Init clock
   BOARD_BootClockRUN();
   SystemCoreClockUpdate();

From 7e2c5fcc8aa7c39f6c65d7cb85c7d4522b0050be Mon Sep 17 00:00:00 2001
From: Jeff Trull <edaskel@att.net>
Date: Sun, 12 Feb 2023 20:52:17 -0800
Subject: [PATCH 066/691] Correct bitfields for
 cdc_desc_func_telephone_call_state_reporting_capabilities_t

---
 src/class/cdc/cdc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/class/cdc/cdc.h b/src/class/cdc/cdc.h
index 842ea4dfe..4658e43af 100644
--- a/src/class/cdc/cdc.h
+++ b/src/class/cdc/cdc.h
@@ -379,7 +379,7 @@ typedef struct TU_ATTR_PACKED
     uint32_t line_state_change      : 1; ///< 0 : Does not support line state change notification. 1 : Does support line state change notification
     uint32_t TU_RESERVED0           : 2;
     uint32_t TU_RESERVED1           : 16;
-    uint32_t TU_RESERVED2           : 4;
+    uint32_t TU_RESERVED2           : 8;
   } bmCapabilities;
 }cdc_desc_func_telephone_call_state_reporting_capabilities_t;
 

From 105f108661b894b3a3bc9fe2e173556099bbd745 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 13 Feb 2023 11:44:03 +0700
Subject: [PATCH 067/691] add metro m7 1011 board def (not running yet)

---
 examples/rules.mk                             |   7 +-
 hw/bsp/imxrt/boards/metro_m7_10111/board.h    |  53 ++++
 hw/bsp/imxrt/boards/metro_m7_10111/board.mk   |  14 +
 .../evkmimxrt1010_flexspi_nor_config.c        |  48 ++++
 .../evkmimxrt1010_flexspi_nor_config.h        | 267 ++++++++++++++++++
 hw/bsp/imxrt/family.mk                        |   5 +
 6 files changed, 388 insertions(+), 6 deletions(-)
 create mode 100644 hw/bsp/imxrt/boards/metro_m7_10111/board.h
 create mode 100644 hw/bsp/imxrt/boards/metro_m7_10111/board.mk
 create mode 100644 hw/bsp/imxrt/boards/metro_m7_10111/evkmimxrt1010_flexspi_nor_config.c
 create mode 100644 hw/bsp/imxrt/boards/metro_m7_10111/evkmimxrt1010_flexspi_nor_config.h

diff --git a/examples/rules.mk b/examples/rules.mk
index 6a62288ce..dcef934ab 100644
--- a/examples/rules.mk
+++ b/examples/rules.mk
@@ -170,12 +170,7 @@ $(BUILD)/$(PROJECT).elf: $(OBJ)
 endif
 
 # UF2 generation, iMXRT need to strip to text only before conversion
-ifeq ($(FAMILY),imxrt)
-$(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).elf
-	@echo CREATE $@
-	@$(OBJCOPY) -O ihex -R .flash_config -R .ivt $^ $(BUILD)/$(PROJECT)-textonly.hex
-	$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -c -o $@ $(BUILD)/$(PROJECT)-textonly.hex
-else
+ifneq ($(FAMILY),imxrt)
 $(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).hex
 	@echo CREATE $@
 	$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -c -o $@ $^
diff --git a/hw/bsp/imxrt/boards/metro_m7_10111/board.h b/hw/bsp/imxrt/boards/metro_m7_10111/board.h
new file mode 100644
index 000000000..7fa2f8541
--- /dev/null
+++ b/hw/bsp/imxrt/boards/metro_m7_10111/board.h
@@ -0,0 +1,53 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#include "fsl_device_registers.h"
+
+// required since iMX RT10xx SDK include this file for board size
+#define BOARD_FLASH_SIZE     (8*1024*1024)
+
+// LED
+#define LED_PINMUX          IOMUXC_GPIO_03_GPIOMUX_IO03
+#define LED_PORT            GPIO1
+#define LED_PIN             3
+#define LED_STATE_ON        1
+
+// D2 as button
+#define BUTTON_PINMUX         IOMUXC_GPIO_13_GPIOMUX_IO13
+#define BUTTON_PORT           GPIO1
+#define BUTTON_PIN            13
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_PORT             LPUART1
+#define UART_RX_PINMUX        IOMUXC_GPIO_09_LPUART1_RXD
+#define UART_TX_PINMUX        IOMUXC_GPIO_10_LPUART1_TXD
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/imxrt/boards/metro_m7_10111/board.mk b/hw/bsp/imxrt/boards/metro_m7_10111/board.mk
new file mode 100644
index 000000000..7f1861ecc
--- /dev/null
+++ b/hw/bsp/imxrt/boards/metro_m7_10111/board.mk
@@ -0,0 +1,14 @@
+CFLAGS += -DCPU_MIMXRT1011DAE5A -DCFG_EXAMPLE_VIDEO_READONLY
+MCU_VARIANT = MIMXRT1011
+
+# For flash-jlink target
+JLINK_DEVICE = MIMXRT1011DAE5A
+
+# For flash-pyocd target
+PYOCD_TARGET = mimxrt1010
+
+# flash using pyocd
+flash: flash-pyocd
+flash-uf2: $(BUILD)/$(PROJECT).uf2
+	@echo copying $<
+	@$(CP) $< /media/$(USER)/METROM7BOOT
diff --git a/hw/bsp/imxrt/boards/metro_m7_10111/evkmimxrt1010_flexspi_nor_config.c b/hw/bsp/imxrt/boards/metro_m7_10111/evkmimxrt1010_flexspi_nor_config.c
new file mode 100644
index 000000000..752a65629
--- /dev/null
+++ b/hw/bsp/imxrt/boards/metro_m7_10111/evkmimxrt1010_flexspi_nor_config.c
@@ -0,0 +1,48 @@
+/*
+ * Copyright 2019 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "evkmimxrt1010_flexspi_nor_config.h"
+
+/* Component ID definition, used by tools. */
+#ifndef FSL_COMPONENT_ID
+#define FSL_COMPONENT_ID "platform.drivers.xip_board"
+#endif
+
+/*******************************************************************************
+ * Code
+ ******************************************************************************/
+#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
+#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
+__attribute__((section(".boot_hdr.conf")))
+#elif defined(__ICCARM__)
+#pragma location = ".boot_hdr.conf"
+#endif
+
+const flexspi_nor_config_t qspiflash_config = {
+    .memConfig =
+        {
+            .tag              = FLEXSPI_CFG_BLK_TAG,
+            .version          = FLEXSPI_CFG_BLK_VERSION,
+            .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
+            .csHoldTime       = 3u,
+            .csSetupTime      = 3u,
+            .sflashPadType    = kSerialFlash_4Pads,
+            .serialClkFreq    = kFlexSpiSerialClk_100MHz,
+            .sflashA1Size     = 16u * 1024u * 1024u,
+            .lookupTable =
+                {
+                    // Read LUTs
+                    FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 24),
+                    FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
+                },
+        },
+    .pageSize           = 256u,
+    .sectorSize         = 4u * 1024u,
+    .blockSize          = 64u * 1024u,
+    .isUniformBlockSize = false,
+};
+#endif /* XIP_BOOT_HEADER_ENABLE */
diff --git a/hw/bsp/imxrt/boards/metro_m7_10111/evkmimxrt1010_flexspi_nor_config.h b/hw/bsp/imxrt/boards/metro_m7_10111/evkmimxrt1010_flexspi_nor_config.h
new file mode 100644
index 000000000..bb5a64448
--- /dev/null
+++ b/hw/bsp/imxrt/boards/metro_m7_10111/evkmimxrt1010_flexspi_nor_config.h
@@ -0,0 +1,267 @@
+/*
+ * Copyright 2019 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __EVKMIMXRT1011_FLEXSPI_NOR_CONFIG__
+#define __EVKMIMXRT1011_FLEXSPI_NOR_CONFIG__
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "fsl_common.h"
+
+/*! @name Driver version */
+/*@{*/
+/*! @brief XIP_BOARD driver version 2.0.0. */
+#define FSL_XIP_BOARD_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
+/*@}*/
+
+/* FLEXSPI memory config block related definitions */
+#define FLEXSPI_CFG_BLK_TAG (0x42464346UL)     // ascii "FCFB" Big Endian
+#define FLEXSPI_CFG_BLK_VERSION (0x56010400UL) // V1.4.0
+#define FLEXSPI_CFG_BLK_SIZE (512)
+
+/* FLEXSPI Feature related definitions */
+#define FLEXSPI_FEATURE_HAS_PARALLEL_MODE 1
+
+/* Lookup table related definitions */
+#define CMD_INDEX_READ 0
+#define CMD_INDEX_READSTATUS 1
+#define CMD_INDEX_WRITEENABLE 2
+#define CMD_INDEX_WRITE 4
+
+#define CMD_LUT_SEQ_IDX_READ 0
+#define CMD_LUT_SEQ_IDX_READSTATUS 1
+#define CMD_LUT_SEQ_IDX_WRITEENABLE 3
+#define CMD_LUT_SEQ_IDX_WRITE 9
+
+#define CMD_SDR 0x01
+#define CMD_DDR 0x21
+#define RADDR_SDR 0x02
+#define RADDR_DDR 0x22
+#define CADDR_SDR 0x03
+#define CADDR_DDR 0x23
+#define MODE1_SDR 0x04
+#define MODE1_DDR 0x24
+#define MODE2_SDR 0x05
+#define MODE2_DDR 0x25
+#define MODE4_SDR 0x06
+#define MODE4_DDR 0x26
+#define MODE8_SDR 0x07
+#define MODE8_DDR 0x27
+#define WRITE_SDR 0x08
+#define WRITE_DDR 0x28
+#define READ_SDR 0x09
+#define READ_DDR 0x29
+#define LEARN_SDR 0x0A
+#define LEARN_DDR 0x2A
+#define DATSZ_SDR 0x0B
+#define DATSZ_DDR 0x2B
+#define DUMMY_SDR 0x0C
+#define DUMMY_DDR 0x2C
+#define DUMMY_RWDS_SDR 0x0D
+#define DUMMY_RWDS_DDR 0x2D
+#define JMP_ON_CS 0x1F
+#define STOP 0
+
+#define FLEXSPI_1PAD 0
+#define FLEXSPI_2PAD 1
+#define FLEXSPI_4PAD 2
+#define FLEXSPI_8PAD 3
+
+#define FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1)                                                              \
+    (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \
+     FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))
+
+//!@brief Definitions for FlexSPI Serial Clock Frequency
+typedef enum _FlexSpiSerialClockFreq
+{
+    kFlexSpiSerialClk_30MHz  = 1,
+    kFlexSpiSerialClk_50MHz  = 2,
+    kFlexSpiSerialClk_60MHz  = 3,
+    kFlexSpiSerialClk_75MHz  = 4,
+    kFlexSpiSerialClk_80MHz  = 5,
+    kFlexSpiSerialClk_100MHz = 6,
+    kFlexSpiSerialClk_120MHz = 7,
+    kFlexSpiSerialClk_133MHz = 8,
+} flexspi_serial_clk_freq_t;
+
+//!@brief FlexSPI clock configuration type
+enum
+{
+    kFlexSpiClk_SDR, //!< Clock configure for SDR mode
+    kFlexSpiClk_DDR, //!< Clock configurat for DDR mode
+};
+
+//!@brief FlexSPI Read Sample Clock Source definition
+typedef enum _FlashReadSampleClkSource
+{
+    kFlexSPIReadSampleClk_LoopbackInternally      = 0,
+    kFlexSPIReadSampleClk_LoopbackFromDqsPad      = 1,
+    kFlexSPIReadSampleClk_LoopbackFromSckPad      = 2,
+    kFlexSPIReadSampleClk_ExternalInputFromDqsPad = 3,
+} flexspi_read_sample_clk_t;
+
+//!@brief Misc feature bit definitions
+enum
+{
+    kFlexSpiMiscOffset_DiffClkEnable            = 0, //!< Bit for Differential clock enable
+    kFlexSpiMiscOffset_Ck2Enable                = 1, //!< Bit for CK2 enable
+    kFlexSpiMiscOffset_ParallelEnable           = 2, //!< Bit for Parallel mode enable
+    kFlexSpiMiscOffset_WordAddressableEnable    = 3, //!< Bit for Word Addressable enable
+    kFlexSpiMiscOffset_SafeConfigFreqEnable     = 4, //!< Bit for Safe Configuration Frequency enable
+    kFlexSpiMiscOffset_PadSettingOverrideEnable = 5, //!< Bit for Pad setting override enable
+    kFlexSpiMiscOffset_DdrModeEnable            = 6, //!< Bit for DDR clock confiuration indication.
+};
+
+//!@brief Flash Type Definition
+enum
+{
+    kFlexSpiDeviceType_SerialNOR    = 1,    //!< Flash devices are Serial NOR
+    kFlexSpiDeviceType_SerialNAND   = 2,    //!< Flash devices are Serial NAND
+    kFlexSpiDeviceType_SerialRAM    = 3,    //!< Flash devices are Serial RAM/HyperFLASH
+    kFlexSpiDeviceType_MCP_NOR_NAND = 0x12, //!< Flash device is MCP device, A1 is Serial NOR, A2 is Serial NAND
+    kFlexSpiDeviceType_MCP_NOR_RAM  = 0x13, //!< Flash device is MCP device, A1 is Serial NOR, A2 is Serial RAMs
+};
+
+//!@brief Flash Pad Definitions
+enum
+{
+    kSerialFlash_1Pad  = 1,
+    kSerialFlash_2Pads = 2,
+    kSerialFlash_4Pads = 4,
+    kSerialFlash_8Pads = 8,
+};
+
+//!@brief FlexSPI LUT Sequence structure
+typedef struct _lut_sequence
+{
+    uint8_t seqNum; //!< Sequence Number, valid number: 1-16
+    uint8_t seqId;  //!< Sequence Index, valid number: 0-15
+    uint16_t reserved;
+} flexspi_lut_seq_t;
+
+//!@brief Flash Configuration Command Type
+enum
+{
+    kDeviceConfigCmdType_Generic,    //!< Generic command, for example: configure dummy cycles, drive strength, etc
+    kDeviceConfigCmdType_QuadEnable, //!< Quad Enable command
+    kDeviceConfigCmdType_Spi2Xpi,    //!< Switch from SPI to DPI/QPI/OPI mode
+    kDeviceConfigCmdType_Xpi2Spi,    //!< Switch from DPI/QPI/OPI to SPI mode
+    kDeviceConfigCmdType_Spi2NoCmd,  //!< Switch to 0-4-4/0-8-8 mode
+    kDeviceConfigCmdType_Reset,      //!< Reset device command
+};
+
+//!@brief FlexSPI Memory Configuration Block
+typedef struct _FlexSPIConfig
+{
+    uint32_t tag;               //!< [0x000-0x003] Tag, fixed value 0x42464346UL
+    uint32_t version;           //!< [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor, [7:0] - bugfix
+    uint32_t reserved0;         //!< [0x008-0x00b] Reserved for future use
+    uint8_t readSampleClkSrc;   //!< [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
+    uint8_t csHoldTime;         //!< [0x00d-0x00d] CS hold time, default value: 3
+    uint8_t csSetupTime;        //!< [0x00e-0x00e] CS setup time, default value: 3
+    uint8_t columnAddressWidth; //!< [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed to 3, For
+    //! Serial NAND, need to refer to datasheet
+    uint8_t deviceModeCfgEnable; //!< [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 - Disable
+    uint8_t deviceModeType; //!< [0x011-0x011] Specify the configuration command type:Quad Enable, DPI/QPI/OPI switch,
+    //! Generic configuration, etc.
+    uint16_t waitTimeCfgCommands; //!< [0x012-0x013] Wait time for all configuration commands, unit: 100us, Used for
+    //! DPI/QPI/OPI switch or reset command
+    flexspi_lut_seq_t deviceModeSeq; //!< [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id, [15:8] - LUt
+    //! sequence number, [31:16] Reserved
+    uint32_t deviceModeArg;    //!< [0x018-0x01b] Argument/Parameter for device configuration
+    uint8_t configCmdEnable;   //!< [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
+    uint8_t configModeType[3]; //!< [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
+    flexspi_lut_seq_t
+        configCmdSeqs[3]; //!< [0x020-0x02b] Sequence info for Device Configuration command, similar as deviceModeSeq
+    uint32_t reserved1;   //!< [0x02c-0x02f] Reserved for future use
+    uint32_t configCmdArgs[3];     //!< [0x030-0x03b] Arguments/Parameters for device Configuration commands
+    uint32_t reserved2;            //!< [0x03c-0x03f] Reserved for future use
+    uint32_t controllerMiscOption; //!< [0x040-0x043] Controller Misc Options, see Misc feature bit definitions for more
+    //! details
+    uint8_t deviceType;    //!< [0x044-0x044] Device Type:  See Flash Type Definition for more details
+    uint8_t sflashPadType; //!< [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8 - Octal
+    uint8_t serialClkFreq; //!< [0x046-0x046] Serial Flash Frequency, device specific definitions, See System Boot
+    //! Chapter for more details
+    uint8_t lutCustomSeqEnable; //!< [0x047-0x047] LUT customization Enable, it is required if the program/erase cannot
+    //! be done using 1 LUT sequence, currently, only applicable to HyperFLASH
+    uint32_t reserved3[2];           //!< [0x048-0x04f] Reserved for future use
+    uint32_t sflashA1Size;           //!< [0x050-0x053] Size of Flash connected to A1
+    uint32_t sflashA2Size;           //!< [0x054-0x057] Size of Flash connected to A2
+    uint32_t sflashB1Size;           //!< [0x058-0x05b] Size of Flash connected to B1
+    uint32_t sflashB2Size;           //!< [0x05c-0x05f] Size of Flash connected to B2
+    uint32_t csPadSettingOverride;   //!< [0x060-0x063] CS pad setting override value
+    uint32_t sclkPadSettingOverride; //!< [0x064-0x067] SCK pad setting override value
+    uint32_t dataPadSettingOverride; //!< [0x068-0x06b] data pad setting override value
+    uint32_t dqsPadSettingOverride;  //!< [0x06c-0x06f] DQS pad setting override value
+    uint32_t timeoutInMs;            //!< [0x070-0x073] Timeout threshold for read status command
+    uint32_t commandInterval;        //!< [0x074-0x077] CS deselect interval between two commands
+    uint16_t dataValidTime[2]; //!< [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in terms of 0.1ns
+    uint16_t busyOffset;       //!< [0x07c-0x07d] Busy offset, valid value: 0-31
+    uint16_t busyBitPolarity;  //!< [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device is busy, 1 -
+    //! busy flag is 0 when flash device is busy
+    uint32_t lookupTable[64];           //!< [0x080-0x17f] Lookup table holds Flash command sequences
+    flexspi_lut_seq_t lutCustomSeq[12]; //!< [0x180-0x1af] Customizable LUT Sequences
+    uint32_t reserved4[4];              //!< [0x1b0-0x1bf] Reserved for future use
+} flexspi_mem_config_t;
+
+/*  */
+#define NOR_CMD_INDEX_READ CMD_INDEX_READ               //!< 0
+#define NOR_CMD_INDEX_READSTATUS CMD_INDEX_READSTATUS   //!< 1
+#define NOR_CMD_INDEX_WRITEENABLE CMD_INDEX_WRITEENABLE //!< 2
+#define NOR_CMD_INDEX_ERASESECTOR 3                     //!< 3
+#define NOR_CMD_INDEX_PAGEPROGRAM CMD_INDEX_WRITE       //!< 4
+#define NOR_CMD_INDEX_CHIPERASE 5                       //!< 5
+#define NOR_CMD_INDEX_DUMMY 6                           //!< 6
+#define NOR_CMD_INDEX_ERASEBLOCK 7                      //!< 7
+
+#define NOR_CMD_LUT_SEQ_IDX_READ CMD_LUT_SEQ_IDX_READ //!< 0  READ LUT sequence id in lookupTable stored in config block
+#define NOR_CMD_LUT_SEQ_IDX_READSTATUS \
+    CMD_LUT_SEQ_IDX_READSTATUS //!< 1  Read Status LUT sequence id in lookupTable stored in config block
+#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI \
+    2 //!< 2  Read status DPI/QPI/OPI sequence id in lookupTable stored in config block
+#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE \
+    CMD_LUT_SEQ_IDX_WRITEENABLE //!< 3  Write Enable sequence id in lookupTable stored in config block
+#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI \
+    4 //!< 4  Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block
+#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5 //!< 5  Erase Sector sequence id in lookupTable stored in config block
+#define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 8  //!< 8 Erase Block sequence id in lookupTable stored in config block
+#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM \
+    CMD_LUT_SEQ_IDX_WRITE                //!< 9  Program sequence id in lookupTable stored in config block
+#define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11 //!< 11 Chip Erase sequence in lookupTable id stored in config block
+#define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13 //!< 13 Read SFDP sequence in lookupTable id stored in config block
+#define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD \
+    14 //!< 14 Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block
+#define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD \
+    15 //!< 15 Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config blobk
+
+/*
+ *  Serial NOR configuration block
+ */
+typedef struct _flexspi_nor_config
+{
+    flexspi_mem_config_t memConfig; //!< Common memory configuration info via FlexSPI
+    uint32_t pageSize;              //!< Page size of Serial NOR
+    uint32_t sectorSize;            //!< Sector size of Serial NOR
+    uint8_t ipcmdSerialClkFreq;     //!< Clock frequency for IP command
+    uint8_t isUniformBlockSize;     //!< Sector/Block size is the same
+    uint8_t reserved0[2];           //!< Reserved for future use
+    uint8_t serialNorType;          //!< Serial NOR Flash type: 0/1/2/3
+    uint8_t needExitNoCmdMode;      //!< Need to exit NoCmd mode before other IP command
+    uint8_t halfClkForNonReadCmd;   //!< Half the Serial Clock for non-read command: true/false
+    uint8_t needRestoreNoCmdMode;   //!< Need to Restore NoCmd mode after IP command execution
+    uint32_t blockSize;             //!< Block size
+    uint32_t reserve2[11];          //!< Reserved for future use
+} flexspi_nor_config_t;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* __EVKMIMXRT1011_FLEXSPI_NOR_CONFIG__ */
diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk
index 0642e52e3..e9eeb42f1 100644
--- a/hw/bsp/imxrt/family.mk
+++ b/hw/bsp/imxrt/family.mk
@@ -61,3 +61,8 @@ SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_VARIANT).S
 # For freeRTOS port source
 FREERTOS_PORT = ARM_CM7/r0p1
 
+# UF2 generation, iMXRT need to strip to text only before conversion
+$(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).elf
+	@echo CREATE $@
+	@$(OBJCOPY) -O ihex -R .flash_config -R .ivt $^ $(BUILD)/$(PROJECT)-textonly.hex
+	$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -c -o $@ $(BUILD)/$(PROJECT)-textonly.hex

From 3e86f0532aae522513b5a5acdce71438dcca14fb Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 13 Feb 2023 12:03:04 +0700
Subject: [PATCH 068/691] fix release trigger body

---
 .github/workflows/trigger.yml | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/.github/workflows/trigger.yml b/.github/workflows/trigger.yml
index e434ca238..11e58d86c 100644
--- a/.github/workflows/trigger.yml
+++ b/.github/workflows/trigger.yml
@@ -55,6 +55,5 @@ jobs:
         git push origin ${{ github.event.release.tag_name }}
         
         # Send POST reqwuest to release https://docs.github.com/en/rest/reference/repos#create-a-release
-        bb={{ github.event.release.body }}
-        bb=${bb//\n/\\\n}
+        bb="For release note, please checkout https://github.com/hathach/tinyusb/releases/tag/${{ github.event.release.tag_name }}"
         curl -X POST -H "Authorization: token ${{ secrets.API_TOKEN_GITHUB }}" -H "Accept: application/vnd.github.v3+json" --data '{"tag_name": "${{ github.event.release.tag_name }}", "name": "${{ github.event.release.name }}", "body": "$bb", "draft": ${{ github.event.release.draft }}, "prerelease": ${{ github.event.release.prerelease }}}' https://api.github.com/repos/hathach/tinyusb_src/releases

From 49c621d51058289464abbcea5e7542b12b0a3bf8 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 13 Feb 2023 12:04:33 +0700
Subject: [PATCH 069/691] fix typo

---
 hw/bsp/imxrt/boards/{metro_m7_10111 => metro_m7_1011}/board.h     | 0
 hw/bsp/imxrt/boards/{metro_m7_10111 => metro_m7_1011}/board.mk    | 0
 .../evkmimxrt1010_flexspi_nor_config.c                            | 0
 .../evkmimxrt1010_flexspi_nor_config.h                            | 0
 4 files changed, 0 insertions(+), 0 deletions(-)
 rename hw/bsp/imxrt/boards/{metro_m7_10111 => metro_m7_1011}/board.h (100%)
 rename hw/bsp/imxrt/boards/{metro_m7_10111 => metro_m7_1011}/board.mk (100%)
 rename hw/bsp/imxrt/boards/{metro_m7_10111 => metro_m7_1011}/evkmimxrt1010_flexspi_nor_config.c (100%)
 rename hw/bsp/imxrt/boards/{metro_m7_10111 => metro_m7_1011}/evkmimxrt1010_flexspi_nor_config.h (100%)

diff --git a/hw/bsp/imxrt/boards/metro_m7_10111/board.h b/hw/bsp/imxrt/boards/metro_m7_1011/board.h
similarity index 100%
rename from hw/bsp/imxrt/boards/metro_m7_10111/board.h
rename to hw/bsp/imxrt/boards/metro_m7_1011/board.h
diff --git a/hw/bsp/imxrt/boards/metro_m7_10111/board.mk b/hw/bsp/imxrt/boards/metro_m7_1011/board.mk
similarity index 100%
rename from hw/bsp/imxrt/boards/metro_m7_10111/board.mk
rename to hw/bsp/imxrt/boards/metro_m7_1011/board.mk
diff --git a/hw/bsp/imxrt/boards/metro_m7_10111/evkmimxrt1010_flexspi_nor_config.c b/hw/bsp/imxrt/boards/metro_m7_1011/evkmimxrt1010_flexspi_nor_config.c
similarity index 100%
rename from hw/bsp/imxrt/boards/metro_m7_10111/evkmimxrt1010_flexspi_nor_config.c
rename to hw/bsp/imxrt/boards/metro_m7_1011/evkmimxrt1010_flexspi_nor_config.c
diff --git a/hw/bsp/imxrt/boards/metro_m7_10111/evkmimxrt1010_flexspi_nor_config.h b/hw/bsp/imxrt/boards/metro_m7_1011/evkmimxrt1010_flexspi_nor_config.h
similarity index 100%
rename from hw/bsp/imxrt/boards/metro_m7_10111/evkmimxrt1010_flexspi_nor_config.h
rename to hw/bsp/imxrt/boards/metro_m7_1011/evkmimxrt1010_flexspi_nor_config.h

From fb5fd22c730c58c5049ffb70a785d39f2d3daaba Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 13 Feb 2023 12:29:31 +0700
Subject: [PATCH 070/691] add uf2 linker for metro m7 1011

---
 hw/bsp/imxrt/boards/metro_m7_1011/board.mk | 5 ++++-
 hw/bsp/imxrt/family.c                      | 3 +--
 hw/bsp/imxrt/family.mk                     | 7 ++++---
 3 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/hw/bsp/imxrt/boards/metro_m7_1011/board.mk b/hw/bsp/imxrt/boards/metro_m7_1011/board.mk
index 7f1861ecc..89a459958 100644
--- a/hw/bsp/imxrt/boards/metro_m7_1011/board.mk
+++ b/hw/bsp/imxrt/boards/metro_m7_1011/board.mk
@@ -1,6 +1,9 @@
 CFLAGS += -DCPU_MIMXRT1011DAE5A -DCFG_EXAMPLE_VIDEO_READONLY
 MCU_VARIANT = MIMXRT1011
 
+# LD file with uf2
+LD_FILE = $(BOARD_PATH)/$(BOARD).ld
+
 # For flash-jlink target
 JLINK_DEVICE = MIMXRT1011DAE5A
 
@@ -8,7 +11,7 @@ JLINK_DEVICE = MIMXRT1011DAE5A
 PYOCD_TARGET = mimxrt1010
 
 # flash using pyocd
-flash: flash-pyocd
+flash: flash-uf2
 flash-uf2: $(BUILD)/$(PROJECT).uf2
 	@echo copying $<
 	@$(CP) $< /media/$(USER)/METROM7BOOT
diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c
index ecd18bad3..e28a6174a 100644
--- a/hw/bsp/imxrt/family.c
+++ b/hw/bsp/imxrt/family.c
@@ -57,8 +57,7 @@ void board_init(void)
 {
   // make sure the dcache is on.
 #if defined(__DCACHE_PRESENT) && __DCACHE_PRESENT
-    if (SCB_CCR_DC_Msk != (SCB_CCR_DC_Msk & SCB->CCR))
-        SCB_EnableDCache();
+  if (SCB_CCR_DC_Msk != (SCB_CCR_DC_Msk & SCB->CCR)) SCB_EnableDCache();
 #endif
 
   // Init clock
diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk
index e9eeb42f1..99bb0a0f7 100644
--- a/hw/bsp/imxrt/family.mk
+++ b/hw/bsp/imxrt/family.mk
@@ -28,7 +28,7 @@ CFLAGS += -Wno-error=unused-parameter -Wno-error=implicit-fallthrough -Wno-error
 MCU_DIR = $(SDK_DIR)/devices/$(MCU_VARIANT)
 
 # All source paths should be relative to the top level.
-LD_FILE = $(MCU_DIR)/gcc/$(MCU_VARIANT)xxxxx_flexspi_nor.ld
+LD_FILE ?= $(MCU_DIR)/gcc/$(MCU_VARIANT)xxxxx_flexspi_nor.ld
 
 # TODO for net_lwip_webserver example, but may not needed !! 
 LDFLAGS += \
@@ -62,7 +62,8 @@ SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_VARIANT).S
 FREERTOS_PORT = ARM_CM7/r0p1
 
 # UF2 generation, iMXRT need to strip to text only before conversion
+APPLICATION_ADDR = 0x6000C000
 $(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).elf
 	@echo CREATE $@
-	@$(OBJCOPY) -O ihex -R .flash_config -R .ivt $^ $(BUILD)/$(PROJECT)-textonly.hex
-	$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -c -o $@ $(BUILD)/$(PROJECT)-textonly.hex
+	@$(OBJCOPY) -O binary -R .flash_config -R .ivt $^ $(BUILD)/$(PROJECT)-textonly.bin
+	$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -b $(APPLICATION_ADDR) -c -o $@ $(BUILD)/$(PROJECT)-textonly.bin

From fbf99b8e53d05cdc7c79dd2397320f71a393e4b9 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 13 Feb 2023 13:33:03 +0700
Subject: [PATCH 071/691] forget to add metro 1011 linker

---
 .../boards/metro_m7_1011/metro_m7_1011.ld     | 270 ++++++++++++++++++
 1 file changed, 270 insertions(+)
 create mode 100644 hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.ld

diff --git a/hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.ld b/hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.ld
new file mode 100644
index 000000000..30dd84373
--- /dev/null
+++ b/hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.ld
@@ -0,0 +1,270 @@
+/*
+** ###################################################################
+**     Processors:          MIMXRT1011CAE4A
+**                          MIMXRT1011DAE5A
+**
+**     Compiler:            GNU C Compiler
+**     Reference manual:    IMXRT1010RM Rev.0, 09/2019
+**     Version:             rev. 1.0, 2019-08-01
+**     Build:               b210709
+**
+**     Abstract:
+**         Linker file for the GNU C Compiler
+**
+**     Copyright 2016 Freescale Semiconductor, Inc.
+**     Copyright 2016-2021 NXP
+**     All rights reserved.
+**
+**     SPDX-License-Identifier: BSD-3-Clause
+**
+**     http:                 www.nxp.com
+**     mail:                 support@nxp.com
+**
+** ###################################################################
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x0400;
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
+VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x00000400 : 0;
+
+/* Specify the memory areas */
+MEMORY
+{
+  m_flash_config        (RX)  : ORIGIN = 0x60000400, LENGTH = 0x00000C00
+  m_ivt                 (RX)  : ORIGIN = 0x60001000, LENGTH = 0x00001000
+  
+  m_interrupts          (RX)  : ORIGIN = 0x6000C000, LENGTH = 0x00000400
+  m_text                (RX)  : ORIGIN = 0x6000C400, LENGTH = (8*1024*1024 - 0xC400)
+  m_qacode              (RX)  : ORIGIN = 0x00000000, LENGTH = 0x00008000
+  m_data                (RW)  : ORIGIN = 0x20000000, LENGTH = 0x00008000
+  m_data2               (RW)  : ORIGIN = 0x20200000, LENGTH = 0x00010000
+}
+
+/* Define output sections */
+SECTIONS
+{
+  __NCACHE_REGION_START = ORIGIN(m_data2);
+  __NCACHE_REGION_SIZE  = 0;
+
+  .flash_config :
+  {
+    . = ALIGN(4);
+    __FLASH_BASE = .;
+    KEEP(* (.boot_hdr.conf))     /* flash config section */
+    . = ALIGN(4);
+  } > m_flash_config
+
+  ivt_begin = ORIGIN(m_flash_config) + LENGTH(m_flash_config);
+
+  .ivt : AT(ivt_begin)
+  {
+    . = ALIGN(4);
+    KEEP(* (.boot_hdr.ivt))           /* ivt section */
+    KEEP(* (.boot_hdr.boot_data))     /* boot section */
+    KEEP(* (.boot_hdr.dcd_data))      /* dcd section */
+    . = ALIGN(4);
+  } > m_ivt
+
+  /* The startup code goes first into internal RAM */
+  .interrupts :
+  {
+    __VECTOR_TABLE = .;
+    __Vectors = .;
+    . = ALIGN(4);
+    KEEP(*(.isr_vector))     /* Startup code */
+    . = ALIGN(4);
+  } > m_interrupts
+
+  /* The program code and other data goes into internal RAM */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)                 /* .text sections (code) */
+    *(.text*)                /* .text* sections (code) */
+    *(.rodata)               /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)              /* .rodata* sections (constants, strings, etc.) */
+    *(.glue_7)               /* glue arm to thumb code */
+    *(.glue_7t)              /* glue thumb to arm code */
+    *(.eh_frame)
+    KEEP (*(.init))
+    KEEP (*(.fini))
+    . = ALIGN(4);
+  } > m_text
+
+  .ARM.extab :
+  {
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+  } > m_text
+
+  .ARM :
+  {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } > m_text
+
+ .ctors :
+  {
+    __CTOR_LIST__ = .;
+    /* gcc uses crtbegin.o to find the start of
+       the constructors, so we make sure it is
+       first.  Because this is a wildcard, it
+       doesn't matter if the user does not
+       actually link against crtbegin.o; the
+       linker won't look for a file to match a
+       wildcard.  The wildcard also means that it
+       doesn't matter which directory crtbegin.o
+       is in.  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*crtbegin?.o(.ctors))
+    /* We don't want to include the .ctor section from
+       from the crtend.o file until after the sorted ctors.
+       The .ctor section from the crtend file contains the
+       end of ctors marker and it must be last */
+    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    __CTOR_END__ = .;
+  } > m_text
+
+  .dtors :
+  {
+    __DTOR_LIST__ = .;
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*crtbegin?.o(.dtors))
+    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    __DTOR_END__ = .;
+  } > m_text
+
+  .preinit_array :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } > m_text
+
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } > m_text
+
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } > m_text
+
+  __etext = .;    /* define a global symbol at end of code */
+  __DATA_ROM = .; /* Symbol is used by startup for data initialization */
+
+  .interrupts_ram :
+  {
+    . = ALIGN(4);
+    __VECTOR_RAM__ = .;
+    __interrupts_ram_start__ = .; /* Create a global symbol at data start */
+    *(.m_interrupts_ram)     /* This is a user defined section */
+    . += VECTOR_RAM_SIZE;
+    . = ALIGN(4);
+    __interrupts_ram_end__ = .; /* Define a global symbol at data end */
+  } > m_data
+
+  __VECTOR_RAM = DEFINED(__ram_vector_table__) ? __VECTOR_RAM__ : ORIGIN(m_interrupts);
+  __RAM_VECTOR_TABLE_SIZE_BYTES = DEFINED(__ram_vector_table__) ? (__interrupts_ram_end__ - __interrupts_ram_start__) : 0x0;
+
+  .data : AT(__DATA_ROM)
+  {
+    . = ALIGN(4);
+    __DATA_RAM = .;
+    __data_start__ = .;      /* create a global symbol at data start */
+    *(m_usb_dma_init_data)
+    *(.data)                 /* .data sections */
+    *(.data*)                /* .data* sections */
+    *(DataQuickAccess)       /* quick access data section */
+    KEEP(*(.jcr*))
+    . = ALIGN(4);
+    __data_end__ = .;        /* define a global symbol at data end */
+  } > m_data
+
+  __ram_function_flash_start = __DATA_ROM + (__data_end__ - __data_start__); /* Symbol is used by startup for TCM data initialization */
+
+  .ram_function : AT(__ram_function_flash_start)
+  {
+    . = ALIGN(32);
+    __ram_function_start__ = .;
+    *(CodeQuickAccess)
+    . = ALIGN(128);
+    __ram_function_end__ = .;
+  } > m_qacode
+
+  __NDATA_ROM = __ram_function_flash_start + (__ram_function_end__ - __ram_function_start__);
+  .ncache.init : AT(__NDATA_ROM)
+  {
+    __noncachedata_start__ = .;   /* create a global symbol at ncache data start */
+    *(NonCacheable.init)
+    . = ALIGN(4);
+    __noncachedata_init_end__ = .;   /* create a global symbol at initialized ncache data end */
+  } > m_data
+  . = __noncachedata_init_end__;
+  .ncache :
+  {
+    *(NonCacheable)
+    . = ALIGN(4);
+    __noncachedata_end__ = .;     /* define a global symbol at ncache data end */
+  } > m_data
+
+  __DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__);
+  text_end = ORIGIN(m_text) + LENGTH(m_text);
+  ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
+
+  /* Uninitialized data section */
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    . = ALIGN(4);
+    __START_BSS = .;
+    __bss_start__ = .;
+    *(m_usb_dma_noninit_data)
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+    . = ALIGN(4);
+    __bss_end__ = .;
+    __END_BSS = .;
+  } > m_data
+
+  .heap :
+  {
+    . = ALIGN(8);
+    __end__ = .;
+    PROVIDE(end = .);
+    __HeapBase = .;
+    . += HEAP_SIZE;
+    __HeapLimit = .;
+    __heap_limit = .; /* Add for _sbrk */
+  } > m_data
+
+  .stack :
+  {
+    . = ALIGN(8);
+    . += STACK_SIZE;
+  } > m_data
+
+  /* Initializes stack on the end of block */
+  __StackTop   = ORIGIN(m_data) + LENGTH(m_data);
+  __StackLimit = __StackTop - STACK_SIZE;
+  PROVIDE(__stack = __StackTop);
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+
+  ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
+}

From 95acf3960d343b3b8c1c52b1f7a1472885b968bd Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 14 Feb 2023 16:11:33 +0700
Subject: [PATCH 072/691] update pico-pio-usb to include data pid fix (0.5.1)

---
 hw/mcu/raspberry_pi/Pico-PIO-USB | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/mcu/raspberry_pi/Pico-PIO-USB b/hw/mcu/raspberry_pi/Pico-PIO-USB
index 52805e6d9..9ff3f52fd 160000
--- a/hw/mcu/raspberry_pi/Pico-PIO-USB
+++ b/hw/mcu/raspberry_pi/Pico-PIO-USB
@@ -1 +1 @@
-Subproject commit 52805e6d92556e67d3738bd8fb10227a45b13a08
+Subproject commit 9ff3f52fd3c1f81532bce8dd311aa8fc8d9b2665

From fde757711785670a005095454cc0b06129f8ae80 Mon Sep 17 00:00:00 2001
From: rppicomidi <rppicomidi@gmail.com>
Date: Wed, 15 Feb 2023 20:02:12 -0800
Subject: [PATCH 073/691] Fix issue 1909

---
 src/class/midi/midi_device.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/src/class/midi/midi_device.c b/src/class/midi/midi_device.c
index de41706e8..eb1a770dd 100644
--- a/src/class/midi/midi_device.c
+++ b/src/class/midi/midi_device.c
@@ -261,11 +261,11 @@ uint32_t tud_midi_n_stream_write(uint8_t itf, uint8_t cable_num, uint8_t const*
       stream->buffer[1] = data;
 
       // Check to see if we're still in a SysEx transmit.
-      if ( stream->buffer[0] == MIDI_CIN_SYSEX_START )
+      if ( ((stream->buffer[0]) & 0xF) == MIDI_CIN_SYSEX_START )
       {
         if ( data == MIDI_STATUS_SYSEX_END )
         {
-          stream->buffer[0] = MIDI_CIN_SYSEX_END_1BYTE;
+          stream->buffer[0] = (uint8_t) ((cable_num << 4) | MIDI_CIN_SYSEX_END_1BYTE);
           stream->total = 2;
         }
         else
@@ -308,6 +308,7 @@ uint32_t tud_midi_n_stream_write(uint8_t itf, uint8_t cable_num, uint8_t const*
           stream->buffer[0] = MIDI_CIN_SYSEX_END_1BYTE;
           stream->total = 2;
         }
+        stream->buffer[0] |= (uint8_t)(cable_num << 4);
       }
       else
       {
@@ -328,9 +329,9 @@ uint32_t tud_midi_n_stream_write(uint8_t itf, uint8_t cable_num, uint8_t const*
       stream->index++;
 
       // See if this byte ends a SysEx.
-      if ( stream->buffer[0] == MIDI_CIN_SYSEX_START && data == MIDI_STATUS_SYSEX_END )
+      if ( (stream->buffer[0] & 0xF) == MIDI_CIN_SYSEX_START && data == MIDI_STATUS_SYSEX_END )
       {
-        stream->buffer[0] = MIDI_CIN_SYSEX_START + (stream->index - 1);
+        stream->buffer[0] = (uint8_t) ((cable_num << 4) | (MIDI_CIN_SYSEX_START + (stream->index - 1)));
         stream->total = stream->index;
       }
     }

From d367e8f8a8acd82c89ba3c029495b9404c3b7fdb Mon Sep 17 00:00:00 2001
From: Ryzee119 <wendland@live.com.au>
Date: Sat, 4 Jun 2022 13:44:22 +0930
Subject: [PATCH 074/691] ohci: Expand roothub descriptors into unions

---
 src/portable/ohci/ohci.h | 23 +++++++++++++++++++++--
 1 file changed, 21 insertions(+), 2 deletions(-)

diff --git a/src/portable/ohci/ohci.h b/src/portable/ohci/ohci.h
index f40ae24cc..c42db141a 100644
--- a/src/portable/ohci/ohci.h
+++ b/src/portable/ohci/ohci.h
@@ -230,8 +230,27 @@ typedef volatile struct
   uint32_t periodic_start;
   uint32_t lowspeed_threshold;
 
-  uint32_t rh_descriptorA;
-  uint32_t rh_descriptorB;
+  union {
+    uint32_t rh_descriptorA;
+    struct {
+      uint32_t number_downstream_ports     : 8;
+      uint32_t power_switching_mode        : 1;
+      uint32_t no_power_switching          : 1;
+      uint32_t device_type                 : 1;
+      uint32_t overcurrent_protection_mode : 1;
+      uint32_t no_over_current_protection  : 1;
+      uint32_t reserved                    : 11;
+      uint32_t power_on_to_good_time       : 8;
+    } rh_descriptorA_bit;
+  };
+
+  union {
+    uint32_t rh_descriptorB;
+    struct {
+      uint32_t device_removable        : 16;
+      uint32_t port_power_control_mask : 16;
+    } rh_descriptorB_bit;
+  };
 
   union {
     uint32_t rh_status;

From c820c8769267644af049e0be73b04b45d57e8d98 Mon Sep 17 00:00:00 2001
From: Ryzee119 <wendland@live.com.au>
Date: Sat, 4 Jun 2022 13:47:02 +0930
Subject: [PATCH 075/691] ohci: Support configurable number of roothub ports

---
 src/common/tusb_mcu.h    |  1 +
 src/portable/ohci/ohci.c | 43 ++++++++++++++++++++++------------------
 src/portable/ohci/ohci.h |  6 +++---
 3 files changed, 28 insertions(+), 22 deletions(-)

diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 0b10c5118..ee2b896ac 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -55,6 +55,7 @@
 #elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
   #define TUP_DCD_ENDPOINT_MAX    16
   #define TUP_USBIP_OHCI
+  #define OHCI_RHPORTS            2
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
   // TODO USB0 has 6, USB1 has 4
diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index 228da6ae0..45600c03b 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -28,6 +28,10 @@
 
 #if CFG_TUH_ENABLED && defined(TUP_USBIP_OHCI)
 
+#ifndef OHCI_RHPORTS
+#error  OHCI is enabled, but OHCI_RHPORTS is not defined.
+#endif
+
 //--------------------------------------------------------------------+
 // INCLUDE
 //--------------------------------------------------------------------+
@@ -620,29 +624,30 @@ void hcd_int_handler(uint8_t hostid)
   //------------- RootHub status -------------//
   if ( int_status & OHCI_INT_RHPORT_STATUS_CHANGE_MASK )
   {
-    uint32_t const rhport_status = OHCI_REG->rhport_status[0] & RHPORT_ALL_CHANGE_MASK;
-
-    // TODO dual port is not yet supported
-    if ( rhport_status & RHPORT_CONNECT_STATUS_CHANGE_MASK )
+    for (int i = 0; i < OHCI_RHPORTS; i++)
     {
-      // TODO check if remote wake-up
-      if ( OHCI_REG->rhport_status_bit[0].current_connect_status )
+      uint32_t const rhport_status = OHCI_REG->rhport_status[i] & RHPORT_ALL_CHANGE_MASK;
+      if ( rhport_status & RHPORT_CONNECT_STATUS_CHANGE_MASK )
       {
-        // TODO reset port immediately, without this controller will got 2-3 (debouncing connection status change)
-        OHCI_REG->rhport_status[0] = RHPORT_PORT_RESET_STATUS_MASK;
-        hcd_event_device_attach(hostid, true);
-      }else
-      {
-        hcd_event_device_remove(hostid, true);
+        // TODO check if remote wake-up
+        if ( OHCI_REG->rhport_status_bit[i].current_connect_status )
+        {
+          // TODO reset port immediately, without this controller will got 2-3 (debouncing connection status change)
+          OHCI_REG->rhport_status[i] = RHPORT_PORT_RESET_STATUS_MASK;
+          hcd_event_device_attach(i, true);
+        }else
+        {
+          hcd_event_device_remove(i, true);
+        }
       }
+
+      if ( rhport_status & RHPORT_PORT_SUSPEND_CHANGE_MASK)
+      {
+
+      }
+
+      OHCI_REG->rhport_status[i] = rhport_status; // acknowledge all interrupt
     }
-
-    if ( rhport_status & RHPORT_PORT_SUSPEND_CHANGE_MASK)
-    {
-
-    }
-
-    OHCI_REG->rhport_status[0] = rhport_status; // acknowledge all interrupt
   }
 
   //------------- Transfer Complete -------------//
diff --git a/src/portable/ohci/ohci.h b/src/portable/ohci/ohci.h
index c42db141a..b7706b636 100644
--- a/src/portable/ohci/ohci.h
+++ b/src/portable/ohci/ohci.h
@@ -267,7 +267,7 @@ typedef volatile struct
   };
 
   union {
-    uint32_t rhport_status[2]; // TODO NXP OHCI controller only has 2 ports
+    uint32_t rhport_status[OHCI_RHPORTS];
     struct {
       uint32_t current_connect_status             : 1;
       uint32_t port_enable_status                 : 1;
@@ -284,11 +284,11 @@ typedef volatile struct
       uint32_t port_over_current_indicator_change : 1;
       uint32_t port_reset_status_change           : 1;
       uint32_t TU_RESERVED                        : 11;
-    }rhport_status_bit[2];
+    }rhport_status_bit[OHCI_RHPORTS];
   };
 }ohci_registers_t;
 
-TU_VERIFY_STATIC( sizeof(ohci_registers_t) == 0x5c, "size is not correct");
+TU_VERIFY_STATIC( sizeof(ohci_registers_t) == (0x54 + (4 * OHCI_RHPORTS)), "size is not correct");
 
 #ifdef __cplusplus
  }

From d5e6d028171a38e435ac1ab7c18ae5615f8af5cf Mon Sep 17 00:00:00 2001
From: Ryzee119 <wendland@live.com.au>
Date: Sat, 4 Jun 2022 14:06:23 +0930
Subject: [PATCH 076/691] ohci: Leave SMM or bios mode during init

---
 src/portable/ohci/ohci.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index 45600c03b..364f61cf1 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -177,6 +177,22 @@ bool hcd_init(uint8_t rhport)
   ohci_data.bulk_head_ed.skip   = 1;
   ohci_data.period_head_ed.skip = 1;
 
+  //If OHCI hardware is in SMM mode, gain ownership (Ref OHCI spec 5.1.1.3.3)
+  if (OHCI_REG->control_bit.interrupt_routing == 1)
+  {
+    OHCI_REG->command_status_bit.ownership_change_request = 1;
+    while (OHCI_REG->control_bit.interrupt_routing == 1) {}
+  }
+
+  //If OHCI hardware has come from warm-boot, signal resume (Ref OHCI spec 5.1.1.3.4)
+  else if (OHCI_REG->control_bit.hc_functional_state != OHCI_CONTROL_FUNCSTATE_RESET &&
+           OHCI_REG->control_bit.hc_functional_state != OHCI_CONTROL_FUNCSTATE_OPERATIONAL)
+  {
+    //Wait 20 ms. (Ref Usb spec 7.1.7.7)
+    OHCI_REG->control_bit.hc_functional_state = OHCI_CONTROL_FUNCSTATE_RESUME;
+    osal_task_delay(20);
+  }
+
   // reset controller
   OHCI_REG->command_status_bit.controller_reset = 1;
   while( OHCI_REG->command_status_bit.controller_reset ) {} // should not take longer than 10 us

From 2063ee5f1592979cc858b748aff51dba7cb3bcd5 Mon Sep 17 00:00:00 2001
From: Ryzee119 <wendland@live.com.au>
Date: Sat, 4 Jun 2022 14:09:21 +0930
Subject: [PATCH 077/691] ohci: Toggle frameinterval bit on update

---
 src/portable/ohci/ohci.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index 364f61cf1..cf6cff364 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -212,6 +212,7 @@ bool hcd_init(uint8_t rhport)
        OHCI_CONTROL_LIST_BULK_ENABLE_MASK | OHCI_CONTROL_LIST_PERIODIC_ENABLE_MASK; // TODO Isochronous
 
   OHCI_REG->frame_interval = (OHCI_FMINTERVAL_FSMPS << 16) | OHCI_FMINTERVAL_FI;
+  OHCI_REG->frame_interval ^= (1 << 31); //Must toggle when frame_interval is updated.
   OHCI_REG->periodic_start = (OHCI_FMINTERVAL_FI * 9) / 10; // Periodic start is 90% of frame interval
 
   OHCI_REG->control_bit.hc_functional_state = OHCI_CONTROL_FUNCSTATE_OPERATIONAL; // make HC's state to operational state TODO use this to suspend (save power)

From c1d0fd1bd747bfc4881ecf69bc60fbcb106a7afd Mon Sep 17 00:00:00 2001
From: Ryzee119 <wendland@live.com.au>
Date: Sat, 4 Jun 2022 14:11:34 +0930
Subject: [PATCH 078/691] ohci: Wait POTG time after port power

---
 src/portable/ohci/ohci.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index cf6cff364..0a715a962 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -217,6 +217,7 @@ bool hcd_init(uint8_t rhport)
 
   OHCI_REG->control_bit.hc_functional_state = OHCI_CONTROL_FUNCSTATE_OPERATIONAL; // make HC's state to operational state TODO use this to suspend (save power)
   OHCI_REG->rh_status_bit.local_power_status_change = 1; // set global power for ports
+  osal_task_delay(OHCI_REG->rh_descriptorA_bit.power_on_to_good_time * 2); // Wait POTG after power up
 
   return true;
 }

From 5d3c0fb922604989e7f7e7f628fe43553ac78df7 Mon Sep 17 00:00:00 2001
From: Ryzee119 <wendland@live.com.au>
Date: Sat, 4 Jun 2022 14:14:53 +0930
Subject: [PATCH 079/691] ohci: Force reset of devices already connected on
 power up

---
 src/portable/ohci/ohci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index 0a715a962..85795c5b4 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -208,7 +208,7 @@ bool hcd_init(uint8_t rhport)
       OHCI_INT_UNRECOVERABLE_ERROR_MASK | OHCI_INT_FRAME_OVERFLOW_MASK | OHCI_INT_RHPORT_STATUS_CHANGE_MASK |
       OHCI_INT_MASTER_ENABLE_MASK;
 
-  OHCI_REG->control |= OHCI_CONTROL_CONTROL_BULK_RATIO | OHCI_CONTROL_LIST_CONTROL_ENABLE_MASK |
+  OHCI_REG->control = OHCI_CONTROL_CONTROL_BULK_RATIO | OHCI_CONTROL_LIST_CONTROL_ENABLE_MASK |
        OHCI_CONTROL_LIST_BULK_ENABLE_MASK | OHCI_CONTROL_LIST_PERIODIC_ENABLE_MASK; // TODO Isochronous
 
   OHCI_REG->frame_interval = (OHCI_FMINTERVAL_FSMPS << 16) | OHCI_FMINTERVAL_FI;

From e89e8ba392dae795663169d02952116b3f3980f3 Mon Sep 17 00:00:00 2001
From: Ryzee119 <wendland@live.com.au>
Date: Sat, 4 Jun 2022 14:18:53 +0930
Subject: [PATCH 080/691] ohci: Direct port commands to the correct rhport.

---
 src/portable/ohci/ohci.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index 85795c5b4..b0c6bb63c 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -234,8 +234,7 @@ uint32_t hcd_frame_number(uint8_t rhport)
 //--------------------------------------------------------------------+
 void hcd_port_reset(uint8_t hostid)
 {
-  (void) hostid;
-  OHCI_REG->rhport_status[0] = RHPORT_PORT_RESET_STATUS_MASK;
+  OHCI_REG->rhport_status[hostid] = RHPORT_PORT_RESET_STATUS_MASK;
 }
 
 void hcd_port_reset_end(uint8_t rhport)
@@ -245,14 +244,12 @@ void hcd_port_reset_end(uint8_t rhport)
 
 bool hcd_port_connect_status(uint8_t hostid)
 {
-  (void) hostid;
-  return OHCI_REG->rhport_status_bit[0].current_connect_status;
+  return OHCI_REG->rhport_status_bit[hostid].current_connect_status;
 }
 
 tusb_speed_t hcd_port_speed_get(uint8_t hostid)
 {
-  (void) hostid;
-  return OHCI_REG->rhport_status_bit[0].low_speed_device_attached ? TUSB_SPEED_LOW : TUSB_SPEED_FULL;
+  return OHCI_REG->rhport_status_bit[hostid].low_speed_device_attached ? TUSB_SPEED_LOW : TUSB_SPEED_FULL;
 }
 
 // endpoints are tied to an address, which only reclaim after a long delay when enumerating

From cc9c3feeaee69b369aea4fb4f70e4f0fb1033990 Mon Sep 17 00:00:00 2001
From: Ryan Wendland <wendland@live.com.au>
Date: Sat, 4 Jun 2022 22:40:06 +0930
Subject: [PATCH 081/691] ohci: Fix bug in ed removal

---
 src/portable/ohci/ohci.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index b0c6bb63c..59ffd2725 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -383,6 +383,7 @@ static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr)
       // point the removed ED's next pointer to list head to make sure HC can always safely move away from this ED
       ed->next = (uint32_t) p_head;
       ed->used = 0;
+      continue;
     }
 
     // check next valid since we could remove it

From f87262185ec64e6ad616972720a72ffed65708ac Mon Sep 17 00:00:00 2001
From: Ryan Wendland <wendland@live.com.au>
Date: Sat, 4 Jun 2022 22:49:07 +0930
Subject: [PATCH 082/691] ohci: Set skip on ed prior to removal

---
 src/portable/ohci/ohci.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index 59ffd2725..d51b9a883 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -377,12 +377,16 @@ static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr)
 
     if (ed->dev_addr == dev_addr)
     {
+      //Prevent Host Controller from processing this ED while we remove it
+      ed->skip = 1;
+
       // unlink ed
       p_prev->next = ed->next;
 
       // point the removed ED's next pointer to list head to make sure HC can always safely move away from this ED
       ed->next = (uint32_t) p_head;
       ed->used = 0;
+      ed->skip = 0;
       continue;
     }
 

From f2a6af05b1cd7c298e6781e4374d744e2625c63f Mon Sep 17 00:00:00 2001
From: Ryan Wendland <wendland@live.com.au>
Date: Thu, 9 Jun 2022 08:32:49 +0930
Subject: [PATCH 083/691] ohci: Add ability to separate physical and virtual
 memory

---
 src/portable/ohci/ohci.c | 51 ++++++++++++++++++++++++++--------------
 1 file changed, 34 insertions(+), 17 deletions(-)

diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index d51b9a883..d85550d80 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -161,6 +161,22 @@ static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr);
 //--------------------------------------------------------------------+
 // USBH-HCD API
 //--------------------------------------------------------------------+
+
+//If your system requires separation of virtual and physical memory, implement
+//tuh_get_phys_addr and tuh_get_virt_addr in your application.
+TU_ATTR_WEAK void *tuh_get_phys_addr(void *virtual_address);
+TU_ATTR_WEAK void *tuh_get_virt_addr(void *physical_address);
+TU_ATTR_ALWAYS_INLINE static void *_phys_addr(void *virtual_address)
+{
+  if (tuh_get_phys_addr) return tuh_get_phys_addr(virtual_address);
+  return virtual_address;
+}
+TU_ATTR_ALWAYS_INLINE static void *_virt_addr(void *physical_address)
+{
+  if (tuh_get_virt_addr) return tuh_get_virt_addr(physical_address);
+  return physical_address;
+}
+
 // Initialization according to 5.1.1.4
 bool hcd_init(uint8_t rhport)
 {
@@ -170,7 +186,7 @@ bool hcd_init(uint8_t rhport)
   tu_memclr(&ohci_data, sizeof(ohci_data_t));
   for(uint8_t i=0; i<32; i++)
   { // assign all interrupt pointers to period head ed
-    ohci_data.hcca.interrupt_table[i] = (uint32_t) &ohci_data.period_head_ed;
+    ohci_data.hcca.interrupt_table[i] = (uint32_t) _phys_addr(&ohci_data.period_head_ed);
   }
 
   ohci_data.control[0].ed.skip  = 1;
@@ -198,9 +214,9 @@ bool hcd_init(uint8_t rhport)
   while( OHCI_REG->command_status_bit.controller_reset ) {} // should not take longer than 10 us
 
   //------------- init ohci registers -------------//
-  OHCI_REG->control_head_ed = (uint32_t) &ohci_data.control[0].ed;
-  OHCI_REG->bulk_head_ed    = (uint32_t) &ohci_data.bulk_head_ed;
-  OHCI_REG->hcca            = (uint32_t) &ohci_data.hcca;
+  OHCI_REG->control_head_ed = (uint32_t) _phys_addr(&ohci_data.control[0].ed);
+  OHCI_REG->bulk_head_ed    = (uint32_t) _phys_addr(&ohci_data.bulk_head_ed);
+  OHCI_REG->hcca            = (uint32_t) _phys_addr(&ohci_data.hcca);
 
   OHCI_REG->interrupt_disable = OHCI_REG->interrupt_enable; // disable all interrupts
   OHCI_REG->interrupt_status  = OHCI_REG->interrupt_status; // clear current set bits
@@ -327,8 +343,8 @@ static void gtd_init(ohci_gtd_t* p_td, uint8_t* data_ptr, uint16_t total_bytes)
   p_td->delay_interrupt        = OHCI_INT_ON_COMPLETE_NO;
   p_td->condition_code         = OHCI_CCODE_NOT_ACCESSED;
 
-  p_td->current_buffer_pointer = data_ptr;
-  p_td->buffer_end             = total_bytes ? (data_ptr + total_bytes-1) : data_ptr;
+  p_td->current_buffer_pointer = _phys_addr(data_ptr);
+  p_td->buffer_end             = total_bytes ? (_phys_addr(data_ptr + total_bytes - 1)) : (uint8_t *)p_td->current_buffer_pointer;
 }
 
 static ohci_ed_t * ed_from_addr(uint8_t dev_addr, uint8_t ep_addr)
@@ -364,7 +380,7 @@ static ohci_ed_t * ed_find_free(void)
 static void ed_list_insert(ohci_ed_t * p_pre, ohci_ed_t * p_ed)
 {
   p_ed->next = p_pre->next;
-  p_pre->next = (uint32_t) p_ed;
+  p_pre->next = (uint32_t) _phys_addr(p_ed);
 }
 
 static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr)
@@ -373,7 +389,7 @@ static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr)
 
   while( p_prev->next )
   {
-    ohci_ed_t* ed = (ohci_ed_t*) p_prev->next;
+    ohci_ed_t* ed = (ohci_ed_t*) _virt_addr((void *)p_prev->next);
 
     if (ed->dev_addr == dev_addr)
     {
@@ -384,14 +400,14 @@ static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr)
       p_prev->next = ed->next;
 
       // point the removed ED's next pointer to list head to make sure HC can always safely move away from this ED
-      ed->next = (uint32_t) p_head;
+      ed->next = (uint32_t) _phys_addr(p_head);
       ed->used = 0;
       ed->skip = 0;
       continue;
     }
 
     // check next valid since we could remove it
-    if (p_prev->next) p_prev = (ohci_ed_t*) p_prev->next;
+    if (p_prev->next) p_prev = (ohci_ed_t*) _virt_addr((void *)p_prev->next);
   }
 }
 
@@ -410,11 +426,11 @@ static void td_insert_to_ed(ohci_ed_t* p_ed, ohci_gtd_t * p_gtd)
   // tail is always NULL
   if ( tu_align16(p_ed->td_head.address) == 0 )
   { // TD queue is empty --> head = TD
-    p_ed->td_head.address |= (uint32_t) p_gtd;
+    p_ed->td_head.address |= (uint32_t) _phys_addr(p_gtd);
   }
   else
   { // TODO currently only support queue up to 2 TD each endpoint at a time
-    ((ohci_gtd_t*) tu_align16(p_ed->td_head.address))->next = (uint32_t) p_gtd;
+    ((ohci_gtd_t*) tu_align16((uint32_t)_virt_addr((void *)p_ed->td_head.address)))->next = (uint32_t) _phys_addr(p_gtd);
   }
 }
 
@@ -470,7 +486,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
   qtd->delay_interrupt = 0;
 
   //------------- Attach TDs list to Control Endpoint -------------//
-  ed->td_head.address = (uint32_t) qtd;
+  ed->td_head.address = (uint32_t) _phys_addr(qtd);
 
   OHCI_REG->command_status_bit.control_list_filled = 1;
 
@@ -496,7 +512,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
     gtd->data_toggle     = GTD_DT_DATA1; // Both Data and Ack stage start with DATA1
     gtd->delay_interrupt = 0;
 
-    ed->td_head.address = (uint32_t) gtd;
+    ed->td_head.address = (uint32_t) _phys_addr(gtd);
 
     OHCI_REG->command_status_bit.control_list_filled = 1;
   }else
@@ -544,16 +560,17 @@ static ohci_td_item_t* list_reverse(ohci_td_item_t* td_head)
 
   while(td_head != NULL)
   {
+    td_head = _virt_addr(td_head);
     uint32_t next = td_head->next;
 
     // make current's item become reverse's first item
     td_head->next = (uint32_t) td_reverse_head;
-    td_reverse_head  = td_head;
+    td_reverse_head  = _phys_addr(td_head);
 
     td_head = (ohci_td_item_t*) next; // advance to next item
   }
 
-  return td_reverse_head;
+  return _virt_addr(td_reverse_head);
 }
 
 static inline bool gtd_is_control(ohci_gtd_t const * const p_qtd)
@@ -624,7 +641,7 @@ static void done_queue_isr(uint8_t hostid)
       hcd_event_xfer_complete(ed->dev_addr, tu_edpt_addr(ed->ep_number, dir), xferred_bytes, event, true);
     }
 
-    td_head = (ohci_td_item_t*) td_head->next;
+    td_head = (ohci_td_item_t*) _virt_addr((void *)td_head->next);
   }
 }
 

From 75f6583c1c9ad3e0c2fc9e3427a649edbf765bef Mon Sep 17 00:00:00 2001
From: Ryzee119 <wendland@live.com.au>
Date: Mon, 13 Jun 2022 13:01:41 +0930
Subject: [PATCH 084/691] ohci: Use enum instead of magic number

---
 src/portable/ohci/ohci.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index d85550d80..d16de0cca 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -483,7 +483,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
   qtd->index           = dev_addr;
   qtd->pid             = PID_SETUP;
   qtd->data_toggle     = GTD_DT_DATA0;
-  qtd->delay_interrupt = 0;
+  qtd->delay_interrupt = OHCI_INT_ON_COMPLETE_YES;
 
   //------------- Attach TDs list to Control Endpoint -------------//
   ed->td_head.address = (uint32_t) _phys_addr(qtd);
@@ -510,7 +510,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
     gtd->index           = dev_addr;
     gtd->pid             = dir ? PID_IN : PID_OUT;
     gtd->data_toggle     = GTD_DT_DATA1; // Both Data and Ack stage start with DATA1
-    gtd->delay_interrupt = 0;
+    gtd->delay_interrupt = OHCI_INT_ON_COMPLETE_YES;
 
     ed->td_head.address = (uint32_t) _phys_addr(gtd);
 
@@ -524,7 +524,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
 
     gtd_init(gtd, buffer, buflen);
     gtd->index = ed-ohci_data.ed_pool;
-    gtd->delay_interrupt = 0;
+    gtd->delay_interrupt = OHCI_INT_ON_COMPLETE_YES;
 
     td_insert_to_ed(ed, gtd);
 

From 4e2afdf5e1d72a2232f349a878c3d4147fc43cd6 Mon Sep 17 00:00:00 2001
From: wooyay <7655456+wooyay@users.noreply.github.com>
Date: Tue, 14 Feb 2023 17:03:19 +0000
Subject: [PATCH 085/691] ohci: Disable MIE interrupt during IRQ processing,
 zero HccADoneHead on completion

---
 src/portable/ohci/ohci.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index d16de0cca..76f97844c 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -606,6 +606,7 @@ static void done_queue_isr(uint8_t hostid)
 
   // done head is written in reversed order of completion --> need to reverse the done queue first
   ohci_td_item_t* td_head = list_reverse ( (ohci_td_item_t*) tu_align16(ohci_data.hcca.done_head) );
+  ohci_data.hcca.done_head = 0;
 
   while( td_head != NULL )
   {
@@ -652,6 +653,9 @@ void hcd_int_handler(uint8_t hostid)
 
   if (int_status == 0) return;
 
+  // Disable MIE as per OHCI spec 5.3
+  OHCI_REG->interrupt_disable = OHCI_INT_MASTER_ENABLE_MASK;
+
   // Frame number overflow
   if ( int_status & OHCI_INT_FRAME_OVERFLOW_MASK )
   {
@@ -694,6 +698,8 @@ void hcd_int_handler(uint8_t hostid)
   }
 
   OHCI_REG->interrupt_status = int_status; // Acknowledge handled interrupt
+
+  OHCI_REG->interrupt_enable = OHCI_INT_MASTER_ENABLE_MASK; // Enable MIE
 }
 //--------------------------------------------------------------------+
 // HELPER

From 03ec49450d2109a0e6ede3672e95426fd87aa48f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 22 Feb 2023 11:47:09 +0700
Subject: [PATCH 086/691] rename maros from FUZZ to _FUZZ, change TU_STATIC to
 static _fuzz_thread

---
 .vscode/settings.json            |  3 ---
 src/class/cdc/cdc_device.c       |  2 +-
 src/class/dfu/dfu_device.c       | 14 +++++++-------
 src/class/hid/hid_device.c       |  2 +-
 src/class/msc/msc_device.c       |  8 ++++----
 src/class/net/ecm_rndis_device.c | 17 ++++++++++-------
 src/class/net/ncm_device.c       | 12 ++++++------
 src/class/usbtmc/usbtmc_device.c |  8 ++++----
 src/class/vendor/vendor_device.c |  2 +-
 src/class/vendor/vendor_device.h |  3 +--
 src/class/video/video_device.c   |  8 ++++----
 src/common/tusb_compiler.h       |  6 +++---
 src/common/tusb_debug.h          |  2 +-
 src/common/tusb_types.h          |  4 ++--
 src/device/usbd.c                | 18 +++++++++---------
 src/device/usbd_control.c        |  4 ++--
 test/fuzz/make.mk                |  2 +-
 17 files changed, 57 insertions(+), 58 deletions(-)
 delete mode 100644 .vscode/settings.json

diff --git a/.vscode/settings.json b/.vscode/settings.json
deleted file mode 100644
index 97924983a..000000000
--- a/.vscode/settings.json
+++ /dev/null
@@ -1,3 +0,0 @@
-{
-    "editor.formatOnSave": false
-}
\ No newline at end of file
diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c
index b943c1caf..59ed2a74c 100644
--- a/src/class/cdc/cdc_device.c
+++ b/src/class/cdc/cdc_device.c
@@ -76,7 +76,7 @@ typedef struct
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
-CFG_TUSB_MEM_SECTION TU_STATIC cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
+CFG_TUSB_MEM_SECTION static _fuzz_thread cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
 
 static bool _prep_out_transaction (cdcd_interface_t* p_cdc)
 {
diff --git a/src/class/dfu/dfu_device.c b/src/class/dfu/dfu_device.c
index a318603d3..9e7b8b5b1 100644
--- a/src/class/dfu/dfu_device.c
+++ b/src/class/dfu/dfu_device.c
@@ -56,7 +56,7 @@ typedef struct
 } dfu_state_ctx_t;
 
 // Only a single dfu state is allowed
-CFG_TUSB_MEM_SECTION TU_STATIC dfu_state_ctx_t _dfu_ctx;
+CFG_TUSB_MEM_SECTION static _fuzz_thread dfu_state_ctx_t _dfu_ctx;
 
 static void reset_state(void)
 {
@@ -74,7 +74,7 @@ static bool process_manifest_get_status(uint8_t rhport, uint8_t stage, tusb_cont
 //--------------------------------------------------------------------+
 #if CFG_TUSB_DEBUG >= 2
 
-TU_STATIC tu_lookup_entry_t const _dfu_request_lookup[] =
+static _fuzz_thread tu_lookup_entry_t const _dfu_request_lookup[] =
 {
   { .key = DFU_REQUEST_DETACH         , .data = "DETACH"    },
   { .key = DFU_REQUEST_DNLOAD         , .data = "DNLOAD"    },
@@ -85,13 +85,13 @@ TU_STATIC tu_lookup_entry_t const _dfu_request_lookup[] =
   { .key = DFU_REQUEST_ABORT          , .data = "ABORT"     },
 };
 
-TU_STATIC tu_lookup_table_t const _dfu_request_table =
+static _fuzz_thread tu_lookup_table_t const _dfu_request_table =
 {
   .count = TU_ARRAY_SIZE(_dfu_request_lookup),
   .items = _dfu_request_lookup
 };
 
-TU_STATIC tu_lookup_entry_t const _dfu_state_lookup[] =
+static _fuzz_thread tu_lookup_entry_t const _dfu_state_lookup[] =
 {
   { .key = APP_IDLE                   , .data = "APP_IDLE"                },
   { .key = APP_DETACH                 , .data = "APP_DETACH"              },
@@ -106,13 +106,13 @@ TU_STATIC tu_lookup_entry_t const _dfu_state_lookup[] =
   { .key = DFU_ERROR                  , .data = "ERROR"               },
 };
 
-TU_STATIC tu_lookup_table_t const _dfu_state_table =
+static _fuzz_thread tu_lookup_table_t const _dfu_state_table =
 {
   .count = TU_ARRAY_SIZE(_dfu_state_lookup),
   .items = _dfu_state_lookup
 };
 
-TU_STATIC tu_lookup_entry_t const _dfu_status_lookup[] =
+static _fuzz_thread tu_lookup_entry_t const _dfu_status_lookup[] =
 {
   { .key = DFU_STATUS_OK               , .data = "OK"              },
   { .key = DFU_STATUS_ERR_TARGET       , .data = "errTARGET"       },
@@ -132,7 +132,7 @@ TU_STATIC tu_lookup_entry_t const _dfu_status_lookup[] =
   { .key = DFU_STATUS_ERR_STALLEDPKT   , .data = "errSTALLEDPKT"   },
 };
 
-TU_STATIC tu_lookup_table_t const _dfu_status_table =
+static _fuzz_thread tu_lookup_table_t const _dfu_status_table =
 {
   .count = TU_ARRAY_SIZE(_dfu_status_lookup),
   .items = _dfu_status_lookup
diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c
index c42d1b6de..546c93010 100644
--- a/src/class/hid/hid_device.c
+++ b/src/class/hid/hid_device.c
@@ -58,7 +58,7 @@ typedef struct
   tusb_hid_descriptor_hid_t const * hid_descriptor;
 } hidd_interface_t;
 
-CFG_TUSB_MEM_SECTION TU_STATIC hidd_interface_t _hidd_itf[CFG_TUD_HID];
+CFG_TUSB_MEM_SECTION static _fuzz_thread hidd_interface_t _hidd_itf[CFG_TUD_HID];
 
 /*------------- Helpers -------------*/
 static inline uint8_t get_index_by_itfnum(uint8_t itf_num)
diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c
index bf56ed9bf..e77342777 100644
--- a/src/class/msc/msc_device.c
+++ b/src/class/msc/msc_device.c
@@ -71,8 +71,8 @@ typedef struct
   uint8_t add_sense_qualifier;
 }mscd_interface_t;
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC mscd_interface_t _mscd_itf;
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC uint8_t _mscd_buf[CFG_TUD_MSC_EP_BUFSIZE];
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread mscd_interface_t _mscd_itf;
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread uint8_t _mscd_buf[CFG_TUD_MSC_EP_BUFSIZE];
 
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
@@ -202,7 +202,7 @@ uint8_t rdwr10_validate_cmd(msc_cbw_t const* cbw)
 //--------------------------------------------------------------------+
 #if CFG_TUSB_DEBUG >= 2
 
-TU_ATTR_UNUSED TU_STATIC tu_lookup_entry_t const _msc_scsi_cmd_lookup[] =
+TU_ATTR_UNUSED static _fuzz_thread tu_lookup_entry_t const _msc_scsi_cmd_lookup[] =
 {
   { .key = SCSI_CMD_TEST_UNIT_READY              , .data = "Test Unit Ready" },
   { .key = SCSI_CMD_INQUIRY                      , .data = "Inquiry" },
@@ -217,7 +217,7 @@ TU_ATTR_UNUSED TU_STATIC tu_lookup_entry_t const _msc_scsi_cmd_lookup[] =
   { .key = SCSI_CMD_WRITE_10                     , .data = "Write10" }
 };
 
-TU_ATTR_UNUSED TU_STATIC tu_lookup_table_t const _msc_scsi_cmd_table =
+TU_ATTR_UNUSED static _fuzz_thread tu_lookup_table_t const _msc_scsi_cmd_table =
 {
   .count = TU_ARRAY_SIZE(_msc_scsi_cmd_lookup),
   .items = _msc_scsi_cmd_lookup
diff --git a/src/class/net/ecm_rndis_device.c b/src/class/net/ecm_rndis_device.c
index 560e1768d..e2a57cb50 100644
--- a/src/class/net/ecm_rndis_device.c
+++ b/src/class/net/ecm_rndis_device.c
@@ -61,8 +61,11 @@ typedef struct
 #define CFG_TUD_NET_PACKET_PREFIX_LEN sizeof(rndis_data_packet_t)
 #define CFG_TUD_NET_PACKET_SUFFIX_LEN 0
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC uint8_t received[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN];
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC uint8_t transmitted[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN];
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread 
+uint8_t received[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN];
+
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread 
+uint8_t transmitted[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN];
 
 struct ecm_notify_struct
 {
@@ -70,7 +73,7 @@ struct ecm_notify_struct
   uint32_t downlink, uplink;
 };
 
-TU_STATIC const struct ecm_notify_struct ecm_notify_nc =
+static _fuzz_thread const struct ecm_notify_struct ecm_notify_nc =
 {
   .header = {
     .bmRequestType = 0xA1,
@@ -80,7 +83,7 @@ TU_STATIC const struct ecm_notify_struct ecm_notify_nc =
   },
 };
 
-TU_STATIC const struct ecm_notify_struct ecm_notify_csc =
+static _fuzz_thread const struct ecm_notify_struct ecm_notify_csc =
 {
   .header = {
     .bmRequestType = 0xA1,
@@ -92,7 +95,7 @@ TU_STATIC const struct ecm_notify_struct ecm_notify_csc =
 };
 
 // TODO remove CFG_TUSB_MEM_SECTION, control internal buffer is already in this special section
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC union
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread union
 {
   uint8_t rndis_buf[120];
   struct ecm_notify_struct ecm_buf;
@@ -102,9 +105,9 @@ CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC union
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
 // TODO remove CFG_TUSB_MEM_SECTION
-CFG_TUSB_MEM_SECTION TU_STATIC netd_interface_t _netd_itf;
+CFG_TUSB_MEM_SECTION static _fuzz_thread netd_interface_t _netd_itf;
 
-TU_STATIC bool can_xmit;
+static _fuzz_thread bool can_xmit;
 
 void tud_network_recv_renew(void)
 {
diff --git a/src/class/net/ncm_device.c b/src/class/net/ncm_device.c
index 236232191..b8a5c6d3a 100644
--- a/src/class/net/ncm_device.c
+++ b/src/class/net/ncm_device.c
@@ -130,7 +130,7 @@ typedef struct
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC const ntb_parameters_t ntb_parameters = {
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread const ntb_parameters_t ntb_parameters = {
     .wLength                 = sizeof(ntb_parameters_t),
     .bmNtbFormatsSupported   = 0x01,
     .dwNtbInMaxSize          = CFG_TUD_NCM_IN_NTB_MAX_SIZE,
@@ -145,11 +145,11 @@ CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC const ntb_parameters_t ntb_par
     .wNtbOutMaxDatagrams     = 0
 };
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC transmit_ntb_t transmit_ntb[2];
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread transmit_ntb_t transmit_ntb[2];
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN TU_STATIC uint8_t receive_ntb[CFG_TUD_NCM_OUT_NTB_MAX_SIZE];
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread uint8_t receive_ntb[CFG_TUD_NCM_OUT_NTB_MAX_SIZE];
 
-TU_STATIC ncm_interface_t ncm_interface;
+static _fuzz_thread ncm_interface_t ncm_interface;
 
 /*
  * Set up the NTB state in ncm_interface to be ready to add datagrams.
@@ -196,7 +196,7 @@ static void ncm_start_tx(void) {
   ncm_prepare_for_tx();
 }
 
-TU_STATIC struct ecm_notify_struct ncm_notify_connected =
+static _fuzz_thread struct ecm_notify_struct ncm_notify_connected =
 {
     .header = {
         .bmRequestType_bit = {
@@ -210,7 +210,7 @@ TU_STATIC struct ecm_notify_struct ncm_notify_connected =
     },
 };
 
-TU_STATIC struct ecm_notify_struct ncm_notify_speed_change =
+static _fuzz_thread struct ecm_notify_struct ncm_notify_speed_change =
 {
     .header = {
         .bmRequestType_bit = {
diff --git a/src/class/usbtmc/usbtmc_device.c b/src/class/usbtmc/usbtmc_device.c
index fd8220c1f..416cb9bb9 100644
--- a/src/class/usbtmc/usbtmc_device.c
+++ b/src/class/usbtmc/usbtmc_device.c
@@ -78,7 +78,7 @@
 
 #ifdef xDEBUG
 #include "uart_util.h"
-TU_STATIC char logMsg[150];
+static _fuzz_thread char logMsg[150];
 #endif
 
 // Buffer size must be an exact multiple of the max packet size for both
@@ -143,7 +143,7 @@ typedef struct
   usbtmc_capabilities_specific_t const * capabilities;
 } usbtmc_interface_state_t;
 
-CFG_TUSB_MEM_SECTION TU_STATIC usbtmc_interface_state_t usbtmc_state =
+CFG_TUSB_MEM_SECTION static _fuzz_thread usbtmc_interface_state_t usbtmc_state =
 {
     .itf_id = 0xFF,
 };
@@ -154,8 +154,8 @@ TU_VERIFY_STATIC(USBTMCD_BUFFER_SIZE >= 32u,"USBTMC dev buffer size too small");
 static bool handle_devMsgOutStart(uint8_t rhport, void *data, size_t len);
 static bool handle_devMsgOut(uint8_t rhport, void *data, size_t len, size_t packetLen);
 
-TU_STATIC uint8_t termChar;
-TU_STATIC uint8_t termCharRequested = false;
+static _fuzz_thread uint8_t termChar;
+static _fuzz_thread uint8_t termCharRequested = false;
 
 #if OSAL_MUTEX_REQUIRED
 static OSAL_MUTEX_DEF(usbtmcLockBuffer);
diff --git a/src/class/vendor/vendor_device.c b/src/class/vendor/vendor_device.c
index b33cbcf13..22124d193 100644
--- a/src/class/vendor/vendor_device.c
+++ b/src/class/vendor/vendor_device.c
@@ -59,7 +59,7 @@ typedef struct
   CFG_TUSB_MEM_ALIGN uint8_t epin_buf[CFG_TUD_VENDOR_EPSIZE];
 } vendord_interface_t;
 
-CFG_TUSB_MEM_SECTION TU_STATIC vendord_interface_t _vendord_itf[CFG_TUD_VENDOR];
+CFG_TUSB_MEM_SECTION static _fuzz_thread vendord_interface_t _vendord_itf[CFG_TUD_VENDOR];
 
 #define ITF_MEM_RESET_SIZE   offsetof(vendord_interface_t, rx_ff)
 
diff --git a/src/class/vendor/vendor_device.h b/src/class/vendor/vendor_device.h
index 543500f0c..2bb6afa67 100644
--- a/src/class/vendor/vendor_device.h
+++ b/src/class/vendor/vendor_device.h
@@ -50,8 +50,7 @@ void     tud_vendor_n_read_flush      (uint8_t itf);
 uint32_t tud_vendor_n_write           (uint8_t itf, void const* buffer, uint32_t bufsize);
 uint32_t tud_vendor_n_write_available (uint8_t itf);
 
-TU_STATIC inline
-uint32_t tud_vendor_n_write_str       (uint8_t itf, char const* str);
+static inline uint32_t tud_vendor_n_write_str (uint8_t itf, char const* str);
 uint32_t tud_vendor_n_flush           (uint8_t itf);
 
 //--------------------------------------------------------------------+
diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c
index 14518deac..54b45bc8e 100644
--- a/src/class/video/video_device.c
+++ b/src/class/video/video_device.c
@@ -125,11 +125,11 @@ typedef struct TU_ATTR_PACKED {
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
-CFG_TUSB_MEM_SECTION TU_STATIC videod_interface_t _videod_itf[CFG_TUD_VIDEO];
-CFG_TUSB_MEM_SECTION TU_STATIC videod_streaming_interface_t _videod_streaming_itf[CFG_TUD_VIDEO_STREAMING];
+CFG_TUSB_MEM_SECTION static _fuzz_thread videod_interface_t _videod_itf[CFG_TUD_VIDEO];
+CFG_TUSB_MEM_SECTION static _fuzz_thread videod_streaming_interface_t _videod_streaming_itf[CFG_TUD_VIDEO_STREAMING];
 
-TU_STATIC uint8_t const _cap_get     = 0x1u; /* support for GET */
-TU_STATIC uint8_t const _cap_get_set = 0x3u; /* support for GET and SET */
+static _fuzz_thread uint8_t const _cap_get     = 0x1u; /* support for GET */
+static _fuzz_thread uint8_t const _cap_get_set = 0x3u; /* support for GET and SET */
 
 /** Get interface number from the interface descriptor
  *
diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index 6a02959ca..c1a321a40 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -62,10 +62,10 @@
 #endif
 
 /* --------------------- Fuzzing types -------------------------------------- */
-#ifdef FUZZ
-  #define TU_STATIC __thread static
+#ifdef _FUZZ
+  #define _fuzz_thread __thread
 #else
-  #define TU_STATIC static
+  #define _fuzz_thread
 #endif
 
 // for declaration of reserved field, make use of _TU_COUNTER_
diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h
index 8587b6771..e5f718f79 100644
--- a/src/common/tusb_debug.h
+++ b/src/common/tusb_debug.h
@@ -114,7 +114,7 @@ typedef struct
 
 static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint32_t key)
 {
-  TU_STATIC char not_found[11];
+  static _fuzz_thread char not_found[11];
 
   for(uint16_t i=0; i<p_table->count; i++)
   {
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index 56f782ca3..c4e131134 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -529,13 +529,13 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_edpt_packet_size(tusb_desc_endpo
 #if CFG_TUSB_DEBUG
 TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_dir_str(tusb_dir_t dir)
 {
-  TU_STATIC const char *str[] = {"out", "in"};
+  static _fuzz_thread const char *str[] = {"out", "in"};
   return str[dir];
 }
 
 TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_type_str(tusb_xfer_type_t t)
 {
-  TU_STATIC const char *str[] = {"control", "isochronous", "bulk", "interrupt"};
+  static _fuzz_thread const char *str[] = {"control", "isochronous", "bulk", "interrupt"};
   return str[t];
 }
 #endif
diff --git a/src/device/usbd.c b/src/device/usbd.c
index 72fa2bd4c..3176239e7 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -76,7 +76,7 @@ typedef struct
 
 }usbd_device_t;
 
-TU_STATIC usbd_device_t _usbd_dev;
+static _fuzz_thread usbd_device_t _usbd_dev;
 
 //--------------------------------------------------------------------+
 // Class Driver
@@ -88,7 +88,7 @@ TU_STATIC usbd_device_t _usbd_dev;
 #endif
 
 // Built-in class drivers
-TU_STATIC usbd_class_driver_t const _usbd_driver[] =
+static _fuzz_thread usbd_class_driver_t const _usbd_driver[] =
 {
   #if CFG_TUD_CDC
   {
@@ -238,8 +238,8 @@ TU_STATIC usbd_class_driver_t const _usbd_driver[] =
 enum { BUILTIN_DRIVER_COUNT = TU_ARRAY_SIZE(_usbd_driver) };
 
 // Additional class drivers implemented by application
-TU_STATIC usbd_class_driver_t const * _app_driver = NULL;
-TU_STATIC uint8_t _app_driver_count = 0;
+static _fuzz_thread usbd_class_driver_t const * _app_driver = NULL;
+static _fuzz_thread uint8_t _app_driver_count = 0;
 
 // virtually joins built-in and application drivers together.
 // Application is positioned first to allow overwriting built-in ones.
@@ -265,17 +265,17 @@ static inline usbd_class_driver_t const * get_driver(uint8_t drvid)
 //--------------------------------------------------------------------+
 
 enum { RHPORT_INVALID = 0xFFu };
-TU_STATIC uint8_t _usbd_rhport = RHPORT_INVALID;
+static _fuzz_thread uint8_t _usbd_rhport = RHPORT_INVALID;
 
 // Event queue
 // usbd_int_set() is used as mutex in OS NONE config
 OSAL_QUEUE_DEF(usbd_int_set, _usbd_qdef, CFG_TUD_TASK_QUEUE_SZ, dcd_event_t);
-TU_STATIC osal_queue_t _usbd_q;
+static _fuzz_thread osal_queue_t _usbd_q;
 
 // Mutex for claiming endpoint
 #if OSAL_MUTEX_REQUIRED
-  TU_STATIC osal_mutex_def_t _ubsd_mutexdef;
-  TU_STATIC osal_mutex_t _usbd_mutex;
+  static _fuzz_thread osal_mutex_def_t _ubsd_mutexdef;
+  static _fuzz_thread osal_mutex_t _usbd_mutex;
 #else
   #define _usbd_mutex   NULL
 #endif
@@ -299,7 +299,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t event,
 // Debug
 //--------------------------------------------------------------------+
 #if CFG_TUSB_DEBUG >= 2
-TU_STATIC char const* const _usbd_event_str[DCD_EVENT_COUNT] =
+static _fuzz_thread char const* const _usbd_event_str[DCD_EVENT_COUNT] =
 {
   "Invalid"        ,
   "Bus Reset"      ,
diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c
index c3ff7459d..8b071d9c6 100644
--- a/src/device/usbd_control.c
+++ b/src/device/usbd_control.c
@@ -53,10 +53,10 @@ typedef struct
   usbd_control_xfer_cb_t complete_cb;
 } usbd_control_xfer_t;
 
-TU_STATIC usbd_control_xfer_t _ctrl_xfer;
+static _fuzz_thread usbd_control_xfer_t _ctrl_xfer;
 
 CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN
-TU_STATIC uint8_t _usbd_ctrl_buf[CFG_TUD_ENDPOINT0_SIZE];
+static _fuzz_thread uint8_t _usbd_ctrl_buf[CFG_TUD_ENDPOINT0_SIZE];
 
 //--------------------------------------------------------------------+
 // Application API
diff --git a/test/fuzz/make.mk b/test/fuzz/make.mk
index 5e8658ad0..e7c5518e7 100644
--- a/test/fuzz/make.mk
+++ b/test/fuzz/make.mk
@@ -79,7 +79,7 @@ CFLAGS += \
 	-Wno-error=unreachable-code \
   -DOPT_MCU_FUZZ=1 \
   -DCFG_TUSB_MCU=OPT_MCU_FUZZ \
-  -DFUZZ
+  -D_FUZZ
 
 CXXFLAGS += \
   -xc++ \

From bcf5e5f72918a7f5ee991f8d1cc3d4f9a3b2b306 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 22 Feb 2023 12:10:22 +0700
Subject: [PATCH 087/691] missing some files

---
 test/fuzz/dcd_fuzz.cc                       | 2 +-
 test/fuzz/device/msc/src/usb_descriptors.cc | 4 ++--
 test/fuzz/device/net/src/usb_descriptors.cc | 4 ++--
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/test/fuzz/dcd_fuzz.cc b/test/fuzz/dcd_fuzz.cc
index 04b5ce6d7..294977269 100644
--- a/test/fuzz/dcd_fuzz.cc
+++ b/test/fuzz/dcd_fuzz.cc
@@ -39,7 +39,7 @@ struct State {
   uint8_t address;
 };
 
-TU_STATIC State state = {false, 0, 0};
+static _fuzz_thread State state = {false, 0, 0};
 
 //--------------------------------------------------------------------+
 // Controller API
diff --git a/test/fuzz/device/msc/src/usb_descriptors.cc b/test/fuzz/device/msc/src/usb_descriptors.cc
index 91db232ac..8f4be9655 100644
--- a/test/fuzz/device/msc/src/usb_descriptors.cc
+++ b/test/fuzz/device/msc/src/usb_descriptors.cc
@@ -44,7 +44,7 @@
 // Invoked when received GET DEVICE DESCRIPTOR
 // Application return pointer to descriptor
 uint8_t const *tud_descriptor_device_cb(void) {
-  TU_STATIC tusb_desc_device_t const desc_device = {
+  static _fuzz_thread tusb_desc_device_t const desc_device = {
       .bLength = sizeof(tusb_desc_device_t),
       .bDescriptorType = TUSB_DESC_DEVICE,
       .bcdUSB = USB_BCD,
@@ -184,7 +184,7 @@ char const *string_desc_arr[] = {
 
 };
 
-TU_STATIC uint16_t _desc_str[32];
+static _fuzz_thread uint16_t _desc_str[32];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long
diff --git a/test/fuzz/device/net/src/usb_descriptors.cc b/test/fuzz/device/net/src/usb_descriptors.cc
index 0223ed298..903d49271 100644
--- a/test/fuzz/device/net/src/usb_descriptors.cc
+++ b/test/fuzz/device/net/src/usb_descriptors.cc
@@ -45,7 +45,7 @@
 // Invoked when received GET DEVICE DESCRIPTOR
 // Application return pointer to descriptor
 uint8_t const *tud_descriptor_device_cb(void) {
-  TU_STATIC tusb_desc_device_t const desc_device = {
+  static _fuzz_thread tusb_desc_device_t const desc_device = {
       .bLength = sizeof(tusb_desc_device_t),
       .bDescriptorType = TUSB_DESC_DEVICE,
       .bcdUSB = USB_BCD,
@@ -189,7 +189,7 @@ char const *string_desc_arr[] = {
     "TinyUSB CDC",              // 4: CDC Interface
 };
 
-TU_STATIC uint16_t _desc_str[32];
+static _fuzz_thread uint16_t _desc_str[32];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long

From 78a014ef187666da82c348b10958503c4c1d0e2b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 22 Feb 2023 15:13:27 +0700
Subject: [PATCH 088/691] move check LIB_PICO_STDIO_UART to board.h

---
 hw/bsp/rp2040/board.h  | 3 ++-
 hw/bsp/rp2040/family.c | 8 ++++----
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/hw/bsp/rp2040/board.h b/hw/bsp/rp2040/board.h
index f25f80e09..e7eab088e 100644
--- a/hw/bsp/rp2040/board.h
+++ b/hw/bsp/rp2040/board.h
@@ -40,7 +40,8 @@
 #define BUTTON_BOOTSEL
 #define BUTTON_STATE_ACTIVE   0
 
-#if defined(PICO_DEFAULT_UART_TX_PIN) && defined(PICO_DEFAULT_UART_RX_PIN) && defined(PICO_DEFAULT_UART)
+#if defined(PICO_DEFAULT_UART_TX_PIN) && defined(PICO_DEFAULT_UART_RX_PIN) && \
+    defined(PICO_DEFAULT_UART) && defined(LIB_PICO_STDIO_UART)
 #define UART_DEV              PICO_DEFAULT_UART
 #define UART_TX_PIN           PICO_DEFAULT_UART_TX_PIN
 #define UART_RX_PIN           PICO_DEFAULT_UART_RX_PIN
diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index 75328027b..8a426d655 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -115,7 +115,7 @@ void stdio_rtt_init(void)
 
 #endif
 
-#if defined(UART_DEV) && defined(LIB_PICO_STDIO_UART)
+#if defined(UART_DEV)
 static uart_inst_t *uart_inst;
 #endif
 
@@ -148,7 +148,7 @@ void board_init(void)
 #ifndef BUTTON_BOOTSEL
 #endif
 
-#if defined(UART_DEV) && defined(LIB_PICO_STDIO_UART)
+#if defined(UART_DEV)
   bi_decl(bi_2pins_with_func(UART_TX_PIN, UART_TX_PIN, GPIO_FUNC_UART));
   uart_inst = uart_get_instance(UART_DEV);
   stdio_uart_init_full(uart_inst, CFG_BOARD_UART_BAUDRATE, UART_TX_PIN, UART_RX_PIN);
@@ -191,7 +191,7 @@ uint32_t board_button_read(void)
 
 int board_uart_read(uint8_t* buf, int len)
 {
-#if defined(UART_DEV) && defined(LIB_PICO_STDIO_UART)
+#if defined(UART_DEV)
   int count = 0;
   while ( (count < len) && uart_is_readable(uart_inst) )
   {
@@ -207,7 +207,7 @@ int board_uart_read(uint8_t* buf, int len)
 
 int board_uart_write(void const * buf, int len)
 {
-#if defined(UART_DEV) && defined(LIB_PICO_STDIO_UART)
+#if defined(UART_DEV)
   char const* bufch = (char const*) buf;
   for(int i=0;i<len;i++) {
     uart_putc(uart_inst, bufch[i]);

From c01aee6c1a01884d84b399c005dcfed6e67a908c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 22 Feb 2023 15:14:56 +0700
Subject: [PATCH 089/691] revert some changes

---
 hw/bsp/rp2040/family.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index 8a426d655..f9fa88ac4 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -115,7 +115,7 @@ void stdio_rtt_init(void)
 
 #endif
 
-#if defined(UART_DEV)
+#ifdef UART_DEV
 static uart_inst_t *uart_inst;
 #endif
 
@@ -148,7 +148,7 @@ void board_init(void)
 #ifndef BUTTON_BOOTSEL
 #endif
 
-#if defined(UART_DEV)
+#ifdef UART_DEV
   bi_decl(bi_2pins_with_func(UART_TX_PIN, UART_TX_PIN, GPIO_FUNC_UART));
   uart_inst = uart_get_instance(UART_DEV);
   stdio_uart_init_full(uart_inst, CFG_BOARD_UART_BAUDRATE, UART_TX_PIN, UART_RX_PIN);
@@ -191,7 +191,7 @@ uint32_t board_button_read(void)
 
 int board_uart_read(uint8_t* buf, int len)
 {
-#if defined(UART_DEV)
+#ifdef UART_DEV
   int count = 0;
   while ( (count < len) && uart_is_readable(uart_inst) )
   {
@@ -207,7 +207,7 @@ int board_uart_read(uint8_t* buf, int len)
 
 int board_uart_write(void const * buf, int len)
 {
-#if defined(UART_DEV)
+#ifdef UART_DEV
   char const* bufch = (char const*) buf;
   for(int i=0;i<len;i++) {
     uart_putc(uart_inst, bufch[i]);

From 4c846af53e993d635e6fff7e2611a554b55fc441 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 22 Feb 2023 16:18:45 +0700
Subject: [PATCH 090/691] rename OHCI_RHPORTS to TUP_OHCI_RHPORTS

---
 src/common/tusb_mcu.h    |  2 +-
 src/portable/ohci/ohci.c | 17 ++++++++---------
 src/portable/ohci/ohci.h |  6 +++---
 3 files changed, 12 insertions(+), 13 deletions(-)

diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index ee2b896ac..a599c4fe9 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -55,7 +55,7 @@
 #elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
   #define TUP_DCD_ENDPOINT_MAX    16
   #define TUP_USBIP_OHCI
-  #define OHCI_RHPORTS            2
+  #define TUP_OHCI_RHPORTS            2
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
   // TODO USB0 has 6, USB1 has 4
diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index 76f97844c..792ef65ff 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -28,8 +28,8 @@
 
 #if CFG_TUH_ENABLED && defined(TUP_USBIP_OHCI)
 
-#ifndef OHCI_RHPORTS
-#error  OHCI is enabled, but OHCI_RHPORTS is not defined.
+#ifndef TUP_OHCI_RHPORTS
+#error  OHCI is enabled, but TUP_OHCI_RHPORTS is not defined.
 #endif
 
 //--------------------------------------------------------------------+
@@ -393,21 +393,20 @@ static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr)
 
     if (ed->dev_addr == dev_addr)
     {
-      //Prevent Host Controller from processing this ED while we remove it
+      // Prevent Host Controller from processing this ED while we remove it
       ed->skip = 1;
 
-      // unlink ed
+      // unlink ed, will also move up p_prev
       p_prev->next = ed->next;
 
       // point the removed ED's next pointer to list head to make sure HC can always safely move away from this ED
       ed->next = (uint32_t) _phys_addr(p_head);
       ed->used = 0;
       ed->skip = 0;
-      continue;
+    }else
+    {
+      p_prev = (ohci_ed_t*) _virt_addr((void *)p_prev->next);
     }
-
-    // check next valid since we could remove it
-    if (p_prev->next) p_prev = (ohci_ed_t*) _virt_addr((void *)p_prev->next);
   }
 }
 
@@ -665,7 +664,7 @@ void hcd_int_handler(uint8_t hostid)
   //------------- RootHub status -------------//
   if ( int_status & OHCI_INT_RHPORT_STATUS_CHANGE_MASK )
   {
-    for (int i = 0; i < OHCI_RHPORTS; i++)
+    for (int i = 0; i < TUP_OHCI_RHPORTS; i++)
     {
       uint32_t const rhport_status = OHCI_REG->rhport_status[i] & RHPORT_ALL_CHANGE_MASK;
       if ( rhport_status & RHPORT_CONNECT_STATUS_CHANGE_MASK )
diff --git a/src/portable/ohci/ohci.h b/src/portable/ohci/ohci.h
index b7706b636..38c258e80 100644
--- a/src/portable/ohci/ohci.h
+++ b/src/portable/ohci/ohci.h
@@ -267,7 +267,7 @@ typedef volatile struct
   };
 
   union {
-    uint32_t rhport_status[OHCI_RHPORTS];
+    uint32_t rhport_status[TUP_OHCI_RHPORTS];
     struct {
       uint32_t current_connect_status             : 1;
       uint32_t port_enable_status                 : 1;
@@ -284,11 +284,11 @@ typedef volatile struct
       uint32_t port_over_current_indicator_change : 1;
       uint32_t port_reset_status_change           : 1;
       uint32_t TU_RESERVED                        : 11;
-    }rhport_status_bit[OHCI_RHPORTS];
+    }rhport_status_bit[TUP_OHCI_RHPORTS];
   };
 }ohci_registers_t;
 
-TU_VERIFY_STATIC( sizeof(ohci_registers_t) == (0x54 + (4 * OHCI_RHPORTS)), "size is not correct");
+TU_VERIFY_STATIC( sizeof(ohci_registers_t) == (0x54 + (4 * TUP_OHCI_RHPORTS)), "size is not correct");
 
 #ifdef __cplusplus
  }

From 498989ee009c388a770e7a312ae04d0a51ba745a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 22 Feb 2023 16:23:40 +0700
Subject: [PATCH 091/691] use tu_static instead of static _fuzz_thread

---
 src/class/cdc/cdc_device.c                  |  2 +-
 src/class/dfu/dfu_device.c                  | 14 +++++++-------
 src/class/hid/hid_device.c                  |  2 +-
 src/class/msc/msc_device.c                  |  8 ++++----
 src/class/net/ecm_rndis_device.c            | 14 +++++++-------
 src/class/net/ncm_device.c                  | 12 ++++++------
 src/class/usbtmc/usbtmc_device.c            |  8 ++++----
 src/class/vendor/vendor_device.c            |  2 +-
 src/class/video/video_device.c              |  8 ++++----
 src/common/tusb_compiler.h                  |  4 ++--
 src/common/tusb_debug.h                     |  2 +-
 src/common/tusb_types.h                     |  4 ++--
 src/device/usbd.c                           | 18 +++++++++---------
 src/device/usbd_control.c                   |  4 ++--
 test/fuzz/dcd_fuzz.cc                       |  2 +-
 test/fuzz/device/msc/src/usb_descriptors.cc |  4 ++--
 test/fuzz/device/net/src/usb_descriptors.cc |  4 ++--
 17 files changed, 56 insertions(+), 56 deletions(-)

diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c
index 59ed2a74c..f372fe462 100644
--- a/src/class/cdc/cdc_device.c
+++ b/src/class/cdc/cdc_device.c
@@ -76,7 +76,7 @@ typedef struct
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
-CFG_TUSB_MEM_SECTION static _fuzz_thread cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
+CFG_TUSB_MEM_SECTION tu_static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
 
 static bool _prep_out_transaction (cdcd_interface_t* p_cdc)
 {
diff --git a/src/class/dfu/dfu_device.c b/src/class/dfu/dfu_device.c
index 9e7b8b5b1..464c4bd6b 100644
--- a/src/class/dfu/dfu_device.c
+++ b/src/class/dfu/dfu_device.c
@@ -56,7 +56,7 @@ typedef struct
 } dfu_state_ctx_t;
 
 // Only a single dfu state is allowed
-CFG_TUSB_MEM_SECTION static _fuzz_thread dfu_state_ctx_t _dfu_ctx;
+CFG_TUSB_MEM_SECTION tu_static dfu_state_ctx_t _dfu_ctx;
 
 static void reset_state(void)
 {
@@ -74,7 +74,7 @@ static bool process_manifest_get_status(uint8_t rhport, uint8_t stage, tusb_cont
 //--------------------------------------------------------------------+
 #if CFG_TUSB_DEBUG >= 2
 
-static _fuzz_thread tu_lookup_entry_t const _dfu_request_lookup[] =
+tu_static tu_lookup_entry_t const _dfu_request_lookup[] =
 {
   { .key = DFU_REQUEST_DETACH         , .data = "DETACH"    },
   { .key = DFU_REQUEST_DNLOAD         , .data = "DNLOAD"    },
@@ -85,13 +85,13 @@ static _fuzz_thread tu_lookup_entry_t const _dfu_request_lookup[] =
   { .key = DFU_REQUEST_ABORT          , .data = "ABORT"     },
 };
 
-static _fuzz_thread tu_lookup_table_t const _dfu_request_table =
+tu_static tu_lookup_table_t const _dfu_request_table =
 {
   .count = TU_ARRAY_SIZE(_dfu_request_lookup),
   .items = _dfu_request_lookup
 };
 
-static _fuzz_thread tu_lookup_entry_t const _dfu_state_lookup[] =
+tu_static tu_lookup_entry_t const _dfu_state_lookup[] =
 {
   { .key = APP_IDLE                   , .data = "APP_IDLE"                },
   { .key = APP_DETACH                 , .data = "APP_DETACH"              },
@@ -106,13 +106,13 @@ static _fuzz_thread tu_lookup_entry_t const _dfu_state_lookup[] =
   { .key = DFU_ERROR                  , .data = "ERROR"               },
 };
 
-static _fuzz_thread tu_lookup_table_t const _dfu_state_table =
+tu_static tu_lookup_table_t const _dfu_state_table =
 {
   .count = TU_ARRAY_SIZE(_dfu_state_lookup),
   .items = _dfu_state_lookup
 };
 
-static _fuzz_thread tu_lookup_entry_t const _dfu_status_lookup[] =
+tu_static tu_lookup_entry_t const _dfu_status_lookup[] =
 {
   { .key = DFU_STATUS_OK               , .data = "OK"              },
   { .key = DFU_STATUS_ERR_TARGET       , .data = "errTARGET"       },
@@ -132,7 +132,7 @@ static _fuzz_thread tu_lookup_entry_t const _dfu_status_lookup[] =
   { .key = DFU_STATUS_ERR_STALLEDPKT   , .data = "errSTALLEDPKT"   },
 };
 
-static _fuzz_thread tu_lookup_table_t const _dfu_status_table =
+tu_static tu_lookup_table_t const _dfu_status_table =
 {
   .count = TU_ARRAY_SIZE(_dfu_status_lookup),
   .items = _dfu_status_lookup
diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c
index 6fae5862d..ef44585f9 100644
--- a/src/class/hid/hid_device.c
+++ b/src/class/hid/hid_device.c
@@ -58,7 +58,7 @@ typedef struct
   tusb_hid_descriptor_hid_t const * hid_descriptor;
 } hidd_interface_t;
 
-CFG_TUSB_MEM_SECTION static _fuzz_thread hidd_interface_t _hidd_itf[CFG_TUD_HID];
+CFG_TUSB_MEM_SECTION tu_static hidd_interface_t _hidd_itf[CFG_TUD_HID];
 
 /*------------- Helpers -------------*/
 static inline uint8_t get_index_by_itfnum(uint8_t itf_num)
diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c
index e77342777..d3c8124df 100644
--- a/src/class/msc/msc_device.c
+++ b/src/class/msc/msc_device.c
@@ -71,8 +71,8 @@ typedef struct
   uint8_t add_sense_qualifier;
 }mscd_interface_t;
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread mscd_interface_t _mscd_itf;
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread uint8_t _mscd_buf[CFG_TUD_MSC_EP_BUFSIZE];
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static mscd_interface_t _mscd_itf;
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static uint8_t _mscd_buf[CFG_TUD_MSC_EP_BUFSIZE];
 
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
@@ -202,7 +202,7 @@ uint8_t rdwr10_validate_cmd(msc_cbw_t const* cbw)
 //--------------------------------------------------------------------+
 #if CFG_TUSB_DEBUG >= 2
 
-TU_ATTR_UNUSED static _fuzz_thread tu_lookup_entry_t const _msc_scsi_cmd_lookup[] =
+TU_ATTR_UNUSED tu_static tu_lookup_entry_t const _msc_scsi_cmd_lookup[] =
 {
   { .key = SCSI_CMD_TEST_UNIT_READY              , .data = "Test Unit Ready" },
   { .key = SCSI_CMD_INQUIRY                      , .data = "Inquiry" },
@@ -217,7 +217,7 @@ TU_ATTR_UNUSED static _fuzz_thread tu_lookup_entry_t const _msc_scsi_cmd_lookup[
   { .key = SCSI_CMD_WRITE_10                     , .data = "Write10" }
 };
 
-TU_ATTR_UNUSED static _fuzz_thread tu_lookup_table_t const _msc_scsi_cmd_table =
+TU_ATTR_UNUSED tu_static tu_lookup_table_t const _msc_scsi_cmd_table =
 {
   .count = TU_ARRAY_SIZE(_msc_scsi_cmd_lookup),
   .items = _msc_scsi_cmd_lookup
diff --git a/src/class/net/ecm_rndis_device.c b/src/class/net/ecm_rndis_device.c
index e2a57cb50..a072bfd79 100644
--- a/src/class/net/ecm_rndis_device.c
+++ b/src/class/net/ecm_rndis_device.c
@@ -61,10 +61,10 @@ typedef struct
 #define CFG_TUD_NET_PACKET_PREFIX_LEN sizeof(rndis_data_packet_t)
 #define CFG_TUD_NET_PACKET_SUFFIX_LEN 0
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread 
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static
 uint8_t received[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN];
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread 
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static
 uint8_t transmitted[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN];
 
 struct ecm_notify_struct
@@ -73,7 +73,7 @@ struct ecm_notify_struct
   uint32_t downlink, uplink;
 };
 
-static _fuzz_thread const struct ecm_notify_struct ecm_notify_nc =
+tu_static const struct ecm_notify_struct ecm_notify_nc =
 {
   .header = {
     .bmRequestType = 0xA1,
@@ -83,7 +83,7 @@ static _fuzz_thread const struct ecm_notify_struct ecm_notify_nc =
   },
 };
 
-static _fuzz_thread const struct ecm_notify_struct ecm_notify_csc =
+tu_static const struct ecm_notify_struct ecm_notify_csc =
 {
   .header = {
     .bmRequestType = 0xA1,
@@ -95,7 +95,7 @@ static _fuzz_thread const struct ecm_notify_struct ecm_notify_csc =
 };
 
 // TODO remove CFG_TUSB_MEM_SECTION, control internal buffer is already in this special section
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread union
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static union
 {
   uint8_t rndis_buf[120];
   struct ecm_notify_struct ecm_buf;
@@ -105,9 +105,9 @@ CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread union
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
 // TODO remove CFG_TUSB_MEM_SECTION
-CFG_TUSB_MEM_SECTION static _fuzz_thread netd_interface_t _netd_itf;
+CFG_TUSB_MEM_SECTION tu_static netd_interface_t _netd_itf;
 
-static _fuzz_thread bool can_xmit;
+tu_static bool can_xmit;
 
 void tud_network_recv_renew(void)
 {
diff --git a/src/class/net/ncm_device.c b/src/class/net/ncm_device.c
index b8a5c6d3a..aa13c9535 100644
--- a/src/class/net/ncm_device.c
+++ b/src/class/net/ncm_device.c
@@ -130,7 +130,7 @@ typedef struct
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread const ntb_parameters_t ntb_parameters = {
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static const ntb_parameters_t ntb_parameters = {
     .wLength                 = sizeof(ntb_parameters_t),
     .bmNtbFormatsSupported   = 0x01,
     .dwNtbInMaxSize          = CFG_TUD_NCM_IN_NTB_MAX_SIZE,
@@ -145,11 +145,11 @@ CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread const ntb_parameters
     .wNtbOutMaxDatagrams     = 0
 };
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread transmit_ntb_t transmit_ntb[2];
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static transmit_ntb_t transmit_ntb[2];
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static _fuzz_thread uint8_t receive_ntb[CFG_TUD_NCM_OUT_NTB_MAX_SIZE];
+CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static uint8_t receive_ntb[CFG_TUD_NCM_OUT_NTB_MAX_SIZE];
 
-static _fuzz_thread ncm_interface_t ncm_interface;
+tu_static ncm_interface_t ncm_interface;
 
 /*
  * Set up the NTB state in ncm_interface to be ready to add datagrams.
@@ -196,7 +196,7 @@ static void ncm_start_tx(void) {
   ncm_prepare_for_tx();
 }
 
-static _fuzz_thread struct ecm_notify_struct ncm_notify_connected =
+tu_static struct ecm_notify_struct ncm_notify_connected =
 {
     .header = {
         .bmRequestType_bit = {
@@ -210,7 +210,7 @@ static _fuzz_thread struct ecm_notify_struct ncm_notify_connected =
     },
 };
 
-static _fuzz_thread struct ecm_notify_struct ncm_notify_speed_change =
+tu_static struct ecm_notify_struct ncm_notify_speed_change =
 {
     .header = {
         .bmRequestType_bit = {
diff --git a/src/class/usbtmc/usbtmc_device.c b/src/class/usbtmc/usbtmc_device.c
index 416cb9bb9..a4e6eaeb3 100644
--- a/src/class/usbtmc/usbtmc_device.c
+++ b/src/class/usbtmc/usbtmc_device.c
@@ -78,7 +78,7 @@
 
 #ifdef xDEBUG
 #include "uart_util.h"
-static _fuzz_thread char logMsg[150];
+tu_static char logMsg[150];
 #endif
 
 // Buffer size must be an exact multiple of the max packet size for both
@@ -143,7 +143,7 @@ typedef struct
   usbtmc_capabilities_specific_t const * capabilities;
 } usbtmc_interface_state_t;
 
-CFG_TUSB_MEM_SECTION static _fuzz_thread usbtmc_interface_state_t usbtmc_state =
+CFG_TUSB_MEM_SECTION tu_static usbtmc_interface_state_t usbtmc_state =
 {
     .itf_id = 0xFF,
 };
@@ -154,8 +154,8 @@ TU_VERIFY_STATIC(USBTMCD_BUFFER_SIZE >= 32u,"USBTMC dev buffer size too small");
 static bool handle_devMsgOutStart(uint8_t rhport, void *data, size_t len);
 static bool handle_devMsgOut(uint8_t rhport, void *data, size_t len, size_t packetLen);
 
-static _fuzz_thread uint8_t termChar;
-static _fuzz_thread uint8_t termCharRequested = false;
+tu_static uint8_t termChar;
+tu_static uint8_t termCharRequested = false;
 
 #if OSAL_MUTEX_REQUIRED
 static OSAL_MUTEX_DEF(usbtmcLockBuffer);
diff --git a/src/class/vendor/vendor_device.c b/src/class/vendor/vendor_device.c
index 22124d193..d07bd75ec 100644
--- a/src/class/vendor/vendor_device.c
+++ b/src/class/vendor/vendor_device.c
@@ -59,7 +59,7 @@ typedef struct
   CFG_TUSB_MEM_ALIGN uint8_t epin_buf[CFG_TUD_VENDOR_EPSIZE];
 } vendord_interface_t;
 
-CFG_TUSB_MEM_SECTION static _fuzz_thread vendord_interface_t _vendord_itf[CFG_TUD_VENDOR];
+CFG_TUSB_MEM_SECTION tu_static vendord_interface_t _vendord_itf[CFG_TUD_VENDOR];
 
 #define ITF_MEM_RESET_SIZE   offsetof(vendord_interface_t, rx_ff)
 
diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c
index ecee73d51..02a490aee 100644
--- a/src/class/video/video_device.c
+++ b/src/class/video/video_device.c
@@ -125,11 +125,11 @@ typedef struct TU_ATTR_PACKED {
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
-CFG_TUSB_MEM_SECTION static _fuzz_thread videod_interface_t _videod_itf[CFG_TUD_VIDEO];
-CFG_TUSB_MEM_SECTION static _fuzz_thread videod_streaming_interface_t _videod_streaming_itf[CFG_TUD_VIDEO_STREAMING];
+CFG_TUSB_MEM_SECTION tu_static videod_interface_t _videod_itf[CFG_TUD_VIDEO];
+CFG_TUSB_MEM_SECTION tu_static videod_streaming_interface_t _videod_streaming_itf[CFG_TUD_VIDEO_STREAMING];
 
-static _fuzz_thread uint8_t const _cap_get     = 0x1u; /* support for GET */
-static _fuzz_thread uint8_t const _cap_get_set = 0x3u; /* support for GET and SET */
+tu_static uint8_t const _cap_get     = 0x1u; /* support for GET */
+tu_static uint8_t const _cap_get_set = 0x3u; /* support for GET and SET */
 
 /** Get interface number from the interface descriptor
  *
diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index 3eb6b41f7..30478ba6d 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -63,9 +63,9 @@
 
 /* --------------------- Fuzzing types -------------------------------------- */
 #ifdef _FUZZ
-  #define _fuzz_thread __thread
+  #define tu_static static __thread
 #else
-  #define _fuzz_thread
+  #define tu_static static
 #endif
 
 // for declaration of reserved field, make use of _TU_COUNTER_
diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h
index e5f718f79..82f682043 100644
--- a/src/common/tusb_debug.h
+++ b/src/common/tusb_debug.h
@@ -114,7 +114,7 @@ typedef struct
 
 static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint32_t key)
 {
-  static _fuzz_thread char not_found[11];
+  tu_static char not_found[11];
 
   for(uint16_t i=0; i<p_table->count; i++)
   {
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index 14d4365a0..7266a525e 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -529,13 +529,13 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_edpt_packet_size(tusb_desc_endpo
 #if CFG_TUSB_DEBUG
 TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_dir_str(tusb_dir_t dir)
 {
-  static _fuzz_thread const char *str[] = {"out", "in"};
+  tu_static const char *str[] = {"out", "in"};
   return str[dir];
 }
 
 TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_type_str(tusb_xfer_type_t t)
 {
-  static _fuzz_thread const char *str[] = {"control", "isochronous", "bulk", "interrupt"};
+  tu_static const char *str[] = {"control", "isochronous", "bulk", "interrupt"};
   return str[t];
 }
 #endif
diff --git a/src/device/usbd.c b/src/device/usbd.c
index 3176239e7..384daccb8 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -76,7 +76,7 @@ typedef struct
 
 }usbd_device_t;
 
-static _fuzz_thread usbd_device_t _usbd_dev;
+tu_static usbd_device_t _usbd_dev;
 
 //--------------------------------------------------------------------+
 // Class Driver
@@ -88,7 +88,7 @@ static _fuzz_thread usbd_device_t _usbd_dev;
 #endif
 
 // Built-in class drivers
-static _fuzz_thread usbd_class_driver_t const _usbd_driver[] =
+tu_static usbd_class_driver_t const _usbd_driver[] =
 {
   #if CFG_TUD_CDC
   {
@@ -238,8 +238,8 @@ static _fuzz_thread usbd_class_driver_t const _usbd_driver[] =
 enum { BUILTIN_DRIVER_COUNT = TU_ARRAY_SIZE(_usbd_driver) };
 
 // Additional class drivers implemented by application
-static _fuzz_thread usbd_class_driver_t const * _app_driver = NULL;
-static _fuzz_thread uint8_t _app_driver_count = 0;
+tu_static usbd_class_driver_t const * _app_driver = NULL;
+tu_static uint8_t _app_driver_count = 0;
 
 // virtually joins built-in and application drivers together.
 // Application is positioned first to allow overwriting built-in ones.
@@ -265,17 +265,17 @@ static inline usbd_class_driver_t const * get_driver(uint8_t drvid)
 //--------------------------------------------------------------------+
 
 enum { RHPORT_INVALID = 0xFFu };
-static _fuzz_thread uint8_t _usbd_rhport = RHPORT_INVALID;
+tu_static uint8_t _usbd_rhport = RHPORT_INVALID;
 
 // Event queue
 // usbd_int_set() is used as mutex in OS NONE config
 OSAL_QUEUE_DEF(usbd_int_set, _usbd_qdef, CFG_TUD_TASK_QUEUE_SZ, dcd_event_t);
-static _fuzz_thread osal_queue_t _usbd_q;
+tu_static osal_queue_t _usbd_q;
 
 // Mutex for claiming endpoint
 #if OSAL_MUTEX_REQUIRED
-  static _fuzz_thread osal_mutex_def_t _ubsd_mutexdef;
-  static _fuzz_thread osal_mutex_t _usbd_mutex;
+  tu_static osal_mutex_def_t _ubsd_mutexdef;
+  tu_static osal_mutex_t _usbd_mutex;
 #else
   #define _usbd_mutex   NULL
 #endif
@@ -299,7 +299,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t event,
 // Debug
 //--------------------------------------------------------------------+
 #if CFG_TUSB_DEBUG >= 2
-static _fuzz_thread char const* const _usbd_event_str[DCD_EVENT_COUNT] =
+tu_static char const* const _usbd_event_str[DCD_EVENT_COUNT] =
 {
   "Invalid"        ,
   "Bus Reset"      ,
diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c
index 8b071d9c6..e709658b9 100644
--- a/src/device/usbd_control.c
+++ b/src/device/usbd_control.c
@@ -53,10 +53,10 @@ typedef struct
   usbd_control_xfer_cb_t complete_cb;
 } usbd_control_xfer_t;
 
-static _fuzz_thread usbd_control_xfer_t _ctrl_xfer;
+tu_static usbd_control_xfer_t _ctrl_xfer;
 
 CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN
-static _fuzz_thread uint8_t _usbd_ctrl_buf[CFG_TUD_ENDPOINT0_SIZE];
+tu_static uint8_t _usbd_ctrl_buf[CFG_TUD_ENDPOINT0_SIZE];
 
 //--------------------------------------------------------------------+
 // Application API
diff --git a/test/fuzz/dcd_fuzz.cc b/test/fuzz/dcd_fuzz.cc
index 294977269..6403015dd 100644
--- a/test/fuzz/dcd_fuzz.cc
+++ b/test/fuzz/dcd_fuzz.cc
@@ -39,7 +39,7 @@ struct State {
   uint8_t address;
 };
 
-static _fuzz_thread State state = {false, 0, 0};
+tu_static State state = {false, 0, 0};
 
 //--------------------------------------------------------------------+
 // Controller API
diff --git a/test/fuzz/device/msc/src/usb_descriptors.cc b/test/fuzz/device/msc/src/usb_descriptors.cc
index 8f4be9655..efe4d0a3c 100644
--- a/test/fuzz/device/msc/src/usb_descriptors.cc
+++ b/test/fuzz/device/msc/src/usb_descriptors.cc
@@ -44,7 +44,7 @@
 // Invoked when received GET DEVICE DESCRIPTOR
 // Application return pointer to descriptor
 uint8_t const *tud_descriptor_device_cb(void) {
-  static _fuzz_thread tusb_desc_device_t const desc_device = {
+  tu_static tusb_desc_device_t const desc_device = {
       .bLength = sizeof(tusb_desc_device_t),
       .bDescriptorType = TUSB_DESC_DEVICE,
       .bcdUSB = USB_BCD,
@@ -184,7 +184,7 @@ char const *string_desc_arr[] = {
 
 };
 
-static _fuzz_thread uint16_t _desc_str[32];
+tu_static uint16_t _desc_str[32];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long
diff --git a/test/fuzz/device/net/src/usb_descriptors.cc b/test/fuzz/device/net/src/usb_descriptors.cc
index 903d49271..5597d49d5 100644
--- a/test/fuzz/device/net/src/usb_descriptors.cc
+++ b/test/fuzz/device/net/src/usb_descriptors.cc
@@ -45,7 +45,7 @@
 // Invoked when received GET DEVICE DESCRIPTOR
 // Application return pointer to descriptor
 uint8_t const *tud_descriptor_device_cb(void) {
-  static _fuzz_thread tusb_desc_device_t const desc_device = {
+  tu_static tusb_desc_device_t const desc_device = {
       .bLength = sizeof(tusb_desc_device_t),
       .bDescriptorType = TUSB_DESC_DEVICE,
       .bcdUSB = USB_BCD,
@@ -189,7 +189,7 @@ char const *string_desc_arr[] = {
     "TinyUSB CDC",              // 4: CDC Interface
 };
 
-static _fuzz_thread uint16_t _desc_str[32];
+tu_static uint16_t _desc_str[32];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long

From 302b9562dc6963fcb3f85571cb515f322f6d2226 Mon Sep 17 00:00:00 2001
From: mikee47 <mike@silyhouse.net>
Date: Wed, 22 Feb 2023 09:58:30 +0000
Subject: [PATCH 092/691] MIDI_CIN_NOTE_ON definition transposed with
 MIDI_CIN_NOTE_OFF

---
 src/class/midi/midi.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/class/midi/midi.h b/src/class/midi/midi.h
index 74dc41749..57875b1e4 100644
--- a/src/class/midi/midi.h
+++ b/src/class/midi/midi.h
@@ -71,8 +71,8 @@ typedef enum
   MIDI_CIN_SYSEX_END_1BYTE   = 5, // SysEx ends with 1 data, or 1 byte system common message
   MIDI_CIN_SYSEX_END_2BYTE   = 6, // SysEx ends with 2 data
   MIDI_CIN_SYSEX_END_3BYTE   = 7, // SysEx ends with 3 data
-  MIDI_CIN_NOTE_ON           = 8,
-  MIDI_CIN_NOTE_OFF          = 9,
+  MIDI_CIN_NOTE_OFF          = 8,
+  MIDI_CIN_NOTE_ON           = 9,
   MIDI_CIN_POLY_KEYPRESS     = 10,
   MIDI_CIN_CONTROL_CHANGE    = 11,
   MIDI_CIN_PROGRAM_CHANGE    = 12,

From 1466afafeb927621f9cbb6efd2a0d7e4b6cf8d41 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 22 Feb 2023 22:14:50 +0700
Subject: [PATCH 093/691] move and add optional
 tusb_app_virt_to_phys/tusb_app_phys_to_virt

also add place holder for tusb_app_dcache_flush() and
tusb_app_dcache_invalidate()
---
 src/common/tusb_common.h | 15 +++++++++++++++
 src/common/tusb_mcu.h    |  4 ++--
 src/host/hcd.h           |  2 +-
 src/osal/osal_none.h     |  4 ++++
 src/portable/ohci/ohci.c | 21 +++++++++++++--------
 src/portable/ohci/ohci.h |  4 +++-
 6 files changed, 38 insertions(+), 12 deletions(-)

diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index b1ee40a1a..270339cca 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -75,6 +75,21 @@
 
 #include "tusb_timeout.h" // TODO remove
 
+//--------------------------------------------------------------------+
+// Optional API implemented by application if needed
+// TODO move to a more ovious place/file
+//--------------------------------------------------------------------+
+
+// flush data cache
+TU_ATTR_WEAK extern void tusb_app_dcache_flush(uintptr_t addr, uint32_t data_size);
+
+// invalidate data cache
+TU_ATTR_WEAK extern void tusb_app_dcache_invalidate(uintptr_t addr, uint32_t data_size);
+
+// Optional physical <-> virtual address translation
+TU_ATTR_WEAK extern void* tusb_app_virt_to_phys(void *virt_addr);
+TU_ATTR_WEAK extern void* tusb_app_phys_to_virt(void *phys_addr);
+
 //--------------------------------------------------------------------+
 // Internal Inline Functions
 //--------------------------------------------------------------------+
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index a599c4fe9..e7d4e2c32 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -28,8 +28,8 @@
 #define TUSB_MCU_H_
 
 //--------------------------------------------------------------------+
-// Port Specific
-// TUP stand for TinyUSB Port (can be renamed)
+// Port/Platform Specific
+// TUP stand for TinyUSB Port/Platform (can be renamed)
 //--------------------------------------------------------------------+
 
 //------------- Unaligned Memory Access -------------//
diff --git a/src/host/hcd.h b/src/host/hcd.h
index deebc59d4..a400626e4 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -106,7 +106,7 @@ typedef struct
 // Controller API
 //--------------------------------------------------------------------+
 
-// optional hcd configuration, called by tuh_config()
+// optional hcd configuration, called by tuh_configure()
 bool hcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) TU_ATTR_WEAK;
 
 // Initialize controller to host mode
diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h
index 1ad130557..2e2b3c7ce 100644
--- a/src/osal/osal_none.h
+++ b/src/osal/osal_none.h
@@ -35,6 +35,10 @@
 // TASK API
 //--------------------------------------------------------------------+
 
+#if CFG_TUH_ENABLED
+// currently only needed/available in host mode
+void osal_task_delay(uint32_t msec);
+#endif
 
 //--------------------------------------------------------------------+
 // Binary Semaphore API
diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index 792ef65ff..339f8e896 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -162,18 +162,16 @@ static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr);
 // USBH-HCD API
 //--------------------------------------------------------------------+
 
-//If your system requires separation of virtual and physical memory, implement
-//tuh_get_phys_addr and tuh_get_virt_addr in your application.
-TU_ATTR_WEAK void *tuh_get_phys_addr(void *virtual_address);
-TU_ATTR_WEAK void *tuh_get_virt_addr(void *physical_address);
-TU_ATTR_ALWAYS_INLINE static void *_phys_addr(void *virtual_address)
+// If your system requires separation of virtual and physical memory, implement
+// tusb_app_virt_to_phys and tusb_app_virt_to_phys in your application.
+TU_ATTR_ALWAYS_INLINE static inline void *_phys_addr(void *virtual_address)
 {
-  if (tuh_get_phys_addr) return tuh_get_phys_addr(virtual_address);
+  if (tusb_app_virt_to_phys) return tusb_app_virt_to_phys(virtual_address);
   return virtual_address;
 }
-TU_ATTR_ALWAYS_INLINE static void *_virt_addr(void *physical_address)
+TU_ATTR_ALWAYS_INLINE static inline void *_virt_addr(void *physical_address)
 {
-  if (tuh_get_virt_addr) return tuh_get_virt_addr(physical_address);
+  if (tusb_app_phys_to_virt) return tusb_app_phys_to_virt(physical_address);
   return physical_address;
 }
 
@@ -206,7 +204,13 @@ bool hcd_init(uint8_t rhport)
   {
     //Wait 20 ms. (Ref Usb spec 7.1.7.7)
     OHCI_REG->control_bit.hc_functional_state = OHCI_CONTROL_FUNCSTATE_RESUME;
+
+#if CFG_TUSB_OS != OPT_OS_NONE
+    // os_none implement task delay using usb frame counter which is not started yet
+    // therefore cause infinite delay.
+    // TODO find a way to delay in case of os none e.g __nop
     osal_task_delay(20);
+#endif
   }
 
   // reset controller
@@ -233,6 +237,7 @@ bool hcd_init(uint8_t rhport)
 
   OHCI_REG->control_bit.hc_functional_state = OHCI_CONTROL_FUNCSTATE_OPERATIONAL; // make HC's state to operational state TODO use this to suspend (save power)
   OHCI_REG->rh_status_bit.local_power_status_change = 1; // set global power for ports
+
   osal_task_delay(OHCI_REG->rh_descriptorA_bit.power_on_to_good_time * 2); // Wait POTG after power up
 
   return true;
diff --git a/src/portable/ohci/ohci.h b/src/portable/ohci/ohci.h
index 38c258e80..2081ffabb 100644
--- a/src/portable/ohci/ohci.h
+++ b/src/portable/ohci/ohci.h
@@ -58,7 +58,9 @@ typedef struct {
 
 TU_VERIFY_STATIC( sizeof(ohci_hcca_t) == 256, "size is not correct" );
 
-typedef struct {
+// common link item for gtd and itd for list travel
+// use as pointer only
+typedef struct TU_ATTR_ALIGNED(16) {
   uint32_t reserved[2];
   volatile uint32_t next;
   uint32_t reserved2;

From 4caa6063b092de2a9efadb6a4ac247543662731f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 22 Feb 2023 22:17:45 +0700
Subject: [PATCH 094/691] white space

---
 src/common/tusb_mcu.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index e7d4e2c32..1f27afa4e 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -55,7 +55,7 @@
 #elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
   #define TUP_DCD_ENDPOINT_MAX    16
   #define TUP_USBIP_OHCI
-  #define TUP_OHCI_RHPORTS            2
+  #define TUP_OHCI_RHPORTS        2
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
   // TODO USB0 has 6, USB1 has 4

From eca96c635da52ab516e3dda47348ef8977ffd8ad Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 22 Feb 2023 22:28:22 +0700
Subject: [PATCH 095/691] comment out osal_task_delay if using os none

---
 src/portable/ohci/ohci.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index 339f8e896..b615743b8 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -169,6 +169,7 @@ TU_ATTR_ALWAYS_INLINE static inline void *_phys_addr(void *virtual_address)
   if (tusb_app_virt_to_phys) return tusb_app_virt_to_phys(virtual_address);
   return virtual_address;
 }
+
 TU_ATTR_ALWAYS_INLINE static inline void *_virt_addr(void *physical_address)
 {
   if (tusb_app_phys_to_virt) return tusb_app_phys_to_virt(physical_address);
@@ -238,7 +239,10 @@ bool hcd_init(uint8_t rhport)
   OHCI_REG->control_bit.hc_functional_state = OHCI_CONTROL_FUNCSTATE_OPERATIONAL; // make HC's state to operational state TODO use this to suspend (save power)
   OHCI_REG->rh_status_bit.local_power_status_change = 1; // set global power for ports
 
+#if CFG_TUSB_OS != OPT_OS_NONE
+  // TODO as above delay
   osal_task_delay(OHCI_REG->rh_descriptorA_bit.power_on_to_good_time * 2); // Wait POTG after power up
+#endif
 
   return true;
 }

From e34aeb5cf69315d2d7711f0a1d040a28492d026d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 27 Feb 2023 09:11:35 +0700
Subject: [PATCH 096/691] minor clean up

---
 src/class/audio/audio_device.c |  2 +-
 src/class/hid/hid_device.c     |  6 +++---
 src/class/midi/midi_device.c   |  2 +-
 src/class/msc/msc_device.c     | 10 +++++-----
 src/common/tusb_common.h       | 21 ++++++++++++++++++---
 src/device/usbd_control.c      |  2 +-
 src/tusb.c                     | 21 ---------------------
 7 files changed, 29 insertions(+), 35 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 81df95139..de5a20d6d 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -2199,7 +2199,7 @@ bool tud_audio_buffer_and_schedule_control_xfer(uint8_t rhport, tusb_control_req
   if (len > _audiod_fct[func_id].ctrl_buf_sz) len = _audiod_fct[func_id].ctrl_buf_sz;
 
   // Copy into buffer
-  TU_VERIFY(tu_memcpy_s(_audiod_fct[func_id].ctrl_buf, sizeof(_audiod_fct[func_id].ctrl_buf), data, (size_t)len)==0);
+  TU_VERIFY(0 == tu_memcpy_s(_audiod_fct[func_id].ctrl_buf, sizeof(_audiod_fct[func_id].ctrl_buf), data, (size_t)len));
 
   // Schedule transmit
   return tud_control_xfer(rhport, p_request, (void*)_audiod_fct[func_id].ctrl_buf, len);
diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c
index 40654eef9..37a22b609 100644
--- a/src/class/hid/hid_device.c
+++ b/src/class/hid/hid_device.c
@@ -93,11 +93,11 @@ bool tud_hid_n_report(uint8_t instance, uint8_t report_id, void const* report, u
   if (report_id)
   {
     p_hid->epin_buf[0] = report_id;
-    TU_VERIFY(tu_memcpy_s(p_hid->epin_buf+1, CFG_TUD_HID_EP_BUFSIZE-1, report, len)==0);
+    TU_VERIFY(0 == tu_memcpy_s(p_hid->epin_buf+1, CFG_TUD_HID_EP_BUFSIZE-1, report, len));
     len++;
   }else
   {
-    TU_VERIFY(tu_memcpy_s(p_hid->epin_buf, CFG_TUD_HID_EP_BUFSIZE, report, len)==0);
+    TU_VERIFY(0 == tu_memcpy_s(p_hid->epin_buf, CFG_TUD_HID_EP_BUFSIZE, report, len));
   }
 
   return usbd_edpt_xfer(rhport, p_hid->ep_in, p_hid->epin_buf, len);
@@ -122,7 +122,7 @@ bool tud_hid_n_keyboard_report(uint8_t instance, uint8_t report_id, uint8_t modi
 
   if ( keycode )
   {
-    TU_VERIFY(tu_memcpy_s(report.keycode, sizeof(report.keycode), keycode, sizeof(report.keycode))==0);
+    memcpy(report.keycode, keycode, sizeof(report.keycode));
   }else
   {
     tu_memclr(report.keycode, 6);
diff --git a/src/class/midi/midi_device.c b/src/class/midi/midi_device.c
index 0b52be181..92689dfb0 100644
--- a/src/class/midi/midi_device.c
+++ b/src/class/midi/midi_device.c
@@ -182,7 +182,7 @@ uint32_t tud_midi_n_stream_read(uint8_t itf, uint8_t cable_num, void* buffer, ui
     uint8_t const count = (uint8_t) tu_min32(stream->total - stream->index, bufsize);
 
     // Skip the header (1st byte) in the buffer
-    TU_VERIFY(tu_memcpy_s(buf8, bufsize, stream->buffer + 1 + stream->index, count)==0);
+    TU_VERIFY(0 == tu_memcpy_s(buf8, bufsize, stream->buffer + 1 + stream->index, count));
 
     total_read += count;
     stream->index += count;
diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c
index ed4a3e86c..ecc95377f 100644
--- a/src/class/msc/msc_device.c
+++ b/src/class/msc/msc_device.c
@@ -707,7 +707,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
         read_capa10.block_size = tu_htonl(block_size);
 
         resplen = sizeof(read_capa10);
-        TU_VERIFY(tu_memcpy_s(buffer, bufsize, &read_capa10, (size_t) resplen));
+        TU_VERIFY(0 == tu_memcpy_s(buffer, bufsize, &read_capa10, (size_t) resplen));
       }
     }
     break;
@@ -741,7 +741,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
         read_fmt_capa.block_size_u16 = tu_htons(block_size);
 
         resplen = sizeof(read_fmt_capa);
-        TU_VERIFY(tu_memcpy_s(buffer, bufsize, &read_fmt_capa, (size_t) resplen)==0);
+        TU_VERIFY(0 == tu_memcpy_s(buffer, bufsize, &read_fmt_capa, (size_t) resplen));
       }
     }
     break;
@@ -764,7 +764,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
       tud_msc_inquiry_cb(lun, inquiry_rsp.vendor_id, inquiry_rsp.product_id, inquiry_rsp.product_rev);
 
       resplen = sizeof(inquiry_rsp);
-      TU_VERIFY(tu_memcpy_s(buffer, bufsize, &inquiry_rsp, (size_t) resplen)==0);
+      TU_VERIFY(0 == tu_memcpy_s(buffer, bufsize, &inquiry_rsp, (size_t) resplen));
     }
     break;
 
@@ -788,7 +788,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
       mode_resp.write_protected = !writable;
 
       resplen = sizeof(mode_resp);
-      TU_VERIFY(tu_memcpy_s(buffer, bufsize, &mode_resp, (size_t) resplen)==0);
+      TU_VERIFY(0 == tu_memcpy_s(buffer, bufsize, &mode_resp, (size_t) resplen));
     }
     break;
 
@@ -806,7 +806,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
       sense_rsp.add_sense_qualifier = p_msc->add_sense_qualifier;
 
       resplen = sizeof(sense_rsp);
-      TU_VERIFY(tu_memcpy_s(buffer, bufsize, &sense_rsp, (size_t) resplen)==0);
+      TU_VERIFY(0 == tu_memcpy_s(buffer, bufsize, &sense_rsp, (size_t) resplen));
 
       // request sense callback could overwrite the sense data
       if (tud_msc_request_sense_cb)
diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index 78fdcfe36..3e5e1d427 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -84,11 +84,26 @@
 #define tu_varclr(_var)          tu_memclr(_var, sizeof(*(_var)))
 
 // This is a backport of memset_s from c11
-int32_t tu_memset_s(void *dest, size_t destsz, int ch, size_t count); 
+TU_ATTR_ALWAYS_INLINE static inline int tu_memset_s(void *dest, size_t destsz, int ch, size_t count)
+{
+  // TODO may check if desst and src is not NULL
+  if (count > destsz) {
+    return -1;
+  }
+  memset(dest, ch, count);
+  return 0;
+}
 
 // This is a backport of memcpy_s from c11
-int32_t tu_memcpy_s(void *dest, size_t destsz,
-                  const void * src, size_t count );
+TU_ATTR_ALWAYS_INLINE static inline int tu_memcpy_s(void *dest, size_t destsz, const void * src, size_t count )
+{
+  // TODO may check if desst and src is not NULL
+  if (count > destsz) {
+    return -1;
+  }
+  memcpy(dest, src, count);
+  return 0;
+}
 
 
 //------------- Bytes -------------//
diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c
index ce4ddab66..b8a200845 100644
--- a/src/device/usbd_control.c
+++ b/src/device/usbd_control.c
@@ -94,7 +94,7 @@ static bool _data_stage_xact(uint8_t rhport)
   {
     ep_addr = EDPT_CTRL_IN;
     if ( xact_len ) {
-      TU_VERIFY(tu_memcpy_s(_usbd_ctrl_buf, CFG_TUD_ENDPOINT0_SIZE, _ctrl_xfer.buffer, xact_len)==0);
+      TU_VERIFY(0 == tu_memcpy_s(_usbd_ctrl_buf, CFG_TUD_ENDPOINT0_SIZE, _ctrl_xfer.buffer, xact_len));
     }
   }
 
diff --git a/src/tusb.c b/src/tusb.c
index c918b0248..8318e5275 100644
--- a/src/tusb.c
+++ b/src/tusb.c
@@ -24,7 +24,6 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "common/tusb_common.h"
 #include "tusb_option.h"
 
 #if CFG_TUH_ENABLED || CFG_TUD_ENABLED
@@ -487,23 +486,3 @@ void tu_print_mem(void const *buf, uint32_t count, uint8_t indent)
 #endif
 
 #endif // host or device enabled
-
-//--------------------------------------------------------------------+
-// Common
-//--------------------------------------------------------------------+
-
-int32_t tu_memset_s(void *dest, size_t destsz, int ch, size_t count) {
-  if (count > destsz) {
-    return -1;
-  }
-  memset(dest, ch, count);
-  return 0;
-}
-
-int32_t tu_memcpy_s(void *dest, size_t destsz, const void *src, size_t count) {
-  if (count > destsz) {
-    return -1;
-  }
-  memcpy(dest, src, count);
-  return 0;
-}
\ No newline at end of file

From ffdc100cb90eefd13da77a478527ea25d982416c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 28 Feb 2023 17:11:59 +0700
Subject: [PATCH 097/691] rename ep_num to ep_idx, minor clean up

---
 src/class/audio/audio_device.c                | 105 ++++++------
 src/device/usbd.c                             |  20 +--
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 153 ++++++++++--------
 .../st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h   | 151 ++++++++---------
 4 files changed, 223 insertions(+), 206 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 31c4783eb..ee26eddf5 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -1495,17 +1495,19 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
       }
 
 #if USE_ISO_EP_ALLOCATION
-#if CFG_TUD_AUDIO_ENABLE_EP_IN
+  #if CFG_TUD_AUDIO_ENABLE_EP_IN
       uint8_t  ep_in = 0;
       uint16_t ep_in_size = 0;
-#endif
-#if CFG_TUD_AUDIO_ENABLE_EP_OUT
+  #endif
+
+  #if CFG_TUD_AUDIO_ENABLE_EP_OUT
       uint8_t  ep_out = 0;
       uint16_t ep_out_size = 0;
-#endif
-#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+  #endif
+
+  #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
       uint8_t ep_fb = 0;
-#endif
+  #endif
 
       uint8_t const *p_desc = _audiod_fct[i].p_desc;
       uint8_t const *p_desc_end = p_desc + _audiod_fct[i].desc_length - TUD_AUDIO_DESC_IAD_LEN;
@@ -1516,28 +1518,28 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
           tusb_desc_endpoint_t const *desc_ep = (tusb_desc_endpoint_t const *) p_desc;
           if (desc_ep->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS)
           {
-#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+  #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
             // Explicit feedback EP
             if (desc_ep->bmAttributes.usage == 1)
             {
               ep_fb = desc_ep->bEndpointAddress;
             }
-#endif      
+  #endif
             // Data EP
             if (desc_ep->bmAttributes.usage == 0)
             {
               if (tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN)
               {
-#if CFG_TUD_AUDIO_ENABLE_EP_IN
+  #if CFG_TUD_AUDIO_ENABLE_EP_IN
                 ep_in = desc_ep->bEndpointAddress;
                 ep_in_size = TU_MAX(tu_edpt_packet_size(desc_ep), ep_in_size);
-#endif
+  #endif
               } else
               {
-#if CFG_TUD_AUDIO_ENABLE_EP_OUT
+  #if CFG_TUD_AUDIO_ENABLE_EP_OUT
                 ep_out = desc_ep->bEndpointAddress;
                 ep_out_size = TU_MAX(tu_edpt_packet_size(desc_ep), ep_out_size);
-#endif
+  #endif
               }
             }
             
@@ -1546,26 +1548,28 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
         p_desc = tu_desc_next(p_desc);
       }
 
-#if CFG_TUD_AUDIO_ENABLE_EP_IN
+  #if CFG_TUD_AUDIO_ENABLE_EP_IN
       if (ep_in)
       {
         usbd_edpt_iso_alloc(rhport, ep_in, ep_in_size);
       }
-#endif
-#if CFG_TUD_AUDIO_ENABLE_EP_OUT
+  #endif
+
+  #if CFG_TUD_AUDIO_ENABLE_EP_OUT
       if (ep_out)
       {
         usbd_edpt_iso_alloc(rhport, ep_out, ep_out_size);
       }
-#endif
-#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+  #endif
+
+  #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
       if (ep_fb)
       {
         usbd_edpt_iso_alloc(rhport, ep_fb, 4);
       }
-#endif
+  #endif
 
-#endif
+#endif // USE_ISO_EP_ALLOCATION
 
       break;
     }
@@ -1628,18 +1632,19 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
   if (audio->ep_in_as_intf_num == itf)
   {
     audio->ep_in_as_intf_num = 0;
-#if !USE_ISO_EP_ALLOCATION
+  #if !USE_ISO_EP_ALLOCATION
     usbd_edpt_close(rhport, audio->ep_in);
-#endif
+  #endif
+
     // Clear FIFOs, since data is no longer valid
-#if !CFG_TUD_AUDIO_ENABLE_ENCODING
+  #if !CFG_TUD_AUDIO_ENABLE_ENCODING
     tu_fifo_clear(&audio->ep_in_ff);
-#else
+  #else
     for (uint8_t cnt = 0; cnt < audio->n_tx_supp_ff; cnt++)
     {
       tu_fifo_clear(&audio->tx_supp_ff[cnt]);
     }
-#endif
+  #endif
 
     // Invoke callback - can be used to stop data sampling
     if (tud_audio_set_itf_close_EP_cb) TU_VERIFY(tud_audio_set_itf_close_EP_cb(rhport, p_request));
@@ -1647,24 +1652,25 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
     audio->ep_in = 0;                           // Necessary?
 
   }
-#endif
+#endif // CFG_TUD_AUDIO_ENABLE_EP_IN
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT
   if (audio->ep_out_as_intf_num == itf)
   {
     audio->ep_out_as_intf_num = 0;
-#if !USE_ISO_EP_ALLOCATION
+  #if !USE_ISO_EP_ALLOCATION
     usbd_edpt_close(rhport, audio->ep_out);
-#endif
+  #endif
+
     // Clear FIFOs, since data is no longer valid
-#if !CFG_TUD_AUDIO_ENABLE_DECODING
+  #if !CFG_TUD_AUDIO_ENABLE_DECODING
     tu_fifo_clear(&audio->ep_out_ff);
-#else
+  #else
     for (uint8_t cnt = 0; cnt < audio->n_rx_supp_ff; cnt++)
     {
       tu_fifo_clear(&audio->rx_supp_ff[cnt]);
     }
-#endif
+  #endif
 
     // Invoke callback - can be used to stop data sampling
     if (tud_audio_set_itf_close_EP_cb) TU_VERIFY(tud_audio_set_itf_close_EP_cb(rhport, p_request));
@@ -1672,15 +1678,15 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
     audio->ep_out = 0;                          // Necessary?
 
     // Close corresponding feedback EP
-#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
-#if !USE_ISO_EP_ALLOCATION
+  #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+    #if !USE_ISO_EP_ALLOCATION
     usbd_edpt_close(rhport, audio->ep_fb);
-#endif
+    #endif
     audio->ep_fb = 0;
     tu_memclr(&audio->feedback, sizeof(audio->feedback));
-#endif
+  #endif
   }
-#endif
+#endif // CFG_TUD_AUDIO_ENABLE_EP_OUT
 
   // Save current alternative interface setting
   audio->alt_setting[idxItf] = alt;
@@ -1724,11 +1730,11 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
             audio->ep_in_sz = tu_edpt_packet_size(desc_ep);
 
             // If software encoding is enabled, parse for the corresponding parameters - doing this here means only AS interfaces with EPs get scanned for parameters
-#if CFG_TUD_AUDIO_ENABLE_ENCODING
+  #if CFG_TUD_AUDIO_ENABLE_ENCODING
             audiod_parse_for_AS_params(audio, p_desc_parse_for_params, p_desc_end, itf);
 
             // Reconfigure size of support FIFOs - this is necessary to avoid samples to get split in case of a wrap
-#if CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING
+    #if CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING
             const uint16_t active_fifo_depth = (uint16_t) ((audio->tx_supp_ff_sz_max / audio->n_bytes_per_sampe_tx) * audio->n_bytes_per_sampe_tx);
             for (uint8_t cnt = 0; cnt < audio->n_tx_supp_ff; cnt++)
             {
@@ -1736,9 +1742,8 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
             }
             audio->n_ff_used_tx = audio->n_channels_tx / audio->n_channels_per_ff_tx;
             TU_ASSERT( audio->n_ff_used_tx <= audio->n_tx_supp_ff );
-#endif
-
-#endif
+    #endif
+  #endif
 
             // Schedule first transmit if alternate interface is not zero i.e. streaming is disabled - in case no sample data is available a ZLP is loaded
             // It is necessary to trigger this here since the refill is done with an RX FIFO empty interrupt which can only trigger if something was in there
@@ -1755,11 +1760,11 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
             audio->ep_out_as_intf_num = itf;
             audio->ep_out_sz = tu_edpt_packet_size(desc_ep);
 
-#if CFG_TUD_AUDIO_ENABLE_DECODING
+  #if CFG_TUD_AUDIO_ENABLE_DECODING
             audiod_parse_for_AS_params(audio, p_desc_parse_for_params, p_desc_end, itf);
 
             // Reconfigure size of support FIFOs - this is necessary to avoid samples to get split in case of a wrap
-#if CFG_TUD_AUDIO_ENABLE_TYPE_I_DECODING
+    #if CFG_TUD_AUDIO_ENABLE_TYPE_I_DECODING
             const uint16_t active_fifo_depth = (audio->rx_supp_ff_sz_max / audio->n_bytes_per_sampe_rx) * audio->n_bytes_per_sampe_rx;
             for (uint8_t cnt = 0; cnt < audio->n_rx_supp_ff; cnt++)
             {
@@ -1767,18 +1772,18 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
             }
             audio->n_ff_used_rx = audio->n_channels_rx / audio->n_channels_per_ff_rx;
             TU_ASSERT( audio->n_ff_used_rx <= audio->n_rx_supp_ff );
-#endif
-#endif
+    #endif
+  #endif
 
             // Prepare for incoming data
-#if USE_LINEAR_BUFFER_RX
+  #if USE_LINEAR_BUFFER_RX
             TU_VERIFY(usbd_edpt_xfer(rhport, audio->ep_out, audio->lin_buf_out, audio->ep_out_sz), false);
-#else
+  #else
             TU_VERIFY(usbd_edpt_xfer_fifo(rhport, audio->ep_out, &audio->ep_out_ff, audio->ep_out_sz), false);
-#endif
+  #endif
           }
 
-#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+  #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
           if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN && desc_ep->bmAttributes.usage == 1)   // Check if usage is explicit data feedback
           {
             audio->ep_fb = ep_addr;
@@ -1787,7 +1792,7 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
             // Enable SOF interrupt if callback is implemented
             if (tud_audio_feedback_interval_isr) usbd_sof_enable(rhport, true);
           }
-#endif
+  #endif
 #endif // CFG_TUD_AUDIO_ENABLE_EP_OUT
 
           foundEPs += 1;
@@ -1838,7 +1843,7 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
           default: break;
         }
       }
-#endif
+#endif // CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
 
       // We are done - abort loop
       break;
diff --git a/src/device/usbd.c b/src/device/usbd.c
index fd4414559..b67d3e29f 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -1384,12 +1384,10 @@ bool usbd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packe
 {
   rhport = _usbd_rhport;
 
+  TU_ASSERT(dcd_edpt_iso_alloc);
   TU_ASSERT(tu_edpt_number(ep_addr) < CFG_TUD_ENDPPOINT_MAX);
 
-  if (dcd_edpt_iso_alloc)
-    return dcd_edpt_iso_alloc(rhport, ep_addr, largest_packet_size);
-  else
-    return false;
+  return dcd_edpt_iso_alloc(rhport, ep_addr, largest_packet_size);
 }
 
 bool usbd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep)
@@ -1399,18 +1397,14 @@ bool usbd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep
   uint8_t const epnum = tu_edpt_number(desc_ep->bEndpointAddress);
   uint8_t const dir   = tu_edpt_dir(desc_ep->bEndpointAddress);
   
+  TU_ASSERT(dcd_edpt_iso_activate);
   TU_ASSERT(epnum < CFG_TUD_ENDPPOINT_MAX);
   TU_ASSERT(tu_edpt_validate(desc_ep, (tusb_speed_t) _usbd_dev.speed));
   
-  if (dcd_edpt_iso_activate)
-  {
-    _usbd_dev.ep_status[epnum][dir].stalled = false;
-    _usbd_dev.ep_status[epnum][dir].busy = false;
-    _usbd_dev.ep_status[epnum][dir].claimed = false;
-    return dcd_edpt_iso_activate(rhport, desc_ep);
-  }
-  else
-    return false;
+  _usbd_dev.ep_status[epnum][dir].stalled = false;
+  _usbd_dev.ep_status[epnum][dir].busy = false;
+  _usbd_dev.ep_status[epnum][dir].claimed = false;
+  return dcd_edpt_iso_activate(rhport, desc_ep);
 }
 
 #endif
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index c9b244c8c..78da9d0e5 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -6,7 +6,7 @@
  * Portions:
  * Copyright (c) 2016 STMicroelectronics
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
- * Copyright (c) 2022 Simon K�ppers (skuep)
+ * Copyright (c) 2022 Simon Küppers (skuep)
  * Copyright (c) 2022 HiFiPhile
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
@@ -159,6 +159,10 @@ TU_VERIFY_STATIC(((DCD_STM32_BTABLE_BASE) + (DCD_STM32_BTABLE_LENGTH))<=(PMA_LEN
 
 TU_VERIFY_STATIC(((DCD_STM32_BTABLE_BASE) % 8) == 0, "BTABLE base must be aligned to 8 bytes");
 
+//--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF
+//--------------------------------------------------------------------+
+
 // One of these for every EP IN & OUT, uses a bit of RAM....
 typedef struct
 {
@@ -169,21 +173,9 @@ typedef struct
   uint16_t pma_ptr;
   uint16_t max_packet_size;
   uint16_t pma_alloc_size;
-  uint8_t epnum;
+  uint8_t ep_idx; // index for USB_EPnR register
 } xfer_ctl_t;
 
-static xfer_ctl_t xfer_status[MAX_EP_COUNT][2];
-
-TU_ATTR_ALWAYS_INLINE static inline xfer_ctl_t* xfer_ctl_ptr(uint32_t ep_addr)
-{
-  uint8_t epnum = tu_edpt_number(ep_addr);
-  uint8_t dir = tu_edpt_dir(ep_addr);
-  // Fix -Werror=null-dereference
-  TU_ASSERT(epnum < MAX_EP_COUNT, &xfer_status[0][0]);
-
-  return &xfer_status[epnum][dir];
-}
-
 // EP allocator
 typedef struct
 {
@@ -192,12 +184,18 @@ typedef struct
   bool allocated[2];
 } ep_alloc_t;
 
+static xfer_ctl_t xfer_status[MAX_EP_COUNT][2];
+
 static ep_alloc_t ep_alloc_status[STFSDEV_EP_COUNT];
 
 static TU_ATTR_ALIGNED(4) uint32_t _setup_packet[6];
 
 static uint8_t remoteWakeCountdown; // When wake is requested
 
+//--------------------------------------------------------------------+
+// Prototypes
+//--------------------------------------------------------------------+
+
 // into the stack.
 static void dcd_handle_bus_reset(void);
 static void dcd_transmit_packet(xfer_ctl_t * xfer, uint16_t ep_ix);
@@ -217,6 +215,20 @@ static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wN
 static bool dcd_write_packet_memory_ff(tu_fifo_t * ff, uint16_t dst, uint16_t wNBytes);
 static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNBytes);
 
+//--------------------------------------------------------------------+
+// Inline helper
+//--------------------------------------------------------------------+
+
+TU_ATTR_ALWAYS_INLINE static inline xfer_ctl_t* xfer_ctl_ptr(uint32_t ep_addr)
+{
+  uint8_t epnum = tu_edpt_number(ep_addr);
+  uint8_t dir = tu_edpt_dir(ep_addr);
+  // Fix -Werror=null-dereference
+  TU_ASSERT(epnum < MAX_EP_COUNT, &xfer_status[0][0]);
+
+  return &xfer_status[epnum][dir];
+}
+
 // Using a function due to better type checks
 // This seems better than having to do type casts everywhere else
 TU_ATTR_ALWAYS_INLINE static inline void reg16_clear_bits(__IO uint16_t *reg, uint16_t mask) {
@@ -228,6 +240,10 @@ TU_ATTR_ALWAYS_INLINE static inline void clear_istr_bits(uint16_t mask) {
   USB->ISTR = ~mask;
 }
 
+//--------------------------------------------------------------------+
+// Controller API
+//--------------------------------------------------------------------+
+
 void dcd_init (uint8_t rhport)
 {
   /* Clocks should already be enabled */
@@ -825,6 +841,7 @@ static uint8_t dcd_ep_alloc(uint8_t ep_addr, uint8_t ep_type)
     {
       return i;
     }
+
     // If EP of current direction is not allocated
     // Except for ISO endpoint, both direction should be free
     if(!ep_alloc_status[i].allocated[dir] &&
@@ -886,14 +903,14 @@ static void dcd_ep_free(uint8_t ep_addr)
 bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
 {
   (void)rhport;
-  uint8_t const epnum = dcd_ep_alloc(p_endpoint_desc->bEndpointAddress, p_endpoint_desc->bmAttributes.xfer);
+  uint8_t const ep_idx = dcd_ep_alloc(p_endpoint_desc->bEndpointAddress, p_endpoint_desc->bmAttributes.xfer);
   uint8_t const dir   = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
   const uint16_t packet_size = tu_edpt_packet_size(p_endpoint_desc);
   const uint16_t buffer_size = pcd_aligned_buffer_size(packet_size);
   uint16_t pma_addr;
   uint32_t wType;
 
-  TU_ASSERT(epnum < STFSDEV_EP_COUNT);
+  TU_ASSERT(ep_idx < STFSDEV_EP_COUNT);
   TU_ASSERT(buffer_size <= 1024);
 
   // Set type
@@ -916,8 +933,8 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
     TU_ASSERT(false);
   }
 
-  pcd_set_eptype(USB, epnum, wType);
-  pcd_set_ep_address(USB, epnum, tu_edpt_number(p_endpoint_desc->bEndpointAddress));
+  pcd_set_eptype(USB, ep_idx, wType);
+  pcd_set_ep_address(USB, ep_idx, tu_edpt_number(p_endpoint_desc->bEndpointAddress));
   // Be normal, for now, instead of only accepting zero-byte packets (on control endpoint)
   // or being double-buffered (bulk endpoints)
   pcd_clear_ep_kind(USB,0);
@@ -928,37 +945,37 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
 
   if( (dir == TUSB_DIR_IN) || (wType == USB_EP_ISOCHRONOUS) )
   {
-    *pcd_ep_tx_address_ptr(USB, epnum) = pma_addr;
-    pcd_set_ep_tx_bufsize(USB, epnum, buffer_size);
-    pcd_clear_tx_dtog(USB, epnum);
+    *pcd_ep_tx_address_ptr(USB, ep_idx) = pma_addr;
+    pcd_set_ep_tx_bufsize(USB, ep_idx, buffer_size);
+    pcd_clear_tx_dtog(USB, ep_idx);
   }
 
   if( (dir == TUSB_DIR_OUT) || (wType == USB_EP_ISOCHRONOUS) )
   {
-    *pcd_ep_rx_address_ptr(USB, epnum) = pma_addr;
-    pcd_set_ep_rx_bufsize(USB, epnum, buffer_size);
-    pcd_clear_rx_dtog(USB, epnum);
+    *pcd_ep_rx_address_ptr(USB, ep_idx) = pma_addr;
+    pcd_set_ep_rx_bufsize(USB, ep_idx, buffer_size);
+    pcd_clear_rx_dtog(USB, ep_idx);
   }
 
   /* Enable endpoint */
   if (dir == TUSB_DIR_IN)
   {
     if(wType == USB_EP_ISOCHRONOUS) {
-      pcd_set_ep_tx_status(USB, epnum, USB_EP_TX_DIS);
+      pcd_set_ep_tx_status(USB, ep_idx, USB_EP_TX_DIS);
     } else {
-      pcd_set_ep_tx_status(USB, epnum, USB_EP_TX_NAK);
+      pcd_set_ep_tx_status(USB, ep_idx, USB_EP_TX_NAK);
     }
   } else
   {
     if(wType == USB_EP_ISOCHRONOUS) {
-      pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_DIS);
+      pcd_set_ep_rx_status(USB, ep_idx, USB_EP_RX_DIS);
     } else {
-      pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_NAK);
+      pcd_set_ep_rx_status(USB, ep_idx, USB_EP_RX_NAK);
     }
   }
 
   xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->max_packet_size = packet_size;
-  xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->epnum = epnum;
+  xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->ep_idx = ep_idx;
 
   return true;
 }
@@ -981,16 +998,16 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr)
   (void)rhport;
 
   xfer_ctl_t * xfer = xfer_ctl_ptr(ep_addr);
-  uint8_t const epnum = xfer->epnum;
-  uint8_t const dir   = tu_edpt_dir(ep_addr);
+  uint8_t const ep_idx = xfer->ep_idx;
+  uint8_t const dir    = tu_edpt_dir(ep_addr);
 
   if(dir == TUSB_DIR_IN)
   {
-    pcd_set_ep_tx_status(USB, epnum, USB_EP_TX_DIS);
+    pcd_set_ep_tx_status(USB, ep_idx, USB_EP_TX_DIS);
   }
   else
   {
-    pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_DIS);
+    pcd_set_ep_rx_status(USB, ep_idx, USB_EP_RX_DIS);
   }
 
   dcd_ep_free(ep_addr);
@@ -1004,19 +1021,19 @@ bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet
   
   TU_ASSERT(largest_packet_size <= 1024);
   
-  uint8_t const epnum = dcd_ep_alloc(ep_addr, TUSB_XFER_ISOCHRONOUS);
+  uint8_t const ep_idx = dcd_ep_alloc(ep_addr, TUSB_XFER_ISOCHRONOUS);
   const uint16_t buffer_size = pcd_aligned_buffer_size(largest_packet_size);
 
   /* Create a packet memory buffer area. For isochronous endpoints,
    * use the same buffer as the double buffer, essentially disabling double buffering */
   uint16_t pma_addr = dcd_pma_alloc(ep_addr, buffer_size);
 
-  xfer_ctl_ptr(ep_addr)->epnum = epnum;
+  xfer_ctl_ptr(ep_addr)->ep_idx = ep_idx;
 
-  pcd_set_eptype(USB, epnum, USB_EP_ISOCHRONOUS);
+  pcd_set_eptype(USB, ep_idx, USB_EP_ISOCHRONOUS);
   
-  *pcd_ep_tx_address_ptr(USB, epnum) = pma_addr;
-  *pcd_ep_rx_address_ptr(USB, epnum) = pma_addr;
+  *pcd_ep_tx_address_ptr(USB, ep_idx) = pma_addr;
+  *pcd_ep_rx_address_ptr(USB, ep_idx) = pma_addr;
   
   return true;
 }
@@ -1024,30 +1041,30 @@ bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet
 bool dcd_edpt_iso_activate(uint8_t rhport,  tusb_desc_endpoint_t const * p_endpoint_desc)
 {
   (void)rhport;
-  uint8_t const epnum = xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->epnum;
-  uint8_t const dir   = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
+  uint8_t const ep_idx = xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->ep_idx;
+  uint8_t const dir    = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
   const uint16_t packet_size = tu_edpt_packet_size(p_endpoint_desc);
   const uint16_t buffer_size = pcd_aligned_buffer_size(packet_size);
 
   /* Disable endpoint */
   if(dir == TUSB_DIR_IN)
   {
-    pcd_set_ep_tx_status(USB, epnum, USB_EP_TX_DIS);
+    pcd_set_ep_tx_status(USB, ep_idx, USB_EP_TX_DIS);
   }
   else
   {
-    pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_DIS);
+    pcd_set_ep_rx_status(USB, ep_idx, USB_EP_RX_DIS);
   }
   
-  pcd_set_ep_address(USB, epnum, tu_edpt_number(p_endpoint_desc->bEndpointAddress));
+  pcd_set_ep_address(USB, ep_idx, tu_edpt_number(p_endpoint_desc->bEndpointAddress));
   // Be normal, for now, instead of only accepting zero-byte packets (on control endpoint)
   // or being double-buffered (bulk endpoints)
   pcd_clear_ep_kind(USB,0);
 
-  pcd_set_ep_tx_bufsize(USB, epnum, buffer_size);
-  pcd_set_ep_rx_bufsize(USB, epnum, buffer_size);
-  pcd_clear_tx_dtog(USB, epnum);
-  pcd_clear_rx_dtog(USB, epnum);
+  pcd_set_ep_tx_bufsize(USB, ep_idx, buffer_size);
+  pcd_set_ep_rx_bufsize(USB, ep_idx, buffer_size);
+  pcd_clear_tx_dtog(USB, ep_idx);
+  pcd_clear_rx_dtog(USB, ep_idx);
 
   xfer_ctl_ptr(p_endpoint_desc->bEndpointAddress)->max_packet_size = packet_size;
 
@@ -1093,8 +1110,8 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
   (void) rhport;
 
   xfer_ctl_t * xfer = xfer_ctl_ptr(ep_addr);
-  uint8_t const epnum = xfer->epnum;
-  uint8_t const dir   = tu_edpt_dir(ep_addr);
+  uint8_t const ep_idx = xfer->ep_idx;
+  uint8_t const dir    = tu_edpt_dir(ep_addr);
 
   xfer->buffer = buffer;
   xfer->ff     = NULL;
@@ -1105,22 +1122,22 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
   {
     // A setup token can occur immediately after an OUT STATUS packet so make sure we have a valid
     // buffer for the control endpoint.
-    if (epnum == 0 && buffer == NULL)
+    if (ep_idx == 0 && buffer == NULL)
     {
         xfer->buffer = (uint8_t*)_setup_packet;
     }
 
     if(total_bytes > xfer->max_packet_size)
     {
-      pcd_set_ep_rx_bufsize(USB,epnum,xfer->max_packet_size);
+      pcd_set_ep_rx_bufsize(USB,ep_idx,xfer->max_packet_size);
     } else {
-      pcd_set_ep_rx_bufsize(USB,epnum,total_bytes);
+      pcd_set_ep_rx_bufsize(USB,ep_idx,total_bytes);
     }
-    pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_VALID);
+    pcd_set_ep_rx_status(USB, ep_idx, USB_EP_RX_VALID);
   }
   else // IN
   {
-    dcd_transmit_packet(xfer,epnum);
+    dcd_transmit_packet(xfer,ep_idx);
   }
   return true;
 }
@@ -1130,7 +1147,7 @@ bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16
   (void) rhport;
 
   xfer_ctl_t * xfer = xfer_ctl_ptr(ep_addr);
-  uint8_t const epnum = xfer->epnum;
+  uint8_t const epnum = xfer->ep_idx;
   uint8_t const dir   = tu_edpt_dir(ep_addr);
 
   xfer->buffer = NULL;
@@ -1160,16 +1177,16 @@ void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
   (void)rhport;
 
   xfer_ctl_t * xfer = xfer_ctl_ptr(ep_addr);
-  uint8_t const epnum = xfer->epnum;
-  uint8_t const dir   = tu_edpt_dir(ep_addr);
+  uint8_t const ep_idx = xfer->ep_idx;
+  uint8_t const dir    = tu_edpt_dir(ep_addr);
 
   if (dir == TUSB_DIR_IN)
   { // IN
-    pcd_set_ep_tx_status(USB, epnum, USB_EP_TX_STALL);
+    pcd_set_ep_tx_status(USB, ep_idx, USB_EP_TX_STALL);
   }
   else
   { // OUT
-    pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_STALL);
+    pcd_set_ep_rx_status(USB, ep_idx, USB_EP_RX_STALL);
   }
 }
 
@@ -1178,25 +1195,25 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
   (void)rhport;
 
   xfer_ctl_t * xfer = xfer_ctl_ptr(ep_addr);
-  uint8_t const epnum = xfer->epnum;
-  uint8_t const dir   = tu_edpt_dir(ep_addr);
+  uint8_t const ep_idx = xfer->ep_idx;
+  uint8_t const dir    = tu_edpt_dir(ep_addr);
 
   if (dir == TUSB_DIR_IN)
   { // IN
-    if (pcd_get_eptype(USB, epnum) !=  USB_EP_ISOCHRONOUS) {
-      pcd_set_ep_tx_status(USB, epnum, USB_EP_TX_NAK);
+    if (pcd_get_eptype(USB, ep_idx) !=  USB_EP_ISOCHRONOUS) {
+      pcd_set_ep_tx_status(USB, ep_idx, USB_EP_TX_NAK);
     }
 
     /* Reset to DATA0 if clearing stall condition. */
-    pcd_clear_tx_dtog(USB, epnum);
+    pcd_clear_tx_dtog(USB, ep_idx);
   }
   else
   { // OUT
-    if (pcd_get_eptype(USB, epnum) !=  USB_EP_ISOCHRONOUS) {
-      pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_NAK);
+    if (pcd_get_eptype(USB, ep_idx) !=  USB_EP_ISOCHRONOUS) {
+      pcd_set_ep_rx_status(USB, ep_idx, USB_EP_RX_NAK);
     }
     /* Reset to DATA0 if clearing stall condition. */
-    pcd_clear_rx_dtog(USB, epnum);
+    pcd_clear_rx_dtog(USB, ep_idx);
   }
 }
 
@@ -1318,7 +1335,7 @@ static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wN
     *dstVal++ = ((temp >> 8) & 0xFF);
   }
 
-  if (wNBytes % 2)
+  if (wNBytes & 0x01)
   {
     temp = *pdwVal;
     pdwVal += PMA_STRIDE;
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index f4966907a..039fb13d2 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -120,9 +120,9 @@
 static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
 
 // prototypes
-TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum);
-TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum);
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t bEpNum, uint32_t wRegValue);
+TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpIdx);
+TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpIdx);
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wRegValue);
 
 /* Aligned buffer size according to hardware */
 TU_ATTR_ALWAYS_INLINE static inline uint16_t pcd_aligned_buffer_size(uint16_t size)
@@ -138,71 +138,71 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t pcd_aligned_buffer_size(uint16_t si
 }
 
 /* SetENDPOINT */
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t bEpNum, uint32_t wRegValue)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wRegValue)
 {
-  __O uint16_t *reg = (__O uint16_t *)((&USBx->EP0R) + bEpNum*2u);
+  __O uint16_t *reg = (__O uint16_t *)((&USBx->EP0R) + bEpIdx*2u);
   *reg = (uint16_t)wRegValue;
 }
 
 /* GetENDPOINT */
-TU_ATTR_ALWAYS_INLINE static inline uint16_t pcd_get_endpoint(USB_TypeDef * USBx, uint32_t bEpNum) {
-  __I uint16_t *reg = (__I uint16_t *)((&USBx->EP0R) + bEpNum*2u);
+TU_ATTR_ALWAYS_INLINE static inline uint16_t pcd_get_endpoint(USB_TypeDef * USBx, uint32_t bEpIdx) {
+  __I uint16_t *reg = (__I uint16_t *)((&USBx->EP0R) + bEpIdx*2u);
   return *reg;
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_eptype(USB_TypeDef * USBx, uint32_t bEpNum, uint32_t wType)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_eptype(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wType)
 {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
   regVal &= (uint32_t)USB_EP_T_MASK;
   regVal |= wType;
   regVal |= USB_EP_CTR_RX | USB_EP_CTR_TX; // These clear on write0, so must set high
-  pcd_set_endpoint(USBx, bEpNum, regVal);
+  pcd_set_endpoint(USBx, bEpIdx, regVal);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_eptype(USB_TypeDef * USBx, uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_eptype(USB_TypeDef * USBx, uint32_t bEpIdx)
 {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
   regVal &= USB_EP_T_FIELD;
   return regVal;
 }
 /**
   * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
   * @param  USBx USB peripheral instance register address.
-  * @param  bEpNum Endpoint Number.
+  * @param  bEpIdx Endpoint Number.
   * @retval None
   */
-TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_rx_ep_ctr(USB_TypeDef * USBx, uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_rx_ep_ctr(USB_TypeDef * USBx, uint32_t bEpIdx)
 {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
   regVal &= USB_EPREG_MASK;
   regVal &= ~USB_EP_CTR_RX;
   regVal |= USB_EP_CTR_TX; // preserve CTR_TX (clears on writing 0)
-  pcd_set_endpoint(USBx, bEpNum, regVal);
+  pcd_set_endpoint(USBx, bEpIdx, regVal);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx, uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx, uint32_t bEpIdx)
 {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
   regVal &= USB_EPREG_MASK;
   regVal &= ~USB_EP_CTR_TX;
   regVal |= USB_EP_CTR_RX; // preserve CTR_RX (clears on writing 0)
-  pcd_set_endpoint(USBx, bEpNum,regVal);
+  pcd_set_endpoint(USBx, bEpIdx,regVal);
 }
 /**
   * @brief  gets counter of the tx buffer.
   * @param  USBx USB peripheral instance register address.
-  * @param  bEpNum Endpoint Number.
+  * @param  bEpIdx Endpoint Number.
   * @retval Counter value
   */
-TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_tx_cnt(USB_TypeDef * USBx, uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_tx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx)
 {
-  __I uint16_t *regPtr = pcd_ep_tx_cnt_ptr(USBx, bEpNum);
+  __I uint16_t *regPtr = pcd_ep_tx_cnt_ptr(USBx, bEpIdx);
   return *regPtr & 0x3ffU;
 }
 
-TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_cnt(USB_TypeDef * USBx, uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx)
 {
-  __I uint16_t *regPtr = pcd_ep_rx_cnt_ptr(USBx, bEpNum);
+  __I uint16_t *regPtr = pcd_ep_rx_cnt_ptr(USBx, bEpIdx);
   return *regPtr & 0x3ffU;
 }
 
@@ -229,17 +229,17 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_cnt_reg(__O uint16_t * pdwRe
 /**
   * @brief  Sets address in an endpoint register.
   * @param  USBx USB peripheral instance register address.
-  * @param  bEpNum Endpoint Number.
+  * @param  bEpIdx Endpoint Number.
   * @param  bAddr Address.
   * @retval None
   */
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_address(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t bAddr)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_address(USB_TypeDef * USBx,  uint32_t bEpIdx, uint32_t bAddr)
 {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
   regVal &= USB_EPREG_MASK;
   regVal |= bAddr;
   regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
-  pcd_set_endpoint(USBx, bEpNum,regVal);
+  pcd_set_endpoint(USBx, bEpIdx,regVal);
 }
 
 TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t * pcd_btable_word_ptr(USB_TypeDef * USBx, size_t x)
@@ -250,47 +250,47 @@ TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t * pcd_btable_word_ptr(USB_Type
 }
 
 // Pointers to the PMA table entries (using the ARM address space)
-TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_tx_address_ptr(USB_TypeDef * USBx, uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_tx_address_ptr(USB_TypeDef * USBx, uint32_t bEpIdx)
 {
-  return pcd_btable_word_ptr(USBx,(bEpNum)*4u + 0u);
+  return pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 0u);
 }
-TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpIdx)
 {
-  return pcd_btable_word_ptr(USBx,(bEpNum)*4u + 1u);
+  return pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 1u);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_rx_address_ptr(USB_TypeDef * USBx, uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_rx_address_ptr(USB_TypeDef * USBx, uint32_t bEpIdx)
 {
-  return  pcd_btable_word_ptr(USBx,(bEpNum)*4u + 2u);
+  return  pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 2u);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpIdx)
 {
-  return pcd_btable_word_ptr(USBx,(bEpNum)*4u + 3u);
+  return pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 3u);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_cnt(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wCount)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_cnt(USB_TypeDef * USBx,  uint32_t bEpIdx, uint32_t wCount)
 {
-  __IO uint16_t * reg = pcd_ep_tx_cnt_ptr(USBx, bEpNum);
+  __IO uint16_t * reg = pcd_ep_tx_cnt_ptr(USBx, bEpIdx);
   *reg = (uint16_t) (*reg & (uint16_t) ~0x3FFU) | (wCount & 0x3FFU);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_cnt(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wCount)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_cnt(USB_TypeDef * USBx,  uint32_t bEpIdx, uint32_t wCount)
 {
-  __IO uint16_t * reg = pcd_ep_rx_cnt_ptr(USBx, bEpNum);
+  __IO uint16_t * reg = pcd_ep_rx_cnt_ptr(USBx, bEpIdx);
   *reg = (uint16_t) (*reg & (uint16_t) ~0x3FFU) | (wCount & 0x3FFU);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_bufsize(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wCount)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_bufsize(USB_TypeDef * USBx,  uint32_t bEpIdx, uint32_t wCount)
 {
-  __IO uint16_t *pdwReg = pcd_ep_tx_cnt_ptr((USBx),(bEpNum));
+  __IO uint16_t *pdwReg = pcd_ep_tx_cnt_ptr((USBx),(bEpIdx));
   wCount = pcd_aligned_buffer_size(wCount);
   pcd_set_ep_cnt_reg(pdwReg, wCount);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_bufsize(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wCount)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_bufsize(USB_TypeDef * USBx,  uint32_t bEpIdx, uint32_t wCount)
 {
-  __IO uint16_t *pdwReg = pcd_ep_rx_cnt_ptr((USBx),(bEpNum));
+  __IO uint16_t *pdwReg = pcd_ep_rx_cnt_ptr((USBx),(bEpIdx));
   wCount = pcd_aligned_buffer_size(wCount);
   pcd_set_ep_cnt_reg(pdwReg, wCount);
 }
@@ -298,13 +298,13 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_bufsize(USB_TypeDef * USB
 /**
   * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
   * @param  USBx USB peripheral instance register address.
-  * @param  bEpNum Endpoint Number.
+  * @param  bEpIdx Endpoint Number.
   * @param  wState new state
   * @retval None
   */
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_status(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wState)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_status(USB_TypeDef * USBx,  uint32_t bEpIdx, uint32_t wState)
 {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
   regVal &= USB_EPTX_DTOGMASK;
 
   /* toggle first bit ? */
@@ -319,20 +319,20 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_status(USB_TypeDef * USBx
   }
 
   regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
-  pcd_set_endpoint(USBx, bEpNum, regVal);
+  pcd_set_endpoint(USBx, bEpIdx, regVal);
 } /* pcd_set_ep_tx_status */
 
 /**
   * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
   * @param  USBx USB peripheral instance register address.
-  * @param  bEpNum Endpoint Number.
+  * @param  bEpIdx Endpoint Number.
   * @param  wState new state
   * @retval None
   */
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_status(USB_TypeDef * USBx,  uint32_t bEpNum, uint32_t wState)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_status(USB_TypeDef * USBx,  uint32_t bEpIdx, uint32_t wState)
 {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
   regVal &= USB_EPRX_DTOGMASK;
 
   /* toggle first bit ? */
@@ -347,12 +347,12 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_status(USB_TypeDef * USBx
   }
 
   regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
-  pcd_set_endpoint(USBx, bEpNum, regVal);
+  pcd_set_endpoint(USBx, bEpIdx, regVal);
 } /* pcd_set_ep_rx_status */
 
-TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_status(USB_TypeDef * USBx,  uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_status(USB_TypeDef * USBx,  uint32_t bEpIdx)
 {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
   return (regVal & USB_EPRX_STAT) >> (12u);
 } /* pcd_get_ep_rx_status */
 
@@ -360,71 +360,71 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_status(USB_TypeDef *
 /**
   * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
   * @param  USBx USB peripheral instance register address.
-  * @param  bEpNum Endpoint Number.
+  * @param  bEpIdx Endpoint Number.
   * @retval None
   */
-TU_ATTR_ALWAYS_INLINE static inline void pcd_rx_dtog(USB_TypeDef * USBx,  uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_rx_dtog(USB_TypeDef * USBx,  uint32_t bEpIdx)
 {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
   regVal &= USB_EPREG_MASK;
   regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX;
-  pcd_set_endpoint(USBx, bEpNum, regVal);
+  pcd_set_endpoint(USBx, bEpIdx, regVal);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_tx_dtog(USB_TypeDef * USBx,  uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_tx_dtog(USB_TypeDef * USBx,  uint32_t bEpIdx)
 {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
   regVal &= USB_EPREG_MASK;
   regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX;
-  pcd_set_endpoint(USBx, bEpNum, regVal);
+  pcd_set_endpoint(USBx, bEpIdx, regVal);
 }
 
 /**
   * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
   * @param  USBx USB peripheral instance register address.
-  * @param  bEpNum Endpoint Number.
+  * @param  bEpIdx Endpoint Number.
   * @retval None
   */
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_rx_dtog(USB_TypeDef * USBx,  uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_rx_dtog(USB_TypeDef * USBx,  uint32_t bEpIdx)
 {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
   if((regVal & USB_EP_DTOG_RX) != 0)
   {
-    pcd_rx_dtog(USBx,bEpNum);
+    pcd_rx_dtog(USBx,bEpIdx);
   }
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_dtog(USB_TypeDef * USBx,  uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_dtog(USB_TypeDef * USBx,  uint32_t bEpIdx)
 {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
   if((regVal & USB_EP_DTOG_TX) != 0)
   {
-    pcd_tx_dtog(USBx,bEpNum);
+    pcd_tx_dtog(USBx,bEpIdx);
   }
 }
 
 /**
   * @brief  set & clear EP_KIND bit.
   * @param  USBx USB peripheral instance register address.
-  * @param  bEpNum Endpoint Number.
+  * @param  bEpIdx Endpoint Number.
   * @retval None
   */
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_kind(USB_TypeDef * USBx,  uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_kind(USB_TypeDef * USBx,  uint32_t bEpIdx)
 {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
   regVal |= USB_EP_KIND;
   regVal &= USB_EPREG_MASK;
   regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
-  pcd_set_endpoint(USBx, bEpNum, regVal);
+  pcd_set_endpoint(USBx, bEpIdx, regVal);
 }
-TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_ep_kind(USB_TypeDef * USBx, uint32_t bEpNum)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_ep_kind(USB_TypeDef * USBx, uint32_t bEpIdx)
 {
-  uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
+  uint32_t regVal = pcd_get_endpoint(USBx, bEpIdx);
   regVal &= USB_EPKIND_MASK;
   regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
-  pcd_set_endpoint(USBx, bEpNum, regVal);
+  pcd_set_endpoint(USBx, bEpIdx, regVal);
 }
 
 // This checks if the device has "LPM"
@@ -438,6 +438,7 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_ep_kind(USB_TypeDef * USBx, u
      USB_ISTR_RESET | USB_ISTR_SOF | USB_ISTR_ESOF | USB_ISTR_L1REQ_FORCED )
 
 // Number of endpoints in hardware
+// TODO should use TUP_DCD_ENDPOINT_MAX
 #define STFSDEV_EP_COUNT (8u)
 
 #endif /* PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_ */

From 787afbbcd0b178925fa1e429f7a650dd2146485b Mon Sep 17 00:00:00 2001
From: Brandon Alba <brandonealba@protonmail.com>
Date: Tue, 28 Feb 2023 10:25:06 -0800
Subject: [PATCH 098/691] Initialized all RCC init structs for all STM32H7 BSP
 variants as empty

---
 hw/bsp/stm32h7/boards/daisyseed/board.h       | 6 +++---
 hw/bsp/stm32h7/boards/stm32h723nucleo/board.h | 4 ++--
 hw/bsp/stm32h7/boards/stm32h743eval/board.h   | 6 +++---
 hw/bsp/stm32h7/boards/stm32h743nucleo/board.h | 4 ++--
 hw/bsp/stm32h7/boards/stm32h745disco/board.h  | 6 +++---
 5 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/hw/bsp/stm32h7/boards/daisyseed/board.h b/hw/bsp/stm32h7/boards/daisyseed/board.h
index 579c09727..0ad809720 100644
--- a/hw/bsp/stm32h7/boards/daisyseed/board.h
+++ b/hw/bsp/stm32h7/boards/daisyseed/board.h
@@ -57,9 +57,9 @@
 //--------------------------------------------------------------------+
 static inline void board_stm32h7_clock_init(void)
 {
-  RCC_ClkInitTypeDef RCC_ClkInitStruct;
-  RCC_OscInitTypeDef RCC_OscInitStruct;
-  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
+  RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 };
 
   /*!< Supply configuration update enable */
   /* For STM32H750XB, use "HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);" */
diff --git a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h
index 56a48ec24..71ca33447 100644
--- a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h
@@ -64,8 +64,8 @@
 //--------------------------------------------------------------------+
 static inline void board_stm32h7_clock_init(void)
 {
-  RCC_ClkInitTypeDef RCC_ClkInitStruct;
-  RCC_OscInitTypeDef RCC_OscInitStruct;
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
+  RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
 
   /* The PWR block is always enabled on the H7 series- there is no clock
      enable. For now, use the default VOS3 scale mode (lowest) and limit clock
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.h b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
index af2063ce0..666bec9a1 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
@@ -63,9 +63,9 @@
 //--------------------------------------------------------------------+
 static inline void board_stm32h7_clock_init(void)
 {
-  RCC_ClkInitTypeDef RCC_ClkInitStruct;
-  RCC_OscInitTypeDef RCC_OscInitStruct;
-  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
+  RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 };
 
   /*!< Supply configuration update enable */
   HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
diff --git a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h
index 06148c875..c101801eb 100644
--- a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h
@@ -55,8 +55,8 @@
 //--------------------------------------------------------------------+
 static inline void board_stm32h7_clock_init(void)
 {
-  RCC_ClkInitTypeDef RCC_ClkInitStruct;
-  RCC_OscInitTypeDef RCC_OscInitStruct;
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
+  RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
 
   /* The PWR block is always enabled on the H7 series- there is no clock
      enable. For now, use the default VOS3 scale mode (lowest) and limit clock
diff --git a/hw/bsp/stm32h7/boards/stm32h745disco/board.h b/hw/bsp/stm32h7/boards/stm32h745disco/board.h
index d33e0c8eb..d7d3e8723 100644
--- a/hw/bsp/stm32h7/boards/stm32h745disco/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h745disco/board.h
@@ -57,9 +57,9 @@
 //--------------------------------------------------------------------+
 static inline void board_stm32h7_clock_init(void)
 {
-  RCC_ClkInitTypeDef RCC_ClkInitStruct;
-  RCC_OscInitTypeDef RCC_OscInitStruct;
-  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
+  RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 };
 
   /*!< Supply configuration update enable */
   /* For STM32H750XB, use "HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);" */

From 8c8f26f14e6cb4561ed0a937739b926da27393ff Mon Sep 17 00:00:00 2001
From: Brandon Alba <brandonealba@protonmail.com>
Date: Tue, 28 Feb 2023 10:31:07 -0800
Subject: [PATCH 099/691] In some STM32H7 BSP variants, initialized
 RCC_PeriphCLKInitStruct instances as empty

---
 hw/bsp/stm32h7/boards/stm32h723nucleo/board.h | 2 +-
 hw/bsp/stm32h7/boards/stm32h743nucleo/board.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h
index 71ca33447..0eb5e76ad 100644
--- a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h
@@ -111,7 +111,7 @@ static inline void board_stm32h7_clock_init(void)
      separate. However, the main system PLL (PLL1) doesn't have a direct
      connection to the USB peripheral clock to generate 48 MHz, so we do this
      dance. This will connect PLL1's Q output to the USB peripheral clock. */
-  RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct;
+  RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct = { 0 };
 
   RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
   RCC_PeriphCLKInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
diff --git a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h
index c101801eb..8c6a7ce5a 100644
--- a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h
@@ -102,7 +102,7 @@ static inline void board_stm32h7_clock_init(void)
      separate. However, the main system PLL (PLL1) doesn't have a direct
      connection to the USB peripheral clock to generate 48 MHz, so we do this
      dance. This will connect PLL1's Q output to the USB peripheral clock. */
-  RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct;
+  RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct = { 0 };
 
   RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
   RCC_PeriphCLKInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL;

From 5d3084a714eaa16b04e222ac4dc965ef29499e06 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 1 Mar 2023 11:21:46 +0700
Subject: [PATCH 100/691] add TUP_USBIP_FSDEV and TUP_USBIP_FSDEV_STM32, clean
 up ifdef with stm32

---
 src/class/audio/audio_device.c                | 284 +++++++++---------
 src/common/tusb_mcu.h                         | 100 ++++--
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c |  34 +--
 .../st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h   |  19 +-
 4 files changed, 227 insertions(+), 210 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 5bccc66b7..d9c873851 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -66,71 +66,41 @@
 
 // Use ring buffer if it's available, some MCUs need extra RAM requirements
 #ifndef TUD_AUDIO_PREFER_RING_BUFFER
-#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT
-#define TUD_AUDIO_PREFER_RING_BUFFER 0
-#else
-#define TUD_AUDIO_PREFER_RING_BUFFER 1
-#endif
+  #if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT
+    #define TUD_AUDIO_PREFER_RING_BUFFER 0
+  #else
+    #define TUD_AUDIO_PREFER_RING_BUFFER 1
+  #endif
 #endif
 
 // Linear buffer in case target MCU is not capable of handling a ring buffer FIFO e.g. no hardware buffer
 // is available or driver is would need to be changed dramatically
 
 // Only STM32 and dcd_transdimension use non-linear buffer for now
-#if CFG_TUSB_MCU == OPT_MCU_STM32F0                               || \
-    CFG_TUSB_MCU == OPT_MCU_STM32F1                               || \
-    CFG_TUSB_MCU == OPT_MCU_STM32F2                               || \
-    CFG_TUSB_MCU == OPT_MCU_STM32F3                               || \
-    CFG_TUSB_MCU == OPT_MCU_STM32F4                               || \
-    CFG_TUSB_MCU == OPT_MCU_STM32F7                               || \
-    CFG_TUSB_MCU == OPT_MCU_STM32H7                               || \
-    CFG_TUSB_MCU == OPT_MCU_STM32L0                               || \
-    CFG_TUSB_MCU == OPT_MCU_STM32L1                               || \
-    CFG_TUSB_MCU == OPT_MCU_STM32L4                               || \
-    CFG_TUSB_MCU == OPT_MCU_STM32G4                               || \
-    CFG_TUSB_MCU == OPT_MCU_STM32WB                               || \
-    CFG_TUSB_MCU == OPT_MCU_RX63X                                 || \
-    CFG_TUSB_MCU == OPT_MCU_RX65X                                 || \
-    CFG_TUSB_MCU == OPT_MCU_RX72N                                 || \
-    CFG_TUSB_MCU == OPT_MCU_GD32VF103                             || \
-    CFG_TUSB_MCU == OPT_MCU_LPC18XX                               || \
-    CFG_TUSB_MCU == OPT_MCU_LPC43XX                               || \
-    CFG_TUSB_MCU == OPT_MCU_MIMXRT                                || \
+// dwc2 except esp32sx (since it may use dcd_esp32sx)
+#if (defined(TUP_USBIP_DWC2) && !TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)) || \
+    defined(TUP_USBIP_FSDEV)          || \
+    CFG_TUSB_MCU == OPT_MCU_RX63X     || \
+    CFG_TUSB_MCU == OPT_MCU_RX65X     || \
+    CFG_TUSB_MCU == OPT_MCU_RX72N     || \
+    CFG_TUSB_MCU == OPT_MCU_LPC18XX   || \
+    CFG_TUSB_MCU == OPT_MCU_LPC43XX   || \
+    CFG_TUSB_MCU == OPT_MCU_MIMXRT    || \
     CFG_TUSB_MCU == OPT_MCU_MSP432E4
-#if TUD_AUDIO_PREFER_RING_BUFFER
-#define  USE_LINEAR_BUFFER     0
+  #if TUD_AUDIO_PREFER_RING_BUFFER
+    #define  USE_LINEAR_BUFFER     0
+  #else
+    #define  USE_LINEAR_BUFFER     1
+  #endif
 #else
-#define  USE_LINEAR_BUFFER     1
-#endif
-#else
-#define  USE_LINEAR_BUFFER     1
-#endif
-
-#if defined(STM32F102x6) || defined(STM32F102xB) || \
-    defined(STM32F103x6) || defined(STM32F103xB) || \
-    defined(STM32F103xE) || defined(STM32F103xG)
-#define STM32F1_FSDEV
-#endif
-
-#if defined(STM32L412xx) || defined(STM32L422xx) || \
-    defined(STM32L432xx) || defined(STM32L433xx) || \
-    defined(STM32L442xx) || defined(STM32L443xx) || \
-    defined(STM32L452xx) || defined(STM32L462xx)
-#define STM32L4_FSDEV
+  #define  USE_LINEAR_BUFFER     1
 #endif
 
 // Temporarily put the check here for stm32_fsdev
-#if CFG_TUSB_MCU == OPT_MCU_STM32F0                               || \
-    CFG_TUSB_MCU == OPT_MCU_STM32F3                               || \
-    CFG_TUSB_MCU == OPT_MCU_STM32L0                               || \
-    CFG_TUSB_MCU == OPT_MCU_STM32L1                               || \
-    CFG_TUSB_MCU == OPT_MCU_STM32G4                               || \
-    CFG_TUSB_MCU == OPT_MCU_STM32WB                               || \
-    (TU_CHECK_MCU(OPT_MCU_STM32F1) && defined(STM32F1_FSDEV))     || \
-    (TU_CHECK_MCU(OPT_MCU_STM32L4) && defined(STM32L4_FSDEV))
-#define  USE_ISO_EP_ALLOCATION   1
+#ifdef TUP_USBIP_FSDEV
+  #define  USE_ISO_EP_ALLOCATION   1
 #else
-#define  USE_ISO_EP_ALLOCATION   0
+  #define  USE_ISO_EP_ALLOCATION   0
 #endif
 
 // Declaration of buffers
@@ -142,143 +112,159 @@
 
 // EP IN software buffers and mutexes
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && !CFG_TUD_AUDIO_ENABLE_ENCODING
-#if CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ > 0
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ];
-#if CFG_FIFO_MUTEX
-osal_mutex_def_t ep_in_ff_mutex_wr_1;                                                             // No need for read mutex as only USB driver reads from FIFO
-#endif
-#endif // CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ > 0
-#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ > 0
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ];
-#if CFG_FIFO_MUTEX
-osal_mutex_def_t ep_in_ff_mutex_wr_2;                                                             // No need for read mutex as only USB driver reads from FIFO
-#endif
-#endif // CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ > 0
-#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ > 0
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ];
-#if CFG_FIFO_MUTEX
-osal_mutex_def_t ep_in_ff_mutex_wr_3;                                                             // No need for read mutex as only USB driver reads from FIFO
-#endif
-#endif // CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ > 0
+  #if CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ > 0
+    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ];
+    #if CFG_FIFO_MUTEX
+    osal_mutex_def_t ep_in_ff_mutex_wr_1; // No need for read mutex as only USB driver reads from FIFO
+    #endif
+  #endif // CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ > 0
+
+  #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ > 0
+    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ];
+    #if CFG_FIFO_MUTEX
+    osal_mutex_def_t ep_in_ff_mutex_wr_2; // No need for read mutex as only USB driver reads from FIFO
+    #endif
+  #endif // CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ > 0
+
+  #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ > 0
+    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ];
+    #if CFG_FIFO_MUTEX
+    osal_mutex_def_t ep_in_ff_mutex_wr_3; // No need for read mutex as only USB driver reads from FIFO
+    #endif
+  #endif // CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ > 0
 #endif // CFG_TUD_AUDIO_ENABLE_EP_IN && !CFG_TUD_AUDIO_ENABLE_ENCODING
 
 // Linear buffer TX in case:
 // - target MCU is not capable of handling a ring buffer FIFO e.g. no hardware buffer is available or driver is would need to be changed dramatically OR
 // - the software encoding is used - in this case the linear buffers serve as a target memory where logical channels are encoded into
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_ENCODING)
-#if CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX > 0
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX];
-#endif
-#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX > 0
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX];
-#endif
-#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX > 0
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX];
-#endif
+  #if CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX > 0
+    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX];
+  #endif
+
+  #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX > 0
+    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX];
+  #endif
+
+  #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX > 0
+    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX];
+  #endif
 #endif // CFG_TUD_AUDIO_ENABLE_EP_IN && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_DECODING)
 
 // EP OUT software buffers and mutexes
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING
-#if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ > 0
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ];
-#if CFG_FIFO_MUTEX
-osal_mutex_def_t ep_out_ff_mutex_rd_1;                                                            // No need for write mutex as only USB driver writes into FIFO
-#endif
-#endif // CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ > 0
-#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ > 0
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ];
-#if CFG_FIFO_MUTEX
-osal_mutex_def_t ep_out_ff_mutex_rd_2;                                                            // No need for write mutex as only USB driver writes into FIFO
-#endif
-#endif // CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ > 0
-#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ > 0
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ];
-#if CFG_FIFO_MUTEX
-osal_mutex_def_t ep_out_ff_mutex_rd_3;                                                            // No need for write mutex as only USB driver writes into FIFO
-#endif
-#endif // CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ > 0
+  #if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ > 0
+    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ];
+    #if CFG_FIFO_MUTEX
+    osal_mutex_def_t ep_out_ff_mutex_rd_1; // No need for write mutex as only USB driver writes into FIFO
+    #endif
+  #endif // CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ > 0
+
+  #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ > 0
+    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ];
+    #if CFG_FIFO_MUTEX
+    osal_mutex_def_t ep_out_ff_mutex_rd_2; // No need for write mutex as only USB driver writes into FIFO
+    #endif
+  #endif // CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ > 0
+
+  #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ > 0
+    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ];
+    #if CFG_FIFO_MUTEX
+    osal_mutex_def_t ep_out_ff_mutex_rd_3; // No need for write mutex as only USB driver writes into FIFO
+    #endif
+  #endif // CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ > 0
 #endif // CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING
 
 // Linear buffer RX in case:
 // - target MCU is not capable of handling a ring buffer FIFO e.g. no hardware buffer is available or driver is would need to be changed dramatically OR
 // - the software encoding is used - in this case the linear buffers serve as a target memory where logical channels are encoded into
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_DECODING)
-#if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX > 0
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX];
-#endif
-#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX > 0
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX];
-#endif
-#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX > 0
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX];
-#endif
+  #if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX > 0
+    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX];
+  #endif
+
+  #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX > 0
+    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX];
+  #endif
+
+  #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX > 0
+    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX];
+  #endif
 #endif // CFG_TUD_AUDIO_ENABLE_EP_OUT && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_DECODING)
 
 // Control buffers
 CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_1[CFG_TUD_AUDIO_FUNC_1_CTRL_BUF_SZ];
+
 #if CFG_TUD_AUDIO > 1
 CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_2[CFG_TUD_AUDIO_FUNC_2_CTRL_BUF_SZ];
 #endif
+
 #if CFG_TUD_AUDIO > 2
 CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_3[CFG_TUD_AUDIO_FUNC_3_CTRL_BUF_SZ];
 #endif
 
 // Active alternate setting of interfaces
 uint8_t alt_setting_1[CFG_TUD_AUDIO_FUNC_1_N_AS_INT];
+
 #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_N_AS_INT > 0
 uint8_t alt_setting_2[CFG_TUD_AUDIO_FUNC_2_N_AS_INT];
 #endif
+
 #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_N_AS_INT > 0
 uint8_t alt_setting_3[CFG_TUD_AUDIO_FUNC_3_N_AS_INT];
 #endif
 
 // Software encoding/decoding support FIFOs
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_ENCODING
-#if CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ > 0
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ];
-tu_fifo_t tx_supp_ff_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO];
-#if CFG_FIFO_MUTEX
-osal_mutex_def_t tx_supp_ff_mutex_wr_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO];                   // No need for read mutex as only USB driver reads from FIFO
-#endif
-#endif
-#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ > 0
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ];
-tu_fifo_t tx_supp_ff_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO];
-#if CFG_FIFO_MUTEX
-osal_mutex_def_t tx_supp_ff_mutex_wr_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO];                   // No need for read mutex as only USB driver reads from FIFO
-#endif
-#endif
-#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ > 0
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ];
-tu_fifo_t tx_supp_ff_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO];
-#if CFG_FIFO_MUTEX
-osal_mutex_def_t tx_supp_ff_mutex_wr_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO];                   // No need for read mutex as only USB driver reads from FIFO
-#endif
-#endif
+  #if CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ > 0
+    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ];
+    tu_fifo_t tx_supp_ff_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO];
+    #if CFG_FIFO_MUTEX
+    osal_mutex_def_t tx_supp_ff_mutex_wr_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO
+    #endif
+  #endif
+
+  #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ > 0
+    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ];
+    tu_fifo_t tx_supp_ff_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO];
+    #if CFG_FIFO_MUTEX
+    osal_mutex_def_t tx_supp_ff_mutex_wr_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO
+    #endif
+  #endif
+
+  #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ > 0
+    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ];
+    tu_fifo_t tx_supp_ff_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO];
+    #if CFG_FIFO_MUTEX
+    osal_mutex_def_t tx_supp_ff_mutex_wr_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO
+    #endif
+  #endif
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING
-#if CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ > 0
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ];
-tu_fifo_t rx_supp_ff_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO];
-#if CFG_FIFO_MUTEX
-osal_mutex_def_t rx_supp_ff_mutex_rd_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO];                   // No need for write mutex as only USB driver writes into FIFO
-#endif
-#endif
-#if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ > 0
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ];
-tu_fifo_t rx_supp_ff_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO];
-#if CFG_FIFO_MUTEX
-osal_mutex_def_t rx_supp_ff_mutex_rd_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO];                   // No need for write mutex as only USB driver writes into FIFO
-#endif
-#endif
-#if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ > 0
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ];
-tu_fifo_t rx_supp_ff_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO];
-#if CFG_FIFO_MUTEX
-osal_mutex_def_t rx_supp_ff_mutex_rd_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO];                   // No need for write mutex as only USB driver writes into FIFO
-#endif
-#endif
+  #if CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ > 0
+    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ];
+    tu_fifo_t rx_supp_ff_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO];
+    #if CFG_FIFO_MUTEX
+    osal_mutex_def_t rx_supp_ff_mutex_rd_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO
+    #endif
+  #endif
+
+  #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ > 0
+    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ];
+    tu_fifo_t rx_supp_ff_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO];
+    #if CFG_FIFO_MUTEX
+    osal_mutex_def_t rx_supp_ff_mutex_rd_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO
+    #endif
+  #endif
+
+  #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ > 0
+    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ];
+    tu_fifo_t rx_supp_ff_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO];
+    #if CFG_FIFO_MUTEX
+    osal_mutex_def_t rx_supp_ff_mutex_rd_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO
+    #endif
+  #endif
 #endif
 
 typedef struct
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 1f27afa4e..257d08a85 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -48,7 +48,9 @@
  * - RHPORT_HIGHSPEED: support highspeed with on-chip PHY
  */
 
-//------------- NXP -------------//
+//--------------------------------------------------------------------+
+// NXP
+//--------------------------------------------------------------------+
 #if   TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX)
   #define TUP_DCD_ENDPOINT_MAX    5
 
@@ -89,12 +91,16 @@
 #elif TU_CHECK_MCU(OPT_MCU_MM32F327X)
   #define TUP_DCD_ENDPOINT_MAX    16
 
-//------------- Nordic -------------//
+//--------------------------------------------------------------------+
+// Nordic
+//--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_NRF5X)
   // 8 CBI + 1 ISO
   #define TUP_DCD_ENDPOINT_MAX    9
 
-//------------- Microchip -------------//
+//--------------------------------------------------------------------+
+// Microchip
+//--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \
       TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22)
   #define TUP_DCD_ENDPOINT_MAX    8
@@ -117,19 +123,30 @@
   #define TUP_DCD_ENDPOINT_MAX    16
   #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
 
-//------------- ST -------------//
+//--------------------------------------------------------------------+
+// ST
+//--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_STM32F0)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
   #define TUP_DCD_ENDPOINT_MAX    8
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32F1)
+  // - F102, F103 use fsdev
+  // - F105, F107 use dwc2
   #if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \
       defined (STM32F107xB) || defined (STM32F107xC)
     #define TUP_USBIP_DWC2
     #define TUP_USBIP_DWC2_STM32
 
     #define TUP_DCD_ENDPOINT_MAX  4
-  #else
+  #elif defined(STM32F102x6) || defined(STM32F102xB) || \
+        defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)
+    #define TUP_USBIP_FSDEV
+    #define TUP_USBIP_FSDEV_STM32
     #define TUP_DCD_ENDPOINT_MAX  8
+  #else
+    #error "Unsupported STM32F1 mcu"
   #endif
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32F2)
@@ -140,6 +157,8 @@
   #define TUP_DCD_ENDPOINT_MAX    6
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32F3)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
   #define TUP_DCD_ENDPOINT_MAX    8
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32F4)
@@ -168,12 +187,18 @@
   #define TUP_DCD_ENDPOINT_MAX    9
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32G4)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
   #define TUP_DCD_ENDPOINT_MAX    8
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
   #define TUP_DCD_ENDPOINT_MAX    8
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32L4)
+  // - L4x2, L4x3 use fsdev
+  // - L4x4, L4x6, L4x7, L4x9 use dwc2
   #if defined (STM32L475xx) || defined (STM32L476xx) ||                          \
       defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || \
       defined (STM32L4A6xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \
@@ -183,11 +208,18 @@
     #define TUP_USBIP_DWC2_STM32
 
     #define TUP_DCD_ENDPOINT_MAX  6
-  #else
+  #elif defined(STM32L412xx) || defined(STM32L422xx) || defined(STM32L432xx) || defined(STM32L433xx) || \
+        defined(STM32L442xx) || defined(STM32L443xx) || defined(STM32L452xx) || defined(STM32L462xx)
+    #define TUP_USBIP_FSDEV
+    #define TUP_USBIP_FSDEV_STM32
     #define TUP_DCD_ENDPOINT_MAX  8
+  #else
+    #error "Unsupported STM32L4 mcu"
   #endif
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32WB)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
   #define TUP_DCD_ENDPOINT_MAX    8
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32U5)
@@ -195,24 +227,32 @@
   #define TUP_USBIP_DWC2_STM32
   #define TUP_DCD_ENDPOINT_MAX    6
 
-//------------- Sony -------------//
+//--------------------------------------------------------------------+
+// Sony
+//--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_CXD56)
   #define TUP_DCD_ENDPOINT_MAX    7
   #define TUP_RHPORT_HIGHSPEED    1
   #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
 
-//------------- TI -------------//
+//--------------------------------------------------------------------+
+// TI
+//--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx)
   #define TUP_DCD_ENDPOINT_MAX    8
 
 #elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129)
   #define TUP_DCD_ENDPOINT_MAX    8
 
-//------------- ValentyUSB -------------//
+//--------------------------------------------------------------------+
+// ValentyUSB (Litex)
+//--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI)
   #define TUP_DCD_ENDPOINT_MAX    16
 
-//------------- Nuvoton -------------//
+//--------------------------------------------------------------------+
+// Nuvoton
+//--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126)
   #define TUP_DCD_ENDPOINT_MAX    8
 
@@ -223,47 +263,65 @@
   #define TUP_DCD_ENDPOINT_MAX    12
   #define TUP_RHPORT_HIGHSPEED    1
 
-//------------- Espressif -------------//
+//--------------------------------------------------------------------+
+// Espressif
+//--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
   #define TUP_USBIP_DWC2
   #define TUP_DCD_ENDPOINT_MAX    6
 
-//------------- Dialog -------------//
+//--------------------------------------------------------------------+
+// Dialog
+//--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_DA1469X)
   #define TUP_DCD_ENDPOINT_MAX    4
 
-//------------- Raspberry Pi -------------//
+//--------------------------------------------------------------------+
+// Raspberry Pi
+//--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_RP2040)
   #define TUP_DCD_ENDPOINT_MAX    16
 
   #define TU_ATTR_FAST_FUNC       __attribute__((section(".time_critical.tinyusb")))
 
-//------------- Silabs -------------//
+//--------------------------------------------------------------------+
+// Silabs
+//--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_EFM32GG)
   #define TUP_USBIP_DWC2
   #define TUP_DCD_ENDPOINT_MAX    7
 
-//------------- Renesas -------------//
+//--------------------------------------------------------------------+
+// Renesas
+//--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
   #define TUP_DCD_ENDPOINT_MAX    10
 
-//------------- GigaDevice -------------//
+//--------------------------------------------------------------------+
+// GigaDevice
+//--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_GD32VF103)
   #define TUP_USBIP_DWC2
   #define TUP_DCD_ENDPOINT_MAX    4
 
-//------------- Broadcom -------------//
+//--------------------------------------------------------------------+
+// Broadcom
+//--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837)
   #define TUP_USBIP_DWC2
   #define TUP_DCD_ENDPOINT_MAX    8
   #define TUP_RHPORT_HIGHSPEED    1
 
-//------------- Broadcom -------------//
+//--------------------------------------------------------------------+
+// Infineon
+//--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_XMC4000)
   #define TUP_USBIP_DWC2
   #define TUP_DCD_ENDPOINT_MAX    8
 
-//------------- BridgeTek -------------//
+//--------------------------------------------------------------------+
+// BridgeTek
+//--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_FT90X)
   #define TUP_DCD_ENDPOINT_MAX    8
   #define TUP_RHPORT_HIGHSPEED    1
@@ -272,7 +330,9 @@
   #define TUP_DCD_ENDPOINT_MAX    16
   #define TUP_RHPORT_HIGHSPEED    1
 
-//------------ Allwinner -------------//
+//--------------------------------------------------------------------+
+// Allwinner
+//--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_F1C100S)
   #define TUP_DCD_ENDPOINT_MAX    4
 
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 78da9d0e5..e49c0b52e 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -101,32 +101,15 @@
 
 #include "tusb_option.h"
 
-#if defined(STM32F102x6) || defined(STM32F102xB) || \
-    defined(STM32F103x6) || defined(STM32F103xB) || \
-    defined(STM32F103xE) || defined(STM32F103xG)
-#define STM32F1_FSDEV
-#endif
-
-#if defined(STM32L412xx) || defined(STM32L422xx) || \
-    defined(STM32L432xx) || defined(STM32L433xx) || \
-    defined(STM32L442xx) || defined(STM32L443xx) || \
-    defined(STM32L452xx) || defined(STM32L462xx)
-#define STM32L4_FSDEV
-#endif
-
-#if CFG_TUD_ENABLED && \
-      ( TU_CHECK_MCU(OPT_MCU_STM32F0, OPT_MCU_STM32F3, OPT_MCU_STM32L0, OPT_MCU_STM32L1, OPT_MCU_STM32G4, OPT_MCU_STM32WB) || \
-        (TU_CHECK_MCU(OPT_MCU_STM32F1) && defined(STM32F1_FSDEV)) || \
-        (TU_CHECK_MCU(OPT_MCU_STM32L4) && defined(STM32L4_FSDEV)) \
-      )
-
-// In order to reduce the dependence on HAL, we undefine this.
-// Some definitions are copied to our private include file.
-#undef USE_HAL_DRIVER
+#if CFG_TUD_ENABLED && defined(TUP_USBIP_FSDEV)
 
 #include "device/dcd.h"
-#include "portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h"
 
+#ifdef TUP_USBIP_FSDEV_STM32
+  // Undefine to reduce the dependence on HAL
+  #undef USE_HAL_DRIVER
+  #include "portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h"
+#endif
 
 /*****************************************************
  * Configuration
@@ -153,10 +136,7 @@
  */
 
 TU_VERIFY_STATIC((MAX_EP_COUNT) <= STFSDEV_EP_COUNT, "Only 8 endpoints supported on the hardware");
-
-TU_VERIFY_STATIC(((DCD_STM32_BTABLE_BASE) + (DCD_STM32_BTABLE_LENGTH))<=(PMA_LENGTH),
-    "BTABLE does not fit in PMA RAM");
-
+TU_VERIFY_STATIC(((DCD_STM32_BTABLE_BASE) + (DCD_STM32_BTABLE_LENGTH))<=(PMA_LENGTH), "BTABLE does not fit in PMA RAM");
 TU_VERIFY_STATIC(((DCD_STM32_BTABLE_BASE) % 8) == 0, "BTABLE base must be aligned to 8 bytes");
 
 //--------------------------------------------------------------------+
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index 039fb13d2..015b177cf 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -1,12 +1,6 @@
 /**
-  ******************************************************************************
-  * @file    dcd_stm32f0_pvt_st.h
-  * @brief   DCD utilities from ST code
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
-  * <h2><center>&copy; parts COPYRIGHT(c) N Conrad</center></h2>
+  * Copyright(c) 2016 STMicroelectronics
+  * Copyright(c) N Conrad
   *
   * Redistribution and use in source and binary forms, with or without modification,
   * are permitted provided that the following conditions are met:
@@ -30,7 +24,7 @@
   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
-  **********/
+  */
 
 // This file contains source copied from ST's HAL, and thus should have their copyright statement.
 
@@ -41,10 +35,7 @@
 #ifndef PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_
 #define PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_
 
-#if defined(STM32F042x6) || \
-    defined(STM32F070x6) || defined(STM32F070xB) || \
-    defined(STM32F072xB) || \
-    defined(STM32F078xx)
+#if CFG_TUSB_MCU == OPT_MCU_STM32F0
   #include "stm32f0xx.h"
   #define PMA_LENGTH (1024u)
   // F0x2 models are crystal-less
@@ -52,7 +43,7 @@
   // 070RB:    2 x 16 bits/word memory     LPM Support, BCD Support
   // PMA dedicated to USB (no sharing with CAN)
 
-#elif defined(STM32F1_FSDEV)
+#elif CFG_TUSB_MCU == OPT_MCU_STM32F1
   #include "stm32f1xx.h"
   #define PMA_LENGTH (512u)
   // NO internal Pull-ups

From b7fa90e7066fff8a529d02c2a51a3319f25c77f8 Mon Sep 17 00:00:00 2001
From: graham sanderson <graham.sanderson@raspberrypi.com>
Date: Thu, 2 Mar 2023 14:32:22 -0600
Subject: [PATCH 101/691] rp2040: Fixup lib and example compile for LLVM
 Embedded Toolchain for ARM

---
 examples/host/msc_file_explorer/src/msc_app.c |  2 +-
 hw/bsp/rp2040/family.cmake                    | 20 ++++++++++++++++---
 src/portable/raspberrypi/rp2040/dcd_rp2040.c  |  2 +-
 3 files changed, 19 insertions(+), 5 deletions(-)

diff --git a/examples/host/msc_file_explorer/src/msc_app.c b/examples/host/msc_file_explorer/src/msc_app.c
index 5a1635015..eef28fe12 100644
--- a/examples/host/msc_file_explorer/src/msc_app.c
+++ b/examples/host/msc_file_explorer/src/msc_app.c
@@ -413,7 +413,7 @@ void cli_cmd_cat(EmbeddedCli *cli, char *args, void *context)
       {
         for(UINT c = 0; c < count; c++)
         {
-          const char ch = buf[c];
+          const uint8_t ch = buf[c];
           if (isprint(ch) || iscntrl(ch))
           {
             putchar(ch);
diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index 1eab95304..82010efef 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -152,6 +152,9 @@ if (NOT TARGET _rp2040_family_inclusion_marker)
 		if (NOT PICO_TINYUSB_NO_EXAMPLE_WARNINGS)
 			family_add_default_example_warnings(${TARGET})
 		endif()
+		if(CMAKE_C_COMPILER_ID STREQUAL "Clang")
+			target_compile_options(${TARGET} PRIVATE -Wno-unreachable-code)
+		endif()
 		suppress_tinyusb_warnings()
 	endfunction()
 
@@ -172,8 +175,8 @@ if (NOT TARGET _rp2040_family_inclusion_marker)
 
 		# For rp2040 enable pico-pio-usb
 		if (TARGET tinyusb_pico_pio_usb)
-			# code does not compile with GCC 12+
-			if (NOT (CMAKE_C_COMPILER_ID STREQUAL "GNU" AND CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 11.3))
+			# code does not compile with non GCC, or GCC 11.3+
+			if (CMAKE_C_COMPILER_ID STREQUAL "GNU" AND NOT CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 11.3)
 				family_add_pico_pio_usb(${PROJECT})
 			endif()
 		endif()
@@ -278,7 +281,7 @@ if (NOT TARGET _rp2040_family_inclusion_marker)
 							COMPILE_FLAGS "-Wno-conversion")
 				endforeach()
 			endif()
-			if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 11.0)
+			if (CMAKE_C_COMPILER_ID STREQUAL "GNU" AND CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 11.0)
 				set_source_files_properties(
 						${PICO_TINYUSB_PATH}/lib/fatfs/source/ff.c
 						COMPILE_FLAGS "-Wno-stringop-overflow -Wno-array-bounds")
@@ -310,6 +313,17 @@ if (NOT TARGET _rp2040_family_inclusion_marker)
 						PROPERTIES
 						COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual -Wno-attributes")
 			endif()
+		elseif(CMAKE_C_COMPILER_ID STREQUAL "Clang")
+			set_source_files_properties(
+					${PICO_TINYUSB_PATH}/src/class/cdc/cdc_device.c
+					COMPILE_FLAGS "-Wno-unreachable-code")
+			set_source_files_properties(
+					${PICO_TINYUSB_PATH}/src/class/cdc/cdc_host.c
+					COMPILE_FLAGS "-Wno-unreachable-code-fallthrough")
+			set_source_files_properties(
+					${PICO_TINYUSB_PATH}/lib/fatfs/source/ff.c
+					PROPERTIES
+					COMPILE_FLAGS "-Wno-cast-qual")
 		endif()
 	endfunction()
 endif()
diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
index b5fa90c92..8df7bef2b 100644
--- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
@@ -297,7 +297,7 @@ static void __tusb_irq_path_func(dcd_rp2040_irq)(void)
   if ( status & USB_INTS_SETUP_REQ_BITS )
   {
     handled |= USB_INTS_SETUP_REQ_BITS;
-    uint8_t const * setup = (uint8_t const*) &usb_dpram->setup_packet;
+    uint8_t const * setup = remove_volatile_cast(uint8_t const*, &usb_dpram->setup_packet);
 
     // reset pid to both 1 (data and ack)
     reset_ep0_pid();

From e92583ffd73d5307b918be2e4c7e39b978a804ed Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 3 Mar 2023 15:37:17 +0700
Subject: [PATCH 102/691] try adding build for windows and macos

---
 .github/workflows/build_win_mac.yml | 55 +++++++++++++++++++++++++++++
 1 file changed, 55 insertions(+)
 create mode 100644 .github/workflows/build_win_mac.yml

diff --git a/.github/workflows/build_win_mac.yml b/.github/workflows/build_win_mac.yml
new file mode 100644
index 000000000..f41457617
--- /dev/null
+++ b/.github/workflows/build_win_mac.yml
@@ -0,0 +1,55 @@
+name: Build Windows/MacOS
+
+on:
+  push:
+    paths:
+      - 'src/**'
+      - 'examples/**'
+      - 'lib/**'
+      - 'hw/**'
+      - '.github/workflows/build_win_mac.yml'
+  pull_request:
+    branches: [ master ]
+    paths:
+      - 'src/**'
+      - 'examples/**'
+      - 'lib/**'
+      - 'hw/**'
+      - '.github/workflows/build_win_mac.yml'
+
+concurrency:
+  group: ${{ github.workflow }}-${{ github.head_ref || github.run_id }}
+  cancel-in-progress: true
+
+jobs:
+  # ---------------------------------------
+  # Build ARM family
+  # ---------------------------------------
+  build-arm:
+    strategy:
+      matrix:
+        os: [windows-latest, macos-latest]
+    runs-on: ${{ matrix.os }}
+
+    steps:
+    - name: Setup Python
+      uses: actions/setup-python@v4
+      with:
+        python-version: '3.x'
+
+    - name: Install ARM GCC
+      uses: carlosperate/arm-none-eabi-gcc-action@v1
+      with:
+        release: '11.2-2022.02'
+
+    - name: Checkout TinyUSB
+      uses: actions/checkout@v3
+
+    - name: Checkout common submodules in lib
+      run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip
+
+    - name: Get Dependencies
+      run: python3 tools/get_dependencies.py stm32f0
+
+    - name: Build
+      run: python3 tools/build_family.py stm32f0

From 9a8a9359e40c93c187743a469f3d984dbf2f6413 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 3 Mar 2023 15:55:34 +0700
Subject: [PATCH 103/691] use make abspath intead of shell realpath

---
 .github/workflows/build_win_mac.yml |  1 +
 tools/top.mk                        | 11 ++++++-----
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/.github/workflows/build_win_mac.yml b/.github/workflows/build_win_mac.yml
index f41457617..5ff7fa6f8 100644
--- a/.github/workflows/build_win_mac.yml
+++ b/.github/workflows/build_win_mac.yml
@@ -27,6 +27,7 @@ jobs:
   # ---------------------------------------
   build-arm:
     strategy:
+      fail-fast: false
       matrix:
         os: [windows-latest, macos-latest]
     runs-on: ${{ matrix.os }}
diff --git a/tools/top.mk b/tools/top.mk
index af8d698f5..2800f9571 100644
--- a/tools/top.mk
+++ b/tools/top.mk
@@ -26,20 +26,21 @@ THIS_MAKEFILE := $(lastword $(MAKEFILE_LIST))
 
 # strip off /tools/top.mk to get for example ../../..
 TOP := $(patsubst %/tools/top.mk,%,$(THIS_MAKEFILE))
-#$(info top.mk: Initial TOP=$(TOP))
+$(info top.mk: Initial TOP=$(TOP))
 
 # Set TOP to an absolute path, for example /tinyUSB (from ../../..)
 ifeq ($(CMDEXE),1)
 TOP := $(subst \,/,$(shell for %%i in ( $(TOP) ) do echo %%~fi))
 else
-TOP := $(shell realpath $(TOP))
+TOP := $(abspath $(TOP))
 endif
-#$(info top.mk: Top directory is $(TOP))
+
+$(info top.mk: Top directory is $(TOP))
 
 # Set CURRENT_PATH to the relative path from TOP to the current directory, ie examples/device/cdc_msc_freertos
 ifeq ($(CMDEXE),1)
 CURRENT_PATH := $(subst $(TOP)/,,$(subst \,/,$(shell echo %CD%)))
 else
-CURRENT_PATH := $(shell realpath --relative-to=$(TOP) `pwd`)
+CURRENT_PATH = $(subst $(TOP)/,,$(abspath .))
 endif
-#$(info top.mk: Path from top is $(CURRENT_PATH))
+$(info top.mk: CURRENT_PATH = $(CURRENT_PATH))

From 70895358481255d5349461f99dc1f536aafec6ce Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 3 Mar 2023 16:13:12 +0700
Subject: [PATCH 104/691] clean up f0 warnings

---
 hw/bsp/stm32f0/family.c             | 2 +-
 hw/bsp/stm32f0/family.mk            | 2 +-
 hw/bsp/stm32f0/stm32f0xx_hal_conf.h | 4 ++--
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/bsp/stm32f0/family.c b/hw/bsp/stm32f0/family.c
index a7e914128..0765f361d 100644
--- a/hw/bsp/stm32f0/family.c
+++ b/hw/bsp/stm32f0/family.c
@@ -165,7 +165,7 @@ void HardFault_Handler (void)
   * @param  line: assert_param error line source number
   * @retval None
   */
-void assert_failed(uint8_t* file, uint32_t line)
+void assert_failed(const char* file, uint32_t line)
 {
   (void) file; (void) line;
   /* USER CODE BEGIN 6 */
diff --git a/hw/bsp/stm32f0/family.mk b/hw/bsp/stm32f0/family.mk
index 2983af49e..a065e9221 100644
--- a/hw/bsp/stm32f0/family.mk
+++ b/hw/bsp/stm32f0/family.mk
@@ -24,7 +24,7 @@ GCC_CFLAGS += \
   -nostdlib -nostartfiles \
 
 # suppress warning caused by vendor mcu driver
-GCC_CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=cast-qual
+GCC_CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align
 
 # IAR Flags
 IAR_CFLAGS += --cpu cortex-m0
diff --git a/hw/bsp/stm32f0/stm32f0xx_hal_conf.h b/hw/bsp/stm32f0/stm32f0xx_hal_conf.h
index cfa66b366..0bf053e13 100644
--- a/hw/bsp/stm32f0/stm32f0xx_hal_conf.h
+++ b/hw/bsp/stm32f0/stm32f0xx_hal_conf.h
@@ -303,9 +303,9 @@
   *         If expr is true, it returns no value.
   * @retval None
   */
-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed(__FILE__, __LINE__))
 /* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
+  void assert_failed(const char* file, uint32_t line);
 #else
   #define assert_param(expr) ((void)0U)
 #endif /* USE_FULL_ASSERT */    

From 363fcc5b6816c98c0e3e951f17a108c35fbd86da Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 3 Mar 2023 16:24:33 +0700
Subject: [PATCH 105/691] only build 1 board on windows/macos

---
 .github/workflows/build_win_mac.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/build_win_mac.yml b/.github/workflows/build_win_mac.yml
index 5ff7fa6f8..c3aaa316a 100644
--- a/.github/workflows/build_win_mac.yml
+++ b/.github/workflows/build_win_mac.yml
@@ -53,4 +53,4 @@ jobs:
       run: python3 tools/get_dependencies.py stm32f0
 
     - name: Build
-      run: python3 tools/build_family.py stm32f0
+      run: python3 tools/build_family.py stm32f0 stm32f072disco

From a99ee1b1a238b3edc6f2511543ffed2a3a1b657e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 4 Mar 2023 20:08:10 +0700
Subject: [PATCH 106/691] bump up gcc, test macos uname

---
 .github/workflows/build_win_mac.yml | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/build_win_mac.yml b/.github/workflows/build_win_mac.yml
index c3aaa316a..c2e961f23 100644
--- a/.github/workflows/build_win_mac.yml
+++ b/.github/workflows/build_win_mac.yml
@@ -38,10 +38,13 @@ jobs:
       with:
         python-version: '3.x'
 
+    - if: matrix.os == 'macos-latest'
+      run: uname -a
+
     - name: Install ARM GCC
       uses: carlosperate/arm-none-eabi-gcc-action@v1
       with:
-        release: '11.2-2022.02'
+        release: '12.2.Rel1'
 
     - name: Checkout TinyUSB
       uses: actions/checkout@v3

From b4ef98cbdcac8a6bec4caee05920afc37a745149 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 5 Mar 2023 10:57:16 +0700
Subject: [PATCH 107/691] fix ci build on windows

---
 examples/make.mk | 4 ++--
 tools/top.mk     | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/examples/make.mk b/examples/make.mk
index dd7a5cf4e..5b364baf7 100644
--- a/examples/make.mk
+++ b/examples/make.mk
@@ -74,16 +74,16 @@ else
   SIZE = $(CROSS_COMPILE)size
 endif
 
-MKDIR = mkdir
-
 ifeq ($(CMDEXE),1)
   CP = copy
   RM = del
   PYTHON = python
+  MKDIR = cmd /e /c mkdir
 else
   SED = sed
   CP = cp
   RM = rm
+  MKDIR = mkdir
   PYTHON = python3
 endif
 
diff --git a/tools/top.mk b/tools/top.mk
index 2800f9571..d2388201a 100644
--- a/tools/top.mk
+++ b/tools/top.mk
@@ -25,7 +25,7 @@ endif
 THIS_MAKEFILE := $(lastword $(MAKEFILE_LIST))
 
 # strip off /tools/top.mk to get for example ../../..
-TOP := $(patsubst %/tools/top.mk,%,$(THIS_MAKEFILE))
+TOP := $(subst /tools/top.mk,,$(THIS_MAKEFILE))
 $(info top.mk: Initial TOP=$(TOP))
 
 # Set TOP to an absolute path, for example /tinyUSB (from ../../..)

From 8a493485e802673a877e43a53c7181a9668c7d51 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 5 Mar 2023 13:39:38 +0700
Subject: [PATCH 108/691] more ci test

---
 .github/workflows/build_win_mac.yml | 2 +-
 examples/make.mk                    | 3 +--
 examples/rules.mk                   | 4 ++++
 3 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/.github/workflows/build_win_mac.yml b/.github/workflows/build_win_mac.yml
index c2e961f23..6d4f8ff80 100644
--- a/.github/workflows/build_win_mac.yml
+++ b/.github/workflows/build_win_mac.yml
@@ -44,7 +44,7 @@ jobs:
     - name: Install ARM GCC
       uses: carlosperate/arm-none-eabi-gcc-action@v1
       with:
-        release: '12.2.Rel1'
+        release: '10.3-2021.10'
 
     - name: Checkout TinyUSB
       uses: actions/checkout@v3
diff --git a/examples/make.mk b/examples/make.mk
index 5b364baf7..8a0b6db6b 100644
--- a/examples/make.mk
+++ b/examples/make.mk
@@ -77,10 +77,9 @@ endif
 ifeq ($(CMDEXE),1)
   CP = copy
   RM = del
+  MKDIR = mkdir
   PYTHON = python
-  MKDIR = cmd /e /c mkdir
 else
-  SED = sed
   CP = cp
   RM = rm
   MKDIR = mkdir
diff --git a/examples/rules.mk b/examples/rules.mk
index dcef934ab..06bc593ba 100644
--- a/examples/rules.mk
+++ b/examples/rules.mk
@@ -265,7 +265,11 @@ debug-bmp: $(BUILD)/$(PROJECT).elf
 
 # Create binary directory
 $(BIN):
+ifeq ($(CMDEXE),1)
+	@$(MKDIR) $(subst /,\,$@)
+else
 	@$(MKDIR) -p $@
+endif
 
 # Copy binaries .elf, .bin, .hex, .uf2 to BIN for upload
 # due to large size of combined artifacts, only uf2 is uploaded for now

From 9824981ee80f38791ec8de2d26ab928a382e852f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 5 Mar 2023 15:35:02 +0700
Subject: [PATCH 109/691] ignore mkdir in windows ci

---
 .github/workflows/build_win_mac.yml | 2 +-
 examples/rules.mk                   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/build_win_mac.yml b/.github/workflows/build_win_mac.yml
index 6d4f8ff80..46aa4a784 100644
--- a/.github/workflows/build_win_mac.yml
+++ b/.github/workflows/build_win_mac.yml
@@ -44,7 +44,7 @@ jobs:
     - name: Install ARM GCC
       uses: carlosperate/arm-none-eabi-gcc-action@v1
       with:
-        release: '10.3-2021.10'
+        release: '11.2-2022.02'
 
     - name: Checkout TinyUSB
       uses: actions/checkout@v3
diff --git a/examples/rules.mk b/examples/rules.mk
index 06bc593ba..76be50b9c 100644
--- a/examples/rules.mk
+++ b/examples/rules.mk
@@ -112,7 +112,7 @@ OBJ_DIRS = $(sort $(dir $(OBJ)))
 $(OBJ): | $(OBJ_DIRS)
 $(OBJ_DIRS):
 ifeq ($(CMDEXE),1)
-	@$(MKDIR) $(subst /,\,$@)
+	-@$(MKDIR) $(subst /,\,$@)
 else
 	@$(MKDIR) -p $@
 endif

From 0a1a61bb6c921d033fc8bce0718b56e2d334323b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 5 Mar 2023 15:42:05 +0700
Subject: [PATCH 110/691] try gcc 12.2 with macos

---
 .github/workflows/build_win_mac.yml | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/.github/workflows/build_win_mac.yml b/.github/workflows/build_win_mac.yml
index 46aa4a784..a4b0ad220 100644
--- a/.github/workflows/build_win_mac.yml
+++ b/.github/workflows/build_win_mac.yml
@@ -44,7 +44,7 @@ jobs:
     - name: Install ARM GCC
       uses: carlosperate/arm-none-eabi-gcc-action@v1
       with:
-        release: '11.2-2022.02'
+        release: '12.2.Rel1'
 
     - name: Checkout TinyUSB
       uses: actions/checkout@v3
@@ -53,7 +53,7 @@ jobs:
       run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip
 
     - name: Get Dependencies
-      run: python3 tools/get_dependencies.py stm32f0
+      run: python3 tools/get_dependencies.py stm32f4
 
     - name: Build
-      run: python3 tools/build_family.py stm32f0 stm32f072disco
+      run: python3 tools/build_family.py stm32f4 stm32f411disco

From 95cfa37bf56ee45f9bdd82e013c44604d29d7cb6 Mon Sep 17 00:00:00 2001
From: Nathaniel Brough <nathaniel.brough@gmail.com>
Date: Sun, 5 Mar 2023 18:47:48 -0800
Subject: [PATCH 111/691] fix: Fix wrong destsz used with tu_memcpy_s

Bug: #1935
---
 src/class/audio/audio_device.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index d9c873851..f21dfee64 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -2290,7 +2290,7 @@ bool tud_audio_buffer_and_schedule_control_xfer(uint8_t rhport, tusb_control_req
   if (len > _audiod_fct[func_id].ctrl_buf_sz) len = _audiod_fct[func_id].ctrl_buf_sz;
 
   // Copy into buffer
-  TU_VERIFY(0 == tu_memcpy_s(_audiod_fct[func_id].ctrl_buf, sizeof(_audiod_fct[func_id].ctrl_buf), data, (size_t)len));
+  TU_VERIFY(0 == tu_memcpy_s(_audiod_fct[func_id].ctrl_buf, _audiod_fct[func_id].ctrl_buf_sz, data, (size_t)len));
 
   // Schedule transmit
   return tud_control_xfer(rhport, p_request, (void*)_audiod_fct[func_id].ctrl_buf, len);

From 956d1c9c4e6c26e1c7de70c1c2e01a5380dd3dfe Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 6 Mar 2023 10:33:04 +0700
Subject: [PATCH 112/691] update size to fix macos ci

---
 examples/make.mk     |  2 +-
 tools/build_utils.py | 12 +++++++++---
 2 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/examples/make.mk b/examples/make.mk
index 8a0b6db6b..e02d226b6 100644
--- a/examples/make.mk
+++ b/examples/make.mk
@@ -61,7 +61,7 @@ ifdef USE_IAR
   AS = iasmarm
   LD = ilinkarm
   OBJCOPY = ielftool
-  SIZE = echo "size not available for IAR"
+  SIZE = size
 
 else
   CC = $(CROSS_COMPILE)gcc
diff --git a/tools/build_utils.py b/tools/build_utils.py
index ad1daf8c7..0dbfd3356 100644
--- a/tools/build_utils.py
+++ b/tools/build_utils.py
@@ -114,9 +114,15 @@ def build_example(example, board, make_option):
 
 
 def build_size(example, board):
-    elf_file = 'examples/{}/_build/{}/*.elf'.format(example, board)
-    size_output = subprocess.run('size {}'.format(elf_file), shell=True, stdout=subprocess.PIPE).stdout.decode("utf-8")
-    size_list = size_output.split('\n')[1].split('\t')
+    size_cmd = 'make -j -C examples/{} BOARD={} size'.format(example, board)
+    size_output = subprocess.run(size_cmd, shell=True, stdout=subprocess.PIPE).stdout.decode("utf-8").splitlines()
+    for i, l in enumerate(size_output):
+        text_title = 'text	   data	    bss	    dec'
+        if text_title in l:
+            size_list = size_output[i+1].split('\t')
+            break
+
     flash_size = int(size_list[0])
     sram_size = int(size_list[1]) + int(size_list[2])
     return (flash_size, sram_size)
+

From 5c537c25f00dad43c4839ba1bffe7d9cd03cc87f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 6 Mar 2023 11:16:21 +0700
Subject: [PATCH 113/691] change gcc to 10.3 due to freeRTOS warning

---
 .github/workflows/build_win_mac.yml | 2 +-
 hw/bsp/stm32f1/family.c             | 2 +-
 hw/bsp/stm32f1/stm32f1xx_hal_conf.h | 4 ++--
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/.github/workflows/build_win_mac.yml b/.github/workflows/build_win_mac.yml
index a4b0ad220..4b899cfb6 100644
--- a/.github/workflows/build_win_mac.yml
+++ b/.github/workflows/build_win_mac.yml
@@ -44,7 +44,7 @@ jobs:
     - name: Install ARM GCC
       uses: carlosperate/arm-none-eabi-gcc-action@v1
       with:
-        release: '12.2.Rel1'
+        release: '10.3-2021.10'
 
     - name: Checkout TinyUSB
       uses: actions/checkout@v3
diff --git a/hw/bsp/stm32f1/family.c b/hw/bsp/stm32f1/family.c
index 246d496c8..61b40badd 100644
--- a/hw/bsp/stm32f1/family.c
+++ b/hw/bsp/stm32f1/family.c
@@ -151,7 +151,7 @@ void HardFault_Handler (void)
   * @param  line: assert_param error line source number
   * @retval None
   */
-void assert_failed(char *file, uint32_t line)
+void assert_failed(const char *file, uint32_t line)
 { 
   /* USER CODE BEGIN 6 */
   /* User can add his own implementation to report the file name and line number,
diff --git a/hw/bsp/stm32f1/stm32f1xx_hal_conf.h b/hw/bsp/stm32f1/stm32f1xx_hal_conf.h
index a4a3f3086..5243e5bca 100644
--- a/hw/bsp/stm32f1/stm32f1xx_hal_conf.h
+++ b/hw/bsp/stm32f1/stm32f1xx_hal_conf.h
@@ -362,9 +362,9 @@
   *         If expr is true, it returns no value.
   * @retval None
   */
-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed(__FILE__, __LINE__))
 /* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
+  void assert_failed(const char* file, uint32_t line);
 #else
   #define assert_param(expr) ((void)0U)
 #endif /* USE_FULL_ASSERT */    

From 9930863b412cc4e6b762a1a5aa300d94f2ea0518 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 6 Mar 2023 12:45:47 +0700
Subject: [PATCH 114/691] fix iar ci

---
 examples/rules.mk        | 30 +++++++++++++++---------------
 hw/bsp/stm32f0/family.mk |  4 +++-
 hw/bsp/stm32f4/family.mk |  1 +
 hw/bsp/stm32f7/family.mk |  1 +
 hw/bsp/stm32g4/family.mk |  1 +
 hw/bsp/stm32h7/family.mk |  3 +++
 hw/bsp/stm32l4/family.mk |  4 +++-
 tools/build_utils.py     |  9 ++++-----
 8 files changed, 31 insertions(+), 22 deletions(-)

diff --git a/examples/rules.mk b/examples/rules.mk
index 76be50b9c..3254112cf 100644
--- a/examples/rules.mk
+++ b/examples/rules.mk
@@ -139,7 +139,21 @@ $(BUILD)/obj/%_asm.o: %.S
 	@echo AS $(notdir $@)
 	@$(AS) $(ASFLAGS) -c -o $@ $<
 
-ifndef USE_IAR
+ifdef USE_IAR
+# IAR Compiler
+$(BUILD)/$(PROJECT).bin: $(BUILD)/$(PROJECT).elf
+	@echo CREATE $@
+	@$(OBJCOPY) --silent --bin $^ $@
+
+$(BUILD)/$(PROJECT).hex: $(BUILD)/$(PROJECT).elf
+	@echo CREATE $@
+	@$(OBJCOPY) --silent --ihex $^ $@
+
+$(BUILD)/$(PROJECT).elf: $(OBJ)
+	@echo LINK $@
+	@$(LD) -o $@ $(IAR_LDFLAGS) $^
+
+else
 # GCC based compiler
 $(BUILD)/$(PROJECT).bin: $(BUILD)/$(PROJECT).elf
 	@echo CREATE $@
@@ -153,20 +167,6 @@ $(BUILD)/$(PROJECT).elf: $(OBJ)
 	@echo LINK $@
 	@$(LD) -o $@ $(LDFLAGS) $^ -Wl,--start-group $(LIBS) -Wl,--end-group
 
-else
-
-# IAR Compiler
-$(BUILD)/$(PROJECT).bin: $(BUILD)/$(PROJECT).elf
-	@echo CREATE $@
-	@$(OBJCOPY) --silent --bin $^ $@
-
-$(BUILD)/$(PROJECT).hex: $(BUILD)/$(PROJECT).elf
-	@echo CREATE $@
-	@$(OBJCOPY) --silent --ihex $^ $@
-
-$(BUILD)/$(PROJECT).elf: $(OBJ)
-	@echo LINK $@
-	@$(LD) -o $@ $(IAR_LDFLAGS) $^
 endif
 
 # UF2 generation, iMXRT need to strip to text only before conversion
diff --git a/hw/bsp/stm32f0/family.mk b/hw/bsp/stm32f0/family.mk
index a065e9221..1ae2aa5fc 100644
--- a/hw/bsp/stm32f0/family.mk
+++ b/hw/bsp/stm32f0/family.mk
@@ -42,7 +42,9 @@ SRC_C += \
   $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
   $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
   $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
-  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c
+  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_dma.c \
+  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c \
+  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart_ex.c
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
diff --git a/hw/bsp/stm32f4/family.mk b/hw/bsp/stm32f4/family.mk
index e8352bad7..860955729 100644
--- a/hw/bsp/stm32f4/family.mk
+++ b/hw/bsp/stm32f4/family.mk
@@ -42,6 +42,7 @@ SRC_C += \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_dma.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c
 
 INC += \
diff --git a/hw/bsp/stm32f7/family.mk b/hw/bsp/stm32f7/family.mk
index 781b8bb18..a54e43780 100644
--- a/hw/bsp/stm32f7/family.mk
+++ b/hw/bsp/stm32f7/family.mk
@@ -52,6 +52,7 @@ SRC_C += \
 	$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_dma.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
diff --git a/hw/bsp/stm32g4/family.mk b/hw/bsp/stm32g4/family.mk
index 79defac56..ad9babf3f 100644
--- a/hw/bsp/stm32g4/family.mk
+++ b/hw/bsp/stm32g4/family.mk
@@ -43,6 +43,7 @@ SRC_C += \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart_ex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c
 
 INC += \
diff --git a/hw/bsp/stm32h7/family.mk b/hw/bsp/stm32h7/family.mk
index 834347b4b..e1b2cd40e 100644
--- a/hw/bsp/stm32h7/family.mk
+++ b/hw/bsp/stm32h7/family.mk
@@ -52,10 +52,13 @@ SRC_C += \
 	$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_dma.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart_ex.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c
 
 INC += \
diff --git a/hw/bsp/stm32l4/family.mk b/hw/bsp/stm32l4/family.mk
index 4fab7dc0d..84aa357e9 100644
--- a/hw/bsp/stm32l4/family.mk
+++ b/hw/bsp/stm32l4/family.mk
@@ -39,12 +39,14 @@ SRC_C += \
 	$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_dma.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
-	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart_ex.c
 
 INC += \
 	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
diff --git a/tools/build_utils.py b/tools/build_utils.py
index 0dbfd3356..a24cea7bb 100644
--- a/tools/build_utils.py
+++ b/tools/build_utils.py
@@ -120,9 +120,8 @@ def build_size(example, board):
         text_title = 'text	   data	    bss	    dec'
         if text_title in l:
             size_list = size_output[i+1].split('\t')
-            break
-
-    flash_size = int(size_list[0])
-    sram_size = int(size_list[1]) + int(size_list[2])
-    return (flash_size, sram_size)
+            flash_size = int(size_list[0])
+            sram_size = int(size_list[1]) + int(size_list[2])
+            return (flash_size, sram_size)
 
+    return (0, 0)
\ No newline at end of file

From b6404d143ed218ad13dce62bd16b9a21de3bba79 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 6 Mar 2023 13:03:55 +0700
Subject: [PATCH 115/691] clean up top

---
 tools/top.mk | 21 ++-------------------
 1 file changed, 2 insertions(+), 19 deletions(-)

diff --git a/tools/top.mk b/tools/top.mk
index d2388201a..fdae6337c 100644
--- a/tools/top.mk
+++ b/tools/top.mk
@@ -16,31 +16,14 @@ CMDEXE := 1
 SHELL := cmd.exe
 endif
 
-#$(info top.mk: SHELL=$(SHELL))
-#$(info top.mk: CMDEXE=$(CMDEXE))
-
 # Set TOP to be the path to get from the current directory (where make was
 # invoked) to the top of the tree. $(lastword $(MAKEFILE_LIST)) returns
 # the name of this makefile relative to where make was invoked.
 THIS_MAKEFILE := $(lastword $(MAKEFILE_LIST))
 
 # strip off /tools/top.mk to get for example ../../..
-TOP := $(subst /tools/top.mk,,$(THIS_MAKEFILE))
-$(info top.mk: Initial TOP=$(TOP))
-
-# Set TOP to an absolute path, for example /tinyUSB (from ../../..)
-ifeq ($(CMDEXE),1)
-TOP := $(subst \,/,$(shell for %%i in ( $(TOP) ) do echo %%~fi))
-else
-TOP := $(abspath $(TOP))
-endif
-
-$(info top.mk: Top directory is $(TOP))
+# and Set TOP to an absolute path
+TOP = $(abspath $(subst /tools/top.mk,,$(THIS_MAKEFILE)))
 
 # Set CURRENT_PATH to the relative path from TOP to the current directory, ie examples/device/cdc_msc_freertos
-ifeq ($(CMDEXE),1)
-CURRENT_PATH := $(subst $(TOP)/,,$(subst \,/,$(shell echo %CD%)))
-else
 CURRENT_PATH = $(subst $(TOP)/,,$(abspath .))
-endif
-$(info top.mk: CURRENT_PATH = $(CURRENT_PATH))

From e62d1a03acfa2a3b8afa0568690fdcad5495c260 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 6 Mar 2023 13:25:56 +0700
Subject: [PATCH 116/691] integrate top.mk into make.mk

---
 examples/device/audio_4_channel_mic/Makefile  |   1 -
 examples/device/audio_test/Makefile           |   1 -
 .../device/audio_test_multi_rate/Makefile     |   1 -
 examples/device/board_test/Makefile           |   1 -
 examples/device/cdc_dual_ports/Makefile       |   1 -
 examples/device/cdc_msc/Makefile              |   1 -
 examples/device/cdc_msc_freertos/Makefile     |   1 -
 examples/device/dfu/Makefile                  |   1 -
 examples/device/dfu_runtime/Makefile          |   1 -
 .../device/dynamic_configuration/Makefile     |   1 -
 examples/device/hid_boot_interface/Makefile   |   1 -
 examples/device/hid_composite/Makefile        |   1 -
 .../device/hid_composite_freertos/Makefile    |   1 -
 examples/device/hid_generic_inout/Makefile    |   1 -
 .../device/hid_multiple_interface/Makefile    |   1 -
 examples/device/midi_test/Makefile            |   1 -
 examples/device/msc_dual_lun/Makefile         |   1 -
 examples/device/net_lwip_webserver/Makefile   |   1 -
 examples/device/uac2_headset/Makefile         |   1 -
 examples/device/usbtmc/Makefile               |   1 -
 examples/device/video_capture/Makefile        |   1 -
 examples/device/webusb_serial/Makefile        |   1 -
 examples/dual/host_hid_to_device_cdc/Makefile |   1 -
 examples/host/bare_api/Makefile               |   1 -
 examples/host/cdc_msc_hid/Makefile            |   1 -
 examples/host/hid_controller/Makefile         |   1 -
 examples/host/msc_file_explorer/Makefile      |   1 -
 examples/make.mk                              | 110 +++++++++++-------
 test/fuzz/device/cdc/Makefile                 |   1 -
 test/fuzz/device/msc/Makefile                 |   1 -
 test/fuzz/device/net/Makefile                 |   1 -
 test/fuzz/make.mk                             |  30 ++++-
 tools/top.mk                                  |  29 -----
 33 files changed, 97 insertions(+), 102 deletions(-)
 delete mode 100644 tools/top.mk

diff --git a/examples/device/audio_4_channel_mic/Makefile b/examples/device/audio_4_channel_mic/Makefile
index 5a455078e..2a3d854fb 100644
--- a/examples/device/audio_4_channel_mic/Makefile
+++ b/examples/device/audio_4_channel_mic/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/device/audio_test/Makefile b/examples/device/audio_test/Makefile
index 5a455078e..2a3d854fb 100644
--- a/examples/device/audio_test/Makefile
+++ b/examples/device/audio_test/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/device/audio_test_multi_rate/Makefile b/examples/device/audio_test_multi_rate/Makefile
index 5a455078e..2a3d854fb 100644
--- a/examples/device/audio_test_multi_rate/Makefile
+++ b/examples/device/audio_test_multi_rate/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/device/board_test/Makefile b/examples/device/board_test/Makefile
index 5a455078e..2a3d854fb 100644
--- a/examples/device/board_test/Makefile
+++ b/examples/device/board_test/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/device/cdc_dual_ports/Makefile b/examples/device/cdc_dual_ports/Makefile
index 5a455078e..2a3d854fb 100644
--- a/examples/device/cdc_dual_ports/Makefile
+++ b/examples/device/cdc_dual_ports/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/device/cdc_msc/Makefile b/examples/device/cdc_msc/Makefile
index 69b633fea..da088ea6b 100644
--- a/examples/device/cdc_msc/Makefile
+++ b/examples/device/cdc_msc/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/device/cdc_msc_freertos/Makefile b/examples/device/cdc_msc_freertos/Makefile
index 4ee816880..e2bbc2268 100644
--- a/examples/device/cdc_msc_freertos/Makefile
+++ b/examples/device/cdc_msc_freertos/Makefile
@@ -1,6 +1,5 @@
 DEPS_SUBMODULES += lib/FreeRTOS-Kernel
 
-include ../../../tools/top.mk
 include ../../make.mk
 
 FREERTOS_SRC = lib/FreeRTOS-Kernel
diff --git a/examples/device/dfu/Makefile b/examples/device/dfu/Makefile
index 5148ed55a..b3f2cc588 100644
--- a/examples/device/dfu/Makefile
+++ b/examples/device/dfu/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/device/dfu_runtime/Makefile b/examples/device/dfu_runtime/Makefile
index 69b633fea..da088ea6b 100644
--- a/examples/device/dfu_runtime/Makefile
+++ b/examples/device/dfu_runtime/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/device/dynamic_configuration/Makefile b/examples/device/dynamic_configuration/Makefile
index 69b633fea..da088ea6b 100644
--- a/examples/device/dynamic_configuration/Makefile
+++ b/examples/device/dynamic_configuration/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/device/hid_boot_interface/Makefile b/examples/device/hid_boot_interface/Makefile
index c6a9c5b21..d58a539e8 100644
--- a/examples/device/hid_boot_interface/Makefile
+++ b/examples/device/hid_boot_interface/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/device/hid_composite/Makefile b/examples/device/hid_composite/Makefile
index 69b633fea..da088ea6b 100644
--- a/examples/device/hid_composite/Makefile
+++ b/examples/device/hid_composite/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/device/hid_composite_freertos/Makefile b/examples/device/hid_composite_freertos/Makefile
index a354a90b6..099a43893 100644
--- a/examples/device/hid_composite_freertos/Makefile
+++ b/examples/device/hid_composite_freertos/Makefile
@@ -1,6 +1,5 @@
 DEPS_SUBMODULES += lib/FreeRTOS-Kernel
 
-include ../../../tools/top.mk
 include ../../make.mk
 
 FREERTOS_SRC = lib/FreeRTOS-Kernel
diff --git a/examples/device/hid_generic_inout/Makefile b/examples/device/hid_generic_inout/Makefile
index 69b633fea..da088ea6b 100644
--- a/examples/device/hid_generic_inout/Makefile
+++ b/examples/device/hid_generic_inout/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/device/hid_multiple_interface/Makefile b/examples/device/hid_multiple_interface/Makefile
index 69b633fea..da088ea6b 100644
--- a/examples/device/hid_multiple_interface/Makefile
+++ b/examples/device/hid_multiple_interface/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/device/midi_test/Makefile b/examples/device/midi_test/Makefile
index 5a455078e..2a3d854fb 100644
--- a/examples/device/midi_test/Makefile
+++ b/examples/device/midi_test/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/device/msc_dual_lun/Makefile b/examples/device/msc_dual_lun/Makefile
index 5a455078e..2a3d854fb 100644
--- a/examples/device/msc_dual_lun/Makefile
+++ b/examples/device/msc_dual_lun/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/device/net_lwip_webserver/Makefile b/examples/device/net_lwip_webserver/Makefile
index 55bd820bd..bc2914b36 100644
--- a/examples/device/net_lwip_webserver/Makefile
+++ b/examples/device/net_lwip_webserver/Makefile
@@ -1,6 +1,5 @@
 DEPS_SUBMODULES += lib/lwip
 
-include ../../../tools/top.mk
 include ../../make.mk
 
 # suppress warning caused by lwip
diff --git a/examples/device/uac2_headset/Makefile b/examples/device/uac2_headset/Makefile
index 5a455078e..2a3d854fb 100644
--- a/examples/device/uac2_headset/Makefile
+++ b/examples/device/uac2_headset/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/device/usbtmc/Makefile b/examples/device/usbtmc/Makefile
index 69b633fea..da088ea6b 100644
--- a/examples/device/usbtmc/Makefile
+++ b/examples/device/usbtmc/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/device/video_capture/Makefile b/examples/device/video_capture/Makefile
index fda66bcc1..90d174c32 100644
--- a/examples/device/video_capture/Makefile
+++ b/examples/device/video_capture/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 ifeq ($(DISABLE_MJPEG),1)
diff --git a/examples/device/webusb_serial/Makefile b/examples/device/webusb_serial/Makefile
index 5a455078e..2a3d854fb 100644
--- a/examples/device/webusb_serial/Makefile
+++ b/examples/device/webusb_serial/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/dual/host_hid_to_device_cdc/Makefile b/examples/dual/host_hid_to_device_cdc/Makefile
index 3fe9b0888..95c88e7e8 100644
--- a/examples/dual/host_hid_to_device_cdc/Makefile
+++ b/examples/dual/host_hid_to_device_cdc/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/host/bare_api/Makefile b/examples/host/bare_api/Makefile
index 84555a889..058307c40 100644
--- a/examples/host/bare_api/Makefile
+++ b/examples/host/bare_api/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/host/cdc_msc_hid/Makefile b/examples/host/cdc_msc_hid/Makefile
index 9adccfa3a..7c16b39d3 100644
--- a/examples/host/cdc_msc_hid/Makefile
+++ b/examples/host/cdc_msc_hid/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/host/hid_controller/Makefile b/examples/host/hid_controller/Makefile
index e7fbd741f..cda2977bc 100644
--- a/examples/host/hid_controller/Makefile
+++ b/examples/host/hid_controller/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/examples/host/msc_file_explorer/Makefile b/examples/host/msc_file_explorer/Makefile
index de2f9c01c..1fda72b18 100644
--- a/examples/host/msc_file_explorer/Makefile
+++ b/examples/host/msc_file_explorer/Makefile
@@ -1,4 +1,3 @@
-include ../../../tools/top.mk
 include ../../make.mk
 
 FATFS_PATH = lib/fatfs/source
diff --git a/examples/make.mk b/examples/make.mk
index e02d226b6..d91263db9 100644
--- a/examples/make.mk
+++ b/examples/make.mk
@@ -2,6 +2,72 @@
 # Common make definition for all examples
 # ---------------------------------------
 
+#-------------- TOP and CURRENT_PATH ------------
+
+# Set TOP to be the path to get from the current directory (where make was
+# invoked) to the top of the tree. $(lastword $(MAKEFILE_LIST)) returns
+# the name of this makefile relative to where make was invoked.
+THIS_MAKEFILE := $(lastword $(MAKEFILE_LIST))
+
+# strip off /tools/top.mk to get for example ../../..
+# and Set TOP to an absolute path
+TOP = $(abspath $(subst make.mk,..,$(THIS_MAKEFILE)))
+
+# Set CURRENT_PATH to the relative path from TOP to the current directory, ie examples/device/cdc_msc_freertos
+CURRENT_PATH = $(subst $(TOP)/,,$(abspath .))
+
+# Detect whether shell style is windows or not
+# https://stackoverflow.com/questions/714100/os-detecting-makefile/52062069#52062069
+ifeq '$(findstring ;,$(PATH))' ';'
+# PATH contains semicolon - so we're definitely on Windows.
+CMDEXE := 1
+
+# makefile shell commands should use syntax for DOS CMD, not unix sh
+# Unfortunately, SHELL may point to sh or bash, which can't accept DOS syntax.
+# We can't just use sh, because while sh and/or bash shell may be available,
+# many Windows environments won't have utilities like realpath used below, so...
+# Force DOS command shell on Windows.
+SHELL := cmd.exe
+endif
+
+#-------------- Cross Compiler  ------------
+# Can be set by board, default to ARM GCC
+CROSS_COMPILE ?= arm-none-eabi-
+
+ifeq ($(CC),iccarm)
+USE_IAR = 1
+endif
+
+ifdef USE_IAR
+  AS = iasmarm
+  LD = ilinkarm
+  OBJCOPY = ielftool
+  SIZE = size
+
+else
+  CC = $(CROSS_COMPILE)gcc
+  CXX = $(CROSS_COMPILE)g++
+  AS = $(CC) -x assembler-with-cpp
+  LD = $(CC)
+
+  GDB = $(CROSS_COMPILE)gdb
+  OBJCOPY = $(CROSS_COMPILE)objcopy
+  SIZE = $(CROSS_COMPILE)size
+endif
+
+ifeq ($(CMDEXE),1)
+  CP = copy
+  RM = del
+  MKDIR = mkdir
+  PYTHON = python
+else
+  CP = cp
+  RM = rm
+  MKDIR = mkdir
+  PYTHON = python3
+endif
+
+
 # Build directory
 BUILD := _build/$(BOARD)
 
@@ -45,47 +111,6 @@ else
   SRC_C += $(subst $(TOP)/,,$(wildcard $(TOP)/$(FAMILY_PATH)/*.c))
 endif
 
-
-#-------------- Cross Compiler  ------------
-# Can be set by board, default to ARM GCC
-CROSS_COMPILE ?= arm-none-eabi-
-
-# Allow for -Os to be changed by board makefiles in case -Os is not allowed
-CFLAGS_OPTIMIZED ?= -Os
-
-ifeq ($(CC),iccarm)
-USE_IAR = 1
-endif
-
-ifdef USE_IAR
-  AS = iasmarm
-  LD = ilinkarm
-  OBJCOPY = ielftool
-  SIZE = size
-
-else
-  CC = $(CROSS_COMPILE)gcc
-  CXX = $(CROSS_COMPILE)g++
-  AS = $(CC) -x assembler-with-cpp
-  LD = $(CC)
-  
-  GDB = $(CROSS_COMPILE)gdb
-  OBJCOPY = $(CROSS_COMPILE)objcopy
-  SIZE = $(CROSS_COMPILE)size
-endif
-
-ifeq ($(CMDEXE),1)
-  CP = copy
-  RM = del
-  MKDIR = mkdir
-  PYTHON = python
-else
-  CP = cp
-  RM = rm
-  MKDIR = mkdir
-  PYTHON = python3
-endif
-
 #-------------- Source files and compiler flags --------------
 
 # Include all source C in family & board folder
@@ -94,6 +119,9 @@ SRC_C += $(subst $(TOP)/,,$(wildcard $(TOP)/$(BOARD_PATH)/*.c))
 
 INC   += $(TOP)/$(FAMILY_PATH)
 
+# Allow for -Os to be changed by board makefiles in case -Os is not allowed
+CFLAGS_OPTIMIZED ?= -Os
+
 # GCC Compiler Flags
 GCC_CFLAGS += \
   -ggdb \
diff --git a/test/fuzz/device/cdc/Makefile b/test/fuzz/device/cdc/Makefile
index ee51936b5..7071df057 100644
--- a/test/fuzz/device/cdc/Makefile
+++ b/test/fuzz/device/cdc/Makefile
@@ -1,4 +1,3 @@
-include ../../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/test/fuzz/device/msc/Makefile b/test/fuzz/device/msc/Makefile
index ee51936b5..7071df057 100644
--- a/test/fuzz/device/msc/Makefile
+++ b/test/fuzz/device/msc/Makefile
@@ -1,4 +1,3 @@
-include ../../../../tools/top.mk
 include ../../make.mk
 
 INC += \
diff --git a/test/fuzz/device/net/Makefile b/test/fuzz/device/net/Makefile
index 22241fcdc..4e99604ad 100644
--- a/test/fuzz/device/net/Makefile
+++ b/test/fuzz/device/net/Makefile
@@ -1,6 +1,5 @@
 DEPS_SUBMODULES += lib/lwip
 
-include ../../../../tools/top.mk
 include ../../make.mk
 
 # suppress warning caused by lwip
diff --git a/test/fuzz/make.mk b/test/fuzz/make.mk
index e7c5518e7..934819665 100644
--- a/test/fuzz/make.mk
+++ b/test/fuzz/make.mk
@@ -2,6 +2,34 @@
 # Common make definition for all examples
 # ---------------------------------------
 
+#-------------- TOP and CURRENT_PATH ------------
+
+# Set TOP to be the path to get from the current directory (where make was
+# invoked) to the top of the tree. $(lastword $(MAKEFILE_LIST)) returns
+# the name of this makefile relative to where make was invoked.
+THIS_MAKEFILE := $(lastword $(MAKEFILE_LIST))
+
+# strip off /tools/top.mk to get for example ../../..
+# and Set TOP to an absolute path
+TOP = $(abspath $(subst make.mk,../..,$(THIS_MAKEFILE)))
+
+# Set CURRENT_PATH to the relative path from TOP to the current directory, ie examples/device/cdc_msc_freertos
+CURRENT_PATH = $(subst $(TOP)/,,$(abspath .))
+
+# Detect whether shell style is windows or not
+# https://stackoverflow.com/questions/714100/os-detecting-makefile/52062069#52062069
+ifeq '$(findstring ;,$(PATH))' ';'
+# PATH contains semicolon - so we're definitely on Windows.
+CMDEXE := 1
+
+# makefile shell commands should use syntax for DOS CMD, not unix sh
+# Unfortunately, SHELL may point to sh or bash, which can't accept DOS syntax.
+# We can't just use sh, because while sh and/or bash shell may be available,
+# many Windows environments won't have utilities like realpath used below, so...
+# Force DOS command shell on Windows.
+SHELL := cmd.exe
+endif
+
 # Build directory
 BUILD := _build
 PROJECT := $(notdir $(CURDIR))
@@ -42,8 +70,6 @@ SANITIZER_FLAGS ?= -fsanitize=fuzzer \
 CFLAGS += $(COVERAGE_FLAGS) $(SANITIZER_FLAGS)
 
 #-------------- Source files and compiler flags --------------
-
-
 INC += $(TOP)/test
 
 # Compiler Flags
diff --git a/tools/top.mk b/tools/top.mk
deleted file mode 100644
index fdae6337c..000000000
--- a/tools/top.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-ifneq ($(lastword a b),b)
-$(error This Makefile requires make 3.81 or newer)
-endif
-
-# Detect whether shell style is windows or not
-# https://stackoverflow.com/questions/714100/os-detecting-makefile/52062069#52062069
-ifeq '$(findstring ;,$(PATH))' ';'
-# PATH contains semicolon - so we're definitely on Windows.
-CMDEXE := 1
-
-# makefile shell commands should use syntax for DOS CMD, not unix sh
-# Unfortunately, SHELL may point to sh or bash, which can't accept DOS syntax.
-# We can't just use sh, because while sh and/or bash shell may be available,
-# many Windows environments won't have utilities like realpath used below, so...
-# Force DOS command shell on Windows.
-SHELL := cmd.exe
-endif
-
-# Set TOP to be the path to get from the current directory (where make was
-# invoked) to the top of the tree. $(lastword $(MAKEFILE_LIST)) returns
-# the name of this makefile relative to where make was invoked.
-THIS_MAKEFILE := $(lastword $(MAKEFILE_LIST))
-
-# strip off /tools/top.mk to get for example ../../..
-# and Set TOP to an absolute path
-TOP = $(abspath $(subst /tools/top.mk,,$(THIS_MAKEFILE)))
-
-# Set CURRENT_PATH to the relative path from TOP to the current directory, ie examples/device/cdc_msc_freertos
-CURRENT_PATH = $(subst $(TOP)/,,$(abspath .))

From 02478c57e51fcb82c53530a03ca4cca296645f1c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 6 Mar 2023 14:31:18 +0700
Subject: [PATCH 117/691] more ci fix

---
 examples/make.mk         | 74 ++++++++++++++++++++--------------------
 hw/bsp/stm32h7/family.mk |  2 +-
 2 files changed, 38 insertions(+), 38 deletions(-)

diff --git a/examples/make.mk b/examples/make.mk
index d91263db9..0a07da21c 100644
--- a/examples/make.mk
+++ b/examples/make.mk
@@ -30,43 +30,6 @@ CMDEXE := 1
 SHELL := cmd.exe
 endif
 
-#-------------- Cross Compiler  ------------
-# Can be set by board, default to ARM GCC
-CROSS_COMPILE ?= arm-none-eabi-
-
-ifeq ($(CC),iccarm)
-USE_IAR = 1
-endif
-
-ifdef USE_IAR
-  AS = iasmarm
-  LD = ilinkarm
-  OBJCOPY = ielftool
-  SIZE = size
-
-else
-  CC = $(CROSS_COMPILE)gcc
-  CXX = $(CROSS_COMPILE)g++
-  AS = $(CC) -x assembler-with-cpp
-  LD = $(CC)
-
-  GDB = $(CROSS_COMPILE)gdb
-  OBJCOPY = $(CROSS_COMPILE)objcopy
-  SIZE = $(CROSS_COMPILE)size
-endif
-
-ifeq ($(CMDEXE),1)
-  CP = copy
-  RM = del
-  MKDIR = mkdir
-  PYTHON = python
-else
-  CP = cp
-  RM = rm
-  MKDIR = mkdir
-  PYTHON = python3
-endif
-
 
 # Build directory
 BUILD := _build/$(BOARD)
@@ -111,6 +74,43 @@ else
   SRC_C += $(subst $(TOP)/,,$(wildcard $(TOP)/$(FAMILY_PATH)/*.c))
 endif
 
+#-------------- Cross Compiler  ------------
+# Can be set by board, default to ARM GCC
+CROSS_COMPILE ?= arm-none-eabi-
+
+ifeq ($(CC),iccarm)
+USE_IAR = 1
+endif
+
+ifdef USE_IAR
+  AS = iasmarm
+  LD = ilinkarm
+  OBJCOPY = ielftool
+  SIZE = size
+
+else
+  CC = $(CROSS_COMPILE)gcc
+  CXX = $(CROSS_COMPILE)g++
+  AS = $(CC) -x assembler-with-cpp
+  LD = $(CC)
+
+  GDB = $(CROSS_COMPILE)gdb
+  OBJCOPY = $(CROSS_COMPILE)objcopy
+  SIZE = $(CROSS_COMPILE)size
+endif
+
+ifeq ($(CMDEXE),1)
+  CP = copy
+  RM = del
+  MKDIR = mkdir
+  PYTHON = python
+else
+  CP = cp
+  RM = rm
+  MKDIR = mkdir
+  PYTHON = python3
+endif
+
 #-------------- Source files and compiler flags --------------
 
 # Include all source C in family & board folder
diff --git a/hw/bsp/stm32h7/family.mk b/hw/bsp/stm32h7/family.mk
index e1b2cd40e..9989b17a8 100644
--- a/hw/bsp/stm32h7/family.mk
+++ b/hw/bsp/stm32h7/family.mk
@@ -37,7 +37,7 @@ GCC_CFLAGS += \
   -nostdlib -nostartfiles
 
 # suppress warning caused by vendor mcu driver
-GCC_CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align
+GCC_CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align -Wno-error=unused-parameter
 
 # IAR Flags
 IAR_CFLAGS += --cpu cortex-m7 --fpu VFPv5_D16

From ec8c292bbebdbaebe39abef6e88c6a0fbb1f2be7 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 6 Mar 2023 14:37:40 +0700
Subject: [PATCH 118/691] clean up

---
 .github/workflows/build_win_mac.yml | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/.github/workflows/build_win_mac.yml b/.github/workflows/build_win_mac.yml
index 4b899cfb6..bad9f3162 100644
--- a/.github/workflows/build_win_mac.yml
+++ b/.github/workflows/build_win_mac.yml
@@ -38,9 +38,6 @@ jobs:
       with:
         python-version: '3.x'
 
-    - if: matrix.os == 'macos-latest'
-      run: uname -a
-
     - name: Install ARM GCC
       uses: carlosperate/arm-none-eabi-gcc-action@v1
       with:

From 9e0ae5f29d507e29b7c548eb4b1aa1ca019de65b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 8 Mar 2023 12:15:39 +0700
Subject: [PATCH 119/691] improve ci

---
 .github/workflows/build_arm.yml | 34 +++++++++++----------------------
 examples/rules.mk               |  1 +
 tools/build_utils.py            | 16 ++++++++--------
 3 files changed, 20 insertions(+), 31 deletions(-)

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 96c337462..b598eff2a 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -34,10 +34,8 @@ jobs:
         # Alphabetical order
         - 'broadcom_32bit'
         - 'imxrt'
-        - 'lpc15'
-        - 'lpc18'
-        - 'lpc54'
-        - 'lpc55'
+        - 'lpc15 lpc18'
+        - 'lpc54 lpc55' 
         - 'mm32'
         - 'msp432e4'
         - 'nrf'
@@ -46,14 +44,12 @@ jobs:
         - 'samd21'
         - 'samd51'
         - 'saml2x'
-        - 'stm32f0'
-        - 'stm32f1'
+        - 'stm32f0 stm32f1'
         - 'stm32f4'
         - 'stm32f7'
-        - 'stm32g4'
+        - 'stm32g4 stm32wb'
         - 'stm32h7'
         - 'stm32l4'
-        - 'stm32wb'
         - 'tm4c123'
         - 'xmc4000'
     steps:
@@ -71,7 +67,7 @@ jobs:
       uses: actions/checkout@v3
 
     - name: Checkout common submodules in lib
-      run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip lib/sct_neopixel
+      run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip
 
     - name: Checkout hathach/linkermap
       uses: actions/checkout@v3
@@ -100,29 +96,21 @@ jobs:
           find ${ex} -name *.map -print -quit | xargs -I % sh -c 'echo "::group::%"; linkermap -v %; echo "::endgroup::"'
         done
 
-    # Upload binaries for rp2040 hardware test with self-hosted
+    # Upload binaries for rp2040/stm32l412nucleo hardware test with self-hosted
+    
     - name: Prepare rp2040 Artifacts
       if: matrix.family == 'rp2040' && github.repository_owner == 'hathach'
       run: find examples/ -name "*.elf" -exec mv {} . \;
 
-    - name: Upload rp2040 Artifacts
-      if: matrix.family == 'rp2040' && github.repository_owner == 'hathach'
-      uses: actions/upload-artifact@v3
-      with:
-        name: ${{ matrix.family }}
-        path: |
-          *.elf
-
-    # Upload binaries for stm32l412nucleo hardware test with self-hosted
     - name: Prepare stm32l412nucleo Artifacts
       if: matrix.family == 'stm32l4'
       run: find examples/ -path "*stm32l412nucleo/*.elf" -exec mv {} . \;
 
-    - name: Upload stm32l412nucleo Artifacts
-      if: matrix.family == 'stm32l4'
+    - name: Upload Artifacts for hardware testing
+      if: matrix.family == 'stm32l4' || (matrix.family == 'rp2040' && github.repository_owner == 'hathach')
       uses: actions/upload-artifact@v3
       with:
-        name: stm32l412nucleo
+        name: ${{ matrix.family }}
         path: |
           *.elf
 
@@ -244,7 +232,7 @@ jobs:
     - name: Download stm32l4 Artifacts
       uses: actions/download-artifact@v3
       with:
-        name: stm32l412nucleo
+        name: stm32l4
 
     - name: Create flash.sh
       run: |
diff --git a/examples/rules.mk b/examples/rules.mk
index 3254112cf..7f3535bba 100644
--- a/examples/rules.mk
+++ b/examples/rules.mk
@@ -196,6 +196,7 @@ get-deps:
 	git -C $(TOP) submodule update --init $(DEPS_SUBMODULES)
   endif
 
+.PHONY: size
 size: $(BUILD)/$(PROJECT).elf
 	-@echo ''
 	@$(SIZE) $<
diff --git a/tools/build_utils.py b/tools/build_utils.py
index a24cea7bb..de9052d2d 100644
--- a/tools/build_utils.py
+++ b/tools/build_utils.py
@@ -85,21 +85,22 @@ def build_example(example, board, make_option):
     # succeeded, failed, skipped
     ret = [0, 0, 0]
 
+    make_cmd = "make -j -C examples/{} BOARD={} {}".format(example, board, make_option)
+
     # Check if board is skipped
     if skip_example(example, board):
         status = SKIPPED
         ret[2] = 1
         print(build_format.format(example, board, status, '-', flash_size, sram_size))
     else:
-        build_result = subprocess.run("make -j -C examples/{} BOARD={} {} all".format(example, board, make_option), shell=True,
-                                      stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+        subprocess.run(make_cmd + " clean", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+        build_result = subprocess.run(make_cmd + " all", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
 
         if build_result.returncode == 0:
             status = SUCCEEDED
             ret[0] = 1
-            (flash_size, sram_size) = build_size(example, board)
-            subprocess.run("make -j -C examples/{} BOARD={} {} copy-artifact".format(example, board, make_option), shell=True,
-                           stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+            (flash_size, sram_size) = build_size(make_cmd)
+            #subprocess.run(make_cmd + " copy-artifact", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
         else:
             status = FAILED
             ret[1] = 1
@@ -113,9 +114,8 @@ def build_example(example, board, make_option):
     return ret
 
 
-def build_size(example, board):
-    size_cmd = 'make -j -C examples/{} BOARD={} size'.format(example, board)
-    size_output = subprocess.run(size_cmd, shell=True, stdout=subprocess.PIPE).stdout.decode("utf-8").splitlines()
+def build_size(make_cmd):
+    size_output = subprocess.run(make_cmd + ' size', shell=True, stdout=subprocess.PIPE).stdout.decode("utf-8").splitlines()
     for i, l in enumerate(size_output):
         text_title = 'text	   data	    bss	    dec'
         if text_title in l:

From 0957902c40633a21e7174cc4d59e6c4b34d1d52a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 8 Mar 2023 12:28:30 +0700
Subject: [PATCH 120/691] more ci merge

---
 .github/workflows/build_arm.yml | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index b598eff2a..b1b88ec70 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -35,9 +35,8 @@ jobs:
         - 'broadcom_32bit'
         - 'imxrt'
         - 'lpc15 lpc18'
-        - 'lpc54 lpc55' 
-        - 'mm32'
-        - 'msp432e4'
+        - 'lpc54 lpc55'
+        - 'mm32 msp432e4'
         - 'nrf'
         - 'rp2040'
         - 'samd11'
@@ -50,8 +49,7 @@ jobs:
         - 'stm32g4 stm32wb'
         - 'stm32h7'
         - 'stm32l4'
-        - 'tm4c123'
-        - 'xmc4000'
+        - 'tm4c123 xmc4000'
     steps:
     - name: Setup Python
       uses: actions/setup-python@v4
@@ -97,7 +95,7 @@ jobs:
         done
 
     # Upload binaries for rp2040/stm32l412nucleo hardware test with self-hosted
-    
+
     - name: Prepare rp2040 Artifacts
       if: matrix.family == 'rp2040' && github.repository_owner == 'hathach'
       run: find examples/ -name "*.elf" -exec mv {} . \;

From 410ad4d0f9ff166610655bae31328e4120b17ef2 Mon Sep 17 00:00:00 2001
From: Hubert Denkmair <xor@xor.wtf>
Date: Wed, 8 Mar 2023 12:05:58 +0100
Subject: [PATCH 121/691] add basic STM32G0 support

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c |  86 +++++++--
 .../st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h   | 180 +++++++++++++-----
 2 files changed, 198 insertions(+), 68 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index e49c0b52e..21ae8e6e8 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -216,7 +216,7 @@ TU_ATTR_ALWAYS_INLINE static inline void reg16_clear_bits(__IO uint16_t *reg, ui
 }
 
 // Bits in ISTR are cleared upon writing 0
-TU_ATTR_ALWAYS_INLINE static inline void clear_istr_bits(uint16_t mask) {
+TU_ATTR_ALWAYS_INLINE static inline void clear_istr_bits(uint32_t mask) {
   USB->ISTR = ~mask;
 }
 
@@ -242,16 +242,23 @@ void dcd_init (uint8_t rhport)
   {
     asm("NOP");
   }
+
+#ifdef PMA_32BIT_ACCESS // CNTR register is 32bits on STM32G0, 16bit on older versions
+  USB->CNTR &= ~USB_CNTR_PDWN;
+#else
   reg16_clear_bits(&USB->CNTR, USB_CNTR_PDWN);// Remove powerdown
+#endif
+
   // Wait startup time, for F042 and F070, this is <= 1 us.
   for(uint32_t i = 0; i<200; i++) // should be a few us
   {
     asm("NOP");
   }
   USB->CNTR = 0; // Enable USB
-  
-  USB->BTABLE = DCD_STM32_BTABLE_BASE;
 
+#ifndef STM32G0 // BTABLE register does not exist any more on STM32G0, it is fixed to USB SRAM base address
+  USB->BTABLE = DCD_STM32_BTABLE_BASE;
+#endif
   USB->ISTR = 0; // Clear pending interrupts
 
   // Reset endpoints to disabled
@@ -312,7 +319,7 @@ void dcd_sof_enable(uint8_t rhport, bool en)
   }
   else
   {
-    USB->CNTR &= (uint16_t) ~USB_CNTR_SOFM;
+    USB->CNTR &= ~USB_CNTR_SOFM;
   }
 }
 
@@ -358,6 +365,9 @@ void dcd_int_enable (uint8_t rhport)
   NVIC_EnableIRQ(USB_LP_IRQn);
   NVIC_EnableIRQ(USBWakeUp_IRQn);
 
+#elif CFG_TUSB_MCU == OPT_MCU_STM32G0
+  NVIC_EnableIRQ(USB_UCPD1_2_IRQn);
+
 #elif CFG_TUSB_MCU == OPT_MCU_STM32WB
   NVIC_EnableIRQ(USB_HP_IRQn);
   NVIC_EnableIRQ(USB_LP_IRQn);
@@ -405,6 +415,9 @@ void dcd_int_disable(uint8_t rhport)
   NVIC_DisableIRQ(USB_LP_IRQn);
   NVIC_DisableIRQ(USBWakeUp_IRQn);
 
+#elif CFG_TUSB_MCU == OPT_MCU_STM32G0
+  NVIC_DisableIRQ(USB_UCPD1_2_IRQn);
+
 #elif CFG_TUSB_MCU == OPT_MCU_STM32WB
   NVIC_DisableIRQ(USB_HP_IRQn);
   NVIC_DisableIRQ(USB_LP_IRQn);
@@ -433,7 +446,7 @@ void dcd_remote_wakeup(uint8_t rhport)
 {
   (void) rhport;
 
-  USB->CNTR |= (uint16_t) USB_CNTR_RESUME;
+  USB->CNTR |= USB_CNTR_RESUME;
   remoteWakeCountdown = 4u; // required to be 1 to 15 ms, ESOF should trigger every 1ms.
 }
 
@@ -534,9 +547,6 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
   
   if((ep_addr == 0U) && ((wEPRegVal & USB_EP_SETUP) != 0U)) /* Setup packet */
   {
-    // The setup_received function uses memcpy, so this must first copy the setup data into
-    // user memory, to allow for the 32-bit access that memcpy performs.
-    uint8_t userMemBuf[8];
     uint32_t count = pcd_get_ep_rx_cnt(USB, EPindex);
     /* Get SETUP Packet*/
     if(count == 8) // Setup packet should always be 8 bytes. If not, ignore it, and try again.
@@ -544,8 +554,15 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
       // Must reset EP to NAK (in case it had been stalling) (though, maybe too late here)
       pcd_set_ep_rx_status(USB,0u,USB_EP_RX_NAK);
       pcd_set_ep_tx_status(USB,0u,USB_EP_TX_NAK);
-      dcd_read_packet_memory(userMemBuf, *pcd_ep_rx_address_ptr(USB,EPindex), 8);
+#ifdef PMA_32BIT_ACCESS
+      dcd_event_setup_received(0, (uint8_t*)(USB_PMAADDR + pcd_get_ep_rx_address(USB, EPindex)), true);
+#else
+      // The setup_received function uses memcpy, so this must first copy the setup data into
+      // user memory, to allow for the 32-bit access that memcpy performs.
+      uint8_t userMemBuf[8];
+      dcd_read_packet_memory(userMemBuf, pcd_get_ep_rx_address(USB,EPindex), 8);
       dcd_event_setup_received(0, (uint8_t*)userMemBuf, true);
+#endif
     }
   }
   else
@@ -568,7 +585,7 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
 
     if (count != 0U)
     {
-      uint16_t addr = *pcd_ep_rx_address_ptr(USB, EPindex);
+      uint16_t addr = pcd_get_ep_rx_address(USB, EPindex);
 
       if (xfer->ff)
       {
@@ -672,8 +689,13 @@ void dcd_int_handler(uint8_t rhport) {
 
   if (int_status & USB_ISTR_WKUP)
   {
+#ifdef PMA_32BIT_ACCESS // CNTR register is 32bits on STM32G0, 16bit on older versions
+    USB->CNTR &= ~USB_CNTR_LPMODE;
+    USB->CNTR &= ~USB_CNTR_FSUSP;
+#else
     reg16_clear_bits(&USB->CNTR, USB_CNTR_LPMODE);
     reg16_clear_bits(&USB->CNTR, USB_CNTR_FSUSP);
+#endif
     clear_istr_bits(USB_ISTR_WKUP);
     dcd_event_bus_signal(0, DCD_EVENT_RESUME, true);
   }
@@ -695,7 +717,7 @@ void dcd_int_handler(uint8_t rhport) {
   if(int_status & USB_ISTR_ESOF) {
     if(remoteWakeCountdown == 1u)
     {
-      USB->CNTR &= (uint16_t)(~USB_CNTR_RESUME);
+      USB->CNTR &= ~USB_CNTR_RESUME;
     }
     if(remoteWakeCountdown > 0u)
     {
@@ -722,8 +744,13 @@ void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * re
     uint8_t const dev_addr = (uint8_t) request->wValue;
 
     // Setting new address after the whole request is complete
+#ifdef PMA_32BIT_ACCESS
+    USB->DADDR &= ~USB_DADDR_ADD;
+    USB->DADDR = (USB->DADDR & ~USB_DADDR_ADD_Msk) | dev_addr; // leave the enable bit set
+#else
     reg16_clear_bits(&USB->DADDR, USB_DADDR_ADD);
     USB->DADDR = (uint16_t)(USB->DADDR | dev_addr); // leave the enable bit set
+#endif
   }
 }
 
@@ -925,14 +952,14 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
 
   if( (dir == TUSB_DIR_IN) || (wType == USB_EP_ISOCHRONOUS) )
   {
-    *pcd_ep_tx_address_ptr(USB, ep_idx) = pma_addr;
+    pcd_set_ep_tx_address(USB, ep_idx, pma_addr);
     pcd_set_ep_tx_bufsize(USB, ep_idx, buffer_size);
     pcd_clear_tx_dtog(USB, ep_idx);
   }
 
   if( (dir == TUSB_DIR_OUT) || (wType == USB_EP_ISOCHRONOUS) )
   {
-    *pcd_ep_rx_address_ptr(USB, ep_idx) = pma_addr;
+    pcd_set_ep_rx_address(USB, ep_idx, pma_addr);
     pcd_set_ep_rx_bufsize(USB, ep_idx, buffer_size);
     pcd_clear_rx_dtog(USB, ep_idx);
   }
@@ -1011,10 +1038,10 @@ bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet
   xfer_ctl_ptr(ep_addr)->ep_idx = ep_idx;
 
   pcd_set_eptype(USB, ep_idx, USB_EP_ISOCHRONOUS);
-  
-  *pcd_ep_tx_address_ptr(USB, ep_idx) = pma_addr;
-  *pcd_ep_rx_address_ptr(USB, ep_idx) = pma_addr;
-  
+
+  pcd_set_ep_tx_address(USB, ep_idx, pma_addr);
+  pcd_set_ep_rx_address(USB, ep_idx, pma_addr);
+
   return true;
 }
 
@@ -1063,7 +1090,7 @@ static void dcd_transmit_packet(xfer_ctl_t * xfer, uint16_t ep_ix)
   }
 
   uint16_t ep_reg = pcd_get_endpoint(USB, ep_ix);
-  uint16_t addr_ptr = *pcd_ep_tx_address_ptr(USB,ep_ix);
+  uint16_t addr_ptr = pcd_get_ep_tx_address(USB, ep_ix);
 
   if (xfer->ff)
   {
@@ -1197,6 +1224,19 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
   }
 }
 
+#ifdef PMA_32BIT_ACCESS
+static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, size_t wNBytes)
+{
+  // FIXME original function uses byte-access to source memory (to support non-aligned buffers)
+  const uint32_t* src32 = (uint32_t*)(src);
+  uint32_t* dst32 = (uint32_t*)(USB_PMAADDR + dst);
+  for (unsigned n=wNBytes/4; n>0; --n) {
+    *dst32++ = *src32++;
+  }
+  *dst32 = (*src32) & ((1<<8*(wNBytes % 4)) - 1);
+  return true;
+}
+#else
 // Packet buffer access can only be 8- or 16-bit.
 /**
   * @brief Copy a buffer from user memory area to packet memory area (PMA).
@@ -1239,6 +1279,7 @@ static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, si
 
   return true;
 }
+#endif
 
 /**
   * @brief Copy from FIFO to packet memory area (PMA).
@@ -1290,6 +1331,14 @@ static bool dcd_write_packet_memory_ff(tu_fifo_t * ff, uint16_t dst, uint16_t wN
   return true;
 }
 
+#ifdef PMA_32BIT_ACCESS
+static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wNBytes)
+{
+    // FIXME this should probably be modified for possible unaligned access?
+    memcpy(dst, (void*)(USB_PMAADDR+src), wNBytes);
+    return true;
+}
+#else
 /**
   * @brief Copy a buffer from packet memory area (PMA) to user memory area.
   *        Uses byte-access of system memory and 16-bit access of packet memory
@@ -1323,6 +1372,7 @@ static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wN
   }
   return true;
 }
+#endif
 
 /**
   * @brief Copy a buffer from user packet memory area (PMA) to FIFO.
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index 015b177cf..686bfaa66 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -82,6 +82,34 @@
   #include "stm32g4xx.h"
   #define PMA_LENGTH (1024u)
 
+#elif CFG_TUSB_MCU == OPT_MCU_STM32G0
+  #include "STM32/stm32g0xx.h"
+  #define PMA_32BIT_ACCESS
+  #define PMA_LENGTH (1024u) // FIXME it is 2048, really
+  #undef USB_PMAADDR
+  #define USB_PMAADDR USB_DRD_PMAADDR
+  #define USB_TypeDef USB_DRD_TypeDef
+  #define EP0R CHEP0R
+  #define USB_EP_CTR_RX USB_EP_VTRX
+  #define USB_EP_CTR_TX USB_EP_VTTX
+  #define USB_EP_T_FIELD USB_CHEP_UTYPE
+  #define USB_EPREG_MASK USB_CHEP_REG_MASK
+  #define USB_EPTX_DTOGMASK USB_CHEP_TX_DTOGMASK
+  #define USB_EPRX_DTOGMASK USB_CHEP_RX_DTOGMASK
+  #define USB_EPTX_DTOG1 USB_CHEP_TX_DTOG1
+  #define USB_EPTX_DTOG2 USB_CHEP_TX_DTOG2
+  #define USB_EPRX_DTOG1 USB_CHEP_RX_DTOG1
+  #define USB_EPRX_DTOG2 USB_CHEP_RX_DTOG2
+  #define USB_EPRX_STAT USB_CH_RX_VALID
+  #define USB_EPKIND_MASK USB_EP_KIND_MASK
+  #define USB USB_DRD_FS
+  #define USB_CNTR_FRES USB_CNTR_USBRST
+  #define USB_CNTR_RESUME USB_CNTR_L2RES
+  #define USB_ISTR_EP_ID USB_ISTR_IDN
+  #define USB_EPADDR_FIELD USB_CHEP_ADDR
+  #define USB_CNTR_LPMODE USB_CNTR_SUSPRDY
+  #define USB_CNTR_FSUSP USB_CNTR_SUSPEN
+
 #elif CFG_TUSB_MCU == OPT_MCU_STM32WB
   #include "stm32wbxx.h"
   #define PMA_LENGTH (1024u)
@@ -105,15 +133,31 @@
   #define PMA_STRIDE  (1u)
 #endif
 
-// And for type-safety create a new macro for the volatile address of PMAADDR
+// For type-safety create a new macro for the volatile address of PMAADDR
 // The compiler should warn us if we cast it to a non-volatile type?
+#ifdef PMA_32BIT_ACCESS
+static __IO uint32_t * const pma32 = (__IO uint32_t*)USB_PMAADDR;
+#else
 // Volatile is also needed to prevent the optimizer from changing access to 32-bit (as 32-bit access is forbidden)
 static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
 
-// prototypes
-TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpIdx);
-TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpIdx);
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wRegValue);
+TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t * pcd_btable_word_ptr(USB_TypeDef * USBx, size_t x)
+{
+  size_t total_word_offset = (((USBx)->BTABLE)>>1) + x;
+  total_word_offset *= PMA_STRIDE;
+  return &(pma[total_word_offset]);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpIdx)
+{
+  return pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 1u);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpIdx)
+{
+  return pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 3u);
+}
+#endif
 
 /* Aligned buffer size according to hardware */
 TU_ATTR_ALWAYS_INLINE static inline uint16_t pcd_aligned_buffer_size(uint16_t size)
@@ -131,13 +175,22 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t pcd_aligned_buffer_size(uint16_t si
 /* SetENDPOINT */
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wRegValue)
 {
+#ifdef PMA_32BIT_ACCESS
+  __O uint32_t *reg = (__O uint32_t *)(USB_DRD_BASE + bEpIdx*4);
+  *reg = wRegValue;
+#else
   __O uint16_t *reg = (__O uint16_t *)((&USBx->EP0R) + bEpIdx*2u);
   *reg = (uint16_t)wRegValue;
+#endif
 }
 
 /* GetENDPOINT */
-TU_ATTR_ALWAYS_INLINE static inline uint16_t pcd_get_endpoint(USB_TypeDef * USBx, uint32_t bEpIdx) {
+TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_endpoint(USB_TypeDef * USBx, uint32_t bEpIdx) {
+#ifdef PMA_32BIT_ACCESS
+  __I uint32_t *reg = (__I uint32_t *)(USB_DRD_BASE + bEpIdx*4);
+#else
   __I uint16_t *reg = (__I uint16_t *)((&USBx->EP0R) + bEpIdx*2u);
+#endif
   return *reg;
 }
 
@@ -187,34 +240,22 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx,
   */
 TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_tx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx)
 {
+#ifdef PMA_32BIT_ACCESS
+  return (pma32[2*bEpIdx] & 0x03FF0000) >> 16;
+#else
   __I uint16_t *regPtr = pcd_ep_tx_cnt_ptr(USBx, bEpIdx);
   return *regPtr & 0x3ffU;
+#endif
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx)
 {
+#ifdef PMA_32BIT_ACCESS
+  return (pma32[2*bEpIdx + 1] & 0x03FF0000) >> 16;
+#else
   __I uint16_t *regPtr = pcd_ep_rx_cnt_ptr(USBx, bEpIdx);
   return *regPtr & 0x3ffU;
-}
-
-/**
-  * @brief  Sets counter of rx buffer with no. of blocks.
-  * @param  dwReg Register
-  * @param  wCount Counter.
-  * @param  wNBlocks no. of Blocks.
-  * @retval None
-  */
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_cnt_reg(__O uint16_t * pdwReg, size_t wCount)
-{
-  /* We assume that the buffer size is already aligned to hardware requirements. */
-  uint16_t blocksize = (wCount > 62) ? 1 : 0;
-  uint16_t numblocks = wCount / (blocksize ? 32 : 2);
-
-  /* There should be no remainder in the above calculation */
-  TU_ASSERT((wCount - (numblocks * (blocksize ? 32 : 2))) == 0, /**/);
-
-  /* Encode into register. When BLSIZE==1, we need to subtract 1 block count */
-  *pdwReg = (blocksize << 15) | ((numblocks - blocksize) << 10);
+#endif
 }
 
 /**
@@ -233,57 +274,96 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_address(USB_TypeDef * USBx,
   pcd_set_endpoint(USBx, bEpIdx,regVal);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t * pcd_btable_word_ptr(USB_TypeDef * USBx, size_t x)
+TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_tx_address(USB_TypeDef * USBx, uint32_t bEpIdx)
 {
-  size_t total_word_offset = (((USBx)->BTABLE)>>1) + x;
-  total_word_offset *= PMA_STRIDE;
-  return &(pma[total_word_offset]);
+#ifdef PMA_32BIT_ACCESS
+  return pma32[2*bEpIdx] & 0x0000FFFFu ;
+#else
+  return *pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 0u);
+#endif
 }
 
-// Pointers to the PMA table entries (using the ARM address space)
-TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_tx_address_ptr(USB_TypeDef * USBx, uint32_t bEpIdx)
+TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_address(USB_TypeDef * USBx, uint32_t bEpIdx)
 {
-  return pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 0u);
-}
-TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpIdx)
-{
-  return pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 1u);
+#ifdef PMA_32BIT_ACCESS
+  return pma32[2*bEpIdx + 1] & 0x0000FFFFu;
+#else
+  return *pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 2u);
+#endif
 }
 
-TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_rx_address_ptr(USB_TypeDef * USBx, uint32_t bEpIdx)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_address(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t addr)
 {
-  return  pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 2u);
+#ifdef PMA_32BIT_ACCESS
+  pma32[2*bEpIdx] = (pma32[2*bEpIdx] & 0xFFFF0000u) | (addr & 0x0000FFFCu);
+#else
+  *pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 0u) = addr;
+#endif
 }
 
-TU_ATTR_ALWAYS_INLINE static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, uint32_t bEpIdx)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_address(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t addr)
 {
-  return pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 3u);
+#ifdef PMA_32BIT_ACCESS
+  pma32[2*bEpIdx + 1] = (pma32[2*bEpIdx + 1] & 0xFFFF0000u) | (addr & 0x0000FFFCu);
+#else
+  *pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 2u) = addr;
+#endif
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_cnt(USB_TypeDef * USBx,  uint32_t bEpIdx, uint32_t wCount)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wCount)
 {
+#ifdef PMA_32BIT_ACCESS
+  pma32[2*bEpIdx] = (pma32[2*bEpIdx] & ~0x03FF0000u) | ((wCount & 0x3FFu) << 16);
+#else
   __IO uint16_t * reg = pcd_ep_tx_cnt_ptr(USBx, bEpIdx);
   *reg = (uint16_t) (*reg & (uint16_t) ~0x3FFU) | (wCount & 0x3FFU);
+#endif
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_cnt(USB_TypeDef * USBx,  uint32_t bEpIdx, uint32_t wCount)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wCount)
 {
+#ifdef PMA_32BIT_ACCESS
+  pma32[2*bEpIdx + 1] = (pma32[2*bEpIdx + 1] & ~0x03FF0000u) | ((wCount & 0x3FFu) << 16);
+#else
   __IO uint16_t * reg = pcd_ep_rx_cnt_ptr(USBx, bEpIdx);
   *reg = (uint16_t) (*reg & (uint16_t) ~0x3FFU) | (wCount & 0x3FFU);
+#endif
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_bufsize(USB_TypeDef * USBx,  uint32_t bEpIdx, uint32_t wCount)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_blsize_num_blocks(USB_TypeDef * USBx, uint32_t rxtx_idx, uint32_t blocksize, uint32_t numblocks)
 {
-  __IO uint16_t *pdwReg = pcd_ep_tx_cnt_ptr((USBx),(bEpIdx));
-  wCount = pcd_aligned_buffer_size(wCount);
-  pcd_set_ep_cnt_reg(pdwReg, wCount);
+  /* Encode into register. When BLSIZE==1, we need to subtract 1 block count */
+#ifdef PMA_32BIT_ACCESS
+  pma32[rxtx_idx] = (pma32[rxtx_idx] & 0x0000FFFFu) | (blocksize << 31) | ((numblocks - blocksize) << 26);
+#else
+  __IO uint16_t *pdwReg = pcd_btable_word_ptr(USBx, rxtx_idx*2u + 1u);
+  *pdwReg = (blocksize << 15) | ((numblocks - blocksize) << 10);
+#endif
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_bufsize(USB_TypeDef * USBx,  uint32_t bEpIdx, uint32_t wCount)
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_bufsize(USB_TypeDef * USBx, uint32_t rxtx_idx, uint32_t wCount)
 {
-  __IO uint16_t *pdwReg = pcd_ep_rx_cnt_ptr((USBx),(bEpIdx));
   wCount = pcd_aligned_buffer_size(wCount);
-  pcd_set_ep_cnt_reg(pdwReg, wCount);
+
+  /* We assume that the buffer size is already aligned to hardware requirements. */
+  uint16_t blocksize = (wCount > 62) ? 1 : 0;
+  uint16_t numblocks = wCount / (blocksize ? 32 : 2);
+
+  /* There should be no remainder in the above calculation */
+  TU_ASSERT((wCount - (numblocks * (blocksize ? 32 : 2))) == 0, /**/);
+
+  /* Encode into register. When BLSIZE==1, we need to subtract 1 block count */
+  pcd_set_ep_blsize_num_blocks(USBx, rxtx_idx, blocksize, numblocks);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_bufsize(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wCount)
+{
+  pcd_set_ep_bufsize(USBx, 2*bEpIdx, wCount);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_bufsize(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wCount)
+{
+  pcd_set_ep_bufsize(USBx, 2*bEpIdx + 1, wCount);
 }
 
 /**

From 8ae4f8f0699351e5bba349ccb0fab65b557afed6 Mon Sep 17 00:00:00 2001
From: Hubert Denkmair <xor@xor.wtf>
Date: Wed, 8 Mar 2023 12:05:58 +0100
Subject: [PATCH 122/691] add basic STM32G0 support

---
 src/common/tusb_mcu.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 257d08a85..957df5e9e 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -191,6 +191,11 @@
   #define TUP_USBIP_FSDEV_STM32
   #define TUP_DCD_ENDPOINT_MAX    8
 
+#elif TU_CHECK_MCU(OPT_MCU_STM32G0)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+  #define TUP_DCD_ENDPOINT_MAX    8
+
 #elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32

From b3ad560e629be18146fd52e32235cc2ed72dc70b Mon Sep 17 00:00:00 2001
From: Hubert Denkmair <xor@xor.wtf>
Date: Wed, 8 Mar 2023 14:22:11 +0100
Subject: [PATCH 123/691] fix path to stm32g0xx.h

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index 686bfaa66..00791eeb7 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -83,7 +83,7 @@
   #define PMA_LENGTH (1024u)
 
 #elif CFG_TUSB_MCU == OPT_MCU_STM32G0
-  #include "STM32/stm32g0xx.h"
+  #include "stm32g0xx.h"
   #define PMA_32BIT_ACCESS
   #define PMA_LENGTH (1024u) // FIXME it is 2048, really
   #undef USB_PMAADDR

From af577d2b6dc9523dc348b36e9e753adc00aec974 Mon Sep 17 00:00:00 2001
From: Hubert Denkmair <xor@xor.wtf>
Date: Wed, 8 Mar 2023 14:25:30 +0100
Subject: [PATCH 124/691] add G0 to supported platforms in README.rst :)

---
 README.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README.rst b/README.rst
index 7825a1b0a..4f7546482 100644
--- a/README.rst
+++ b/README.rst
@@ -51,7 +51,7 @@ The stack supports the following MCUs:
 - **Renesas:** RX63N, RX65N, RX72N
 - **Silabs:** EFM32GG
 - **Sony:** CXD56
-- **ST:** STM32 series: F0, F1, F2, F3, F4, F7, H7, G4, L0, L1, L4, L4+, WB
+- **ST:** STM32 series: F0, F1, F2, F3, F4, F7, H7, G0, G4, L0, L1, L4, L4+, WB
 - **TI:** MSP430, MSP432E4, TM4C123
 - **ValentyUSB:** eptri
 - **WCH:** CH32V307

From 2cf092464b5cfabcd0a5e507459e5658e2e0ff54 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 8 Mar 2023 22:34:54 +0700
Subject: [PATCH 125/691] fix freertos build with iar, format/indent link_type

---
 .codespell/exclude-file.txt                   |    5 +-
 examples/device/cdc_msc_freertos/Makefile     |    2 +-
 .../device/hid_composite_freertos/Makefile    |    2 +-
 src/portable/renesas/link/link_type.h         | 1847 +++++++++--------
 4 files changed, 952 insertions(+), 904 deletions(-)

diff --git a/.codespell/exclude-file.txt b/.codespell/exclude-file.txt
index af8265cc7..660d2e07e 100644
--- a/.codespell/exclude-file.txt
+++ b/.codespell/exclude-file.txt
@@ -1 +1,4 @@
-  return USB0.INTSTS1.BIT.ATTCH ? true : false;
+  return LINK_REG->INTSTS1_b.ATTCH ? true : false;
+      volatile uint16_t ATTCH     : 1; /* [11..11] ATTCH Interrupt Status */
+#define LINK_REG_INTSTS1_ATTCH_Pos         (11UL)       /* ATTCH (Bit 11) */
+#define LINK_REG_INTSTS1_ATTCH_Msk         (0x800UL)    /* ATTCH (Bitfield-Mask: 0x01) */
diff --git a/examples/device/cdc_msc_freertos/Makefile b/examples/device/cdc_msc_freertos/Makefile
index 2d5d0cfcc..ed3b3f0ce 100644
--- a/examples/device/cdc_msc_freertos/Makefile
+++ b/examples/device/cdc_msc_freertos/Makefile
@@ -30,7 +30,7 @@ SRC_C += \
 	$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORT)/*.c))
 
 SRC_S += \
-	$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORTABLE_SRC)/*.s))
+	$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORT)/*.s))
 
 # include heap manage if configSUPPORT_DYNAMIC_ALLOCATION = 1
 # SRC_C += $(FREERTOS_SRC)/portable/MemMang/heap_1.c
diff --git a/examples/device/hid_composite_freertos/Makefile b/examples/device/hid_composite_freertos/Makefile
index 9b9c4d1b3..f4410b202 100644
--- a/examples/device/hid_composite_freertos/Makefile
+++ b/examples/device/hid_composite_freertos/Makefile
@@ -29,7 +29,7 @@ SRC_C += \
 	$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORT)/*.c))
 
 SRC_S += \
-	$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORTABLE_SRC)/*.s))
+	$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORT)/*.s))
 
 # include heap manage if configSUPPORT_DYNAMIC_ALLOCATION = 1
 # SRC_C += $(FREERTOS_SRC)/portable/MemMang/heap_1.c
diff --git a/src/portable/renesas/link/link_type.h b/src/portable/renesas/link/link_type.h
index eaf0b1ec4..cb3db650a 100644
--- a/src/portable/renesas/link/link_type.h
+++ b/src/portable/renesas/link/link_type.h
@@ -62,25 +62,23 @@ typedef struct TU_ATTR_PACKED {
   };
 } LINK_REG_PIPE_TR_t; /* Size = 4 (0x4) */
 
-TU_VERIFY_STATIC(sizeof(LINK_REG_PIPE_TR_t) == 4, "incorrect size");
-
 /* LINK_REG Structure */
 typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t SYSCFG; /* (@ 0x00000000) System Configuration Control Register */
 
     struct {
-      volatile uint16_t USBE : 1; /* [0..0] USB Operation Enable */
-      uint16_t : 2;
+      volatile uint16_t USBE  : 1; /* [0..0] USB Operation Enable */
+      uint16_t                : 2;
       volatile uint16_t DMRPU : 1; /* [3..3] D- Line Resistor Control */
       volatile uint16_t DPRPU : 1; /* [4..4] D+ Line Resistor Control */
-      volatile uint16_t DRPD : 1;  /* [5..5] D+/D- Line Resistor Control */
-      volatile uint16_t DCFM : 1;  /* [6..6] Controller Function Select */
-      uint16_t : 1;
-      volatile uint16_t CNEN : 1; /* [8..8] CNEN Single End Receiver Enable */
-      uint16_t : 1;
-      volatile uint16_t SCKE : 1; /* [10..10] USB Clock Enable */
-      uint16_t : 5;
+      volatile uint16_t DRPD  : 1; /* [5..5] D+/D- Line Resistor Control */
+      volatile uint16_t DCFM  : 1; /* [6..6] Controller Function Select */
+      uint16_t                : 1;
+      volatile uint16_t CNEN  : 1; /* [8..8] CNEN Single End Receiver Enable */
+      uint16_t                : 1;
+      volatile uint16_t SCKE  : 1; /* [10..10] USB Clock Enable */
+      uint16_t                : 5;
     } SYSCFG_b;
   };
 
@@ -88,8 +86,7 @@ typedef struct TU_ATTR_PACKED {
     volatile uint16_t BUSWAIT; /* (@ 0x00000002) CPU Bus Wait Register */
 
     struct {
-      volatile uint16_t
-        BWAIT : 4; /* [3..0] CPU Bus Access Wait Specification BWAIT waits (BWAIT+2 access cycles) */
+      volatile uint16_t BWAIT : 4; /* [3..0] CPU Bus Access Wait Specification BWAIT waits (BWAIT+2 access cycles) */
       uint16_t : 12;
     } BUSWAIT_b;
   };
@@ -98,15 +95,14 @@ typedef struct TU_ATTR_PACKED {
     volatile const uint16_t SYSSTS0; /* (@ 0x00000004) System Configuration Status Register 0 */
 
     struct {
-      volatile const uint16_t LNST : 2;  /* [1..0] USB Data Line Status Monitor */
-      volatile const uint16_t IDMON : 1; /* [2..2] External ID0 Input Pin Monitor */
-      uint16_t : 2;
+      volatile const uint16_t LNST   : 2; /* [1..0] USB Data Line Status Monitor */
+      volatile const uint16_t IDMON  : 1; /* [2..2] External ID0 Input Pin Monitor */
+      uint16_t                       : 2;
       volatile const uint16_t
-        SOFEA : 1; /* [5..5] SOF Active Monitor While Host Controller Function is Selected. */
-      volatile const uint16_t HTACT : 1; /* [6..6] USB Host Sequencer Status Monitor */
-      uint16_t : 7;
-      volatile const uint16_t
-        OVCMON : 2; /* [15..14] External USB0_OVRCURA/ USB0_OVRCURB Input Pin Monitor */
+        SOFEA                        : 1; /* [5..5] SOF Active Monitor While Host Controller Function is Selected. */
+      volatile const uint16_t HTACT  : 1; /* [6..6] USB Host Sequencer Status Monitor */
+      uint16_t                       : 7;
+      volatile const uint16_t OVCMON : 2; /* [15..14] External USB0_OVRCURA/ USB0_OVRCURB Input Pin Monitor */
     } SYSSTS0_b;
   };
 
@@ -124,16 +120,16 @@ typedef struct TU_ATTR_PACKED {
 
     struct {
       volatile const uint16_t RHST : 3; /* [2..0] USB Bus Reset Status */
-      uint16_t : 1;
-      volatile uint16_t UACT : 1;    /* [4..4] USB Bus Enable */
-      volatile uint16_t RESUME : 1;  /* [5..5] Resume Output */
-      volatile uint16_t USBRST : 1;  /* [6..6] USB Bus Reset Output */
-      volatile uint16_t RWUPE : 1;   /* [7..7] Wakeup Detection Enable */
-      volatile uint16_t WKUP : 1;    /* [8..8] Wakeup Output */
-      volatile uint16_t VBUSEN : 1;  /* [9..9] USB_VBUSEN Output Pin Control */
-      volatile uint16_t EXICEN : 1;  /* [10..10] USB_EXICEN Output Pin Control */
-      volatile uint16_t HNPBTOA : 1; /* [11..11] Host Negotiation Protocol (HNP) */
-      uint16_t : 4;
+      uint16_t                     : 1;
+      volatile uint16_t UACT       : 1; /* [4..4] USB Bus Enable */
+      volatile uint16_t RESUME     : 1; /* [5..5] Resume Output */
+      volatile uint16_t USBRST     : 1; /* [6..6] USB Bus Reset Output */
+      volatile uint16_t RWUPE      : 1; /* [7..7] Wakeup Detection Enable */
+      volatile uint16_t WKUP       : 1; /* [8..8] Wakeup Output */
+      volatile uint16_t VBUSEN     : 1; /* [9..9] USB_VBUSEN Output Pin Control */
+      volatile uint16_t EXICEN     : 1; /* [10..10] USB_EXICEN Output Pin Control */
+      volatile uint16_t HNPBTOA    : 1; /* [11..11] Host Negotiation Protocol (HNP) */
+      uint16_t                     : 4;
     } DVSTCTR0_b;
   };
   volatile const uint16_t RESERVED;
@@ -214,15 +210,15 @@ typedef struct TU_ATTR_PACKED {
 
     struct {
       volatile uint16_t CURPIPE : 4; /* [3..0] CFIFO Port Access Pipe Specification */
-      uint16_t : 1;
-      volatile uint16_t ISEL : 1; /* [5..5] CFIFO Port Access Direction When DCP is Selected */
-      uint16_t : 2;
-      volatile uint16_t BIGEND : 1; /* [8..8] CFIFO Port Endian Control */
-      uint16_t : 1;
-      volatile uint16_t MBW : 2; /* [11..10] CFIFO Port Access Bit Width */
-      uint16_t : 2;
-      volatile uint16_t REW : 1;  /* [14..14] Buffer Pointer Rewind */
-      volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */
+      uint16_t                  : 1;
+      volatile uint16_t ISEL    : 1; /* [5..5] CFIFO Port Access Direction When DCP is Selected */
+      uint16_t                  : 2;
+      volatile uint16_t BIGEND  : 1; /* [8..8] CFIFO Port Endian Control */
+      uint16_t                  : 1;
+      volatile uint16_t MBW     : 2; /* [11..10] CFIFO Port Access Bit Width */
+      uint16_t                  : 2;
+      volatile uint16_t REW     : 1; /* [14..14] Buffer Pointer Rewind */
+      volatile uint16_t RCNT    : 1; /* [15..15] Read Count Mode */
     } CFIFOSEL_b;
   };
 
@@ -230,12 +226,11 @@ typedef struct TU_ATTR_PACKED {
     volatile uint16_t CFIFOCTR; /* (@ 0x00000022) CFIFO Port Control Register */
 
     struct {
-      volatile const uint16_t
-        DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */
-      uint16_t : 1;
-      volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */
-      volatile uint16_t BCLR : 1;	  /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */
-      volatile uint16_t BVAL : 1;	  /* [15..15] Buffer Memory Valid Flag */
+      volatile const uint16_t DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */
+      uint16_t                     : 1;
+      volatile const uint16_t FRDY : 1;  /* [13..13] FIFO Port Ready */
+      volatile uint16_t BCLR       : 1;	 /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */
+      volatile uint16_t BVAL       : 1;	 /* [15..15] Buffer Memory Valid Flag */
     } CFIFOCTR_b;
   };
   volatile const uint32_t RESERVED6;
@@ -245,15 +240,14 @@ typedef struct TU_ATTR_PACKED {
 
     struct {
       volatile uint16_t CURPIPE : 4; /* [3..0] FIFO Port Access Pipe Specification */
-      uint16_t : 4;
-      volatile uint16_t BIGEND : 1; /* [8..8] FIFO Port Endian Control */
-      uint16_t : 1;
-      volatile uint16_t MBW : 2;   /* [11..10] FIFO Port Access Bit Width */
-      volatile uint16_t DREQE : 1; /* [12..12] DMA/DTC Transfer Request Enable */
-      volatile uint16_t
-        DCLRM : 1; /* [13..13] Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read */
-      volatile uint16_t REW : 1;  /* [14..14] Buffer Pointer RewindNote: Only 0 can be read. */
-      volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */
+      uint16_t                  : 4;
+      volatile uint16_t BIGEND  : 1; /* [8..8] FIFO Port Endian Control */
+      uint16_t                  : 1;
+      volatile uint16_t MBW     : 2; /* [11..10] FIFO Port Access Bit Width */
+      volatile uint16_t DREQE   : 1; /* [12..12] DMA/DTC Transfer Request Enable */
+      volatile uint16_t DCLRM   : 1; /* [13..13] Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read */
+      volatile uint16_t REW     : 1; /* [14..14] Buffer Pointer RewindNote: Only 0 can be read. */
+      volatile uint16_t RCNT    : 1; /* [15..15] Read Count Mode */
     } D0FIFOSEL_b;
   };
 
@@ -261,12 +255,11 @@ typedef struct TU_ATTR_PACKED {
     volatile uint16_t D0FIFOCTR; /* (@ 0x0000002A) D0FIFO Port Control Register */
 
     struct {
-      volatile const uint16_t
-        DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */
-      uint16_t : 1;
-      volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */
-      volatile uint16_t BCLR : 1;	  /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */
-      volatile uint16_t BVAL : 1;	  /* [15..15] Buffer Memory Valid Flag */
+      volatile const uint16_t DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */
+      uint16_t                     : 1;
+      volatile const uint16_t FRDY : 1;  /* [13..13] FIFO Port Ready */
+      volatile uint16_t BCLR       : 1;	 /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */
+      volatile uint16_t BVAL       : 1;	 /* [15..15] Buffer Memory Valid Flag */
     } D0FIFOCTR_b;
   };
 
@@ -275,15 +268,14 @@ typedef struct TU_ATTR_PACKED {
 
     struct {
       volatile uint16_t CURPIPE : 4; /* [3..0] FIFO Port Access Pipe Specification */
-      uint16_t : 4;
-      volatile uint16_t BIGEND : 1; /* [8..8] FIFO Port Endian Control */
-      uint16_t : 1;
-      volatile uint16_t MBW : 2;   /* [11..10] FIFO Port Access Bit Width */
-      volatile uint16_t DREQE : 1; /* [12..12] DMA/DTC Transfer Request Enable */
-      volatile uint16_t
-        DCLRM : 1; /* [13..13] Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read */
-      volatile uint16_t REW : 1;  /* [14..14] Buffer Pointer Rewind */
-      volatile uint16_t RCNT : 1; /* [15..15] Read Count Mode */
+      uint16_t                  : 4;
+      volatile uint16_t BIGEND  : 1; /* [8..8] FIFO Port Endian Control */
+      uint16_t                  : 1;
+      volatile uint16_t MBW     : 2; /* [11..10] FIFO Port Access Bit Width */
+      volatile uint16_t DREQE   : 1; /* [12..12] DMA/DTC Transfer Request Enable */
+      volatile uint16_t DCLRM   : 1; /* [13..13] Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read */
+      volatile uint16_t REW     : 1; /* [14..14] Buffer Pointer Rewind */
+      volatile uint16_t RCNT    : 1; /* [15..15] Read Count Mode */
     } D1FIFOSEL_b;
   };
 
@@ -291,12 +283,11 @@ typedef struct TU_ATTR_PACKED {
     volatile uint16_t D1FIFOCTR; /* (@ 0x0000002E) D1FIFO Port Control Register */
 
     struct {
-      volatile const uint16_t
-        DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */
-      uint16_t : 1;
-      volatile const uint16_t FRDY : 1; /* [13..13] FIFO Port Ready */
-      volatile uint16_t BCLR : 1;	  /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */
-      volatile uint16_t BVAL : 1;	  /* [15..15] Buffer Memory Valid Flag */
+      volatile const uint16_t DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */
+      uint16_t                     : 1;
+      volatile const uint16_t FRDY : 1;  /* [13..13] FIFO Port Ready */
+      volatile uint16_t BCLR       : 1;  /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */
+      volatile uint16_t BVAL       : 1;  /* [15..15] Buffer Memory Valid Flag */
     } D1FIFOCTR_b;
   };
 
@@ -308,11 +299,11 @@ typedef struct TU_ATTR_PACKED {
       volatile uint16_t BRDYE : 1; /* [8..8] Buffer Ready Interrupt Enable */
       volatile uint16_t NRDYE : 1; /* [9..9] Buffer Not Ready Response Interrupt Enable */
       volatile uint16_t BEMPE : 1; /* [10..10] Buffer Empty Interrupt Enable */
-      volatile uint16_t CTRE : 1;  /* [11..11] Control Transfer Stage Transition Interrupt Enable */
-      volatile uint16_t DVSE : 1;  /* [12..12] Device State Transition Interrupt Enable */
-      volatile uint16_t SOFE : 1;  /* [13..13] Frame Number Update Interrupt Enable */
-      volatile uint16_t RSME : 1;  /* [14..14] Resume Interrupt Enable */
-      volatile uint16_t VBSE : 1;  /* [15..15] VBUS Interrupt Enable */
+      volatile uint16_t CTRE  : 1; /* [11..11] Control Transfer Stage Transition Interrupt Enable */
+      volatile uint16_t DVSE  : 1; /* [12..12] Device State Transition Interrupt Enable */
+      volatile uint16_t SOFE  : 1; /* [13..13] Frame Number Update Interrupt Enable */
+      volatile uint16_t RSME  : 1; /* [14..14] Resume Interrupt Enable */
+      volatile uint16_t VBSE  : 1; /* [15..15] VBUS Interrupt Enable */
     } INTENB0_b;
   };
 
@@ -321,16 +312,16 @@ typedef struct TU_ATTR_PACKED {
 
     struct {
       volatile uint16_t PDDETINTE0 : 1; /* [0..0] PDDETINT0 Detection Interrupt Enable */
-      uint16_t : 3;
-      volatile uint16_t SACKE : 1;   /* [4..4] Setup Transaction Normal Response Interrupt Enable */
-      volatile uint16_t SIGNE : 1;   /* [5..5] Setup Transaction Error Interrupt Enable */
-      volatile uint16_t EOFERRE : 1; /* [6..6] EOF Error Detection Interrupt Enable */
-      uint16_t : 4;
-      volatile uint16_t ATTCHE : 1; /* [11..11] Connection Detection Interrupt Enable */
-      volatile uint16_t DTCHE : 1;  /* [12..12] Disconnection Detection Interrupt Enable */
-      uint16_t : 1;
-      volatile uint16_t BCHGE : 1;  /* [14..14] USB Bus Change Interrupt Enable */
-      volatile uint16_t OVRCRE : 1; /* [15..15] Overcurrent Input Change Interrupt Enable */
+      uint16_t                     : 3;
+      volatile uint16_t SACKE      : 1; /* [4..4] Setup Transaction Normal Response Interrupt Enable */
+      volatile uint16_t SIGNE      : 1; /* [5..5] Setup Transaction Error Interrupt Enable */
+      volatile uint16_t EOFERRE    : 1; /* [6..6] EOF Error Detection Interrupt Enable */
+      uint16_t                     : 4;
+      volatile uint16_t ATTCHE     : 1; /* [11..11] Connection Detection Interrupt Enable */
+      volatile uint16_t DTCHE      : 1; /* [12..12] Disconnection Detection Interrupt Enable */
+      uint16_t                     : 1;
+      volatile uint16_t BCHGE      : 1; /* [14..14] USB Bus Change Interrupt Enable */
+      volatile uint16_t OVRCRE     : 1; /* [15..15] Overcurrent Input Change Interrupt Enable */
     } INTENB1_b;
   };
   volatile const uint16_t RESERVED7;
@@ -393,12 +384,12 @@ typedef struct TU_ATTR_PACKED {
     volatile uint16_t SOFCFG; /* (@ 0x0000003C) SOF Output Configuration Register */
 
     struct {
-      uint16_t : 4;
+      uint16_t                        : 4;
       volatile const uint16_t EDGESTS : 1; /* [4..4] Edge Interrupt Output Status Monitor */
-      volatile uint16_t INTL : 1;	     /* [5..5] Interrupt Output Sense Select */
-      volatile uint16_t BRDYM : 1;	     /* [6..6] BRDY Interrupt Status Clear Timing */
-      uint16_t : 1;
-      volatile uint16_t TRNENSEL : 1; /* [8..8] Transaction-Enabled Time Select */
+      volatile uint16_t INTL          : 1; /* [5..5] Interrupt Output Sense Select */
+      volatile uint16_t BRDYM         : 1; /* [6..6] BRDY Interrupt Status Clear Timing */
+      uint16_t                        : 1;
+      volatile uint16_t TRNENSEL      : 1; /* [8..8] Transaction-Enabled Time Select */
       uint16_t : 7;
     } SOFCFG_b;
   };
@@ -407,17 +398,17 @@ typedef struct TU_ATTR_PACKED {
     volatile uint16_t PHYSET; /* (@ 0x0000003E) PHY Setting Register */
 
     struct {
-      volatile uint16_t DIRPD : 1;	/* [0..0] Power-Down Control */
+      volatile uint16_t DIRPD    : 1; /* [0..0] Power-Down Control */
       volatile uint16_t PLLRESET : 1; /* [1..1] PLL Reset Control */
-      uint16_t : 1;
-      volatile uint16_t CDPEN : 1;  /* [3..3] Charging Downstream Port Enable */
-      volatile uint16_t CLKSEL : 2; /* [5..4] Input System Clock Frequency */
-      uint16_t : 2;
-      volatile uint16_t REPSEL : 2; /* [9..8] Terminating Resistance Adjustment Cycle */
-      uint16_t : 1;
+      uint16_t                   : 1;
+      volatile uint16_t CDPEN    : 1; /* [3..3] Charging Downstream Port Enable */
+      volatile uint16_t CLKSEL   : 2; /* [5..4] Input System Clock Frequency */
+      uint16_t                   : 2;
+      volatile uint16_t REPSEL   : 2; /* [9..8] Terminating Resistance Adjustment Cycle */
+      uint16_t                   : 1;
       volatile uint16_t REPSTART : 1; /* [11..11] Forcibly Start Terminating Resistance Adjustment */
-      uint16_t : 3;
-      volatile uint16_t HSEB : 1; /* [15..15] CL-Only Mode */
+      uint16_t                   : 3;
+      volatile uint16_t HSEB     : 1; /* [15..15] CL-Only Mode */
     } PHYSET_b;
   };
 
@@ -425,18 +416,18 @@ typedef struct TU_ATTR_PACKED {
     volatile uint16_t INTSTS0; /* (@ 0x00000040) Interrupt Status Register 0 */
 
     struct {
-      volatile const uint16_t CTSQ : 3;  /* [2..0] Control Transfer Stage */
-      volatile uint16_t VALID : 1;	   /* [3..3] USB Request Reception */
-      volatile const uint16_t DVSQ : 3;  /* [6..4] Device State */
+      volatile const uint16_t CTSQ  : 3; /* [2..0] Control Transfer Stage */
+      volatile uint16_t VALID       : 1; /* [3..3] USB Request Reception */
+      volatile const uint16_t DVSQ  : 3; /* [6..4] Device State */
       volatile const uint16_t VBSTS : 1; /* [7..7] VBUS Input Status */
-      volatile const uint16_t BRDY : 1;  /* [8..8] Buffer Ready Interrupt Status */
-      volatile const uint16_t NRDY : 1;  /* [9..9] Buffer Not Ready Interrupt Status */
-      volatile const uint16_t BEMP : 1;  /* [10..10] Buffer Empty Interrupt Status */
-      volatile uint16_t CTRT : 1;	   /* [11..11] Control Transfer Stage Transition Interrupt Status */
-      volatile uint16_t DVST : 1;	   /* [12..12] Device State Transition Interrupt Status */
-      volatile uint16_t SOFR : 1;	   /* [13..13] Frame Number Refresh Interrupt Status */
-      volatile uint16_t RESM : 1;	   /* [14..14] Resume Interrupt Status */
-      volatile uint16_t VBINT : 1;	   /* [15..15] VBUS Interrupt Status */
+      volatile const uint16_t BRDY  : 1; /* [8..8] Buffer Ready Interrupt Status */
+      volatile const uint16_t NRDY  : 1; /* [9..9] Buffer Not Ready Interrupt Status */
+      volatile const uint16_t BEMP  : 1; /* [10..10] Buffer Empty Interrupt Status */
+      volatile uint16_t CTRT        : 1; /* [11..11] Control Transfer Stage Transition Interrupt Status */
+      volatile uint16_t DVST        : 1; /* [12..12] Device State Transition Interrupt Status */
+      volatile uint16_t SOFR        : 1; /* [13..13] Frame Number Refresh Interrupt Status */
+      volatile uint16_t RESM        : 1; /* [14..14] Resume Interrupt Status */
+      volatile uint16_t VBINT       : 1; /* [15..15] VBUS Interrupt Status */
     } INTSTS0_b;
   };
 
@@ -445,19 +436,19 @@ typedef struct TU_ATTR_PACKED {
 
     struct {
       volatile uint16_t PDDETINT0 : 1; /* [0..0] PDDET0 Detection Interrupt Status */
-      uint16_t : 3;
-      volatile uint16_t SACK : 1;   /* [4..4] Setup Transaction Normal Response Interrupt Status */
-      volatile uint16_t SIGN : 1;   /* [5..5] Setup Transaction Error Interrupt Status */
-      volatile uint16_t EOFERR : 1; /* [6..6] EOF Error Detection Interrupt Status */
-      uint16_t : 1;
-      volatile uint16_t LPMEND : 1;	/* [8..8] LPM Transaction End Interrupt Status */
-      volatile uint16_t L1RSMEND : 1; /* [9..9] L1 Resume End Interrupt Status */
-      uint16_t : 1;
-      volatile uint16_t ATTCH : 1; /* [11..11] ATTCH Interrupt Status */
-      volatile uint16_t DTCH : 1;  /* [12..12] USB Disconnection Detection Interrupt Status */
-      uint16_t : 1;
-      volatile uint16_t BCHG : 1;  /* [14..14] USB Bus Change Interrupt Status */
-      volatile uint16_t OVRCR : 1; /* [15..15] Overcurrent Input Change Interrupt Status */
+      uint16_t                    : 3;
+      volatile uint16_t SACK      : 1; /* [4..4] Setup Transaction Normal Response Interrupt Status */
+      volatile uint16_t SIGN      : 1; /* [5..5] Setup Transaction Error Interrupt Status */
+      volatile uint16_t EOFERR    : 1; /* [6..6] EOF Error Detection Interrupt Status */
+      uint16_t                    : 1;
+      volatile uint16_t LPMEND    : 1; /* [8..8] LPM Transaction End Interrupt Status */
+      volatile uint16_t L1RSMEND  : 1; /* [9..9] L1 Resume End Interrupt Status */
+      uint16_t                    : 1;
+      volatile uint16_t ATTCH     : 1; /* [11..11] ATTCH Interrupt Status */
+      volatile uint16_t DTCH      : 1; /* [12..12] USB Disconnection Detection Interrupt Status */
+      uint16_t                    : 1;
+      volatile uint16_t BCHG      : 1; /* [14..14] USB Bus Change Interrupt Status */
+      volatile uint16_t OVRCR     : 1; /* [15..15] Overcurrent Input Change Interrupt Status */
     } INTSTS1_b;
   };
   volatile const uint16_t RESERVED8;
@@ -521,9 +512,9 @@ typedef struct TU_ATTR_PACKED {
 
     struct {
       volatile const uint16_t FRNM : 11; /* [10..0] Frame NumberLatest frame number */
-      uint16_t : 3;
-      volatile uint16_t CRCE : 1; /* [14..14] Receive Data Error */
-      volatile uint16_t OVRN : 1; /* [15..15] Overrun/Underrun Detection Status */
+      uint16_t                     : 3;
+      volatile uint16_t CRCE       : 1; /* [14..14] Receive Data Error */
+      volatile uint16_t OVRN       : 1; /* [15..15] Overrun/Underrun Detection Status */
     } FRMNUM_b;
   };
 
@@ -532,8 +523,8 @@ typedef struct TU_ATTR_PACKED {
 
     struct {
       volatile const uint16_t UFRNM : 3; /* [2..0] MicroframeIndicate the microframe number. */
-      uint16_t : 12;
-      volatile uint16_t DVCHG : 1; /* [15..15] Device State Change */
+      uint16_t                      : 12;
+      volatile uint16_t DVCHG       : 1; /* [15..15] Device State Change */
     } UFRMNUM_b;
   };
 
@@ -542,9 +533,9 @@ typedef struct TU_ATTR_PACKED {
 
     struct {
       volatile const uint16_t USBADDR : 7; /* [6..0] USB Address In device controller mode */
-      uint16_t : 1;
-      volatile uint16_t STSRECOV0 : 3; /* [10..8] Status Recovery */
-      uint16_t : 5;
+      uint16_t                        : 1;
+      volatile uint16_t STSRECOV0     : 3; /* [10..8] Status Recovery */
+      uint16_t                        : 5;
     } USBADDR_b;
   };
   volatile const uint16_t RESERVED9;
@@ -553,9 +544,8 @@ typedef struct TU_ATTR_PACKED {
     volatile uint16_t USBREQ; /* (@ 0x00000054) USB Request Type Register */
 
     struct {
-      volatile uint16_t
-        BMREQUESTTYPE : 8; /* [7..0] Request TypeThese bits store the USB request bmRequestType value. */
-      volatile uint16_t BREQUEST : 8; /* [15..8] RequestThese bits store the USB request bRequest value. */
+      volatile uint16_t BMREQUESTTYPE : 8; /* [7..0] Request TypeThese bits store the USB request bmRequestType value. */
+      volatile uint16_t BREQUEST      : 8; /* [15..8] RequestThese bits store the USB request bRequest value. */
     } USBREQ_b;
   };
 
@@ -587,12 +577,12 @@ typedef struct TU_ATTR_PACKED {
     volatile uint16_t DCPCFG; /* (@ 0x0000005C) DCP Configuration Register */
 
     struct {
-      uint16_t : 4;
-      volatile uint16_t DIR : 1; /* [4..4] Transfer Direction */
-      uint16_t : 2;
+      uint16_t                 : 4;
+      volatile uint16_t DIR    : 1; /* [4..4] Transfer Direction */
+      uint16_t                 : 2;
       volatile uint16_t SHTNAK : 1; /* [7..7] Pipe Disabled at End of Transfer */
-      volatile uint16_t CNTMD : 1;  /* [8..8] Continuous Transfer Mode */
-      uint16_t : 7;
+      volatile uint16_t CNTMD  : 1; /* [8..8] Continuous Transfer Mode */
+      uint16_t                 : 7;
     } DCPCFG_b;
   };
 
@@ -600,8 +590,8 @@ typedef struct TU_ATTR_PACKED {
     volatile uint16_t DCPMAXP; /* (@ 0x0000005E) DCP Maximum Packet Size Register */
 
     struct {
-      volatile uint16_t MXPS : 7; /* [6..0] Maximum Packet Size */
-      uint16_t : 5;
+      volatile uint16_t MXPS   : 7; /* [6..0] Maximum Packet Size */
+      uint16_t                 : 5;
       volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */
     } DCPMAXP_b;
   };
@@ -610,18 +600,18 @@ typedef struct TU_ATTR_PACKED {
     volatile uint16_t DCPCTR; /* (@ 0x00000060) DCP Control Register */
 
     struct {
-      volatile uint16_t PID : 2;  /* [1..0] Response PID */
-      volatile uint16_t CCPL : 1; /* [2..2] Control Transfer End Enable */
-      uint16_t : 2;
+      volatile uint16_t PID         : 2; /* [1..0] Response PID */
+      volatile uint16_t CCPL        : 1; /* [2..2] Control Transfer End Enable */
+      uint16_t                      : 2;
       volatile const uint16_t PBUSY : 1; /* [5..5] Pipe Busy */
       volatile const uint16_t SQMON : 1; /* [6..6] Sequence Toggle Bit Monitor */
-      volatile uint16_t SQSET : 1;	   /* [7..7] Sequence Toggle Bit Set */
-      volatile uint16_t SQCLR : 1;	   /* [8..8] Sequence Toggle Bit Clear */
-      uint16_t : 2;
-      volatile uint16_t SUREQCLR : 1; /* [11..11] SUREQ Bit Clear */
-      uint16_t : 2;
-      volatile uint16_t SUREQ : 1;	  /* [14..14] Setup Token Transmission */
-      volatile const uint16_t BSTS : 1; /* [15..15] Buffer Status */
+      volatile uint16_t SQSET       : 1; /* [7..7] Sequence Toggle Bit Set */
+      volatile uint16_t SQCLR       : 1; /* [8..8] Sequence Toggle Bit Clear */
+      uint16_t                      : 2;
+      volatile uint16_t SUREQCLR    : 1; /* [11..11] SUREQ Bit Clear */
+      uint16_t                      : 2;
+      volatile uint16_t SUREQ       : 1; /* [14..14] Setup Token Transmission */
+      volatile const uint16_t BSTS  : 1; /* [15..15] Buffer Status */
     } DCPCTR_b;
   };
   volatile const uint16_t RESERVED10;
@@ -637,18 +627,18 @@ typedef struct TU_ATTR_PACKED {
   volatile const uint16_t RESERVED11;
 
   union {
-    volatile uint16_t PIPECFG; /* (@ 0x00000068) Pipe Configuration Register */
+    volatile uint16_t PIPECFG;      /* (@ 0x00000068) Pipe Configuration Register */
 
     struct {
-      volatile uint16_t EPNUM : 4; /* [3..0] Endpoint Number */
-      volatile uint16_t DIR : 1;   /* [4..4] Transfer Direction */
-      uint16_t : 2;
+      volatile uint16_t EPNUM  : 4; /* [3..0] Endpoint Number */
+      volatile uint16_t DIR    : 1; /* [4..4] Transfer Direction */
+      uint16_t                 : 2;
       volatile uint16_t SHTNAK : 1; /* [7..7] Pipe Disabled at End of Transfer */
-      uint16_t : 1;
-      volatile uint16_t DBLB : 1; /* [9..9] Double Buffer Mode */
-      volatile uint16_t BFRE : 1; /* [10..10] BRDY Interrupt Operation Specification */
-      uint16_t : 3;
-      volatile uint16_t TYPE : 2; /* [15..14] Transfer Type */
+      uint16_t                 : 1;
+      volatile uint16_t DBLB   : 1; /* [9..9] Double Buffer Mode */
+      volatile uint16_t BFRE   : 1; /* [10..10] BRDY Interrupt Operation Specification */
+      uint16_t                 : 3;
+      volatile uint16_t TYPE   : 2; /* [15..14] Transfer Type */
     } PIPECFG_b;
   };
   volatile const uint16_t RESERVED12;
@@ -657,8 +647,8 @@ typedef struct TU_ATTR_PACKED {
     volatile uint16_t PIPEMAXP; /* (@ 0x0000006C) Pipe Maximum Packet Size Register */
 
     struct {
-      volatile uint16_t MXPS : 9; /* [8..0] Maximum Packet Size */
-      uint16_t : 3;
+      volatile uint16_t MXPS   : 9; /* [8..0] Maximum Packet Size */
+      uint16_t                 : 3;
       volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */
     } PIPEMAXP_b;
   };
@@ -668,29 +658,29 @@ typedef struct TU_ATTR_PACKED {
 
     struct {
       volatile uint16_t IITV : 3; /* [2..0] Interval Error Detection Interval */
-      uint16_t : 9;
+      uint16_t               : 9;
       volatile uint16_t IFIS : 1; /* [12..12] Isochronous IN Buffer Flush */
-      uint16_t : 3;
+      uint16_t               : 3;
     } PIPEPERI_b;
   };
 
   union {
-    volatile uint16_t PIPE_CTR[9]; /* (@ 0x00000070) Pipe [0..8] Control Register */
+    volatile uint16_t PIPE_CTR[9];        /* (@ 0x00000070) Pipe [0..8] Control Register */
 
     struct {
-      volatile uint16_t PID : 2; /* [1..0] Response PID */
-      uint16_t : 3;
-      volatile const uint16_t PBUSY : 1; /* [5..5] Pipe Busy */
-      volatile const uint16_t SQMON : 1; /* [6..6] Sequence Toggle Bit Confirmation */
-      volatile uint16_t SQSET : 1;	   /* [7..7] Sequence Toggle Bit Set */
-      volatile uint16_t SQCLR : 1;	   /* [8..8] Sequence Toggle Bit Clear */
-      volatile uint16_t ACLRM : 1;	   /* [9..9] Auto Buffer Clear Mode */
-      volatile uint16_t ATREPM : 1;	   /* [10..10] Auto Response Mode */
-      uint16_t : 1;
-      volatile const uint16_t CSSTS : 1;  /* [12..12] CSSTS Status */
-      volatile uint16_t CSCLR : 1;	    /* [13..13] CSPLIT Status Clear */
+      volatile uint16_t PID          : 2; /* [1..0] Response PID */
+      uint16_t                       : 3;
+      volatile const uint16_t PBUSY  : 1; /* [5..5] Pipe Busy */
+      volatile const uint16_t SQMON  : 1; /* [6..6] Sequence Toggle Bit Confirmation */
+      volatile uint16_t SQSET        : 1; /* [7..7] Sequence Toggle Bit Set */
+      volatile uint16_t SQCLR        : 1; /* [8..8] Sequence Toggle Bit Clear */
+      volatile uint16_t ACLRM        : 1; /* [9..9] Auto Buffer Clear Mode */
+      volatile uint16_t ATREPM       : 1; /* [10..10] Auto Response Mode */
+      uint16_t                       : 1;
+      volatile const uint16_t CSSTS  : 1; /* [12..12] CSSTS Status */
+      volatile uint16_t CSCLR        : 1; /* [13..13] CSPLIT Status Clear */
       volatile const uint16_t INBUFM : 1; /* [14..14] Transmit Buffer Monitor */
-      volatile const uint16_t BSTS : 1;   /* [15..15] Buffer Status */
+      volatile const uint16_t BSTS   : 1; /* [15..15] Buffer Status */
     } PIPE_CTR_b[9];
   };
   volatile const uint16_t RESERVED13;
@@ -699,22 +689,22 @@ typedef struct TU_ATTR_PACKED {
   volatile const uint32_t RESERVED15[3];
 
   union {
-    volatile uint16_t USBBCCTRL0; /* (@ 0x000000B0) BC Control Register 0 */
+    volatile uint16_t USBBCCTRL0;             /* (@ 0x000000B0) BC Control Register 0 */
 
     struct {
-      volatile uint16_t RPDME0 : 1;	/* [0..0] D- Pin Pull-Down Control */
-      volatile uint16_t IDPSRCE0 : 1; /* [1..1] D+ Pin IDPSRC Output Control */
+      volatile uint16_t RPDME0           : 1; /* [0..0] D- Pin Pull-Down Control */
+      volatile uint16_t IDPSRCE0         : 1; /* [1..1] D+ Pin IDPSRC Output Control */
       volatile uint16_t
-        IDMSINKE0 : 1;		/* [2..2] D- Pin 0.6 V Input Detection (Comparator and Sink) Control */
-      volatile uint16_t VDPSRCE0 : 1; /* [3..3] D+ Pin VDPSRC (0.6 V) Output Control */
+        IDMSINKE0                        : 1; /* [2..2] D- Pin 0.6 V Input Detection (Comparator and Sink) Control */
+      volatile uint16_t VDPSRCE0         : 1; /* [3..3] D+ Pin VDPSRC (0.6 V) Output Control */
       volatile uint16_t
-        IDPSINKE0 : 1;		/* [4..4] D+ Pin 0.6 V Input Detection (Comparator and Sink) Control */
-      volatile uint16_t VDMSRCE0 : 1; /* [5..5] D- Pin VDMSRC (0.6 V) Output Control */
-      uint16_t : 1;
-      volatile uint16_t BATCHGE0 : 1; /* [7..7] BC (Battery Charger) Function Ch0 General Enable Control */
+        IDPSINKE0                        : 1; /* [4..4] D+ Pin 0.6 V Input Detection (Comparator and Sink) Control */
+      volatile uint16_t VDMSRCE0         : 1; /* [5..5] D- Pin VDMSRC (0.6 V) Output Control */
+      uint16_t                           : 1;
+      volatile uint16_t BATCHGE0         : 1; /* [7..7] BC (Battery Charger) Function Ch0 General Enable Control */
       volatile const uint16_t CHGDETSTS0 : 1; /* [8..8] D- Pin 0.6 V Input Detection Status */
-      volatile const uint16_t PDDETSTS0 : 1;	/* [9..9] D+ Pin 0.6 V Input Detection Status */
-      uint16_t : 6;
+      volatile const uint16_t PDDETSTS0  : 1; /* [9..9] D+ Pin 0.6 V Input Detection Status */
+      uint16_t                           : 6;
     } USBBCCTRL0_b;
   };
   volatile const uint16_t RESERVED16;
@@ -736,9 +726,9 @@ typedef struct TU_ATTR_PACKED {
 
     struct {
       volatile uint16_t VDDUSBE : 1; /* [0..0] USB Reference Power Supply Circuit On/Off Control */
-      uint16_t : 6;
-      volatile uint16_t VDCEN : 1; /* [7..7] USB Regulator On/Off Control */
-      uint16_t : 8;
+      uint16_t                  : 6;
+      volatile uint16_t VDCEN   : 1; /* [7..7] USB Regulator On/Off Control */
+      uint16_t                  : 8;
     } USBMC_b;
   };
   volatile const uint16_t RESERVED20;
@@ -748,9 +738,9 @@ typedef struct TU_ATTR_PACKED {
 
     struct {
       uint16_t : 6;
-      volatile uint16_t USBSPD : 2;  /* [7..6] Transfer Speed of Communication Target Device */
+      volatile uint16_t USBSPD  : 2; /* [7..6] Transfer Speed of Communication Target Device */
       volatile uint16_t HUBPORT : 3; /* [10..8] Communication Target Connecting Hub Port */
-      volatile uint16_t UPPHUB : 4;  /* [14..11] Communication Target Connecting Hub Register */
+      volatile uint16_t UPPHUB  : 4; /* [14..11] Communication Target Connecting Hub Register */
       uint16_t : 1;
     } DEVADD_b[10];
   };
@@ -794,15 +784,15 @@ typedef struct TU_ATTR_PACKED {
     volatile uint16_t BCCTRL; /* (@ 0x00000140) Battery Charging Control Register */
 
     struct {
-      volatile uint16_t IDPSRCE : 1;	/* [0..0] IDPSRC Control */
-      volatile uint16_t IDMSINKE : 1; /* [1..1] IDMSINK Control */
-      volatile uint16_t VDPSRCE : 1;	/* [2..2] VDPSRC Control */
-      volatile uint16_t IDPSINKE : 1; /* [3..3] IDPSINK Control */
-      volatile uint16_t VDMSRCE : 1;	/* [4..4] VDMSRC Control */
-      volatile uint16_t DCPMODE : 1;	/* [5..5] DCP Mode Control */
-      uint16_t : 2;
+      volatile uint16_t IDPSRCE         : 1; /* [0..0] IDPSRC Control */
+      volatile uint16_t IDMSINKE        : 1; /* [1..1] IDMSINK Control */
+      volatile uint16_t VDPSRCE         : 1; /* [2..2] VDPSRC Control */
+      volatile uint16_t IDPSINKE        : 1; /* [3..3] IDPSINK Control */
+      volatile uint16_t VDMSRCE         : 1; /* [4..4] VDMSRC Control */
+      volatile uint16_t DCPMODE         : 1; /* [5..5] DCP Mode Control */
+      uint16_t                          : 2;
       volatile const uint16_t CHGDETSTS : 1; /* [8..8] CHGDET Status */
-      volatile const uint16_t PDDETSTS : 1;  /* [9..9] PDDET Status */
+      volatile const uint16_t PDDETSTS  : 1; /* [9..9] PDDET Status */
       uint16_t : 6;
     } BCCTRL_b;
   };
@@ -812,14 +802,13 @@ typedef struct TU_ATTR_PACKED {
     volatile uint16_t PL1CTRL1; /* (@ 0x00000144) Function L1 Control Register 1 */
 
     struct {
-      volatile uint16_t L1RESPEN : 1; /* [0..0] L1 Response Enable */
-      volatile uint16_t L1RESPMD : 2; /* [2..1] L1 Response Mode */
-      volatile uint16_t L1NEGOMD : 1; /* [3..3] L1 Response Negotiation Control. */
-      volatile const uint16_t
-        DVSQ : 4;	       /* [7..4] DVSQ Extension.DVSQ[3] is Mirror of DVSQ[2:0] in INTSTS0. */
-      volatile uint16_t HIRDTHR : 4; /* [11..8] L1 Response Negotiation Threshold Value */
-      uint16_t : 2;
-      volatile uint16_t L1EXTMD : 1; /* [14..14] PHY Control Mode at L1 Return */
+      volatile uint16_t L1RESPEN   : 1; /* [0..0] L1 Response Enable */
+      volatile uint16_t L1RESPMD   : 2; /* [2..1] L1 Response Mode */
+      volatile uint16_t L1NEGOMD   : 1; /* [3..3] L1 Response Negotiation Control. */
+      volatile const uint16_t DVSQ : 4; /* [7..4] DVSQ Extension.DVSQ[3] is Mirror of DVSQ[2:0] in INTSTS0. */
+      volatile uint16_t HIRDTHR    : 4; /* [11..8] L1 Response Negotiation Threshold Value */
+      uint16_t                     : 2;
+      volatile uint16_t L1EXTMD    : 1; /* [14..14] PHY Control Mode at L1 Return */
       uint16_t : 1;
     } PL1CTRL1_b;
   };
@@ -830,7 +819,7 @@ typedef struct TU_ATTR_PACKED {
     struct {
       uint16_t : 8;
       volatile uint16_t HIRDMON : 4; /* [11..8] HIRD Value Monitor */
-      volatile uint16_t RWEMON : 1;  /* [12..12] RWE Value Monitor */
+      volatile uint16_t RWEMON  : 1;  /* [12..12] RWE Value Monitor */
       uint16_t : 3;
     } PL1CTRL2_b;
   };
@@ -839,7 +828,7 @@ typedef struct TU_ATTR_PACKED {
     volatile uint16_t HL1CTRL1; /* (@ 0x00000148) Host L1 Control Register 1 */
 
     struct {
-      volatile uint16_t L1REQ : 1;	      /* [0..0] L1 Transition Request */
+      volatile uint16_t L1REQ          : 1;	      /* [0..0] L1 Transition Request */
       volatile const uint16_t L1STATUS : 2; /* [2..1] L1 Request Completion Status */
       uint16_t : 13;
     } HL1CTRL1_b;
@@ -850,11 +839,11 @@ typedef struct TU_ATTR_PACKED {
 
     struct {
       volatile uint16_t L1ADDR : 4; /* [3..0] LPM Token DeviceAddress */
-      uint16_t : 4;
-      volatile uint16_t HIRD : 4;  /* [11..8] LPM Token HIRD */
-      volatile uint16_t L1RWE : 1; /* [12..12] LPM Token L1 Remote Wake Enable */
-      uint16_t : 2;
-      volatile uint16_t BESL : 1; /* [15..15] BESL & Alternate HIRD */
+      uint16_t                 : 4;
+      volatile uint16_t HIRD   : 4; /* [11..8] LPM Token HIRD */
+      volatile uint16_t L1RWE  : 1; /* [12..12] LPM Token L1 Remote Wake Enable */
+      uint16_t                 : 2;
+      volatile uint16_t BESL   : 1; /* [15..15] BESL & Alternate HIRD */
     } HL1CTRL2_b;
   };
   volatile const uint32_t RESERVED25[5];
@@ -864,13 +853,10 @@ typedef struct TU_ATTR_PACKED {
 
     struct {
       uint32_t : 20;
-      volatile const uint32_t
-        DOVCAHM : 1; /* [20..20] OVRCURA InputIndicates OVRCURA input signal on the HS side of USB port. */
-      volatile const uint32_t
-        DOVCBHM : 1; /* [21..21] OVRCURB InputIndicates OVRCURB input signal on the HS side of USB port. */
-      uint32_t : 1;
-      volatile const uint32_t
-        DVBSTSHM : 1; /* [23..23] VBUS InputIndicates VBUS input signal on the HS side of USB port. */
+      volatile const uint32_t DOVCAHM  : 1; /* [20..20] OVRCURA InputIndicates OVRCURA input signal on the HS side of USB port. */
+      volatile const uint32_t DOVCBHM  : 1; /* [21..21] OVRCURB InputIndicates OVRCURB input signal on the HS side of USB port. */
+      uint32_t                         : 1;
+      volatile const uint32_t DVBSTSHM : 1; /* [23..23] VBUS InputIndicates VBUS input signal on the HS side of USB port. */
       uint32_t : 8;
     } DPUSR0R_b;
   };
@@ -880,14 +866,14 @@ typedef struct TU_ATTR_PACKED {
 
     struct {
       uint32_t : 4;
-      volatile uint32_t DOVCAHE : 1; /* [4..4] OVRCURA Interrupt Enable Clear */
-      volatile uint32_t DOVCBHE : 1; /* [5..5] OVRCURB Interrupt Enable Clear */
-      uint32_t : 1;
-      volatile uint32_t DVBSTSHE : 1; /* [7..7] VBUS Interrupt Enable/Clear */
-      uint32_t : 12;
-      volatile const uint32_t DOVCAH : 1; /* [20..20] Indication of Return from OVRCURA Interrupt Source */
-      volatile const uint32_t DOVCBH : 1; /* [21..21] Indication of Return from OVRCURB Interrupt Source */
-      uint32_t : 1;
+      volatile uint32_t DOVCAHE       : 1; /* [4..4] OVRCURA Interrupt Enable Clear */
+      volatile uint32_t DOVCBHE       : 1; /* [5..5] OVRCURB Interrupt Enable Clear */
+      uint32_t                        : 1;
+      volatile uint32_t DVBSTSHE      : 1; /* [7..7] VBUS Interrupt Enable/Clear */
+      uint32_t                        : 12;
+      volatile const uint32_t DOVCAH  : 1; /* [20..20] Indication of Return from OVRCURA Interrupt Source */
+      volatile const uint32_t DOVCBH  : 1; /* [21..21] Indication of Return from OVRCURB Interrupt Source */
+      uint32_t                        : 1;
       volatile const uint32_t DVBSTSH : 1; /* [23..23] Indication of Return from VBUS Interrupt Source */
       uint32_t : 8;
     } DPUSR1R_b;
@@ -899,14 +885,12 @@ typedef struct TU_ATTR_PACKED {
     struct {
       volatile const uint16_t DPINT : 1; /* [0..0] Indication of Return from DP Interrupt Source */
       volatile const uint16_t DMINT : 1; /* [1..1] Indication of Return from DM Interrupt Source */
-      uint16_t : 2;
-      volatile const uint16_t
-        DPVAL : 1; /* [4..4] DP InputIndicates DP input signal on the HS side of USB port. */
-      volatile const uint16_t
-        DMVAL : 1; /* [5..5] DM InputIndicates DM input signal on the HS side of USB port. */
-      uint16_t : 2;
-      volatile uint16_t DPINTE : 1; /* [8..8] DP Interrupt Enable Clear */
-      volatile uint16_t DMINTE : 1; /* [9..9] DM Interrupt Enable Clear */
+      uint16_t                      : 2;
+      volatile const uint16_t DPVAL : 1; /* [4..4] DP InputIndicates DP input signal on the HS side of USB port. */
+      volatile const uint16_t DMVAL : 1; /* [5..5] DM InputIndicates DM input signal on the HS side of USB port. */
+      uint16_t                      : 2;
+      volatile uint16_t DPINTE      : 1; /* [8..8] DP Interrupt Enable Clear */
+      volatile uint16_t DMINTE      : 1; /* [9..9] DM Interrupt Enable Clear */
       uint16_t : 6;
     } DPUSR2R_b;
   };
@@ -915,7 +899,7 @@ typedef struct TU_ATTR_PACKED {
     volatile uint16_t DPUSRCR; /* (@ 0x0000016A) Deep Standby USB Suspend/Resume Command Register */
 
     struct {
-      volatile uint16_t FIXPHY : 1;	/* [0..0] USB Transceiver Control Fix */
+      volatile uint16_t FIXPHY   : 1;	/* [0..0] USB Transceiver Control Fix */
       volatile uint16_t FIXPHYPD : 1; /* [1..1] USB Transceiver Control Fix for PLL */
       uint16_t : 14;
     } DPUSRCR_b;
@@ -927,22 +911,19 @@ typedef struct TU_ATTR_PACKED {
       DPUSR0R_FS; /* (@ 0x00000400) Deep Software Standby USB Transceiver Control/Pin Monitor Register */
 
     struct {
-      volatile uint32_t SRPC0 : 1; /* [0..0] USB Single End Receiver Control */
-      volatile uint32_t RPUE0 : 1; /* [1..1] DP Pull-Up Resistor Control */
-      uint32_t : 1;
-      volatile uint32_t DRPD0 : 1;   /* [3..3] D+/D- Pull-Down Resistor Control */
-      volatile uint32_t FIXPHY0 : 1; /* [4..4] USB Transceiver Output Fix */
-      uint32_t : 11;
-      volatile const uint32_t DP0 : 1; /* [16..16] USB0 D+ InputIndicates the D+ input signal of the USB. */
-      volatile const uint32_t DM0 : 1; /* [17..17] USB D-InputIndicates the D- input signal of the USB. */
-      uint32_t : 2;
-      volatile const uint32_t
-        DOVCA0 : 1; /* [20..20] USB OVRCURA InputIndicates the OVRCURA input signal of the USB. */
-      volatile const uint32_t
-        DOVCB0 : 1; /* [21..21] USB OVRCURB InputIndicates the OVRCURB input signal of the USB. */
-      uint32_t : 1;
-      volatile const uint32_t
-        DVBSTS0 : 1; /* [23..23] USB VBUS InputIndicates the VBUS input signal of the USB. */
+      volatile uint32_t SRPC0         : 1; /* [0..0] USB Single End Receiver Control */
+      volatile uint32_t RPUE0         : 1; /* [1..1] DP Pull-Up Resistor Control */
+      uint32_t                        : 1;
+      volatile uint32_t DRPD0         : 1; /* [3..3] D+/D- Pull-Down Resistor Control */
+      volatile uint32_t FIXPHY0       : 1; /* [4..4] USB Transceiver Output Fix */
+      uint32_t                        : 11;
+      volatile const uint32_t DP0     : 1; /* [16..16] USB0 D+ InputIndicates the D+ input signal of the USB. */
+      volatile const uint32_t DM0     : 1; /* [17..17] USB D-InputIndicates the D- input signal of the USB. */
+      uint32_t                        : 2;
+      volatile const uint32_t DOVCA0  : 1; /* [20..20] USB OVRCURA InputIndicates the OVRCURA input signal of the USB. */
+      volatile const uint32_t DOVCB0  : 1; /* [21..21] USB OVRCURB InputIndicates the OVRCURB input signal of the USB. */
+      uint32_t                        : 1;
+      volatile const uint32_t DVBSTS0 : 1; /* [23..23] USB VBUS InputIndicates the VBUS input signal of the USB. */
       uint32_t : 8;
     } DPUSR0R_FS_b;
   };
@@ -951,88 +932,26 @@ typedef struct TU_ATTR_PACKED {
     volatile uint32_t DPUSR1R_FS; /* (@ 0x00000404) Deep Software Standby USB Suspend/Resume Interrupt Register */
 
     struct {
-      volatile uint32_t DPINTE0 : 1; /* [0..0] USB DP Interrupt Enable/Clear */
-      volatile uint32_t DMINTE0 : 1; /* [1..1] USB DM Interrupt Enable/Clear */
-      uint32_t : 2;
-      volatile uint32_t DOVRCRAE0 : 1; /* [4..4] USB OVRCURA Interrupt Enable/Clear */
-      volatile uint32_t DOVRCRBE0 : 1; /* [5..5] USB OVRCURB Interrupt Enable/Clear */
-      uint32_t : 1;
-      volatile uint32_t DVBSE0 : 1; /* [7..7] USB VBUS Interrupt Enable/Clear */
-      uint32_t : 8;
-      volatile const uint32_t DPINT0 : 1; /* [16..16] USB DP Interrupt Source Recovery */
-      volatile const uint32_t DMINT0 : 1; /* [17..17] USB DM Interrupt Source Recovery */
-      uint32_t : 2;
+      volatile uint32_t DPINTE0        : 1; /* [0..0] USB DP Interrupt Enable/Clear */
+      volatile uint32_t DMINTE0        : 1; /* [1..1] USB DM Interrupt Enable/Clear */
+      uint32_t                         : 2;
+      volatile uint32_t DOVRCRAE0      : 1; /* [4..4] USB OVRCURA Interrupt Enable/Clear */
+      volatile uint32_t DOVRCRBE0      : 1; /* [5..5] USB OVRCURB Interrupt Enable/Clear */
+      uint32_t                         : 1;
+      volatile uint32_t DVBSE0         : 1; /* [7..7] USB VBUS Interrupt Enable/Clear */
+      uint32_t                         : 8;
+      volatile const uint32_t DPINT0   : 1; /* [16..16] USB DP Interrupt Source Recovery */
+      volatile const uint32_t DMINT0   : 1; /* [17..17] USB DM Interrupt Source Recovery */
+      uint32_t                         : 2;
       volatile const uint32_t DOVRCRA0 : 1; /* [20..20] USB OVRCURA Interrupt Source Recovery */
       volatile const uint32_t DOVRCRB0 : 1; /* [21..21] USB OVRCURB Interrupt Source Recovery */
-      uint32_t : 1;
-      volatile const uint32_t DVBINT0 : 1; /* [23..23] USB VBUS Interrupt Source Recovery */
+      uint32_t                         : 1;
+      volatile const uint32_t DVBINT0  : 1; /* [23..23] USB VBUS Interrupt Source Recovery */
       uint32_t : 8;
     } DPUSR1R_FS_b;
   };
 } LINK_REG_t; /* Size = 1032 (0x408) */
 
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, SYSCFG) == 0x00000000, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, BUSWAIT) == 0x00000002, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, SYSSTS0) == 0x00000004, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PLLSTA) == 0x00000006, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DVSTCTR0) == 0x00000008, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, TESTMODE) == 0x0000000C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFO) == 0x00000014, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFO) == 0x00000018, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFO) == 0x0000001C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFOSEL) == 0x00000020, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFOCTR) == 0x00000022, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFOSEL) == 0x00000028, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFOCTR) == 0x0000002A, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFOSEL) == 0x0000002C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFOCTR) == 0x0000002E, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTENB0) == 0x00000030, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTENB1) == 0x00000032, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, BRDYENB) == 0x00000036, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, NRDYENB) == 0x00000038, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, BEMPENB) == 0x0000003A, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, SOFCFG) == 0x0000003C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PHYSET) == 0x0000003E, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTSTS0) == 0x00000040, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTSTS1) == 0x00000042, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, BRDYSTS) == 0x00000046, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, NRDYSTS) == 0x00000048, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, BEMPSTS) == 0x0000004A, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, FRMNUM) == 0x0000004C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, UFRMNUM) == 0x0000004E, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBADDR) == 0x00000050, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBREQ) == 0x00000054, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBVAL) == 0x00000056, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBINDX) == 0x00000058, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBLENG) == 0x0000005A, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPCFG) == 0x0000005C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPMAXP) == 0x0000005E, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPCTR) == 0x00000060, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPESEL) == 0x00000064, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPECFG) == 0x00000068, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPEMAXP) == 0x0000006C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPEPERI) == 0x0000006E, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPE_CTR) == 0x00000070, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPE_TR) == 0x00000090, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBBCCTRL0) == 0x000000B0, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, UCKSEL) == 0x000000C4, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBMC) == 0x000000CC, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DEVADD) == 0x000000D0, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PHYSLEW) == 0x000000F0, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, LPCTRL) == 0x00000100, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, LPSTS) == 0x00000102, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, BCCTRL) == 0x00000140, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PL1CTRL1) == 0x00000144, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PL1CTRL2) == 0x00000146, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, HL1CTRL1) == 0x00000148, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, HL1CTRL2) == 0x0000014A, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR0R) == 0x00000160, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR1R) == 0x00000164, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR2R) == 0x00000168, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSRCR) == 0x0000016A, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR0R_FS) == 0x00000400, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR1R_FS) == 0x00000404, "incorrect offset");
-
 TU_ATTR_PACKED_END /* End of definition of packed structs (used by the CCRX toolchain) */
 TU_ATTR_BIT_FIELD_ORDER_END
 
@@ -1040,582 +959,708 @@ TU_ATTR_BIT_FIELD_ORDER_END
 /* Register Bit Definitions                                           */
 /*--------------------------------------------------------------------*/
 
-/* PIPE_TR */
-/* E */
-#define LINK_REG_PIPE_TR_E_TRENB_Pos (9UL)     /* TRENB (Bit 9) */
-#define LINK_REG_PIPE_TR_E_TRENB_Msk (0x200UL) /* TRENB (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_TR_E_TRCLR_Pos (8UL)     /* TRCLR (Bit 8) */
-#define LINK_REG_PIPE_TR_E_TRCLR_Msk (0x100UL) /* TRCLR (Bitfield-Mask: 0x01) */
-/* N */
-#define LINK_REG_PIPE_TR_N_TRNCNT_Pos (0UL)	 /* TRNCNT (Bit 0) */
-#define LINK_REG_PIPE_TR_N_TRNCNT_Msk (0xffffUL) /* TRNCNT (Bitfield-Mask: 0xffff) */
+// PIPE_TR
+// E
+#define LINK_REG_PIPE_TR_E_TRENB_Pos       (9UL)        /* TRENB (Bit 9) */
+#define LINK_REG_PIPE_TR_E_TRENB_Msk       (0x200UL)    /* TRENB (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_TR_E_TRCLR_Pos       (8UL)        /* TRCLR (Bit 8) */
+#define LINK_REG_PIPE_TR_E_TRCLR_Msk       (0x100UL)    /* TRCLR (Bitfield-Mask: 0x01) */
 
-/* LINK_REG */
-/* SYSCFG */
-#define LINK_REG_SYSCFG_SCKE_Pos  (10UL)    /* SCKE (Bit 10) */
-#define LINK_REG_SYSCFG_SCKE_Msk  (0x400UL) /* SCKE (Bitfield-Mask: 0x01) */
-#define LINK_REG_SYSCFG_CNEN_Pos  (8UL)	    /* CNEN (Bit 8) */
-#define LINK_REG_SYSCFG_CNEN_Msk  (0x100UL) /* CNEN (Bitfield-Mask: 0x01) */
-#define LINK_REG_SYSCFG_DCFM_Pos  (6UL)	    /* DCFM (Bit 6) */
-#define LINK_REG_SYSCFG_DCFM_Msk  (0x40UL)  /* DCFM (Bitfield-Mask: 0x01) */
-#define LINK_REG_SYSCFG_DRPD_Pos  (5UL)	    /* DRPD (Bit 5) */
-#define LINK_REG_SYSCFG_DRPD_Msk  (0x20UL)  /* DRPD (Bitfield-Mask: 0x01) */
-#define LINK_REG_SYSCFG_DPRPU_Pos (4UL)	    /* DPRPU (Bit 4) */
-#define LINK_REG_SYSCFG_DPRPU_Msk (0x10UL)  /* DPRPU (Bitfield-Mask: 0x01) */
-#define LINK_REG_SYSCFG_DMRPU_Pos (3UL)	    /* DMRPU (Bit 3) */
-#define LINK_REG_SYSCFG_DMRPU_Msk (0x8UL)   /* DMRPU (Bitfield-Mask: 0x01) */
-#define LINK_REG_SYSCFG_USBE_Pos  (0UL)	    /* USBE (Bit 0) */
-#define LINK_REG_SYSCFG_USBE_Msk  (0x1UL)   /* USBE (Bitfield-Mask: 0x01) */
-/* BUSWAIT */
-#define LINK_REG_BUSWAIT_BWAIT_Pos (0UL)   /* BWAIT (Bit 0) */
-#define LINK_REG_BUSWAIT_BWAIT_Msk (0xfUL) /* BWAIT (Bitfield-Mask: 0x0f) */
-/* SYSSTS0 */
-#define LINK_REG_SYSSTS0_OVCMON_Pos (14UL)     /* OVCMON (Bit 14) */
-#define LINK_REG_SYSSTS0_OVCMON_Msk (0xc000UL) /* OVCMON (Bitfield-Mask: 0x03) */
-#define LINK_REG_SYSSTS0_HTACT_Pos  (6UL)      /* HTACT (Bit 6) */
-#define LINK_REG_SYSSTS0_HTACT_Msk  (0x40UL)   /* HTACT (Bitfield-Mask: 0x01) */
-#define LINK_REG_SYSSTS0_SOFEA_Pos  (5UL)      /* SOFEA (Bit 5) */
-#define LINK_REG_SYSSTS0_SOFEA_Msk  (0x20UL)   /* SOFEA (Bitfield-Mask: 0x01) */
-#define LINK_REG_SYSSTS0_IDMON_Pos  (2UL)      /* IDMON (Bit 2) */
-#define LINK_REG_SYSSTS0_IDMON_Msk  (0x4UL)    /* IDMON (Bitfield-Mask: 0x01) */
-#define LINK_REG_SYSSTS0_LNST_Pos   (0UL)      /* LNST (Bit 0) */
-#define LINK_REG_SYSSTS0_LNST_Msk   (0x3UL)    /* LNST (Bitfield-Mask: 0x03) */
-/* PLLSTA */
-#define LINK_REG_PLLSTA_PLLLOCK_Pos (0UL)   /* PLLLOCK (Bit 0) */
-#define LINK_REG_PLLSTA_PLLLOCK_Msk (0x1UL) /* PLLLOCK (Bitfield-Mask: 0x01) */
-/* DVSTCTR0 */
-#define LINK_REG_DVSTCTR0_HNPBTOA_Pos (11UL)	/* HNPBTOA (Bit 11) */
-#define LINK_REG_DVSTCTR0_HNPBTOA_Msk (0x800UL) /* HNPBTOA (Bitfield-Mask: 0x01) */
-#define LINK_REG_DVSTCTR0_EXICEN_Pos  (10UL)	/* EXICEN (Bit 10) */
-#define LINK_REG_DVSTCTR0_EXICEN_Msk  (0x400UL) /* EXICEN (Bitfield-Mask: 0x01) */
-#define LINK_REG_DVSTCTR0_VBUSEN_Pos  (9UL)	/* VBUSEN (Bit 9) */
-#define LINK_REG_DVSTCTR0_VBUSEN_Msk  (0x200UL) /* VBUSEN (Bitfield-Mask: 0x01) */
-#define LINK_REG_DVSTCTR0_WKUP_Pos    (8UL)	/* WKUP (Bit 8) */
-#define LINK_REG_DVSTCTR0_WKUP_Msk    (0x100UL) /* WKUP (Bitfield-Mask: 0x01) */
-#define LINK_REG_DVSTCTR0_RWUPE_Pos   (7UL)	/* RWUPE (Bit 7) */
-#define LINK_REG_DVSTCTR0_RWUPE_Msk   (0x80UL)	/* RWUPE (Bitfield-Mask: 0x01) */
-#define LINK_REG_DVSTCTR0_USBRST_Pos  (6UL)	/* USBRST (Bit 6) */
-#define LINK_REG_DVSTCTR0_USBRST_Msk  (0x40UL)	/* USBRST (Bitfield-Mask: 0x01) */
-#define LINK_REG_DVSTCTR0_RESUME_Pos  (5UL)	/* RESUME (Bit 5) */
-#define LINK_REG_DVSTCTR0_RESUME_Msk  (0x20UL)	/* RESUME (Bitfield-Mask: 0x01) */
-#define LINK_REG_DVSTCTR0_UACT_Pos    (4UL)	/* UACT (Bit 4) */
-#define LINK_REG_DVSTCTR0_UACT_Msk    (0x10UL)	/* UACT (Bitfield-Mask: 0x01) */
-#define LINK_REG_DVSTCTR0_RHST_Pos    (0UL)	/* RHST (Bit 0) */
-#define LINK_REG_DVSTCTR0_RHST_Msk    (0x7UL)	/* RHST (Bitfield-Mask: 0x07) */
-/* TESTMODE */
-#define LINK_REG_TESTMODE_UTST_Pos (0UL)   /* UTST (Bit 0) */
-#define LINK_REG_TESTMODE_UTST_Msk (0xfUL) /* UTST (Bitfield-Mask: 0x0f) */
-/* CFIFOSEL */
-#define LINK_REG_CFIFOSEL_RCNT_Pos    (15UL)	 /* RCNT (Bit 15) */
-#define LINK_REG_CFIFOSEL_RCNT_Msk    (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */
-#define LINK_REG_CFIFOSEL_REW_Pos     (14UL)	 /* REW (Bit 14) */
-#define LINK_REG_CFIFOSEL_REW_Msk     (0x4000UL) /* REW (Bitfield-Mask: 0x01) */
-#define LINK_REG_CFIFOSEL_MBW_Pos     (10UL)	 /* MBW (Bit 10) */
-#define LINK_REG_CFIFOSEL_MBW_Msk     (0xc00UL)	 /* MBW (Bitfield-Mask: 0x03) */
-#define LINK_REG_CFIFOSEL_BIGEND_Pos  (8UL)	 /* BIGEND (Bit 8) */
-#define LINK_REG_CFIFOSEL_BIGEND_Msk  (0x100UL)	 /* BIGEND (Bitfield-Mask: 0x01) */
-#define LINK_REG_CFIFOSEL_ISEL_Pos    (5UL)	 /* ISEL (Bit 5) */
-#define LINK_REG_CFIFOSEL_ISEL_Msk    (0x20UL)	 /* ISEL (Bitfield-Mask: 0x01) */
-#define LINK_REG_CFIFOSEL_CURPIPE_Pos (0UL)	 /* CURPIPE (Bit 0) */
-#define LINK_REG_CFIFOSEL_CURPIPE_Msk (0xfUL)	 /* CURPIPE (Bitfield-Mask: 0x0f) */
-/* CFIFOCTR */
-#define LINK_REG_CFIFOCTR_BVAL_Pos (15UL)     /* BVAL (Bit 15) */
-#define LINK_REG_CFIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */
-#define LINK_REG_CFIFOCTR_BCLR_Pos (14UL)     /* BCLR (Bit 14) */
-#define LINK_REG_CFIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */
-#define LINK_REG_CFIFOCTR_FRDY_Pos (13UL)     /* FRDY (Bit 13) */
-#define LINK_REG_CFIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */
-#define LINK_REG_CFIFOCTR_DTLN_Pos (0UL)      /* DTLN (Bit 0) */
-#define LINK_REG_CFIFOCTR_DTLN_Msk (0xfffUL)  /* DTLN (Bitfield-Mask: 0xfff) */
-/* D0FIFOSEL */
-#define LINK_REG_D0FIFOSEL_RCNT_Pos    (15UL)	  /* RCNT (Bit 15) */
-#define LINK_REG_D0FIFOSEL_RCNT_Msk    (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */
-#define LINK_REG_D0FIFOSEL_REW_Pos     (14UL)	  /* REW (Bit 14) */
-#define LINK_REG_D0FIFOSEL_REW_Msk     (0x4000UL) /* REW (Bitfield-Mask: 0x01) */
-#define LINK_REG_D0FIFOSEL_DCLRM_Pos   (13UL)	  /* DCLRM (Bit 13) */
-#define LINK_REG_D0FIFOSEL_DCLRM_Msk   (0x2000UL) /* DCLRM (Bitfield-Mask: 0x01) */
-#define LINK_REG_D0FIFOSEL_DREQE_Pos   (12UL)	  /* DREQE (Bit 12) */
-#define LINK_REG_D0FIFOSEL_DREQE_Msk   (0x1000UL) /* DREQE (Bitfield-Mask: 0x01) */
-#define LINK_REG_D0FIFOSEL_MBW_Pos     (10UL)	  /* MBW (Bit 10) */
-#define LINK_REG_D0FIFOSEL_MBW_Msk     (0xc00UL)  /* MBW (Bitfield-Mask: 0x03) */
-#define LINK_REG_D0FIFOSEL_BIGEND_Pos  (8UL)	  /* BIGEND (Bit 8) */
-#define LINK_REG_D0FIFOSEL_BIGEND_Msk  (0x100UL)  /* BIGEND (Bitfield-Mask: 0x01) */
-#define LINK_REG_D0FIFOSEL_CURPIPE_Pos (0UL)	  /* CURPIPE (Bit 0) */
-#define LINK_REG_D0FIFOSEL_CURPIPE_Msk (0xfUL)	  /* CURPIPE (Bitfield-Mask: 0x0f) */
-/* D0FIFOCTR */
-#define LINK_REG_D0FIFOCTR_BVAL_Pos (15UL)     /* BVAL (Bit 15) */
-#define LINK_REG_D0FIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */
-#define LINK_REG_D0FIFOCTR_BCLR_Pos (14UL)     /* BCLR (Bit 14) */
-#define LINK_REG_D0FIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */
-#define LINK_REG_D0FIFOCTR_FRDY_Pos (13UL)     /* FRDY (Bit 13) */
-#define LINK_REG_D0FIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */
-#define LINK_REG_D0FIFOCTR_DTLN_Pos (0UL)      /* DTLN (Bit 0) */
-#define LINK_REG_D0FIFOCTR_DTLN_Msk (0xfffUL)  /* DTLN (Bitfield-Mask: 0xfff) */
-/* D1FIFOSEL */
-#define LINK_REG_D1FIFOSEL_RCNT_Pos    (15UL)	  /* RCNT (Bit 15) */
-#define LINK_REG_D1FIFOSEL_RCNT_Msk    (0x8000UL) /* RCNT (Bitfield-Mask: 0x01) */
-#define LINK_REG_D1FIFOSEL_REW_Pos     (14UL)	  /* REW (Bit 14) */
-#define LINK_REG_D1FIFOSEL_REW_Msk     (0x4000UL) /* REW (Bitfield-Mask: 0x01) */
-#define LINK_REG_D1FIFOSEL_DCLRM_Pos   (13UL)	  /* DCLRM (Bit 13) */
-#define LINK_REG_D1FIFOSEL_DCLRM_Msk   (0x2000UL) /* DCLRM (Bitfield-Mask: 0x01) */
-#define LINK_REG_D1FIFOSEL_DREQE_Pos   (12UL)	  /* DREQE (Bit 12) */
-#define LINK_REG_D1FIFOSEL_DREQE_Msk   (0x1000UL) /* DREQE (Bitfield-Mask: 0x01) */
-#define LINK_REG_D1FIFOSEL_MBW_Pos     (10UL)	  /* MBW (Bit 10) */
-#define LINK_REG_D1FIFOSEL_MBW_Msk     (0xc00UL)  /* MBW (Bitfield-Mask: 0x03) */
-#define LINK_REG_D1FIFOSEL_BIGEND_Pos  (8UL)	  /* BIGEND (Bit 8) */
-#define LINK_REG_D1FIFOSEL_BIGEND_Msk  (0x100UL)  /* BIGEND (Bitfield-Mask: 0x01) */
-#define LINK_REG_D1FIFOSEL_CURPIPE_Pos (0UL)	  /* CURPIPE (Bit 0) */
-#define LINK_REG_D1FIFOSEL_CURPIPE_Msk (0xfUL)	  /* CURPIPE (Bitfield-Mask: 0x0f) */
-/* D1FIFOCTR */
-#define LINK_REG_D1FIFOCTR_BVAL_Pos (15UL)     /* BVAL (Bit 15) */
-#define LINK_REG_D1FIFOCTR_BVAL_Msk (0x8000UL) /* BVAL (Bitfield-Mask: 0x01) */
-#define LINK_REG_D1FIFOCTR_BCLR_Pos (14UL)     /* BCLR (Bit 14) */
-#define LINK_REG_D1FIFOCTR_BCLR_Msk (0x4000UL) /* BCLR (Bitfield-Mask: 0x01) */
-#define LINK_REG_D1FIFOCTR_FRDY_Pos (13UL)     /* FRDY (Bit 13) */
-#define LINK_REG_D1FIFOCTR_FRDY_Msk (0x2000UL) /* FRDY (Bitfield-Mask: 0x01) */
-#define LINK_REG_D1FIFOCTR_DTLN_Pos (0UL)      /* DTLN (Bit 0) */
-#define LINK_REG_D1FIFOCTR_DTLN_Msk (0xfffUL)  /* DTLN (Bitfield-Mask: 0xfff) */
-/* INTENB0 */
-#define LINK_REG_INTENB0_VBSE_Pos  (15UL)     /* VBSE (Bit 15) */
-#define LINK_REG_INTENB0_VBSE_Msk  (0x8000UL) /* VBSE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB0_RSME_Pos  (14UL)     /* RSME (Bit 14) */
-#define LINK_REG_INTENB0_RSME_Msk  (0x4000UL) /* RSME (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB0_SOFE_Pos  (13UL)     /* SOFE (Bit 13) */
-#define LINK_REG_INTENB0_SOFE_Msk  (0x2000UL) /* SOFE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB0_DVSE_Pos  (12UL)     /* DVSE (Bit 12) */
-#define LINK_REG_INTENB0_DVSE_Msk  (0x1000UL) /* DVSE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB0_CTRE_Pos  (11UL)     /* CTRE (Bit 11) */
-#define LINK_REG_INTENB0_CTRE_Msk  (0x800UL)  /* CTRE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB0_BEMPE_Pos (10UL)     /* BEMPE (Bit 10) */
-#define LINK_REG_INTENB0_BEMPE_Msk (0x400UL)  /* BEMPE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB0_NRDYE_Pos (9UL)      /* NRDYE (Bit 9) */
-#define LINK_REG_INTENB0_NRDYE_Msk (0x200UL)  /* NRDYE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB0_BRDYE_Pos (8UL)      /* BRDYE (Bit 8) */
-#define LINK_REG_INTENB0_BRDYE_Msk (0x100UL)  /* BRDYE (Bitfield-Mask: 0x01) */
-/* INTENB1 */
-#define LINK_REG_INTENB1_OVRCRE_Pos	(15UL)	   /* OVRCRE (Bit 15) */
-#define LINK_REG_INTENB1_OVRCRE_Msk	(0x8000UL) /* OVRCRE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB1_BCHGE_Pos	(14UL)	   /* BCHGE (Bit 14) */
-#define LINK_REG_INTENB1_BCHGE_Msk	(0x4000UL) /* BCHGE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB1_DTCHE_Pos	(12UL)	   /* DTCHE (Bit 12) */
-#define LINK_REG_INTENB1_DTCHE_Msk	(0x1000UL) /* DTCHE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB1_ATTCHE_Pos	(11UL)	   /* ATTCHE (Bit 11) */
-#define LINK_REG_INTENB1_ATTCHE_Msk	(0x800UL)  /* ATTCHE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB1_EOFERRE_Pos	(6UL)	   /* EOFERRE (Bit 6) */
-#define LINK_REG_INTENB1_EOFERRE_Msk	(0x40UL)   /* EOFERRE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB1_SIGNE_Pos	(5UL)	   /* SIGNE (Bit 5) */
-#define LINK_REG_INTENB1_SIGNE_Msk	(0x20UL)   /* SIGNE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB1_SACKE_Pos	(4UL)	   /* SACKE (Bit 4) */
-#define LINK_REG_INTENB1_SACKE_Msk	(0x10UL)   /* SACKE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB1_PDDETINTE0_Pos (0UL)	   /* PDDETINTE0 (Bit 0) */
-#define LINK_REG_INTENB1_PDDETINTE0_Msk (0x1UL)	   /* PDDETINTE0 (Bitfield-Mask: 0x01) */
-/* BRDYENB */
-#define LINK_REG_BRDYENB_PIPEBRDYE_Pos (0UL)   /* PIPEBRDYE (Bit 0) */
-#define LINK_REG_BRDYENB_PIPEBRDYE_Msk (0x1UL) /* PIPEBRDYE (Bitfield-Mask: 0x01) */
-/* NRDYENB */
-#define LINK_REG_NRDYENB_PIPENRDYE_Pos (0UL)   /* PIPENRDYE (Bit 0) */
-#define LINK_REG_NRDYENB_PIPENRDYE_Msk (0x1UL) /* PIPENRDYE (Bitfield-Mask: 0x01) */
-/* BEMPENB */
-#define LINK_REG_BEMPENB_PIPEBEMPE_Pos (0UL)   /* PIPEBEMPE (Bit 0) */
-#define LINK_REG_BEMPENB_PIPEBEMPE_Msk (0x1UL) /* PIPEBEMPE (Bitfield-Mask: 0x01) */
-/* SOFCFG */
-#define LINK_REG_SOFCFG_TRNENSEL_Pos (8UL)     /* TRNENSEL (Bit 8) */
-#define LINK_REG_SOFCFG_TRNENSEL_Msk (0x100UL) /* TRNENSEL (Bitfield-Mask: 0x01) */
-#define LINK_REG_SOFCFG_BRDYM_Pos    (6UL)     /* BRDYM (Bit 6) */
-#define LINK_REG_SOFCFG_BRDYM_Msk    (0x40UL)  /* BRDYM (Bitfield-Mask: 0x01) */
-#define LINK_REG_SOFCFG_INTL_Pos     (5UL)     /* INTL (Bit 5) */
-#define LINK_REG_SOFCFG_INTL_Msk     (0x20UL)  /* INTL (Bitfield-Mask: 0x01) */
-#define LINK_REG_SOFCFG_EDGESTS_Pos  (4UL)     /* EDGESTS (Bit 4) */
-#define LINK_REG_SOFCFG_EDGESTS_Msk  (0x10UL)  /* EDGESTS (Bitfield-Mask: 0x01) */
-/* PHYSET */
-#define LINK_REG_PHYSET_HSEB_Pos     (15UL)	/* HSEB (Bit 15) */
-#define LINK_REG_PHYSET_HSEB_Msk     (0x8000UL) /* HSEB (Bitfield-Mask: 0x01) */
-#define LINK_REG_PHYSET_REPSTART_Pos (11UL)	/* REPSTART (Bit 11) */
-#define LINK_REG_PHYSET_REPSTART_Msk (0x800UL)	/* REPSTART (Bitfield-Mask: 0x01) */
-#define LINK_REG_PHYSET_REPSEL_Pos   (8UL)	/* REPSEL (Bit 8) */
-#define LINK_REG_PHYSET_REPSEL_Msk   (0x300UL)	/* REPSEL (Bitfield-Mask: 0x03) */
-#define LINK_REG_PHYSET_CLKSEL_Pos   (4UL)	/* CLKSEL (Bit 4) */
-#define LINK_REG_PHYSET_CLKSEL_Msk   (0x30UL)	/* CLKSEL (Bitfield-Mask: 0x03) */
-#define LINK_REG_PHYSET_CDPEN_Pos    (3UL)	/* CDPEN (Bit 3) */
-#define LINK_REG_PHYSET_CDPEN_Msk    (0x8UL)	/* CDPEN (Bitfield-Mask: 0x01) */
-#define LINK_REG_PHYSET_PLLRESET_Pos (1UL)	/* PLLRESET (Bit 1) */
-#define LINK_REG_PHYSET_PLLRESET_Msk (0x2UL)	/* PLLRESET (Bitfield-Mask: 0x01) */
-#define LINK_REG_PHYSET_DIRPD_Pos    (0UL)	/* DIRPD (Bit 0) */
-#define LINK_REG_PHYSET_DIRPD_Msk    (0x1UL)	/* DIRPD (Bitfield-Mask: 0x01) */
-/* INTSTS0 */
-#define LINK_REG_INTSTS0_VBINT_Pos (15UL)     /* VBINT (Bit 15) */
-#define LINK_REG_INTSTS0_VBINT_Msk (0x8000UL) /* VBINT (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS0_RESM_Pos  (14UL)     /* RESM (Bit 14) */
-#define LINK_REG_INTSTS0_RESM_Msk  (0x4000UL) /* RESM (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS0_SOFR_Pos  (13UL)     /* SOFR (Bit 13) */
-#define LINK_REG_INTSTS0_SOFR_Msk  (0x2000UL) /* SOFR (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS0_DVST_Pos  (12UL)     /* DVST (Bit 12) */
-#define LINK_REG_INTSTS0_DVST_Msk  (0x1000UL) /* DVST (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS0_CTRT_Pos  (11UL)     /* CTRT (Bit 11) */
-#define LINK_REG_INTSTS0_CTRT_Msk  (0x800UL)  /* CTRT (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS0_BEMP_Pos  (10UL)     /* BEMP (Bit 10) */
-#define LINK_REG_INTSTS0_BEMP_Msk  (0x400UL)  /* BEMP (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS0_NRDY_Pos  (9UL)      /* NRDY (Bit 9) */
-#define LINK_REG_INTSTS0_NRDY_Msk  (0x200UL)  /* NRDY (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS0_BRDY_Pos  (8UL)      /* BRDY (Bit 8) */
-#define LINK_REG_INTSTS0_BRDY_Msk  (0x100UL)  /* BRDY (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS0_VBSTS_Pos (7UL)      /* VBSTS (Bit 7) */
-#define LINK_REG_INTSTS0_VBSTS_Msk (0x80UL)   /* VBSTS (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS0_DVSQ_Pos  (4UL)      /* DVSQ (Bit 4) */
-#define LINK_REG_INTSTS0_DVSQ_Msk  (0x70UL)   /* DVSQ (Bitfield-Mask: 0x07) */
-#define LINK_REG_INTSTS0_VALID_Pos (3UL)      /* VALID (Bit 3) */
-#define LINK_REG_INTSTS0_VALID_Msk (0x8UL)    /* VALID (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS0_CTSQ_Pos  (0UL)      /* CTSQ (Bit 0) */
-#define LINK_REG_INTSTS0_CTSQ_Msk  (0x7UL)    /* CTSQ (Bitfield-Mask: 0x07) */
-/* INTSTS1 */
-#define LINK_REG_INTSTS1_OVRCR_Pos     (15UL)	  /* OVRCR (Bit 15) */
-#define LINK_REG_INTSTS1_OVRCR_Msk     (0x8000UL) /* OVRCR (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS1_BCHG_Pos      (14UL)	  /* BCHG (Bit 14) */
-#define LINK_REG_INTSTS1_BCHG_Msk      (0x4000UL) /* BCHG (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS1_DTCH_Pos      (12UL)	  /* DTCH (Bit 12) */
-#define LINK_REG_INTSTS1_DTCH_Msk      (0x1000UL) /* DTCH (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS1_ATTCH_Pos     (11UL)	  /* ATTCH (Bit 11) */
-#define LINK_REG_INTSTS1_ATTCH_Msk     (0x800UL)  /* ATTCH (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS1_L1RSMEND_Pos  (9UL)	  /* L1RSMEND (Bit 9) */
-#define LINK_REG_INTSTS1_L1RSMEND_Msk  (0x200UL)  /* L1RSMEND (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS1_LPMEND_Pos    (8UL)	  /* LPMEND (Bit 8) */
-#define LINK_REG_INTSTS1_LPMEND_Msk    (0x100UL)  /* LPMEND (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS1_EOFERR_Pos    (6UL)	  /* EOFERR (Bit 6) */
-#define LINK_REG_INTSTS1_EOFERR_Msk    (0x40UL)	  /* EOFERR (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS1_SIGN_Pos      (5UL)	  /* SIGN (Bit 5) */
-#define LINK_REG_INTSTS1_SIGN_Msk      (0x20UL)	  /* SIGN (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS1_SACK_Pos      (4UL)	  /* SACK (Bit 4) */
-#define LINK_REG_INTSTS1_SACK_Msk      (0x10UL)	  /* SACK (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS1_PDDETINT0_Pos (0UL)	  /* PDDETINT0 (Bit 0) */
-#define LINK_REG_INTSTS1_PDDETINT0_Msk (0x1UL)	  /* PDDETINT0 (Bitfield-Mask: 0x01) */
-/* BRDYSTS */
-#define LINK_REG_BRDYSTS_PIPEBRDY_Pos (0UL)   /* PIPEBRDY (Bit 0) */
-#define LINK_REG_BRDYSTS_PIPEBRDY_Msk (0x1UL) /* PIPEBRDY (Bitfield-Mask: 0x01) */
-/* NRDYSTS */
-#define LINK_REG_NRDYSTS_PIPENRDY_Pos (0UL)   /* PIPENRDY (Bit 0) */
-#define LINK_REG_NRDYSTS_PIPENRDY_Msk (0x1UL) /* PIPENRDY (Bitfield-Mask: 0x01) */
-/* BEMPSTS */
-#define LINK_REG_BEMPSTS_PIPEBEMP_Pos (0UL)   /* PIPEBEMP (Bit 0) */
-#define LINK_REG_BEMPSTS_PIPEBEMP_Msk (0x1UL) /* PIPEBEMP (Bitfield-Mask: 0x01) */
-/* FRMNUM */
-#define LINK_REG_FRMNUM_OVRN_Pos (15UL)	    /* OVRN (Bit 15) */
-#define LINK_REG_FRMNUM_OVRN_Msk (0x8000UL) /* OVRN (Bitfield-Mask: 0x01) */
-#define LINK_REG_FRMNUM_CRCE_Pos (14UL)	    /* CRCE (Bit 14) */
-#define LINK_REG_FRMNUM_CRCE_Msk (0x4000UL) /* CRCE (Bitfield-Mask: 0x01) */
-#define LINK_REG_FRMNUM_FRNM_Pos (0UL)	    /* FRNM (Bit 0) */
-#define LINK_REG_FRMNUM_FRNM_Msk (0x7ffUL)  /* FRNM (Bitfield-Mask: 0x7ff) */
-/* UFRMNUM */
-#define LINK_REG_UFRMNUM_DVCHG_Pos (15UL)     /* DVCHG (Bit 15) */
-#define LINK_REG_UFRMNUM_DVCHG_Msk (0x8000UL) /* DVCHG (Bitfield-Mask: 0x01) */
-#define LINK_REG_UFRMNUM_UFRNM_Pos (0UL)      /* UFRNM (Bit 0) */
-#define LINK_REG_UFRMNUM_UFRNM_Msk (0x7UL)    /* UFRNM (Bitfield-Mask: 0x07) */
-/* USBADDR */
-#define LINK_REG_USBADDR_STSRECOV0_Pos (8UL)	 /* STSRECOV0 (Bit 8) */
-#define LINK_REG_USBADDR_STSRECOV0_Msk (0x700UL) /* STSRECOV0 (Bitfield-Mask: 0x07) */
-#define LINK_REG_USBADDR_USBADDR_Pos   (0UL)	 /* USBADDR (Bit 0) */
-#define LINK_REG_USBADDR_USBADDR_Msk   (0x7fUL)	 /* USBADDR (Bitfield-Mask: 0x7f) */
-/* USBREQ */
-#define LINK_REG_USBREQ_BREQUEST_Pos	  (8UL)	     /* BREQUEST (Bit 8) */
-#define LINK_REG_USBREQ_BREQUEST_Msk	  (0xff00UL) /* BREQUEST (Bitfield-Mask: 0xff) */
-#define LINK_REG_USBREQ_BMREQUESTTYPE_Pos (0UL)	     /* BMREQUESTTYPE (Bit 0) */
-#define LINK_REG_USBREQ_BMREQUESTTYPE_Msk (0xffUL)   /* BMREQUESTTYPE (Bitfield-Mask: 0xff) */
-/* USBVAL */
-#define LINK_REG_USBVAL_WVALUE_Pos (0UL)      /* WVALUE (Bit 0) */
-#define LINK_REG_USBVAL_WVALUE_Msk (0xffffUL) /* WVALUE (Bitfield-Mask: 0xffff) */
-/* USBINDX */
-#define LINK_REG_USBINDX_WINDEX_Pos (0UL)      /* WINDEX (Bit 0) */
-#define LINK_REG_USBINDX_WINDEX_Msk (0xffffUL) /* WINDEX (Bitfield-Mask: 0xffff) */
-/* USBLENG */
-#define LINK_REG_USBLENG_WLENGTH_Pos (0UL)	/* WLENGTH (Bit 0) */
-#define LINK_REG_USBLENG_WLENGTH_Msk (0xffffUL) /* WLENGTH (Bitfield-Mask: 0xffff) */
-/* DCPCFG */
-#define LINK_REG_DCPCFG_CNTMD_Pos  (8UL)     /* CNTMD (Bit 8) */
-#define LINK_REG_DCPCFG_CNTMD_Msk  (0x100UL) /* CNTMD (Bitfield-Mask: 0x01) */
-#define LINK_REG_DCPCFG_SHTNAK_Pos (7UL)     /* SHTNAK (Bit 7) */
-#define LINK_REG_DCPCFG_SHTNAK_Msk (0x80UL)  /* SHTNAK (Bitfield-Mask: 0x01) */
-#define LINK_REG_DCPCFG_DIR_Pos	   (4UL)     /* DIR (Bit 4) */
-#define LINK_REG_DCPCFG_DIR_Msk	   (0x10UL)  /* DIR (Bitfield-Mask: 0x01) */
-/* DCPMAXP */
-#define LINK_REG_DCPMAXP_DEVSEL_Pos (12UL)     /* DEVSEL (Bit 12) */
-#define LINK_REG_DCPMAXP_DEVSEL_Msk (0xf000UL) /* DEVSEL (Bitfield-Mask: 0x0f) */
-#define LINK_REG_DCPMAXP_MXPS_Pos   (0UL)      /* MXPS (Bit 0) */
-#define LINK_REG_DCPMAXP_MXPS_Msk   (0x7fUL)   /* MXPS (Bitfield-Mask: 0x7f) */
-/* DCPCTR */
-#define LINK_REG_DCPCTR_BSTS_Pos     (15UL)	/* BSTS (Bit 15) */
-#define LINK_REG_DCPCTR_BSTS_Msk     (0x8000UL) /* BSTS (Bitfield-Mask: 0x01) */
-#define LINK_REG_DCPCTR_SUREQ_Pos    (14UL)	/* SUREQ (Bit 14) */
-#define LINK_REG_DCPCTR_SUREQ_Msk    (0x4000UL) /* SUREQ (Bitfield-Mask: 0x01) */
-#define LINK_REG_DCPCTR_SUREQCLR_Pos (11UL)	/* SUREQCLR (Bit 11) */
-#define LINK_REG_DCPCTR_SUREQCLR_Msk (0x800UL)	/* SUREQCLR (Bitfield-Mask: 0x01) */
-#define LINK_REG_DCPCTR_SQCLR_Pos    (8UL)	/* SQCLR (Bit 8) */
-#define LINK_REG_DCPCTR_SQCLR_Msk    (0x100UL)	/* SQCLR (Bitfield-Mask: 0x01) */
-#define LINK_REG_DCPCTR_SQSET_Pos    (7UL)	/* SQSET (Bit 7) */
-#define LINK_REG_DCPCTR_SQSET_Msk    (0x80UL)	/* SQSET (Bitfield-Mask: 0x01) */
-#define LINK_REG_DCPCTR_SQMON_Pos    (6UL)	/* SQMON (Bit 6) */
-#define LINK_REG_DCPCTR_SQMON_Msk    (0x40UL)	/* SQMON (Bitfield-Mask: 0x01) */
-#define LINK_REG_DCPCTR_PBUSY_Pos    (5UL)	/* PBUSY (Bit 5) */
-#define LINK_REG_DCPCTR_PBUSY_Msk    (0x20UL)	/* PBUSY (Bitfield-Mask: 0x01) */
-#define LINK_REG_DCPCTR_CCPL_Pos     (2UL)	/* CCPL (Bit 2) */
-#define LINK_REG_DCPCTR_CCPL_Msk     (0x4UL)	/* CCPL (Bitfield-Mask: 0x01) */
-#define LINK_REG_DCPCTR_PID_Pos	     (0UL)	/* PID (Bit 0) */
-#define LINK_REG_DCPCTR_PID_Msk	     (0x3UL)	/* PID (Bitfield-Mask: 0x03) */
-/* PIPESEL */
-#define LINK_REG_PIPESEL_PIPESEL_Pos (0UL)   /* PIPESEL (Bit 0) */
-#define LINK_REG_PIPESEL_PIPESEL_Msk (0xfUL) /* PIPESEL (Bitfield-Mask: 0x0f) */
-/* PIPECFG */
-#define LINK_REG_PIPECFG_TYPE_Pos   (14UL)     /* TYPE (Bit 14) */
-#define LINK_REG_PIPECFG_TYPE_Msk   (0xc000UL) /* TYPE (Bitfield-Mask: 0x03) */
-#define LINK_REG_PIPECFG_BFRE_Pos   (10UL)     /* BFRE (Bit 10) */
-#define LINK_REG_PIPECFG_BFRE_Msk   (0x400UL)  /* BFRE (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPECFG_DBLB_Pos   (9UL)      /* DBLB (Bit 9) */
-#define LINK_REG_PIPECFG_DBLB_Msk   (0x200UL)  /* DBLB (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPECFG_SHTNAK_Pos (7UL)      /* SHTNAK (Bit 7) */
-#define LINK_REG_PIPECFG_SHTNAK_Msk (0x80UL)   /* SHTNAK (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPECFG_DIR_Pos    (4UL)      /* DIR (Bit 4) */
-#define LINK_REG_PIPECFG_DIR_Msk    (0x10UL)   /* DIR (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPECFG_EPNUM_Pos  (0UL)      /* EPNUM (Bit 0) */
-#define LINK_REG_PIPECFG_EPNUM_Msk  (0xfUL)    /* EPNUM (Bitfield-Mask: 0x0f) */
-/* PIPEMAXP */
-#define LINK_REG_PIPEMAXP_DEVSEL_Pos (12UL)	/* DEVSEL (Bit 12) */
-#define LINK_REG_PIPEMAXP_DEVSEL_Msk (0xf000UL) /* DEVSEL (Bitfield-Mask: 0x0f) */
-#define LINK_REG_PIPEMAXP_MXPS_Pos   (0UL)	/* MXPS (Bit 0) */
-#define LINK_REG_PIPEMAXP_MXPS_Msk   (0x1ffUL)	/* MXPS (Bitfield-Mask: 0x1ff) */
-/* PIPEPERI */
-#define LINK_REG_PIPEPERI_IFIS_Pos (12UL)     /* IFIS (Bit 12) */
-#define LINK_REG_PIPEPERI_IFIS_Msk (0x1000UL) /* IFIS (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPEPERI_IITV_Pos (0UL)      /* IITV (Bit 0) */
-#define LINK_REG_PIPEPERI_IITV_Msk (0x7UL)    /* IITV (Bitfield-Mask: 0x07) */
-/* PIPE_CTR */
-#define LINK_REG_PIPE_CTR_BSTS_Pos   (15UL)	/* BSTS (Bit 15) */
-#define LINK_REG_PIPE_CTR_BSTS_Msk   (0x8000UL) /* BSTS (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_CTR_INBUFM_Pos (14UL)	/* INBUFM (Bit 14) */
-#define LINK_REG_PIPE_CTR_INBUFM_Msk (0x4000UL) /* INBUFM (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_CTR_CSCLR_Pos  (13UL)	/* CSCLR (Bit 13) */
-#define LINK_REG_PIPE_CTR_CSCLR_Msk  (0x2000UL) /* CSCLR (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_CTR_CSSTS_Pos  (12UL)	/* CSSTS (Bit 12) */
-#define LINK_REG_PIPE_CTR_CSSTS_Msk  (0x1000UL) /* CSSTS (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_CTR_ATREPM_Pos (10UL)	/* ATREPM (Bit 10) */
-#define LINK_REG_PIPE_CTR_ATREPM_Msk (0x400UL)	/* ATREPM (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_CTR_ACLRM_Pos  (9UL)	/* ACLRM (Bit 9) */
-#define LINK_REG_PIPE_CTR_ACLRM_Msk  (0x200UL)	/* ACLRM (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_CTR_SQCLR_Pos  (8UL)	/* SQCLR (Bit 8) */
-#define LINK_REG_PIPE_CTR_SQCLR_Msk  (0x100UL)	/* SQCLR (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_CTR_SQSET_Pos  (7UL)	/* SQSET (Bit 7) */
-#define LINK_REG_PIPE_CTR_SQSET_Msk  (0x80UL)	/* SQSET (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_CTR_SQMON_Pos  (6UL)	/* SQMON (Bit 6) */
-#define LINK_REG_PIPE_CTR_SQMON_Msk  (0x40UL)	/* SQMON (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_CTR_PBUSY_Pos  (5UL)	/* PBUSY (Bit 5) */
-#define LINK_REG_PIPE_CTR_PBUSY_Msk  (0x20UL)	/* PBUSY (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_CTR_PID_Pos    (0UL)	/* PID (Bit 0) */
-#define LINK_REG_PIPE_CTR_PID_Msk    (0x3UL)	/* PID (Bitfield-Mask: 0x03) */
-/* DEVADD */
-#define LINK_REG_DEVADD_UPPHUB_Pos  (11UL)     /* UPPHUB (Bit 11) */
-#define LINK_REG_DEVADD_UPPHUB_Msk  (0x7800UL) /* UPPHUB (Bitfield-Mask: 0x0f) */
-#define LINK_REG_DEVADD_HUBPORT_Pos (8UL)      /* HUBPORT (Bit 8) */
-#define LINK_REG_DEVADD_HUBPORT_Msk (0x700UL)  /* HUBPORT (Bitfield-Mask: 0x07) */
-#define LINK_REG_DEVADD_USBSPD_Pos  (6UL)      /* USBSPD (Bit 6) */
-#define LINK_REG_DEVADD_USBSPD_Msk  (0xc0UL)   /* USBSPD (Bitfield-Mask: 0x03) */
-/* USBBCCTRL0 */
-#define LINK_REG_USBBCCTRL0_PDDETSTS0_Pos  (9UL)     /* PDDETSTS0 (Bit 9) */
-#define LINK_REG_USBBCCTRL0_PDDETSTS0_Msk  (0x200UL) /* PDDETSTS0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_USBBCCTRL0_CHGDETSTS0_Pos (8UL)     /* CHGDETSTS0 (Bit 8) */
-#define LINK_REG_USBBCCTRL0_CHGDETSTS0_Msk (0x100UL) /* CHGDETSTS0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_USBBCCTRL0_BATCHGE0_Pos   (7UL)     /* BATCHGE0 (Bit 7) */
-#define LINK_REG_USBBCCTRL0_BATCHGE0_Msk   (0x80UL)  /* BATCHGE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_USBBCCTRL0_VDMSRCE0_Pos   (5UL)     /* VDMSRCE0 (Bit 5) */
-#define LINK_REG_USBBCCTRL0_VDMSRCE0_Msk   (0x20UL)  /* VDMSRCE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_USBBCCTRL0_IDPSINKE0_Pos  (4UL)     /* IDPSINKE0 (Bit 4) */
-#define LINK_REG_USBBCCTRL0_IDPSINKE0_Msk  (0x10UL)  /* IDPSINKE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_USBBCCTRL0_VDPSRCE0_Pos   (3UL)     /* VDPSRCE0 (Bit 3) */
-#define LINK_REG_USBBCCTRL0_VDPSRCE0_Msk   (0x8UL)   /* VDPSRCE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_USBBCCTRL0_IDMSINKE0_Pos  (2UL)     /* IDMSINKE0 (Bit 2) */
-#define LINK_REG_USBBCCTRL0_IDMSINKE0_Msk  (0x4UL)   /* IDMSINKE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_USBBCCTRL0_IDPSRCE0_Pos   (1UL)     /* IDPSRCE0 (Bit 1) */
-#define LINK_REG_USBBCCTRL0_IDPSRCE0_Msk   (0x2UL)   /* IDPSRCE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_USBBCCTRL0_RPDME0_Pos	   (0UL)     /* RPDME0 (Bit 0) */
-#define LINK_REG_USBBCCTRL0_RPDME0_Msk	   (0x1UL)   /* RPDME0 (Bitfield-Mask: 0x01) */
-/* UCKSEL */
-#define LINK_REG_UCKSEL_UCKSELC_Pos (0UL)   /* UCKSELC (Bit 0) */
-#define LINK_REG_UCKSEL_UCKSELC_Msk (0x1UL) /* UCKSELC (Bitfield-Mask: 0x01) */
-/* USBMC */
-#define LINK_REG_USBMC_VDCEN_Pos   (7UL)    /* VDCEN (Bit 7) */
-#define LINK_REG_USBMC_VDCEN_Msk   (0x80UL) /* VDCEN (Bitfield-Mask: 0x01) */
-#define LINK_REG_USBMC_VDDUSBE_Pos (0UL)    /* VDDUSBE (Bit 0) */
-#define LINK_REG_USBMC_VDDUSBE_Msk (0x1UL)  /* VDDUSBE (Bitfield-Mask: 0x01) */
-/* PHYSLEW */
-#define LINK_REG_PHYSLEW_SLEWF01_Pos (3UL)   /* SLEWF01 (Bit 3) */
-#define LINK_REG_PHYSLEW_SLEWF01_Msk (0x8UL) /* SLEWF01 (Bitfield-Mask: 0x01) */
-#define LINK_REG_PHYSLEW_SLEWF00_Pos (2UL)   /* SLEWF00 (Bit 2) */
-#define LINK_REG_PHYSLEW_SLEWF00_Msk (0x4UL) /* SLEWF00 (Bitfield-Mask: 0x01) */
-#define LINK_REG_PHYSLEW_SLEWR01_Pos (1UL)   /* SLEWR01 (Bit 1) */
-#define LINK_REG_PHYSLEW_SLEWR01_Msk (0x2UL) /* SLEWR01 (Bitfield-Mask: 0x01) */
-#define LINK_REG_PHYSLEW_SLEWR00_Pos (0UL)   /* SLEWR00 (Bit 0) */
-#define LINK_REG_PHYSLEW_SLEWR00_Msk (0x1UL) /* SLEWR00 (Bitfield-Mask: 0x01) */
-/* LPCTRL */
-#define LINK_REG_LPCTRL_HWUPM_Pos (7UL)	   /* HWUPM (Bit 7) */
-#define LINK_REG_LPCTRL_HWUPM_Msk (0x80UL) /* HWUPM (Bitfield-Mask: 0x01) */
-/* LPSTS */
-#define LINK_REG_LPSTS_SUSPENDM_Pos (14UL)     /* SUSPENDM (Bit 14) */
-#define LINK_REG_LPSTS_SUSPENDM_Msk (0x4000UL) /* SUSPENDM (Bitfield-Mask: 0x01) */
-/* BCCTRL */
-#define LINK_REG_BCCTRL_PDDETSTS_Pos  (9UL)	/* PDDETSTS (Bit 9) */
-#define LINK_REG_BCCTRL_PDDETSTS_Msk  (0x200UL) /* PDDETSTS (Bitfield-Mask: 0x01) */
-#define LINK_REG_BCCTRL_CHGDETSTS_Pos (8UL)	/* CHGDETSTS (Bit 8) */
-#define LINK_REG_BCCTRL_CHGDETSTS_Msk (0x100UL) /* CHGDETSTS (Bitfield-Mask: 0x01) */
-#define LINK_REG_BCCTRL_DCPMODE_Pos   (5UL)	/* DCPMODE (Bit 5) */
-#define LINK_REG_BCCTRL_DCPMODE_Msk   (0x20UL)	/* DCPMODE (Bitfield-Mask: 0x01) */
-#define LINK_REG_BCCTRL_VDMSRCE_Pos   (4UL)	/* VDMSRCE (Bit 4) */
-#define LINK_REG_BCCTRL_VDMSRCE_Msk   (0x10UL)	/* VDMSRCE (Bitfield-Mask: 0x01) */
-#define LINK_REG_BCCTRL_IDPSINKE_Pos  (3UL)	/* IDPSINKE (Bit 3) */
-#define LINK_REG_BCCTRL_IDPSINKE_Msk  (0x8UL)	/* IDPSINKE (Bitfield-Mask: 0x01) */
-#define LINK_REG_BCCTRL_VDPSRCE_Pos   (2UL)	/* VDPSRCE (Bit 2) */
-#define LINK_REG_BCCTRL_VDPSRCE_Msk   (0x4UL)	/* VDPSRCE (Bitfield-Mask: 0x01) */
-#define LINK_REG_BCCTRL_IDMSINKE_Pos  (1UL)	/* IDMSINKE (Bit 1) */
-#define LINK_REG_BCCTRL_IDMSINKE_Msk  (0x2UL)	/* IDMSINKE (Bitfield-Mask: 0x01) */
-#define LINK_REG_BCCTRL_IDPSRCE_Pos   (0UL)	/* IDPSRCE (Bit 0) */
-#define LINK_REG_BCCTRL_IDPSRCE_Msk   (0x1UL)	/* IDPSRCE (Bitfield-Mask: 0x01) */
-/* PL1CTRL1 */
-#define LINK_REG_PL1CTRL1_L1EXTMD_Pos  (14UL)	  /* L1EXTMD (Bit 14) */
-#define LINK_REG_PL1CTRL1_L1EXTMD_Msk  (0x4000UL) /* L1EXTMD (Bitfield-Mask: 0x01) */
-#define LINK_REG_PL1CTRL1_HIRDTHR_Pos  (8UL)	  /* HIRDTHR (Bit 8) */
-#define LINK_REG_PL1CTRL1_HIRDTHR_Msk  (0xf00UL)  /* HIRDTHR (Bitfield-Mask: 0x0f) */
-#define LINK_REG_PL1CTRL1_DVSQ_Pos     (4UL)	  /* DVSQ (Bit 4) */
-#define LINK_REG_PL1CTRL1_DVSQ_Msk     (0xf0UL)	  /* DVSQ (Bitfield-Mask: 0x0f) */
-#define LINK_REG_PL1CTRL1_L1NEGOMD_Pos (3UL)	  /* L1NEGOMD (Bit 3) */
-#define LINK_REG_PL1CTRL1_L1NEGOMD_Msk (0x8UL)	  /* L1NEGOMD (Bitfield-Mask: 0x01) */
-#define LINK_REG_PL1CTRL1_L1RESPMD_Pos (1UL)	  /* L1RESPMD (Bit 1) */
-#define LINK_REG_PL1CTRL1_L1RESPMD_Msk (0x6UL)	  /* L1RESPMD (Bitfield-Mask: 0x03) */
-#define LINK_REG_PL1CTRL1_L1RESPEN_Pos (0UL)	  /* L1RESPEN (Bit 0) */
-#define LINK_REG_PL1CTRL1_L1RESPEN_Msk (0x1UL)	  /* L1RESPEN (Bitfield-Mask: 0x01) */
-/* PL1CTRL2 */
-#define LINK_REG_PL1CTRL2_RWEMON_Pos  (12UL)	 /* RWEMON (Bit 12) */
-#define LINK_REG_PL1CTRL2_RWEMON_Msk  (0x1000UL) /* RWEMON (Bitfield-Mask: 0x01) */
-#define LINK_REG_PL1CTRL2_HIRDMON_Pos (8UL)	 /* HIRDMON (Bit 8) */
-#define LINK_REG_PL1CTRL2_HIRDMON_Msk (0xf00UL)	 /* HIRDMON (Bitfield-Mask: 0x0f) */
-/* HL1CTRL1 */
-#define LINK_REG_HL1CTRL1_L1STATUS_Pos (1UL)   /* L1STATUS (Bit 1) */
-#define LINK_REG_HL1CTRL1_L1STATUS_Msk (0x6UL) /* L1STATUS (Bitfield-Mask: 0x03) */
-#define LINK_REG_HL1CTRL1_L1REQ_Pos    (0UL)   /* L1REQ (Bit 0) */
-#define LINK_REG_HL1CTRL1_L1REQ_Msk    (0x1UL) /* L1REQ (Bitfield-Mask: 0x01) */
-/* HL1CTRL2 */
-#define LINK_REG_HL1CTRL2_BESL_Pos   (15UL)	/* BESL (Bit 15) */
-#define LINK_REG_HL1CTRL2_BESL_Msk   (0x8000UL) /* BESL (Bitfield-Mask: 0x01) */
-#define LINK_REG_HL1CTRL2_L1RWE_Pos  (12UL)	/* L1RWE (Bit 12) */
-#define LINK_REG_HL1CTRL2_L1RWE_Msk  (0x1000UL) /* L1RWE (Bitfield-Mask: 0x01) */
-#define LINK_REG_HL1CTRL2_HIRD_Pos   (8UL)	/* HIRD (Bit 8) */
-#define LINK_REG_HL1CTRL2_HIRD_Msk   (0xf00UL)	/* HIRD (Bitfield-Mask: 0x0f) */
-#define LINK_REG_HL1CTRL2_L1ADDR_Pos (0UL)	/* L1ADDR (Bit 0) */
-#define LINK_REG_HL1CTRL2_L1ADDR_Msk (0xfUL)	/* L1ADDR (Bitfield-Mask: 0x0f) */
-/* DPUSR0R */
-#define LINK_REG_DPUSR0R_DVBSTSHM_Pos (23UL)	   /* DVBSTSHM (Bit 23) */
-#define LINK_REG_DPUSR0R_DVBSTSHM_Msk (0x800000UL) /* DVBSTSHM (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR0R_DOVCBHM_Pos  (21UL)	   /* DOVCBHM (Bit 21) */
-#define LINK_REG_DPUSR0R_DOVCBHM_Msk  (0x200000UL) /* DOVCBHM (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR0R_DOVCAHM_Pos  (20UL)	   /* DOVCAHM (Bit 20) */
-#define LINK_REG_DPUSR0R_DOVCAHM_Msk  (0x100000UL) /* DOVCAHM (Bitfield-Mask: 0x01) */
-/* DPUSR1R */
-#define LINK_REG_DPUSR1R_DVBSTSH_Pos  (23UL)	   /* DVBSTSH (Bit 23) */
-#define LINK_REG_DPUSR1R_DVBSTSH_Msk  (0x800000UL) /* DVBSTSH (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_DOVCBH_Pos   (21UL)	   /* DOVCBH (Bit 21) */
-#define LINK_REG_DPUSR1R_DOVCBH_Msk   (0x200000UL) /* DOVCBH (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_DOVCAH_Pos   (20UL)	   /* DOVCAH (Bit 20) */
-#define LINK_REG_DPUSR1R_DOVCAH_Msk   (0x100000UL) /* DOVCAH (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_DVBSTSHE_Pos (7UL)	   /* DVBSTSHE (Bit 7) */
-#define LINK_REG_DPUSR1R_DVBSTSHE_Msk (0x80UL)	   /* DVBSTSHE (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_DOVCBHE_Pos  (5UL)	   /* DOVCBHE (Bit 5) */
-#define LINK_REG_DPUSR1R_DOVCBHE_Msk  (0x20UL)	   /* DOVCBHE (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_DOVCAHE_Pos  (4UL)	   /* DOVCAHE (Bit 4) */
-#define LINK_REG_DPUSR1R_DOVCAHE_Msk  (0x10UL)	   /* DOVCAHE (Bitfield-Mask: 0x01) */
-/* DPUSR2R */
-#define LINK_REG_DPUSR2R_DMINTE_Pos (9UL)     /* DMINTE (Bit 9) */
-#define LINK_REG_DPUSR2R_DMINTE_Msk (0x200UL) /* DMINTE (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR2R_DPINTE_Pos (8UL)     /* DPINTE (Bit 8) */
-#define LINK_REG_DPUSR2R_DPINTE_Msk (0x100UL) /* DPINTE (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR2R_DMVAL_Pos  (5UL)     /* DMVAL (Bit 5) */
-#define LINK_REG_DPUSR2R_DMVAL_Msk  (0x20UL)  /* DMVAL (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR2R_DPVAL_Pos  (4UL)     /* DPVAL (Bit 4) */
-#define LINK_REG_DPUSR2R_DPVAL_Msk  (0x10UL)  /* DPVAL (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR2R_DMINT_Pos  (1UL)     /* DMINT (Bit 1) */
-#define LINK_REG_DPUSR2R_DMINT_Msk  (0x2UL)   /* DMINT (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR2R_DPINT_Pos  (0UL)     /* DPINT (Bit 0) */
-#define LINK_REG_DPUSR2R_DPINT_Msk  (0x1UL)   /* DPINT (Bitfield-Mask: 0x01) */
-/* DPUSRCR */
-#define LINK_REG_DPUSRCR_FIXPHYPD_Pos (1UL)   /* FIXPHYPD (Bit 1) */
-#define LINK_REG_DPUSRCR_FIXPHYPD_Msk (0x2UL) /* FIXPHYPD (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSRCR_FIXPHY_Pos   (0UL)   /* FIXPHY (Bit 0) */
-#define LINK_REG_DPUSRCR_FIXPHY_Msk   (0x1UL) /* FIXPHY (Bitfield-Mask: 0x01) */
-/* DPUSR0R_FS */
-#define LINK_REG_DPUSR0R_FS_DVBSTS0_Pos (23UL)	     /* DVBSTS0 (Bit 23) */
-#define LINK_REG_DPUSR0R_FS_DVBSTS0_Msk (0x800000UL) /* DVBSTS0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR0R_FS_DOVCB0_Pos	(21UL)	     /* DOVCB0 (Bit 21) */
-#define LINK_REG_DPUSR0R_FS_DOVCB0_Msk	(0x200000UL) /* DOVCB0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR0R_FS_DOVCA0_Pos	(20UL)	     /* DOVCA0 (Bit 20) */
-#define LINK_REG_DPUSR0R_FS_DOVCA0_Msk	(0x100000UL) /* DOVCA0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR0R_FS_DM0_Pos	(17UL)	     /* DM0 (Bit 17) */
-#define LINK_REG_DPUSR0R_FS_DM0_Msk	(0x20000UL)  /* DM0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR0R_FS_DP0_Pos	(16UL)	     /* DP0 (Bit 16) */
-#define LINK_REG_DPUSR0R_FS_DP0_Msk	(0x10000UL)  /* DP0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR0R_FS_FIXPHY0_Pos (4UL)	     /* FIXPHY0 (Bit 4) */
-#define LINK_REG_DPUSR0R_FS_FIXPHY0_Msk (0x10UL)     /* FIXPHY0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR0R_FS_DRPD0_Pos	(3UL)	     /* DRPD0 (Bit 3) */
-#define LINK_REG_DPUSR0R_FS_DRPD0_Msk	(0x8UL)	     /* DRPD0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR0R_FS_RPUE0_Pos	(1UL)	     /* RPUE0 (Bit 1) */
-#define LINK_REG_DPUSR0R_FS_RPUE0_Msk	(0x2UL)	     /* RPUE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR0R_FS_SRPC0_Pos	(0UL)	     /* SRPC0 (Bit 0) */
-#define LINK_REG_DPUSR0R_FS_SRPC0_Msk	(0x1UL)	     /* SRPC0 (Bitfield-Mask: 0x01) */
-/* DPUSR1R_FS */
-#define LINK_REG_DPUSR1R_FS_DVBINT0_Pos	  (23UL)       /* DVBINT0 (Bit 23) */
-#define LINK_REG_DPUSR1R_FS_DVBINT0_Msk	  (0x800000UL) /* DVBINT0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_FS_DOVRCRB0_Pos  (21UL)       /* DOVRCRB0 (Bit 21) */
-#define LINK_REG_DPUSR1R_FS_DOVRCRB0_Msk  (0x200000UL) /* DOVRCRB0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_FS_DOVRCRA0_Pos  (20UL)       /* DOVRCRA0 (Bit 20) */
-#define LINK_REG_DPUSR1R_FS_DOVRCRA0_Msk  (0x100000UL) /* DOVRCRA0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_FS_DMINT0_Pos	  (17UL)       /* DMINT0 (Bit 17) */
-#define LINK_REG_DPUSR1R_FS_DMINT0_Msk	  (0x20000UL)  /* DMINT0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_FS_DPINT0_Pos	  (16UL)       /* DPINT0 (Bit 16) */
-#define LINK_REG_DPUSR1R_FS_DPINT0_Msk	  (0x10000UL)  /* DPINT0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_FS_DVBSE0_Pos	  (7UL)	       /* DVBSE0 (Bit 7) */
-#define LINK_REG_DPUSR1R_FS_DVBSE0_Msk	  (0x80UL)     /* DVBSE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_FS_DOVRCRBE0_Pos (5UL)	       /* DOVRCRBE0 (Bit 5) */
-#define LINK_REG_DPUSR1R_FS_DOVRCRBE0_Msk (0x20UL)     /* DOVRCRBE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_FS_DOVRCRAE0_Pos (4UL)	       /* DOVRCRAE0 (Bit 4) */
-#define LINK_REG_DPUSR1R_FS_DOVRCRAE0_Msk (0x10UL)     /* DOVRCRAE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_FS_DMINTE0_Pos	  (1UL)	       /* DMINTE0 (Bit 1) */
-#define LINK_REG_DPUSR1R_FS_DMINTE0_Msk	  (0x2UL)      /* DMINTE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_FS_DPINTE0_Pos	  (0UL)	       /* DPINTE0 (Bit 0) */
-#define LINK_REG_DPUSR1R_FS_DPINTE0_Msk	  (0x1UL)      /* DPINTE0 (Bitfield-Mask: 0x01) */
+// N
+#define LINK_REG_PIPE_TR_N_TRNCNT_Pos      (0UL)        /* TRNCNT (Bit 0) */
+#define LINK_REG_PIPE_TR_N_TRNCNT_Msk      (0xffffUL)   /* TRNCNT (Bitfield-Mask: 0xffff) */
+
+// LINK_REG
+
+// SYSCFG
+#define LINK_REG_SYSCFG_SCKE_Pos           (10UL)       /* SCKE (Bit 10) */
+#define LINK_REG_SYSCFG_SCKE_Msk           (0x400UL)    /* SCKE (Bitfield-Mask: 0x01) */
+#define LINK_REG_SYSCFG_CNEN_Pos           (8UL)        /* CNEN (Bit 8) */
+#define LINK_REG_SYSCFG_CNEN_Msk           (0x100UL)    /* CNEN (Bitfield-Mask: 0x01) */
+#define LINK_REG_SYSCFG_DCFM_Pos           (6UL)        /* DCFM (Bit 6) */
+#define LINK_REG_SYSCFG_DCFM_Msk           (0x40UL)     /* DCFM (Bitfield-Mask: 0x01) */
+#define LINK_REG_SYSCFG_DRPD_Pos           (5UL)        /* DRPD (Bit 5) */
+#define LINK_REG_SYSCFG_DRPD_Msk           (0x20UL)     /* DRPD (Bitfield-Mask: 0x01) */
+#define LINK_REG_SYSCFG_DPRPU_Pos          (4UL)        /* DPRPU (Bit 4) */
+#define LINK_REG_SYSCFG_DPRPU_Msk          (0x10UL)     /* DPRPU (Bitfield-Mask: 0x01) */
+#define LINK_REG_SYSCFG_DMRPU_Pos          (3UL)        /* DMRPU (Bit 3) */
+#define LINK_REG_SYSCFG_DMRPU_Msk          (0x8UL)      /* DMRPU (Bitfield-Mask: 0x01) */
+#define LINK_REG_SYSCFG_USBE_Pos           (0UL)        /* USBE (Bit 0) */
+#define LINK_REG_SYSCFG_USBE_Msk           (0x1UL)      /* USBE (Bitfield-Mask: 0x01) */
+
+// BUSWAIT
+#define LINK_REG_BUSWAIT_BWAIT_Pos         (0UL)        /* BWAIT (Bit 0) */
+#define LINK_REG_BUSWAIT_BWAIT_Msk         (0xfUL)      /* BWAIT (Bitfield-Mask: 0x0f) */
+
+// SYSSTS0
+#define LINK_REG_SYSSTS0_OVCMON_Pos        (14UL)       /* OVCMON (Bit 14) */
+#define LINK_REG_SYSSTS0_OVCMON_Msk        (0xc000UL)   /* OVCMON (Bitfield-Mask: 0x03) */
+#define LINK_REG_SYSSTS0_HTACT_Pos         (6UL)        /* HTACT (Bit 6) */
+#define LINK_REG_SYSSTS0_HTACT_Msk         (0x40UL)     /* HTACT (Bitfield-Mask: 0x01) */
+#define LINK_REG_SYSSTS0_SOFEA_Pos         (5UL)        /* SOFEA (Bit 5) */
+#define LINK_REG_SYSSTS0_SOFEA_Msk         (0x20UL)     /* SOFEA (Bitfield-Mask: 0x01) */
+#define LINK_REG_SYSSTS0_IDMON_Pos         (2UL)        /* IDMON (Bit 2) */
+#define LINK_REG_SYSSTS0_IDMON_Msk         (0x4UL)      /* IDMON (Bitfield-Mask: 0x01) */
+#define LINK_REG_SYSSTS0_LNST_Pos          (0UL)        /* LNST (Bit 0) */
+#define LINK_REG_SYSSTS0_LNST_Msk          (0x3UL)      /* LNST (Bitfield-Mask: 0x03) */
+
+// PLLSTA
+#define LINK_REG_PLLSTA_PLLLOCK_Pos        (0UL)        /* PLLLOCK (Bit 0) */
+#define LINK_REG_PLLSTA_PLLLOCK_Msk        (0x1UL)      /* PLLLOCK (Bitfield-Mask: 0x01) */
+
+// DVSTCTR0
+#define LINK_REG_DVSTCTR0_HNPBTOA_Pos      (11UL)       /* HNPBTOA (Bit 11) */
+#define LINK_REG_DVSTCTR0_HNPBTOA_Msk      (0x800UL)    /* HNPBTOA (Bitfield-Mask: 0x01) */
+#define LINK_REG_DVSTCTR0_EXICEN_Pos       (10UL)       /* EXICEN (Bit 10) */
+#define LINK_REG_DVSTCTR0_EXICEN_Msk       (0x400UL)    /* EXICEN (Bitfield-Mask: 0x01) */
+#define LINK_REG_DVSTCTR0_VBUSEN_Pos       (9UL)        /* VBUSEN (Bit 9) */
+#define LINK_REG_DVSTCTR0_VBUSEN_Msk       (0x200UL)    /* VBUSEN (Bitfield-Mask: 0x01) */
+#define LINK_REG_DVSTCTR0_WKUP_Pos         (8UL)        /* WKUP (Bit 8) */
+#define LINK_REG_DVSTCTR0_WKUP_Msk         (0x100UL)    /* WKUP (Bitfield-Mask: 0x01) */
+#define LINK_REG_DVSTCTR0_RWUPE_Pos        (7UL)        /* RWUPE (Bit 7) */
+#define LINK_REG_DVSTCTR0_RWUPE_Msk        (0x80UL)     /* RWUPE (Bitfield-Mask: 0x01) */
+#define LINK_REG_DVSTCTR0_USBRST_Pos       (6UL)        /* USBRST (Bit 6) */
+#define LINK_REG_DVSTCTR0_USBRST_Msk       (0x40UL)     /* USBRST (Bitfield-Mask: 0x01) */
+#define LINK_REG_DVSTCTR0_RESUME_Pos       (5UL)        /* RESUME (Bit 5) */
+#define LINK_REG_DVSTCTR0_RESUME_Msk       (0x20UL)     /* RESUME (Bitfield-Mask: 0x01) */
+#define LINK_REG_DVSTCTR0_UACT_Pos         (4UL)        /* UACT (Bit 4) */
+#define LINK_REG_DVSTCTR0_UACT_Msk         (0x10UL)     /* UACT (Bitfield-Mask: 0x01) */
+#define LINK_REG_DVSTCTR0_RHST_Pos         (0UL)        /* RHST (Bit 0) */
+#define LINK_REG_DVSTCTR0_RHST_Msk         (0x7UL)      /* RHST (Bitfield-Mask: 0x07) */
+
+// TESTMODE
+#define LINK_REG_TESTMODE_UTST_Pos         (0UL)        /* UTST (Bit 0) */
+#define LINK_REG_TESTMODE_UTST_Msk         (0xfUL)      /* UTST (Bitfield-Mask: 0x0f) */
+
+// CFIFOSEL
+#define LINK_REG_CFIFOSEL_RCNT_Pos         (15UL)       /* RCNT (Bit 15) */
+#define LINK_REG_CFIFOSEL_RCNT_Msk         (0x8000UL)   /* RCNT (Bitfield-Mask: 0x01) */
+#define LINK_REG_CFIFOSEL_REW_Pos          (14UL)       /* REW (Bit 14) */
+#define LINK_REG_CFIFOSEL_REW_Msk          (0x4000UL)   /* REW (Bitfield-Mask: 0x01) */
+#define LINK_REG_CFIFOSEL_MBW_Pos          (10UL)       /* MBW (Bit 10) */
+#define LINK_REG_CFIFOSEL_MBW_Msk          (0xc00UL)    /* MBW (Bitfield-Mask: 0x03) */
+#define LINK_REG_CFIFOSEL_BIGEND_Pos       (8UL)        /* BIGEND (Bit 8) */
+#define LINK_REG_CFIFOSEL_BIGEND_Msk       (0x100UL)    /* BIGEND (Bitfield-Mask: 0x01) */
+#define LINK_REG_CFIFOSEL_ISEL_Pos         (5UL)        /* ISEL (Bit 5) */
+#define LINK_REG_CFIFOSEL_ISEL_Msk         (0x20UL)     /* ISEL (Bitfield-Mask: 0x01) */
+#define LINK_REG_CFIFOSEL_CURPIPE_Pos      (0UL)        /* CURPIPE (Bit 0) */
+#define LINK_REG_CFIFOSEL_CURPIPE_Msk      (0xfUL)      /* CURPIPE (Bitfield-Mask: 0x0f) */
+
+// CFIFOCTR
+#define LINK_REG_CFIFOCTR_BVAL_Pos         (15UL)       /* BVAL (Bit 15) */
+#define LINK_REG_CFIFOCTR_BVAL_Msk         (0x8000UL)   /* BVAL (Bitfield-Mask: 0x01) */
+#define LINK_REG_CFIFOCTR_BCLR_Pos         (14UL)       /* BCLR (Bit 14) */
+#define LINK_REG_CFIFOCTR_BCLR_Msk         (0x4000UL)   /* BCLR (Bitfield-Mask: 0x01) */
+#define LINK_REG_CFIFOCTR_FRDY_Pos         (13UL)       /* FRDY (Bit 13) */
+#define LINK_REG_CFIFOCTR_FRDY_Msk         (0x2000UL)   /* FRDY (Bitfield-Mask: 0x01) */
+#define LINK_REG_CFIFOCTR_DTLN_Pos         (0UL)        /* DTLN (Bit 0) */
+#define LINK_REG_CFIFOCTR_DTLN_Msk         (0xfffUL)    /* DTLN (Bitfield-Mask: 0xfff) */
+
+// D0FIFOSEL
+#define LINK_REG_D0FIFOSEL_RCNT_Pos        (15UL)       /* RCNT (Bit 15) */
+#define LINK_REG_D0FIFOSEL_RCNT_Msk        (0x8000UL)   /* RCNT (Bitfield-Mask: 0x01) */
+#define LINK_REG_D0FIFOSEL_REW_Pos         (14UL)       /* REW (Bit 14) */
+#define LINK_REG_D0FIFOSEL_REW_Msk         (0x4000UL)   /* REW (Bitfield-Mask: 0x01) */
+#define LINK_REG_D0FIFOSEL_DCLRM_Pos       (13UL)       /* DCLRM (Bit 13) */
+#define LINK_REG_D0FIFOSEL_DCLRM_Msk       (0x2000UL)   /* DCLRM (Bitfield-Mask: 0x01) */
+#define LINK_REG_D0FIFOSEL_DREQE_Pos       (12UL)       /* DREQE (Bit 12) */
+#define LINK_REG_D0FIFOSEL_DREQE_Msk       (0x1000UL)   /* DREQE (Bitfield-Mask: 0x01) */
+#define LINK_REG_D0FIFOSEL_MBW_Pos         (10UL)       /* MBW (Bit 10) */
+#define LINK_REG_D0FIFOSEL_MBW_Msk         (0xc00UL)    /* MBW (Bitfield-Mask: 0x03) */
+#define LINK_REG_D0FIFOSEL_BIGEND_Pos      (8UL)        /* BIGEND (Bit 8) */
+#define LINK_REG_D0FIFOSEL_BIGEND_Msk      (0x100UL)    /* BIGEND (Bitfield-Mask: 0x01) */
+#define LINK_REG_D0FIFOSEL_CURPIPE_Pos     (0UL)        /* CURPIPE (Bit 0) */
+#define LINK_REG_D0FIFOSEL_CURPIPE_Msk     (0xfUL)      /* CURPIPE (Bitfield-Mask: 0x0f) */
+
+// D0FIFOCTR
+#define LINK_REG_D0FIFOCTR_BVAL_Pos        (15UL)       /* BVAL (Bit 15) */
+#define LINK_REG_D0FIFOCTR_BVAL_Msk        (0x8000UL)   /* BVAL (Bitfield-Mask: 0x01) */
+#define LINK_REG_D0FIFOCTR_BCLR_Pos        (14UL)       /* BCLR (Bit 14) */
+#define LINK_REG_D0FIFOCTR_BCLR_Msk        (0x4000UL)   /* BCLR (Bitfield-Mask: 0x01) */
+#define LINK_REG_D0FIFOCTR_FRDY_Pos        (13UL)       /* FRDY (Bit 13) */
+#define LINK_REG_D0FIFOCTR_FRDY_Msk        (0x2000UL)   /* FRDY (Bitfield-Mask: 0x01) */
+#define LINK_REG_D0FIFOCTR_DTLN_Pos        (0UL)        /* DTLN (Bit 0) */
+#define LINK_REG_D0FIFOCTR_DTLN_Msk        (0xfffUL)    /* DTLN (Bitfield-Mask: 0xfff) */
+
+// D1FIFOSEL
+#define LINK_REG_D1FIFOSEL_RCNT_Pos        (15UL)       /* RCNT (Bit 15) */
+#define LINK_REG_D1FIFOSEL_RCNT_Msk        (0x8000UL)   /* RCNT (Bitfield-Mask: 0x01) */
+#define LINK_REG_D1FIFOSEL_REW_Pos         (14UL)       /* REW (Bit 14) */
+#define LINK_REG_D1FIFOSEL_REW_Msk         (0x4000UL)   /* REW (Bitfield-Mask: 0x01) */
+#define LINK_REG_D1FIFOSEL_DCLRM_Pos       (13UL)       /* DCLRM (Bit 13) */
+#define LINK_REG_D1FIFOSEL_DCLRM_Msk       (0x2000UL)   /* DCLRM (Bitfield-Mask: 0x01) */
+#define LINK_REG_D1FIFOSEL_DREQE_Pos       (12UL)       /* DREQE (Bit 12) */
+#define LINK_REG_D1FIFOSEL_DREQE_Msk       (0x1000UL)   /* DREQE (Bitfield-Mask: 0x01) */
+#define LINK_REG_D1FIFOSEL_MBW_Pos         (10UL)       /* MBW (Bit 10) */
+#define LINK_REG_D1FIFOSEL_MBW_Msk         (0xc00UL)    /* MBW (Bitfield-Mask: 0x03) */
+#define LINK_REG_D1FIFOSEL_BIGEND_Pos      (8UL)        /* BIGEND (Bit 8) */
+#define LINK_REG_D1FIFOSEL_BIGEND_Msk      (0x100UL)    /* BIGEND (Bitfield-Mask: 0x01) */
+#define LINK_REG_D1FIFOSEL_CURPIPE_Pos     (0UL)        /* CURPIPE (Bit 0) */
+#define LINK_REG_D1FIFOSEL_CURPIPE_Msk     (0xfUL)      /* CURPIPE (Bitfield-Mask: 0x0f) */
+
+// D1FIFOCTR
+#define LINK_REG_D1FIFOCTR_BVAL_Pos        (15UL)       /* BVAL (Bit 15) */
+#define LINK_REG_D1FIFOCTR_BVAL_Msk        (0x8000UL)   /* BVAL (Bitfield-Mask: 0x01) */
+#define LINK_REG_D1FIFOCTR_BCLR_Pos        (14UL)       /* BCLR (Bit 14) */
+#define LINK_REG_D1FIFOCTR_BCLR_Msk        (0x4000UL)   /* BCLR (Bitfield-Mask: 0x01) */
+#define LINK_REG_D1FIFOCTR_FRDY_Pos        (13UL)       /* FRDY (Bit 13) */
+#define LINK_REG_D1FIFOCTR_FRDY_Msk        (0x2000UL)   /* FRDY (Bitfield-Mask: 0x01) */
+#define LINK_REG_D1FIFOCTR_DTLN_Pos        (0UL)        /* DTLN (Bit 0) */
+#define LINK_REG_D1FIFOCTR_DTLN_Msk        (0xfffUL)    /* DTLN (Bitfield-Mask: 0xfff) */
+
+// INTENB0
+#define LINK_REG_INTENB0_VBSE_Pos          (15UL)       /* VBSE (Bit 15) */
+#define LINK_REG_INTENB0_VBSE_Msk          (0x8000UL)   /* VBSE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB0_RSME_Pos          (14UL)       /* RSME (Bit 14) */
+#define LINK_REG_INTENB0_RSME_Msk          (0x4000UL)   /* RSME (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB0_SOFE_Pos          (13UL)       /* SOFE (Bit 13) */
+#define LINK_REG_INTENB0_SOFE_Msk          (0x2000UL)   /* SOFE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB0_DVSE_Pos          (12UL)       /* DVSE (Bit 12) */
+#define LINK_REG_INTENB0_DVSE_Msk          (0x1000UL)   /* DVSE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB0_CTRE_Pos          (11UL)       /* CTRE (Bit 11) */
+#define LINK_REG_INTENB0_CTRE_Msk          (0x800UL)    /* CTRE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB0_BEMPE_Pos         (10UL)       /* BEMPE (Bit 10) */
+#define LINK_REG_INTENB0_BEMPE_Msk         (0x400UL)    /* BEMPE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB0_NRDYE_Pos         (9UL)        /* NRDYE (Bit 9) */
+#define LINK_REG_INTENB0_NRDYE_Msk         (0x200UL)    /* NRDYE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB0_BRDYE_Pos         (8UL)        /* BRDYE (Bit 8) */
+#define LINK_REG_INTENB0_BRDYE_Msk         (0x100UL)    /* BRDYE (Bitfield-Mask: 0x01) */
+
+// INTENB1
+#define LINK_REG_INTENB1_OVRCRE_Pos        (15UL)       /* OVRCRE (Bit 15) */
+#define LINK_REG_INTENB1_OVRCRE_Msk        (0x8000UL)   /* OVRCRE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB1_BCHGE_Pos         (14UL)       /* BCHGE (Bit 14) */
+#define LINK_REG_INTENB1_BCHGE_Msk         (0x4000UL)   /* BCHGE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB1_DTCHE_Pos         (12UL)       /* DTCHE (Bit 12) */
+#define LINK_REG_INTENB1_DTCHE_Msk         (0x1000UL)   /* DTCHE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB1_ATTCHE_Pos        (11UL)       /* ATTCHE (Bit 11) */
+#define LINK_REG_INTENB1_ATTCHE_Msk        (0x800UL)    /* ATTCHE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB1_EOFERRE_Pos       (6UL)        /* EOFERRE (Bit 6) */
+#define LINK_REG_INTENB1_EOFERRE_Msk       (0x40UL)     /* EOFERRE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB1_SIGNE_Pos         (5UL)        /* SIGNE (Bit 5) */
+#define LINK_REG_INTENB1_SIGNE_Msk         (0x20UL)     /* SIGNE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB1_SACKE_Pos         (4UL)        /* SACKE (Bit 4) */
+#define LINK_REG_INTENB1_SACKE_Msk         (0x10UL)     /* SACKE (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTENB1_PDDETINTE0_Pos    (0UL)        /* PDDETINTE0 (Bit 0) */
+#define LINK_REG_INTENB1_PDDETINTE0_Msk    (0x1UL)      /* PDDETINTE0 (Bitfield-Mask: 0x01) */
+
+// BRDYENB
+#define LINK_REG_BRDYENB_PIPEBRDYE_Pos     (0UL)        /* PIPEBRDYE (Bit 0) */
+#define LINK_REG_BRDYENB_PIPEBRDYE_Msk     (0x1UL)      /* PIPEBRDYE (Bitfield-Mask: 0x01) */
+
+// NRDYENB
+#define LINK_REG_NRDYENB_PIPENRDYE_Pos     (0UL)        /* PIPENRDYE (Bit 0) */
+#define LINK_REG_NRDYENB_PIPENRDYE_Msk     (0x1UL)      /* PIPENRDYE (Bitfield-Mask: 0x01) */
+
+// BEMPENB
+#define LINK_REG_BEMPENB_PIPEBEMPE_Pos     (0UL)        /* PIPEBEMPE (Bit 0) */
+#define LINK_REG_BEMPENB_PIPEBEMPE_Msk     (0x1UL)      /* PIPEBEMPE (Bitfield-Mask: 0x01) */
+
+// SOFCFG
+#define LINK_REG_SOFCFG_TRNENSEL_Pos       (8UL)        /* TRNENSEL (Bit 8) */
+#define LINK_REG_SOFCFG_TRNENSEL_Msk       (0x100UL)    /* TRNENSEL (Bitfield-Mask: 0x01) */
+#define LINK_REG_SOFCFG_BRDYM_Pos          (6UL)        /* BRDYM (Bit 6) */
+#define LINK_REG_SOFCFG_BRDYM_Msk          (0x40UL)     /* BRDYM (Bitfield-Mask: 0x01) */
+#define LINK_REG_SOFCFG_INTL_Pos           (5UL)        /* INTL (Bit 5) */
+#define LINK_REG_SOFCFG_INTL_Msk           (0x20UL)     /* INTL (Bitfield-Mask: 0x01) */
+#define LINK_REG_SOFCFG_EDGESTS_Pos        (4UL)        /* EDGESTS (Bit 4) */
+#define LINK_REG_SOFCFG_EDGESTS_Msk        (0x10UL)     /* EDGESTS (Bitfield-Mask: 0x01) */
+
+// PHYSET
+#define LINK_REG_PHYSET_HSEB_Pos           (15UL)       /* HSEB (Bit 15) */
+#define LINK_REG_PHYSET_HSEB_Msk           (0x8000UL)   /* HSEB (Bitfield-Mask: 0x01) */
+#define LINK_REG_PHYSET_REPSTART_Pos       (11UL)       /* REPSTART (Bit 11) */
+#define LINK_REG_PHYSET_REPSTART_Msk       (0x800UL)    /* REPSTART (Bitfield-Mask: 0x01) */
+#define LINK_REG_PHYSET_REPSEL_Pos         (8UL)        /* REPSEL (Bit 8) */
+#define LINK_REG_PHYSET_REPSEL_Msk         (0x300UL)    /* REPSEL (Bitfield-Mask: 0x03) */
+#define LINK_REG_PHYSET_CLKSEL_Pos         (4UL)        /* CLKSEL (Bit 4) */
+#define LINK_REG_PHYSET_CLKSEL_Msk         (0x30UL)     /* CLKSEL (Bitfield-Mask: 0x03) */
+#define LINK_REG_PHYSET_CDPEN_Pos          (3UL)        /* CDPEN (Bit 3) */
+#define LINK_REG_PHYSET_CDPEN_Msk          (0x8UL)      /* CDPEN (Bitfield-Mask: 0x01) */
+#define LINK_REG_PHYSET_PLLRESET_Pos       (1UL)        /* PLLRESET (Bit 1) */
+#define LINK_REG_PHYSET_PLLRESET_Msk       (0x2UL)      /* PLLRESET (Bitfield-Mask: 0x01) */
+#define LINK_REG_PHYSET_DIRPD_Pos          (0UL)        /* DIRPD (Bit 0) */
+#define LINK_REG_PHYSET_DIRPD_Msk          (0x1UL)      /* DIRPD (Bitfield-Mask: 0x01) */
+
+// INTSTS0
+#define LINK_REG_INTSTS0_VBINT_Pos         (15UL)       /* VBINT (Bit 15) */
+#define LINK_REG_INTSTS0_VBINT_Msk         (0x8000UL)   /* VBINT (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS0_RESM_Pos          (14UL)       /* RESM (Bit 14) */
+#define LINK_REG_INTSTS0_RESM_Msk          (0x4000UL)   /* RESM (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS0_SOFR_Pos          (13UL)       /* SOFR (Bit 13) */
+#define LINK_REG_INTSTS0_SOFR_Msk          (0x2000UL)   /* SOFR (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS0_DVST_Pos          (12UL)       /* DVST (Bit 12) */
+#define LINK_REG_INTSTS0_DVST_Msk          (0x1000UL)   /* DVST (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS0_CTRT_Pos          (11UL)       /* CTRT (Bit 11) */
+#define LINK_REG_INTSTS0_CTRT_Msk          (0x800UL)    /* CTRT (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS0_BEMP_Pos          (10UL)       /* BEMP (Bit 10) */
+#define LINK_REG_INTSTS0_BEMP_Msk          (0x400UL)    /* BEMP (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS0_NRDY_Pos          (9UL)        /* NRDY (Bit 9) */
+#define LINK_REG_INTSTS0_NRDY_Msk          (0x200UL)    /* NRDY (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS0_BRDY_Pos          (8UL)        /* BRDY (Bit 8) */
+#define LINK_REG_INTSTS0_BRDY_Msk          (0x100UL)    /* BRDY (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS0_VBSTS_Pos         (7UL)        /* VBSTS (Bit 7) */
+#define LINK_REG_INTSTS0_VBSTS_Msk         (0x80UL)     /* VBSTS (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS0_DVSQ_Pos          (4UL)        /* DVSQ (Bit 4) */
+#define LINK_REG_INTSTS0_DVSQ_Msk          (0x70UL)     /* DVSQ (Bitfield-Mask: 0x07) */
+#define LINK_REG_INTSTS0_VALID_Pos         (3UL)        /* VALID (Bit 3) */
+#define LINK_REG_INTSTS0_VALID_Msk         (0x8UL)      /* VALID (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS0_CTSQ_Pos          (0UL)        /* CTSQ (Bit 0) */
+#define LINK_REG_INTSTS0_CTSQ_Msk          (0x7UL)      /* CTSQ (Bitfield-Mask: 0x07) */
+
+// INTSTS1
+#define LINK_REG_INTSTS1_OVRCR_Pos         (15UL)       /* OVRCR (Bit 15) */
+#define LINK_REG_INTSTS1_OVRCR_Msk         (0x8000UL)   /* OVRCR (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS1_BCHG_Pos          (14UL)       /* BCHG (Bit 14) */
+#define LINK_REG_INTSTS1_BCHG_Msk          (0x4000UL)   /* BCHG (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS1_DTCH_Pos          (12UL)       /* DTCH (Bit 12) */
+#define LINK_REG_INTSTS1_DTCH_Msk          (0x1000UL)   /* DTCH (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS1_ATTCH_Pos         (11UL)       /* ATTCH (Bit 11) */
+#define LINK_REG_INTSTS1_ATTCH_Msk         (0x800UL)    /* ATTCH (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS1_L1RSMEND_Pos      (9UL)        /* L1RSMEND (Bit 9) */
+#define LINK_REG_INTSTS1_L1RSMEND_Msk      (0x200UL)    /* L1RSMEND (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS1_LPMEND_Pos        (8UL)        /* LPMEND (Bit 8) */
+#define LINK_REG_INTSTS1_LPMEND_Msk        (0x100UL)    /* LPMEND (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS1_EOFERR_Pos        (6UL)        /* EOFERR (Bit 6) */
+#define LINK_REG_INTSTS1_EOFERR_Msk        (0x40UL)     /* EOFERR (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS1_SIGN_Pos          (5UL)        /* SIGN (Bit 5) */
+#define LINK_REG_INTSTS1_SIGN_Msk          (0x20UL)     /* SIGN (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS1_SACK_Pos          (4UL)        /* SACK (Bit 4) */
+#define LINK_REG_INTSTS1_SACK_Msk          (0x10UL)     /* SACK (Bitfield-Mask: 0x01) */
+#define LINK_REG_INTSTS1_PDDETINT0_Pos     (0UL)        /* PDDETINT0 (Bit 0) */
+#define LINK_REG_INTSTS1_PDDETINT0_Msk     (0x1UL)      /* PDDETINT0 (Bitfield-Mask: 0x01) */
+
+// BRDYSTS
+#define LINK_REG_BRDYSTS_PIPEBRDY_Pos      (0UL)        /* PIPEBRDY (Bit 0) */
+#define LINK_REG_BRDYSTS_PIPEBRDY_Msk      (0x1UL)      /* PIPEBRDY (Bitfield-Mask: 0x01) */
+
+// NRDYSTS
+#define LINK_REG_NRDYSTS_PIPENRDY_Pos      (0UL)        /* PIPENRDY (Bit 0) */
+#define LINK_REG_NRDYSTS_PIPENRDY_Msk      (0x1UL)      /* PIPENRDY (Bitfield-Mask: 0x01) */
+
+// BEMPSTS
+#define LINK_REG_BEMPSTS_PIPEBEMP_Pos      (0UL)        /* PIPEBEMP (Bit 0) */
+#define LINK_REG_BEMPSTS_PIPEBEMP_Msk      (0x1UL)      /* PIPEBEMP (Bitfield-Mask: 0x01) */
+
+// FRMNUM
+#define LINK_REG_FRMNUM_OVRN_Pos           (15UL)       /* OVRN (Bit 15) */
+#define LINK_REG_FRMNUM_OVRN_Msk           (0x8000UL)   /* OVRN (Bitfield-Mask: 0x01) */
+#define LINK_REG_FRMNUM_CRCE_Pos           (14UL)       /* CRCE (Bit 14) */
+#define LINK_REG_FRMNUM_CRCE_Msk           (0x4000UL)   /* CRCE (Bitfield-Mask: 0x01) */
+#define LINK_REG_FRMNUM_FRNM_Pos           (0UL)        /* FRNM (Bit 0) */
+#define LINK_REG_FRMNUM_FRNM_Msk           (0x7ffUL)    /* FRNM (Bitfield-Mask: 0x7ff) */
+
+// UFRMNUM
+#define LINK_REG_UFRMNUM_DVCHG_Pos         (15UL)       /* DVCHG (Bit 15) */
+#define LINK_REG_UFRMNUM_DVCHG_Msk         (0x8000UL)   /* DVCHG (Bitfield-Mask: 0x01) */
+#define LINK_REG_UFRMNUM_UFRNM_Pos         (0UL)        /* UFRNM (Bit 0) */
+#define LINK_REG_UFRMNUM_UFRNM_Msk         (0x7UL)      /* UFRNM (Bitfield-Mask: 0x07) */
+
+// USBADDR
+#define LINK_REG_USBADDR_STSRECOV0_Pos     (8UL)        /* STSRECOV0 (Bit 8) */
+#define LINK_REG_USBADDR_STSRECOV0_Msk     (0x700UL)    /* STSRECOV0 (Bitfield-Mask: 0x07) */
+#define LINK_REG_USBADDR_USBADDR_Pos       (0UL)        /* USBADDR (Bit 0) */
+#define LINK_REG_USBADDR_USBADDR_Msk       (0x7fUL)     /* USBADDR (Bitfield-Mask: 0x7f) */
+
+// USBREQ
+#define LINK_REG_USBREQ_BREQUEST_Pos       (8UL)        /* BREQUEST (Bit 8) */
+#define LINK_REG_USBREQ_BREQUEST_Msk       (0xff00UL)   /* BREQUEST (Bitfield-Mask: 0xff) */
+#define LINK_REG_USBREQ_BMREQUESTTYPE_Pos  (0UL)        /* BMREQUESTTYPE (Bit 0) */
+#define LINK_REG_USBREQ_BMREQUESTTYPE_Msk  (0xffUL)     /* BMREQUESTTYPE (Bitfield-Mask: 0xff) */
+
+// USBVAL
+#define LINK_REG_USBVAL_WVALUE_Pos         (0UL)        /* WVALUE (Bit 0) */
+#define LINK_REG_USBVAL_WVALUE_Msk         (0xffffUL)   /* WVALUE (Bitfield-Mask: 0xffff) */
+
+// USBINDX
+#define LINK_REG_USBINDX_WINDEX_Pos        (0UL)        /* WINDEX (Bit 0) */
+#define LINK_REG_USBINDX_WINDEX_Msk        (0xffffUL)   /* WINDEX (Bitfield-Mask: 0xffff) */
+
+// USBLENG
+#define LINK_REG_USBLENG_WLENGTH_Pos       (0UL)        /* WLENGTH (Bit 0) */
+#define LINK_REG_USBLENG_WLENGTH_Msk       (0xffffUL)   /* WLENGTH (Bitfield-Mask: 0xffff) */
+
+// DCPCFG
+#define LINK_REG_DCPCFG_CNTMD_Pos          (8UL)        /* CNTMD (Bit 8) */
+#define LINK_REG_DCPCFG_CNTMD_Msk          (0x100UL)    /* CNTMD (Bitfield-Mask: 0x01) */
+#define LINK_REG_DCPCFG_SHTNAK_Pos         (7UL)        /* SHTNAK (Bit 7) */
+#define LINK_REG_DCPCFG_SHTNAK_Msk         (0x80UL)     /* SHTNAK (Bitfield-Mask: 0x01) */
+#define LINK_REG_DCPCFG_DIR_Pos            (4UL)        /* DIR (Bit 4) */
+#define LINK_REG_DCPCFG_DIR_Msk            (0x10UL)     /* DIR (Bitfield-Mask: 0x01) */
+
+// DCPMAXP
+#define LINK_REG_DCPMAXP_DEVSEL_Pos        (12UL)       /* DEVSEL (Bit 12) */
+#define LINK_REG_DCPMAXP_DEVSEL_Msk        (0xf000UL)   /* DEVSEL (Bitfield-Mask: 0x0f) */
+#define LINK_REG_DCPMAXP_MXPS_Pos          (0UL)        /* MXPS (Bit 0) */
+#define LINK_REG_DCPMAXP_MXPS_Msk          (0x7fUL)     /* MXPS (Bitfield-Mask: 0x7f) */
+
+// DCPCTR
+#define LINK_REG_DCPCTR_BSTS_Pos           (15UL)       /* BSTS (Bit 15) */
+#define LINK_REG_DCPCTR_BSTS_Msk           (0x8000UL)   /* BSTS (Bitfield-Mask: 0x01) */
+#define LINK_REG_DCPCTR_SUREQ_Pos          (14UL)       /* SUREQ (Bit 14) */
+#define LINK_REG_DCPCTR_SUREQ_Msk          (0x4000UL)   /* SUREQ (Bitfield-Mask: 0x01) */
+#define LINK_REG_DCPCTR_SUREQCLR_Pos       (11UL)       /* SUREQCLR (Bit 11) */
+#define LINK_REG_DCPCTR_SUREQCLR_Msk       (0x800UL)    /* SUREQCLR (Bitfield-Mask: 0x01) */
+#define LINK_REG_DCPCTR_SQCLR_Pos          (8UL)        /* SQCLR (Bit 8) */
+#define LINK_REG_DCPCTR_SQCLR_Msk          (0x100UL)    /* SQCLR (Bitfield-Mask: 0x01) */
+#define LINK_REG_DCPCTR_SQSET_Pos          (7UL)        /* SQSET (Bit 7) */
+#define LINK_REG_DCPCTR_SQSET_Msk          (0x80UL)     /* SQSET (Bitfield-Mask: 0x01) */
+#define LINK_REG_DCPCTR_SQMON_Pos          (6UL)        /* SQMON (Bit 6) */
+#define LINK_REG_DCPCTR_SQMON_Msk          (0x40UL)     /* SQMON (Bitfield-Mask: 0x01) */
+#define LINK_REG_DCPCTR_PBUSY_Pos          (5UL)        /* PBUSY (Bit 5) */
+#define LINK_REG_DCPCTR_PBUSY_Msk          (0x20UL)     /* PBUSY (Bitfield-Mask: 0x01) */
+#define LINK_REG_DCPCTR_CCPL_Pos           (2UL)        /* CCPL (Bit 2) */
+#define LINK_REG_DCPCTR_CCPL_Msk           (0x4UL)      /* CCPL (Bitfield-Mask: 0x01) */
+#define LINK_REG_DCPCTR_PID_Pos            (0UL)        /* PID (Bit 0) */
+#define LINK_REG_DCPCTR_PID_Msk            (0x3UL)      /* PID (Bitfield-Mask: 0x03) */
+
+// PIPESEL
+#define LINK_REG_PIPESEL_PIPESEL_Pos       (0UL)        /* PIPESEL (Bit 0) */
+#define LINK_REG_PIPESEL_PIPESEL_Msk       (0xfUL)      /* PIPESEL (Bitfield-Mask: 0x0f) */
+
+// PIPECFG
+#define LINK_REG_PIPECFG_TYPE_Pos          (14UL)       /* TYPE (Bit 14) */
+#define LINK_REG_PIPECFG_TYPE_Msk          (0xc000UL)   /* TYPE (Bitfield-Mask: 0x03) */
+#define LINK_REG_PIPECFG_BFRE_Pos          (10UL)       /* BFRE (Bit 10) */
+#define LINK_REG_PIPECFG_BFRE_Msk          (0x400UL)    /* BFRE (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPECFG_DBLB_Pos          (9UL)        /* DBLB (Bit 9) */
+#define LINK_REG_PIPECFG_DBLB_Msk          (0x200UL)    /* DBLB (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPECFG_SHTNAK_Pos        (7UL)        /* SHTNAK (Bit 7) */
+#define LINK_REG_PIPECFG_SHTNAK_Msk        (0x80UL)     /* SHTNAK (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPECFG_DIR_Pos           (4UL)        /* DIR (Bit 4) */
+#define LINK_REG_PIPECFG_DIR_Msk           (0x10UL)     /* DIR (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPECFG_EPNUM_Pos         (0UL)        /* EPNUM (Bit 0) */
+#define LINK_REG_PIPECFG_EPNUM_Msk         (0xfUL)      /* EPNUM (Bitfield-Mask: 0x0f) */
+
+// PIPEMAXP
+#define LINK_REG_PIPEMAXP_DEVSEL_Pos       (12UL)       /* DEVSEL (Bit 12) */
+#define LINK_REG_PIPEMAXP_DEVSEL_Msk       (0xf000UL)   /* DEVSEL (Bitfield-Mask: 0x0f) */
+#define LINK_REG_PIPEMAXP_MXPS_Pos         (0UL)        /* MXPS (Bit 0) */
+#define LINK_REG_PIPEMAXP_MXPS_Msk         (0x1ffUL)    /* MXPS (Bitfield-Mask: 0x1ff) */
+
+// PIPEPERI
+#define LINK_REG_PIPEPERI_IFIS_Pos         (12UL)       /* IFIS (Bit 12) */
+#define LINK_REG_PIPEPERI_IFIS_Msk         (0x1000UL)   /* IFIS (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPEPERI_IITV_Pos         (0UL)        /* IITV (Bit 0) */
+#define LINK_REG_PIPEPERI_IITV_Msk         (0x7UL)      /* IITV (Bitfield-Mask: 0x07) */
+
+// PIPE_CTR
+#define LINK_REG_PIPE_CTR_BSTS_Pos         (15UL)       /* BSTS (Bit 15) */
+#define LINK_REG_PIPE_CTR_BSTS_Msk         (0x8000UL)   /* BSTS (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_CTR_INBUFM_Pos       (14UL)       /* INBUFM (Bit 14) */
+#define LINK_REG_PIPE_CTR_INBUFM_Msk       (0x4000UL)   /* INBUFM (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_CTR_CSCLR_Pos        (13UL)       /* CSCLR (Bit 13) */
+#define LINK_REG_PIPE_CTR_CSCLR_Msk        (0x2000UL)   /* CSCLR (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_CTR_CSSTS_Pos        (12UL)       /* CSSTS (Bit 12) */
+#define LINK_REG_PIPE_CTR_CSSTS_Msk        (0x1000UL)   /* CSSTS (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_CTR_ATREPM_Pos       (10UL)       /* ATREPM (Bit 10) */
+#define LINK_REG_PIPE_CTR_ATREPM_Msk       (0x400UL)    /* ATREPM (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_CTR_ACLRM_Pos        (9UL)        /* ACLRM (Bit 9) */
+#define LINK_REG_PIPE_CTR_ACLRM_Msk        (0x200UL)    /* ACLRM (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_CTR_SQCLR_Pos        (8UL)        /* SQCLR (Bit 8) */
+#define LINK_REG_PIPE_CTR_SQCLR_Msk        (0x100UL)    /* SQCLR (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_CTR_SQSET_Pos        (7UL)        /* SQSET (Bit 7) */
+#define LINK_REG_PIPE_CTR_SQSET_Msk        (0x80UL)     /* SQSET (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_CTR_SQMON_Pos        (6UL)        /* SQMON (Bit 6) */
+#define LINK_REG_PIPE_CTR_SQMON_Msk        (0x40UL)     /* SQMON (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_CTR_PBUSY_Pos        (5UL)        /* PBUSY (Bit 5) */
+#define LINK_REG_PIPE_CTR_PBUSY_Msk        (0x20UL)     /* PBUSY (Bitfield-Mask: 0x01) */
+#define LINK_REG_PIPE_CTR_PID_Pos          (0UL)        /* PID (Bit 0) */
+#define LINK_REG_PIPE_CTR_PID_Msk          (0x3UL)      /* PID (Bitfield-Mask: 0x03) */
+
+// DEVADD
+#define LINK_REG_DEVADD_UPPHUB_Pos         (11UL)       /* UPPHUB (Bit 11) */
+#define LINK_REG_DEVADD_UPPHUB_Msk         (0x7800UL)   /* UPPHUB (Bitfield-Mask: 0x0f) */
+#define LINK_REG_DEVADD_HUBPORT_Pos        (8UL)        /* HUBPORT (Bit 8) */
+#define LINK_REG_DEVADD_HUBPORT_Msk        (0x700UL)    /* HUBPORT (Bitfield-Mask: 0x07) */
+#define LINK_REG_DEVADD_USBSPD_Pos         (6UL)        /* USBSPD (Bit 6) */
+#define LINK_REG_DEVADD_USBSPD_Msk         (0xc0UL)     /* USBSPD (Bitfield-Mask: 0x03) */
+
+// USBBCCTRL0
+#define LINK_REG_USBBCCTRL0_PDDETSTS0_Pos  (9UL)        /* PDDETSTS0 (Bit 9) */
+#define LINK_REG_USBBCCTRL0_PDDETSTS0_Msk  (0x200UL)    /* PDDETSTS0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_USBBCCTRL0_CHGDETSTS0_Pos (8UL)        /* CHGDETSTS0 (Bit 8) */
+#define LINK_REG_USBBCCTRL0_CHGDETSTS0_Msk (0x100UL)    /* CHGDETSTS0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_USBBCCTRL0_BATCHGE0_Pos   (7UL)        /* BATCHGE0 (Bit 7) */
+#define LINK_REG_USBBCCTRL0_BATCHGE0_Msk   (0x80UL)     /* BATCHGE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_USBBCCTRL0_VDMSRCE0_Pos   (5UL)        /* VDMSRCE0 (Bit 5) */
+#define LINK_REG_USBBCCTRL0_VDMSRCE0_Msk   (0x20UL)     /* VDMSRCE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_USBBCCTRL0_IDPSINKE0_Pos  (4UL)        /* IDPSINKE0 (Bit 4) */
+#define LINK_REG_USBBCCTRL0_IDPSINKE0_Msk  (0x10UL)     /* IDPSINKE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_USBBCCTRL0_VDPSRCE0_Pos   (3UL)        /* VDPSRCE0 (Bit 3) */
+#define LINK_REG_USBBCCTRL0_VDPSRCE0_Msk   (0x8UL)      /* VDPSRCE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_USBBCCTRL0_IDMSINKE0_Pos  (2UL)        /* IDMSINKE0 (Bit 2) */
+#define LINK_REG_USBBCCTRL0_IDMSINKE0_Msk  (0x4UL)      /* IDMSINKE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_USBBCCTRL0_IDPSRCE0_Pos   (1UL)        /* IDPSRCE0 (Bit 1) */
+#define LINK_REG_USBBCCTRL0_IDPSRCE0_Msk   (0x2UL)      /* IDPSRCE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_USBBCCTRL0_RPDME0_Pos     (0UL)        /* RPDME0 (Bit 0) */
+#define LINK_REG_USBBCCTRL0_RPDME0_Msk     (0x1UL)      /* RPDME0 (Bitfield-Mask: 0x01) */
+
+// UCKSEL
+#define LINK_REG_UCKSEL_UCKSELC_Pos        (0UL)        /* UCKSELC (Bit 0) */
+#define LINK_REG_UCKSEL_UCKSELC_Msk        (0x1UL)      /* UCKSELC (Bitfield-Mask: 0x01) */
+
+// USBMC
+#define LINK_REG_USBMC_VDCEN_Pos           (7UL)        /* VDCEN (Bit 7) */
+#define LINK_REG_USBMC_VDCEN_Msk           (0x80UL)     /* VDCEN (Bitfield-Mask: 0x01) */
+#define LINK_REG_USBMC_VDDUSBE_Pos         (0UL)        /* VDDUSBE (Bit 0) */
+#define LINK_REG_USBMC_VDDUSBE_Msk         (0x1UL)      /* VDDUSBE (Bitfield-Mask: 0x01) */
+
+// PHYSLEW
+#define LINK_REG_PHYSLEW_SLEWF01_Pos       (3UL)        /* SLEWF01 (Bit 3) */
+#define LINK_REG_PHYSLEW_SLEWF01_Msk       (0x8UL)      /* SLEWF01 (Bitfield-Mask: 0x01) */
+#define LINK_REG_PHYSLEW_SLEWF00_Pos       (2UL)        /* SLEWF00 (Bit 2) */
+#define LINK_REG_PHYSLEW_SLEWF00_Msk       (0x4UL)      /* SLEWF00 (Bitfield-Mask: 0x01) */
+#define LINK_REG_PHYSLEW_SLEWR01_Pos       (1UL)        /* SLEWR01 (Bit 1) */
+#define LINK_REG_PHYSLEW_SLEWR01_Msk       (0x2UL)      /* SLEWR01 (Bitfield-Mask: 0x01) */
+#define LINK_REG_PHYSLEW_SLEWR00_Pos       (0UL)        /* SLEWR00 (Bit 0) */
+#define LINK_REG_PHYSLEW_SLEWR00_Msk       (0x1UL)      /* SLEWR00 (Bitfield-Mask: 0x01) */
+
+// LPCTRL
+#define LINK_REG_LPCTRL_HWUPM_Pos          (7UL)        /* HWUPM (Bit 7) */
+#define LINK_REG_LPCTRL_HWUPM_Msk          (0x80UL)     /* HWUPM (Bitfield-Mask: 0x01) */
+
+// LPSTS
+#define LINK_REG_LPSTS_SUSPENDM_Pos        (14UL)       /* SUSPENDM (Bit 14) */
+#define LINK_REG_LPSTS_SUSPENDM_Msk        (0x4000UL)   /* SUSPENDM (Bitfield-Mask: 0x01) */
+
+// BCCTRL
+#define LINK_REG_BCCTRL_PDDETSTS_Pos       (9UL)        /* PDDETSTS (Bit 9) */
+#define LINK_REG_BCCTRL_PDDETSTS_Msk       (0x200UL)    /* PDDETSTS (Bitfield-Mask: 0x01) */
+#define LINK_REG_BCCTRL_CHGDETSTS_Pos      (8UL)        /* CHGDETSTS (Bit 8) */
+#define LINK_REG_BCCTRL_CHGDETSTS_Msk      (0x100UL)    /* CHGDETSTS (Bitfield-Mask: 0x01) */
+#define LINK_REG_BCCTRL_DCPMODE_Pos        (5UL)        /* DCPMODE (Bit 5) */
+#define LINK_REG_BCCTRL_DCPMODE_Msk        (0x20UL)     /* DCPMODE (Bitfield-Mask: 0x01) */
+#define LINK_REG_BCCTRL_VDMSRCE_Pos        (4UL)        /* VDMSRCE (Bit 4) */
+#define LINK_REG_BCCTRL_VDMSRCE_Msk        (0x10UL)     /* VDMSRCE (Bitfield-Mask: 0x01) */
+#define LINK_REG_BCCTRL_IDPSINKE_Pos       (3UL)        /* IDPSINKE (Bit 3) */
+#define LINK_REG_BCCTRL_IDPSINKE_Msk       (0x8UL)      /* IDPSINKE (Bitfield-Mask: 0x01) */
+#define LINK_REG_BCCTRL_VDPSRCE_Pos        (2UL)        /* VDPSRCE (Bit 2) */
+#define LINK_REG_BCCTRL_VDPSRCE_Msk        (0x4UL)      /* VDPSRCE (Bitfield-Mask: 0x01) */
+#define LINK_REG_BCCTRL_IDMSINKE_Pos       (1UL)        /* IDMSINKE (Bit 1) */
+#define LINK_REG_BCCTRL_IDMSINKE_Msk       (0x2UL)      /* IDMSINKE (Bitfield-Mask: 0x01) */
+#define LINK_REG_BCCTRL_IDPSRCE_Pos        (0UL)        /* IDPSRCE (Bit 0) */
+#define LINK_REG_BCCTRL_IDPSRCE_Msk        (0x1UL)      /* IDPSRCE (Bitfield-Mask: 0x01) */
+
+// PL1CTRL1
+#define LINK_REG_PL1CTRL1_L1EXTMD_Pos      (14UL)       /* L1EXTMD (Bit 14) */
+#define LINK_REG_PL1CTRL1_L1EXTMD_Msk      (0x4000UL)   /* L1EXTMD (Bitfield-Mask: 0x01) */
+#define LINK_REG_PL1CTRL1_HIRDTHR_Pos      (8UL)        /* HIRDTHR (Bit 8) */
+#define LINK_REG_PL1CTRL1_HIRDTHR_Msk      (0xf00UL)    /* HIRDTHR (Bitfield-Mask: 0x0f) */
+#define LINK_REG_PL1CTRL1_DVSQ_Pos         (4UL)        /* DVSQ (Bit 4) */
+#define LINK_REG_PL1CTRL1_DVSQ_Msk         (0xf0UL)     /* DVSQ (Bitfield-Mask: 0x0f) */
+#define LINK_REG_PL1CTRL1_L1NEGOMD_Pos     (3UL)        /* L1NEGOMD (Bit 3) */
+#define LINK_REG_PL1CTRL1_L1NEGOMD_Msk     (0x8UL)      /* L1NEGOMD (Bitfield-Mask: 0x01) */
+#define LINK_REG_PL1CTRL1_L1RESPMD_Pos     (1UL)        /* L1RESPMD (Bit 1) */
+#define LINK_REG_PL1CTRL1_L1RESPMD_Msk     (0x6UL)      /* L1RESPMD (Bitfield-Mask: 0x03) */
+#define LINK_REG_PL1CTRL1_L1RESPEN_Pos     (0UL)        /* L1RESPEN (Bit 0) */
+#define LINK_REG_PL1CTRL1_L1RESPEN_Msk     (0x1UL)      /* L1RESPEN (Bitfield-Mask: 0x01) */
+
+// PL1CTRL2
+#define LINK_REG_PL1CTRL2_RWEMON_Pos       (12UL)       /* RWEMON (Bit 12) */
+#define LINK_REG_PL1CTRL2_RWEMON_Msk       (0x1000UL)   /* RWEMON (Bitfield-Mask: 0x01) */
+#define LINK_REG_PL1CTRL2_HIRDMON_Pos      (8UL)        /* HIRDMON (Bit 8) */
+#define LINK_REG_PL1CTRL2_HIRDMON_Msk      (0xf00UL)    /* HIRDMON (Bitfield-Mask: 0x0f) */
+
+// HL1CTRL1
+#define LINK_REG_HL1CTRL1_L1STATUS_Pos     (1UL)        /* L1STATUS (Bit 1) */
+#define LINK_REG_HL1CTRL1_L1STATUS_Msk     (0x6UL)      /* L1STATUS (Bitfield-Mask: 0x03) */
+#define LINK_REG_HL1CTRL1_L1REQ_Pos        (0UL)        /* L1REQ (Bit 0) */
+#define LINK_REG_HL1CTRL1_L1REQ_Msk        (0x1UL)      /* L1REQ (Bitfield-Mask: 0x01) */
+
+// HL1CTRL2
+#define LINK_REG_HL1CTRL2_BESL_Pos         (15UL)       /* BESL (Bit 15) */
+#define LINK_REG_HL1CTRL2_BESL_Msk         (0x8000UL)   /* BESL (Bitfield-Mask: 0x01) */
+#define LINK_REG_HL1CTRL2_L1RWE_Pos        (12UL)       /* L1RWE (Bit 12) */
+#define LINK_REG_HL1CTRL2_L1RWE_Msk        (0x1000UL)   /* L1RWE (Bitfield-Mask: 0x01) */
+#define LINK_REG_HL1CTRL2_HIRD_Pos         (8UL)        /* HIRD (Bit 8) */
+#define LINK_REG_HL1CTRL2_HIRD_Msk         (0xf00UL)    /* HIRD (Bitfield-Mask: 0x0f) */
+#define LINK_REG_HL1CTRL2_L1ADDR_Pos       (0UL)        /* L1ADDR (Bit 0) */
+#define LINK_REG_HL1CTRL2_L1ADDR_Msk       (0xfUL)      /* L1ADDR (Bitfield-Mask: 0x0f) */
+
+// DPUSR0R
+#define LINK_REG_DPUSR0R_DVBSTSHM_Pos      (23UL)       /* DVBSTSHM (Bit 23) */
+#define LINK_REG_DPUSR0R_DVBSTSHM_Msk      (0x800000UL) /* DVBSTSHM (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR0R_DOVCBHM_Pos       (21UL)       /* DOVCBHM (Bit 21) */
+#define LINK_REG_DPUSR0R_DOVCBHM_Msk       (0x200000UL) /* DOVCBHM (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR0R_DOVCAHM_Pos       (20UL)       /* DOVCAHM (Bit 20) */
+#define LINK_REG_DPUSR0R_DOVCAHM_Msk       (0x100000UL) /* DOVCAHM (Bitfield-Mask: 0x01) */
+
+// DPUSR1R
+#define LINK_REG_DPUSR1R_DVBSTSH_Pos       (23UL)       /* DVBSTSH (Bit 23) */
+#define LINK_REG_DPUSR1R_DVBSTSH_Msk       (0x800000UL) /* DVBSTSH (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_DOVCBH_Pos        (21UL)       /* DOVCBH (Bit 21) */
+#define LINK_REG_DPUSR1R_DOVCBH_Msk        (0x200000UL) /* DOVCBH (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_DOVCAH_Pos        (20UL)       /* DOVCAH (Bit 20) */
+#define LINK_REG_DPUSR1R_DOVCAH_Msk        (0x100000UL) /* DOVCAH (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_DVBSTSHE_Pos      (7UL)        /* DVBSTSHE (Bit 7) */
+#define LINK_REG_DPUSR1R_DVBSTSHE_Msk      (0x80UL)     /* DVBSTSHE (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_DOVCBHE_Pos       (5UL)        /* DOVCBHE (Bit 5) */
+#define LINK_REG_DPUSR1R_DOVCBHE_Msk       (0x20UL)     /* DOVCBHE (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_DOVCAHE_Pos       (4UL)        /* DOVCAHE (Bit 4) */
+#define LINK_REG_DPUSR1R_DOVCAHE_Msk       (0x10UL)     /* DOVCAHE (Bitfield-Mask: 0x01) */
+
+// DPUSR2R
+#define LINK_REG_DPUSR2R_DMINTE_Pos        (9UL)        /* DMINTE (Bit 9) */
+#define LINK_REG_DPUSR2R_DMINTE_Msk        (0x200UL)    /* DMINTE (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR2R_DPINTE_Pos        (8UL)        /* DPINTE (Bit 8) */
+#define LINK_REG_DPUSR2R_DPINTE_Msk        (0x100UL)    /* DPINTE (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR2R_DMVAL_Pos         (5UL)        /* DMVAL (Bit 5) */
+#define LINK_REG_DPUSR2R_DMVAL_Msk         (0x20UL)     /* DMVAL (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR2R_DPVAL_Pos         (4UL)        /* DPVAL (Bit 4) */
+#define LINK_REG_DPUSR2R_DPVAL_Msk         (0x10UL)     /* DPVAL (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR2R_DMINT_Pos         (1UL)        /* DMINT (Bit 1) */
+#define LINK_REG_DPUSR2R_DMINT_Msk         (0x2UL)      /* DMINT (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR2R_DPINT_Pos         (0UL)        /* DPINT (Bit 0) */
+#define LINK_REG_DPUSR2R_DPINT_Msk         (0x1UL)      /* DPINT (Bitfield-Mask: 0x01) */
+
+// DPUSRCR
+#define LINK_REG_DPUSRCR_FIXPHYPD_Pos      (1UL)        /* FIXPHYPD (Bit 1) */
+#define LINK_REG_DPUSRCR_FIXPHYPD_Msk      (0x2UL)      /* FIXPHYPD (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSRCR_FIXPHY_Pos        (0UL)        /* FIXPHY (Bit 0) */
+#define LINK_REG_DPUSRCR_FIXPHY_Msk        (0x1UL)      /* FIXPHY (Bitfield-Mask: 0x01) */
+
+// DPUSR0R_FS
+#define LINK_REG_DPUSR0R_FS_DVBSTS0_Pos    (23UL)       /* DVBSTS0 (Bit 23) */
+#define LINK_REG_DPUSR0R_FS_DVBSTS0_Msk    (0x800000UL) /* DVBSTS0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR0R_FS_DOVCB0_Pos     (21UL)       /* DOVCB0 (Bit 21) */
+#define LINK_REG_DPUSR0R_FS_DOVCB0_Msk     (0x200000UL) /* DOVCB0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR0R_FS_DOVCA0_Pos     (20UL)       /* DOVCA0 (Bit 20) */
+#define LINK_REG_DPUSR0R_FS_DOVCA0_Msk     (0x100000UL) /* DOVCA0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR0R_FS_DM0_Pos        (17UL)       /* DM0 (Bit 17) */
+#define LINK_REG_DPUSR0R_FS_DM0_Msk        (0x20000UL)  /* DM0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR0R_FS_DP0_Pos        (16UL)       /* DP0 (Bit 16) */
+#define LINK_REG_DPUSR0R_FS_DP0_Msk        (0x10000UL)  /* DP0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR0R_FS_FIXPHY0_Pos    (4UL)        /* FIXPHY0 (Bit 4) */
+#define LINK_REG_DPUSR0R_FS_FIXPHY0_Msk    (0x10UL)     /* FIXPHY0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR0R_FS_DRPD0_Pos      (3UL)        /* DRPD0 (Bit 3) */
+#define LINK_REG_DPUSR0R_FS_DRPD0_Msk      (0x8UL)      /* DRPD0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR0R_FS_RPUE0_Pos      (1UL)        /* RPUE0 (Bit 1) */
+#define LINK_REG_DPUSR0R_FS_RPUE0_Msk      (0x2UL)      /* RPUE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR0R_FS_SRPC0_Pos      (0UL)        /* SRPC0 (Bit 0) */
+#define LINK_REG_DPUSR0R_FS_SRPC0_Msk      (0x1UL)      /* SRPC0 (Bitfield-Mask: 0x01) */
+
+// DPUSR1R_FS
+#define LINK_REG_DPUSR1R_FS_DVBINT0_Pos    (23UL)       /* DVBINT0 (Bit 23) */
+#define LINK_REG_DPUSR1R_FS_DVBINT0_Msk    (0x800000UL) /* DVBINT0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_FS_DOVRCRB0_Pos   (21UL)       /* DOVRCRB0 (Bit 21) */
+#define LINK_REG_DPUSR1R_FS_DOVRCRB0_Msk   (0x200000UL) /* DOVRCRB0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_FS_DOVRCRA0_Pos   (20UL)       /* DOVRCRA0 (Bit 20) */
+#define LINK_REG_DPUSR1R_FS_DOVRCRA0_Msk   (0x100000UL) /* DOVRCRA0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_FS_DMINT0_Pos     (17UL)       /* DMINT0 (Bit 17) */
+#define LINK_REG_DPUSR1R_FS_DMINT0_Msk     (0x20000UL)  /* DMINT0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_FS_DPINT0_Pos     (16UL)       /* DPINT0 (Bit 16) */
+#define LINK_REG_DPUSR1R_FS_DPINT0_Msk     (0x10000UL)  /* DPINT0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_FS_DVBSE0_Pos     (7UL)        /* DVBSE0 (Bit 7) */
+#define LINK_REG_DPUSR1R_FS_DVBSE0_Msk     (0x80UL)     /* DVBSE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_FS_DOVRCRBE0_Pos  (5UL)        /* DOVRCRBE0 (Bit 5) */
+#define LINK_REG_DPUSR1R_FS_DOVRCRBE0_Msk  (0x20UL)     /* DOVRCRBE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_FS_DOVRCRAE0_Pos  (4UL)        /* DOVRCRAE0 (Bit 4) */
+#define LINK_REG_DPUSR1R_FS_DOVRCRAE0_Msk  (0x10UL)     /* DOVRCRAE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_FS_DMINTE0_Pos    (1UL)        /* DMINTE0 (Bit 1) */
+#define LINK_REG_DPUSR1R_FS_DMINTE0_Msk    (0x2UL)      /* DMINTE0 (Bitfield-Mask: 0x01) */
+#define LINK_REG_DPUSR1R_FS_DPINTE0_Pos    (0UL)        /* DPINTE0 (Bit 0) */
+#define LINK_REG_DPUSR1R_FS_DPINTE0_Msk    (0x1UL)      /* DPINTE0 (Bitfield-Mask: 0x01) */
 
 /*--------------------------------------------------------------------*/
 /* Register Bit Utils                                           */
 /*--------------------------------------------------------------------*/
-#define LINK_REG_PIPE_CTR_PID_NAK   (0U << LINK_REG_PIPE_CTR_PID_Pos) /* NAK response */
-#define LINK_REG_PIPE_CTR_PID_BUF   (1U << LINK_REG_PIPE_CTR_PID_Pos) /* BUF response (depends buffer state) */
-#define LINK_REG_PIPE_CTR_PID_STALL (2U << LINK_REG_PIPE_CTR_PID_Pos) /* STALL response */
+#define LINK_REG_PIPE_CTR_PID_NAK          (0U << LINK_REG_PIPE_CTR_PID_Pos)    /* NAK response */
+#define LINK_REG_PIPE_CTR_PID_BUF          (1U << LINK_REG_PIPE_CTR_PID_Pos)    /* BUF response (depends buffer state) */
+#define LINK_REG_PIPE_CTR_PID_STALL        (2U << LINK_REG_PIPE_CTR_PID_Pos)    /* STALL response */
 
-#define LINK_REG_DVSTCTR0_RHST_LS	(1U << LINK_REG_DVSTCTR0_RHST_Pos) /*  Low-speed connection */
-#define LINK_REG_DVSTCTR0_RHST_FS	(2U << LINK_REG_DVSTCTR0_RHST_Pos) /*  Full-speed connection */
+#define LINK_REG_DVSTCTR0_RHST_LS          (1U << LINK_REG_DVSTCTR0_RHST_Pos)   /*  Low-speed connection */
+#define LINK_REG_DVSTCTR0_RHST_FS          (2U << LINK_REG_DVSTCTR0_RHST_Pos)   /*  Full-speed connection */
 
-#define LINK_REG_DEVADD_USBSPD_LS (1U << LINK_REG_DEVADD_USBSPD_Pos) /* Target Device Low-speed */
-#define LINK_REG_DEVADD_USBSPD_FS (2U << LINK_REG_DEVADD_USBSPD_Pos) /* Target Device Full-speed */
+#define LINK_REG_DEVADD_USBSPD_LS          (1U << LINK_REG_DEVADD_USBSPD_Pos)   /* Target Device Low-speed */
+#define LINK_REG_DEVADD_USBSPD_FS          (2U << LINK_REG_DEVADD_USBSPD_Pos)   /* Target Device Full-speed */
 
-#define LINK_REG_CFIFOSEL_ISEL_WRITE	(1U << LINK_REG_CFIFOSEL_ISEL_Pos)	/* FIFO write AKA TX*/
+#define LINK_REG_CFIFOSEL_ISEL_WRITE       (1U << LINK_REG_CFIFOSEL_ISEL_Pos)   /* FIFO write AKA TX*/
 
-#define LINK_REG_FIFOSEL_BIGEND			(1U << LINK_REG_CFIFOSEL_BIGEND_Pos)	/* FIFO Big Endian */
-#define LINK_REG_FIFOSEL_MBW_8BIT			(0U << LINK_REG_CFIFOSEL_MBW_Pos)	/* 8-bit width */
-#define LINK_REG_FIFOSEL_MBW_16BIT			(1U << LINK_REG_CFIFOSEL_MBW_Pos)	/* 16-bit width */
+#define LINK_REG_FIFOSEL_BIGEND            (1U << LINK_REG_CFIFOSEL_BIGEND_Pos) /* FIFO Big Endian */
+#define LINK_REG_FIFOSEL_MBW_8BIT          (0U << LINK_REG_CFIFOSEL_MBW_Pos)    /* 8-bit width */
+#define LINK_REG_FIFOSEL_MBW_16BIT         (1U << LINK_REG_CFIFOSEL_MBW_Pos)    /* 16-bit width */
 
-#define LINK_REG_INTSTS0_CTSQ_CTRL_RDATA (1U << LINK_REG_INTSTS0_CTSQ_Pos)
+#define LINK_REG_INTSTS0_CTSQ_CTRL_RDATA   (1U << LINK_REG_INTSTS0_CTSQ_Pos)
 
-#define LINK_REG_INTSTS0_DVSQ_STATE_DEF (1U << LINK_REG_INTSTS0_DVSQ_Pos) /* Default state */
-#define LINK_REG_INTSTS0_DVSQ_STATE_ADDR (2U << LINK_REG_INTSTS0_DVSQ_Pos) /* Address state */
-#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP0 (4U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */
-#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP1 (5U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */
-#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP2 (6U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */
-#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP3 (7U << LINK_REG_INTSTS0_DVSQ_Pos) /* Suspend state */
+#define LINK_REG_INTSTS0_DVSQ_STATE_DEF    (1U << LINK_REG_INTSTS0_DVSQ_Pos)    /* Default state */
+#define LINK_REG_INTSTS0_DVSQ_STATE_ADDR   (2U << LINK_REG_INTSTS0_DVSQ_Pos)    /* Address state */
+#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP0  (4U << LINK_REG_INTSTS0_DVSQ_Pos)    /* Suspend state */
+#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP1  (5U << LINK_REG_INTSTS0_DVSQ_Pos)    /* Suspend state */
+#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP2  (6U << LINK_REG_INTSTS0_DVSQ_Pos)    /* Suspend state */
+#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP3  (7U << LINK_REG_INTSTS0_DVSQ_Pos)    /* Suspend state */
 
-#define LINK_REG_PIPECFG_TYPE_BULK (1U << LINK_REG_PIPECFG_TYPE_Pos)
-#define LINK_REG_PIPECFG_TYPE_INT (2U << LINK_REG_PIPECFG_TYPE_Pos)
-#define LINK_REG_PIPECFG_TYPE_ISO (3U << LINK_REG_PIPECFG_TYPE_Pos)
+#define LINK_REG_PIPECFG_TYPE_BULK         (1U << LINK_REG_PIPECFG_TYPE_Pos)
+#define LINK_REG_PIPECFG_TYPE_INT          (2U << LINK_REG_PIPECFG_TYPE_Pos)
+#define LINK_REG_PIPECFG_TYPE_ISO          (3U << LINK_REG_PIPECFG_TYPE_Pos)
+
+//--------------------------------------------------------------------+
+// Static Assert
+//--------------------------------------------------------------------+
+
+TU_VERIFY_STATIC(sizeof(LINK_REG_PIPE_TR_t) == 4, "incorrect size");
+
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, SYSCFG     ) == 0x00000000, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, BUSWAIT    ) == 0x00000002, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, SYSSTS0    ) == 0x00000004, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PLLSTA     ) == 0x00000006, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DVSTCTR0   ) == 0x00000008, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, TESTMODE   ) == 0x0000000C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFO      ) == 0x00000014, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFO     ) == 0x00000018, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFO     ) == 0x0000001C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFOSEL   ) == 0x00000020, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFOCTR   ) == 0x00000022, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFOSEL  ) == 0x00000028, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFOCTR  ) == 0x0000002A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFOSEL  ) == 0x0000002C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFOCTR  ) == 0x0000002E, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTENB0    ) == 0x00000030, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTENB1    ) == 0x00000032, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, BRDYENB    ) == 0x00000036, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, NRDYENB    ) == 0x00000038, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, BEMPENB    ) == 0x0000003A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, SOFCFG     ) == 0x0000003C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PHYSET     ) == 0x0000003E, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTSTS0    ) == 0x00000040, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTSTS1    ) == 0x00000042, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, BRDYSTS    ) == 0x00000046, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, NRDYSTS    ) == 0x00000048, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, BEMPSTS    ) == 0x0000004A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, FRMNUM     ) == 0x0000004C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, UFRMNUM    ) == 0x0000004E, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBADDR    ) == 0x00000050, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBREQ     ) == 0x00000054, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBVAL     ) == 0x00000056, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBINDX    ) == 0x00000058, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBLENG    ) == 0x0000005A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPCFG     ) == 0x0000005C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPMAXP    ) == 0x0000005E, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPCTR     ) == 0x00000060, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPESEL    ) == 0x00000064, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPECFG    ) == 0x00000068, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPEMAXP   ) == 0x0000006C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPEPERI   ) == 0x0000006E, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPE_CTR   ) == 0x00000070, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPE_TR    ) == 0x00000090, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBBCCTRL0 ) == 0x000000B0, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, UCKSEL     ) == 0x000000C4, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBMC      ) == 0x000000CC, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DEVADD     ) == 0x000000D0, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PHYSLEW    ) == 0x000000F0, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, LPCTRL     ) == 0x00000100, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, LPSTS      ) == 0x00000102, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, BCCTRL     ) == 0x00000140, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PL1CTRL1   ) == 0x00000144, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, PL1CTRL2   ) == 0x00000146, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, HL1CTRL1   ) == 0x00000148, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, HL1CTRL2   ) == 0x0000014A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR0R    ) == 0x00000160, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR1R    ) == 0x00000164, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR2R    ) == 0x00000168, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSRCR    ) == 0x0000016A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR0R_FS ) == 0x00000400, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR1R_FS ) == 0x00000404, "incorrect offset");
 
 #ifdef __cplusplus
 }

From 0f8e530de175e8fb289870fdd7c28ec0b16314e2 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 8 Mar 2023 23:00:01 +0700
Subject: [PATCH 126/691] fix incorrect merge of hcd link

---
 src/portable/renesas/link/hcd_link.c | 476 +++++++++++----------------
 1 file changed, 190 insertions(+), 286 deletions(-)

diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/link/hcd_link.c
index a10fe54ea..f1ea2b821 100644
--- a/src/portable/renesas/link/hcd_link.c
+++ b/src/portable/renesas/link/hcd_link.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2021 Koji Kitayama
@@ -27,86 +27,37 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUH_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_RX63X || \
-                               CFG_TUSB_MCU == OPT_MCU_RX65X || \
-                               CFG_TUSB_MCU == OPT_MCU_RX72N )
+#if CFG_TUH_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || \
+                        CFG_TUSB_MCU == OPT_MCU_RX65X || \
+                        CFG_TUSB_MCU == OPT_MCU_RX72N || \
+                        CFG_TUSB_MCU == OPT_MCU_RAXXX)
+
 #include "host/hcd.h"
-#include "iodefine.h"
+#include "link_type.h"
+
+#if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
+#include "link_rx.h"
+#elif TU_CHECK_MCU(OPT_MCU_RAXXX)
+#include "link_ra.h"
+#else
+#error "Unsupported MCU"
+#endif
 
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM DECLARATION
 //--------------------------------------------------------------------+
-#define SYSTEM_PRCR_PRC1     (1<<1)
-#define SYSTEM_PRCR_PRKEY    (0xA5u<<8)
 
-#define USB_DVSTCTR0_LOW     (1u)
-#define USB_DVSTCTR0_FULL    (2u)
+/* LINK core registers */
+#if defined(__CCRX__)
+#define LINK_REG ((LINK_REG_t __evenaccess*)LINK_REG_BASE)
+#else
+#define LINK_REG ((LINK_REG_t*)LINK_REG_BASE)
+#endif
 
-#define USB_FIFOSEL_TX       ((uint16_t)(1u<<5))
-#define USB_FIFOSEL_BIGEND   ((uint16_t)(1u<<8))
-#define USB_FIFOSEL_MBW_8    ((uint16_t)(0u<<10))
-#define USB_FIFOSEL_MBW_16   ((uint16_t)(1u<<10))
-#define USB_IS0_CTSQ         ((uint16_t)(7u))
-#define USB_IS0_DVSQ         ((uint16_t)(7u<<4))
-#define USB_IS0_VALID        ((uint16_t)(1u<<3))
-#define USB_IS0_BRDY         ((uint16_t)(1u<<8))
-#define USB_IS0_NRDY         ((uint16_t)(1u<<9))
-#define USB_IS0_BEMP         ((uint16_t)(1u<<10))
-#define USB_IS0_CTRT         ((uint16_t)(1u<<11))
-#define USB_IS0_DVST         ((uint16_t)(1u<<12))
-#define USB_IS0_SOFR         ((uint16_t)(1u<<13))
-#define USB_IS0_RESM         ((uint16_t)(1u<<14))
-#define USB_IS0_VBINT        ((uint16_t)(1u<<15))
-#define USB_IS1_SACK         ((uint16_t)(1u<<4))
-#define USB_IS1_SIGN         ((uint16_t)(1u<<5))
-#define USB_IS1_EOFERR       ((uint16_t)(1u<<6))
-#define USB_IS1_ATTCH        ((uint16_t)(1u<<11))
-#define USB_IS1_DTCH         ((uint16_t)(1u<<12))
-#define USB_IS1_BCHG         ((uint16_t)(1u<<14))
-#define USB_IS1_OVRCR        ((uint16_t)(1u<<15))
-
-#define USB_IS0_CTSQ_MSK     (7u)
-#define USB_IS0_CTSQ_SETUP   (1u)
-#define USB_IS0_DVSQ_DEF     (1u<<4)
-#define USB_IS0_DVSQ_ADDR    (2u<<4)
-#define USB_IS0_DVSQ_SUSP0   (4u<<4)
-#define USB_IS0_DVSQ_SUSP1   (5u<<4)
-#define USB_IS0_DVSQ_SUSP2   (6u<<4)
-#define USB_IS0_DVSQ_SUSP3   (7u<<4)
-
-#define USB_PIPECTR_PID_MSK   (3u)
-#define USB_PIPECTR_PID_NAK   (0u)
-#define USB_PIPECTR_PID_BUF   (1u)
-#define USB_PIPECTR_PID_STALL (2u)
-#define USB_PIPECTR_CCPL      (1u<<2)
-#define USB_PIPECTR_SQMON     (1u<<6)
-#define USB_PIPECTR_SQCLR     (1u<<8)
-#define USB_PIPECTR_ACLRM     (1u<<9)
-#define USB_PIPECTR_INBUFM    (1u<<14)
-#define USB_PIPECTR_BSTS      (1u<<15)
-
-#define USB_FIFOCTR_DTLN     (0x1FF)
-#define USB_FIFOCTR_FRDY     (1u<<13)
-#define USB_FIFOCTR_BCLR     (1u<<14)
-#define USB_FIFOCTR_BVAL     (1u<<15)
-
-#define USB_PIPECFG_SHTNAK   (1u<<7)
-#define USB_PIPECFG_DBLB     (1u<<9)
-#define USB_PIPECFG_BULK     (1u<<14)
-#define USB_PIPECFG_ISO      (3u<<14)
-#define USB_PIPECFG_INT      (2u<<14)
-
-#define USB_DEVADD_LOW       (1u<<6)
-#define USB_DEVADD_FULL      (2u<<6)
-
-#define FIFO_REQ_CLR         (1u)
-#define FIFO_COMPLETE        (1u<<1)
-
-// Start of definition of packed structs (used by the CCRX toolchain)
 TU_ATTR_PACKED_BEGIN
 TU_ATTR_BIT_FIELD_ORDER_BEGIN
 
-typedef struct {
+typedef struct TU_ATTR_PACKED {
   union {
     struct {
       uint16_t      : 8;
@@ -119,7 +70,7 @@ typedef struct {
   uint16_t TRN;
 } reg_pipetre_t;
 
-typedef union {
+typedef union TU_ATTR_PACKED {
   struct {
     volatile uint16_t u8: 8;
     volatile uint16_t   : 0;
@@ -127,8 +78,7 @@ typedef union {
   volatile uint16_t u16;
 } hw_fifo_t;
 
-typedef struct TU_ATTR_PACKED
-{
+typedef struct TU_ATTR_PACKED {
   void      *buf;      /* the start address of a transfer data buffer */
   uint16_t  length;    /* the number of bytes in the buffer */
   uint16_t  remaining; /* the number of bytes remaining in the buffer */
@@ -156,28 +106,6 @@ typedef struct
 //--------------------------------------------------------------------+
 static hcd_data_t _hcd;
 
-static uint32_t disable_interrupt(void)
-{
-  uint32_t pswi;
-#if defined(__CCRX__)
-  pswi = get_psw() & 0x010000;
-  clrpsw_i();
-#else
-  pswi = __builtin_rx_mvfc(0) & 0x010000;
-  __builtin_rx_clrpsw('I');
-#endif
-  return pswi;
-}
-
-static void enable_interrupt(uint32_t pswi)
-{
-#if defined(__CCRX__)
-  set_psw(get_psw() | pswi);
-#else
-  __builtin_rx_mvtc(0, __builtin_rx_mvfc(0) | pswi);
-#endif
-}
-
 static unsigned find_pipe(unsigned xfer)
 {
   switch (xfer) {
@@ -208,58 +136,49 @@ static unsigned find_pipe(unsigned xfer)
 
 static volatile uint16_t* get_pipectr(unsigned num)
 {
-  volatile uint16_t *ctr = NULL;
   if (num) {
-    ctr = (volatile uint16_t*)&USB0.PIPE1CTR.WORD;
-    ctr += num - 1;
+    return (volatile uint16_t*)&(LINK_REG->PIPE_CTR[num - 1]);
   } else {
-    ctr = (volatile uint16_t*)&USB0.DCPCTR.WORD;
+    return (volatile uint16_t*)&(LINK_REG->DCPCTR);
   }
-  return ctr;
 }
 
 static volatile reg_pipetre_t* get_pipetre(unsigned num)
 {
   volatile reg_pipetre_t* tre = NULL;
   if ((1 <= num) && (num <= 5)) {
-    tre = (volatile reg_pipetre_t*)&USB0.PIPE1TRE.WORD;
-    tre += num - 1;
+    tre = (volatile reg_pipetre_t*)&(LINK_REG->PIPE_TR[num - 1].E);
   }
   return tre;
 }
 
 static volatile uint16_t* addr_to_pipectr(uint8_t dev_addr, unsigned ep_addr)
 {
-  volatile uint16_t *ctr = NULL;
-  const unsigned epn   = tu_edpt_number(ep_addr);
+  const unsigned epn = tu_edpt_number(ep_addr);
   if (epn) {
     const unsigned dir_in = tu_edpt_dir(ep_addr);
-    const unsigned num    = _hcd.ep[dev_addr][dir_in][epn - 1];
-    if (num) {
-      ctr = (volatile uint16_t*)&USB0.PIPE1CTR.WORD;
-      ctr += num - 1;
-    }
+    const unsigned num = _hcd.ep[dev_addr][dir_in][epn - 1];
+    return get_pipectr(num);
   } else {
-    ctr = (volatile uint16_t*)&USB0.DCPCTR.WORD;
+    return get_pipectr(0);
   }
-  return ctr;
 }
 
 static unsigned edpt0_max_packet_size(void)
 {
-  return USB0.DCPMAXP.BIT.MXPS;
+  return LINK_REG->DCPMAXP_b.MXPS;
 }
 
 static unsigned edpt_max_packet_size(unsigned num)
 {
-  USB0.PIPESEL.WORD = num;
-  return USB0.PIPEMAXP.BIT.MXPS;
+  LINK_REG->PIPESEL = num;
+  return LINK_REG->PIPEMAXP_b.MXPS;
 }
 
 static inline void pipe_wait_for_ready(unsigned num)
 {
-  while (USB0.D0FIFOSEL.BIT.CURPIPE != num) ;
-  while (!USB0.D0FIFOCTR.BIT.FRDY) ;
+  while (LINK_REG->D0FIFOSEL_b.CURPIPE != num) ;
+  while (!LINK_REG->D0FIFOCTR_b.FRDY) ;
 }
 
 static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
@@ -290,21 +209,22 @@ static bool pipe0_xfer_in(void)
   const unsigned rem = pipe->remaining;
 
   const unsigned mps = edpt0_max_packet_size();
-  const unsigned vld = USB0.CFIFOCTR.BIT.DTLN;
+  const unsigned vld = LINK_REG->CFIFOCTR_b.DTLN;
   const unsigned len = TU_MIN(TU_MIN(rem, mps), vld);
   void          *buf = pipe->buf;
   if (len) {
-    USB0.DCPCTR.WORD = USB_PIPECTR_PID_NAK;
-    pipe_read_packet(buf, (volatile void*)&USB0.CFIFO.WORD, len);
+    LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK;
+    pipe_read_packet(buf, (volatile void*)&LINK_REG->CFIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
-  if (len < mps) USB0.CFIFOCTR.WORD = USB_FIFOCTR_BCLR;
+  if (len < mps)
+    LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
   pipe->remaining = rem - len;
   if ((len < mps) || (rem == len)) {
     pipe->buf = NULL;
     return true;
   }
-  USB0.DCPCTR.WORD = USB_PIPECTR_PID_BUF;
+  LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_BUF;
   return false;
 }
 
@@ -320,10 +240,11 @@ static bool pipe0_xfer_out(void)
   const unsigned len = TU_MIN(mps, rem);
   void          *buf = pipe->buf;
   if (len) {
-    pipe_write_packet(buf, (volatile void*)&USB0.CFIFO.WORD, len);
+    pipe_write_packet(buf, (volatile void*)&LINK_REG->CFIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
-  if (len < mps) USB0.CFIFOCTR.WORD = USB_FIFOCTR_BVAL;
+  if (len < mps)
+    LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
   pipe->remaining = rem - len;
   return false;
 }
@@ -333,20 +254,21 @@ static bool pipe_xfer_in(unsigned num)
   pipe_state_t  *pipe = &_hcd.pipe[num];
   const unsigned rem  = pipe->remaining;
 
-  USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_8;
+  LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_8BIT;
   const unsigned mps  = edpt_max_packet_size(num);
   pipe_wait_for_ready(num);
-  const unsigned vld  = USB0.D0FIFOCTR.BIT.DTLN;
+  const unsigned vld  = LINK_REG->D0FIFOCTR_b.DTLN;
   const unsigned len  = TU_MIN(TU_MIN(rem, mps), vld);
   void          *buf  = pipe->buf;
   if (len) {
-    pipe_read_packet(buf, (volatile void*)&USB0.D0FIFO.WORD, len);
+    pipe_read_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
-  if (len < mps) USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BCLR;
-  USB0.D0FIFOSEL.WORD = 0;
-  while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
-  pipe->remaining     = rem - len;
+  if (len < mps)
+    LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
+  LINK_REG->D0FIFOSEL = 0;
+  while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
+  pipe->remaining = rem - len;
   if ((len < mps) || (rem == len)) {
     pipe->buf = NULL;
     return NULL != buf;
@@ -364,18 +286,19 @@ static bool pipe_xfer_out(unsigned num)
     return true;
   }
 
-  USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
+  LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_16BIT | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0);
   const unsigned mps  = edpt_max_packet_size(num);
   pipe_wait_for_ready(num);
   const unsigned len  = TU_MIN(rem, mps);
   void          *buf  = pipe->buf;
   if (len) {
-    pipe_write_packet(buf, (volatile void*)&USB0.D0FIFO.WORD, len);
+    pipe_write_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
-  if (len < mps) USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BVAL;
-  USB0.D0FIFOSEL.WORD = 0;
-  while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
+  if (len < mps)
+    LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
+  LINK_REG->D0FIFOSEL = 0;
+  while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
   pipe->remaining = rem - len;
   return false;
 }
@@ -387,11 +310,12 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer,
 
   /* configure fifo direction and access unit settings */
   if (dir_in) { /* IN, a byte */
-    USB0.CFIFOSEL.WORD  = USB_FIFOSEL_MBW_8;
-    while (USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX) ;
-  } else {       /* OUT, 2 bytes */
-    USB0.CFIFOSEL.WORD  = USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
-    while (!(USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX)) ;
+    LINK_REG->CFIFOSEL = LINK_REG_FIFOSEL_MBW_8BIT;
+    while (LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE) ;
+  } else { /* OUT, 2 bytes */
+    LINK_REG->CFIFOSEL = LINK_REG_CFIFOSEL_ISEL_WRITE | LINK_REG_FIFOSEL_MBW_16BIT |
+             (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0);
+    while (!(LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE)) ;
   }
 
   pipe_state_t *pipe = &_hcd.pipe[0];
@@ -401,25 +325,25 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer,
   if (buflen) {
     pipe->buf     = buffer;
     if (!dir_in) { /* OUT */
-      TU_ASSERT(USB0.DCPCTR.BIT.BSTS && (USB0.USBREQ.WORD & 0x80));
+      TU_ASSERT(LINK_REG->DCPCTR_b.BSTS && (LINK_REG->USBREQ & 0x80));
       pipe0_xfer_out();
     }
   } else { /* ZLP */
     pipe->buf        = NULL;
     if (!dir_in) { /* OUT */
-      USB0.CFIFOCTR.WORD = USB_FIFOCTR_BVAL;
+      LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
     }
-    if (dir_in == USB0.DCPCFG.BIT.DIR) {
-      TU_ASSERT(USB_PIPECTR_PID_NAK == USB0.DCPCTR.BIT.PID);
-      USB0.DCPCTR.BIT.SQSET = 1;
-      USB0.DCPCFG.BIT.DIR = dir_in ^ 1;
+    if (dir_in == LINK_REG->DCPCFG_b.DIR) {
+      TU_ASSERT(LINK_REG_PIPE_CTR_PID_NAK == LINK_REG->DCPCTR_b.PID);
+      LINK_REG->DCPCTR_b.SQSET = 1;
+      LINK_REG->DCPCFG_b.DIR = dir_in ^ 1;
     }
   }
-  USB0.DCPCTR.WORD = USB_PIPECTR_PID_BUF;
+  LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_BUF;
   return true;
 }
 
-static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, uint16_t buflen)
+static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void *buffer, uint16_t buflen)
 {
   const unsigned epn    = tu_edpt_number(ep_addr);
   const unsigned dir_in = tu_edpt_dir(ep_addr);
@@ -435,23 +359,23 @@ static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, u
     if (buflen) {
       pipe_xfer_out(num);
     } else { /* ZLP */
-      USB0.D0FIFOSEL.WORD = num;
+      LINK_REG->D0FIFOSEL = num;
       pipe_wait_for_ready(num);
-      USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BVAL;
-      USB0.D0FIFOSEL.WORD = 0;
-      while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
+      LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
+      LINK_REG->D0FIFOSEL = 0;
+      while (LINK_REG->D0FIFOSEL_b.CURPIPE) continue; /* if CURPIPE bits changes, check written value */
     }
   } else {
     volatile uint16_t     *ctr = get_pipectr(num);
     volatile reg_pipetre_t *pt = get_pipetre(num);
     if (pt) {
       const unsigned     mps = edpt_max_packet_size(num);
-      if (*ctr & 0x3) *ctr = USB_PIPECTR_PID_NAK;
+      if (*ctr & 0x3) *ctr = LINK_REG_PIPE_CTR_PID_NAK;
       pt->TRE   = TU_BIT(8);
       pt->TRN   = (buflen + mps - 1) / mps;
       pt->TRENB = 1;
     }
-    *ctr = USB_PIPECTR_PID_BUF;
+    *ctr = LINK_REG_PIPE_CTR_PID_BUF;
   }
   return true;
 }
@@ -485,10 +409,10 @@ static void process_pipe_nrdy(uint8_t rhport, unsigned num)
   unsigned result;
   uint16_t volatile *ctr = get_pipectr(num);
   // TU_LOG1("NRDY %d %x\n", num, *ctr);
-  switch (*ctr & USB_PIPECTR_PID_MSK) {
+  switch (*ctr & LINK_REG_PIPE_CTR_PID_Msk) {
     default: return;
-    case USB_PIPECTR_PID_STALL: result = XFER_RESULT_STALLED; break;
-    case USB_PIPECTR_PID_NAK:   result = XFER_RESULT_FAILED;  break;
+    case LINK_REG_PIPE_CTR_PID_STALL: result = XFER_RESULT_STALLED; break;
+    case LINK_REG_PIPE_CTR_PID_NAK:   result = XFER_RESULT_FAILED;  break;
   }
   pipe_state_t *pipe = &_hcd.pipe[num];
   hcd_event_xfer_complete(pipe->dev, pipe->ep,
@@ -520,78 +444,60 @@ static void process_pipe_brdy(uint8_t rhport, unsigned num)
   }
 }
 
-
 /*------------------------------------------------------------------*/
 /* Host API
  *------------------------------------------------------------------*/
 bool hcd_init(uint8_t rhport)
 {
   (void)rhport;
-  /* Enable USB0 */
-  uint32_t pswi = disable_interrupt();
-  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
-  MSTP(USB0) = 0;
-  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
-  enable_interrupt(pswi);
-  USB0.SYSCFG.BIT.SCKE = 1;
-  while (!USB0.SYSCFG.BIT.SCKE) ;
-  USB0.SYSCFG.BIT.DPRPU = 0;
-  USB0.SYSCFG.BIT.DRPD = 0;
-  USB0.SYSCFG.BIT.DCFM = 1;
 
-  USB0.DVSTCTR0.BIT.VBUSEN = 1;
+  LINK_REG->SYSCFG_b.SCKE = 1;
+  while (!LINK_REG->SYSCFG_b.SCKE) ;
+  LINK_REG->SYSCFG_b.DPRPU = 0;
+  LINK_REG->SYSCFG_b.DRPD = 0;
+  LINK_REG->SYSCFG_b.DCFM = 1;
 
-  USB0.SYSCFG.BIT.DRPD = 1;
+  LINK_REG->DVSTCTR0_b.VBUSEN = 1;
+
+  LINK_REG->SYSCFG_b.DRPD = 1;
   for (volatile int i = 0; i < 30000; ++i) ;
-  USB0.SYSCFG.BIT.USBE = 1;
+  LINK_REG->SYSCFG_b.USBE = 1;
 
-  USB.DPUSR0R.BIT.FIXPHY0 = 0u;    /* USB0 Transceiver Output fixed */
-#if ( CFG_TUSB_MCU == OPT_MCU_RX72N )
-  USB0.PHYSLEW.LONG = 0x5;
-  IR(PERIB, INTB185) = 0;
-#else
-  IR(USB0, USBI0)   = 0;
-#endif
+  // MCU specific PHY init
+  link_phy_init();
+
+  LINK_REG->PHYSLEW = 0x5;
+  LINK_REG->DPUSR0R_FS_b.FIXPHY0 = 0u; /* Transceiver Output fixed */
 
   /* Setup default control pipe */
-  USB0.DCPCFG.WORD  = USB_PIPECFG_SHTNAK;
-  USB0.DCPMAXP.WORD = 64;
-  USB0.INTENB0.WORD = USB_IS0_BRDY | USB_IS0_NRDY | USB_IS0_BEMP;
-  USB0.INTENB1.WORD = USB_IS1_SACK | USB_IS1_SIGN |
-    USB_IS1_ATTCH | USB_IS1_DTCH;
-  USB0.BEMPENB.WORD = 1;
-  USB0.NRDYENB.WORD = 1;
-  USB0.BRDYENB.WORD = 1;
+  LINK_REG->DCPCFG = LINK_REG_PIPECFG_SHTNAK_Msk;
+  LINK_REG->DCPMAXP = 64;
+  LINK_REG->INTENB0 = LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_NRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk;
+  LINK_REG->INTENB1 = LINK_REG_INTSTS1_SACK_Msk | LINK_REG_INTSTS1_SIGN_Msk | LINK_REG_INTSTS1_ATTCH_Msk | LINK_REG_INTSTS1_DTCH_Msk;
+  LINK_REG->BEMPENB = 1;
+  LINK_REG->NRDYENB = 1;
+  LINK_REG->BRDYENB = 1;
+
   return true;
 }
 
 void hcd_int_enable(uint8_t rhport)
 {
-  (void)rhport;
-#if ( CFG_TUSB_MCU == OPT_MCU_RX72N )
-  IEN(PERIB, INTB185) = 1;
-#else
-  IEN(USB0, USBI0) = 1;
-#endif
+  link_int_enable(rhport);
 }
 
 void hcd_int_disable(uint8_t rhport)
 {
-  (void)rhport;
-#if ( CFG_TUSB_MCU == OPT_MCU_RX72N )
-  IEN(PERIB, INTB185) = 0;
-#else
-  IEN(USB0, USBI0) = 0;
-#endif
+  link_int_disable(rhport);
 }
 
 uint32_t hcd_frame_number(uint8_t rhport)
 {
   (void)rhport;
-  /* The device must be reset at least once after connection 
+  /* The device must be reset at least once after connection
    * in order to start the frame counter. */
   if (_hcd.need_reset) hcd_port_reset(rhport);
-  return USB0.FRMNUM.BIT.FRNM;
+  return LINK_REG->FRMNUM_b.FRNM;
 }
 
 /*--------------------------------------------------------------------+
@@ -605,18 +511,18 @@ bool hcd_port_connect_status(uint8_t rhport)
 
 void hcd_port_reset(uint8_t rhport)
 {
-  USB0.DCPCTR.WORD = USB_PIPECTR_PID_NAK;
-  while (USB0.DCPCTR.BIT.PBUSY) ;
+  LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK;
+  while (LINK_REG->DCPCTR_b.PBUSY) ;
   hcd_int_disable(rhport);
-  USB0.DVSTCTR0.BIT.UACT   = 0;
-  if (USB0.DCPCTR.BIT.SUREQ)
-    USB0.DCPCTR.BIT.SUREQCLR = 1;
+  LINK_REG->DVSTCTR0_b.UACT = 0;
+  if (LINK_REG->DCPCTR_b.SUREQ)
+    LINK_REG->DCPCTR_b.SUREQCLR = 1;
   hcd_int_enable(rhport);
   /* Reset should be asserted 10-20ms. */
-  USB0.DVSTCTR0.BIT.USBRST = 1;
+  LINK_REG->DVSTCTR0_b.USBRST = 1;
   for (volatile int i = 0; i < 2400000; ++i) ;
-  USB0.DVSTCTR0.BIT.USBRST = 0;
-  USB0.DVSTCTR0.BIT.UACT   = 1;
+  LINK_REG->DVSTCTR0_b.USBRST = 0;
+  LINK_REG->DVSTCTR0_b.UACT = 1;
   _hcd.need_reset = false;
 }
 
@@ -628,10 +534,10 @@ void hcd_port_reset_end(uint8_t rhport)
 tusb_speed_t hcd_port_speed_get(uint8_t rhport)
 {
   (void)rhport;
-  switch (USB0.DVSTCTR0.BIT.RHST) {
+  switch (LINK_REG->DVSTCTR0_b.RHST) {
     default: return TUSB_SPEED_INVALID;
-    case USB_DVSTCTR0_FULL: return TUSB_SPEED_FULL;
-    case USB_DVSTCTR0_LOW:  return TUSB_SPEED_LOW;
+    case LINK_REG_DVSTCTR0_RHST_FS: return TUSB_SPEED_FULL;
+    case LINK_REG_DVSTCTR0_RHST_LS:  return TUSB_SPEED_LOW;
   }
 }
 
@@ -647,13 +553,13 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
     unsigned num = *ep;
     if (!num || dev_addr != _hcd.pipe[num].dev) continue;
 
-    ctr  = (uint16_t volatile*)&USB0.PIPE1CTR.WORD + num - 1;
+    ctr = (uint16_t volatile*)&LINK_REG->PIPE_CTR[num - 1];
     *ctr = 0;
-    USB0.NRDYENB.WORD &= ~TU_BIT(num);
-    USB0.BRDYENB.WORD &= ~TU_BIT(num);
-    USB0.PIPESEL.WORD  = num;
-    USB0.PIPECFG.WORD  = 0;
-    USB0.PIPEMAXP.WORD = 0;
+    LINK_REG->NRDYENB &= ~TU_BIT(num);
+    LINK_REG->BRDYENB &= ~TU_BIT(num);
+    LINK_REG->PIPESEL = num;
+    LINK_REG->PIPECFG = 0;
+    LINK_REG->PIPEMAXP = 0;
 
     _hcd.pipe[num].ep  = 0;
     _hcd.pipe[num].dev = 0;
@@ -667,36 +573,36 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
 bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8])
 {
   (void)rhport;
-  //  TU_LOG1("S %d %x\n", dev_addr, USB0.DCPCTR.WORD);
+  //  TU_LOG1("S %d %x\n", dev_addr, LINK_REG->DCPCTR);
 
   TU_ASSERT(dev_addr < 6); /* USBa can only handle addresses from 0 to 5. */
-  TU_ASSERT(0 == USB0.DCPCTR.BIT.SUREQ);
+  TU_ASSERT(0 == LINK_REG->DCPCTR_b.SUREQ);
 
-  USB0.DCPCTR.WORD = USB_PIPECTR_PID_NAK;
+  LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK;
 
-  _hcd.pipe[0].buf       = NULL;
-  _hcd.pipe[0].length    = 8;
+  _hcd.pipe[0].buf = NULL;
+  _hcd.pipe[0].length = 8;
   _hcd.pipe[0].remaining = 0;
-  _hcd.pipe[0].dev       = dev_addr;
+  _hcd.pipe[0].dev = dev_addr;
 
-  while (USB0.DCPCTR.BIT.PBUSY) ;
-  USB0.DCPMAXP.WORD      = (dev_addr << 12) | _hcd.ctl_mps[dev_addr];
+  while (LINK_REG->DCPCTR_b.PBUSY) ;
+  LINK_REG->DCPMAXP = (dev_addr << 12) | _hcd.ctl_mps[dev_addr];
 
   /* Set direction in advance for DATA stage */
   uint8_t const bmRequesttype = setup_packet[0];
-  USB0.DCPCFG.BIT.DIR = tu_edpt_dir(bmRequesttype) ? 0: 1;
+  LINK_REG->DCPCFG_b.DIR = tu_edpt_dir(bmRequesttype) ? 0: 1;
 
   uint16_t const* p = (uint16_t const*)(uintptr_t)&setup_packet[0];
-  USB0.USBREQ.WORD = tu_htole16(p[0]);
-  USB0.USBVAL      = p[1];
-  USB0.USBINDX     = p[2];
-  USB0.USBLENG     = p[3];
+  LINK_REG->USBREQ = tu_htole16(p[0]);
+  LINK_REG->USBVAL = p[1];
+  LINK_REG->USBINDX = p[2];
+  LINK_REG->USBLENG = p[3];
 
-  USB0.DCPCTR.BIT.SUREQ = 1;
+  LINK_REG->DCPCTR_b.SUREQ = 1;
   return true;
 }
 
-bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc)
+bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const *ep_desc)
 {
   (void)rhport;
   TU_ASSERT(dev_addr < 6); /* USBa can only handle addresses from 0 to 5. */
@@ -705,14 +611,14 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
   const unsigned epn     = tu_edpt_number(ep_addr);
   const unsigned mps     = tu_edpt_packet_size(ep_desc);
   if (0 == epn) {
-    USB0.DCPCTR.WORD = USB_PIPECTR_PID_NAK;
+    LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK;
     hcd_devtree_info_t devtree;
     hcd_devtree_get_info(dev_addr, &devtree);
-    uint16_t volatile *devadd = (uint16_t volatile *)(uintptr_t)&USB0.DEVADD0.WORD;
+    uint16_t volatile *devadd = (uint16_t volatile *)(uintptr_t) &LINK_REG->DEVADD[0];
     devadd += dev_addr;
-    while (USB0.DCPCTR.BIT.PBUSY) ;
-    USB0.DCPMAXP.WORD = (dev_addr << 12) | mps;
-    *devadd = (TUSB_SPEED_FULL == devtree.speed) ? USB_DEVADD_FULL : USB_DEVADD_LOW;
+    while (LINK_REG->DCPCTR_b.PBUSY) ;
+    LINK_REG->DCPMAXP = (dev_addr << 12) | mps;
+    *devadd = (TUSB_SPEED_FULL == devtree.speed) ? LINK_REG_DEVADD_USBSPD_FS : LINK_REG_DEVADD_USBSPD_LS;
     _hcd.ctl_mps[dev_addr] = mps;
     return true;
   }
@@ -731,25 +637,25 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
 
   /* setup pipe */
   hcd_int_disable(rhport);
-  USB0.PIPESEL.WORD  = num;
-  USB0.PIPEMAXP.WORD = (dev_addr << 12) | mps;
+  LINK_REG->PIPESEL = num;
+  LINK_REG->PIPEMAXP = (dev_addr << 12) | mps;
   volatile uint16_t *ctr = get_pipectr(num);
-  *ctr = USB_PIPECTR_ACLRM | USB_PIPECTR_SQCLR;
+  *ctr = LINK_REG_PIPE_CTR_ACLRM_Msk | LINK_REG_PIPE_CTR_SQCLR_Msk;
   *ctr = 0;
   unsigned cfg = ((1 ^ dir_in) << 4) | epn;
   if (xfer == TUSB_XFER_BULK) {
-    cfg |= USB_PIPECFG_BULK | USB_PIPECFG_SHTNAK | USB_PIPECFG_DBLB;
+    cfg |= LINK_REG_PIPECFG_TYPE_BULK | LINK_REG_PIPECFG_SHTNAK_Msk | LINK_REG_PIPECFG_DBLB_Msk;
   } else if (xfer == TUSB_XFER_INTERRUPT) {
-    cfg |= USB_PIPECFG_INT;
+    cfg |= LINK_REG_PIPECFG_TYPE_INT;
   } else {
-    cfg |= USB_PIPECFG_ISO | USB_PIPECFG_DBLB;
+    cfg |= LINK_REG_PIPECFG_TYPE_ISO | LINK_REG_PIPECFG_DBLB_Msk;
   }
-  USB0.PIPECFG.WORD  = cfg;
-  USB0.BRDYSTS.WORD  = 0x1FFu ^ TU_BIT(num);
-  USB0.NRDYENB.WORD |= TU_BIT(num);
-  USB0.BRDYENB.WORD |= TU_BIT(num);
+  LINK_REG->PIPECFG = cfg;
+  LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num);
+  LINK_REG->NRDYENB |= TU_BIT(num);
+  LINK_REG->BRDYENB |= TU_BIT(num);
   if (!dir_in) {
-    *ctr = USB_PIPECTR_PID_BUF;
+    *ctr = LINK_REG_PIPE_CTR_PID_BUF;
   }
   hcd_int_enable(rhport);
 
@@ -776,12 +682,12 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
     *ctr = pid & 2;
     *ctr = 0;
   }
-  *ctr = USB_PIPECTR_SQCLR;
+  *ctr = LINK_REG_PIPE_CTR_SQCLR_Msk;
   unsigned const epn = tu_edpt_number(ep_addr);
   if (!epn) return true;
 
   if (!tu_edpt_dir(ep_addr)) { /* OUT */
-    *ctr = USB_PIPECTR_PID_BUF;
+    *ctr = LINK_REG_PIPE_CTR_PID_BUF;
   }
   return true;
 }
@@ -799,52 +705,50 @@ void hcd_int_handler(uint8_t rhport)
     20, 8, 19, 18};
 #endif
 
-  unsigned is1 = USB0.INTSTS1.WORD;
-  unsigned is0 = USB0.INTSTS0.WORD;
+  unsigned is1 = LINK_REG->INTSTS1;
+  unsigned is0 = LINK_REG->INTSTS0;
   /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */
-  USB0.INTSTS1.WORD = ~((USB_IS1_SACK | USB_IS1_SIGN | USB_IS1_ATTCH | USB_IS1_DTCH) & is1);
-  USB0.INTSTS0.WORD = ~((USB_IS0_BRDY | USB_IS0_NRDY | USB_IS0_BEMP) & is0);
+  LINK_REG->INTSTS1 = ~((LINK_REG_INTSTS1_SACK_Msk | LINK_REG_INTSTS1_SIGN_Msk | LINK_REG_INTSTS1_ATTCH_Msk | LINK_REG_INTSTS1_DTCH_Msk) & is1);
+  LINK_REG->INTSTS0 = ~((LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_NRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk) & is0);
   // TU_LOG1("IS %04x %04x\n", is0, is1);
-  is1 &= USB0.INTENB1.WORD;
-  is0 &= USB0.INTENB0.WORD;
+  is1 &= LINK_REG->INTENB1;
+  is0 &= LINK_REG->INTENB0;
 
-  if (is1 & USB_IS1_SACK) {
+  if (is1 & LINK_REG_INTSTS1_SACK_Msk) {
     /* Set DATA1 in advance for the next transfer. */
-    USB0.DCPCTR.BIT.SQSET = 1;
-    hcd_event_xfer_complete(USB0.DCPMAXP.BIT.DEVSEL,
-                            tu_edpt_addr(0, TUSB_DIR_OUT),
-                            8, XFER_RESULT_SUCCESS, true);
+    LINK_REG->DCPCTR_b.SQSET = 1;
+    hcd_event_xfer_complete(
+      LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true);
   }
-  if (is1 & USB_IS1_SIGN) {
-    hcd_event_xfer_complete(USB0.DCPMAXP.BIT.DEVSEL,
-                            tu_edpt_addr(0, TUSB_DIR_OUT),
-                            8, XFER_RESULT_FAILED, true);
+  if (is1 & LINK_REG_INTSTS1_SIGN_Msk) {
+    hcd_event_xfer_complete(
+      LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true);
   }
-  if (is1 & USB_IS1_ATTCH) {
-    USB0.DVSTCTR0.BIT.UACT = 1;
+  if (is1 & LINK_REG_INTSTS1_ATTCH_Msk) {
+    LINK_REG->DVSTCTR0_b.UACT = 1;
     _hcd.need_reset = true;
-    USB0.INTENB1.WORD = (USB0.INTENB1.WORD & ~USB_IS1_ATTCH) | USB_IS1_DTCH;
+    LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~LINK_REG_INTSTS1_ATTCH_Msk) | LINK_REG_INTSTS1_DTCH_Msk;
     hcd_event_device_attach(rhport, true);
   }
-  if (is1 & USB_IS1_DTCH) {
-    USB0.DVSTCTR0.BIT.UACT = 0;
-    if (USB0.DCPCTR.BIT.SUREQ)
-      USB0.DCPCTR.BIT.SUREQCLR = 1;
-    USB0.INTENB1.WORD = (USB0.INTENB1.WORD & ~USB_IS1_DTCH) | USB_IS1_ATTCH;
+  if (is1 & LINK_REG_INTSTS1_DTCH_Msk) {
+    LINK_REG->DVSTCTR0_b.UACT = 0;
+    if (LINK_REG->DCPCTR_b.SUREQ)
+      LINK_REG->DCPCTR_b.SUREQCLR = 1;
+    LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~LINK_REG_INTSTS1_DTCH_Msk) | LINK_REG_INTSTS1_ATTCH_Msk;
     hcd_event_device_remove(rhport, true);
   }
 
-  if (is0 & USB_IS0_BEMP) {
-    const unsigned s = USB0.BEMPSTS.WORD;
-    USB0.BEMPSTS.WORD = 0;
+  if (is0 & LINK_REG_INTSTS0_BEMP_Msk) {
+    const unsigned s = LINK_REG->BEMPSTS;
+    LINK_REG->BEMPSTS = 0;
     if (s & 1) {
       process_pipe0_bemp(rhport);
     }
   }
-  if (is0 & USB_IS0_NRDY) {
-    const unsigned m = USB0.NRDYENB.WORD;
-    unsigned s       = USB0.NRDYSTS.WORD & m;
-    USB0.NRDYSTS.WORD = ~s;
+  if (is0 & LINK_REG_INTSTS0_NRDY_Msk) {
+    const unsigned m = LINK_REG->NRDYENB;
+    unsigned s = LINK_REG->NRDYSTS & m;
+    LINK_REG->NRDYSTS = ~s;
     while (s) {
 #if defined(__CCRX__)
       const unsigned num = Mod37BitPosition[(-s & s) % 37];
@@ -855,11 +759,11 @@ void hcd_int_handler(uint8_t rhport)
       s &= ~TU_BIT(num);
     }
   }
-  if (is0 & USB_IS0_BRDY) {
-    const unsigned m = USB0.BRDYENB.WORD;
-    unsigned s       = USB0.BRDYSTS.WORD & m;
+  if (is0 & LINK_REG_INTSTS0_BRDY_Msk) {
+    const unsigned m = LINK_REG->BRDYENB;
+    unsigned s = LINK_REG->BRDYSTS & m;
     /* clear active bits (don't write 0 to already cleared bits according to the HW manual) */
-    USB0.BRDYSTS.WORD = ~s;
+    LINK_REG->BRDYSTS = ~s;
     while (s) {
 #if defined(__CCRX__)
       const unsigned num = Mod37BitPosition[(-s & s) % 37];

From f0ddf8d10f7d58592d2ebb60025b227c8047114d Mon Sep 17 00:00:00 2001
From: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Date: Thu, 9 Mar 2023 14:00:37 +0100
Subject: [PATCH 127/691] dcd_nrf5x: ISO OUT handling

For incoming ISO OUT packets it was possible to start
DMA from endpoint to RAM before transfer was started
resulting in unrelated memory corruption.
This is scenario that causes memory corruption:
- ISO OUT packet is received
- Packet is transferred by DMA to transfer buffer
- xfer->started is cleared and xfer->buffer is updated as
  it is in every case
- Application takes to long to handle it (it happens when debugger
  is connected breakpoint is hit slowing down software).
- Next ISO OUT packet arrives
At this point there was no check if transfer was started and packet
was copied by DMA to location beyond previous data, possibly overwriting
unrelated memory.

This solves the issue by checking that transfer was
started and there is buffer ready for incoming packet.
---
 src/portable/nordic/nrf5x/dcd_nrf5x.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c
index afc14b010..4aeb85fc0 100644
--- a/src/portable/nordic/nrf5x/dcd_nrf5x.c
+++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c
@@ -187,11 +187,16 @@ static void xact_out_dma(uint8_t epnum)
     }
     else
     {
-      // Trigger DMA move data from Endpoint -> SRAM
-      NRF_USBD->ISOOUT.PTR = (uint32_t) xfer->buffer;
-      NRF_USBD->ISOOUT.MAXCNT = xact_len;
+      if (xfer->started)
+      {
+        // Trigger DMA move data from Endpoint -> SRAM
+        NRF_USBD->ISOOUT.PTR = (uint32_t) xfer->buffer;
+        NRF_USBD->ISOOUT.MAXCNT = xact_len;
 
-      start_dma(&NRF_USBD->TASKS_STARTISOOUT);
+        start_dma(&NRF_USBD->TASKS_STARTISOOUT);
+      } else {
+        atomic_flag_clear(&_dcd.dma_running);
+      }
     }
   }
   else

From 76f43a7a16ae814abfc7e4eec84088a4a8e70bb4 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 10 Mar 2023 19:23:23 +0700
Subject: [PATCH 128/691] starting to remove submodule cmsis5 and nrfx

---
 .gitmodules                                | 6 ------
 hw/mcu/nordic/nrfx                         | 1 -
 lib/CMSIS_5                                | 1 -
 tools/{get_dependencies.py => get_deps.py} | 0
 4 files changed, 8 deletions(-)
 delete mode 160000 hw/mcu/nordic/nrfx
 delete mode 160000 lib/CMSIS_5
 rename tools/{get_dependencies.py => get_deps.py} (100%)

diff --git a/.gitmodules b/.gitmodules
index 14f47746b..c3baaa1be 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -1,6 +1,3 @@
-[submodule "hw/mcu/nordic/nrfx"]
-	path = hw/mcu/nordic/nrfx
-	url = https://github.com/NordicSemiconductor/nrfx.git
 [submodule "tools/uf2"]
 	path = tools/uf2
 	url = https://github.com/microsoft/uf2.git
@@ -109,9 +106,6 @@
 [submodule "lib/FreeRTOS-Kernel"]
 	path = lib/FreeRTOS-Kernel
 	url = https://github.com/FreeRTOS/FreeRTOS-Kernel.git
-[submodule "lib/CMSIS_5"]
-	path = lib/CMSIS_5
-	url = https://github.com/ARM-software/CMSIS_5.git
 [submodule "hw/mcu/silabs/cmsis-dfp-efm32gg12b"]
 	path = hw/mcu/silabs/cmsis-dfp-efm32gg12b
 	url = https://github.com/cmsis-packs/cmsis-dfp-efm32gg12b
diff --git a/hw/mcu/nordic/nrfx b/hw/mcu/nordic/nrfx
deleted file mode 160000
index 281cc2e17..000000000
--- a/hw/mcu/nordic/nrfx
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 281cc2e178fd9a470d844b3afdea9eb322a0b0e8
diff --git a/lib/CMSIS_5 b/lib/CMSIS_5
deleted file mode 160000
index 202852626..000000000
--- a/lib/CMSIS_5
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 20285262657d1b482d132d20d755c8c330d55c1f
diff --git a/tools/get_dependencies.py b/tools/get_deps.py
similarity index 100%
rename from tools/get_dependencies.py
rename to tools/get_deps.py

From d41320a42eae7fd26075f7c91972254c7f03ede6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 10 Mar 2023 20:49:11 +0700
Subject: [PATCH 129/691] adding python script to manage dependencies instead
 of submodule

---
 .github/workflows/build_aarch64.yml |   2 +-
 .github/workflows/build_arm.yml     |   2 +-
 .github/workflows/build_iar.yml     |   2 +-
 .github/workflows/build_msp430.yml  |   2 +-
 .github/workflows/build_renesas.yml |   2 +-
 .github/workflows/build_riscv.yml   |   2 +-
 .github/workflows/build_win_mac.yml |   2 +-
 examples/rules.mk                   |   2 +-
 tools/get_deps.py                   | 104 +++++++++++++++++++++++-----
 tools/get_family_deps.py            |  19 +++++
 10 files changed, 115 insertions(+), 24 deletions(-)
 create mode 100644 tools/get_family_deps.py

diff --git a/.github/workflows/build_aarch64.yml b/.github/workflows/build_aarch64.yml
index 800a54380..5818ea432 100644
--- a/.github/workflows/build_aarch64.yml
+++ b/.github/workflows/build_aarch64.yml
@@ -72,7 +72,7 @@ jobs:
       run: echo >> $GITHUB_PATH `echo ~/cache/toolchain/*/bin`
 
     - name: Get Dependencies
-      run: python3 tools/get_dependencies.py ${{ matrix.family }}
+      run: python3 tools/get_family_deps.py ${{ matrix.family }}
 
     - name: Build
       run: python3 tools/build_family.py ${{ matrix.family }}
diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index b1b88ec70..2ed40e186 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -80,7 +80,7 @@ jobs:
         echo >> $GITHUB_ENV PICO_SDK_PATH=~/pico-sdk
 
     - name: Get Dependencies
-      run: python3 tools/get_dependencies.py ${{ matrix.family }}
+      run: python3 tools/get_family_deps.py ${{ matrix.family }}
 
     - name: Build
       run: python3 tools/build_family.py ${{ matrix.family }}
diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml
index 33e77c3dc..7f2a92010 100644
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@@ -45,7 +45,7 @@ jobs:
     - name: Checkout submodules and dependencies
       run: |
         git submodule update --init lib/FreeRTOS-Kernel lib/lwip lib/sct_neopixel
-        python3 tools/get_dependencies.py ${{ matrix.family }}
+        python3 tools/get_family_deps.py ${{ matrix.family }}
 
     #- name: Checkout pico-sdk for rp2040
     #  if: matrix.family == 'rp2040'
diff --git a/.github/workflows/build_msp430.yml b/.github/workflows/build_msp430.yml
index 2c7785806..6832c54b3 100644
--- a/.github/workflows/build_msp430.yml
+++ b/.github/workflows/build_msp430.yml
@@ -70,7 +70,7 @@ jobs:
       run: echo >> $GITHUB_PATH `echo ~/cache/toolchain/*/bin`
 
     - name: Get Dependencies
-      run: python3 tools/get_dependencies.py ${{ matrix.family }}
+      run: python3 tools/get_family_deps.py ${{ matrix.family }}
 
     - name: Build
       run: python3 tools/build_family.py ${{ matrix.family }}
diff --git a/.github/workflows/build_renesas.yml b/.github/workflows/build_renesas.yml
index 3a961d327..7ce674485 100644
--- a/.github/workflows/build_renesas.yml
+++ b/.github/workflows/build_renesas.yml
@@ -70,7 +70,7 @@ jobs:
       run: echo >> $GITHUB_PATH `echo ~/cache/toolchain/*/bin`
 
     - name: Get Dependencies
-      run: python3 tools/get_dependencies.py ${{ matrix.family }}
+      run: python3 tools/get_family_deps.py ${{ matrix.family }}
 
     - name: Build
       run: python3 tools/build_family.py ${{ matrix.family }}
diff --git a/.github/workflows/build_riscv.yml b/.github/workflows/build_riscv.yml
index fb4d4d28c..876ebbdef 100644
--- a/.github/workflows/build_riscv.yml
+++ b/.github/workflows/build_riscv.yml
@@ -71,7 +71,7 @@ jobs:
       run: echo >> $GITHUB_PATH `echo ~/cache/toolchain/*/bin`
 
     - name: Get Dependencies
-      run: python3 tools/get_dependencies.py ${{ matrix.family }}
+      run: python3 tools/get_family_deps.py ${{ matrix.family }}
 
     - name: Build
       run: python3 tools/build_family.py ${{ matrix.family }}
diff --git a/.github/workflows/build_win_mac.yml b/.github/workflows/build_win_mac.yml
index bad9f3162..7c884abd9 100644
--- a/.github/workflows/build_win_mac.yml
+++ b/.github/workflows/build_win_mac.yml
@@ -50,7 +50,7 @@ jobs:
       run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip
 
     - name: Get Dependencies
-      run: python3 tools/get_dependencies.py stm32f4
+      run: python3 tools/get_family_deps.py stm32f4
 
     - name: Build
       run: python3 tools/build_family.py stm32f4 stm32f411disco
diff --git a/examples/rules.mk b/examples/rules.mk
index 7f3535bba..f8e4001ec 100644
--- a/examples/rules.mk
+++ b/examples/rules.mk
@@ -193,7 +193,7 @@ endif
 .PHONY: get-deps
 get-deps:
   ifdef DEPS_SUBMODULES
-	git -C $(TOP) submodule update --init $(DEPS_SUBMODULES)
+	$(PYTHON) $(TOP)/tools/get_deps.py $(DEPS_SUBMODULES)
   endif
 
 .PHONY: size
diff --git a/tools/get_deps.py b/tools/get_deps.py
index e7d3e0a76..7ce02cc33 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -1,25 +1,97 @@
-import os
 import sys
 import subprocess
+from pathlib import Path
+
+# path, url, commit
+deps_list = {
+    'hw/mcu/allwinner'                            : [ 'https://github.com/hathach/allwinner_driver.git',                '8e5e89e8e132c0fd90e72d5422e5d3d68232b756'],
+    'hw/mcu/bridgetek/ft9xx/ft90x-sdk'            : [ 'https://github.com/BRTSG-FOSS/ft90x-sdk.git',                    '91060164afe239fcb394122e8bf9eb24d3194eb1'],
+    'hw/mcu/broadcom'                             : [ 'https://github.com/adafruit/broadcom-peripherals.git',           '08370086080759ed54ac1136d62d2ad24c6fa267'],
+    'hw/mcu/gd/nuclei-sdk'                        : [ 'https://github.com/Nuclei-Software/nuclei-sdk.git',              '7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7'],
+    'hw/mcu/infineon/mtb-xmclib-cat3'             : [ 'https://github.com/Infineon/mtb-xmclib-cat3.git',                'daf5500d03cba23e68c2f241c30af79cd9d63880'],
+    'hw/mcu/microchip'                            : [ 'https://github.com/hathach/microchip_driver.git',                '9e8b37e307d8404033bb881623a113931e1edf27'],
+    'hw/mcu/mindmotion/mm32sdk'                   : [ 'https://github.com/hathach/mm32sdk.git',                         '708a7152952ac595d24837069dcc0f7f59a4c30b'],
+    'hw/mcu/nordic/nrfx'                          : [ 'https://github.com/NordicSemiconductor/nrfx.git',                '281cc2e178fd9a470d844b3afdea9eb322a0b0e8'],
+    'hw/mcu/nuvoton'                              : [ 'https://github.com/majbthrd/nuc_driver.git',                     '2204191ec76283371419fbcec207da02e1bc22fa'],
+    'hw/mcu/nxp/lpcopen'                          : [ 'https://github.com/hathach/nxp_lpcopen.git',                     '43c45c85405a5dd114fff0ea95cca62837740c13'],
+    'hw/mcu/nxp/mcux-sdk'                         : [ 'https://github.com/NXPmicro/mcux-sdk.git',                       'ae2ab01d9d70ad00cd0e935c2552bd5f0e5c0294'],
+    'hw/mcu/nxp/nxp_sdk'                          : [ 'https://github.com/hathach/nxp_sdk.git',                         '845c8fc49b6fb660f06a5c45225494eacb06f00c'],
+    'hw/mcu/raspberry_pi/Pico-PIO-USB'            : [ 'https://github.com/sekigon-gonnoc/Pico-PIO-USB.git',             '9ff3f52fd3c1f81532bce8dd311aa8fc8d9b2665'],
+    'hw/mcu/renesas/rx'                           : [ 'https://github.com/kkitayam/rx_device.git',                      '706b4e0cf485605c32351e2f90f5698267996023'],
+    'hw/mcu/silabs/cmsis-dfp-efm32gg12b'          : [ 'https://github.com/cmsis-packs/cmsis-dfp-efm32gg12b.git',        'f1c31b7887669cb230b3ea63f9b56769078960bc'],
+    'hw/mcu/sony/cxd56/spresense-exported-sdk'    : [ 'https://github.com/sonydevworld/spresense-exported-sdk.git',     '2ec2a1538362696118dc3fdf56f33dacaf8f4067'],
+    'hw/mcu/st/cmsis_device_f0'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_f0.git',      '2fc25ee22264bc27034358be0bd400b893ef837e'],
+    'hw/mcu/st/cmsis_device_f1'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_f1.git',      '6601104a6397299b7304fd5bcd9a491f56cb23a6'],
+    'hw/mcu/st/cmsis_device_f2'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_f2.git',      '182fcb3681ce116816feb41b7764f1b019ce796f'],
+    'hw/mcu/st/cmsis_device_f3'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_f3.git',      '5e4ee5ed7a7b6c85176bb70a9fd3c72d6eb99f1b'],
+    'hw/mcu/st/cmsis_device_f4'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_f4.git',      '2615e866fa48fe1ff1af9e31c348813f2b19e7ec'],
+    'hw/mcu/st/cmsis_device_f7'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_f7.git',      'fc676ef1ad177eb874eaa06444d3d75395fc51f4'],
+    'hw/mcu/st/cmsis_device_g0'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_g0.git',      '08258b28ee95f50cb9624d152a1cbf084be1f9a5'],
+    'hw/mcu/st/cmsis_device_g4'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_g4.git',      'ce822adb1dc552b3aedd13621edbc7fdae124878'],
+    'hw/mcu/st/cmsis_device_h7'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_h7.git',      '60dc2c913203dc8629dc233d4384dcc41c91e77f'],
+    'hw/mcu/st/cmsis_device_l0'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_l0.git',      '06748ca1f93827befdb8b794402320d94d02004f'],
+    'hw/mcu/st/cmsis_device_l1'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_l1.git',      '7f16ec0a1c4c063f84160b4cc6bf88ad554a823e'],
+    'hw/mcu/st/cmsis_device_l4'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_l4.git',      '6ca7312fa6a5a460b5a5a63d66da527fdd8359a6'],
+    'hw/mcu/st/cmsis_device_l5'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_l5.git',      'd922865fc0326a102c26211c44b8e42f52c1e53d'],
+    'hw/mcu/st/cmsis_device_u5'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_u5.git',      'bc00f3c9d8a4e25220f84c26d414902cc6bdf566'],
+    'hw/mcu/st/cmsis_device_wb'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_wb.git',      '9c5d1920dd9fabbe2548e10561d63db829bb744f'],
+    'hw/mcu/st/stm32f0xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32f0xx_hal_driver.git', '0e95cd88657030f640a11e690a8a5186c7712ea5'],
+    'hw/mcu/st/stm32f1xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32f1xx_hal_driver.git', '1dd9d3662fb7eb2a7f7d3bc0a4c1dc7537915a29'],
+    'hw/mcu/st/stm32f2xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32f2xx_hal_driver.git', 'c75ace9b908a9aca631193ebf2466963b8ea33d0'],
+    'hw/mcu/st/stm32f3xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32f3xx_hal_driver.git', '1761b6207318ede021706e75aae78f452d72b6fa'],
+    'hw/mcu/st/stm32f4xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32f4xx_hal_driver.git', '04e99fbdabd00ab8f370f377c66b0a4570365b58'],
+    'hw/mcu/st/stm32f7xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32f7xx_hal_driver.git', 'f7ffdf6bf72110e58b42c632b0a051df5997e4ee'],
+    'hw/mcu/st/stm32g0xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32g0xx_hal_driver.git', '5b53e6cee664a82b16c86491aa0060e2110c00cb'],
+    'hw/mcu/st/stm32g4xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32g4xx_hal_driver.git', '8b4518417706d42eef5c14e56a650005abf478a8'],
+    'hw/mcu/st/stm32h7xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32h7xx_hal_driver.git', 'd8461b980b59b1625207d8c4f2ce0a9c2a7a3b04'],
+    'hw/mcu/st/stm32l0xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32l0xx_hal_driver.git', 'fbdacaf6f8c82a4e1eb9bd74ba650b491e97e17b'],
+    'hw/mcu/st/stm32l1xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32l1xx_hal_driver.git', '44efc446fa69ed8344e7fd966e68ed11043b35d9'],
+    'hw/mcu/st/stm32l4xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32l4xx_hal_driver.git', 'aee3d5bf283ae5df87532b781bdd01b7caf256fc'],
+    'hw/mcu/st/stm32l5xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32l5xx_hal_driver.git', '675c32a75df37f39d50d61f51cb0dcf53f07e1cb'],
+    'hw/mcu/st/stm32u5xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32u5xx_hal_driver.git', '2e1d4cdb386e33391cb261dfff4fefa92e4aa35a'],
+    'hw/mcu/st/stm32wbxx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32wbxx_hal_driver.git', '2c5f06638be516c1b772f768456ba637f077bac8'],
+    'hw/mcu/ti'                                   : [ 'https://github.com/hathach/ti_driver.git',                       '143ed6cc20a7615d042b03b21e070197d473e6e5'],
+    'hw/mcu/wch/ch32v307'                         : [ 'https://github.com/openwch/ch32v307.git',                        '17761f5cf9dbbf2dcf665b7c04934188add20082'],
+    'lib/CMSIS_5'                                 : [ 'https://github.com/ARM-software/CMSIS_5.git',                    '20285262657d1b482d132d20d755c8c330d55c1f'],
+    'lib/FreeRTOS-Kernel'                         : [ 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git',                '2a604f4a2818b8354b5e1a39e388eb5e16cfbc1f'],
+    'lib/lwip'                                    : [ 'https://github.com/lwip-tcpip/lwip.git',                         '159e31b689577dbf69cf0683bbaffbd71fa5ee10'],
+    'lib/sct_neopixel'                            : [ 'https://github.com/gsteiert/sct_neopixel.git',                   'e73e04ca63495672d955f9268e003cffe168fcd8'],
+    'tools/uf2'                                   : [ 'https://github.com/microsoft/uf2.git',                           '19615407727073e36d81bf239c52108ba92e7660'],
+}
+
+# TOP is tinyusb root dir
+TOP = Path(__file__).parent.parent.resolve()
 
 
-# dependency lookup (ABC sorted)
-# deps = {
-#    'LPC11UXX' : [ [] ]
-# }
+def get_a_dep(d):
+    if d not in deps_list.keys():
+        print('{} is not found in dependency list')
+        return 1
+    url = deps_list[d][0]
+    commit = deps_list[d][1]
+    print('cloning {} with {}'.format(d, url))
 
+    p = Path(TOP / d)
+    git_cmd = "git -C {}".format(p)
+
+    # Init git deps if not existed
+    if not p.exists():
+        p.mkdir(parents=True)
+        subprocess.run("{} init".format(git_cmd), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+        subprocess.run("{} remote add origin {}".format(git_cmd, url), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+
+    # Check if commit is already fetched
+    result = subprocess.run("{} rev-parse HEAD".format(git_cmd, commit), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+    head = result.stdout.decode("utf-8").splitlines()[0]
+    if commit != head:
+        subprocess.run("{} fetch --depth 1 origin {}".format(git_cmd, commit), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+        subprocess.run("{} checkout FETCH_HEAD".format(git_cmd), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+
+    return 0
 
-def get_family_dep(family):
-    for entry in os.scandir("hw/bsp/{}/boards".format(family)):
-        if entry.is_dir():
-            result = subprocess.run("make -C examples/device/board_test BOARD={} get-deps".format(entry.name),
-                                    shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
-            print(result.stdout.decode("utf-8"))
-            return result.returncode
 
 status = 0
-all_family = sys.argv[1:]
-for f in all_family:
-    status += get_family_dep(f)
+for d in sys.argv[1:]:
+    status += get_a_dep(d)
 
-sys.exit(status)
\ No newline at end of file
+sys.exit(status)
diff --git a/tools/get_family_deps.py b/tools/get_family_deps.py
new file mode 100644
index 000000000..e382d709b
--- /dev/null
+++ b/tools/get_family_deps.py
@@ -0,0 +1,19 @@
+import sys
+import subprocess
+import os
+
+
+def get_family_dep(family):
+    for entry in os.scandir("hw/bsp/{}/boards".format(family)):
+        if entry.is_dir():
+            result = subprocess.run("make -C examples/device/board_test BOARD={} get-deps".format(entry.name),
+                                    shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+            print(result.stdout.decode("utf-8"))
+            return result.returncode
+
+
+status = 0
+for d in sys.argv[1:]:
+    status += get_family_dep(d)
+
+sys.exit(status)

From 7c9bd81eca6d9a405c8a3ee1d012f370b88b44d1 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 10 Mar 2023 22:49:49 +0700
Subject: [PATCH 130/691] update deps script

---
 tools/get_deps.py        | 30 +++++++++++++++++-------------
 tools/get_family_deps.py |  6 ++++--
 2 files changed, 21 insertions(+), 15 deletions(-)

diff --git a/tools/get_deps.py b/tools/get_deps.py
index 7ce02cc33..6e7093816 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -1,8 +1,9 @@
 import sys
 import subprocess
 from pathlib import Path
+from multiprocessing import Pool
 
-# path, url, commit
+# path, url, commit (Alphabet sorted by path)
 deps_list = {
     'hw/mcu/allwinner'                            : [ 'https://github.com/hathach/allwinner_driver.git',                '8e5e89e8e132c0fd90e72d5422e5d3d68232b756'],
     'hw/mcu/bridgetek/ft9xx/ft90x-sdk'            : [ 'https://github.com/BRTSG-FOSS/ft90x-sdk.git',                    '91060164afe239fcb394122e8bf9eb24d3194eb1'],
@@ -53,10 +54,10 @@ deps_list = {
     'hw/mcu/ti'                                   : [ 'https://github.com/hathach/ti_driver.git',                       '143ed6cc20a7615d042b03b21e070197d473e6e5'],
     'hw/mcu/wch/ch32v307'                         : [ 'https://github.com/openwch/ch32v307.git',                        '17761f5cf9dbbf2dcf665b7c04934188add20082'],
     'lib/CMSIS_5'                                 : [ 'https://github.com/ARM-software/CMSIS_5.git',                    '20285262657d1b482d132d20d755c8c330d55c1f'],
-    'lib/FreeRTOS-Kernel'                         : [ 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git',                '2a604f4a2818b8354b5e1a39e388eb5e16cfbc1f'],
-    'lib/lwip'                                    : [ 'https://github.com/lwip-tcpip/lwip.git',                         '159e31b689577dbf69cf0683bbaffbd71fa5ee10'],
+    #'lib/FreeRTOS-Kernel'                         : [ 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git',                '2a604f4a2818b8354b5e1a39e388eb5e16cfbc1f'],
+    #'lib/lwip'                                    : [ 'https://github.com/lwip-tcpip/lwip.git',                         '159e31b689577dbf69cf0683bbaffbd71fa5ee10'],
     'lib/sct_neopixel'                            : [ 'https://github.com/gsteiert/sct_neopixel.git',                   'e73e04ca63495672d955f9268e003cffe168fcd8'],
-    'tools/uf2'                                   : [ 'https://github.com/microsoft/uf2.git',                           '19615407727073e36d81bf239c52108ba92e7660'],
+    #'tools/uf2'                                   : [ 'https://github.com/microsoft/uf2.git',                           '19615407727073e36d81bf239c52108ba92e7660'],
 }
 
 # TOP is tinyusb root dir
@@ -77,21 +78,24 @@ def get_a_dep(d):
     # Init git deps if not existed
     if not p.exists():
         p.mkdir(parents=True)
-        subprocess.run("{} init".format(git_cmd), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
-        subprocess.run("{} remote add origin {}".format(git_cmd, url), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+        subprocess.run("{} init".format(git_cmd), shell=True)
+        subprocess.run("{} remote add origin {}".format(git_cmd, url), shell=True)
 
     # Check if commit is already fetched
     result = subprocess.run("{} rev-parse HEAD".format(git_cmd, commit), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
     head = result.stdout.decode("utf-8").splitlines()[0]
+
     if commit != head:
-        subprocess.run("{} fetch --depth 1 origin {}".format(git_cmd, commit), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
-        subprocess.run("{} checkout FETCH_HEAD".format(git_cmd), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+        subprocess.run("{} fetch --depth 1 origin {}".format(git_cmd, commit), shell=True)
+        subprocess.run("{} checkout FETCH_HEAD".format(git_cmd), shell=True)
 
     return 0
 
 
-status = 0
-for d in sys.argv[1:]:
-    status += get_a_dep(d)
-
-sys.exit(status)
+if __name__ == "__main__":
+    status = 0
+    all_deps = sys.argv[1:]
+    with Pool() as pool:
+        result = pool.map(get_a_dep, all_deps)
+        status = sum(result)
+    sys.exit(status)
diff --git a/tools/get_family_deps.py b/tools/get_family_deps.py
index e382d709b..071d7b756 100644
--- a/tools/get_family_deps.py
+++ b/tools/get_family_deps.py
@@ -2,11 +2,13 @@ import sys
 import subprocess
 import os
 
+# TOP is tinyusb root dir
+TOP = os.path.dirname(os.path.dirname(os.path.abspath(__file__)))
 
 def get_family_dep(family):
-    for entry in os.scandir("hw/bsp/{}/boards".format(family)):
+    for entry in os.scandir("{}/hw/bsp/{}/boards".format(TOP, family)):
         if entry.is_dir():
-            result = subprocess.run("make -C examples/device/board_test BOARD={} get-deps".format(entry.name),
+            result = subprocess.run("make -C {}/examples/device/board_test BOARD={} get-deps".format(TOP, entry.name),
                                     shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
             print(result.stdout.decode("utf-8"))
             return result.returncode

From fb9180b6eb2ec1b76bf5b01d611901d986f85d83 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 10 Mar 2023 23:36:53 +0700
Subject: [PATCH 131/691] remove most of the submodules

---
 .gitmodules                              | 138 -----------------------
 hw/mcu/allwinner                         |   1 -
 hw/mcu/bridgetek/ft9xx/ft90x-sdk         |   1 -
 hw/mcu/gd/nuclei-sdk                     |   1 -
 hw/mcu/infineon/mtb-xmclib-cat3          |   1 -
 hw/mcu/microchip                         |   1 -
 hw/mcu/mindmotion/mm32sdk                |   1 -
 hw/mcu/nuvoton                           |   1 -
 hw/mcu/nxp/lpcopen                       |   1 -
 hw/mcu/nxp/mcux-sdk                      |   1 -
 hw/mcu/nxp/nxp_sdk                       |   1 -
 hw/mcu/raspberry_pi/Pico-PIO-USB         |   1 -
 hw/mcu/renesas/rx                        |   1 -
 hw/mcu/silabs/cmsis-dfp-efm32gg12b       |   1 -
 hw/mcu/sony/cxd56/spresense-exported-sdk |   1 -
 hw/mcu/st/cmsis_device_f0                |   1 -
 hw/mcu/st/cmsis_device_f1                |   1 -
 hw/mcu/st/cmsis_device_f2                |   1 -
 hw/mcu/st/cmsis_device_f3                |   1 -
 hw/mcu/st/cmsis_device_f4                |   1 -
 hw/mcu/st/cmsis_device_f7                |   1 -
 hw/mcu/st/cmsis_device_g0                |   1 -
 hw/mcu/st/cmsis_device_g4                |   1 -
 hw/mcu/st/cmsis_device_h7                |   1 -
 hw/mcu/st/cmsis_device_l0                |   1 -
 hw/mcu/st/cmsis_device_l1                |   1 -
 hw/mcu/st/cmsis_device_l4                |   1 -
 hw/mcu/st/cmsis_device_l5                |   1 -
 hw/mcu/st/cmsis_device_u5                |   1 -
 hw/mcu/st/cmsis_device_wb                |   1 -
 hw/mcu/st/stm32f0xx_hal_driver           |   1 -
 hw/mcu/st/stm32f1xx_hal_driver           |   1 -
 hw/mcu/st/stm32f2xx_hal_driver           |   1 -
 hw/mcu/st/stm32f3xx_hal_driver           |   1 -
 hw/mcu/st/stm32f4xx_hal_driver           |   1 -
 hw/mcu/st/stm32f7xx_hal_driver           |   1 -
 hw/mcu/st/stm32g0xx_hal_driver           |   1 -
 hw/mcu/st/stm32g4xx_hal_driver           |   1 -
 hw/mcu/st/stm32h7xx_hal_driver           |   1 -
 hw/mcu/st/stm32l0xx_hal_driver           |   1 -
 hw/mcu/st/stm32l1xx_hal_driver           |   1 -
 hw/mcu/st/stm32l4xx_hal_driver           |   1 -
 hw/mcu/st/stm32l5xx_hal_driver           |   1 -
 hw/mcu/st/stm32u5xx_hal_driver           |   1 -
 hw/mcu/st/stm32wbxx_hal_driver           |   1 -
 hw/mcu/wch/ch32v307                      |   1 -
 lib/sct_neopixel                         |   1 -
 47 files changed, 184 deletions(-)
 delete mode 160000 hw/mcu/allwinner
 delete mode 160000 hw/mcu/bridgetek/ft9xx/ft90x-sdk
 delete mode 160000 hw/mcu/gd/nuclei-sdk
 delete mode 160000 hw/mcu/infineon/mtb-xmclib-cat3
 delete mode 160000 hw/mcu/microchip
 delete mode 160000 hw/mcu/mindmotion/mm32sdk
 delete mode 160000 hw/mcu/nuvoton
 delete mode 160000 hw/mcu/nxp/lpcopen
 delete mode 160000 hw/mcu/nxp/mcux-sdk
 delete mode 160000 hw/mcu/nxp/nxp_sdk
 delete mode 160000 hw/mcu/raspberry_pi/Pico-PIO-USB
 delete mode 160000 hw/mcu/renesas/rx
 delete mode 160000 hw/mcu/silabs/cmsis-dfp-efm32gg12b
 delete mode 160000 hw/mcu/sony/cxd56/spresense-exported-sdk
 delete mode 160000 hw/mcu/st/cmsis_device_f0
 delete mode 160000 hw/mcu/st/cmsis_device_f1
 delete mode 160000 hw/mcu/st/cmsis_device_f2
 delete mode 160000 hw/mcu/st/cmsis_device_f3
 delete mode 160000 hw/mcu/st/cmsis_device_f4
 delete mode 160000 hw/mcu/st/cmsis_device_f7
 delete mode 160000 hw/mcu/st/cmsis_device_g0
 delete mode 160000 hw/mcu/st/cmsis_device_g4
 delete mode 160000 hw/mcu/st/cmsis_device_h7
 delete mode 160000 hw/mcu/st/cmsis_device_l0
 delete mode 160000 hw/mcu/st/cmsis_device_l1
 delete mode 160000 hw/mcu/st/cmsis_device_l4
 delete mode 160000 hw/mcu/st/cmsis_device_l5
 delete mode 160000 hw/mcu/st/cmsis_device_u5
 delete mode 160000 hw/mcu/st/cmsis_device_wb
 delete mode 160000 hw/mcu/st/stm32f0xx_hal_driver
 delete mode 160000 hw/mcu/st/stm32f1xx_hal_driver
 delete mode 160000 hw/mcu/st/stm32f2xx_hal_driver
 delete mode 160000 hw/mcu/st/stm32f3xx_hal_driver
 delete mode 160000 hw/mcu/st/stm32f4xx_hal_driver
 delete mode 160000 hw/mcu/st/stm32f7xx_hal_driver
 delete mode 160000 hw/mcu/st/stm32g0xx_hal_driver
 delete mode 160000 hw/mcu/st/stm32g4xx_hal_driver
 delete mode 160000 hw/mcu/st/stm32h7xx_hal_driver
 delete mode 160000 hw/mcu/st/stm32l0xx_hal_driver
 delete mode 160000 hw/mcu/st/stm32l1xx_hal_driver
 delete mode 160000 hw/mcu/st/stm32l4xx_hal_driver
 delete mode 160000 hw/mcu/st/stm32l5xx_hal_driver
 delete mode 160000 hw/mcu/st/stm32u5xx_hal_driver
 delete mode 160000 hw/mcu/st/stm32wbxx_hal_driver
 delete mode 160000 hw/mcu/wch/ch32v307
 delete mode 160000 lib/sct_neopixel

diff --git a/.gitmodules b/.gitmodules
index c3baaa1be..e0eb5fb35 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -1,154 +1,16 @@
 [submodule "tools/uf2"]
 	path = tools/uf2
 	url = https://github.com/microsoft/uf2.git
-[submodule "hw/mcu/sony/cxd56/spresense-exported-sdk"]
-	path = hw/mcu/sony/cxd56/spresense-exported-sdk
-	url = https://github.com/sonydevworld/spresense-exported-sdk.git
 [submodule "hw/mcu/ti"]
 	path = hw/mcu/ti
 	url = https://github.com/hathach/ti_driver.git
-[submodule "hw/mcu/microchip"]
-	path = hw/mcu/microchip
-	url = https://github.com/hathach/microchip_driver.git
-[submodule "hw/mcu/nuvoton"]
-	path = hw/mcu/nuvoton
-	url = https://github.com/majbthrd/nuc_driver.git
 [submodule "lib/lwip"]
 	path = lib/lwip
 	url = https://github.com/lwip-tcpip/lwip.git
-[submodule "hw/mcu/st/cmsis_device_f4"]
-	path = hw/mcu/st/cmsis_device_f4
-	url = https://github.com/STMicroelectronics/cmsis_device_f4.git
-[submodule "hw/mcu/st/stm32f4xx_hal_driver"]
-	path = hw/mcu/st/stm32f4xx_hal_driver
-	url = https://github.com/STMicroelectronics/stm32f4xx_hal_driver.git
-[submodule "hw/mcu/st/cmsis_device_f0"]
-	path = hw/mcu/st/cmsis_device_f0
-	url = https://github.com/STMicroelectronics/cmsis_device_f0.git
-[submodule "hw/mcu/st/stm32f0xx_hal_driver"]
-	path = hw/mcu/st/stm32f0xx_hal_driver
-	url = https://github.com/STMicroelectronics/stm32f0xx_hal_driver.git
-[submodule "hw/mcu/st/cmsis_device_f1"]
-	path = hw/mcu/st/cmsis_device_f1
-	url = https://github.com/STMicroelectronics/cmsis_device_f1.git
-[submodule "hw/mcu/st/stm32f1xx_hal_driver"]
-	path = hw/mcu/st/stm32f1xx_hal_driver
-	url = https://github.com/STMicroelectronics/stm32f1xx_hal_driver.git
-[submodule "hw/mcu/st/cmsis_device_f2"]
-	path = hw/mcu/st/cmsis_device_f2
-	url = https://github.com/STMicroelectronics/cmsis_device_f2.git
-[submodule "hw/mcu/st/stm32f2xx_hal_driver"]
-	path = hw/mcu/st/stm32f2xx_hal_driver
-	url = https://github.com/STMicroelectronics/stm32f2xx_hal_driver.git
-[submodule "hw/mcu/st/cmsis_device_f3"]
-	path = hw/mcu/st/cmsis_device_f3
-	url = https://github.com/STMicroelectronics/cmsis_device_f3.git
-[submodule "hw/mcu/st/stm32f3xx_hal_driver"]
-	path = hw/mcu/st/stm32f3xx_hal_driver
-	url = https://github.com/STMicroelectronics/stm32f3xx_hal_driver.git
-[submodule "hw/mcu/st/cmsis_device_f7"]
-	path = hw/mcu/st/cmsis_device_f7
-	url = https://github.com/STMicroelectronics/cmsis_device_f7.git
-[submodule "hw/mcu/st/stm32f7xx_hal_driver"]
-	path = hw/mcu/st/stm32f7xx_hal_driver
-	url = https://github.com/STMicroelectronics/stm32f7xx_hal_driver.git
-[submodule "hw/mcu/st/cmsis_device_h7"]
-	path = hw/mcu/st/cmsis_device_h7
-	url = https://github.com/STMicroelectronics/cmsis_device_h7.git
-[submodule "hw/mcu/st/stm32h7xx_hal_driver"]
-	path = hw/mcu/st/stm32h7xx_hal_driver
-	url = https://github.com/STMicroelectronics/stm32h7xx_hal_driver.git
-[submodule "hw/mcu/st/cmsis_device_l0"]
-	path = hw/mcu/st/cmsis_device_l0
-	url = https://github.com/STMicroelectronics/cmsis_device_l0.git
-[submodule "hw/mcu/st/stm32l0xx_hal_driver"]
-	path = hw/mcu/st/stm32l0xx_hal_driver
-	url = https://github.com/STMicroelectronics/stm32l0xx_hal_driver.git
-[submodule "hw/mcu/st/cmsis_device_l1"]
-	path = hw/mcu/st/cmsis_device_l1
-	url = https://github.com/STMicroelectronics/cmsis_device_l1.git
-[submodule "hw/mcu/st/stm32l1xx_hal_driver"]
-	path = hw/mcu/st/stm32l1xx_hal_driver
-	url = https://github.com/STMicroelectronics/stm32l1xx_hal_driver.git
-[submodule "hw/mcu/st/cmsis_device_l4"]
-	path = hw/mcu/st/cmsis_device_l4
-	url = https://github.com/STMicroelectronics/cmsis_device_l4.git
-[submodule "hw/mcu/st/stm32l4xx_hal_driver"]
-	path = hw/mcu/st/stm32l4xx_hal_driver
-	url = https://github.com/STMicroelectronics/stm32l4xx_hal_driver.git
-[submodule "hw/mcu/st/cmsis_device_g0"]
-	path = hw/mcu/st/cmsis_device_g0
-	url = https://github.com/STMicroelectronics/cmsis_device_g0.git
-[submodule "hw/mcu/st/stm32g0xx_hal_driver"]
-	path = hw/mcu/st/stm32g0xx_hal_driver
-	url = https://github.com/STMicroelectronics/stm32g0xx_hal_driver.git
-[submodule "hw/mcu/st/cmsis_device_g4"]
-	path = hw/mcu/st/cmsis_device_g4
-	url = https://github.com/STMicroelectronics/cmsis_device_g4.git
-[submodule "hw/mcu/st/stm32g4xx_hal_driver"]
-	path = hw/mcu/st/stm32g4xx_hal_driver
-	url = https://github.com/STMicroelectronics/stm32g4xx_hal_driver.git
-[submodule "hw/mcu/st/cmsis_device_l5"]
-	path = hw/mcu/st/cmsis_device_l5
-	url = https://github.com/STMicroelectronics/cmsis_device_l5.git
-[submodule "hw/mcu/st/stm32l5xx_hal_driver"]
-	path = hw/mcu/st/stm32l5xx_hal_driver
-	url = https://github.com/STMicroelectronics/stm32l5xx_hal_driver.git
-[submodule "hw/mcu/st/cmsis_device_wb"]
-	path = hw/mcu/st/cmsis_device_wb
-	url = https://github.com/STMicroelectronics/cmsis_device_wb.git
-[submodule "hw/mcu/st/stm32wbxx_hal_driver"]
-	path = hw/mcu/st/stm32wbxx_hal_driver
-	url = https://github.com/STMicroelectronics/stm32wbxx_hal_driver.git
-[submodule "lib/sct_neopixel"]
-	path = lib/sct_neopixel
-	url = https://github.com/gsteiert/sct_neopixel
 [submodule "lib/FreeRTOS-Kernel"]
 	path = lib/FreeRTOS-Kernel
 	url = https://github.com/FreeRTOS/FreeRTOS-Kernel.git
-[submodule "hw/mcu/silabs/cmsis-dfp-efm32gg12b"]
-	path = hw/mcu/silabs/cmsis-dfp-efm32gg12b
-	url = https://github.com/cmsis-packs/cmsis-dfp-efm32gg12b
-[submodule "hw/mcu/renesas/rx"]
-	path = hw/mcu/renesas/rx
-	url = https://github.com/kkitayam/rx_device.git
-[submodule "hw/mcu/nxp/lpcopen"]
-	path = hw/mcu/nxp/lpcopen
-	url = https://github.com/hathach/nxp_lpcopen.git
-[submodule "hw/mcu/nxp/mcux-sdk"]
-	path = hw/mcu/nxp/mcux-sdk
-	url = https://github.com/NXPmicro/mcux-sdk.git
-[submodule "hw/mcu/nxp/nxp_sdk"]
-	path = hw/mcu/nxp/nxp_sdk
-	url = https://github.com/hathach/nxp_sdk.git
-[submodule "hw/mcu/gd/nuclei-sdk"]
-	path = hw/mcu/gd/nuclei-sdk
-	url = https://github.com/Nuclei-Software/nuclei-sdk.git
-[submodule "hw/mcu/bridgetek/ft9xx/ft90x-sdk"]
-	path = hw/mcu/bridgetek/ft9xx/ft90x-sdk
-	url = https://github.com/BRTSG-FOSS/ft90x-sdk
-[submodule "hw/mcu/mindmotion/mm32sdk"]
-	path = hw/mcu/mindmotion/mm32sdk
-	url = https://github.com/hathach/mm32sdk.git
 [submodule "hw/mcu/broadcom"]
 	path = hw/mcu/broadcom
 	url = https://github.com/adafruit/broadcom-peripherals.git
 	branch = main-build
-[submodule "hw/mcu/infineon/mtb-xmclib-cat3"]
-	path = hw/mcu/infineon/mtb-xmclib-cat3
-	url = https://github.com/Infineon/mtb-xmclib-cat3.git
-[submodule "hw/mcu/allwinner"]
-	path = hw/mcu/allwinner
-	url = https://github.com/hathach/allwinner_driver.git
-[submodule "hw/mcu/wch/ch32v307"]
-	path = hw/mcu/wch/ch32v307
-	url = https://github.com/openwch/ch32v307.git
-[submodule "hw/mcu/raspberry_pi/Pico-PIO-USB"]
-	path = hw/mcu/raspberry_pi/Pico-PIO-USB
-	url = https://github.com/sekigon-gonnoc/Pico-PIO-USB.git
-[submodule "hw/mcu/st/cmsis_device_u5"]
-	path = hw/mcu/st/cmsis_device_u5
-	url = https://github.com/STMicroelectronics/cmsis_device_u5
-[submodule "hw/mcu/st/stm32u5xx_hal_driver"]
-	path = hw/mcu/st/stm32u5xx_hal_driver
-	url = https://github.com/STMicroelectronics/stm32u5xx_hal_driver
diff --git a/hw/mcu/allwinner b/hw/mcu/allwinner
deleted file mode 160000
index 8e5e89e8e..000000000
--- a/hw/mcu/allwinner
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 8e5e89e8e132c0fd90e72d5422e5d3d68232b756
diff --git a/hw/mcu/bridgetek/ft9xx/ft90x-sdk b/hw/mcu/bridgetek/ft9xx/ft90x-sdk
deleted file mode 160000
index 91060164a..000000000
--- a/hw/mcu/bridgetek/ft9xx/ft90x-sdk
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 91060164afe239fcb394122e8bf9eb24d3194eb1
diff --git a/hw/mcu/gd/nuclei-sdk b/hw/mcu/gd/nuclei-sdk
deleted file mode 160000
index 7eb7bfa9e..000000000
--- a/hw/mcu/gd/nuclei-sdk
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7
diff --git a/hw/mcu/infineon/mtb-xmclib-cat3 b/hw/mcu/infineon/mtb-xmclib-cat3
deleted file mode 160000
index daf5500d0..000000000
--- a/hw/mcu/infineon/mtb-xmclib-cat3
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit daf5500d03cba23e68c2f241c30af79cd9d63880
diff --git a/hw/mcu/microchip b/hw/mcu/microchip
deleted file mode 160000
index 9e8b37e30..000000000
--- a/hw/mcu/microchip
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 9e8b37e307d8404033bb881623a113931e1edf27
diff --git a/hw/mcu/mindmotion/mm32sdk b/hw/mcu/mindmotion/mm32sdk
deleted file mode 160000
index 708a71529..000000000
--- a/hw/mcu/mindmotion/mm32sdk
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 708a7152952ac595d24837069dcc0f7f59a4c30b
diff --git a/hw/mcu/nuvoton b/hw/mcu/nuvoton
deleted file mode 160000
index 2204191ec..000000000
--- a/hw/mcu/nuvoton
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 2204191ec76283371419fbcec207da02e1bc22fa
diff --git a/hw/mcu/nxp/lpcopen b/hw/mcu/nxp/lpcopen
deleted file mode 160000
index 43c45c854..000000000
--- a/hw/mcu/nxp/lpcopen
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 43c45c85405a5dd114fff0ea95cca62837740c13
diff --git a/hw/mcu/nxp/mcux-sdk b/hw/mcu/nxp/mcux-sdk
deleted file mode 160000
index ae2ab01d9..000000000
--- a/hw/mcu/nxp/mcux-sdk
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit ae2ab01d9d70ad00cd0e935c2552bd5f0e5c0294
diff --git a/hw/mcu/nxp/nxp_sdk b/hw/mcu/nxp/nxp_sdk
deleted file mode 160000
index 845c8fc49..000000000
--- a/hw/mcu/nxp/nxp_sdk
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 845c8fc49b6fb660f06a5c45225494eacb06f00c
diff --git a/hw/mcu/raspberry_pi/Pico-PIO-USB b/hw/mcu/raspberry_pi/Pico-PIO-USB
deleted file mode 160000
index 9ff3f52fd..000000000
--- a/hw/mcu/raspberry_pi/Pico-PIO-USB
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 9ff3f52fd3c1f81532bce8dd311aa8fc8d9b2665
diff --git a/hw/mcu/renesas/rx b/hw/mcu/renesas/rx
deleted file mode 160000
index 706b4e0cf..000000000
--- a/hw/mcu/renesas/rx
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 706b4e0cf485605c32351e2f90f5698267996023
diff --git a/hw/mcu/silabs/cmsis-dfp-efm32gg12b b/hw/mcu/silabs/cmsis-dfp-efm32gg12b
deleted file mode 160000
index f1c31b788..000000000
--- a/hw/mcu/silabs/cmsis-dfp-efm32gg12b
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit f1c31b7887669cb230b3ea63f9b56769078960bc
diff --git a/hw/mcu/sony/cxd56/spresense-exported-sdk b/hw/mcu/sony/cxd56/spresense-exported-sdk
deleted file mode 160000
index 2ec2a1538..000000000
--- a/hw/mcu/sony/cxd56/spresense-exported-sdk
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 2ec2a1538362696118dc3fdf56f33dacaf8f4067
diff --git a/hw/mcu/st/cmsis_device_f0 b/hw/mcu/st/cmsis_device_f0
deleted file mode 160000
index 2fc25ee22..000000000
--- a/hw/mcu/st/cmsis_device_f0
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 2fc25ee22264bc27034358be0bd400b893ef837e
diff --git a/hw/mcu/st/cmsis_device_f1 b/hw/mcu/st/cmsis_device_f1
deleted file mode 160000
index 6601104a6..000000000
--- a/hw/mcu/st/cmsis_device_f1
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 6601104a6397299b7304fd5bcd9a491f56cb23a6
diff --git a/hw/mcu/st/cmsis_device_f2 b/hw/mcu/st/cmsis_device_f2
deleted file mode 160000
index 182fcb368..000000000
--- a/hw/mcu/st/cmsis_device_f2
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 182fcb3681ce116816feb41b7764f1b019ce796f
diff --git a/hw/mcu/st/cmsis_device_f3 b/hw/mcu/st/cmsis_device_f3
deleted file mode 160000
index 5e4ee5ed7..000000000
--- a/hw/mcu/st/cmsis_device_f3
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 5e4ee5ed7a7b6c85176bb70a9fd3c72d6eb99f1b
diff --git a/hw/mcu/st/cmsis_device_f4 b/hw/mcu/st/cmsis_device_f4
deleted file mode 160000
index 2615e866f..000000000
--- a/hw/mcu/st/cmsis_device_f4
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 2615e866fa48fe1ff1af9e31c348813f2b19e7ec
diff --git a/hw/mcu/st/cmsis_device_f7 b/hw/mcu/st/cmsis_device_f7
deleted file mode 160000
index fc676ef1a..000000000
--- a/hw/mcu/st/cmsis_device_f7
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit fc676ef1ad177eb874eaa06444d3d75395fc51f4
diff --git a/hw/mcu/st/cmsis_device_g0 b/hw/mcu/st/cmsis_device_g0
deleted file mode 160000
index 08258b28e..000000000
--- a/hw/mcu/st/cmsis_device_g0
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 08258b28ee95f50cb9624d152a1cbf084be1f9a5
diff --git a/hw/mcu/st/cmsis_device_g4 b/hw/mcu/st/cmsis_device_g4
deleted file mode 160000
index ce822adb1..000000000
--- a/hw/mcu/st/cmsis_device_g4
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit ce822adb1dc552b3aedd13621edbc7fdae124878
diff --git a/hw/mcu/st/cmsis_device_h7 b/hw/mcu/st/cmsis_device_h7
deleted file mode 160000
index 60dc2c913..000000000
--- a/hw/mcu/st/cmsis_device_h7
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 60dc2c913203dc8629dc233d4384dcc41c91e77f
diff --git a/hw/mcu/st/cmsis_device_l0 b/hw/mcu/st/cmsis_device_l0
deleted file mode 160000
index 06748ca1f..000000000
--- a/hw/mcu/st/cmsis_device_l0
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 06748ca1f93827befdb8b794402320d94d02004f
diff --git a/hw/mcu/st/cmsis_device_l1 b/hw/mcu/st/cmsis_device_l1
deleted file mode 160000
index 7f16ec0a1..000000000
--- a/hw/mcu/st/cmsis_device_l1
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 7f16ec0a1c4c063f84160b4cc6bf88ad554a823e
diff --git a/hw/mcu/st/cmsis_device_l4 b/hw/mcu/st/cmsis_device_l4
deleted file mode 160000
index 6ca7312fa..000000000
--- a/hw/mcu/st/cmsis_device_l4
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 6ca7312fa6a5a460b5a5a63d66da527fdd8359a6
diff --git a/hw/mcu/st/cmsis_device_l5 b/hw/mcu/st/cmsis_device_l5
deleted file mode 160000
index d922865fc..000000000
--- a/hw/mcu/st/cmsis_device_l5
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit d922865fc0326a102c26211c44b8e42f52c1e53d
diff --git a/hw/mcu/st/cmsis_device_u5 b/hw/mcu/st/cmsis_device_u5
deleted file mode 160000
index bc00f3c9d..000000000
--- a/hw/mcu/st/cmsis_device_u5
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit bc00f3c9d8a4e25220f84c26d414902cc6bdf566
diff --git a/hw/mcu/st/cmsis_device_wb b/hw/mcu/st/cmsis_device_wb
deleted file mode 160000
index 9c5d1920d..000000000
--- a/hw/mcu/st/cmsis_device_wb
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 9c5d1920dd9fabbe2548e10561d63db829bb744f
diff --git a/hw/mcu/st/stm32f0xx_hal_driver b/hw/mcu/st/stm32f0xx_hal_driver
deleted file mode 160000
index 0e95cd886..000000000
--- a/hw/mcu/st/stm32f0xx_hal_driver
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 0e95cd88657030f640a11e690a8a5186c7712ea5
diff --git a/hw/mcu/st/stm32f1xx_hal_driver b/hw/mcu/st/stm32f1xx_hal_driver
deleted file mode 160000
index 1dd9d3662..000000000
--- a/hw/mcu/st/stm32f1xx_hal_driver
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 1dd9d3662fb7eb2a7f7d3bc0a4c1dc7537915a29
diff --git a/hw/mcu/st/stm32f2xx_hal_driver b/hw/mcu/st/stm32f2xx_hal_driver
deleted file mode 160000
index c75ace9b9..000000000
--- a/hw/mcu/st/stm32f2xx_hal_driver
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit c75ace9b908a9aca631193ebf2466963b8ea33d0
diff --git a/hw/mcu/st/stm32f3xx_hal_driver b/hw/mcu/st/stm32f3xx_hal_driver
deleted file mode 160000
index 1761b6207..000000000
--- a/hw/mcu/st/stm32f3xx_hal_driver
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 1761b6207318ede021706e75aae78f452d72b6fa
diff --git a/hw/mcu/st/stm32f4xx_hal_driver b/hw/mcu/st/stm32f4xx_hal_driver
deleted file mode 160000
index 04e99fbda..000000000
--- a/hw/mcu/st/stm32f4xx_hal_driver
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 04e99fbdabd00ab8f370f377c66b0a4570365b58
diff --git a/hw/mcu/st/stm32f7xx_hal_driver b/hw/mcu/st/stm32f7xx_hal_driver
deleted file mode 160000
index f7ffdf6bf..000000000
--- a/hw/mcu/st/stm32f7xx_hal_driver
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit f7ffdf6bf72110e58b42c632b0a051df5997e4ee
diff --git a/hw/mcu/st/stm32g0xx_hal_driver b/hw/mcu/st/stm32g0xx_hal_driver
deleted file mode 160000
index 5b53e6cee..000000000
--- a/hw/mcu/st/stm32g0xx_hal_driver
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 5b53e6cee664a82b16c86491aa0060e2110c00cb
diff --git a/hw/mcu/st/stm32g4xx_hal_driver b/hw/mcu/st/stm32g4xx_hal_driver
deleted file mode 160000
index 8b4518417..000000000
--- a/hw/mcu/st/stm32g4xx_hal_driver
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 8b4518417706d42eef5c14e56a650005abf478a8
diff --git a/hw/mcu/st/stm32h7xx_hal_driver b/hw/mcu/st/stm32h7xx_hal_driver
deleted file mode 160000
index d8461b980..000000000
--- a/hw/mcu/st/stm32h7xx_hal_driver
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit d8461b980b59b1625207d8c4f2ce0a9c2a7a3b04
diff --git a/hw/mcu/st/stm32l0xx_hal_driver b/hw/mcu/st/stm32l0xx_hal_driver
deleted file mode 160000
index fbdacaf6f..000000000
--- a/hw/mcu/st/stm32l0xx_hal_driver
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit fbdacaf6f8c82a4e1eb9bd74ba650b491e97e17b
diff --git a/hw/mcu/st/stm32l1xx_hal_driver b/hw/mcu/st/stm32l1xx_hal_driver
deleted file mode 160000
index 44efc446f..000000000
--- a/hw/mcu/st/stm32l1xx_hal_driver
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 44efc446fa69ed8344e7fd966e68ed11043b35d9
diff --git a/hw/mcu/st/stm32l4xx_hal_driver b/hw/mcu/st/stm32l4xx_hal_driver
deleted file mode 160000
index aee3d5bf2..000000000
--- a/hw/mcu/st/stm32l4xx_hal_driver
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit aee3d5bf283ae5df87532b781bdd01b7caf256fc
diff --git a/hw/mcu/st/stm32l5xx_hal_driver b/hw/mcu/st/stm32l5xx_hal_driver
deleted file mode 160000
index 675c32a75..000000000
--- a/hw/mcu/st/stm32l5xx_hal_driver
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 675c32a75df37f39d50d61f51cb0dcf53f07e1cb
diff --git a/hw/mcu/st/stm32u5xx_hal_driver b/hw/mcu/st/stm32u5xx_hal_driver
deleted file mode 160000
index 2e1d4cdb3..000000000
--- a/hw/mcu/st/stm32u5xx_hal_driver
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 2e1d4cdb386e33391cb261dfff4fefa92e4aa35a
diff --git a/hw/mcu/st/stm32wbxx_hal_driver b/hw/mcu/st/stm32wbxx_hal_driver
deleted file mode 160000
index 2c5f06638..000000000
--- a/hw/mcu/st/stm32wbxx_hal_driver
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 2c5f06638be516c1b772f768456ba637f077bac8
diff --git a/hw/mcu/wch/ch32v307 b/hw/mcu/wch/ch32v307
deleted file mode 160000
index 17761f5cf..000000000
--- a/hw/mcu/wch/ch32v307
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 17761f5cf9dbbf2dcf665b7c04934188add20082
diff --git a/lib/sct_neopixel b/lib/sct_neopixel
deleted file mode 160000
index e73e04ca6..000000000
--- a/lib/sct_neopixel
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit e73e04ca63495672d955f9268e003cffe168fcd8

From 7e6a6e75bcdba408e6fd6dabc57d110b168e3d17 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 10 Mar 2023 23:41:27 +0700
Subject: [PATCH 132/691] remove the rest of mcu submodules

---
 .gitmodules     | 7 -------
 hw/mcu/broadcom | 1 -
 hw/mcu/ti       | 1 -
 3 files changed, 9 deletions(-)
 delete mode 160000 hw/mcu/broadcom
 delete mode 160000 hw/mcu/ti

diff --git a/.gitmodules b/.gitmodules
index e0eb5fb35..469192026 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -1,16 +1,9 @@
 [submodule "tools/uf2"]
 	path = tools/uf2
 	url = https://github.com/microsoft/uf2.git
-[submodule "hw/mcu/ti"]
-	path = hw/mcu/ti
-	url = https://github.com/hathach/ti_driver.git
 [submodule "lib/lwip"]
 	path = lib/lwip
 	url = https://github.com/lwip-tcpip/lwip.git
 [submodule "lib/FreeRTOS-Kernel"]
 	path = lib/FreeRTOS-Kernel
 	url = https://github.com/FreeRTOS/FreeRTOS-Kernel.git
-[submodule "hw/mcu/broadcom"]
-	path = hw/mcu/broadcom
-	url = https://github.com/adafruit/broadcom-peripherals.git
-	branch = main-build
diff --git a/hw/mcu/broadcom b/hw/mcu/broadcom
deleted file mode 160000
index 083700860..000000000
--- a/hw/mcu/broadcom
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 08370086080759ed54ac1136d62d2ad24c6fa267
diff --git a/hw/mcu/ti b/hw/mcu/ti
deleted file mode 160000
index 143ed6cc2..000000000
--- a/hw/mcu/ti
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 143ed6cc20a7615d042b03b21e070197d473e6e5

From 704f3ddeb5e6bfa3b4111a998564d979a9a95d1d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 10 Mar 2023 23:43:07 +0700
Subject: [PATCH 133/691] add dependencies repo to git ignore

---
 .gitignore | 54 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 54 insertions(+)

diff --git a/.gitignore b/.gitignore
index 87a5faa80..ba3baa9b6 100644
--- a/.gitignore
+++ b/.gitignore
@@ -28,3 +28,57 @@ cov-int
 /_bin/
 __pycache__
 
+# submodules
+hw/mcu/allwinner
+hw/mcu/bridgetek/ft9xx/ft90x-sdk
+hw/mcu/broadcom
+hw/mcu/gd/nuclei-sdk
+hw/mcu/infineon/mtb-xmclib-cat3
+hw/mcu/microchip
+hw/mcu/mindmotion/mm32sdk
+hw/mcu/nordic/nrfx
+hw/mcu/nuvoton
+hw/mcu/nxp/lpcopen
+hw/mcu/nxp/mcux-sdk
+hw/mcu/nxp/nxp_sdk
+hw/mcu/raspberry_pi/Pico-PIO-USB
+hw/mcu/renesas/rx
+hw/mcu/silabs/cmsis-dfp-efm32gg12b
+hw/mcu/sony/cxd56/spresense-exported-sdk
+hw/mcu/st/cmsis_device_f0
+hw/mcu/st/cmsis_device_f1
+hw/mcu/st/cmsis_device_f2
+hw/mcu/st/cmsis_device_f3
+hw/mcu/st/cmsis_device_f4
+hw/mcu/st/cmsis_device_f7
+hw/mcu/st/cmsis_device_g0
+hw/mcu/st/cmsis_device_g4
+hw/mcu/st/cmsis_device_h7
+hw/mcu/st/cmsis_device_l0
+hw/mcu/st/cmsis_device_l1
+hw/mcu/st/cmsis_device_l4
+hw/mcu/st/cmsis_device_l5
+hw/mcu/st/cmsis_device_u5
+hw/mcu/st/cmsis_device_wb
+hw/mcu/st/stm32f0xx_hal_driver
+hw/mcu/st/stm32f1xx_hal_driver
+hw/mcu/st/stm32f2xx_hal_driver
+hw/mcu/st/stm32f3xx_hal_driver
+hw/mcu/st/stm32f4xx_hal_driver
+hw/mcu/st/stm32f7xx_hal_driver
+hw/mcu/st/stm32g0xx_hal_driver
+hw/mcu/st/stm32g4xx_hal_driver
+hw/mcu/st/stm32h7xx_hal_driver
+hw/mcu/st/stm32l0xx_hal_driver
+hw/mcu/st/stm32l1xx_hal_driver
+hw/mcu/st/stm32l4xx_hal_driver
+hw/mcu/st/stm32l5xx_hal_driver
+hw/mcu/st/stm32u5xx_hal_driver
+hw/mcu/st/stm32wbxx_hal_driver
+hw/mcu/ti
+hw/mcu/wch/ch32v307
+lib/CMSIS_5
+lib/FreeRTOS-Kernel
+lib/lwip
+lib/sct_neopixel
+tools/uf2

From 206a9a21e6297b49287605ad8ddf1ab47124358e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 10 Mar 2023 23:54:30 +0700
Subject: [PATCH 134/691] fix ci

---
 .github/workflows/build_aarch64.yml | 2 +-
 .github/workflows/build_iar.yml     | 8 +-------
 hw/bsp/rx/boards/gr_citrus/board.mk | 2 --
 3 files changed, 2 insertions(+), 10 deletions(-)

diff --git a/.github/workflows/build_aarch64.yml b/.github/workflows/build_aarch64.yml
index 5818ea432..30df2bdf0 100644
--- a/.github/workflows/build_aarch64.yml
+++ b/.github/workflows/build_aarch64.yml
@@ -43,7 +43,7 @@ jobs:
       uses: actions/checkout@v3
 
     - name: Checkout common submodules in lib
-      run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip lib/sct_neopixel
+      run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip
 
     - name: Checkout hathach/linkermap
       uses: actions/checkout@v3
diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml
index 7f2a92010..afb6efb6b 100644
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@@ -44,14 +44,8 @@ jobs:
 
     - name: Checkout submodules and dependencies
       run: |
-        git submodule update --init lib/FreeRTOS-Kernel lib/lwip lib/sct_neopixel
+        git submodule update --init lib/FreeRTOS-Kernel lib/lwip
         python3 tools/get_family_deps.py ${{ matrix.family }}
 
-    #- name: Checkout pico-sdk for rp2040
-    #  if: matrix.family == 'rp2040'
-    #  run: |
-    #    git clone --depth 1 -b develop https://github.com/raspberrypi/pico-sdk ~/pico-sdk
-    #    echo >> $GITHUB_ENV PICO_SDK_PATH=~/pico-sdk
-
     - name: Build
       run: python3 tools/build_family.py ${{ matrix.family }} CC=iccarm
diff --git a/hw/bsp/rx/boards/gr_citrus/board.mk b/hw/bsp/rx/boards/gr_citrus/board.mk
index 0eba94610..235cefc61 100644
--- a/hw/bsp/rx/boards/gr_citrus/board.mk
+++ b/hw/bsp/rx/boards/gr_citrus/board.mk
@@ -1,5 +1,3 @@
-DEPS_SUBMODULES += hw/mcu/renesas/rx
-
 CFLAGS += \
   -mcpu=rx610 \
   -misa=v1 \

From 4857abdc6bc58ebd06ce87c0139ed8a789b0d440 Mon Sep 17 00:00:00 2001
From: Dan Halbert <halbert@halwitz.org>
Date: Fri, 10 Mar 2023 14:01:51 -0500
Subject: [PATCH 135/691] rp2040: include hardware/sync.h explicitly

---
 src/portable/raspberrypi/rp2040/dcd_rp2040.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
index 8df7bef2b..37dec1cbf 100644
--- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
@@ -29,6 +29,7 @@
 #if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RP2040) && !CFG_TUD_RPI_PIO_USB
 
 #include "pico.h"
+#include "hardware/sync.h"
 #include "rp2040_usb.h"
 
 #if TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX

From 7428a16d2d5891b5ceadcd0530798c8933d02f6f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 11 Mar 2023 08:23:21 +0700
Subject: [PATCH 136/691] remove ra submodules

---
 .gitmodules         | 3 ---
 hw/bsp/ra/family.mk | 2 +-
 hw/mcu/renesas/fsp  | 1 -
 tools/get_deps.py   | 1 +
 4 files changed, 2 insertions(+), 5 deletions(-)
 delete mode 160000 hw/mcu/renesas/fsp

diff --git a/.gitmodules b/.gitmodules
index 320a5f7f6..469192026 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -7,6 +7,3 @@
 [submodule "lib/FreeRTOS-Kernel"]
 	path = lib/FreeRTOS-Kernel
 	url = https://github.com/FreeRTOS/FreeRTOS-Kernel.git
-[submodule "hw/mcu/renesas/fsp"]
-	path = hw/mcu/renesas/fsp
-	url = https://github.com/renesas/fsp
diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk
index 6b7f43345..e75e74104 100644
--- a/hw/bsp/ra/family.mk
+++ b/hw/bsp/ra/family.mk
@@ -40,7 +40,7 @@ SRC_C += \
 	$(FSP_BOARD_DIR)/board_leds.c
 
 INC += \
-  	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
+	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
 	$(TOP)/hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include \
 	$(TOP)/$(BOARD_PATH) \
 	$(TOP)/$(BOARD_PATH)/fsp_cfg \
diff --git a/hw/mcu/renesas/fsp b/hw/mcu/renesas/fsp
deleted file mode 160000
index 8dc14709f..000000000
--- a/hw/mcu/renesas/fsp
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 8dc14709f2a6518b43f71efad70d900b7718d9f1
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 6e7093816..df606bfab 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -18,6 +18,7 @@ deps_list = {
     'hw/mcu/nxp/mcux-sdk'                         : [ 'https://github.com/NXPmicro/mcux-sdk.git',                       'ae2ab01d9d70ad00cd0e935c2552bd5f0e5c0294'],
     'hw/mcu/nxp/nxp_sdk'                          : [ 'https://github.com/hathach/nxp_sdk.git',                         '845c8fc49b6fb660f06a5c45225494eacb06f00c'],
     'hw/mcu/raspberry_pi/Pico-PIO-USB'            : [ 'https://github.com/sekigon-gonnoc/Pico-PIO-USB.git',             '9ff3f52fd3c1f81532bce8dd311aa8fc8d9b2665'],
+    'hw/mcu/renesas/fsp'                          : [ 'https://github.com/renesas/fsp.git',                             '8dc14709f2a6518b43f71efad70d900b7718d9f1'],
     'hw/mcu/renesas/rx'                           : [ 'https://github.com/kkitayam/rx_device.git',                      '706b4e0cf485605c32351e2f90f5698267996023'],
     'hw/mcu/silabs/cmsis-dfp-efm32gg12b'          : [ 'https://github.com/cmsis-packs/cmsis-dfp-efm32gg12b.git',        'f1c31b7887669cb230b3ea63f9b56769078960bc'],
     'hw/mcu/sony/cxd56/spresense-exported-sdk'    : [ 'https://github.com/sonydevworld/spresense-exported-sdk.git',     '2ec2a1538362696118dc3fdf56f33dacaf8f4067'],

From cae05c65934384d2503baaad9ae55d4c68db6fdd Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 11 Mar 2023 08:33:08 +0700
Subject: [PATCH 137/691] update get-deps.py

---
 tools/get_deps.py | 113 +++++++++++++++++++++++-----------------------
 1 file changed, 56 insertions(+), 57 deletions(-)

diff --git a/tools/get_deps.py b/tools/get_deps.py
index 6e7093816..29bb35f15 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -5,59 +5,59 @@ from multiprocessing import Pool
 
 # path, url, commit (Alphabet sorted by path)
 deps_list = {
-    'hw/mcu/allwinner'                            : [ 'https://github.com/hathach/allwinner_driver.git',                '8e5e89e8e132c0fd90e72d5422e5d3d68232b756'],
-    'hw/mcu/bridgetek/ft9xx/ft90x-sdk'            : [ 'https://github.com/BRTSG-FOSS/ft90x-sdk.git',                    '91060164afe239fcb394122e8bf9eb24d3194eb1'],
-    'hw/mcu/broadcom'                             : [ 'https://github.com/adafruit/broadcom-peripherals.git',           '08370086080759ed54ac1136d62d2ad24c6fa267'],
-    'hw/mcu/gd/nuclei-sdk'                        : [ 'https://github.com/Nuclei-Software/nuclei-sdk.git',              '7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7'],
-    'hw/mcu/infineon/mtb-xmclib-cat3'             : [ 'https://github.com/Infineon/mtb-xmclib-cat3.git',                'daf5500d03cba23e68c2f241c30af79cd9d63880'],
-    'hw/mcu/microchip'                            : [ 'https://github.com/hathach/microchip_driver.git',                '9e8b37e307d8404033bb881623a113931e1edf27'],
-    'hw/mcu/mindmotion/mm32sdk'                   : [ 'https://github.com/hathach/mm32sdk.git',                         '708a7152952ac595d24837069dcc0f7f59a4c30b'],
-    'hw/mcu/nordic/nrfx'                          : [ 'https://github.com/NordicSemiconductor/nrfx.git',                '281cc2e178fd9a470d844b3afdea9eb322a0b0e8'],
-    'hw/mcu/nuvoton'                              : [ 'https://github.com/majbthrd/nuc_driver.git',                     '2204191ec76283371419fbcec207da02e1bc22fa'],
-    'hw/mcu/nxp/lpcopen'                          : [ 'https://github.com/hathach/nxp_lpcopen.git',                     '43c45c85405a5dd114fff0ea95cca62837740c13'],
-    'hw/mcu/nxp/mcux-sdk'                         : [ 'https://github.com/NXPmicro/mcux-sdk.git',                       'ae2ab01d9d70ad00cd0e935c2552bd5f0e5c0294'],
-    'hw/mcu/nxp/nxp_sdk'                          : [ 'https://github.com/hathach/nxp_sdk.git',                         '845c8fc49b6fb660f06a5c45225494eacb06f00c'],
-    'hw/mcu/raspberry_pi/Pico-PIO-USB'            : [ 'https://github.com/sekigon-gonnoc/Pico-PIO-USB.git',             '9ff3f52fd3c1f81532bce8dd311aa8fc8d9b2665'],
-    'hw/mcu/renesas/rx'                           : [ 'https://github.com/kkitayam/rx_device.git',                      '706b4e0cf485605c32351e2f90f5698267996023'],
-    'hw/mcu/silabs/cmsis-dfp-efm32gg12b'          : [ 'https://github.com/cmsis-packs/cmsis-dfp-efm32gg12b.git',        'f1c31b7887669cb230b3ea63f9b56769078960bc'],
-    'hw/mcu/sony/cxd56/spresense-exported-sdk'    : [ 'https://github.com/sonydevworld/spresense-exported-sdk.git',     '2ec2a1538362696118dc3fdf56f33dacaf8f4067'],
-    'hw/mcu/st/cmsis_device_f0'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_f0.git',      '2fc25ee22264bc27034358be0bd400b893ef837e'],
-    'hw/mcu/st/cmsis_device_f1'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_f1.git',      '6601104a6397299b7304fd5bcd9a491f56cb23a6'],
-    'hw/mcu/st/cmsis_device_f2'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_f2.git',      '182fcb3681ce116816feb41b7764f1b019ce796f'],
-    'hw/mcu/st/cmsis_device_f3'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_f3.git',      '5e4ee5ed7a7b6c85176bb70a9fd3c72d6eb99f1b'],
-    'hw/mcu/st/cmsis_device_f4'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_f4.git',      '2615e866fa48fe1ff1af9e31c348813f2b19e7ec'],
-    'hw/mcu/st/cmsis_device_f7'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_f7.git',      'fc676ef1ad177eb874eaa06444d3d75395fc51f4'],
-    'hw/mcu/st/cmsis_device_g0'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_g0.git',      '08258b28ee95f50cb9624d152a1cbf084be1f9a5'],
-    'hw/mcu/st/cmsis_device_g4'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_g4.git',      'ce822adb1dc552b3aedd13621edbc7fdae124878'],
-    'hw/mcu/st/cmsis_device_h7'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_h7.git',      '60dc2c913203dc8629dc233d4384dcc41c91e77f'],
-    'hw/mcu/st/cmsis_device_l0'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_l0.git',      '06748ca1f93827befdb8b794402320d94d02004f'],
-    'hw/mcu/st/cmsis_device_l1'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_l1.git',      '7f16ec0a1c4c063f84160b4cc6bf88ad554a823e'],
-    'hw/mcu/st/cmsis_device_l4'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_l4.git',      '6ca7312fa6a5a460b5a5a63d66da527fdd8359a6'],
-    'hw/mcu/st/cmsis_device_l5'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_l5.git',      'd922865fc0326a102c26211c44b8e42f52c1e53d'],
-    'hw/mcu/st/cmsis_device_u5'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_u5.git',      'bc00f3c9d8a4e25220f84c26d414902cc6bdf566'],
-    'hw/mcu/st/cmsis_device_wb'                   : [ 'https://github.com/STMicroelectronics/cmsis_device_wb.git',      '9c5d1920dd9fabbe2548e10561d63db829bb744f'],
-    'hw/mcu/st/stm32f0xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32f0xx_hal_driver.git', '0e95cd88657030f640a11e690a8a5186c7712ea5'],
-    'hw/mcu/st/stm32f1xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32f1xx_hal_driver.git', '1dd9d3662fb7eb2a7f7d3bc0a4c1dc7537915a29'],
-    'hw/mcu/st/stm32f2xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32f2xx_hal_driver.git', 'c75ace9b908a9aca631193ebf2466963b8ea33d0'],
-    'hw/mcu/st/stm32f3xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32f3xx_hal_driver.git', '1761b6207318ede021706e75aae78f452d72b6fa'],
-    'hw/mcu/st/stm32f4xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32f4xx_hal_driver.git', '04e99fbdabd00ab8f370f377c66b0a4570365b58'],
-    'hw/mcu/st/stm32f7xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32f7xx_hal_driver.git', 'f7ffdf6bf72110e58b42c632b0a051df5997e4ee'],
-    'hw/mcu/st/stm32g0xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32g0xx_hal_driver.git', '5b53e6cee664a82b16c86491aa0060e2110c00cb'],
-    'hw/mcu/st/stm32g4xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32g4xx_hal_driver.git', '8b4518417706d42eef5c14e56a650005abf478a8'],
-    'hw/mcu/st/stm32h7xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32h7xx_hal_driver.git', 'd8461b980b59b1625207d8c4f2ce0a9c2a7a3b04'],
-    'hw/mcu/st/stm32l0xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32l0xx_hal_driver.git', 'fbdacaf6f8c82a4e1eb9bd74ba650b491e97e17b'],
-    'hw/mcu/st/stm32l1xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32l1xx_hal_driver.git', '44efc446fa69ed8344e7fd966e68ed11043b35d9'],
-    'hw/mcu/st/stm32l4xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32l4xx_hal_driver.git', 'aee3d5bf283ae5df87532b781bdd01b7caf256fc'],
-    'hw/mcu/st/stm32l5xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32l5xx_hal_driver.git', '675c32a75df37f39d50d61f51cb0dcf53f07e1cb'],
-    'hw/mcu/st/stm32u5xx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32u5xx_hal_driver.git', '2e1d4cdb386e33391cb261dfff4fefa92e4aa35a'],
-    'hw/mcu/st/stm32wbxx_hal_driver'              : [ 'https://github.com/STMicroelectronics/stm32wbxx_hal_driver.git', '2c5f06638be516c1b772f768456ba637f077bac8'],
-    'hw/mcu/ti'                                   : [ 'https://github.com/hathach/ti_driver.git',                       '143ed6cc20a7615d042b03b21e070197d473e6e5'],
-    'hw/mcu/wch/ch32v307'                         : [ 'https://github.com/openwch/ch32v307.git',                        '17761f5cf9dbbf2dcf665b7c04934188add20082'],
-    'lib/CMSIS_5'                                 : [ 'https://github.com/ARM-software/CMSIS_5.git',                    '20285262657d1b482d132d20d755c8c330d55c1f'],
-    #'lib/FreeRTOS-Kernel'                         : [ 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git',                '2a604f4a2818b8354b5e1a39e388eb5e16cfbc1f'],
-    #'lib/lwip'                                    : [ 'https://github.com/lwip-tcpip/lwip.git',                         '159e31b689577dbf69cf0683bbaffbd71fa5ee10'],
-    'lib/sct_neopixel'                            : [ 'https://github.com/gsteiert/sct_neopixel.git',                   'e73e04ca63495672d955f9268e003cffe168fcd8'],
-    #'tools/uf2'                                   : [ 'https://github.com/microsoft/uf2.git',                           '19615407727073e36d81bf239c52108ba92e7660'],
+    'hw/mcu/allwinner'                         : ['8e5e89e8e132c0fd90e72d5422e5d3d68232b756', 'https://github.com/hathach/allwinner_driver.git'               ],
+    'hw/mcu/bridgetek/ft9xx/ft90x-sdk'         : ['91060164afe239fcb394122e8bf9eb24d3194eb1', 'https://github.com/BRTSG-FOSS/ft90x-sdk.git'                   ],
+    'hw/mcu/broadcom'                          : ['08370086080759ed54ac1136d62d2ad24c6fa267', 'https://github.com/adafruit/broadcom-peripherals.git'          ],
+    'hw/mcu/gd/nuclei-sdk'                     : ['7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7', 'https://github.com/Nuclei-Software/nuclei-sdk.git'             ],
+    'hw/mcu/infineon/mtb-xmclib-cat3'          : ['daf5500d03cba23e68c2f241c30af79cd9d63880', 'https://github.com/Infineon/mtb-xmclib-cat3.git'               ],
+    'hw/mcu/microchip'                         : ['9e8b37e307d8404033bb881623a113931e1edf27', 'https://github.com/hathach/microchip_driver.git'               ],
+    'hw/mcu/mindmotion/mm32sdk'                : ['708a7152952ac595d24837069dcc0f7f59a4c30b', 'https://github.com/hathach/mm32sdk.git'                        ],
+    'hw/mcu/nordic/nrfx'                       : ['281cc2e178fd9a470d844b3afdea9eb322a0b0e8', 'https://github.com/NordicSemiconductor/nrfx.git'               ],
+    'hw/mcu/nuvoton'                           : ['2204191ec76283371419fbcec207da02e1bc22fa', 'https://github.com/majbthrd/nuc_driver.git'                    ],
+    'hw/mcu/nxp/lpcopen'                       : ['43c45c85405a5dd114fff0ea95cca62837740c13', 'https://github.com/hathach/nxp_lpcopen.git'                    ],
+    'hw/mcu/nxp/mcux-sdk'                      : ['ae2ab01d9d70ad00cd0e935c2552bd5f0e5c0294', 'https://github.com/NXPmicro/mcux-sdk.git'                      ],
+    'hw/mcu/nxp/nxp_sdk'                       : ['845c8fc49b6fb660f06a5c45225494eacb06f00c', 'https://github.com/hathach/nxp_sdk.git'                        ],
+    'hw/mcu/raspberry_pi/Pico-PIO-USB'         : ['9ff3f52fd3c1f81532bce8dd311aa8fc8d9b2665', 'https://github.com/sekigon-gonnoc/Pico-PIO-USB.git'            ],
+    'hw/mcu/renesas/rx'                        : ['706b4e0cf485605c32351e2f90f5698267996023', 'https://github.com/kkitayam/rx_device.git'                     ],
+    'hw/mcu/silabs/cmsis-dfp-efm32gg12b'       : ['f1c31b7887669cb230b3ea63f9b56769078960bc', 'https://github.com/cmsis-packs/cmsis-dfp-efm32gg12b.git'       ],
+    'hw/mcu/sony/cxd56/spresense-exported-sdk' : ['2ec2a1538362696118dc3fdf56f33dacaf8f4067', 'https://github.com/sonydevworld/spresense-exported-sdk.git'    ],
+    'hw/mcu/st/cmsis_device_f0'                : ['2fc25ee22264bc27034358be0bd400b893ef837e', 'https://github.com/STMicroelectronics/cmsis_device_f0.git'     ],
+    'hw/mcu/st/cmsis_device_f1'                : ['6601104a6397299b7304fd5bcd9a491f56cb23a6', 'https://github.com/STMicroelectronics/cmsis_device_f1.git'     ],
+    'hw/mcu/st/cmsis_device_f2'                : ['182fcb3681ce116816feb41b7764f1b019ce796f', 'https://github.com/STMicroelectronics/cmsis_device_f2.git'     ],
+    'hw/mcu/st/cmsis_device_f3'                : ['5e4ee5ed7a7b6c85176bb70a9fd3c72d6eb99f1b', 'https://github.com/STMicroelectronics/cmsis_device_f3.git'     ],
+    'hw/mcu/st/cmsis_device_f4'                : ['2615e866fa48fe1ff1af9e31c348813f2b19e7ec', 'https://github.com/STMicroelectronics/cmsis_device_f4.git'     ],
+    'hw/mcu/st/cmsis_device_f7'                : ['fc676ef1ad177eb874eaa06444d3d75395fc51f4', 'https://github.com/STMicroelectronics/cmsis_device_f7.git'     ],
+    'hw/mcu/st/cmsis_device_g0'                : ['08258b28ee95f50cb9624d152a1cbf084be1f9a5', 'https://github.com/STMicroelectronics/cmsis_device_g0.git'     ],
+    'hw/mcu/st/cmsis_device_g4'                : ['ce822adb1dc552b3aedd13621edbc7fdae124878', 'https://github.com/STMicroelectronics/cmsis_device_g4.git'     ],
+    'hw/mcu/st/cmsis_device_h7'                : ['60dc2c913203dc8629dc233d4384dcc41c91e77f', 'https://github.com/STMicroelectronics/cmsis_device_h7.git'     ],
+    'hw/mcu/st/cmsis_device_l0'                : ['06748ca1f93827befdb8b794402320d94d02004f', 'https://github.com/STMicroelectronics/cmsis_device_l0.git'     ],
+    'hw/mcu/st/cmsis_device_l1'                : ['7f16ec0a1c4c063f84160b4cc6bf88ad554a823e', 'https://github.com/STMicroelectronics/cmsis_device_l1.git'     ],
+    'hw/mcu/st/cmsis_device_l4'                : ['6ca7312fa6a5a460b5a5a63d66da527fdd8359a6', 'https://github.com/STMicroelectronics/cmsis_device_l4.git'     ],
+    'hw/mcu/st/cmsis_device_l5'                : ['d922865fc0326a102c26211c44b8e42f52c1e53d', 'https://github.com/STMicroelectronics/cmsis_device_l5.git'     ],
+    'hw/mcu/st/cmsis_device_u5'                : ['bc00f3c9d8a4e25220f84c26d414902cc6bdf566', 'https://github.com/STMicroelectronics/cmsis_device_u5.git'     ],
+    'hw/mcu/st/cmsis_device_wb'                : ['9c5d1920dd9fabbe2548e10561d63db829bb744f', 'https://github.com/STMicroelectronics/cmsis_device_wb.git'     ],
+    'hw/mcu/st/stm32f0xx_hal_driver'           : ['0e95cd88657030f640a11e690a8a5186c7712ea5', 'https://github.com/STMicroelectronics/stm32f0xx_hal_driver.git'],
+    'hw/mcu/st/stm32f1xx_hal_driver'           : ['1dd9d3662fb7eb2a7f7d3bc0a4c1dc7537915a29', 'https://github.com/STMicroelectronics/stm32f1xx_hal_driver.git'],
+    'hw/mcu/st/stm32f2xx_hal_driver'           : ['c75ace9b908a9aca631193ebf2466963b8ea33d0', 'https://github.com/STMicroelectronics/stm32f2xx_hal_driver.git'],
+    'hw/mcu/st/stm32f3xx_hal_driver'           : ['1761b6207318ede021706e75aae78f452d72b6fa', 'https://github.com/STMicroelectronics/stm32f3xx_hal_driver.git'],
+    'hw/mcu/st/stm32f4xx_hal_driver'           : ['04e99fbdabd00ab8f370f377c66b0a4570365b58', 'https://github.com/STMicroelectronics/stm32f4xx_hal_driver.git'],
+    'hw/mcu/st/stm32f7xx_hal_driver'           : ['f7ffdf6bf72110e58b42c632b0a051df5997e4ee', 'https://github.com/STMicroelectronics/stm32f7xx_hal_driver.git'],
+    'hw/mcu/st/stm32g0xx_hal_driver'           : ['5b53e6cee664a82b16c86491aa0060e2110c00cb', 'https://github.com/STMicroelectronics/stm32g0xx_hal_driver.git'],
+    'hw/mcu/st/stm32g4xx_hal_driver'           : ['8b4518417706d42eef5c14e56a650005abf478a8', 'https://github.com/STMicroelectronics/stm32g4xx_hal_driver.git'],
+    'hw/mcu/st/stm32h7xx_hal_driver'           : ['d8461b980b59b1625207d8c4f2ce0a9c2a7a3b04', 'https://github.com/STMicroelectronics/stm32h7xx_hal_driver.git'],
+    'hw/mcu/st/stm32l0xx_hal_driver'           : ['fbdacaf6f8c82a4e1eb9bd74ba650b491e97e17b', 'https://github.com/STMicroelectronics/stm32l0xx_hal_driver.git'],
+    'hw/mcu/st/stm32l1xx_hal_driver'           : ['44efc446fa69ed8344e7fd966e68ed11043b35d9', 'https://github.com/STMicroelectronics/stm32l1xx_hal_driver.git'],
+    'hw/mcu/st/stm32l4xx_hal_driver'           : ['aee3d5bf283ae5df87532b781bdd01b7caf256fc', 'https://github.com/STMicroelectronics/stm32l4xx_hal_driver.git'],
+    'hw/mcu/st/stm32l5xx_hal_driver'           : ['675c32a75df37f39d50d61f51cb0dcf53f07e1cb', 'https://github.com/STMicroelectronics/stm32l5xx_hal_driver.git'],
+    'hw/mcu/st/stm32u5xx_hal_driver'           : ['2e1d4cdb386e33391cb261dfff4fefa92e4aa35a', 'https://github.com/STMicroelectronics/stm32u5xx_hal_driver.git'],
+    'hw/mcu/st/stm32wbxx_hal_driver'           : ['2c5f06638be516c1b772f768456ba637f077bac8', 'https://github.com/STMicroelectronics/stm32wbxx_hal_driver.git'],
+    'hw/mcu/ti'                                : ['143ed6cc20a7615d042b03b21e070197d473e6e5', 'https://github.com/hathach/ti_driver.git'                      ],
+    'hw/mcu/wch/ch32v307'                      : ['17761f5cf9dbbf2dcf665b7c04934188add20082', 'https://github.com/openwch/ch32v307.git'                       ],
+    'lib/CMSIS_5'                              : ['20285262657d1b482d132d20d755c8c330d55c1f', 'https://github.com/ARM-software/CMSIS_5.git'                   ],
+    'lib/FreeRTOS-Kernel'                      : ['2a604f4a2818b8354b5e1a39e388eb5e16cfbc1f', 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git'               ],
+    'lib/lwip'                                 : ['159e31b689577dbf69cf0683bbaffbd71fa5ee10', 'https://github.com/lwip-tcpip/lwip.git'                        ],
+    'lib/sct_neopixel'                         : ['e73e04ca63495672d955f9268e003cffe168fcd8', 'https://github.com/gsteiert/sct_neopixel.git'                  ],
+    'tools/uf2'                                : ['19615407727073e36d81bf239c52108ba92e7660', 'https://github.com/microsoft/uf2.git'                          ],
 }
 
 # TOP is tinyusb root dir
@@ -68,8 +68,8 @@ def get_a_dep(d):
     if d not in deps_list.keys():
         print('{} is not found in dependency list')
         return 1
-    url = deps_list[d][0]
-    commit = deps_list[d][1]
+    commit = deps_list[d][0]
+    url = deps_list[d][1]
     print('cloning {} with {}'.format(d, url))
 
     p = Path(TOP / d)
@@ -96,6 +96,5 @@ if __name__ == "__main__":
     status = 0
     all_deps = sys.argv[1:]
     with Pool() as pool:
-        result = pool.map(get_a_dep, all_deps)
-        status = sum(result)
+        status = sum(pool.map(get_a_dep, all_deps))
     sys.exit(status)

From e045995407e060800877d6a6421f83a413f9e084 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 11 Mar 2023 08:54:51 +0700
Subject: [PATCH 138/691] minor update get_deps

---
 tools/get_deps.py | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/get_deps.py b/tools/get_deps.py
index 5c6bef389..3aa95ece5 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -79,8 +79,8 @@ def get_a_dep(d):
     # Init git deps if not existed
     if not p.exists():
         p.mkdir(parents=True)
-        subprocess.run("{} init".format(git_cmd), shell=True)
-        subprocess.run("{} remote add origin {}".format(git_cmd, url), shell=True)
+        subprocess.run("{} init".format(git_cmd), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+        subprocess.run("{} remote add origin {}".format(git_cmd, url), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
 
     # Check if commit is already fetched
     result = subprocess.run("{} rev-parse HEAD".format(git_cmd, commit), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
@@ -88,7 +88,7 @@ def get_a_dep(d):
 
     if commit != head:
         subprocess.run("{} fetch --depth 1 origin {}".format(git_cmd, commit), shell=True)
-        subprocess.run("{} checkout FETCH_HEAD".format(git_cmd), shell=True)
+        subprocess.run("{} checkout FETCH_HEAD".format(git_cmd), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
 
     return 0
 

From 0a7c08d16e10b9a252c7daeb3fe9b3abdd6ff225 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 12 Mar 2023 16:01:24 +0700
Subject: [PATCH 139/691] minor format

---
 src/portable/renesas/link/dcd_link.c | 57 +++++++++++++++++----
 src/portable/renesas/link/hcd_link.c | 76 ++++++++++++++++++++--------
 src/portable/renesas/link/link_rx.h  |  6 +--
 3 files changed, 104 insertions(+), 35 deletions(-)

diff --git a/src/portable/renesas/link/dcd_link.c b/src/portable/renesas/link/dcd_link.c
index dcbd68b8d..ce29769e0 100644
--- a/src/portable/renesas/link/dcd_link.c
+++ b/src/portable/renesas/link/dcd_link.c
@@ -31,10 +31,8 @@
 // We disable SOF for now until needed later on
 #define USE_SOF     0
 
-#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || \
-                        CFG_TUSB_MCU == OPT_MCU_RX65X || \
-                        CFG_TUSB_MCU == OPT_MCU_RX72N || \
-                        CFG_TUSB_MCU == OPT_MCU_RAXXX)
+#if CFG_TUD_ENABLED && (TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) || \
+                        TU_CHECK_MCU(OPT_MCU_RAXXX))
 
 #include "device/dcd.h"
 #include "link_type.h"
@@ -250,8 +248,9 @@ static bool pipe0_xfer_in(void)
       pipe->buf = (uint8_t*)buf + len;
     }
   }
-  if (len < mps)
+  if (len < mps) {
     LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
+  }
   pipe->remaining = rem - len;
   return false;
 }
@@ -273,8 +272,9 @@ static bool pipe0_xfer_out(void)
       pipe->buf = (uint8_t*)buf + len;
     }
   }
-  if (len < mps)
+  if (len < mps) {
     LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
+  }
   pipe->remaining = rem - len;
   if ((len < mps) || (rem == len)) {
     pipe->buf = NULL;
@@ -306,10 +306,11 @@ static bool pipe_xfer_in(unsigned num)
       pipe->buf = (uint8_t*)buf + len;
     }
   }
-  if (len < mps)
+  if (len < mps) {
     LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
+  }
   LINK_REG->D0FIFOSEL = 0;
-  while (LINK_REG->D0FIFOSEL_b.CURPIPE) continue; /* if CURPIPE bits changes, check written value */
+  while (LINK_REG->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
   pipe->remaining = rem - len;
   return false;
 }
@@ -333,10 +334,11 @@ static bool pipe_xfer_out(unsigned num)
       pipe->buf = (uint8_t*)buf + len;
     }
   }
-  if (len < mps)
+  if (len < mps) {
     LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
+  }
   LINK_REG->D0FIFOSEL = 0;
-  while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
+  while (LINK_REG->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
   pipe->remaining = rem - len;
   if ((len < mps) || (rem == len)) {
     pipe->buf = NULL;
@@ -377,7 +379,7 @@ static bool process_pipe0_xfer(int buffer_type, uint8_t ep_addr, void* buffer, u
   /* configure fifo direction and access unit settings */
   if (ep_addr) { /* IN, 2 bytes */
     LINK_REG->CFIFOSEL = LINK_REG_CFIFOSEL_ISEL_WRITE | LINK_REG_FIFOSEL_MBW_16BIT |
-             (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0);
+                         (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0);
     while (!(LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE)) ;
   } else { /* OUT, a byte */
     LINK_REG->CFIFOSEL = LINK_REG_FIFOSEL_MBW_8BIT;
@@ -541,10 +543,43 @@ static void process_set_address(uint8_t rhport)
 /*------------------------------------------------------------------*/
 /* Device API
  *------------------------------------------------------------------*/
+
+#if 0 // previously present in the rx driver before generalization
+static uint32_t disable_interrupt(void)
+{
+  uint32_t pswi;
+#if defined(__CCRX__)
+  pswi = get_psw() & 0x010000;
+  clrpsw_i();
+#else
+  pswi = __builtin_rx_mvfc(0) & 0x010000;
+  __builtin_rx_clrpsw('I');
+#endif
+  return pswi;
+}
+
+static void enable_interrupt(uint32_t pswi)
+{
+#if defined(__CCRX__)
+  set_psw(get_psw() | pswi);
+#else
+  __builtin_rx_mvtc(0, __builtin_rx_mvfc(0) | pswi);
+#endif
+}
+#endif
+
 void dcd_init(uint8_t rhport)
 {
   (void)rhport;
 
+#if 0 // previously present in the rx driver before generalization
+  uint32_t pswi = disable_interrupt();
+  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
+  MSTP(USB0) = 0;
+  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
+  enable_interrupt(pswi);
+#endif
+
   LINK_REG->SYSCFG_b.SCKE = 1;
   while (!LINK_REG->SYSCFG_b.SCKE) ;
   LINK_REG->SYSCFG_b.DRPD = 0;
diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/link/hcd_link.c
index f1ea2b821..b16544c2f 100644
--- a/src/portable/renesas/link/hcd_link.c
+++ b/src/portable/renesas/link/hcd_link.c
@@ -27,10 +27,8 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUH_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || \
-                        CFG_TUSB_MCU == OPT_MCU_RX65X || \
-                        CFG_TUSB_MCU == OPT_MCU_RX72N || \
-                        CFG_TUSB_MCU == OPT_MCU_RAXXX)
+#if CFG_TUH_ENABLED && (TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) || \
+                        TU_CHECK_MCU(OPT_MCU_RAXXX))
 
 #include "host/hcd.h"
 #include "link_type.h"
@@ -217,8 +215,9 @@ static bool pipe0_xfer_in(void)
     pipe_read_packet(buf, (volatile void*)&LINK_REG->CFIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
-  if (len < mps)
+  if (len < mps) {
     LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
+  }
   pipe->remaining = rem - len;
   if ((len < mps) || (rem == len)) {
     pipe->buf = NULL;
@@ -243,8 +242,9 @@ static bool pipe0_xfer_out(void)
     pipe_write_packet(buf, (volatile void*)&LINK_REG->CFIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
-  if (len < mps)
+  if (len < mps) {
     LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
+  }
   pipe->remaining = rem - len;
   return false;
 }
@@ -264,8 +264,9 @@ static bool pipe_xfer_in(unsigned num)
     pipe_read_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
-  if (len < mps)
+  if (len < mps) {
     LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
+  }
   LINK_REG->D0FIFOSEL = 0;
   while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
   pipe->remaining = rem - len;
@@ -314,7 +315,7 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer,
     while (LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE) ;
   } else { /* OUT, 2 bytes */
     LINK_REG->CFIFOSEL = LINK_REG_CFIFOSEL_ISEL_WRITE | LINK_REG_FIFOSEL_MBW_16BIT |
-             (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0);
+                         (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0);
     while (!(LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE)) ;
   }
 
@@ -363,7 +364,7 @@ static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void *buffer, u
       pipe_wait_for_ready(num);
       LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
       LINK_REG->D0FIFOSEL = 0;
-      while (LINK_REG->D0FIFOSEL_b.CURPIPE) continue; /* if CURPIPE bits changes, check written value */
+      while (LINK_REG->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
     }
   } else {
     volatile uint16_t     *ctr = get_pipectr(num);
@@ -447,10 +448,43 @@ static void process_pipe_brdy(uint8_t rhport, unsigned num)
 /*------------------------------------------------------------------*/
 /* Host API
  *------------------------------------------------------------------*/
+
+#if 0 // previously present in the rx driver before generalization
+static uint32_t disable_interrupt(void)
+{
+  uint32_t pswi;
+#if defined(__CCRX__)
+  pswi = get_psw() & 0x010000;
+  clrpsw_i();
+#else
+  pswi = __builtin_rx_mvfc(0) & 0x010000;
+  __builtin_rx_clrpsw('I');
+#endif
+  return pswi;
+}
+
+static void enable_interrupt(uint32_t pswi)
+{
+#if defined(__CCRX__)
+  set_psw(get_psw() | pswi);
+#else
+  __builtin_rx_mvtc(0, __builtin_rx_mvfc(0) | pswi);
+#endif
+}
+#endif
+
 bool hcd_init(uint8_t rhport)
 {
   (void)rhport;
 
+#if 0 // previously present in the rx driver before generalization
+  uint32_t pswi = disable_interrupt();
+  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
+  MSTP(USB0) = 0;
+  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
+  enable_interrupt(pswi);
+#endif
+
   LINK_REG->SYSCFG_b.SCKE = 1;
   while (!LINK_REG->SYSCFG_b.SCKE) ;
   LINK_REG->SYSCFG_b.DPRPU = 0;
@@ -470,7 +504,7 @@ bool hcd_init(uint8_t rhport)
   LINK_REG->DPUSR0R_FS_b.FIXPHY0 = 0u; /* Transceiver Output fixed */
 
   /* Setup default control pipe */
-  LINK_REG->DCPCFG = LINK_REG_PIPECFG_SHTNAK_Msk;
+  LINK_REG->DCPCFG  = LINK_REG_PIPECFG_SHTNAK_Msk;
   LINK_REG->DCPMAXP = 64;
   LINK_REG->INTENB0 = LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_NRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk;
   LINK_REG->INTENB1 = LINK_REG_INTSTS1_SACK_Msk | LINK_REG_INTSTS1_SIGN_Msk | LINK_REG_INTSTS1_ATTCH_Msk | LINK_REG_INTSTS1_DTCH_Msk;
@@ -515,8 +549,9 @@ void hcd_port_reset(uint8_t rhport)
   while (LINK_REG->DCPCTR_b.PBUSY) ;
   hcd_int_disable(rhport);
   LINK_REG->DVSTCTR0_b.UACT = 0;
-  if (LINK_REG->DCPCTR_b.SUREQ)
+  if (LINK_REG->DCPCTR_b.SUREQ) {
     LINK_REG->DCPCTR_b.SUREQCLR = 1;
+  }
   hcd_int_enable(rhport);
   /* Reset should be asserted 10-20ms. */
   LINK_REG->DVSTCTR0_b.USBRST = 1;
@@ -580,10 +615,10 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
 
   LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK;
 
-  _hcd.pipe[0].buf = NULL;
-  _hcd.pipe[0].length = 8;
+  _hcd.pipe[0].buf       = NULL;
+  _hcd.pipe[0].length    = 8;
   _hcd.pipe[0].remaining = 0;
-  _hcd.pipe[0].dev = dev_addr;
+  _hcd.pipe[0].dev       = dev_addr;
 
   while (LINK_REG->DCPCTR_b.PBUSY) ;
   LINK_REG->DCPMAXP = (dev_addr << 12) | _hcd.ctl_mps[dev_addr];
@@ -593,8 +628,8 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
   LINK_REG->DCPCFG_b.DIR = tu_edpt_dir(bmRequesttype) ? 0: 1;
 
   uint16_t const* p = (uint16_t const*)(uintptr_t)&setup_packet[0];
-  LINK_REG->USBREQ = tu_htole16(p[0]);
-  LINK_REG->USBVAL = p[1];
+  LINK_REG->USBREQ  = tu_htole16(p[0]);
+  LINK_REG->USBVAL  = p[1];
   LINK_REG->USBINDX = p[2];
   LINK_REG->USBLENG = p[3];
 
@@ -717,12 +752,10 @@ void hcd_int_handler(uint8_t rhport)
   if (is1 & LINK_REG_INTSTS1_SACK_Msk) {
     /* Set DATA1 in advance for the next transfer. */
     LINK_REG->DCPCTR_b.SQSET = 1;
-    hcd_event_xfer_complete(
-      LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true);
+    hcd_event_xfer_complete(LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true);
   }
   if (is1 & LINK_REG_INTSTS1_SIGN_Msk) {
-    hcd_event_xfer_complete(
-      LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true);
+    hcd_event_xfer_complete(LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true);
   }
   if (is1 & LINK_REG_INTSTS1_ATTCH_Msk) {
     LINK_REG->DVSTCTR0_b.UACT = 1;
@@ -732,8 +765,9 @@ void hcd_int_handler(uint8_t rhport)
   }
   if (is1 & LINK_REG_INTSTS1_DTCH_Msk) {
     LINK_REG->DVSTCTR0_b.UACT = 0;
-    if (LINK_REG->DCPCTR_b.SUREQ)
+    if (LINK_REG->DCPCTR_b.SUREQ) {
       LINK_REG->DCPCTR_b.SUREQCLR = 1;
+    }
     LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~LINK_REG_INTSTS1_DTCH_Msk) | LINK_REG_INTSTS1_ATTCH_Msk;
     hcd_event_device_remove(rhport, true);
   }
diff --git a/src/portable/renesas/link/link_rx.h b/src/portable/renesas/link/link_rx.h
index 62f2911c2..9e31c5b46 100644
--- a/src/portable/renesas/link/link_rx.h
+++ b/src/portable/renesas/link/link_rx.h
@@ -39,7 +39,7 @@ extern "C" {
 
 #define LINK_REG_BASE (0x000A0000)
 
-static inline void link_int_enable(uint8_t rhport)
+TU_ATTR_ALWAYS_INLINE static inline void link_int_enable(uint8_t rhport)
 {
   (void) rhport;
 #if (CFG_TUSB_MCU == OPT_MCU_RX72N)
@@ -49,7 +49,7 @@ static inline void link_int_enable(uint8_t rhport)
 #endif
 }
 
-static inline void link_int_disable(uint8_t rhport)
+TU_ATTR_ALWAYS_INLINE static inline void link_int_disable(uint8_t rhport)
 {
   (void) rhport;
 #if (CFG_TUSB_MCU == OPT_MCU_RX72N)
@@ -60,7 +60,7 @@ static inline void link_int_disable(uint8_t rhport)
 }
 
 // MCU specific PHY init
-static inline void link_phy_init(void)
+TU_ATTR_ALWAYS_INLINE static inline void link_phy_init(void)
 {
 #if (CFG_TUSB_MCU == OPT_MCU_RX72N)
   IR(PERIB, INTB185) = 0;

From f8a21fff171aa272360c89dab5faca4f688a656a Mon Sep 17 00:00:00 2001
From: Hubert Denkmair <xor@xor.wtf>
Date: Sun, 12 Mar 2023 15:51:07 +0100
Subject: [PATCH 140/691] dcd_write_packet_memory: use volatile modifier for
 destination pointer

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 21ae8e6e8..e2e1cf484 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -1228,8 +1228,8 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
 static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, size_t wNBytes)
 {
   // FIXME original function uses byte-access to source memory (to support non-aligned buffers)
-  const uint32_t* src32 = (uint32_t*)(src);
-  uint32_t* dst32 = (uint32_t*)(USB_PMAADDR + dst);
+  const uint32_t* src32 = (const uint32_t*)(src);
+  volatile uint32_t* dst32 = (volatile uint32_t*)(USB_PMAADDR + dst);
   for (unsigned n=wNBytes/4; n>0; --n) {
     *dst32++ = *src32++;
   }

From f6774d561148c7c2f41b66234d080e9dfd514551 Mon Sep 17 00:00:00 2001
From: James Smith <jmsmith86@gmail.com>
Date: Tue, 7 Feb 2023 20:46:00 -0700
Subject: [PATCH 141/691] Implemented tuh_hid_send_report

---
 src/class/hid/hid_host.c | 48 +++++++++++++++++++++++++++++++++++++---
 src/class/hid/hid_host.h |  4 ++--
 2 files changed, 47 insertions(+), 5 deletions(-)

diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c
index 42b5e2f4e..22569194f 100644
--- a/src/class/hid/hid_host.c
+++ b/src/class/hid/hid_host.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -274,7 +274,49 @@ bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t instance)
 //  return !usbh_edpt_busy(dev_addr, hid_itf->ep_in);
 //}
 
-//void tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t const* report, uint16_t len);
+bool tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t const* report, uint16_t len)
+{
+  TU_LOG2("HID Send Report %d\r\n", report_id);
+
+  hidh_interface_t* hid_itf = get_instance(dev_addr, instance);
+
+  if (hid_itf->ep_out == 0)
+  {
+    // This HID does not have an out endpoint (other than control)
+    return false;
+  }
+  else if (len > CFG_TUH_HID_EPOUT_BUFSIZE
+           || (report_id != 0 && len > (CFG_TUH_HID_EPOUT_BUFSIZE - 1)))
+  {
+    // ep_out buffer is not large enough to hold contents
+    return false;
+  }
+
+  // claim endpoint
+  TU_VERIFY( usbh_edpt_claim(dev_addr, hid_itf->ep_out) );
+
+  if (report_id == 0)
+  {
+    // No report ID in transmission
+    memcpy(&hid_itf->epout_buf[0], report, len);
+  }
+  else
+  {
+    hid_itf->epout_buf[0] = report_id;
+    memcpy(&hid_itf->epout_buf[1], report, len);
+    ++len; // 1 more byte for report_id
+  }
+
+  TU_LOG3_MEM(hid_itf->epout_buf, len, 2);
+
+  if ( !usbh_edpt_xfer(dev_addr, hid_itf->ep_out, hid_itf->epout_buf, len) )
+  {
+    usbh_edpt_release(dev_addr, hid_itf->ep_out);
+    return false;
+  }
+
+  return true;
+}
 
 //--------------------------------------------------------------------+
 // USBH API
@@ -349,7 +391,7 @@ bool hidh_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *de
   hidh_device_t* hid_dev = get_dev(dev_addr);
   TU_ASSERT(hid_dev->inst_count < CFG_TUH_HID, 0);
 
-  hidh_interface_t* hid_itf = get_instance(dev_addr, hid_dev->inst_count);  
+  hidh_interface_t* hid_itf = get_instance(dev_addr, hid_dev->inst_count);
 
   //------------- Endpoint Descriptors -------------//
   p_desc = tu_desc_next(p_desc);
diff --git a/src/class/hid/hid_host.h b/src/class/hid/hid_host.h
index ffc601d77..e5f159ca8 100644
--- a/src/class/hid/hid_host.h
+++ b/src/class/hid/hid_host.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -106,7 +106,7 @@ bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t instance);
 
 // Send report using interrupt endpoint
 // If report_id > 0 (composite), it will be sent as 1st byte, then report contents. Otherwise only report content is sent.
-//void tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t const* report, uint16_t len);
+bool tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t const* report, uint16_t len);
 
 //--------------------------------------------------------------------+
 // Callbacks (Weak is optional)

From 296ce528fcc3632205cb7f6f5a2f386169fdbf36 Mon Sep 17 00:00:00 2001
From: James Smith <jmsmith86@gmail.com>
Date: Thu, 9 Feb 2023 19:42:36 -0700
Subject: [PATCH 142/691] Updated host hid_controller example to demo
 tuh_hid_send_report

---
 examples/host/hid_controller/src/hid_app.c | 87 +++++++++++++++++++---
 src/class/hid/hid_host.c                   |  2 +-
 src/class/hid/hid_host.h                   |  2 +-
 3 files changed, 80 insertions(+), 11 deletions(-)

diff --git a/examples/host/hid_controller/src/hid_app.c b/examples/host/hid_controller/src/hid_app.c
index 75c91400e..0444d6eb5 100644
--- a/examples/host/hid_controller/src/hid_app.c
+++ b/examples/host/hid_controller/src/hid_app.c
@@ -91,9 +91,8 @@ typedef struct TU_ATTR_PACKED
     uint8_t counter : 6; // +1 each report
   };
 
-  // comment out since not used by this example
-  // uint8_t l2_trigger; // 0 released, 0xff fully pressed
-  // uint8_t r2_trigger; // as above
+  uint8_t l2_trigger; // 0 released, 0xff fully pressed
+  uint8_t r2_trigger; // as above
 
   //  uint16_t timestamp;
   //  uint8_t  battery;
@@ -105,15 +104,54 @@ typedef struct TU_ATTR_PACKED
 
 } sony_ds4_report_t;
 
+typedef struct TU_ATTR_PACKED {
+  // First 16 bits set what data is pertinent in this structure (1 = set; 0 = not set)
+	uint8_t set_rumble : 1;
+  uint8_t set_led : 1;
+  uint8_t set_led_blink : 1;
+  uint8_t set_ext_write : 1;
+  uint8_t set_left_volume : 1;
+  uint8_t set_right_volume : 1;
+  uint8_t set_mic_volume : 1;
+  uint8_t set_speaker_volume : 1;
+  uint8_t set_flags2;
+
+	uint8_t reserved;
+
+	uint8_t motor_right;
+	uint8_t motor_left;
+
+	uint8_t lightbar_red;
+	uint8_t lightbar_green;
+	uint8_t lightbar_blue;
+	uint8_t lightbar_blink_on;
+	uint8_t lightbar_blink_off;
+
+  uint8_t ext_data[8];
+
+  uint8_t volume_left;
+  uint8_t volume_right;
+  uint8_t volume_mic;
+  uint8_t volume_speaker;
+
+  uint8_t other[9];
+} sony_ds4_output_report_t;
+
+static bool ds4_mounted = false;
+static uint8_t ds4_dev_addr = 0;
+static uint8_t ds4_instance = 0;
+static uint8_t motor_left = 0;
+static uint8_t motor_right = 0;
+
 // check if device is Sony DualShock 4
 static inline bool is_sony_ds4(uint8_t dev_addr)
 {
   uint16_t vid, pid;
   tuh_vid_pid_get(dev_addr, &vid, &pid);
 
-  return ( (vid == 0x054c && (pid == 0x09cc || pid == 0x05c4)) // Sony DualShock4 
-           || (vid == 0x0f0d && pid == 0x005e)                 // Hori FC4 
-           || (vid == 0x0f0d && pid == 0x00ee)                 // Hori PS4 Mini (PS4-099U) 
+  return ( (vid == 0x054c && (pid == 0x09cc || pid == 0x05c4)) // Sony DualShock4
+           || (vid == 0x0f0d && pid == 0x005e)                 // Hori FC4
+           || (vid == 0x0f0d && pid == 0x00ee)                 // Hori PS4 Mini (PS4-099U)
            || (vid == 0x1f4f && pid == 0x1002)                 // ASW GG xrd controller
          );
 }
@@ -124,7 +162,22 @@ static inline bool is_sony_ds4(uint8_t dev_addr)
 
 void hid_app_task(void)
 {
-  // nothing to do
+  if (ds4_mounted)
+  {
+    const uint32_t interval_ms = 200;
+    static uint32_t start_ms = 0;
+
+    if ( board_millis() - start_ms >= interval_ms)
+    {
+      start_ms += interval_ms;
+
+      sony_ds4_output_report_t output_report = {0};
+      output_report.set_rumble = 1;
+      output_report.motor_left = motor_left;
+      output_report.motor_right = motor_right;
+      tuh_hid_send_report(ds4_dev_addr, ds4_instance, 5, &output_report, sizeof(output_report));
+    }
+  }
 }
 
 //--------------------------------------------------------------------+
@@ -149,6 +202,14 @@ void tuh_hid_mount_cb(uint8_t dev_addr, uint8_t instance, uint8_t const* desc_re
   // Sony DualShock 4 [CUH-ZCT2x]
   if ( is_sony_ds4(dev_addr) )
   {
+    if (!ds4_mounted)
+    {
+      ds4_dev_addr = dev_addr;
+      ds4_instance = instance;
+      motor_left = 0;
+      motor_right = 0;
+      ds4_mounted = true;
+    }
     // request to receive report
     // tuh_hid_report_received_cb() will be invoked when report is available
     if ( !tuh_hid_receive_report(dev_addr, instance) )
@@ -162,6 +223,10 @@ void tuh_hid_mount_cb(uint8_t dev_addr, uint8_t instance, uint8_t const* desc_re
 void tuh_hid_umount_cb(uint8_t dev_addr, uint8_t instance)
 {
   printf("HID device address = %d, instance = %d is unmounted\r\n", dev_addr, instance);
+  if (ds4_mounted && ds4_dev_addr == dev_addr && ds4_instance == instance)
+  {
+    ds4_mounted = false;
+  }
 }
 
 // check if different than 2
@@ -179,8 +244,8 @@ bool diff_report(sony_ds4_report_t const* rpt1, sony_ds4_report_t const* rpt2)
   result = diff_than_2(rpt1->x, rpt2->x) || diff_than_2(rpt1->y , rpt2->y ) ||
            diff_than_2(rpt1->z, rpt2->z) || diff_than_2(rpt1->rz, rpt2->rz);
 
-  // check the reset with mem compare
-  result |= memcmp(&rpt1->rz + 1, &rpt2->rz + 1, sizeof(sony_ds4_report_t)-4);
+  // check the rest with mem compare
+  result |= memcmp(&rpt1->rz + 1, &rpt2->rz + 1, sizeof(sony_ds4_report_t)-6);
 
   return result;
 }
@@ -234,6 +299,10 @@ void process_sony_ds4(uint8_t const* report, uint16_t len)
       printf("\r\n");
     }
 
+    // The left and right triggers control the intensity of the left and right rumble motors
+    motor_left = ds4_report.l2_trigger;
+    motor_right = ds4_report.r2_trigger;
+
     prev_report = ds4_report;
   }
 }
diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c
index 22569194f..e5fc86267 100644
--- a/src/class/hid/hid_host.c
+++ b/src/class/hid/hid_host.c
@@ -274,7 +274,7 @@ bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t instance)
 //  return !usbh_edpt_busy(dev_addr, hid_itf->ep_in);
 //}
 
-bool tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t const* report, uint16_t len)
+bool tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, const void* report, uint16_t len)
 {
   TU_LOG2("HID Send Report %d\r\n", report_id);
 
diff --git a/src/class/hid/hid_host.h b/src/class/hid/hid_host.h
index e5f159ca8..c152e527a 100644
--- a/src/class/hid/hid_host.h
+++ b/src/class/hid/hid_host.h
@@ -106,7 +106,7 @@ bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t instance);
 
 // Send report using interrupt endpoint
 // If report_id > 0 (composite), it will be sent as 1st byte, then report contents. Otherwise only report content is sent.
-bool tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t const* report, uint16_t len);
+bool tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, const void* report, uint16_t len);
 
 //--------------------------------------------------------------------+
 // Callbacks (Weak is optional)

From 43770802f9164f8bc3973719c25ba46ff4ba23ca Mon Sep 17 00:00:00 2001
From: James Smith <jmsmith86@gmail.com>
Date: Thu, 9 Feb 2023 19:52:42 -0700
Subject: [PATCH 143/691] Removed tabs from host hid_controller example

---
 examples/host/hid_controller/src/hid_app.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/examples/host/hid_controller/src/hid_app.c b/examples/host/hid_controller/src/hid_app.c
index 0444d6eb5..114768ab7 100644
--- a/examples/host/hid_controller/src/hid_app.c
+++ b/examples/host/hid_controller/src/hid_app.c
@@ -106,7 +106,7 @@ typedef struct TU_ATTR_PACKED
 
 typedef struct TU_ATTR_PACKED {
   // First 16 bits set what data is pertinent in this structure (1 = set; 0 = not set)
-	uint8_t set_rumble : 1;
+  uint8_t set_rumble : 1;
   uint8_t set_led : 1;
   uint8_t set_led_blink : 1;
   uint8_t set_ext_write : 1;
@@ -116,16 +116,16 @@ typedef struct TU_ATTR_PACKED {
   uint8_t set_speaker_volume : 1;
   uint8_t set_flags2;
 
-	uint8_t reserved;
+  uint8_t reserved;
 
-	uint8_t motor_right;
-	uint8_t motor_left;
+  uint8_t motor_right;
+  uint8_t motor_left;
 
-	uint8_t lightbar_red;
-	uint8_t lightbar_green;
-	uint8_t lightbar_blue;
-	uint8_t lightbar_blink_on;
-	uint8_t lightbar_blink_off;
+  uint8_t lightbar_red;
+  uint8_t lightbar_green;
+  uint8_t lightbar_blue;
+  uint8_t lightbar_blink_on;
+  uint8_t lightbar_blink_off;
 
   uint8_t ext_data[8];
 

From 9247131b1f6476c433ceb47d4746c9bc5baf8b65 Mon Sep 17 00:00:00 2001
From: James Smith <jmsmith86@gmail.com>
Date: Thu, 9 Feb 2023 21:21:57 -0700
Subject: [PATCH 144/691] Avoid spamming out endpoint on connect

---
 examples/host/hid_controller/src/hid_app.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/examples/host/hid_controller/src/hid_app.c b/examples/host/hid_controller/src/hid_app.c
index 114768ab7..76de97b41 100644
--- a/examples/host/hid_controller/src/hid_app.c
+++ b/examples/host/hid_controller/src/hid_app.c
@@ -167,9 +167,10 @@ void hid_app_task(void)
     const uint32_t interval_ms = 200;
     static uint32_t start_ms = 0;
 
-    if ( board_millis() - start_ms >= interval_ms)
+    uint32_t current_time_ms = board_millis();
+    if ( current_time_ms - start_ms >= interval_ms)
     {
-      start_ms += interval_ms;
+      start_ms = current_time_ms;
 
       sony_ds4_output_report_t output_report = {0};
       output_report.set_rumble = 1;

From d31aac453eaa0b56a998c3cca5d2efd4c55209af Mon Sep 17 00:00:00 2001
From: Scott Shawcroft <scott@tannewt.org>
Date: Mon, 13 Mar 2023 15:22:00 -0700
Subject: [PATCH 145/691] Flush the dcd data on reset

---
 src/portable/chipidea/ci_hs/dcd_ci_hs.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
index 32c2fc029..91d5524b6 100644
--- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
@@ -48,6 +48,8 @@
 
 #define CI_HS_REG(_port)      ((ci_hs_regs_t*) _ci_controller[_port].reg_base)
 
+// Clean means to push any cached changes to RAM and invalidate "removes" the
+// entry from the cache.
 #if defined(__CORTEX_M) && __CORTEX_M == 7 && __DCACHE_PRESENT == 1
   #define CleanInvalidateDCache_by_Addr   SCB_CleanInvalidateDCache_by_Addr
 #else
@@ -199,6 +201,8 @@ static void bus_reset(uint8_t rhport)
   _dcd_data.qhd[0][0].qtd_overlay.next = _dcd_data.qhd[0][1].qtd_overlay.next = QTD_NEXT_INVALID;
 
   _dcd_data.qhd[0][0].int_on_setup = 1; // OUT only
+
+  CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t));
 }
 
 void dcd_init(uint8_t rhport)

From d9a9dc5ac0a9679403a75dbe3a32c4d4678998e6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 10 Mar 2023 14:39:57 +0700
Subject: [PATCH 146/691] fix PICO_SHARED_IRQ_HANDLER_HIGHEST_ORDER_PRIORITY
 not defined in old pico-sdk

---
 src/portable/raspberrypi/rp2040/dcd_rp2040.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
index 37dec1cbf..4af8c2d71 100644
--- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
@@ -385,6 +385,11 @@ static void __tusb_irq_path_func(dcd_rp2040_irq)(void)
 /* Controller API
  *------------------------------------------------------------------*/
 
+// older SDK
+#ifndef PICO_SHARED_IRQ_HANDLER_HIGHEST_ORDER_PRIORITY
+#define PICO_SHARED_IRQ_HANDLER_HIGHEST_ORDER_PRIORITY 0xff
+#endif
+
 void dcd_init (uint8_t rhport)
 {
   assert(rhport == 0);

From ffa56a1beb724397e434e5e74e2a7b1d4583acd8 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 15 Mar 2023 17:40:02 +0700
Subject: [PATCH 147/691] add pre-commit yaml

---
 .pre-commit-config.yaml | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
 create mode 100644 .pre-commit-config.yaml

diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
new file mode 100644
index 000000000..5a61f5282
--- /dev/null
+++ b/.pre-commit-config.yaml
@@ -0,0 +1,20 @@
+# SPDX-FileCopyrightText: 2020 Diego Elio Pettenò
+#
+# SPDX-License-Identifier: Unlicense
+
+repos:
+-   repo: local
+    hooks:
+    -   id: codespell
+        name: codespell
+        entry: codespell
+        types_or: [c, header]
+        language: system
+
+    -   id: unit-test
+        name: unit-test
+        files: ^(src/|test/unit-test/)
+        entry: sh -c "cd test/unit-test && ceedling test:all"
+        pass_filenames: false
+        types_or: [c, header]
+        language: system

From fabe86362b0cf914a80f27023775291ffabe9bbc Mon Sep 17 00:00:00 2001
From: tyustli <1225613647@qq.com>
Date: Thu, 16 Mar 2023 08:28:19 +0800
Subject: [PATCH 148/691] fix HAL_Delay no effect bug on st platform

---
 hw/bsp/stm32f0/family.c                  | 1 +
 hw/bsp/stm32f1/family.c                  | 1 +
 hw/bsp/stm32f207nucleo/stm32f207nucleo.c | 1 +
 hw/bsp/stm32f303disco/stm32f303disco.c   | 1 +
 hw/bsp/stm32f4/family.c                  | 1 +
 hw/bsp/stm32f7/family.c                  | 1 +
 hw/bsp/stm32g4/family.c                  | 1 +
 hw/bsp/stm32h7/family.c                  | 1 +
 hw/bsp/stm32l0/family.c                  | 1 +
 hw/bsp/stm32l0538disco/stm32l0538disco.c | 1 +
 hw/bsp/stm32l4/family.c                  | 1 +
 hw/bsp/stm32u5/family.c                  | 1 +
 hw/bsp/stm32wb/family.c                  | 1 +
 13 files changed, 13 insertions(+)

diff --git a/hw/bsp/stm32f0/family.c b/hw/bsp/stm32f0/family.c
index 0765f361d..884208fb1 100644
--- a/hw/bsp/stm32f0/family.c
+++ b/hw/bsp/stm32f0/family.c
@@ -143,6 +143,7 @@ int board_uart_write(void const * buf, int len)
 volatile uint32_t system_ticks = 0;
 void SysTick_Handler (void)
 {
+  HAL_IncTick();
   system_ticks++;
 }
 
diff --git a/hw/bsp/stm32f1/family.c b/hw/bsp/stm32f1/family.c
index 61b40badd..6f0471096 100644
--- a/hw/bsp/stm32f1/family.c
+++ b/hw/bsp/stm32f1/family.c
@@ -129,6 +129,7 @@ int board_uart_write(void const * buf, int len)
 volatile uint32_t system_ticks = 0;
 void SysTick_Handler (void)
 {
+  HAL_IncTick();
   system_ticks++;
 }
 
diff --git a/hw/bsp/stm32f207nucleo/stm32f207nucleo.c b/hw/bsp/stm32f207nucleo/stm32f207nucleo.c
index 619c90d68..d77643661 100644
--- a/hw/bsp/stm32f207nucleo/stm32f207nucleo.c
+++ b/hw/bsp/stm32f207nucleo/stm32f207nucleo.c
@@ -191,6 +191,7 @@ int board_uart_write(void const * buf, int len)
 volatile uint32_t system_ticks = 0;
 void SysTick_Handler (void)
 {
+  HAL_IncTick();
   system_ticks++;
 }
 
diff --git a/hw/bsp/stm32f303disco/stm32f303disco.c b/hw/bsp/stm32f303disco/stm32f303disco.c
index 33552bc07..940c49d26 100644
--- a/hw/bsp/stm32f303disco/stm32f303disco.c
+++ b/hw/bsp/stm32f303disco/stm32f303disco.c
@@ -193,6 +193,7 @@ int board_uart_write(void const * buf, int len)
 volatile uint32_t system_ticks = 0;
 void SysTick_Handler (void)
 {
+  HAL_IncTick();
   system_ticks++;
 }
 
diff --git a/hw/bsp/stm32f4/family.c b/hw/bsp/stm32f4/family.c
index 674058f50..93ab5bb35 100644
--- a/hw/bsp/stm32f4/family.c
+++ b/hw/bsp/stm32f4/family.c
@@ -180,6 +180,7 @@ int board_uart_write(void const * buf, int len)
 volatile uint32_t system_ticks = 0;
 void SysTick_Handler (void)
 {
+  HAL_IncTick();
   system_ticks++;
 }
 
diff --git a/hw/bsp/stm32f7/family.c b/hw/bsp/stm32f7/family.c
index 536eb0554..88cba2c7d 100644
--- a/hw/bsp/stm32f7/family.c
+++ b/hw/bsp/stm32f7/family.c
@@ -293,6 +293,7 @@ int board_uart_write(void const * buf, int len)
 volatile uint32_t system_ticks = 0;
 void SysTick_Handler (void)
 {
+  HAL_IncTick();
   system_ticks++;
 }
 
diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c
index 32c46b7d8..f3ba54576 100644
--- a/hw/bsp/stm32g4/family.c
+++ b/hw/bsp/stm32g4/family.c
@@ -167,6 +167,7 @@ int board_uart_write(void const * buf, int len)
 volatile uint32_t system_ticks = 0;
 void SysTick_Handler (void)
 {
+  HAL_IncTick();
   system_ticks++;
 }
 
diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c
index 28a2568fa..65ffc8ef4 100644
--- a/hw/bsp/stm32h7/family.c
+++ b/hw/bsp/stm32h7/family.c
@@ -251,6 +251,7 @@ int board_uart_write(void const * buf, int len)
 volatile uint32_t system_ticks = 0;
 void SysTick_Handler(void)
 {
+  HAL_IncTick();
   system_ticks++;
 }
 
diff --git a/hw/bsp/stm32l0/family.c b/hw/bsp/stm32l0/family.c
index 80a7c7435..dcd71a513 100644
--- a/hw/bsp/stm32l0/family.c
+++ b/hw/bsp/stm32l0/family.c
@@ -141,6 +141,7 @@ int board_uart_write(void const * buf, int len)
 volatile uint32_t system_ticks = 0;
 void SysTick_Handler (void)
 {
+  HAL_IncTick();
   system_ticks++;
 }
 
diff --git a/hw/bsp/stm32l0538disco/stm32l0538disco.c b/hw/bsp/stm32l0538disco/stm32l0538disco.c
index f0f1d028b..f4c38d150 100644
--- a/hw/bsp/stm32l0538disco/stm32l0538disco.c
+++ b/hw/bsp/stm32l0538disco/stm32l0538disco.c
@@ -183,6 +183,7 @@ int board_uart_write(void const * buf, int len)
 volatile uint32_t system_ticks = 0;
 void SysTick_Handler (void)
 {
+  HAL_IncTick();
   system_ticks++;
 }
 
diff --git a/hw/bsp/stm32l4/family.c b/hw/bsp/stm32l4/family.c
index 19b84c086..d661613af 100644
--- a/hw/bsp/stm32l4/family.c
+++ b/hw/bsp/stm32l4/family.c
@@ -204,6 +204,7 @@ int board_uart_write(void const * buf, int len)
 volatile uint32_t system_ticks = 0;
 void SysTick_Handler (void)
 {
+  HAL_IncTick();
   system_ticks++;
 }
 
diff --git a/hw/bsp/stm32u5/family.c b/hw/bsp/stm32u5/family.c
index 9bc94cfa3..ee8a5d7ff 100644
--- a/hw/bsp/stm32u5/family.c
+++ b/hw/bsp/stm32u5/family.c
@@ -179,6 +179,7 @@ int board_uart_write(void const *buf, int len)
 volatile uint32_t system_ticks = 0;
 void SysTick_Handler(void)
 {
+  HAL_IncTick();
   system_ticks++;
 }
 
diff --git a/hw/bsp/stm32wb/family.c b/hw/bsp/stm32wb/family.c
index 9f1f46f4d..525d637ea 100644
--- a/hw/bsp/stm32wb/family.c
+++ b/hw/bsp/stm32wb/family.c
@@ -169,6 +169,7 @@ int board_uart_write(void const * buf, int len)
 volatile uint32_t system_ticks = 0;
 void SysTick_Handler (void)
 {
+  HAL_IncTick();
   system_ticks++;
 }
 

From 1117cf5729d5896d960285e3d522064c63e2a2cc Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 16 Mar 2023 10:05:46 +0700
Subject: [PATCH 149/691] update pre-commit yaml

---
 .pre-commit-config.yaml | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index 5a61f5282..865307896 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -3,6 +3,13 @@
 # SPDX-License-Identifier: Unlicense
 
 repos:
+-   repo: https://github.com/pre-commit/pre-commit-hooks
+    rev: v4.0.1
+    hooks:
+    - id: check-yaml
+    - id: trailing-whitespace
+    - id: end-of-file-fixer
+
 -   repo: local
     hooks:
     -   id: codespell

From bc2127b3305f5a6e689c1a3264fdee06928cd60e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 16 Mar 2023 11:03:08 +0700
Subject: [PATCH 150/691] rename file link to rusb2

---
 .codespell/exclude-file.txt                               | 4 ----
 .codespell/ignore-words.txt                               | 1 +
 hw/bsp/ra/family.mk                                       | 4 ++--
 hw/bsp/rx/family.mk                                       | 4 ++--
 .../renesas/{link/dcd_link.c => rusb2/dcd_rusb2.c}        | 8 ++++----
 .../renesas/{link/hcd_link.c => rusb2/hcd_rusb2.c}        | 8 ++++----
 src/portable/renesas/{link/link_ra.h => rusb2/rusb2_ra.h} | 2 --
 src/portable/renesas/{link/link_rx.h => rusb2/rusb2_rx.h} | 2 --
 .../renesas/{link/link_type.h => rusb2/rusb2_type.h}      | 0
 9 files changed, 13 insertions(+), 20 deletions(-)
 rename src/portable/renesas/{link/dcd_link.c => rusb2/dcd_rusb2.c} (99%)
 rename src/portable/renesas/{link/hcd_link.c => rusb2/hcd_rusb2.c} (99%)
 rename src/portable/renesas/{link/link_ra.h => rusb2/rusb2_ra.h} (98%)
 rename src/portable/renesas/{link/link_rx.h => rusb2/rusb2_rx.h} (98%)
 rename src/portable/renesas/{link/link_type.h => rusb2/rusb2_type.h} (100%)

diff --git a/.codespell/exclude-file.txt b/.codespell/exclude-file.txt
index 660d2e07e..e69de29bb 100644
--- a/.codespell/exclude-file.txt
+++ b/.codespell/exclude-file.txt
@@ -1,4 +0,0 @@
-  return LINK_REG->INTSTS1_b.ATTCH ? true : false;
-      volatile uint16_t ATTCH     : 1; /* [11..11] ATTCH Interrupt Status */
-#define LINK_REG_INTSTS1_ATTCH_Pos         (11UL)       /* ATTCH (Bit 11) */
-#define LINK_REG_INTSTS1_ATTCH_Msk         (0x800UL)    /* ATTCH (Bitfield-Mask: 0x01) */
diff --git a/.codespell/ignore-words.txt b/.codespell/ignore-words.txt
index e37d97a9f..e1ad88a07 100644
--- a/.codespell/ignore-words.txt
+++ b/.codespell/ignore-words.txt
@@ -6,3 +6,4 @@ fro
 dout
 mot
 te
+attch
diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk
index e75e74104..3c681a7c3 100644
--- a/hw/bsp/ra/family.mk
+++ b/hw/bsp/ra/family.mk
@@ -20,8 +20,8 @@ CFLAGS += \
 	-ffreestanding
 
 SRC_C += \
-	src/portable/renesas/link/dcd_link.c \
-	src/portable/renesas/link/hcd_link.c \
+	src/portable/renesas/rusb2/dcd_rusb2.c \
+	src/portable/renesas/rusb2/hcd_rusb2.c \
 	hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c \
 	hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c \
 	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_clocks.c \
diff --git a/hw/bsp/rx/family.mk b/hw/bsp/rx/family.mk
index ef9db293a..3044167b9 100644
--- a/hw/bsp/rx/family.mk
+++ b/hw/bsp/rx/family.mk
@@ -17,8 +17,8 @@ CFLAGS += \
 CFLAGS += -Wno-error=redundant-decls
 
 SRC_C += \
-	src/portable/renesas/link/dcd_link.c \
-	src/portable/renesas/link/hcd_link.c \
+	src/portable/renesas/rusb2/dcd_rusb2.c \
+	src/portable/renesas/rusb2/hcd_rusb2.c \
 	$(MCU_DIR)/vects.c
 
 INC += \
diff --git a/src/portable/renesas/link/dcd_link.c b/src/portable/renesas/rusb2/dcd_rusb2.c
similarity index 99%
rename from src/portable/renesas/link/dcd_link.c
rename to src/portable/renesas/rusb2/dcd_rusb2.c
index ce29769e0..ec9caab2c 100644
--- a/src/portable/renesas/link/dcd_link.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -35,14 +35,14 @@
                         TU_CHECK_MCU(OPT_MCU_RAXXX))
 
 #include "device/dcd.h"
-#include "link_type.h"
+#include "rusb2_type.h"
 
 #if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
-#include "link_rx.h"
+  #include "rusb2_rx.h"
 #elif TU_CHECK_MCU(OPT_MCU_RAXXX)
-#include "link_ra.h"
+  #include "rusb2_ra.h"
 #else
-#error "Unsupported MCU"
+  #error "Unsupported MCU"
 #endif
 
 //--------------------------------------------------------------------+
diff --git a/src/portable/renesas/link/hcd_link.c b/src/portable/renesas/rusb2/hcd_rusb2.c
similarity index 99%
rename from src/portable/renesas/link/hcd_link.c
rename to src/portable/renesas/rusb2/hcd_rusb2.c
index b16544c2f..7d14aad60 100644
--- a/src/portable/renesas/link/hcd_link.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -31,14 +31,14 @@
                         TU_CHECK_MCU(OPT_MCU_RAXXX))
 
 #include "host/hcd.h"
-#include "link_type.h"
+#include "rusb2_type.h"
 
 #if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
-#include "link_rx.h"
+  #include "rusb2_rx.h"
 #elif TU_CHECK_MCU(OPT_MCU_RAXXX)
-#include "link_ra.h"
+  #include "rusb2_ra.h"
 #else
-#error "Unsupported MCU"
+  #error "Unsupported MCU"
 #endif
 
 //--------------------------------------------------------------------+
diff --git a/src/portable/renesas/link/link_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h
similarity index 98%
rename from src/portable/renesas/link/link_ra.h
rename to src/portable/renesas/rusb2/rusb2_ra.h
index 97618ef8f..a73b13951 100644
--- a/src/portable/renesas/link/link_ra.h
+++ b/src/portable/renesas/rusb2/rusb2_ra.h
@@ -31,8 +31,6 @@
 extern "C" {
 #endif
 
-#include "link_type.h"
-
 /* renesas fsp api */
 #include "bsp_api.h"
 
diff --git a/src/portable/renesas/link/link_rx.h b/src/portable/renesas/rusb2/rusb2_rx.h
similarity index 98%
rename from src/portable/renesas/link/link_rx.h
rename to src/portable/renesas/rusb2/rusb2_rx.h
index 9e31c5b46..e43253569 100644
--- a/src/portable/renesas/link/link_rx.h
+++ b/src/portable/renesas/rusb2/rusb2_rx.h
@@ -33,8 +33,6 @@
 extern "C" {
 #endif
 
-#include "link_type.h"
-
 #include "iodefine.h"
 
 #define LINK_REG_BASE (0x000A0000)
diff --git a/src/portable/renesas/link/link_type.h b/src/portable/renesas/rusb2/rusb2_type.h
similarity index 100%
rename from src/portable/renesas/link/link_type.h
rename to src/portable/renesas/rusb2/rusb2_type.h

From 92aed7e3e0600570da239729d1e83ede69be8158 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 16 Mar 2023 11:28:10 +0700
Subject: [PATCH 151/691] rename symbols

---
 docs/reference/supported.rst            |    4 +-
 src/portable/renesas/rusb2/dcd_rusb2.c  |  274 +++---
 src/portable/renesas/rusb2/hcd_rusb2.c  |  294 +++---
 src/portable/renesas/rusb2/rusb2_ra.h   |   10 +-
 src/portable/renesas/rusb2/rusb2_rx.h   |    8 +-
 src/portable/renesas/rusb2/rusb2_type.h | 1136 +++++++++++------------
 6 files changed, 862 insertions(+), 864 deletions(-)

diff --git a/docs/reference/supported.rst b/docs/reference/supported.rst
index 30a685854..ae16d361d 100644
--- a/docs/reference/supported.rst
+++ b/docs/reference/supported.rst
@@ -62,9 +62,9 @@ Supported MCUs
 +--------------+---------+-------------+--------+------+-----------+-------------------+--------------+
 | Raspberry Pi | RP2040                | ✔      | ✔    | ✖         | rp2040, pio_usb   |              |
 +--------------+-----+-----------------+--------+------+-----------+-------------------+--------------+
-| Renesas      | RX  | 63N, 65N, 72N   | ✔      | ✔    | ✖         | link              |              |
+| Renesas      | RX  | 63N, 65N, 72N   | ✔      | ✔    | ✖         | rusb2             |              |
 |              +-----+-----------------+--------+------+-----------+-------------------+--------------+
-|              | RA  | XXX             | ✔      | ✔    |           | link              |              |
+|              | RA  | XXX             | ✔      | ✔    |           | rusb2             |              |
 +--------------+-----+-----------------+--------+------+-----------+-------------------+--------------+
 | Silabs       | EFM32GG12             | ✔      |      | ✖         | dwc2              |              |
 +--------------+-----------------------+--------+------+-----------+-------------------+--------------+
diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index ec9caab2c..78584125f 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -51,9 +51,9 @@
 
 /* LINK core registers */
 #if defined(__CCRX__)
-#define LINK_REG ((LINK_REG_t __evenaccess*)LINK_REG_BASE)
+  #define RUSB2 ((RUSB2_REG_t __evenaccess*) RUSB2_REG_BASE)
 #else
-#define LINK_REG ((LINK_REG_t*)LINK_REG_BASE)
+  #define RUSB2 ((RUSB2_REG_t*) RUSB2_REG_BASE)
 #endif
 
 /* Start of definition of packed structs (used by the CCRX toolchain) */
@@ -138,9 +138,9 @@ static unsigned find_pipe(unsigned xfer)
 static volatile uint16_t* get_pipectr(unsigned num)
 {
   if (num) {
-    return (volatile uint16_t*)&(LINK_REG->PIPE_CTR[num - 1]);
+    return (volatile uint16_t*)&(RUSB2->PIPE_CTR[num - 1]);
   } else {
-    return (volatile uint16_t*)&(LINK_REG->DCPCTR);
+    return (volatile uint16_t*)&(RUSB2->DCPCTR);
   }
 }
 
@@ -148,7 +148,7 @@ static volatile reg_pipetre_t* get_pipetre(unsigned num)
 {
   volatile reg_pipetre_t* tre = NULL;
   if ((1 <= num) && (num <= 5)) {
-    tre = (volatile reg_pipetre_t*)&(LINK_REG->PIPE_TR[num - 1].E);
+    tre = (volatile reg_pipetre_t*)&(RUSB2->PIPE_TR[num - 1].E);
   }
   return tre;
 }
@@ -168,19 +168,19 @@ static volatile uint16_t* ep_addr_to_pipectr(uint8_t rhport, unsigned ep_addr)
 
 static unsigned edpt0_max_packet_size(void)
 {
-  return LINK_REG->DCPMAXP_b.MXPS;
+  return RUSB2->DCPMAXP_b.MXPS;
 }
 
 static unsigned edpt_max_packet_size(unsigned num)
 {
-  LINK_REG->PIPESEL = num;
-  return LINK_REG->PIPEMAXP;
+  RUSB2->PIPESEL = num;
+  return RUSB2->PIPEMAXP;
 }
 
 static inline void pipe_wait_for_ready(unsigned num)
 {
-  while (LINK_REG->D0FIFOSEL_b.CURPIPE != num) ;
-  while (!LINK_REG->D0FIFOCTR_b.FRDY) ;
+  while (RUSB2->D0FIFOSEL_b.CURPIPE != num) ;
+  while (!RUSB2->D0FIFOCTR_b.FRDY) ;
 }
 
 static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
@@ -242,14 +242,14 @@ static bool pipe0_xfer_in(void)
   void          *buf = pipe->buf;
   if (len) {
     if (pipe->ff) {
-      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&LINK_REG->CFIFO, len, TUSB_DIR_IN);
+      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&RUSB2->CFIFO, len, TUSB_DIR_IN);
     } else {
-      pipe_write_packet(buf, (volatile void*)&LINK_REG->CFIFO, len);
+      pipe_write_packet(buf, (volatile void*)&RUSB2->CFIFO, len);
       pipe->buf = (uint8_t*)buf + len;
     }
   }
   if (len < mps) {
-    LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
+    RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
   }
   pipe->remaining = rem - len;
   return false;
@@ -261,19 +261,19 @@ static bool pipe0_xfer_out(void)
   const unsigned rem = pipe->remaining;
 
   const unsigned mps = edpt0_max_packet_size();
-  const unsigned vld = LINK_REG->CFIFOCTR_b.DTLN;
+  const unsigned vld = RUSB2->CFIFOCTR_b.DTLN;
   const unsigned len = TU_MIN(TU_MIN(rem, mps), vld);
   void          *buf = pipe->buf;
   if (len) {
     if (pipe->ff) {
-      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&LINK_REG->CFIFO, len, TUSB_DIR_OUT);
+      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&RUSB2->CFIFO, len, TUSB_DIR_OUT);
     } else {
-      pipe_read_packet(buf, (volatile void*)&LINK_REG->CFIFO, len);
+      pipe_read_packet(buf, (volatile void*)&RUSB2->CFIFO, len);
       pipe->buf = (uint8_t*)buf + len;
     }
   }
   if (len < mps) {
-    LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
+    RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk;
   }
   pipe->remaining = rem - len;
   if ((len < mps) || (rem == len)) {
@@ -293,24 +293,24 @@ static bool pipe_xfer_in(unsigned num)
     return true;
   }
 
-  LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_16BIT | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0);
+  RUSB2->D0FIFOSEL = num | RUSB2_FIFOSEL_MBW_16BIT | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? RUSB2_FIFOSEL_BIGEND : 0);
   const unsigned mps  = edpt_max_packet_size(num);
   pipe_wait_for_ready(num);
   const unsigned len  = TU_MIN(rem, mps);
   void          *buf  = pipe->buf;
   if (len) {
     if (pipe->ff) {
-      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&LINK_REG->D0FIFO, len, TUSB_DIR_IN);
+      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&RUSB2->D0FIFO, len, TUSB_DIR_IN);
     } else {
-      pipe_write_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len);
+      pipe_write_packet(buf, (volatile void*)&RUSB2->D0FIFO, len);
       pipe->buf = (uint8_t*)buf + len;
     }
   }
   if (len < mps) {
-    LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
+    RUSB2->D0FIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
   }
-  LINK_REG->D0FIFOSEL = 0;
-  while (LINK_REG->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
+  RUSB2->D0FIFOSEL = 0;
+  while (RUSB2->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
   pipe->remaining = rem - len;
   return false;
 }
@@ -320,25 +320,25 @@ static bool pipe_xfer_out(unsigned num)
   pipe_state_t  *pipe = &_dcd.pipe[num];
   const unsigned rem  = pipe->remaining;
 
-  LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_8BIT;
+  RUSB2->D0FIFOSEL = num | RUSB2_FIFOSEL_MBW_8BIT;
   const unsigned mps  = edpt_max_packet_size(num);
   pipe_wait_for_ready(num);
-  const unsigned vld  = LINK_REG->D0FIFOCTR_b.DTLN;
+  const unsigned vld  = RUSB2->D0FIFOCTR_b.DTLN;
   const unsigned len  = TU_MIN(TU_MIN(rem, mps), vld);
   void          *buf  = pipe->buf;
   if (len) {
     if (pipe->ff) {
-      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&LINK_REG->D0FIFO, len, TUSB_DIR_OUT);
+      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&RUSB2->D0FIFO, len, TUSB_DIR_OUT);
     } else {
-      pipe_read_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len);
+      pipe_read_packet(buf, (volatile void*)&RUSB2->D0FIFO, len);
       pipe->buf = (uint8_t*)buf + len;
     }
   }
   if (len < mps) {
-    LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
+    RUSB2->D0FIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk;
   }
-  LINK_REG->D0FIFOSEL = 0;
-  while (LINK_REG->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
+  RUSB2->D0FIFOSEL = 0;
+  while (RUSB2->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
   pipe->remaining = rem - len;
   if ((len < mps) || (rem == len)) {
     pipe->buf = NULL;
@@ -350,13 +350,13 @@ static bool pipe_xfer_out(unsigned num)
 static void process_setup_packet(uint8_t rhport)
 {
   uint16_t setup_packet[4];
-  if (0 == (LINK_REG->INTSTS0 & LINK_REG_INTSTS0_VALID_Msk)) return;
-  LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
-  setup_packet[0] = tu_le16toh(LINK_REG->USBREQ);
-  setup_packet[1] = LINK_REG->USBVAL;
-  setup_packet[2] = LINK_REG->USBINDX;
-  setup_packet[3] = LINK_REG->USBLENG;
-  LINK_REG->INTSTS0 = ~((uint16_t)LINK_REG_INTSTS0_VALID_Msk);
+  if (0 == (RUSB2->INTSTS0 & RUSB2_INTSTS0_VALID_Msk)) return;
+  RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk;
+  setup_packet[0] = tu_le16toh(RUSB2->USBREQ);
+  setup_packet[1] = RUSB2->USBVAL;
+  setup_packet[2] = RUSB2->USBINDX;
+  setup_packet[3] = RUSB2->USBLENG;
+  RUSB2->INTSTS0 = ~((uint16_t)RUSB2_INTSTS0_VALID_Msk);
   dcd_event_setup_received(rhport, (const uint8_t*)&setup_packet[0], true);
 }
 
@@ -364,7 +364,7 @@ static void process_status_completion(uint8_t rhport)
 {
   uint8_t ep_addr;
   /* Check the data stage direction */
-  if (LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE) {
+  if (RUSB2->CFIFOSEL & RUSB2_CFIFOSEL_ISEL_WRITE) {
     /* IN transfer. */
     ep_addr = tu_edpt_addr(0, TUSB_DIR_IN);
   } else {
@@ -378,12 +378,12 @@ static bool process_pipe0_xfer(int buffer_type, uint8_t ep_addr, void* buffer, u
 {
   /* configure fifo direction and access unit settings */
   if (ep_addr) { /* IN, 2 bytes */
-    LINK_REG->CFIFOSEL = LINK_REG_CFIFOSEL_ISEL_WRITE | LINK_REG_FIFOSEL_MBW_16BIT |
-                         (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0);
-    while (!(LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE)) ;
+    RUSB2->CFIFOSEL = RUSB2_CFIFOSEL_ISEL_WRITE | RUSB2_FIFOSEL_MBW_16BIT |
+                         (TU_BYTE_ORDER == TU_BIG_ENDIAN ? RUSB2_FIFOSEL_BIGEND : 0);
+    while (!(RUSB2->CFIFOSEL & RUSB2_CFIFOSEL_ISEL_WRITE)) ;
   } else { /* OUT, a byte */
-    LINK_REG->CFIFOSEL = LINK_REG_FIFOSEL_MBW_8BIT;
-    while (LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE) ;
+    RUSB2->CFIFOSEL = RUSB2_FIFOSEL_MBW_8BIT;
+    while (RUSB2->CFIFOSEL & RUSB2_CFIFOSEL_ISEL_WRITE) ;
   }
 
   pipe_state_t *pipe = &_dcd.pipe[0];
@@ -393,14 +393,14 @@ static bool process_pipe0_xfer(int buffer_type, uint8_t ep_addr, void* buffer, u
   if (total_bytes) {
     pipe->buf     = buffer;
     if (ep_addr) { /* IN */
-      TU_ASSERT(LINK_REG->DCPCTR_b.BSTS && (LINK_REG->USBREQ & 0x80));
+      TU_ASSERT(RUSB2->DCPCTR_b.BSTS && (RUSB2->USBREQ & 0x80));
       pipe0_xfer_in();
     }
-    LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_BUF;
+    RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_BUF;
   } else {
     /* ZLP */
     pipe->buf        = NULL;
-    LINK_REG->DCPCTR = LINK_REG_DCPCTR_CCPL_Msk | LINK_REG_PIPE_CTR_PID_BUF;
+    RUSB2->DCPCTR = RUSB2_DCPCTR_CCPL_Msk | RUSB2_PIPE_CTR_PID_BUF;
   }
   return true;
 }
@@ -422,11 +422,11 @@ static bool process_pipe_xfer(int buffer_type, uint8_t ep_addr, void* buffer, ui
     if (total_bytes) {
       pipe_xfer_in(num);
     } else { /* ZLP */
-      LINK_REG->D0FIFOSEL = num;
+      RUSB2->D0FIFOSEL = num;
       pipe_wait_for_ready(num);
-      LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
-      LINK_REG->D0FIFOSEL = 0;
-      while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
+      RUSB2->D0FIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
+      RUSB2->D0FIFOSEL = 0;
+      while (RUSB2->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
     }
   } else {
 #if defined(__CCRX__)
@@ -437,11 +437,11 @@ static bool process_pipe_xfer(int buffer_type, uint8_t ep_addr, void* buffer, ui
     if (pt) {
       const unsigned     mps = edpt_max_packet_size(num);
       volatile uint16_t *ctr = get_pipectr(num);
-      if (*ctr & 0x3) *ctr = LINK_REG_PIPE_CTR_PID_NAK;
+      if (*ctr & 0x3) *ctr = RUSB2_PIPE_CTR_PID_NAK;
       pt->TRE   = TU_BIT(8);
       pt->TRN   = (total_bytes + mps - 1) / mps;
       pt->TRENB = 1;
-      *ctr = LINK_REG_PIPE_CTR_PID_BUF;
+      *ctr = RUSB2_PIPE_CTR_PID_BUF;
     }
   }
   //  TU_LOG1("X %x %d %d\r\n", ep_addr, total_bytes, buffer_type);
@@ -493,28 +493,28 @@ static void process_pipe_brdy(uint8_t rhport, unsigned num)
 
 static void process_bus_reset(uint8_t rhport)
 {
-  LINK_REG->BEMPENB = 1;
-  LINK_REG->BRDYENB = 1;
-  LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
-  LINK_REG->D0FIFOSEL = 0;
-  while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
-  LINK_REG->D1FIFOSEL = 0;
-  while (LINK_REG->D1FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
-  volatile uint16_t *ctr = (volatile uint16_t*)((uintptr_t) (&LINK_REG->PIPE_CTR[0]));
-  volatile uint16_t *tre = (volatile uint16_t*)((uintptr_t) (&LINK_REG->PIPE_TR[0].E));
+  RUSB2->BEMPENB = 1;
+  RUSB2->BRDYENB = 1;
+  RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk;
+  RUSB2->D0FIFOSEL = 0;
+  while (RUSB2->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
+  RUSB2->D1FIFOSEL = 0;
+  while (RUSB2->D1FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
+  volatile uint16_t *ctr = (volatile uint16_t*)((uintptr_t) (&RUSB2->PIPE_CTR[0]));
+  volatile uint16_t *tre = (volatile uint16_t*)((uintptr_t) (&RUSB2->PIPE_TR[0].E));
   for (int i = 1; i <= 5; ++i) {
-    LINK_REG->PIPESEL = i;
-    LINK_REG->PIPECFG = 0;
-    *ctr = LINK_REG_PIPE_CTR_ACLRM_Msk;
+    RUSB2->PIPESEL = i;
+    RUSB2->PIPECFG = 0;
+    *ctr = RUSB2_PIPE_CTR_ACLRM_Msk;
     *ctr = 0;
     ++ctr;
     *tre = TU_BIT(8);
     tre += 2;
   }
   for (int i = 6; i <= 9; ++i) {
-    LINK_REG->PIPESEL = i;
-    LINK_REG->PIPECFG = 0;
-    *ctr = LINK_REG_PIPE_CTR_ACLRM_Msk;
+    RUSB2->PIPESEL = i;
+    RUSB2->PIPECFG = 0;
+    *ctr = RUSB2_PIPE_CTR_ACLRM_Msk;
     *ctr = 0;
     ++ctr;
   }
@@ -524,7 +524,7 @@ static void process_bus_reset(uint8_t rhport)
 
 static void process_set_address(uint8_t rhport)
 {
-  const uint32_t addr = LINK_REG->USBADDR_b.USBADDR;
+  const uint32_t addr = RUSB2->USBADDR_b.USBADDR;
   if (!addr) return;
   const tusb_control_request_t setup_packet = {
 #if defined(__CCRX__)
@@ -580,39 +580,39 @@ void dcd_init(uint8_t rhport)
   enable_interrupt(pswi);
 #endif
 
-  LINK_REG->SYSCFG_b.SCKE = 1;
-  while (!LINK_REG->SYSCFG_b.SCKE) ;
-  LINK_REG->SYSCFG_b.DRPD = 0;
-  LINK_REG->SYSCFG_b.DCFM = 0;
-  LINK_REG->SYSCFG_b.USBE = 1;
+  RUSB2->SYSCFG_b.SCKE = 1;
+  while (!RUSB2->SYSCFG_b.SCKE) ;
+  RUSB2->SYSCFG_b.DRPD = 0;
+  RUSB2->SYSCFG_b.DCFM = 0;
+  RUSB2->SYSCFG_b.USBE = 1;
 
   // MCU specific PHY init
-  link_phy_init();
+  rusb2_phy_init();
 
-  LINK_REG->PHYSLEW = 0x5;
-  LINK_REG->DPUSR0R_FS_b.FIXPHY0 = 0u; /* USB_BASE Transceiver Output fixed */
+  RUSB2->PHYSLEW = 0x5;
+  RUSB2->DPUSR0R_FS_b.FIXPHY0 = 0u; /* USB_BASE Transceiver Output fixed */
 
   /* Setup default control pipe */
-  LINK_REG->DCPMAXP_b.MXPS = 64;
-  LINK_REG->INTENB0 = LINK_REG_INTSTS0_VBINT_Msk | LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk |
-          LINK_REG_INTSTS0_DVST_Msk | LINK_REG_INTSTS0_CTRT_Msk | (USE_SOF ? LINK_REG_INTSTS0_SOFR_Msk : 0) |
-          LINK_REG_INTSTS0_RESM_Msk;
-  LINK_REG->BEMPENB = 1;
-  LINK_REG->BRDYENB = 1;
+  RUSB2->DCPMAXP_b.MXPS = 64;
+  RUSB2->INTENB0 = RUSB2_INTSTS0_VBINT_Msk | RUSB2_INTSTS0_BRDY_Msk | RUSB2_INTSTS0_BEMP_Msk |
+          RUSB2_INTSTS0_DVST_Msk | RUSB2_INTSTS0_CTRT_Msk | (USE_SOF ? RUSB2_INTSTS0_SOFR_Msk : 0) |
+          RUSB2_INTSTS0_RESM_Msk;
+  RUSB2->BEMPENB = 1;
+  RUSB2->BRDYENB = 1;
 
-  if (LINK_REG->INTSTS0_b.VBSTS) {
+  if (RUSB2->INTSTS0_b.VBSTS) {
     dcd_connect(rhport);
   }
 }
 
 void dcd_int_enable(uint8_t rhport)
 {
-  link_int_enable(rhport);
+  rusb2_int_enable(rhport);
 }
 
 void dcd_int_disable(uint8_t rhport)
 {
-  link_int_disable(rhport);
+  rusb2_int_disable(rhport);
 }
 
 void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
@@ -624,19 +624,19 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
 void dcd_remote_wakeup(uint8_t rhport)
 {
   (void)rhport;
-  LINK_REG->DVSTCTR0_b.WKUP = 1;
+  RUSB2->DVSTCTR0_b.WKUP = 1;
 }
 
 void dcd_connect(uint8_t rhport)
 {
   (void)rhport;
-  LINK_REG->SYSCFG_b.DPRPU = 1;
+  RUSB2->SYSCFG_b.DPRPU = 1;
 }
 
 void dcd_disconnect(uint8_t rhport)
 {
   (void)rhport;
-  LINK_REG->SYSCFG_b.DPRPU = 0;
+  RUSB2->SYSCFG_b.DPRPU = 0;
 }
 
 void dcd_sof_enable(uint8_t rhport, bool en)
@@ -672,26 +672,26 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
 
   /* setup pipe */
   dcd_int_disable(rhport);
-  LINK_REG->PIPESEL = num;
-  LINK_REG->PIPEMAXP = mps;
+  RUSB2->PIPESEL = num;
+  RUSB2->PIPEMAXP = mps;
   volatile uint16_t *ctr = get_pipectr(num);
-  *ctr = LINK_REG_PIPE_CTR_ACLRM_Msk | LINK_REG_PIPE_CTR_SQCLR_Msk;
+  *ctr = RUSB2_PIPE_CTR_ACLRM_Msk | RUSB2_PIPE_CTR_SQCLR_Msk;
   *ctr = 0;
   unsigned cfg = (dir << 4) | epn;
   if (xfer == TUSB_XFER_BULK) {
-    cfg |= (LINK_REG_PIPECFG_TYPE_BULK | LINK_REG_PIPECFG_SHTNAK_Msk | LINK_REG_PIPECFG_DBLB_Msk);
+    cfg |= (RUSB2_PIPECFG_TYPE_BULK | RUSB2_PIPECFG_SHTNAK_Msk | RUSB2_PIPECFG_DBLB_Msk);
   } else if (xfer == TUSB_XFER_INTERRUPT) {
-    cfg |= LINK_REG_PIPECFG_TYPE_INT;
+    cfg |= RUSB2_PIPECFG_TYPE_INT;
   } else {
-    cfg |= (LINK_REG_PIPECFG_TYPE_ISO | LINK_REG_PIPECFG_DBLB_Msk);
+    cfg |= (RUSB2_PIPECFG_TYPE_ISO | RUSB2_PIPECFG_DBLB_Msk);
   }
-  LINK_REG->PIPECFG = cfg;
-  LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num);
-  LINK_REG->BRDYENB |= TU_BIT(num);
+  RUSB2->PIPECFG = cfg;
+  RUSB2->BRDYSTS = 0x1FFu ^ TU_BIT(num);
+  RUSB2->BRDYENB |= TU_BIT(num);
   if (dir || (xfer != TUSB_XFER_BULK)) {
-    *ctr = LINK_REG_PIPE_CTR_PID_BUF;
+    *ctr = RUSB2_PIPE_CTR_PID_BUF;
   }
-  // TU_LOG1("O %d %x %x\r\n", LINK_REG->PIPESEL, LINK_REG->PIPECFG, LINK_REG->PIPEMAXP);
+  // TU_LOG1("O %d %x %x\r\n", RUSB2->PIPESEL, RUSB2->PIPECFG, RUSB2->PIPEMAXP);
   dcd_int_enable(rhport);
 
   return true;
@@ -716,11 +716,11 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
   const unsigned dir = tu_edpt_dir(ep_addr);
   const unsigned num = _dcd.ep[dir][epn];
 
-  LINK_REG->BRDYENB &= ~TU_BIT(num);
+  RUSB2->BRDYENB &= ~TU_BIT(num);
   volatile uint16_t *ctr = get_pipectr(num);
   *ctr = 0;
-  LINK_REG->PIPESEL = num;
-  LINK_REG->PIPECFG = 0;
+  RUSB2->PIPESEL = num;
+  RUSB2->PIPECFG = 0;
   _dcd.pipe[num].ep = 0;
   _dcd.ep[dir][epn] = 0;
 }
@@ -751,8 +751,8 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
   if (!ctr) return;
   dcd_int_disable(rhport);
   const uint32_t pid = *ctr & 0x3;
-  *ctr = pid | LINK_REG_PIPE_CTR_PID_STALL;
-  *ctr = LINK_REG_PIPE_CTR_PID_STALL;
+  *ctr = pid | RUSB2_PIPE_CTR_PID_STALL;
+  *ctr = RUSB2_PIPE_CTR_PID_STALL;
   dcd_int_enable(rhport);
 }
 
@@ -761,15 +761,15 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
   volatile uint16_t *ctr = ep_addr_to_pipectr(rhport, ep_addr);
   if (!ctr) return;
   dcd_int_disable(rhport);
-  *ctr = LINK_REG_PIPE_CTR_SQCLR_Msk;
+  *ctr = RUSB2_PIPE_CTR_SQCLR_Msk;
 
   if (tu_edpt_dir(ep_addr)) { /* IN */
-    *ctr = LINK_REG_PIPE_CTR_PID_BUF;
+    *ctr = RUSB2_PIPE_CTR_PID_BUF;
   } else {
     const unsigned num = _dcd.ep[0][tu_edpt_number(ep_addr)];
-    LINK_REG->PIPESEL = num;
-    if (LINK_REG->PIPECFG_b.TYPE != 1) {
-      *ctr = LINK_REG_PIPE_CTR_PID_BUF;
+    RUSB2->PIPESEL = num;
+    if (RUSB2->PIPECFG_b.TYPE != 1) {
+      *ctr = RUSB2_PIPE_CTR_PID_BUF;
     }
   }
   dcd_int_enable(rhport);
@@ -782,71 +782,71 @@ void dcd_int_handler(uint8_t rhport)
 {
   (void)rhport;
 
-  unsigned is0 = LINK_REG->INTSTS0;
+  unsigned is0 = RUSB2->INTSTS0;
   /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */
-  LINK_REG->INTSTS0 = ~((LINK_REG_INTSTS0_CTRT_Msk | LINK_REG_INTSTS0_DVST_Msk | LINK_REG_INTSTS0_SOFR_Msk |
-                         LINK_REG_INTSTS0_RESM_Msk | LINK_REG_INTSTS0_VBINT_Msk) & is0) | LINK_REG_INTSTS0_VALID_Msk;
-  if (is0 & LINK_REG_INTSTS0_VBINT_Msk) {
-    if (LINK_REG->INTSTS0_b.VBSTS) {
+  RUSB2->INTSTS0 = ~((RUSB2_INTSTS0_CTRT_Msk | RUSB2_INTSTS0_DVST_Msk | RUSB2_INTSTS0_SOFR_Msk |
+                         RUSB2_INTSTS0_RESM_Msk | RUSB2_INTSTS0_VBINT_Msk) & is0) | RUSB2_INTSTS0_VALID_Msk;
+  if (is0 & RUSB2_INTSTS0_VBINT_Msk) {
+    if (RUSB2->INTSTS0_b.VBSTS) {
       dcd_connect(rhport);
     } else {
       dcd_disconnect(rhport);
     }
   }
-  if (is0 & LINK_REG_INTSTS0_RESM_Msk) {
+  if (is0 & RUSB2_INTSTS0_RESM_Msk) {
     dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true);
 #if (0==USE_SOF)
-    LINK_REG->INTENB0_b.SOFE = 0;
+    RUSB2->INTENB0_b.SOFE = 0;
 #endif
   }
-  if ((is0 & LINK_REG_INTSTS0_SOFR_Msk) && LINK_REG->INTENB0_b.SOFE) {
+  if ((is0 & RUSB2_INTSTS0_SOFR_Msk) && RUSB2->INTENB0_b.SOFE) {
     // USBD will exit suspended mode when SOF event is received
     dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true);
 #if (0 == USE_SOF)
-    LINK_REG->INTENB0_b.SOFE = 0;
+    RUSB2->INTENB0_b.SOFE = 0;
 #endif
   }
-  if (is0 & LINK_REG_INTSTS0_DVST_Msk) {
-    switch (is0 & LINK_REG_INTSTS0_DVSQ_Msk) {
-    case LINK_REG_INTSTS0_DVSQ_STATE_DEF:
+  if (is0 & RUSB2_INTSTS0_DVST_Msk) {
+    switch (is0 & RUSB2_INTSTS0_DVSQ_Msk) {
+    case RUSB2_INTSTS0_DVSQ_STATE_DEF:
       process_bus_reset(rhport);
       break;
-    case LINK_REG_INTSTS0_DVSQ_STATE_ADDR:
+    case RUSB2_INTSTS0_DVSQ_STATE_ADDR:
       process_set_address(rhport);
       break;
-    case LINK_REG_INTSTS0_DVSQ_STATE_SUSP0:
-    case LINK_REG_INTSTS0_DVSQ_STATE_SUSP1:
-    case LINK_REG_INTSTS0_DVSQ_STATE_SUSP2:
-    case LINK_REG_INTSTS0_DVSQ_STATE_SUSP3:
+    case RUSB2_INTSTS0_DVSQ_STATE_SUSP0:
+    case RUSB2_INTSTS0_DVSQ_STATE_SUSP1:
+    case RUSB2_INTSTS0_DVSQ_STATE_SUSP2:
+    case RUSB2_INTSTS0_DVSQ_STATE_SUSP3:
        dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true);
 #if (0==USE_SOF)
-      LINK_REG->INTENB0_b.SOFE = 1;
+      RUSB2->INTENB0_b.SOFE = 1;
 #endif
     default:
       break;
     }
   }
-  if (is0 & LINK_REG_INTSTS0_CTRT_Msk) {
-    if (is0 & LINK_REG_INTSTS0_CTSQ_CTRL_RDATA) {
+  if (is0 & RUSB2_INTSTS0_CTRT_Msk) {
+    if (is0 & RUSB2_INTSTS0_CTSQ_CTRL_RDATA) {
       /* A setup packet has been received. */
       process_setup_packet(rhport);
-    } else if (0 == (is0 & LINK_REG_INTSTS0_CTSQ_Msk)) {
+    } else if (0 == (is0 & RUSB2_INTSTS0_CTSQ_Msk)) {
       /* A ZLP has been sent/received. */
       process_status_completion(rhport);
     }
   }
-  if (is0 & LINK_REG_INTSTS0_BEMP_Msk) {
-    const unsigned s = LINK_REG->BEMPSTS;
-    LINK_REG->BEMPSTS = 0;
+  if (is0 & RUSB2_INTSTS0_BEMP_Msk) {
+    const unsigned s = RUSB2->BEMPSTS;
+    RUSB2->BEMPSTS = 0;
     if (s & 1) {
       process_pipe0_bemp(rhport);
     }
   }
-  if (is0 & LINK_REG_INTSTS0_BRDY_Msk) {
-    const unsigned m = LINK_REG->BRDYENB;
-    unsigned s = LINK_REG->BRDYSTS & m;
+  if (is0 & RUSB2_INTSTS0_BRDY_Msk) {
+    const unsigned m = RUSB2->BRDYENB;
+    unsigned s = RUSB2->BRDYSTS & m;
     /* clear active bits (don't write 0 to already cleared bits according to the HW manual) */
-    LINK_REG->BRDYSTS = ~s;
+    RUSB2->BRDYSTS = ~s;
     while (s) {
 #if defined(__CCRX__)
       static const int Mod37BitPosition[] = {
diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index 7d14aad60..e4743223e 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -47,9 +47,9 @@
 
 /* LINK core registers */
 #if defined(__CCRX__)
-#define LINK_REG ((LINK_REG_t __evenaccess*)LINK_REG_BASE)
+  #define RUSB2 ((RUSB2_REG_t __evenaccess*) RUSB2_REG_BASE)
 #else
-#define LINK_REG ((LINK_REG_t*)LINK_REG_BASE)
+  #define RUSB2 ((RUSB2_REG_t*) RUSB2_REG_BASE)
 #endif
 
 TU_ATTR_PACKED_BEGIN
@@ -135,9 +135,9 @@ static unsigned find_pipe(unsigned xfer)
 static volatile uint16_t* get_pipectr(unsigned num)
 {
   if (num) {
-    return (volatile uint16_t*)&(LINK_REG->PIPE_CTR[num - 1]);
+    return (volatile uint16_t*)&(RUSB2->PIPE_CTR[num - 1]);
   } else {
-    return (volatile uint16_t*)&(LINK_REG->DCPCTR);
+    return (volatile uint16_t*)&(RUSB2->DCPCTR);
   }
 }
 
@@ -145,7 +145,7 @@ static volatile reg_pipetre_t* get_pipetre(unsigned num)
 {
   volatile reg_pipetre_t* tre = NULL;
   if ((1 <= num) && (num <= 5)) {
-    tre = (volatile reg_pipetre_t*)&(LINK_REG->PIPE_TR[num - 1].E);
+    tre = (volatile reg_pipetre_t*)&(RUSB2->PIPE_TR[num - 1].E);
   }
   return tre;
 }
@@ -164,19 +164,19 @@ static volatile uint16_t* addr_to_pipectr(uint8_t dev_addr, unsigned ep_addr)
 
 static unsigned edpt0_max_packet_size(void)
 {
-  return LINK_REG->DCPMAXP_b.MXPS;
+  return RUSB2->DCPMAXP_b.MXPS;
 }
 
 static unsigned edpt_max_packet_size(unsigned num)
 {
-  LINK_REG->PIPESEL = num;
-  return LINK_REG->PIPEMAXP_b.MXPS;
+  RUSB2->PIPESEL = num;
+  return RUSB2->PIPEMAXP_b.MXPS;
 }
 
 static inline void pipe_wait_for_ready(unsigned num)
 {
-  while (LINK_REG->D0FIFOSEL_b.CURPIPE != num) ;
-  while (!LINK_REG->D0FIFOCTR_b.FRDY) ;
+  while (RUSB2->D0FIFOSEL_b.CURPIPE != num) ;
+  while (!RUSB2->D0FIFOCTR_b.FRDY) ;
 }
 
 static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
@@ -207,23 +207,23 @@ static bool pipe0_xfer_in(void)
   const unsigned rem = pipe->remaining;
 
   const unsigned mps = edpt0_max_packet_size();
-  const unsigned vld = LINK_REG->CFIFOCTR_b.DTLN;
+  const unsigned vld = RUSB2->CFIFOCTR_b.DTLN;
   const unsigned len = TU_MIN(TU_MIN(rem, mps), vld);
   void          *buf = pipe->buf;
   if (len) {
-    LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK;
-    pipe_read_packet(buf, (volatile void*)&LINK_REG->CFIFO, len);
+    RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_NAK;
+    pipe_read_packet(buf, (volatile void*)&RUSB2->CFIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
   if (len < mps) {
-    LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
+    RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk;
   }
   pipe->remaining = rem - len;
   if ((len < mps) || (rem == len)) {
     pipe->buf = NULL;
     return true;
   }
-  LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_BUF;
+  RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_BUF;
   return false;
 }
 
@@ -239,11 +239,11 @@ static bool pipe0_xfer_out(void)
   const unsigned len = TU_MIN(mps, rem);
   void          *buf = pipe->buf;
   if (len) {
-    pipe_write_packet(buf, (volatile void*)&LINK_REG->CFIFO, len);
+    pipe_write_packet(buf, (volatile void*)&RUSB2->CFIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
   if (len < mps) {
-    LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
+    RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
   }
   pipe->remaining = rem - len;
   return false;
@@ -254,21 +254,21 @@ static bool pipe_xfer_in(unsigned num)
   pipe_state_t  *pipe = &_hcd.pipe[num];
   const unsigned rem  = pipe->remaining;
 
-  LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_8BIT;
+  RUSB2->D0FIFOSEL = num | RUSB2_FIFOSEL_MBW_8BIT;
   const unsigned mps  = edpt_max_packet_size(num);
   pipe_wait_for_ready(num);
-  const unsigned vld  = LINK_REG->D0FIFOCTR_b.DTLN;
+  const unsigned vld  = RUSB2->D0FIFOCTR_b.DTLN;
   const unsigned len  = TU_MIN(TU_MIN(rem, mps), vld);
   void          *buf  = pipe->buf;
   if (len) {
-    pipe_read_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len);
+    pipe_read_packet(buf, (volatile void*)&RUSB2->D0FIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
   if (len < mps) {
-    LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BCLR_Msk;
+    RUSB2->D0FIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk;
   }
-  LINK_REG->D0FIFOSEL = 0;
-  while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
+  RUSB2->D0FIFOSEL = 0;
+  while (RUSB2->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
   pipe->remaining = rem - len;
   if ((len < mps) || (rem == len)) {
     pipe->buf = NULL;
@@ -287,19 +287,19 @@ static bool pipe_xfer_out(unsigned num)
     return true;
   }
 
-  LINK_REG->D0FIFOSEL = num | LINK_REG_FIFOSEL_MBW_16BIT | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0);
+  RUSB2->D0FIFOSEL = num | RUSB2_FIFOSEL_MBW_16BIT | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? RUSB2_FIFOSEL_BIGEND : 0);
   const unsigned mps  = edpt_max_packet_size(num);
   pipe_wait_for_ready(num);
   const unsigned len  = TU_MIN(rem, mps);
   void          *buf  = pipe->buf;
   if (len) {
-    pipe_write_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len);
+    pipe_write_packet(buf, (volatile void*)&RUSB2->D0FIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
   if (len < mps)
-    LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
-  LINK_REG->D0FIFOSEL = 0;
-  while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
+    RUSB2->D0FIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
+  RUSB2->D0FIFOSEL = 0;
+  while (RUSB2->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
   pipe->remaining = rem - len;
   return false;
 }
@@ -311,12 +311,12 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer,
 
   /* configure fifo direction and access unit settings */
   if (dir_in) { /* IN, a byte */
-    LINK_REG->CFIFOSEL = LINK_REG_FIFOSEL_MBW_8BIT;
-    while (LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE) ;
+    RUSB2->CFIFOSEL = RUSB2_FIFOSEL_MBW_8BIT;
+    while (RUSB2->CFIFOSEL & RUSB2_CFIFOSEL_ISEL_WRITE) ;
   } else { /* OUT, 2 bytes */
-    LINK_REG->CFIFOSEL = LINK_REG_CFIFOSEL_ISEL_WRITE | LINK_REG_FIFOSEL_MBW_16BIT |
-                         (TU_BYTE_ORDER == TU_BIG_ENDIAN ? LINK_REG_FIFOSEL_BIGEND : 0);
-    while (!(LINK_REG->CFIFOSEL & LINK_REG_CFIFOSEL_ISEL_WRITE)) ;
+    RUSB2->CFIFOSEL = RUSB2_CFIFOSEL_ISEL_WRITE | RUSB2_FIFOSEL_MBW_16BIT |
+                         (TU_BYTE_ORDER == TU_BIG_ENDIAN ? RUSB2_FIFOSEL_BIGEND : 0);
+    while (!(RUSB2->CFIFOSEL & RUSB2_CFIFOSEL_ISEL_WRITE)) ;
   }
 
   pipe_state_t *pipe = &_hcd.pipe[0];
@@ -326,21 +326,21 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer,
   if (buflen) {
     pipe->buf     = buffer;
     if (!dir_in) { /* OUT */
-      TU_ASSERT(LINK_REG->DCPCTR_b.BSTS && (LINK_REG->USBREQ & 0x80));
+      TU_ASSERT(RUSB2->DCPCTR_b.BSTS && (RUSB2->USBREQ & 0x80));
       pipe0_xfer_out();
     }
   } else { /* ZLP */
     pipe->buf        = NULL;
     if (!dir_in) { /* OUT */
-      LINK_REG->CFIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
+      RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
     }
-    if (dir_in == LINK_REG->DCPCFG_b.DIR) {
-      TU_ASSERT(LINK_REG_PIPE_CTR_PID_NAK == LINK_REG->DCPCTR_b.PID);
-      LINK_REG->DCPCTR_b.SQSET = 1;
-      LINK_REG->DCPCFG_b.DIR = dir_in ^ 1;
+    if (dir_in == RUSB2->DCPCFG_b.DIR) {
+      TU_ASSERT(RUSB2_PIPE_CTR_PID_NAK == RUSB2->DCPCTR_b.PID);
+      RUSB2->DCPCTR_b.SQSET = 1;
+      RUSB2->DCPCFG_b.DIR = dir_in ^ 1;
     }
   }
-  LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_BUF;
+  RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_BUF;
   return true;
 }
 
@@ -360,23 +360,23 @@ static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void *buffer, u
     if (buflen) {
       pipe_xfer_out(num);
     } else { /* ZLP */
-      LINK_REG->D0FIFOSEL = num;
+      RUSB2->D0FIFOSEL = num;
       pipe_wait_for_ready(num);
-      LINK_REG->D0FIFOCTR = LINK_REG_CFIFOCTR_BVAL_Msk;
-      LINK_REG->D0FIFOSEL = 0;
-      while (LINK_REG->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
+      RUSB2->D0FIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
+      RUSB2->D0FIFOSEL = 0;
+      while (RUSB2->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
     }
   } else {
     volatile uint16_t     *ctr = get_pipectr(num);
     volatile reg_pipetre_t *pt = get_pipetre(num);
     if (pt) {
       const unsigned     mps = edpt_max_packet_size(num);
-      if (*ctr & 0x3) *ctr = LINK_REG_PIPE_CTR_PID_NAK;
+      if (*ctr & 0x3) *ctr = RUSB2_PIPE_CTR_PID_NAK;
       pt->TRE   = TU_BIT(8);
       pt->TRN   = (buflen + mps - 1) / mps;
       pt->TRENB = 1;
     }
-    *ctr = LINK_REG_PIPE_CTR_PID_BUF;
+    *ctr = RUSB2_PIPE_CTR_PID_BUF;
   }
   return true;
 }
@@ -410,10 +410,10 @@ static void process_pipe_nrdy(uint8_t rhport, unsigned num)
   unsigned result;
   uint16_t volatile *ctr = get_pipectr(num);
   // TU_LOG1("NRDY %d %x\n", num, *ctr);
-  switch (*ctr & LINK_REG_PIPE_CTR_PID_Msk) {
+  switch (*ctr & RUSB2_PIPE_CTR_PID_Msk) {
     default: return;
-    case LINK_REG_PIPE_CTR_PID_STALL: result = XFER_RESULT_STALLED; break;
-    case LINK_REG_PIPE_CTR_PID_NAK:   result = XFER_RESULT_FAILED;  break;
+    case RUSB2_PIPE_CTR_PID_STALL: result = XFER_RESULT_STALLED; break;
+    case RUSB2_PIPE_CTR_PID_NAK:   result = XFER_RESULT_FAILED;  break;
   }
   pipe_state_t *pipe = &_hcd.pipe[num];
   hcd_event_xfer_complete(pipe->dev, pipe->ep,
@@ -485,44 +485,44 @@ bool hcd_init(uint8_t rhport)
   enable_interrupt(pswi);
 #endif
 
-  LINK_REG->SYSCFG_b.SCKE = 1;
-  while (!LINK_REG->SYSCFG_b.SCKE) ;
-  LINK_REG->SYSCFG_b.DPRPU = 0;
-  LINK_REG->SYSCFG_b.DRPD = 0;
-  LINK_REG->SYSCFG_b.DCFM = 1;
+  RUSB2->SYSCFG_b.SCKE = 1;
+  while (!RUSB2->SYSCFG_b.SCKE) ;
+  RUSB2->SYSCFG_b.DPRPU = 0;
+  RUSB2->SYSCFG_b.DRPD = 0;
+  RUSB2->SYSCFG_b.DCFM = 1;
 
-  LINK_REG->DVSTCTR0_b.VBUSEN = 1;
+  RUSB2->DVSTCTR0_b.VBUSEN = 1;
 
-  LINK_REG->SYSCFG_b.DRPD = 1;
+  RUSB2->SYSCFG_b.DRPD = 1;
   for (volatile int i = 0; i < 30000; ++i) ;
-  LINK_REG->SYSCFG_b.USBE = 1;
+  RUSB2->SYSCFG_b.USBE = 1;
 
   // MCU specific PHY init
-  link_phy_init();
+  rusb2_phy_init();
 
-  LINK_REG->PHYSLEW = 0x5;
-  LINK_REG->DPUSR0R_FS_b.FIXPHY0 = 0u; /* Transceiver Output fixed */
+  RUSB2->PHYSLEW = 0x5;
+  RUSB2->DPUSR0R_FS_b.FIXPHY0 = 0u; /* Transceiver Output fixed */
 
   /* Setup default control pipe */
-  LINK_REG->DCPCFG  = LINK_REG_PIPECFG_SHTNAK_Msk;
-  LINK_REG->DCPMAXP = 64;
-  LINK_REG->INTENB0 = LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_NRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk;
-  LINK_REG->INTENB1 = LINK_REG_INTSTS1_SACK_Msk | LINK_REG_INTSTS1_SIGN_Msk | LINK_REG_INTSTS1_ATTCH_Msk | LINK_REG_INTSTS1_DTCH_Msk;
-  LINK_REG->BEMPENB = 1;
-  LINK_REG->NRDYENB = 1;
-  LINK_REG->BRDYENB = 1;
+  RUSB2->DCPCFG  = RUSB2_PIPECFG_SHTNAK_Msk;
+  RUSB2->DCPMAXP = 64;
+  RUSB2->INTENB0 = RUSB2_INTSTS0_BRDY_Msk | RUSB2_INTSTS0_NRDY_Msk | RUSB2_INTSTS0_BEMP_Msk;
+  RUSB2->INTENB1 = RUSB2_INTSTS1_SACK_Msk | RUSB2_INTSTS1_SIGN_Msk | RUSB2_INTSTS1_ATTCH_Msk | RUSB2_INTSTS1_DTCH_Msk;
+  RUSB2->BEMPENB = 1;
+  RUSB2->NRDYENB = 1;
+  RUSB2->BRDYENB = 1;
 
   return true;
 }
 
 void hcd_int_enable(uint8_t rhport)
 {
-  link_int_enable(rhport);
+  rusb2_int_enable(rhport);
 }
 
 void hcd_int_disable(uint8_t rhport)
 {
-  link_int_disable(rhport);
+  rusb2_int_disable(rhport);
 }
 
 uint32_t hcd_frame_number(uint8_t rhport)
@@ -531,7 +531,7 @@ uint32_t hcd_frame_number(uint8_t rhport)
   /* The device must be reset at least once after connection
    * in order to start the frame counter. */
   if (_hcd.need_reset) hcd_port_reset(rhport);
-  return LINK_REG->FRMNUM_b.FRNM;
+  return RUSB2->FRMNUM_b.FRNM;
 }
 
 /*--------------------------------------------------------------------+
@@ -540,24 +540,24 @@ uint32_t hcd_frame_number(uint8_t rhport)
 bool hcd_port_connect_status(uint8_t rhport)
 {
   (void)rhport;
-  return LINK_REG->INTSTS1_b.ATTCH ? true : false;
+  return RUSB2->INTSTS1_b.ATTCH ? true : false;
 }
 
 void hcd_port_reset(uint8_t rhport)
 {
-  LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK;
-  while (LINK_REG->DCPCTR_b.PBUSY) ;
+  RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_NAK;
+  while (RUSB2->DCPCTR_b.PBUSY) ;
   hcd_int_disable(rhport);
-  LINK_REG->DVSTCTR0_b.UACT = 0;
-  if (LINK_REG->DCPCTR_b.SUREQ) {
-    LINK_REG->DCPCTR_b.SUREQCLR = 1;
+  RUSB2->DVSTCTR0_b.UACT = 0;
+  if (RUSB2->DCPCTR_b.SUREQ) {
+    RUSB2->DCPCTR_b.SUREQCLR = 1;
   }
   hcd_int_enable(rhport);
   /* Reset should be asserted 10-20ms. */
-  LINK_REG->DVSTCTR0_b.USBRST = 1;
+  RUSB2->DVSTCTR0_b.USBRST = 1;
   for (volatile int i = 0; i < 2400000; ++i) ;
-  LINK_REG->DVSTCTR0_b.USBRST = 0;
-  LINK_REG->DVSTCTR0_b.UACT = 1;
+  RUSB2->DVSTCTR0_b.USBRST = 0;
+  RUSB2->DVSTCTR0_b.UACT = 1;
   _hcd.need_reset = false;
 }
 
@@ -569,10 +569,10 @@ void hcd_port_reset_end(uint8_t rhport)
 tusb_speed_t hcd_port_speed_get(uint8_t rhport)
 {
   (void)rhport;
-  switch (LINK_REG->DVSTCTR0_b.RHST) {
+  switch (RUSB2->DVSTCTR0_b.RHST) {
     default: return TUSB_SPEED_INVALID;
-    case LINK_REG_DVSTCTR0_RHST_FS: return TUSB_SPEED_FULL;
-    case LINK_REG_DVSTCTR0_RHST_LS:  return TUSB_SPEED_LOW;
+    case RUSB2_DVSTCTR0_RHST_FS: return TUSB_SPEED_FULL;
+    case RUSB2_DVSTCTR0_RHST_LS:  return TUSB_SPEED_LOW;
   }
 }
 
@@ -588,13 +588,13 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
     unsigned num = *ep;
     if (!num || dev_addr != _hcd.pipe[num].dev) continue;
 
-    ctr = (uint16_t volatile*)&LINK_REG->PIPE_CTR[num - 1];
+    ctr = (uint16_t volatile*)&RUSB2->PIPE_CTR[num - 1];
     *ctr = 0;
-    LINK_REG->NRDYENB &= ~TU_BIT(num);
-    LINK_REG->BRDYENB &= ~TU_BIT(num);
-    LINK_REG->PIPESEL = num;
-    LINK_REG->PIPECFG = 0;
-    LINK_REG->PIPEMAXP = 0;
+    RUSB2->NRDYENB &= ~TU_BIT(num);
+    RUSB2->BRDYENB &= ~TU_BIT(num);
+    RUSB2->PIPESEL = num;
+    RUSB2->PIPECFG = 0;
+    RUSB2->PIPEMAXP = 0;
 
     _hcd.pipe[num].ep  = 0;
     _hcd.pipe[num].dev = 0;
@@ -608,32 +608,32 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
 bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8])
 {
   (void)rhport;
-  //  TU_LOG1("S %d %x\n", dev_addr, LINK_REG->DCPCTR);
+  //  TU_LOG1("S %d %x\n", dev_addr, RUSB2->DCPCTR);
 
   TU_ASSERT(dev_addr < 6); /* USBa can only handle addresses from 0 to 5. */
-  TU_ASSERT(0 == LINK_REG->DCPCTR_b.SUREQ);
+  TU_ASSERT(0 == RUSB2->DCPCTR_b.SUREQ);
 
-  LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK;
+  RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_NAK;
 
   _hcd.pipe[0].buf       = NULL;
   _hcd.pipe[0].length    = 8;
   _hcd.pipe[0].remaining = 0;
   _hcd.pipe[0].dev       = dev_addr;
 
-  while (LINK_REG->DCPCTR_b.PBUSY) ;
-  LINK_REG->DCPMAXP = (dev_addr << 12) | _hcd.ctl_mps[dev_addr];
+  while (RUSB2->DCPCTR_b.PBUSY) ;
+  RUSB2->DCPMAXP = (dev_addr << 12) | _hcd.ctl_mps[dev_addr];
 
   /* Set direction in advance for DATA stage */
   uint8_t const bmRequesttype = setup_packet[0];
-  LINK_REG->DCPCFG_b.DIR = tu_edpt_dir(bmRequesttype) ? 0: 1;
+  RUSB2->DCPCFG_b.DIR = tu_edpt_dir(bmRequesttype) ? 0: 1;
 
   uint16_t const* p = (uint16_t const*)(uintptr_t)&setup_packet[0];
-  LINK_REG->USBREQ  = tu_htole16(p[0]);
-  LINK_REG->USBVAL  = p[1];
-  LINK_REG->USBINDX = p[2];
-  LINK_REG->USBLENG = p[3];
+  RUSB2->USBREQ  = tu_htole16(p[0]);
+  RUSB2->USBVAL  = p[1];
+  RUSB2->USBINDX = p[2];
+  RUSB2->USBLENG = p[3];
 
-  LINK_REG->DCPCTR_b.SUREQ = 1;
+  RUSB2->DCPCTR_b.SUREQ = 1;
   return true;
 }
 
@@ -646,14 +646,14 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
   const unsigned epn     = tu_edpt_number(ep_addr);
   const unsigned mps     = tu_edpt_packet_size(ep_desc);
   if (0 == epn) {
-    LINK_REG->DCPCTR = LINK_REG_PIPE_CTR_PID_NAK;
+    RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_NAK;
     hcd_devtree_info_t devtree;
     hcd_devtree_get_info(dev_addr, &devtree);
-    uint16_t volatile *devadd = (uint16_t volatile *)(uintptr_t) &LINK_REG->DEVADD[0];
+    uint16_t volatile *devadd = (uint16_t volatile *)(uintptr_t) &RUSB2->DEVADD[0];
     devadd += dev_addr;
-    while (LINK_REG->DCPCTR_b.PBUSY) ;
-    LINK_REG->DCPMAXP = (dev_addr << 12) | mps;
-    *devadd = (TUSB_SPEED_FULL == devtree.speed) ? LINK_REG_DEVADD_USBSPD_FS : LINK_REG_DEVADD_USBSPD_LS;
+    while (RUSB2->DCPCTR_b.PBUSY) ;
+    RUSB2->DCPMAXP = (dev_addr << 12) | mps;
+    *devadd = (TUSB_SPEED_FULL == devtree.speed) ? RUSB2_DEVADD_USBSPD_FS : RUSB2_DEVADD_USBSPD_LS;
     _hcd.ctl_mps[dev_addr] = mps;
     return true;
   }
@@ -672,25 +672,25 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
 
   /* setup pipe */
   hcd_int_disable(rhport);
-  LINK_REG->PIPESEL = num;
-  LINK_REG->PIPEMAXP = (dev_addr << 12) | mps;
+  RUSB2->PIPESEL = num;
+  RUSB2->PIPEMAXP = (dev_addr << 12) | mps;
   volatile uint16_t *ctr = get_pipectr(num);
-  *ctr = LINK_REG_PIPE_CTR_ACLRM_Msk | LINK_REG_PIPE_CTR_SQCLR_Msk;
+  *ctr = RUSB2_PIPE_CTR_ACLRM_Msk | RUSB2_PIPE_CTR_SQCLR_Msk;
   *ctr = 0;
   unsigned cfg = ((1 ^ dir_in) << 4) | epn;
   if (xfer == TUSB_XFER_BULK) {
-    cfg |= LINK_REG_PIPECFG_TYPE_BULK | LINK_REG_PIPECFG_SHTNAK_Msk | LINK_REG_PIPECFG_DBLB_Msk;
+    cfg |= RUSB2_PIPECFG_TYPE_BULK | RUSB2_PIPECFG_SHTNAK_Msk | RUSB2_PIPECFG_DBLB_Msk;
   } else if (xfer == TUSB_XFER_INTERRUPT) {
-    cfg |= LINK_REG_PIPECFG_TYPE_INT;
+    cfg |= RUSB2_PIPECFG_TYPE_INT;
   } else {
-    cfg |= LINK_REG_PIPECFG_TYPE_ISO | LINK_REG_PIPECFG_DBLB_Msk;
+    cfg |= RUSB2_PIPECFG_TYPE_ISO | RUSB2_PIPECFG_DBLB_Msk;
   }
-  LINK_REG->PIPECFG = cfg;
-  LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num);
-  LINK_REG->NRDYENB |= TU_BIT(num);
-  LINK_REG->BRDYENB |= TU_BIT(num);
+  RUSB2->PIPECFG = cfg;
+  RUSB2->BRDYSTS = 0x1FFu ^ TU_BIT(num);
+  RUSB2->NRDYENB |= TU_BIT(num);
+  RUSB2->BRDYENB |= TU_BIT(num);
   if (!dir_in) {
-    *ctr = LINK_REG_PIPE_CTR_PID_BUF;
+    *ctr = RUSB2_PIPE_CTR_PID_BUF;
   }
   hcd_int_enable(rhport);
 
@@ -717,12 +717,12 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
     *ctr = pid & 2;
     *ctr = 0;
   }
-  *ctr = LINK_REG_PIPE_CTR_SQCLR_Msk;
+  *ctr = RUSB2_PIPE_CTR_SQCLR_Msk;
   unsigned const epn = tu_edpt_number(ep_addr);
   if (!epn) return true;
 
   if (!tu_edpt_dir(ep_addr)) { /* OUT */
-    *ctr = LINK_REG_PIPE_CTR_PID_BUF;
+    *ctr = RUSB2_PIPE_CTR_PID_BUF;
   }
   return true;
 }
@@ -740,49 +740,49 @@ void hcd_int_handler(uint8_t rhport)
     20, 8, 19, 18};
 #endif
 
-  unsigned is1 = LINK_REG->INTSTS1;
-  unsigned is0 = LINK_REG->INTSTS0;
+  unsigned is1 = RUSB2->INTSTS1;
+  unsigned is0 = RUSB2->INTSTS0;
   /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */
-  LINK_REG->INTSTS1 = ~((LINK_REG_INTSTS1_SACK_Msk | LINK_REG_INTSTS1_SIGN_Msk | LINK_REG_INTSTS1_ATTCH_Msk | LINK_REG_INTSTS1_DTCH_Msk) & is1);
-  LINK_REG->INTSTS0 = ~((LINK_REG_INTSTS0_BRDY_Msk | LINK_REG_INTSTS0_NRDY_Msk | LINK_REG_INTSTS0_BEMP_Msk) & is0);
+  RUSB2->INTSTS1 = ~((RUSB2_INTSTS1_SACK_Msk | RUSB2_INTSTS1_SIGN_Msk | RUSB2_INTSTS1_ATTCH_Msk | RUSB2_INTSTS1_DTCH_Msk) & is1);
+  RUSB2->INTSTS0 = ~((RUSB2_INTSTS0_BRDY_Msk | RUSB2_INTSTS0_NRDY_Msk | RUSB2_INTSTS0_BEMP_Msk) & is0);
   // TU_LOG1("IS %04x %04x\n", is0, is1);
-  is1 &= LINK_REG->INTENB1;
-  is0 &= LINK_REG->INTENB0;
+  is1 &= RUSB2->INTENB1;
+  is0 &= RUSB2->INTENB0;
 
-  if (is1 & LINK_REG_INTSTS1_SACK_Msk) {
+  if (is1 & RUSB2_INTSTS1_SACK_Msk) {
     /* Set DATA1 in advance for the next transfer. */
-    LINK_REG->DCPCTR_b.SQSET = 1;
-    hcd_event_xfer_complete(LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true);
+    RUSB2->DCPCTR_b.SQSET = 1;
+    hcd_event_xfer_complete(RUSB2->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true);
   }
-  if (is1 & LINK_REG_INTSTS1_SIGN_Msk) {
-    hcd_event_xfer_complete(LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true);
+  if (is1 & RUSB2_INTSTS1_SIGN_Msk) {
+    hcd_event_xfer_complete(RUSB2->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true);
   }
-  if (is1 & LINK_REG_INTSTS1_ATTCH_Msk) {
-    LINK_REG->DVSTCTR0_b.UACT = 1;
+  if (is1 & RUSB2_INTSTS1_ATTCH_Msk) {
+    RUSB2->DVSTCTR0_b.UACT = 1;
     _hcd.need_reset = true;
-    LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~LINK_REG_INTSTS1_ATTCH_Msk) | LINK_REG_INTSTS1_DTCH_Msk;
+    RUSB2->INTENB1 = (RUSB2->INTENB1 & ~RUSB2_INTSTS1_ATTCH_Msk) | RUSB2_INTSTS1_DTCH_Msk;
     hcd_event_device_attach(rhport, true);
   }
-  if (is1 & LINK_REG_INTSTS1_DTCH_Msk) {
-    LINK_REG->DVSTCTR0_b.UACT = 0;
-    if (LINK_REG->DCPCTR_b.SUREQ) {
-      LINK_REG->DCPCTR_b.SUREQCLR = 1;
+  if (is1 & RUSB2_INTSTS1_DTCH_Msk) {
+    RUSB2->DVSTCTR0_b.UACT = 0;
+    if (RUSB2->DCPCTR_b.SUREQ) {
+      RUSB2->DCPCTR_b.SUREQCLR = 1;
     }
-    LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~LINK_REG_INTSTS1_DTCH_Msk) | LINK_REG_INTSTS1_ATTCH_Msk;
+    RUSB2->INTENB1 = (RUSB2->INTENB1 & ~RUSB2_INTSTS1_DTCH_Msk) | RUSB2_INTSTS1_ATTCH_Msk;
     hcd_event_device_remove(rhport, true);
   }
 
-  if (is0 & LINK_REG_INTSTS0_BEMP_Msk) {
-    const unsigned s = LINK_REG->BEMPSTS;
-    LINK_REG->BEMPSTS = 0;
+  if (is0 & RUSB2_INTSTS0_BEMP_Msk) {
+    const unsigned s = RUSB2->BEMPSTS;
+    RUSB2->BEMPSTS = 0;
     if (s & 1) {
       process_pipe0_bemp(rhport);
     }
   }
-  if (is0 & LINK_REG_INTSTS0_NRDY_Msk) {
-    const unsigned m = LINK_REG->NRDYENB;
-    unsigned s = LINK_REG->NRDYSTS & m;
-    LINK_REG->NRDYSTS = ~s;
+  if (is0 & RUSB2_INTSTS0_NRDY_Msk) {
+    const unsigned m = RUSB2->NRDYENB;
+    unsigned s = RUSB2->NRDYSTS & m;
+    RUSB2->NRDYSTS = ~s;
     while (s) {
 #if defined(__CCRX__)
       const unsigned num = Mod37BitPosition[(-s & s) % 37];
@@ -793,11 +793,11 @@ void hcd_int_handler(uint8_t rhport)
       s &= ~TU_BIT(num);
     }
   }
-  if (is0 & LINK_REG_INTSTS0_BRDY_Msk) {
-    const unsigned m = LINK_REG->BRDYENB;
-    unsigned s = LINK_REG->BRDYSTS & m;
+  if (is0 & RUSB2_INTSTS0_BRDY_Msk) {
+    const unsigned m = RUSB2->BRDYENB;
+    unsigned s = RUSB2->BRDYSTS & m;
     /* clear active bits (don't write 0 to already cleared bits according to the HW manual) */
-    LINK_REG->BRDYSTS = ~s;
+    RUSB2->BRDYSTS = ~s;
     while (s) {
 #if defined(__CCRX__)
       const unsigned num = Mod37BitPosition[(-s & s) % 37];
diff --git a/src/portable/renesas/rusb2/rusb2_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h
index a73b13951..24658e95a 100644
--- a/src/portable/renesas/rusb2/rusb2_ra.h
+++ b/src/portable/renesas/rusb2/rusb2_ra.h
@@ -34,24 +34,22 @@ extern "C" {
 /* renesas fsp api */
 #include "bsp_api.h"
 
-#define LINK_REG_BASE (0x40090000)
+#define RUSB2_REG_BASE (0x40090000)
 
-TU_ATTR_ALWAYS_INLINE
-static inline void link_int_enable(uint8_t rhport)
+TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_enable(uint8_t rhport)
 {
   (void) rhport;
   NVIC_EnableIRQ(TU_IRQn);
 }
 
-TU_ATTR_ALWAYS_INLINE
-static inline void link_int_disable(uint8_t rhport)
+TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_disable(uint8_t rhport)
 {
   (void) rhport;
   NVIC_DisableIRQ(TU_IRQn);
 }
 
 // MCU specific PHY init
-static inline void link_phy_init(void)
+TU_ATTR_ALWAYS_INLINE static inline void rusb2_phy_init(void)
 {
 }
 
diff --git a/src/portable/renesas/rusb2/rusb2_rx.h b/src/portable/renesas/rusb2/rusb2_rx.h
index e43253569..c28689df1 100644
--- a/src/portable/renesas/rusb2/rusb2_rx.h
+++ b/src/portable/renesas/rusb2/rusb2_rx.h
@@ -35,9 +35,9 @@ extern "C" {
 
 #include "iodefine.h"
 
-#define LINK_REG_BASE (0x000A0000)
+#define RUSB2_REG_BASE (0x000A0000)
 
-TU_ATTR_ALWAYS_INLINE static inline void link_int_enable(uint8_t rhport)
+TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_enable(uint8_t rhport)
 {
   (void) rhport;
 #if (CFG_TUSB_MCU == OPT_MCU_RX72N)
@@ -47,7 +47,7 @@ TU_ATTR_ALWAYS_INLINE static inline void link_int_enable(uint8_t rhport)
 #endif
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void link_int_disable(uint8_t rhport)
+TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_disable(uint8_t rhport)
 {
   (void) rhport;
 #if (CFG_TUSB_MCU == OPT_MCU_RX72N)
@@ -58,7 +58,7 @@ TU_ATTR_ALWAYS_INLINE static inline void link_int_disable(uint8_t rhport)
 }
 
 // MCU specific PHY init
-TU_ATTR_ALWAYS_INLINE static inline void link_phy_init(void)
+TU_ATTR_ALWAYS_INLINE static inline void rusb2_phy_init(void)
 {
 #if (CFG_TUSB_MCU == OPT_MCU_RX72N)
   IR(PERIB, INTB185) = 0;
diff --git a/src/portable/renesas/rusb2/rusb2_type.h b/src/portable/renesas/rusb2/rusb2_type.h
index cb3db650a..6a5c7f8ff 100644
--- a/src/portable/renesas/rusb2/rusb2_type.h
+++ b/src/portable/renesas/rusb2/rusb2_type.h
@@ -60,7 +60,7 @@ typedef struct TU_ATTR_PACKED {
       volatile uint16_t TRNCNT : 16; /* [15..0] Transaction Counter */
     } N_b;
   };
-} LINK_REG_PIPE_TR_t; /* Size = 4 (0x4) */
+} RUSB2_PIPE_TR_t; /* Size = 4 (0x4) */
 
 /* LINK_REG Structure */
 typedef struct TU_ATTR_PACKED {
@@ -685,7 +685,7 @@ typedef struct TU_ATTR_PACKED {
   };
   volatile const uint16_t RESERVED13;
   volatile const uint32_t RESERVED14[3];
-  volatile LINK_REG_PIPE_TR_t PIPE_TR[5]; /* (@ 0x00000090) Pipe Transaction Counter Registers */
+  volatile RUSB2_PIPE_TR_t PIPE_TR[5]; /* (@ 0x00000090) Pipe Transaction Counter Registers */
   volatile const uint32_t RESERVED15[3];
 
   union {
@@ -950,7 +950,7 @@ typedef struct TU_ATTR_PACKED {
       uint32_t : 8;
     } DPUSR1R_FS_b;
   };
-} LINK_REG_t; /* Size = 1032 (0x408) */
+} RUSB2_REG_t; /* Size = 1032 (0x408) */
 
 TU_ATTR_PACKED_END /* End of definition of packed structs (used by the CCRX toolchain) */
 TU_ATTR_BIT_FIELD_ORDER_END
@@ -961,706 +961,706 @@ TU_ATTR_BIT_FIELD_ORDER_END
 
 // PIPE_TR
 // E
-#define LINK_REG_PIPE_TR_E_TRENB_Pos       (9UL)        /* TRENB (Bit 9) */
-#define LINK_REG_PIPE_TR_E_TRENB_Msk       (0x200UL)    /* TRENB (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_TR_E_TRCLR_Pos       (8UL)        /* TRCLR (Bit 8) */
-#define LINK_REG_PIPE_TR_E_TRCLR_Msk       (0x100UL)    /* TRCLR (Bitfield-Mask: 0x01) */
+#define RUSB2_PIPE_TR_E_TRENB_Pos       (9UL)        /* TRENB (Bit 9) */
+#define RUSB2_PIPE_TR_E_TRENB_Msk       (0x200UL)    /* TRENB (Bitfield-Mask: 0x01) */
+#define RUSB2_PIPE_TR_E_TRCLR_Pos       (8UL)        /* TRCLR (Bit 8) */
+#define RUSB2_PIPE_TR_E_TRCLR_Msk       (0x100UL)    /* TRCLR (Bitfield-Mask: 0x01) */
 
 // N
-#define LINK_REG_PIPE_TR_N_TRNCNT_Pos      (0UL)        /* TRNCNT (Bit 0) */
-#define LINK_REG_PIPE_TR_N_TRNCNT_Msk      (0xffffUL)   /* TRNCNT (Bitfield-Mask: 0xffff) */
+#define RUSB2_PIPE_TR_N_TRNCNT_Pos      (0UL)        /* TRNCNT (Bit 0) */
+#define RUSB2_PIPE_TR_N_TRNCNT_Msk      (0xffffUL)   /* TRNCNT (Bitfield-Mask: 0xffff) */
 
 // LINK_REG
 
 // SYSCFG
-#define LINK_REG_SYSCFG_SCKE_Pos           (10UL)       /* SCKE (Bit 10) */
-#define LINK_REG_SYSCFG_SCKE_Msk           (0x400UL)    /* SCKE (Bitfield-Mask: 0x01) */
-#define LINK_REG_SYSCFG_CNEN_Pos           (8UL)        /* CNEN (Bit 8) */
-#define LINK_REG_SYSCFG_CNEN_Msk           (0x100UL)    /* CNEN (Bitfield-Mask: 0x01) */
-#define LINK_REG_SYSCFG_DCFM_Pos           (6UL)        /* DCFM (Bit 6) */
-#define LINK_REG_SYSCFG_DCFM_Msk           (0x40UL)     /* DCFM (Bitfield-Mask: 0x01) */
-#define LINK_REG_SYSCFG_DRPD_Pos           (5UL)        /* DRPD (Bit 5) */
-#define LINK_REG_SYSCFG_DRPD_Msk           (0x20UL)     /* DRPD (Bitfield-Mask: 0x01) */
-#define LINK_REG_SYSCFG_DPRPU_Pos          (4UL)        /* DPRPU (Bit 4) */
-#define LINK_REG_SYSCFG_DPRPU_Msk          (0x10UL)     /* DPRPU (Bitfield-Mask: 0x01) */
-#define LINK_REG_SYSCFG_DMRPU_Pos          (3UL)        /* DMRPU (Bit 3) */
-#define LINK_REG_SYSCFG_DMRPU_Msk          (0x8UL)      /* DMRPU (Bitfield-Mask: 0x01) */
-#define LINK_REG_SYSCFG_USBE_Pos           (0UL)        /* USBE (Bit 0) */
-#define LINK_REG_SYSCFG_USBE_Msk           (0x1UL)      /* USBE (Bitfield-Mask: 0x01) */
+#define RUSB2_SYSCFG_SCKE_Pos           (10UL)       /* SCKE (Bit 10) */
+#define RUSB2_SYSCFG_SCKE_Msk           (0x400UL)    /* SCKE (Bitfield-Mask: 0x01) */
+#define RUSB2_SYSCFG_CNEN_Pos           (8UL)        /* CNEN (Bit 8) */
+#define RUSB2_SYSCFG_CNEN_Msk           (0x100UL)    /* CNEN (Bitfield-Mask: 0x01) */
+#define RUSB2_SYSCFG_DCFM_Pos           (6UL)        /* DCFM (Bit 6) */
+#define RUSB2_SYSCFG_DCFM_Msk           (0x40UL)     /* DCFM (Bitfield-Mask: 0x01) */
+#define RUSB2_SYSCFG_DRPD_Pos           (5UL)        /* DRPD (Bit 5) */
+#define RUSB2_SYSCFG_DRPD_Msk           (0x20UL)     /* DRPD (Bitfield-Mask: 0x01) */
+#define RUSB2_SYSCFG_DPRPU_Pos          (4UL)        /* DPRPU (Bit 4) */
+#define RUSB2_SYSCFG_DPRPU_Msk          (0x10UL)     /* DPRPU (Bitfield-Mask: 0x01) */
+#define RUSB2_SYSCFG_DMRPU_Pos          (3UL)        /* DMRPU (Bit 3) */
+#define RUSB2_SYSCFG_DMRPU_Msk          (0x8UL)      /* DMRPU (Bitfield-Mask: 0x01) */
+#define RUSB2_SYSCFG_USBE_Pos           (0UL)        /* USBE (Bit 0) */
+#define RUSB2_SYSCFG_USBE_Msk           (0x1UL)      /* USBE (Bitfield-Mask: 0x01) */
 
 // BUSWAIT
-#define LINK_REG_BUSWAIT_BWAIT_Pos         (0UL)        /* BWAIT (Bit 0) */
-#define LINK_REG_BUSWAIT_BWAIT_Msk         (0xfUL)      /* BWAIT (Bitfield-Mask: 0x0f) */
+#define RUSB2_BUSWAIT_BWAIT_Pos         (0UL)        /* BWAIT (Bit 0) */
+#define RUSB2_BUSWAIT_BWAIT_Msk         (0xfUL)      /* BWAIT (Bitfield-Mask: 0x0f) */
 
 // SYSSTS0
-#define LINK_REG_SYSSTS0_OVCMON_Pos        (14UL)       /* OVCMON (Bit 14) */
-#define LINK_REG_SYSSTS0_OVCMON_Msk        (0xc000UL)   /* OVCMON (Bitfield-Mask: 0x03) */
-#define LINK_REG_SYSSTS0_HTACT_Pos         (6UL)        /* HTACT (Bit 6) */
-#define LINK_REG_SYSSTS0_HTACT_Msk         (0x40UL)     /* HTACT (Bitfield-Mask: 0x01) */
-#define LINK_REG_SYSSTS0_SOFEA_Pos         (5UL)        /* SOFEA (Bit 5) */
-#define LINK_REG_SYSSTS0_SOFEA_Msk         (0x20UL)     /* SOFEA (Bitfield-Mask: 0x01) */
-#define LINK_REG_SYSSTS0_IDMON_Pos         (2UL)        /* IDMON (Bit 2) */
-#define LINK_REG_SYSSTS0_IDMON_Msk         (0x4UL)      /* IDMON (Bitfield-Mask: 0x01) */
-#define LINK_REG_SYSSTS0_LNST_Pos          (0UL)        /* LNST (Bit 0) */
-#define LINK_REG_SYSSTS0_LNST_Msk          (0x3UL)      /* LNST (Bitfield-Mask: 0x03) */
+#define RUSB2_SYSSTS0_OVCMON_Pos        (14UL)       /* OVCMON (Bit 14) */
+#define RUSB2_SYSSTS0_OVCMON_Msk        (0xc000UL)   /* OVCMON (Bitfield-Mask: 0x03) */
+#define RUSB2_SYSSTS0_HTACT_Pos         (6UL)        /* HTACT (Bit 6) */
+#define RUSB2_SYSSTS0_HTACT_Msk         (0x40UL)     /* HTACT (Bitfield-Mask: 0x01) */
+#define RUSB2_SYSSTS0_SOFEA_Pos         (5UL)        /* SOFEA (Bit 5) */
+#define RUSB2_SYSSTS0_SOFEA_Msk         (0x20UL)     /* SOFEA (Bitfield-Mask: 0x01) */
+#define RUSB2_SYSSTS0_IDMON_Pos         (2UL)        /* IDMON (Bit 2) */
+#define RUSB2_SYSSTS0_IDMON_Msk         (0x4UL)      /* IDMON (Bitfield-Mask: 0x01) */
+#define RUSB2_SYSSTS0_LNST_Pos          (0UL)        /* LNST (Bit 0) */
+#define RUSB2_SYSSTS0_LNST_Msk          (0x3UL)      /* LNST (Bitfield-Mask: 0x03) */
 
 // PLLSTA
-#define LINK_REG_PLLSTA_PLLLOCK_Pos        (0UL)        /* PLLLOCK (Bit 0) */
-#define LINK_REG_PLLSTA_PLLLOCK_Msk        (0x1UL)      /* PLLLOCK (Bitfield-Mask: 0x01) */
+#define RUSB2_PLLSTA_PLLLOCK_Pos        (0UL)        /* PLLLOCK (Bit 0) */
+#define RUSB2_PLLSTA_PLLLOCK_Msk        (0x1UL)      /* PLLLOCK (Bitfield-Mask: 0x01) */
 
 // DVSTCTR0
-#define LINK_REG_DVSTCTR0_HNPBTOA_Pos      (11UL)       /* HNPBTOA (Bit 11) */
-#define LINK_REG_DVSTCTR0_HNPBTOA_Msk      (0x800UL)    /* HNPBTOA (Bitfield-Mask: 0x01) */
-#define LINK_REG_DVSTCTR0_EXICEN_Pos       (10UL)       /* EXICEN (Bit 10) */
-#define LINK_REG_DVSTCTR0_EXICEN_Msk       (0x400UL)    /* EXICEN (Bitfield-Mask: 0x01) */
-#define LINK_REG_DVSTCTR0_VBUSEN_Pos       (9UL)        /* VBUSEN (Bit 9) */
-#define LINK_REG_DVSTCTR0_VBUSEN_Msk       (0x200UL)    /* VBUSEN (Bitfield-Mask: 0x01) */
-#define LINK_REG_DVSTCTR0_WKUP_Pos         (8UL)        /* WKUP (Bit 8) */
-#define LINK_REG_DVSTCTR0_WKUP_Msk         (0x100UL)    /* WKUP (Bitfield-Mask: 0x01) */
-#define LINK_REG_DVSTCTR0_RWUPE_Pos        (7UL)        /* RWUPE (Bit 7) */
-#define LINK_REG_DVSTCTR0_RWUPE_Msk        (0x80UL)     /* RWUPE (Bitfield-Mask: 0x01) */
-#define LINK_REG_DVSTCTR0_USBRST_Pos       (6UL)        /* USBRST (Bit 6) */
-#define LINK_REG_DVSTCTR0_USBRST_Msk       (0x40UL)     /* USBRST (Bitfield-Mask: 0x01) */
-#define LINK_REG_DVSTCTR0_RESUME_Pos       (5UL)        /* RESUME (Bit 5) */
-#define LINK_REG_DVSTCTR0_RESUME_Msk       (0x20UL)     /* RESUME (Bitfield-Mask: 0x01) */
-#define LINK_REG_DVSTCTR0_UACT_Pos         (4UL)        /* UACT (Bit 4) */
-#define LINK_REG_DVSTCTR0_UACT_Msk         (0x10UL)     /* UACT (Bitfield-Mask: 0x01) */
-#define LINK_REG_DVSTCTR0_RHST_Pos         (0UL)        /* RHST (Bit 0) */
-#define LINK_REG_DVSTCTR0_RHST_Msk         (0x7UL)      /* RHST (Bitfield-Mask: 0x07) */
+#define RUSB2_DVSTCTR0_HNPBTOA_Pos      (11UL)       /* HNPBTOA (Bit 11) */
+#define RUSB2_DVSTCTR0_HNPBTOA_Msk      (0x800UL)    /* HNPBTOA (Bitfield-Mask: 0x01) */
+#define RUSB2_DVSTCTR0_EXICEN_Pos       (10UL)       /* EXICEN (Bit 10) */
+#define RUSB2_DVSTCTR0_EXICEN_Msk       (0x400UL)    /* EXICEN (Bitfield-Mask: 0x01) */
+#define RUSB2_DVSTCTR0_VBUSEN_Pos       (9UL)        /* VBUSEN (Bit 9) */
+#define RUSB2_DVSTCTR0_VBUSEN_Msk       (0x200UL)    /* VBUSEN (Bitfield-Mask: 0x01) */
+#define RUSB2_DVSTCTR0_WKUP_Pos         (8UL)        /* WKUP (Bit 8) */
+#define RUSB2_DVSTCTR0_WKUP_Msk         (0x100UL)    /* WKUP (Bitfield-Mask: 0x01) */
+#define RUSB2_DVSTCTR0_RWUPE_Pos        (7UL)        /* RWUPE (Bit 7) */
+#define RUSB2_DVSTCTR0_RWUPE_Msk        (0x80UL)     /* RWUPE (Bitfield-Mask: 0x01) */
+#define RUSB2_DVSTCTR0_USBRST_Pos       (6UL)        /* USBRST (Bit 6) */
+#define RUSB2_DVSTCTR0_USBRST_Msk       (0x40UL)     /* USBRST (Bitfield-Mask: 0x01) */
+#define RUSB2_DVSTCTR0_RESUME_Pos       (5UL)        /* RESUME (Bit 5) */
+#define RUSB2_DVSTCTR0_RESUME_Msk       (0x20UL)     /* RESUME (Bitfield-Mask: 0x01) */
+#define RUSB2_DVSTCTR0_UACT_Pos         (4UL)        /* UACT (Bit 4) */
+#define RUSB2_DVSTCTR0_UACT_Msk         (0x10UL)     /* UACT (Bitfield-Mask: 0x01) */
+#define RUSB2_DVSTCTR0_RHST_Pos         (0UL)        /* RHST (Bit 0) */
+#define RUSB2_DVSTCTR0_RHST_Msk         (0x7UL)      /* RHST (Bitfield-Mask: 0x07) */
 
 // TESTMODE
-#define LINK_REG_TESTMODE_UTST_Pos         (0UL)        /* UTST (Bit 0) */
-#define LINK_REG_TESTMODE_UTST_Msk         (0xfUL)      /* UTST (Bitfield-Mask: 0x0f) */
+#define RUSB2_TESTMODE_UTST_Pos         (0UL)        /* UTST (Bit 0) */
+#define RUSB2_TESTMODE_UTST_Msk         (0xfUL)      /* UTST (Bitfield-Mask: 0x0f) */
 
 // CFIFOSEL
-#define LINK_REG_CFIFOSEL_RCNT_Pos         (15UL)       /* RCNT (Bit 15) */
-#define LINK_REG_CFIFOSEL_RCNT_Msk         (0x8000UL)   /* RCNT (Bitfield-Mask: 0x01) */
-#define LINK_REG_CFIFOSEL_REW_Pos          (14UL)       /* REW (Bit 14) */
-#define LINK_REG_CFIFOSEL_REW_Msk          (0x4000UL)   /* REW (Bitfield-Mask: 0x01) */
-#define LINK_REG_CFIFOSEL_MBW_Pos          (10UL)       /* MBW (Bit 10) */
-#define LINK_REG_CFIFOSEL_MBW_Msk          (0xc00UL)    /* MBW (Bitfield-Mask: 0x03) */
-#define LINK_REG_CFIFOSEL_BIGEND_Pos       (8UL)        /* BIGEND (Bit 8) */
-#define LINK_REG_CFIFOSEL_BIGEND_Msk       (0x100UL)    /* BIGEND (Bitfield-Mask: 0x01) */
-#define LINK_REG_CFIFOSEL_ISEL_Pos         (5UL)        /* ISEL (Bit 5) */
-#define LINK_REG_CFIFOSEL_ISEL_Msk         (0x20UL)     /* ISEL (Bitfield-Mask: 0x01) */
-#define LINK_REG_CFIFOSEL_CURPIPE_Pos      (0UL)        /* CURPIPE (Bit 0) */
-#define LINK_REG_CFIFOSEL_CURPIPE_Msk      (0xfUL)      /* CURPIPE (Bitfield-Mask: 0x0f) */
+#define RUSB2_CFIFOSEL_RCNT_Pos         (15UL)       /* RCNT (Bit 15) */
+#define RUSB2_CFIFOSEL_RCNT_Msk         (0x8000UL)   /* RCNT (Bitfield-Mask: 0x01) */
+#define RUSB2_CFIFOSEL_REW_Pos          (14UL)       /* REW (Bit 14) */
+#define RUSB2_CFIFOSEL_REW_Msk          (0x4000UL)   /* REW (Bitfield-Mask: 0x01) */
+#define RUSB2_CFIFOSEL_MBW_Pos          (10UL)       /* MBW (Bit 10) */
+#define RUSB2_CFIFOSEL_MBW_Msk          (0xc00UL)    /* MBW (Bitfield-Mask: 0x03) */
+#define RUSB2_CFIFOSEL_BIGEND_Pos       (8UL)        /* BIGEND (Bit 8) */
+#define RUSB2_CFIFOSEL_BIGEND_Msk       (0x100UL)    /* BIGEND (Bitfield-Mask: 0x01) */
+#define RUSB2_CFIFOSEL_ISEL_Pos         (5UL)        /* ISEL (Bit 5) */
+#define RUSB2_CFIFOSEL_ISEL_Msk         (0x20UL)     /* ISEL (Bitfield-Mask: 0x01) */
+#define RUSB2_CFIFOSEL_CURPIPE_Pos      (0UL)        /* CURPIPE (Bit 0) */
+#define RUSB2_CFIFOSEL_CURPIPE_Msk      (0xfUL)      /* CURPIPE (Bitfield-Mask: 0x0f) */
 
 // CFIFOCTR
-#define LINK_REG_CFIFOCTR_BVAL_Pos         (15UL)       /* BVAL (Bit 15) */
-#define LINK_REG_CFIFOCTR_BVAL_Msk         (0x8000UL)   /* BVAL (Bitfield-Mask: 0x01) */
-#define LINK_REG_CFIFOCTR_BCLR_Pos         (14UL)       /* BCLR (Bit 14) */
-#define LINK_REG_CFIFOCTR_BCLR_Msk         (0x4000UL)   /* BCLR (Bitfield-Mask: 0x01) */
-#define LINK_REG_CFIFOCTR_FRDY_Pos         (13UL)       /* FRDY (Bit 13) */
-#define LINK_REG_CFIFOCTR_FRDY_Msk         (0x2000UL)   /* FRDY (Bitfield-Mask: 0x01) */
-#define LINK_REG_CFIFOCTR_DTLN_Pos         (0UL)        /* DTLN (Bit 0) */
-#define LINK_REG_CFIFOCTR_DTLN_Msk         (0xfffUL)    /* DTLN (Bitfield-Mask: 0xfff) */
+#define RUSB2_CFIFOCTR_BVAL_Pos         (15UL)       /* BVAL (Bit 15) */
+#define RUSB2_CFIFOCTR_BVAL_Msk         (0x8000UL)   /* BVAL (Bitfield-Mask: 0x01) */
+#define RUSB2_CFIFOCTR_BCLR_Pos         (14UL)       /* BCLR (Bit 14) */
+#define RUSB2_CFIFOCTR_BCLR_Msk         (0x4000UL)   /* BCLR (Bitfield-Mask: 0x01) */
+#define RUSB2_CFIFOCTR_FRDY_Pos         (13UL)       /* FRDY (Bit 13) */
+#define RUSB2_CFIFOCTR_FRDY_Msk         (0x2000UL)   /* FRDY (Bitfield-Mask: 0x01) */
+#define RUSB2_CFIFOCTR_DTLN_Pos         (0UL)        /* DTLN (Bit 0) */
+#define RUSB2_CFIFOCTR_DTLN_Msk         (0xfffUL)    /* DTLN (Bitfield-Mask: 0xfff) */
 
 // D0FIFOSEL
-#define LINK_REG_D0FIFOSEL_RCNT_Pos        (15UL)       /* RCNT (Bit 15) */
-#define LINK_REG_D0FIFOSEL_RCNT_Msk        (0x8000UL)   /* RCNT (Bitfield-Mask: 0x01) */
-#define LINK_REG_D0FIFOSEL_REW_Pos         (14UL)       /* REW (Bit 14) */
-#define LINK_REG_D0FIFOSEL_REW_Msk         (0x4000UL)   /* REW (Bitfield-Mask: 0x01) */
-#define LINK_REG_D0FIFOSEL_DCLRM_Pos       (13UL)       /* DCLRM (Bit 13) */
-#define LINK_REG_D0FIFOSEL_DCLRM_Msk       (0x2000UL)   /* DCLRM (Bitfield-Mask: 0x01) */
-#define LINK_REG_D0FIFOSEL_DREQE_Pos       (12UL)       /* DREQE (Bit 12) */
-#define LINK_REG_D0FIFOSEL_DREQE_Msk       (0x1000UL)   /* DREQE (Bitfield-Mask: 0x01) */
-#define LINK_REG_D0FIFOSEL_MBW_Pos         (10UL)       /* MBW (Bit 10) */
-#define LINK_REG_D0FIFOSEL_MBW_Msk         (0xc00UL)    /* MBW (Bitfield-Mask: 0x03) */
-#define LINK_REG_D0FIFOSEL_BIGEND_Pos      (8UL)        /* BIGEND (Bit 8) */
-#define LINK_REG_D0FIFOSEL_BIGEND_Msk      (0x100UL)    /* BIGEND (Bitfield-Mask: 0x01) */
-#define LINK_REG_D0FIFOSEL_CURPIPE_Pos     (0UL)        /* CURPIPE (Bit 0) */
-#define LINK_REG_D0FIFOSEL_CURPIPE_Msk     (0xfUL)      /* CURPIPE (Bitfield-Mask: 0x0f) */
+#define RUSB2_D0FIFOSEL_RCNT_Pos        (15UL)       /* RCNT (Bit 15) */
+#define RUSB2_D0FIFOSEL_RCNT_Msk        (0x8000UL)   /* RCNT (Bitfield-Mask: 0x01) */
+#define RUSB2_D0FIFOSEL_REW_Pos         (14UL)       /* REW (Bit 14) */
+#define RUSB2_D0FIFOSEL_REW_Msk         (0x4000UL)   /* REW (Bitfield-Mask: 0x01) */
+#define RUSB2_D0FIFOSEL_DCLRM_Pos       (13UL)       /* DCLRM (Bit 13) */
+#define RUSB2_D0FIFOSEL_DCLRM_Msk       (0x2000UL)   /* DCLRM (Bitfield-Mask: 0x01) */
+#define RUSB2_D0FIFOSEL_DREQE_Pos       (12UL)       /* DREQE (Bit 12) */
+#define RUSB2_D0FIFOSEL_DREQE_Msk       (0x1000UL)   /* DREQE (Bitfield-Mask: 0x01) */
+#define RUSB2_D0FIFOSEL_MBW_Pos         (10UL)       /* MBW (Bit 10) */
+#define RUSB2_D0FIFOSEL_MBW_Msk         (0xc00UL)    /* MBW (Bitfield-Mask: 0x03) */
+#define RUSB2_D0FIFOSEL_BIGEND_Pos      (8UL)        /* BIGEND (Bit 8) */
+#define RUSB2_D0FIFOSEL_BIGEND_Msk      (0x100UL)    /* BIGEND (Bitfield-Mask: 0x01) */
+#define RUSB2_D0FIFOSEL_CURPIPE_Pos     (0UL)        /* CURPIPE (Bit 0) */
+#define RUSB2_D0FIFOSEL_CURPIPE_Msk     (0xfUL)      /* CURPIPE (Bitfield-Mask: 0x0f) */
 
 // D0FIFOCTR
-#define LINK_REG_D0FIFOCTR_BVAL_Pos        (15UL)       /* BVAL (Bit 15) */
-#define LINK_REG_D0FIFOCTR_BVAL_Msk        (0x8000UL)   /* BVAL (Bitfield-Mask: 0x01) */
-#define LINK_REG_D0FIFOCTR_BCLR_Pos        (14UL)       /* BCLR (Bit 14) */
-#define LINK_REG_D0FIFOCTR_BCLR_Msk        (0x4000UL)   /* BCLR (Bitfield-Mask: 0x01) */
-#define LINK_REG_D0FIFOCTR_FRDY_Pos        (13UL)       /* FRDY (Bit 13) */
-#define LINK_REG_D0FIFOCTR_FRDY_Msk        (0x2000UL)   /* FRDY (Bitfield-Mask: 0x01) */
-#define LINK_REG_D0FIFOCTR_DTLN_Pos        (0UL)        /* DTLN (Bit 0) */
-#define LINK_REG_D0FIFOCTR_DTLN_Msk        (0xfffUL)    /* DTLN (Bitfield-Mask: 0xfff) */
+#define RUSB2_D0FIFOCTR_BVAL_Pos        (15UL)       /* BVAL (Bit 15) */
+#define RUSB2_D0FIFOCTR_BVAL_Msk        (0x8000UL)   /* BVAL (Bitfield-Mask: 0x01) */
+#define RUSB2_D0FIFOCTR_BCLR_Pos        (14UL)       /* BCLR (Bit 14) */
+#define RUSB2_D0FIFOCTR_BCLR_Msk        (0x4000UL)   /* BCLR (Bitfield-Mask: 0x01) */
+#define RUSB2_D0FIFOCTR_FRDY_Pos        (13UL)       /* FRDY (Bit 13) */
+#define RUSB2_D0FIFOCTR_FRDY_Msk        (0x2000UL)   /* FRDY (Bitfield-Mask: 0x01) */
+#define RUSB2_D0FIFOCTR_DTLN_Pos        (0UL)        /* DTLN (Bit 0) */
+#define RUSB2_D0FIFOCTR_DTLN_Msk        (0xfffUL)    /* DTLN (Bitfield-Mask: 0xfff) */
 
 // D1FIFOSEL
-#define LINK_REG_D1FIFOSEL_RCNT_Pos        (15UL)       /* RCNT (Bit 15) */
-#define LINK_REG_D1FIFOSEL_RCNT_Msk        (0x8000UL)   /* RCNT (Bitfield-Mask: 0x01) */
-#define LINK_REG_D1FIFOSEL_REW_Pos         (14UL)       /* REW (Bit 14) */
-#define LINK_REG_D1FIFOSEL_REW_Msk         (0x4000UL)   /* REW (Bitfield-Mask: 0x01) */
-#define LINK_REG_D1FIFOSEL_DCLRM_Pos       (13UL)       /* DCLRM (Bit 13) */
-#define LINK_REG_D1FIFOSEL_DCLRM_Msk       (0x2000UL)   /* DCLRM (Bitfield-Mask: 0x01) */
-#define LINK_REG_D1FIFOSEL_DREQE_Pos       (12UL)       /* DREQE (Bit 12) */
-#define LINK_REG_D1FIFOSEL_DREQE_Msk       (0x1000UL)   /* DREQE (Bitfield-Mask: 0x01) */
-#define LINK_REG_D1FIFOSEL_MBW_Pos         (10UL)       /* MBW (Bit 10) */
-#define LINK_REG_D1FIFOSEL_MBW_Msk         (0xc00UL)    /* MBW (Bitfield-Mask: 0x03) */
-#define LINK_REG_D1FIFOSEL_BIGEND_Pos      (8UL)        /* BIGEND (Bit 8) */
-#define LINK_REG_D1FIFOSEL_BIGEND_Msk      (0x100UL)    /* BIGEND (Bitfield-Mask: 0x01) */
-#define LINK_REG_D1FIFOSEL_CURPIPE_Pos     (0UL)        /* CURPIPE (Bit 0) */
-#define LINK_REG_D1FIFOSEL_CURPIPE_Msk     (0xfUL)      /* CURPIPE (Bitfield-Mask: 0x0f) */
+#define RUSB2_D1FIFOSEL_RCNT_Pos        (15UL)       /* RCNT (Bit 15) */
+#define RUSB2_D1FIFOSEL_RCNT_Msk        (0x8000UL)   /* RCNT (Bitfield-Mask: 0x01) */
+#define RUSB2_D1FIFOSEL_REW_Pos         (14UL)       /* REW (Bit 14) */
+#define RUSB2_D1FIFOSEL_REW_Msk         (0x4000UL)   /* REW (Bitfield-Mask: 0x01) */
+#define RUSB2_D1FIFOSEL_DCLRM_Pos       (13UL)       /* DCLRM (Bit 13) */
+#define RUSB2_D1FIFOSEL_DCLRM_Msk       (0x2000UL)   /* DCLRM (Bitfield-Mask: 0x01) */
+#define RUSB2_D1FIFOSEL_DREQE_Pos       (12UL)       /* DREQE (Bit 12) */
+#define RUSB2_D1FIFOSEL_DREQE_Msk       (0x1000UL)   /* DREQE (Bitfield-Mask: 0x01) */
+#define RUSB2_D1FIFOSEL_MBW_Pos         (10UL)       /* MBW (Bit 10) */
+#define RUSB2_D1FIFOSEL_MBW_Msk         (0xc00UL)    /* MBW (Bitfield-Mask: 0x03) */
+#define RUSB2_D1FIFOSEL_BIGEND_Pos      (8UL)        /* BIGEND (Bit 8) */
+#define RUSB2_D1FIFOSEL_BIGEND_Msk      (0x100UL)    /* BIGEND (Bitfield-Mask: 0x01) */
+#define RUSB2_D1FIFOSEL_CURPIPE_Pos     (0UL)        /* CURPIPE (Bit 0) */
+#define RUSB2_D1FIFOSEL_CURPIPE_Msk     (0xfUL)      /* CURPIPE (Bitfield-Mask: 0x0f) */
 
 // D1FIFOCTR
-#define LINK_REG_D1FIFOCTR_BVAL_Pos        (15UL)       /* BVAL (Bit 15) */
-#define LINK_REG_D1FIFOCTR_BVAL_Msk        (0x8000UL)   /* BVAL (Bitfield-Mask: 0x01) */
-#define LINK_REG_D1FIFOCTR_BCLR_Pos        (14UL)       /* BCLR (Bit 14) */
-#define LINK_REG_D1FIFOCTR_BCLR_Msk        (0x4000UL)   /* BCLR (Bitfield-Mask: 0x01) */
-#define LINK_REG_D1FIFOCTR_FRDY_Pos        (13UL)       /* FRDY (Bit 13) */
-#define LINK_REG_D1FIFOCTR_FRDY_Msk        (0x2000UL)   /* FRDY (Bitfield-Mask: 0x01) */
-#define LINK_REG_D1FIFOCTR_DTLN_Pos        (0UL)        /* DTLN (Bit 0) */
-#define LINK_REG_D1FIFOCTR_DTLN_Msk        (0xfffUL)    /* DTLN (Bitfield-Mask: 0xfff) */
+#define RUSB2_D1FIFOCTR_BVAL_Pos        (15UL)       /* BVAL (Bit 15) */
+#define RUSB2_D1FIFOCTR_BVAL_Msk        (0x8000UL)   /* BVAL (Bitfield-Mask: 0x01) */
+#define RUSB2_D1FIFOCTR_BCLR_Pos        (14UL)       /* BCLR (Bit 14) */
+#define RUSB2_D1FIFOCTR_BCLR_Msk        (0x4000UL)   /* BCLR (Bitfield-Mask: 0x01) */
+#define RUSB2_D1FIFOCTR_FRDY_Pos        (13UL)       /* FRDY (Bit 13) */
+#define RUSB2_D1FIFOCTR_FRDY_Msk        (0x2000UL)   /* FRDY (Bitfield-Mask: 0x01) */
+#define RUSB2_D1FIFOCTR_DTLN_Pos        (0UL)        /* DTLN (Bit 0) */
+#define RUSB2_D1FIFOCTR_DTLN_Msk        (0xfffUL)    /* DTLN (Bitfield-Mask: 0xfff) */
 
 // INTENB0
-#define LINK_REG_INTENB0_VBSE_Pos          (15UL)       /* VBSE (Bit 15) */
-#define LINK_REG_INTENB0_VBSE_Msk          (0x8000UL)   /* VBSE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB0_RSME_Pos          (14UL)       /* RSME (Bit 14) */
-#define LINK_REG_INTENB0_RSME_Msk          (0x4000UL)   /* RSME (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB0_SOFE_Pos          (13UL)       /* SOFE (Bit 13) */
-#define LINK_REG_INTENB0_SOFE_Msk          (0x2000UL)   /* SOFE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB0_DVSE_Pos          (12UL)       /* DVSE (Bit 12) */
-#define LINK_REG_INTENB0_DVSE_Msk          (0x1000UL)   /* DVSE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB0_CTRE_Pos          (11UL)       /* CTRE (Bit 11) */
-#define LINK_REG_INTENB0_CTRE_Msk          (0x800UL)    /* CTRE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB0_BEMPE_Pos         (10UL)       /* BEMPE (Bit 10) */
-#define LINK_REG_INTENB0_BEMPE_Msk         (0x400UL)    /* BEMPE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB0_NRDYE_Pos         (9UL)        /* NRDYE (Bit 9) */
-#define LINK_REG_INTENB0_NRDYE_Msk         (0x200UL)    /* NRDYE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB0_BRDYE_Pos         (8UL)        /* BRDYE (Bit 8) */
-#define LINK_REG_INTENB0_BRDYE_Msk         (0x100UL)    /* BRDYE (Bitfield-Mask: 0x01) */
+#define RUSB2_INTENB0_VBSE_Pos          (15UL)       /* VBSE (Bit 15) */
+#define RUSB2_INTENB0_VBSE_Msk          (0x8000UL)   /* VBSE (Bitfield-Mask: 0x01) */
+#define RUSB2_INTENB0_RSME_Pos          (14UL)       /* RSME (Bit 14) */
+#define RUSB2_INTENB0_RSME_Msk          (0x4000UL)   /* RSME (Bitfield-Mask: 0x01) */
+#define RUSB2_INTENB0_SOFE_Pos          (13UL)       /* SOFE (Bit 13) */
+#define RUSB2_INTENB0_SOFE_Msk          (0x2000UL)   /* SOFE (Bitfield-Mask: 0x01) */
+#define RUSB2_INTENB0_DVSE_Pos          (12UL)       /* DVSE (Bit 12) */
+#define RUSB2_INTENB0_DVSE_Msk          (0x1000UL)   /* DVSE (Bitfield-Mask: 0x01) */
+#define RUSB2_INTENB0_CTRE_Pos          (11UL)       /* CTRE (Bit 11) */
+#define RUSB2_INTENB0_CTRE_Msk          (0x800UL)    /* CTRE (Bitfield-Mask: 0x01) */
+#define RUSB2_INTENB0_BEMPE_Pos         (10UL)       /* BEMPE (Bit 10) */
+#define RUSB2_INTENB0_BEMPE_Msk         (0x400UL)    /* BEMPE (Bitfield-Mask: 0x01) */
+#define RUSB2_INTENB0_NRDYE_Pos         (9UL)        /* NRDYE (Bit 9) */
+#define RUSB2_INTENB0_NRDYE_Msk         (0x200UL)    /* NRDYE (Bitfield-Mask: 0x01) */
+#define RUSB2_INTENB0_BRDYE_Pos         (8UL)        /* BRDYE (Bit 8) */
+#define RUSB2_INTENB0_BRDYE_Msk         (0x100UL)    /* BRDYE (Bitfield-Mask: 0x01) */
 
 // INTENB1
-#define LINK_REG_INTENB1_OVRCRE_Pos        (15UL)       /* OVRCRE (Bit 15) */
-#define LINK_REG_INTENB1_OVRCRE_Msk        (0x8000UL)   /* OVRCRE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB1_BCHGE_Pos         (14UL)       /* BCHGE (Bit 14) */
-#define LINK_REG_INTENB1_BCHGE_Msk         (0x4000UL)   /* BCHGE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB1_DTCHE_Pos         (12UL)       /* DTCHE (Bit 12) */
-#define LINK_REG_INTENB1_DTCHE_Msk         (0x1000UL)   /* DTCHE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB1_ATTCHE_Pos        (11UL)       /* ATTCHE (Bit 11) */
-#define LINK_REG_INTENB1_ATTCHE_Msk        (0x800UL)    /* ATTCHE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB1_EOFERRE_Pos       (6UL)        /* EOFERRE (Bit 6) */
-#define LINK_REG_INTENB1_EOFERRE_Msk       (0x40UL)     /* EOFERRE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB1_SIGNE_Pos         (5UL)        /* SIGNE (Bit 5) */
-#define LINK_REG_INTENB1_SIGNE_Msk         (0x20UL)     /* SIGNE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB1_SACKE_Pos         (4UL)        /* SACKE (Bit 4) */
-#define LINK_REG_INTENB1_SACKE_Msk         (0x10UL)     /* SACKE (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTENB1_PDDETINTE0_Pos    (0UL)        /* PDDETINTE0 (Bit 0) */
-#define LINK_REG_INTENB1_PDDETINTE0_Msk    (0x1UL)      /* PDDETINTE0 (Bitfield-Mask: 0x01) */
+#define RUSB2_INTENB1_OVRCRE_Pos        (15UL)       /* OVRCRE (Bit 15) */
+#define RUSB2_INTENB1_OVRCRE_Msk        (0x8000UL)   /* OVRCRE (Bitfield-Mask: 0x01) */
+#define RUSB2_INTENB1_BCHGE_Pos         (14UL)       /* BCHGE (Bit 14) */
+#define RUSB2_INTENB1_BCHGE_Msk         (0x4000UL)   /* BCHGE (Bitfield-Mask: 0x01) */
+#define RUSB2_INTENB1_DTCHE_Pos         (12UL)       /* DTCHE (Bit 12) */
+#define RUSB2_INTENB1_DTCHE_Msk         (0x1000UL)   /* DTCHE (Bitfield-Mask: 0x01) */
+#define RUSB2_INTENB1_ATTCHE_Pos        (11UL)       /* ATTCHE (Bit 11) */
+#define RUSB2_INTENB1_ATTCHE_Msk        (0x800UL)    /* ATTCHE (Bitfield-Mask: 0x01) */
+#define RUSB2_INTENB1_EOFERRE_Pos       (6UL)        /* EOFERRE (Bit 6) */
+#define RUSB2_INTENB1_EOFERRE_Msk       (0x40UL)     /* EOFERRE (Bitfield-Mask: 0x01) */
+#define RUSB2_INTENB1_SIGNE_Pos         (5UL)        /* SIGNE (Bit 5) */
+#define RUSB2_INTENB1_SIGNE_Msk         (0x20UL)     /* SIGNE (Bitfield-Mask: 0x01) */
+#define RUSB2_INTENB1_SACKE_Pos         (4UL)        /* SACKE (Bit 4) */
+#define RUSB2_INTENB1_SACKE_Msk         (0x10UL)     /* SACKE (Bitfield-Mask: 0x01) */
+#define RUSB2_INTENB1_PDDETINTE0_Pos    (0UL)        /* PDDETINTE0 (Bit 0) */
+#define RUSB2_INTENB1_PDDETINTE0_Msk    (0x1UL)      /* PDDETINTE0 (Bitfield-Mask: 0x01) */
 
 // BRDYENB
-#define LINK_REG_BRDYENB_PIPEBRDYE_Pos     (0UL)        /* PIPEBRDYE (Bit 0) */
-#define LINK_REG_BRDYENB_PIPEBRDYE_Msk     (0x1UL)      /* PIPEBRDYE (Bitfield-Mask: 0x01) */
+#define RUSB2_BRDYENB_PIPEBRDYE_Pos     (0UL)        /* PIPEBRDYE (Bit 0) */
+#define RUSB2_BRDYENB_PIPEBRDYE_Msk     (0x1UL)      /* PIPEBRDYE (Bitfield-Mask: 0x01) */
 
 // NRDYENB
-#define LINK_REG_NRDYENB_PIPENRDYE_Pos     (0UL)        /* PIPENRDYE (Bit 0) */
-#define LINK_REG_NRDYENB_PIPENRDYE_Msk     (0x1UL)      /* PIPENRDYE (Bitfield-Mask: 0x01) */
+#define RUSB2_NRDYENB_PIPENRDYE_Pos     (0UL)        /* PIPENRDYE (Bit 0) */
+#define RUSB2_NRDYENB_PIPENRDYE_Msk     (0x1UL)      /* PIPENRDYE (Bitfield-Mask: 0x01) */
 
 // BEMPENB
-#define LINK_REG_BEMPENB_PIPEBEMPE_Pos     (0UL)        /* PIPEBEMPE (Bit 0) */
-#define LINK_REG_BEMPENB_PIPEBEMPE_Msk     (0x1UL)      /* PIPEBEMPE (Bitfield-Mask: 0x01) */
+#define RUSB2_BEMPENB_PIPEBEMPE_Pos     (0UL)        /* PIPEBEMPE (Bit 0) */
+#define RUSB2_BEMPENB_PIPEBEMPE_Msk     (0x1UL)      /* PIPEBEMPE (Bitfield-Mask: 0x01) */
 
 // SOFCFG
-#define LINK_REG_SOFCFG_TRNENSEL_Pos       (8UL)        /* TRNENSEL (Bit 8) */
-#define LINK_REG_SOFCFG_TRNENSEL_Msk       (0x100UL)    /* TRNENSEL (Bitfield-Mask: 0x01) */
-#define LINK_REG_SOFCFG_BRDYM_Pos          (6UL)        /* BRDYM (Bit 6) */
-#define LINK_REG_SOFCFG_BRDYM_Msk          (0x40UL)     /* BRDYM (Bitfield-Mask: 0x01) */
-#define LINK_REG_SOFCFG_INTL_Pos           (5UL)        /* INTL (Bit 5) */
-#define LINK_REG_SOFCFG_INTL_Msk           (0x20UL)     /* INTL (Bitfield-Mask: 0x01) */
-#define LINK_REG_SOFCFG_EDGESTS_Pos        (4UL)        /* EDGESTS (Bit 4) */
-#define LINK_REG_SOFCFG_EDGESTS_Msk        (0x10UL)     /* EDGESTS (Bitfield-Mask: 0x01) */
+#define RUSB2_SOFCFG_TRNENSEL_Pos       (8UL)        /* TRNENSEL (Bit 8) */
+#define RUSB2_SOFCFG_TRNENSEL_Msk       (0x100UL)    /* TRNENSEL (Bitfield-Mask: 0x01) */
+#define RUSB2_SOFCFG_BRDYM_Pos          (6UL)        /* BRDYM (Bit 6) */
+#define RUSB2_SOFCFG_BRDYM_Msk          (0x40UL)     /* BRDYM (Bitfield-Mask: 0x01) */
+#define RUSB2_SOFCFG_INTL_Pos           (5UL)        /* INTL (Bit 5) */
+#define RUSB2_SOFCFG_INTL_Msk           (0x20UL)     /* INTL (Bitfield-Mask: 0x01) */
+#define RUSB2_SOFCFG_EDGESTS_Pos        (4UL)        /* EDGESTS (Bit 4) */
+#define RUSB2_SOFCFG_EDGESTS_Msk        (0x10UL)     /* EDGESTS (Bitfield-Mask: 0x01) */
 
 // PHYSET
-#define LINK_REG_PHYSET_HSEB_Pos           (15UL)       /* HSEB (Bit 15) */
-#define LINK_REG_PHYSET_HSEB_Msk           (0x8000UL)   /* HSEB (Bitfield-Mask: 0x01) */
-#define LINK_REG_PHYSET_REPSTART_Pos       (11UL)       /* REPSTART (Bit 11) */
-#define LINK_REG_PHYSET_REPSTART_Msk       (0x800UL)    /* REPSTART (Bitfield-Mask: 0x01) */
-#define LINK_REG_PHYSET_REPSEL_Pos         (8UL)        /* REPSEL (Bit 8) */
-#define LINK_REG_PHYSET_REPSEL_Msk         (0x300UL)    /* REPSEL (Bitfield-Mask: 0x03) */
-#define LINK_REG_PHYSET_CLKSEL_Pos         (4UL)        /* CLKSEL (Bit 4) */
-#define LINK_REG_PHYSET_CLKSEL_Msk         (0x30UL)     /* CLKSEL (Bitfield-Mask: 0x03) */
-#define LINK_REG_PHYSET_CDPEN_Pos          (3UL)        /* CDPEN (Bit 3) */
-#define LINK_REG_PHYSET_CDPEN_Msk          (0x8UL)      /* CDPEN (Bitfield-Mask: 0x01) */
-#define LINK_REG_PHYSET_PLLRESET_Pos       (1UL)        /* PLLRESET (Bit 1) */
-#define LINK_REG_PHYSET_PLLRESET_Msk       (0x2UL)      /* PLLRESET (Bitfield-Mask: 0x01) */
-#define LINK_REG_PHYSET_DIRPD_Pos          (0UL)        /* DIRPD (Bit 0) */
-#define LINK_REG_PHYSET_DIRPD_Msk          (0x1UL)      /* DIRPD (Bitfield-Mask: 0x01) */
+#define RUSB2_PHYSET_HSEB_Pos           (15UL)       /* HSEB (Bit 15) */
+#define RUSB2_PHYSET_HSEB_Msk           (0x8000UL)   /* HSEB (Bitfield-Mask: 0x01) */
+#define RUSB2_PHYSET_REPSTART_Pos       (11UL)       /* REPSTART (Bit 11) */
+#define RUSB2_PHYSET_REPSTART_Msk       (0x800UL)    /* REPSTART (Bitfield-Mask: 0x01) */
+#define RUSB2_PHYSET_REPSEL_Pos         (8UL)        /* REPSEL (Bit 8) */
+#define RUSB2_PHYSET_REPSEL_Msk         (0x300UL)    /* REPSEL (Bitfield-Mask: 0x03) */
+#define RUSB2_PHYSET_CLKSEL_Pos         (4UL)        /* CLKSEL (Bit 4) */
+#define RUSB2_PHYSET_CLKSEL_Msk         (0x30UL)     /* CLKSEL (Bitfield-Mask: 0x03) */
+#define RUSB2_PHYSET_CDPEN_Pos          (3UL)        /* CDPEN (Bit 3) */
+#define RUSB2_PHYSET_CDPEN_Msk          (0x8UL)      /* CDPEN (Bitfield-Mask: 0x01) */
+#define RUSB2_PHYSET_PLLRESET_Pos       (1UL)        /* PLLRESET (Bit 1) */
+#define RUSB2_PHYSET_PLLRESET_Msk       (0x2UL)      /* PLLRESET (Bitfield-Mask: 0x01) */
+#define RUSB2_PHYSET_DIRPD_Pos          (0UL)        /* DIRPD (Bit 0) */
+#define RUSB2_PHYSET_DIRPD_Msk          (0x1UL)      /* DIRPD (Bitfield-Mask: 0x01) */
 
 // INTSTS0
-#define LINK_REG_INTSTS0_VBINT_Pos         (15UL)       /* VBINT (Bit 15) */
-#define LINK_REG_INTSTS0_VBINT_Msk         (0x8000UL)   /* VBINT (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS0_RESM_Pos          (14UL)       /* RESM (Bit 14) */
-#define LINK_REG_INTSTS0_RESM_Msk          (0x4000UL)   /* RESM (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS0_SOFR_Pos          (13UL)       /* SOFR (Bit 13) */
-#define LINK_REG_INTSTS0_SOFR_Msk          (0x2000UL)   /* SOFR (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS0_DVST_Pos          (12UL)       /* DVST (Bit 12) */
-#define LINK_REG_INTSTS0_DVST_Msk          (0x1000UL)   /* DVST (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS0_CTRT_Pos          (11UL)       /* CTRT (Bit 11) */
-#define LINK_REG_INTSTS0_CTRT_Msk          (0x800UL)    /* CTRT (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS0_BEMP_Pos          (10UL)       /* BEMP (Bit 10) */
-#define LINK_REG_INTSTS0_BEMP_Msk          (0x400UL)    /* BEMP (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS0_NRDY_Pos          (9UL)        /* NRDY (Bit 9) */
-#define LINK_REG_INTSTS0_NRDY_Msk          (0x200UL)    /* NRDY (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS0_BRDY_Pos          (8UL)        /* BRDY (Bit 8) */
-#define LINK_REG_INTSTS0_BRDY_Msk          (0x100UL)    /* BRDY (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS0_VBSTS_Pos         (7UL)        /* VBSTS (Bit 7) */
-#define LINK_REG_INTSTS0_VBSTS_Msk         (0x80UL)     /* VBSTS (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS0_DVSQ_Pos          (4UL)        /* DVSQ (Bit 4) */
-#define LINK_REG_INTSTS0_DVSQ_Msk          (0x70UL)     /* DVSQ (Bitfield-Mask: 0x07) */
-#define LINK_REG_INTSTS0_VALID_Pos         (3UL)        /* VALID (Bit 3) */
-#define LINK_REG_INTSTS0_VALID_Msk         (0x8UL)      /* VALID (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS0_CTSQ_Pos          (0UL)        /* CTSQ (Bit 0) */
-#define LINK_REG_INTSTS0_CTSQ_Msk          (0x7UL)      /* CTSQ (Bitfield-Mask: 0x07) */
+#define RUSB2_INTSTS0_VBINT_Pos         (15UL)       /* VBINT (Bit 15) */
+#define RUSB2_INTSTS0_VBINT_Msk         (0x8000UL)   /* VBINT (Bitfield-Mask: 0x01) */
+#define RUSB2_INTSTS0_RESM_Pos          (14UL)       /* RESM (Bit 14) */
+#define RUSB2_INTSTS0_RESM_Msk          (0x4000UL)   /* RESM (Bitfield-Mask: 0x01) */
+#define RUSB2_INTSTS0_SOFR_Pos          (13UL)       /* SOFR (Bit 13) */
+#define RUSB2_INTSTS0_SOFR_Msk          (0x2000UL)   /* SOFR (Bitfield-Mask: 0x01) */
+#define RUSB2_INTSTS0_DVST_Pos          (12UL)       /* DVST (Bit 12) */
+#define RUSB2_INTSTS0_DVST_Msk          (0x1000UL)   /* DVST (Bitfield-Mask: 0x01) */
+#define RUSB2_INTSTS0_CTRT_Pos          (11UL)       /* CTRT (Bit 11) */
+#define RUSB2_INTSTS0_CTRT_Msk          (0x800UL)    /* CTRT (Bitfield-Mask: 0x01) */
+#define RUSB2_INTSTS0_BEMP_Pos          (10UL)       /* BEMP (Bit 10) */
+#define RUSB2_INTSTS0_BEMP_Msk          (0x400UL)    /* BEMP (Bitfield-Mask: 0x01) */
+#define RUSB2_INTSTS0_NRDY_Pos          (9UL)        /* NRDY (Bit 9) */
+#define RUSB2_INTSTS0_NRDY_Msk          (0x200UL)    /* NRDY (Bitfield-Mask: 0x01) */
+#define RUSB2_INTSTS0_BRDY_Pos          (8UL)        /* BRDY (Bit 8) */
+#define RUSB2_INTSTS0_BRDY_Msk          (0x100UL)    /* BRDY (Bitfield-Mask: 0x01) */
+#define RUSB2_INTSTS0_VBSTS_Pos         (7UL)        /* VBSTS (Bit 7) */
+#define RUSB2_INTSTS0_VBSTS_Msk         (0x80UL)     /* VBSTS (Bitfield-Mask: 0x01) */
+#define RUSB2_INTSTS0_DVSQ_Pos          (4UL)        /* DVSQ (Bit 4) */
+#define RUSB2_INTSTS0_DVSQ_Msk          (0x70UL)     /* DVSQ (Bitfield-Mask: 0x07) */
+#define RUSB2_INTSTS0_VALID_Pos         (3UL)        /* VALID (Bit 3) */
+#define RUSB2_INTSTS0_VALID_Msk         (0x8UL)      /* VALID (Bitfield-Mask: 0x01) */
+#define RUSB2_INTSTS0_CTSQ_Pos          (0UL)        /* CTSQ (Bit 0) */
+#define RUSB2_INTSTS0_CTSQ_Msk          (0x7UL)      /* CTSQ (Bitfield-Mask: 0x07) */
 
 // INTSTS1
-#define LINK_REG_INTSTS1_OVRCR_Pos         (15UL)       /* OVRCR (Bit 15) */
-#define LINK_REG_INTSTS1_OVRCR_Msk         (0x8000UL)   /* OVRCR (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS1_BCHG_Pos          (14UL)       /* BCHG (Bit 14) */
-#define LINK_REG_INTSTS1_BCHG_Msk          (0x4000UL)   /* BCHG (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS1_DTCH_Pos          (12UL)       /* DTCH (Bit 12) */
-#define LINK_REG_INTSTS1_DTCH_Msk          (0x1000UL)   /* DTCH (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS1_ATTCH_Pos         (11UL)       /* ATTCH (Bit 11) */
-#define LINK_REG_INTSTS1_ATTCH_Msk         (0x800UL)    /* ATTCH (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS1_L1RSMEND_Pos      (9UL)        /* L1RSMEND (Bit 9) */
-#define LINK_REG_INTSTS1_L1RSMEND_Msk      (0x200UL)    /* L1RSMEND (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS1_LPMEND_Pos        (8UL)        /* LPMEND (Bit 8) */
-#define LINK_REG_INTSTS1_LPMEND_Msk        (0x100UL)    /* LPMEND (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS1_EOFERR_Pos        (6UL)        /* EOFERR (Bit 6) */
-#define LINK_REG_INTSTS1_EOFERR_Msk        (0x40UL)     /* EOFERR (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS1_SIGN_Pos          (5UL)        /* SIGN (Bit 5) */
-#define LINK_REG_INTSTS1_SIGN_Msk          (0x20UL)     /* SIGN (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS1_SACK_Pos          (4UL)        /* SACK (Bit 4) */
-#define LINK_REG_INTSTS1_SACK_Msk          (0x10UL)     /* SACK (Bitfield-Mask: 0x01) */
-#define LINK_REG_INTSTS1_PDDETINT0_Pos     (0UL)        /* PDDETINT0 (Bit 0) */
-#define LINK_REG_INTSTS1_PDDETINT0_Msk     (0x1UL)      /* PDDETINT0 (Bitfield-Mask: 0x01) */
+#define RUSB2_INTSTS1_OVRCR_Pos         (15UL)       /* OVRCR (Bit 15) */
+#define RUSB2_INTSTS1_OVRCR_Msk         (0x8000UL)   /* OVRCR (Bitfield-Mask: 0x01) */
+#define RUSB2_INTSTS1_BCHG_Pos          (14UL)       /* BCHG (Bit 14) */
+#define RUSB2_INTSTS1_BCHG_Msk          (0x4000UL)   /* BCHG (Bitfield-Mask: 0x01) */
+#define RUSB2_INTSTS1_DTCH_Pos          (12UL)       /* DTCH (Bit 12) */
+#define RUSB2_INTSTS1_DTCH_Msk          (0x1000UL)   /* DTCH (Bitfield-Mask: 0x01) */
+#define RUSB2_INTSTS1_ATTCH_Pos         (11UL)       /* ATTCH (Bit 11) */
+#define RUSB2_INTSTS1_ATTCH_Msk         (0x800UL)    /* ATTCH (Bitfield-Mask: 0x01) */
+#define RUSB2_INTSTS1_L1RSMEND_Pos      (9UL)        /* L1RSMEND (Bit 9) */
+#define RUSB2_INTSTS1_L1RSMEND_Msk      (0x200UL)    /* L1RSMEND (Bitfield-Mask: 0x01) */
+#define RUSB2_INTSTS1_LPMEND_Pos        (8UL)        /* LPMEND (Bit 8) */
+#define RUSB2_INTSTS1_LPMEND_Msk        (0x100UL)    /* LPMEND (Bitfield-Mask: 0x01) */
+#define RUSB2_INTSTS1_EOFERR_Pos        (6UL)        /* EOFERR (Bit 6) */
+#define RUSB2_INTSTS1_EOFERR_Msk        (0x40UL)     /* EOFERR (Bitfield-Mask: 0x01) */
+#define RUSB2_INTSTS1_SIGN_Pos          (5UL)        /* SIGN (Bit 5) */
+#define RUSB2_INTSTS1_SIGN_Msk          (0x20UL)     /* SIGN (Bitfield-Mask: 0x01) */
+#define RUSB2_INTSTS1_SACK_Pos          (4UL)        /* SACK (Bit 4) */
+#define RUSB2_INTSTS1_SACK_Msk          (0x10UL)     /* SACK (Bitfield-Mask: 0x01) */
+#define RUSB2_INTSTS1_PDDETINT0_Pos     (0UL)        /* PDDETINT0 (Bit 0) */
+#define RUSB2_INTSTS1_PDDETINT0_Msk     (0x1UL)      /* PDDETINT0 (Bitfield-Mask: 0x01) */
 
 // BRDYSTS
-#define LINK_REG_BRDYSTS_PIPEBRDY_Pos      (0UL)        /* PIPEBRDY (Bit 0) */
-#define LINK_REG_BRDYSTS_PIPEBRDY_Msk      (0x1UL)      /* PIPEBRDY (Bitfield-Mask: 0x01) */
+#define RUSB2_BRDYSTS_PIPEBRDY_Pos      (0UL)        /* PIPEBRDY (Bit 0) */
+#define RUSB2_BRDYSTS_PIPEBRDY_Msk      (0x1UL)      /* PIPEBRDY (Bitfield-Mask: 0x01) */
 
 // NRDYSTS
-#define LINK_REG_NRDYSTS_PIPENRDY_Pos      (0UL)        /* PIPENRDY (Bit 0) */
-#define LINK_REG_NRDYSTS_PIPENRDY_Msk      (0x1UL)      /* PIPENRDY (Bitfield-Mask: 0x01) */
+#define RUSB2_NRDYSTS_PIPENRDY_Pos      (0UL)        /* PIPENRDY (Bit 0) */
+#define RUSB2_NRDYSTS_PIPENRDY_Msk      (0x1UL)      /* PIPENRDY (Bitfield-Mask: 0x01) */
 
 // BEMPSTS
-#define LINK_REG_BEMPSTS_PIPEBEMP_Pos      (0UL)        /* PIPEBEMP (Bit 0) */
-#define LINK_REG_BEMPSTS_PIPEBEMP_Msk      (0x1UL)      /* PIPEBEMP (Bitfield-Mask: 0x01) */
+#define RUSB2_BEMPSTS_PIPEBEMP_Pos      (0UL)        /* PIPEBEMP (Bit 0) */
+#define RUSB2_BEMPSTS_PIPEBEMP_Msk      (0x1UL)      /* PIPEBEMP (Bitfield-Mask: 0x01) */
 
 // FRMNUM
-#define LINK_REG_FRMNUM_OVRN_Pos           (15UL)       /* OVRN (Bit 15) */
-#define LINK_REG_FRMNUM_OVRN_Msk           (0x8000UL)   /* OVRN (Bitfield-Mask: 0x01) */
-#define LINK_REG_FRMNUM_CRCE_Pos           (14UL)       /* CRCE (Bit 14) */
-#define LINK_REG_FRMNUM_CRCE_Msk           (0x4000UL)   /* CRCE (Bitfield-Mask: 0x01) */
-#define LINK_REG_FRMNUM_FRNM_Pos           (0UL)        /* FRNM (Bit 0) */
-#define LINK_REG_FRMNUM_FRNM_Msk           (0x7ffUL)    /* FRNM (Bitfield-Mask: 0x7ff) */
+#define RUSB2_FRMNUM_OVRN_Pos           (15UL)       /* OVRN (Bit 15) */
+#define RUSB2_FRMNUM_OVRN_Msk           (0x8000UL)   /* OVRN (Bitfield-Mask: 0x01) */
+#define RUSB2_FRMNUM_CRCE_Pos           (14UL)       /* CRCE (Bit 14) */
+#define RUSB2_FRMNUM_CRCE_Msk           (0x4000UL)   /* CRCE (Bitfield-Mask: 0x01) */
+#define RUSB2_FRMNUM_FRNM_Pos           (0UL)        /* FRNM (Bit 0) */
+#define RUSB2_FRMNUM_FRNM_Msk           (0x7ffUL)    /* FRNM (Bitfield-Mask: 0x7ff) */
 
 // UFRMNUM
-#define LINK_REG_UFRMNUM_DVCHG_Pos         (15UL)       /* DVCHG (Bit 15) */
-#define LINK_REG_UFRMNUM_DVCHG_Msk         (0x8000UL)   /* DVCHG (Bitfield-Mask: 0x01) */
-#define LINK_REG_UFRMNUM_UFRNM_Pos         (0UL)        /* UFRNM (Bit 0) */
-#define LINK_REG_UFRMNUM_UFRNM_Msk         (0x7UL)      /* UFRNM (Bitfield-Mask: 0x07) */
+#define RUSB2_UFRMNUM_DVCHG_Pos         (15UL)       /* DVCHG (Bit 15) */
+#define RUSB2_UFRMNUM_DVCHG_Msk         (0x8000UL)   /* DVCHG (Bitfield-Mask: 0x01) */
+#define RUSB2_UFRMNUM_UFRNM_Pos         (0UL)        /* UFRNM (Bit 0) */
+#define RUSB2_UFRMNUM_UFRNM_Msk         (0x7UL)      /* UFRNM (Bitfield-Mask: 0x07) */
 
 // USBADDR
-#define LINK_REG_USBADDR_STSRECOV0_Pos     (8UL)        /* STSRECOV0 (Bit 8) */
-#define LINK_REG_USBADDR_STSRECOV0_Msk     (0x700UL)    /* STSRECOV0 (Bitfield-Mask: 0x07) */
-#define LINK_REG_USBADDR_USBADDR_Pos       (0UL)        /* USBADDR (Bit 0) */
-#define LINK_REG_USBADDR_USBADDR_Msk       (0x7fUL)     /* USBADDR (Bitfield-Mask: 0x7f) */
+#define RUSB2_USBADDR_STSRECOV0_Pos     (8UL)        /* STSRECOV0 (Bit 8) */
+#define RUSB2_USBADDR_STSRECOV0_Msk     (0x700UL)    /* STSRECOV0 (Bitfield-Mask: 0x07) */
+#define RUSB2_USBADDR_USBADDR_Pos       (0UL)        /* USBADDR (Bit 0) */
+#define RUSB2_USBADDR_USBADDR_Msk       (0x7fUL)     /* USBADDR (Bitfield-Mask: 0x7f) */
 
 // USBREQ
-#define LINK_REG_USBREQ_BREQUEST_Pos       (8UL)        /* BREQUEST (Bit 8) */
-#define LINK_REG_USBREQ_BREQUEST_Msk       (0xff00UL)   /* BREQUEST (Bitfield-Mask: 0xff) */
-#define LINK_REG_USBREQ_BMREQUESTTYPE_Pos  (0UL)        /* BMREQUESTTYPE (Bit 0) */
-#define LINK_REG_USBREQ_BMREQUESTTYPE_Msk  (0xffUL)     /* BMREQUESTTYPE (Bitfield-Mask: 0xff) */
+#define RUSB2_USBREQ_BREQUEST_Pos       (8UL)        /* BREQUEST (Bit 8) */
+#define RUSB2_USBREQ_BREQUEST_Msk       (0xff00UL)   /* BREQUEST (Bitfield-Mask: 0xff) */
+#define RUSB2_USBREQ_BMREQUESTTYPE_Pos  (0UL)        /* BMREQUESTTYPE (Bit 0) */
+#define RUSB2_USBREQ_BMREQUESTTYPE_Msk  (0xffUL)     /* BMREQUESTTYPE (Bitfield-Mask: 0xff) */
 
 // USBVAL
-#define LINK_REG_USBVAL_WVALUE_Pos         (0UL)        /* WVALUE (Bit 0) */
-#define LINK_REG_USBVAL_WVALUE_Msk         (0xffffUL)   /* WVALUE (Bitfield-Mask: 0xffff) */
+#define RUSB2_USBVAL_WVALUE_Pos         (0UL)        /* WVALUE (Bit 0) */
+#define RUSB2_USBVAL_WVALUE_Msk         (0xffffUL)   /* WVALUE (Bitfield-Mask: 0xffff) */
 
 // USBINDX
-#define LINK_REG_USBINDX_WINDEX_Pos        (0UL)        /* WINDEX (Bit 0) */
-#define LINK_REG_USBINDX_WINDEX_Msk        (0xffffUL)   /* WINDEX (Bitfield-Mask: 0xffff) */
+#define RUSB2_USBINDX_WINDEX_Pos        (0UL)        /* WINDEX (Bit 0) */
+#define RUSB2_USBINDX_WINDEX_Msk        (0xffffUL)   /* WINDEX (Bitfield-Mask: 0xffff) */
 
 // USBLENG
-#define LINK_REG_USBLENG_WLENGTH_Pos       (0UL)        /* WLENGTH (Bit 0) */
-#define LINK_REG_USBLENG_WLENGTH_Msk       (0xffffUL)   /* WLENGTH (Bitfield-Mask: 0xffff) */
+#define RUSB2_USBLENG_WLENGTH_Pos       (0UL)        /* WLENGTH (Bit 0) */
+#define RUSB2_USBLENG_WLENGTH_Msk       (0xffffUL)   /* WLENGTH (Bitfield-Mask: 0xffff) */
 
 // DCPCFG
-#define LINK_REG_DCPCFG_CNTMD_Pos          (8UL)        /* CNTMD (Bit 8) */
-#define LINK_REG_DCPCFG_CNTMD_Msk          (0x100UL)    /* CNTMD (Bitfield-Mask: 0x01) */
-#define LINK_REG_DCPCFG_SHTNAK_Pos         (7UL)        /* SHTNAK (Bit 7) */
-#define LINK_REG_DCPCFG_SHTNAK_Msk         (0x80UL)     /* SHTNAK (Bitfield-Mask: 0x01) */
-#define LINK_REG_DCPCFG_DIR_Pos            (4UL)        /* DIR (Bit 4) */
-#define LINK_REG_DCPCFG_DIR_Msk            (0x10UL)     /* DIR (Bitfield-Mask: 0x01) */
+#define RUSB2_DCPCFG_CNTMD_Pos          (8UL)        /* CNTMD (Bit 8) */
+#define RUSB2_DCPCFG_CNTMD_Msk          (0x100UL)    /* CNTMD (Bitfield-Mask: 0x01) */
+#define RUSB2_DCPCFG_SHTNAK_Pos         (7UL)        /* SHTNAK (Bit 7) */
+#define RUSB2_DCPCFG_SHTNAK_Msk         (0x80UL)     /* SHTNAK (Bitfield-Mask: 0x01) */
+#define RUSB2_DCPCFG_DIR_Pos            (4UL)        /* DIR (Bit 4) */
+#define RUSB2_DCPCFG_DIR_Msk            (0x10UL)     /* DIR (Bitfield-Mask: 0x01) */
 
 // DCPMAXP
-#define LINK_REG_DCPMAXP_DEVSEL_Pos        (12UL)       /* DEVSEL (Bit 12) */
-#define LINK_REG_DCPMAXP_DEVSEL_Msk        (0xf000UL)   /* DEVSEL (Bitfield-Mask: 0x0f) */
-#define LINK_REG_DCPMAXP_MXPS_Pos          (0UL)        /* MXPS (Bit 0) */
-#define LINK_REG_DCPMAXP_MXPS_Msk          (0x7fUL)     /* MXPS (Bitfield-Mask: 0x7f) */
+#define RUSB2_DCPMAXP_DEVSEL_Pos        (12UL)       /* DEVSEL (Bit 12) */
+#define RUSB2_DCPMAXP_DEVSEL_Msk        (0xf000UL)   /* DEVSEL (Bitfield-Mask: 0x0f) */
+#define RUSB2_DCPMAXP_MXPS_Pos          (0UL)        /* MXPS (Bit 0) */
+#define RUSB2_DCPMAXP_MXPS_Msk          (0x7fUL)     /* MXPS (Bitfield-Mask: 0x7f) */
 
 // DCPCTR
-#define LINK_REG_DCPCTR_BSTS_Pos           (15UL)       /* BSTS (Bit 15) */
-#define LINK_REG_DCPCTR_BSTS_Msk           (0x8000UL)   /* BSTS (Bitfield-Mask: 0x01) */
-#define LINK_REG_DCPCTR_SUREQ_Pos          (14UL)       /* SUREQ (Bit 14) */
-#define LINK_REG_DCPCTR_SUREQ_Msk          (0x4000UL)   /* SUREQ (Bitfield-Mask: 0x01) */
-#define LINK_REG_DCPCTR_SUREQCLR_Pos       (11UL)       /* SUREQCLR (Bit 11) */
-#define LINK_REG_DCPCTR_SUREQCLR_Msk       (0x800UL)    /* SUREQCLR (Bitfield-Mask: 0x01) */
-#define LINK_REG_DCPCTR_SQCLR_Pos          (8UL)        /* SQCLR (Bit 8) */
-#define LINK_REG_DCPCTR_SQCLR_Msk          (0x100UL)    /* SQCLR (Bitfield-Mask: 0x01) */
-#define LINK_REG_DCPCTR_SQSET_Pos          (7UL)        /* SQSET (Bit 7) */
-#define LINK_REG_DCPCTR_SQSET_Msk          (0x80UL)     /* SQSET (Bitfield-Mask: 0x01) */
-#define LINK_REG_DCPCTR_SQMON_Pos          (6UL)        /* SQMON (Bit 6) */
-#define LINK_REG_DCPCTR_SQMON_Msk          (0x40UL)     /* SQMON (Bitfield-Mask: 0x01) */
-#define LINK_REG_DCPCTR_PBUSY_Pos          (5UL)        /* PBUSY (Bit 5) */
-#define LINK_REG_DCPCTR_PBUSY_Msk          (0x20UL)     /* PBUSY (Bitfield-Mask: 0x01) */
-#define LINK_REG_DCPCTR_CCPL_Pos           (2UL)        /* CCPL (Bit 2) */
-#define LINK_REG_DCPCTR_CCPL_Msk           (0x4UL)      /* CCPL (Bitfield-Mask: 0x01) */
-#define LINK_REG_DCPCTR_PID_Pos            (0UL)        /* PID (Bit 0) */
-#define LINK_REG_DCPCTR_PID_Msk            (0x3UL)      /* PID (Bitfield-Mask: 0x03) */
+#define RUSB2_DCPCTR_BSTS_Pos           (15UL)       /* BSTS (Bit 15) */
+#define RUSB2_DCPCTR_BSTS_Msk           (0x8000UL)   /* BSTS (Bitfield-Mask: 0x01) */
+#define RUSB2_DCPCTR_SUREQ_Pos          (14UL)       /* SUREQ (Bit 14) */
+#define RUSB2_DCPCTR_SUREQ_Msk          (0x4000UL)   /* SUREQ (Bitfield-Mask: 0x01) */
+#define RUSB2_DCPCTR_SUREQCLR_Pos       (11UL)       /* SUREQCLR (Bit 11) */
+#define RUSB2_DCPCTR_SUREQCLR_Msk       (0x800UL)    /* SUREQCLR (Bitfield-Mask: 0x01) */
+#define RUSB2_DCPCTR_SQCLR_Pos          (8UL)        /* SQCLR (Bit 8) */
+#define RUSB2_DCPCTR_SQCLR_Msk          (0x100UL)    /* SQCLR (Bitfield-Mask: 0x01) */
+#define RUSB2_DCPCTR_SQSET_Pos          (7UL)        /* SQSET (Bit 7) */
+#define RUSB2_DCPCTR_SQSET_Msk          (0x80UL)     /* SQSET (Bitfield-Mask: 0x01) */
+#define RUSB2_DCPCTR_SQMON_Pos          (6UL)        /* SQMON (Bit 6) */
+#define RUSB2_DCPCTR_SQMON_Msk          (0x40UL)     /* SQMON (Bitfield-Mask: 0x01) */
+#define RUSB2_DCPCTR_PBUSY_Pos          (5UL)        /* PBUSY (Bit 5) */
+#define RUSB2_DCPCTR_PBUSY_Msk          (0x20UL)     /* PBUSY (Bitfield-Mask: 0x01) */
+#define RUSB2_DCPCTR_CCPL_Pos           (2UL)        /* CCPL (Bit 2) */
+#define RUSB2_DCPCTR_CCPL_Msk           (0x4UL)      /* CCPL (Bitfield-Mask: 0x01) */
+#define RUSB2_DCPCTR_PID_Pos            (0UL)        /* PID (Bit 0) */
+#define RUSB2_DCPCTR_PID_Msk            (0x3UL)      /* PID (Bitfield-Mask: 0x03) */
 
 // PIPESEL
-#define LINK_REG_PIPESEL_PIPESEL_Pos       (0UL)        /* PIPESEL (Bit 0) */
-#define LINK_REG_PIPESEL_PIPESEL_Msk       (0xfUL)      /* PIPESEL (Bitfield-Mask: 0x0f) */
+#define RUSB2_PIPESEL_PIPESEL_Pos       (0UL)        /* PIPESEL (Bit 0) */
+#define RUSB2_PIPESEL_PIPESEL_Msk       (0xfUL)      /* PIPESEL (Bitfield-Mask: 0x0f) */
 
 // PIPECFG
-#define LINK_REG_PIPECFG_TYPE_Pos          (14UL)       /* TYPE (Bit 14) */
-#define LINK_REG_PIPECFG_TYPE_Msk          (0xc000UL)   /* TYPE (Bitfield-Mask: 0x03) */
-#define LINK_REG_PIPECFG_BFRE_Pos          (10UL)       /* BFRE (Bit 10) */
-#define LINK_REG_PIPECFG_BFRE_Msk          (0x400UL)    /* BFRE (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPECFG_DBLB_Pos          (9UL)        /* DBLB (Bit 9) */
-#define LINK_REG_PIPECFG_DBLB_Msk          (0x200UL)    /* DBLB (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPECFG_SHTNAK_Pos        (7UL)        /* SHTNAK (Bit 7) */
-#define LINK_REG_PIPECFG_SHTNAK_Msk        (0x80UL)     /* SHTNAK (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPECFG_DIR_Pos           (4UL)        /* DIR (Bit 4) */
-#define LINK_REG_PIPECFG_DIR_Msk           (0x10UL)     /* DIR (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPECFG_EPNUM_Pos         (0UL)        /* EPNUM (Bit 0) */
-#define LINK_REG_PIPECFG_EPNUM_Msk         (0xfUL)      /* EPNUM (Bitfield-Mask: 0x0f) */
+#define RUSB2_PIPECFG_TYPE_Pos          (14UL)       /* TYPE (Bit 14) */
+#define RUSB2_PIPECFG_TYPE_Msk          (0xc000UL)   /* TYPE (Bitfield-Mask: 0x03) */
+#define RUSB2_PIPECFG_BFRE_Pos          (10UL)       /* BFRE (Bit 10) */
+#define RUSB2_PIPECFG_BFRE_Msk          (0x400UL)    /* BFRE (Bitfield-Mask: 0x01) */
+#define RUSB2_PIPECFG_DBLB_Pos          (9UL)        /* DBLB (Bit 9) */
+#define RUSB2_PIPECFG_DBLB_Msk          (0x200UL)    /* DBLB (Bitfield-Mask: 0x01) */
+#define RUSB2_PIPECFG_SHTNAK_Pos        (7UL)        /* SHTNAK (Bit 7) */
+#define RUSB2_PIPECFG_SHTNAK_Msk        (0x80UL)     /* SHTNAK (Bitfield-Mask: 0x01) */
+#define RUSB2_PIPECFG_DIR_Pos           (4UL)        /* DIR (Bit 4) */
+#define RUSB2_PIPECFG_DIR_Msk           (0x10UL)     /* DIR (Bitfield-Mask: 0x01) */
+#define RUSB2_PIPECFG_EPNUM_Pos         (0UL)        /* EPNUM (Bit 0) */
+#define RUSB2_PIPECFG_EPNUM_Msk         (0xfUL)      /* EPNUM (Bitfield-Mask: 0x0f) */
 
 // PIPEMAXP
-#define LINK_REG_PIPEMAXP_DEVSEL_Pos       (12UL)       /* DEVSEL (Bit 12) */
-#define LINK_REG_PIPEMAXP_DEVSEL_Msk       (0xf000UL)   /* DEVSEL (Bitfield-Mask: 0x0f) */
-#define LINK_REG_PIPEMAXP_MXPS_Pos         (0UL)        /* MXPS (Bit 0) */
-#define LINK_REG_PIPEMAXP_MXPS_Msk         (0x1ffUL)    /* MXPS (Bitfield-Mask: 0x1ff) */
+#define RUSB2_PIPEMAXP_DEVSEL_Pos       (12UL)       /* DEVSEL (Bit 12) */
+#define RUSB2_PIPEMAXP_DEVSEL_Msk       (0xf000UL)   /* DEVSEL (Bitfield-Mask: 0x0f) */
+#define RUSB2_PIPEMAXP_MXPS_Pos         (0UL)        /* MXPS (Bit 0) */
+#define RUSB2_PIPEMAXP_MXPS_Msk         (0x1ffUL)    /* MXPS (Bitfield-Mask: 0x1ff) */
 
 // PIPEPERI
-#define LINK_REG_PIPEPERI_IFIS_Pos         (12UL)       /* IFIS (Bit 12) */
-#define LINK_REG_PIPEPERI_IFIS_Msk         (0x1000UL)   /* IFIS (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPEPERI_IITV_Pos         (0UL)        /* IITV (Bit 0) */
-#define LINK_REG_PIPEPERI_IITV_Msk         (0x7UL)      /* IITV (Bitfield-Mask: 0x07) */
+#define RUSB2_PIPEPERI_IFIS_Pos         (12UL)       /* IFIS (Bit 12) */
+#define RUSB2_PIPEPERI_IFIS_Msk         (0x1000UL)   /* IFIS (Bitfield-Mask: 0x01) */
+#define RUSB2_PIPEPERI_IITV_Pos         (0UL)        /* IITV (Bit 0) */
+#define RUSB2_PIPEPERI_IITV_Msk         (0x7UL)      /* IITV (Bitfield-Mask: 0x07) */
 
 // PIPE_CTR
-#define LINK_REG_PIPE_CTR_BSTS_Pos         (15UL)       /* BSTS (Bit 15) */
-#define LINK_REG_PIPE_CTR_BSTS_Msk         (0x8000UL)   /* BSTS (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_CTR_INBUFM_Pos       (14UL)       /* INBUFM (Bit 14) */
-#define LINK_REG_PIPE_CTR_INBUFM_Msk       (0x4000UL)   /* INBUFM (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_CTR_CSCLR_Pos        (13UL)       /* CSCLR (Bit 13) */
-#define LINK_REG_PIPE_CTR_CSCLR_Msk        (0x2000UL)   /* CSCLR (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_CTR_CSSTS_Pos        (12UL)       /* CSSTS (Bit 12) */
-#define LINK_REG_PIPE_CTR_CSSTS_Msk        (0x1000UL)   /* CSSTS (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_CTR_ATREPM_Pos       (10UL)       /* ATREPM (Bit 10) */
-#define LINK_REG_PIPE_CTR_ATREPM_Msk       (0x400UL)    /* ATREPM (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_CTR_ACLRM_Pos        (9UL)        /* ACLRM (Bit 9) */
-#define LINK_REG_PIPE_CTR_ACLRM_Msk        (0x200UL)    /* ACLRM (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_CTR_SQCLR_Pos        (8UL)        /* SQCLR (Bit 8) */
-#define LINK_REG_PIPE_CTR_SQCLR_Msk        (0x100UL)    /* SQCLR (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_CTR_SQSET_Pos        (7UL)        /* SQSET (Bit 7) */
-#define LINK_REG_PIPE_CTR_SQSET_Msk        (0x80UL)     /* SQSET (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_CTR_SQMON_Pos        (6UL)        /* SQMON (Bit 6) */
-#define LINK_REG_PIPE_CTR_SQMON_Msk        (0x40UL)     /* SQMON (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_CTR_PBUSY_Pos        (5UL)        /* PBUSY (Bit 5) */
-#define LINK_REG_PIPE_CTR_PBUSY_Msk        (0x20UL)     /* PBUSY (Bitfield-Mask: 0x01) */
-#define LINK_REG_PIPE_CTR_PID_Pos          (0UL)        /* PID (Bit 0) */
-#define LINK_REG_PIPE_CTR_PID_Msk          (0x3UL)      /* PID (Bitfield-Mask: 0x03) */
+#define RUSB2_PIPE_CTR_BSTS_Pos         (15UL)       /* BSTS (Bit 15) */
+#define RUSB2_PIPE_CTR_BSTS_Msk         (0x8000UL)   /* BSTS (Bitfield-Mask: 0x01) */
+#define RUSB2_PIPE_CTR_INBUFM_Pos       (14UL)       /* INBUFM (Bit 14) */
+#define RUSB2_PIPE_CTR_INBUFM_Msk       (0x4000UL)   /* INBUFM (Bitfield-Mask: 0x01) */
+#define RUSB2_PIPE_CTR_CSCLR_Pos        (13UL)       /* CSCLR (Bit 13) */
+#define RUSB2_PIPE_CTR_CSCLR_Msk        (0x2000UL)   /* CSCLR (Bitfield-Mask: 0x01) */
+#define RUSB2_PIPE_CTR_CSSTS_Pos        (12UL)       /* CSSTS (Bit 12) */
+#define RUSB2_PIPE_CTR_CSSTS_Msk        (0x1000UL)   /* CSSTS (Bitfield-Mask: 0x01) */
+#define RUSB2_PIPE_CTR_ATREPM_Pos       (10UL)       /* ATREPM (Bit 10) */
+#define RUSB2_PIPE_CTR_ATREPM_Msk       (0x400UL)    /* ATREPM (Bitfield-Mask: 0x01) */
+#define RUSB2_PIPE_CTR_ACLRM_Pos        (9UL)        /* ACLRM (Bit 9) */
+#define RUSB2_PIPE_CTR_ACLRM_Msk        (0x200UL)    /* ACLRM (Bitfield-Mask: 0x01) */
+#define RUSB2_PIPE_CTR_SQCLR_Pos        (8UL)        /* SQCLR (Bit 8) */
+#define RUSB2_PIPE_CTR_SQCLR_Msk        (0x100UL)    /* SQCLR (Bitfield-Mask: 0x01) */
+#define RUSB2_PIPE_CTR_SQSET_Pos        (7UL)        /* SQSET (Bit 7) */
+#define RUSB2_PIPE_CTR_SQSET_Msk        (0x80UL)     /* SQSET (Bitfield-Mask: 0x01) */
+#define RUSB2_PIPE_CTR_SQMON_Pos        (6UL)        /* SQMON (Bit 6) */
+#define RUSB2_PIPE_CTR_SQMON_Msk        (0x40UL)     /* SQMON (Bitfield-Mask: 0x01) */
+#define RUSB2_PIPE_CTR_PBUSY_Pos        (5UL)        /* PBUSY (Bit 5) */
+#define RUSB2_PIPE_CTR_PBUSY_Msk        (0x20UL)     /* PBUSY (Bitfield-Mask: 0x01) */
+#define RUSB2_PIPE_CTR_PID_Pos          (0UL)        /* PID (Bit 0) */
+#define RUSB2_PIPE_CTR_PID_Msk          (0x3UL)      /* PID (Bitfield-Mask: 0x03) */
 
 // DEVADD
-#define LINK_REG_DEVADD_UPPHUB_Pos         (11UL)       /* UPPHUB (Bit 11) */
-#define LINK_REG_DEVADD_UPPHUB_Msk         (0x7800UL)   /* UPPHUB (Bitfield-Mask: 0x0f) */
-#define LINK_REG_DEVADD_HUBPORT_Pos        (8UL)        /* HUBPORT (Bit 8) */
-#define LINK_REG_DEVADD_HUBPORT_Msk        (0x700UL)    /* HUBPORT (Bitfield-Mask: 0x07) */
-#define LINK_REG_DEVADD_USBSPD_Pos         (6UL)        /* USBSPD (Bit 6) */
-#define LINK_REG_DEVADD_USBSPD_Msk         (0xc0UL)     /* USBSPD (Bitfield-Mask: 0x03) */
+#define RUSB2_DEVADD_UPPHUB_Pos         (11UL)       /* UPPHUB (Bit 11) */
+#define RUSB2_DEVADD_UPPHUB_Msk         (0x7800UL)   /* UPPHUB (Bitfield-Mask: 0x0f) */
+#define RUSB2_DEVADD_HUBPORT_Pos        (8UL)        /* HUBPORT (Bit 8) */
+#define RUSB2_DEVADD_HUBPORT_Msk        (0x700UL)    /* HUBPORT (Bitfield-Mask: 0x07) */
+#define RUSB2_DEVADD_USBSPD_Pos         (6UL)        /* USBSPD (Bit 6) */
+#define RUSB2_DEVADD_USBSPD_Msk         (0xc0UL)     /* USBSPD (Bitfield-Mask: 0x03) */
 
 // USBBCCTRL0
-#define LINK_REG_USBBCCTRL0_PDDETSTS0_Pos  (9UL)        /* PDDETSTS0 (Bit 9) */
-#define LINK_REG_USBBCCTRL0_PDDETSTS0_Msk  (0x200UL)    /* PDDETSTS0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_USBBCCTRL0_CHGDETSTS0_Pos (8UL)        /* CHGDETSTS0 (Bit 8) */
-#define LINK_REG_USBBCCTRL0_CHGDETSTS0_Msk (0x100UL)    /* CHGDETSTS0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_USBBCCTRL0_BATCHGE0_Pos   (7UL)        /* BATCHGE0 (Bit 7) */
-#define LINK_REG_USBBCCTRL0_BATCHGE0_Msk   (0x80UL)     /* BATCHGE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_USBBCCTRL0_VDMSRCE0_Pos   (5UL)        /* VDMSRCE0 (Bit 5) */
-#define LINK_REG_USBBCCTRL0_VDMSRCE0_Msk   (0x20UL)     /* VDMSRCE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_USBBCCTRL0_IDPSINKE0_Pos  (4UL)        /* IDPSINKE0 (Bit 4) */
-#define LINK_REG_USBBCCTRL0_IDPSINKE0_Msk  (0x10UL)     /* IDPSINKE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_USBBCCTRL0_VDPSRCE0_Pos   (3UL)        /* VDPSRCE0 (Bit 3) */
-#define LINK_REG_USBBCCTRL0_VDPSRCE0_Msk   (0x8UL)      /* VDPSRCE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_USBBCCTRL0_IDMSINKE0_Pos  (2UL)        /* IDMSINKE0 (Bit 2) */
-#define LINK_REG_USBBCCTRL0_IDMSINKE0_Msk  (0x4UL)      /* IDMSINKE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_USBBCCTRL0_IDPSRCE0_Pos   (1UL)        /* IDPSRCE0 (Bit 1) */
-#define LINK_REG_USBBCCTRL0_IDPSRCE0_Msk   (0x2UL)      /* IDPSRCE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_USBBCCTRL0_RPDME0_Pos     (0UL)        /* RPDME0 (Bit 0) */
-#define LINK_REG_USBBCCTRL0_RPDME0_Msk     (0x1UL)      /* RPDME0 (Bitfield-Mask: 0x01) */
+#define RUSB2_USBBCCTRL0_PDDETSTS0_Pos  (9UL)        /* PDDETSTS0 (Bit 9) */
+#define RUSB2_USBBCCTRL0_PDDETSTS0_Msk  (0x200UL)    /* PDDETSTS0 (Bitfield-Mask: 0x01) */
+#define RUSB2_USBBCCTRL0_CHGDETSTS0_Pos (8UL)        /* CHGDETSTS0 (Bit 8) */
+#define RUSB2_USBBCCTRL0_CHGDETSTS0_Msk (0x100UL)    /* CHGDETSTS0 (Bitfield-Mask: 0x01) */
+#define RUSB2_USBBCCTRL0_BATCHGE0_Pos   (7UL)        /* BATCHGE0 (Bit 7) */
+#define RUSB2_USBBCCTRL0_BATCHGE0_Msk   (0x80UL)     /* BATCHGE0 (Bitfield-Mask: 0x01) */
+#define RUSB2_USBBCCTRL0_VDMSRCE0_Pos   (5UL)        /* VDMSRCE0 (Bit 5) */
+#define RUSB2_USBBCCTRL0_VDMSRCE0_Msk   (0x20UL)     /* VDMSRCE0 (Bitfield-Mask: 0x01) */
+#define RUSB2_USBBCCTRL0_IDPSINKE0_Pos  (4UL)        /* IDPSINKE0 (Bit 4) */
+#define RUSB2_USBBCCTRL0_IDPSINKE0_Msk  (0x10UL)     /* IDPSINKE0 (Bitfield-Mask: 0x01) */
+#define RUSB2_USBBCCTRL0_VDPSRCE0_Pos   (3UL)        /* VDPSRCE0 (Bit 3) */
+#define RUSB2_USBBCCTRL0_VDPSRCE0_Msk   (0x8UL)      /* VDPSRCE0 (Bitfield-Mask: 0x01) */
+#define RUSB2_USBBCCTRL0_IDMSINKE0_Pos  (2UL)        /* IDMSINKE0 (Bit 2) */
+#define RUSB2_USBBCCTRL0_IDMSINKE0_Msk  (0x4UL)      /* IDMSINKE0 (Bitfield-Mask: 0x01) */
+#define RUSB2_USBBCCTRL0_IDPSRCE0_Pos   (1UL)        /* IDPSRCE0 (Bit 1) */
+#define RUSB2_USBBCCTRL0_IDPSRCE0_Msk   (0x2UL)      /* IDPSRCE0 (Bitfield-Mask: 0x01) */
+#define RUSB2_USBBCCTRL0_RPDME0_Pos     (0UL)        /* RPDME0 (Bit 0) */
+#define RUSB2_USBBCCTRL0_RPDME0_Msk     (0x1UL)      /* RPDME0 (Bitfield-Mask: 0x01) */
 
 // UCKSEL
-#define LINK_REG_UCKSEL_UCKSELC_Pos        (0UL)        /* UCKSELC (Bit 0) */
-#define LINK_REG_UCKSEL_UCKSELC_Msk        (0x1UL)      /* UCKSELC (Bitfield-Mask: 0x01) */
+#define RUSB2_UCKSEL_UCKSELC_Pos        (0UL)        /* UCKSELC (Bit 0) */
+#define RUSB2_UCKSEL_UCKSELC_Msk        (0x1UL)      /* UCKSELC (Bitfield-Mask: 0x01) */
 
 // USBMC
-#define LINK_REG_USBMC_VDCEN_Pos           (7UL)        /* VDCEN (Bit 7) */
-#define LINK_REG_USBMC_VDCEN_Msk           (0x80UL)     /* VDCEN (Bitfield-Mask: 0x01) */
-#define LINK_REG_USBMC_VDDUSBE_Pos         (0UL)        /* VDDUSBE (Bit 0) */
-#define LINK_REG_USBMC_VDDUSBE_Msk         (0x1UL)      /* VDDUSBE (Bitfield-Mask: 0x01) */
+#define RUSB2_USBMC_VDCEN_Pos           (7UL)        /* VDCEN (Bit 7) */
+#define RUSB2_USBMC_VDCEN_Msk           (0x80UL)     /* VDCEN (Bitfield-Mask: 0x01) */
+#define RUSB2_USBMC_VDDUSBE_Pos         (0UL)        /* VDDUSBE (Bit 0) */
+#define RUSB2_USBMC_VDDUSBE_Msk         (0x1UL)      /* VDDUSBE (Bitfield-Mask: 0x01) */
 
 // PHYSLEW
-#define LINK_REG_PHYSLEW_SLEWF01_Pos       (3UL)        /* SLEWF01 (Bit 3) */
-#define LINK_REG_PHYSLEW_SLEWF01_Msk       (0x8UL)      /* SLEWF01 (Bitfield-Mask: 0x01) */
-#define LINK_REG_PHYSLEW_SLEWF00_Pos       (2UL)        /* SLEWF00 (Bit 2) */
-#define LINK_REG_PHYSLEW_SLEWF00_Msk       (0x4UL)      /* SLEWF00 (Bitfield-Mask: 0x01) */
-#define LINK_REG_PHYSLEW_SLEWR01_Pos       (1UL)        /* SLEWR01 (Bit 1) */
-#define LINK_REG_PHYSLEW_SLEWR01_Msk       (0x2UL)      /* SLEWR01 (Bitfield-Mask: 0x01) */
-#define LINK_REG_PHYSLEW_SLEWR00_Pos       (0UL)        /* SLEWR00 (Bit 0) */
-#define LINK_REG_PHYSLEW_SLEWR00_Msk       (0x1UL)      /* SLEWR00 (Bitfield-Mask: 0x01) */
+#define RUSB2_PHYSLEW_SLEWF01_Pos       (3UL)        /* SLEWF01 (Bit 3) */
+#define RUSB2_PHYSLEW_SLEWF01_Msk       (0x8UL)      /* SLEWF01 (Bitfield-Mask: 0x01) */
+#define RUSB2_PHYSLEW_SLEWF00_Pos       (2UL)        /* SLEWF00 (Bit 2) */
+#define RUSB2_PHYSLEW_SLEWF00_Msk       (0x4UL)      /* SLEWF00 (Bitfield-Mask: 0x01) */
+#define RUSB2_PHYSLEW_SLEWR01_Pos       (1UL)        /* SLEWR01 (Bit 1) */
+#define RUSB2_PHYSLEW_SLEWR01_Msk       (0x2UL)      /* SLEWR01 (Bitfield-Mask: 0x01) */
+#define RUSB2_PHYSLEW_SLEWR00_Pos       (0UL)        /* SLEWR00 (Bit 0) */
+#define RUSB2_PHYSLEW_SLEWR00_Msk       (0x1UL)      /* SLEWR00 (Bitfield-Mask: 0x01) */
 
 // LPCTRL
-#define LINK_REG_LPCTRL_HWUPM_Pos          (7UL)        /* HWUPM (Bit 7) */
-#define LINK_REG_LPCTRL_HWUPM_Msk          (0x80UL)     /* HWUPM (Bitfield-Mask: 0x01) */
+#define RUSB2_LPCTRL_HWUPM_Pos          (7UL)        /* HWUPM (Bit 7) */
+#define RUSB2_LPCTRL_HWUPM_Msk          (0x80UL)     /* HWUPM (Bitfield-Mask: 0x01) */
 
 // LPSTS
-#define LINK_REG_LPSTS_SUSPENDM_Pos        (14UL)       /* SUSPENDM (Bit 14) */
-#define LINK_REG_LPSTS_SUSPENDM_Msk        (0x4000UL)   /* SUSPENDM (Bitfield-Mask: 0x01) */
+#define RUSB2_LPSTS_SUSPENDM_Pos        (14UL)       /* SUSPENDM (Bit 14) */
+#define RUSB2_LPSTS_SUSPENDM_Msk        (0x4000UL)   /* SUSPENDM (Bitfield-Mask: 0x01) */
 
 // BCCTRL
-#define LINK_REG_BCCTRL_PDDETSTS_Pos       (9UL)        /* PDDETSTS (Bit 9) */
-#define LINK_REG_BCCTRL_PDDETSTS_Msk       (0x200UL)    /* PDDETSTS (Bitfield-Mask: 0x01) */
-#define LINK_REG_BCCTRL_CHGDETSTS_Pos      (8UL)        /* CHGDETSTS (Bit 8) */
-#define LINK_REG_BCCTRL_CHGDETSTS_Msk      (0x100UL)    /* CHGDETSTS (Bitfield-Mask: 0x01) */
-#define LINK_REG_BCCTRL_DCPMODE_Pos        (5UL)        /* DCPMODE (Bit 5) */
-#define LINK_REG_BCCTRL_DCPMODE_Msk        (0x20UL)     /* DCPMODE (Bitfield-Mask: 0x01) */
-#define LINK_REG_BCCTRL_VDMSRCE_Pos        (4UL)        /* VDMSRCE (Bit 4) */
-#define LINK_REG_BCCTRL_VDMSRCE_Msk        (0x10UL)     /* VDMSRCE (Bitfield-Mask: 0x01) */
-#define LINK_REG_BCCTRL_IDPSINKE_Pos       (3UL)        /* IDPSINKE (Bit 3) */
-#define LINK_REG_BCCTRL_IDPSINKE_Msk       (0x8UL)      /* IDPSINKE (Bitfield-Mask: 0x01) */
-#define LINK_REG_BCCTRL_VDPSRCE_Pos        (2UL)        /* VDPSRCE (Bit 2) */
-#define LINK_REG_BCCTRL_VDPSRCE_Msk        (0x4UL)      /* VDPSRCE (Bitfield-Mask: 0x01) */
-#define LINK_REG_BCCTRL_IDMSINKE_Pos       (1UL)        /* IDMSINKE (Bit 1) */
-#define LINK_REG_BCCTRL_IDMSINKE_Msk       (0x2UL)      /* IDMSINKE (Bitfield-Mask: 0x01) */
-#define LINK_REG_BCCTRL_IDPSRCE_Pos        (0UL)        /* IDPSRCE (Bit 0) */
-#define LINK_REG_BCCTRL_IDPSRCE_Msk        (0x1UL)      /* IDPSRCE (Bitfield-Mask: 0x01) */
+#define RUSB2_BCCTRL_PDDETSTS_Pos       (9UL)        /* PDDETSTS (Bit 9) */
+#define RUSB2_BCCTRL_PDDETSTS_Msk       (0x200UL)    /* PDDETSTS (Bitfield-Mask: 0x01) */
+#define RUSB2_BCCTRL_CHGDETSTS_Pos      (8UL)        /* CHGDETSTS (Bit 8) */
+#define RUSB2_BCCTRL_CHGDETSTS_Msk      (0x100UL)    /* CHGDETSTS (Bitfield-Mask: 0x01) */
+#define RUSB2_BCCTRL_DCPMODE_Pos        (5UL)        /* DCPMODE (Bit 5) */
+#define RUSB2_BCCTRL_DCPMODE_Msk        (0x20UL)     /* DCPMODE (Bitfield-Mask: 0x01) */
+#define RUSB2_BCCTRL_VDMSRCE_Pos        (4UL)        /* VDMSRCE (Bit 4) */
+#define RUSB2_BCCTRL_VDMSRCE_Msk        (0x10UL)     /* VDMSRCE (Bitfield-Mask: 0x01) */
+#define RUSB2_BCCTRL_IDPSINKE_Pos       (3UL)        /* IDPSINKE (Bit 3) */
+#define RUSB2_BCCTRL_IDPSINKE_Msk       (0x8UL)      /* IDPSINKE (Bitfield-Mask: 0x01) */
+#define RUSB2_BCCTRL_VDPSRCE_Pos        (2UL)        /* VDPSRCE (Bit 2) */
+#define RUSB2_BCCTRL_VDPSRCE_Msk        (0x4UL)      /* VDPSRCE (Bitfield-Mask: 0x01) */
+#define RUSB2_BCCTRL_IDMSINKE_Pos       (1UL)        /* IDMSINKE (Bit 1) */
+#define RUSB2_BCCTRL_IDMSINKE_Msk       (0x2UL)      /* IDMSINKE (Bitfield-Mask: 0x01) */
+#define RUSB2_BCCTRL_IDPSRCE_Pos        (0UL)        /* IDPSRCE (Bit 0) */
+#define RUSB2_BCCTRL_IDPSRCE_Msk        (0x1UL)      /* IDPSRCE (Bitfield-Mask: 0x01) */
 
 // PL1CTRL1
-#define LINK_REG_PL1CTRL1_L1EXTMD_Pos      (14UL)       /* L1EXTMD (Bit 14) */
-#define LINK_REG_PL1CTRL1_L1EXTMD_Msk      (0x4000UL)   /* L1EXTMD (Bitfield-Mask: 0x01) */
-#define LINK_REG_PL1CTRL1_HIRDTHR_Pos      (8UL)        /* HIRDTHR (Bit 8) */
-#define LINK_REG_PL1CTRL1_HIRDTHR_Msk      (0xf00UL)    /* HIRDTHR (Bitfield-Mask: 0x0f) */
-#define LINK_REG_PL1CTRL1_DVSQ_Pos         (4UL)        /* DVSQ (Bit 4) */
-#define LINK_REG_PL1CTRL1_DVSQ_Msk         (0xf0UL)     /* DVSQ (Bitfield-Mask: 0x0f) */
-#define LINK_REG_PL1CTRL1_L1NEGOMD_Pos     (3UL)        /* L1NEGOMD (Bit 3) */
-#define LINK_REG_PL1CTRL1_L1NEGOMD_Msk     (0x8UL)      /* L1NEGOMD (Bitfield-Mask: 0x01) */
-#define LINK_REG_PL1CTRL1_L1RESPMD_Pos     (1UL)        /* L1RESPMD (Bit 1) */
-#define LINK_REG_PL1CTRL1_L1RESPMD_Msk     (0x6UL)      /* L1RESPMD (Bitfield-Mask: 0x03) */
-#define LINK_REG_PL1CTRL1_L1RESPEN_Pos     (0UL)        /* L1RESPEN (Bit 0) */
-#define LINK_REG_PL1CTRL1_L1RESPEN_Msk     (0x1UL)      /* L1RESPEN (Bitfield-Mask: 0x01) */
+#define RUSB2_PL1CTRL1_L1EXTMD_Pos      (14UL)       /* L1EXTMD (Bit 14) */
+#define RUSB2_PL1CTRL1_L1EXTMD_Msk      (0x4000UL)   /* L1EXTMD (Bitfield-Mask: 0x01) */
+#define RUSB2_PL1CTRL1_HIRDTHR_Pos      (8UL)        /* HIRDTHR (Bit 8) */
+#define RUSB2_PL1CTRL1_HIRDTHR_Msk      (0xf00UL)    /* HIRDTHR (Bitfield-Mask: 0x0f) */
+#define RUSB2_PL1CTRL1_DVSQ_Pos         (4UL)        /* DVSQ (Bit 4) */
+#define RUSB2_PL1CTRL1_DVSQ_Msk         (0xf0UL)     /* DVSQ (Bitfield-Mask: 0x0f) */
+#define RUSB2_PL1CTRL1_L1NEGOMD_Pos     (3UL)        /* L1NEGOMD (Bit 3) */
+#define RUSB2_PL1CTRL1_L1NEGOMD_Msk     (0x8UL)      /* L1NEGOMD (Bitfield-Mask: 0x01) */
+#define RUSB2_PL1CTRL1_L1RESPMD_Pos     (1UL)        /* L1RESPMD (Bit 1) */
+#define RUSB2_PL1CTRL1_L1RESPMD_Msk     (0x6UL)      /* L1RESPMD (Bitfield-Mask: 0x03) */
+#define RUSB2_PL1CTRL1_L1RESPEN_Pos     (0UL)        /* L1RESPEN (Bit 0) */
+#define RUSB2_PL1CTRL1_L1RESPEN_Msk     (0x1UL)      /* L1RESPEN (Bitfield-Mask: 0x01) */
 
 // PL1CTRL2
-#define LINK_REG_PL1CTRL2_RWEMON_Pos       (12UL)       /* RWEMON (Bit 12) */
-#define LINK_REG_PL1CTRL2_RWEMON_Msk       (0x1000UL)   /* RWEMON (Bitfield-Mask: 0x01) */
-#define LINK_REG_PL1CTRL2_HIRDMON_Pos      (8UL)        /* HIRDMON (Bit 8) */
-#define LINK_REG_PL1CTRL2_HIRDMON_Msk      (0xf00UL)    /* HIRDMON (Bitfield-Mask: 0x0f) */
+#define RUSB2_PL1CTRL2_RWEMON_Pos       (12UL)       /* RWEMON (Bit 12) */
+#define RUSB2_PL1CTRL2_RWEMON_Msk       (0x1000UL)   /* RWEMON (Bitfield-Mask: 0x01) */
+#define RUSB2_PL1CTRL2_HIRDMON_Pos      (8UL)        /* HIRDMON (Bit 8) */
+#define RUSB2_PL1CTRL2_HIRDMON_Msk      (0xf00UL)    /* HIRDMON (Bitfield-Mask: 0x0f) */
 
 // HL1CTRL1
-#define LINK_REG_HL1CTRL1_L1STATUS_Pos     (1UL)        /* L1STATUS (Bit 1) */
-#define LINK_REG_HL1CTRL1_L1STATUS_Msk     (0x6UL)      /* L1STATUS (Bitfield-Mask: 0x03) */
-#define LINK_REG_HL1CTRL1_L1REQ_Pos        (0UL)        /* L1REQ (Bit 0) */
-#define LINK_REG_HL1CTRL1_L1REQ_Msk        (0x1UL)      /* L1REQ (Bitfield-Mask: 0x01) */
+#define RUSB2_HL1CTRL1_L1STATUS_Pos     (1UL)        /* L1STATUS (Bit 1) */
+#define RUSB2_HL1CTRL1_L1STATUS_Msk     (0x6UL)      /* L1STATUS (Bitfield-Mask: 0x03) */
+#define RUSB2_HL1CTRL1_L1REQ_Pos        (0UL)        /* L1REQ (Bit 0) */
+#define RUSB2_HL1CTRL1_L1REQ_Msk        (0x1UL)      /* L1REQ (Bitfield-Mask: 0x01) */
 
 // HL1CTRL2
-#define LINK_REG_HL1CTRL2_BESL_Pos         (15UL)       /* BESL (Bit 15) */
-#define LINK_REG_HL1CTRL2_BESL_Msk         (0x8000UL)   /* BESL (Bitfield-Mask: 0x01) */
-#define LINK_REG_HL1CTRL2_L1RWE_Pos        (12UL)       /* L1RWE (Bit 12) */
-#define LINK_REG_HL1CTRL2_L1RWE_Msk        (0x1000UL)   /* L1RWE (Bitfield-Mask: 0x01) */
-#define LINK_REG_HL1CTRL2_HIRD_Pos         (8UL)        /* HIRD (Bit 8) */
-#define LINK_REG_HL1CTRL2_HIRD_Msk         (0xf00UL)    /* HIRD (Bitfield-Mask: 0x0f) */
-#define LINK_REG_HL1CTRL2_L1ADDR_Pos       (0UL)        /* L1ADDR (Bit 0) */
-#define LINK_REG_HL1CTRL2_L1ADDR_Msk       (0xfUL)      /* L1ADDR (Bitfield-Mask: 0x0f) */
+#define RUSB2_HL1CTRL2_BESL_Pos         (15UL)       /* BESL (Bit 15) */
+#define RUSB2_HL1CTRL2_BESL_Msk         (0x8000UL)   /* BESL (Bitfield-Mask: 0x01) */
+#define RUSB2_HL1CTRL2_L1RWE_Pos        (12UL)       /* L1RWE (Bit 12) */
+#define RUSB2_HL1CTRL2_L1RWE_Msk        (0x1000UL)   /* L1RWE (Bitfield-Mask: 0x01) */
+#define RUSB2_HL1CTRL2_HIRD_Pos         (8UL)        /* HIRD (Bit 8) */
+#define RUSB2_HL1CTRL2_HIRD_Msk         (0xf00UL)    /* HIRD (Bitfield-Mask: 0x0f) */
+#define RUSB2_HL1CTRL2_L1ADDR_Pos       (0UL)        /* L1ADDR (Bit 0) */
+#define RUSB2_HL1CTRL2_L1ADDR_Msk       (0xfUL)      /* L1ADDR (Bitfield-Mask: 0x0f) */
 
 // DPUSR0R
-#define LINK_REG_DPUSR0R_DVBSTSHM_Pos      (23UL)       /* DVBSTSHM (Bit 23) */
-#define LINK_REG_DPUSR0R_DVBSTSHM_Msk      (0x800000UL) /* DVBSTSHM (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR0R_DOVCBHM_Pos       (21UL)       /* DOVCBHM (Bit 21) */
-#define LINK_REG_DPUSR0R_DOVCBHM_Msk       (0x200000UL) /* DOVCBHM (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR0R_DOVCAHM_Pos       (20UL)       /* DOVCAHM (Bit 20) */
-#define LINK_REG_DPUSR0R_DOVCAHM_Msk       (0x100000UL) /* DOVCAHM (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR0R_DVBSTSHM_Pos      (23UL)       /* DVBSTSHM (Bit 23) */
+#define RUSB2_DPUSR0R_DVBSTSHM_Msk      (0x800000UL) /* DVBSTSHM (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR0R_DOVCBHM_Pos       (21UL)       /* DOVCBHM (Bit 21) */
+#define RUSB2_DPUSR0R_DOVCBHM_Msk       (0x200000UL) /* DOVCBHM (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR0R_DOVCAHM_Pos       (20UL)       /* DOVCAHM (Bit 20) */
+#define RUSB2_DPUSR0R_DOVCAHM_Msk       (0x100000UL) /* DOVCAHM (Bitfield-Mask: 0x01) */
 
 // DPUSR1R
-#define LINK_REG_DPUSR1R_DVBSTSH_Pos       (23UL)       /* DVBSTSH (Bit 23) */
-#define LINK_REG_DPUSR1R_DVBSTSH_Msk       (0x800000UL) /* DVBSTSH (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_DOVCBH_Pos        (21UL)       /* DOVCBH (Bit 21) */
-#define LINK_REG_DPUSR1R_DOVCBH_Msk        (0x200000UL) /* DOVCBH (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_DOVCAH_Pos        (20UL)       /* DOVCAH (Bit 20) */
-#define LINK_REG_DPUSR1R_DOVCAH_Msk        (0x100000UL) /* DOVCAH (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_DVBSTSHE_Pos      (7UL)        /* DVBSTSHE (Bit 7) */
-#define LINK_REG_DPUSR1R_DVBSTSHE_Msk      (0x80UL)     /* DVBSTSHE (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_DOVCBHE_Pos       (5UL)        /* DOVCBHE (Bit 5) */
-#define LINK_REG_DPUSR1R_DOVCBHE_Msk       (0x20UL)     /* DOVCBHE (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_DOVCAHE_Pos       (4UL)        /* DOVCAHE (Bit 4) */
-#define LINK_REG_DPUSR1R_DOVCAHE_Msk       (0x10UL)     /* DOVCAHE (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR1R_DVBSTSH_Pos       (23UL)       /* DVBSTSH (Bit 23) */
+#define RUSB2_DPUSR1R_DVBSTSH_Msk       (0x800000UL) /* DVBSTSH (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR1R_DOVCBH_Pos        (21UL)       /* DOVCBH (Bit 21) */
+#define RUSB2_DPUSR1R_DOVCBH_Msk        (0x200000UL) /* DOVCBH (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR1R_DOVCAH_Pos        (20UL)       /* DOVCAH (Bit 20) */
+#define RUSB2_DPUSR1R_DOVCAH_Msk        (0x100000UL) /* DOVCAH (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR1R_DVBSTSHE_Pos      (7UL)        /* DVBSTSHE (Bit 7) */
+#define RUSB2_DPUSR1R_DVBSTSHE_Msk      (0x80UL)     /* DVBSTSHE (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR1R_DOVCBHE_Pos       (5UL)        /* DOVCBHE (Bit 5) */
+#define RUSB2_DPUSR1R_DOVCBHE_Msk       (0x20UL)     /* DOVCBHE (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR1R_DOVCAHE_Pos       (4UL)        /* DOVCAHE (Bit 4) */
+#define RUSB2_DPUSR1R_DOVCAHE_Msk       (0x10UL)     /* DOVCAHE (Bitfield-Mask: 0x01) */
 
 // DPUSR2R
-#define LINK_REG_DPUSR2R_DMINTE_Pos        (9UL)        /* DMINTE (Bit 9) */
-#define LINK_REG_DPUSR2R_DMINTE_Msk        (0x200UL)    /* DMINTE (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR2R_DPINTE_Pos        (8UL)        /* DPINTE (Bit 8) */
-#define LINK_REG_DPUSR2R_DPINTE_Msk        (0x100UL)    /* DPINTE (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR2R_DMVAL_Pos         (5UL)        /* DMVAL (Bit 5) */
-#define LINK_REG_DPUSR2R_DMVAL_Msk         (0x20UL)     /* DMVAL (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR2R_DPVAL_Pos         (4UL)        /* DPVAL (Bit 4) */
-#define LINK_REG_DPUSR2R_DPVAL_Msk         (0x10UL)     /* DPVAL (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR2R_DMINT_Pos         (1UL)        /* DMINT (Bit 1) */
-#define LINK_REG_DPUSR2R_DMINT_Msk         (0x2UL)      /* DMINT (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR2R_DPINT_Pos         (0UL)        /* DPINT (Bit 0) */
-#define LINK_REG_DPUSR2R_DPINT_Msk         (0x1UL)      /* DPINT (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR2R_DMINTE_Pos        (9UL)        /* DMINTE (Bit 9) */
+#define RUSB2_DPUSR2R_DMINTE_Msk        (0x200UL)    /* DMINTE (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR2R_DPINTE_Pos        (8UL)        /* DPINTE (Bit 8) */
+#define RUSB2_DPUSR2R_DPINTE_Msk        (0x100UL)    /* DPINTE (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR2R_DMVAL_Pos         (5UL)        /* DMVAL (Bit 5) */
+#define RUSB2_DPUSR2R_DMVAL_Msk         (0x20UL)     /* DMVAL (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR2R_DPVAL_Pos         (4UL)        /* DPVAL (Bit 4) */
+#define RUSB2_DPUSR2R_DPVAL_Msk         (0x10UL)     /* DPVAL (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR2R_DMINT_Pos         (1UL)        /* DMINT (Bit 1) */
+#define RUSB2_DPUSR2R_DMINT_Msk         (0x2UL)      /* DMINT (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR2R_DPINT_Pos         (0UL)        /* DPINT (Bit 0) */
+#define RUSB2_DPUSR2R_DPINT_Msk         (0x1UL)      /* DPINT (Bitfield-Mask: 0x01) */
 
 // DPUSRCR
-#define LINK_REG_DPUSRCR_FIXPHYPD_Pos      (1UL)        /* FIXPHYPD (Bit 1) */
-#define LINK_REG_DPUSRCR_FIXPHYPD_Msk      (0x2UL)      /* FIXPHYPD (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSRCR_FIXPHY_Pos        (0UL)        /* FIXPHY (Bit 0) */
-#define LINK_REG_DPUSRCR_FIXPHY_Msk        (0x1UL)      /* FIXPHY (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSRCR_FIXPHYPD_Pos      (1UL)        /* FIXPHYPD (Bit 1) */
+#define RUSB2_DPUSRCR_FIXPHYPD_Msk      (0x2UL)      /* FIXPHYPD (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSRCR_FIXPHY_Pos        (0UL)        /* FIXPHY (Bit 0) */
+#define RUSB2_DPUSRCR_FIXPHY_Msk        (0x1UL)      /* FIXPHY (Bitfield-Mask: 0x01) */
 
 // DPUSR0R_FS
-#define LINK_REG_DPUSR0R_FS_DVBSTS0_Pos    (23UL)       /* DVBSTS0 (Bit 23) */
-#define LINK_REG_DPUSR0R_FS_DVBSTS0_Msk    (0x800000UL) /* DVBSTS0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR0R_FS_DOVCB0_Pos     (21UL)       /* DOVCB0 (Bit 21) */
-#define LINK_REG_DPUSR0R_FS_DOVCB0_Msk     (0x200000UL) /* DOVCB0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR0R_FS_DOVCA0_Pos     (20UL)       /* DOVCA0 (Bit 20) */
-#define LINK_REG_DPUSR0R_FS_DOVCA0_Msk     (0x100000UL) /* DOVCA0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR0R_FS_DM0_Pos        (17UL)       /* DM0 (Bit 17) */
-#define LINK_REG_DPUSR0R_FS_DM0_Msk        (0x20000UL)  /* DM0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR0R_FS_DP0_Pos        (16UL)       /* DP0 (Bit 16) */
-#define LINK_REG_DPUSR0R_FS_DP0_Msk        (0x10000UL)  /* DP0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR0R_FS_FIXPHY0_Pos    (4UL)        /* FIXPHY0 (Bit 4) */
-#define LINK_REG_DPUSR0R_FS_FIXPHY0_Msk    (0x10UL)     /* FIXPHY0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR0R_FS_DRPD0_Pos      (3UL)        /* DRPD0 (Bit 3) */
-#define LINK_REG_DPUSR0R_FS_DRPD0_Msk      (0x8UL)      /* DRPD0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR0R_FS_RPUE0_Pos      (1UL)        /* RPUE0 (Bit 1) */
-#define LINK_REG_DPUSR0R_FS_RPUE0_Msk      (0x2UL)      /* RPUE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR0R_FS_SRPC0_Pos      (0UL)        /* SRPC0 (Bit 0) */
-#define LINK_REG_DPUSR0R_FS_SRPC0_Msk      (0x1UL)      /* SRPC0 (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR0R_FS_DVBSTS0_Pos    (23UL)       /* DVBSTS0 (Bit 23) */
+#define RUSB2_DPUSR0R_FS_DVBSTS0_Msk    (0x800000UL) /* DVBSTS0 (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR0R_FS_DOVCB0_Pos     (21UL)       /* DOVCB0 (Bit 21) */
+#define RUSB2_DPUSR0R_FS_DOVCB0_Msk     (0x200000UL) /* DOVCB0 (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR0R_FS_DOVCA0_Pos     (20UL)       /* DOVCA0 (Bit 20) */
+#define RUSB2_DPUSR0R_FS_DOVCA0_Msk     (0x100000UL) /* DOVCA0 (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR0R_FS_DM0_Pos        (17UL)       /* DM0 (Bit 17) */
+#define RUSB2_DPUSR0R_FS_DM0_Msk        (0x20000UL)  /* DM0 (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR0R_FS_DP0_Pos        (16UL)       /* DP0 (Bit 16) */
+#define RUSB2_DPUSR0R_FS_DP0_Msk        (0x10000UL)  /* DP0 (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR0R_FS_FIXPHY0_Pos    (4UL)        /* FIXPHY0 (Bit 4) */
+#define RUSB2_DPUSR0R_FS_FIXPHY0_Msk    (0x10UL)     /* FIXPHY0 (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR0R_FS_DRPD0_Pos      (3UL)        /* DRPD0 (Bit 3) */
+#define RUSB2_DPUSR0R_FS_DRPD0_Msk      (0x8UL)      /* DRPD0 (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR0R_FS_RPUE0_Pos      (1UL)        /* RPUE0 (Bit 1) */
+#define RUSB2_DPUSR0R_FS_RPUE0_Msk      (0x2UL)      /* RPUE0 (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR0R_FS_SRPC0_Pos      (0UL)        /* SRPC0 (Bit 0) */
+#define RUSB2_DPUSR0R_FS_SRPC0_Msk      (0x1UL)      /* SRPC0 (Bitfield-Mask: 0x01) */
 
 // DPUSR1R_FS
-#define LINK_REG_DPUSR1R_FS_DVBINT0_Pos    (23UL)       /* DVBINT0 (Bit 23) */
-#define LINK_REG_DPUSR1R_FS_DVBINT0_Msk    (0x800000UL) /* DVBINT0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_FS_DOVRCRB0_Pos   (21UL)       /* DOVRCRB0 (Bit 21) */
-#define LINK_REG_DPUSR1R_FS_DOVRCRB0_Msk   (0x200000UL) /* DOVRCRB0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_FS_DOVRCRA0_Pos   (20UL)       /* DOVRCRA0 (Bit 20) */
-#define LINK_REG_DPUSR1R_FS_DOVRCRA0_Msk   (0x100000UL) /* DOVRCRA0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_FS_DMINT0_Pos     (17UL)       /* DMINT0 (Bit 17) */
-#define LINK_REG_DPUSR1R_FS_DMINT0_Msk     (0x20000UL)  /* DMINT0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_FS_DPINT0_Pos     (16UL)       /* DPINT0 (Bit 16) */
-#define LINK_REG_DPUSR1R_FS_DPINT0_Msk     (0x10000UL)  /* DPINT0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_FS_DVBSE0_Pos     (7UL)        /* DVBSE0 (Bit 7) */
-#define LINK_REG_DPUSR1R_FS_DVBSE0_Msk     (0x80UL)     /* DVBSE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_FS_DOVRCRBE0_Pos  (5UL)        /* DOVRCRBE0 (Bit 5) */
-#define LINK_REG_DPUSR1R_FS_DOVRCRBE0_Msk  (0x20UL)     /* DOVRCRBE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_FS_DOVRCRAE0_Pos  (4UL)        /* DOVRCRAE0 (Bit 4) */
-#define LINK_REG_DPUSR1R_FS_DOVRCRAE0_Msk  (0x10UL)     /* DOVRCRAE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_FS_DMINTE0_Pos    (1UL)        /* DMINTE0 (Bit 1) */
-#define LINK_REG_DPUSR1R_FS_DMINTE0_Msk    (0x2UL)      /* DMINTE0 (Bitfield-Mask: 0x01) */
-#define LINK_REG_DPUSR1R_FS_DPINTE0_Pos    (0UL)        /* DPINTE0 (Bit 0) */
-#define LINK_REG_DPUSR1R_FS_DPINTE0_Msk    (0x1UL)      /* DPINTE0 (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR1R_FS_DVBINT0_Pos    (23UL)       /* DVBINT0 (Bit 23) */
+#define RUSB2_DPUSR1R_FS_DVBINT0_Msk    (0x800000UL) /* DVBINT0 (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR1R_FS_DOVRCRB0_Pos   (21UL)       /* DOVRCRB0 (Bit 21) */
+#define RUSB2_DPUSR1R_FS_DOVRCRB0_Msk   (0x200000UL) /* DOVRCRB0 (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR1R_FS_DOVRCRA0_Pos   (20UL)       /* DOVRCRA0 (Bit 20) */
+#define RUSB2_DPUSR1R_FS_DOVRCRA0_Msk   (0x100000UL) /* DOVRCRA0 (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR1R_FS_DMINT0_Pos     (17UL)       /* DMINT0 (Bit 17) */
+#define RUSB2_DPUSR1R_FS_DMINT0_Msk     (0x20000UL)  /* DMINT0 (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR1R_FS_DPINT0_Pos     (16UL)       /* DPINT0 (Bit 16) */
+#define RUSB2_DPUSR1R_FS_DPINT0_Msk     (0x10000UL)  /* DPINT0 (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR1R_FS_DVBSE0_Pos     (7UL)        /* DVBSE0 (Bit 7) */
+#define RUSB2_DPUSR1R_FS_DVBSE0_Msk     (0x80UL)     /* DVBSE0 (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR1R_FS_DOVRCRBE0_Pos  (5UL)        /* DOVRCRBE0 (Bit 5) */
+#define RUSB2_DPUSR1R_FS_DOVRCRBE0_Msk  (0x20UL)     /* DOVRCRBE0 (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR1R_FS_DOVRCRAE0_Pos  (4UL)        /* DOVRCRAE0 (Bit 4) */
+#define RUSB2_DPUSR1R_FS_DOVRCRAE0_Msk  (0x10UL)     /* DOVRCRAE0 (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR1R_FS_DMINTE0_Pos    (1UL)        /* DMINTE0 (Bit 1) */
+#define RUSB2_DPUSR1R_FS_DMINTE0_Msk    (0x2UL)      /* DMINTE0 (Bitfield-Mask: 0x01) */
+#define RUSB2_DPUSR1R_FS_DPINTE0_Pos    (0UL)        /* DPINTE0 (Bit 0) */
+#define RUSB2_DPUSR1R_FS_DPINTE0_Msk    (0x1UL)      /* DPINTE0 (Bitfield-Mask: 0x01) */
 
 /*--------------------------------------------------------------------*/
 /* Register Bit Utils                                           */
 /*--------------------------------------------------------------------*/
-#define LINK_REG_PIPE_CTR_PID_NAK          (0U << LINK_REG_PIPE_CTR_PID_Pos)    /* NAK response */
-#define LINK_REG_PIPE_CTR_PID_BUF          (1U << LINK_REG_PIPE_CTR_PID_Pos)    /* BUF response (depends buffer state) */
-#define LINK_REG_PIPE_CTR_PID_STALL        (2U << LINK_REG_PIPE_CTR_PID_Pos)    /* STALL response */
+#define RUSB2_PIPE_CTR_PID_NAK          (0U << RUSB2_PIPE_CTR_PID_Pos)    /* NAK response */
+#define RUSB2_PIPE_CTR_PID_BUF          (1U << RUSB2_PIPE_CTR_PID_Pos)    /* BUF response (depends buffer state) */
+#define RUSB2_PIPE_CTR_PID_STALL        (2U << RUSB2_PIPE_CTR_PID_Pos)    /* STALL response */
 
-#define LINK_REG_DVSTCTR0_RHST_LS          (1U << LINK_REG_DVSTCTR0_RHST_Pos)   /*  Low-speed connection */
-#define LINK_REG_DVSTCTR0_RHST_FS          (2U << LINK_REG_DVSTCTR0_RHST_Pos)   /*  Full-speed connection */
+#define RUSB2_DVSTCTR0_RHST_LS          (1U << RUSB2_DVSTCTR0_RHST_Pos)   /*  Low-speed connection */
+#define RUSB2_DVSTCTR0_RHST_FS          (2U << RUSB2_DVSTCTR0_RHST_Pos)   /*  Full-speed connection */
 
-#define LINK_REG_DEVADD_USBSPD_LS          (1U << LINK_REG_DEVADD_USBSPD_Pos)   /* Target Device Low-speed */
-#define LINK_REG_DEVADD_USBSPD_FS          (2U << LINK_REG_DEVADD_USBSPD_Pos)   /* Target Device Full-speed */
+#define RUSB2_DEVADD_USBSPD_LS          (1U << RUSB2_DEVADD_USBSPD_Pos)   /* Target Device Low-speed */
+#define RUSB2_DEVADD_USBSPD_FS          (2U << RUSB2_DEVADD_USBSPD_Pos)   /* Target Device Full-speed */
 
-#define LINK_REG_CFIFOSEL_ISEL_WRITE       (1U << LINK_REG_CFIFOSEL_ISEL_Pos)   /* FIFO write AKA TX*/
+#define RUSB2_CFIFOSEL_ISEL_WRITE       (1U << RUSB2_CFIFOSEL_ISEL_Pos)   /* FIFO write AKA TX*/
 
-#define LINK_REG_FIFOSEL_BIGEND            (1U << LINK_REG_CFIFOSEL_BIGEND_Pos) /* FIFO Big Endian */
-#define LINK_REG_FIFOSEL_MBW_8BIT          (0U << LINK_REG_CFIFOSEL_MBW_Pos)    /* 8-bit width */
-#define LINK_REG_FIFOSEL_MBW_16BIT         (1U << LINK_REG_CFIFOSEL_MBW_Pos)    /* 16-bit width */
+#define RUSB2_FIFOSEL_BIGEND            (1U << RUSB2_CFIFOSEL_BIGEND_Pos) /* FIFO Big Endian */
+#define RUSB2_FIFOSEL_MBW_8BIT          (0U << RUSB2_CFIFOSEL_MBW_Pos)    /* 8-bit width */
+#define RUSB2_FIFOSEL_MBW_16BIT         (1U << RUSB2_CFIFOSEL_MBW_Pos)    /* 16-bit width */
 
-#define LINK_REG_INTSTS0_CTSQ_CTRL_RDATA   (1U << LINK_REG_INTSTS0_CTSQ_Pos)
+#define RUSB2_INTSTS0_CTSQ_CTRL_RDATA   (1U << RUSB2_INTSTS0_CTSQ_Pos)
 
-#define LINK_REG_INTSTS0_DVSQ_STATE_DEF    (1U << LINK_REG_INTSTS0_DVSQ_Pos)    /* Default state */
-#define LINK_REG_INTSTS0_DVSQ_STATE_ADDR   (2U << LINK_REG_INTSTS0_DVSQ_Pos)    /* Address state */
-#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP0  (4U << LINK_REG_INTSTS0_DVSQ_Pos)    /* Suspend state */
-#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP1  (5U << LINK_REG_INTSTS0_DVSQ_Pos)    /* Suspend state */
-#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP2  (6U << LINK_REG_INTSTS0_DVSQ_Pos)    /* Suspend state */
-#define LINK_REG_INTSTS0_DVSQ_STATE_SUSP3  (7U << LINK_REG_INTSTS0_DVSQ_Pos)    /* Suspend state */
+#define RUSB2_INTSTS0_DVSQ_STATE_DEF    (1U << RUSB2_INTSTS0_DVSQ_Pos)    /* Default state */
+#define RUSB2_INTSTS0_DVSQ_STATE_ADDR   (2U << RUSB2_INTSTS0_DVSQ_Pos)    /* Address state */
+#define RUSB2_INTSTS0_DVSQ_STATE_SUSP0  (4U << RUSB2_INTSTS0_DVSQ_Pos)    /* Suspend state */
+#define RUSB2_INTSTS0_DVSQ_STATE_SUSP1  (5U << RUSB2_INTSTS0_DVSQ_Pos)    /* Suspend state */
+#define RUSB2_INTSTS0_DVSQ_STATE_SUSP2  (6U << RUSB2_INTSTS0_DVSQ_Pos)    /* Suspend state */
+#define RUSB2_INTSTS0_DVSQ_STATE_SUSP3  (7U << RUSB2_INTSTS0_DVSQ_Pos)    /* Suspend state */
 
-#define LINK_REG_PIPECFG_TYPE_BULK         (1U << LINK_REG_PIPECFG_TYPE_Pos)
-#define LINK_REG_PIPECFG_TYPE_INT          (2U << LINK_REG_PIPECFG_TYPE_Pos)
-#define LINK_REG_PIPECFG_TYPE_ISO          (3U << LINK_REG_PIPECFG_TYPE_Pos)
+#define RUSB2_PIPECFG_TYPE_BULK         (1U << RUSB2_PIPECFG_TYPE_Pos)
+#define RUSB2_PIPECFG_TYPE_INT          (2U << RUSB2_PIPECFG_TYPE_Pos)
+#define RUSB2_PIPECFG_TYPE_ISO          (3U << RUSB2_PIPECFG_TYPE_Pos)
 
 //--------------------------------------------------------------------+
 // Static Assert
 //--------------------------------------------------------------------+
 
-TU_VERIFY_STATIC(sizeof(LINK_REG_PIPE_TR_t) == 4, "incorrect size");
+TU_VERIFY_STATIC(sizeof(RUSB2_PIPE_TR_t) == 4, "incorrect size");
 
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, SYSCFG     ) == 0x00000000, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, BUSWAIT    ) == 0x00000002, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, SYSSTS0    ) == 0x00000004, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PLLSTA     ) == 0x00000006, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DVSTCTR0   ) == 0x00000008, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, TESTMODE   ) == 0x0000000C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFO      ) == 0x00000014, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFO     ) == 0x00000018, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFO     ) == 0x0000001C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFOSEL   ) == 0x00000020, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, CFIFOCTR   ) == 0x00000022, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFOSEL  ) == 0x00000028, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, D0FIFOCTR  ) == 0x0000002A, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFOSEL  ) == 0x0000002C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, D1FIFOCTR  ) == 0x0000002E, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTENB0    ) == 0x00000030, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTENB1    ) == 0x00000032, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, BRDYENB    ) == 0x00000036, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, NRDYENB    ) == 0x00000038, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, BEMPENB    ) == 0x0000003A, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, SOFCFG     ) == 0x0000003C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PHYSET     ) == 0x0000003E, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTSTS0    ) == 0x00000040, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, INTSTS1    ) == 0x00000042, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, BRDYSTS    ) == 0x00000046, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, NRDYSTS    ) == 0x00000048, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, BEMPSTS    ) == 0x0000004A, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, FRMNUM     ) == 0x0000004C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, UFRMNUM    ) == 0x0000004E, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBADDR    ) == 0x00000050, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBREQ     ) == 0x00000054, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBVAL     ) == 0x00000056, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBINDX    ) == 0x00000058, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBLENG    ) == 0x0000005A, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPCFG     ) == 0x0000005C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPMAXP    ) == 0x0000005E, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DCPCTR     ) == 0x00000060, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPESEL    ) == 0x00000064, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPECFG    ) == 0x00000068, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPEMAXP   ) == 0x0000006C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPEPERI   ) == 0x0000006E, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPE_CTR   ) == 0x00000070, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PIPE_TR    ) == 0x00000090, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBBCCTRL0 ) == 0x000000B0, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, UCKSEL     ) == 0x000000C4, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, USBMC      ) == 0x000000CC, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DEVADD     ) == 0x000000D0, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PHYSLEW    ) == 0x000000F0, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, LPCTRL     ) == 0x00000100, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, LPSTS      ) == 0x00000102, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, BCCTRL     ) == 0x00000140, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PL1CTRL1   ) == 0x00000144, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, PL1CTRL2   ) == 0x00000146, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, HL1CTRL1   ) == 0x00000148, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, HL1CTRL2   ) == 0x0000014A, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR0R    ) == 0x00000160, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR1R    ) == 0x00000164, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR2R    ) == 0x00000168, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSRCR    ) == 0x0000016A, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR0R_FS ) == 0x00000400, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(LINK_REG_t, DPUSR1R_FS ) == 0x00000404, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, SYSCFG     ) == 0x00000000, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, BUSWAIT    ) == 0x00000002, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, SYSSTS0    ) == 0x00000004, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PLLSTA     ) == 0x00000006, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DVSTCTR0   ) == 0x00000008, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, TESTMODE   ) == 0x0000000C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, CFIFO      ) == 0x00000014, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, D0FIFO     ) == 0x00000018, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, D1FIFO     ) == 0x0000001C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, CFIFOSEL   ) == 0x00000020, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, CFIFOCTR   ) == 0x00000022, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, D0FIFOSEL  ) == 0x00000028, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, D0FIFOCTR  ) == 0x0000002A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, D1FIFOSEL  ) == 0x0000002C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, D1FIFOCTR  ) == 0x0000002E, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, INTENB0    ) == 0x00000030, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, INTENB1    ) == 0x00000032, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, BRDYENB    ) == 0x00000036, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, NRDYENB    ) == 0x00000038, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, BEMPENB    ) == 0x0000003A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, SOFCFG     ) == 0x0000003C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PHYSET     ) == 0x0000003E, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, INTSTS0    ) == 0x00000040, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, INTSTS1    ) == 0x00000042, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, BRDYSTS    ) == 0x00000046, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, NRDYSTS    ) == 0x00000048, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, BEMPSTS    ) == 0x0000004A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, FRMNUM     ) == 0x0000004C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, UFRMNUM    ) == 0x0000004E, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBADDR    ) == 0x00000050, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBREQ     ) == 0x00000054, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBVAL     ) == 0x00000056, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBINDX    ) == 0x00000058, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBLENG    ) == 0x0000005A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DCPCFG     ) == 0x0000005C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DCPMAXP    ) == 0x0000005E, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DCPCTR     ) == 0x00000060, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PIPESEL    ) == 0x00000064, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PIPECFG    ) == 0x00000068, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PIPEMAXP   ) == 0x0000006C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PIPEPERI   ) == 0x0000006E, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PIPE_CTR   ) == 0x00000070, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PIPE_TR    ) == 0x00000090, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBBCCTRL0 ) == 0x000000B0, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, UCKSEL     ) == 0x000000C4, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBMC      ) == 0x000000CC, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DEVADD     ) == 0x000000D0, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PHYSLEW    ) == 0x000000F0, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, LPCTRL     ) == 0x00000100, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, LPSTS      ) == 0x00000102, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, BCCTRL     ) == 0x00000140, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PL1CTRL1   ) == 0x00000144, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PL1CTRL2   ) == 0x00000146, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, HL1CTRL1   ) == 0x00000148, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, HL1CTRL2   ) == 0x0000014A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DPUSR0R    ) == 0x00000160, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DPUSR1R    ) == 0x00000164, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DPUSR2R    ) == 0x00000168, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DPUSRCR    ) == 0x0000016A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DPUSR0R_FS ) == 0x00000400, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DPUSR1R_FS ) == 0x00000404, "incorrect offset");
 
 #ifdef __cplusplus
 }

From 2a10d5c20bf3dd504f51b010321fc6b72bf1bb35 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 16 Mar 2023 11:39:53 +0700
Subject: [PATCH 152/691] rename ra  board name

---
 hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/board.mk                | 2 +-
 hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/fsp_cfg/bsp_cfg.h       | 0
 hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/fsp_cfg/bsp_clock_cfg.h | 0
 .../boards/{ek_ra4m3 => ra4m3_ek}/fsp_cfg/bsp_mcu_family_cfg.h  | 0
 hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/fsp_cfg/r_ioport_cfg.h  | 0
 hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/fsp_cfg/vector_data.h   | 0
 hw/bsp/ra/boards/{ek_ra4m3/ek_ra4m3.c => ra4m3_ek/ra4m3_ek.c}   | 0
 hw/bsp/ra/boards/{ek_ra4m3/ek_ra4m3.ld => ra4m3_ek/ra4m3_ek.ld} | 0
 8 files changed, 1 insertion(+), 1 deletion(-)
 rename hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/board.mk (90%)
 rename hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/fsp_cfg/bsp_cfg.h (100%)
 rename hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/fsp_cfg/bsp_clock_cfg.h (100%)
 rename hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/fsp_cfg/bsp_mcu_family_cfg.h (100%)
 rename hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/fsp_cfg/r_ioport_cfg.h (100%)
 rename hw/bsp/ra/boards/{ek_ra4m3 => ra4m3_ek}/fsp_cfg/vector_data.h (100%)
 rename hw/bsp/ra/boards/{ek_ra4m3/ek_ra4m3.c => ra4m3_ek/ra4m3_ek.c} (100%)
 rename hw/bsp/ra/boards/{ek_ra4m3/ek_ra4m3.ld => ra4m3_ek/ra4m3_ek.ld} (100%)
 mode change 100755 => 100644

diff --git a/hw/bsp/ra/boards/ek_ra4m3/board.mk b/hw/bsp/ra/boards/ra4m3_ek/board.mk
similarity index 90%
rename from hw/bsp/ra/boards/ek_ra4m3/board.mk
rename to hw/bsp/ra/boards/ra4m3_ek/board.mk
index 19f293e54..61a7c5c4a 100644
--- a/hw/bsp/ra/boards/ek_ra4m3/board.mk
+++ b/hw/bsp/ra/boards/ra4m3_ek/board.mk
@@ -8,7 +8,7 @@ FSP_MCU_DIR = hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/ra4m3
 FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m3_ek
 
 # All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/ek_ra4m3.ld
+LD_FILE = $(BOARD_PATH)/ra4m3_ek.ld
 
 # For flash-jlink target
 JLINK_DEVICE = R7FA4M3AF
diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_cfg.h
similarity index 100%
rename from hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_cfg.h
rename to hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_cfg.h
diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_clock_cfg.h
similarity index 100%
rename from hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_clock_cfg.h
rename to hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_clock_cfg.h
diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_mcu_family_cfg.h
similarity index 100%
rename from hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/bsp_mcu_family_cfg.h
rename to hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_mcu_family_cfg.h
diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/r_ioport_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/r_ioport_cfg.h
similarity index 100%
rename from hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/r_ioport_cfg.h
rename to hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/r_ioport_cfg.h
diff --git a/hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/vector_data.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/vector_data.h
similarity index 100%
rename from hw/bsp/ra/boards/ek_ra4m3/fsp_cfg/vector_data.h
rename to hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/vector_data.h
diff --git a/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c b/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c
similarity index 100%
rename from hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.c
rename to hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c
diff --git a/hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.ld b/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld
old mode 100755
new mode 100644
similarity index 100%
rename from hw/bsp/ra/boards/ek_ra4m3/ek_ra4m3.ld
rename to hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld

From e0b1de923c5411417d7818fe0611b3041b2ff2d4 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 16 Mar 2023 22:39:00 +0700
Subject: [PATCH 153/691] add ra4m1_ek board

---
 docs/reference/supported.rst                  |  13 +-
 hw/bsp/ra/boards/ra4m1_ek/board.mk            |  17 +
 hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h   |  35 +
 .../boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h   |  21 +
 .../ra4m1_ek/fsp_cfg/bsp_mcu_device_cfg.h     |   5 +
 .../ra4m1_ek/fsp_cfg/bsp_mcu_device_pn_cfg.h  |  11 +
 .../ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h     |  78 ++
 .../ra/boards/ra4m1_ek/fsp_cfg/r_ioport_cfg.h |   7 +
 .../ra/boards/ra4m1_ek/fsp_cfg/vector_data.h  |   5 +
 hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c          | 232 ++++++
 hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld         | 738 ++++++++++++++++++
 hw/bsp/ra/boards/ra4m3_ek/board.mk            |   2 +
 hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c          |  18 +-
 13 files changed, 1172 insertions(+), 10 deletions(-)
 create mode 100644 hw/bsp/ra/boards/ra4m1_ek/board.mk
 create mode 100644 hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_pn_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/r_ioport_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/vector_data.h
 create mode 100644 hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c
 create mode 100644 hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld

diff --git a/docs/reference/supported.rst b/docs/reference/supported.rst
index ae16d361d..b3f3f41d3 100644
--- a/docs/reference/supported.rst
+++ b/docs/reference/supported.rst
@@ -297,8 +297,17 @@ LPC55
 -  `LPCXpresso 55s69 EVK <https://www.nxp.com/design/development-boards/lpcxpresso-boards/lpcxpresso55s69-development-board:LPC55S69-EVK>`__
 -  `MCU-Link <https://www.nxp.com/design/development-boards/lpcxpresso-boards/mcu-link-debug-probe:MCU-LINK>`__
 
-Renesas RX
-----------
+Renesas
+-------
+
+RA
+^^
+
+-  `Evaluation Kit for RA4M1 <https://www.renesas.com/us/en/products/microcontrollers-microprocessors/ra-cortex-m-mcus/ek-ra4m1-evaluation-kit-ra4m1-mcu-group>`__
+-  `Evaluation Kit for RA4M3 <https://www.renesas.com/us/en/products/microcontrollers-microprocessors/ra-cortex-m-mcus/ek-ra4m3-evaluation-kit-ra4m3-mcu-group>`__
+
+RX
+^^
 
 -  `GR-CITRUS <https://www.renesas.com/us/en/products/gadget-renesas/boards/gr-citrus>`__
 -  `Renesas RX65N Target Board <https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rx-32-bit-performance-efficiency-mcus/rtk5rx65n0c00000br-target-board-rx65n>`__
diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.mk b/hw/bsp/ra/boards/ra4m1_ek/board.mk
new file mode 100644
index 000000000..6a661c0b8
--- /dev/null
+++ b/hw/bsp/ra/boards/ra4m1_ek/board.mk
@@ -0,0 +1,17 @@
+CFLAGS += \
+	-mcpu=cortex-m4 \
+	-mfloat-abi=hard \
+	-mfpu=fpv4-sp-d16 \
+	-DCFG_TUSB_MCU=OPT_MCU_RAXXX
+
+FSP_MCU_DIR = hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/ra4m1
+FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m1_ek
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/ra4m1_ek.ld
+
+# For flash-jlink target
+JLINK_DEVICE = R7FA4M1AB
+JLINK_IF     = SWD
+
+flash: flash-jlink
diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h
new file mode 100644
index 000000000..b38a79b40
--- /dev/null
+++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h
@@ -0,0 +1,35 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_CFG_H_
+#define BSP_CFG_H_
+
+#include "board.h"
+#include "bsp_clock_cfg.h"
+#include "bsp_mcu_family_cfg.h"
+
+#undef RA_NOT_DEFINED
+#define BSP_CFG_RTOS (0)
+#if defined(_RA_BOOT_IMAGE)
+#define BSP_CFG_BOOT_IMAGE (1)
+#endif
+#define BSP_CFG_MCU_VCC_MV (3300)
+#define BSP_CFG_STACK_MAIN_BYTES (0x400)
+#define BSP_CFG_HEAP_BYTES (0x1000)
+#define BSP_CFG_PARAM_CHECKING_ENABLE (1)
+#define BSP_CFG_ASSERT (0)
+#define BSP_CFG_ERROR_LOG (0)
+
+#define BSP_CFG_PFS_PROTECT ((1))
+
+#define BSP_CFG_C_RUNTIME_INIT ((1))
+#define BSP_CFG_EARLY_INIT     ((0))
+
+#define BSP_CFG_STARTUP_CLOCK_REG_NOT_RESET ((0))
+
+#define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (1)
+
+#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE	(0)
+#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE		(0)
+#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED	(1)
+#define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000
+
+#endif /* BSP_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h
new file mode 100644
index 000000000..930fa3547
--- /dev/null
+++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h
@@ -0,0 +1,21 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_CLOCK_CFG_H_
+#define BSP_CLOCK_CFG_H_
+#define BSP_CFG_CLOCKS_SECURE (0)
+#define BSP_CFG_CLOCKS_OVERRIDE (0)
+#define BSP_CFG_XTAL_HZ (12000000) /* XTAL 12000000Hz */
+#define BSP_CFG_PLL_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL Src: XTAL */
+#define BSP_CFG_HOCO_FREQUENCY (0) /* HOCO 24MHz */
+#define BSP_CFG_PLL_DIV (BSP_CLOCKS_PLL_DIV_2) /* PLL Div /2 */
+#define BSP_CFG_PLL_MUL (BSP_CLOCKS_PLL_MUL_8_0) /* PLL Mul x8 */
+#define BSP_CFG_CLOCK_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_PLL) /* Clock Src: PLL */
+#define BSP_CFG_ICLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* ICLK Div /1 */
+#define BSP_CFG_PCLKA_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* PCLKA Div /1 */
+#define BSP_CFG_PCLKB_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* PCLKB Div /2 */
+#define BSP_CFG_PCLKC_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* PCLKC Div /1 */
+#define BSP_CFG_PCLKD_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* PCLKD Div /1 */
+#define BSP_CFG_FCLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* FCLK Div /2 */
+#define BSP_CFG_CLKOUT_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* CLKOUT Disabled */
+#define BSP_CFG_CLKOUT_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* CLKOUT Div /1 */
+#define BSP_CFG_UCK_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_PLL) /* UCLK Src: PLL */
+#endif /* BSP_CLOCK_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_cfg.h
new file mode 100644
index 000000000..444d32e56
--- /dev/null
+++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_cfg.h
@@ -0,0 +1,5 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_MCU_DEVICE_CFG_H_
+#define BSP_MCU_DEVICE_CFG_H_
+#define BSP_CFG_MCU_PART_SERIES (4)
+#endif /* BSP_MCU_DEVICE_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_pn_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_pn_cfg.h
new file mode 100644
index 000000000..d810dabb2
--- /dev/null
+++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_pn_cfg.h
@@ -0,0 +1,11 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_MCU_DEVICE_PN_CFG_H_
+#define BSP_MCU_DEVICE_PN_CFG_H_
+#define BSP_MCU_R7FA4M1AB3CFP
+#define BSP_MCU_FEATURE_SET ('A')
+#define BSP_ROM_SIZE_BYTES (262144)
+#define BSP_RAM_SIZE_BYTES (32768)
+#define BSP_DATA_FLASH_SIZE_BYTES (8192)
+#define BSP_PACKAGE_LQFP
+#define BSP_PACKAGE_PINS (100)
+#endif /* BSP_MCU_DEVICE_PN_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h
new file mode 100644
index 000000000..3bde2db0d
--- /dev/null
+++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h
@@ -0,0 +1,78 @@
+/* generated configuration header file through renesas e2 studio */
+#ifndef BSP_MCU_FAMILY_CFG_H_
+#define BSP_MCU_FAMILY_CFG_H_
+
+#include "bsp_mcu_device_pn_cfg.h"
+#include "bsp_mcu_device_cfg.h"
+#include "bsp_mcu_info.h"
+#include "bsp_clock_cfg.h"
+
+#define BSP_MCU_GROUP_RA4M1 (1)
+#define BSP_LOCO_HZ                 (32768)
+#define BSP_MOCO_HZ                 (8000000)
+#define BSP_SUB_CLOCK_HZ            (32768)
+#if   BSP_CFG_HOCO_FREQUENCY == 0
+#define BSP_HOCO_HZ             (24000000)
+#elif BSP_CFG_HOCO_FREQUENCY == 2
+                #define BSP_HOCO_HZ             (32000000)
+            #elif BSP_CFG_HOCO_FREQUENCY == 4
+                #define BSP_HOCO_HZ             (48000000)
+            #elif BSP_CFG_HOCO_FREQUENCY == 5
+                #define BSP_HOCO_HZ             (64000000)
+            #else
+                #error "Invalid HOCO frequency chosen (BSP_CFG_HOCO_FREQUENCY) in bsp_clock_cfg.h"
+            #endif
+#define BSP_CORTEX_VECTOR_TABLE_ENTRIES    (16U)
+#define BSP_VECTOR_TABLE_MAX_ENTRIES       (48U)
+
+#define OFS_SEQ1 0xA001A001 | (1 << 1) | (3 << 2)
+#define OFS_SEQ2 (15 << 4) | (3 << 8) | (3 << 10)
+#define OFS_SEQ3 (1 << 12) | (1 << 14) | (1 << 17)
+#define OFS_SEQ4 (3 << 18) |(15 << 20) | (3 << 24) | (3 << 26)
+#define OFS_SEQ5 (1 << 28) | (1 << 30)
+#define BSP_CFG_ROM_REG_OFS0 (OFS_SEQ1 | OFS_SEQ2 | OFS_SEQ3 | OFS_SEQ4 | OFS_SEQ5)
+#define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEC3 | (1 << 2) | (3 << 3) | (0 << 8))
+#define BSP_CFG_USE_LOW_VOLTAGE_MODE ((0))
+#define BSP_CFG_ROM_REG_MPU_PC0_ENABLE (1)
+#define BSP_CFG_ROM_REG_MPU_PC0_START (0x00FFFFFC)
+#define BSP_CFG_ROM_REG_MPU_PC0_END (0x00FFFFFF)
+#define BSP_CFG_ROM_REG_MPU_PC1_ENABLE (1)
+#define BSP_CFG_ROM_REG_MPU_PC1_START (0x00FFFFFC)
+#define BSP_CFG_ROM_REG_MPU_PC1_END (0x00FFFFFF)
+#define BSP_CFG_ROM_REG_MPU_REGION0_ENABLE (1)
+#define BSP_CFG_ROM_REG_MPU_REGION0_START (0x00FFFFFC)
+#define BSP_CFG_ROM_REG_MPU_REGION0_END (0x00FFFFFF)
+#define BSP_CFG_ROM_REG_MPU_REGION1_ENABLE (1)
+#define BSP_CFG_ROM_REG_MPU_REGION1_START (0x200FFFFC)
+#define BSP_CFG_ROM_REG_MPU_REGION1_END (0x200FFFFF)
+#define BSP_CFG_ROM_REG_MPU_REGION2_ENABLE (1)
+#define BSP_CFG_ROM_REG_MPU_REGION2_START (0x407FFFFC)
+#define BSP_CFG_ROM_REG_MPU_REGION2_END (0x407FFFFF)
+#define BSP_CFG_ROM_REG_MPU_REGION3_ENABLE (1)
+#define BSP_CFG_ROM_REG_MPU_REGION3_START (0x400DFFFC)
+#define BSP_CFG_ROM_REG_MPU_REGION3_END (0x400DFFFF)
+#ifndef BSP_CLOCK_CFG_MAIN_OSC_WAIT
+#define BSP_CLOCK_CFG_MAIN_OSC_WAIT (9)
+#endif
+/* Used to create IELS values for the interrupt initialization table g_interrupt_event_link_select. */
+#define BSP_PRV_IELS_ENUM(vector)    (ELC_ ## vector)
+
+/*
+ ID Code
+ Note: To permanently lock and disable the debug interface define the BSP_ID_CODE_PERMANENTLY_LOCKED in the compiler settings.
+ WARNING: This will disable debug access to the part and cannot be reversed by a debug probe.
+ */
+#if defined(BSP_ID_CODE_PERMANENTLY_LOCKED)
+            #define BSP_CFG_ID_CODE_LONG_1 (0x00000000)
+            #define BSP_CFG_ID_CODE_LONG_2 (0x00000000)
+            #define BSP_CFG_ID_CODE_LONG_3 (0x00000000)
+            #define BSP_CFG_ID_CODE_LONG_4 (0x00000000)
+            #else
+/* ID CODE: FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF */
+#define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF)
+#define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF)
+#define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF)
+#define BSP_CFG_ID_CODE_LONG_4 (0xffFFFFFF)
+#endif
+
+#endif /* BSP_MCU_FAMILY_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/r_ioport_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/r_ioport_cfg.h
new file mode 100644
index 000000000..cb7c07932
--- /dev/null
+++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/r_ioport_cfg.h
@@ -0,0 +1,7 @@
+/* generated configuration header file - do not edit */
+#ifndef R_IOPORT_CFG_H_
+#define R_IOPORT_CFG_H_
+
+#define IOPORT_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
+
+#endif /* R_IOPORT_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/vector_data.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/vector_data.h
new file mode 100644
index 000000000..37739c12a
--- /dev/null
+++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/vector_data.h
@@ -0,0 +1,5 @@
+/* vector numbers are configurable/dynamic, hence this, it will be used inside the port */
+#define TU_IRQn 0
+#define USBFS_RESUME_IRQn 1
+#define USBFS_FIFO_0_IRQn 2
+#define USBFS_FIFO_1_IRQn 3
diff --git a/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c b/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c
new file mode 100644
index 000000000..ea2204837
--- /dev/null
+++ b/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c
@@ -0,0 +1,232 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2022, Rafael Silva
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include <stdio.h>
+
+#include "bsp/board.h"
+#include "bsp_api.h"
+#include "r_ioport.h"
+#include "r_ioport_api.h"
+#include "renesas.h"
+
+/* Key code for writing PRCR register. */
+#define BSP_PRV_PRCR_KEY	 (0xA500U)
+#define BSP_PRV_PRCR_PRC1_UNLOCK ((BSP_PRV_PRCR_KEY) | 0x2U)
+#define BSP_PRV_PRCR_LOCK	 ((BSP_PRV_PRCR_KEY) | 0x0U)
+
+#define SW1  (BSP_IO_PORT_01_PIN_05)
+#define LED1 (BSP_IO_PORT_01_PIN_06)
+
+#define LED_STATE_ON          1
+#define BUTTON_STATE_ACTIVE   0
+
+/* ISR prototypes */
+void usbfs_interrupt_handler(void);
+void usbfs_resume_handler(void);
+void usbfs_d0fifo_handler(void);
+void usbfs_d1fifo_handler(void);
+
+BSP_DONT_REMOVE const
+  fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = {
+    [0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */
+    [1] = usbfs_resume_handler,    /* USBFS RESUME (USBFS resume interrupt) */
+    [2] = usbfs_d0fifo_handler,    /* USBFS FIFO 0 (DMA transfer request 0) */
+    [3] = usbfs_d1fifo_handler,    /* USBFS FIFO 1 (DMA transfer request 1) */
+};
+const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENTRIES] = {
+  [0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT),    /* USBFS INT (USBFS interrupt) */
+  [1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */
+  [2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */
+  [3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1)  /* USBFS FIFO 1 (DMA transfer request 1) */
+};
+
+const ioport_pin_cfg_t g_bsp_pin_cfg_data[] = {
+  { .pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW) },
+  { .pin = SW1 , .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT) },
+
+  { .pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) },
+  { .pin = BSP_IO_PORT_09_PIN_14, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) },
+  { .pin = BSP_IO_PORT_09_PIN_15, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) },
+
+};
+
+const ioport_cfg_t g_bsp_pin_cfg = {
+  .number_of_pins = sizeof(g_bsp_pin_cfg_data) / sizeof(ioport_pin_cfg_t),
+  .p_pin_cfg_data = &g_bsp_pin_cfg_data[0],
+};
+ioport_instance_ctrl_t g_ioport_ctrl;
+const ioport_instance_t g_ioport = {.p_api = &g_ioport_on_ioport, .p_ctrl = &g_ioport_ctrl, .p_cfg = &g_bsp_pin_cfg};
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void usbfs_interrupt_handler(void)
+{
+  IRQn_Type irq = R_FSP_CurrentIrqGet();
+  R_BSP_IrqStatusClear(irq);
+
+#if CFG_TUH_ENABLED
+  tuh_int_handler(0);
+#endif
+
+#if CFG_TUD_ENABLED
+  tud_int_handler(0);
+#endif
+}
+
+void usbfs_resume_handler(void)
+{
+  IRQn_Type irq = R_FSP_CurrentIrqGet();
+  R_BSP_IrqStatusClear(irq);
+
+#if CFG_TUH_ENABLED
+  tuh_int_handler(0);
+#endif
+
+#if CFG_TUD_ENABLED
+  tud_int_handler(0);
+#endif
+}
+
+void usbfs_d0fifo_handler(void)
+{
+  IRQn_Type irq = R_FSP_CurrentIrqGet();
+  R_BSP_IrqStatusClear(irq);
+
+#if CFG_TUH_ENABLED
+  tuh_int_handler(0);
+#endif
+
+#if CFG_TUD_ENABLED
+  tud_int_handler(0);
+#endif
+}
+
+void usbfs_d1fifo_handler(void)
+{
+  IRQn_Type irq = R_FSP_CurrentIrqGet();
+  R_BSP_IrqStatusClear(irq);
+
+#if CFG_TUH_ENABLED
+  tuh_int_handler(0);
+#endif
+
+#if CFG_TUD_ENABLED
+  tud_int_handler(0);
+#endif
+}
+
+void board_init(void)
+{
+  /* Configure pins. */
+  R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg);
+
+  /* Enable USB_BASE */
+  R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_PRC1_UNLOCK;
+  R_MSTP->MSTPCRB &= ~(1U << 11U);
+  R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK;
+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+#endif
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+  /* Init systick */
+  SysTick_Config(SystemCoreClock / 1000);
+#endif
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+  R_IOPORT_PinWrite(&g_ioport_ctrl, LED1, state ? LED_STATE_ON : !LED_STATE_ON);
+}
+
+uint32_t board_button_read(void)
+{
+  bsp_io_level_t lvl;
+  R_IOPORT_PinRead(&g_ioport_ctrl, SW1, &lvl);
+  return lvl == BUTTON_STATE_ACTIVE;
+}
+
+int board_uart_read(uint8_t *buf, int len)
+{
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+int board_uart_write(void const *buf, int len)
+{
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler(void)
+{
+  system_ticks++;
+}
+
+uint32_t board_millis(void)
+{
+  return system_ticks;
+}
+#else
+#endif
+
+int close(int fd)
+{
+  (void) fd;
+  return -1;
+}
+int fstat(int fd, void *pstat)
+{
+  (void) fd;
+  (void) pstat;
+  return 0;
+}
+off_t lseek(int fd, off_t pos, int whence)
+{
+  (void) fd;
+  (void) pos;
+  (void) whence;
+  return 0;
+}
+int isatty(int fd)
+{
+  (void) fd;
+  return 1;
+}
diff --git a/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld b/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld
new file mode 100644
index 000000000..8ddaa0a97
--- /dev/null
+++ b/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld
@@ -0,0 +1,738 @@
+/* generated memory regions file - do not edit */
+RAM_START = 0x20000000;
+RAM_LENGTH = 0x8000;
+FLASH_START = 0x00000000;
+FLASH_LENGTH = 0x40000;
+DATA_FLASH_START = 0x40100000;
+DATA_FLASH_LENGTH = 0x2000;
+OPTION_SETTING_START = 0x00000000;
+OPTION_SETTING_LENGTH = 0x0;
+OPTION_SETTING_S_START = 0x80000000;
+OPTION_SETTING_S_LENGTH = 0x0;
+ID_CODE_START = 0x01010018;
+ID_CODE_LENGTH = 0x20;
+SDRAM_START = 0x80010000;
+SDRAM_LENGTH = 0x0;
+QSPI_FLASH_START = 0x60000000;
+QSPI_FLASH_LENGTH = 0x0;
+OSPI_DEVICE_0_START = 0x80020000;
+OSPI_DEVICE_0_LENGTH = 0x0;
+OSPI_DEVICE_1_START = 0x80030000;
+OSPI_DEVICE_1_LENGTH = 0x0;
+
+/*
+                  Linker File for Renesas FSP
+*/
+
+/* Uncomment and set XIP_SECONDARY_SLOT_IMAGE to 1 below for the secondary XIP application image.*/
+/*
+ XIP_SECONDARY_SLOT_IMAGE = 1;
+*/
+
+QSPI_FLASH_PRV_LENGTH = DEFINED(QSPI_FLASH_SIZE) ? ABSOLUTE(QSPI_FLASH_SIZE) : ABSOLUTE(QSPI_FLASH_LENGTH);
+OSPI_DEVICE_0_PRV_LENGTH = DEFINED(OSPI_DEVICE_0_SIZE) ? ABSOLUTE(OSPI_DEVICE_0_SIZE) : ABSOLUTE(OSPI_DEVICE_0_LENGTH);
+OSPI_DEVICE_1_PRV_LENGTH = DEFINED(OSPI_DEVICE_1_SIZE) ? ABSOLUTE(OSPI_DEVICE_1_SIZE) : ABSOLUTE(OSPI_DEVICE_1_LENGTH);
+
+/* If a flat (secure) project has DEFINED RAM_NS_BUFFER_LENGTH, then emit IDAU symbols to allocate non-secure RAM. */
+__RESERVE_NS_RAM = !DEFINED(PROJECT_NONSECURE) && DEFINED(RAM_NS_BUFFER_LENGTH) && (OPTION_SETTING_S_LENGTH != 0);
+
+ITCM_START = DEFINED(ITCM_START)? ITCM_START : 0;
+ITCM_LENGTH = DEFINED(ITCM_LENGTH)? ITCM_LENGTH : 0;
+DTCM_START = DEFINED(DTCM_START)? DTCM_START : 0;
+DTCM_LENGTH = DEFINED(DTCM_LENGTH)? DTCM_LENGTH : 0;
+NS_OFFSET_START = DEFINED(NS_OFFSET_START) ? NS_OFFSET_START : 0;
+NS_IMAGE_OFFSET = DEFINED(PROJECT_NONSECURE) ? NS_OFFSET_START : 0;
+RAM_NS_BUFFER_BLOCK_LENGTH = DEFINED(RAM_NS_BUFFER_LENGTH) ? ALIGN(RAM_NS_BUFFER_LENGTH, 8192) : 0;
+RAM_NS_BUFFER_LENGTH = DEFINED(RAM_NS_BUFFER_LENGTH) ? RAM_NS_BUFFER_LENGTH : 0;
+RAM_NS_BUFFER_START = RAM_START + RAM_LENGTH - RAM_NS_BUFFER_LENGTH;
+RAM_NS_BUFFER_BLOCK_START = RAM_START + RAM_LENGTH - RAM_NS_BUFFER_BLOCK_LENGTH;
+
+OPTION_SETTING_START_NS = DEFINED(PROJECT_NONSECURE) ? OPTION_SETTING_START : OPTION_SETTING_START + 0x80;
+
+/* This definition is used to avoid moving the counter in OPTION_SETTING regions for projects that should not configure option settings.
+ * Bootloader images do not configure option settings because they are owned by the bootloader.
+ * FSP_BOOTABLE_IMAGE is only defined in bootloader images. */
+__bl_FSP_BOOTABLE_IMAGE = 1;
+__bln_FSP_BOOTABLE_IMAGE = 1;
+PROJECT_SECURE_OR_FLAT = (!DEFINED(PROJECT_NONSECURE) || DEFINED(PROJECT_SECURE)) && OPTION_SETTING_LENGTH && !DEFINED(FSP_BOOTABLE_IMAGE);
+USE_OPTION_SETTING_NS = DEFINED(PROJECT_NONSECURE) && !DEFINED(FSP_BOOTABLE_IMAGE);
+
+__bl_FLASH_IMAGE_START = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 :
+                         FLASH_APPLICATION_IMAGE_NUMBER == 1 ? FLASH_BOOTLOADER_LENGTH + FLASH_BOOTLOADER_HEADER_LENGTH :
+                         FLASH_BOOTLOADER_LENGTH + FLASH_BOOTLOADER_SCRATCH_LENGTH + FLASH_APPLICATION_S_LENGTH + FLASH_BOOTLOADER_HEADER_LENGTH;
+__bl_FLASH_IMAGE_LENGTH = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 :
+                          FLASH_APPLICATION_S_LENGTH - FLASH_BOOTLOADER_HEADER_LENGTH;
+__bl_FLASH_IMAGE_END    = __bl_FLASH_IMAGE_START + __bl_FLASH_IMAGE_LENGTH;
+__bl_XIP_SECONDARY_FLASH_IMAGE_START = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 :
+                         FLASH_BOOTLOADER_LENGTH + FLASH_APPLICATION_S_LENGTH + FLASH_BOOTLOADER_HEADER_LENGTH;
+__bl_XIP_SECONDARY_FLASH_IMAGE_END = __bl_XIP_SECONDARY_FLASH_IMAGE_START + __bl_FLASH_IMAGE_LENGTH;
+__bl_FLASH_NS_START = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 :
+                        FLASH_APPLICATION_NS_LENGTH == 0 ? __bl_FLASH_IMAGE_END :
+                        __bl_FLASH_IMAGE_START - FLASH_BOOTLOADER_HEADER_LENGTH + FLASH_APPLICATION_S_LENGTH;
+__bl_FLASH_NSC_START = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 :
+                        FLASH_APPLICATION_NS_LENGTH == 0 ? __bl_FLASH_IMAGE_END :
+                        __bl_FLASH_NS_START - FLASH_APPLICATION_NSC_LENGTH;
+__bl_RAM_NS_START    = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 :
+                       FLASH_APPLICATION_NS_LENGTH == 0 ? RAM_START + RAM_LENGTH :
+                       RAM_START + RAM_LENGTH - RAM_APPLICATION_NS_LENGTH;
+__bl_RAM_NSC_START   = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 :
+                       FLASH_APPLICATION_NS_LENGTH == 0 ? RAM_START + RAM_LENGTH :
+                       __bl_RAM_NS_START - RAM_APPLICATION_NSC_LENGTH;
+__bl_FLASH_NS_IMAGE_START = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 :
+                            FLASH_APPLICATION_NS_LENGTH == 0 ? __bl_FLASH_IMAGE_END :
+                            __bl_FLASH_NS_START + FLASH_BOOTLOADER_HEADER_LENGTH_2;
+__bln_FLASH_IMAGE_START = __bl_FLASH_NS_IMAGE_START;
+__bln_FLASH_IMAGE_LENGTH = !DEFINED(FLASH_BOOTLOADER_LENGTH) ? 0 :
+                           FLASH_APPLICATION_NS_LENGTH == 0 ? __bl_FLASH_IMAGE_END :
+                           FLASH_APPLICATION_NS_LENGTH - FLASH_BOOTLOADER_HEADER_LENGTH_2;
+
+XIP_SECONDARY_SLOT_IMAGE = DEFINED(XIP_SECONDARY_SLOT_IMAGE) ? XIP_SECONDARY_SLOT_IMAGE : 0;
+FLASH_ORIGIN = !DEFINED(FLASH_IMAGE_START) ? FLASH_START :
+                XIP_SECONDARY_SLOT_IMAGE == 1 ? XIP_SECONDARY_FLASH_IMAGE_START :
+                FLASH_IMAGE_START;
+LIMITED_FLASH_LENGTH = DEFINED(FLASH_IMAGE_LENGTH) ? FLASH_IMAGE_LENGTH :
+                       DEFINED(FLASH_BOOTLOADER_LENGTH) ? FLASH_BOOTLOADER_LENGTH :
+                       FLASH_LENGTH;
+
+/* Define memory regions. */
+MEMORY
+{
+  ITCM (rx)               : ORIGIN = ITCM_START + NS_IMAGE_OFFSET, LENGTH = ITCM_LENGTH
+  DTCM (rwx)              : ORIGIN = DTCM_START + NS_IMAGE_OFFSET, LENGTH = DTCM_LENGTH
+  FLASH (rx)              : ORIGIN = FLASH_ORIGIN + NS_IMAGE_OFFSET, LENGTH = LIMITED_FLASH_LENGTH
+  RAM (rwx)               : ORIGIN = RAM_START + NS_IMAGE_OFFSET, LENGTH = RAM_LENGTH
+  DATA_FLASH (rx)         : ORIGIN = DATA_FLASH_START + NS_IMAGE_OFFSET, LENGTH = DATA_FLASH_LENGTH
+  QSPI_FLASH (rx)         : ORIGIN = QSPI_FLASH_START, LENGTH = QSPI_FLASH_PRV_LENGTH
+  OSPI_DEVICE_0 (rx)      : ORIGIN = OSPI_DEVICE_0_START, LENGTH = OSPI_DEVICE_0_PRV_LENGTH
+  OSPI_DEVICE_1 (rx)      : ORIGIN = OSPI_DEVICE_1_START, LENGTH = OSPI_DEVICE_1_PRV_LENGTH
+  OSPI_DEVICE_0_RAM (rwx) : ORIGIN = OSPI_DEVICE_0_START, LENGTH = OSPI_DEVICE_0_PRV_LENGTH
+  OSPI_DEVICE_1_RAM (rwx) : ORIGIN = OSPI_DEVICE_1_START, LENGTH = OSPI_DEVICE_1_PRV_LENGTH
+  SDRAM (rwx)             : ORIGIN = SDRAM_START, LENGTH = SDRAM_LENGTH
+  OPTION_SETTING (r)      : ORIGIN = OPTION_SETTING_START + NS_IMAGE_OFFSET, LENGTH = OPTION_SETTING_LENGTH
+  OPTION_SETTING_OFS (r)  : ORIGIN = OPTION_SETTING_START + NS_IMAGE_OFFSET, LENGTH = 0x18
+  OPTION_SETTING_SAS (r)  : ORIGIN = OPTION_SETTING_START + NS_IMAGE_OFFSET + 0x34, LENGTH = OPTION_SETTING_LENGTH - 0x34
+  OPTION_SETTING_S (r)    : ORIGIN = OPTION_SETTING_S_START + NS_IMAGE_OFFSET, LENGTH = OPTION_SETTING_S_LENGTH
+  ID_CODE (rx)            : ORIGIN = ID_CODE_START, LENGTH = ID_CODE_LENGTH
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be DEFINED in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __copy_table_start__
+ *   __copy_table_end__
+ *   __zero_table_start__
+ *   __zero_table_end__
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ *   __Vectors_End
+ *   __Vectors_Size
+ *   __qspi_flash_start__
+ *   __qspi_flash_end__
+ *   __qspi_flash_code_size__
+ *   __qspi_region_max_size__
+ *   __qspi_region_start_address__
+ *   __qspi_region_end_address__
+ *   __ospi_device_0_start__
+ *   __ospi_device_0_end__
+ *   __ospi_device_0_code_size__
+ *   __ospi_device_0_region_max_size__
+ *   __ospi_device_0_region_start_address__
+ *   __ospi_device_0_region_end_address__
+ *   __ospi_device_1_start__
+ *   __ospi_device_1_end__
+ *   __ospi_device_1_code_size__
+ *   __ospi_device_1_region_max_size__
+ *   __ospi_device_1_region_start_address__
+ *   __ospi_device_1_region_end_address__
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+    /* Initialized ITCM data. */
+    .itcm_data :
+    {
+        /* Start of ITCM Secure Trustzone region. */
+        __tz_ITCM_S = ABSOLUTE(ITCM_START);
+
+        /* All ITCM data start */
+        __itcm_data_start__ = .;
+
+        KEEP(*(.itcm_data*))
+
+        /* All ITCM data end */
+        __itcm_data_end__ = .;
+
+        /*
+         * Start of the ITCM Non-Secure Trustzone region.
+         * ITCM_NS_START can be used to set a fixed address for non-secure ITCM in secure projects or flat projects.
+         */
+        __tz_ITCM_N = DEFINED(ITCM_NS_START) ? ABSOLUTE(ITCM_NS_START) : ALIGN(__itcm_data_end__, 8192);
+    } > ITCM
+
+    .text :
+    {
+        __tz_FLASH_S = ABSOLUTE(FLASH_START);
+        __ROM_Start = .;
+
+        /* Even though the vector table is not 256 entries (1KB) long, we still allocate that much
+         * space because ROM registers are at address 0x400 and there is very little space
+         * in between. */
+        KEEP(*(.fixed_vectors*))
+        KEEP(*(.application_vectors*))
+        __Vectors_End = .;
+
+        /* ROM Registers start at address 0x00000400 for devices that do not have the OPTION_SETTING region. */
+        . = OPTION_SETTING_LENGTH > 0 ? . : __ROM_Start + 0x400;
+        KEEP(*(.rom_registers*))
+
+        /* Reserving 0x100 bytes of space for ROM registers. */
+        . = OPTION_SETTING_LENGTH > 0 ? . : __ROM_Start + 0x500;
+
+        /* Allocate flash write-boundary-aligned
+         * space for sce9 wrapped public keys for mcuboot if the module is used.
+         */
+		. = ALIGN(128);
+        KEEP(*(.mcuboot_sce9_key*))
+
+        *(.text*)
+
+        KEEP(*(.version))
+        KEEP(*(.init))
+        KEEP(*(.fini))
+
+        /* .ctors */
+        *crtbegin.o(.ctors)
+        *crtbegin?.o(.ctors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+        *(SORT(.ctors.*))
+        *(.ctors)
+
+        /* .dtors */
+        *crtbegin.o(.dtors)
+        *crtbegin?.o(.dtors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+        *(SORT(.dtors.*))
+        *(.dtors)
+
+        *(.rodata*)
+        __usb_dev_descriptor_start_fs = .;
+        KEEP(*(.usb_device_desc_fs*))
+        __usb_cfg_descriptor_start_fs = .;
+        KEEP(*(.usb_config_desc_fs*))
+        __usb_interface_descriptor_start_fs = .;
+        KEEP(*(.usb_interface_desc_fs*))
+        __usb_descriptor_end_fs = .;
+        __usb_dev_descriptor_start_hs = .;
+        KEEP(*(.usb_device_desc_hs*))
+        __usb_cfg_descriptor_start_hs = .;
+        KEEP(*(.usb_config_desc_hs*))
+        __usb_interface_descriptor_start_hs = .;
+        KEEP(*(.usb_interface_desc_hs*))
+        __usb_descriptor_end_hs = .;
+
+        KEEP(*(.eh_frame*))
+
+        __ROM_End = .;
+    } > FLASH = 0xFF
+
+    __Vectors_Size = __Vectors_End - __Vectors;
+
+    .ARM.extab :
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > FLASH
+
+    __exidx_start = .;
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > FLASH
+    __exidx_end = .;
+
+    /* To copy multiple ROM to RAM sections,
+     * uncomment .copy.table section and,
+     * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+    /*
+    .copy.table :
+    {
+        . = ALIGN(4);
+        __copy_table_start__ = .;
+        LONG (__etext)
+        LONG (__data_start__)
+        LONG (__data_end__ - __data_start__)
+        LONG (__etext2)
+        LONG (__data2_start__)
+        LONG (__data2_end__ - __data2_start__)
+        __copy_table_end__ = .;
+    } > FLASH
+    */
+
+    /* To clear multiple BSS sections,
+     * uncomment .zero.table section and,
+     * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+    /*
+    .zero.table :
+    {
+        . = ALIGN(4);
+        __zero_table_start__ = .;
+        LONG (__bss_start__)
+        LONG (__bss_end__ - __bss_start__)
+        LONG (__bss2_start__)
+        LONG (__bss2_end__ - __bss2_start__)
+        __zero_table_end__ = .;
+    } > FLASH
+    */
+
+    __etext = .;
+
+    __tz_RAM_S = ORIGIN(RAM);
+
+    /* If DTC is used, put the DTC vector table at the start of SRAM.
+       This avoids memory holes due to 1K alignment required by it. */
+    .fsp_dtc_vector_table (NOLOAD) :
+    {
+        . = ORIGIN(RAM);
+        *(.fsp_dtc_vector_table)
+    } > RAM
+
+    /* Initialized data section. */
+    .data :
+    {
+        __data_start__ = .;
+        . = ALIGN(4);
+
+        __Code_In_RAM_Start = .;
+
+        KEEP(*(.code_in_ram*))
+        __Code_In_RAM_End = .;
+
+        *(vtable)
+        /* Don't use *(.data*) because it will place data meant for .data_flash in this section. */
+        *(.data.*)
+        *(.data)
+
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP(*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
+
+        . = ALIGN(4);
+        /* init data */
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE_HIDDEN (__init_array_end = .);
+
+
+        . = ALIGN(4);
+        /* finit data */
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        KEEP(*(SORT(.fini_array.*)))
+        KEEP(*(.fini_array))
+        PROVIDE_HIDDEN (__fini_array_end = .);
+
+        KEEP(*(.jcr*))
+
+        . = ALIGN(4);
+
+        /* All data end */
+        __data_end__ = .;
+
+    } > RAM AT > FLASH
+
+    /* Start address of the initial values for .dtcm_data. */
+    __dtcm_data_init_start = __etext + __data_end__ - __data_start__;
+
+    /* Initialized DTCM data. */
+    .dtcm_data :
+    {
+        /* Start of DTCM Secure Trustzone region. */
+        __tz_DTCM_S = ABSOLUTE(DTCM_START);
+
+        /* Initialized DTCM data start */
+        __dtcm_data_start__ = .;
+
+        KEEP(*(.dtcm_data*))
+
+        /* Initialized DTCM data end */
+        __dtcm_data_end__ = .;
+    } > DTCM AT > FLASH
+
+    /* Uninitialized DTCM data. */
+    .dtcm_noinit (NOLOAD):
+    {
+        /* Uninitialized DTCM data start */
+        __dtcm_noinit_start = .;
+
+        KEEP(*(.dtcm_noinit*))
+
+        /* Uninitialized DTCM data end */
+        __dtcm_noinit_end = .;
+
+        /*
+         * Start of the DTCM Non-Secure Trustzone region.
+         * DTCM_NS_START can be used to set a fixed address for non-secure ITCM in secure projects or flat projects.
+         */
+        __tz_DTCM_N = DEFINED(DTCM_NS_START) ? ABSOLUTE(DTCM_NS_START) : ALIGN(__dtcm_noinit_end, 8192);
+    } > DTCM
+
+    /* TrustZone Secure Gateway Stubs Section. */
+
+    /* Some arithmetic is needed to eliminate unnecessary FILL for secure projects. */
+    /* 1. Get the address to the next block after the .data section in FLASH. */
+    DATA_END = LOADADDR(.data) + SIZEOF(.data);
+    /* 2. Determine the secure gateway stubs address either by the provided linker variable or the next 1024-byte block after .data */
+    SGSTUBS_LOC = (DEFINED(PROJECT_SECURE) && DEFINED(FLASH_NSC_START)) ? ABSOLUTE(FLASH_NSC_START) : ALIGN(DATA_END, 1024);
+    /* 3. Manually specify the start location for .gnu.sgstubs */
+    .gnu.sgstubs SGSTUBS_LOC : ALIGN(1024)
+    {
+        __tz_FLASH_C = DEFINED(FLASH_NSC_START) ? ABSOLUTE(FLASH_NSC_START) : __RESERVE_NS_RAM ? ABSOLUTE(FLASH_START + FLASH_LENGTH) : ALIGN(1024);
+        _start_sg = .;
+        *(.gnu.sgstubs*)
+        . = ALIGN(32);
+        _end_sg = .;
+    } > FLASH
+
+    __tz_FLASH_N = DEFINED(FLASH_NS_START) ? ABSOLUTE(FLASH_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(FLASH_START + FLASH_LENGTH) : FLASH_LENGTH < 32768 ? FLASH_LENGTH : ALIGN(32768);
+    FLASH_NS_IMAGE_START = DEFINED(FLASH_NS_IMAGE_START) ? FLASH_NS_IMAGE_START : __tz_FLASH_N;
+
+    /* Note: There are no secure/non-secure boundaries for QSPI.  These symbols are provided for the RA configuration tool. */
+    __tz_QSPI_FLASH_S = ORIGIN(QSPI_FLASH);
+
+    /* QSPI_FLASH section to be downloaded via debugger */
+    .qspi_flash :
+    {
+        __qspi_flash_start__ = .;
+        KEEP(*(.qspi_flash*))
+        KEEP(*(.code_in_qspi*))
+        __qspi_flash_end__ = .;
+    } > QSPI_FLASH
+    __qspi_flash_code_size__ = __qspi_flash_end__ - __qspi_flash_start__;
+
+    /* QSPI_FLASH non-retentive section, creates a copy in internal flash that can be copied to QSPI */
+    __qspi_flash_code_addr__ = __etext + (__data_end__ - __data_start__);
+    .qspi_non_retentive : AT (__qspi_flash_code_addr__)
+    {
+        __qspi_non_retentive_start__ = .;
+        KEEP(*(.qspi_non_retentive*))
+        __qspi_non_retentive_end__ = .;
+    } > QSPI_FLASH
+    __qspi_non_retentive_size__ = __qspi_non_retentive_end__ - __qspi_non_retentive_start__;
+
+    __qspi_region_max_size__ = 0x4000000;   /* Must be the same as defined in MEMORY above */
+    __qspi_region_start_address__ = __qspi_flash_start__;
+    __qspi_region_end_address__ = __qspi_flash_start__ + __qspi_region_max_size__;
+
+    /* Note: There are no secure/non-secure boundaries for QSPI.  These symbols are provided for the RA configuration tool. */
+    __tz_QSPI_FLASH_N = __qspi_non_retentive_end__;
+
+    /* Support for OctaRAM */
+    .OSPI_DEVICE_0_NO_LOAD (NOLOAD):
+    {
+        . = ALIGN(4);
+        __ospi_device_0_start__ = .;
+        *(.ospi_device_0_no_load*)
+        . = ALIGN(4);
+        __ospi_device_0_end__ = .;
+    } > OSPI_DEVICE_0_RAM
+
+    .OSPI_DEVICE_1_NO_LOAD (NOLOAD):
+    {
+        . = ALIGN(4);
+        __ospi_device_1_start__ = .;
+        *(.ospi_device_1_no_load*)
+        . = ALIGN(4);
+        __ospi_device_1_end__ = .;
+    } > OSPI_DEVICE_1_RAM
+
+    /* Note: There are no secure/non-secure boundaries for QSPI.  These symbols are provided for the RA configuration tool. */
+    __tz_OSPI_DEVICE_0_S = ORIGIN(OSPI_DEVICE_0);
+
+    /* OSPI_DEVICE_0 section to be downloaded via debugger */
+    .OSPI_DEVICE_0 :
+    {
+        __ospi_device_0_start__ = .;
+        KEEP(*(.ospi_device_0*))
+        KEEP(*(.code_in_ospi_device_0*))
+        __ospi_device_0_end__ = .;
+    } > OSPI_DEVICE_0
+    __ospi_device_0_code_size__ = __ospi_device_0_end__ - __ospi_device_0_start__;
+
+    /* OSPI_DEVICE_0 non-retentive section, creates a copy in internal flash that can be copied to OSPI */
+    __ospi_device_0_code_addr__ = __etext + (__data_end__ - __data_start__);
+    .ospi_device_0_non_retentive : AT (__ospi_device_0_code_addr__)
+    {
+        __ospi_device_0_non_retentive_start__ = .;
+        KEEP(*(.ospi_device_0_non_retentive*))
+        __ospi_device_0_non_retentive_end__ = .;
+    } > OSPI_DEVICE_0
+    __ospi_device_0_non_retentive_size__ = __ospi_device_0_non_retentive_end__ - __ospi_device_0_non_retentive_start__;
+
+    __ospi_device_0_region_max_size__ = 0x8000000;   /* Must be the same as defined in MEMORY above */
+    __ospi_device_0_region_start_address__ = __ospi_device_0_start__;
+    __ospi_device_0_region_end_address__ = __ospi_device_0_start__ + __ospi_device_0_region_max_size__;
+
+    /* Note: There are no secure/non-secure boundaries for OSPI.  These symbols are provided for the RA configuration tool. */
+    __tz_OSPI_DEVICE_0_N = __ospi_device_0_non_retentive_end__;
+
+    /* Note: There are no secure/non-secure boundaries for OSPI.  These symbols are provided for the RA configuration tool. */
+    __tz_OSPI_DEVICE_1_S = ORIGIN(OSPI_DEVICE_1);
+
+    /* OSPI_DEVICE_1 section to be downloaded via debugger */
+    .OSPI_DEVICE_1 :
+    {
+        __ospi_device_1_start__ = .;
+        KEEP(*(.ospi_device_1*))
+        KEEP(*(.code_in_ospi_device_1*))
+        __ospi_device_1_end__ = .;
+    } > OSPI_DEVICE_1
+    __ospi_device_1_code_size__ = __ospi_device_1_end__ - __ospi_device_1_start__;
+
+    /* OSPI_DEVICE_1 non-retentive section, creates a copy in internal flash that can be copied to OSPI */
+    __ospi_device_1_code_addr__ = __etext + (__data_end__ - __data_start__);
+    .ospi_device_1_non_retentive : AT (__ospi_device_1_code_addr__)
+    {
+        __ospi_device_1_non_retentive_start__ = .;
+        KEEP(*(.ospi_device_1_non_retentive*))
+        __ospi_device_1_non_retentive_end__ = .;
+    } > OSPI_DEVICE_1
+    __ospi_device_1_non_retentive_size__ = __ospi_device_1_non_retentive_end__ - __ospi_device_1_non_retentive_start__;
+
+    __ospi_device_1_region_max_size__ = 0x10000000;   /* Must be the same as defined in MEMORY above */
+    __ospi_device_1_region_start_address__ = __ospi_device_1_start__;
+    __ospi_device_1_region_end_address__ = __ospi_device_1_start__ + __ospi_device_1_region_max_size__;
+
+    /* Note: There are no secure/non-secure boundaries for OSPI.  These symbols are provided for the RA configuration tool. */
+    __tz_OSPI_DEVICE_1_N = __ospi_device_1_non_retentive_end__;
+
+    .noinit (NOLOAD):
+    {
+        . = ALIGN(4);
+        __noinit_start = .;
+        KEEP(*(.noinit*))
+        . = ALIGN(8);
+        /* Place the FreeRTOS heap here so that the __HeapLimit calculation does not include the freertos heap. */
+        KEEP(*(.heap.*))
+        __noinit_end = .;
+    } > RAM
+
+    .bss :
+    {
+        . = ALIGN(4);
+        __bss_start__ = .;
+        *(.bss*)
+        *(COMMON)
+        . = ALIGN(4);
+        __bss_end__ = .;
+    } > RAM
+
+    .heap (NOLOAD):
+    {
+        . = ALIGN(8);
+        __HeapBase = .;
+        /* Place the STD heap here. */
+        KEEP(*(.heap))
+        __HeapLimit = .;
+    } > RAM
+
+    /* Stacks are stored in this section. */
+    .stack_dummy (NOLOAD):
+    {
+        . = ALIGN(8);
+        __StackLimit = .;
+        /* Main stack */
+        KEEP(*(.stack))
+        __StackTop = .;
+        /* Thread stacks */
+        KEEP(*(.stack*))
+        __StackTopAll = .;
+    } > RAM
+
+    PROVIDE(__stack = __StackTopAll);
+
+    /* This symbol represents the end of user allocated RAM. The RAM after this symbol can be used
+       at run time for things such as ThreadX memory pool allocations. */
+    __RAM_segment_used_end__ = ALIGN(__StackTopAll , 4);
+
+    /* RAM_NSC_START can be used to set a fixed address for non-secure callable RAM in secure projects.
+     * If it is not specified, the address for NSC RAM is the end of RAM aligned to a 1K boundary.
+     * In flat projects that require non-secure RAM, this variable is set to the start of non-secure RAM. */
+    __tz_RAM_C = DEFINED(RAM_NSC_START) ? ABSOLUTE(RAM_NSC_START - RAM_NS_BUFFER_BLOCK_LENGTH) : __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_BLOCK_START) : ALIGN(__RAM_segment_used_end__, 1024);
+
+    /* RAM_NS_START can be used to set a fixed address for non-secure RAM in secure projects or flat projects.
+     * RAM_NS_BUFFER_BLOCK_LENGTH is used to allocate non-secure buffers in a flat project. If it is not
+     * specified, the address for NSC RAM is the end of RAM aligned to an 8K boundary.
+     * In flat projects that require non-secure RAM, this variable is set to the start of non-secure RAM. */
+    __tz_RAM_N = DEFINED(RAM_NS_START) ? ABSOLUTE(RAM_NS_START - RAM_NS_BUFFER_BLOCK_LENGTH) : __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_BLOCK_START) : ALIGN(__tz_RAM_C, 8192);
+
+    /* Non-secure buffers must be in non-secure RAM. This is primarily used for the EDMAC in flat projects.
+     * The EDMAC is a non-secure bus master and can only access non-secure RAM. */
+    .ns_buffer (NOLOAD):
+    {
+        /* Allocate RAM on a 32-byte boundary to help with placement of Ethernet buffers. */
+        . = __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_START & 0xFFFFFFE0) : .;
+
+        KEEP(*(.ns_buffer*))
+    } > RAM
+
+    /* Data flash. */
+    .data_flash :
+    {
+        . = ORIGIN(DATA_FLASH);
+        __tz_DATA_FLASH_S = .;
+        __Data_Flash_Start = .;
+        KEEP(*(.data_flash*))
+        __Data_Flash_End = .;
+
+        __tz_DATA_FLASH_N = DEFINED(DATA_FLASH_NS_START) ? ABSOLUTE(DATA_FLASH_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(DATA_FLASH_START + DATA_FLASH_LENGTH) : ALIGN(1024);
+    } > DATA_FLASH
+
+    /* Note: There are no secure/non-secure boundaries for SDRAM.  These symbols are provided for the RA configuration tool. */
+    __tz_SDRAM_S = ORIGIN(SDRAM);
+
+    /* SDRAM */
+    .sdram (NOLOAD):
+    {
+        __SDRAM_Start = .;
+        KEEP(*(.sdram*))
+        KEEP(*(.frame*))
+        __SDRAM_End = .;
+    } > SDRAM
+
+    /* Note: There are no secure/non-secure boundaries for SDRAM.  These symbols are provided for the RA configuration tool. */
+    __tz_SDRAM_N = __SDRAM_End;
+
+    /* Note: There are no secure/non-secure boundaries for ID_CODE.  These symbols are provided for the RA configuration tool. */
+    __tz_ID_CODE_S = ORIGIN(ID_CODE);
+
+    .id_code :
+    {
+        __ID_Code_Start = .;
+        KEEP(*(.id_code*))
+        __ID_Code_End = .;
+    } > ID_CODE
+
+    /* Note: There are no secure/non-secure boundaries for ID_CODE.  These symbols are provided for the RA configuration tool. */
+    __tz_ID_CODE_N = __ID_Code_End;
+
+    /* Symbol required for RA Configuration tool. */
+    __tz_OPTION_SETTING_S = ORIGIN(OPTION_SETTING_OFS);
+
+    .option_setting_ofs :
+    {
+        __OPTION_SETTING_OFS_Start = .;
+        KEEP(*(.option_setting_ofs0))
+        . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_OFS_Start + 0x04 : __OPTION_SETTING_OFS_Start;
+        KEEP(*(.option_setting_ofs2))
+        . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_OFS_Start + 0x10 : __OPTION_SETTING_OFS_Start;
+        KEEP(*(.option_setting_dualsel))
+        __OPTION_SETTING_OFS_End = .;
+    } > OPTION_SETTING_OFS = 0xFF
+
+    .option_setting_sas :
+    {
+        __OPTION_SETTING_SAS_Start = .;
+        KEEP(*(.option_setting_sas))
+        __OPTION_SETTING_SAS_End = .;
+    } > OPTION_SETTING_SAS = 0xFF
+
+    /* Symbol required for RA Configuration tool. */
+    __tz_OPTION_SETTING_N = ABSOLUTE(OPTION_SETTING_START_NS);
+
+    .option_setting_ns :
+    {
+        __OPTION_SETTING_NS_Start = .;
+        KEEP(*(.option_setting_ofs1))
+        . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x04 : __OPTION_SETTING_NS_Start;
+        KEEP(*(.option_setting_ofs3))
+        . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x10 : __OPTION_SETTING_NS_Start;
+        KEEP(*(.option_setting_banksel))
+        . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x40 : __OPTION_SETTING_NS_Start;
+        KEEP(*(.option_setting_bps0))
+        . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x44 : __OPTION_SETTING_NS_Start;
+        KEEP(*(.option_setting_bps1))
+        . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x48 : __OPTION_SETTING_NS_Start;
+        KEEP(*(.option_setting_bps2))
+        . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x4C : __OPTION_SETTING_NS_Start;
+        KEEP(*(.option_setting_bps3))
+        . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x60 : __OPTION_SETTING_NS_Start;
+        KEEP(*(.option_setting_pbps0))
+        . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x64 : __OPTION_SETTING_NS_Start;
+        KEEP(*(.option_setting_pbps1))
+        . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x68 : __OPTION_SETTING_NS_Start;
+        KEEP(*(.option_setting_pbps2))
+        . = USE_OPTION_SETTING_NS ? __OPTION_SETTING_NS_Start + 0x6C : __OPTION_SETTING_NS_Start;
+        KEEP(*(.option_setting_pbps3))
+        __OPTION_SETTING_NS_End = .;
+    } > OPTION_SETTING = 0xFF
+
+    /* Symbol required for RA Configuration tool. */
+    __tz_OPTION_SETTING_S_S = ORIGIN(OPTION_SETTING_S);
+
+    .option_setting_s :
+    {
+        __OPTION_SETTING_S_Start = .;
+        KEEP(*(.option_setting_ofs1_sec))
+        . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x04 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_ofs3_sec))
+        . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x10 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_banksel_sec))
+        . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x40 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_bps_sec0))
+        . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x44 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_bps_sec1))
+        . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x48 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_bps_sec2))
+        . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x4C : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_bps_sec3))
+        . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x60 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_pbps_sec0))
+        . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x64 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_pbps_sec1))
+        . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x68 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_pbps_sec2))
+        . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x6C : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_pbps_sec3))
+        . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x80 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_ofs1_sel))
+        . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x84 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_ofs3_sel))
+        . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0x90 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_banksel_sel))
+        . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0xC0 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_bps_sel0))
+        . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0xC4 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_bps_sel1))
+        . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0xC8 : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_bps_sel2))
+        . = PROJECT_SECURE_OR_FLAT ? __OPTION_SETTING_S_Start + 0xCC : __OPTION_SETTING_S_Start;
+        KEEP(*(.option_setting_bps_sel3))
+        __OPTION_SETTING_S_End = .;
+    } > OPTION_SETTING_S = 0xFF
+
+    /* Symbol required for RA Configuration tool. */
+    __tz_OPTION_SETTING_S_N = __OPTION_SETTING_S_End;
+}
diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.mk b/hw/bsp/ra/boards/ra4m3_ek/board.mk
index 61a7c5c4a..d668db0ea 100644
--- a/hw/bsp/ra/boards/ra4m3_ek/board.mk
+++ b/hw/bsp/ra/boards/ra4m3_ek/board.mk
@@ -13,3 +13,5 @@ LD_FILE = $(BOARD_PATH)/ra4m3_ek.ld
 # For flash-jlink target
 JLINK_DEVICE = R7FA4M3AF
 JLINK_IF     = SWD
+
+flash: flash-jlink
diff --git a/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c b/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c
index eab102de9..327ef71d5 100644
--- a/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c
+++ b/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c
@@ -91,11 +91,11 @@ void usbfs_interrupt_handler(void)
   IRQn_Type irq = R_FSP_CurrentIrqGet();
   R_BSP_IrqStatusClear(irq);
 
-#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
+#if CFG_TUH_ENABLED
   tuh_int_handler(0);
 #endif
 
-#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
+#if CFG_TUD_ENABLED
   tud_int_handler(0);
 #endif
 }
@@ -104,37 +104,39 @@ void usbfs_resume_handler(void)
   IRQn_Type irq = R_FSP_CurrentIrqGet();
   R_BSP_IrqStatusClear(irq);
 
-#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
+#if CFG_TUH_ENABLED
   tuh_int_handler(0);
 #endif
 
-#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
+#if CFG_TUD_ENABLED
   tud_int_handler(0);
 #endif
 }
+
 void usbfs_d0fifo_handler(void)
 {
   IRQn_Type irq = R_FSP_CurrentIrqGet();
   R_BSP_IrqStatusClear(irq);
 
-#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
+#if CFG_TUH_ENABLED
   tuh_int_handler(0);
 #endif
 
-#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
+#if CFG_TUD_ENABLED
   tud_int_handler(0);
 #endif
 }
+
 void usbfs_d1fifo_handler(void)
 {
   IRQn_Type irq = R_FSP_CurrentIrqGet();
   R_BSP_IrqStatusClear(irq);
 
-#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
+#if CFG_TUH_ENABLED
   tuh_int_handler(0);
 #endif
 
-#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
+#if CFG_TUD_ENABLED
   tud_int_handler(0);
 #endif
 }

From ffdffc7e06080cfaf94b5c318053576d48cb604e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 16 Mar 2023 23:11:11 +0700
Subject: [PATCH 154/691] rename FREERTOS_PORT to FREERTOS_PORTABLE_SRC

also fix trailing spaces
---
 examples/device/cdc_msc_freertos/Makefile       |  8 ++++----
 examples/device/hid_composite_freertos/Makefile | 10 +++++-----
 hw/bsp/ch32v307/family.mk                       | 10 +++++-----
 hw/bsp/d5035_01/board.mk                        |  2 +-
 hw/bsp/da14695_dk_usb/board.mk                  |  3 +--
 hw/bsp/da1469x_dk_pro/board.mk                  |  3 +--
 hw/bsp/ea4088qs/board.mk                        |  2 +-
 hw/bsp/ea4357/board.mk                          |  2 +-
 hw/bsp/fomu/family.mk                           |  4 ++--
 hw/bsp/frdm_k32l2b/board.mk                     |  2 +-
 hw/bsp/frdm_kl25z/board.mk                      |  2 +-
 hw/bsp/gd32vf103/family.mk                      |  4 ++--
 hw/bsp/imxrt/family.mk                          |  4 ++--
 hw/bsp/kuiic/board.mk                           |  4 ++--
 hw/bsp/lpc15/family.mk                          |  4 ++--
 hw/bsp/lpc18/family.mk                          |  2 +-
 hw/bsp/lpc54/family.mk                          |  4 ++--
 hw/bsp/lpc55/family.mk                          |  2 +-
 hw/bsp/lpcxpresso11u37/board.mk                 |  6 +++---
 hw/bsp/lpcxpresso11u68/board.mk                 |  6 +++---
 hw/bsp/lpcxpresso1347/board.mk                  |  4 ++--
 hw/bsp/lpcxpresso1769/board.mk                  |  2 +-
 hw/bsp/lpcxpresso51u68/board.mk                 |  6 +++---
 hw/bsp/mbed1768/board.mk                        |  5 ++---
 hw/bsp/mm32/family.mk                           |  6 +++---
 hw/bsp/msp432e4/family.mk                       |  2 +-
 hw/bsp/ngx4330/board.mk                         |  4 ++--
 hw/bsp/nrf/family.mk                            |  2 +-
 hw/bsp/nutiny_nuc121s/board.mk                  |  2 +-
 hw/bsp/nutiny_nuc125s/board.mk                  |  2 +-
 hw/bsp/nutiny_nuc126v/board.mk                  |  2 +-
 hw/bsp/nutiny_sdk_nuc120/board.mk               |  2 +-
 hw/bsp/nutiny_sdk_nuc505/board.mk               |  6 +++---
 hw/bsp/ra/family.mk                             |  2 +-
 hw/bsp/rx/boards/gr_citrus/board.mk             |  2 +-
 hw/bsp/rx/boards/rx65n_target/board.mk          |  2 +-
 hw/bsp/samd11/family.mk                         |  2 +-
 hw/bsp/samd21/family.mk                         |  2 +-
 hw/bsp/samd51/family.mk                         |  2 +-
 hw/bsp/same54xplainedpro/board.mk               |  2 +-
 hw/bsp/same70_qmtech/board.mk                   |  2 +-
 hw/bsp/same70_xplained/board.mk                 |  4 ++--
 hw/bsp/samg55xplained/board.mk                  |  4 ++--
 hw/bsp/saml2x/family.mk                         |  2 +-
 hw/bsp/sltb009a/board.mk                        |  2 +-
 hw/bsp/stm32f0/family.mk                        |  2 +-
 hw/bsp/stm32f1/family.mk                        |  2 +-
 hw/bsp/stm32f207nucleo/board.mk                 |  2 +-
 hw/bsp/stm32f303disco/board.mk                  |  2 +-
 hw/bsp/stm32f4/family.mk                        |  2 +-
 hw/bsp/stm32f7/family.mk                        |  2 +-
 hw/bsp/stm32g4/family.mk                        |  4 ++--
 hw/bsp/stm32h7/family.mk                        |  3 +--
 hw/bsp/stm32l0/family.mk                        |  2 +-
 hw/bsp/stm32l0538disco/board.mk                 |  4 ++--
 hw/bsp/stm32l4/family.mk                        |  2 +-
 hw/bsp/stm32u5/family.mk                        |  4 ++--
 hw/bsp/stm32wb/family.mk                        |  2 +-
 hw/bsp/tm4c123/family.mk                        |  4 ++--
 hw/bsp/xmc4000/family.mk                        |  2 +-
 60 files changed, 96 insertions(+), 100 deletions(-)

diff --git a/examples/device/cdc_msc_freertos/Makefile b/examples/device/cdc_msc_freertos/Makefile
index ed3b3f0ce..73b4ce608 100644
--- a/examples/device/cdc_msc_freertos/Makefile
+++ b/examples/device/cdc_msc_freertos/Makefile
@@ -3,14 +3,14 @@ DEPS_SUBMODULES += lib/FreeRTOS-Kernel
 include ../../make.mk
 
 FREERTOS_SRC = lib/FreeRTOS-Kernel
-FREERTOS_PORT_PATH= $(FREERTOS_SRC)/portable/$(if $(USE_IAR),IAR,GCC)
+FREERTOS_PORTABLE_PATH= $(FREERTOS_SRC)/portable/$(if $(USE_IAR),IAR,GCC)
 
 INC += \
 	src \
 	src/FreeRTOSConfig \
 	$(TOP)/hw \
 	$(TOP)/$(FREERTOS_SRC)/include \
-	$(TOP)/$(FREERTOS_PORT)
+	$(TOP)/$(FREERTOS_PORTABLE_SRC)
 
 # Example source
 EXAMPLE_SOURCE = \
@@ -27,10 +27,10 @@ SRC_C += \
 	$(FREERTOS_SRC)/queue.c \
 	$(FREERTOS_SRC)/tasks.c \
 	$(FREERTOS_SRC)/timers.c \
-	$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORT)/*.c))
+	$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORTABLE_SRC)/*.c))
 
 SRC_S += \
-	$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORT)/*.s))
+	$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORTABLE_SRC)/*.s))
 
 # include heap manage if configSUPPORT_DYNAMIC_ALLOCATION = 1
 # SRC_C += $(FREERTOS_SRC)/portable/MemMang/heap_1.c
diff --git a/examples/device/hid_composite_freertos/Makefile b/examples/device/hid_composite_freertos/Makefile
index f4410b202..9d30fddf7 100644
--- a/examples/device/hid_composite_freertos/Makefile
+++ b/examples/device/hid_composite_freertos/Makefile
@@ -3,21 +3,21 @@ DEPS_SUBMODULES += lib/FreeRTOS-Kernel
 include ../../make.mk
 
 FREERTOS_SRC = lib/FreeRTOS-Kernel
-FREERTOS_PORT_PATH= $(FREERTOS_SRC)/portable/$(if $(USE_IAR),IAR,GCC)
+FREERTOS_PORTABLE_PATH= $(FREERTOS_SRC)/portable/$(if $(USE_IAR),IAR,GCC)
 
 INC += \
 	src \
 	src/FreeRTOSConfig \
 	$(TOP)/hw \
 	$(TOP)/$(FREERTOS_SRC)/include \
-	$(TOP)/$(FREERTOS_PORT)
+	$(TOP)/$(FREERTOS_PORTABLE_SRC)
 
 # Example source
 EXAMPLE_SOURCE = \
 	src/freertos_hook.c \
 	src/main.c \
 	src/usb_descriptors.c
-	
+
 SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
 
 # FreeRTOS source, all files in port folder
@@ -26,10 +26,10 @@ SRC_C += \
 	$(FREERTOS_SRC)/queue.c \
 	$(FREERTOS_SRC)/tasks.c \
 	$(FREERTOS_SRC)/timers.c \
-	$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORT)/*.c))
+	$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORTABLE_SRC)/*.c))
 
 SRC_S += \
-	$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORT)/*.s))
+	$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORTABLE_SRC)/*.s))
 
 # include heap manage if configSUPPORT_DYNAMIC_ALLOCATION = 1
 # SRC_C += $(FREERTOS_SRC)/portable/MemMang/heap_1.c
diff --git a/hw/bsp/ch32v307/family.mk b/hw/bsp/ch32v307/family.mk
index 15f6724a8..4b06cf429 100644
--- a/hw/bsp/ch32v307/family.mk
+++ b/hw/bsp/ch32v307/family.mk
@@ -34,23 +34,23 @@ SRC_C += \
 	$(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_gpio.c \
 	$(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_misc.c \
 	$(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_rcc.c \
-	$(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_usart.c 
-	
+	$(CH32V307_SDK_SRC)/Peripheral/src/ch32v30x_usart.c
+
 SRC_S += \
-	$(CH32V307_SDK_SRC)/Startup/startup_ch32v30x_D8C.S 
+	$(CH32V307_SDK_SRC)/Startup/startup_ch32v30x_D8C.S
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
 	$(TOP)/$(CH32V307_SDK_SRC)/Peripheral/inc
 
 # For freeRTOS port source
-FREERTOS_PORT = RISC-V
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RISC-V
 
 # wch-link is not supported yet in official openOCD yet. We need to either use
 # 1. download openocd as part of mounriver studio http://www.mounriver.com/download or
 # 2. compiled from modified source https://github.com/kprasadvnsi/riscv-openocd-wch
 #
-# Note: For Linux, somehow openocd in mounriver studio does not seem to have wch-link enable, 
+# Note: For Linux, somehow openocd in mounriver studio does not seem to have wch-link enable,
 # therefore we need to compile it from source as follows:
 # 	git clone https://github.com/kprasadvnsi/riscv-openocd-wch
 # 	cd riscv-openocd-wch
diff --git a/hw/bsp/d5035_01/board.mk b/hw/bsp/d5035_01/board.mk
index cefd8c935..fc196b339 100644
--- a/hw/bsp/d5035_01/board.mk
+++ b/hw/bsp/d5035_01/board.mk
@@ -52,7 +52,7 @@ INC += \
 	$(TOP)/hw/mcu/microchip/same51/CMSIS/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = ATSAME51J19
diff --git a/hw/bsp/da14695_dk_usb/board.mk b/hw/bsp/da14695_dk_usb/board.mk
index 2ca7f8529..1f7bc1588 100644
--- a/hw/bsp/da14695_dk_usb/board.mk
+++ b/hw/bsp/da14695_dk_usb/board.mk
@@ -31,7 +31,7 @@ INC += \
 	$(TOP)/$(MCU_FAMILY_DIR)/SDK_10.0.8.105/sdk/bsp/include
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM33_NTZ/non_secure
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure
 
 # For flash-jlink target
 JLINK_DEVICE = DA14695
@@ -52,4 +52,3 @@ flash-dialog: $(BUILD)/$(PROJECT).bin
 	@echo go >> $(BUILD)/$(BOARD).jlink
 	@echo exit >> $(BUILD)/$(BOARD).jlink
 	$(JLINKEXE) -device $(JLINK_DEVICE) -if $(JLINK_IF) -JTAGConf -1,-1 -speed auto -CommandFile $(BUILD)/$(BOARD).jlink
-
diff --git a/hw/bsp/da1469x_dk_pro/board.mk b/hw/bsp/da1469x_dk_pro/board.mk
index d9dd5cd65..f9bf480de 100644
--- a/hw/bsp/da1469x_dk_pro/board.mk
+++ b/hw/bsp/da1469x_dk_pro/board.mk
@@ -31,7 +31,7 @@ INC += \
 	$(TOP)/$(MCU_FAMILY_DIR)/SDK_10.0.8.105/sdk/bsp/include
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM33_NTZ/non_secure
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure
 
 # For flash-jlink target
 JLINK_DEVICE = DA14699
@@ -52,4 +52,3 @@ flash-dialog: $(BUILD)/$(PROJECT).bin
 	@echo go >> $(BUILD)/$(BOARD).jlink
 	@echo exit >> $(BUILD)/$(BOARD).jlink
 	$(JLINKEXE) -device $(JLINK_DEVICE) -if $(JLINK_IF) -JTAGConf -1,-1 -speed auto -CommandFile $(BUILD)/$(BOARD).jlink
-
diff --git a/hw/bsp/ea4088qs/board.mk b/hw/bsp/ea4088qs/board.mk
index 54195b20c..376840fb1 100644
--- a/hw/bsp/ea4088qs/board.mk
+++ b/hw/bsp/ea4088qs/board.mk
@@ -37,7 +37,7 @@ INC += \
 	$(TOP)/$(MCU_DIR)/inc
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = LPC4088
diff --git a/hw/bsp/ea4357/board.mk b/hw/bsp/ea4357/board.mk
index 4556e98f6..6fd229166 100644
--- a/hw/bsp/ea4357/board.mk
+++ b/hw/bsp/ea4357/board.mk
@@ -39,7 +39,7 @@ INC += \
 	$(TOP)/$(MCU_DIR)/inc/config_43xx
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = LPC4357_M4
diff --git a/hw/bsp/fomu/family.mk b/hw/bsp/fomu/family.mk
index 8f8f3d011..d0b819120 100644
--- a/hw/bsp/fomu/family.mk
+++ b/hw/bsp/fomu/family.mk
@@ -19,12 +19,12 @@ INC += \
 	$(TOP)/$(FAMILY_PATH)/include
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/RISC-V
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RISC-V
 
 # flash using dfu-util
 $(BUILD)/$(PROJECT).dfu: $(BUILD)/$(PROJECT).bin
 	@echo "Create $@"
 	python $(TOP)/hw/bsp/$(BOARD)/dfu.py -b $^ -D 0x1209:0x5bf0 $@
-	
+
 flash: $(BUILD)/$(PROJECT).dfu
 	dfu-util -D $^
diff --git a/hw/bsp/frdm_k32l2b/board.mk b/hw/bsp/frdm_k32l2b/board.mk
index f922fc433..feb0a25f4 100644
--- a/hw/bsp/frdm_k32l2b/board.mk
+++ b/hw/bsp/frdm_k32l2b/board.mk
@@ -39,7 +39,7 @@ INC += \
 SRC_S += $(MCU_DIR)/gcc/startup_K32L2B31A.S
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
 
 # For flash-jlink target
 JLINK_DEVICE = MKL25Z128xxx4
diff --git a/hw/bsp/frdm_kl25z/board.mk b/hw/bsp/frdm_kl25z/board.mk
index 2ac089404..fd616f7ed 100644
--- a/hw/bsp/frdm_kl25z/board.mk
+++ b/hw/bsp/frdm_kl25z/board.mk
@@ -40,7 +40,7 @@ INC += \
 SRC_S += $(MCU_DIR)/gcc/startup_MKL25Z4.S
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
 
 # For flash-jlink target
 JLINK_DEVICE = MKL25Z128xxx4
diff --git a/hw/bsp/gd32vf103/family.mk b/hw/bsp/gd32vf103/family.mk
index c0c144f5c..1725559c4 100644
--- a/hw/bsp/gd32vf103/family.mk
+++ b/hw/bsp/gd32vf103/family.mk
@@ -44,7 +44,7 @@ SRC_C += \
 	$(LIBC_STUBS)/isatty.c \
 	$(LIBC_STUBS)/fstat.c \
 	$(LIBC_STUBS)/lseek.c \
-	$(LIBC_STUBS)/read.c 
+	$(LIBC_STUBS)/read.c
 
 SRC_S += \
 	$(STARTUP_ASM)/startup_gd32vf103.S \
@@ -57,7 +57,7 @@ INC += \
 	$(TOP)/$(GD32VF103_SDK_SOC)/Common/Include/Usb
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/RISC-V
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RISC-V
 
 # For flash-jlink target
 JLINK_IF = jtag
diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk
index f2273cb56..6788de8df 100644
--- a/hw/bsp/imxrt/family.mk
+++ b/hw/bsp/imxrt/family.mk
@@ -30,7 +30,7 @@ MCU_DIR = $(SDK_DIR)/devices/$(MCU_VARIANT)
 # All source paths should be relative to the top level.
 LD_FILE ?= $(MCU_DIR)/gcc/$(MCU_VARIANT)xxxxx_flexspi_nor.ld
 
-# TODO for net_lwip_webserver example, but may not needed !! 
+# TODO for net_lwip_webserver example, but may not needed !!
 LDFLAGS += \
 	-Wl,--defsym,__stack_size__=0x800 \
 
@@ -59,7 +59,7 @@ INC += \
 SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_VARIANT).S
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM7/r0p1
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1
 
 # UF2 generation, iMXRT need to strip to text only before conversion
 APPLICATION_ADDR = 0x6000C000
diff --git a/hw/bsp/kuiic/board.mk b/hw/bsp/kuiic/board.mk
index 94646dbde..cb3459586 100644
--- a/hw/bsp/kuiic/board.mk
+++ b/hw/bsp/kuiic/board.mk
@@ -35,12 +35,12 @@ INC += \
 	$(TOP)/$(SDK_DIR)/drivers/port \
 	$(TOP)/$(SDK_DIR)/drivers/lpuart \
 	$(TOP)/$(MCU_DIR) \
-	$(TOP)/$(MCU_DIR)/drivers 
+	$(TOP)/$(MCU_DIR)/drivers
 
 SRC_S += $(MCU_DIR)/gcc/startup_K32L2B31A.S
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
 
 # For flash-jlink target
 JLINK_DEVICE = MKL25Z128xxx4
diff --git a/hw/bsp/lpc15/family.mk b/hw/bsp/lpc15/family.mk
index fee0e0106..0ad1220d6 100644
--- a/hw/bsp/lpc15/family.mk
+++ b/hw/bsp/lpc15/family.mk
@@ -12,7 +12,7 @@ CFLAGS += \
   -D__USE_LPCOPEN \
   -DCFG_EXAMPLE_MSC_READONLY \
   -DCFG_TUSB_MCU=OPT_MCU_LPC15XX \
-  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' 
+  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
 
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=unused-variable -Wno-error=cast-qual
@@ -36,4 +36,4 @@ INC += \
 	$(TOP)/$(MCU_DIR)/inc
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
diff --git a/hw/bsp/lpc18/family.mk b/hw/bsp/lpc18/family.mk
index 8ba05c9c9..fbe6ad834 100644
--- a/hw/bsp/lpc18/family.mk
+++ b/hw/bsp/lpc18/family.mk
@@ -34,4 +34,4 @@ INC += \
 	$(TOP)/$(MCU_DIR)/inc/config_18xx
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
diff --git a/hw/bsp/lpc54/family.mk b/hw/bsp/lpc54/family.mk
index 3af679bda..0ec59f9bf 100644
--- a/hw/bsp/lpc54/family.mk
+++ b/hw/bsp/lpc54/family.mk
@@ -11,7 +11,7 @@ CFLAGS += \
   -mfloat-abi=hard \
   -mfpu=fpv4-sp-d16 \
   -DCFG_TUSB_MCU=OPT_MCU_LPC54XXX \
-  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' 
+  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
 
 ifeq ($(PORT), 1)
   $(info "PORT1 High Speed")
@@ -51,4 +51,4 @@ INC += \
 SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_CORE).S
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
diff --git a/hw/bsp/lpc55/family.mk b/hw/bsp/lpc55/family.mk
index 58fc18a5c..789f7727d 100644
--- a/hw/bsp/lpc55/family.mk
+++ b/hw/bsp/lpc55/family.mk
@@ -65,4 +65,4 @@ SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_CORE).S
 LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower_hardabi.a
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM33_NTZ/non_secure
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure
diff --git a/hw/bsp/lpcxpresso11u37/board.mk b/hw/bsp/lpcxpresso11u37/board.mk
index a9e63ad67..61e5eda7e 100644
--- a/hw/bsp/lpcxpresso11u37/board.mk
+++ b/hw/bsp/lpcxpresso11u37/board.mk
@@ -12,7 +12,7 @@ CFLAGS += \
   -DCFG_EXAMPLE_VIDEO_READONLY \
   -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
   -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
-  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' 
+  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
 
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=redundant-decls
@@ -36,11 +36,11 @@ INC += \
 	$(TOP)/$(MCU_DIR)/inc
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
 
 # For flash-jlink target
 JLINK_DEVICE = LPC11U37/401
 
-# flash using pyocd 
+# flash using pyocd
 flash: $(BUILD)/$(PROJECT).hex
 	pyocd flash -t lpc11u37 $<
diff --git a/hw/bsp/lpcxpresso11u68/board.mk b/hw/bsp/lpcxpresso11u68/board.mk
index 9647b8b8f..cd6ad3617 100644
--- a/hw/bsp/lpcxpresso11u68/board.mk
+++ b/hw/bsp/lpcxpresso11u68/board.mk
@@ -11,7 +11,7 @@ CFLAGS += \
   -D__USE_LPCOPEN \
   -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
   -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \
-  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' 
+  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
 
 MCU_DIR = hw/mcu/nxp/lpcopen/lpc11u6x/lpc_chip_11u6x
 
@@ -32,11 +32,11 @@ INC += \
 	$(TOP)/$(MCU_DIR)/inc
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
 
 # For flash-jlink target
 JLINK_DEVICE = LPC11U68
 
-# flash using pyocd 
+# flash using pyocd
 flash: $(BUILD)/$(PROJECT).hex
 	pyocd flash -t lpc11u68 $<
diff --git a/hw/bsp/lpcxpresso1347/board.mk b/hw/bsp/lpcxpresso1347/board.mk
index 79405c896..25d6fa7a3 100644
--- a/hw/bsp/lpcxpresso1347/board.mk
+++ b/hw/bsp/lpcxpresso1347/board.mk
@@ -12,7 +12,7 @@ CFLAGS += \
   -DCFG_EXAMPLE_VIDEO_READONLY \
   -DCFG_TUSB_MCU=OPT_MCU_LPC13XX \
   -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
-  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' 
+  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
 
 # startup.c and lpc_types.h cause following errors
 CFLAGS += -Wno-error=strict-prototypes -Wno-error=redundant-decls
@@ -36,7 +36,7 @@ INC += \
 	$(TOP)/$(MCU_DIR)/inc
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
 
 # For flash-jlink target
 JLINK_DEVICE = LPC1347
diff --git a/hw/bsp/lpcxpresso1769/board.mk b/hw/bsp/lpcxpresso1769/board.mk
index ecafccc49..d459c8b7b 100644
--- a/hw/bsp/lpcxpresso1769/board.mk
+++ b/hw/bsp/lpcxpresso1769/board.mk
@@ -34,7 +34,7 @@ INC += \
 	$(TOP)/$(MCU_DIR)/inc
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
 
 # For flash-jlink target
 JLINK_DEVICE = LPC1769
diff --git a/hw/bsp/lpcxpresso51u68/board.mk b/hw/bsp/lpcxpresso51u68/board.mk
index 6e39bbcad..b1a126c51 100644
--- a/hw/bsp/lpcxpresso51u68/board.mk
+++ b/hw/bsp/lpcxpresso51u68/board.mk
@@ -9,7 +9,7 @@ CFLAGS += \
   -DCPU_LPC51U68JBD64 \
   -DCFG_TUSB_MCU=OPT_MCU_LPC51UXX \
   -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))' \
-  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' 
+  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
 
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter
@@ -36,14 +36,14 @@ INC += \
 	$(TOP)/$(SDK_DIR)/drivers/common \
 	$(TOP)/$(SDK_DIR)/drivers/flexcomm \
 	$(TOP)/$(SDK_DIR)/drivers/lpc_iocon \
-	$(TOP)/$(SDK_DIR)/drivers/lpc_gpio	
+	$(TOP)/$(SDK_DIR)/drivers/lpc_gpio
 
 SRC_S += $(MCU_DIR)/gcc/startup_LPC51U68.S
 
 LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower.a
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
 
 JLINK_DEVICE = LPC51U68
 PYOCD_TARGET = LPC51U68
diff --git a/hw/bsp/mbed1768/board.mk b/hw/bsp/mbed1768/board.mk
index a65d6eacb..6940bbb55 100644
--- a/hw/bsp/mbed1768/board.mk
+++ b/hw/bsp/mbed1768/board.mk
@@ -34,12 +34,11 @@ INC += \
 	$(TOP)/$(MCU_DIR)/inc
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
 
 # For flash-jlink target
 JLINK_DEVICE = LPC1768
 
-# flash using pyocd 
+# flash using pyocd
 flash: $(BUILD)/$(PROJECT).hex
 	pyocd flash -t lpc1768 $<
-
diff --git a/hw/bsp/mm32/family.mk b/hw/bsp/mm32/family.mk
index c1147b4e9..81af0d166 100644
--- a/hw/bsp/mm32/family.mk
+++ b/hw/bsp/mm32/family.mk
@@ -11,7 +11,7 @@ CFLAGS += \
   -mcpu=cortex-m3 \
   -mfloat-abi=soft \
   -nostdlib -nostartfiles \
-  -DCFG_TUSB_MCU=OPT_MCU_MM32F327X 
+  -DCFG_TUSB_MCU=OPT_MCU_MM32F327X
 
 # suppress warning caused by vendor mcu driver
 CFLAGS += -Wno-error=unused-parameter -Wno-error=maybe-uninitialized -Wno-error=cast-qual
@@ -22,7 +22,7 @@ SRC_C += \
 	$(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Src/hal_gpio.c \
 	$(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Src/hal_rcc.c \
 	$(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Src/hal_uart.c \
-	
+
 INC += \
 	$(TOP)/$(BOARD_PATH) \
 	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
@@ -30,7 +30,7 @@ INC += \
 	$(TOP)/$(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Inc
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
 
 # flash target using on-board
 flash: flash-jlink
diff --git a/hw/bsp/msp432e4/family.mk b/hw/bsp/msp432e4/family.mk
index 7f823b1aa..2383bc604 100644
--- a/hw/bsp/msp432e4/family.mk
+++ b/hw/bsp/msp432e4/family.mk
@@ -34,7 +34,7 @@ INC += \
 SRC_S += $(MCU_DIR)/Source/startup_msp432e411y_gcc.S
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = MSP432E401Y
diff --git a/hw/bsp/ngx4330/board.mk b/hw/bsp/ngx4330/board.mk
index 26f8ae760..99c1f194c 100644
--- a/hw/bsp/ngx4330/board.mk
+++ b/hw/bsp/ngx4330/board.mk
@@ -37,11 +37,11 @@ INC += \
 	$(TOP)/$(MCU_DIR)/inc/config_43xx
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = LPC4330
-JLINK_IF = swd 
+JLINK_IF = swd
 
 # flash using jlink
 flash: flash-jlink
diff --git a/hw/bsp/nrf/family.mk b/hw/bsp/nrf/family.mk
index c79d7e654..4102c8187 100644
--- a/hw/bsp/nrf/family.mk
+++ b/hw/bsp/nrf/family.mk
@@ -42,7 +42,7 @@ SRC_S += hw/mcu/nordic/nrfx/mdk/gcc_startup_$(MCU_VARIANT).S
 ASFLAGS += -D__HEAP_SIZE=0
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = $(MCU_VARIANT)_xxaa
diff --git a/hw/bsp/nutiny_nuc121s/board.mk b/hw/bsp/nutiny_nuc121s/board.mk
index 69092dfd5..aa8f00e70 100644
--- a/hw/bsp/nutiny_nuc121s/board.mk
+++ b/hw/bsp/nutiny_nuc121s/board.mk
@@ -35,7 +35,7 @@ INC += \
   $(TOP)/hw/mcu/nuvoton/nuc121_125/CMSIS/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
 
 # For flash-jlink target
 JLINK_DEVICE = NUC121SC2AE
diff --git a/hw/bsp/nutiny_nuc125s/board.mk b/hw/bsp/nutiny_nuc125s/board.mk
index 0272564c4..bf7610a7b 100644
--- a/hw/bsp/nutiny_nuc125s/board.mk
+++ b/hw/bsp/nutiny_nuc125s/board.mk
@@ -31,7 +31,7 @@ INC += \
   $(TOP)/hw/mcu/nuvoton/nuc121_125/CMSIS/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
 
 # For flash-jlink target
 JLINK_DEVICE = NUC125SC2AE
diff --git a/hw/bsp/nutiny_nuc126v/board.mk b/hw/bsp/nutiny_nuc126v/board.mk
index 3d9e239af..46f53420c 100644
--- a/hw/bsp/nutiny_nuc126v/board.mk
+++ b/hw/bsp/nutiny_nuc126v/board.mk
@@ -37,7 +37,7 @@ INC += \
   $(TOP)/hw/mcu/nuvoton/nuc126/CMSIS/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
 
 # For flash-jlink target
 JLINK_DEVICE = NUC126VG4AE
diff --git a/hw/bsp/nutiny_sdk_nuc120/board.mk b/hw/bsp/nutiny_sdk_nuc120/board.mk
index b06d4873e..b1f9245a6 100644
--- a/hw/bsp/nutiny_sdk_nuc120/board.mk
+++ b/hw/bsp/nutiny_sdk_nuc120/board.mk
@@ -30,7 +30,7 @@ INC += \
   $(TOP)/hw/mcu/nuvoton/nuc100_120/CMSIS/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
 
 # For flash-jlink target
 JLINK_DEVICE = NUC120LE3
diff --git a/hw/bsp/nutiny_sdk_nuc505/board.mk b/hw/bsp/nutiny_sdk_nuc505/board.mk
index 3118dc7f8..3e48d3998 100644
--- a/hw/bsp/nutiny_sdk_nuc505/board.mk
+++ b/hw/bsp/nutiny_sdk_nuc505/board.mk
@@ -42,14 +42,14 @@ INC += \
   $(TOP)/hw/mcu/nuvoton/nuc505/CMSIS/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = NUC505YO13Y
 
 # Note
-# To be able to program the SPI flash, it need to boot with ICP mode "1011". 
-# However, in ICP mode, opencod cannot establish connection to the mcu. 
+# To be able to program the SPI flash, it need to boot with ICP mode "1011".
+# However, in ICP mode, opencod cannot establish connection to the mcu.
 # Therefore, there is no easy command line flash for NUC505
 # It is probably better to just use Nuvoton NuMicro ICP programming on windows to program the board
 # - 1111 "SPI" (run from internal flash)
diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk
index 3c681a7c3..d48272e61 100644
--- a/hw/bsp/ra/family.mk
+++ b/hw/bsp/ra/family.mk
@@ -52,4 +52,4 @@ INC += \
 
 # For freeRTOS port source
 # hack to use the port provided by renesas
-FREERTOS_PORT = hw/mcu/renesas/fsp/ra/fsp/src/rm_freertos_port
+FREERTOS_PORTABLE_SRC = hw/mcu/renesas/fsp/ra/fsp/src/rm_freertos_port
diff --git a/hw/bsp/rx/boards/gr_citrus/board.mk b/hw/bsp/rx/boards/gr_citrus/board.mk
index 7bef40614..e3af8d9b0 100644
--- a/hw/bsp/rx/boards/gr_citrus/board.mk
+++ b/hw/bsp/rx/boards/gr_citrus/board.mk
@@ -9,7 +9,7 @@ MCU_DIR = hw/mcu/renesas/rx/rx63n
 LD_FILE = $(BOARD_PATH)/r5f5631fd.ld
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/RX600
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RX600
 
 # For flash-jlink target
 JLINK_DEVICE = R5F5631F
diff --git a/hw/bsp/rx/boards/rx65n_target/board.mk b/hw/bsp/rx/boards/rx65n_target/board.mk
index 18c7d354d..90bc0efbb 100644
--- a/hw/bsp/rx/boards/rx65n_target/board.mk
+++ b/hw/bsp/rx/boards/rx65n_target/board.mk
@@ -12,7 +12,7 @@ MCU_DIR = hw/mcu/renesas/rx/rx65n
 LD_FILE = $(BOARD_PATH)/r5f565ne.ld
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/RX600
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RX600
 
 # For flash-jlink target
 JLINK_DEVICE = R5F565NE
diff --git a/hw/bsp/samd11/family.mk b/hw/bsp/samd11/family.mk
index ef1f1424d..dc6678b30 100644
--- a/hw/bsp/samd11/family.mk
+++ b/hw/bsp/samd11/family.mk
@@ -37,4 +37,4 @@ INC += \
 	$(TOP)/hw/mcu/microchip/samd11/CMSIS/Core/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
diff --git a/hw/bsp/samd21/family.mk b/hw/bsp/samd21/family.mk
index 158ea000f..6d02d7fa6 100644
--- a/hw/bsp/samd21/family.mk
+++ b/hw/bsp/samd21/family.mk
@@ -37,7 +37,7 @@ INC += \
 	$(TOP)/hw/mcu/microchip/samd21/CMSIS/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
 
 # flash using bossac at least version 1.8
 # can be found in arduino15/packages/arduino/tools/bossac/
diff --git a/hw/bsp/samd51/family.mk b/hw/bsp/samd51/family.mk
index aa3af5318..3ecc5aa66 100644
--- a/hw/bsp/samd51/family.mk
+++ b/hw/bsp/samd51/family.mk
@@ -38,7 +38,7 @@ INC += \
 	$(TOP)/hw/mcu/microchip/samd51/CMSIS/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
 
 # flash using bossac at least version 1.8
 # can be found in arduino15/packages/arduino/tools/bossac/
diff --git a/hw/bsp/same54xplainedpro/board.mk b/hw/bsp/same54xplainedpro/board.mk
index 7d7ede0f0..1c6732231 100644
--- a/hw/bsp/same54xplainedpro/board.mk
+++ b/hw/bsp/same54xplainedpro/board.mk
@@ -38,7 +38,7 @@ INC += \
 	$(TOP)/hw/mcu/microchip/same54/CMSIS/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = ATSAME54P20
diff --git a/hw/bsp/same70_qmtech/board.mk b/hw/bsp/same70_qmtech/board.mk
index 77dfbe499..1dcb8bfcd 100644
--- a/hw/bsp/same70_qmtech/board.mk
+++ b/hw/bsp/same70_qmtech/board.mk
@@ -44,7 +44,7 @@ INC += \
 	$(TOP)/$(ASF_DIR)/CMSIS/Core/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM7
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7
 
 # For flash-jlink target
 JLINK_DEVICE = SAME70N19B
diff --git a/hw/bsp/same70_xplained/board.mk b/hw/bsp/same70_xplained/board.mk
index 2f94512d0..95c4aaaa2 100644
--- a/hw/bsp/same70_xplained/board.mk
+++ b/hw/bsp/same70_xplained/board.mk
@@ -44,7 +44,7 @@ INC += \
 	$(TOP)/$(ASF_DIR)/CMSIS/Core/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM7
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7
 
 # For flash-jlink target
 JLINK_DEVICE = SAME70Q21B
@@ -53,4 +53,4 @@ JLINK_DEVICE = SAME70Q21B
 # Note: SAME70's GPNVM1 must be set to 1 to boot from flash with
 # 	edbg -t same70 -F w0,1,1
 flash: $(BUILD)/$(PROJECT).bin
-	edbg --verbose -t same70 -pv -f $< 
+	edbg --verbose -t same70 -pv -f $<
diff --git a/hw/bsp/samg55xplained/board.mk b/hw/bsp/samg55xplained/board.mk
index 886430231..7cc9487fd 100644
--- a/hw/bsp/samg55xplained/board.mk
+++ b/hw/bsp/samg55xplained/board.mk
@@ -42,11 +42,11 @@ INC += \
 	$(TOP)/$(ASF_DIR)/CMSIS/Core/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = ATSAMG55J19
 
 # flash using edbg from https://github.com/ataradov/edbg
 flash: $(BUILD)/$(PROJECT).bin
-	edbg --verbose -t samg55 -pv -f $< 
+	edbg --verbose -t samg55 -pv -f $<
diff --git a/hw/bsp/saml2x/family.mk b/hw/bsp/saml2x/family.mk
index 8ea553514..6022158de 100644
--- a/hw/bsp/saml2x/family.mk
+++ b/hw/bsp/saml2x/family.mk
@@ -39,7 +39,7 @@ INC += \
 	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
 
 # flash using bossac at least version 1.8
 # can be found in arduino15/packages/arduino/tools/bossac/
diff --git a/hw/bsp/sltb009a/board.mk b/hw/bsp/sltb009a/board.mk
index d4318b5e2..f9c1dd4db 100644
--- a/hw/bsp/sltb009a/board.mk
+++ b/hw/bsp/sltb009a/board.mk
@@ -35,7 +35,7 @@ INC += \
   $(TOP)/hw/bsp/$(BOARD)
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = EFM32GG12B810F1024
diff --git a/hw/bsp/stm32f0/family.mk b/hw/bsp/stm32f0/family.mk
index d57b14d53..08e349a81 100644
--- a/hw/bsp/stm32f0/family.mk
+++ b/hw/bsp/stm32f0/family.mk
@@ -53,4 +53,4 @@ INC += \
   $(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
diff --git a/hw/bsp/stm32f1/family.mk b/hw/bsp/stm32f1/family.mk
index 72ca259b7..cd1d587f1 100644
--- a/hw/bsp/stm32f1/family.mk
+++ b/hw/bsp/stm32f1/family.mk
@@ -44,7 +44,7 @@ INC += \
   $(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f103c8
diff --git a/hw/bsp/stm32f207nucleo/board.mk b/hw/bsp/stm32f207nucleo/board.mk
index f418c6c04..55581e1ec 100644
--- a/hw/bsp/stm32f207nucleo/board.mk
+++ b/hw/bsp/stm32f207nucleo/board.mk
@@ -39,7 +39,7 @@ INC += \
   $(TOP)/hw/bsp/$(BOARD)
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM3
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f207zg
diff --git a/hw/bsp/stm32f303disco/board.mk b/hw/bsp/stm32f303disco/board.mk
index 371aba0f3..b81de4ee4 100644
--- a/hw/bsp/stm32f303disco/board.mk
+++ b/hw/bsp/stm32f303disco/board.mk
@@ -40,7 +40,7 @@ INC += \
   $(TOP)/hw/bsp/$(BOARD)
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f303vc
diff --git a/hw/bsp/stm32f4/family.mk b/hw/bsp/stm32f4/family.mk
index bc9504038..394c4a72f 100644
--- a/hw/bsp/stm32f4/family.mk
+++ b/hw/bsp/stm32f4/family.mk
@@ -52,7 +52,7 @@ INC += \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32f7/family.mk b/hw/bsp/stm32f7/family.mk
index 0dcaa0453..b44381586 100644
--- a/hw/bsp/stm32f7/family.mk
+++ b/hw/bsp/stm32f7/family.mk
@@ -66,4 +66,4 @@ INC += \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM7/r0p1
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1
diff --git a/hw/bsp/stm32g4/family.mk b/hw/bsp/stm32g4/family.mk
index f8f04384a..5ed84422d 100644
--- a/hw/bsp/stm32g4/family.mk
+++ b/hw/bsp/stm32g4/family.mk
@@ -12,7 +12,7 @@ include $(TOP)/$(BOARD_PATH)/board.mk
 # --------------
 CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32G4
-  
+
 # GCC Flags
 GCC_CFLAGS += \
   -flto \
@@ -53,7 +53,7 @@ INC += \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32h7/family.mk b/hw/bsp/stm32h7/family.mk
index 2641edba5..8042248a8 100644
--- a/hw/bsp/stm32h7/family.mk
+++ b/hw/bsp/stm32h7/family.mk
@@ -68,5 +68,4 @@ INC += \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM7/r0p1
-
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1
diff --git a/hw/bsp/stm32l0/family.mk b/hw/bsp/stm32l0/family.mk
index 622fa61e0..67a5c69b8 100644
--- a/hw/bsp/stm32l0/family.mk
+++ b/hw/bsp/stm32l0/family.mk
@@ -37,4 +37,4 @@ INC += \
   $(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM0
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
diff --git a/hw/bsp/stm32l0538disco/board.mk b/hw/bsp/stm32l0538disco/board.mk
index b25380c5c..72e887adf 100644
--- a/hw/bsp/stm32l0538disco/board.mk
+++ b/hw/bsp/stm32l0538disco/board.mk
@@ -41,12 +41,12 @@ INC += \
   $(TOP)/hw/bsp/$(BOARD)
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM0
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
 
 # For flash-jlink target
 JLINK_DEVICE = STM32L053R8
 
-# Path to STM32 Cube Programmer CLI, should be added into system path 
+# Path to STM32 Cube Programmer CLI, should be added into system path
 STM32Prog = STM32_Programmer_CLI
 
 # flash target using on-board stlink
diff --git a/hw/bsp/stm32l4/family.mk b/hw/bsp/stm32l4/family.mk
index 3ba459dc2..0e84d1af0 100644
--- a/hw/bsp/stm32l4/family.mk
+++ b/hw/bsp/stm32l4/family.mk
@@ -55,7 +55,7 @@ INC += \
 	$(TOP)/$(BOARD_PATH)
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32u5/family.mk b/hw/bsp/stm32u5/family.mk
index 1cfb81e43..23d7f4dda 100644
--- a/hw/bsp/stm32u5/family.mk
+++ b/hw/bsp/stm32u5/family.mk
@@ -16,7 +16,7 @@ CFLAGS += \
   -nostdlib -nostartfiles \
   -DCFG_TUSB_MCU=OPT_MCU_STM32U5
 
-# suppress warning caused by vendor mcu driver 
+# suppress warning caused by vendor mcu driver
 CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align -Wno-error=undef -Wno-error=unused-parameter
 
 #src/portable/st/synopsys/dcd_synopsys.c
@@ -39,7 +39,7 @@ INC += \
 	$(TOP)/$(BOARD_PATH)
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM33_NTZ/non_secure
+FREERTOS_PORTABLE_SRC = ARM_CM33_NTZ/non_secure
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32wb/family.mk b/hw/bsp/stm32wb/family.mk
index 66f8ff4e2..97210889c 100644
--- a/hw/bsp/stm32wb/family.mk
+++ b/hw/bsp/stm32wb/family.mk
@@ -38,7 +38,7 @@ INC += \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/tm4c123/family.mk b/hw/bsp/tm4c123/family.mk
index 73b65f00c..021b47fd3 100644
--- a/hw/bsp/tm4c123/family.mk
+++ b/hw/bsp/tm4c123/family.mk
@@ -12,7 +12,7 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_TM4C123 \
   -uvectors \
   -DTM4C123GH6PM
-  
+
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=strict-prototypes -Wno-error=cast-qual
 
@@ -33,4 +33,4 @@ SRC_C += \
 	$(MCU_DIR)/Source/GCC/tm4c123_startup.c
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
diff --git a/hw/bsp/xmc4000/family.mk b/hw/bsp/xmc4000/family.mk
index 134098dac..1094f3b72 100644
--- a/hw/bsp/xmc4000/family.mk
+++ b/hw/bsp/xmc4000/family.mk
@@ -37,4 +37,4 @@ INC += \
 	$(TOP)/$(MCU_DIR)/XMCLib/inc
 
 # For freeRTOS port source
-FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F

From e7d212f33760f13b0102a307569aac0ed8e14bd2 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 16 Mar 2023 23:21:15 +0700
Subject: [PATCH 155/691] more fix

---
 hw/bsp/stm32u5/family.mk                | 2 +-
 src/portable/renesas/rusb2/rusb2_ra.h   | 6 +++---
 src/portable/renesas/rusb2/rusb2_rx.h   | 6 +++---
 src/portable/renesas/rusb2/rusb2_type.h | 6 +++---
 4 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/hw/bsp/stm32u5/family.mk b/hw/bsp/stm32u5/family.mk
index 23d7f4dda..e1c496dee 100644
--- a/hw/bsp/stm32u5/family.mk
+++ b/hw/bsp/stm32u5/family.mk
@@ -39,7 +39,7 @@ INC += \
 	$(TOP)/$(BOARD_PATH)
 
 # For freeRTOS port source
-FREERTOS_PORTABLE_SRC = ARM_CM33_NTZ/non_secure
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/src/portable/renesas/rusb2/rusb2_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h
index 24658e95a..5785850cc 100644
--- a/src/portable/renesas/rusb2/rusb2_ra.h
+++ b/src/portable/renesas/rusb2/rusb2_ra.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _LINK_RA_H_
-#define _LINK_RA_H_
+#ifndef _RUSB2_RA_H_
+#define _RUSB2_RA_H_
 
 #ifdef __cplusplus
 extern "C" {
@@ -57,4 +57,4 @@ TU_ATTR_ALWAYS_INLINE static inline void rusb2_phy_init(void)
 }
 #endif
 
-#endif /* _LINK_RA_H_ */
+#endif /* _RUSB2_RA_H_ */
diff --git a/src/portable/renesas/rusb2/rusb2_rx.h b/src/portable/renesas/rusb2/rusb2_rx.h
index c28689df1..397c0d56c 100644
--- a/src/portable/renesas/rusb2/rusb2_rx.h
+++ b/src/portable/renesas/rusb2/rusb2_rx.h
@@ -26,8 +26,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _LINK_RX_H_
-#define _LINK_RX_H_
+#ifndef _RUSB2_RX_H_
+#define _RUSB2_RX_H_
 
 #ifdef __cplusplus
 extern "C" {
@@ -71,4 +71,4 @@ TU_ATTR_ALWAYS_INLINE static inline void rusb2_phy_init(void)
 }
 #endif
 
-#endif /* _LINK_RX_H_ */
+#endif /* _RUSB2_RX_H_ */
diff --git a/src/portable/renesas/rusb2/rusb2_type.h b/src/portable/renesas/rusb2/rusb2_type.h
index 6a5c7f8ff..7a2898366 100644
--- a/src/portable/renesas/rusb2/rusb2_type.h
+++ b/src/portable/renesas/rusb2/rusb2_type.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_LINK_TYPE_H_
-#define _TUSB_LINK_TYPE_H_
+#ifndef _TUSB_RUSB2_TYPE_H_
+#define _TUSB_RUSB2_TYPE_H_
 
 #include <stdint.h>
 
@@ -1666,4 +1666,4 @@ TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DPUSR1R_FS ) == 0x00000404, "incorrect of
 }
 #endif
 
-#endif /* _TUSB_LINK_TYPE_H_ */
+#endif /* _TUSB_RUSB2_TYPE_H_ */

From c12795734c3434db999d3198173335050a3b59a4 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Mar 2023 10:59:08 +0700
Subject: [PATCH 156/691] reduce number  of supported RA to only those that is
 tested

---
 README.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README.rst b/README.rst
index a8d471a03..566af8584 100644
--- a/README.rst
+++ b/README.rst
@@ -51,7 +51,7 @@ The stack supports the following MCUs:
 - **Renesas:**
 
 	- RX Series: 63N, 65N, 72N
-	- RA Series: RA2A1, RA2E1, RA2E2, RA2l1, RA4E1, RA4M1, RA4M2, RA4M3, RA4W1, RA6E1, RA6M1, RA6M2, RA6M3, RA6M4, RA6M5, RA6T1, RA6T2
+	- RA Series: RA4M1, RA4M3
 
 - **Silabs:** EFM32GG
 - **Sony:** CXD56

From f349ae77029c3a82bd9509c1ad57e3e6cd815596 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Mar 2023 13:58:01 +0700
Subject: [PATCH 157/691] fix enumerate one device at a time

---
 src/host/usbh.c | 35 +++++++++++++++++++++--------------
 1 file changed, 21 insertions(+), 14 deletions(-)

diff --git a/src/host/usbh.c b/src/host/usbh.c
index 12b0ed203..45a2a0c66 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -54,8 +54,6 @@
 // USBH-HCD common data structure
 //--------------------------------------------------------------------+
 
-// device0 struct must be strictly a subset of normal device struct
-// TODO refactor later
 typedef struct
 {
   // port
@@ -63,15 +61,13 @@ typedef struct
   uint8_t hub_addr;
   uint8_t hub_port;
   uint8_t speed;
+  volatile uint8_t enumerating;
 
-  struct TU_ATTR_PACKED
-  {
-    volatile uint8_t connected  : 1;
-    volatile uint8_t addressed  : 1;
-    volatile uint8_t configured : 1;
-    volatile uint8_t suspended  : 1;
-  };
-
+//  struct TU_ATTR_PACKED {
+//    uint8_t          speed       : 4; // packed speed to save footprint
+//    volatile uint8_t enumerating : 1;
+//    uint8_t TU_RESERVED : 3;
+//  };
 } usbh_dev0_t;
 
 typedef struct {
@@ -402,10 +398,18 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr)
     switch (event.event_id)
     {
       case HCD_EVENT_DEVICE_ATTACH:
-        // TODO due to the shared _usbh_ctrl_buf, we must complete enumerating
+        // due to the shared _usbh_ctrl_buf, we must complete enumerating
         // one device before enumerating another one.
-        TU_LOG_USBH("[%u:] USBH DEVICE ATTACH\r\n", event.rhport);
-        enum_new_device(&event);
+        if ( _dev0.enumerating )
+        {
+          TU_LOG1("[%u:] USBH Defer Attach until current enumeration complete\r\n", event.rhport);
+          osal_queue_send(_usbh_q, &event, in_isr);
+        }else
+        {
+          TU_LOG1("[%u:] USBH DEVICE ATTACH\r\n", event.rhport);
+          _dev0.enumerating = 1;
+          enum_new_device(&event);
+        }
       break;
 
       case HCD_EVENT_DEVICE_REMOVE:
@@ -1623,6 +1627,9 @@ void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num)
 
 static void enum_full_complete(void)
 {
+  // mark enumeration as complete
+  _dev0.enumerating = 0;
+
 #if CFG_TUH_HUB
   // get next hub status
   if (_dev0.hub_addr) hub_edpt_status_xfer(_dev0.hub_addr);

From 317177c83d3c28d66bfe60be971ff37a44bd84df Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Mar 2023 14:06:25 +0700
Subject: [PATCH 158/691] update host example, add pio-pico-usb for rp2040

---
 examples/host/bare_api/CMakeLists.txt             | 5 +++++
 examples/host/bare_api/src/tusb_config.h          | 4 ++--
 examples/host/cdc_msc_hid/CMakeLists.txt          | 5 +++++
 examples/host/cdc_msc_hid/src/tusb_config.h       | 6 +++---
 examples/host/hid_controller/CMakeLists.txt       | 5 +++++
 examples/host/hid_controller/src/tusb_config.h    | 7 +++----
 examples/host/msc_file_explorer/CMakeLists.txt    | 4 ++++
 examples/host/msc_file_explorer/src/tusb_config.h | 6 +++---
 hw/bsp/rp2040/family.mk                           | 3 ---
 src/class/cdc/cdc_host.c                          | 8 ++++----
 src/common/tusb_common.h                          | 6 ++++++
 src/common/tusb_types.h                           | 5 -----
 12 files changed, 40 insertions(+), 24 deletions(-)

diff --git a/examples/host/bare_api/CMakeLists.txt b/examples/host/bare_api/CMakeLists.txt
index 4879613b4..616edd4ac 100644
--- a/examples/host/bare_api/CMakeLists.txt
+++ b/examples/host/bare_api/CMakeLists.txt
@@ -25,3 +25,8 @@ target_include_directories(${PROJECT} PUBLIC
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
 family_configure_host_example(${PROJECT})
+
+# Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host
+if(FAMILY STREQUAL "rp2040")
+  family_add_pico_pio_usb(${PROJECT})
+endif()
diff --git a/examples/host/bare_api/src/tusb_config.h b/examples/host/bare_api/src/tusb_config.h
index 701aa6d90..64be41a4e 100644
--- a/examples/host/bare_api/src/tusb_config.h
+++ b/examples/host/bare_api/src/tusb_config.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -100,7 +100,7 @@
 
 // max device support (excluding hub device)
 // 1 hub typically has 4 ports
-#define CFG_TUH_DEVICE_MAX          (CFG_TUH_HUB ? 4 : 1)
+#define CFG_TUH_DEVICE_MAX          (3*CFG_TUH_HUB + 1)
 
 // Max endpoint per device
 #define CFG_TUH_ENDPOINT_MAX        8
diff --git a/examples/host/cdc_msc_hid/CMakeLists.txt b/examples/host/cdc_msc_hid/CMakeLists.txt
index dbba6bf44..d7d1a54d7 100644
--- a/examples/host/cdc_msc_hid/CMakeLists.txt
+++ b/examples/host/cdc_msc_hid/CMakeLists.txt
@@ -28,3 +28,8 @@ target_include_directories(${PROJECT} PUBLIC
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
 family_configure_host_example(${PROJECT})
+
+# Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host
+if(FAMILY STREQUAL "rp2040")
+  family_add_pico_pio_usb(${PROJECT})
+endif()
diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h
index 139a921d1..4b50f2096 100644
--- a/examples/host/cdc_msc_hid/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid/src/tusb_config.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -101,8 +101,8 @@
 #define CFG_TUH_MSC                 1
 #define CFG_TUH_VENDOR              0
 
-// max device support (excluding hub device)
-#define CFG_TUH_DEVICE_MAX          (CFG_TUH_HUB ? 4 : 1) // hub typically has 4 ports
+// max device support (excluding hub device): 1 hub typically has 4 ports
+#define CFG_TUH_DEVICE_MAX          (3*CFG_TUH_HUB + 1)
 
 //------------- HID -------------//
 #define CFG_TUH_HID_EPIN_BUFSIZE    64
diff --git a/examples/host/hid_controller/CMakeLists.txt b/examples/host/hid_controller/CMakeLists.txt
index aa50b5a52..ac3070b82 100644
--- a/examples/host/hid_controller/CMakeLists.txt
+++ b/examples/host/hid_controller/CMakeLists.txt
@@ -26,3 +26,8 @@ target_include_directories(${PROJECT} PUBLIC
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
 family_configure_host_example(${PROJECT})
+
+# Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host
+if(FAMILY STREQUAL "rp2040")
+  family_add_pico_pio_usb(${PROJECT})
+endif()
diff --git a/examples/host/hid_controller/src/tusb_config.h b/examples/host/hid_controller/src/tusb_config.h
index e6d6f873d..2e0dd0dbe 100644
--- a/examples/host/hid_controller/src/tusb_config.h
+++ b/examples/host/hid_controller/src/tusb_config.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -101,9 +101,8 @@
 #define CFG_TUH_MSC                 0
 #define CFG_TUH_VENDOR              0
 
-// max device support (excluding hub device)
-// 1 hub typically has 4 ports
-#define CFG_TUH_DEVICE_MAX          (CFG_TUH_HUB ? 4 : 1)
+// max device support (excluding hub device): 1 hub typically has 4 ports
+#define CFG_TUH_DEVICE_MAX          (3*CFG_TUH_HUB + 1)
 
 //------------- HID -------------//
 
diff --git a/examples/host/msc_file_explorer/CMakeLists.txt b/examples/host/msc_file_explorer/CMakeLists.txt
index 2c06eafee..7955b3078 100644
--- a/examples/host/msc_file_explorer/CMakeLists.txt
+++ b/examples/host/msc_file_explorer/CMakeLists.txt
@@ -32,3 +32,7 @@ target_include_directories(${PROJECT} PUBLIC
 # in hw/bsp/FAMILY/family.cmake for details.
 family_configure_host_example(${PROJECT})
 
+# Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host
+if(FAMILY STREQUAL "rp2040")
+  family_add_pico_pio_usb(${PROJECT})
+endif()
diff --git a/examples/host/msc_file_explorer/src/tusb_config.h b/examples/host/msc_file_explorer/src/tusb_config.h
index ddf8368f4..eaf3ea6d4 100644
--- a/examples/host/msc_file_explorer/src/tusb_config.h
+++ b/examples/host/msc_file_explorer/src/tusb_config.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -101,8 +101,8 @@
 #define CFG_TUH_HID                 0 // typical keyboard + mouse device can have 3-4 HID interfaces
 #define CFG_TUH_VENDOR              0
 
-// max device support (excluding hub device)
-#define CFG_TUH_DEVICE_MAX          (CFG_TUH_HUB ? 4 : 1) // hub typically has 4 ports
+// max device support (excluding hub device): 1 hub typically has 4 ports
+#define CFG_TUH_DEVICE_MAX          (3*CFG_TUH_HUB + 1)
 
 //------------- MSC -------------//
 #define CFG_TUH_MSC_MAXLUN    4 // typical for most card reader
diff --git a/hw/bsp/rp2040/family.mk b/hw/bsp/rp2040/family.mk
index cf6b53793..25d1ad9c5 100644
--- a/hw/bsp/rp2040/family.mk
+++ b/hw/bsp/rp2040/family.mk
@@ -13,9 +13,6 @@ $(BUILD):
 all: $(BUILD)
 	$(MAKE) -C $(BUILD)
 
-clean:
-	$(RM) -rf $(BUILD)
-
 flash: flash-pyocd
 flash-uf2:
 	@$(CP) $(BUILD)/$(PROJECT).uf2 /media/$(USER)/RPI-RP2
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index e9c3d34cb..011ee49dc 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -97,7 +97,7 @@ static inline uint8_t get_idx_by_ep_addr(uint8_t daddr, uint8_t ep_addr)
     }
   }
 
-  return TUSB_INDEX_INVALID;
+  return TU_INDEX_INVALID_8;
 }
 
 
@@ -124,7 +124,7 @@ uint8_t tuh_cdc_itf_get_index(uint8_t daddr, uint8_t itf_num)
     if (p_cdc->daddr == daddr && p_cdc->bInterfaceNumber == itf_num) return i;
   }
 
-  return TUSB_INDEX_INVALID;
+  return TU_INDEX_INVALID_8;
 }
 
 bool tuh_cdc_itf_get_info(uint8_t idx, tuh_cdc_itf_info_t* info)
@@ -533,7 +533,7 @@ static void process_cdc_config(tuh_xfer_t* xfer)
   uintptr_t const state = xfer->user_data;
   uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
   uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
-  TU_ASSERT(idx != TUSB_INDEX_INVALID, );
+  TU_ASSERT(idx != TU_INDEX_INVALID_8, );
 
   switch(state)
   {
diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index 957491aa9..faccf8726 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -75,6 +75,12 @@
 
 #include "tusb_timeout.h" // TODO remove
 
+enum
+{
+  TU_INDEX_INVALID_8 = 0xFFu
+};
+
+
 //--------------------------------------------------------------------+
 // Optional API implemented by application if needed
 // TODO move to a more ovious place/file
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index 7266a525e..d567bd482 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -273,11 +273,6 @@ enum
   CONTROL_STAGE_ACK
 };
 
-enum
-{
-  TUSB_INDEX_INVALID = 0xff
-};
-
 //--------------------------------------------------------------------+
 // USB Descriptors
 //--------------------------------------------------------------------+

From e1fda007f6ad7f05452cd2bb02f8578197b9339e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Mar 2023 14:46:02 +0700
Subject: [PATCH 159/691] minor refactor to invalid index

---
 src/host/usbh.c | 26 +++++++++++---------------
 1 file changed, 11 insertions(+), 15 deletions(-)

diff --git a/src/host/usbh.c b/src/host/usbh.c
index 45a2a0c66..aeab681e9 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -118,10 +118,6 @@ typedef struct {
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
 
-// Invalid driver ID in itf2drv[] ep2drv[][] mapping
-enum { DRVID_INVALID = 0xFFu };
-enum { CONTROLLER_INVALID = 0xFFu };
-
 #if CFG_TUSB_DEBUG >= 2
   #define DRIVER_NAME(_name)    .name = _name,
 #else
@@ -199,7 +195,7 @@ enum { CONFIG_NUM = 1 }; // default to use configuration 1
 // sum of end device + hub
 #define TOTAL_DEVICES   (CFG_TUH_DEVICE_MAX + CFG_TUH_HUB)
 
-static uint8_t _usbh_controller = CONTROLLER_INVALID;
+static uint8_t _usbh_controller = TU_INDEX_INVALID_8;
 
 // Device with address = 0 for enumeration
 static usbh_dev0_t _dev0;
@@ -307,13 +303,13 @@ tusb_speed_t tuh_speed_get (uint8_t dev_addr)
 static void clear_device(usbh_device_t* dev)
 {
   tu_memclr(dev, sizeof(usbh_device_t));
-  memset(dev->itf2drv, DRVID_INVALID, sizeof(dev->itf2drv)); // invalid mapping
-  memset(dev->ep2drv , DRVID_INVALID, sizeof(dev->ep2drv )); // invalid mapping
+  memset(dev->itf2drv, TU_INDEX_INVALID_8, sizeof(dev->itf2drv)); // invalid mapping
+  memset(dev->ep2drv , TU_INDEX_INVALID_8, sizeof(dev->ep2drv )); // invalid mapping
 }
 
 bool tuh_inited(void)
 {
-  return _usbh_controller != CONTROLLER_INVALID;
+  return _usbh_controller != TU_INDEX_INVALID_8;
 }
 
 bool tuh_init(uint8_t controller_id)
@@ -402,11 +398,11 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr)
         // one device before enumerating another one.
         if ( _dev0.enumerating )
         {
-          TU_LOG1("[%u:] USBH Defer Attach until current enumeration complete\r\n", event.rhport);
+          TU_LOG_USBH("[%u:] USBH Defer Attach until current enumeration complete\r\n", event.rhport);
           osal_queue_send(_usbh_q, &event, in_isr);
         }else
         {
-          TU_LOG1("[%u:] USBH DEVICE ATTACH\r\n", event.rhport);
+          TU_LOG_USBH("[%u:] USBH DEVICE ATTACH\r\n", event.rhport);
           _dev0.enumerating = 1;
           enum_new_device(&event);
         }
@@ -1362,11 +1358,11 @@ static void process_enumeration(tuh_xfer_t* xfer)
 
       dev->configured = 1;
 
-      // Start the Set Configuration process for interfaces (itf = DRVID_INVALID)
+      // Start the Set Configuration process for interfaces (itf = TU_INDEX_INVALID_8)
       // Since driver can perform control transfer within its set_config, this is done asynchronously.
       // The process continue with next interface when class driver complete its sequence with usbh_driver_set_config_complete()
-      // TODO use separated API instead of using DRVID_INVALID
-      usbh_driver_set_config_complete(daddr, DRVID_INVALID);
+      // TODO use separated API instead of using TU_INDEX_INVALID_8
+      usbh_driver_set_config_complete(daddr, TU_INDEX_INVALID_8);
     }
     break;
 
@@ -1566,7 +1562,7 @@ static bool _parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configur
           uint8_t const itf_num = desc_itf->bInterfaceNumber+i;
 
           // Interface number must not be used already
-          TU_ASSERT( DRVID_INVALID == dev->itf2drv[itf_num] );
+          TU_ASSERT( TU_INDEX_INVALID_8 == dev->itf2drv[itf_num] );
           dev->itf2drv[itf_num] = drv_id;
         }
 
@@ -1600,7 +1596,7 @@ void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num)
     // IAD binding interface such as CDCs should return itf_num + 1 when complete
     // with usbh_driver_set_config_complete()
     uint8_t const drv_id = dev->itf2drv[itf_num];
-    if (drv_id != DRVID_INVALID)
+    if (drv_id != TU_INDEX_INVALID_8)
     {
       usbh_class_driver_t const * driver = &usbh_class_drivers[drv_id];
       TU_LOG_USBH("%s set config: itf = %u\r\n", driver->name, itf_num);

From 511f5be8b34f0a28b20773f2d39bda575f07065f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Mar 2023 14:46:34 +0700
Subject: [PATCH 160/691] bump up pico-pio-usb dependency

---
 tools/get_deps.py | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/get_deps.py b/tools/get_deps.py
index 3aa95ece5..2d4fcf5de 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -17,8 +17,8 @@ deps_list = {
     'hw/mcu/nxp/lpcopen'                       : ['43c45c85405a5dd114fff0ea95cca62837740c13', 'https://github.com/hathach/nxp_lpcopen.git'                    ],
     'hw/mcu/nxp/mcux-sdk'                      : ['ae2ab01d9d70ad00cd0e935c2552bd5f0e5c0294', 'https://github.com/NXPmicro/mcux-sdk.git'                      ],
     'hw/mcu/nxp/nxp_sdk'                       : ['845c8fc49b6fb660f06a5c45225494eacb06f00c', 'https://github.com/hathach/nxp_sdk.git'                        ],
-    'hw/mcu/raspberry_pi/Pico-PIO-USB'         : ['9ff3f52fd3c1f81532bce8dd311aa8fc8d9b2665', 'https://github.com/sekigon-gonnoc/Pico-PIO-USB.git'            ],
-    'hw/mcu/renesas/fsp'                       : ['8dc14709f2a6518b43f71efad70d900b7718d9f1', 'https://github.com/renesas/fsp.git'                            ],    
+    'hw/mcu/raspberry_pi/Pico-PIO-USB'         : ['c3715ce94b6f6391856de56081d4d9b3e98fa93d', 'https://github.com/sekigon-gonnoc/Pico-PIO-USB.git'            ],
+    'hw/mcu/renesas/fsp'                       : ['8dc14709f2a6518b43f71efad70d900b7718d9f1', 'https://github.com/renesas/fsp.git'                            ],
     'hw/mcu/renesas/rx'                        : ['706b4e0cf485605c32351e2f90f5698267996023', 'https://github.com/kkitayam/rx_device.git'                     ],
     'hw/mcu/silabs/cmsis-dfp-efm32gg12b'       : ['f1c31b7887669cb230b3ea63f9b56769078960bc', 'https://github.com/cmsis-packs/cmsis-dfp-efm32gg12b.git'       ],
     'hw/mcu/sony/cxd56/spresense-exported-sdk' : ['2ec2a1538362696118dc3fdf56f33dacaf8f4067', 'https://github.com/sonydevworld/spresense-exported-sdk.git'    ],

From 6763521ec7f3979dcd7bc0b37a756f8d13399cbb Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Mar 2023 15:31:21 +0700
Subject: [PATCH 161/691] remove all submodules

---
 .gitmodules         |  9 ---------
 lib/FreeRTOS-Kernel |  1 -
 lib/lwip            |  1 -
 tools/get_deps.py   | 30 +++++++++++++++++++++---------
 tools/uf2           |  1 -
 5 files changed, 21 insertions(+), 21 deletions(-)
 delete mode 160000 lib/FreeRTOS-Kernel
 delete mode 160000 lib/lwip
 delete mode 160000 tools/uf2

diff --git a/.gitmodules b/.gitmodules
index 469192026..e69de29bb 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -1,9 +0,0 @@
-[submodule "tools/uf2"]
-	path = tools/uf2
-	url = https://github.com/microsoft/uf2.git
-[submodule "lib/lwip"]
-	path = lib/lwip
-	url = https://github.com/lwip-tcpip/lwip.git
-[submodule "lib/FreeRTOS-Kernel"]
-	path = lib/FreeRTOS-Kernel
-	url = https://github.com/FreeRTOS/FreeRTOS-Kernel.git
diff --git a/lib/FreeRTOS-Kernel b/lib/FreeRTOS-Kernel
deleted file mode 160000
index 2a604f4a2..000000000
--- a/lib/FreeRTOS-Kernel
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 2a604f4a2818b8354b5e1a39e388eb5e16cfbc1f
diff --git a/lib/lwip b/lib/lwip
deleted file mode 160000
index 159e31b68..000000000
--- a/lib/lwip
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 159e31b689577dbf69cf0683bbaffbd71fa5ee10
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 2d4fcf5de..358f1cb9d 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -3,8 +3,17 @@ import subprocess
 from pathlib import Path
 from multiprocessing import Pool
 
+# Mandatory Dependencies that is always fetched
 # path, url, commit (Alphabet sorted by path)
-deps_list = {
+deps_mandatory = {
+    'lib/FreeRTOS-Kernel'                      : ['2a604f4a2818b8354b5e1a39e388eb5e16cfbc1f', 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git'               ],
+    'lib/lwip'                                 : ['159e31b689577dbf69cf0683bbaffbd71fa5ee10', 'https://github.com/lwip-tcpip/lwip.git'                        ],
+    'tools/uf2'                                : ['19615407727073e36d81bf239c52108ba92e7660', 'https://github.com/microsoft/uf2.git'                          ],
+}
+
+# Optional Dependencies per MCU
+# path, url, commit (Alphabet sorted by path)
+deps_optional = {
     'hw/mcu/allwinner'                         : ['8e5e89e8e132c0fd90e72d5422e5d3d68232b756', 'https://github.com/hathach/allwinner_driver.git'               ],
     'hw/mcu/bridgetek/ft9xx/ft90x-sdk'         : ['91060164afe239fcb394122e8bf9eb24d3194eb1', 'https://github.com/BRTSG-FOSS/ft90x-sdk.git'                   ],
     'hw/mcu/broadcom'                          : ['08370086080759ed54ac1136d62d2ad24c6fa267', 'https://github.com/adafruit/broadcom-peripherals.git'          ],
@@ -55,22 +64,22 @@ deps_list = {
     'hw/mcu/ti'                                : ['143ed6cc20a7615d042b03b21e070197d473e6e5', 'https://github.com/hathach/ti_driver.git'                      ],
     'hw/mcu/wch/ch32v307'                      : ['17761f5cf9dbbf2dcf665b7c04934188add20082', 'https://github.com/openwch/ch32v307.git'                       ],
     'lib/CMSIS_5'                              : ['20285262657d1b482d132d20d755c8c330d55c1f', 'https://github.com/ARM-software/CMSIS_5.git'                   ],
-    'lib/FreeRTOS-Kernel'                      : ['2a604f4a2818b8354b5e1a39e388eb5e16cfbc1f', 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git'               ],
-    'lib/lwip'                                 : ['159e31b689577dbf69cf0683bbaffbd71fa5ee10', 'https://github.com/lwip-tcpip/lwip.git'                        ],
     'lib/sct_neopixel'                         : ['e73e04ca63495672d955f9268e003cffe168fcd8', 'https://github.com/gsteiert/sct_neopixel.git'                  ],
-    'tools/uf2'                                : ['19615407727073e36d81bf239c52108ba92e7660', 'https://github.com/microsoft/uf2.git'                          ],
 }
 
+# combined 2 deps
+deps_all = {**deps_mandatory, **deps_optional}
+
 # TOP is tinyusb root dir
 TOP = Path(__file__).parent.parent.resolve()
 
 
 def get_a_dep(d):
-    if d not in deps_list.keys():
+    if d not in deps_all.keys():
         print('{} is not found in dependency list')
         return 1
-    commit = deps_list[d][0]
-    url = deps_list[d][1]
+    commit = deps_all[d][0]
+    url = deps_all[d][1]
     print('cloning {} with {}'.format(d, url))
 
     p = Path(TOP / d)
@@ -94,8 +103,11 @@ def get_a_dep(d):
 
 
 if __name__ == "__main__":
+    if len(sys.argv) <= 1:
+        sys.exit(1)
+
     status = 0
-    all_deps = sys.argv[1:]
+    deps = list(deps_mandatory.keys()) + sys.argv[1:]
     with Pool() as pool:
-        status = sum(pool.map(get_a_dep, all_deps))
+        status = sum(pool.map(get_a_dep, deps))
     sys.exit(status)
diff --git a/tools/uf2 b/tools/uf2
deleted file mode 160000
index 196154077..000000000
--- a/tools/uf2
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 19615407727073e36d81bf239c52108ba92e7660

From 323a56e309654601d1eaeaa4114e03f750c58a36 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Mar 2023 15:39:59 +0700
Subject: [PATCH 162/691] bump up freeRTOS deps to version 10.5.1

---
 tools/get_deps.py | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/tools/get_deps.py b/tools/get_deps.py
index 358f1cb9d..24e5f383a 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -6,7 +6,7 @@ from multiprocessing import Pool
 # Mandatory Dependencies that is always fetched
 # path, url, commit (Alphabet sorted by path)
 deps_mandatory = {
-    'lib/FreeRTOS-Kernel'                      : ['2a604f4a2818b8354b5e1a39e388eb5e16cfbc1f', 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git'               ],
+    'lib/FreeRTOS-Kernel'                      : ['def7d2df2b0506d3d249334974f51e427c17a41c', 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git'               ],
     'lib/lwip'                                 : ['159e31b689577dbf69cf0683bbaffbd71fa5ee10', 'https://github.com/lwip-tcpip/lwip.git'                        ],
     'tools/uf2'                                : ['19615407727073e36d81bf239c52108ba92e7660', 'https://github.com/microsoft/uf2.git'                          ],
 }
@@ -96,6 +96,7 @@ def get_a_dep(d):
     head = result.stdout.decode("utf-8").splitlines()[0]
 
     if commit != head:
+        subprocess.run("{} reset --hard".format(git_cmd, commit), shell=True)
         subprocess.run("{} fetch --depth 1 origin {}".format(git_cmd, commit), shell=True)
         subprocess.run("{} checkout FETCH_HEAD".format(git_cmd), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
 

From 2faad42cb1d258155f714e5140bb27bc1ed30caf Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Mar 2023 15:54:25 +0700
Subject: [PATCH 163/691] update ci

- remove submodules init
- pre-commit: forbid new submodule, run in ci
---
 .github/workflows/build_aarch64.yml | 3 ---
 .github/workflows/build_arm.yml     | 8 +-------
 .github/workflows/build_iar.yml     | 8 +++-----
 .github/workflows/build_msp430.yml  | 5 +----
 .github/workflows/build_renesas.yml | 3 ---
 .github/workflows/build_riscv.yml   | 3 ---
 .github/workflows/build_win_mac.yml | 3 ---
 .github/workflows/pre-commit.yml    | 3 +++
 .pre-commit-config.yaml             | 3 ++-
 9 files changed, 10 insertions(+), 29 deletions(-)

diff --git a/.github/workflows/build_aarch64.yml b/.github/workflows/build_aarch64.yml
index 30df2bdf0..cc8ddb070 100644
--- a/.github/workflows/build_aarch64.yml
+++ b/.github/workflows/build_aarch64.yml
@@ -42,9 +42,6 @@ jobs:
     - name: Checkout TinyUSB
       uses: actions/checkout@v3
 
-    - name: Checkout common submodules in lib
-      run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip
-
     - name: Checkout hathach/linkermap
       uses: actions/checkout@v3
       with:
diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index b5a92d6e3..7aecb8386 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -65,9 +65,6 @@ jobs:
     - name: Checkout TinyUSB
       uses: actions/checkout@v3
 
-    - name: Checkout common submodules in lib
-      run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip
-
     - name: Checkout hathach/linkermap
       uses: actions/checkout@v3
       with:
@@ -145,9 +142,6 @@ jobs:
     - name: Checkout TinyUSB
       uses: actions/checkout@v3
 
-    - name: Checkout common submodules in lib
-      run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip
-
     - name: Build
       run: python3 tools/build_board.py ${{ matrix.example }}
 
@@ -275,4 +269,4 @@ jobs:
     - name: Test dfu_runtime
       run: |
         ./flash.sh dfu_runtime.elf
-        while (! (dfu-util -l | grep "Found Runtime")) && [ $SECONDS -le 10 ]; do :; done  
+        while (! (dfu-util -l | grep "Found Runtime")) && [ $SECONDS -le 10 ]; do :; done
diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml
index afb6efb6b..a5d24892f 100644
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@@ -30,7 +30,7 @@ jobs:
         family:
         # Alphabetical order
         # Note: bundle multiple families into a matrix since there is only one self-hosted instance can
-        # run IAR build. Too many matrix can hurt due to setup/teardown overhead. 
+        # run IAR build. Too many matrix can hurt due to setup/teardown overhead.
         - 'stm32f0 stm32f1 stm32f4 stm32f7 stm32g4 stm32h7 stm32l4'
     steps:
     - name: Clean workspace
@@ -42,10 +42,8 @@ jobs:
     - name: Checkout TinyUSB
       uses: actions/checkout@v3
 
-    - name: Checkout submodules and dependencies
-      run: |
-        git submodule update --init lib/FreeRTOS-Kernel lib/lwip
-        python3 tools/get_family_deps.py ${{ matrix.family }}
+    - name: Get Dependencies
+      run: python3 tools/get_family_deps.py ${{ matrix.family }}
 
     - name: Build
       run: python3 tools/build_family.py ${{ matrix.family }} CC=iccarm
diff --git a/.github/workflows/build_msp430.yml b/.github/workflows/build_msp430.yml
index 6832c54b3..7cb60dceb 100644
--- a/.github/workflows/build_msp430.yml
+++ b/.github/workflows/build_msp430.yml
@@ -21,7 +21,7 @@ concurrency:
   group: ${{ github.workflow }}-${{ github.head_ref || github.run_id }}
   cancel-in-progress: true
 
-jobs:  
+jobs:
   build-msp430:
     runs-on: ubuntu-latest
     strategy:
@@ -40,9 +40,6 @@ jobs:
     - name: Checkout TinyUSB
       uses: actions/checkout@v3
 
-    - name: Checkout common submodules in lib
-      run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip
-
     - name: Checkout hathach/linkermap
       uses: actions/checkout@v3
       with:
diff --git a/.github/workflows/build_renesas.yml b/.github/workflows/build_renesas.yml
index 7ce674485..ffdeedb71 100644
--- a/.github/workflows/build_renesas.yml
+++ b/.github/workflows/build_renesas.yml
@@ -39,9 +39,6 @@ jobs:
     - name: Checkout TinyUSB
       uses: actions/checkout@v3
 
-    - name: Checkout common submodules in lib
-      run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip
-
     - name: Checkout hathach/linkermap
       uses: actions/checkout@v3
       with:
diff --git a/.github/workflows/build_riscv.yml b/.github/workflows/build_riscv.yml
index 876ebbdef..87c7b522e 100644
--- a/.github/workflows/build_riscv.yml
+++ b/.github/workflows/build_riscv.yml
@@ -41,9 +41,6 @@ jobs:
     - name: Checkout TinyUSB
       uses: actions/checkout@v3
 
-    - name: Checkout common submodules in lib
-      run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip
-
     - name: Checkout hathach/linkermap
       uses: actions/checkout@v3
       with:
diff --git a/.github/workflows/build_win_mac.yml b/.github/workflows/build_win_mac.yml
index 7c884abd9..4b743a686 100644
--- a/.github/workflows/build_win_mac.yml
+++ b/.github/workflows/build_win_mac.yml
@@ -46,9 +46,6 @@ jobs:
     - name: Checkout TinyUSB
       uses: actions/checkout@v3
 
-    - name: Checkout common submodules in lib
-      run: git submodule update --init lib/FreeRTOS-Kernel lib/lwip
-
     - name: Get Dependencies
       run: python3 tools/get_family_deps.py stm32f4
 
diff --git a/.github/workflows/pre-commit.yml b/.github/workflows/pre-commit.yml
index d2150d13f..6deee872f 100644
--- a/.github/workflows/pre-commit.yml
+++ b/.github/workflows/pre-commit.yml
@@ -26,6 +26,9 @@ jobs:
     - name: Checkout TinyUSB
       uses: actions/checkout@v3
 
+    - name: Run pre-commit
+      uses: pre-commit/action@v3.0.0
+
     - name: Run codespell
       uses: codespell-project/actions-codespell@master
 
diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index 865307896..ea2372f07 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -4,11 +4,12 @@
 
 repos:
 -   repo: https://github.com/pre-commit/pre-commit-hooks
-    rev: v4.0.1
+    rev: v4.4.0
     hooks:
     - id: check-yaml
     - id: trailing-whitespace
     - id: end-of-file-fixer
+    - id: forbid-submodules
 
 -   repo: local
     hooks:

From 3623ba1884ddff23e9b64766cb6dd032f1425846 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Mar 2023 16:12:49 +0700
Subject: [PATCH 164/691] fix trailing space and new line

temporarily disable codespell
---
 .gitattributes                                |   6 +-
 .github/ISSUE_TEMPLATE/bug_report.yml         |   6 +-
 .github/workflows/trigger.yml                 |   4 +-
 .pre-commit-config.yaml                       |  10 +-
 .readthedocs.yaml                             |   1 -
 docs/assets/stack.svg                         |   2 +-
 docs/contributing/code_of_conduct.rst         |   2 +-
 docs/info/changelog.rst                       |  54 +-
 docs/info/contributors.rst                    |   2 +-
 docs/reference/getting_started.rst            |  14 +-
 examples/device/audio_4_channel_mic/skip.txt  |   2 +-
 .../device/audio_4_channel_mic/src/main.c     |   2 +-
 .../src/plot_audio_samples.py                 |   1 -
 .../audio_4_channel_mic/src/usb_descriptors.c |   2 +-
 examples/device/audio_test/CMakeLists.txt     |   2 +-
 examples/device/audio_test/skip.txt           |   2 +-
 examples/device/audio_test/src/main.c         |   2 +-
 .../audio_test/src/plot_audio_samples.py      |   3 +-
 .../device/audio_test/src/usb_descriptors.c   |   2 +-
 .../audio_test_multi_rate/CMakeLists.txt      |   2 +-
 .../device/audio_test_multi_rate/skip.txt     |   2 +-
 .../device/audio_test_multi_rate/src/main.c   |  10 +-
 .../src/plot_audio_samples.py                 |   3 +-
 .../audio_test_multi_rate/src/tusb_config.h   |   2 +-
 .../src/usb_descriptors.c                     |   2 +-
 .../src/usb_descriptors.h                     |   4 +-
 examples/device/board_test/src/CMakeLists.txt |   2 +-
 examples/device/board_test/src/main.c         |   2 +-
 examples/device/cdc_dual_ports/CMakeLists.txt |   2 +-
 examples/device/cdc_dual_ports/src/main.c     |   2 +-
 .../cdc_dual_ports/src/usb_descriptors.c      |   2 +-
 examples/device/cdc_msc/CMakeLists.txt        |   2 +-
 examples/device/cdc_msc/skip.txt              |   2 +-
 examples/device/cdc_msc/src/main.c            |   2 +-
 examples/device/cdc_msc/src/msc_disk.c        |   2 +-
 examples/device/cdc_msc/src/usb_descriptors.c |   2 +-
 examples/device/cdc_msc_freertos/src/main.c   |   2 +-
 .../device/cdc_msc_freertos/src/msc_disk.c    |   2 +-
 .../cdc_msc_freertos/src/usb_descriptors.c    |   2 +-
 examples/device/dfu_runtime/CMakeLists.txt    |   2 +-
 examples/device/dfu_runtime/src/main.c        |   2 +-
 .../dynamic_configuration/CMakeLists.txt      |   2 +-
 .../device/dynamic_configuration/skip.txt     |   2 +-
 .../device/dynamic_configuration/src/main.c   |   2 +-
 .../dynamic_configuration/src/msc_disk.c      |   2 +-
 .../src/usb_descriptors.c                     |   2 +-
 .../device/hid_boot_interface/CMakeLists.txt  |   2 +-
 examples/device/hid_boot_interface/Makefile   |   2 +-
 examples/device/hid_boot_interface/src/main.c |   2 +-
 .../hid_boot_interface/src/usb_descriptors.c  |   2 +-
 .../hid_boot_interface/src/usb_descriptors.h  |   2 +-
 examples/device/hid_composite/CMakeLists.txt  |   2 +-
 examples/device/hid_composite/src/main.c      |   2 +-
 .../hid_composite/src/usb_descriptors.c       |   2 +-
 .../hid_composite/src/usb_descriptors.h       |   2 +-
 .../device/hid_composite_freertos/src/main.c  |   2 +-
 .../src/usb_descriptors.c                     |   2 +-
 .../src/usb_descriptors.h                     |   2 +-
 .../device/hid_generic_inout/CMakeLists.txt   |   2 +-
 examples/device/hid_generic_inout/hid_test.js |   3 +-
 examples/device/hid_generic_inout/src/main.c  |   2 +-
 .../hid_generic_inout/src/usb_descriptors.c   |   2 +-
 .../hid_multiple_interface/CMakeLists.txt     |   2 +-
 examples/device/midi_test/CMakeLists.txt      |   2 +-
 examples/device/midi_test/src/main.c          |   2 +-
 .../device/midi_test/src/usb_descriptors.c    |   2 +-
 examples/device/msc_dual_lun/CMakeLists.txt   |   2 +-
 examples/device/msc_dual_lun/skip.txt         |   2 +-
 examples/device/msc_dual_lun/src/main.c       |   2 +-
 .../device/msc_dual_lun/src/msc_disk_dual.c   |   2 +-
 .../device/msc_dual_lun/src/usb_descriptors.c |   2 +-
 .../device/net_lwip_webserver/CMakeLists.txt  |   2 +-
 examples/device/net_lwip_webserver/skip.txt   |   2 +-
 .../device/net_lwip_webserver/src/arch/cc.h   |  32 +-
 .../device/net_lwip_webserver/src/lwipopts.h  |  28 +-
 examples/device/net_lwip_webserver/src/main.c |   6 +-
 .../net_lwip_webserver/src/usb_descriptors.c  |   4 +-
 examples/device/uac2_headset/CMakeLists.txt   |   2 +-
 examples/device/uac2_headset/src/main.c       |   4 +-
 .../device/uac2_headset/src/usb_descriptors.c |   2 +-
 .../device/uac2_headset/src/usb_descriptors.h |   2 +-
 examples/device/usbtmc/CMakeLists.txt         |   2 +-
 examples/device/usbtmc/src/main.c             |   2 +-
 examples/device/usbtmc/visaQuery.py           |  26 +-
 examples/device/video_capture/CMakeLists.txt  |   2 +-
 examples/device/video_capture/src/main.c      |   2 +-
 .../video_capture/src/usb_descriptors.c       |   2 +-
 .../video_capture/src/usb_descriptors.h       |   2 +-
 examples/device/webusb_serial/CMakeLists.txt  |   2 +-
 examples/device/webusb_serial/src/main.c      |   2 +-
 .../webusb_serial/src/usb_descriptors.c       |   2 +-
 .../webusb_serial/src/usb_descriptors.h       |   2 +-
 .../dual/host_hid_to_device_cdc/src/main.c    |   2 +-
 .../src/usb_descriptors.c                     |   2 +-
 examples/host/bare_api/src/main.c             |   2 +-
 examples/host/cdc_msc_hid/src/main.c          |   2 +-
 examples/host/cdc_msc_hid/src/msc_app.c       |   3 +-
 examples/host/hid_controller/src/main.c       |   2 +-
 examples/host/msc_file_explorer/src/main.c    |   2 +-
 examples/host/msc_file_explorer/src/msc_app.c |   2 +-
 examples/rules.mk                             |   2 +-
 hw/bsp/ansi_escape.h                          |   2 +-
 hw/bsp/board.c                                |   2 +-
 hw/bsp/board.h                                |   2 +-
 .../boards/raspberrypi_zero_w/board.h         |   2 +-
 .../boards/raspberrypi_zero_w/board.mk        |   2 +-
 hw/bsp/broadcom_32bit/family.c                |   2 +-
 .../boards/raspberrypi_cm4/board.h            |   2 +-
 .../boards/raspberrypi_zero2w/board.h         |   2 +-
 hw/bsp/broadcom_64bit/family.c                |   2 +-
 hw/bsp/brtmm90x/family.c                      |   7 +-
 hw/bsp/brtmm90x/family.mk                     |   8 +-
 .../ch32v307/boards/ch32v307v-r1-1v0/board.h  |   2 +-
 .../boards/ch32v307v-r1-1v0/debug_uart.c      |   4 +-
 hw/bsp/ch32v307/ch32v307.ld                   |  35 +-
 hw/bsp/ch32v307/ch32v30x_conf.h               |   7 +-
 hw/bsp/ch32v307/ch32v30x_it.c                 |   2 -
 hw/bsp/ch32v307/ch32v30x_it.h                 |   2 -
 hw/bsp/ch32v307/core_riscv.h                  |   7 +-
 hw/bsp/ch32v307/system_ch32v30x.c             | 140 ++--
 hw/bsp/ch32v307/system_ch32v30x.h             |   9 +-
 hw/bsp/da14695_dk_usb/da14695_dk_usb.c        |   2 +-
 hw/bsp/da14695_dk_usb/da1469x.ld              |   1 -
 hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c        |   2 +-
 hw/bsp/da1469x_dk_pro/da1469x.ld              |   1 -
 hw/bsp/ea4088qs/ea4088qs.c                    |   2 +-
 hw/bsp/ea4088qs/lpc4088.ld                    |  54 +-
 hw/bsp/ea4357/ea4357.c                        |   2 +-
 hw/bsp/ea4357/lpc4357.ld                      | 106 +--
 hw/bsp/ea4357/pca9532.c                       |   6 +-
 hw/bsp/ea4357/pca9532.h                       |   2 +-
 hw/bsp/esp32s2/boards/CMakeLists.txt          |   2 +-
 .../adafruit_feather_esp32s2/board.cmake      |   2 +-
 .../boards/adafruit_feather_esp32s2/board.h   |   2 +-
 .../boards/adafruit_magtag_29gray/board.cmake |   2 +-
 .../boards/adafruit_magtag_29gray/board.h     |   2 +-
 .../boards/adafruit_metro_esp32s2/board.cmake |   2 +-
 .../boards/adafruit_metro_esp32s2/board.h     |   2 +-
 hw/bsp/esp32s2/boards/esp32s2.c               |   3 +-
 .../boards/espressif_kaluga_1/board.cmake     |   2 +-
 .../esp32s2/boards/espressif_kaluga_1/board.h |   2 +-
 .../boards/espressif_saola_1/board.cmake      |   2 +-
 .../esp32s2/boards/espressif_saola_1/board.h  |   2 +-
 .../components/led_strip/CMakeLists.txt       |   1 -
 hw/bsp/esp32s2/family.cmake                   |   2 +-
 hw/bsp/esp32s2/family.mk                      |   1 -
 hw/bsp/esp32s3/boards/CMakeLists.txt          |   2 +-
 hw/bsp/esp32s3/boards/esp32s3.c               |   3 +-
 .../boards/espressif_addax_1/board.cmake      |   2 +-
 .../esp32s3/boards/espressif_addax_1/board.h  |   2 +-
 .../boards/espressif_s3_devkitc/board.cmake   |   2 +-
 .../boards/espressif_s3_devkitc/board.h       |   2 +-
 .../boards/espressif_s3_devkitm/board.cmake   |   2 +-
 .../boards/espressif_s3_devkitm/board.h       |   2 +-
 .../components/led_strip/CMakeLists.txt       |   1 -
 hw/bsp/esp32s3/family.cmake                   |   2 +-
 hw/bsp/esp32s3/family.mk                      |   1 -
 hw/bsp/f1c100s/README.md                      |   2 +-
 hw/bsp/f1c100s/board.h                        |   2 +-
 hw/bsp/f1c100s/board.mk                       |   6 +-
 hw/bsp/f1c100s/f1c100s.c                      |   4 +-
 hw/bsp/family_support.cmake                   |   2 +-
 hw/bsp/fomu/boards/fomu/board.mk              |   2 +-
 hw/bsp/fomu/fomu.c                            |   2 +-
 hw/bsp/fomu/include/hw/common.h               |   2 +-
 hw/bsp/fomu/include/irq.h                     |   2 +-
 hw/bsp/frdm_k32l2b/board.h                    |   2 +-
 hw/bsp/frdm_k32l2b/frdm_k32l2b.c              |  12 +-
 hw/bsp/frdm_kl25z/frdm_kl25z.c                |   4 +-
 hw/bsp/gd32vf103/family.c                     |   2 +-
 hw/bsp/gd32vf103/system_gd32vf103.c           |  10 +-
 hw/bsp/imxrt/boards/metro_m7_1011/board.h     |   2 +-
 .../boards/metro_m7_1011/metro_m7_1011.ld     |   2 +-
 hw/bsp/imxrt/boards/mimxrt1010_evk/board.h    |   2 +-
 hw/bsp/imxrt/boards/mimxrt1015_evk/board.h    |   2 +-
 hw/bsp/imxrt/boards/mimxrt1020_evk/board.h    |   2 +-
 hw/bsp/imxrt/boards/mimxrt1024_evk/board.h    |   2 +-
 hw/bsp/imxrt/boards/mimxrt1050_evkb/board.h   |   2 +-
 hw/bsp/imxrt/boards/mimxrt1060_evk/board.h    |   2 +-
 hw/bsp/imxrt/boards/mimxrt1064_evk/board.h    |   2 +-
 hw/bsp/imxrt/boards/teensy_40/board.h         |   2 +-
 hw/bsp/imxrt/boards/teensy_40/board.mk        |   2 +-
 hw/bsp/imxrt/boards/teensy_41/board.h         |   2 +-
 hw/bsp/imxrt/boards/teensy_41/board.mk        |   2 +-
 hw/bsp/imxrt/family.c                         |   2 +-
 hw/bsp/kuiic/K32L2B31xxxxA_flash.ld           |   1 -
 hw/bsp/kuiic/board.h                          |   2 +-
 hw/bsp/kuiic/kuiic.c                          |  16 +-
 hw/bsp/lpc15/boards/lpcxpresso1549/lpc1549.ld |  60 +-
 hw/bsp/lpc15/family.c                         |   2 +-
 .../lpc18/boards/lpcxpresso18s37/lpc1837.ld   |  86 +--
 hw/bsp/lpc18/boards/mcb1800/lpc1857.ld        | 106 +--
 hw/bsp/lpc18/family.c                         |   2 +-
 hw/bsp/lpc54/boards/lpcxpresso54628/board.mk  |   2 +-
 hw/bsp/lpc54/family.c                         |   2 +-
 .../LPC55S69_cm33_core0_uf2.ld                |   1 -
 hw/bsp/lpc55/family.c                         |   2 +-
 hw/bsp/lpcxpresso11u37/lpc11u37.ld            |  50 +-
 hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c      |   2 +-
 hw/bsp/lpcxpresso11u68/lpc11u68.ld            |  68 +-
 hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c      |   2 +-
 hw/bsp/lpcxpresso1347/lpc1347.ld              |  68 +-
 hw/bsp/lpcxpresso1347/lpcxpresso1347.c        |   4 +-
 hw/bsp/lpcxpresso1769/lpc1769.ld              |  54 +-
 hw/bsp/lpcxpresso1769/lpcxpresso1769.c        |   2 +-
 hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c      |   2 +-
 hw/bsp/mbed1768/lpc1768.ld                    |  54 +-
 hw/bsp/mbed1768/mbed1768.c                    |   2 +-
 hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld    |   8 +-
 .../boards/mm32f327x_mb39/mm32f327x_mb39.c    |   4 +-
 hw/bsp/ngx4330/ngx4330.c                      |   2 +-
 hw/bsp/ngx4330/ngx4330.ld                     |  80 +--
 hw/bsp/nrf/boards/adafruit_clue/board.h       |   2 +-
 .../boards/adafruit_clue/nrf52840_s140_v6.ld  |   4 +-
 .../arduino_nano33_ble/arduino_nano33_ble.ld  |   2 +-
 hw/bsp/nrf/boards/arduino_nano33_ble/board.h  |   2 +-
 .../circuitplayground_bluefruit/board.h       |   2 +-
 .../nrf52840_s140_v6.ld                       |   4 +-
 .../boards/feather_nrf52840_express/board.h   |   2 +-
 .../nrf52840_s140_v6.ld                       |   4 +-
 .../nrf/boards/feather_nrf52840_sense/board.h |   2 +-
 .../nrf52840_s140_v6.ld                       |   4 +-
 hw/bsp/nrf/boards/itsybitsy_nrf52840/board.h  |   2 +-
 .../itsybitsy_nrf52840/nrf52840_s140_v6.ld    |   4 +-
 hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.h |   2 +-
 .../nrf/boards/nrf52840_mdk_dongle/board.mk   |   2 +-
 hw/bsp/nrf/boards/pca10056/board.h            |   2 +-
 hw/bsp/nrf/boards/pca10059/board.h            |   2 +-
 hw/bsp/nrf/boards/pca10100/board.h            |   2 +-
 hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.h   |   2 +-
 hw/bsp/nrf/family.c                           |   2 +-
 hw/bsp/nutiny_nuc121s/nuc121_flash.ld         |   2 +-
 hw/bsp/nutiny_nuc121s/nutiny_nuc121.c         |   2 +-
 hw/bsp/nutiny_nuc125s/nuc125_flash.ld         |   2 +-
 hw/bsp/nutiny_nuc125s/nutiny_nuc125.c         |   2 +-
 hw/bsp/nutiny_nuc126v/nutiny_nuc126.c         |   2 +-
 hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c  |   2 +-
 hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c  |   2 +-
 .../boards/olimex_emz64/olimex_emz64.c        |   2 +-
 hw/bsp/pic32mz/family.c                       |   2 +-
 hw/bsp/rp2040/board.h                         |   2 +-
 .../boards/raspberry_pi_pico/board.cmake      |   2 +-
 hw/bsp/rp2040/family.cmake                    |   2 +-
 hw/bsp/rx/boards/gr_citrus/gr_citrus.c        |   6 +-
 hw/bsp/rx/boards/rx65n_target/rx65n_target.c  |   2 +-
 .../samd11_xplained/samd11d14am_flash.ld      |   4 +-
 hw/bsp/samd21/boards/atsamd21_xpro/board.h    |   2 +-
 .../boards/circuitplayground_express/board.h  |   2 +-
 hw/bsp/samd21/boards/curiosity_nano/board.h   |   2 +-
 .../samd21/boards/feather_m0_express/board.h  |   2 +-
 hw/bsp/samd21/boards/itsybitsy_m0/board.h     |   2 +-
 hw/bsp/samd21/boards/luna_d21/board.h         |   2 +-
 hw/bsp/samd21/boards/luna_d21/board.mk        |   1 -
 hw/bsp/samd21/boards/metro_m0_express/board.h |   2 +-
 hw/bsp/samd21/boards/qtpy/board.h             |   2 +-
 hw/bsp/samd21/boards/seeeduino_xiao/board.h   |   2 +-
 hw/bsp/samd21/boards/trinket_m0/board.h       |   1 -
 hw/bsp/samd21/boards/trinket_m0/board.mk      |   1 -
 hw/bsp/samd21/family.c                        |   2 +-
 .../samd51/boards/feather_m4_express/board.h  |   2 +-
 hw/bsp/samd51/boards/itsybitsy_m4/board.h     |   2 +-
 hw/bsp/samd51/boards/metro_m4_express/board.h |   2 +-
 .../samd51/boards/metro_m4_express/board.mk   |   1 -
 hw/bsp/samd51/boards/pybadge/board.h          |   2 +-
 hw/bsp/samd51/boards/pyportal/board.h         |   2 +-
 hw/bsp/samd51/family.c                        |   2 +-
 hw/bsp/same54xplainedpro/same54p20a_flash.ld  |   4 +-
 hw/bsp/same54xplainedpro/same54p20a_sram.ld   |   4 +-
 hw/bsp/samg55xplained/samg55xplained.c        |   2 +-
 hw/bsp/saml2x/boards/atsaml21_xpro/board.h    |   2 +-
 hw/bsp/saml2x/boards/saml22_feather/board.h   |   2 +-
 .../boards/saml22_feather/saml22_feather.ld   |   4 +-
 hw/bsp/saml2x/boards/sensorwatch_m0/board.h   |   2 +-
 .../boards/sensorwatch_m0/sensorwatch_m0.ld   |   4 +-
 hw/bsp/saml2x/family.c                        |   2 +-
 hw/bsp/sltb009a/sltb009a.c                    |   4 +-
 hw/bsp/spresense/board_spresense.c            |   6 +-
 .../stm32f0/boards/stm32f070rbnucleo/board.h  |   2 +-
 .../stm32f0/boards/stm32f070rbnucleo/board.mk |   2 +-
 .../stm32f070rbnucleo/stm32F070rbtx_flash.ld  |  14 +-
 .../stm32f072disco/STM32F072RBTx_FLASH.ld     |   8 +-
 hw/bsp/stm32f0/boards/stm32f072disco/board.h  |   2 +-
 hw/bsp/stm32f0/boards/stm32f072eval/board.h   |   2 +-
 hw/bsp/stm32f0/family.c                       |   2 +-
 hw/bsp/stm32f0/stm32f0xx_hal_conf.h           |  51 +-
 .../stm32f103_bluepill/STM32F103X8_FLASH.ld   |   6 +-
 .../stm32f1/boards/stm32f103_bluepill/board.h |   2 +-
 .../stm32f103_mini_2/STM32F103XC_FLASH.ld     |   6 +-
 .../stm32f1/boards/stm32f103_mini_2/board.h   |   2 +-
 hw/bsp/stm32f1/family.c                       |   8 +-
 hw/bsp/stm32f1/stm32f1xx_hal_conf.h           |  44 +-
 hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld |   8 +-
 hw/bsp/stm32f207nucleo/stm32f207nucleo.c      |   4 +-
 hw/bsp/stm32f207nucleo/stm32f2xx_hal_conf.h   |  56 +-
 hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld  |  18 +-
 hw/bsp/stm32f303disco/stm32f303disco.c        |   2 +-
 hw/bsp/stm32f303disco/stm32f3xx_hal_conf.h    |  38 +-
 .../feather_stm32f405/STM32F405RGTx_FLASH.ld  |  18 +-
 .../stm32f4/boards/feather_stm32f405/board.h  |   2 +-
 .../boards/pyboardv11/STM32F405RGTx_FLASH.ld  |  18 +-
 hw/bsp/stm32f4/boards/pyboardv11/board.h      |   2 +-
 .../stm32f401blackpill/STM32F401VCTx_FLASH.ld |   8 +-
 .../stm32f4/boards/stm32f401blackpill/board.h |   2 +-
 .../stm32f401blackpill/stm32f4xx_hal_conf.h   |  82 +--
 .../stm32f407disco/STM32F407VGTx_FLASH.ld     |  18 +-
 hw/bsp/stm32f4/boards/stm32f407disco/board.h  |   2 +-
 .../stm32f407disco/stm32f4xx_hal_conf.h       |  82 +--
 .../stm32f411blackpill/STM32F411CEUx_FLASH.ld |   8 +-
 .../stm32f4/boards/stm32f411blackpill/board.h |   2 +-
 .../stm32f411blackpill/stm32f4xx_hal_conf.h   |  82 +--
 .../stm32f411disco/STM32F411VETx_FLASH.ld     |   8 +-
 hw/bsp/stm32f4/boards/stm32f411disco/board.h  |   2 +-
 .../stm32f411disco/stm32f4xx_hal_conf.h       |  82 +--
 .../stm32f412disco/STM32F412ZGTx_FLASH.ld     |   8 +-
 hw/bsp/stm32f4/boards/stm32f412disco/board.h  |   2 +-
 .../stm32f412disco/stm32f4xx_hal_conf.h       |  82 +--
 .../stm32f412nucleo/STM32F412ZGTx_FLASH.ld    |   8 +-
 .../stm32f412nucleo/stm32f4xx_hal_conf.h      |  82 +--
 .../stm32f439nucleo/stm32f4xx_hal_conf.h      |  70 +-
 hw/bsp/stm32f4/family.c                       |   2 +-
 hw/bsp/stm32f7/boards/stlinkv3mini/board.h    |   2 +-
 hw/bsp/stm32f7/boards/stm32f723disco/board.h  |   2 +-
 hw/bsp/stm32f7/boards/stm32f746disco/board.h  |   2 +-
 .../stm32f746nucleo/STM32F746ZGTx_FLASH.ld    |   6 +-
 hw/bsp/stm32f7/boards/stm32f746nucleo/board.h |   2 +-
 .../stm32f746nucleo/stm32f7xx_hal_conf.h      |  52 +-
 .../stm32f767nucleo/STM32F767ZITx_FLASH.ld    |   8 +-
 hw/bsp/stm32f7/boards/stm32f767nucleo/board.h |   2 +-
 .../stm32f7/boards/stm32f767nucleo/board.mk   |   2 +-
 .../stm32f767nucleo/stm32f7xx_hal_conf.h      |  52 +-
 hw/bsp/stm32f7/boards/stm32f769disco/board.h  |   2 +-
 .../stm32g474nucleo/STM32G474RETx_FLASH.ld    |   8 +-
 hw/bsp/stm32g4/family.c                       |   2 +-
 hw/bsp/stm32g4/stm32g4xx_hal_conf.h           |  26 +-
 hw/bsp/stm32h7/boards/daisyseed/board.mk      |   1 -
 .../boards/daisyseed/stm32h750ibkx_flash.ld   |   2 -
 .../boards/stm32h743eval/stm32h743xx_flash.ld |   8 +-
 .../stm32h743nucleo/stm32h743xx_flash.ld      |   8 +-
 hw/bsp/stm32h7/boards/stm32h745disco/board.mk |   1 -
 .../STM32H743IITX_FLASH.ld                    |   2 -
 .../boards/waveshare_openh743i/board.mk       |   2 +-
 hw/bsp/stm32h7/family.c                       |   2 +-
 hw/bsp/stm32h7/stm32h7xx_hal_conf.h           |   6 +-
 .../stm32l052dap52/STM32L052K8Ux_FLASH.ld     |   8 +-
 hw/bsp/stm32l0/boards/stm32l052dap52/board.h  |  34 +-
 hw/bsp/stm32l0/family.c                       |   2 +-
 hw/bsp/stm32l0/stm32l0xx_hal_conf.h           |  49 +-
 hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld |   8 +-
 hw/bsp/stm32l0538disco/stm32l0538disco.c      |   2 +-
 hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h   | 102 +--
 .../stm32l412nucleo/STM32L412KBUx_FLASH.ld    |  14 +-
 hw/bsp/stm32l4/boards/stm32l412nucleo/board.h |   6 +-
 .../stm32l476disco/STM32L476VGTx_FLASH.ld     |  14 +-
 hw/bsp/stm32l4/boards/stm32l476disco/board.h  |   2 +-
 .../stm32l4p5nucleo/STM32L4P5ZGTX_FLASH.ld    |  12 +-
 hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h |   2 +-
 .../stm32l4r5nucleo/STM32L4RXxI_FLASH.ld      |   6 +-
 hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h |   2 +-
 hw/bsp/stm32l4/stm32l4xx_hal_conf.h           |  10 +-
 hw/bsp/stm32u5/stm32u5xx_hal_conf.h           |   1 -
 .../stm32wb55nucleo/stm32wb55xx_flash_cm4.ld  |   8 +-
 hw/bsp/stm32wb/family.c                       |   2 +-
 hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.mk  |   2 +-
 .../tm4c123/boards/ek-tm4c123gxl/tm4c123.ld   |  24 +-
 hw/bsp/tm4c123/family.c                       |   1 -
 hw/bsp/xmc4000/boards/xmc4500_relax/board.h   |   2 +-
 hw/mcu/bridgetek/ft9xx/Readme.md              |   4 +-
 hw/mcu/bridgetek/ft9xx/scripts/crt0.S         |   8 +-
 hw/mcu/dialog/README.md                       |   4 +-
 .../SDK_10.0.8.105/sdk/bsp/arm_license.txt    |   1 -
 .../sdk/bsp/include/cmsis_compiler.h          |   1 -
 .../sdk/bsp/include/cmsis_gcc.h               |  10 +-
 .../SDK_10.0.8.105/sdk/bsp/include/core_cm0.h |   2 +-
 .../sdk/bsp/include/core_cm33.h               |   4 +-
 .../sdk/bsp/include/mpu_armv8.h               |  33 +-
 hw/mcu/dialog/da1469x/da1469x.ld              |   1 -
 hw/mcu/dialog/da1469x/include/mcu/mcu.h       |   1 -
 .../nrf5x/s140_nrf52_6.1.1_API/include/ble.h  |   2 +-
 .../s140_nrf52_6.1.1_API/include/ble_gap.h    |   2 +-
 lib/SEGGER_RTT/RTT/SEGGER_RTT.c               |  16 +-
 lib/SEGGER_RTT/RTT/SEGGER_RTT.h               |   2 +-
 lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S    |   6 +-
 lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h          |  12 +-
 .../Syscalls/SEGGER_RTT_Syscalls_GCC.c        |   4 +-
 .../Syscalls/SEGGER_RTT_Syscalls_KEIL.c       |  42 +-
 lib/fatfs/source/00history.txt                |   1 -
 lib/fatfs/source/00readme.txt                 |   1 -
 lib/fatfs/source/diskio.c                     |   1 -
 lib/fatfs/source/ff.c                         |   1 -
 lib/fatfs/source/ffsystem.c                   |   1 -
 lib/networking/dhserver.c                     |  10 +-
 lib/networking/dhserver.h                     |   6 +-
 lib/networking/dnserver.c                     |   8 +-
 lib/networking/dnserver.h                     |   6 +-
 lib/networking/ndis.h                         |  10 +-
 lib/networking/rndis_protocol.h               |  28 +-
 lib/networking/rndis_reports.c                |  14 +-
 src/class/audio/audio.h                       |   6 +-
 src/class/audio/audio_device.c                |   6 +-
 src/class/audio/audio_device.h                |   4 +-
 src/class/bth/bth_device.h                    |   2 +-
 src/class/cdc/cdc_device.c                    |  12 +-
 src/class/cdc/cdc_device.h                    |   2 +-
 src/class/cdc/cdc_host.h                      |   2 +-
 src/class/cdc/cdc_rndis.h                     |   2 +-
 src/class/cdc/cdc_rndis_host.c                |   2 +-
 src/class/cdc/cdc_rndis_host.h                |   2 +-
 src/class/hid/hid.h                           |   2 +-
 src/class/midi/midi.h                         |   2 +-
 src/class/midi/midi_device.c                  |   2 +-
 src/class/midi/midi_device.h                  |   2 +-
 src/class/msc/msc.h                           |   2 +-
 src/class/msc/msc_device.h                    |   2 +-
 src/class/msc/msc_host.c                      |  12 +-
 src/class/msc/msc_host.h                      |   2 +-
 src/class/net/ecm_rndis_device.c              |   2 +-
 src/class/net/ncm_device.c                    |   2 +-
 src/class/net/net_device.h                    |   2 +-
 src/class/usbtmc/usbtmc.h                     |   1 -
 src/class/usbtmc/usbtmc_device.c              |   4 +-
 src/class/vendor/vendor_device.h              |   2 +-
 src/class/vendor/vendor_host.c                |   2 +-
 src/class/vendor/vendor_host.h                |   2 +-
 src/class/video/video_device.c                |   2 +-
 src/common/tusb_compiler.h                    |   4 +-
 src/common/tusb_timeout.h                     |   2 +-
 src/common/tusb_verify.h                      |   2 +-
 src/device/dcd.h                              |   2 +-
 src/device/usbd.c                             |   4 +-
 src/device/usbd_pvt.h                         |   2 +-
 src/host/hcd.h                                |   2 +-
 src/host/hub.c                                |   4 +-
 src/host/usbh.h                               |   2 +-
 src/osal/osal.h                               |   2 +-
 src/osal/osal_freertos.h                      |   2 +-
 src/osal/osal_none.h                          |   2 +-
 src/osal/osal_pico.h                          |   2 +-
 src/osal/osal_rtx4.h                          |   4 +-
 src/portable/bridgetek/ft9xx/dcd_ft9xx.c      |  78 +-
 src/portable/chipidea/ci_hs/ci_hs_type.h      |   2 +-
 src/portable/chipidea/ci_hs/dcd_ci_hs.c       |   2 +-
 src/portable/chipidea/ci_hs/hcd_ci_hs.c       |   2 +-
 src/portable/ehci/ehci.c                      |   6 +-
 src/portable/espressif/esp32sx/dcd_esp32sx.c  |   1 -
 src/portable/mentor/musb/dcd_musb.c           |   8 +-
 src/portable/mentor/musb/hcd_musb.c           |   4 +-
 src/portable/microchip/pic/dcd_pic.c          |   4 +-
 .../microchip/pic32mz/usbhs_registers.h       |  40 +-
 src/portable/microchip/samg/dcd_samg.c        |   2 +-
 .../microchip/samx7x/common_usb_regs.h        |   6 +-
 src/portable/microchip/samx7x/dcd_samx7x.c    |  36 +-
 src/portable/nordic/nrf5x/dcd_nrf5x.c         |   2 +-
 src/portable/nuvoton/nuc120/dcd_nuc120.c      |   6 +-
 src/portable/nuvoton/nuc121/dcd_nuc121.c      |   6 +-
 src/portable/nuvoton/nuc505/dcd_nuc505.c      |   6 +-
 src/portable/nxp/khci/dcd_khci.c              |   6 +-
 src/portable/nxp/khci/hcd_khci.c              |   4 +-
 src/portable/nxp/lpc17_40/dcd_lpc17_40.c      |   2 +-
 src/portable/nxp/lpc17_40/dcd_lpc17_40.h      |   2 +-
 src/portable/nxp/lpc17_40/hcd_lpc17_40.c      |   3 +-
 src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c  |   7 +-
 .../transdimension/common_transdimension.h    |   2 +-
 .../nxp/transdimension/dcd_transdimension.c   |   2 +-
 .../nxp/transdimension/hcd_transdimension.c   |   2 +-
 src/portable/ohci/ohci.c                      |   3 +-
 .../raspberrypi/pio_usb/dcd_pio_usb.c         |   2 +-
 src/portable/raspberrypi/rp2040/rp2040_usb.h  |   2 +-
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c |  45 +-
 src/portable/st/synopsys/synopsys_common.h    | 672 +++++++++---------
 src/portable/sunxi/dcd_sunxi_musb.c           |   6 +-
 src/portable/template/dcd_template.c          |   2 +-
 src/portable/valentyusb/eptri/dcd_eptri.c     |   2 +-
 src/portable/valentyusb/eptri/dcd_eptri.h     |   2 +-
 src/portable/wch/ch32v307/dcd_usbhs.c         |   8 +-
 test/fuzz/dcd_fuzz.cc                         |   4 +-
 test/fuzz/device/cdc/CMakeLists.txt           |   2 +-
 test/fuzz/device/cdc/src/fuzz.cc              |   4 +-
 test/fuzz/device/msc/CMakeLists.txt           |   2 +-
 test/fuzz/device/msc/src/fuzz.cc              |   1 -
 test/fuzz/device/net/CMakeLists.txt           |   2 +-
 test/fuzz/device/net/src/arch/cc.h            |  32 +-
 test/fuzz/device/net/src/fuzz.cc              |   2 +-
 test/fuzz/device/net/src/lwipopts.h           |  28 +-
 test/fuzz/dicts/cdc.dict                      |   1 -
 test/fuzz/make.mk                             |   3 +-
 test/fuzz/msc_fuzz.cc                         |   2 +-
 test/fuzz/net_fuzz.cc                         |   2 +-
 test/fuzz/rules.mk                            |   6 +-
 .../test/device/msc/test_msc_device.c         |   2 +-
 test/unit-test/test/device/usbd/test_usbd.c   |   2 +-
 test/unit-test/test/test_fifo.c               |   2 +-
 .../unit-test/vendor/ceedling/lib/ceedling.rb |   1 -
 .../lib/ceedling/build_invoker_utils.rb       |  14 +-
 .../ceedling/lib/ceedling/cacheinator.rb      |  10 +-
 .../lib/ceedling/cacheinator_helper.rb        |   2 +-
 .../ceedling/lib/ceedling/cmock_builder.rb    |   8 +-
 .../ceedling/lib/ceedling/configurator.rb     |   1 -
 .../lib/ceedling/configurator_plugins.rb      |   2 +-
 .../lib/ceedling/configurator_setup.rb        |   2 +-
 .../lib/ceedling/configurator_validator.rb    |  78 +-
 .../ceedling/lib/ceedling/erb_wrapper.rb      |   2 +-
 .../ceedling/lib/ceedling/file_finder.rb      |   1 -
 .../lib/ceedling/file_finder_helper.rb        |  22 +-
 .../lib/ceedling/file_system_utils.rb         |  14 +-
 .../lib/ceedling/file_system_wrapper.rb       |   2 +-
 .../ceedling/lib/ceedling/flaginator.rb       |  14 +-
 .../ceedling/lib/ceedling/generator_helper.rb |   8 +-
 .../lib/ceedling/generator_test_results.rb    |   2 +-
 .../generator_test_results_sanity_checker.rb  |  22 +-
 .../vendor/ceedling/lib/ceedling/loginator.rb |   6 +-
 .../vendor/ceedling/lib/ceedling/makefile.rb  |   4 +-
 .../vendor/ceedling/lib/ceedling/objects.yml  |   2 +-
 .../vendor/ceedling/lib/ceedling/par_map.rb   |   1 -
 .../vendor/ceedling/lib/ceedling/plugin.rb    |   8 +-
 .../ceedling/lib/ceedling/plugin_builder.rb   |   4 +-
 .../lib/ceedling/plugin_reportinator.rb       |  40 +-
 .../ceedling/plugin_reportinator_helper.rb    |  10 +-
 .../preprocessinator_includes_handler.rb      |   2 +-
 .../lib/ceedling/project_config_manager.rb    |   2 +-
 .../ceedling/lib/ceedling/rake_utils.rb       |   2 +-
 .../ceedling/lib/ceedling/reportinator.rb     |   4 +-
 .../ceedling/lib/ceedling/rules_cmock.rake    |   2 +-
 .../lib/ceedling/rules_preprocess.rake        |   5 +-
 .../ceedling/lib/ceedling/rules_release.rake  |   1 -
 .../rules_release_deep_dependencies.rake      |   3 +-
 .../ceedling/lib/ceedling/rules_tests.rake    |   1 -
 .../rules_tests_deep_dependencies.rake        |   1 -
 .../ceedling/lib/ceedling/setupinator.rb      |   8 +-
 .../ceedling/lib/ceedling/stream_wrapper.rb   |   2 +-
 .../ceedling/lib/ceedling/streaminator.rb     |   2 +-
 .../lib/ceedling/streaminator_helper.rb       |   2 +-
 .../ceedling/lib/ceedling/system_utils.rb     |   6 +-
 .../ceedling/lib/ceedling/task_invoker.rb     |  20 +-
 .../ceedling/lib/ceedling/tasks_base.rake     |   1 -
 .../lib/ceedling/tasks_filesystem.rake        |   2 -
 .../ceedling/lib/ceedling/tasks_release.rake  |  11 +-
 .../ceedling/lib/ceedling/tasks_tests.rake    |   1 -
 .../lib/ceedling/test_invoker_helper.rb       |   8 +-
 .../vendor/ceedling/plugins/beep/lib/beep.rb  |   1 -
 .../ceedling/plugins/bullseye/README.md       |   2 +-
 .../plugins/bullseye/assets/template.erb      |   1 -
 .../ceedling/plugins/bullseye/lib/bullseye.rb |  26 +-
 .../ceedling/plugins/colour_report/README.md  |   2 +-
 .../command_hooks/lib/command_hooks.rb        |   1 -
 .../plugins/compile_commands_json/README.md   |   2 +-
 .../plugins/fake_function_framework/Rakefile  |   2 +-
 .../examples/fff_example/project.yml          |   2 +-
 .../examples/fff_example/src/display.c        |   2 +-
 .../lib/fff_mock_generator.rb                 |   2 +-
 .../spec/fff_mock_header_generator_spec.rb    |   2 +-
 .../spec/fff_mock_source_generator_spec.rb    |   2 +-
 .../spec/header_generator.rb                  |   2 +-
 .../src/fff_unity_helper.h                    |   2 +-
 .../ceedling/plugins/gcov/assets/template.erb |   1 -
 .../plugins/gcov/lib/reportinator_helper.rb   |   2 +-
 .../plugins/json_tests_report/README.md       |   4 +-
 .../lib/json_tests_report.rb                  |   4 +-
 .../plugins/module_generator/README.md        |   4 +-
 .../config/module_generator.yml               |   2 +-
 .../stdout_gtestlike_tests_report/README.md   |   4 +-
 .../plugins/stdout_ide_tests_report/README.md |   2 +-
 .../stdout_pretty_tests_report/README.md      |   2 +-
 .../assets/template.erb                       |   1 -
 .../lib/stdout_pretty_tests_report.rb         |   8 +-
 .../ceedling/plugins/subprojects/README.md    |  14 +-
 .../plugins/subprojects/subprojects.rake      |   3 +-
 .../plugins/teamcity_tests_report/README.md   |   2 +-
 .../vendor/c_exception/lib/CException.c       |   1 -
 .../vendor/c_exception/lib/meson.build        |   2 +-
 .../vendor/ceedling/vendor/cmock/src/cmock.c  |   1 -
 .../ceedling/vendor/cmock/src/meson.build     |   2 +-
 .../vendor/ceedling/vendor/diy/lib/diy.rb     |  60 +-
 .../ceedling/vendor/diy/lib/diy/factory.rb    |   5 +-
 .../vendor/unity/auto/generate_config.yml     |   2 +-
 .../ceedling/vendor/unity/src/meson.build     |   2 +-
 tools/build_board.py                          |   2 +-
 tools/build_utils.py                          |   2 +-
 tools/iar_template.ipcf                       |   2 +-
 tools/mksunxi.py                              |   2 +-
 tools/pcapng_to_corpus.py                     |  10 +-
 tools/usb_drivers/tinyusb_win_usbser.inf      |   2 +-
 581 files changed, 2553 insertions(+), 2694 deletions(-)

diff --git a/.gitattributes b/.gitattributes
index 2342decc3..140ae8929 100644
--- a/.gitattributes
+++ b/.gitattributes
@@ -1,10 +1,10 @@
 # Set the default behavior, in case people don't have core.autocrlf set.
 * text=auto
 
-*.c text 
-*.cpp text 
+*.c text
+*.cpp text
 *.h text
-*.icf text 
+*.icf text
 *.js text
 *.json text
 *.ld text
diff --git a/.github/ISSUE_TEMPLATE/bug_report.yml b/.github/ISSUE_TEMPLATE/bug_report.yml
index 8c39b95e1..dc5f0ee16 100644
--- a/.github/ISSUE_TEMPLATE/bug_report.yml
+++ b/.github/ISSUE_TEMPLATE/bug_report.yml
@@ -54,7 +54,7 @@ body:
         Exact steps in chronological order, details should be specific e.g if you use a command/script to test with, please post it as well.
         1. Go to '...'
         2. Click on '....'
-        3. See error      
+        3. See error
     validations:
       required: true
 
@@ -63,9 +63,9 @@ body:
       label: Debug Log as txt file
       placeholder: |
         Attach your debug log txt file here, where the issue occurred, best with comments to explain the actual events.
-        
+
         Note1: Please DO NOT paste your lengthy log contents here since it hurts the readability.
-        Note2: To enable logging, add `LOG=3` to to the make command if building with stock examples or set `CFG_TUSB_DEBUG=3` in your tusb_config.h. 
+        Note2: To enable logging, add `LOG=3` to to the make command if building with stock examples or set `CFG_TUSB_DEBUG=3` in your tusb_config.h.
         More information can be found at [example's readme](https://github.com/hathach/tinyusb/blob/master/docs/getting_started.md)
     validations:
       required: false
diff --git a/.github/workflows/trigger.yml b/.github/workflows/trigger.yml
index 11e58d86c..86c699dac 100644
--- a/.github/workflows/trigger.yml
+++ b/.github/workflows/trigger.yml
@@ -43,7 +43,7 @@ jobs:
         if [ -n "$(git status --porcelain)" ]; then
           git add .
           git commit --message "Update from https://github.com/$GITHUB_REPOSITORY/commit/$GITHUB_SHA"
-          git push 
+          git push
         fi
 
     - name: Create tinyusb_src Release
@@ -53,7 +53,7 @@ jobs:
         cd tinyusb_src
         git tag ${{ github.event.release.tag_name }}
         git push origin ${{ github.event.release.tag_name }}
-        
+
         # Send POST reqwuest to release https://docs.github.com/en/rest/reference/repos#create-a-release
         bb="For release note, please checkout https://github.com/hathach/tinyusb/releases/tag/${{ github.event.release.tag_name }}"
         curl -X POST -H "Authorization: token ${{ secrets.API_TOKEN_GITHUB }}" -H "Accept: application/vnd.github.v3+json" --data '{"tag_name": "${{ github.event.release.tag_name }}", "name": "${{ github.event.release.name }}", "body": "$bb", "draft": ${{ github.event.release.draft }}, "prerelease": ${{ github.event.release.prerelease }}}' https://api.github.com/repos/hathach/tinyusb_src/releases
diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index ea2372f07..976f04e63 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -13,11 +13,11 @@ repos:
 
 -   repo: local
     hooks:
-    -   id: codespell
-        name: codespell
-        entry: codespell
-        types_or: [c, header]
-        language: system
+    #-   id: codespell
+    #    name: codespell
+    #    entry: codespell
+    #    types_or: [c, header]
+    #    language: system
 
     -   id: unit-test
         name: unit-test
diff --git a/.readthedocs.yaml b/.readthedocs.yaml
index e83cd90fd..1421b397a 100644
--- a/.readthedocs.yaml
+++ b/.readthedocs.yaml
@@ -15,4 +15,3 @@ python:
 submodules:
   include: []
   recursive: false
-    
\ No newline at end of file
diff --git a/docs/assets/stack.svg b/docs/assets/stack.svg
index 85fe35e96..ed46c8649 100644
--- a/docs/assets/stack.svg
+++ b/docs/assets/stack.svg
@@ -1 +1 @@
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diff --git a/docs/contributing/code_of_conduct.rst b/docs/contributing/code_of_conduct.rst
index b52bf14c5..82627099f 120000
--- a/docs/contributing/code_of_conduct.rst
+++ b/docs/contributing/code_of_conduct.rst
@@ -1 +1 @@
-../../CODE_OF_CONDUCT.rst
\ No newline at end of file
+../../CODE_OF_CONDUCT.rst
diff --git a/docs/info/changelog.rst b/docs/info/changelog.rst
index 451e3dace..ca715cb58 100644
--- a/docs/info/changelog.rst
+++ b/docs/info/changelog.rst
@@ -15,7 +15,7 @@ Changelog
 - Fix tu_fifo memory overflown when repeatedly write to overwritable fifo (accumulated more than 2 depths)
 - Better support for IAR (ARM) with ci build check for stm32 mcus.
 - Fix Windows build for some mingw gnu make situations
-  
+
 Controller Driver (DCD & HCD)
 -----------------------------
 
@@ -27,7 +27,7 @@ Controller Driver (DCD & HCD)
   - Fix endpoint internal state when closed
   - Fix reception of large ISO packets
 
-- [rp2040] 
+- [rp2040]
 
   - [dcd] Implement workaround for Errata 15. This enable SOF when bulk-in endpoint is in use and reduce its bandwidth to only 80%
   - [hcd] Fix shared irq slots filling up when hcd_init() is called multiple times
@@ -51,7 +51,7 @@ Device Stack
 
   - Support port name strings
   - fix MS Header wTotalLength computation
- 
+
 - [HID]
 
   - Add FIDO descriptor template
@@ -60,7 +60,7 @@ Device Stack
 - [CDC]
 
   - Fix autoflush for FIFO < MPS
-  - Fix tx fifo memory overflown when DTR is not set and tud_cdc_write() is called repeatedly with large enough data  
+  - Fix tx fifo memory overflown when DTR is not set and tud_cdc_write() is called repeatedly with large enough data
 
 - [USBTMC] Fix packet size with highspeed
 
@@ -100,14 +100,14 @@ Controller Driver (DCD & HCD)
   - Fix overwrite with grstctl when disable endpoint
 - [EHCI] Fix an issue with EHCI driver
 - [msp430] Fix for possible bug in msp430-elf-gcc 9.3.0
-- [nrf5x] Fix DMA access race condition using atomic function 
+- [nrf5x] Fix DMA access race condition using atomic function
 - [pic32] Fix PIC32 santiy
 - [rp2040]
 
   - Add PICO-PIO-USB as controller (device/host) support for rp2040
   - Use shared IRQ handlers, so user can also hook the USB IRQ
   - Fix resumed signal not reported to device stack
-- [stm32fsdev] Add support for stm32wb55 
+- [stm32fsdev] Add support for stm32wb55
 
 Device Stack
 ------------
@@ -159,7 +159,7 @@ Controller Driver (DCD & HCD)
 - [F1C100s] Add new DCD for Allwinner F1C100s family
 - [PIC32MZ] Add new DCD for PIC32MZ
 - [nRF] Fix/Enhance various race condition with: EASY DMA, request HFXO, EPOUT
-- [ChipIdea] rename Transdimension to more popular ChipIdea Highspeed, 
+- [ChipIdea] rename Transdimension to more popular ChipIdea Highspeed,
 - [RP2040] various update/fix for hcd/dcd
 - [FT9XX] new DCD port for Bridgetek FT90x and FT93x devices
 - [DA1469X] Fix resume
@@ -246,7 +246,7 @@ RP2040
 ^^^^^^
 
 - Add RP2040 suspend & resume support
-- Implement double buffer for both host and device (#891). However device EPOUT is still single buffered due to techinical issue with short packet 
+- Implement double buffer for both host and device (#891). However device EPOUT is still single buffered due to techinical issue with short packet
 
 Device Stack
 ------------
@@ -267,7 +267,7 @@ DFU
 ^^^
 
 - Enhance DFU implementation to support multiple alternate interface and better support bwPollTimeout
-- Rename CFG_TUD_DFU_MODE to simply CFG_TUD_DFU 
+- Rename CFG_TUD_DFU_MODE to simply CFG_TUD_DFU
 
 HID
 ^^^
@@ -287,7 +287,7 @@ UAC2
 ^^^^
 
 - Fix bug and enhance of UAC2
- 
+
 Vendor
 ^^^^^^
 
@@ -479,7 +479,7 @@ Host Controller Driver (HCD)
   - Move echi/ohci files to portable/
   - Rename hcd_lpc18_43 to hcd_transdimension
   - Sub hcd API with hcd_ehci_init(), hcd_ehci_register_addr()
-  
+
 - Update NXP transdimention hcd_init() to reset controller to host mode
 
   - Ported hcd to rt10xx
@@ -529,13 +529,13 @@ Device Controller Driver
 
 - ESP32-S2:
   - Add bus suspend and wakeup support
-  
+
 - SAMD21:
   - Fix (walkaround) samd21 setup_packet overflow by USB DMA
-  
+
 - STM32 Synopsys:
   - Rework USB FIFO allocation scheme and allow RX FIFO size reduction
-  
+
 - Sony CXD56
   - Update Update Spresense SDK to 2.0.2
   - Fix dcd issues with setup packets
@@ -554,17 +554,17 @@ USB Device
 
 - CDC
   - Allow to transmit data, even if the host does not support control line states i.e set DTR
-  
+
 - HID
   - change default CFG_TUD_HID_EP_BUFSIZE from 16 to 64
-  
+
 - MIDI
   - Fix midi sysex sending bug
-  
+
 - MSC
   - Invoke only scsi complete callback after status transaction is complete.
   - Fix scsi_mode_sense6_t padding, which cause IAR compiler internal error.
-  
+
 - USBTMC
   - Change interrupt endpoint example size to 8 instead of 2 for better compatibility with mcu
 
@@ -614,20 +614,20 @@ Device Controller Driver
   - Fix FIFO flush during stall
   - Implement dcd_edpt_close() API
   - Support F105, F107
-  
+
 - Enhance STM32 fsdev
   - Improve dcd fifo allocation
   - Fix ISTR race condition
   - Support remap USB IRQ on supported MCUs
   - Implement dcd_edpt_close() API
-  
+
 - Enhance NUC 505: enhance set configure behavior
 
 - Enhance SAMD
   - Fix race condition with setup packet
   - Add SAMD11 option `OPT_MCU_SAMD11`
   - Add SAME5x option `OPT_MCU_SAME5X`
-  
+
 - Fix SAMG control data toggle and stall race condition
 
 - Enhance nRF
@@ -659,7 +659,7 @@ USB Device
   - `usbd_driver_open()` add max length argument, and return length of interface (0 for not supported). Return value is used for finding appropriate driver
   - Add application implemented class driver via `usbd_app_driver_get_cb()`
   - IAD is handled to assign driver id
-  
+
 - Added `tud_descriptor_device_qualifier_cb()` callback
 - Optimize `tu_fifo` bulk write/read transfer
 - Forward non-std control request to class driver
@@ -675,12 +675,12 @@ USB Device
   - Send zero length packet for end of data when needed
   - Add `tud_cdc_tx_complete_cb()` callback
   - Change tud_cdc_n_write_flush() return number of bytes forced to transfer, and flush when writing enough data to fifo
-  
+
 - MIDI:
   - Add packet interface
   - Add multiple jack descriptors
   - Fix MIDI driver for sysex
-  
+
 - DFU Runtime: fix response to SET_INTERFACE and DFU_GETSTATUS request
 
 - Rename some configure macro to make it clear that those are used directly for endpoint transfer
@@ -688,7 +688,7 @@ USB Device
   - CFG_TUD_CDC_EPSIZE to CFG_TUD_CDC_EP_BUFSIZE
   - CFG_TUD_MSC_BUFSIZE to CFG_TUD_MSC_EP_BUFSIZE
   - CFG_TUD_MIDI_EPSIZE to CFG_TUD_MIDI_EP_BUFSIZE
-  
+
 - HID:
   - Fix gamepad template descriptor
   - Add multiple HID interface API
@@ -700,7 +700,7 @@ USB Host
 - Rework USB host stack (still work in progress)
    - Fix compile error with pipehandle
    - Rework usbh control and enumeration as non-blocking
-   
+
 - Improve Hub, MSC, HID host driver
 
 Examples
@@ -713,7 +713,7 @@ Examples
 - Enhance `net_lwip_webserver` example
   - Add multiple configuration: RNDIS for Windows, CDC-ECM for macOS (Linux will work with both)
   - Update lwip to STABLE-2_1_2_RELEASE for net_lwip_webserver
-  
+
 - Added new Audio example: audio_test uac2_headsest
 
 New Boards
diff --git a/docs/info/contributors.rst b/docs/info/contributors.rst
index b3748ccb5..02608919f 120000
--- a/docs/info/contributors.rst
+++ b/docs/info/contributors.rst
@@ -1 +1 @@
-../../CONTRIBUTORS.rst
\ No newline at end of file
+../../CONTRIBUTORS.rst
diff --git a/docs/reference/getting_started.rst b/docs/reference/getting_started.rst
index e328757ba..ef4a6ba61 100644
--- a/docs/reference/getting_started.rst
+++ b/docs/reference/getting_started.rst
@@ -44,18 +44,18 @@ For your convenience, TinyUSB contains a handful of examples for both host and d
    $ git clone https://github.com/hathach/tinyusb tinyusb
    $ cd tinyusb
 
-Some TinyUSB examples also requires external submodule libraries in ``/lib`` such as FreeRTOS, Lightweight IP to build. Run following command to fetch them 
+Some TinyUSB examples also requires external submodule libraries in ``/lib`` such as FreeRTOS, Lightweight IP to build. Run following command to fetch them
 
 .. code-block::
 
    $ git submodule update --init lib
 
-Some ports will also require a port-specific SDK (e.g. RP2040) or binary (e.g. Sony Spresense) to build examples. They are out of scope for tinyusb, you should download/install it first according to its manufacturer guide. 
+Some ports will also require a port-specific SDK (e.g. RP2040) or binary (e.g. Sony Spresense) to build examples. They are out of scope for tinyusb, you should download/install it first according to its manufacturer guide.
 
 Build
 ^^^^^
 
-To build example, first change directory to an example folder. 
+To build example, first change directory to an example folder.
 
 .. code-block::
 
@@ -118,7 +118,7 @@ To compile for debugging add ``DEBUG=1``\ , for example
 Log
 ~~~
 
-Should you have an issue running example and/or submitting an bug report. You could enable TinyUSB built-in debug logging with optional ``LOG=``. LOG=1 will only print out error message, LOG=2 print more information with on-going events. LOG=3 or higher is not used yet. 
+Should you have an issue running example and/or submitting an bug report. You could enable TinyUSB built-in debug logging with optional ``LOG=``. LOG=1 will only print out error message, LOG=2 print more information with on-going events. LOG=3 or higher is not used yet.
 
 .. code-block::
 
@@ -127,7 +127,7 @@ Should you have an issue running example and/or submitting an bug report. You co
 Logger
 ~~~~~~
 
-By default log message is printed via on-board UART which is slow and take lots of CPU time comparing to USB speed. If your board support on-board/external debugger, it would be more efficient to use it for logging. There are 2 protocols: 
+By default log message is printed via on-board UART which is slow and take lots of CPU time comparing to USB speed. If your board support on-board/external debugger, it would be more efficient to use it for logging. There are 2 protocols:
 
 
 * `LOGGER=rtt`: use `Segger RTT protocol <https://www.segger.com/products/debug-probes/j-link/technology/about-real-time-transfer/>`_
@@ -178,12 +178,12 @@ IAR Project Connection files are provided to import TinyUSB stack into your proj
 
 
   * Take example of STM32F0:
-  
+
     -  You need `stm32l0xx.h`, `startup_stm32f0xx.s`, `system_stm32f0xx.c`.
 
     - `STM32L0xx_HAL_Driver` is only needed to run examples, TinyUSB stack itself doesn't rely on MCU's SDKs.
 
-* Open `Tools -> Configure Custom Argument Variables` (Switch to `Global` tab if you want to do it for all your projects) 
+* Open `Tools -> Configure Custom Argument Variables` (Switch to `Global` tab if you want to do it for all your projects)
    Click `New Group ...`, name it to `TUSB`, Click `Add Variable ...`, name it to `TUSB_DIR`, change it's value to the path of your TinyUSB stack,
    for example `C:\\tinyusb`
 
diff --git a/examples/device/audio_4_channel_mic/skip.txt b/examples/device/audio_4_channel_mic/skip.txt
index ae9b57f1f..1ee86a485 100644
--- a/examples/device/audio_4_channel_mic/skip.txt
+++ b/examples/device/audio_4_channel_mic/skip.txt
@@ -1,3 +1,3 @@
 mcu:SAMD11
 mcu:SAME5X
-mcu:SAMG
\ No newline at end of file
+mcu:SAMG
diff --git a/examples/device/audio_4_channel_mic/src/main.c b/examples/device/audio_4_channel_mic/src/main.c
index a6af5fd19..26d8c48c5 100644
--- a/examples/device/audio_4_channel_mic/src/main.c
+++ b/examples/device/audio_4_channel_mic/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 Reinhard Panhuber
diff --git a/examples/device/audio_4_channel_mic/src/plot_audio_samples.py b/examples/device/audio_4_channel_mic/src/plot_audio_samples.py
index 9ab15135d..8312b4e28 100644
--- a/examples/device/audio_4_channel_mic/src/plot_audio_samples.py
+++ b/examples/device/audio_4_channel_mic/src/plot_audio_samples.py
@@ -31,4 +31,3 @@ if __name__ == '__main__':
     plt.ylabel('Amplitude')
     plt.title('MicNode 4 Channel')
     plt.show()
-    
\ No newline at end of file
diff --git a/examples/device/audio_4_channel_mic/src/usb_descriptors.c b/examples/device/audio_4_channel_mic/src/usb_descriptors.c
index 8929f3057..8bf9eebc4 100644
--- a/examples/device/audio_4_channel_mic/src/usb_descriptors.c
+++ b/examples/device/audio_4_channel_mic/src/usb_descriptors.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/audio_test/CMakeLists.txt b/examples/device/audio_test/CMakeLists.txt
index cb321f9a8..f6e10e2ea 100644
--- a/examples/device/audio_test/CMakeLists.txt
+++ b/examples/device/audio_test/CMakeLists.txt
@@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
\ No newline at end of file
+family_configure_device_example(${PROJECT})
diff --git a/examples/device/audio_test/skip.txt b/examples/device/audio_test/skip.txt
index ae9b57f1f..1ee86a485 100644
--- a/examples/device/audio_test/skip.txt
+++ b/examples/device/audio_test/skip.txt
@@ -1,3 +1,3 @@
 mcu:SAMD11
 mcu:SAME5X
-mcu:SAMG
\ No newline at end of file
+mcu:SAMG
diff --git a/examples/device/audio_test/src/main.c b/examples/device/audio_test/src/main.c
index 56961e427..f9cc63cdd 100644
--- a/examples/device/audio_test/src/main.c
+++ b/examples/device/audio_test/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 Reinhard Panhuber
diff --git a/examples/device/audio_test/src/plot_audio_samples.py b/examples/device/audio_test/src/plot_audio_samples.py
index 2303df3d0..1504684a6 100644
--- a/examples/device/audio_test/src/plot_audio_samples.py
+++ b/examples/device/audio_test/src/plot_audio_samples.py
@@ -32,7 +32,6 @@ if __name__ == '__main__':
     plt.ylabel('Amplitude')
     plt.title('MicNode')
     plt.show()
-    
+
     samples = np.array(myrecording)
     np.savetxt('Output.csv', samples, delimiter=",", fmt='%s')
-    
\ No newline at end of file
diff --git a/examples/device/audio_test/src/usb_descriptors.c b/examples/device/audio_test/src/usb_descriptors.c
index da3e203d7..891e90802 100644
--- a/examples/device/audio_test/src/usb_descriptors.c
+++ b/examples/device/audio_test/src/usb_descriptors.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/audio_test_multi_rate/CMakeLists.txt b/examples/device/audio_test_multi_rate/CMakeLists.txt
index cb321f9a8..f6e10e2ea 100644
--- a/examples/device/audio_test_multi_rate/CMakeLists.txt
+++ b/examples/device/audio_test_multi_rate/CMakeLists.txt
@@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
\ No newline at end of file
+family_configure_device_example(${PROJECT})
diff --git a/examples/device/audio_test_multi_rate/skip.txt b/examples/device/audio_test_multi_rate/skip.txt
index ae9b57f1f..1ee86a485 100644
--- a/examples/device/audio_test_multi_rate/skip.txt
+++ b/examples/device/audio_test_multi_rate/skip.txt
@@ -1,3 +1,3 @@
 mcu:SAMD11
 mcu:SAME5X
-mcu:SAMG
\ No newline at end of file
+mcu:SAMG
diff --git a/examples/device/audio_test_multi_rate/src/main.c b/examples/device/audio_test_multi_rate/src/main.c
index 0e11a509b..4dd53dd34 100644
--- a/examples/device/audio_test_multi_rate/src/main.c
+++ b/examples/device/audio_test_multi_rate/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 Reinhard Panhuber
@@ -165,7 +165,7 @@ bool tud_audio_set_itf_cb(uint8_t rhport, tusb_control_request_t const * p_reque
   (void)rhport;
   //uint8_t const itf = tu_u16_low(tu_le16toh(p_request->wIndex));
   uint8_t const alt = tu_u16_low(tu_le16toh(p_request->wValue));
-  
+
   // Clear buffer when streaming format is changed
   if(alt != 0)
   {
@@ -257,7 +257,7 @@ bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const *
       return false;
     }
   }
-  
+
   // Clock Source unit
   if ( entityID == UAC2_ENTITY_CLOCK )
   {
@@ -279,7 +279,7 @@ bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const *
         return false;
     }
   }
-  
+
   return false;    // Yet not implemented
 }
 
@@ -491,7 +491,7 @@ bool tud_audio_tx_done_post_load_cb(uint8_t rhport, uint16_t n_bytes_copied, uin
       pData_32[cnt] = (uint32_t)startVal++ << 16U;
     }
   }
-  
+
   return true;
 }
 
diff --git a/examples/device/audio_test_multi_rate/src/plot_audio_samples.py b/examples/device/audio_test_multi_rate/src/plot_audio_samples.py
index 4a5f15a9c..c92e49957 100644
--- a/examples/device/audio_test_multi_rate/src/plot_audio_samples.py
+++ b/examples/device/audio_test_multi_rate/src/plot_audio_samples.py
@@ -32,7 +32,6 @@ if __name__ == '__main__':
     plt.ylabel('Amplitude')
     plt.title('MicNode')
     plt.show()
-    
+
     samples = np.array(myrecording)
     np.savetxt('Output.csv', samples, delimiter=",", fmt='%s')
-    
\ No newline at end of file
diff --git a/examples/device/audio_test_multi_rate/src/tusb_config.h b/examples/device/audio_test_multi_rate/src/tusb_config.h
index d8b6511d6..1c8288bce 100644
--- a/examples/device/audio_test_multi_rate/src/tusb_config.h
+++ b/examples/device/audio_test_multi_rate/src/tusb_config.h
@@ -111,7 +111,7 @@ extern "C" {
 
 // How many formats are used, need to adjust USB descriptor if changed
 #define CFG_TUD_AUDIO_FUNC_1_N_FORMATS                               2
-  
+
 // 16bit in 16bit slots
 #define CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX          2
 #define CFG_TUD_AUDIO_FUNC_1_FORMAT_1_RESOLUTION_RX                  16
diff --git a/examples/device/audio_test_multi_rate/src/usb_descriptors.c b/examples/device/audio_test_multi_rate/src/usb_descriptors.c
index 92e791a72..276bf8aa0 100644
--- a/examples/device/audio_test_multi_rate/src/usb_descriptors.c
+++ b/examples/device/audio_test_multi_rate/src/usb_descriptors.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/audio_test_multi_rate/src/usb_descriptors.h b/examples/device/audio_test_multi_rate/src/usb_descriptors.h
index 77e2fe6c1..8d8a03e49 100644
--- a/examples/device/audio_test_multi_rate/src/usb_descriptors.h
+++ b/examples/device/audio_test_multi_rate/src/usb_descriptors.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2022 HiFiPhile
@@ -99,4 +99,4 @@
   TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000)
 
 
-#endif
\ No newline at end of file
+#endif
diff --git a/examples/device/board_test/src/CMakeLists.txt b/examples/device/board_test/src/CMakeLists.txt
index e4e1f4e9a..37625f441 100644
--- a/examples/device/board_test/src/CMakeLists.txt
+++ b/examples/device/board_test/src/CMakeLists.txt
@@ -2,7 +2,7 @@
 idf_component_register(SRCS "main.c"
                     INCLUDE_DIRS "."
                     REQUIRES freertos soc)
-                    
+
 file(TO_NATIVE_PATH "${TOP}/hw/bsp/${FAMILY}/boards/${BOARD}/board.cmake" board_cmake)
 
 if(EXISTS ${board_cmake})
diff --git a/examples/device/board_test/src/main.c b/examples/device/board_test/src/main.c
index 0289ca15f..e8e393717 100644
--- a/examples/device/board_test/src/main.c
+++ b/examples/device/board_test/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/cdc_dual_ports/CMakeLists.txt b/examples/device/cdc_dual_ports/CMakeLists.txt
index abc4d91da..acaa54198 100644
--- a/examples/device/cdc_dual_ports/CMakeLists.txt
+++ b/examples/device/cdc_dual_ports/CMakeLists.txt
@@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
\ No newline at end of file
+family_configure_device_example(${PROJECT})
diff --git a/examples/device/cdc_dual_ports/src/main.c b/examples/device/cdc_dual_ports/src/main.c
index 0264f0566..c0296191b 100644
--- a/examples/device/cdc_dual_ports/src/main.c
+++ b/examples/device/cdc_dual_ports/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/cdc_dual_ports/src/usb_descriptors.c b/examples/device/cdc_dual_ports/src/usb_descriptors.c
index 4eb8c7c27..8be404cc9 100644
--- a/examples/device/cdc_dual_ports/src/usb_descriptors.c
+++ b/examples/device/cdc_dual_ports/src/usb_descriptors.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/cdc_msc/CMakeLists.txt b/examples/device/cdc_msc/CMakeLists.txt
index fa6e83b7e..8e4db9d29 100644
--- a/examples/device/cdc_msc/CMakeLists.txt
+++ b/examples/device/cdc_msc/CMakeLists.txt
@@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
\ No newline at end of file
+family_configure_device_example(${PROJECT})
diff --git a/examples/device/cdc_msc/skip.txt b/examples/device/cdc_msc/skip.txt
index d844feae8..eadb6e74a 100644
--- a/examples/device/cdc_msc/skip.txt
+++ b/examples/device/cdc_msc/skip.txt
@@ -1 +1 @@
-mcu:SAMD11
\ No newline at end of file
+mcu:SAMD11
diff --git a/examples/device/cdc_msc/src/main.c b/examples/device/cdc_msc/src/main.c
index c83299e59..207dd728c 100644
--- a/examples/device/cdc_msc/src/main.c
+++ b/examples/device/cdc_msc/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/cdc_msc/src/msc_disk.c b/examples/device/cdc_msc/src/msc_disk.c
index e67e381ce..f8f37a577 100644
--- a/examples/device/cdc_msc/src/msc_disk.c
+++ b/examples/device/cdc_msc/src/msc_disk.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/cdc_msc/src/usb_descriptors.c b/examples/device/cdc_msc/src/usb_descriptors.c
index 6b59ed50f..44c849277 100644
--- a/examples/device/cdc_msc/src/usb_descriptors.c
+++ b/examples/device/cdc_msc/src/usb_descriptors.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/cdc_msc_freertos/src/main.c b/examples/device/cdc_msc_freertos/src/main.c
index cfb14aa2b..0e8a24d02 100644
--- a/examples/device/cdc_msc_freertos/src/main.c
+++ b/examples/device/cdc_msc_freertos/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/cdc_msc_freertos/src/msc_disk.c b/examples/device/cdc_msc_freertos/src/msc_disk.c
index a895f4738..707c8d578 100644
--- a/examples/device/cdc_msc_freertos/src/msc_disk.c
+++ b/examples/device/cdc_msc_freertos/src/msc_disk.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/cdc_msc_freertos/src/usb_descriptors.c b/examples/device/cdc_msc_freertos/src/usb_descriptors.c
index 30a712275..822442724 100644
--- a/examples/device/cdc_msc_freertos/src/usb_descriptors.c
+++ b/examples/device/cdc_msc_freertos/src/usb_descriptors.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/dfu_runtime/CMakeLists.txt b/examples/device/dfu_runtime/CMakeLists.txt
index abc4d91da..acaa54198 100644
--- a/examples/device/dfu_runtime/CMakeLists.txt
+++ b/examples/device/dfu_runtime/CMakeLists.txt
@@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
\ No newline at end of file
+family_configure_device_example(${PROJECT})
diff --git a/examples/device/dfu_runtime/src/main.c b/examples/device/dfu_runtime/src/main.c
index bd9a91c27..4ec2fa31d 100644
--- a/examples/device/dfu_runtime/src/main.c
+++ b/examples/device/dfu_runtime/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/dynamic_configuration/CMakeLists.txt b/examples/device/dynamic_configuration/CMakeLists.txt
index fa6e83b7e..8e4db9d29 100644
--- a/examples/device/dynamic_configuration/CMakeLists.txt
+++ b/examples/device/dynamic_configuration/CMakeLists.txt
@@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
\ No newline at end of file
+family_configure_device_example(${PROJECT})
diff --git a/examples/device/dynamic_configuration/skip.txt b/examples/device/dynamic_configuration/skip.txt
index d844feae8..eadb6e74a 100644
--- a/examples/device/dynamic_configuration/skip.txt
+++ b/examples/device/dynamic_configuration/skip.txt
@@ -1 +1 @@
-mcu:SAMD11
\ No newline at end of file
+mcu:SAMD11
diff --git a/examples/device/dynamic_configuration/src/main.c b/examples/device/dynamic_configuration/src/main.c
index 33a603343..90794e979 100644
--- a/examples/device/dynamic_configuration/src/main.c
+++ b/examples/device/dynamic_configuration/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/dynamic_configuration/src/msc_disk.c b/examples/device/dynamic_configuration/src/msc_disk.c
index e8cb03fdd..27856a1a4 100644
--- a/examples/device/dynamic_configuration/src/msc_disk.c
+++ b/examples/device/dynamic_configuration/src/msc_disk.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/dynamic_configuration/src/usb_descriptors.c b/examples/device/dynamic_configuration/src/usb_descriptors.c
index 092229b99..0590bd679 100644
--- a/examples/device/dynamic_configuration/src/usb_descriptors.c
+++ b/examples/device/dynamic_configuration/src/usb_descriptors.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/hid_boot_interface/CMakeLists.txt b/examples/device/hid_boot_interface/CMakeLists.txt
index abc4d91da..acaa54198 100644
--- a/examples/device/hid_boot_interface/CMakeLists.txt
+++ b/examples/device/hid_boot_interface/CMakeLists.txt
@@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
\ No newline at end of file
+family_configure_device_example(${PROJECT})
diff --git a/examples/device/hid_boot_interface/Makefile b/examples/device/hid_boot_interface/Makefile
index d58a539e8..b3f2cc588 100644
--- a/examples/device/hid_boot_interface/Makefile
+++ b/examples/device/hid_boot_interface/Makefile
@@ -8,7 +8,7 @@ INC += \
 EXAMPLE_SOURCE = \
 	src/main.c \
 	src/usb_descriptors.c
-	
+
 SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
 
 include ../../rules.mk
diff --git a/examples/device/hid_boot_interface/src/main.c b/examples/device/hid_boot_interface/src/main.c
index b13428041..1a155996a 100644
--- a/examples/device/hid_boot_interface/src/main.c
+++ b/examples/device/hid_boot_interface/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/hid_boot_interface/src/usb_descriptors.c b/examples/device/hid_boot_interface/src/usb_descriptors.c
index a0d7e9f15..10345ab41 100644
--- a/examples/device/hid_boot_interface/src/usb_descriptors.c
+++ b/examples/device/hid_boot_interface/src/usb_descriptors.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/hid_boot_interface/src/usb_descriptors.h b/examples/device/hid_boot_interface/src/usb_descriptors.h
index 57cf0e2c0..6fee9e223 100644
--- a/examples/device/hid_boot_interface/src/usb_descriptors.h
+++ b/examples/device/hid_boot_interface/src/usb_descriptors.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/hid_composite/CMakeLists.txt b/examples/device/hid_composite/CMakeLists.txt
index abc4d91da..acaa54198 100644
--- a/examples/device/hid_composite/CMakeLists.txt
+++ b/examples/device/hid_composite/CMakeLists.txt
@@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
\ No newline at end of file
+family_configure_device_example(${PROJECT})
diff --git a/examples/device/hid_composite/src/main.c b/examples/device/hid_composite/src/main.c
index 05315f266..4edb045c2 100644
--- a/examples/device/hid_composite/src/main.c
+++ b/examples/device/hid_composite/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/hid_composite/src/usb_descriptors.c b/examples/device/hid_composite/src/usb_descriptors.c
index 2988baee2..347bbf29a 100644
--- a/examples/device/hid_composite/src/usb_descriptors.c
+++ b/examples/device/hid_composite/src/usb_descriptors.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/hid_composite/src/usb_descriptors.h b/examples/device/hid_composite/src/usb_descriptors.h
index ca8925ad9..e733d31dd 100644
--- a/examples/device/hid_composite/src/usb_descriptors.h
+++ b/examples/device/hid_composite/src/usb_descriptors.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/hid_composite_freertos/src/main.c b/examples/device/hid_composite_freertos/src/main.c
index 7c9619c4b..ca02af100 100644
--- a/examples/device/hid_composite_freertos/src/main.c
+++ b/examples/device/hid_composite_freertos/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/hid_composite_freertos/src/usb_descriptors.c b/examples/device/hid_composite_freertos/src/usb_descriptors.c
index 4df12d3db..30f327d5e 100644
--- a/examples/device/hid_composite_freertos/src/usb_descriptors.c
+++ b/examples/device/hid_composite_freertos/src/usb_descriptors.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/hid_composite_freertos/src/usb_descriptors.h b/examples/device/hid_composite_freertos/src/usb_descriptors.h
index ca8925ad9..e733d31dd 100644
--- a/examples/device/hid_composite_freertos/src/usb_descriptors.h
+++ b/examples/device/hid_composite_freertos/src/usb_descriptors.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/hid_generic_inout/CMakeLists.txt b/examples/device/hid_generic_inout/CMakeLists.txt
index abc4d91da..acaa54198 100644
--- a/examples/device/hid_generic_inout/CMakeLists.txt
+++ b/examples/device/hid_generic_inout/CMakeLists.txt
@@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
\ No newline at end of file
+family_configure_device_example(${PROJECT})
diff --git a/examples/device/hid_generic_inout/hid_test.js b/examples/device/hid_generic_inout/hid_test.js
index daa958fd5..16bc723e2 100644
--- a/examples/device/hid_generic_inout/hid_test.js
+++ b/examples/device/hid_generic_inout/hid_test.js
@@ -48,7 +48,7 @@ if( deviceInfo ) {
 
 
 function anySupportedBoard(d) {
-	
+
 	for (var key in boards) {
 	    if (boards.hasOwnProperty(key)) {
 	        if (isDevice(boards[key],d)) {
@@ -65,4 +65,3 @@ function isDevice(board,d){
 	// product id 0xff is matches all
 	return d.vendorId==board[0] && (d.productId==board[1] || board[1] == 0xFFFF);
 }
-
diff --git a/examples/device/hid_generic_inout/src/main.c b/examples/device/hid_generic_inout/src/main.c
index 5b7daf118..6649b49b5 100644
--- a/examples/device/hid_generic_inout/src/main.c
+++ b/examples/device/hid_generic_inout/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/hid_generic_inout/src/usb_descriptors.c b/examples/device/hid_generic_inout/src/usb_descriptors.c
index cd4838407..8377a0f47 100644
--- a/examples/device/hid_generic_inout/src/usb_descriptors.c
+++ b/examples/device/hid_generic_inout/src/usb_descriptors.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/hid_multiple_interface/CMakeLists.txt b/examples/device/hid_multiple_interface/CMakeLists.txt
index abc4d91da..acaa54198 100644
--- a/examples/device/hid_multiple_interface/CMakeLists.txt
+++ b/examples/device/hid_multiple_interface/CMakeLists.txt
@@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
\ No newline at end of file
+family_configure_device_example(${PROJECT})
diff --git a/examples/device/midi_test/CMakeLists.txt b/examples/device/midi_test/CMakeLists.txt
index abc4d91da..acaa54198 100644
--- a/examples/device/midi_test/CMakeLists.txt
+++ b/examples/device/midi_test/CMakeLists.txt
@@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
\ No newline at end of file
+family_configure_device_example(${PROJECT})
diff --git a/examples/device/midi_test/src/main.c b/examples/device/midi_test/src/main.c
index 3310348bd..66fa72063 100644
--- a/examples/device/midi_test/src/main.c
+++ b/examples/device/midi_test/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/midi_test/src/usb_descriptors.c b/examples/device/midi_test/src/usb_descriptors.c
index c84a873b1..4845dcf57 100644
--- a/examples/device/midi_test/src/usb_descriptors.c
+++ b/examples/device/midi_test/src/usb_descriptors.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/msc_dual_lun/CMakeLists.txt b/examples/device/msc_dual_lun/CMakeLists.txt
index 9e834ae21..9188ab06c 100644
--- a/examples/device/msc_dual_lun/CMakeLists.txt
+++ b/examples/device/msc_dual_lun/CMakeLists.txt
@@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
\ No newline at end of file
+family_configure_device_example(${PROJECT})
diff --git a/examples/device/msc_dual_lun/skip.txt b/examples/device/msc_dual_lun/skip.txt
index 3549c702a..47e561cf0 100644
--- a/examples/device/msc_dual_lun/skip.txt
+++ b/examples/device/msc_dual_lun/skip.txt
@@ -1,2 +1,2 @@
 mcu:SAMD11
-mcu:MKL25ZXX
\ No newline at end of file
+mcu:MKL25ZXX
diff --git a/examples/device/msc_dual_lun/src/main.c b/examples/device/msc_dual_lun/src/main.c
index 96790d20c..0a7284939 100644
--- a/examples/device/msc_dual_lun/src/main.c
+++ b/examples/device/msc_dual_lun/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/msc_dual_lun/src/msc_disk_dual.c b/examples/device/msc_dual_lun/src/msc_disk_dual.c
index 2b773b43b..b1047acdb 100644
--- a/examples/device/msc_dual_lun/src/msc_disk_dual.c
+++ b/examples/device/msc_dual_lun/src/msc_disk_dual.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/msc_dual_lun/src/usb_descriptors.c b/examples/device/msc_dual_lun/src/usb_descriptors.c
index d8dbb5ce3..2de81111c 100644
--- a/examples/device/msc_dual_lun/src/usb_descriptors.c
+++ b/examples/device/msc_dual_lun/src/usb_descriptors.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/net_lwip_webserver/CMakeLists.txt b/examples/device/net_lwip_webserver/CMakeLists.txt
index 9fe1a325e..5f1e37931 100644
--- a/examples/device/net_lwip_webserver/CMakeLists.txt
+++ b/examples/device/net_lwip_webserver/CMakeLists.txt
@@ -80,4 +80,4 @@ if (EXISTS ${TOP}/lib/lwip/src)
     # Configure compilation flags and libraries for the example... see the corresponding function
     # in hw/bsp/FAMILY/family.cmake for details.
     family_configure_device_example(${PROJECT})
-endif()
\ No newline at end of file
+endif()
diff --git a/examples/device/net_lwip_webserver/skip.txt b/examples/device/net_lwip_webserver/skip.txt
index 68761b058..b0e5235ac 100644
--- a/examples/device/net_lwip_webserver/skip.txt
+++ b/examples/device/net_lwip_webserver/skip.txt
@@ -7,4 +7,4 @@ mcu:STM32L0
 mcu:MKL25ZXX
 family:broadcom_64bit
 family:broadcom_32bit
-board:curiosity_nano
\ No newline at end of file
+board:curiosity_nano
diff --git a/examples/device/net_lwip_webserver/src/arch/cc.h b/examples/device/net_lwip_webserver/src/arch/cc.h
index 56a0cacf7..9f30b91cb 100644
--- a/examples/device/net_lwip_webserver/src/arch/cc.h
+++ b/examples/device/net_lwip_webserver/src/arch/cc.h
@@ -1,8 +1,8 @@
 /*
  * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
- * All rights reserved. 
- * 
- * Redistribution and use in source and binary forms, with or without modification, 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
  * are permitted provided that the following conditions are met:
  *
  * 1. Redistributions of source code must retain the above copyright notice,
@@ -11,21 +11,21 @@
  *    this list of conditions and the following disclaimer in the documentation
  *    and/or other materials provided with the distribution.
  * 3. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission. 
+ *    derived from this software without specific prior written permission.
  *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT 
- * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT 
- * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 
- * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  * OF SUCH DAMAGE.
  *
  * This file is part of the lwIP TCP/IP stack.
- * 
+ *
  * Author: Adam Dunkels <adam@sics.se>
  *
  */
@@ -42,7 +42,7 @@ typedef int sys_prot_t;
 #if defined (__ICCARM__)
 
 #define PACK_STRUCT_BEGIN
-#define PACK_STRUCT_STRUCT 
+#define PACK_STRUCT_STRUCT
 #define PACK_STRUCT_END
 #define PACK_STRUCT_FIELD(x) x
 #define PACK_STRUCT_USE_INCLUDES
@@ -50,7 +50,7 @@ typedef int sys_prot_t;
 #elif defined (__CC_ARM)
 
 #define PACK_STRUCT_BEGIN __packed
-#define PACK_STRUCT_STRUCT 
+#define PACK_STRUCT_STRUCT
 #define PACK_STRUCT_END
 #define PACK_STRUCT_FIELD(x) x
 
diff --git a/examples/device/net_lwip_webserver/src/lwipopts.h b/examples/device/net_lwip_webserver/src/lwipopts.h
index a215017c7..336c9243d 100644
--- a/examples/device/net_lwip_webserver/src/lwipopts.h
+++ b/examples/device/net_lwip_webserver/src/lwipopts.h
@@ -1,8 +1,8 @@
 /*
  * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
- * All rights reserved. 
- * 
- * Redistribution and use in source and binary forms, with or without modification, 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
  * are permitted provided that the following conditions are met:
  *
  * 1. Redistributions of source code must retain the above copyright notice,
@@ -11,21 +11,21 @@
  *    this list of conditions and the following disclaimer in the documentation
  *    and/or other materials provided with the distribution.
  * 3. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission. 
+ *    derived from this software without specific prior written permission.
  *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT 
- * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT 
- * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 
- * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  * OF SUCH DAMAGE.
  *
  * This file is part of the lwIP TCP/IP stack.
- * 
+ *
  * Author: Simon Goldschmidt
  *
  */
diff --git a/examples/device/net_lwip_webserver/src/main.c b/examples/device/net_lwip_webserver/src/main.c
index 33b4d38b6..88081ffe2 100644
--- a/examples/device/net_lwip_webserver/src/main.c
+++ b/examples/device/net_lwip_webserver/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 Peter Lawrence
@@ -39,7 +39,7 @@ and likely their manufacturer has not tested such functionality.  Some code work
 The smartphone may only have an ECM driver, but refuse to automatically pick ECM (unlike the OSes above);
 try modifying ./examples/devices/net_lwip_webserver/usb_descriptors.c so that CONFIG_ID_ECM is default.
 
-The smartphone may be artificially picky about which Ethernet MAC address to recognize; if this happens, 
+The smartphone may be artificially picky about which Ethernet MAC address to recognize; if this happens,
 try changing the first byte of tud_network_mac_address[] below from 0x02 to 0x00 (clearing bit 1).
 */
 
@@ -170,7 +170,7 @@ bool dns_query_proc(const char *name, ip4_addr_t *addr)
 
 bool tud_network_recv_cb(const uint8_t *src, uint16_t size)
 {
-  /* this shouldn't happen, but if we get another packet before 
+  /* this shouldn't happen, but if we get another packet before
   parsing the previous, we must signal our inability to accept it */
   if (received_frame) return false;
 
diff --git a/examples/device/net_lwip_webserver/src/usb_descriptors.c b/examples/device/net_lwip_webserver/src/usb_descriptors.c
index bee51790a..3c0ed3db7 100644
--- a/examples/device/net_lwip_webserver/src/usb_descriptors.c
+++ b/examples/device/net_lwip_webserver/src/usb_descriptors.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -77,7 +77,7 @@ tusb_desc_device_t const desc_device =
     .bDeviceClass       = TUSB_CLASS_MISC,
     .bDeviceSubClass    = MISC_SUBCLASS_COMMON,
     .bDeviceProtocol    = MISC_PROTOCOL_IAD,
-    
+
     .bMaxPacketSize0    = CFG_TUD_ENDPOINT0_SIZE,
 
     .idVendor           = 0xCafe,
diff --git a/examples/device/uac2_headset/CMakeLists.txt b/examples/device/uac2_headset/CMakeLists.txt
index abc4d91da..acaa54198 100644
--- a/examples/device/uac2_headset/CMakeLists.txt
+++ b/examples/device/uac2_headset/CMakeLists.txt
@@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
\ No newline at end of file
+family_configure_device_example(${PROJECT})
diff --git a/examples/device/uac2_headset/src/main.c b/examples/device/uac2_headset/src/main.c
index 01707d51b..bafd40d34 100644
--- a/examples/device/uac2_headset/src/main.c
+++ b/examples/device/uac2_headset/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 Jerzy Kasenberg
@@ -176,7 +176,7 @@ static bool tud_audio_clock_get_request(uint8_t rhport, audio_control_request_t
         rangef.subrange[i].bRes = 0;
         TU_LOG1("Range %d (%d, %d, %d)\r\n", i, (int)rangef.subrange[i].bMin, (int)rangef.subrange[i].bMax, (int)rangef.subrange[i].bRes);
       }
-      
+
       return tud_audio_buffer_and_schedule_control_xfer(rhport, (tusb_control_request_t const *)request, &rangef, sizeof(rangef));
     }
   }
diff --git a/examples/device/uac2_headset/src/usb_descriptors.c b/examples/device/uac2_headset/src/usb_descriptors.c
index 07c86b903..0a0b4c602 100644
--- a/examples/device/uac2_headset/src/usb_descriptors.c
+++ b/examples/device/uac2_headset/src/usb_descriptors.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 Ha Thach (tinyusb.org)
diff --git a/examples/device/uac2_headset/src/usb_descriptors.h b/examples/device/uac2_headset/src/usb_descriptors.h
index 342b4fac1..5525c916a 100644
--- a/examples/device/uac2_headset/src/usb_descriptors.h
+++ b/examples/device/uac2_headset/src/usb_descriptors.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 Jerzy Kasenbreg
diff --git a/examples/device/usbtmc/CMakeLists.txt b/examples/device/usbtmc/CMakeLists.txt
index c49603c26..b4678dc5e 100644
--- a/examples/device/usbtmc/CMakeLists.txt
+++ b/examples/device/usbtmc/CMakeLists.txt
@@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
\ No newline at end of file
+family_configure_device_example(${PROJECT})
diff --git a/examples/device/usbtmc/src/main.c b/examples/device/usbtmc/src/main.c
index 6945d8743..da7f0418a 100644
--- a/examples/device/usbtmc/src/main.c
+++ b/examples/device/usbtmc/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/usbtmc/visaQuery.py b/examples/device/usbtmc/visaQuery.py
index c4e5ad2b9..ca65daf97 100644
--- a/examples/device/usbtmc/visaQuery.py
+++ b/examples/device/usbtmc/visaQuery.py
@@ -36,8 +36,8 @@ def test_trig():
 	time.sleep(0.3) # SRQ may have some delay
 	assert (inst.read_stb() & 0x40), "SRQ not set after 0.3 seconds"
 	assert (inst.read_stb() == 0)
-	
-	
+
+
 def test_mav():
 	inst.write("delay 50")
 	inst.read_stb() # clear STB
@@ -45,15 +45,15 @@ def test_mav():
 	inst.write("123")
 	time.sleep(0.3)
 	assert (inst.read_stb() & 0x10), "MAV not set after 0.5 seconds"
-	
+
 	rsp = inst.read()
 	assert(rsp == "123\r\n")
-	
-	
+
+
 def test_srq():
 	assert (inst.read_stb() == 0)
 	inst.write("123")
-	
+
 	#inst.enable_event(pyvisa.constants.VI_EVENT_SERVICE_REQ, pyvisa.constants.VI_QUEUE)
 	#waitrsp = inst.wait_on_event(pyvisa.constants.VI_EVENT_SERVICE_REQ, 5000)
 	#inst.discard_events(pyvisa.constants.VI_EVENT_SERVICE_REQ, pyvisa.constants.VI_QUEUE)
@@ -64,7 +64,7 @@ def test_srq():
 	assert (stb == 0x50),msg
 
 	assert (inst.read_stb() == 0x10), "SRQ set at second read!"
-	
+
 	rsp = inst.read()
 	assert(rsp == "123\r\n")
 
@@ -110,7 +110,7 @@ def test_abort_in():
 	inst.timeout = 800
 	y = inst.read()
 	assert(y == "xxx\r\n")
-	
+
 def test_indicate():
 	# perform indicator pulse
 	usb_iface = inst.get_visa_attribute(pyvisa.constants.VI_ATTR_USB_INTFC_NUM)
@@ -120,8 +120,8 @@ def test_indicate():
 		assert(retv == b'\x01')
 	else:
 		assert((retv[1] == pyvisa.constants.StatusCode(0)) and (retv[0] == b'\x01')), f"indicator pulse failed: retv={retv}"
-	
-	
+
+
 def test_multi_read():
 	old_chunk_size = inst.chunk_size
 	longstr = "0123456789abcdefghijklmnopqrstuvwxyz" * 10
@@ -133,7 +133,7 @@ def test_multi_read():
 	y = inst.read()
 	assert (x + "\r\n" == y)
 	#inst.chunk_size = old_chunk_size
-	
+
 def test_stall_ep0():
 	usb_iface = inst.get_visa_attribute(pyvisa.constants.VI_ATTR_USB_INTFC_NUM)
 	inst.read_stb()
@@ -143,7 +143,7 @@ def test_stall_ep0():
 		assert(False)
 	except pyvisa.VisaIOError:
 		pass
-	
+
 	assert (inst.read_stb() == 0)
 
 
@@ -153,7 +153,7 @@ print(reslist)
 
 if (len(reslist) == 0):
     sys.exit()
-	
+
 inst = rm.open_resource(reslist[0]);
 inst.timeout = 3000
 
diff --git a/examples/device/video_capture/CMakeLists.txt b/examples/device/video_capture/CMakeLists.txt
index b92a2b804..f1ef247e1 100644
--- a/examples/device/video_capture/CMakeLists.txt
+++ b/examples/device/video_capture/CMakeLists.txt
@@ -31,4 +31,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
\ No newline at end of file
+family_configure_device_example(${PROJECT})
diff --git a/examples/device/video_capture/src/main.c b/examples/device/video_capture/src/main.c
index 3ceebe821..08db1b00f 100644
--- a/examples/device/video_capture/src/main.c
+++ b/examples/device/video_capture/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/video_capture/src/usb_descriptors.c b/examples/device/video_capture/src/usb_descriptors.c
index 0cf772010..af18d15d1 100644
--- a/examples/device/video_capture/src/usb_descriptors.c
+++ b/examples/device/video_capture/src/usb_descriptors.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/video_capture/src/usb_descriptors.h b/examples/device/video_capture/src/usb_descriptors.h
index f1ed3c8e9..93f148a82 100644
--- a/examples/device/video_capture/src/usb_descriptors.h
+++ b/examples/device/video_capture/src/usb_descriptors.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 Jerzy Kasenbreg
diff --git a/examples/device/webusb_serial/CMakeLists.txt b/examples/device/webusb_serial/CMakeLists.txt
index abc4d91da..acaa54198 100644
--- a/examples/device/webusb_serial/CMakeLists.txt
+++ b/examples/device/webusb_serial/CMakeLists.txt
@@ -25,4 +25,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
\ No newline at end of file
+family_configure_device_example(${PROJECT})
diff --git a/examples/device/webusb_serial/src/main.c b/examples/device/webusb_serial/src/main.c
index 604d30a83..24456f9f3 100644
--- a/examples/device/webusb_serial/src/main.c
+++ b/examples/device/webusb_serial/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/webusb_serial/src/usb_descriptors.c b/examples/device/webusb_serial/src/usb_descriptors.c
index 99f5caaf9..b2593001c 100644
--- a/examples/device/webusb_serial/src/usb_descriptors.c
+++ b/examples/device/webusb_serial/src/usb_descriptors.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/device/webusb_serial/src/usb_descriptors.h b/examples/device/webusb_serial/src/usb_descriptors.h
index 19f1ff3f3..a1c4a2cf1 100644
--- a/examples/device/webusb_serial/src/usb_descriptors.h
+++ b/examples/device/webusb_serial/src/usb_descriptors.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/dual/host_hid_to_device_cdc/src/main.c b/examples/dual/host_hid_to_device_cdc/src/main.c
index bd7870274..817c63c70 100644
--- a/examples/dual/host_hid_to_device_cdc/src/main.c
+++ b/examples/dual/host_hid_to_device_cdc/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c b/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c
index 6b0a89127..63b6bc603 100644
--- a/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c
+++ b/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/host/bare_api/src/main.c b/examples/host/bare_api/src/main.c
index 51cab2de0..bb7fa850e 100644
--- a/examples/host/bare_api/src/main.c
+++ b/examples/host/bare_api/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/host/cdc_msc_hid/src/main.c b/examples/host/cdc_msc_hid/src/main.c
index b34810252..23312296f 100644
--- a/examples/host/cdc_msc_hid/src/main.c
+++ b/examples/host/cdc_msc_hid/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/host/cdc_msc_hid/src/msc_app.c b/examples/host/cdc_msc_hid/src/msc_app.c
index 797d55f8a..e9c9676b8 100644
--- a/examples/host/cdc_msc_hid/src/msc_app.c
+++ b/examples/host/cdc_msc_hid/src/msc_app.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -68,4 +68,3 @@ void tuh_msc_umount_cb(uint8_t dev_addr)
   (void) dev_addr;
   printf("A MassStorage device is unmounted\r\n");
 }
-
diff --git a/examples/host/hid_controller/src/main.c b/examples/host/hid_controller/src/main.c
index 299a3ff10..3380e9246 100644
--- a/examples/host/hid_controller/src/main.c
+++ b/examples/host/hid_controller/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/host/msc_file_explorer/src/main.c b/examples/host/msc_file_explorer/src/main.c
index ab2cfd498..40c88a7d3 100644
--- a/examples/host/msc_file_explorer/src/main.c
+++ b/examples/host/msc_file_explorer/src/main.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/host/msc_file_explorer/src/msc_app.c b/examples/host/msc_file_explorer/src/msc_app.c
index eef28fe12..003e2865b 100644
--- a/examples/host/msc_file_explorer/src/msc_app.c
+++ b/examples/host/msc_file_explorer/src/msc_app.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/examples/rules.mk b/examples/rules.mk
index f8e4001ec..56ad89fd0 100644
--- a/examples/rules.mk
+++ b/examples/rules.mk
@@ -283,4 +283,4 @@ copy-artifact: $(BIN)
 # Print out the value of a make variable.
 # https://stackoverflow.com/questions/16467718/how-to-print-out-a-variable-in-makefile
 print-%:
-	@echo $* = $($*)
\ No newline at end of file
+	@echo $* = $($*)
diff --git a/hw/bsp/ansi_escape.h b/hw/bsp/ansi_escape.h
index 6e62ee20a..15af2f3ab 100644
--- a/hw/bsp/ansi_escape.h
+++ b/hw/bsp/ansi_escape.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/board.c b/hw/bsp/board.c
index 14858c2b6..e715bdf2e 100644
--- a/hw/bsp/board.c
+++ b/hw/bsp/board.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2018, hathach (tinyusb.org)
diff --git a/hw/bsp/board.h b/hw/bsp/board.h
index 0a10294d0..036556731 100644
--- a/hw/bsp/board.h
+++ b/hw/bsp/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.h b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.h
index 1d3565d5c..84a106346 100644
--- a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.h
+++ b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk
index 52e9e45c4..77811d18d 100644
--- a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk
+++ b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk
@@ -2,4 +2,4 @@ CFLAGS += -mcpu=arm1176jzf-s \
           -DBCM_VERSION=2835 \
           -DCFG_TUSB_MCU=OPT_MCU_BCM2835
 
-SUFFIX = 
+SUFFIX =
diff --git a/hw/bsp/broadcom_32bit/family.c b/hw/bsp/broadcom_32bit/family.c
index f7a11fb49..42ad4b666 100644
--- a/hw/bsp/broadcom_32bit/family.c
+++ b/hw/bsp/broadcom_32bit/family.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/broadcom_64bit/boards/raspberrypi_cm4/board.h b/hw/bsp/broadcom_64bit/boards/raspberrypi_cm4/board.h
index 1d3565d5c..84a106346 100644
--- a/hw/bsp/broadcom_64bit/boards/raspberrypi_cm4/board.h
+++ b/hw/bsp/broadcom_64bit/boards/raspberrypi_cm4/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/broadcom_64bit/boards/raspberrypi_zero2w/board.h b/hw/bsp/broadcom_64bit/boards/raspberrypi_zero2w/board.h
index 1d3565d5c..84a106346 100644
--- a/hw/bsp/broadcom_64bit/boards/raspberrypi_zero2w/board.h
+++ b/hw/bsp/broadcom_64bit/boards/raspberrypi_zero2w/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/broadcom_64bit/family.c b/hw/bsp/broadcom_64bit/family.c
index f7a11fb49..42ad4b666 100644
--- a/hw/bsp/broadcom_64bit/family.c
+++ b/hw/bsp/broadcom_64bit/family.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/brtmm90x/family.c b/hw/bsp/brtmm90x/family.c
index 3b6b03904..f812c922f 100644
--- a/hw/bsp/brtmm90x/family.c
+++ b/hw/bsp/brtmm90x/family.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright 2021 Bridgetek Pte Ltd
@@ -70,7 +70,7 @@ void board_init(void)
     board_uart_write(WELCOME_MSG, sizeof(WELCOME_MSG));
 
 #ifdef BOARD_GPIO_LED
-    gpio_function(BOARD_GPIO_LED, pad_func_0); 
+    gpio_function(BOARD_GPIO_LED, pad_func_0);
     gpio_idrive(BOARD_GPIO_LED, pad_drive_12mA);
     gpio_dir(BOARD_GPIO_LED, pad_dir_output);
 #endif
@@ -233,7 +233,7 @@ int board_uart_write(void const *buf, int len)
 uint32_t board_millis(void)
 {
     uint32_t safe_ms;
-    
+
     CRITICAL_SECTION_BEGIN
     safe_ms = timer_ms;
     CRITICAL_SECTION_END
@@ -254,4 +254,3 @@ void chip_reboot(void)
  	dbg_memory_copy(0xfe, 0, 0, 255);
 #endif
 }
-
diff --git a/hw/bsp/brtmm90x/family.mk b/hw/bsp/brtmm90x/family.mk
index 0ddf47a3a..6df0bfdfe 100644
--- a/hw/bsp/brtmm90x/family.mk
+++ b/hw/bsp/brtmm90x/family.mk
@@ -5,7 +5,7 @@ SKIP_NANOLIB = 1
 # Set to use FT90X prebuilt libraries.
 FT9XX_PREBUILT_LIBS = 0
 ifeq ($(FT9XX_PREBUILT_LIBS),1)
-# If the FT90X toolchain is installed on Windows systems then the SDK 
+# If the FT90X toolchain is installed on Windows systems then the SDK
 # include files and prebuilt libraries are at: %FT90X_TOOLCHAIN%/hardware
 FT9XX_SDK = $(FT90X_TOOLCHAIN)/hardware
 INC += "$(FT9XX_SDK)/include"
@@ -21,7 +21,7 @@ endif
 
 # Add include files which are within the TinyUSB directory structure.
 INC += \
-	$(TOP)/$(BOARD_PATH) 
+	$(TOP)/$(BOARD_PATH)
 
 # Add required C Compiler flags for FT90X.
 CFLAGS += \
@@ -30,7 +30,7 @@ CFLAGS += \
 	-fvar-tracking-assignments \
 	-fmessage-length=0 \
 	-ffunction-sections \
-	-DCFG_TUSB_MCU=OPT_MCU_FT90X 
+	-DCFG_TUSB_MCU=OPT_MCU_FT90X
 
 # Maximum USB device speed supported by the board
 CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
@@ -45,7 +45,7 @@ LDFLAGS += $(addprefix -L,$(LDINC)) \
 	-Wl,-lc
 
 # Additional Source files for FT90X.
-SRC_C += src/portable/bridgetek/ft9xx/dcd_ft9xx.c 
+SRC_C += src/portable/bridgetek/ft9xx/dcd_ft9xx.c
 
 # Linker library.
 ifneq ($(FT9XX_PREBUILT_LIBS),1)
diff --git a/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/board.h b/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/board.h
index 0eab34916..7b488096e 100644
--- a/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/board.h
+++ b/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2023 Ha Thach (tinyusb.org) for Adafruit Industries
diff --git a/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/debug_uart.c b/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/debug_uart.c
index 45fc9e3aa..db3551ca7 100644
--- a/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/debug_uart.c
+++ b/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/debug_uart.c
@@ -36,7 +36,7 @@ static unsigned int tx_produce;
 static volatile unsigned int tx_consume;
 
 void USART1_IRQHandler(void) __attribute__((naked));
-void USART1_IRQHandler(void) { 
+void USART1_IRQHandler(void) {
       __asm volatile ("call USART1_IRQHandler_impl; mret");
 }
 
@@ -57,7 +57,7 @@ __attribute__((used)) void USART1_IRQHandler_impl(void)
 void uart_write(char c)
 {
 	unsigned int tx_produce_next = (tx_produce + 1) & UART_RINGBUFFER_MASK_TX;
-	
+
     NVIC_DisableIRQ(USART1_IRQn);
     if((tx_consume != tx_produce) || (USART_GetFlagStatus(USART1, USART_FLAG_TXE) == RESET)) {
 		tx_buf[tx_produce] = c;
diff --git a/hw/bsp/ch32v307/ch32v307.ld b/hw/bsp/ch32v307/ch32v307.ld
index af7c06615..55bd10cd0 100644
--- a/hw/bsp/ch32v307/ch32v307.ld
+++ b/hw/bsp/ch32v307/ch32v307.ld
@@ -41,7 +41,7 @@ SECTIONS
 		*(.glue_7t)
 		*(.gnu.linkonce.t.*)
 		. = ALIGN(4);
-	} >FLASH AT>FLASH 
+	} >FLASH AT>FLASH
 
 	.fini :
 	{
@@ -50,31 +50,31 @@ SECTIONS
 	} >FLASH AT>FLASH
 
 	PROVIDE( _etext = . );
-	PROVIDE( _eitcm = . );	
+	PROVIDE( _eitcm = . );
 
 	.preinit_array  :
 	{
 	  PROVIDE_HIDDEN (__preinit_array_start = .);
 	  KEEP (*(.preinit_array))
 	  PROVIDE_HIDDEN (__preinit_array_end = .);
-	} >FLASH AT>FLASH 
-	
+	} >FLASH AT>FLASH
+
 	.init_array     :
 	{
 	  PROVIDE_HIDDEN (__init_array_start = .);
 	  KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
 	  KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
 	  PROVIDE_HIDDEN (__init_array_end = .);
-	} >FLASH AT>FLASH 
-	
+	} >FLASH AT>FLASH
+
 	.fini_array     :
 	{
 	  PROVIDE_HIDDEN (__fini_array_start = .);
 	  KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
 	  KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
 	  PROVIDE_HIDDEN (__fini_array_end = .);
-	} >FLASH AT>FLASH 
-	
+	} >FLASH AT>FLASH
+
 	.ctors          :
 	{
 	  /* gcc uses crtbegin.o to find the start of
@@ -95,8 +95,8 @@ SECTIONS
 	  KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
 	  KEEP (*(SORT(.ctors.*)))
 	  KEEP (*(.ctors))
-	} >FLASH AT>FLASH 
-	
+	} >FLASH AT>FLASH
+
 	.dtors          :
 	{
 	  KEEP (*crtbegin.o(.dtors))
@@ -104,17 +104,17 @@ SECTIONS
 	  KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
 	  KEEP (*(SORT(.dtors.*)))
 	  KEEP (*(.dtors))
-	} >FLASH AT>FLASH 
+	} >FLASH AT>FLASH
 
 	.dalign :
 	{
 		. = ALIGN(4);
 		PROVIDE(_data_vma = .);
-	} >RAM AT>FLASH	
+	} >RAM AT>FLASH
 
 	.dlalign :
 	{
-		. = ALIGN(4); 
+		. = ALIGN(4);
 		PROVIDE(_data_lma = .);
 	} >FLASH AT>FLASH
 
@@ -145,7 +145,7 @@ SECTIONS
   	    *(.sbss*)
         *(.gnu.linkonce.sb.*)
 		*(.bss*)
-     	*(.gnu.linkonce.b.*)		
+     	*(.gnu.linkonce.b.*)
 		*(COMMON*)
 		. = ALIGN(4);
 		PROVIDE( _ebss = .);
@@ -156,15 +156,12 @@ SECTIONS
 
     .stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size :
     {
-        PROVIDE( _heap_end = . );    
+        PROVIDE( _heap_end = . );
         . = ALIGN(4);
         PROVIDE(_susrstack = . );
         . = . + __stack_size;
         PROVIDE( _eusrstack = .);
         __freertos_irq_stack_top = .;
-    } >RAM 
+    } >RAM
 
 }
-
-
-
diff --git a/hw/bsp/ch32v307/ch32v30x_conf.h b/hw/bsp/ch32v307/ch32v30x_conf.h
index 399feaf68..0b86ad390 100644
--- a/hw/bsp/ch32v307/ch32v30x_conf.h
+++ b/hw/bsp/ch32v307/ch32v30x_conf.h
@@ -6,7 +6,7 @@
 * Description        : Library configuration file.
 * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
 * SPDX-License-Identifier: Apache-2.0
-*******************************************************************************/ 
+*******************************************************************************/
 #ifndef __CH32V30x_CONF_H
 #define __CH32V30x_CONF_H
 
@@ -36,8 +36,3 @@
 
 
 #endif /* __CH32V30x_CONF_H */
-
-
-	
-	
-	
diff --git a/hw/bsp/ch32v307/ch32v30x_it.c b/hw/bsp/ch32v307/ch32v30x_it.c
index d348dd989..c329c5613 100644
--- a/hw/bsp/ch32v307/ch32v30x_it.c
+++ b/hw/bsp/ch32v307/ch32v30x_it.c
@@ -45,5 +45,3 @@ __attribute__((used)) void HardFault_Handler_impl(void)
   {
   }
 }
-
-
diff --git a/hw/bsp/ch32v307/ch32v30x_it.h b/hw/bsp/ch32v307/ch32v30x_it.h
index 42f285edf..f3977a8be 100644
--- a/hw/bsp/ch32v307/ch32v30x_it.h
+++ b/hw/bsp/ch32v307/ch32v30x_it.h
@@ -14,5 +14,3 @@
 
 
 #endif /* __CH32V30x_IT_H */
-
-
diff --git a/hw/bsp/ch32v307/core_riscv.h b/hw/bsp/ch32v307/core_riscv.h
index 2e94ec683..a7ce10a00 100644
--- a/hw/bsp/ch32v307/core_riscv.h
+++ b/hw/bsp/ch32v307/core_riscv.h
@@ -336,7 +336,7 @@ RV_STATIC_INLINE void NVIC_SystemReset(void)
 }
 
 
-/* Core_Exported_Functions */  
+/* Core_Exported_Functions */
 extern uint32_t __get_FFLAGS(void);
 extern void __set_FFLAGS(uint32_t value);
 extern uint32_t __get_FRM(void);
@@ -377,8 +377,3 @@ extern uint32_t __get_SP(void);
 
 
 #endif
-
-
-
-
-
diff --git a/hw/bsp/ch32v307/system_ch32v30x.c b/hw/bsp/ch32v307/system_ch32v30x.c
index 12b18d7b8..23f783df4 100644
--- a/hw/bsp/ch32v307/system_ch32v30x.c
+++ b/hw/bsp/ch32v307/system_ch32v30x.c
@@ -8,17 +8,17 @@
 * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
 * SPDX-License-Identifier: Apache-2.0
 *********************************************************************************/
-#include "ch32v30x.h" 
+#include "ch32v30x.h"
 
-/* 
-* Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after 
+/*
+* Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after
 * reset the HSI is used as SYSCLK source).
-* If none of the define below is enabled, the HSI is used as System clock source. 
+* If none of the define below is enabled, the HSI is used as System clock source.
 */
 // #define SYSCLK_FREQ_HSE    HSE_VALUE
-/* #define SYSCLK_FREQ_24MHz  24000000  */ 
+/* #define SYSCLK_FREQ_24MHz  24000000  */
 //#define SYSCLK_FREQ_48MHz  48000000
-/* #define SYSCLK_FREQ_56MHz  56000000  */  
+/* #define SYSCLK_FREQ_56MHz  56000000  */
 //#define SYSCLK_FREQ_72MHz  72000000
 //#define SYSCLK_FREQ_96MHz  96000000
 //#define SYSCLK_FREQ_120MHz  120000000
@@ -60,7 +60,7 @@ static void SetSysClock(void);
 #elif defined SYSCLK_FREQ_48MHz
   static void SetSysClockTo48(void);
 #elif defined SYSCLK_FREQ_56MHz
-  static void SetSysClockTo56(void);  
+  static void SetSysClockTo56(void);
 #elif defined SYSCLK_FREQ_72MHz
   static void SetSysClockTo72(void);
 
@@ -90,7 +90,7 @@ void SystemInit (void)
   RCC->CFGR0 &= (uint32_t)0xF8FF0000;
 #else
   RCC->CFGR0 &= (uint32_t)0xF0FF0000;
-#endif 
+#endif
 
   RCC->CTLR &= (uint32_t)0xFEF6FFFF;
   RCC->CTLR &= (uint32_t)0xFFFBFFFF;
@@ -101,8 +101,8 @@ void SystemInit (void)
   RCC->INTR = 0x00FF0000;
   RCC->CFGR2 = 0x00000000;
 #else
-  RCC->INTR = 0x009F0000;   
-#endif   
+  RCC->INTR = 0x009F0000;
+#endif
   SetSysClock();
 }
 
@@ -118,18 +118,18 @@ void SystemCoreClockUpdate (void)
   uint32_t tmp = 0, pllmull = 0, pllsource = 0, Pll_6_5 = 0;
 
   tmp = RCC->CFGR0 & RCC_SWS;
-  
+
   switch (tmp)
   {
     case 0x00:
       SystemCoreClock = HSI_VALUE;
       break;
-    case 0x04:  
+    case 0x04:
       SystemCoreClock = HSE_VALUE;
       break;
-    case 0x08: 
+    case 0x08:
       pllmull = RCC->CFGR0 & RCC_PLLMULL;
-      pllsource = RCC->CFGR0 & RCC_PLLSRC; 
+      pllsource = RCC->CFGR0 & RCC_PLLSRC;
       pllmull = ( pllmull >> 18) + 2;
 
 #ifdef CH32V30x_D8
@@ -149,7 +149,7 @@ void SystemCoreClockUpdate (void)
         SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
       }
       else
-      {    
+      {
         if ((RCC->CFGR0 & RCC_PLLXTPRE) != (uint32_t)RESET)
         {
           SystemCoreClock = (HSE_VALUE >> 1) * pllmull;
@@ -167,9 +167,9 @@ void SystemCoreClockUpdate (void)
       SystemCoreClock = HSI_VALUE;
       break;
   }
- 
+
   tmp = AHBPrescTable[((RCC->CFGR0 & RCC_HPRE) >> 4)];
-  SystemCoreClock >>= tmp;  
+  SystemCoreClock >>= tmp;
 }
 
 /*********************************************************************
@@ -188,7 +188,7 @@ static void SetSysClock(void)
 #elif defined SYSCLK_FREQ_48MHz
   SetSysClockTo48();
 #elif defined SYSCLK_FREQ_56MHz
-  SetSysClockTo56();  
+  SetSysClockTo56();
 #elif defined SYSCLK_FREQ_72MHz
   SetSysClockTo72();
 #elif defined SYSCLK_FREQ_96MHz
@@ -199,9 +199,9 @@ static void SetSysClock(void)
   SetSysClockTo144();
 
 #endif
- 
+
  /* If none of the define above is enabled, the HSI is used as System clock
-  * source (default after reset) 
+  * source (default after reset)
     */
 }
 
@@ -218,14 +218,14 @@ static void SetSysClock(void)
 static void SetSysClockToHSE(void)
 {
   __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-   
+
   RCC->CTLR |= ((uint32_t)RCC_HSEON);
- 
+
   /* Wait till HSE is ready and if Time out is reached exit */
   do
   {
     HSEStatus = RCC->CTLR & RCC_HSERDY;
-    StartUpCounter++;  
+    StartUpCounter++;
   } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
 
   if ((RCC->CTLR & RCC_HSERDY) != RESET)
@@ -235,20 +235,20 @@ static void SetSysClockToHSE(void)
   else
   {
     HSEStatus = (uint32_t)0x00;
-  }  
+  }
 
   if (HSEStatus == (uint32_t)0x01)
   {
     /* HCLK = SYSCLK */
-    RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;      
+    RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
     /* PCLK2 = HCLK */
     RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
     /* PCLK1 = HCLK */
     RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV1;
-    
+
     /* Select HSE as system clock source */
     RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
-    RCC->CFGR0 |= (uint32_t)RCC_SW_HSE;    
+    RCC->CFGR0 |= (uint32_t)RCC_SW_HSE;
 
     /* Wait till HSE is used as system clock source */
     while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x04)
@@ -256,11 +256,11 @@ static void SetSysClockToHSE(void)
     }
   }
   else
-  { 
+  {
         /* If HSE fails to start-up, the application will have wrong clock
-     * configuration. User can add here some code to deal with this error 
+     * configuration. User can add here some code to deal with this error
          */
-  }  
+  }
 }
 
 #elif defined SYSCLK_FREQ_24MHz
@@ -275,14 +275,14 @@ static void SetSysClockToHSE(void)
 static void SetSysClockTo24(void)
 {
   __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-     
+
   RCC->CTLR |= ((uint32_t)RCC_HSEON);
- 
+
   /* Wait till HSE is ready and if Time out is reached exit */
   do
   {
     HSEStatus = RCC->CTLR & RCC_HSERDY;
-    StartUpCounter++;  
+    StartUpCounter++;
   } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
 
   if ((RCC->CTLR & RCC_HSERDY) != RESET)
@@ -292,13 +292,13 @@ static void SetSysClockTo24(void)
   else
   {
     HSEStatus = (uint32_t)0x00;
-  }  
+  }
   if (HSEStatus == (uint32_t)0x01)
   {
     /* HCLK = SYSCLK */
-    RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;   
+    RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
     /* PCLK2 = HCLK */
-    RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; 
+    RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
     /* PCLK1 = HCLK */
     RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV1;
 
@@ -318,18 +318,18 @@ static void SetSysClockTo24(void)
     }
     /* Select PLL as system clock source */
     RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
-    RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;    
+    RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
     /* Wait till PLL is used as system clock source */
     while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
     {
     }
   }
   else
-  { 
+  {
         /* If HSE fails to start-up, the application will have wrong clock
-     * configuration. User can add here some code to deal with this error 
+     * configuration. User can add here some code to deal with this error
          */
-  } 
+  }
 }
 
 #elif defined SYSCLK_FREQ_48MHz
@@ -344,14 +344,14 @@ static void SetSysClockTo24(void)
 static void SetSysClockTo48(void)
 {
   __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-     
-   
+
+
   RCC->CTLR |= ((uint32_t)RCC_HSEON);
   /* Wait till HSE is ready and if Time out is reached exit */
   do
   {
     HSEStatus = RCC->CTLR & RCC_HSERDY;
-    StartUpCounter++;  
+    StartUpCounter++;
   } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
 
   if ((RCC->CTLR & RCC_HSERDY) != RESET)
@@ -361,14 +361,14 @@ static void SetSysClockTo48(void)
   else
   {
     HSEStatus = (uint32_t)0x00;
-  }  
+  }
 
   if (HSEStatus == (uint32_t)0x01)
   {
     /* HCLK = SYSCLK */
-    RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;    
+    RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
     /* PCLK2 = HCLK */
-    RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;  
+    RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
     /* PCLK1 = HCLK */
     RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
 
@@ -389,19 +389,19 @@ static void SetSysClockTo48(void)
     }
     /* Select PLL as system clock source */
     RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
-    RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;    
+    RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
     /* Wait till PLL is used as system clock source */
     while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
     {
     }
   }
   else
-  { 
+  {
         /*
          * If HSE fails to start-up, the application will have wrong clock
-     * configuration. User can add here some code to deal with this error 
+     * configuration. User can add here some code to deal with this error
          */
-  } 
+  }
 }
 
 #elif defined SYSCLK_FREQ_56MHz
@@ -416,14 +416,14 @@ static void SetSysClockTo48(void)
 static void SetSysClockTo56(void)
 {
   __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-     
+
   RCC->CTLR |= ((uint32_t)RCC_HSEON);
 
   /* Wait till HSE is ready and if Time out is reached exit */
   do
   {
     HSEStatus = RCC->CTLR & RCC_HSERDY;
-    StartUpCounter++;  
+    StartUpCounter++;
   } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
 
   if ((RCC->CTLR & RCC_HSERDY) != RESET)
@@ -433,17 +433,17 @@ static void SetSysClockTo56(void)
   else
   {
     HSEStatus = (uint32_t)0x00;
-  }  
+  }
 
   if (HSEStatus == (uint32_t)0x01)
   {
     /* HCLK = SYSCLK */
-    RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;   
+    RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
     /* PCLK2 = HCLK */
     RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
     /* PCLK1 = HCLK */
     RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
-  
+
     /* PLL configuration: PLLCLK = HSE * 7 = 56 MHz */
     RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE | RCC_PLLMULL));
 
@@ -462,19 +462,19 @@ static void SetSysClockTo56(void)
 
     /* Select PLL as system clock source */
     RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
-    RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;    
+    RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
     /* Wait till PLL is used as system clock source */
     while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
     {
     }
   }
   else
-  { 
+  {
         /*
          * If HSE fails to start-up, the application will have wrong clock
-     * configuration. User can add here some code to deal with this error 
+     * configuration. User can add here some code to deal with this error
          */
-  } 
+  }
 }
 
 #elif defined SYSCLK_FREQ_72MHz
@@ -489,14 +489,14 @@ static void SetSysClockTo56(void)
 static void SetSysClockTo72(void)
 {
   __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-     
+
   RCC->CTLR |= ((uint32_t)RCC_HSEON);
- 
+
   /* Wait till HSE is ready and if Time out is reached exit */
   do
   {
     HSEStatus = RCC->CTLR & RCC_HSERDY;
-    StartUpCounter++;  
+    StartUpCounter++;
   } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
 
   if ((RCC->CTLR & RCC_HSERDY) != RESET)
@@ -506,17 +506,17 @@ static void SetSysClockTo72(void)
   else
   {
     HSEStatus = (uint32_t)0x00;
-  }  
+  }
 
   if (HSEStatus == (uint32_t)0x01)
   {
     /* HCLK = SYSCLK */
-    RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; 
+    RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1;
     /* PCLK2 = HCLK */
-    RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1; 
+    RCC->CFGR0 |= (uint32_t)RCC_PPRE2_DIV1;
     /* PCLK1 = HCLK */
     RCC->CFGR0 |= (uint32_t)RCC_PPRE1_DIV2;
- 
+
     /* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */
     RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_PLLSRC | RCC_PLLXTPRE |
                                         RCC_PLLMULL));
@@ -532,20 +532,20 @@ static void SetSysClockTo72(void)
     /* Wait till PLL is ready */
     while((RCC->CTLR & RCC_PLLRDY) == 0)
     {
-    }    
+    }
     /* Select PLL as system clock source */
     RCC->CFGR0 &= (uint32_t)((uint32_t)~(RCC_SW));
-    RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;    
+    RCC->CFGR0 |= (uint32_t)RCC_SW_PLL;
     /* Wait till PLL is used as system clock source */
     while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08)
     {
     }
   }
   else
-  { 
+  {
         /*
          * If HSE fails to start-up, the application will have wrong clock
-     * configuration. User can add here some code to deal with this error 
+     * configuration. User can add here some code to deal with this error
          */
   }
 }
diff --git a/hw/bsp/ch32v307/system_ch32v30x.h b/hw/bsp/ch32v307/system_ch32v30x.h
index 0e0ef4e51..ad81058c7 100644
--- a/hw/bsp/ch32v307/system_ch32v30x.h
+++ b/hw/bsp/ch32v307/system_ch32v30x.h
@@ -7,16 +7,16 @@
 * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
 * SPDX-License-Identifier: Apache-2.0
 *******************************************************************************/
-#ifndef __SYSTEM_CH32V30x_H 
+#ifndef __SYSTEM_CH32V30x_H
 #define __SYSTEM_CH32V30x_H
 
 #ifdef __cplusplus
  extern "C" {
-#endif 
+#endif
 
 extern uint32_t SystemCoreClock;          /* System Clock Frequency (Core Clock) */
 
-/* System_Exported_Functions */  
+/* System_Exported_Functions */
 extern void SystemInit(void);
 extern void SystemCoreClockUpdate(void);
 
@@ -25,6 +25,3 @@ extern void SystemCoreClockUpdate(void);
 #endif
 
 #endif /*__CH32V30x_SYSTEM_H */
-
-
-
diff --git a/hw/bsp/da14695_dk_usb/da14695_dk_usb.c b/hw/bsp/da14695_dk_usb/da14695_dk_usb.c
index a4d996810..3abb488f2 100644
--- a/hw/bsp/da14695_dk_usb/da14695_dk_usb.c
+++ b/hw/bsp/da14695_dk_usb/da14695_dk_usb.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 Jerzy Kasenberg
diff --git a/hw/bsp/da14695_dk_usb/da1469x.ld b/hw/bsp/da14695_dk_usb/da1469x.ld
index 96507d6e7..8cc1d9d99 100644
--- a/hw/bsp/da14695_dk_usb/da1469x.ld
+++ b/hw/bsp/da14695_dk_usb/da1469x.ld
@@ -242,4 +242,3 @@ SECTIONS
     /* Check that intvect is at the beginning of RAM */
     ASSERT(__intvect_start__ == ORIGIN(RAM), "intvect is not at beginning of RAM")
 }
-
diff --git a/hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c b/hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c
index 13113fb95..abe7f54cb 100644
--- a/hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c
+++ b/hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 Jerzy Kasenberg
diff --git a/hw/bsp/da1469x_dk_pro/da1469x.ld b/hw/bsp/da1469x_dk_pro/da1469x.ld
index 96507d6e7..8cc1d9d99 100644
--- a/hw/bsp/da1469x_dk_pro/da1469x.ld
+++ b/hw/bsp/da1469x_dk_pro/da1469x.ld
@@ -242,4 +242,3 @@ SECTIONS
     /* Check that intvect is at the beginning of RAM */
     ASSERT(__intvect_start__ == ORIGIN(RAM), "intvect is not at beginning of RAM")
 }
-
diff --git a/hw/bsp/ea4088qs/ea4088qs.c b/hw/bsp/ea4088qs/ea4088qs.c
index 7150ed393..ace72fef0 100644
--- a/hw/bsp/ea4088qs/ea4088qs.c
+++ b/hw/bsp/ea4088qs/ea4088qs.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/ea4088qs/lpc4088.ld b/hw/bsp/ea4088qs/lpc4088.ld
index 4b1cddd6e..5897707f6 100644
--- a/hw/bsp/ea4088qs/lpc4088.ld
+++ b/hw/bsp/ea4088qs/lpc4088.ld
@@ -11,24 +11,24 @@
 MEMORY
 {
   /* Define each memory region */
-  MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */  
-  RamLoc64 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x10000 /* 64K bytes (alias RAM) */  
-  RamPeriph32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */  
+  MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */
+  RamLoc64 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x10000 /* 64K bytes (alias RAM) */
+  RamPeriph32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */
 }
 
   /* Define a symbol for the top of each memory region */
-  __base_MFlash512 = 0x0  ; /* MFlash512 */  
-  __base_Flash = 0x0 ; /* Flash */  
-  __top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */  
-  __top_Flash = 0x0 + 0x80000 ; /* 512K bytes */  
-  __base_RamLoc64 = 0x10000000  ; /* RamLoc64 */  
-  __base_RAM = 0x10000000 ; /* RAM */  
-  __top_RamLoc64 = 0x10000000 + 0x10000 ; /* 64K bytes */  
-  __top_RAM = 0x10000000 + 0x10000 ; /* 64K bytes */  
-  __base_RamPeriph32 = 0x20000000  ; /* RamPeriph32 */  
-  __base_RAM2 = 0x20000000 ; /* RAM2 */  
-  __top_RamPeriph32 = 0x20000000 + 0x8000 ; /* 32K bytes */  
-  __top_RAM2 = 0x20000000 + 0x8000 ; /* 32K bytes */  
+  __base_MFlash512 = 0x0  ; /* MFlash512 */
+  __base_Flash = 0x0 ; /* Flash */
+  __top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */
+  __top_Flash = 0x0 + 0x80000 ; /* 512K bytes */
+  __base_RamLoc64 = 0x10000000  ; /* RamLoc64 */
+  __base_RAM = 0x10000000 ; /* RAM */
+  __top_RamLoc64 = 0x10000000 + 0x10000 ; /* 64K bytes */
+  __top_RAM = 0x10000000 + 0x10000 ; /* 64K bytes */
+  __base_RamPeriph32 = 0x20000000  ; /* RamPeriph32 */
+  __base_RAM2 = 0x20000000 ; /* RAM2 */
+  __top_RamPeriph32 = 0x20000000 + 0x8000 ; /* 32K bytes */
+  __top_RAM2 = 0x20000000 + 0x8000 ; /* 32K bytes */
 
 ENTRY(ResetISR)
 
@@ -72,9 +72,9 @@ SECTIONS
     } > MFlash512
     /*
      * for exception handling/unwind - some Newlib functions (in common
-     * with C++ and STDC++) use this. 
+     * with C++ and STDC++) use this.
      */
-    .ARM.extab : ALIGN(4) 
+    .ARM.extab : ALIGN(4)
     {
         *(.ARM.extab* .gnu.linkonce.armextab.*)
     } > MFlash512
@@ -88,7 +88,7 @@ SECTIONS
     __exidx_end = .;
 
     _etext = .;
-        
+
     /* DATA section for RamPeriph32 */
 
     .data_RAM2 : ALIGN(4)
@@ -130,7 +130,7 @@ SECTIONS
        *(.bss.$RamPeriph32*)
        . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
        PROVIDE(__end_bss_RAM2 = .) ;
-    } > RamPeriph32 
+    } > RamPeriph32
 
     /* MAIN BSS SECTION */
     .bss : ALIGN(4)
@@ -149,13 +149,13 @@ SECTIONS
        *(.noinit.$RAM2*)
        *(.noinit.$RamPeriph32*)
        . = ALIGN(4) ;
-    } > RamPeriph32 
+    } > RamPeriph32
 
     /* DEFAULT NOINIT SECTION */
     .noinit (NOLOAD): ALIGN(4)
     {
         _noinit = .;
-        *(.noinit*) 
+        *(.noinit*)
          . = ALIGN(4) ;
         _end_noinit = .;
     } > RamLoc64
@@ -163,11 +163,11 @@ SECTIONS
     PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc64 - 0);
 
     /* ## Create checksum value (used in startup) ## */
-    PROVIDE(__valid_user_code_checksum = 0 - 
-                                         (_vStackTop 
-                                         + (ResetISR + 1) 
-                                         + (NMI_Handler + 1) 
-                                         + (HardFault_Handler + 1) 
+    PROVIDE(__valid_user_code_checksum = 0 -
+                                         (_vStackTop
+                                         + (ResetISR + 1)
+                                         + (NMI_Handler + 1)
+                                         + (HardFault_Handler + 1)
                                          + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)   /* MemManage_Handler may not be defined */
                                          + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)     /* BusFault_Handler may not be defined */
                                          + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
@@ -181,4 +181,4 @@ SECTIONS
     _image_start = LOADADDR(.text);
     _image_end = LOADADDR(.data) + SIZEOF(.data);
     _image_size = _image_end - _image_start;
-}
\ No newline at end of file
+}
diff --git a/hw/bsp/ea4357/ea4357.c b/hw/bsp/ea4357/ea4357.c
index f88d3b89e..68bcaa123 100644
--- a/hw/bsp/ea4357/ea4357.c
+++ b/hw/bsp/ea4357/ea4357.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/ea4357/lpc4357.ld b/hw/bsp/ea4357/lpc4357.ld
index 14a0df328..e3dfbfda1 100644
--- a/hw/bsp/ea4357/lpc4357.ld
+++ b/hw/bsp/ea4357/lpc4357.ld
@@ -11,44 +11,44 @@
 MEMORY
 {
   /* Define each memory region */
-  MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */  
-  MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */  
-  RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */  
-  RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */  
-  RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */  
-  RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */  
-  RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */  
+  MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */
+  MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */
+  RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */
+  RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */
+  RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */
+  RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */
+  RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */
 }
 
   /* Define a symbol for the top of each memory region */
-  __base_MFlashA512 = 0x1a000000  ; /* MFlashA512 */  
-  __base_Flash = 0x1a000000 ; /* Flash */  
-  __top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */  
-  __top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */  
-  __base_MFlashB512 = 0x1b000000  ; /* MFlashB512 */  
-  __base_Flash2 = 0x1b000000 ; /* Flash2 */  
-  __top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */  
-  __top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */  
-  __base_RamLoc32 = 0x10000000  ; /* RamLoc32 */  
-  __base_RAM = 0x10000000 ; /* RAM */  
-  __top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */  
-  __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */  
-  __base_RamLoc40 = 0x10080000  ; /* RamLoc40 */  
-  __base_RAM2 = 0x10080000 ; /* RAM2 */  
-  __top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */  
-  __top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */  
-  __base_RamAHB32 = 0x20000000  ; /* RamAHB32 */  
-  __base_RAM3 = 0x20000000 ; /* RAM3 */  
-  __top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */  
-  __top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */  
-  __base_RamAHB16 = 0x20008000  ; /* RamAHB16 */  
-  __base_RAM4 = 0x20008000 ; /* RAM4 */  
-  __top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */  
-  __top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */  
-  __base_RamAHB_ETB16 = 0x2000c000  ; /* RamAHB_ETB16 */  
-  __base_RAM5 = 0x2000c000 ; /* RAM5 */  
-  __top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */  
-  __top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */  
+  __base_MFlashA512 = 0x1a000000  ; /* MFlashA512 */
+  __base_Flash = 0x1a000000 ; /* Flash */
+  __top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */
+  __top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */
+  __base_MFlashB512 = 0x1b000000  ; /* MFlashB512 */
+  __base_Flash2 = 0x1b000000 ; /* Flash2 */
+  __top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */
+  __top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */
+  __base_RamLoc32 = 0x10000000  ; /* RamLoc32 */
+  __base_RAM = 0x10000000 ; /* RAM */
+  __top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */
+  __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
+  __base_RamLoc40 = 0x10080000  ; /* RamLoc40 */
+  __base_RAM2 = 0x10080000 ; /* RAM2 */
+  __top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */
+  __top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */
+  __base_RamAHB32 = 0x20000000  ; /* RamAHB32 */
+  __base_RAM3 = 0x20000000 ; /* RAM3 */
+  __top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */
+  __top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */
+  __base_RamAHB16 = 0x20008000  ; /* RamAHB16 */
+  __base_RAM4 = 0x20008000 ; /* RAM4 */
+  __top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */
+  __top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */
+  __base_RamAHB_ETB16 = 0x2000c000  ; /* RamAHB_ETB16 */
+  __base_RAM5 = 0x2000c000 ; /* RAM5 */
+  __top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */
+  __top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */
 
 
 ENTRY(ResetISR)
@@ -119,9 +119,9 @@ SECTIONS
     } > MFlashA512
     /*
      * for exception handling/unwind - some Newlib functions (in common
-     * with C++ and STDC++) use this. 
+     * with C++ and STDC++) use this.
      */
-    .ARM.extab : ALIGN(4) 
+    .ARM.extab : ALIGN(4)
     {
         *(.ARM.extab* .gnu.linkonce.armextab.*)
     } > MFlashA512
@@ -135,7 +135,7 @@ SECTIONS
     __exidx_end = .;
 
     _etext = .;
-        
+
     /* DATA section for RamLoc40 */
 
     .data_RAM2 : ALIGN(4)
@@ -216,7 +216,7 @@ SECTIONS
        *(.bss.$RamLoc40*)
        . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
        PROVIDE(__end_bss_RAM2 = .) ;
-    } > RamLoc40 
+    } > RamLoc40
 
     /* BSS section for RamAHB32 */
     .bss_RAM3 : ALIGN(4)
@@ -226,7 +226,7 @@ SECTIONS
        *(.bss.$RamAHB32*)
        . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
        PROVIDE(__end_bss_RAM3 = .) ;
-    } > RamAHB32 
+    } > RamAHB32
 
     /* BSS section for RamAHB16 */
     .bss_RAM4 : ALIGN(4)
@@ -236,7 +236,7 @@ SECTIONS
        *(.bss.$RamAHB16*)
        . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
        PROVIDE(__end_bss_RAM4 = .) ;
-    } > RamAHB16 
+    } > RamAHB16
 
     /* BSS section for RamAHB_ETB16 */
     .bss_RAM5 : ALIGN(4)
@@ -246,7 +246,7 @@ SECTIONS
        *(.bss.$RamAHB_ETB16*)
        . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
        PROVIDE(__end_bss_RAM5 = .) ;
-    } > RamAHB_ETB16 
+    } > RamAHB_ETB16
 
     /* MAIN BSS SECTION */
     .bss : ALIGN(4)
@@ -265,7 +265,7 @@ SECTIONS
        *(.noinit.$RAM2*)
        *(.noinit.$RamLoc40*)
        . = ALIGN(4) ;
-    } > RamLoc40 
+    } > RamLoc40
 
     /* NOINIT section for RamAHB32 */
     .noinit_RAM3 (NOLOAD) : ALIGN(4)
@@ -273,7 +273,7 @@ SECTIONS
        *(.noinit.$RAM3*)
        *(.noinit.$RamAHB32*)
        . = ALIGN(4) ;
-    } > RamAHB32 
+    } > RamAHB32
 
     /* NOINIT section for RamAHB16 */
     .noinit_RAM4 (NOLOAD) : ALIGN(4)
@@ -281,7 +281,7 @@ SECTIONS
        *(.noinit.$RAM4*)
        *(.noinit.$RamAHB16*)
        . = ALIGN(4) ;
-    } > RamAHB16 
+    } > RamAHB16
 
     /* NOINIT section for RamAHB_ETB16 */
     .noinit_RAM5 (NOLOAD) : ALIGN(4)
@@ -289,13 +289,13 @@ SECTIONS
        *(.noinit.$RAM5*)
        *(.noinit.$RamAHB_ETB16*)
        . = ALIGN(4) ;
-    } > RamAHB_ETB16 
+    } > RamAHB_ETB16
 
     /* DEFAULT NOINIT SECTION */
     .noinit (NOLOAD): ALIGN(4)
     {
         _noinit = .;
-        *(.noinit*) 
+        *(.noinit*)
          . = ALIGN(4) ;
         _end_noinit = .;
     } > RamLoc32
@@ -303,11 +303,11 @@ SECTIONS
     PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);
 
     /* ## Create checksum value (used in startup) ## */
-    PROVIDE(__valid_user_code_checksum = 0 - 
-                                         (_vStackTop 
-                                         + (ResetISR + 1) 
-                                         + (NMI_Handler + 1) 
-                                         + (HardFault_Handler + 1) 
+    PROVIDE(__valid_user_code_checksum = 0 -
+                                         (_vStackTop
+                                         + (ResetISR + 1)
+                                         + (NMI_Handler + 1)
+                                         + (HardFault_Handler + 1)
                                          + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)   /* MemManage_Handler may not be defined */
                                          + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)     /* BusFault_Handler may not be defined */
                                          + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
@@ -321,4 +321,4 @@ SECTIONS
     _image_start = LOADADDR(.text);
     _image_end = LOADADDR(.data) + SIZEOF(.data);
     _image_size = _image_end - _image_start;
-}
\ No newline at end of file
+}
diff --git a/hw/bsp/ea4357/pca9532.c b/hw/bsp/ea4357/pca9532.c
index eae3805c2..150167cde 100644
--- a/hw/bsp/ea4357/pca9532.c
+++ b/hw/bsp/ea4357/pca9532.c
@@ -57,7 +57,7 @@ static uint16_t ledStateShadow = 0;
  * Local Functions
  *****************************************************************************/
 
-static Status I2CWrite(uint32_t addr, uint8_t* buf, uint32_t len) 
+static Status I2CWrite(uint32_t addr, uint8_t* buf, uint32_t len)
 {
 	I2CM_XFER_T i2cData;
 
@@ -75,7 +75,7 @@ static Status I2CWrite(uint32_t addr, uint8_t* buf, uint32_t len)
 	return SUCCESS;
 }
 
-static Status I2CRead(uint32_t addr, uint8_t* buf, uint32_t len) 
+static Status I2CRead(uint32_t addr, uint8_t* buf, uint32_t len)
 {
 	I2CM_XFER_T i2cData;
 
@@ -181,7 +181,7 @@ uint16_t pca9532_getLedState (uint32_t shadow)
          * A blinking LED may be reported as on or off depending on
          * its state when reading the Input register.
          */
-        
+
         buf[0] = PCA9532_INPUT0;
         I2CWrite(PCA9532_I2C_ADDR, buf, 1);
 
diff --git a/hw/bsp/ea4357/pca9532.h b/hw/bsp/ea4357/pca9532.h
index 7a7c6e145..f21c1ff09 100644
--- a/hw/bsp/ea4357/pca9532.h
+++ b/hw/bsp/ea4357/pca9532.h
@@ -48,7 +48,7 @@
 #define KEY_MASK 0x000F
 
 /*
- * MMC Card Detect and MMC Write Protect are mapped to LED4 
+ * MMC Card Detect and MMC Write Protect are mapped to LED4
  * and LED5 on the PCA9532. Please note that WP is active low.
  */
 
diff --git a/hw/bsp/esp32s2/boards/CMakeLists.txt b/hw/bsp/esp32s2/boards/CMakeLists.txt
index c3c687a70..ff90acbde 100644
--- a/hw/bsp/esp32s2/boards/CMakeLists.txt
+++ b/hw/bsp/esp32s2/boards/CMakeLists.txt
@@ -8,5 +8,5 @@ include("${BOARD}/board.cmake")
 
 target_include_directories(${COMPONENT_TARGET} PUBLIC
   "${TOP}/hw"
-  "${TOP}/src"  
+  "${TOP}/src"
 )
diff --git a/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.cmake b/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.cmake
index d33962676..e39ceb887 100644
--- a/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.cmake
+++ b/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.cmake
@@ -14,4 +14,4 @@ set(IDF_TARGET "esp32s2" FORCE)
 target_compile_options(${COMPONENT_TARGET} PUBLIC
   "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2"
   "-DCFG_TUSB_OS=OPT_OS_FREERTOS"
-)
\ No newline at end of file
+)
diff --git a/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.h b/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.h
index 43e00901d..1f8dc2cea 100644
--- a/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.h
+++ b/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.cmake b/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.cmake
index d33962676..e39ceb887 100644
--- a/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.cmake
+++ b/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.cmake
@@ -14,4 +14,4 @@ set(IDF_TARGET "esp32s2" FORCE)
 target_compile_options(${COMPONENT_TARGET} PUBLIC
   "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2"
   "-DCFG_TUSB_OS=OPT_OS_FREERTOS"
-)
\ No newline at end of file
+)
diff --git a/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.h b/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.h
index 16e30b685..084a7aaf2 100644
--- a/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.h
+++ b/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.cmake b/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.cmake
index d5c17b9be..16b0e9cdd 100644
--- a/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.cmake
+++ b/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.cmake
@@ -14,4 +14,4 @@ set(IDF_TARGET "esp32s2" FORCE)
 target_compile_options(${COMPONENT_TARGET} PUBLIC
   "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2"
   "-DCFG_TUSB_OS=OPT_OS_FREERTOS"
-)
\ No newline at end of file
+)
diff --git a/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.h b/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.h
index 49a2474bc..2ec80ef47 100644
--- a/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.h
+++ b/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/esp32s2/boards/esp32s2.c b/hw/bsp/esp32s2/boards/esp32s2.c
index a7ca82deb..015d8305b 100644
--- a/hw/bsp/esp32s2/boards/esp32s2.c
+++ b/hw/bsp/esp32s2/boards/esp32s2.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
@@ -150,4 +150,3 @@ int board_uart_write(void const * buf, int len)
   (void) buf; (void) len;
   return 0;
 }
-
diff --git a/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.cmake b/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.cmake
index d5c17b9be..16b0e9cdd 100644
--- a/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.cmake
+++ b/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.cmake
@@ -14,4 +14,4 @@ set(IDF_TARGET "esp32s2" FORCE)
 target_compile_options(${COMPONENT_TARGET} PUBLIC
   "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2"
   "-DCFG_TUSB_OS=OPT_OS_FREERTOS"
-)
\ No newline at end of file
+)
diff --git a/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.h b/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.h
index 6bb44f76d..0acb9c439 100644
--- a/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.h
+++ b/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/esp32s2/boards/espressif_saola_1/board.cmake b/hw/bsp/esp32s2/boards/espressif_saola_1/board.cmake
index d5c17b9be..16b0e9cdd 100644
--- a/hw/bsp/esp32s2/boards/espressif_saola_1/board.cmake
+++ b/hw/bsp/esp32s2/boards/espressif_saola_1/board.cmake
@@ -14,4 +14,4 @@ set(IDF_TARGET "esp32s2" FORCE)
 target_compile_options(${COMPONENT_TARGET} PUBLIC
   "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2"
   "-DCFG_TUSB_OS=OPT_OS_FREERTOS"
-)
\ No newline at end of file
+)
diff --git a/hw/bsp/esp32s2/boards/espressif_saola_1/board.h b/hw/bsp/esp32s2/boards/espressif_saola_1/board.h
index f450b9a8b..e068efef9 100644
--- a/hw/bsp/esp32s2/boards/espressif_saola_1/board.h
+++ b/hw/bsp/esp32s2/boards/espressif_saola_1/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/esp32s2/components/led_strip/CMakeLists.txt b/hw/bsp/esp32s2/components/led_strip/CMakeLists.txt
index 6d0fcbc86..8266c5a1c 100644
--- a/hw/bsp/esp32s2/components/led_strip/CMakeLists.txt
+++ b/hw/bsp/esp32s2/components/led_strip/CMakeLists.txt
@@ -5,4 +5,3 @@ idf_component_register(SRCS "${component_srcs}"
                        PRIV_INCLUDE_DIRS ""
                        PRIV_REQUIRES "driver"
                        REQUIRES "")
-
diff --git a/hw/bsp/esp32s2/family.cmake b/hw/bsp/esp32s2/family.cmake
index f3d41d041..0973adcac 100644
--- a/hw/bsp/esp32s2/family.cmake
+++ b/hw/bsp/esp32s2/family.cmake
@@ -1,7 +1,7 @@
 cmake_minimum_required(VERSION 3.5)
 
 # Add example src and bsp directories
-set(EXTRA_COMPONENT_DIRS "src" "${TOP}/hw/bsp/esp32s2/boards" "${TOP}/hw/bsp/esp32s2/components")  
+set(EXTRA_COMPONENT_DIRS "src" "${TOP}/hw/bsp/esp32s2/boards" "${TOP}/hw/bsp/esp32s2/components")
 include($ENV{IDF_PATH}/tools/cmake/project.cmake)
 set(SUPPORTED_TARGETS esp32s2)
 set(FAMILY_MCUS ESP32S2)
diff --git a/hw/bsp/esp32s2/family.mk b/hw/bsp/esp32s2/family.mk
index b95098e15..fba0f038b 100644
--- a/hw/bsp/esp32s2/family.mk
+++ b/hw/bsp/esp32s2/family.mk
@@ -21,4 +21,3 @@ UF2_FAMILY_ID = 0xbfdd4eee
 $(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).bin
 	@echo CREATE $@
 	$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -b 0x0 -c -o $@ $^
-
diff --git a/hw/bsp/esp32s3/boards/CMakeLists.txt b/hw/bsp/esp32s3/boards/CMakeLists.txt
index e1b921ae9..311c6e900 100644
--- a/hw/bsp/esp32s3/boards/CMakeLists.txt
+++ b/hw/bsp/esp32s3/boards/CMakeLists.txt
@@ -10,5 +10,5 @@ idf_component_get_property( FREERTOS_ORIG_INCLUDE_PATH freertos ORIG_INCLUDE_PAT
 target_include_directories(${COMPONENT_TARGET} PUBLIC
   "${FREERTOS_ORIG_INCLUDE_PATH}"
   "${TOP}/hw"
-  "${TOP}/src"  
+  "${TOP}/src"
 )
diff --git a/hw/bsp/esp32s3/boards/esp32s3.c b/hw/bsp/esp32s3/boards/esp32s3.c
index a7ca82deb..015d8305b 100644
--- a/hw/bsp/esp32s3/boards/esp32s3.c
+++ b/hw/bsp/esp32s3/boards/esp32s3.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
@@ -150,4 +150,3 @@ int board_uart_write(void const * buf, int len)
   (void) buf; (void) len;
   return 0;
 }
-
diff --git a/hw/bsp/esp32s3/boards/espressif_addax_1/board.cmake b/hw/bsp/esp32s3/boards/espressif_addax_1/board.cmake
index 8996ff9dc..2bff4f836 100644
--- a/hw/bsp/esp32s3/boards/espressif_addax_1/board.cmake
+++ b/hw/bsp/esp32s3/boards/espressif_addax_1/board.cmake
@@ -4,4 +4,4 @@ target_include_directories(${COMPONENT_LIB} PRIVATE .)
 target_compile_options(${COMPONENT_TARGET} PUBLIC
   "-DCFG_TUSB_MCU=OPT_MCU_ESP32S3"
   "-DCFG_TUSB_OS=OPT_OS_FREERTOS"
-)
\ No newline at end of file
+)
diff --git a/hw/bsp/esp32s3/boards/espressif_addax_1/board.h b/hw/bsp/esp32s3/boards/espressif_addax_1/board.h
index fff24ba44..d4690f732 100644
--- a/hw/bsp/esp32s3/boards/espressif_addax_1/board.h
+++ b/hw/bsp/esp32s3/boards/espressif_addax_1/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.cmake b/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.cmake
index 8996ff9dc..2bff4f836 100644
--- a/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.cmake
+++ b/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.cmake
@@ -4,4 +4,4 @@ target_include_directories(${COMPONENT_LIB} PRIVATE .)
 target_compile_options(${COMPONENT_TARGET} PUBLIC
   "-DCFG_TUSB_MCU=OPT_MCU_ESP32S3"
   "-DCFG_TUSB_OS=OPT_OS_FREERTOS"
-)
\ No newline at end of file
+)
diff --git a/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.h b/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.h
index c7940c56e..fe33b5c43 100644
--- a/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.h
+++ b/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.cmake b/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.cmake
index 8996ff9dc..2bff4f836 100644
--- a/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.cmake
+++ b/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.cmake
@@ -4,4 +4,4 @@ target_include_directories(${COMPONENT_LIB} PRIVATE .)
 target_compile_options(${COMPONENT_TARGET} PUBLIC
   "-DCFG_TUSB_MCU=OPT_MCU_ESP32S3"
   "-DCFG_TUSB_OS=OPT_OS_FREERTOS"
-)
\ No newline at end of file
+)
diff --git a/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.h b/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.h
index c7940c56e..fe33b5c43 100644
--- a/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.h
+++ b/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/esp32s3/components/led_strip/CMakeLists.txt b/hw/bsp/esp32s3/components/led_strip/CMakeLists.txt
index 6d0fcbc86..8266c5a1c 100644
--- a/hw/bsp/esp32s3/components/led_strip/CMakeLists.txt
+++ b/hw/bsp/esp32s3/components/led_strip/CMakeLists.txt
@@ -5,4 +5,3 @@ idf_component_register(SRCS "${component_srcs}"
                        PRIV_INCLUDE_DIRS ""
                        PRIV_REQUIRES "driver"
                        REQUIRES "")
-
diff --git a/hw/bsp/esp32s3/family.cmake b/hw/bsp/esp32s3/family.cmake
index 511dd58bb..0bcad035e 100644
--- a/hw/bsp/esp32s3/family.cmake
+++ b/hw/bsp/esp32s3/family.cmake
@@ -1,7 +1,7 @@
 cmake_minimum_required(VERSION 3.5)
 
 # Add example src and bsp directories
-set(EXTRA_COMPONENT_DIRS "src" "${TOP}/hw/bsp/esp32s3/boards" "${TOP}/hw/bsp/esp32s3/components")  
+set(EXTRA_COMPONENT_DIRS "src" "${TOP}/hw/bsp/esp32s3/boards" "${TOP}/hw/bsp/esp32s3/components")
 include($ENV{IDF_PATH}/tools/cmake/project.cmake)
 set(SUPPORTED_TARGETS esp32s3)
 set(FAMILY_MCUS ESP32S3)
diff --git a/hw/bsp/esp32s3/family.mk b/hw/bsp/esp32s3/family.mk
index cf153ffc2..d82a1c969 100644
--- a/hw/bsp/esp32s3/family.mk
+++ b/hw/bsp/esp32s3/family.mk
@@ -23,4 +23,3 @@ UF2_FAMILY_ID = 0xc47e5767
 $(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).bin
 	@echo CREATE $@
 	$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -b 0x0 -c -o $@ $^
-
diff --git a/hw/bsp/f1c100s/README.md b/hw/bsp/f1c100s/README.md
index 4aa1e153b..f7a863c34 100644
--- a/hw/bsp/f1c100s/README.md
+++ b/hw/bsp/f1c100s/README.md
@@ -17,4 +17,4 @@ Flash: `make BOARD=f1c100s flash` will write the image to SPI flash, and then re
 
 ## TODO
 
-* Add F1C100s to `#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT` high speed MCU check in examples (maybe we should extract the logic?)
\ No newline at end of file
+* Add F1C100s to `#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT` high speed MCU check in examples (maybe we should extract the logic?)
diff --git a/hw/bsp/f1c100s/board.h b/hw/bsp/f1c100s/board.h
index 238ac796d..0ef9a1700 100644
--- a/hw/bsp/f1c100s/board.h
+++ b/hw/bsp/f1c100s/board.h
@@ -1 +1 @@
-// Nothing valuable here
\ No newline at end of file
+// Nothing valuable here
diff --git a/hw/bsp/f1c100s/board.mk b/hw/bsp/f1c100s/board.mk
index 5fe26a9ea..9062483b0 100644
--- a/hw/bsp/f1c100s/board.mk
+++ b/hw/bsp/f1c100s/board.mk
@@ -32,7 +32,7 @@ SRC_C += \
 	$(MCU_DIR)/machine/sys-spi-flash.c \
 	$(MCU_DIR)/machine/f1c100s-intc.c \
 	$(MCU_DIR)/lib/malloc.c \
-	$(MCU_DIR)/lib/printf.c 
+	$(MCU_DIR)/lib/printf.c
 
 SRC_S += \
   $(MCU_DIR)/machine/start.S \
@@ -47,6 +47,6 @@ INC += \
 flash: flash-xfel
 
 exec: $(BUILD)/$(PROJECT).bin
-	xfel ddr 
+	xfel ddr
 	xfel write 0x80000000 $<
-	xfel exec 0x80000000
\ No newline at end of file
+	xfel exec 0x80000000
diff --git a/hw/bsp/f1c100s/f1c100s.c b/hw/bsp/f1c100s/f1c100s.c
index d45072ecb..5dcae33f7 100644
--- a/hw/bsp/f1c100s/f1c100s.c
+++ b/hw/bsp/f1c100s/f1c100s.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -125,6 +125,6 @@ static void timer_init(void) {
   f1c100s_intc_set_isr(F1C100S_IRQ_TIMER0, timer_handler);
   f1c100s_intc_enable_irq(F1C100S_IRQ_TIMER0);
 }
-#else 
+#else
 static void timer_init(void) { }
 #endif
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 601cd54f5..08bb20bc3 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -139,4 +139,4 @@ if (NOT TARGET _family_support_marker)
 
     # save it in case of re-inclusion
     set(FAMILY_MCUS ${FAMILY_MCUS} CACHE INTERNAL "")
-endif()
\ No newline at end of file
+endif()
diff --git a/hw/bsp/fomu/boards/fomu/board.mk b/hw/bsp/fomu/boards/fomu/board.mk
index 8ced11412..b5545c89a 100644
--- a/hw/bsp/fomu/boards/fomu/board.mk
+++ b/hw/bsp/fomu/boards/fomu/board.mk
@@ -1 +1 @@
-# place holder
\ No newline at end of file
+# place holder
diff --git a/hw/bsp/fomu/fomu.c b/hw/bsp/fomu/fomu.c
index 33c630303..e079e7c5b 100644
--- a/hw/bsp/fomu/fomu.c
+++ b/hw/bsp/fomu/fomu.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/fomu/include/hw/common.h b/hw/bsp/fomu/include/hw/common.h
index 6a97ca2e9..b902bc4f2 100644
--- a/hw/bsp/fomu/include/hw/common.h
+++ b/hw/bsp/fomu/include/hw/common.h
@@ -30,4 +30,4 @@ static inline uint32_t csr_readl(uint32_t addr)
 {
 	return *(volatile uint32_t *)addr;
 }
-#endif /* _HW_COMMON_H_ */
\ No newline at end of file
+#endif /* _HW_COMMON_H_ */
diff --git a/hw/bsp/fomu/include/irq.h b/hw/bsp/fomu/include/irq.h
index a82218907..dc96c228d 100644
--- a/hw/bsp/fomu/include/irq.h
+++ b/hw/bsp/fomu/include/irq.h
@@ -68,4 +68,4 @@ static inline unsigned int irq_pending(void)
 }
 #endif
 
-#endif /* __IRQ_H */
\ No newline at end of file
+#endif /* __IRQ_H */
diff --git a/hw/bsp/frdm_k32l2b/board.h b/hw/bsp/frdm_k32l2b/board.h
index 825367915..8d21fdcd4 100644
--- a/hw/bsp/frdm_k32l2b/board.h
+++ b/hw/bsp/frdm_k32l2b/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/frdm_k32l2b/frdm_k32l2b.c b/hw/bsp/frdm_k32l2b/frdm_k32l2b.c
index 924bb18e9..8d2b39500 100644
--- a/hw/bsp/frdm_k32l2b/frdm_k32l2b.c
+++ b/hw/bsp/frdm_k32l2b/frdm_k32l2b.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2018, hathach (tinyusb.org)
@@ -56,10 +56,10 @@ void board_init(void)
   gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 };
   GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config);
   const port_pin_config_t BUTTON_CFG = {
-    kPORT_PullUp, 
-    kPORT_FastSlewRate, 
-    kPORT_PassiveFilterDisable, 
-    kPORT_LowDriveStrength, 
+    kPORT_PullUp,
+    kPORT_FastSlewRate,
+    kPORT_PassiveFilterDisable,
+    kPORT_LowDriveStrength,
     kPORT_MuxAsGpio
   };
   PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG);
@@ -68,7 +68,7 @@ void board_init(void)
   PORT_SetPinMux(PORTA, 1U, kPORT_MuxAlt2);
   /* PORTA2 (pin 24) is configured as LPUART0_TX */
   PORT_SetPinMux(PORTA, 2U, kPORT_MuxAlt2);
-  
+
   SIM->SOPT5 = ((SIM->SOPT5 &
                /* Mask bits to zero which are setting */
                (~(SIM_SOPT5_LPUART0TXSRC_MASK | SIM_SOPT5_LPUART0RXSRC_MASK)))
diff --git a/hw/bsp/frdm_kl25z/frdm_kl25z.c b/hw/bsp/frdm_kl25z/frdm_kl25z.c
index 8d93fdbaa..46f85f6a5 100644
--- a/hw/bsp/frdm_kl25z/frdm_kl25z.c
+++ b/hw/bsp/frdm_kl25z/frdm_kl25z.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2018, hathach (tinyusb.org)
@@ -103,7 +103,7 @@ void board_init(void)
   // Button
   CLOCK_EnableClock(BUTTON_PIN_CLOCK);
   port_pin_config_t button_port = {
-    .pullSelect = kPORT_PullUp, 
+    .pullSelect = kPORT_PullUp,
     .mux = BUTTON_PIN_FUNCTION,
   };
   PORT_SetPinConfig(BUTTON_PIN_PORT, BUTTON_PIN, &button_port);
diff --git a/hw/bsp/gd32vf103/family.c b/hw/bsp/gd32vf103/family.c
index 60a326d27..113c4c304 100644
--- a/hw/bsp/gd32vf103/family.c
+++ b/hw/bsp/gd32vf103/family.c
@@ -44,7 +44,7 @@ void USBFS_IRQHandler(void) { tud_int_handler(0); }
 
 // According to GD32VF103 user manual clock tree:
 // Systick clock = AHB clock / 4.
-#define TIMER_TICKS         ((SystemCoreClock / 4) / 1000) 
+#define TIMER_TICKS         ((SystemCoreClock / 4) / 1000)
 
 #define BUTTON_PORT         GPIOA
 #define BUTTON_PIN          GPIO_PIN_0
diff --git a/hw/bsp/gd32vf103/system_gd32vf103.c b/hw/bsp/gd32vf103/system_gd32vf103.c
index c2001a980..200852abf 100644
--- a/hw/bsp/gd32vf103/system_gd32vf103.c
+++ b/hw/bsp/gd32vf103/system_gd32vf103.c
@@ -95,7 +95,7 @@ void SystemInit(void)
     /* reset the RCC clock configuration to the default reset state */
     /* enable IRC8M */
     RCU_CTL |= RCU_CTL_IRC8MEN;
-    
+
     /* reset SCS, AHBPSC, APB1PSC, APB2PSC, ADCPSC, CKOUT0SEL bits */
     RCU_CFG0 &= ~(RCU_CFG0_SCS | RCU_CFG0_AHBPSC | RCU_CFG0_APB1PSC | RCU_CFG0_APB2PSC |
                   RCU_CFG0_ADCPSC | RCU_CFG0_ADCPSC_2 | RCU_CFG0_CKOUT0SEL);
@@ -107,7 +107,7 @@ void SystemInit(void)
     RCU_CTL &= ~(RCU_CTL_HXTALBPS);
 
     /* reset PLLSEL, PREDV0_LSB, PLLMF, USBFSPSC bits */
-    
+
     RCU_CFG0 &= ~(RCU_CFG0_PLLSEL | RCU_CFG0_PREDV0_LSB | RCU_CFG0_PLLMF |
                   RCU_CFG0_USBFSPSC | RCU_CFG0_PLLMF_4);
     RCU_CFG1 = 0x00000000U;
@@ -141,12 +141,12 @@ void SystemCoreClockUpdate(void)
         case SEL_IRC8M:
             SystemCoreClock = IRC8M_VALUE;
             break;
-            
+
         /* HXTAL is selected as CK_SYS */
         case SEL_HXTAL:
             SystemCoreClock = HXTAL_VALUE;
             break;
-            
+
         /* PLL is selected as CK_SYS */
         case SEL_PLL:
             /* PLL clock source selection, HXTAL or IRC8M/2 */
@@ -313,7 +313,7 @@ static void system_clock_72m_hxtal(void)
     /* APB1 = AHB/2 */
     RCU_CFG0 |= RCU_APB1_CKAHB_DIV2;
 
-    /* CK_PLL = (CK_PREDIV0) * 18 = 72 MHz */ 
+    /* CK_PLL = (CK_PREDIV0) * 18 = 72 MHz */
     RCU_CFG0 &= ~(RCU_CFG0_PLLMF | RCU_CFG0_PLLMF_4);
     RCU_CFG0 |= (RCU_PLLSRC_HXTAL | RCU_PLL_MUL18);
 
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011/board.h b/hw/bsp/imxrt/boards/metro_m7_1011/board.h
index 7fa2f8541..3c172ebb9 100644
--- a/hw/bsp/imxrt/boards/metro_m7_1011/board.h
+++ b/hw/bsp/imxrt/boards/metro_m7_1011/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.ld b/hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.ld
index 30dd84373..960fc6891 100644
--- a/hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.ld
+++ b/hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.ld
@@ -35,7 +35,7 @@ MEMORY
 {
   m_flash_config        (RX)  : ORIGIN = 0x60000400, LENGTH = 0x00000C00
   m_ivt                 (RX)  : ORIGIN = 0x60001000, LENGTH = 0x00001000
-  
+
   m_interrupts          (RX)  : ORIGIN = 0x6000C000, LENGTH = 0x00000400
   m_text                (RX)  : ORIGIN = 0x6000C400, LENGTH = (8*1024*1024 - 0xC400)
   m_qacode              (RX)  : ORIGIN = 0x00000000, LENGTH = 0x00008000
diff --git a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.h b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.h
index 4f21b52fa..926f45618 100644
--- a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.h
+++ b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/imxrt/boards/mimxrt1015_evk/board.h b/hw/bsp/imxrt/boards/mimxrt1015_evk/board.h
index 932ce7fd7..10d9fad07 100644
--- a/hw/bsp/imxrt/boards/mimxrt1015_evk/board.h
+++ b/hw/bsp/imxrt/boards/mimxrt1015_evk/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/imxrt/boards/mimxrt1020_evk/board.h b/hw/bsp/imxrt/boards/mimxrt1020_evk/board.h
index 56ed5855b..284bb08e7 100644
--- a/hw/bsp/imxrt/boards/mimxrt1020_evk/board.h
+++ b/hw/bsp/imxrt/boards/mimxrt1020_evk/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/imxrt/boards/mimxrt1024_evk/board.h b/hw/bsp/imxrt/boards/mimxrt1024_evk/board.h
index 152c9ab18..9100072e2 100644
--- a/hw/bsp/imxrt/boards/mimxrt1024_evk/board.h
+++ b/hw/bsp/imxrt/boards/mimxrt1024_evk/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.h b/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.h
index 0472f608c..beb69bf2b 100644
--- a/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.h
+++ b/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/imxrt/boards/mimxrt1060_evk/board.h b/hw/bsp/imxrt/boards/mimxrt1060_evk/board.h
index 7fa37e33f..0f45f72e1 100644
--- a/hw/bsp/imxrt/boards/mimxrt1060_evk/board.h
+++ b/hw/bsp/imxrt/boards/mimxrt1060_evk/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/imxrt/boards/mimxrt1064_evk/board.h b/hw/bsp/imxrt/boards/mimxrt1064_evk/board.h
index 5f51e91a2..37ad94eef 100644
--- a/hw/bsp/imxrt/boards/mimxrt1064_evk/board.h
+++ b/hw/bsp/imxrt/boards/mimxrt1064_evk/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/imxrt/boards/teensy_40/board.h b/hw/bsp/imxrt/boards/teensy_40/board.h
index b3cc0a8c5..cac773442 100644
--- a/hw/bsp/imxrt/boards/teensy_40/board.h
+++ b/hw/bsp/imxrt/boards/teensy_40/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/imxrt/boards/teensy_40/board.mk b/hw/bsp/imxrt/boards/teensy_40/board.mk
index 0ad5ea5c0..45ca0fb6e 100644
--- a/hw/bsp/imxrt/boards/teensy_40/board.mk
+++ b/hw/bsp/imxrt/boards/teensy_40/board.mk
@@ -5,6 +5,6 @@ MCU_VARIANT = MIMXRT1062
 JLINK_DEVICE = MIMXRT1062xxx6A
 
 # flash by using teensy_loader_cli https://github.com/PaulStoffregen/teensy_loader_cli
-# Make sure it is in your PATH 
+# Make sure it is in your PATH
 flash: $(BUILD)/$(PROJECT).hex
 	teensy_loader_cli --mcu=imxrt1062 -v -w $<
diff --git a/hw/bsp/imxrt/boards/teensy_41/board.h b/hw/bsp/imxrt/boards/teensy_41/board.h
index b0b4931c7..72c18f540 100644
--- a/hw/bsp/imxrt/boards/teensy_41/board.h
+++ b/hw/bsp/imxrt/boards/teensy_41/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/imxrt/boards/teensy_41/board.mk b/hw/bsp/imxrt/boards/teensy_41/board.mk
index 0ad5ea5c0..45ca0fb6e 100644
--- a/hw/bsp/imxrt/boards/teensy_41/board.mk
+++ b/hw/bsp/imxrt/boards/teensy_41/board.mk
@@ -5,6 +5,6 @@ MCU_VARIANT = MIMXRT1062
 JLINK_DEVICE = MIMXRT1062xxx6A
 
 # flash by using teensy_loader_cli https://github.com/PaulStoffregen/teensy_loader_cli
-# Make sure it is in your PATH 
+# Make sure it is in your PATH
 flash: $(BUILD)/$(PROJECT).hex
 	teensy_loader_cli --mcu=imxrt1062 -v -w $<
diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c
index e28a6174a..5eb672c24 100644
--- a/hw/bsp/imxrt/family.c
+++ b/hw/bsp/imxrt/family.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2018, hathach (tinyusb.org)
diff --git a/hw/bsp/kuiic/K32L2B31xxxxA_flash.ld b/hw/bsp/kuiic/K32L2B31xxxxA_flash.ld
index 5420ffc00..f478a99c7 100644
--- a/hw/bsp/kuiic/K32L2B31xxxxA_flash.ld
+++ b/hw/bsp/kuiic/K32L2B31xxxxA_flash.ld
@@ -214,4 +214,3 @@ SECTIONS
 
   ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
 }
-
diff --git a/hw/bsp/kuiic/board.h b/hw/bsp/kuiic/board.h
index 78ad83a2e..1e2d4f18b 100644
--- a/hw/bsp/kuiic/board.h
+++ b/hw/bsp/kuiic/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/kuiic/kuiic.c b/hw/bsp/kuiic/kuiic.c
index 7aaa9e03c..97677d47a 100644
--- a/hw/bsp/kuiic/kuiic.c
+++ b/hw/bsp/kuiic/kuiic.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2018, hathach (tinyusb.org)
@@ -96,10 +96,10 @@ void board_init(void)
   CLOCK_EnableClock(kCLOCK_PortD);
   CLOCK_EnableClock(kCLOCK_PortE);
 
-  
+
   gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 1 };
   GPIO_PinInit(GPIOA, 1U, &led_config);
-  PORT_SetPinMux(PORTA, 1U, kPORT_MuxAsGpio);  
+  PORT_SetPinMux(PORTA, 1U, kPORT_MuxAsGpio);
   led_config.outputLogic = 0;
   GPIO_PinInit(GPIOA, 2U, &led_config);
   PORT_SetPinMux(PORTA, 2U, kPORT_MuxAsGpio);
@@ -108,10 +108,10 @@ void board_init(void)
   gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 };
   GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config);
   const port_pin_config_t BUTTON_CFG = {
-    kPORT_PullUp, 
-    kPORT_FastSlewRate, 
-    kPORT_PassiveFilterDisable, 
-    kPORT_LowDriveStrength, 
+    kPORT_PullUp,
+    kPORT_FastSlewRate,
+    kPORT_PassiveFilterDisable,
+    kPORT_LowDriveStrength,
     kPORT_MuxAsGpio
   };
   PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG);
@@ -121,7 +121,7 @@ void board_init(void)
   PORT_SetPinMux(PORTC, 3U, kPORT_MuxAlt3);
   /* PORTA2 (pin 24) is configured as LPUART0_TX */
   PORT_SetPinMux(PORTE, 0U, kPORT_MuxAlt3);
-  
+
   SIM->SOPT5 = ((SIM->SOPT5 &
                /* Mask bits to zero which are setting */
                (~(SIM_SOPT5_LPUART1TXSRC_MASK | SIM_SOPT5_LPUART1RXSRC_MASK)))
diff --git a/hw/bsp/lpc15/boards/lpcxpresso1549/lpc1549.ld b/hw/bsp/lpc15/boards/lpcxpresso1549/lpc1549.ld
index 6dd12ade1..d8079717e 100644
--- a/hw/bsp/lpc15/boards/lpcxpresso1549/lpc1549.ld
+++ b/hw/bsp/lpc15/boards/lpcxpresso1549/lpc1549.ld
@@ -13,29 +13,29 @@
 MEMORY
 {
   /* Define each memory region */
-  MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes (alias Flash) */  
-  Ram0_16 (rwx) : ORIGIN = 0x2000000, LENGTH = 0x4000 /* 16K bytes (alias RAM) */  
-  Ram1_16 (rwx) : ORIGIN = 0x2004000, LENGTH = 0x4000 /* 16K bytes (alias RAM2) */  
-  Ram2_4 (rwx) : ORIGIN = 0x2008000, LENGTH = 0x1000 /* 4K bytes (alias RAM3) */  
+  MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes (alias Flash) */
+  Ram0_16 (rwx) : ORIGIN = 0x2000000, LENGTH = 0x4000 /* 16K bytes (alias RAM) */
+  Ram1_16 (rwx) : ORIGIN = 0x2004000, LENGTH = 0x4000 /* 16K bytes (alias RAM2) */
+  Ram2_4 (rwx) : ORIGIN = 0x2008000, LENGTH = 0x1000 /* 4K bytes (alias RAM3) */
 }
 
   /* Define a symbol for the top of each memory region */
-  __base_MFlash256 = 0x0  ; /* MFlash256 */  
-  __base_Flash = 0x0 ; /* Flash */  
-  __top_MFlash256 = 0x0 + 0x40000 ; /* 256K bytes */  
-  __top_Flash = 0x0 + 0x40000 ; /* 256K bytes */  
-  __base_Ram0_16 = 0x2000000  ; /* Ram0_16 */  
-  __base_RAM = 0x2000000 ; /* RAM */  
-  __top_Ram0_16 = 0x2000000 + 0x4000 ; /* 16K bytes */  
-  __top_RAM = 0x2000000 + 0x4000 ; /* 16K bytes */  
-  __base_Ram1_16 = 0x2004000  ; /* Ram1_16 */  
-  __base_RAM2 = 0x2004000 ; /* RAM2 */  
-  __top_Ram1_16 = 0x2004000 + 0x4000 ; /* 16K bytes */  
-  __top_RAM2 = 0x2004000 + 0x4000 ; /* 16K bytes */  
-  __base_Ram2_4 = 0x2008000  ; /* Ram2_4 */  
-  __base_RAM3 = 0x2008000 ; /* RAM3 */  
-  __top_Ram2_4 = 0x2008000 + 0x1000 ; /* 4K bytes */  
-  __top_RAM3 = 0x2008000 + 0x1000 ; /* 4K bytes */  
+  __base_MFlash256 = 0x0  ; /* MFlash256 */
+  __base_Flash = 0x0 ; /* Flash */
+  __top_MFlash256 = 0x0 + 0x40000 ; /* 256K bytes */
+  __top_Flash = 0x0 + 0x40000 ; /* 256K bytes */
+  __base_Ram0_16 = 0x2000000  ; /* Ram0_16 */
+  __base_RAM = 0x2000000 ; /* RAM */
+  __top_Ram0_16 = 0x2000000 + 0x4000 ; /* 16K bytes */
+  __top_RAM = 0x2000000 + 0x4000 ; /* 16K bytes */
+  __base_Ram1_16 = 0x2004000  ; /* Ram1_16 */
+  __base_RAM2 = 0x2004000 ; /* RAM2 */
+  __top_Ram1_16 = 0x2004000 + 0x4000 ; /* 16K bytes */
+  __top_RAM2 = 0x2004000 + 0x4000 ; /* 16K bytes */
+  __base_Ram2_4 = 0x2008000  ; /* Ram2_4 */
+  __base_RAM3 = 0x2008000 ; /* RAM3 */
+  __top_Ram2_4 = 0x2008000 + 0x1000 ; /* 4K bytes */
+  __top_RAM3 = 0x2008000 + 0x1000 ; /* 4K bytes */
 
 ENTRY(ResetISR)
 
@@ -84,9 +84,9 @@ SECTIONS
     } > MFlash256
     /*
      * for exception handling/unwind - some Newlib functions (in common
-     * with C++ and STDC++) use this. 
+     * with C++ and STDC++) use this.
      */
-    .ARM.extab : ALIGN(4) 
+    .ARM.extab : ALIGN(4)
     {
         *(.ARM.extab* .gnu.linkonce.armextab.*)
     } > MFlash256
@@ -98,9 +98,9 @@ SECTIONS
         *(.ARM.exidx* .gnu.linkonce.armexidx.*)
     } > MFlash256
     __exidx_end = .;
- 
+
     _etext = .;
-        
+
     /* DATA section for Ram1_16 */
 
     .data_RAM2 : ALIGN(4)
@@ -225,11 +225,11 @@ SECTIONS
     PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_Ram0_16 - 0);
 
     /* ## Create checksum value (used in startup) ## */
-    PROVIDE(__valid_user_code_checksum = 0 - 
-                                         (_vStackTop 
-                                         + (ResetISR + 1) 
-                                         + (NMI_Handler + 1) 
-                                         + (HardFault_Handler + 1) 
+    PROVIDE(__valid_user_code_checksum = 0 -
+                                         (_vStackTop
+                                         + (ResetISR + 1)
+                                         + (NMI_Handler + 1)
+                                         + (HardFault_Handler + 1)
                                          + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)   /* MemManage_Handler may not be defined */
                                          + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)     /* BusFault_Handler may not be defined */
                                          + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
@@ -243,4 +243,4 @@ SECTIONS
     _image_start = LOADADDR(.text);
     _image_end = LOADADDR(.data) + SIZEOF(.data);
     _image_size = _image_end - _image_start;
-}
\ No newline at end of file
+}
diff --git a/hw/bsp/lpc15/family.c b/hw/bsp/lpc15/family.c
index 7f5984a3e..30a3e51e1 100644
--- a/hw/bsp/lpc15/family.c
+++ b/hw/bsp/lpc15/family.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/lpc18/boards/lpcxpresso18s37/lpc1837.ld b/hw/bsp/lpc18/boards/lpcxpresso18s37/lpc1837.ld
index 51fd1539d..f12c1760c 100644
--- a/hw/bsp/lpc18/boards/lpcxpresso18s37/lpc1837.ld
+++ b/hw/bsp/lpc18/boards/lpcxpresso18s37/lpc1837.ld
@@ -12,43 +12,43 @@
 MEMORY
 {
   /* Define each memory region */
-  MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */  
-  MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */  
-  RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */  
-  RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */  
-  RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */  
-  RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */  
-  RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */  
+  MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */
+  MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */
+  RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */
+  RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */
+  RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */
+  RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */
+  RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */
 }
 
 /* Define a symbol for the top of each memory region */
-__base_MFlashA512 = 0x1a000000  ; /* MFlashA512 */  
-__base_Flash = 0x1a000000 ; /* Flash */  
-__top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */  
-__top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */  
-__base_MFlashB512 = 0x1b000000  ; /* MFlashB512 */  
-__base_Flash2 = 0x1b000000 ; /* Flash2 */  
-__top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */  
-__top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */  
-__base_RamLoc32 = 0x10000000  ; /* RamLoc32 */  
-__base_RAM = 0x10000000 ; /* RAM */  
-__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */  
-__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */  
-__base_RamLoc40 = 0x10080000  ; /* RamLoc40 */  
-__base_RAM2 = 0x10080000 ; /* RAM2 */  
-__top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */  
-__top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */  
-__base_RamAHB32 = 0x20000000  ; /* RamAHB32 */  
-__base_RAM3 = 0x20000000 ; /* RAM3 */  
-__top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */  
-__top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */  
-__base_RamAHB16 = 0x20008000  ; /* RamAHB16 */  
-__base_RAM4 = 0x20008000 ; /* RAM4 */  
-__top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */  
-__top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */  
-__base_RamAHB_ETB16 = 0x2000c000  ; /* RamAHB_ETB16 */  
-__base_RAM5 = 0x2000c000 ; /* RAM5 */  
-__top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */  
+__base_MFlashA512 = 0x1a000000  ; /* MFlashA512 */
+__base_Flash = 0x1a000000 ; /* Flash */
+__top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */
+__top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */
+__base_MFlashB512 = 0x1b000000  ; /* MFlashB512 */
+__base_Flash2 = 0x1b000000 ; /* Flash2 */
+__top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */
+__top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */
+__base_RamLoc32 = 0x10000000  ; /* RamLoc32 */
+__base_RAM = 0x10000000 ; /* RAM */
+__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */
+__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
+__base_RamLoc40 = 0x10080000  ; /* RamLoc40 */
+__base_RAM2 = 0x10080000 ; /* RAM2 */
+__top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */
+__top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */
+__base_RamAHB32 = 0x20000000  ; /* RamAHB32 */
+__base_RAM3 = 0x20000000 ; /* RAM3 */
+__top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */
+__top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */
+__base_RamAHB16 = 0x20008000  ; /* RamAHB16 */
+__base_RAM4 = 0x20008000 ; /* RAM4 */
+__top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */
+__top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */
+__base_RamAHB_ETB16 = 0x2000c000  ; /* RamAHB_ETB16 */
+__base_RAM5 = 0x2000c000 ; /* RAM5 */
+__top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */
 __top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */
 
 ENTRY(ResetISR)
@@ -137,9 +137,9 @@ SECTIONS
         *(.ARM.exidx* .gnu.linkonce.armexidx.*)
         __exidx_end = .;
     } > MFlashA512
- 
+
     _etext = .;
-        
+
     /* DATA section for RamLoc40 */
 
     .data_RAM2 : ALIGN(4)
@@ -377,17 +377,17 @@ SECTIONS
          . = ALIGN(4) ;
         _end_noinit = .;
        PROVIDE(__end_noinit_RAM = .) ;
-       PROVIDE(__end_noinit_RamLoc32 = .) ;        
+       PROVIDE(__end_noinit_RamLoc32 = .) ;
     } > RamLoc32 AT> RamLoc32
     PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
     PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);
 
     /* ## Create checksum value (used in startup) ## */
-    PROVIDE(__valid_user_code_checksum = 0 - 
-                                         (_vStackTop 
-                                         + (ResetISR + 1) 
-                                         + (NMI_Handler + 1) 
-                                         + (HardFault_Handler + 1) 
+    PROVIDE(__valid_user_code_checksum = 0 -
+                                         (_vStackTop
+                                         + (ResetISR + 1)
+                                         + (NMI_Handler + 1)
+                                         + (HardFault_Handler + 1)
                                          + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)   /* MemManage_Handler may not be defined */
                                          + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)     /* BusFault_Handler may not be defined */
                                          + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
@@ -401,4 +401,4 @@ SECTIONS
     _image_start = LOADADDR(.text);
     _image_end = LOADADDR(.data) + SIZEOF(.data);
     _image_size = _image_end - _image_start;
-}
\ No newline at end of file
+}
diff --git a/hw/bsp/lpc18/boards/mcb1800/lpc1857.ld b/hw/bsp/lpc18/boards/mcb1800/lpc1857.ld
index 9a308e342..9a67e8946 100644
--- a/hw/bsp/lpc18/boards/mcb1800/lpc1857.ld
+++ b/hw/bsp/lpc18/boards/mcb1800/lpc1857.ld
@@ -11,44 +11,44 @@
 MEMORY
 {
   /* Define each memory region */
-  MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */  
-  MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */  
-  RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */  
-  RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */  
-  RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */  
-  RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */  
-  RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */  
+  MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */
+  MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */
+  RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */
+  RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */
+  RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */
+  RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */
+  RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */
 }
 
 /* Define a symbol for the top of each memory region */
-__base_MFlashA512 = 0x1a000000  ; /* MFlashA512 */  
-__base_Flash = 0x1a000000 ; /* Flash */  
-__top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */  
-__top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */  
-__base_MFlashB512 = 0x1b000000  ; /* MFlashB512 */  
-__base_Flash2 = 0x1b000000 ; /* Flash2 */  
-__top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */  
-__top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */  
-__base_RamLoc32 = 0x10000000  ; /* RamLoc32 */  
-__base_RAM = 0x10000000 ; /* RAM */  
-__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */  
-__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */  
-__base_RamLoc40 = 0x10080000  ; /* RamLoc40 */  
-__base_RAM2 = 0x10080000 ; /* RAM2 */  
-__top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */  
-__top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */  
-__base_RamAHB32 = 0x20000000  ; /* RamAHB32 */  
-__base_RAM3 = 0x20000000 ; /* RAM3 */  
-__top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */  
-__top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */  
-__base_RamAHB16 = 0x20008000  ; /* RamAHB16 */  
-__base_RAM4 = 0x20008000 ; /* RAM4 */  
-__top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */  
-__top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */  
-__base_RamAHB_ETB16 = 0x2000c000  ; /* RamAHB_ETB16 */  
-__base_RAM5 = 0x2000c000 ; /* RAM5 */  
-__top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */  
-__top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */  
+__base_MFlashA512 = 0x1a000000  ; /* MFlashA512 */
+__base_Flash = 0x1a000000 ; /* Flash */
+__top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */
+__top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */
+__base_MFlashB512 = 0x1b000000  ; /* MFlashB512 */
+__base_Flash2 = 0x1b000000 ; /* Flash2 */
+__top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */
+__top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */
+__base_RamLoc32 = 0x10000000  ; /* RamLoc32 */
+__base_RAM = 0x10000000 ; /* RAM */
+__top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */
+__top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
+__base_RamLoc40 = 0x10080000  ; /* RamLoc40 */
+__base_RAM2 = 0x10080000 ; /* RAM2 */
+__top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */
+__top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */
+__base_RamAHB32 = 0x20000000  ; /* RamAHB32 */
+__base_RAM3 = 0x20000000 ; /* RAM3 */
+__top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */
+__top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */
+__base_RamAHB16 = 0x20008000  ; /* RamAHB16 */
+__base_RAM4 = 0x20008000 ; /* RAM4 */
+__top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */
+__top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */
+__base_RamAHB_ETB16 = 0x2000c000  ; /* RamAHB_ETB16 */
+__base_RAM5 = 0x2000c000 ; /* RAM5 */
+__top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */
+__top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */
 
 ENTRY(ResetISR)
 
@@ -118,9 +118,9 @@ SECTIONS
     } > MFlashA512
     /*
      * for exception handling/unwind - some Newlib functions (in common
-     * with C++ and STDC++) use this. 
+     * with C++ and STDC++) use this.
      */
-    .ARM.extab : ALIGN(4) 
+    .ARM.extab : ALIGN(4)
     {
         *(.ARM.extab* .gnu.linkonce.armextab.*)
     } > MFlashA512
@@ -134,7 +134,7 @@ SECTIONS
     __exidx_end = .;
 
     _etext = .;
-        
+
     /* DATA section for RamLoc40 */
 
     .data_RAM2 : ALIGN(4)
@@ -215,7 +215,7 @@ SECTIONS
        *(.bss.$RamLoc40*)
        . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
        PROVIDE(__end_bss_RAM2 = .) ;
-    } > RamLoc40 
+    } > RamLoc40
 
     /* BSS section for RamAHB32 */
     .bss_RAM3 : ALIGN(4)
@@ -225,7 +225,7 @@ SECTIONS
        *(.bss.$RamAHB32*)
        . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
        PROVIDE(__end_bss_RAM3 = .) ;
-    } > RamAHB32 
+    } > RamAHB32
 
     /* BSS section for RamAHB16 */
     .bss_RAM4 : ALIGN(4)
@@ -235,7 +235,7 @@ SECTIONS
        *(.bss.$RamAHB16*)
        . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
        PROVIDE(__end_bss_RAM4 = .) ;
-    } > RamAHB16 
+    } > RamAHB16
 
     /* BSS section for RamAHB_ETB16 */
     .bss_RAM5 : ALIGN(4)
@@ -245,7 +245,7 @@ SECTIONS
        *(.bss.$RamAHB_ETB16*)
        . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
        PROVIDE(__end_bss_RAM5 = .) ;
-    } > RamAHB_ETB16 
+    } > RamAHB_ETB16
 
     /* MAIN BSS SECTION */
     .bss : ALIGN(4)
@@ -264,7 +264,7 @@ SECTIONS
        *(.noinit.$RAM2*)
        *(.noinit.$RamLoc40*)
        . = ALIGN(4) ;
-    } > RamLoc40 
+    } > RamLoc40
 
     /* NOINIT section for RamAHB32 */
     .noinit_RAM3 (NOLOAD) : ALIGN(4)
@@ -272,7 +272,7 @@ SECTIONS
        *(.noinit.$RAM3*)
        *(.noinit.$RamAHB32*)
        . = ALIGN(4) ;
-    } > RamAHB32 
+    } > RamAHB32
 
     /* NOINIT section for RamAHB16 */
     .noinit_RAM4 (NOLOAD) : ALIGN(4)
@@ -280,7 +280,7 @@ SECTIONS
        *(.noinit.$RAM4*)
        *(.noinit.$RamAHB16*)
        . = ALIGN(4) ;
-    } > RamAHB16 
+    } > RamAHB16
 
     /* NOINIT section for RamAHB_ETB16 */
     .noinit_RAM5 (NOLOAD) : ALIGN(4)
@@ -288,13 +288,13 @@ SECTIONS
        *(.noinit.$RAM5*)
        *(.noinit.$RamAHB_ETB16*)
        . = ALIGN(4) ;
-    } > RamAHB_ETB16 
+    } > RamAHB_ETB16
 
     /* DEFAULT NOINIT SECTION */
     .noinit (NOLOAD): ALIGN(4)
     {
         _noinit = .;
-        *(.noinit*) 
+        *(.noinit*)
          . = ALIGN(4) ;
         _end_noinit = .;
     } > RamLoc32
@@ -302,11 +302,11 @@ SECTIONS
     PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);
 
     /* ## Create checksum value (used in startup) ## */
-    PROVIDE(__valid_user_code_checksum = 0 - 
-                                         (_vStackTop 
-                                         + (ResetISR + 1) 
-                                         + (NMI_Handler + 1) 
-                                         + (HardFault_Handler + 1) 
+    PROVIDE(__valid_user_code_checksum = 0 -
+                                         (_vStackTop
+                                         + (ResetISR + 1)
+                                         + (NMI_Handler + 1)
+                                         + (HardFault_Handler + 1)
                                          + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)   /* MemManage_Handler may not be defined */
                                          + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)     /* BusFault_Handler may not be defined */
                                          + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
@@ -320,4 +320,4 @@ SECTIONS
     _image_start = LOADADDR(.text);
     _image_end = LOADADDR(.data) + SIZEOF(.data);
     _image_size = _image_end - _image_start;
-}
\ No newline at end of file
+}
diff --git a/hw/bsp/lpc18/family.c b/hw/bsp/lpc18/family.c
index 72c20e034..57f9d55da 100644
--- a/hw/bsp/lpc18/family.c
+++ b/hw/bsp/lpc18/family.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/lpc54/boards/lpcxpresso54628/board.mk b/hw/bsp/lpc54/boards/lpcxpresso54628/board.mk
index 925374cc8..5f15e2bbe 100644
--- a/hw/bsp/lpc54/boards/lpcxpresso54628/board.mk
+++ b/hw/bsp/lpc54/boards/lpcxpresso54628/board.mk
@@ -15,4 +15,4 @@ PYOCD_TARGET = LPC54628
 
 #flash: flash-pyocd
 
-flash: flash-jlink
\ No newline at end of file
+flash: flash-jlink
diff --git a/hw/bsp/lpc54/family.c b/hw/bsp/lpc54/family.c
index 621788948..fe9cfcc47 100644
--- a/hw/bsp/lpc54/family.c
+++ b/hw/bsp/lpc54/family.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2018, hathach (tinyusb.org)
diff --git a/hw/bsp/lpc55/boards/double_m33_express/LPC55S69_cm33_core0_uf2.ld b/hw/bsp/lpc55/boards/double_m33_express/LPC55S69_cm33_core0_uf2.ld
index 6b5d852aa..e2197b972 100644
--- a/hw/bsp/lpc55/boards/double_m33_express/LPC55S69_cm33_core0_uf2.ld
+++ b/hw/bsp/lpc55/boards/double_m33_express/LPC55S69_cm33_core0_uf2.ld
@@ -231,4 +231,3 @@ SECTIONS
 
   ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
 }
-
diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c
index 5b6c56dd3..3ed00e7da 100644
--- a/hw/bsp/lpc55/family.c
+++ b/hw/bsp/lpc55/family.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2018, hathach (tinyusb.org)
diff --git a/hw/bsp/lpcxpresso11u37/lpc11u37.ld b/hw/bsp/lpcxpresso11u37/lpc11u37.ld
index 6a2dfb7f5..8e0a4e4c6 100644
--- a/hw/bsp/lpcxpresso11u37/lpc11u37.ld
+++ b/hw/bsp/lpcxpresso11u37/lpc11u37.ld
@@ -12,24 +12,24 @@
 MEMORY
 {
   /* Define each memory region */
-  MFlash128 (rx) : ORIGIN = 0x0, LENGTH = 0x20000 /* 128K bytes (alias Flash) */  
-  RamLoc8 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* 8K bytes (alias RAM) */  
-  RamUsb2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */  
+  MFlash128 (rx) : ORIGIN = 0x0, LENGTH = 0x20000 /* 128K bytes (alias Flash) */
+  RamLoc8 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* 8K bytes (alias RAM) */
+  RamUsb2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */
 }
 
   /* Define a symbol for the top of each memory region */
-  __base_MFlash128 = 0x0  ; /* MFlash128 */  
-  __base_Flash = 0x0 ; /* Flash */  
-  __top_MFlash128 = 0x0 + 0x20000 ; /* 128K bytes */  
-  __top_Flash = 0x0 + 0x20000 ; /* 128K bytes */  
-  __base_RamLoc8 = 0x10000000  ; /* RamLoc8 */  
-  __base_RAM = 0x10000000 ; /* RAM */  
-  __top_RamLoc8 = 0x10000000 + 0x2000 ; /* 8K bytes */  
-  __top_RAM = 0x10000000 + 0x2000 ; /* 8K bytes */  
-  __base_RamUsb2 = 0x20004000  ; /* RamUsb2 */  
-  __base_RAM2 = 0x20004000 ; /* RAM2 */  
-  __top_RamUsb2 = 0x20004000 + 0x800 ; /* 2K bytes */  
-  __top_RAM2 = 0x20004000 + 0x800 ; /* 2K bytes */  
+  __base_MFlash128 = 0x0  ; /* MFlash128 */
+  __base_Flash = 0x0 ; /* Flash */
+  __top_MFlash128 = 0x0 + 0x20000 ; /* 128K bytes */
+  __top_Flash = 0x0 + 0x20000 ; /* 128K bytes */
+  __base_RamLoc8 = 0x10000000  ; /* RamLoc8 */
+  __base_RAM = 0x10000000 ; /* RAM */
+  __top_RamLoc8 = 0x10000000 + 0x2000 ; /* 8K bytes */
+  __top_RAM = 0x10000000 + 0x2000 ; /* 8K bytes */
+  __base_RamUsb2 = 0x20004000  ; /* RamUsb2 */
+  __base_RAM2 = 0x20004000 ; /* RAM2 */
+  __top_RamUsb2 = 0x20004000 + 0x800 ; /* 2K bytes */
+  __top_RAM2 = 0x20004000 + 0x800 ; /* 2K bytes */
 
 
 ENTRY(ResetISR)
@@ -74,9 +74,9 @@ SECTIONS
     } > MFlash128
     /*
      * for exception handling/unwind - some Newlib functions (in common
-     * with C++ and STDC++) use this. 
+     * with C++ and STDC++) use this.
      */
-    .ARM.extab : ALIGN(4) 
+    .ARM.extab : ALIGN(4)
     {
         *(.ARM.extab* .gnu.linkonce.armextab.*)
     } > MFlash128
@@ -88,9 +88,9 @@ SECTIONS
         *(.ARM.exidx* .gnu.linkonce.armexidx.*)
     } > MFlash128
     __exidx_end = .;
- 
+
     _etext = .;
-        
+
     /* DATA section for RamUsb2 */
 
     .data_RAM2 : ALIGN(4)
@@ -176,11 +176,11 @@ SECTIONS
     PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc8 - 0);
 
     /* ## Create checksum value (used in startup) ## */
-    PROVIDE(__valid_user_code_checksum = 0 - 
-                                         (_vStackTop 
-                                         + (ResetISR + 1) 
-                                         + (( DEFINED(NMI_Handler) ? NMI_Handler : M0_NMI_Handler ) + 1) 
-                                         + (( DEFINED(HardFault_Handler) ? HardFault_Handler : M0_HardFault_Handler ) + 1) 
+    PROVIDE(__valid_user_code_checksum = 0 -
+                                         (_vStackTop
+                                         + (ResetISR + 1)
+                                         + (( DEFINED(NMI_Handler) ? NMI_Handler : M0_NMI_Handler ) + 1)
+                                         + (( DEFINED(HardFault_Handler) ? HardFault_Handler : M0_HardFault_Handler ) + 1)
                                          )
            );
 
@@ -192,4 +192,4 @@ SECTIONS
     _image_start = LOADADDR(.text);
     _image_end = LOADADDR(.data) + SIZEOF(.data);
     _image_size = _image_end - _image_start;
-}
\ No newline at end of file
+}
diff --git a/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c b/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c
index 11f1797a2..79cd685c3 100644
--- a/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c
+++ b/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/lpcxpresso11u68/lpc11u68.ld b/hw/bsp/lpcxpresso11u68/lpc11u68.ld
index 56d9e4b89..4a35b192e 100644
--- a/hw/bsp/lpcxpresso11u68/lpc11u68.ld
+++ b/hw/bsp/lpcxpresso11u68/lpc11u68.ld
@@ -11,29 +11,29 @@
 MEMORY
 {
   /* Define each memory region */
-  MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes (alias Flash) */  
-  Ram0_32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */  
-  Ram1_2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */  
-  Ram2USB_2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM3) */  
+  MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes (alias Flash) */
+  Ram0_32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */
+  Ram1_2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */
+  Ram2USB_2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM3) */
 }
 
   /* Define a symbol for the top of each memory region */
-  __base_MFlash256 = 0x0  ; /* MFlash256 */  
-  __base_Flash = 0x0 ; /* Flash */  
-  __top_MFlash256 = 0x0 + 0x40000 ; /* 256K bytes */  
-  __top_Flash = 0x0 + 0x40000 ; /* 256K bytes */  
-  __base_Ram0_32 = 0x10000000  ; /* Ram0_32 */  
-  __base_RAM = 0x10000000 ; /* RAM */  
-  __top_Ram0_32 = 0x10000000 + 0x8000 ; /* 32K bytes */  
-  __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */  
-  __base_Ram1_2 = 0x20000000  ; /* Ram1_2 */  
-  __base_RAM2 = 0x20000000 ; /* RAM2 */  
-  __top_Ram1_2 = 0x20000000 + 0x800 ; /* 2K bytes */  
-  __top_RAM2 = 0x20000000 + 0x800 ; /* 2K bytes */  
-  __base_Ram2USB_2 = 0x20004000  ; /* Ram2USB_2 */  
-  __base_RAM3 = 0x20004000 ; /* RAM3 */  
-  __top_Ram2USB_2 = 0x20004000 + 0x800 ; /* 2K bytes */  
-  __top_RAM3 = 0x20004000 + 0x800 ; /* 2K bytes */  
+  __base_MFlash256 = 0x0  ; /* MFlash256 */
+  __base_Flash = 0x0 ; /* Flash */
+  __top_MFlash256 = 0x0 + 0x40000 ; /* 256K bytes */
+  __top_Flash = 0x0 + 0x40000 ; /* 256K bytes */
+  __base_Ram0_32 = 0x10000000  ; /* Ram0_32 */
+  __base_RAM = 0x10000000 ; /* RAM */
+  __top_Ram0_32 = 0x10000000 + 0x8000 ; /* 32K bytes */
+  __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
+  __base_Ram1_2 = 0x20000000  ; /* Ram1_2 */
+  __base_RAM2 = 0x20000000 ; /* RAM2 */
+  __top_Ram1_2 = 0x20000000 + 0x800 ; /* 2K bytes */
+  __top_RAM2 = 0x20000000 + 0x800 ; /* 2K bytes */
+  __base_Ram2USB_2 = 0x20004000  ; /* Ram2USB_2 */
+  __base_RAM3 = 0x20004000 ; /* RAM3 */
+  __top_Ram2USB_2 = 0x20004000 + 0x800 ; /* 2K bytes */
+  __top_RAM3 = 0x20004000 + 0x800 ; /* 2K bytes */
 
 ENTRY(ResetISR)
 
@@ -82,9 +82,9 @@ SECTIONS
     } > MFlash256
     /*
      * for exception handling/unwind - some Newlib functions (in common
-     * with C++ and STDC++) use this. 
+     * with C++ and STDC++) use this.
      */
-    .ARM.extab : ALIGN(4) 
+    .ARM.extab : ALIGN(4)
     {
         *(.ARM.extab* .gnu.linkonce.armextab.*)
     } > MFlash256
@@ -98,7 +98,7 @@ SECTIONS
     __exidx_end = .;
 
     _etext = .;
-        
+
     /* possible MTB section for Ram1_2 */
     .mtb_buffer_RAM2 (NOLOAD) :
     {
@@ -172,7 +172,7 @@ SECTIONS
        *(.bss.$Ram1_2*)
        . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
        PROVIDE(__end_bss_RAM2 = .) ;
-    } > Ram1_2 
+    } > Ram1_2
 
     /* BSS section for Ram2USB_2 */
     .bss_RAM3 : ALIGN(4)
@@ -182,7 +182,7 @@ SECTIONS
        *(.bss.$Ram2USB_2*)
        . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
        PROVIDE(__end_bss_RAM3 = .) ;
-    } > Ram2USB_2 
+    } > Ram2USB_2
 
     /* MAIN BSS SECTION */
     .bss : ALIGN(4)
@@ -201,7 +201,7 @@ SECTIONS
        *(.noinit.$RAM2*)
        *(.noinit.$Ram1_2*)
        . = ALIGN(4) ;
-    } > Ram1_2 
+    } > Ram1_2
 
     /* NOINIT section for Ram2USB_2 */
     .noinit_RAM3 (NOLOAD) : ALIGN(4)
@@ -209,13 +209,13 @@ SECTIONS
        *(.noinit.$RAM3*)
        *(.noinit.$Ram2USB_2*)
        . = ALIGN(4) ;
-    } > Ram2USB_2 
+    } > Ram2USB_2
 
     /* DEFAULT NOINIT SECTION */
     .noinit (NOLOAD): ALIGN(4)
     {
         _noinit = .;
-        *(.noinit*) 
+        *(.noinit*)
          . = ALIGN(4) ;
         _end_noinit = .;
     } > Ram0_32
@@ -223,11 +223,11 @@ SECTIONS
     PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_Ram0_32 - 0);
 
     /* ## Create checksum value (used in startup) ## */
-    PROVIDE(__valid_user_code_checksum = 0 - 
-                                         (_vStackTop 
-                                         + (ResetISR + 1) 
-                                         + (( DEFINED(NMI_Handler) ? NMI_Handler : M0_NMI_Handler ) + 1) 
-                                         + (( DEFINED(HardFault_Handler) ? HardFault_Handler : M0_HardFault_Handler ) + 1) 
+    PROVIDE(__valid_user_code_checksum = 0 -
+                                         (_vStackTop
+                                         + (ResetISR + 1)
+                                         + (( DEFINED(NMI_Handler) ? NMI_Handler : M0_NMI_Handler ) + 1)
+                                         + (( DEFINED(HardFault_Handler) ? HardFault_Handler : M0_HardFault_Handler ) + 1)
                                          )
            );
 
@@ -239,4 +239,4 @@ SECTIONS
     _image_start = LOADADDR(.text);
     _image_end = LOADADDR(.data) + SIZEOF(.data);
     _image_size = _image_end - _image_start;
-}
\ No newline at end of file
+}
diff --git a/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c b/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c
index e33a5c6e5..a04e43867 100644
--- a/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c
+++ b/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/lpcxpresso1347/lpc1347.ld b/hw/bsp/lpcxpresso1347/lpc1347.ld
index 42a4bb25c..a2111cd1c 100644
--- a/hw/bsp/lpcxpresso1347/lpc1347.ld
+++ b/hw/bsp/lpcxpresso1347/lpc1347.ld
@@ -11,29 +11,29 @@
 MEMORY
 {
   /* Define each memory region */
-  MFlash64 (rx) : ORIGIN = 0x0, LENGTH = 0x10000 /* 64K bytes (alias Flash) */  
-  RamLoc8 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* 8K bytes (alias RAM) */  
-  RamUsb2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */  
-  RamPeriph2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes (alias RAM3) */  
+  MFlash64 (rx) : ORIGIN = 0x0, LENGTH = 0x10000 /* 64K bytes (alias Flash) */
+  RamLoc8 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* 8K bytes (alias RAM) */
+  RamUsb2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */
+  RamPeriph2 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x800 /* 2K bytes (alias RAM3) */
 }
 
   /* Define a symbol for the top of each memory region */
-  __base_MFlash64 = 0x0  ; /* MFlash64 */  
-  __base_Flash = 0x0 ; /* Flash */  
-  __top_MFlash64 = 0x0 + 0x10000 ; /* 64K bytes */  
-  __top_Flash = 0x0 + 0x10000 ; /* 64K bytes */  
-  __base_RamLoc8 = 0x10000000  ; /* RamLoc8 */  
-  __base_RAM = 0x10000000 ; /* RAM */  
-  __top_RamLoc8 = 0x10000000 + 0x2000 ; /* 8K bytes */  
-  __top_RAM = 0x10000000 + 0x2000 ; /* 8K bytes */  
-  __base_RamUsb2 = 0x20004000  ; /* RamUsb2 */  
-  __base_RAM2 = 0x20004000 ; /* RAM2 */  
-  __top_RamUsb2 = 0x20004000 + 0x800 ; /* 2K bytes */  
-  __top_RAM2 = 0x20004000 + 0x800 ; /* 2K bytes */  
-  __base_RamPeriph2 = 0x20000000  ; /* RamPeriph2 */  
-  __base_RAM3 = 0x20000000 ; /* RAM3 */  
-  __top_RamPeriph2 = 0x20000000 + 0x800 ; /* 2K bytes */  
-  __top_RAM3 = 0x20000000 + 0x800 ; /* 2K bytes */  
+  __base_MFlash64 = 0x0  ; /* MFlash64 */
+  __base_Flash = 0x0 ; /* Flash */
+  __top_MFlash64 = 0x0 + 0x10000 ; /* 64K bytes */
+  __top_Flash = 0x0 + 0x10000 ; /* 64K bytes */
+  __base_RamLoc8 = 0x10000000  ; /* RamLoc8 */
+  __base_RAM = 0x10000000 ; /* RAM */
+  __top_RamLoc8 = 0x10000000 + 0x2000 ; /* 8K bytes */
+  __top_RAM = 0x10000000 + 0x2000 ; /* 8K bytes */
+  __base_RamUsb2 = 0x20004000  ; /* RamUsb2 */
+  __base_RAM2 = 0x20004000 ; /* RAM2 */
+  __top_RamUsb2 = 0x20004000 + 0x800 ; /* 2K bytes */
+  __top_RAM2 = 0x20004000 + 0x800 ; /* 2K bytes */
+  __base_RamPeriph2 = 0x20000000  ; /* RamPeriph2 */
+  __base_RAM3 = 0x20000000 ; /* RAM3 */
+  __top_RamPeriph2 = 0x20000000 + 0x800 ; /* 2K bytes */
+  __top_RAM3 = 0x20000000 + 0x800 ; /* 2K bytes */
 
 ENTRY(ResetISR)
 
@@ -82,9 +82,9 @@ SECTIONS
     } > MFlash64
     /*
      * for exception handling/unwind - some Newlib functions (in common
-     * with C++ and STDC++) use this. 
+     * with C++ and STDC++) use this.
      */
-    .ARM.extab : ALIGN(4) 
+    .ARM.extab : ALIGN(4)
     {
         *(.ARM.extab* .gnu.linkonce.armextab.*)
     } > MFlash64
@@ -98,7 +98,7 @@ SECTIONS
     __exidx_end = .;
 
     _etext = .;
-        
+
     /* DATA section for RamUsb2 */
 
     .data_RAM2 : ALIGN(4)
@@ -153,7 +153,7 @@ SECTIONS
        *(.bss.$RamUsb2*)
        . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
        PROVIDE(__end_bss_RAM2 = .) ;
-    } > RamUsb2 
+    } > RamUsb2
 
     /* BSS section for RamPeriph2 */
     .bss_RAM3 : ALIGN(4)
@@ -163,7 +163,7 @@ SECTIONS
        *(.bss.$RamPeriph2*)
        . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
        PROVIDE(__end_bss_RAM3 = .) ;
-    } > RamPeriph2 
+    } > RamPeriph2
 
     /* MAIN BSS SECTION */
     .bss : ALIGN(4)
@@ -182,7 +182,7 @@ SECTIONS
        *(.noinit.$RAM2*)
        *(.noinit.$RamUsb2*)
        . = ALIGN(4) ;
-    } > RamUsb2 
+    } > RamUsb2
 
     /* NOINIT section for RamPeriph2 */
     .noinit_RAM3 (NOLOAD) : ALIGN(4)
@@ -190,13 +190,13 @@ SECTIONS
        *(.noinit.$RAM3*)
        *(.noinit.$RamPeriph2*)
        . = ALIGN(4) ;
-    } > RamPeriph2 
+    } > RamPeriph2
 
     /* DEFAULT NOINIT SECTION */
     .noinit (NOLOAD): ALIGN(4)
     {
         _noinit = .;
-        *(.noinit*) 
+        *(.noinit*)
          . = ALIGN(4) ;
         _end_noinit = .;
     } > RamLoc8
@@ -204,11 +204,11 @@ SECTIONS
     PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc8 - 0);
 
     /* ## Create checksum value (used in startup) ## */
-    PROVIDE(__valid_user_code_checksum = 0 - 
-                                         (_vStackTop 
-                                         + (ResetISR + 1) 
-                                         + (NMI_Handler + 1) 
-                                         + (HardFault_Handler + 1) 
+    PROVIDE(__valid_user_code_checksum = 0 -
+                                         (_vStackTop
+                                         + (ResetISR + 1)
+                                         + (NMI_Handler + 1)
+                                         + (HardFault_Handler + 1)
                                          + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)   /* MemManage_Handler may not be defined */
                                          + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)     /* BusFault_Handler may not be defined */
                                          + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
@@ -222,4 +222,4 @@ SECTIONS
     _image_start = LOADADDR(.text);
     _image_end = LOADADDR(.data) + SIZEOF(.data);
     _image_size = _image_end - _image_start;
-}
\ No newline at end of file
+}
diff --git a/hw/bsp/lpcxpresso1347/lpcxpresso1347.c b/hw/bsp/lpcxpresso1347/lpcxpresso1347.c
index a9a67ae3a..8ee611037 100644
--- a/hw/bsp/lpcxpresso1347/lpcxpresso1347.c
+++ b/hw/bsp/lpcxpresso1347/lpcxpresso1347.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -64,7 +64,7 @@ const uint32_t ExtRateIn = 0;
 
 /* Pin muxing table, only items that need changing from their default pin
    state are in this table. */
-static const PINMUX_GRP_T pinmuxing[] = 
+static const PINMUX_GRP_T pinmuxing[] =
 {
   {0,  1,  (IOCON_FUNC1 | IOCON_RESERVED_BIT_7 | IOCON_MODE_INACT)},	/* PIO0_1 used for CLKOUT */
   {0,  2,  (IOCON_FUNC1 | IOCON_RESERVED_BIT_7 | IOCON_MODE_PULLUP)},	/* PIO0_2 used for SSEL */
diff --git a/hw/bsp/lpcxpresso1769/lpc1769.ld b/hw/bsp/lpcxpresso1769/lpc1769.ld
index d1c83d8e2..095bd3d92 100644
--- a/hw/bsp/lpcxpresso1769/lpc1769.ld
+++ b/hw/bsp/lpcxpresso1769/lpc1769.ld
@@ -11,24 +11,24 @@
 MEMORY
 {
   /* Define each memory region */
-  MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */  
-  RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */  
-  RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */  
+  MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */
+  RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */
+  RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */
 }
 
   /* Define a symbol for the top of each memory region */
-  __base_MFlash512 = 0x0  ; /* MFlash512 */  
-  __base_Flash = 0x0 ; /* Flash */  
-  __top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */  
-  __top_Flash = 0x0 + 0x80000 ; /* 512K bytes */  
-  __base_RamLoc32 = 0x10000000  ; /* RamLoc32 */  
-  __base_RAM = 0x10000000 ; /* RAM */  
-  __top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */  
-  __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */  
-  __base_RamAHB32 = 0x2007c000  ; /* RamAHB32 */  
-  __base_RAM2 = 0x2007c000 ; /* RAM2 */  
-  __top_RamAHB32 = 0x2007c000 + 0x8000 ; /* 32K bytes */  
-  __top_RAM2 = 0x2007c000 + 0x8000 ; /* 32K bytes */  
+  __base_MFlash512 = 0x0  ; /* MFlash512 */
+  __base_Flash = 0x0 ; /* Flash */
+  __top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */
+  __top_Flash = 0x0 + 0x80000 ; /* 512K bytes */
+  __base_RamLoc32 = 0x10000000  ; /* RamLoc32 */
+  __base_RAM = 0x10000000 ; /* RAM */
+  __top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */
+  __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
+  __base_RamAHB32 = 0x2007c000  ; /* RamAHB32 */
+  __base_RAM2 = 0x2007c000 ; /* RAM2 */
+  __top_RamAHB32 = 0x2007c000 + 0x8000 ; /* 32K bytes */
+  __top_RAM2 = 0x2007c000 + 0x8000 ; /* 32K bytes */
 
 ENTRY(ResetISR)
 
@@ -72,9 +72,9 @@ SECTIONS
     } > MFlash512
     /*
      * for exception handling/unwind - some Newlib functions (in common
-     * with C++ and STDC++) use this. 
+     * with C++ and STDC++) use this.
      */
-    .ARM.extab : ALIGN(4) 
+    .ARM.extab : ALIGN(4)
     {
         *(.ARM.extab* .gnu.linkonce.armextab.*)
     } > MFlash512
@@ -88,7 +88,7 @@ SECTIONS
     __exidx_end = .;
 
     _etext = .;
-        
+
     /* DATA section for RamAHB32 */
 
     .data_RAM2 : ALIGN(4)
@@ -130,7 +130,7 @@ SECTIONS
        *(.bss.$RamAHB32*)
        . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
        PROVIDE(__end_bss_RAM2 = .) ;
-    } > RamAHB32 
+    } > RamAHB32
 
     /* MAIN BSS SECTION */
     .bss : ALIGN(4)
@@ -149,13 +149,13 @@ SECTIONS
        *(.noinit.$RAM2*)
        *(.noinit.$RamAHB32*)
        . = ALIGN(4) ;
-    } > RamAHB32 
+    } > RamAHB32
 
     /* DEFAULT NOINIT SECTION */
     .noinit (NOLOAD): ALIGN(4)
     {
         _noinit = .;
-        *(.noinit*) 
+        *(.noinit*)
          . = ALIGN(4) ;
         _end_noinit = .;
     } > RamLoc32
@@ -163,11 +163,11 @@ SECTIONS
     PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);
 
     /* ## Create checksum value (used in startup) ## */
-    PROVIDE(__valid_user_code_checksum = 0 - 
-                                         (_vStackTop 
-                                         + (ResetISR + 1) 
-                                         + (NMI_Handler + 1) 
-                                         + (HardFault_Handler + 1) 
+    PROVIDE(__valid_user_code_checksum = 0 -
+                                         (_vStackTop
+                                         + (ResetISR + 1)
+                                         + (NMI_Handler + 1)
+                                         + (HardFault_Handler + 1)
                                          + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)   /* MemManage_Handler may not be defined */
                                          + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)     /* BusFault_Handler may not be defined */
                                          + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
@@ -181,4 +181,4 @@ SECTIONS
     _image_start = LOADADDR(.text);
     _image_end = LOADADDR(.data) + SIZEOF(.data);
     _image_size = _image_end - _image_start;
-}
\ No newline at end of file
+}
diff --git a/hw/bsp/lpcxpresso1769/lpcxpresso1769.c b/hw/bsp/lpcxpresso1769/lpcxpresso1769.c
index b7bce93d2..24333ad1a 100644
--- a/hw/bsp/lpcxpresso1769/lpcxpresso1769.c
+++ b/hw/bsp/lpcxpresso1769/lpcxpresso1769.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c b/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c
index 6bade7743..c94b0d6d8 100644
--- a/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c
+++ b/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2018, hathach (tinyusb.org)
diff --git a/hw/bsp/mbed1768/lpc1768.ld b/hw/bsp/mbed1768/lpc1768.ld
index d1c83d8e2..095bd3d92 100644
--- a/hw/bsp/mbed1768/lpc1768.ld
+++ b/hw/bsp/mbed1768/lpc1768.ld
@@ -11,24 +11,24 @@
 MEMORY
 {
   /* Define each memory region */
-  MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */  
-  RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */  
-  RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */  
+  MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512K bytes (alias Flash) */
+  RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */
+  RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32K bytes (alias RAM2) */
 }
 
   /* Define a symbol for the top of each memory region */
-  __base_MFlash512 = 0x0  ; /* MFlash512 */  
-  __base_Flash = 0x0 ; /* Flash */  
-  __top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */  
-  __top_Flash = 0x0 + 0x80000 ; /* 512K bytes */  
-  __base_RamLoc32 = 0x10000000  ; /* RamLoc32 */  
-  __base_RAM = 0x10000000 ; /* RAM */  
-  __top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */  
-  __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */  
-  __base_RamAHB32 = 0x2007c000  ; /* RamAHB32 */  
-  __base_RAM2 = 0x2007c000 ; /* RAM2 */  
-  __top_RamAHB32 = 0x2007c000 + 0x8000 ; /* 32K bytes */  
-  __top_RAM2 = 0x2007c000 + 0x8000 ; /* 32K bytes */  
+  __base_MFlash512 = 0x0  ; /* MFlash512 */
+  __base_Flash = 0x0 ; /* Flash */
+  __top_MFlash512 = 0x0 + 0x80000 ; /* 512K bytes */
+  __top_Flash = 0x0 + 0x80000 ; /* 512K bytes */
+  __base_RamLoc32 = 0x10000000  ; /* RamLoc32 */
+  __base_RAM = 0x10000000 ; /* RAM */
+  __top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */
+  __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
+  __base_RamAHB32 = 0x2007c000  ; /* RamAHB32 */
+  __base_RAM2 = 0x2007c000 ; /* RAM2 */
+  __top_RamAHB32 = 0x2007c000 + 0x8000 ; /* 32K bytes */
+  __top_RAM2 = 0x2007c000 + 0x8000 ; /* 32K bytes */
 
 ENTRY(ResetISR)
 
@@ -72,9 +72,9 @@ SECTIONS
     } > MFlash512
     /*
      * for exception handling/unwind - some Newlib functions (in common
-     * with C++ and STDC++) use this. 
+     * with C++ and STDC++) use this.
      */
-    .ARM.extab : ALIGN(4) 
+    .ARM.extab : ALIGN(4)
     {
         *(.ARM.extab* .gnu.linkonce.armextab.*)
     } > MFlash512
@@ -88,7 +88,7 @@ SECTIONS
     __exidx_end = .;
 
     _etext = .;
-        
+
     /* DATA section for RamAHB32 */
 
     .data_RAM2 : ALIGN(4)
@@ -130,7 +130,7 @@ SECTIONS
        *(.bss.$RamAHB32*)
        . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
        PROVIDE(__end_bss_RAM2 = .) ;
-    } > RamAHB32 
+    } > RamAHB32
 
     /* MAIN BSS SECTION */
     .bss : ALIGN(4)
@@ -149,13 +149,13 @@ SECTIONS
        *(.noinit.$RAM2*)
        *(.noinit.$RamAHB32*)
        . = ALIGN(4) ;
-    } > RamAHB32 
+    } > RamAHB32
 
     /* DEFAULT NOINIT SECTION */
     .noinit (NOLOAD): ALIGN(4)
     {
         _noinit = .;
-        *(.noinit*) 
+        *(.noinit*)
          . = ALIGN(4) ;
         _end_noinit = .;
     } > RamLoc32
@@ -163,11 +163,11 @@ SECTIONS
     PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);
 
     /* ## Create checksum value (used in startup) ## */
-    PROVIDE(__valid_user_code_checksum = 0 - 
-                                         (_vStackTop 
-                                         + (ResetISR + 1) 
-                                         + (NMI_Handler + 1) 
-                                         + (HardFault_Handler + 1) 
+    PROVIDE(__valid_user_code_checksum = 0 -
+                                         (_vStackTop
+                                         + (ResetISR + 1)
+                                         + (NMI_Handler + 1)
+                                         + (HardFault_Handler + 1)
                                          + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)   /* MemManage_Handler may not be defined */
                                          + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)     /* BusFault_Handler may not be defined */
                                          + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
@@ -181,4 +181,4 @@ SECTIONS
     _image_start = LOADADDR(.text);
     _image_end = LOADADDR(.data) + SIZEOF(.data);
     _image_size = _image_end - _image_start;
-}
\ No newline at end of file
+}
diff --git a/hw/bsp/mbed1768/mbed1768.c b/hw/bsp/mbed1768/mbed1768.c
index 08cf3adbd..9f3d294d3 100644
--- a/hw/bsp/mbed1768/mbed1768.c
+++ b/hw/bsp/mbed1768/mbed1768.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld b/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld
index 0b45ee7bd..796ed04f6 100644
--- a/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld
+++ b/hw/bsp/mm32/boards/mm32f327x_mb39/flash.ld
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 MM32 SE TEAM
@@ -110,7 +110,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -121,7 +121,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -149,7 +149,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
diff --git a/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c b/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c
index 9793ba241..c3f5bc16d 100644
--- a/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c
+++ b/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 MM32 SE TEAM
@@ -57,7 +57,7 @@ const int baudrate = 115200;
 
 void board_init (void)
 {
-//   usb clock	
+//   usb clock
   USB_DeviceClockInit();
 
   if ( SysTick_Config(SystemCoreClock / 1000) )
diff --git a/hw/bsp/ngx4330/ngx4330.c b/hw/bsp/ngx4330/ngx4330.c
index 4fc314165..d61f775c7 100644
--- a/hw/bsp/ngx4330/ngx4330.c
+++ b/hw/bsp/ngx4330/ngx4330.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/ngx4330/ngx4330.ld b/hw/bsp/ngx4330/ngx4330.ld
index 7bd363f08..300869c20 100644
--- a/hw/bsp/ngx4330/ngx4330.ld
+++ b/hw/bsp/ngx4330/ngx4330.ld
@@ -12,39 +12,39 @@
 MEMORY
 {
   /* Define each memory region */
-  RamLoc128 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x20000 /* 128K bytes (alias RAM) */  
-  RamLoc72 (rwx) : ORIGIN = 0x10080000, LENGTH = 0x12000 /* 72K bytes (alias RAM2) */  
-  RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */  
-  RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */  
-  RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */  
-  SPIFI (rx) : ORIGIN = 0x14000000, LENGTH = 0x400000 /* 4M bytes (alias Flash) */  
+  RamLoc128 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x20000 /* 128K bytes (alias RAM) */
+  RamLoc72 (rwx) : ORIGIN = 0x10080000, LENGTH = 0x12000 /* 72K bytes (alias RAM2) */
+  RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */
+  RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */
+  RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */
+  SPIFI (rx) : ORIGIN = 0x14000000, LENGTH = 0x400000 /* 4M bytes (alias Flash) */
 }
 
   /* Define a symbol for the top of each memory region */
-  __base_RamLoc128 = 0x10000000  ; /* RamLoc128 */  
-  __base_RAM = 0x10000000 ; /* RAM */  
-  __top_RamLoc128 = 0x10000000 + 0x20000 ; /* 128K bytes */  
-  __top_RAM = 0x10000000 + 0x20000 ; /* 128K bytes */  
-  __base_RamLoc72 = 0x10080000  ; /* RamLoc72 */  
-  __base_RAM2 = 0x10080000 ; /* RAM2 */  
-  __top_RamLoc72 = 0x10080000 + 0x12000 ; /* 72K bytes */  
-  __top_RAM2 = 0x10080000 + 0x12000 ; /* 72K bytes */  
-  __base_RamAHB32 = 0x20000000  ; /* RamAHB32 */  
-  __base_RAM3 = 0x20000000 ; /* RAM3 */  
-  __top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */  
-  __top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */  
-  __base_RamAHB16 = 0x20008000  ; /* RamAHB16 */  
-  __base_RAM4 = 0x20008000 ; /* RAM4 */  
-  __top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */  
-  __top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */  
-  __base_RamAHB_ETB16 = 0x2000c000  ; /* RamAHB_ETB16 */  
-  __base_RAM5 = 0x2000c000 ; /* RAM5 */  
-  __top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */  
-  __top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */  
-  __base_SPIFI = 0x14000000  ; /* SPIFI */  
-  __base_Flash = 0x14000000 ; /* Flash */  
-  __top_SPIFI = 0x14000000 + 0x400000 ; /* 4M bytes */  
-  __top_Flash = 0x14000000 + 0x400000 ; /* 4M bytes */  
+  __base_RamLoc128 = 0x10000000  ; /* RamLoc128 */
+  __base_RAM = 0x10000000 ; /* RAM */
+  __top_RamLoc128 = 0x10000000 + 0x20000 ; /* 128K bytes */
+  __top_RAM = 0x10000000 + 0x20000 ; /* 128K bytes */
+  __base_RamLoc72 = 0x10080000  ; /* RamLoc72 */
+  __base_RAM2 = 0x10080000 ; /* RAM2 */
+  __top_RamLoc72 = 0x10080000 + 0x12000 ; /* 72K bytes */
+  __top_RAM2 = 0x10080000 + 0x12000 ; /* 72K bytes */
+  __base_RamAHB32 = 0x20000000  ; /* RamAHB32 */
+  __base_RAM3 = 0x20000000 ; /* RAM3 */
+  __top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */
+  __top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */
+  __base_RamAHB16 = 0x20008000  ; /* RamAHB16 */
+  __base_RAM4 = 0x20008000 ; /* RAM4 */
+  __top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */
+  __top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */
+  __base_RamAHB_ETB16 = 0x2000c000  ; /* RamAHB_ETB16 */
+  __base_RAM5 = 0x2000c000 ; /* RAM5 */
+  __top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */
+  __top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */
+  __base_SPIFI = 0x14000000  ; /* SPIFI */
+  __base_Flash = 0x14000000 ; /* Flash */
+  __top_SPIFI = 0x14000000 + 0x400000 ; /* 4M bytes */
+  __top_Flash = 0x14000000 + 0x400000 ; /* 4M bytes */
 
 ENTRY(ResetISR)
 
@@ -103,9 +103,9 @@ SECTIONS
     } > SPIFI
     /*
      * for exception handling/unwind - some Newlib functions (in common
-     * with C++ and STDC++) use this. 
+     * with C++ and STDC++) use this.
      */
-    .ARM.extab : ALIGN(4) 
+    .ARM.extab : ALIGN(4)
     {
         *(.ARM.extab* .gnu.linkonce.armextab.*)
     } > SPIFI
@@ -117,9 +117,9 @@ SECTIONS
         *(.ARM.exidx* .gnu.linkonce.armexidx.*)
     } > SPIFI
     __exidx_end = .;
- 
+
     _etext = .;
-        
+
     /* DATA section for RamLoc72 */
 
     .data_RAM2 : ALIGN(4)
@@ -322,11 +322,11 @@ SECTIONS
     PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc128 - 0);
 
     /* ## Create checksum value (used in startup) ## */
-    PROVIDE(__valid_user_code_checksum = 0 - 
-                                         (_vStackTop 
-                                         + (ResetISR + 1) 
-                                         + (NMI_Handler + 1) 
-                                         + (HardFault_Handler + 1) 
+    PROVIDE(__valid_user_code_checksum = 0 -
+                                         (_vStackTop
+                                         + (ResetISR + 1)
+                                         + (NMI_Handler + 1)
+                                         + (HardFault_Handler + 1)
                                          + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)   /* MemManage_Handler may not be defined */
                                          + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)     /* BusFault_Handler may not be defined */
                                          + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
@@ -340,4 +340,4 @@ SECTIONS
     _image_start = LOADADDR(.text);
     _image_end = LOADADDR(.data) + SIZEOF(.data);
     _image_size = _image_end - _image_start;
-}
\ No newline at end of file
+}
diff --git a/hw/bsp/nrf/boards/adafruit_clue/board.h b/hw/bsp/nrf/boards/adafruit_clue/board.h
index 2c58e8fe8..8d6df786e 100644
--- a/hw/bsp/nrf/boards/adafruit_clue/board.h
+++ b/hw/bsp/nrf/boards/adafruit_clue/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/nrf/boards/adafruit_clue/nrf52840_s140_v6.ld b/hw/bsp/nrf/boards/adafruit_clue/nrf52840_s140_v6.ld
index 5314a4e93..71c55bb81 100755
--- a/hw/bsp/nrf/boards/adafruit_clue/nrf52840_s140_v6.ld
+++ b/hw/bsp/nrf/boards/adafruit_clue/nrf52840_s140_v6.ld
@@ -13,7 +13,7 @@ MEMORY
    * - Max ATT MTU
    * - Concurrent connection peripheral + central + secure links
    * - Event Len, HVN queue, Write CMD queue
-   */ 
+   */
   RAM (rwx) :  ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400
 }
 
@@ -26,7 +26,7 @@ SECTIONS
     KEEP(*(.svc_data))
     PROVIDE(__stop_svc_data = .);
   } > RAM
-  
+
   .fs_data :
   {
     PROVIDE(__start_fs_data = .);
diff --git a/hw/bsp/nrf/boards/arduino_nano33_ble/arduino_nano33_ble.ld b/hw/bsp/nrf/boards/arduino_nano33_ble/arduino_nano33_ble.ld
index f570740b6..f609f743f 100755
--- a/hw/bsp/nrf/boards/arduino_nano33_ble/arduino_nano33_ble.ld
+++ b/hw/bsp/nrf/boards/arduino_nano33_ble/arduino_nano33_ble.ld
@@ -20,7 +20,7 @@ SECTIONS
     KEEP(*(.svc_data))
     PROVIDE(__stop_svc_data = .);
   } > RAM
-  
+
   .fs_data :
   {
     PROVIDE(__start_fs_data = .);
diff --git a/hw/bsp/nrf/boards/arduino_nano33_ble/board.h b/hw/bsp/nrf/boards/arduino_nano33_ble/board.h
index d548e01c3..00fa8d8ea 100644
--- a/hw/bsp/nrf/boards/arduino_nano33_ble/board.h
+++ b/hw/bsp/nrf/boards/arduino_nano33_ble/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.h b/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.h
index a86c9dc7f..3dd354efa 100644
--- a/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.h
+++ b/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/nrf/boards/circuitplayground_bluefruit/nrf52840_s140_v6.ld b/hw/bsp/nrf/boards/circuitplayground_bluefruit/nrf52840_s140_v6.ld
index 5314a4e93..71c55bb81 100755
--- a/hw/bsp/nrf/boards/circuitplayground_bluefruit/nrf52840_s140_v6.ld
+++ b/hw/bsp/nrf/boards/circuitplayground_bluefruit/nrf52840_s140_v6.ld
@@ -13,7 +13,7 @@ MEMORY
    * - Max ATT MTU
    * - Concurrent connection peripheral + central + secure links
    * - Event Len, HVN queue, Write CMD queue
-   */ 
+   */
   RAM (rwx) :  ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400
 }
 
@@ -26,7 +26,7 @@ SECTIONS
     KEEP(*(.svc_data))
     PROVIDE(__stop_svc_data = .);
   } > RAM
-  
+
   .fs_data :
   {
     PROVIDE(__start_fs_data = .);
diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/board.h b/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
index 3208a948a..8e6ce3230 100644
--- a/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
+++ b/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/nrf52840_s140_v6.ld b/hw/bsp/nrf/boards/feather_nrf52840_express/nrf52840_s140_v6.ld
index 5314a4e93..71c55bb81 100644
--- a/hw/bsp/nrf/boards/feather_nrf52840_express/nrf52840_s140_v6.ld
+++ b/hw/bsp/nrf/boards/feather_nrf52840_express/nrf52840_s140_v6.ld
@@ -13,7 +13,7 @@ MEMORY
    * - Max ATT MTU
    * - Concurrent connection peripheral + central + secure links
    * - Event Len, HVN queue, Write CMD queue
-   */ 
+   */
   RAM (rwx) :  ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400
 }
 
@@ -26,7 +26,7 @@ SECTIONS
     KEEP(*(.svc_data))
     PROVIDE(__stop_svc_data = .);
   } > RAM
-  
+
   .fs_data :
   {
     PROVIDE(__start_fs_data = .);
diff --git a/hw/bsp/nrf/boards/feather_nrf52840_sense/board.h b/hw/bsp/nrf/boards/feather_nrf52840_sense/board.h
index ece6e34cb..605deea24 100644
--- a/hw/bsp/nrf/boards/feather_nrf52840_sense/board.h
+++ b/hw/bsp/nrf/boards/feather_nrf52840_sense/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/nrf/boards/feather_nrf52840_sense/nrf52840_s140_v6.ld b/hw/bsp/nrf/boards/feather_nrf52840_sense/nrf52840_s140_v6.ld
index 5314a4e93..71c55bb81 100644
--- a/hw/bsp/nrf/boards/feather_nrf52840_sense/nrf52840_s140_v6.ld
+++ b/hw/bsp/nrf/boards/feather_nrf52840_sense/nrf52840_s140_v6.ld
@@ -13,7 +13,7 @@ MEMORY
    * - Max ATT MTU
    * - Concurrent connection peripheral + central + secure links
    * - Event Len, HVN queue, Write CMD queue
-   */ 
+   */
   RAM (rwx) :  ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400
 }
 
@@ -26,7 +26,7 @@ SECTIONS
     KEEP(*(.svc_data))
     PROVIDE(__stop_svc_data = .);
   } > RAM
-  
+
   .fs_data :
   {
     PROVIDE(__start_fs_data = .);
diff --git a/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.h b/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.h
index 132173a80..33c370f53 100644
--- a/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.h
+++ b/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/nrf/boards/itsybitsy_nrf52840/nrf52840_s140_v6.ld b/hw/bsp/nrf/boards/itsybitsy_nrf52840/nrf52840_s140_v6.ld
index 5314a4e93..71c55bb81 100644
--- a/hw/bsp/nrf/boards/itsybitsy_nrf52840/nrf52840_s140_v6.ld
+++ b/hw/bsp/nrf/boards/itsybitsy_nrf52840/nrf52840_s140_v6.ld
@@ -13,7 +13,7 @@ MEMORY
    * - Max ATT MTU
    * - Concurrent connection peripheral + central + secure links
    * - Event Len, HVN queue, Write CMD queue
-   */ 
+   */
   RAM (rwx) :  ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400
 }
 
@@ -26,7 +26,7 @@ SECTIONS
     KEEP(*(.svc_data))
     PROVIDE(__stop_svc_data = .);
   } > RAM
-  
+
   .fs_data :
   {
     PROVIDE(__start_fs_data = .);
diff --git a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.h b/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.h
index 01dd1f24f..072cb2714 100644
--- a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.h
+++ b/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.mk b/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.mk
index 3afa234aa..f25ec8f34 100644
--- a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.mk
+++ b/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.mk
@@ -12,4 +12,4 @@ $(BUILD)/$(PROJECT).zip: $(BUILD)/$(PROJECT).hex
 
 flash: $(BUILD)/$(PROJECT).zip
 	@:$(call check_defined, SERIAL, example: SERIAL=/dev/ttyACM0)
-	$(NRFUTIL) dfu usb-serial --package $^ -p $(SERIAL) -b 115200
\ No newline at end of file
+	$(NRFUTIL) dfu usb-serial --package $^ -p $(SERIAL) -b 115200
diff --git a/hw/bsp/nrf/boards/pca10056/board.h b/hw/bsp/nrf/boards/pca10056/board.h
index ab12d21aa..50d3067b3 100644
--- a/hw/bsp/nrf/boards/pca10056/board.h
+++ b/hw/bsp/nrf/boards/pca10056/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/nrf/boards/pca10059/board.h b/hw/bsp/nrf/boards/pca10059/board.h
index 0810be648..ea3f4030d 100644
--- a/hw/bsp/nrf/boards/pca10059/board.h
+++ b/hw/bsp/nrf/boards/pca10059/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/nrf/boards/pca10100/board.h b/hw/bsp/nrf/boards/pca10100/board.h
index 881133035..2b2579732 100644
--- a/hw/bsp/nrf/boards/pca10100/board.h
+++ b/hw/bsp/nrf/boards/pca10100/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.h b/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.h
index dcf829d9c..bc203f073 100644
--- a/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.h
+++ b/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index a07332d4c..02cec31ef 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/nutiny_nuc121s/nuc121_flash.ld b/hw/bsp/nutiny_nuc121s/nuc121_flash.ld
index 3966b276e..0c599a561 100644
--- a/hw/bsp/nutiny_nuc121s/nuc121_flash.ld
+++ b/hw/bsp/nutiny_nuc121s/nuc121_flash.ld
@@ -69,7 +69,7 @@ SECTIONS
  		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
  		*(SORT(.dtors.*))
  		*(.dtors)
-        
+
 		*(.rodata*)
 
 		KEEP(*(.eh_frame*))
diff --git a/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c b/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c
index 7117a3422..ec66f8deb 100644
--- a/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c
+++ b/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/nutiny_nuc125s/nuc125_flash.ld b/hw/bsp/nutiny_nuc125s/nuc125_flash.ld
index 3966b276e..0c599a561 100644
--- a/hw/bsp/nutiny_nuc125s/nuc125_flash.ld
+++ b/hw/bsp/nutiny_nuc125s/nuc125_flash.ld
@@ -69,7 +69,7 @@ SECTIONS
  		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
  		*(SORT(.dtors.*))
  		*(.dtors)
-        
+
 		*(.rodata*)
 
 		KEEP(*(.eh_frame*))
diff --git a/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c b/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c
index 7117a3422..ec66f8deb 100644
--- a/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c
+++ b/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c b/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c
index da62e7bd2..90fa2ffd8 100644
--- a/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c
+++ b/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c b/hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c
index 0d78116b8..9e7eacb23 100644
--- a/hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c
+++ b/hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c b/hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c
index 49e66d2d0..1fc97e3dc 100644
--- a/hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c
+++ b/hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/pic32mz/boards/olimex_emz64/olimex_emz64.c b/hw/bsp/pic32mz/boards/olimex_emz64/olimex_emz64.c
index e47ec5f31..0bb6cb728 100644
--- a/hw/bsp/pic32mz/boards/olimex_emz64/olimex_emz64.c
+++ b/hw/bsp/pic32mz/boards/olimex_emz64/olimex_emz64.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2022 Jerzy Kasenberg
diff --git a/hw/bsp/pic32mz/family.c b/hw/bsp/pic32mz/family.c
index 786f04978..895e23899 100644
--- a/hw/bsp/pic32mz/family.c
+++ b/hw/bsp/pic32mz/family.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2022 Jerzy Kasenberg
diff --git a/hw/bsp/rp2040/board.h b/hw/bsp/rp2040/board.h
index e7eab088e..1eeeaf9af 100644
--- a/hw/bsp/rp2040/board.h
+++ b/hw/bsp/rp2040/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2021, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/rp2040/boards/raspberry_pi_pico/board.cmake b/hw/bsp/rp2040/boards/raspberry_pi_pico/board.cmake
index 8280c835d..f9887c09c 100644
--- a/hw/bsp/rp2040/boards/raspberry_pi_pico/board.cmake
+++ b/hw/bsp/rp2040/boards/raspberry_pi_pico/board.cmake
@@ -1 +1 @@
-set(PICO_BOARD pico)
\ No newline at end of file
+set(PICO_BOARD pico)
diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index 678bce274..5d80ab66e 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -55,7 +55,7 @@ if (NOT TARGET _rp2040_family_inclusion_marker)
 		message("Compiling TinyUSB with CFG_TUSB_DEBUG=1")
 		set(TINYUSB_DEBUG_LEVEL 1)
 	endif()
-	
+
 	target_compile_definitions(tinyusb_common_base INTERFACE
 			CFG_TUSB_MCU=OPT_MCU_RP2040
 			CFG_TUSB_OS=${TINYUSB_OPT_OS}
diff --git a/hw/bsp/rx/boards/gr_citrus/gr_citrus.c b/hw/bsp/rx/boards/gr_citrus/gr_citrus.c
index 9bd9399f6..4f87153ac 100644
--- a/hw/bsp/rx/boards/gr_citrus/gr_citrus.c
+++ b/hw/bsp/rx/boards/gr_citrus/gr_citrus.c
@@ -33,9 +33,9 @@
  * - Short EMLE pad and 3.3V(GR-CITRUS pin name) with a wire.
  *
  * The pads are [the back side of GR-CITRUS](https://www.slideshare.net/MinaoYamamoto/grcitrusrx631/2).
- * 
+ *
  * Connect the pins between GR-CITRUS and JLink as follows.
- * 
+ *
  * | Function  | GR-CITRUS pin | JLink pin No.| note     |
  * |:---------:|:-------------:|:------------:|:--------:|
  * | VTref     |   3.3V        |   1          |          |
@@ -91,7 +91,7 @@ void INT_Excep_SCI0_TXI0(void)
 {
   uint8_t *buf = sci0_buf[0].buf;
   uint32_t cnt = sci0_buf[0].cnt;
-  
+
   if (!buf || !cnt) {
     SCI0.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE);
     return;
diff --git a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
index 3c729ad50..691038fc8 100644
--- a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
+++ b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
@@ -126,7 +126,7 @@ void INT_Excep_SCI5_TXI5(void)
 {
   uint8_t *buf = sci_buf[0].buf;
   uint32_t cnt = sci_buf[0].cnt;
-  
+
   if (!buf || !cnt) {
     SCI5.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE);
     return;
diff --git a/hw/bsp/samd11/boards/samd11_xplained/samd11d14am_flash.ld b/hw/bsp/samd11/boards/samd11_xplained/samd11d14am_flash.ld
index 8b3124c0e..9e12acec8 100644
--- a/hw/bsp/samd11/boards/samd11_xplained/samd11d14am_flash.ld
+++ b/hw/bsp/samd11/boards/samd11_xplained/samd11d14am_flash.ld
@@ -14,9 +14,9 @@
  * Licensed under the Apache License, Version 2.0 (the "License"); you may
  * not use this file except in compliance with the License.
  * You may obtain a copy of the Licence at
- * 
+ *
  * http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing, software
  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
diff --git a/hw/bsp/samd21/boards/atsamd21_xpro/board.h b/hw/bsp/samd21/boards/atsamd21_xpro/board.h
index a3e03997c..315e40c78 100644
--- a/hw/bsp/samd21/boards/atsamd21_xpro/board.h
+++ b/hw/bsp/samd21/boards/atsamd21_xpro/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/samd21/boards/circuitplayground_express/board.h b/hw/bsp/samd21/boards/circuitplayground_express/board.h
index 2d7da1c0b..0037db00d 100644
--- a/hw/bsp/samd21/boards/circuitplayground_express/board.h
+++ b/hw/bsp/samd21/boards/circuitplayground_express/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/samd21/boards/curiosity_nano/board.h b/hw/bsp/samd21/boards/curiosity_nano/board.h
index 67924d809..1a4a833a3 100644
--- a/hw/bsp/samd21/boards/curiosity_nano/board.h
+++ b/hw/bsp/samd21/boards/curiosity_nano/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/samd21/boards/feather_m0_express/board.h b/hw/bsp/samd21/boards/feather_m0_express/board.h
index b9292b9af..8e0caa6bd 100644
--- a/hw/bsp/samd21/boards/feather_m0_express/board.h
+++ b/hw/bsp/samd21/boards/feather_m0_express/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/samd21/boards/itsybitsy_m0/board.h b/hw/bsp/samd21/boards/itsybitsy_m0/board.h
index 177fb695e..6ee814da5 100644
--- a/hw/bsp/samd21/boards/itsybitsy_m0/board.h
+++ b/hw/bsp/samd21/boards/itsybitsy_m0/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/samd21/boards/luna_d21/board.h b/hw/bsp/samd21/boards/luna_d21/board.h
index 2e0a2a60f..776063636 100644
--- a/hw/bsp/samd21/boards/luna_d21/board.h
+++ b/hw/bsp/samd21/boards/luna_d21/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2021, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/samd21/boards/luna_d21/board.mk b/hw/bsp/samd21/boards/luna_d21/board.mk
index 27a634e3a..508a72b1f 100644
--- a/hw/bsp/samd21/boards/luna_d21/board.mk
+++ b/hw/bsp/samd21/boards/luna_d21/board.mk
@@ -8,4 +8,3 @@ JLINK_DEVICE = ATSAMD21G18
 # flash using dfu-util
 flash: $(BUILD)/$(PROJECT).bin
 	dfu-util -a 0 -d 1d50:615c -D $< || dfu-util -a 0 -d 16d0:05a5 -D $<
-
diff --git a/hw/bsp/samd21/boards/metro_m0_express/board.h b/hw/bsp/samd21/boards/metro_m0_express/board.h
index 13b7556b0..d26aae53c 100644
--- a/hw/bsp/samd21/boards/metro_m0_express/board.h
+++ b/hw/bsp/samd21/boards/metro_m0_express/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/samd21/boards/qtpy/board.h b/hw/bsp/samd21/boards/qtpy/board.h
index 6f8325e49..9ba39e966 100644
--- a/hw/bsp/samd21/boards/qtpy/board.h
+++ b/hw/bsp/samd21/boards/qtpy/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/samd21/boards/seeeduino_xiao/board.h b/hw/bsp/samd21/boards/seeeduino_xiao/board.h
index 0d1e9cef1..1bd63d6d9 100644
--- a/hw/bsp/samd21/boards/seeeduino_xiao/board.h
+++ b/hw/bsp/samd21/boards/seeeduino_xiao/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/samd21/boards/trinket_m0/board.h b/hw/bsp/samd21/boards/trinket_m0/board.h
index c8692e6bd..741f2a7f3 100644
--- a/hw/bsp/samd21/boards/trinket_m0/board.h
+++ b/hw/bsp/samd21/boards/trinket_m0/board.h
@@ -31,4 +31,3 @@
 
 // UART
 #define UART_SERCOM           0
-
diff --git a/hw/bsp/samd21/boards/trinket_m0/board.mk b/hw/bsp/samd21/boards/trinket_m0/board.mk
index 803ffe892..6addf13b7 100644
--- a/hw/bsp/samd21/boards/trinket_m0/board.mk
+++ b/hw/bsp/samd21/boards/trinket_m0/board.mk
@@ -2,4 +2,3 @@ CFLAGS += -D__SAMD21E18A__ -DCFG_EXAMPLE_VIDEO_READONLY
 
 # All source paths should be relative to the top level.
 LD_FILE = $(BOARD_PATH)/trinket_m0.ld
-
diff --git a/hw/bsp/samd21/family.c b/hw/bsp/samd21/family.c
index 494dc393a..308fb51b5 100644
--- a/hw/bsp/samd21/family.c
+++ b/hw/bsp/samd21/family.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/samd51/boards/feather_m4_express/board.h b/hw/bsp/samd51/boards/feather_m4_express/board.h
index 1d5ed8040..4629643fd 100644
--- a/hw/bsp/samd51/boards/feather_m4_express/board.h
+++ b/hw/bsp/samd51/boards/feather_m4_express/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/samd51/boards/itsybitsy_m4/board.h b/hw/bsp/samd51/boards/itsybitsy_m4/board.h
index 0760d4288..272315771 100644
--- a/hw/bsp/samd51/boards/itsybitsy_m4/board.h
+++ b/hw/bsp/samd51/boards/itsybitsy_m4/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/samd51/boards/metro_m4_express/board.h b/hw/bsp/samd51/boards/metro_m4_express/board.h
index ab10ae4f8..5d7734576 100644
--- a/hw/bsp/samd51/boards/metro_m4_express/board.h
+++ b/hw/bsp/samd51/boards/metro_m4_express/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/samd51/boards/metro_m4_express/board.mk b/hw/bsp/samd51/boards/metro_m4_express/board.mk
index d7953cc24..57a680e91 100644
--- a/hw/bsp/samd51/boards/metro_m4_express/board.mk
+++ b/hw/bsp/samd51/boards/metro_m4_express/board.mk
@@ -7,4 +7,3 @@ LD_FILE = $(BOARD_PATH)/$(BOARD).ld
 JLINK_DEVICE = ATSAMD51J19
 
 flash: flash-bossac
-
diff --git a/hw/bsp/samd51/boards/pybadge/board.h b/hw/bsp/samd51/boards/pybadge/board.h
index 1d5ed8040..4629643fd 100644
--- a/hw/bsp/samd51/boards/pybadge/board.h
+++ b/hw/bsp/samd51/boards/pybadge/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/samd51/boards/pyportal/board.h b/hw/bsp/samd51/boards/pyportal/board.h
index 9e51ded32..ff04c900b 100644
--- a/hw/bsp/samd51/boards/pyportal/board.h
+++ b/hw/bsp/samd51/boards/pyportal/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/samd51/family.c b/hw/bsp/samd51/family.c
index 020e638c4..3da89ee14 100644
--- a/hw/bsp/samd51/family.c
+++ b/hw/bsp/samd51/family.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/same54xplainedpro/same54p20a_flash.ld b/hw/bsp/same54xplainedpro/same54p20a_flash.ld
index 97072bfe6..1f427a066 100644
--- a/hw/bsp/same54xplainedpro/same54p20a_flash.ld
+++ b/hw/bsp/same54xplainedpro/same54p20a_flash.ld
@@ -14,9 +14,9 @@
  * Licensed under the Apache License, Version 2.0 (the "License"); you may
  * not use this file except in compliance with the License.
  * You may obtain a copy of the Licence at
- * 
+ *
  * http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing, software
  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
diff --git a/hw/bsp/same54xplainedpro/same54p20a_sram.ld b/hw/bsp/same54xplainedpro/same54p20a_sram.ld
index 6219f4afe..e6e33ec48 100644
--- a/hw/bsp/same54xplainedpro/same54p20a_sram.ld
+++ b/hw/bsp/same54xplainedpro/same54p20a_sram.ld
@@ -14,9 +14,9 @@
  * Licensed under the Apache License, Version 2.0 (the "License"); you may
  * not use this file except in compliance with the License.
  * You may obtain a copy of the Licence at
- * 
+ *
  * http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing, software
  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
diff --git a/hw/bsp/samg55xplained/samg55xplained.c b/hw/bsp/samg55xplained/samg55xplained.c
index 027c88e2f..6e1ed56a9 100644
--- a/hw/bsp/samg55xplained/samg55xplained.c
+++ b/hw/bsp/samg55xplained/samg55xplained.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019, hathach (tinyusb.org)
diff --git a/hw/bsp/saml2x/boards/atsaml21_xpro/board.h b/hw/bsp/saml2x/boards/atsaml21_xpro/board.h
index a3e03997c..315e40c78 100644
--- a/hw/bsp/saml2x/boards/atsaml21_xpro/board.h
+++ b/hw/bsp/saml2x/boards/atsaml21_xpro/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/saml2x/boards/saml22_feather/board.h b/hw/bsp/saml2x/boards/saml22_feather/board.h
index 13a326000..72e9897b6 100644
--- a/hw/bsp/saml2x/boards/saml22_feather/board.h
+++ b/hw/bsp/saml2x/boards/saml22_feather/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/saml2x/boards/saml22_feather/saml22_feather.ld b/hw/bsp/saml2x/boards/saml22_feather/saml22_feather.ld
index d1aaa44fc..156c3e7e4 100644
--- a/hw/bsp/saml2x/boards/saml22_feather/saml22_feather.ld
+++ b/hw/bsp/saml2x/boards/saml22_feather/saml22_feather.ld
@@ -14,9 +14,9 @@
  * Licensed under the Apache License, Version 2.0 (the "License"); you may
  * not use this file except in compliance with the License.
  * You may obtain a copy of the Licence at
- * 
+ *
  * http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing, software
  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
diff --git a/hw/bsp/saml2x/boards/sensorwatch_m0/board.h b/hw/bsp/saml2x/boards/sensorwatch_m0/board.h
index 7fc690ab2..735f6afc8 100644
--- a/hw/bsp/saml2x/boards/sensorwatch_m0/board.h
+++ b/hw/bsp/saml2x/boards/sensorwatch_m0/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/saml2x/boards/sensorwatch_m0/sensorwatch_m0.ld b/hw/bsp/saml2x/boards/sensorwatch_m0/sensorwatch_m0.ld
index d1aaa44fc..156c3e7e4 100644
--- a/hw/bsp/saml2x/boards/sensorwatch_m0/sensorwatch_m0.ld
+++ b/hw/bsp/saml2x/boards/sensorwatch_m0/sensorwatch_m0.ld
@@ -14,9 +14,9 @@
  * Licensed under the Apache License, Version 2.0 (the "License"); you may
  * not use this file except in compliance with the License.
  * You may obtain a copy of the Licence at
- * 
+ *
  * http://www.apache.org/licenses/LICENSE-2.0
- * 
+ *
  * Unless required by applicable law or agreed to in writing, software
  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
diff --git a/hw/bsp/saml2x/family.c b/hw/bsp/saml2x/family.c
index 470fde750..f119d23a1 100644
--- a/hw/bsp/saml2x/family.c
+++ b/hw/bsp/saml2x/family.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/sltb009a/sltb009a.c b/hw/bsp/sltb009a/sltb009a.c
index b5eb5ed5d..2a5d112a8 100644
--- a/hw/bsp/sltb009a/sltb009a.c
+++ b/hw/bsp/sltb009a/sltb009a.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2021 Rafael Silva (@perigoso)
@@ -712,7 +712,7 @@ uint32_t board_millis(void)
   * @retval None
   */
 void assert_failed(char *file, uint32_t line)
-{ 
+{
   /* USER CODE BEGIN 6 */
   /* User can add his own implementation to report the file name and line number,
      tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
diff --git a/hw/bsp/spresense/board_spresense.c b/hw/bsp/spresense/board_spresense.c
index 256bccd15..5f778ad70 100644
--- a/hw/bsp/spresense/board_spresense.c
+++ b/hw/bsp/spresense/board_spresense.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright 2019 Sony Semiconductor Solutions Corporation
@@ -64,7 +64,7 @@ void board_led_write(bool state)
 // a '1' means active (pressed), a '0' means inactive.
 uint32_t board_button_read(void)
 {
-  if (board_gpio_read(BUTTON_PIN)) 
+  if (board_gpio_read(BUTTON_PIN))
   {
     return 0;
   }
@@ -96,7 +96,7 @@ uint32_t board_millis(void)
     /* Wait until RTC is available */
     while (g_rtc_enabled == false);
 
-    if (clock_gettime(CLOCK_MONOTONIC, &tp)) 
+    if (clock_gettime(CLOCK_MONOTONIC, &tp))
     {
         return 0;
     }
diff --git a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.h b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.h
index 7c527e2c2..9af81e63c 100644
--- a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.h
+++ b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk
index cf787a103..1cc443352 100644
--- a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk
+++ b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk
@@ -12,4 +12,4 @@ IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f070xb_flash.icf
 JLINK_DEVICE = stm32f070rb
 
 # flash target using on-board stlink
-flash: flash-stlink
\ No newline at end of file
+flash: flash-stlink
diff --git a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/stm32F070rbtx_flash.ld b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/stm32F070rbtx_flash.ld
index 4a6491510..6bb9d33cb 100644
--- a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/stm32F070rbtx_flash.ld
+++ b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/stm32F070rbtx_flash.ld
@@ -102,12 +102,12 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { 
+  .ARM.extab   : {
   	. = ALIGN(4);
   	*(.ARM.extab* .gnu.linkonce.armextab.*)
   	. = ALIGN(4);
   } >FLASH
-  
+
   .ARM : {
     . = ALIGN(4);
     __exidx_start = .;
@@ -124,7 +124,7 @@ SECTIONS
     PROVIDE_HIDDEN (__preinit_array_end = .);
     . = ALIGN(4);
   } >FLASH
-  
+
   .init_array :
   {
     . = ALIGN(4);
@@ -134,7 +134,7 @@ SECTIONS
     PROVIDE_HIDDEN (__init_array_end = .);
     . = ALIGN(4);
   } >FLASH
-  
+
   .fini_array :
   {
     . = ALIGN(4);
@@ -149,7 +149,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections into "RAM" Ram type memory */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -158,9 +158,9 @@ SECTIONS
 
     . = ALIGN(4);
     _edata = .;        /* define a global symbol at data end */
-    
+
   } >RAM AT> FLASH
-  
+
   /* Uninitialized data section into "RAM" Ram type memory */
   . = ALIGN(4);
   .bss :
diff --git a/hw/bsp/stm32f0/boards/stm32f072disco/STM32F072RBTx_FLASH.ld b/hw/bsp/stm32f0/boards/stm32f072disco/STM32F072RBTx_FLASH.ld
index f0879e929..8715e0723 100644
--- a/hw/bsp/stm32f0/boards/stm32f072disco/STM32F072RBTx_FLASH.ld
+++ b/hw/bsp/stm32f0/boards/stm32f072disco/STM32F072RBTx_FLASH.ld
@@ -114,7 +114,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -125,7 +125,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -153,7 +153,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -165,5 +165,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32f0/boards/stm32f072disco/board.h b/hw/bsp/stm32f0/boards/stm32f072disco/board.h
index 0b1824b8e..1febd01e8 100644
--- a/hw/bsp/stm32f0/boards/stm32f072disco/board.h
+++ b/hw/bsp/stm32f0/boards/stm32f072disco/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32f0/boards/stm32f072eval/board.h b/hw/bsp/stm32f0/boards/stm32f072eval/board.h
index 8869d5dc9..7dcfa3e85 100644
--- a/hw/bsp/stm32f0/boards/stm32f072eval/board.h
+++ b/hw/bsp/stm32f0/boards/stm32f072eval/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32f0/family.c b/hw/bsp/stm32f0/family.c
index 884208fb1..bfa843494 100644
--- a/hw/bsp/stm32f0/family.c
+++ b/hw/bsp/stm32f0/family.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32f0/stm32f0xx_hal_conf.h b/hw/bsp/stm32f0/stm32f0xx_hal_conf.h
index 0bf053e13..b205464f3 100644
--- a/hw/bsp/stm32f0/stm32f0xx_hal_conf.h
+++ b/hw/bsp/stm32f0/stm32f0xx_hal_conf.h
@@ -15,7 +15,7 @@
   *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
-  */ 
+  */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32F0xx_HAL_CONF_H
@@ -30,9 +30,9 @@
 
 /* ########################## Module Selection ############################## */
 /**
-  * @brief This is the list of modules to be used in the HAL driver 
+  * @brief This is the list of modules to be used in the HAL driver
   */
-#define HAL_MODULE_ENABLED  
+#define HAL_MODULE_ENABLED
 /*#define HAL_ADC_MODULE_ENABLED   */
 /*#define HAL_CAN_MODULE_ENABLED   */
 /*#define HAL_CEC_MODULE_ENABLED   */
@@ -65,15 +65,15 @@
 /**
   * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
+  *        (when HSE is used as system clock source, directly or through the PLL).
   */
-#if !defined  (HSE_VALUE) 
+#if !defined  (HSE_VALUE)
   #define HSE_VALUE            8000000U  /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */
 
 /**
-  * @brief In the following line adjust the External High Speed oscillator (HSE) Startup 
-  *        Timeout value 
+  * @brief In the following line adjust the External High Speed oscillator (HSE) Startup
+  *        Timeout value
   */
 #if !defined  (HSE_STARTUP_TIMEOUT)
   #define HSE_STARTUP_TIMEOUT  100U      /*!< Time out for HSE start up, in ms */
@@ -82,24 +82,24 @@
 /**
   * @brief Internal High Speed oscillator (HSI) value.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
+  *        (when HSI is used as system clock source, directly or through the PLL).
   */
 #if !defined  (HSI_VALUE)
   #define HSI_VALUE            8000000U  /*!< Value of the Internal oscillator in Hz*/
 #endif /* HSI_VALUE */
 
 /**
-  * @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup 
-  *        Timeout value 
+  * @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup
+  *        Timeout value
   */
-#if !defined  (HSI_STARTUP_TIMEOUT) 
+#if !defined  (HSI_STARTUP_TIMEOUT)
   #define HSI_STARTUP_TIMEOUT  5000U     /*!< Time out for HSI start up */
-#endif /* HSI_STARTUP_TIMEOUT */  
+#endif /* HSI_STARTUP_TIMEOUT */
 
 /**
   * @brief Internal High Speed oscillator for ADC (HSI14) value.
   */
-#if !defined  (HSI14_VALUE) 
+#if !defined  (HSI14_VALUE)
   #define HSI14_VALUE          14000000U /*!< Value of the Internal High Speed oscillator for ADC in Hz.
                                              The real value may vary depending on the variations
                                              in voltage and temperature.  */
@@ -108,7 +108,7 @@
 /**
   * @brief Internal High Speed oscillator for USB (HSI48) value.
   */
-#if !defined  (HSI48_VALUE) 
+#if !defined  (HSI48_VALUE)
   #define HSI48_VALUE          48000000U /*!< Value of the Internal High Speed oscillator for USB in Hz.
                                              The real value may vary depending on the variations
                                              in voltage and temperature.  */
@@ -117,8 +117,8 @@
 /**
   * @brief Internal Low Speed oscillator (LSI) value.
   */
-#if !defined  (LSI_VALUE) 
-  #define LSI_VALUE            32000U    
+#if !defined  (LSI_VALUE)
+  #define LSI_VALUE            32000U
 #endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
                                              The real value may vary depending on the variations
                                              in voltage and temperature.  */
@@ -127,7 +127,7 @@
   */
 #if !defined  (LSE_VALUE)
   #define LSE_VALUE            32768U    /*!< Value of the External Low Speed oscillator in Hz */
-#endif /* LSE_VALUE */     
+#endif /* LSE_VALUE */
 
 /**
   * @brief Time out for LSE start up value in ms.
@@ -143,8 +143,8 @@
 /* ########################### System Configuration ######################### */
 /**
   * @brief This is the HAL system configuration section
-  */     
-#define  VDD_VALUE                    3300U  /*!< Value of VDD in mv */           
+  */
+#define  VDD_VALUE                    3300U  /*!< Value of VDD in mv */
 #define  TICK_INT_PRIORITY            ((uint32_t)(1U<<__NVIC_PRIO_BITS) - 1U) /*!< tick interrupt priority (lowest by default)             */
                                                                               /*  Warning: Must be set to higher priority for HAL_Delay()  */
                                                                               /*  and HAL_GetTick() usage under interrupt context          */
@@ -175,14 +175,14 @@
 
 /* ########################## Assert Selection ############################## */
 /**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
   *        HAL drivers code
   */
- #define USE_FULL_ASSERT   1 
+ #define USE_FULL_ASSERT   1
 
 /* Includes ------------------------------------------------------------------*/
 /**
-  * @brief Include module's header file 
+  * @brief Include module's header file
   */
 
 #ifdef HAL_RCC_MODULE_ENABLED
@@ -299,7 +299,7 @@
   * @brief  The assert_param macro is used for function's parameters check.
   * @param  expr If expr is false, it calls assert_failed function
   *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
+  *         line number of the call that failed.
   *         If expr is true, it returns no value.
   * @retval None
   */
@@ -308,8 +308,8 @@
   void assert_failed(const char* file, uint32_t line);
 #else
   #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */    
-    
+#endif /* USE_FULL_ASSERT */
+
 #ifdef __cplusplus
 }
 #endif
@@ -318,4 +318,3 @@
 
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/hw/bsp/stm32f1/boards/stm32f103_bluepill/STM32F103X8_FLASH.ld b/hw/bsp/stm32f1/boards/stm32f103_bluepill/STM32F103X8_FLASH.ld
index c434ca038..95836522e 100644
--- a/hw/bsp/stm32f1/boards/stm32f103_bluepill/STM32F103X8_FLASH.ld
+++ b/hw/bsp/stm32f1/boards/stm32f103_bluepill/STM32F103X8_FLASH.ld
@@ -114,7 +114,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -125,7 +125,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -153,7 +153,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
diff --git a/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.h b/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.h
index 57a607ed5..8fa8f4ffa 100644
--- a/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.h
+++ b/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32f1/boards/stm32f103_mini_2/STM32F103XC_FLASH.ld b/hw/bsp/stm32f1/boards/stm32f103_mini_2/STM32F103XC_FLASH.ld
index da637d1b0..524ac7c03 100644
--- a/hw/bsp/stm32f1/boards/stm32f103_mini_2/STM32F103XC_FLASH.ld
+++ b/hw/bsp/stm32f1/boards/stm32f103_mini_2/STM32F103XC_FLASH.ld
@@ -114,7 +114,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -125,7 +125,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -153,7 +153,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
diff --git a/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.h b/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.h
index bedce7f14..c8dba4268 100644
--- a/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.h
+++ b/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32f1/family.c b/hw/bsp/stm32f1/family.c
index 6f0471096..5e112de70 100644
--- a/hw/bsp/stm32f1/family.c
+++ b/hw/bsp/stm32f1/family.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -53,7 +53,7 @@ void USBWakeUp_IRQHandler(void)
 void board_init(void)
 {
   board_stm32f1_clock_init();
-  
+
   // Enable All GPIOs clocks
   __HAL_RCC_GPIOA_CLK_ENABLE();
   __HAL_RCC_GPIOB_CLK_ENABLE();
@@ -70,7 +70,7 @@ void board_init(void)
   NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
   NVIC_SetPriority(USBWakeUp_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
 #endif
-  
+
   // LED
   GPIO_InitTypeDef  GPIO_InitStruct;
   GPIO_InitStruct.Pin = LED_PIN;
@@ -153,7 +153,7 @@ void HardFault_Handler (void)
   * @retval None
   */
 void assert_failed(const char *file, uint32_t line)
-{ 
+{
   /* USER CODE BEGIN 6 */
   /* User can add his own implementation to report the file name and line number,
      tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
diff --git a/hw/bsp/stm32f1/stm32f1xx_hal_conf.h b/hw/bsp/stm32f1/stm32f1xx_hal_conf.h
index 5243e5bca..45ef993da 100644
--- a/hw/bsp/stm32f1/stm32f1xx_hal_conf.h
+++ b/hw/bsp/stm32f1/stm32f1xx_hal_conf.h
@@ -32,7 +32,7 @@
 
 /* ########################## Module Selection ############################## */
 /**
-  * @brief This is the list of modules to be used in the HAL driver 
+  * @brief This is the list of modules to be used in the HAL driver
   */
 #define HAL_MODULE_ENABLED
 /* #define HAL_ADC_MODULE_ENABLED */
@@ -69,9 +69,9 @@
 /**
   * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
+  *        (when HSE is used as system clock source, directly or through the PLL).
   */
-#if !defined  (HSE_VALUE) 
+#if !defined  (HSE_VALUE)
 #if defined(USE_STM3210C_EVAL)
   #define HSE_VALUE    25000000U /*!< Value of the External oscillator in Hz */
 #else
@@ -86,7 +86,7 @@
 /**
   * @brief Internal High Speed oscillator (HSI) value.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
+  *        (when HSI is used as system clock source, directly or through the PLL).
   */
 #if !defined  (HSI_VALUE)
   #define HSI_VALUE              8000000U  /*!< Value of the Internal oscillator in Hz */
@@ -95,7 +95,7 @@
 /**
   * @brief Internal Low Speed oscillator (LSI) value.
   */
-#if !defined  (LSI_VALUE) 
+#if !defined  (LSI_VALUE)
  #define LSI_VALUE               40000U    /*!< LSI Typical Value in Hz */
 #endif /* LSI_VALUE */                     /*!< Value of the Internal Low Speed oscillator in Hz
                                                 The real value may vary depending on the variations
@@ -119,7 +119,7 @@
 /* ########################### System Configuration ######################### */
 /**
   * @brief This is the HAL system configuration section
-  */     
+  */
 #define  VDD_VALUE                    3300U /*!< Value of VDD in mv */
 #define  TICK_INT_PRIORITY            0x00U /*!< tick interrupt priority */
 #define  USE_RTOS                     0U
@@ -151,7 +151,7 @@
 
 /* ########################## Assert Selection ############################## */
 /**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
   *        HAL drivers code
   */
 /* #define USE_FULL_ASSERT    1U */
@@ -168,7 +168,7 @@
 #define MAC_ADDR4   0U
 #define MAC_ADDR5   0U
 
-/* Definition of the Ethernet driver buffers size and count */   
+/* Definition of the Ethernet driver buffers size and count */
 #define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
 #define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
 #define ETH_RXBUFNB                    8U                  /* 8 Rx buffers of size ETH_RX_BUF_SIZE  */
@@ -176,9 +176,9 @@
 
 /* Section 2: PHY configuration section */
 
-/* DP83848 PHY Address*/ 
+/* DP83848 PHY Address*/
 #define DP83848_PHY_ADDRESS             0x01U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
 #define PHY_RESET_DELAY                 0x000000FFU
 /* PHY Configuration delay */
 #define PHY_CONFIG_DELAY                0x00000FFFU
@@ -190,7 +190,7 @@
 
 #define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
 #define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
- 
+
 #define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
 #define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
 #define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
@@ -205,13 +205,13 @@
 #define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
 #define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
 #define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-  
+
 /* Section 4: Extended PHY Registers */
 
 #define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
 #define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
 #define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
- 
+
 #define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
 #define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
 #define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
@@ -233,7 +233,7 @@
 
 /* Includes ------------------------------------------------------------------*/
 /**
-  * @brief Include module's header file 
+  * @brief Include module's header file
   */
 
 #ifdef HAL_RCC_MODULE_ENABLED
@@ -243,7 +243,7 @@
 #ifdef HAL_GPIO_MODULE_ENABLED
  #include "stm32f1xx_hal_gpio.h"
 #endif /* HAL_GPIO_MODULE_ENABLED */
-   
+
 #ifdef HAL_EXTI_MODULE_ENABLED
   #include "stm32f1xx_hal_exti.h"
 #endif /* HAL_EXTI_MODULE_ENABLED */
@@ -251,7 +251,7 @@
 #ifdef HAL_DMA_MODULE_ENABLED
   #include "stm32f1xx_hal_dma.h"
 #endif /* HAL_DMA_MODULE_ENABLED */
-   
+
 #ifdef HAL_CAN_MODULE_ENABLED
  #include "stm32f1xx_hal_can.h"
 #endif /* HAL_CAN_MODULE_ENABLED */
@@ -310,15 +310,15 @@
 
 #ifdef HAL_PCCARD_MODULE_ENABLED
  #include "stm32f1xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */ 
+#endif /* HAL_PCCARD_MODULE_ENABLED */
 
 #ifdef HAL_SD_MODULE_ENABLED
  #include "stm32f1xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */  
+#endif /* HAL_SD_MODULE_ENABLED */
 
 #ifdef HAL_SDRAM_MODULE_ENABLED
  #include "stm32f1xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */     
+#endif /* HAL_SDRAM_MODULE_ENABLED */
 
 #ifdef HAL_SPI_MODULE_ENABLED
  #include "stm32f1xx_hal_spi.h"
@@ -358,7 +358,7 @@
   * @brief  The assert_param macro is used for function's parameters check.
   * @param  expr: If expr is false, it calls assert_failed function
   *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
+  *         line number of the call that failed.
   *         If expr is true, it returns no value.
   * @retval None
   */
@@ -367,8 +367,8 @@
   void assert_failed(const char* file, uint32_t line);
 #else
   #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */    
-    
+#endif /* USE_FULL_ASSERT */
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld b/hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld
index 5010435ae..3fce1b578 100644
--- a/hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld
+++ b/hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld
@@ -114,7 +114,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -125,7 +125,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -153,7 +153,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -165,5 +165,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32f207nucleo/stm32f207nucleo.c b/hw/bsp/stm32f207nucleo/stm32f207nucleo.c
index d77643661..80f762c93 100644
--- a/hw/bsp/stm32f207nucleo/stm32f207nucleo.c
+++ b/hw/bsp/stm32f207nucleo/stm32f207nucleo.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -105,7 +105,7 @@ void SystemClock_Config(void)
 void board_init(void)
 {
   SystemClock_Config();
-  
+
   #if CFG_TUSB_OS  == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
diff --git a/hw/bsp/stm32f207nucleo/stm32f2xx_hal_conf.h b/hw/bsp/stm32f207nucleo/stm32f2xx_hal_conf.h
index 2ab46b260..b38a9d951 100644
--- a/hw/bsp/stm32f207nucleo/stm32f2xx_hal_conf.h
+++ b/hw/bsp/stm32f207nucleo/stm32f2xx_hal_conf.h
@@ -15,7 +15,7 @@
   *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
-  */ 
+  */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32F2xx_HAL_CONF_H
@@ -30,9 +30,9 @@
 
 /* ########################## Module Selection ############################## */
 /**
-  * @brief This is the list of modules to be used in the HAL driver 
+  * @brief This is the list of modules to be used in the HAL driver
   */
-#define HAL_MODULE_ENABLED  
+#define HAL_MODULE_ENABLED
 /* #define HAL_ADC_MODULE_ENABLED   */
 /* #define HAL_CAN_MODULE_ENABLED   */
 /* #define HAL_CRC_MODULE_ENABLED   */
@@ -42,7 +42,7 @@
 /* #define HAL_DMA_MODULE_ENABLED */
 /* #define HAL_ETH_MODULE_ENABLED */
 #define HAL_EXTI_MODULE_ENABLED
-#define HAL_FLASH_MODULE_ENABLED 
+#define HAL_FLASH_MODULE_ENABLED
 /* #define HAL_NAND_MODULE_ENABLED */
 /* #define HAL_NOR_MODULE_ENABLED */
 /* #define HAL_PCCARD_MODULE_ENABLED */
@@ -52,8 +52,8 @@
 /* #define HAL_I2C_MODULE_ENABLED */
 /* #define HAL_I2S_MODULE_ENABLED    */
 /* #define HAL_IWDG_MODULE_ENABLED  */
-#define HAL_PWR_MODULE_ENABLED   
-#define HAL_RCC_MODULE_ENABLED 
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
 /* #define HAL_RNG_MODULE_ENABLED    */
 /* #define HAL_RTC_MODULE_ENABLED */
 /* #define HAL_SD_MODULE_ENABLED   */
@@ -65,7 +65,7 @@
 /* #define HAL_SMARTCARD_MODULE_ENABLED  */
 /* #define HAL_WWDG_MODULE_ENABLED   */
 #define HAL_CORTEX_MODULE_ENABLED
-#define HAL_PCD_MODULE_ENABLED 
+#define HAL_PCD_MODULE_ENABLED
 /* #define HAL_HCD_MODULE_ENABLED */
 
 
@@ -73,9 +73,9 @@
 /**
   * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
+  *        (when HSE is used as system clock source, directly or through the PLL).
   */
-#if !defined  (HSE_VALUE) 
+#if !defined  (HSE_VALUE)
   #define HSE_VALUE                     8000000U       /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */
 
@@ -86,7 +86,7 @@
 /**
   * @brief Internal High Speed oscillator (HSI) value.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
+  *        (when HSI is used as system clock source, directly or through the PLL).
   */
 #if !defined  (HSI_VALUE)
   #define HSI_VALUE                    16000000U       /*!< Value of the Internal oscillator in Hz*/
@@ -95,7 +95,7 @@
 /**
   * @brief Internal Low Speed oscillator (LSI) value.
   */
-#if !defined  (LSI_VALUE) 
+#if !defined  (LSI_VALUE)
  #define LSI_VALUE                        32000U       /*!< LSI Typical Value in Hz*/
 #endif /* LSI_VALUE */                                 /*!< Value of the Internal Low Speed oscillator in Hz
                                                             The real value may vary depending on the variations
@@ -113,8 +113,8 @@
 
 /**
   * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source 
-  *        frequency, this source is inserted directly through I2S_CKIN pad. 
+  *        This value is used by the I2S HAL module to compute the I2S clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
   */
 #if !defined  (EXTERNAL_CLOCK_VALUE)
   #define EXTERNAL_CLOCK_VALUE       12288000U        /*!< Value of the Internal oscillator in Hz*/
@@ -126,7 +126,7 @@
 /* ########################### System Configuration ######################### */
 /**
   * @brief This is the HAL system configuration section
-  */     
+  */
 #define  VDD_VALUE                      3300U /*!< Value of VDD in mv */
 #define  TICK_INT_PRIORITY              0x0FU /*!< tick interrupt priority */
 #define  USE_RTOS                          0U
@@ -163,7 +163,7 @@
 
 /* ########################## Assert Selection ############################## */
 /**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
   *        HAL drivers code
   */
 /* #define USE_FULL_ASSERT    1U */
@@ -180,7 +180,7 @@
 #define MAC_ADDR4                         0U
 #define MAC_ADDR5                         0U
 
-/* Definition of the Ethernet driver buffers size and count */   
+/* Definition of the Ethernet driver buffers size and count */
 #define ETH_RX_BUF_SIZE                   ETH_MAX_PACKET_SIZE /* buffer size for receive               */
 #define ETH_TX_BUF_SIZE                   ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
 #define ETH_RXBUFNB                       5U       /* 5 Rx buffers of size ETH_RX_BUF_SIZE  */
@@ -190,7 +190,7 @@
 
 /* LAN8742A PHY Address*/
 #define LAN8742A_PHY_ADDRESS            0x00U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
 #define PHY_RESET_DELAY                 0x000000FFU
 /* PHY Configuration delay */
 #define PHY_CONFIG_DELAY                0x00000FFFU
@@ -202,7 +202,7 @@
 
 #define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
 #define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
- 
+
 #define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
 #define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
 #define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
@@ -217,7 +217,7 @@
 #define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
 #define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
 #define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-  
+
 /* Section 4: Extended PHY Registers */
 
 #define PHY_SR                          ((uint16_t)0x1F)    /*!< PHY special control/ status register Offset     */
@@ -228,7 +228,7 @@
 
 #define PHY_ISFR                        ((uint16_t)0x1D)    /*!< PHY Interrupt Source Flag register Offset       */
 #define PHY_ISFR_INT4                   ((uint16_t)0x0010)  /*!< PHY Link down inturrupt                         */
- 
+
 /* ################## SPI peripheral configuration ########################## */
 
 /* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
@@ -240,7 +240,7 @@
 
 /* Includes ------------------------------------------------------------------*/
 /**
-  * @brief Include module's header file 
+  * @brief Include module's header file
   */
 
 #ifdef HAL_RCC_MODULE_ENABLED
@@ -258,7 +258,7 @@
 #ifdef HAL_DMA_MODULE_ENABLED
   #include "stm32f2xx_hal_dma.h"
 #endif /* HAL_DMA_MODULE_ENABLED */
-   
+
 #ifdef HAL_CORTEX_MODULE_ENABLED
   #include "stm32f2xx_hal_cortex.h"
 #endif /* HAL_CORTEX_MODULE_ENABLED */
@@ -276,7 +276,7 @@
 #endif /* HAL_CRC_MODULE_ENABLED */
 
 #ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f2xx_hal_cryp.h" 
+  #include "stm32f2xx_hal_cryp.h"
 #endif /* HAL_CRYP_MODULE_ENABLED */
 
 #ifdef HAL_DAC_MODULE_ENABLED
@@ -294,7 +294,7 @@
 #ifdef HAL_FLASH_MODULE_ENABLED
   #include "stm32f2xx_hal_flash.h"
 #endif /* HAL_FLASH_MODULE_ENABLED */
- 
+
 #ifdef HAL_SRAM_MODULE_ENABLED
   #include "stm32f2xx_hal_sram.h"
 #endif /* HAL_SRAM_MODULE_ENABLED */
@@ -309,7 +309,7 @@
 
 #ifdef HAL_PCCARD_MODULE_ENABLED
   #include "stm32f2xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */ 
+#endif /* HAL_PCCARD_MODULE_ENABLED */
 
 #ifdef HAL_HASH_MODULE_ENABLED
  #include "stm32f2xx_hal_hash.h"
@@ -378,14 +378,14 @@
 #ifdef HAL_HCD_MODULE_ENABLED
  #include "stm32f2xx_hal_hcd.h"
 #endif /* HAL_HCD_MODULE_ENABLED */
-   
+
 /* Exported macro ------------------------------------------------------------*/
 #ifdef  USE_FULL_ASSERT
 /**
   * @brief  The assert_param macro is used for function's parameters check.
   * @param  expr: If expr is false, it calls assert_failed function
   *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
+  *         line number of the call that failed.
   *         If expr is true, it returns no value.
   * @retval None
   */
@@ -402,6 +402,6 @@
 #endif
 
 #endif /* __STM32F2xx_HAL_CONF_H */
- 
+
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld b/hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld
index 7f46c71b2..981107af1 100644
--- a/hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld
+++ b/hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld
@@ -115,7 +115,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -128,11 +128,11 @@ SECTIONS
 
   _siccmram = LOADADDR(.ccmram);
 
-  /* CCM-RAM section 
-  * 
-  * IMPORTANT NOTE! 
+  /* CCM-RAM section
+  *
+  * IMPORTANT NOTE!
   * If initialized variables will be placed in this section,
-  * the startup code needs to be modified to copy the init-values.  
+  * the startup code needs to be modified to copy the init-values.
   */
   .ccmram :
   {
@@ -140,12 +140,12 @@ SECTIONS
     _sccmram = .;       /* create a global symbol at ccmram start */
     *(.ccmram)
     *(.ccmram*)
-    
+
     . = ALIGN(4);
     _eccmram = .;       /* create a global symbol at ccmram end */
   } >CCMRAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -173,7 +173,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -185,5 +185,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32f303disco/stm32f303disco.c b/hw/bsp/stm32f303disco/stm32f303disco.c
index 940c49d26..ac9bda983 100644
--- a/hw/bsp/stm32f303disco/stm32f303disco.c
+++ b/hw/bsp/stm32f303disco/stm32f303disco.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32f303disco/stm32f3xx_hal_conf.h b/hw/bsp/stm32f303disco/stm32f3xx_hal_conf.h
index 0abcbb019..82d3765af 100644
--- a/hw/bsp/stm32f303disco/stm32f3xx_hal_conf.h
+++ b/hw/bsp/stm32f303disco/stm32f3xx_hal_conf.h
@@ -15,7 +15,7 @@
   *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
-  */ 
+  */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32F3xx_HAL_CONF_H
@@ -30,9 +30,9 @@
 
 /* ########################## Module Selection ############################## */
 /**
-  * @brief This is the list of modules to be used in the HAL driver 
+  * @brief This is the list of modules to be used in the HAL driver
   */
-#define HAL_MODULE_ENABLED  
+#define HAL_MODULE_ENABLED
 /* #define HAL_ADC_MODULE_ENABLED */
 /* #define HAL_CAN_MODULE_ENABLED */
 /* #define HAL_CAN_LEGACY_MODULE_ENABLED */
@@ -57,7 +57,7 @@
 /* #define HAL_OPAMP_MODULE_ENABLED */
 /* #define HAL_PCD_MODULE_ENABLED */
 /* #define HAL_PWR_MODULE_ENABLED */
-#define HAL_RCC_MODULE_ENABLED 
+#define HAL_RCC_MODULE_ENABLED
 /* #define HAL_RTC_MODULE_ENABLED */
 /* #define HAL_SDADC_MODULE_ENABLED */
 /* #define HAL_SMARTCARD_MODULE_ENABLED */
@@ -73,15 +73,15 @@
 /**
   * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
+  *        (when HSE is used as system clock source, directly or through the PLL).
   */
-#if !defined  (HSE_VALUE) 
+#if !defined  (HSE_VALUE)
   #define HSE_VALUE    (8000000U) /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */
 
 /**
-  * @brief In the following line adjust the External High Speed oscillator (HSE) Startup 
-  *        Timeout value 
+  * @brief In the following line adjust the External High Speed oscillator (HSE) Startup
+  *        Timeout value
   */
 #if !defined  (HSE_STARTUP_TIMEOUT)
   #define HSE_STARTUP_TIMEOUT    (100U)   /*!< Time out for HSE start up, in ms */
@@ -90,25 +90,25 @@
 /**
   * @brief Internal High Speed oscillator (HSI) value.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
+  *        (when HSI is used as system clock source, directly or through the PLL).
   */
 #if !defined  (HSI_VALUE)
   #define HSI_VALUE    (8000000U) /*!< Value of the Internal oscillator in Hz*/
 #endif /* HSI_VALUE */
 
 /**
-  * @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup 
-  *        Timeout value 
+  * @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup
+  *        Timeout value
   */
-#if !defined  (HSI_STARTUP_TIMEOUT) 
+#if !defined  (HSI_STARTUP_TIMEOUT)
  #define HSI_STARTUP_TIMEOUT   (5000U) /*!< Time out for HSI start up */
-#endif /* HSI_STARTUP_TIMEOUT */  
+#endif /* HSI_STARTUP_TIMEOUT */
 
 /**
   * @brief Internal Low Speed oscillator (LSI) value.
   */
-#if !defined  (LSI_VALUE) 
- #define LSI_VALUE  (40000U)    
+#if !defined  (LSI_VALUE)
+ #define LSI_VALUE  (40000U)
 #endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
                                              The real value may vary depending on the variations
                                              in voltage and temperature.  */
@@ -124,11 +124,11 @@
   */
 #if !defined  (LSE_STARTUP_TIMEOUT)
   #define LSE_STARTUP_TIMEOUT    (5000U)   /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */     
+#endif /* LSE_STARTUP_TIMEOUT */
 
 /**
   * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source 
+  *        This value is used by the I2S HAL module to compute the I2S clock source
   *        frequency, this source is inserted directly through I2S_CKIN pad.
   *        - External clock generated through external PLL component on EVAL 303 (based on MCO or crystal)
   *        - External clock not generated on EVAL 373
@@ -256,8 +256,8 @@
 
 #ifdef HAL_PCCARD_MODULE_ENABLED
   #include "stm32f3xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */ 
-  
+#endif /* HAL_PCCARD_MODULE_ENABLED */
+
 #ifdef HAL_HRTIM_MODULE_ENABLED
  #include "stm32f3xx_hal_hrtim.h"
 #endif /* HAL_HRTIM_MODULE_ENABLED */
diff --git a/hw/bsp/stm32f4/boards/feather_stm32f405/STM32F405RGTx_FLASH.ld b/hw/bsp/stm32f4/boards/feather_stm32f405/STM32F405RGTx_FLASH.ld
index 9eb53bcc0..0dc2879a4 100644
--- a/hw/bsp/stm32f4/boards/feather_stm32f405/STM32F405RGTx_FLASH.ld
+++ b/hw/bsp/stm32f4/boards/feather_stm32f405/STM32F405RGTx_FLASH.ld
@@ -115,7 +115,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -128,11 +128,11 @@ SECTIONS
 
   _siccmram = LOADADDR(.ccmram);
 
-  /* CCM-RAM section 
-  * 
-  * IMPORTANT NOTE! 
+  /* CCM-RAM section
+  *
+  * IMPORTANT NOTE!
   * If initialized variables will be placed in this section,
-  * the startup code needs to be modified to copy the init-values.  
+  * the startup code needs to be modified to copy the init-values.
   */
   .ccmram :
   {
@@ -140,12 +140,12 @@ SECTIONS
     _sccmram = .;       /* create a global symbol at ccmram start */
     *(.ccmram)
     *(.ccmram*)
-    
+
     . = ALIGN(4);
     _eccmram = .;       /* create a global symbol at ccmram end */
   } >CCMRAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -173,7 +173,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -185,5 +185,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32f4/boards/feather_stm32f405/board.h b/hw/bsp/stm32f4/boards/feather_stm32f405/board.h
index 19d0a1ea4..d1ad2a6ce 100644
--- a/hw/bsp/stm32f4/boards/feather_stm32f405/board.h
+++ b/hw/bsp/stm32f4/boards/feather_stm32f405/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32f4/boards/pyboardv11/STM32F405RGTx_FLASH.ld b/hw/bsp/stm32f4/boards/pyboardv11/STM32F405RGTx_FLASH.ld
index 9eb53bcc0..0dc2879a4 100644
--- a/hw/bsp/stm32f4/boards/pyboardv11/STM32F405RGTx_FLASH.ld
+++ b/hw/bsp/stm32f4/boards/pyboardv11/STM32F405RGTx_FLASH.ld
@@ -115,7 +115,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -128,11 +128,11 @@ SECTIONS
 
   _siccmram = LOADADDR(.ccmram);
 
-  /* CCM-RAM section 
-  * 
-  * IMPORTANT NOTE! 
+  /* CCM-RAM section
+  *
+  * IMPORTANT NOTE!
   * If initialized variables will be placed in this section,
-  * the startup code needs to be modified to copy the init-values.  
+  * the startup code needs to be modified to copy the init-values.
   */
   .ccmram :
   {
@@ -140,12 +140,12 @@ SECTIONS
     _sccmram = .;       /* create a global symbol at ccmram start */
     *(.ccmram)
     *(.ccmram*)
-    
+
     . = ALIGN(4);
     _eccmram = .;       /* create a global symbol at ccmram end */
   } >CCMRAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -173,7 +173,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -185,5 +185,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32f4/boards/pyboardv11/board.h b/hw/bsp/stm32f4/boards/pyboardv11/board.h
index 685919c57..c126f0666 100644
--- a/hw/bsp/stm32f4/boards/pyboardv11/board.h
+++ b/hw/bsp/stm32f4/boards/pyboardv11/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32f4/boards/stm32f401blackpill/STM32F401VCTx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f401blackpill/STM32F401VCTx_FLASH.ld
index 2bc5f6c14..b91f456ca 100644
--- a/hw/bsp/stm32f4/boards/stm32f401blackpill/STM32F401VCTx_FLASH.ld
+++ b/hw/bsp/stm32f4/boards/stm32f401blackpill/STM32F401VCTx_FLASH.ld
@@ -114,7 +114,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -125,7 +125,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -153,7 +153,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -165,5 +165,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h b/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h
index e1fef7277..e6c99a462 100644
--- a/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32f4/boards/stm32f401blackpill/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f401blackpill/stm32f4xx_hal_conf.h
index 2ab9a1d57..16f081cfb 100644
--- a/hw/bsp/stm32f4/boards/stm32f401blackpill/stm32f4xx_hal_conf.h
+++ b/hw/bsp/stm32f4/boards/stm32f401blackpill/stm32f4xx_hal_conf.h
@@ -15,7 +15,7 @@
   *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
-  */ 
+  */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32F4xx_HAL_CONF_H
@@ -30,38 +30,38 @@
 
 /* ########################## Module Selection ############################## */
 /**
-  * @brief This is the list of modules to be used in the HAL driver 
+  * @brief This is the list of modules to be used in the HAL driver
   */
-#define HAL_MODULE_ENABLED         
+#define HAL_MODULE_ENABLED
 /* #define HAL_ADC_MODULE_ENABLED      */
 /* #define HAL_CAN_MODULE_ENABLED      */
 /* #define HAL_CAN_LEGACY_MODULE_ENABLED      */
-/* #define HAL_CRC_MODULE_ENABLED      */ 
-/* #define HAL_CEC_MODULE_ENABLED      */ 
-/* #define HAL_CRYP_MODULE_ENABLED     */ 
-/* #define HAL_DAC_MODULE_ENABLED      */ 
-/* #define HAL_DCMI_MODULE_ENABLED     */ 
-#define HAL_DMA_MODULE_ENABLED 
-/* #define HAL_DMA2D_MODULE_ENABLED    */ 
+/* #define HAL_CRC_MODULE_ENABLED      */
+/* #define HAL_CEC_MODULE_ENABLED      */
+/* #define HAL_CRYP_MODULE_ENABLED     */
+/* #define HAL_DAC_MODULE_ENABLED      */
+/* #define HAL_DCMI_MODULE_ENABLED     */
+#define HAL_DMA_MODULE_ENABLED
+/* #define HAL_DMA2D_MODULE_ENABLED    */
 /* #define HAL_ETH_MODULE_ENABLED      */
-#define HAL_FLASH_MODULE_ENABLED 
+#define HAL_FLASH_MODULE_ENABLED
 /* #define HAL_NAND_MODULE_ENABLED     */
 /* #define HAL_NOR_MODULE_ENABLED      */
 /* #define HAL_PCCARD_MODULE_ENABLED   */
 /* #define HAL_SRAM_MODULE_ENABLED     */
 /* #define HAL_SDRAM_MODULE_ENABLED    */
-/* #define HAL_HASH_MODULE_ENABLED     */  
+/* #define HAL_HASH_MODULE_ENABLED     */
 #define HAL_GPIO_MODULE_ENABLED
 /* #define HAL_EXTI_MODULE_ENABLED     */
 /* #define HAL_I2C_MODULE_ENABLED      */
 /* #define HAL_SMBUS_MODULE_ENABLED    */
 /* #define HAL_I2S_MODULE_ENABLED      */
-/* #define HAL_IWDG_MODULE_ENABLED     */ 
+/* #define HAL_IWDG_MODULE_ENABLED     */
 /* #define HAL_LTDC_MODULE_ENABLED     */
 /* #define HAL_DSI_MODULE_ENABLED      */
 #define HAL_PWR_MODULE_ENABLED
 /* #define HAL_QSPI_MODULE_ENABLED     */
-#define HAL_RCC_MODULE_ENABLED      
+#define HAL_RCC_MODULE_ENABLED
 /* #define HAL_RNG_MODULE_ENABLED      */
 /* #define HAL_RTC_MODULE_ENABLED      */
 /* #define HAL_SAI_MODULE_ENABLED      */
@@ -69,11 +69,11 @@
 // #define HAL_SPI_MODULE_ENABLED
 /* #define HAL_TIM_MODULE_ENABLED      */
 #define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED    */ 
+/* #define HAL_USART_MODULE_ENABLED    */
 /* #define HAL_IRDA_MODULE_ENABLED     */
 /* #define HAL_SMARTCARD_MODULE_ENABLED */
 /* #define HAL_WWDG_MODULE_ENABLED     */
-#define HAL_CORTEX_MODULE_ENABLED   
+#define HAL_CORTEX_MODULE_ENABLED
 /* #define HAL_PCD_MODULE_ENABLED      */
 /* #define HAL_HCD_MODULE_ENABLED      */
 /* #define HAL_FMPI2C_MODULE_ENABLED   */
@@ -86,9 +86,9 @@
 /**
   * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
+  *        (when HSE is used as system clock source, directly or through the PLL).
   */
-#if !defined  (HSE_VALUE) 
+#if !defined  (HSE_VALUE)
   #define HSE_VALUE    (25000000U) /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */
 
@@ -99,7 +99,7 @@
 /**
   * @brief Internal High Speed oscillator (HSI) value.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
+  *        (when HSI is used as system clock source, directly or through the PLL).
   */
 #if !defined  (HSI_VALUE)
   #define HSI_VALUE    (16000000U) /*!< Value of the Internal oscillator in Hz*/
@@ -108,8 +108,8 @@
 /**
   * @brief Internal Low Speed oscillator (LSI) value.
   */
-#if !defined  (LSI_VALUE) 
- #define LSI_VALUE  (32000U)    
+#if !defined  (LSI_VALUE)
+ #define LSI_VALUE  (32000U)
 #endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
                                              The real value may vary depending on the variations
                                              in voltage and temperature.  */
@@ -126,8 +126,8 @@
 
 /**
   * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source 
-  *        frequency, this source is inserted directly through I2S_CKIN pad. 
+  *        This value is used by the I2S HAL module to compute the I2S clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
   */
 #if !defined  (EXTERNAL_CLOCK_VALUE)
   #define EXTERNAL_CLOCK_VALUE    (12288000U) /*!< Value of the External oscillator in Hz*/
@@ -139,9 +139,9 @@
 /* ########################### System Configuration ######################### */
 /**
   * @brief This is the HAL system configuration section
-  */     
+  */
 #define  VDD_VALUE                    (3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */           
+#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */
 #define  USE_RTOS                     0U
 #define  PREFETCH_ENABLE              1U
 #define  INSTRUCTION_CACHE_ENABLE     1U
@@ -188,7 +188,7 @@
 
 /* ########################## Assert Selection ############################## */
 /**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
   *        HAL drivers code
   */
 /* #define USE_FULL_ASSERT    1U */
@@ -205,7 +205,7 @@
 #define MAC_ADDR4   0U
 #define MAC_ADDR5   0U
 
-/* Definition of the Ethernet driver buffers size and count */   
+/* Definition of the Ethernet driver buffers size and count */
 #define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
 #define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
 #define ETH_RXBUFNB                    4U                  /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
@@ -213,9 +213,9 @@
 
 /* Section 2: PHY configuration section */
 
-/* DP83848 PHY Address*/ 
+/* DP83848 PHY Address*/
 #define DP83848_PHY_ADDRESS             0x01U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
 #define PHY_RESET_DELAY                 0x000000FFU
 /* PHY Configuration delay */
 #define PHY_CONFIG_DELAY                0x00000FFFU
@@ -227,7 +227,7 @@
 
 #define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
 #define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
- 
+
 #define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
 #define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
 #define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
@@ -242,13 +242,13 @@
 #define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
 #define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
 #define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-  
+
 /* Section 4: Extended PHY Registers */
 
 #define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
 #define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
 #define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
- 
+
 #define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
 #define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
 #define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
@@ -270,7 +270,7 @@
 
 /* Includes ------------------------------------------------------------------*/
 /**
-  * @brief Include module's header file 
+  * @brief Include module's header file
   */
 
 #ifdef HAL_RCC_MODULE_ENABLED
@@ -288,7 +288,7 @@
 #ifdef HAL_DMA_MODULE_ENABLED
   #include "stm32f4xx_hal_dma.h"
 #endif /* HAL_DMA_MODULE_ENABLED */
-   
+
 #ifdef HAL_CORTEX_MODULE_ENABLED
   #include "stm32f4xx_hal_cortex.h"
 #endif /* HAL_CORTEX_MODULE_ENABLED */
@@ -310,7 +310,7 @@
 #endif /* HAL_CRC_MODULE_ENABLED */
 
 #ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h" 
+  #include "stm32f4xx_hal_cryp.h"
 #endif /* HAL_CRYP_MODULE_ENABLED */
 
 #ifdef HAL_DMA2D_MODULE_ENABLED
@@ -332,7 +332,7 @@
 #ifdef HAL_FLASH_MODULE_ENABLED
   #include "stm32f4xx_hal_flash.h"
 #endif /* HAL_FLASH_MODULE_ENABLED */
- 
+
 #ifdef HAL_SRAM_MODULE_ENABLED
   #include "stm32f4xx_hal_sram.h"
 #endif /* HAL_SRAM_MODULE_ENABLED */
@@ -347,11 +347,11 @@
 
 #ifdef HAL_PCCARD_MODULE_ENABLED
   #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */ 
-  
+#endif /* HAL_PCCARD_MODULE_ENABLED */
+
 #ifdef HAL_SDRAM_MODULE_ENABLED
   #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */      
+#endif /* HAL_SDRAM_MODULE_ENABLED */
 
 #ifdef HAL_HASH_MODULE_ENABLED
  #include "stm32f4xx_hal_hash.h"
@@ -432,7 +432,7 @@
 #ifdef HAL_HCD_MODULE_ENABLED
  #include "stm32f4xx_hal_hcd.h"
 #endif /* HAL_HCD_MODULE_ENABLED */
-   
+
 #ifdef HAL_DSI_MODULE_ENABLED
  #include "stm32f4xx_hal_dsi.h"
 #endif /* HAL_DSI_MODULE_ENABLED */
@@ -471,7 +471,7 @@
   * @brief  The assert_param macro is used for function's parameters check.
   * @param  expr If expr is false, it calls assert_failed function
   *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
+  *         line number of the call that failed.
   *         If expr is true, it returns no value.
   * @retval None
   */
diff --git a/hw/bsp/stm32f4/boards/stm32f407disco/STM32F407VGTx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f407disco/STM32F407VGTx_FLASH.ld
index aac6577ea..549787945 100644
--- a/hw/bsp/stm32f4/boards/stm32f407disco/STM32F407VGTx_FLASH.ld
+++ b/hw/bsp/stm32f4/boards/stm32f407disco/STM32F407VGTx_FLASH.ld
@@ -115,7 +115,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -128,11 +128,11 @@ SECTIONS
 
   _siccmram = LOADADDR(.ccmram);
 
-  /* CCM-RAM section 
-  * 
-  * IMPORTANT NOTE! 
+  /* CCM-RAM section
+  *
+  * IMPORTANT NOTE!
   * If initialized variables will be placed in this section,
-  * the startup code needs to be modified to copy the init-values.  
+  * the startup code needs to be modified to copy the init-values.
   */
   .ccmram :
   {
@@ -140,12 +140,12 @@ SECTIONS
     _sccmram = .;       /* create a global symbol at ccmram start */
     *(.ccmram)
     *(.ccmram*)
-    
+
     . = ALIGN(4);
     _eccmram = .;       /* create a global symbol at ccmram end */
   } >CCMRAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -173,7 +173,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -185,5 +185,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32f4/boards/stm32f407disco/board.h b/hw/bsp/stm32f4/boards/stm32f407disco/board.h
index 693e0393f..c38f354ce 100644
--- a/hw/bsp/stm32f4/boards/stm32f407disco/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f407disco/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32f4/boards/stm32f407disco/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f407disco/stm32f4xx_hal_conf.h
index 7864f8d5f..e24e782ea 100644
--- a/hw/bsp/stm32f4/boards/stm32f407disco/stm32f4xx_hal_conf.h
+++ b/hw/bsp/stm32f4/boards/stm32f407disco/stm32f4xx_hal_conf.h
@@ -15,7 +15,7 @@
   *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
-  */ 
+  */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32F4xx_HAL_CONF_H
@@ -30,38 +30,38 @@
 
 /* ########################## Module Selection ############################## */
 /**
-  * @brief This is the list of modules to be used in the HAL driver 
+  * @brief This is the list of modules to be used in the HAL driver
   */
-#define HAL_MODULE_ENABLED         
+#define HAL_MODULE_ENABLED
 /* #define HAL_ADC_MODULE_ENABLED      */
 /* #define HAL_CAN_MODULE_ENABLED      */
 /* #define HAL_CAN_LEGACY_MODULE_ENABLED      */
-/* #define HAL_CRC_MODULE_ENABLED      */ 
-/* #define HAL_CEC_MODULE_ENABLED      */ 
-/* #define HAL_CRYP_MODULE_ENABLED     */ 
-/* #define HAL_DAC_MODULE_ENABLED      */ 
-/* #define HAL_DCMI_MODULE_ENABLED     */ 
-#define HAL_DMA_MODULE_ENABLED 
-/* #define HAL_DMA2D_MODULE_ENABLED    */ 
+/* #define HAL_CRC_MODULE_ENABLED      */
+/* #define HAL_CEC_MODULE_ENABLED      */
+/* #define HAL_CRYP_MODULE_ENABLED     */
+/* #define HAL_DAC_MODULE_ENABLED      */
+/* #define HAL_DCMI_MODULE_ENABLED     */
+#define HAL_DMA_MODULE_ENABLED
+/* #define HAL_DMA2D_MODULE_ENABLED    */
 /* #define HAL_ETH_MODULE_ENABLED      */
-#define HAL_FLASH_MODULE_ENABLED 
+#define HAL_FLASH_MODULE_ENABLED
 /* #define HAL_NAND_MODULE_ENABLED     */
 /* #define HAL_NOR_MODULE_ENABLED      */
 /* #define HAL_PCCARD_MODULE_ENABLED   */
 /* #define HAL_SRAM_MODULE_ENABLED     */
 /* #define HAL_SDRAM_MODULE_ENABLED    */
-/* #define HAL_HASH_MODULE_ENABLED     */  
+/* #define HAL_HASH_MODULE_ENABLED     */
 #define HAL_GPIO_MODULE_ENABLED
 /* #define HAL_EXTI_MODULE_ENABLED     */
 /* #define HAL_I2C_MODULE_ENABLED      */
 /* #define HAL_SMBUS_MODULE_ENABLED    */
 /* #define HAL_I2S_MODULE_ENABLED      */
-/* #define HAL_IWDG_MODULE_ENABLED     */ 
+/* #define HAL_IWDG_MODULE_ENABLED     */
 /* #define HAL_LTDC_MODULE_ENABLED     */
 /* #define HAL_DSI_MODULE_ENABLED      */
 #define HAL_PWR_MODULE_ENABLED
 /* #define HAL_QSPI_MODULE_ENABLED     */
-#define HAL_RCC_MODULE_ENABLED      
+#define HAL_RCC_MODULE_ENABLED
 /* #define HAL_RNG_MODULE_ENABLED      */
 /* #define HAL_RTC_MODULE_ENABLED      */
 /* #define HAL_SAI_MODULE_ENABLED      */
@@ -69,11 +69,11 @@
 // #define HAL_SPI_MODULE_ENABLED
 /* #define HAL_TIM_MODULE_ENABLED      */
 #define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED    */ 
+/* #define HAL_USART_MODULE_ENABLED    */
 /* #define HAL_IRDA_MODULE_ENABLED     */
 /* #define HAL_SMARTCARD_MODULE_ENABLED */
 /* #define HAL_WWDG_MODULE_ENABLED     */
-#define HAL_CORTEX_MODULE_ENABLED   
+#define HAL_CORTEX_MODULE_ENABLED
 /* #define HAL_PCD_MODULE_ENABLED      */
 /* #define HAL_HCD_MODULE_ENABLED      */
 /* #define HAL_FMPI2C_MODULE_ENABLED   */
@@ -86,9 +86,9 @@
 /**
   * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
+  *        (when HSE is used as system clock source, directly or through the PLL).
   */
-#if !defined  (HSE_VALUE) 
+#if !defined  (HSE_VALUE)
   #define HSE_VALUE    (8000000U) /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */
 
@@ -99,7 +99,7 @@
 /**
   * @brief Internal High Speed oscillator (HSI) value.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
+  *        (when HSI is used as system clock source, directly or through the PLL).
   */
 #if !defined  (HSI_VALUE)
   #define HSI_VALUE    (16000000U) /*!< Value of the Internal oscillator in Hz*/
@@ -108,8 +108,8 @@
 /**
   * @brief Internal Low Speed oscillator (LSI) value.
   */
-#if !defined  (LSI_VALUE) 
- #define LSI_VALUE  (32000U)    
+#if !defined  (LSI_VALUE)
+ #define LSI_VALUE  (32000U)
 #endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
                                              The real value may vary depending on the variations
                                              in voltage and temperature.  */
@@ -126,8 +126,8 @@
 
 /**
   * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source 
-  *        frequency, this source is inserted directly through I2S_CKIN pad. 
+  *        This value is used by the I2S HAL module to compute the I2S clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
   */
 #if !defined  (EXTERNAL_CLOCK_VALUE)
   #define EXTERNAL_CLOCK_VALUE    (12288000U) /*!< Value of the External oscillator in Hz*/
@@ -139,9 +139,9 @@
 /* ########################### System Configuration ######################### */
 /**
   * @brief This is the HAL system configuration section
-  */     
+  */
 #define  VDD_VALUE                    (3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */           
+#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */
 #define  USE_RTOS                     0U
 #define  PREFETCH_ENABLE              1U
 #define  INSTRUCTION_CACHE_ENABLE     1U
@@ -188,7 +188,7 @@
 
 /* ########################## Assert Selection ############################## */
 /**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
   *        HAL drivers code
   */
 /* #define USE_FULL_ASSERT    1U */
@@ -205,7 +205,7 @@
 #define MAC_ADDR4   0U
 #define MAC_ADDR5   0U
 
-/* Definition of the Ethernet driver buffers size and count */   
+/* Definition of the Ethernet driver buffers size and count */
 #define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
 #define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
 #define ETH_RXBUFNB                    4U                  /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
@@ -213,9 +213,9 @@
 
 /* Section 2: PHY configuration section */
 
-/* DP83848 PHY Address*/ 
+/* DP83848 PHY Address*/
 #define DP83848_PHY_ADDRESS             0x01U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
 #define PHY_RESET_DELAY                 0x000000FFU
 /* PHY Configuration delay */
 #define PHY_CONFIG_DELAY                0x00000FFFU
@@ -227,7 +227,7 @@
 
 #define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
 #define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
- 
+
 #define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
 #define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
 #define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
@@ -242,13 +242,13 @@
 #define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
 #define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
 #define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-  
+
 /* Section 4: Extended PHY Registers */
 
 #define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
 #define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
 #define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
- 
+
 #define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
 #define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
 #define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
@@ -270,7 +270,7 @@
 
 /* Includes ------------------------------------------------------------------*/
 /**
-  * @brief Include module's header file 
+  * @brief Include module's header file
   */
 
 #ifdef HAL_RCC_MODULE_ENABLED
@@ -288,7 +288,7 @@
 #ifdef HAL_DMA_MODULE_ENABLED
   #include "stm32f4xx_hal_dma.h"
 #endif /* HAL_DMA_MODULE_ENABLED */
-   
+
 #ifdef HAL_CORTEX_MODULE_ENABLED
   #include "stm32f4xx_hal_cortex.h"
 #endif /* HAL_CORTEX_MODULE_ENABLED */
@@ -310,7 +310,7 @@
 #endif /* HAL_CRC_MODULE_ENABLED */
 
 #ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h" 
+  #include "stm32f4xx_hal_cryp.h"
 #endif /* HAL_CRYP_MODULE_ENABLED */
 
 #ifdef HAL_DMA2D_MODULE_ENABLED
@@ -332,7 +332,7 @@
 #ifdef HAL_FLASH_MODULE_ENABLED
   #include "stm32f4xx_hal_flash.h"
 #endif /* HAL_FLASH_MODULE_ENABLED */
- 
+
 #ifdef HAL_SRAM_MODULE_ENABLED
   #include "stm32f4xx_hal_sram.h"
 #endif /* HAL_SRAM_MODULE_ENABLED */
@@ -347,11 +347,11 @@
 
 #ifdef HAL_PCCARD_MODULE_ENABLED
   #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */ 
-  
+#endif /* HAL_PCCARD_MODULE_ENABLED */
+
 #ifdef HAL_SDRAM_MODULE_ENABLED
   #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */      
+#endif /* HAL_SDRAM_MODULE_ENABLED */
 
 #ifdef HAL_HASH_MODULE_ENABLED
  #include "stm32f4xx_hal_hash.h"
@@ -432,7 +432,7 @@
 #ifdef HAL_HCD_MODULE_ENABLED
  #include "stm32f4xx_hal_hcd.h"
 #endif /* HAL_HCD_MODULE_ENABLED */
-   
+
 #ifdef HAL_DSI_MODULE_ENABLED
  #include "stm32f4xx_hal_dsi.h"
 #endif /* HAL_DSI_MODULE_ENABLED */
@@ -471,7 +471,7 @@
   * @brief  The assert_param macro is used for function's parameters check.
   * @param  expr If expr is false, it calls assert_failed function
   *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
+  *         line number of the call that failed.
   *         If expr is true, it returns no value.
   * @retval None
   */
diff --git a/hw/bsp/stm32f4/boards/stm32f411blackpill/STM32F411CEUx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f411blackpill/STM32F411CEUx_FLASH.ld
index 56dcea605..45912ac32 100644
--- a/hw/bsp/stm32f4/boards/stm32f411blackpill/STM32F411CEUx_FLASH.ld
+++ b/hw/bsp/stm32f4/boards/stm32f411blackpill/STM32F411CEUx_FLASH.ld
@@ -114,7 +114,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -125,7 +125,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -153,7 +153,7 @@ SECTIONS
     . = ALIGN(4);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -165,5 +165,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h
index e1fef7277..e6c99a462 100644
--- a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32f4/boards/stm32f411blackpill/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f411blackpill/stm32f4xx_hal_conf.h
index 2ab9a1d57..16f081cfb 100644
--- a/hw/bsp/stm32f4/boards/stm32f411blackpill/stm32f4xx_hal_conf.h
+++ b/hw/bsp/stm32f4/boards/stm32f411blackpill/stm32f4xx_hal_conf.h
@@ -15,7 +15,7 @@
   *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
-  */ 
+  */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32F4xx_HAL_CONF_H
@@ -30,38 +30,38 @@
 
 /* ########################## Module Selection ############################## */
 /**
-  * @brief This is the list of modules to be used in the HAL driver 
+  * @brief This is the list of modules to be used in the HAL driver
   */
-#define HAL_MODULE_ENABLED         
+#define HAL_MODULE_ENABLED
 /* #define HAL_ADC_MODULE_ENABLED      */
 /* #define HAL_CAN_MODULE_ENABLED      */
 /* #define HAL_CAN_LEGACY_MODULE_ENABLED      */
-/* #define HAL_CRC_MODULE_ENABLED      */ 
-/* #define HAL_CEC_MODULE_ENABLED      */ 
-/* #define HAL_CRYP_MODULE_ENABLED     */ 
-/* #define HAL_DAC_MODULE_ENABLED      */ 
-/* #define HAL_DCMI_MODULE_ENABLED     */ 
-#define HAL_DMA_MODULE_ENABLED 
-/* #define HAL_DMA2D_MODULE_ENABLED    */ 
+/* #define HAL_CRC_MODULE_ENABLED      */
+/* #define HAL_CEC_MODULE_ENABLED      */
+/* #define HAL_CRYP_MODULE_ENABLED     */
+/* #define HAL_DAC_MODULE_ENABLED      */
+/* #define HAL_DCMI_MODULE_ENABLED     */
+#define HAL_DMA_MODULE_ENABLED
+/* #define HAL_DMA2D_MODULE_ENABLED    */
 /* #define HAL_ETH_MODULE_ENABLED      */
-#define HAL_FLASH_MODULE_ENABLED 
+#define HAL_FLASH_MODULE_ENABLED
 /* #define HAL_NAND_MODULE_ENABLED     */
 /* #define HAL_NOR_MODULE_ENABLED      */
 /* #define HAL_PCCARD_MODULE_ENABLED   */
 /* #define HAL_SRAM_MODULE_ENABLED     */
 /* #define HAL_SDRAM_MODULE_ENABLED    */
-/* #define HAL_HASH_MODULE_ENABLED     */  
+/* #define HAL_HASH_MODULE_ENABLED     */
 #define HAL_GPIO_MODULE_ENABLED
 /* #define HAL_EXTI_MODULE_ENABLED     */
 /* #define HAL_I2C_MODULE_ENABLED      */
 /* #define HAL_SMBUS_MODULE_ENABLED    */
 /* #define HAL_I2S_MODULE_ENABLED      */
-/* #define HAL_IWDG_MODULE_ENABLED     */ 
+/* #define HAL_IWDG_MODULE_ENABLED     */
 /* #define HAL_LTDC_MODULE_ENABLED     */
 /* #define HAL_DSI_MODULE_ENABLED      */
 #define HAL_PWR_MODULE_ENABLED
 /* #define HAL_QSPI_MODULE_ENABLED     */
-#define HAL_RCC_MODULE_ENABLED      
+#define HAL_RCC_MODULE_ENABLED
 /* #define HAL_RNG_MODULE_ENABLED      */
 /* #define HAL_RTC_MODULE_ENABLED      */
 /* #define HAL_SAI_MODULE_ENABLED      */
@@ -69,11 +69,11 @@
 // #define HAL_SPI_MODULE_ENABLED
 /* #define HAL_TIM_MODULE_ENABLED      */
 #define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED    */ 
+/* #define HAL_USART_MODULE_ENABLED    */
 /* #define HAL_IRDA_MODULE_ENABLED     */
 /* #define HAL_SMARTCARD_MODULE_ENABLED */
 /* #define HAL_WWDG_MODULE_ENABLED     */
-#define HAL_CORTEX_MODULE_ENABLED   
+#define HAL_CORTEX_MODULE_ENABLED
 /* #define HAL_PCD_MODULE_ENABLED      */
 /* #define HAL_HCD_MODULE_ENABLED      */
 /* #define HAL_FMPI2C_MODULE_ENABLED   */
@@ -86,9 +86,9 @@
 /**
   * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
+  *        (when HSE is used as system clock source, directly or through the PLL).
   */
-#if !defined  (HSE_VALUE) 
+#if !defined  (HSE_VALUE)
   #define HSE_VALUE    (25000000U) /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */
 
@@ -99,7 +99,7 @@
 /**
   * @brief Internal High Speed oscillator (HSI) value.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
+  *        (when HSI is used as system clock source, directly or through the PLL).
   */
 #if !defined  (HSI_VALUE)
   #define HSI_VALUE    (16000000U) /*!< Value of the Internal oscillator in Hz*/
@@ -108,8 +108,8 @@
 /**
   * @brief Internal Low Speed oscillator (LSI) value.
   */
-#if !defined  (LSI_VALUE) 
- #define LSI_VALUE  (32000U)    
+#if !defined  (LSI_VALUE)
+ #define LSI_VALUE  (32000U)
 #endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
                                              The real value may vary depending on the variations
                                              in voltage and temperature.  */
@@ -126,8 +126,8 @@
 
 /**
   * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source 
-  *        frequency, this source is inserted directly through I2S_CKIN pad. 
+  *        This value is used by the I2S HAL module to compute the I2S clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
   */
 #if !defined  (EXTERNAL_CLOCK_VALUE)
   #define EXTERNAL_CLOCK_VALUE    (12288000U) /*!< Value of the External oscillator in Hz*/
@@ -139,9 +139,9 @@
 /* ########################### System Configuration ######################### */
 /**
   * @brief This is the HAL system configuration section
-  */     
+  */
 #define  VDD_VALUE                    (3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */           
+#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */
 #define  USE_RTOS                     0U
 #define  PREFETCH_ENABLE              1U
 #define  INSTRUCTION_CACHE_ENABLE     1U
@@ -188,7 +188,7 @@
 
 /* ########################## Assert Selection ############################## */
 /**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
   *        HAL drivers code
   */
 /* #define USE_FULL_ASSERT    1U */
@@ -205,7 +205,7 @@
 #define MAC_ADDR4   0U
 #define MAC_ADDR5   0U
 
-/* Definition of the Ethernet driver buffers size and count */   
+/* Definition of the Ethernet driver buffers size and count */
 #define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
 #define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
 #define ETH_RXBUFNB                    4U                  /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
@@ -213,9 +213,9 @@
 
 /* Section 2: PHY configuration section */
 
-/* DP83848 PHY Address*/ 
+/* DP83848 PHY Address*/
 #define DP83848_PHY_ADDRESS             0x01U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
 #define PHY_RESET_DELAY                 0x000000FFU
 /* PHY Configuration delay */
 #define PHY_CONFIG_DELAY                0x00000FFFU
@@ -227,7 +227,7 @@
 
 #define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
 #define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
- 
+
 #define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
 #define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
 #define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
@@ -242,13 +242,13 @@
 #define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
 #define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
 #define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-  
+
 /* Section 4: Extended PHY Registers */
 
 #define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
 #define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
 #define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
- 
+
 #define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
 #define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
 #define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
@@ -270,7 +270,7 @@
 
 /* Includes ------------------------------------------------------------------*/
 /**
-  * @brief Include module's header file 
+  * @brief Include module's header file
   */
 
 #ifdef HAL_RCC_MODULE_ENABLED
@@ -288,7 +288,7 @@
 #ifdef HAL_DMA_MODULE_ENABLED
   #include "stm32f4xx_hal_dma.h"
 #endif /* HAL_DMA_MODULE_ENABLED */
-   
+
 #ifdef HAL_CORTEX_MODULE_ENABLED
   #include "stm32f4xx_hal_cortex.h"
 #endif /* HAL_CORTEX_MODULE_ENABLED */
@@ -310,7 +310,7 @@
 #endif /* HAL_CRC_MODULE_ENABLED */
 
 #ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h" 
+  #include "stm32f4xx_hal_cryp.h"
 #endif /* HAL_CRYP_MODULE_ENABLED */
 
 #ifdef HAL_DMA2D_MODULE_ENABLED
@@ -332,7 +332,7 @@
 #ifdef HAL_FLASH_MODULE_ENABLED
   #include "stm32f4xx_hal_flash.h"
 #endif /* HAL_FLASH_MODULE_ENABLED */
- 
+
 #ifdef HAL_SRAM_MODULE_ENABLED
   #include "stm32f4xx_hal_sram.h"
 #endif /* HAL_SRAM_MODULE_ENABLED */
@@ -347,11 +347,11 @@
 
 #ifdef HAL_PCCARD_MODULE_ENABLED
   #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */ 
-  
+#endif /* HAL_PCCARD_MODULE_ENABLED */
+
 #ifdef HAL_SDRAM_MODULE_ENABLED
   #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */      
+#endif /* HAL_SDRAM_MODULE_ENABLED */
 
 #ifdef HAL_HASH_MODULE_ENABLED
  #include "stm32f4xx_hal_hash.h"
@@ -432,7 +432,7 @@
 #ifdef HAL_HCD_MODULE_ENABLED
  #include "stm32f4xx_hal_hcd.h"
 #endif /* HAL_HCD_MODULE_ENABLED */
-   
+
 #ifdef HAL_DSI_MODULE_ENABLED
  #include "stm32f4xx_hal_dsi.h"
 #endif /* HAL_DSI_MODULE_ENABLED */
@@ -471,7 +471,7 @@
   * @brief  The assert_param macro is used for function's parameters check.
   * @param  expr If expr is false, it calls assert_failed function
   *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
+  *         line number of the call that failed.
   *         If expr is true, it returns no value.
   * @retval None
   */
diff --git a/hw/bsp/stm32f4/boards/stm32f411disco/STM32F411VETx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f411disco/STM32F411VETx_FLASH.ld
index 4477229ea..85bf5c4c4 100644
--- a/hw/bsp/stm32f4/boards/stm32f411disco/STM32F411VETx_FLASH.ld
+++ b/hw/bsp/stm32f4/boards/stm32f411disco/STM32F411VETx_FLASH.ld
@@ -114,7 +114,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -125,7 +125,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -153,7 +153,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -165,5 +165,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32f4/boards/stm32f411disco/board.h b/hw/bsp/stm32f4/boards/stm32f411disco/board.h
index 008a94a5d..57d1e061e 100644
--- a/hw/bsp/stm32f4/boards/stm32f411disco/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f411disco/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32f4/boards/stm32f411disco/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f411disco/stm32f4xx_hal_conf.h
index 7864f8d5f..e24e782ea 100644
--- a/hw/bsp/stm32f4/boards/stm32f411disco/stm32f4xx_hal_conf.h
+++ b/hw/bsp/stm32f4/boards/stm32f411disco/stm32f4xx_hal_conf.h
@@ -15,7 +15,7 @@
   *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
-  */ 
+  */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32F4xx_HAL_CONF_H
@@ -30,38 +30,38 @@
 
 /* ########################## Module Selection ############################## */
 /**
-  * @brief This is the list of modules to be used in the HAL driver 
+  * @brief This is the list of modules to be used in the HAL driver
   */
-#define HAL_MODULE_ENABLED         
+#define HAL_MODULE_ENABLED
 /* #define HAL_ADC_MODULE_ENABLED      */
 /* #define HAL_CAN_MODULE_ENABLED      */
 /* #define HAL_CAN_LEGACY_MODULE_ENABLED      */
-/* #define HAL_CRC_MODULE_ENABLED      */ 
-/* #define HAL_CEC_MODULE_ENABLED      */ 
-/* #define HAL_CRYP_MODULE_ENABLED     */ 
-/* #define HAL_DAC_MODULE_ENABLED      */ 
-/* #define HAL_DCMI_MODULE_ENABLED     */ 
-#define HAL_DMA_MODULE_ENABLED 
-/* #define HAL_DMA2D_MODULE_ENABLED    */ 
+/* #define HAL_CRC_MODULE_ENABLED      */
+/* #define HAL_CEC_MODULE_ENABLED      */
+/* #define HAL_CRYP_MODULE_ENABLED     */
+/* #define HAL_DAC_MODULE_ENABLED      */
+/* #define HAL_DCMI_MODULE_ENABLED     */
+#define HAL_DMA_MODULE_ENABLED
+/* #define HAL_DMA2D_MODULE_ENABLED    */
 /* #define HAL_ETH_MODULE_ENABLED      */
-#define HAL_FLASH_MODULE_ENABLED 
+#define HAL_FLASH_MODULE_ENABLED
 /* #define HAL_NAND_MODULE_ENABLED     */
 /* #define HAL_NOR_MODULE_ENABLED      */
 /* #define HAL_PCCARD_MODULE_ENABLED   */
 /* #define HAL_SRAM_MODULE_ENABLED     */
 /* #define HAL_SDRAM_MODULE_ENABLED    */
-/* #define HAL_HASH_MODULE_ENABLED     */  
+/* #define HAL_HASH_MODULE_ENABLED     */
 #define HAL_GPIO_MODULE_ENABLED
 /* #define HAL_EXTI_MODULE_ENABLED     */
 /* #define HAL_I2C_MODULE_ENABLED      */
 /* #define HAL_SMBUS_MODULE_ENABLED    */
 /* #define HAL_I2S_MODULE_ENABLED      */
-/* #define HAL_IWDG_MODULE_ENABLED     */ 
+/* #define HAL_IWDG_MODULE_ENABLED     */
 /* #define HAL_LTDC_MODULE_ENABLED     */
 /* #define HAL_DSI_MODULE_ENABLED      */
 #define HAL_PWR_MODULE_ENABLED
 /* #define HAL_QSPI_MODULE_ENABLED     */
-#define HAL_RCC_MODULE_ENABLED      
+#define HAL_RCC_MODULE_ENABLED
 /* #define HAL_RNG_MODULE_ENABLED      */
 /* #define HAL_RTC_MODULE_ENABLED      */
 /* #define HAL_SAI_MODULE_ENABLED      */
@@ -69,11 +69,11 @@
 // #define HAL_SPI_MODULE_ENABLED
 /* #define HAL_TIM_MODULE_ENABLED      */
 #define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED    */ 
+/* #define HAL_USART_MODULE_ENABLED    */
 /* #define HAL_IRDA_MODULE_ENABLED     */
 /* #define HAL_SMARTCARD_MODULE_ENABLED */
 /* #define HAL_WWDG_MODULE_ENABLED     */
-#define HAL_CORTEX_MODULE_ENABLED   
+#define HAL_CORTEX_MODULE_ENABLED
 /* #define HAL_PCD_MODULE_ENABLED      */
 /* #define HAL_HCD_MODULE_ENABLED      */
 /* #define HAL_FMPI2C_MODULE_ENABLED   */
@@ -86,9 +86,9 @@
 /**
   * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
+  *        (when HSE is used as system clock source, directly or through the PLL).
   */
-#if !defined  (HSE_VALUE) 
+#if !defined  (HSE_VALUE)
   #define HSE_VALUE    (8000000U) /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */
 
@@ -99,7 +99,7 @@
 /**
   * @brief Internal High Speed oscillator (HSI) value.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
+  *        (when HSI is used as system clock source, directly or through the PLL).
   */
 #if !defined  (HSI_VALUE)
   #define HSI_VALUE    (16000000U) /*!< Value of the Internal oscillator in Hz*/
@@ -108,8 +108,8 @@
 /**
   * @brief Internal Low Speed oscillator (LSI) value.
   */
-#if !defined  (LSI_VALUE) 
- #define LSI_VALUE  (32000U)    
+#if !defined  (LSI_VALUE)
+ #define LSI_VALUE  (32000U)
 #endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
                                              The real value may vary depending on the variations
                                              in voltage and temperature.  */
@@ -126,8 +126,8 @@
 
 /**
   * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source 
-  *        frequency, this source is inserted directly through I2S_CKIN pad. 
+  *        This value is used by the I2S HAL module to compute the I2S clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
   */
 #if !defined  (EXTERNAL_CLOCK_VALUE)
   #define EXTERNAL_CLOCK_VALUE    (12288000U) /*!< Value of the External oscillator in Hz*/
@@ -139,9 +139,9 @@
 /* ########################### System Configuration ######################### */
 /**
   * @brief This is the HAL system configuration section
-  */     
+  */
 #define  VDD_VALUE                    (3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */           
+#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */
 #define  USE_RTOS                     0U
 #define  PREFETCH_ENABLE              1U
 #define  INSTRUCTION_CACHE_ENABLE     1U
@@ -188,7 +188,7 @@
 
 /* ########################## Assert Selection ############################## */
 /**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
   *        HAL drivers code
   */
 /* #define USE_FULL_ASSERT    1U */
@@ -205,7 +205,7 @@
 #define MAC_ADDR4   0U
 #define MAC_ADDR5   0U
 
-/* Definition of the Ethernet driver buffers size and count */   
+/* Definition of the Ethernet driver buffers size and count */
 #define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
 #define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
 #define ETH_RXBUFNB                    4U                  /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
@@ -213,9 +213,9 @@
 
 /* Section 2: PHY configuration section */
 
-/* DP83848 PHY Address*/ 
+/* DP83848 PHY Address*/
 #define DP83848_PHY_ADDRESS             0x01U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
 #define PHY_RESET_DELAY                 0x000000FFU
 /* PHY Configuration delay */
 #define PHY_CONFIG_DELAY                0x00000FFFU
@@ -227,7 +227,7 @@
 
 #define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
 #define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
- 
+
 #define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
 #define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
 #define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
@@ -242,13 +242,13 @@
 #define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
 #define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
 #define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-  
+
 /* Section 4: Extended PHY Registers */
 
 #define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
 #define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
 #define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
- 
+
 #define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
 #define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
 #define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
@@ -270,7 +270,7 @@
 
 /* Includes ------------------------------------------------------------------*/
 /**
-  * @brief Include module's header file 
+  * @brief Include module's header file
   */
 
 #ifdef HAL_RCC_MODULE_ENABLED
@@ -288,7 +288,7 @@
 #ifdef HAL_DMA_MODULE_ENABLED
   #include "stm32f4xx_hal_dma.h"
 #endif /* HAL_DMA_MODULE_ENABLED */
-   
+
 #ifdef HAL_CORTEX_MODULE_ENABLED
   #include "stm32f4xx_hal_cortex.h"
 #endif /* HAL_CORTEX_MODULE_ENABLED */
@@ -310,7 +310,7 @@
 #endif /* HAL_CRC_MODULE_ENABLED */
 
 #ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h" 
+  #include "stm32f4xx_hal_cryp.h"
 #endif /* HAL_CRYP_MODULE_ENABLED */
 
 #ifdef HAL_DMA2D_MODULE_ENABLED
@@ -332,7 +332,7 @@
 #ifdef HAL_FLASH_MODULE_ENABLED
   #include "stm32f4xx_hal_flash.h"
 #endif /* HAL_FLASH_MODULE_ENABLED */
- 
+
 #ifdef HAL_SRAM_MODULE_ENABLED
   #include "stm32f4xx_hal_sram.h"
 #endif /* HAL_SRAM_MODULE_ENABLED */
@@ -347,11 +347,11 @@
 
 #ifdef HAL_PCCARD_MODULE_ENABLED
   #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */ 
-  
+#endif /* HAL_PCCARD_MODULE_ENABLED */
+
 #ifdef HAL_SDRAM_MODULE_ENABLED
   #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */      
+#endif /* HAL_SDRAM_MODULE_ENABLED */
 
 #ifdef HAL_HASH_MODULE_ENABLED
  #include "stm32f4xx_hal_hash.h"
@@ -432,7 +432,7 @@
 #ifdef HAL_HCD_MODULE_ENABLED
  #include "stm32f4xx_hal_hcd.h"
 #endif /* HAL_HCD_MODULE_ENABLED */
-   
+
 #ifdef HAL_DSI_MODULE_ENABLED
  #include "stm32f4xx_hal_dsi.h"
 #endif /* HAL_DSI_MODULE_ENABLED */
@@ -471,7 +471,7 @@
   * @brief  The assert_param macro is used for function's parameters check.
   * @param  expr If expr is false, it calls assert_failed function
   *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
+  *         line number of the call that failed.
   *         If expr is true, it returns no value.
   * @retval None
   */
diff --git a/hw/bsp/stm32f4/boards/stm32f412disco/STM32F412ZGTx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f412disco/STM32F412ZGTx_FLASH.ld
index 2372cc1d9..38dd3d321 100644
--- a/hw/bsp/stm32f4/boards/stm32f412disco/STM32F412ZGTx_FLASH.ld
+++ b/hw/bsp/stm32f4/boards/stm32f412disco/STM32F412ZGTx_FLASH.ld
@@ -114,7 +114,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -125,7 +125,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -153,7 +153,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -165,5 +165,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32f4/boards/stm32f412disco/board.h b/hw/bsp/stm32f4/boards/stm32f412disco/board.h
index 7f4a4fa15..d61b70eb9 100644
--- a/hw/bsp/stm32f4/boards/stm32f412disco/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f412disco/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32f4/boards/stm32f412disco/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f412disco/stm32f4xx_hal_conf.h
index 7864f8d5f..e24e782ea 100644
--- a/hw/bsp/stm32f4/boards/stm32f412disco/stm32f4xx_hal_conf.h
+++ b/hw/bsp/stm32f4/boards/stm32f412disco/stm32f4xx_hal_conf.h
@@ -15,7 +15,7 @@
   *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
-  */ 
+  */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32F4xx_HAL_CONF_H
@@ -30,38 +30,38 @@
 
 /* ########################## Module Selection ############################## */
 /**
-  * @brief This is the list of modules to be used in the HAL driver 
+  * @brief This is the list of modules to be used in the HAL driver
   */
-#define HAL_MODULE_ENABLED         
+#define HAL_MODULE_ENABLED
 /* #define HAL_ADC_MODULE_ENABLED      */
 /* #define HAL_CAN_MODULE_ENABLED      */
 /* #define HAL_CAN_LEGACY_MODULE_ENABLED      */
-/* #define HAL_CRC_MODULE_ENABLED      */ 
-/* #define HAL_CEC_MODULE_ENABLED      */ 
-/* #define HAL_CRYP_MODULE_ENABLED     */ 
-/* #define HAL_DAC_MODULE_ENABLED      */ 
-/* #define HAL_DCMI_MODULE_ENABLED     */ 
-#define HAL_DMA_MODULE_ENABLED 
-/* #define HAL_DMA2D_MODULE_ENABLED    */ 
+/* #define HAL_CRC_MODULE_ENABLED      */
+/* #define HAL_CEC_MODULE_ENABLED      */
+/* #define HAL_CRYP_MODULE_ENABLED     */
+/* #define HAL_DAC_MODULE_ENABLED      */
+/* #define HAL_DCMI_MODULE_ENABLED     */
+#define HAL_DMA_MODULE_ENABLED
+/* #define HAL_DMA2D_MODULE_ENABLED    */
 /* #define HAL_ETH_MODULE_ENABLED      */
-#define HAL_FLASH_MODULE_ENABLED 
+#define HAL_FLASH_MODULE_ENABLED
 /* #define HAL_NAND_MODULE_ENABLED     */
 /* #define HAL_NOR_MODULE_ENABLED      */
 /* #define HAL_PCCARD_MODULE_ENABLED   */
 /* #define HAL_SRAM_MODULE_ENABLED     */
 /* #define HAL_SDRAM_MODULE_ENABLED    */
-/* #define HAL_HASH_MODULE_ENABLED     */  
+/* #define HAL_HASH_MODULE_ENABLED     */
 #define HAL_GPIO_MODULE_ENABLED
 /* #define HAL_EXTI_MODULE_ENABLED     */
 /* #define HAL_I2C_MODULE_ENABLED      */
 /* #define HAL_SMBUS_MODULE_ENABLED    */
 /* #define HAL_I2S_MODULE_ENABLED      */
-/* #define HAL_IWDG_MODULE_ENABLED     */ 
+/* #define HAL_IWDG_MODULE_ENABLED     */
 /* #define HAL_LTDC_MODULE_ENABLED     */
 /* #define HAL_DSI_MODULE_ENABLED      */
 #define HAL_PWR_MODULE_ENABLED
 /* #define HAL_QSPI_MODULE_ENABLED     */
-#define HAL_RCC_MODULE_ENABLED      
+#define HAL_RCC_MODULE_ENABLED
 /* #define HAL_RNG_MODULE_ENABLED      */
 /* #define HAL_RTC_MODULE_ENABLED      */
 /* #define HAL_SAI_MODULE_ENABLED      */
@@ -69,11 +69,11 @@
 // #define HAL_SPI_MODULE_ENABLED
 /* #define HAL_TIM_MODULE_ENABLED      */
 #define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED    */ 
+/* #define HAL_USART_MODULE_ENABLED    */
 /* #define HAL_IRDA_MODULE_ENABLED     */
 /* #define HAL_SMARTCARD_MODULE_ENABLED */
 /* #define HAL_WWDG_MODULE_ENABLED     */
-#define HAL_CORTEX_MODULE_ENABLED   
+#define HAL_CORTEX_MODULE_ENABLED
 /* #define HAL_PCD_MODULE_ENABLED      */
 /* #define HAL_HCD_MODULE_ENABLED      */
 /* #define HAL_FMPI2C_MODULE_ENABLED   */
@@ -86,9 +86,9 @@
 /**
   * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
+  *        (when HSE is used as system clock source, directly or through the PLL).
   */
-#if !defined  (HSE_VALUE) 
+#if !defined  (HSE_VALUE)
   #define HSE_VALUE    (8000000U) /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */
 
@@ -99,7 +99,7 @@
 /**
   * @brief Internal High Speed oscillator (HSI) value.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
+  *        (when HSI is used as system clock source, directly or through the PLL).
   */
 #if !defined  (HSI_VALUE)
   #define HSI_VALUE    (16000000U) /*!< Value of the Internal oscillator in Hz*/
@@ -108,8 +108,8 @@
 /**
   * @brief Internal Low Speed oscillator (LSI) value.
   */
-#if !defined  (LSI_VALUE) 
- #define LSI_VALUE  (32000U)    
+#if !defined  (LSI_VALUE)
+ #define LSI_VALUE  (32000U)
 #endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
                                              The real value may vary depending on the variations
                                              in voltage and temperature.  */
@@ -126,8 +126,8 @@
 
 /**
   * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source 
-  *        frequency, this source is inserted directly through I2S_CKIN pad. 
+  *        This value is used by the I2S HAL module to compute the I2S clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
   */
 #if !defined  (EXTERNAL_CLOCK_VALUE)
   #define EXTERNAL_CLOCK_VALUE    (12288000U) /*!< Value of the External oscillator in Hz*/
@@ -139,9 +139,9 @@
 /* ########################### System Configuration ######################### */
 /**
   * @brief This is the HAL system configuration section
-  */     
+  */
 #define  VDD_VALUE                    (3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */           
+#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */
 #define  USE_RTOS                     0U
 #define  PREFETCH_ENABLE              1U
 #define  INSTRUCTION_CACHE_ENABLE     1U
@@ -188,7 +188,7 @@
 
 /* ########################## Assert Selection ############################## */
 /**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
   *        HAL drivers code
   */
 /* #define USE_FULL_ASSERT    1U */
@@ -205,7 +205,7 @@
 #define MAC_ADDR4   0U
 #define MAC_ADDR5   0U
 
-/* Definition of the Ethernet driver buffers size and count */   
+/* Definition of the Ethernet driver buffers size and count */
 #define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
 #define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
 #define ETH_RXBUFNB                    4U                  /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
@@ -213,9 +213,9 @@
 
 /* Section 2: PHY configuration section */
 
-/* DP83848 PHY Address*/ 
+/* DP83848 PHY Address*/
 #define DP83848_PHY_ADDRESS             0x01U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
 #define PHY_RESET_DELAY                 0x000000FFU
 /* PHY Configuration delay */
 #define PHY_CONFIG_DELAY                0x00000FFFU
@@ -227,7 +227,7 @@
 
 #define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
 #define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
- 
+
 #define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
 #define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
 #define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
@@ -242,13 +242,13 @@
 #define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
 #define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
 #define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-  
+
 /* Section 4: Extended PHY Registers */
 
 #define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
 #define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
 #define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
- 
+
 #define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
 #define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
 #define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
@@ -270,7 +270,7 @@
 
 /* Includes ------------------------------------------------------------------*/
 /**
-  * @brief Include module's header file 
+  * @brief Include module's header file
   */
 
 #ifdef HAL_RCC_MODULE_ENABLED
@@ -288,7 +288,7 @@
 #ifdef HAL_DMA_MODULE_ENABLED
   #include "stm32f4xx_hal_dma.h"
 #endif /* HAL_DMA_MODULE_ENABLED */
-   
+
 #ifdef HAL_CORTEX_MODULE_ENABLED
   #include "stm32f4xx_hal_cortex.h"
 #endif /* HAL_CORTEX_MODULE_ENABLED */
@@ -310,7 +310,7 @@
 #endif /* HAL_CRC_MODULE_ENABLED */
 
 #ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h" 
+  #include "stm32f4xx_hal_cryp.h"
 #endif /* HAL_CRYP_MODULE_ENABLED */
 
 #ifdef HAL_DMA2D_MODULE_ENABLED
@@ -332,7 +332,7 @@
 #ifdef HAL_FLASH_MODULE_ENABLED
   #include "stm32f4xx_hal_flash.h"
 #endif /* HAL_FLASH_MODULE_ENABLED */
- 
+
 #ifdef HAL_SRAM_MODULE_ENABLED
   #include "stm32f4xx_hal_sram.h"
 #endif /* HAL_SRAM_MODULE_ENABLED */
@@ -347,11 +347,11 @@
 
 #ifdef HAL_PCCARD_MODULE_ENABLED
   #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */ 
-  
+#endif /* HAL_PCCARD_MODULE_ENABLED */
+
 #ifdef HAL_SDRAM_MODULE_ENABLED
   #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */      
+#endif /* HAL_SDRAM_MODULE_ENABLED */
 
 #ifdef HAL_HASH_MODULE_ENABLED
  #include "stm32f4xx_hal_hash.h"
@@ -432,7 +432,7 @@
 #ifdef HAL_HCD_MODULE_ENABLED
  #include "stm32f4xx_hal_hcd.h"
 #endif /* HAL_HCD_MODULE_ENABLED */
-   
+
 #ifdef HAL_DSI_MODULE_ENABLED
  #include "stm32f4xx_hal_dsi.h"
 #endif /* HAL_DSI_MODULE_ENABLED */
@@ -471,7 +471,7 @@
   * @brief  The assert_param macro is used for function's parameters check.
   * @param  expr If expr is false, it calls assert_failed function
   *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
+  *         line number of the call that failed.
   *         If expr is true, it returns no value.
   * @retval None
   */
diff --git a/hw/bsp/stm32f4/boards/stm32f412nucleo/STM32F412ZGTx_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f412nucleo/STM32F412ZGTx_FLASH.ld
index 2372cc1d9..38dd3d321 100644
--- a/hw/bsp/stm32f4/boards/stm32f412nucleo/STM32F412ZGTx_FLASH.ld
+++ b/hw/bsp/stm32f4/boards/stm32f412nucleo/STM32F412ZGTx_FLASH.ld
@@ -114,7 +114,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -125,7 +125,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -153,7 +153,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -165,5 +165,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32f4/boards/stm32f412nucleo/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f412nucleo/stm32f4xx_hal_conf.h
index 7864f8d5f..e24e782ea 100644
--- a/hw/bsp/stm32f4/boards/stm32f412nucleo/stm32f4xx_hal_conf.h
+++ b/hw/bsp/stm32f4/boards/stm32f412nucleo/stm32f4xx_hal_conf.h
@@ -15,7 +15,7 @@
   *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
-  */ 
+  */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32F4xx_HAL_CONF_H
@@ -30,38 +30,38 @@
 
 /* ########################## Module Selection ############################## */
 /**
-  * @brief This is the list of modules to be used in the HAL driver 
+  * @brief This is the list of modules to be used in the HAL driver
   */
-#define HAL_MODULE_ENABLED         
+#define HAL_MODULE_ENABLED
 /* #define HAL_ADC_MODULE_ENABLED      */
 /* #define HAL_CAN_MODULE_ENABLED      */
 /* #define HAL_CAN_LEGACY_MODULE_ENABLED      */
-/* #define HAL_CRC_MODULE_ENABLED      */ 
-/* #define HAL_CEC_MODULE_ENABLED      */ 
-/* #define HAL_CRYP_MODULE_ENABLED     */ 
-/* #define HAL_DAC_MODULE_ENABLED      */ 
-/* #define HAL_DCMI_MODULE_ENABLED     */ 
-#define HAL_DMA_MODULE_ENABLED 
-/* #define HAL_DMA2D_MODULE_ENABLED    */ 
+/* #define HAL_CRC_MODULE_ENABLED      */
+/* #define HAL_CEC_MODULE_ENABLED      */
+/* #define HAL_CRYP_MODULE_ENABLED     */
+/* #define HAL_DAC_MODULE_ENABLED      */
+/* #define HAL_DCMI_MODULE_ENABLED     */
+#define HAL_DMA_MODULE_ENABLED
+/* #define HAL_DMA2D_MODULE_ENABLED    */
 /* #define HAL_ETH_MODULE_ENABLED      */
-#define HAL_FLASH_MODULE_ENABLED 
+#define HAL_FLASH_MODULE_ENABLED
 /* #define HAL_NAND_MODULE_ENABLED     */
 /* #define HAL_NOR_MODULE_ENABLED      */
 /* #define HAL_PCCARD_MODULE_ENABLED   */
 /* #define HAL_SRAM_MODULE_ENABLED     */
 /* #define HAL_SDRAM_MODULE_ENABLED    */
-/* #define HAL_HASH_MODULE_ENABLED     */  
+/* #define HAL_HASH_MODULE_ENABLED     */
 #define HAL_GPIO_MODULE_ENABLED
 /* #define HAL_EXTI_MODULE_ENABLED     */
 /* #define HAL_I2C_MODULE_ENABLED      */
 /* #define HAL_SMBUS_MODULE_ENABLED    */
 /* #define HAL_I2S_MODULE_ENABLED      */
-/* #define HAL_IWDG_MODULE_ENABLED     */ 
+/* #define HAL_IWDG_MODULE_ENABLED     */
 /* #define HAL_LTDC_MODULE_ENABLED     */
 /* #define HAL_DSI_MODULE_ENABLED      */
 #define HAL_PWR_MODULE_ENABLED
 /* #define HAL_QSPI_MODULE_ENABLED     */
-#define HAL_RCC_MODULE_ENABLED      
+#define HAL_RCC_MODULE_ENABLED
 /* #define HAL_RNG_MODULE_ENABLED      */
 /* #define HAL_RTC_MODULE_ENABLED      */
 /* #define HAL_SAI_MODULE_ENABLED      */
@@ -69,11 +69,11 @@
 // #define HAL_SPI_MODULE_ENABLED
 /* #define HAL_TIM_MODULE_ENABLED      */
 #define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED    */ 
+/* #define HAL_USART_MODULE_ENABLED    */
 /* #define HAL_IRDA_MODULE_ENABLED     */
 /* #define HAL_SMARTCARD_MODULE_ENABLED */
 /* #define HAL_WWDG_MODULE_ENABLED     */
-#define HAL_CORTEX_MODULE_ENABLED   
+#define HAL_CORTEX_MODULE_ENABLED
 /* #define HAL_PCD_MODULE_ENABLED      */
 /* #define HAL_HCD_MODULE_ENABLED      */
 /* #define HAL_FMPI2C_MODULE_ENABLED   */
@@ -86,9 +86,9 @@
 /**
   * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
+  *        (when HSE is used as system clock source, directly or through the PLL).
   */
-#if !defined  (HSE_VALUE) 
+#if !defined  (HSE_VALUE)
   #define HSE_VALUE    (8000000U) /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */
 
@@ -99,7 +99,7 @@
 /**
   * @brief Internal High Speed oscillator (HSI) value.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
+  *        (when HSI is used as system clock source, directly or through the PLL).
   */
 #if !defined  (HSI_VALUE)
   #define HSI_VALUE    (16000000U) /*!< Value of the Internal oscillator in Hz*/
@@ -108,8 +108,8 @@
 /**
   * @brief Internal Low Speed oscillator (LSI) value.
   */
-#if !defined  (LSI_VALUE) 
- #define LSI_VALUE  (32000U)    
+#if !defined  (LSI_VALUE)
+ #define LSI_VALUE  (32000U)
 #endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
                                              The real value may vary depending on the variations
                                              in voltage and temperature.  */
@@ -126,8 +126,8 @@
 
 /**
   * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source 
-  *        frequency, this source is inserted directly through I2S_CKIN pad. 
+  *        This value is used by the I2S HAL module to compute the I2S clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
   */
 #if !defined  (EXTERNAL_CLOCK_VALUE)
   #define EXTERNAL_CLOCK_VALUE    (12288000U) /*!< Value of the External oscillator in Hz*/
@@ -139,9 +139,9 @@
 /* ########################### System Configuration ######################### */
 /**
   * @brief This is the HAL system configuration section
-  */     
+  */
 #define  VDD_VALUE                    (3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */           
+#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */
 #define  USE_RTOS                     0U
 #define  PREFETCH_ENABLE              1U
 #define  INSTRUCTION_CACHE_ENABLE     1U
@@ -188,7 +188,7 @@
 
 /* ########################## Assert Selection ############################## */
 /**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
   *        HAL drivers code
   */
 /* #define USE_FULL_ASSERT    1U */
@@ -205,7 +205,7 @@
 #define MAC_ADDR4   0U
 #define MAC_ADDR5   0U
 
-/* Definition of the Ethernet driver buffers size and count */   
+/* Definition of the Ethernet driver buffers size and count */
 #define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
 #define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
 #define ETH_RXBUFNB                    4U                  /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
@@ -213,9 +213,9 @@
 
 /* Section 2: PHY configuration section */
 
-/* DP83848 PHY Address*/ 
+/* DP83848 PHY Address*/
 #define DP83848_PHY_ADDRESS             0x01U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
 #define PHY_RESET_DELAY                 0x000000FFU
 /* PHY Configuration delay */
 #define PHY_CONFIG_DELAY                0x00000FFFU
@@ -227,7 +227,7 @@
 
 #define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
 #define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
- 
+
 #define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
 #define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
 #define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
@@ -242,13 +242,13 @@
 #define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
 #define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
 #define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-  
+
 /* Section 4: Extended PHY Registers */
 
 #define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
 #define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
 #define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
- 
+
 #define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
 #define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
 #define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
@@ -270,7 +270,7 @@
 
 /* Includes ------------------------------------------------------------------*/
 /**
-  * @brief Include module's header file 
+  * @brief Include module's header file
   */
 
 #ifdef HAL_RCC_MODULE_ENABLED
@@ -288,7 +288,7 @@
 #ifdef HAL_DMA_MODULE_ENABLED
   #include "stm32f4xx_hal_dma.h"
 #endif /* HAL_DMA_MODULE_ENABLED */
-   
+
 #ifdef HAL_CORTEX_MODULE_ENABLED
   #include "stm32f4xx_hal_cortex.h"
 #endif /* HAL_CORTEX_MODULE_ENABLED */
@@ -310,7 +310,7 @@
 #endif /* HAL_CRC_MODULE_ENABLED */
 
 #ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h" 
+  #include "stm32f4xx_hal_cryp.h"
 #endif /* HAL_CRYP_MODULE_ENABLED */
 
 #ifdef HAL_DMA2D_MODULE_ENABLED
@@ -332,7 +332,7 @@
 #ifdef HAL_FLASH_MODULE_ENABLED
   #include "stm32f4xx_hal_flash.h"
 #endif /* HAL_FLASH_MODULE_ENABLED */
- 
+
 #ifdef HAL_SRAM_MODULE_ENABLED
   #include "stm32f4xx_hal_sram.h"
 #endif /* HAL_SRAM_MODULE_ENABLED */
@@ -347,11 +347,11 @@
 
 #ifdef HAL_PCCARD_MODULE_ENABLED
   #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */ 
-  
+#endif /* HAL_PCCARD_MODULE_ENABLED */
+
 #ifdef HAL_SDRAM_MODULE_ENABLED
   #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */      
+#endif /* HAL_SDRAM_MODULE_ENABLED */
 
 #ifdef HAL_HASH_MODULE_ENABLED
  #include "stm32f4xx_hal_hash.h"
@@ -432,7 +432,7 @@
 #ifdef HAL_HCD_MODULE_ENABLED
  #include "stm32f4xx_hal_hcd.h"
 #endif /* HAL_HCD_MODULE_ENABLED */
-   
+
 #ifdef HAL_DSI_MODULE_ENABLED
  #include "stm32f4xx_hal_dsi.h"
 #endif /* HAL_DSI_MODULE_ENABLED */
@@ -471,7 +471,7 @@
   * @brief  The assert_param macro is used for function's parameters check.
   * @param  expr If expr is false, it calls assert_failed function
   *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
+  *         line number of the call that failed.
   *         If expr is true, it returns no value.
   * @retval None
   */
diff --git a/hw/bsp/stm32f4/boards/stm32f439nucleo/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f439nucleo/stm32f4xx_hal_conf.h
index a2c11d717..7bbd6b54f 100644
--- a/hw/bsp/stm32f4/boards/stm32f439nucleo/stm32f4xx_hal_conf.h
+++ b/hw/bsp/stm32f4/boards/stm32f439nucleo/stm32f4xx_hal_conf.h
@@ -15,7 +15,7 @@
   *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
-  */ 
+  */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32F4xx_HAL_CONF_H
@@ -30,38 +30,38 @@
 
 /* ########################## Module Selection ############################## */
 /**
-  * @brief This is the list of modules to be used in the HAL driver 
+  * @brief This is the list of modules to be used in the HAL driver
   */
-#define HAL_MODULE_ENABLED         
+#define HAL_MODULE_ENABLED
 /* #define HAL_ADC_MODULE_ENABLED      */
 /* #define HAL_CAN_MODULE_ENABLED      */
 /* #define HAL_CAN_LEGACY_MODULE_ENABLED      */
-/* #define HAL_CRC_MODULE_ENABLED      */ 
-/* #define HAL_CEC_MODULE_ENABLED      */ 
-/* #define HAL_CRYP_MODULE_ENABLED     */ 
-/* #define HAL_DAC_MODULE_ENABLED      */ 
-/* #define HAL_DCMI_MODULE_ENABLED     */ 
-#define HAL_DMA_MODULE_ENABLED 
-/* #define HAL_DMA2D_MODULE_ENABLED    */ 
+/* #define HAL_CRC_MODULE_ENABLED      */
+/* #define HAL_CEC_MODULE_ENABLED      */
+/* #define HAL_CRYP_MODULE_ENABLED     */
+/* #define HAL_DAC_MODULE_ENABLED      */
+/* #define HAL_DCMI_MODULE_ENABLED     */
+#define HAL_DMA_MODULE_ENABLED
+/* #define HAL_DMA2D_MODULE_ENABLED    */
 /* #define HAL_ETH_MODULE_ENABLED      */
-#define HAL_FLASH_MODULE_ENABLED 
+#define HAL_FLASH_MODULE_ENABLED
 /* #define HAL_NAND_MODULE_ENABLED     */
 /* #define HAL_NOR_MODULE_ENABLED      */
 /* #define HAL_PCCARD_MODULE_ENABLED   */
 /* #define HAL_SRAM_MODULE_ENABLED     */
 /* #define HAL_SDRAM_MODULE_ENABLED    */
-/* #define HAL_HASH_MODULE_ENABLED     */  
+/* #define HAL_HASH_MODULE_ENABLED     */
 #define HAL_GPIO_MODULE_ENABLED
 /* #define HAL_EXTI_MODULE_ENABLED     */
 /* #define HAL_I2C_MODULE_ENABLED      */
 /* #define HAL_SMBUS_MODULE_ENABLED    */
 /* #define HAL_I2S_MODULE_ENABLED      */
-/* #define HAL_IWDG_MODULE_ENABLED     */ 
+/* #define HAL_IWDG_MODULE_ENABLED     */
 /* #define HAL_LTDC_MODULE_ENABLED     */
 /* #define HAL_DSI_MODULE_ENABLED      */
 #define HAL_PWR_MODULE_ENABLED
 /* #define HAL_QSPI_MODULE_ENABLED     */
-#define HAL_RCC_MODULE_ENABLED      
+#define HAL_RCC_MODULE_ENABLED
 /* #define HAL_RNG_MODULE_ENABLED      */
 /* #define HAL_RTC_MODULE_ENABLED      */
 /* #define HAL_SAI_MODULE_ENABLED      */
@@ -69,11 +69,11 @@
 // #define HAL_SPI_MODULE_ENABLED
 /* #define HAL_TIM_MODULE_ENABLED      */
 #define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED    */ 
+/* #define HAL_USART_MODULE_ENABLED    */
 /* #define HAL_IRDA_MODULE_ENABLED     */
 /* #define HAL_SMARTCARD_MODULE_ENABLED */
 /* #define HAL_WWDG_MODULE_ENABLED     */
-#define HAL_CORTEX_MODULE_ENABLED   
+#define HAL_CORTEX_MODULE_ENABLED
 /* #define HAL_PCD_MODULE_ENABLED      */
 /* #define HAL_HCD_MODULE_ENABLED      */
 /* #define HAL_FMPI2C_MODULE_ENABLED   */
@@ -86,9 +86,9 @@
 /**
   * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
+  *        (when HSE is used as system clock source, directly or through the PLL).
   */
-#if !defined  (HSE_VALUE) 
+#if !defined  (HSE_VALUE)
   #define HSE_VALUE    (8000000U) /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */
 
@@ -99,7 +99,7 @@
 /**
   * @brief Internal High Speed oscillator (HSI) value.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
+  *        (when HSI is used as system clock source, directly or through the PLL).
   */
 #if !defined  (HSI_VALUE)
   #define HSI_VALUE    (16000000U) /*!< Value of the Internal oscillator in Hz*/
@@ -108,8 +108,8 @@
 /**
   * @brief Internal Low Speed oscillator (LSI) value.
   */
-#if !defined  (LSI_VALUE) 
- #define LSI_VALUE  (32000U)    
+#if !defined  (LSI_VALUE)
+ #define LSI_VALUE  (32000U)
 #endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
                                              The real value may vary depending on the variations
                                              in voltage and temperature.  */
@@ -126,8 +126,8 @@
 
 /**
   * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source 
-  *        frequency, this source is inserted directly through I2S_CKIN pad. 
+  *        This value is used by the I2S HAL module to compute the I2S clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
   */
 #if !defined  (EXTERNAL_CLOCK_VALUE)
   #define EXTERNAL_CLOCK_VALUE    (12288000U) /*!< Value of the External oscillator in Hz*/
@@ -139,9 +139,9 @@
 /* ########################### System Configuration ######################### */
 /**
   * @brief This is the HAL system configuration section
-  */     
+  */
 #define  VDD_VALUE                    (3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */           
+#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */
 #define  USE_RTOS                     0U
 #define  PREFETCH_ENABLE              1U
 #define  INSTRUCTION_CACHE_ENABLE     1U
@@ -188,7 +188,7 @@
 
 /* ########################## Assert Selection ############################## */
 /**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
   *        HAL drivers code
   */
 /* #define USE_FULL_ASSERT    1U */
@@ -263,7 +263,7 @@
 
 /* Includes ------------------------------------------------------------------*/
 /**
-  * @brief Include module's header file 
+  * @brief Include module's header file
   */
 
 #ifdef HAL_RCC_MODULE_ENABLED
@@ -281,7 +281,7 @@
 #ifdef HAL_DMA_MODULE_ENABLED
   #include "stm32f4xx_hal_dma.h"
 #endif /* HAL_DMA_MODULE_ENABLED */
-   
+
 #ifdef HAL_CORTEX_MODULE_ENABLED
   #include "stm32f4xx_hal_cortex.h"
 #endif /* HAL_CORTEX_MODULE_ENABLED */
@@ -303,7 +303,7 @@
 #endif /* HAL_CRC_MODULE_ENABLED */
 
 #ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h" 
+  #include "stm32f4xx_hal_cryp.h"
 #endif /* HAL_CRYP_MODULE_ENABLED */
 
 #ifdef HAL_DMA2D_MODULE_ENABLED
@@ -325,7 +325,7 @@
 #ifdef HAL_FLASH_MODULE_ENABLED
   #include "stm32f4xx_hal_flash.h"
 #endif /* HAL_FLASH_MODULE_ENABLED */
- 
+
 #ifdef HAL_SRAM_MODULE_ENABLED
   #include "stm32f4xx_hal_sram.h"
 #endif /* HAL_SRAM_MODULE_ENABLED */
@@ -340,11 +340,11 @@
 
 #ifdef HAL_PCCARD_MODULE_ENABLED
   #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */ 
-  
+#endif /* HAL_PCCARD_MODULE_ENABLED */
+
 #ifdef HAL_SDRAM_MODULE_ENABLED
   #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */      
+#endif /* HAL_SDRAM_MODULE_ENABLED */
 
 #ifdef HAL_HASH_MODULE_ENABLED
  #include "stm32f4xx_hal_hash.h"
@@ -425,7 +425,7 @@
 #ifdef HAL_HCD_MODULE_ENABLED
  #include "stm32f4xx_hal_hcd.h"
 #endif /* HAL_HCD_MODULE_ENABLED */
-   
+
 #ifdef HAL_DSI_MODULE_ENABLED
  #include "stm32f4xx_hal_dsi.h"
 #endif /* HAL_DSI_MODULE_ENABLED */
@@ -464,7 +464,7 @@
   * @brief  The assert_param macro is used for function's parameters check.
   * @param  expr If expr is false, it calls assert_failed function
   *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
+  *         line number of the call that failed.
   *         If expr is true, it returns no value.
   * @retval None
   */
diff --git a/hw/bsp/stm32f4/family.c b/hw/bsp/stm32f4/family.c
index 93ab5bb35..a308bae05 100644
--- a/hw/bsp/stm32f4/family.c
+++ b/hw/bsp/stm32f4/family.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32f7/boards/stlinkv3mini/board.h b/hw/bsp/stm32f7/boards/stlinkv3mini/board.h
index d0ef6625f..ed02df061 100644
--- a/hw/bsp/stm32f7/boards/stlinkv3mini/board.h
+++ b/hw/bsp/stm32f7/boards/stlinkv3mini/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2021, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32f7/boards/stm32f723disco/board.h b/hw/bsp/stm32f7/boards/stm32f723disco/board.h
index 93d83efc6..258786b7f 100644
--- a/hw/bsp/stm32f7/boards/stm32f723disco/board.h
+++ b/hw/bsp/stm32f7/boards/stm32f723disco/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2021, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32f7/boards/stm32f746disco/board.h b/hw/bsp/stm32f7/boards/stm32f746disco/board.h
index ee342b9f5..1c7e6dd2b 100644
--- a/hw/bsp/stm32f7/boards/stm32f746disco/board.h
+++ b/hw/bsp/stm32f7/boards/stm32f746disco/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2021, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32f7/boards/stm32f746nucleo/STM32F746ZGTx_FLASH.ld b/hw/bsp/stm32f7/boards/stm32f746nucleo/STM32F746ZGTx_FLASH.ld
index e1e60bc78..eeb0e29f3 100644
--- a/hw/bsp/stm32f7/boards/stm32f746nucleo/STM32F746ZGTx_FLASH.ld
+++ b/hw/bsp/stm32f7/boards/stm32f746nucleo/STM32F746ZGTx_FLASH.ld
@@ -114,7 +114,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -125,7 +125,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -153,7 +153,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
diff --git a/hw/bsp/stm32f7/boards/stm32f746nucleo/board.h b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.h
index 92c109a72..cf895af87 100644
--- a/hw/bsp/stm32f7/boards/stm32f746nucleo/board.h
+++ b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2021, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32f7/boards/stm32f746nucleo/stm32f7xx_hal_conf.h b/hw/bsp/stm32f7/boards/stm32f746nucleo/stm32f7xx_hal_conf.h
index 234191b00..03dec8f0d 100644
--- a/hw/bsp/stm32f7/boards/stm32f746nucleo/stm32f7xx_hal_conf.h
+++ b/hw/bsp/stm32f7/boards/stm32f746nucleo/stm32f7xx_hal_conf.h
@@ -2,7 +2,7 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_conf.h
   * @author  MCD Application Team
-  * @brief   HAL configuration file. 
+  * @brief   HAL configuration file.
   ******************************************************************************
   * @attention
   *
@@ -15,7 +15,7 @@
   *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
-  */ 
+  */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32F7xx_HAL_CONF_H
@@ -30,9 +30,9 @@
 
 /* ########################## Module Selection ############################## */
 /**
-  * @brief This is the list of modules to be used in the HAL driver 
+  * @brief This is the list of modules to be used in the HAL driver
   */
-#define HAL_MODULE_ENABLED  
+#define HAL_MODULE_ENABLED
 /* #define HAL_ADC_MODULE_ENABLED   */
 /* #define HAL_CAN_MODULE_ENABLED */
 /* #define HAL_CAN_LEGACY_MODULE_ENABLED */
@@ -44,7 +44,7 @@
 #define HAL_DMA_MODULE_ENABLED
 /* #define HAL_DMA2D_MODULE_ENABLED  */
 /* #define HAL_ETH_MODULE_ENABLED  */
-#define HAL_FLASH_MODULE_ENABLED 
+#define HAL_FLASH_MODULE_ENABLED
 /* #define HAL_NAND_MODULE_ENABLED */
 /* #define HAL_NOR_MODULE_ENABLED */
 /* #define HAL_SRAM_MODULE_ENABLED */
@@ -58,7 +58,7 @@
 /* #define HAL_LTDC_MODULE_ENABLED  */
 #define HAL_PWR_MODULE_ENABLED
 /* #define HAL_QSPI_MODULE_ENABLED    */
-#define HAL_RCC_MODULE_ENABLED 
+#define HAL_RCC_MODULE_ENABLED
 /* #define HAL_RNG_MODULE_ENABLED    */
 /* #define HAL_RTC_MODULE_ENABLED */
 /* #define HAL_SAI_MODULE_ENABLED    */
@@ -84,9 +84,9 @@
 /**
   * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
+  *        (when HSE is used as system clock source, directly or through the PLL).
   */
-#if !defined  (HSE_VALUE) 
+#if !defined  (HSE_VALUE)
   #define HSE_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */
 
@@ -97,7 +97,7 @@
 /**
   * @brief Internal High Speed oscillator (HSI) value.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
+  *        (when HSI is used as system clock source, directly or through the PLL).
   */
 #if !defined  (HSI_VALUE)
   #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
@@ -106,7 +106,7 @@
 /**
   * @brief Internal Low Speed oscillator (LSI) value.
   */
-#if !defined  (LSI_VALUE) 
+#if !defined  (LSI_VALUE)
  #define LSI_VALUE  ((uint32_t)32000U)       /*!< LSI Typical Value in Hz*/
 #endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
                                              The real value may vary depending on the variations
@@ -124,8 +124,8 @@
 
 /**
   * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source 
-  *        frequency, this source is inserted directly through I2S_CKIN pad. 
+  *        This value is used by the I2S HAL module to compute the I2S clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
   */
 #if !defined  (EXTERNAL_CLOCK_VALUE)
   #define EXTERNAL_CLOCK_VALUE    ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/
@@ -137,7 +137,7 @@
 /* ########################### System Configuration ######################### */
 /**
   * @brief This is the HAL system configuration section
-  */     
+  */
 #define  VDD_VALUE                    ((uint32_t)3300U) /*!< Value of VDD in mv */
 #define  TICK_INT_PRIORITY            ((uint32_t)0x0FU) /*!< tick interrupt priority */
 #define  USE_RTOS                     0U
@@ -185,7 +185,7 @@
 
 /* ########################## Assert Selection ############################## */
 /**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
   *        HAL drivers code
   */
 /* #define USE_FULL_ASSERT    1 */
@@ -202,7 +202,7 @@
 #define MAC_ADDR4   0U
 #define MAC_ADDR5   0U
 
-/* Definition of the Ethernet driver buffers size and count */   
+/* Definition of the Ethernet driver buffers size and count */
 #define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
 #define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
 #define ETH_RXBUFNB                    ((uint32_t)5)       /* 5 Rx buffers of size ETH_RX_BUF_SIZE  */
@@ -211,7 +211,7 @@
 /* Section 2: PHY configuration section */
 /* LAN8742A PHY Address*/
 #define LAN8742A_PHY_ADDRESS            0x00
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
 #define PHY_RESET_DELAY                 ((uint32_t)0x00000FFF)
 /* PHY Configuration delay */
 #define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFF)
@@ -223,7 +223,7 @@
 
 #define PHY_BCR                         ((uint16_t)0x00)    /*!< Transceiver Basic Control Register   */
 #define PHY_BSR                         ((uint16_t)0x01)    /*!< Transceiver Basic Status Register    */
- 
+
 #define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
 #define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
 #define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
@@ -238,7 +238,7 @@
 #define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
 #define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
 #define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-  
+
 /* Section 4: Extended PHY Registers */
 
 #define PHY_SR                          ((uint16_t)0x1F)    /*!< PHY special control/ status register Offset     */
@@ -261,7 +261,7 @@
 
 /* Includes ------------------------------------------------------------------*/
 /**
-  * @brief Include module's header file 
+  * @brief Include module's header file
   */
 
 #ifdef HAL_RCC_MODULE_ENABLED
@@ -275,7 +275,7 @@
 #ifdef HAL_DMA_MODULE_ENABLED
   #include "stm32f7xx_hal_dma.h"
 #endif /* HAL_DMA_MODULE_ENABLED */
-   
+
 #ifdef HAL_CORTEX_MODULE_ENABLED
   #include "stm32f7xx_hal_cortex.h"
 #endif /* HAL_CORTEX_MODULE_ENABLED */
@@ -301,7 +301,7 @@
 #endif /* HAL_CRC_MODULE_ENABLED */
 
 #ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f7xx_hal_cryp.h" 
+  #include "stm32f7xx_hal_cryp.h"
 #endif /* HAL_CRYP_MODULE_ENABLED */
 
 #ifdef HAL_DMA2D_MODULE_ENABLED
@@ -323,7 +323,7 @@
 #ifdef HAL_FLASH_MODULE_ENABLED
   #include "stm32f7xx_hal_flash.h"
 #endif /* HAL_FLASH_MODULE_ENABLED */
- 
+
 #ifdef HAL_SRAM_MODULE_ENABLED
   #include "stm32f7xx_hal_sram.h"
 #endif /* HAL_SRAM_MODULE_ENABLED */
@@ -338,7 +338,7 @@
 
 #ifdef HAL_SDRAM_MODULE_ENABLED
   #include "stm32f7xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */      
+#endif /* HAL_SDRAM_MODULE_ENABLED */
 
 #ifdef HAL_HASH_MODULE_ENABLED
  #include "stm32f7xx_hal_hash.h"
@@ -443,14 +443,14 @@
 #ifdef HAL_MDIOS_MODULE_ENABLED
  #include "stm32f7xx_hal_mdios.h"
 #endif /* HAL_MDIOS_MODULE_ENABLED */
-   
+
 /* Exported macro ------------------------------------------------------------*/
 #ifdef  USE_FULL_ASSERT
 /**
   * @brief  The assert_param macro is used for function's parameters check.
   * @param  expr: If expr is false, it calls assert_failed function
   *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
+  *         line number of the call that failed.
   *         If expr is true, it returns no value.
   * @retval None
   */
@@ -467,6 +467,6 @@
 #endif
 
 #endif /* __STM32F7xx_HAL_CONF_H */
- 
+
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/STM32F767ZITx_FLASH.ld b/hw/bsp/stm32f7/boards/stm32f767nucleo/STM32F767ZITx_FLASH.ld
index 3785f9cbf..520a75539 100644
--- a/hw/bsp/stm32f7/boards/stm32f767nucleo/STM32F767ZITx_FLASH.ld
+++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/STM32F767ZITx_FLASH.ld
@@ -114,7 +114,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -125,7 +125,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -153,7 +153,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -165,5 +165,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.h b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.h
index 1283f2313..e053572a7 100644
--- a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.h
+++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2021, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk
index a460245b2..be5862612 100644
--- a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk
+++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk
@@ -1,5 +1,5 @@
 PORT ?= 0
-SPEED ?= full 
+SPEED ?= full
 
 CFLAGS += \
   -DSTM32F767xx \
diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/stm32f7xx_hal_conf.h b/hw/bsp/stm32f7/boards/stm32f767nucleo/stm32f7xx_hal_conf.h
index 234191b00..03dec8f0d 100644
--- a/hw/bsp/stm32f7/boards/stm32f767nucleo/stm32f7xx_hal_conf.h
+++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/stm32f7xx_hal_conf.h
@@ -2,7 +2,7 @@
   ******************************************************************************
   * @file    stm32f7xx_hal_conf.h
   * @author  MCD Application Team
-  * @brief   HAL configuration file. 
+  * @brief   HAL configuration file.
   ******************************************************************************
   * @attention
   *
@@ -15,7 +15,7 @@
   *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
-  */ 
+  */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32F7xx_HAL_CONF_H
@@ -30,9 +30,9 @@
 
 /* ########################## Module Selection ############################## */
 /**
-  * @brief This is the list of modules to be used in the HAL driver 
+  * @brief This is the list of modules to be used in the HAL driver
   */
-#define HAL_MODULE_ENABLED  
+#define HAL_MODULE_ENABLED
 /* #define HAL_ADC_MODULE_ENABLED   */
 /* #define HAL_CAN_MODULE_ENABLED */
 /* #define HAL_CAN_LEGACY_MODULE_ENABLED */
@@ -44,7 +44,7 @@
 #define HAL_DMA_MODULE_ENABLED
 /* #define HAL_DMA2D_MODULE_ENABLED  */
 /* #define HAL_ETH_MODULE_ENABLED  */
-#define HAL_FLASH_MODULE_ENABLED 
+#define HAL_FLASH_MODULE_ENABLED
 /* #define HAL_NAND_MODULE_ENABLED */
 /* #define HAL_NOR_MODULE_ENABLED */
 /* #define HAL_SRAM_MODULE_ENABLED */
@@ -58,7 +58,7 @@
 /* #define HAL_LTDC_MODULE_ENABLED  */
 #define HAL_PWR_MODULE_ENABLED
 /* #define HAL_QSPI_MODULE_ENABLED    */
-#define HAL_RCC_MODULE_ENABLED 
+#define HAL_RCC_MODULE_ENABLED
 /* #define HAL_RNG_MODULE_ENABLED    */
 /* #define HAL_RTC_MODULE_ENABLED */
 /* #define HAL_SAI_MODULE_ENABLED    */
@@ -84,9 +84,9 @@
 /**
   * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
+  *        (when HSE is used as system clock source, directly or through the PLL).
   */
-#if !defined  (HSE_VALUE) 
+#if !defined  (HSE_VALUE)
   #define HSE_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */
 
@@ -97,7 +97,7 @@
 /**
   * @brief Internal High Speed oscillator (HSI) value.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
+  *        (when HSI is used as system clock source, directly or through the PLL).
   */
 #if !defined  (HSI_VALUE)
   #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
@@ -106,7 +106,7 @@
 /**
   * @brief Internal Low Speed oscillator (LSI) value.
   */
-#if !defined  (LSI_VALUE) 
+#if !defined  (LSI_VALUE)
  #define LSI_VALUE  ((uint32_t)32000U)       /*!< LSI Typical Value in Hz*/
 #endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
                                              The real value may vary depending on the variations
@@ -124,8 +124,8 @@
 
 /**
   * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source 
-  *        frequency, this source is inserted directly through I2S_CKIN pad. 
+  *        This value is used by the I2S HAL module to compute the I2S clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
   */
 #if !defined  (EXTERNAL_CLOCK_VALUE)
   #define EXTERNAL_CLOCK_VALUE    ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/
@@ -137,7 +137,7 @@
 /* ########################### System Configuration ######################### */
 /**
   * @brief This is the HAL system configuration section
-  */     
+  */
 #define  VDD_VALUE                    ((uint32_t)3300U) /*!< Value of VDD in mv */
 #define  TICK_INT_PRIORITY            ((uint32_t)0x0FU) /*!< tick interrupt priority */
 #define  USE_RTOS                     0U
@@ -185,7 +185,7 @@
 
 /* ########################## Assert Selection ############################## */
 /**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
   *        HAL drivers code
   */
 /* #define USE_FULL_ASSERT    1 */
@@ -202,7 +202,7 @@
 #define MAC_ADDR4   0U
 #define MAC_ADDR5   0U
 
-/* Definition of the Ethernet driver buffers size and count */   
+/* Definition of the Ethernet driver buffers size and count */
 #define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
 #define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
 #define ETH_RXBUFNB                    ((uint32_t)5)       /* 5 Rx buffers of size ETH_RX_BUF_SIZE  */
@@ -211,7 +211,7 @@
 /* Section 2: PHY configuration section */
 /* LAN8742A PHY Address*/
 #define LAN8742A_PHY_ADDRESS            0x00
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
 #define PHY_RESET_DELAY                 ((uint32_t)0x00000FFF)
 /* PHY Configuration delay */
 #define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFF)
@@ -223,7 +223,7 @@
 
 #define PHY_BCR                         ((uint16_t)0x00)    /*!< Transceiver Basic Control Register   */
 #define PHY_BSR                         ((uint16_t)0x01)    /*!< Transceiver Basic Status Register    */
- 
+
 #define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
 #define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
 #define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
@@ -238,7 +238,7 @@
 #define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
 #define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
 #define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-  
+
 /* Section 4: Extended PHY Registers */
 
 #define PHY_SR                          ((uint16_t)0x1F)    /*!< PHY special control/ status register Offset     */
@@ -261,7 +261,7 @@
 
 /* Includes ------------------------------------------------------------------*/
 /**
-  * @brief Include module's header file 
+  * @brief Include module's header file
   */
 
 #ifdef HAL_RCC_MODULE_ENABLED
@@ -275,7 +275,7 @@
 #ifdef HAL_DMA_MODULE_ENABLED
   #include "stm32f7xx_hal_dma.h"
 #endif /* HAL_DMA_MODULE_ENABLED */
-   
+
 #ifdef HAL_CORTEX_MODULE_ENABLED
   #include "stm32f7xx_hal_cortex.h"
 #endif /* HAL_CORTEX_MODULE_ENABLED */
@@ -301,7 +301,7 @@
 #endif /* HAL_CRC_MODULE_ENABLED */
 
 #ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f7xx_hal_cryp.h" 
+  #include "stm32f7xx_hal_cryp.h"
 #endif /* HAL_CRYP_MODULE_ENABLED */
 
 #ifdef HAL_DMA2D_MODULE_ENABLED
@@ -323,7 +323,7 @@
 #ifdef HAL_FLASH_MODULE_ENABLED
   #include "stm32f7xx_hal_flash.h"
 #endif /* HAL_FLASH_MODULE_ENABLED */
- 
+
 #ifdef HAL_SRAM_MODULE_ENABLED
   #include "stm32f7xx_hal_sram.h"
 #endif /* HAL_SRAM_MODULE_ENABLED */
@@ -338,7 +338,7 @@
 
 #ifdef HAL_SDRAM_MODULE_ENABLED
   #include "stm32f7xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */      
+#endif /* HAL_SDRAM_MODULE_ENABLED */
 
 #ifdef HAL_HASH_MODULE_ENABLED
  #include "stm32f7xx_hal_hash.h"
@@ -443,14 +443,14 @@
 #ifdef HAL_MDIOS_MODULE_ENABLED
  #include "stm32f7xx_hal_mdios.h"
 #endif /* HAL_MDIOS_MODULE_ENABLED */
-   
+
 /* Exported macro ------------------------------------------------------------*/
 #ifdef  USE_FULL_ASSERT
 /**
   * @brief  The assert_param macro is used for function's parameters check.
   * @param  expr: If expr is false, it calls assert_failed function
   *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
+  *         line number of the call that failed.
   *         If expr is true, it returns no value.
   * @retval None
   */
@@ -467,6 +467,6 @@
 #endif
 
 #endif /* __STM32F7xx_HAL_CONF_H */
- 
+
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32f7/boards/stm32f769disco/board.h b/hw/bsp/stm32f7/boards/stm32f769disco/board.h
index 5ec217f5f..472af0b98 100644
--- a/hw/bsp/stm32f7/boards/stm32f769disco/board.h
+++ b/hw/bsp/stm32f7/boards/stm32f769disco/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2021, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32g4/boards/stm32g474nucleo/STM32G474RETx_FLASH.ld b/hw/bsp/stm32g4/boards/stm32g474nucleo/STM32G474RETx_FLASH.ld
index 9c327483b..c43829994 100644
--- a/hw/bsp/stm32g4/boards/stm32g474nucleo/STM32G474RETx_FLASH.ld
+++ b/hw/bsp/stm32g4/boards/stm32g474nucleo/STM32G474RETx_FLASH.ld
@@ -135,7 +135,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -146,7 +146,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -174,7 +174,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -186,5 +186,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c
index f3ba54576..f5177fd10 100644
--- a/hw/bsp/stm32g4/family.c
+++ b/hw/bsp/stm32g4/family.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32g4/stm32g4xx_hal_conf.h b/hw/bsp/stm32g4/stm32g4xx_hal_conf.h
index ad5f7dbd4..632c4f0ac 100644
--- a/hw/bsp/stm32g4/stm32g4xx_hal_conf.h
+++ b/hw/bsp/stm32g4/stm32g4xx_hal_conf.h
@@ -15,7 +15,7 @@
   *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
-  */ 
+  */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef STM32G4xx_HAL_CONF_H
@@ -30,10 +30,10 @@
 
 /* ########################## Module Selection ############################## */
 /**
-  * @brief This is the list of modules to be used in the HAL driver 
+  * @brief This is the list of modules to be used in the HAL driver
   */
-  
-#define HAL_MODULE_ENABLED  
+
+#define HAL_MODULE_ENABLED
 
   /*#define HAL_ADC_MODULE_ENABLED   */
 /*#define HAL_COMP_MODULE_ENABLED   */
@@ -111,9 +111,9 @@
 /**
   * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
+  *        (when HSE is used as system clock source, directly or through the PLL).
   */
-#if !defined  (HSE_VALUE) 
+#if !defined  (HSE_VALUE)
   #define HSE_VALUE    (24000000UL) /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */
 
@@ -124,7 +124,7 @@
 /**
   * @brief Internal High Speed oscillator (HSI) value.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
+  *        (when HSI is used as system clock source, directly or through the PLL).
   */
 #if !defined  (HSI_VALUE)
   #define HSI_VALUE    (16000000UL) /*!< Value of the Internal oscillator in Hz*/
@@ -145,10 +145,10 @@
 /**
   * @brief Internal Low Speed oscillator (LSI) value.
   */
-#if !defined  (LSI_VALUE) 
+#if !defined  (LSI_VALUE)
 /*!< Value of the Internal Low Speed oscillator in Hz
 The real value may vary depending on the variations in voltage and temperature.*/
-#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/    
+#define LSI_VALUE  (32000UL)     /*!< LSI Typical Value in Hz*/
 #endif /* LSI_VALUE */
 /**
   * @brief External Low Speed oscillator (LSE) value.
@@ -156,7 +156,7 @@ The real value may vary depending on the variations in voltage and temperature.*
   */
 #if !defined  (LSE_VALUE)
 #define LSE_VALUE  (32768UL)    /*!< Value of the External Low Speed oscillator in Hz */
-#endif /* LSE_VALUE */     
+#endif /* LSE_VALUE */
 
 #if !defined  (LSE_STARTUP_TIMEOUT)
 #define LSE_STARTUP_TIMEOUT    (5000UL)   /*!< Time out for LSE start up, in ms */
@@ -177,10 +177,10 @@ The real value may vary depending on the variations in voltage and temperature.*
 /* ########################### System Configuration ######################### */
 /**
   * @brief This is the HAL system configuration section
-  */     
+  */
 
 #define  VDD_VALUE                   (3300UL) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */            
+#define  TICK_INT_PRIORITY           (0UL)    /*!< tick interrupt priority (lowest by default)  */
 #define  USE_RTOS                     0U
 #define  PREFETCH_ENABLE              0U
 #define  INSTRUCTION_CACHE_ENABLE     1U
@@ -188,7 +188,7 @@ The real value may vary depending on the variations in voltage and temperature.*
 
 /* ########################## Assert Selection ############################## */
 /**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
   *        HAL drivers code
   */
 /* #define USE_FULL_ASSERT    1U */
diff --git a/hw/bsp/stm32h7/boards/daisyseed/board.mk b/hw/bsp/stm32h7/boards/daisyseed/board.mk
index 4d718f04e..d53782496 100644
--- a/hw/bsp/stm32h7/boards/daisyseed/board.mk
+++ b/hw/bsp/stm32h7/boards/daisyseed/board.mk
@@ -16,4 +16,3 @@ JLINK_DEVICE = stm32h750ibk6_m7
 
 # flash target using on-board stlink
 flash: flash-stlink
-
diff --git a/hw/bsp/stm32h7/boards/daisyseed/stm32h750ibkx_flash.ld b/hw/bsp/stm32h7/boards/daisyseed/stm32h750ibkx_flash.ld
index 83904067a..3588ada5b 100644
--- a/hw/bsp/stm32h7/boards/daisyseed/stm32h750ibkx_flash.ld
+++ b/hw/bsp/stm32h7/boards/daisyseed/stm32h750ibkx_flash.ld
@@ -172,5 +172,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/stm32h743xx_flash.ld b/hw/bsp/stm32h7/boards/stm32h743eval/stm32h743xx_flash.ld
index 7ee40671c..336afc01f 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/stm32h743xx_flash.ld
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/stm32h743xx_flash.ld
@@ -118,7 +118,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -129,7 +129,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >DTCMRAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -157,7 +157,7 @@ SECTIONS
     . = ALIGN(8);
   } >DTCMRAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -169,5 +169,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld b/hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld
index 7ee40671c..336afc01f 100644
--- a/hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld
+++ b/hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld
@@ -118,7 +118,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -129,7 +129,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >DTCMRAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -157,7 +157,7 @@ SECTIONS
     . = ALIGN(8);
   } >DTCMRAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -169,5 +169,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32h7/boards/stm32h745disco/board.mk b/hw/bsp/stm32h7/boards/stm32h745disco/board.mk
index b51b109f6..86347ade7 100644
--- a/hw/bsp/stm32h7/boards/stm32h745disco/board.mk
+++ b/hw/bsp/stm32h7/boards/stm32h745disco/board.mk
@@ -19,4 +19,3 @@ JLINK_DEVICE = stm32h745xi_m7
 
 # flash target using on-board stlink
 flash: flash-stlink
-
diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld b/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld
index e99bb977b..697a1a1df 100644
--- a/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld
+++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld
@@ -171,5 +171,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk
index fbf4b55c6..e8202d9fc 100644
--- a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk
+++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk
@@ -21,4 +21,4 @@ IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h743xx_flash.icf
 JLINK_DEVICE = stm32h743ii
 
 # flash target using jlink
-flash: flash-jlink
\ No newline at end of file
+flash: flash-jlink
diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c
index 65ffc8ef4..35b2cd55b 100644
--- a/hw/bsp/stm32h7/family.c
+++ b/hw/bsp/stm32h7/family.c
@@ -91,7 +91,7 @@ void board_init(void)
 #endif
   NVIC_SetPriority(OTG_HS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
 #endif
-  
+
   GPIO_InitTypeDef  GPIO_InitStruct;
 
   // LED
diff --git a/hw/bsp/stm32h7/stm32h7xx_hal_conf.h b/hw/bsp/stm32h7/stm32h7xx_hal_conf.h
index a7cc6d826..216fc82f2 100644
--- a/hw/bsp/stm32h7/stm32h7xx_hal_conf.h
+++ b/hw/bsp/stm32h7/stm32h7xx_hal_conf.h
@@ -1,7 +1,7 @@
 /**
   ******************************************************************************
   * @file    stm32h7xx_hal_conf_template.h
-  * @brief   HAL configuration template file. 
+  * @brief   HAL configuration template file.
   *          This file should be copied to the application folder and renamed
   *          to stm32h7xx_hal_conf.h.
   ******************************************************************************
@@ -32,7 +32,7 @@
   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
-  */ 
+  */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32H7xx_HAL_CONF_H
@@ -478,6 +478,6 @@
 #endif
 
 #endif /* __STM32H7xx_HAL_CONF_H */
- 
+
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32l0/boards/stm32l052dap52/STM32L052K8Ux_FLASH.ld b/hw/bsp/stm32l0/boards/stm32l052dap52/STM32L052K8Ux_FLASH.ld
index dfefe59f1..d4d5b6ca5 100644
--- a/hw/bsp/stm32l0/boards/stm32l052dap52/STM32L052K8Ux_FLASH.ld
+++ b/hw/bsp/stm32l0/boards/stm32l052dap52/STM32L052K8Ux_FLASH.ld
@@ -114,7 +114,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -125,7 +125,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -153,7 +153,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -165,5 +165,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32l0/boards/stm32l052dap52/board.h b/hw/bsp/stm32l0/boards/stm32l052dap52/board.h
index 8ad3e43c8..c8963199b 100644
--- a/hw/bsp/stm32l0/boards/stm32l052dap52/board.h
+++ b/hw/bsp/stm32l0/boards/stm32l052dap52/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
@@ -58,43 +58,43 @@ static inline void board_stm32l0_clock_init(void)
   RCC_OscInitTypeDef RCC_OscInitStruct;
   RCC_PeriphCLKInitTypeDef  PeriphClkInitStruct;
   static RCC_CRSInitTypeDef RCC_CRSInitStruct;
-  
+
   /* Enable HSI Oscillator to be used as System clock source
      Enable HSI48 Oscillator to be used as USB clock source */
   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48;
   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
   RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
-  HAL_RCC_OscConfig(&RCC_OscInitStruct); 
- 
+  HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
   /* Select HSI48 as USB clock source */
   PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
   PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
   HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
-  
-  /* Select HSI as system clock source and configure the HCLK, PCLK1 and PCLK2 
+
+  /* Select HSI as system clock source and configure the HCLK, PCLK1 and PCLK2
      clock dividers */
   RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;  
-  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;  
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-    
+
   /*Configure the clock recovery system (CRS)**********************************/
-  
+
   /*Enable CRS Clock*/
-  __HAL_RCC_CRS_CLK_ENABLE(); 
-  
+  __HAL_RCC_CRS_CLK_ENABLE();
+
   /* Default Synchro Signal division factor (not divided) */
-  RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;  
+  RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
   /* Set the SYNCSRC[1:0] bits according to CRS_Source value */
-  RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;  
+  RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
   /* HSI48 is synchronized with USB SOF at 1KHz rate */
   RCC_CRSInitStruct.ReloadValue =  __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000);
-  RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT;  
+  RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT;
   /* Set the TRIM[5:0] to the default value*/
-  RCC_CRSInitStruct.HSI48CalibrationValue = 0x20;   
-  /* Start automatic synchronization */ 
+  RCC_CRSInitStruct.HSI48CalibrationValue = 0x20;
+  /* Start automatic synchronization */
   HAL_RCCEx_CRSConfig (&RCC_CRSInitStruct);
 }
 
diff --git a/hw/bsp/stm32l0/family.c b/hw/bsp/stm32l0/family.c
index dcd71a513..6bce88b39 100644
--- a/hw/bsp/stm32l0/family.c
+++ b/hw/bsp/stm32l0/family.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32l0/stm32l0xx_hal_conf.h b/hw/bsp/stm32l0/stm32l0xx_hal_conf.h
index cc20ea8e0..e3a131043 100644
--- a/hw/bsp/stm32l0/stm32l0xx_hal_conf.h
+++ b/hw/bsp/stm32l0/stm32l0xx_hal_conf.h
@@ -2,22 +2,22 @@
   ******************************************************************************
   * @file    stm32l0xx_hal_conf.h
   * @author  MCD Application Team
-  * @brief   HAL configuration template file. 
+  * @brief   HAL configuration template file.
   *          This file should be copied to the application folder and renamed
   *          to stm32l0xx_hal_conf.h.
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics. 
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
   * All rights reserved.</center></h2>
   *
   * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the 
+  * the "License"; You may not use this file except in compliance with the
   * License. You may obtain a copy of the License at:
   *                        opensource.org/licenses/BSD-3-Clause
   *
   ******************************************************************************
-  */ 
+  */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32L0xx_HAL_CONF_H
@@ -32,9 +32,9 @@
 
 /* ########################## Module Selection ############################## */
 /**
-  * @brief This is the list of modules to be used in the HAL driver 
+  * @brief This is the list of modules to be used in the HAL driver
   */
-#define HAL_MODULE_ENABLED  
+#define HAL_MODULE_ENABLED
 /*#define HAL_ADC_MODULE_ENABLED */
 /*#define HAL_COMP_MODULE_ENABLED */
 /*#define HAL_CRC_MODULE_ENABLED */
@@ -69,9 +69,9 @@
 /**
   * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
+  *        (when HSE is used as system clock source, directly or through the PLL).
   */
-#if !defined  (HSE_VALUE) 
+#if !defined  (HSE_VALUE)
   #define HSE_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */
 
@@ -90,7 +90,7 @@
 /**
   * @brief Internal High Speed oscillator (HSI) value.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
+  *        (when HSI is used as system clock source, directly or through the PLL).
   */
 #if !defined  (HSI_VALUE)
   #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
@@ -99,7 +99,7 @@
 /**
   * @brief Internal High Speed oscillator for USB (HSI48) value.
   */
-#if !defined  (HSI48_VALUE) 
+#if !defined  (HSI48_VALUE)
 #define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB in Hz.
                                              The real value may vary depending on the variations
                                              in voltage and temperature.  */
@@ -108,7 +108,7 @@
 /**
   * @brief Internal Low Speed oscillator (LSI) value.
   */
-#if !defined  (LSI_VALUE) 
+#if !defined  (LSI_VALUE)
  #define LSI_VALUE  ((uint32_t)37000U)       /*!< LSI Typical Value in Hz*/
 #endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
                                              The real value may vary depending on the variations
@@ -128,24 +128,24 @@
   #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000U)   /*!< Time out for LSE start up, in ms */
 #endif /* LSE_STARTUP_TIMEOUT */
 
-   
+
 /* Tip: To avoid modifying this file each time you need to use different HSE,
    ===  you can define the HSE value in your toolchain compiler preprocessor. */
 
 /* ########################### System Configuration ######################### */
 /**
   * @brief This is the HAL system configuration section
-  */     
+  */
 #define  VDD_VALUE                    ((uint32_t)3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            (((uint32_t)1U<<__NVIC_PRIO_BITS) - 1U)    /*!< tick interrupt priority */            
-#define  USE_RTOS                     0U     
-#define  PREFETCH_ENABLE              1U              
+#define  TICK_INT_PRIORITY            (((uint32_t)1U<<__NVIC_PRIO_BITS) - 1U)    /*!< tick interrupt priority */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              1U
 #define  PREREAD_ENABLE               0U
 #define  BUFFER_CACHE_DISABLE         0U
 
 /* ########################## Assert Selection ############################## */
 /**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
   *        HAL drivers code
   */
 /* #define USE_FULL_ASSERT    1U */
@@ -191,13 +191,13 @@
 
 /* Includes ------------------------------------------------------------------*/
 /**
-  * @brief Include module's header file 
+  * @brief Include module's header file
   */
 
 #ifdef HAL_RCC_MODULE_ENABLED
   #include "stm32l0xx_hal_rcc.h"
 #endif /* HAL_RCC_MODULE_ENABLED */
-  
+
 #ifdef HAL_GPIO_MODULE_ENABLED
   #include "stm32l0xx_hal_gpio.h"
 #endif /* HAL_GPIO_MODULE_ENABLED */
@@ -233,11 +233,11 @@
 #ifdef HAL_FIREWALL_MODULE_ENABLED
   #include "stm32l0xx_hal_firewall.h"
 #endif /* HAL_FIREWALL_MODULE_ENABLED */
- 
+
 #ifdef HAL_FLASH_MODULE_ENABLED
   #include "stm32l0xx_hal_flash.h"
 #endif /* HAL_FLASH_MODULE_ENABLED */
- 
+
 #ifdef HAL_I2C_MODULE_ENABLED
  #include "stm32l0xx_hal_i2c.h"
 #endif /* HAL_I2C_MODULE_ENABLED */
@@ -257,7 +257,7 @@
 #ifdef HAL_LPTIM_MODULE_ENABLED
 #include "stm32l0xx_hal_lptim.h"
 #endif /* HAL_LPTIM_MODULE_ENABLED */
-   
+
 #ifdef HAL_PWR_MODULE_ENABLED
  #include "stm32l0xx_hal_pwr.h"
 #endif /* HAL_PWR_MODULE_ENABLED */
@@ -316,7 +316,7 @@
   * @brief  The assert_param macro is used for function's parameters check.
   * @param  expr If expr is false, it calls assert_failed function
   *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
+  *         line number of the call that failed.
   *         If expr is true, it returns no value.
   * @retval None
   */
@@ -332,7 +332,6 @@
 #endif
 
 #endif /* __STM32L0xx_HAL_CONF_H */
- 
+
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-
diff --git a/hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld b/hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld
index 79427d80b..033dcc0ad 100644
--- a/hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld
+++ b/hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld
@@ -114,7 +114,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -125,7 +125,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -153,7 +153,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -165,5 +165,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32l0538disco/stm32l0538disco.c b/hw/bsp/stm32l0538disco/stm32l0538disco.c
index f4c38d150..46f6f0ff6 100644
--- a/hw/bsp/stm32l0538disco/stm32l0538disco.c
+++ b/hw/bsp/stm32l0538disco/stm32l0538disco.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h b/hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h
index 773b74e29..a917214c3 100644
--- a/hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h
+++ b/hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h
@@ -7,39 +7,39 @@
   *
   * Copyright (c) 2016 STMicroelectronics International N.V. All rights reserved.
   *
-  * Redistribution and use in source and binary forms, with or without 
+  * Redistribution and use in source and binary forms, with or without
   * modification, are permitted, provided that the following conditions are met:
   *
-  * 1. Redistribution of source code must retain the above copyright notice, 
+  * 1. Redistribution of source code must retain the above copyright notice,
   *    this list of conditions and the following disclaimer.
   * 2. Redistributions in binary form must reproduce the above copyright notice,
   *    this list of conditions and the following disclaimer in the documentation
   *    and/or other materials provided with the distribution.
-  * 3. Neither the name of STMicroelectronics nor the names of other 
-  *    contributors to this software may be used to endorse or promote products 
+  * 3. Neither the name of STMicroelectronics nor the names of other
+  *    contributors to this software may be used to endorse or promote products
   *    derived from this software without specific written permission.
-  * 4. This software, including modifications and/or derivative works of this 
+  * 4. This software, including modifications and/or derivative works of this
   *    software, must execute solely and exclusively on microcontroller or
   *    microprocessor devices manufactured by or for STMicroelectronics.
-  * 5. Redistribution and use of this software other than as permitted under 
-  *    this license is void and will automatically terminate your rights under 
-  *    this license. 
+  * 5. Redistribution and use of this software other than as permitted under
+  *    this license is void and will automatically terminate your rights under
+  *    this license.
   *
-  * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" 
-  * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT 
-  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A 
+  * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT
+  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
   * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
-  * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT 
+  * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT
   * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
   * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 
-  * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 
-  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 
+  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+  * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
   * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
   * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
-  */ 
+  */
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __STM32L0xx_HAL_CONF_H
@@ -54,36 +54,36 @@
 
 /* ########################## Module Selection ############################## */
 /**
-  * @brief This is the list of modules to be used in the HAL driver 
+  * @brief This is the list of modules to be used in the HAL driver
   */
-#define HAL_MODULE_ENABLED  
+#define HAL_MODULE_ENABLED
 // #define HAL_ADC_MODULE_ENABLED
-/* #define HAL_COMP_MODULE_ENABLED */ 
-/* #define HAL_CRC_MODULE_ENABLED */  
-/* #define HAL_CRYP_MODULE_ENABLED */ 
-/* #define HAL_DAC_MODULE_ENABLED */   
+/* #define HAL_COMP_MODULE_ENABLED */
+/* #define HAL_CRC_MODULE_ENABLED */
+/* #define HAL_CRYP_MODULE_ENABLED */
+/* #define HAL_DAC_MODULE_ENABLED */
 #define HAL_DMA_MODULE_ENABLED
 /* #define HAL_FIREWALL_MODULE_ENABLED */
-#define HAL_FLASH_MODULE_ENABLED 
+#define HAL_FLASH_MODULE_ENABLED
 #define HAL_GPIO_MODULE_ENABLED
 /* #define HAL_I2C_MODULE_ENABLED */
-/* #define HAL_I2S_MODULE_ENABLED */   
+/* #define HAL_I2S_MODULE_ENABLED */
 /* #define HAL_IWDG_MODULE_ENABLED */
-/* #define HAL_LCD_MODULE_ENABLED */ 
+/* #define HAL_LCD_MODULE_ENABLED */
 /* #define HAL_LPTIM_MODULE_ENABLED */
-#define HAL_PWR_MODULE_ENABLED  
-#define HAL_RCC_MODULE_ENABLED 
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
 //#define HAL_RNG_MODULE_ENABLED
 /* #define HAL_RTC_MODULE_ENABLED */
 //#define HAL_SPI_MODULE_ENABLED
-/* #define HAL_TIM_MODULE_ENABLED */   
+/* #define HAL_TIM_MODULE_ENABLED */
 /* #define HAL_TSC_MODULE_ENABLED */
-/* #define HAL_UART_MODULE_ENABLED */ 
-/* #define HAL_USART_MODULE_ENABLED */ 
+/* #define HAL_UART_MODULE_ENABLED */
+/* #define HAL_USART_MODULE_ENABLED */
 /* #define HAL_IRDA_MODULE_ENABLED */
 /* #define HAL_SMARTCARD_MODULE_ENABLED */
-/* #define HAL_SMBUS_MODULE_ENABLED */   
-/* #define HAL_WWDG_MODULE_ENABLED */ 
+/* #define HAL_SMBUS_MODULE_ENABLED */
+/* #define HAL_WWDG_MODULE_ENABLED */
 //#define HAL_PCD_MODULE_ENABLED
 #define HAL_CORTEX_MODULE_ENABLED
 /* #define HAL_PCD_MODULE_ENABLED */
@@ -93,9 +93,9 @@
 /**
   * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).  
+  *        (when HSE is used as system clock source, directly or through the PLL).
   */
-#if !defined  (HSE_VALUE) 
+#if !defined  (HSE_VALUE)
   #define HSE_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */
 
@@ -114,7 +114,7 @@
 /**
   * @brief Internal High Speed oscillator (HSI) value.
   *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL). 
+  *        (when HSI is used as system clock source, directly or through the PLL).
   */
 #if !defined  (HSI_VALUE)
   #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
@@ -123,7 +123,7 @@
 /**
   * @brief Internal High Speed oscillator for USB (HSI48) value.
   */
-#if !defined  (HSI48_VALUE) 
+#if !defined  (HSI48_VALUE)
 #define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB in Hz.
                                              The real value may vary depending on the variations
                                              in voltage and temperature.  */
@@ -132,7 +132,7 @@
 /**
   * @brief Internal Low Speed oscillator (LSI) value.
   */
-#if !defined  (LSI_VALUE) 
+#if !defined  (LSI_VALUE)
  #define LSI_VALUE  ((uint32_t)37000U)       /*!< LSI Typical Value in Hz*/
 #endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
                                              The real value may vary depending on the variations
@@ -152,24 +152,24 @@
   #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000U)   /*!< Time out for LSE start up, in ms */
 #endif /* LSE_STARTUP_TIMEOUT */
 
-   
+
 /* Tip: To avoid modifying this file each time you need to use different HSE,
    ===  you can define the HSE value in your toolchain compiler preprocessor. */
 
 /* ########################### System Configuration ######################### */
 /**
   * @brief This is the HAL system configuration section
-  */     
-#define  VDD_VALUE                    ((uint32_t)3300U) /*!< Value of VDD in mv */ 
-#define  TICK_INT_PRIORITY            ((uint32_t)0U)    /*!< tick interrupt priority */           
-#define  USE_RTOS                     0U     
-#define  PREFETCH_ENABLE              1U              
+  */
+#define  VDD_VALUE                    ((uint32_t)3300U) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            ((uint32_t)0U)    /*!< tick interrupt priority */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              1U
 #define  PREREAD_ENABLE               1U
 #define  BUFFER_CACHE_DISABLE         0U
 
 /* ########################## Assert Selection ############################## */
 /**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
   *        HAL drivers code
   */
 /* #define USE_FULL_ASSERT    1 */
@@ -185,7 +185,7 @@
 
 /* Includes ------------------------------------------------------------------*/
 /**
-  * @brief Include module's header file 
+  * @brief Include module's header file
   */
 
 #ifdef HAL_RCC_MODULE_ENABLED
@@ -199,7 +199,7 @@
 #ifdef HAL_DMA_MODULE_ENABLED
   #include "stm32l0xx_hal_dma.h"
 #endif /* HAL_DMA_MODULE_ENABLED */
-   
+
 #ifdef HAL_CORTEX_MODULE_ENABLED
   #include "stm32l0xx_hal_cortex.h"
 #endif /* HAL_CORTEX_MODULE_ENABLED */
@@ -211,7 +211,7 @@
 #ifdef HAL_COMP_MODULE_ENABLED
   #include "stm32l0xx_hal_comp.h"
 #endif /* HAL_COMP_MODULE_ENABLED */
-   
+
 #ifdef HAL_CRC_MODULE_ENABLED
   #include "stm32l0xx_hal_crc.h"
 #endif /* HAL_CRC_MODULE_ENABLED */
@@ -231,7 +231,7 @@
 #ifdef HAL_FLASH_MODULE_ENABLED
   #include "stm32l0xx_hal_flash.h"
 #endif /* HAL_FLASH_MODULE_ENABLED */
- 
+
 #ifdef HAL_I2C_MODULE_ENABLED
  #include "stm32l0xx_hal_i2c.h"
 #endif /* HAL_I2C_MODULE_ENABLED */
@@ -251,7 +251,7 @@
 #ifdef HAL_LPTIM_MODULE_ENABLED
 #include "stm32l0xx_hal_lptim.h"
 #endif /* HAL_LPTIM_MODULE_ENABLED */
-   
+
 #ifdef HAL_PWR_MODULE_ENABLED
  #include "stm32l0xx_hal_pwr.h"
 #endif /* HAL_PWR_MODULE_ENABLED */
@@ -310,7 +310,7 @@
   * @brief  The assert_param macro is used for function's parameters check.
   * @param  expr If expr is false, it calls assert_failed function
   *         which reports the name of the source file and the source
-  *         line number of the call that failed. 
+  *         line number of the call that failed.
   *         If expr is true, it returns no value.
   * @retval None
   */
@@ -326,6 +326,6 @@
 #endif
 
 #endif /* __STM32L0xx_HAL_CONF_H */
- 
+
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32l4/boards/stm32l412nucleo/STM32L412KBUx_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l412nucleo/STM32L412KBUx_FLASH.ld
index d4b86b3e3..4ae4a4cf4 100644
--- a/hw/bsp/stm32l4/boards/stm32l412nucleo/STM32L412KBUx_FLASH.ld
+++ b/hw/bsp/stm32l4/boards/stm32l412nucleo/STM32L412KBUx_FLASH.ld
@@ -83,8 +83,8 @@ SECTIONS
     . = ALIGN(8);
   } >FLASH
 
-  .ARM.extab   : 
-  { 
+  .ARM.extab   :
+  {
   . = ALIGN(8);
   *(.ARM.extab* .gnu.linkonce.armextab.*)
   . = ALIGN(8);
@@ -105,7 +105,7 @@ SECTIONS
     PROVIDE_HIDDEN (__preinit_array_end = .);
 	. = ALIGN(8);
   } >FLASH
-  
+
   .init_array :
   {
 	. = ALIGN(8);
@@ -129,7 +129,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(8);
     _sdata = .;        /* create a global symbol at data start */
@@ -140,7 +140,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -168,7 +168,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -180,5 +180,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32l4/boards/stm32l412nucleo/board.h b/hw/bsp/stm32l4/boards/stm32l412nucleo/board.h
index 704d742cc..72d17b760 100644
--- a/hw/bsp/stm32l4/boards/stm32l412nucleo/board.h
+++ b/hw/bsp/stm32l4/boards/stm32l412nucleo/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
@@ -94,7 +94,7 @@ static inline void board_clock_init(void)
   RCC_OscInitStruct.PLL.PLLN = 10;
   RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
   RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
-  
+
   HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
   /** Initializes the CPU, AHB and APB buses clocks
@@ -122,7 +122,7 @@ static inline void board_clock_init(void)
   RCC_CRSInitStruct.HSI48CalibrationValue = 32;
 
   HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
-  
+
   /* Select HSI48 output as USB clock source */
   PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
   PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
diff --git a/hw/bsp/stm32l4/boards/stm32l476disco/STM32L476VGTx_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l476disco/STM32L476VGTx_FLASH.ld
index d6865f49d..3bb13ed85 100644
--- a/hw/bsp/stm32l4/boards/stm32l476disco/STM32L476VGTx_FLASH.ld
+++ b/hw/bsp/stm32l4/boards/stm32l476disco/STM32L476VGTx_FLASH.ld
@@ -82,8 +82,8 @@ SECTIONS
     . = ALIGN(8);
   } >FLASH
 
-  .ARM.extab   : 
-  { 
+  .ARM.extab   :
+  {
   . = ALIGN(8);
   *(.ARM.extab* .gnu.linkonce.armextab.*)
   . = ALIGN(8);
@@ -104,7 +104,7 @@ SECTIONS
     PROVIDE_HIDDEN (__preinit_array_end = .);
 	. = ALIGN(8);
   } >FLASH
-  
+
   .init_array :
   {
 	. = ALIGN(8);
@@ -128,7 +128,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(8);
     _sdata = .;        /* create a global symbol at data start */
@@ -139,7 +139,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -167,7 +167,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -179,5 +179,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32l4/boards/stm32l476disco/board.h b/hw/bsp/stm32l4/boards/stm32l476disco/board.h
index 42c657d5e..9d4351b39 100644
--- a/hw/bsp/stm32l4/boards/stm32l476disco/board.h
+++ b/hw/bsp/stm32l4/boards/stm32l476disco/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/STM32L4P5ZGTX_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/STM32L4P5ZGTX_FLASH.ld
index c1a490a70..02c07dd74 100644
--- a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/STM32L4P5ZGTX_FLASH.ld
+++ b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/STM32L4P5ZGTX_FLASH.ld
@@ -102,12 +102,12 @@ SECTIONS
     . = ALIGN(4);
   } >ROM
 
-  .ARM.extab   : { 
+  .ARM.extab   : {
     . = ALIGN(4);
     *(.ARM.extab* .gnu.linkonce.armextab.*)
     . = ALIGN(4);
   } >ROM
-  
+
   .ARM : {
     . = ALIGN(4);
     __exidx_start = .;
@@ -124,7 +124,7 @@ SECTIONS
     PROVIDE_HIDDEN (__preinit_array_end = .);
     . = ALIGN(4);
   } >ROM
-  
+
   .init_array :
   {
     . = ALIGN(4);
@@ -134,7 +134,7 @@ SECTIONS
     PROVIDE_HIDDEN (__init_array_end = .);
     . = ALIGN(4);
   } >ROM
-  
+
   .fini_array :
   {
     . = ALIGN(4);
@@ -149,7 +149,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections into "RAM" Ram type memory */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -158,7 +158,7 @@ SECTIONS
 
     . = ALIGN(4);
     _edata = .;        /* define a global symbol at data end */
-    
+
   } >RAM AT> ROM
 
   /* Uninitialized data section into "RAM" Ram type memory */
diff --git a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h
index 1df389aed..47ada6bb9 100644
--- a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h
+++ b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/STM32L4RXxI_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/STM32L4RXxI_FLASH.ld
index f77c72d1b..267a87a8b 100644
--- a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/STM32L4RXxI_FLASH.ld
+++ b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/STM32L4RXxI_FLASH.ld
@@ -114,7 +114,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -125,7 +125,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -153,7 +153,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
diff --git a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h
index 1df389aed..47ada6bb9 100644
--- a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h
+++ b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32l4/stm32l4xx_hal_conf.h b/hw/bsp/stm32l4/stm32l4xx_hal_conf.h
index 312f86da1..25dbc0523 100644
--- a/hw/bsp/stm32l4/stm32l4xx_hal_conf.h
+++ b/hw/bsp/stm32l4/stm32l4xx_hal_conf.h
@@ -50,7 +50,7 @@
 /* #define HAL_NAND_MODULE_ENABLED */
 // #define HAL_NOR_MODULE_ENABLED
 // #define HAL_SRAM_MODULE_ENABLED
-/* #define HAL_HCD_MODULE_ENABLED */ 
+/* #define HAL_HCD_MODULE_ENABLED */
 #define HAL_GPIO_MODULE_ENABLED
 //#define HAL_I2C_MODULE_ENABLED
 /* #define HAL_IRDA_MODULE_ENABLED */
@@ -115,7 +115,7 @@
   *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
   *        which is subject to manufacturing process variations.
   */
-#if !defined  (HSI48_VALUE) 
+#if !defined  (HSI48_VALUE)
  #define HSI48_VALUE   48000000U             /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz.
                                               The real value my vary depending on manufacturing process variations.*/
 #endif /* HSI48_VALUE */
@@ -123,7 +123,7 @@
 /**
   * @brief Internal Low Speed oscillator (LSI) value.
   */
-#if !defined  (LSI_VALUE) 
+#if !defined  (LSI_VALUE)
  #define LSI_VALUE  32000U                 /*!< LSI Typical Value in Hz*/
 #endif /* LSI_VALUE */                     /*!< Value of the Internal Low Speed oscillator in Hz
                                              The real value may vary depending on the variations
@@ -142,7 +142,7 @@
 
 /**
   * @brief External clock source for SAI1 peripheral
-  *        This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source 
+  *        This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
   *        frequency.
   */
 #if !defined  (EXTERNAL_SAI1_CLOCK_VALUE)
@@ -151,7 +151,7 @@
 
 /**
   * @brief External clock source for SAI2 peripheral
-  *        This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source 
+  *        This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
   *        frequency.
   */
 #if !defined  (EXTERNAL_SAI2_CLOCK_VALUE)
diff --git a/hw/bsp/stm32u5/stm32u5xx_hal_conf.h b/hw/bsp/stm32u5/stm32u5xx_hal_conf.h
index 15dffa813..87c3683de 100644
--- a/hw/bsp/stm32u5/stm32u5xx_hal_conf.h
+++ b/hw/bsp/stm32u5/stm32u5xx_hal_conf.h
@@ -503,4 +503,3 @@
 #endif
 
 #endif /* STM32U5xx_HAL_CONF_H */
-
diff --git a/hw/bsp/stm32wb/boards/stm32wb55nucleo/stm32wb55xx_flash_cm4.ld b/hw/bsp/stm32wb/boards/stm32wb55nucleo/stm32wb55xx_flash_cm4.ld
index 660f30161..916f11866 100644
--- a/hw/bsp/stm32wb/boards/stm32wb55nucleo/stm32wb55xx_flash_cm4.ld
+++ b/hw/bsp/stm32wb/boards/stm32wb55nucleo/stm32wb55xx_flash_cm4.ld
@@ -113,7 +113,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -124,7 +124,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM1 AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -152,7 +152,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM1
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -167,5 +167,3 @@ SECTIONS
    MB_MEM1 (NOLOAD)       : { *(MB_MEM1) } >RAM_SHARED
    MB_MEM2 (NOLOAD)       : { _sMB_MEM2 = . ; *(MB_MEM2) ; _eMB_MEM2 = . ; } >RAM_SHARED
 }
-
-
diff --git a/hw/bsp/stm32wb/family.c b/hw/bsp/stm32wb/family.c
index 525d637ea..e9ca59866 100644
--- a/hw/bsp/stm32wb/family.c
+++ b/hw/bsp/stm32wb/family.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2022 Jerzy Kasenberg
diff --git a/hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.mk b/hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.mk
index d60365d1d..0ff24ab60 100644
--- a/hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.mk
+++ b/hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.mk
@@ -1,5 +1,5 @@
 CFLAGS += -DTM4C123GH6PM
- 
+
 LD_FILE = $(BOARD_PATH)/tm4c123.ld
 
 # For flash-jlink target
diff --git a/hw/bsp/tm4c123/boards/ek-tm4c123gxl/tm4c123.ld b/hw/bsp/tm4c123/boards/ek-tm4c123gxl/tm4c123.ld
index e2720a9ac..351857bd6 100644
--- a/hw/bsp/tm4c123/boards/ek-tm4c123gxl/tm4c123.ld
+++ b/hw/bsp/tm4c123/boards/ek-tm4c123gxl/tm4c123.ld
@@ -6,37 +6,37 @@ _Min_Heap_Size = 0;      /* required amount of heap  */
 _Min_Stack_Size = 0x1000; /* required amount of stack */
 
 
-MEMORY 
+MEMORY
 {
     FLASH(rx) : ORIGIN = 0x00000000, LENGTH = 256K
     SRAM(rwx) : ORIGIN = 0x20000000, LENGTH = 32K
 }
 
-SECTIONS 
+SECTIONS
 {
-    .text : 
+    .text :
     {
         . = ALIGN(4) ;
-        *(.vectors) 
-        *(.text) 
+        *(.vectors)
+        *(.text)
         *(.text.*)
         *(.init)
         *(.fini)
         *(.rodata)
         *(.rodata.*)
-        . = ALIGN(4) ; 
-        __end_text = . ; 
+        . = ALIGN(4) ;
+        __end_text = . ;
     } >FLASH
-    
+
     .data : AT(ADDR(.text) + SIZEOF(.text))
     {
         . = ALIGN(4);
-        __start_data = . ; 
+        __start_data = . ;
         __la_data = LOADADDR(.data);
-        *(.data) 
+        *(.data)
         *(.data.*)
         . = ALIGN(4);
-        __end_data = . ; 
+        __end_data = . ;
 
     } >SRAM
 
@@ -47,7 +47,7 @@ SECTIONS
         __bss_start__ = __start_bss;
         *(.bss)
         *(.bss.*)
-        *(.COMMON) 
+        *(.COMMON)
         __end_bss = . ;
         . = ALIGN(4);
     }>SRAM
diff --git a/hw/bsp/tm4c123/family.c b/hw/bsp/tm4c123/family.c
index 87b94289b..3f4f43220 100644
--- a/hw/bsp/tm4c123/family.c
+++ b/hw/bsp/tm4c123/family.c
@@ -175,4 +175,3 @@ uint32_t board_millis (void)
   return system_ticks;
 }
 #endif
-
diff --git a/hw/bsp/xmc4000/boards/xmc4500_relax/board.h b/hw/bsp/xmc4000/boards/xmc4500_relax/board.h
index 3e2cb9583..2d4764f40 100644
--- a/hw/bsp/xmc4000/boards/xmc4500_relax/board.h
+++ b/hw/bsp/xmc4000/boards/xmc4500_relax/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2021, Ha Thach (tinyusb.org)
diff --git a/hw/mcu/bridgetek/ft9xx/Readme.md b/hw/mcu/bridgetek/ft9xx/Readme.md
index 1db91058c..adf8fc765 100644
--- a/hw/mcu/bridgetek/ft9xx/Readme.md
+++ b/hw/mcu/bridgetek/ft9xx/Readme.md
@@ -2,6 +2,6 @@
 
 **BridgeTek** provides a hardware abstraction library with software source code for the SDKs for FT9xx software family.
 
-Whole SDK repository is installed as part of the FT9xx Toolchain and can be downloaded from BridgeTek web page `https://www.brtchip.com`. 
+Whole SDK repository is installed as part of the FT9xx Toolchain and can be downloaded from BridgeTek web page `https://www.brtchip.com`.
 
-Registers definition files, and included peripheral register definition files have licenses that allow for redistribution.  
+Registers definition files, and included peripheral register definition files have licenses that allow for redistribution.
diff --git a/hw/mcu/bridgetek/ft9xx/scripts/crt0.S b/hw/mcu/bridgetek/ft9xx/scripts/crt0.S
index 62fa266ee..380b31c37 100644
--- a/hw/mcu/bridgetek/ft9xx/scripts/crt0.S
+++ b/hw/mcu/bridgetek/ft9xx/scripts/crt0.S
@@ -50,11 +50,11 @@ _start:
 
 codestart:
         jmp    init
-        
+
 .global _exithook
 _exithook:               # Debugger uses '_exithook' at 0x90 to catch program exit
         return
-        
+
 init:
         # Disable all interrupts
         ldk     $r0,0x80
@@ -63,12 +63,12 @@ init:
 .else
         sta.b   0x100e3,$r0
 .endif
-        
+
         # Reset all peripherals
         # lda.l   $r0, 0x10018
         # bins.l  $r0, $r0, 0x23F  # Set bit 31
         # sta.l   0x10018, $r0
-        
+
         # Initialize DATA by copying from program memory
         ldk.l   $r0,__data_load_start
         ldk.l   $r1,__data_load_end
diff --git a/hw/mcu/dialog/README.md b/hw/mcu/dialog/README.md
index 69676f081..33d270aac 100644
--- a/hw/mcu/dialog/README.md
+++ b/hw/mcu/dialog/README.md
@@ -3,7 +3,5 @@
 **Dialog Semiconductors** provides SDKs for DA146x MCU family.
 Most of the files there can't be redistributed.
 Registers definition file `DA1469xAB.h` and some **ARM** originated headers are have licenses that allow
-for redistribution.  
+for redistribution.
 Whole SDK repository can be downloaded from Dialog Semiconductor web page `https://www.dialog.com`
-
-
diff --git a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/arm_license.txt b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/arm_license.txt
index b324eb286..7e8067a6f 100644
--- a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/arm_license.txt
+++ b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/arm_license.txt
@@ -24,4 +24,3 @@
    ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    POSSIBILITY OF SUCH DAMAGE.
    ---------------------------------------------------------------------------*/
-
diff --git a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_compiler.h b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_compiler.h
index fdb1a971c..8f871ea31 100644
--- a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_compiler.h
+++ b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_compiler.h
@@ -268,4 +268,3 @@
 
 
 #endif /* __CMSIS_COMPILER_H */
-
diff --git a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_gcc.h b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_gcc.h
index 47a4b59d8..812c3789a 100644
--- a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_gcc.h
+++ b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/cmsis_gcc.h
@@ -47,9 +47,9 @@
 #ifndef   __STATIC_INLINE
   #define __STATIC_INLINE                        static inline
 #endif
-#ifndef   __STATIC_FORCEINLINE                 
+#ifndef   __STATIC_FORCEINLINE
   #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static inline
-#endif                                           
+#endif
 #ifndef   __NO_RETURN
   #define __NO_RETURN                            __attribute__((__noreturn__))
 #endif
@@ -586,7 +586,7 @@ __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
   Stack Pointer Limit register hence zero is returned always in non-secure
   mode.
-  
+
   \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
   \return               PSPLIM Register value
  */
@@ -631,7 +631,7 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
   Stack Pointer Limit register hence the write is silently ignored in non-secure
   mode.
-  
+
   \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
   \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
  */
@@ -768,7 +768,7 @@ __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
 {
 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
      (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-#if __has_builtin(__builtin_arm_get_fpscr) 
+#if __has_builtin(__builtin_arm_get_fpscr)
 // Re-enable using built-in when GCC has been fixed
 // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
   /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
diff --git a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm0.h b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm0.h
index e2cf6b966..a8cd3ea45 100644
--- a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm0.h
+++ b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm0.h
@@ -62,7 +62,7 @@
  */
 
 #include "cmsis_version.h"
- 
+
 /*  CMSIS CM0 definitions */
 #define __CM0_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \deprecated [31:16] CMSIS HAL main version */
 #define __CM0_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \deprecated [15:0]  CMSIS HAL sub version */
diff --git a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm33.h b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm33.h
index 7249e1331..05b61383e 100644
--- a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm33.h
+++ b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/core_cm33.h
@@ -2065,7 +2065,7 @@ typedef struct
 
 /* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
 
-/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */ 
+/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */
 #define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
 
 /* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
@@ -2080,7 +2080,7 @@ typedef struct
 /* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
 #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
 #define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
-#else 
+#else
 #define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
 #endif
 
diff --git a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/mpu_armv8.h b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/mpu_armv8.h
index bc3b05109..50bb56333 100644
--- a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/mpu_armv8.h
+++ b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/mpu_armv8.h
@@ -103,7 +103,7 @@
   (MPU_RLAR_EN_Msk))
 
 #if defined(MPU_RLAR_PXN_Pos)
-  
+
 /** \brief Region Limit Address Register with PXN value
 * \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
 * \param PXN Privileged execute never. Defines whether code can be executed from this privileged region.
@@ -114,7 +114,7 @@
   ((PXN << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
   ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
   (MPU_RLAR_EN_Msk))
-  
+
 #endif
 
 /**
@@ -124,7 +124,7 @@ typedef struct {
   uint32_t RBAR;                   /*!< Region Base Address Register value */
   uint32_t RLAR;                   /*!< Region Limit Address Register value */
 } ARM_MPU_Region_t;
-    
+
 /** Enable the MPU.
 * \param MPU_Control Default access permissions for unconfigured regions.
 */
@@ -185,11 +185,11 @@ __STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t at
   const uint8_t reg = idx / 4U;
   const uint32_t pos = ((idx % 4U) * 8U);
   const uint32_t mask = 0xFFU << pos;
-  
+
   if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
     return; // invalid index
   }
-  
+
   mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
 }
 
@@ -236,7 +236,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
 * \param rnr Region number to be cleared.
 */
 __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
-{  
+{
   ARM_MPU_ClrRegionEx(MPU_NS, rnr);
 }
 #endif
@@ -246,7 +246,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
 * \param rnr Region number to be configured.
 * \param rbar Value for RBAR register.
 * \param rlar Value for RLAR register.
-*/   
+*/
 __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
 {
   mpu->RNR = rnr;
@@ -258,7 +258,7 @@ __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t r
 * \param rnr Region number to be configured.
 * \param rbar Value for RBAR register.
 * \param rlar Value for RLAR register.
-*/   
+*/
 __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
 {
   ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
@@ -269,10 +269,10 @@ __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rla
 * \param rnr Region number to be configured.
 * \param rbar Value for RBAR register.
 * \param rlar Value for RLAR register.
-*/   
+*/
 __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
 {
-  ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);  
+  ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
 }
 #endif
 
@@ -284,7 +284,7 @@ __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t
 __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
 {
   uint32_t i;
-  for (i = 0U; i < len; ++i) 
+  for (i = 0U; i < len; ++i)
   {
     dst[i] = src[i];
   }
@@ -296,7 +296,7 @@ __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_
 * \param table Pointer to the MPU configuration table.
 * \param cnt Amount of regions to be configured.
 */
-__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
+__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
 {
   const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
   if (cnt == 1U) {
@@ -305,7 +305,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_
   } else {
     uint32_t rnrBase   = rnr & ~(MPU_TYPE_RALIASES-1U);
     uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
-    
+
     mpu->RNR = rnrBase;
     while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
       uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
@@ -316,7 +316,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_
       rnrBase += MPU_TYPE_RALIASES;
       mpu->RNR = rnrBase;
     }
-    
+
     ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
   }
 }
@@ -326,7 +326,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_
 * \param table Pointer to the MPU configuration table.
 * \param cnt Amount of regions to be configured.
 */
-__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
+__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
 {
   ARM_MPU_LoadEx(MPU, rnr, table, cnt);
 }
@@ -337,11 +337,10 @@ __STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, u
 * \param table Pointer to the MPU configuration table.
 * \param cnt Amount of regions to be configured.
 */
-__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
+__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
 {
   ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
 }
 #endif
 
 #endif
-
diff --git a/hw/mcu/dialog/da1469x/da1469x.ld b/hw/mcu/dialog/da1469x/da1469x.ld
index c91dea841..0133f3759 100644
--- a/hw/mcu/dialog/da1469x/da1469x.ld
+++ b/hw/mcu/dialog/da1469x/da1469x.ld
@@ -225,4 +225,3 @@ SECTIONS
     /* Check that intvect is at the beginning of RAM */
     ASSERT(__intvect_start__ == ORIGIN(RAM), "intvect is not at beginning of RAM")
 }
-
diff --git a/hw/mcu/dialog/da1469x/include/mcu/mcu.h b/hw/mcu/dialog/da1469x/include/mcu/mcu.h
index 1e6736785..38961e828 100644
--- a/hw/mcu/dialog/da1469x/include/mcu/mcu.h
+++ b/hw/mcu/dialog/da1469x/include/mcu/mcu.h
@@ -162,4 +162,3 @@ void mcu_gpio_exit_sleep(void);
 #endif
 
 #endif /* __MCU_MCU_H_ */
-
diff --git a/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble.h b/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble.h
index 76a432bfd..9ba24f458 100644
--- a/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble.h
+++ b/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble.h
@@ -539,7 +539,7 @@ SVCALL(SD_BLE_UUID_VS_ADD, uint32_t, sd_ble_uuid_vs_add(ble_uuid128_t const *p_v
 
 
 /**@brief Remove a Vendor Specific base UUID.
- * 
+ *
  * @details This call removes a Vendor Specific base UUID that has been added with @ref sd_ble_uuid_vs_add. This function allows
  * the application to reuse memory allocated for Vendor Specific base UUIDs.
  *
diff --git a/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble_gap.h b/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble_gap.h
index c434fefb3..e11149435 100644
--- a/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble_gap.h
+++ b/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble_gap.h
@@ -1666,7 +1666,7 @@ SVCALL(SD_BLE_GAP_ADDR_GET, uint32_t, sd_ble_gap_addr_get(ble_gap_addr_t *p_addr
  *
  * @retval ::NRF_SUCCESS                  Address successfully retrieved.
  * @retval ::NRF_ERROR_INVALID_ADDR       Invalid or NULL pointer supplied.
- * @retval ::BLE_ERROR_INVALID_ADV_HANDLE The provided advertising handle was not found. 
+ * @retval ::BLE_ERROR_INVALID_ADV_HANDLE The provided advertising handle was not found.
  * @retval ::NRF_ERROR_INVALID_STATE      The advertising set is currently not advertising.
  */
 SVCALL(SD_BLE_GAP_ADV_ADDR_GET, uint32_t, sd_ble_gap_adv_addr_get(uint8_t adv_handle, ble_gap_addr_t *p_addr));
diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT.c b/lib/SEGGER_RTT/RTT/SEGGER_RTT.c
index a7ae013dd..c8de8e0f3 100644
--- a/lib/SEGGER_RTT/RTT/SEGGER_RTT.c
+++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT.c
@@ -62,7 +62,7 @@ Additional information:
           WrOff == (RdOff - 1): Buffer is full
           WrOff >  RdOff:       Free space includes wrap-around
           WrOff <  RdOff:       Used space includes wrap-around
-          (WrOff == (SizeOfBuffer - 1)) && (RdOff == 0):  
+          (WrOff == (SizeOfBuffer - 1)) && (RdOff == 0):
                                 Buffer full and wrap-around after next byte
 
 
@@ -504,7 +504,7 @@ static unsigned _GetAvailWriteSpace(SEGGER_RTT_BUFFER_UP* pRing) {
 *    Reads characters from SEGGER real-time-terminal control block
 *    which have been previously stored by the application.
 *    Do not lock against interrupts and multiple access.
-*    Used to do the same operation that J-Link does, to transfer 
+*    Used to do the same operation that J-Link does, to transfer
 *    RTT data via other channels, such as TCP/IP or UART.
 *
 *  Parameters
@@ -693,7 +693,7 @@ unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned Buffe
 *  Function description
 *    Reads characters from SEGGER real-time-terminal control block
 *    which have been previously stored by the application.
-*    Used to do the same operation that J-Link does, to transfer 
+*    Used to do the same operation that J-Link does, to transfer
 *    RTT data via other channels, such as TCP/IP or UART.
 *
 *  Parameters
@@ -708,7 +708,7 @@ unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned Buffe
 *    This function must not be called when J-Link might also do RTT.
 *    This function locks against all other RTT operations. I.e. during
 *    the read operation, writing is also locked.
-*    If only one consumer reads from the up buffer, 
+*    If only one consumer reads from the up buffer,
 *    call sEGGER_RTT_ReadUpBufferNoLock() instead.
 */
 unsigned SEGGER_RTT_ReadUpBuffer(unsigned BufferIndex, void* pBuffer, unsigned BufferSize) {
@@ -766,7 +766,7 @@ unsigned SEGGER_RTT_Read(unsigned BufferIndex, void* pBuffer, unsigned BufferSiz
 *  Function description
 *    Stores a specified number of characters in SEGGER RTT
 *    control block.
-*    SEGGER_RTT_WriteWithOverwriteNoLock does not lock the application 
+*    SEGGER_RTT_WriteWithOverwriteNoLock does not lock the application
 *    and overwrites data if the data does not fit into the buffer.
 *
 *  Parameters
@@ -779,7 +779,7 @@ unsigned SEGGER_RTT_Read(unsigned BufferIndex, void* pBuffer, unsigned BufferSiz
 *    (2) For performance reasons this function does not call Init()
 *        and may only be called after RTT has been initialized.
 *        Either by calling SEGGER_RTT_Init() or calling another RTT API function first.
-*    (3) Do not use SEGGER_RTT_WriteWithOverwriteNoLock if a J-Link 
+*    (3) Do not use SEGGER_RTT_WriteWithOverwriteNoLock if a J-Link
 *        connection reads RTT data.
 */
 void SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
@@ -946,7 +946,7 @@ CopyStraight:
 *    Stores a specified number of characters in SEGGER RTT
 *    control block inside a <Down> buffer.
 *    SEGGER_RTT_WriteDownBufferNoLock does not lock the application.
-*    Used to do the same operation that J-Link does, to transfer 
+*    Used to do the same operation that J-Link does, to transfer
 *    RTT data from other channels, such as TCP/IP or UART.
 *
 *  Parameters
@@ -1116,7 +1116,7 @@ unsigned SEGGER_RTT_WriteNoLock(unsigned BufferIndex, const void* pBuffer, unsig
 *    This function must not be called when J-Link might also do RTT.
 *    This function locks against all other RTT operations. I.e. during
 *    the write operation, writing from the application is also locked.
-*    If only one consumer writes to the down buffer, 
+*    If only one consumer writes to the down buffer,
 *    call SEGGER_RTT_WriteDownBufferNoLock() instead.
 */
 unsigned SEGGER_RTT_WriteDownBuffer(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT.h b/lib/SEGGER_RTT/RTT/SEGGER_RTT.h
index 3c04df55f..07eb4f39e 100644
--- a/lib/SEGGER_RTT/RTT/SEGGER_RTT.h
+++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT.h
@@ -44,7 +44,7 @@
 ---------------------------END-OF-HEADER------------------------------
 File    : SEGGER_RTT.h
 Purpose : Implementation of SEGGER real-time transfer which allows
-          real-time communication on targets which support debugger 
+          real-time communication on targets which support debugger
           memory accesses while the CPU is running.
 Revision: $Rev: 17697 $
 ----------------------------------------------------------------------
diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S b/lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S
index 78cde4d75..aec372eec 100644
--- a/lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S
+++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S
@@ -36,9 +36,9 @@ Additional information:
   #define _THUMB_CODE          .code 16
   #define _WORD                .word
   #define _SECTION(Sect, Type, AlignExp) .section Sect ##, "ax"
-  #define _ALIGN(Exp)          .align Exp 
+  #define _ALIGN(Exp)          .align Exp
   #define _PLACE_LITS          .ltorg
-  #define _DATA_SECT_START 
+  #define _DATA_SECT_START
   #define _C_STARTUP           _start
   #define _STACK_END           __stack_end__
   #define _RAMFUNC
@@ -58,7 +58,7 @@ Additional information:
   #define _THUMB_CODE          THUMB
   #define _WORD                DCD
   #define _SECTION(Sect, Type, AlignExp) SECTION Sect ## : ## Type ## :REORDER:NOROOT ## (AlignExp)
-  #define _ALIGN(Exp)          alignrom Exp 
+  #define _ALIGN(Exp)          alignrom Exp
   #define _PLACE_LITS
   #define _DATA_SECT_START     DATA
   #define _C_STARTUP           __iar_program_start
diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h b/lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h
index 5e79d7e67..fda5a5f51 100644
--- a/lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h
+++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h
@@ -91,12 +91,12 @@ Revision: $Rev: 18601 $
 *
 *       RTT memcpy configuration
 *
-*       memcpy() is good for large amounts of data, 
+*       memcpy() is good for large amounts of data,
 *       but the overhead is big for small amounts, which are usually stored via RTT.
 *       With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead.
 *
 *       SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions.
-*       This is may be required with memory access restrictions, 
+*       This is may be required with memory access restrictions,
 *       such as on Cortex-A devices with MMU.
 */
 #ifndef   SEGGER_RTT_MEMCPY_USE_BYTELOOP
@@ -105,7 +105,7 @@ Revision: $Rev: 18601 $
 //
 // Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets
 //
-//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__))  
+//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__))
 //  #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes)      SEGGER_memcpy((pDest), (pSrc), (NumBytes))
 //#endif
 
@@ -204,7 +204,7 @@ Revision: $Rev: 18601 $
                                                  :                             \
                                                  :                             \
                                                 );
-                               
+
   #define SEGGER_RTT_UNLOCK()    __asm volatile ("csrr  a1, mstatus  \n\t"     \
                                                  "or    %0, %0, a1   \n\t"     \
                                                  "csrs  mstatus, %0  \n\t"     \
@@ -345,8 +345,8 @@ Revision: $Rev: 18601 $
   #define SEGGER_RTT_LOCK()   {                                                                     \
                                 unsigned long LockState;                                            \
                                 LockState = get_psw() & 0x010000;                                   \
-                                clrpsw_i();                           
-                                    
+                                clrpsw_i();
+
   #define SEGGER_RTT_UNLOCK()   set_psw(get_psw() | LockState);                                     \
                               }
 #endif
diff --git a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c b/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c
index da4a4b5f5..6bf670a02 100644
--- a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c
+++ b/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c
@@ -44,7 +44,7 @@
 ---------------------------END-OF-HEADER------------------------------
 File    : SEGGER_RTT_Syscalls_GCC.c
 Purpose : Low-level functions for using printf() via RTT in GCC.
-          To use RTT for printf output, include this file in your 
+          To use RTT for printf output, include this file in your
           application.
 Revision: $Rev: 17697 $
 ----------------------------------------------------------------------
@@ -62,7 +62,7 @@ Revision: $Rev: 17697 $
 **********************************************************************
 */
 //
-// If necessary define the _reent struct 
+// If necessary define the _reent struct
 // to match the one passed by the used standard library.
 //
 struct _reent;
diff --git a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c b/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c
index f7f5aed48..ba9772d3e 100644
--- a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c
+++ b/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c
@@ -110,7 +110,7 @@ const char __stderr_name[] = "STDERR";
 *
 *  Parameters:
 *    c    - character to output
-*  
+*
 */
 void _ttywrch(int c) {
   fputc(c, stdout); // stdout
@@ -127,9 +127,9 @@ void _ttywrch(int c) {
 *  Parameters:
 *    sName        - sName of the device/file to open
 *    OpenMode    - This parameter is currently ignored
-*  
+*
 *  Return value:
-*    != 0     - Handle to the object to open, otherwise 
+*    != 0     - Handle to the object to open, otherwise
 *    == 0     -"device" is not handled by this module
 *
 */
@@ -153,7 +153,7 @@ FILEHANDLE _sys_open(const char * sName, int OpenMode) {
 *
 *  Parameters:
 *    hFile    - Handle to a file opened via _sys_open
-*  
+*
 *  Return value:
 *    0     - device/file closed
 *
@@ -176,7 +176,7 @@ int _sys_close(FILEHANDLE hFile) {
 *    pBuffer  - Pointer to the data that shall be written
 *    NumBytes      - Number of bytes to write
 *    Mode     - The Mode that shall be used
-*  
+*
 *  Return value:
 *    Number of bytes *not* written to the file/device
 *
@@ -205,7 +205,7 @@ int _sys_write(FILEHANDLE hFile, const unsigned char * pBuffer, unsigned NumByte
 *    pBuffer  - Pointer to buffer to store the read data
 *    NumBytes      - Number of bytes to read
 *    Mode     - The Mode that shall be used
-*  
+*
 *  Return value:
 *    Number of bytes read from the file/device
 *
@@ -223,12 +223,12 @@ int _sys_read(FILEHANDLE hFile, unsigned char * pBuffer, unsigned NumBytes, int
 *       _sys_istty
 *
 *  Function description:
-*    This function shall return whether the opened file 
+*    This function shall return whether the opened file
 *    is a console device or not.
 *
 *  Parameters:
 *    hFile    - Handle to a file opened via _sys_open
-*  
+*
 *  Return value:
 *    1       - Device is     a console
 *    0       - Device is not a console
@@ -250,10 +250,10 @@ int _sys_istty(FILEHANDLE hFile) {
 *
 *  Parameters:
 *    hFile  - Handle to a file opened via _sys_open
-*    Pos    - 
-*  
+*    Pos    -
+*
 *  Return value:
-*    int       - 
+*    int       -
 *
 */
 int _sys_seek(FILEHANDLE hFile, long Pos) {
@@ -267,13 +267,13 @@ int _sys_seek(FILEHANDLE hFile, long Pos) {
 *       _sys_ensure
 *
 *  Function description:
-*    
+*
 *
 *  Parameters:
 *    hFile    - Handle to a file opened via _sys_open
-*  
+*
 *  Return value:
-*    int       - 
+*    int       -
 *
 */
 int _sys_ensure(FILEHANDLE hFile) {
@@ -290,7 +290,7 @@ int _sys_ensure(FILEHANDLE hFile) {
 *
 *  Parameters:
 *    hFile    - Handle to a file opened via _sys_open
-*  
+*
 *  Return value:
 *    Length of the file
 *
@@ -305,17 +305,17 @@ long _sys_flen(FILEHANDLE hFile) {
 *       _sys_tmpnam
 *
 *  Function description:
-*    This function converts the file number fileno for a temporary 
+*    This function converts the file number fileno for a temporary
 *    file to a unique filename, for example, tmp0001.
 *
 *  Parameters:
 *    pBuffer    - Pointer to a buffer to store the name
 *    FileNum    - file number to convert
 *    MaxLen     - Size of the buffer
-*  
+*
 *  Return value:
 *     1 - Error
-*     0 - Success  
+*     0 - Success
 *
 */
 int _sys_tmpnam(char * pBuffer, int FileNum, unsigned MaxLen) {
@@ -335,7 +335,7 @@ int _sys_tmpnam(char * pBuffer, int FileNum, unsigned MaxLen) {
 *  Parameters:
 *    cmd    - Pointer to the command string
 *    len    - Length of the string
-*  
+*
 *  Return value:
 *    == NULL - Command was not successfully executed
 *    == sCmd - Command was passed successfully
@@ -355,7 +355,7 @@ char * _sys_command_string(char * cmd, int len) {
 *
 *  Parameters:
 *    ReturnCode    - Return code from the main function
-*  
+*
 *
 */
 void _sys_exit(int ReturnCode) {
@@ -373,7 +373,7 @@ void _sys_exit(int ReturnCode) {
 *
 *  Parameters:
 *    ch    - Character to output
-*  
+*
 *
 */
 int stdout_putchar(int ch) {
diff --git a/lib/fatfs/source/00history.txt b/lib/fatfs/source/00history.txt
index 7a153a229..f7898cbd9 100644
--- a/lib/fatfs/source/00history.txt
+++ b/lib/fatfs/source/00history.txt
@@ -366,4 +366,3 @@ R0.15 (November 6, 2022)
   Fixed f_mkfs() creates broken exFAT volume when the size of volume is >= 2^32 sectors.
   Fixed string functions cannot write the unicode characters not in BMP when FF_LFN_UNICODE == 2 (UTF-8).
   Fixed a compatibility issue in identification of GPT header.
-
diff --git a/lib/fatfs/source/00readme.txt b/lib/fatfs/source/00readme.txt
index 3de3aeaa2..48c02a42d 100644
--- a/lib/fatfs/source/00readme.txt
+++ b/lib/fatfs/source/00readme.txt
@@ -18,4 +18,3 @@ FILES
   module is only a generic file system layer and it does not depend on any specific
   storage device. You need to provide a low level disk I/O module written to
   control the storage device that attached to the target system.
-
diff --git a/lib/fatfs/source/diskio.c b/lib/fatfs/source/diskio.c
index 179e387a2..3cb423db3 100644
--- a/lib/fatfs/source/diskio.c
+++ b/lib/fatfs/source/diskio.c
@@ -226,4 +226,3 @@ DRESULT disk_ioctl (
 
 	return RES_PARERR;
 }
-
diff --git a/lib/fatfs/source/ff.c b/lib/fatfs/source/ff.c
index 6d412fa0e..05ca02f0a 100644
--- a/lib/fatfs/source/ff.c
+++ b/lib/fatfs/source/ff.c
@@ -7081,4 +7081,3 @@ FRESULT f_setcp (
 	return FR_OK;
 }
 #endif	/* FF_CODE_PAGE == 0 */
-
diff --git a/lib/fatfs/source/ffsystem.c b/lib/fatfs/source/ffsystem.c
index d5c5134bf..bc0047dce 100644
--- a/lib/fatfs/source/ffsystem.c
+++ b/lib/fatfs/source/ffsystem.c
@@ -205,4 +205,3 @@ void ff_mutex_give (
 }
 
 #endif	/* FF_FS_REENTRANT */
-
diff --git a/lib/networking/dhserver.c b/lib/networking/dhserver.c
index 8cd22ddb9..2f14f7a09 100644
--- a/lib/networking/dhserver.c
+++ b/lib/networking/dhserver.c
@@ -2,17 +2,17 @@
  * The MIT License (MIT)
  *
  * Copyright (c) 2015 by Sergey Fetisov <fsenok@gmail.com>
- * 
+ *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
  * in the Software without restriction, including without limitation the rights
  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  * copies of the Software, and to permit persons to whom the Software is
  * furnished to do so, subject to the following conditions:
- * 
+ *
  * The above copyright notice and this permission notice shall be included in all
  * copies or substantial portions of the Software.
- * 
+ *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
@@ -267,7 +267,7 @@ static void udp_recv_proc(void *arg, struct udp_pcb *upcb, struct pbuf *p, const
 				DHCP_OFFER,
 				config->domain,
 				config->dns,
-				entry->lease, 
+				entry->lease,
 				*netif_ip4_addr(netif),
 				config->router,
 				*netif_ip4_netmask(netif));
@@ -309,7 +309,7 @@ static void udp_recv_proc(void *arg, struct udp_pcb *upcb, struct pbuf *p, const
 				DHCP_ACK,
 				config->domain,
 				config->dns,
-				entry->lease, 
+				entry->lease,
 				*netif_ip4_addr(netif),
 				config->router,
 				*netif_ip4_netmask(netif));
diff --git a/lib/networking/dhserver.h b/lib/networking/dhserver.h
index 2a0b15854..b3642459a 100644
--- a/lib/networking/dhserver.h
+++ b/lib/networking/dhserver.h
@@ -2,17 +2,17 @@
  * The MIT License (MIT)
  *
  * Copyright (c) 2015 by Sergey Fetisov <fsenok@gmail.com>
- * 
+ *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
  * in the Software without restriction, including without limitation the rights
  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  * copies of the Software, and to permit persons to whom the Software is
  * furnished to do so, subject to the following conditions:
- * 
+ *
  * The above copyright notice and this permission notice shall be included in all
  * copies or substantial portions of the Software.
- * 
+ *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
diff --git a/lib/networking/dnserver.c b/lib/networking/dnserver.c
index 539cc2cea..6d15fee02 100644
--- a/lib/networking/dnserver.c
+++ b/lib/networking/dnserver.c
@@ -2,17 +2,17 @@
  * The MIT License (MIT)
  *
  * Copyright (c) 2015 by Sergey Fetisov <fsenok@gmail.com>
- * 
+ *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
  * in the Software without restriction, including without limitation the rights
  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  * copies of the Software, and to permit persons to whom the Software is
  * furnished to do so, subject to the following conditions:
- * 
+ *
  * The above copyright notice and this permission notice shall be included in all
  * copies or substantial portions of the Software.
- * 
+ *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
@@ -165,7 +165,7 @@ static void udp_recv_proc(void *arg, struct udp_pcb *upcb, struct pbuf *p, const
 	answer->ttl = htonl(32);
 	answer->len = htons(4);
 	answer->addr = host_addr.addr;
-	
+
 	udp_sendto(upcb, out, addr, port);
 	pbuf_free(out);
 
diff --git a/lib/networking/dnserver.h b/lib/networking/dnserver.h
index a062e3aa7..50b29be89 100644
--- a/lib/networking/dnserver.h
+++ b/lib/networking/dnserver.h
@@ -2,17 +2,17 @@
  * The MIT License (MIT)
  *
  * Copyright (c) 2015 by Sergey Fetisov <fsenok@gmail.com>
- * 
+ *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
  * in the Software without restriction, including without limitation the rights
  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  * copies of the Software, and to permit persons to whom the Software is
  * furnished to do so, subject to the following conditions:
- * 
+ *
  * The above copyright notice and this permission notice shall be included in all
  * copies or substantial portions of the Software.
- * 
+ *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
diff --git a/lib/networking/ndis.h b/lib/networking/ndis.h
index 06258e6bb..29b07749c 100644
--- a/lib/networking/ndis.h
+++ b/lib/networking/ndis.h
@@ -16,14 +16,14 @@
  */
 
 /*
- * ndis.h 
- * 
+ * ndis.h
+ *
  * Modified by Colin O'Flynn <coflynn@newae.com>
  * ntddndis.h modified by Benedikt Spranger <b.spranger@pengutronix.de>
- * 
- * Thanks to the cygwin development team, 
+ *
+ * Thanks to the cygwin development team,
  * especially to Casper S. Hornstrup <chorns@users.sourceforge.net>
- * 
+ *
  * THIS SOFTWARE IS NOT COPYRIGHTED
  *
  * This source code is offered for use in the public domain. You may
diff --git a/lib/networking/rndis_protocol.h b/lib/networking/rndis_protocol.h
index b45860eeb..3d07d6fa3 100644
--- a/lib/networking/rndis_protocol.h
+++ b/lib/networking/rndis_protocol.h
@@ -39,7 +39,7 @@
 #ifndef _RNDIS_H
 #define _RNDIS_H
 
-/** 
+/**
   \addtogroup RNDIS
   @{
   */
@@ -112,7 +112,7 @@ typedef struct{
 	rndis_MinorVersion_t	MinorVersion;
 	rndis_MaxTransferSize_t	MaxTransferSize;
 	} rndis_initialize_msg_t;
-	
+
 /* Response: */
 typedef struct{
 	rndis_MessageType_t		MessageType;
@@ -129,7 +129,7 @@ typedef struct{
 	rndis_AfListOffset_t	AfListOffset;
 	rndis_AfListSize_t		AfListSize;
 	} rndis_initialize_cmplt_t;
-	
+
 
 /*** Remote NDIS Halt Message ***/
 typedef struct{
@@ -137,7 +137,7 @@ typedef struct{
 	rndis_MessageLength_t	MessageLength;
 	rndis_RequestId_t		RequestId;
 	} rndis_halt_msg_t;
-	
+
 typedef uint32_t rndis_Oid_t;
 typedef uint32_t rndis_InformationBufferLength_t;
 typedef uint32_t rndis_InformationBufferOffset_t;
@@ -153,7 +153,7 @@ typedef struct{
 	rndis_InformationBufferOffset_t	InformationBufferOffset;
 	rndis_DeviceVcHandle_t			DeviceVcHandle;
 	}  rndis_query_msg_t;
-	
+
 /* Response: */
 
 typedef struct{
@@ -164,7 +164,7 @@ typedef struct{
 	rndis_InformationBufferLength_t	InformationBufferLength;
 	rndis_InformationBufferOffset_t	InformationBufferOffset;
 	} rndis_query_cmplt_t;
-	
+
 /*** Remote NDIS Set Message ***/
 typedef struct{
 	rndis_MessageType_t		MessageType;
@@ -175,7 +175,7 @@ typedef struct{
 	rndis_InformationBufferOffset_t	InformationBufferOffset;
 	rndis_DeviceVcHandle_t			DeviceVcHandle;
 	} rndis_set_msg_t;
-	
+
 /* Response */
 typedef struct{
 	rndis_MessageType_t		MessageType;
@@ -199,9 +199,9 @@ typedef struct{
 	rndis_ParameterNameLength_t		ParameterNameLength;
 	rndis_ParameterType_t			ParameterType;
 	rndis_ParameterValueOffset_t	ParameterValueOffset;
-	rndis_ParameterValueLength_t	ParameterValueLength;	
+	rndis_ParameterValueLength_t	ParameterValueLength;
 	}rndis_config_parameter_t;
-	
+
 typedef uint32_t rndis_Reserved_t;
 
 /*** Remote NDIS Soft Reset Message ***/
@@ -210,7 +210,7 @@ typedef struct{
 	rndis_MessageLength_t	MessageLength;
 	rndis_Reserved_t		Reserved;
 	} rndis_reset_msg_t;
-	
+
 typedef uint32_t rndis_AddressingReset_t;
 
 /* Response: */
@@ -220,7 +220,7 @@ typedef struct{
 	rndis_Status_t			Status;
 	rndis_AddressingReset_t	AddressingReset;
 	}  rndis_reset_cmplt_t;
-	
+
 /*** Remote NDIS Indicate Status Message ***/
 typedef struct{
 	rndis_MessageType_t		MessageType;
@@ -229,7 +229,7 @@ typedef struct{
 	rndis_Status_t			StatusBufferLength;
 	rndis_Status_t			StatusBufferOffset;
 	}  rndis_indicate_status_t;
-	
+
 typedef uint32_t rndis_DiagStatus_t;
 typedef uint32_t rndis_ErrorOffset_t;
 
@@ -237,14 +237,14 @@ typedef struct {
 	rndis_DiagStatus_t		DiagStatus;
 	rndis_ErrorOffset_t		ErrorOffset;
 	}rndis_diagnostic_info_t;
-	
+
 /*** Remote NDIS Keepalive Message */
 typedef struct{
 	rndis_MessageType_t		MessageType;
 	rndis_MessageLength_t	MessageLength;
 	rndis_RequestId_t		RequestId;
 	}rndis_keepalive_msg_t;
-	
+
 /* Response: */
 typedef struct{
 	rndis_MessageType_t		MessageType;
diff --git a/lib/networking/rndis_reports.c b/lib/networking/rndis_reports.c
index d129466c8..cc14f174c 100644
--- a/lib/networking/rndis_reports.c
+++ b/lib/networking/rndis_reports.c
@@ -7,17 +7,17 @@
  * The MIT License (MIT)
  *
  * Copyright (c) 2015 by Sergey Fetisov <fsenok@gmail.com>
- * 
+ *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
  * in the Software without restriction, including without limitation the rights
  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  * copies of the Software, and to permit persons to whom the Software is
  * furnished to do so, subject to the following conditions:
- * 
+ *
  * The above copyright notice and this permission notice shall be included in all
  * copies or substantial portions of the Software.
- * 
+ *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
@@ -45,7 +45,7 @@ static rndis_state_t rndis_state;
 
 CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static uint8_t ndis_report[8] = { 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
 
-static const uint32_t OIDSupportedList[] = 
+static const uint32_t OIDSupportedList[] =
 {
   OID_GEN_SUPPORTED_LIST,
   OID_GEN_HARDWARE_STATUS,
@@ -203,8 +203,8 @@ static void rndis_handle_set_msg(void)
       {
         rndis_packetFilter(oid_packet_filter);
         rndis_state = rndis_data_initialized;
-      } 
-      else 
+      }
+      else
       {
         rndis_state = rndis_initialized;
       }
@@ -266,7 +266,7 @@ void rndis_class_set_handler(uint8_t *data, int size)
     case REMOTE_NDIS_QUERY_MSG:
       rndis_query();
       break;
-      
+
     case REMOTE_NDIS_SET_MSG:
       rndis_handle_set_msg();
       break;
diff --git a/src/class/audio/audio.h b/src/class/audio/audio.h
index ba497906b..70d431282 100644
--- a/src/class/audio/audio.h
+++ b/src/class/audio/audio.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -824,10 +824,10 @@ typedef struct TU_ATTR_PACKED
             uint8_t type      :  2; ///< Request type tusb_request_type_t.
             uint8_t direction :  1; ///< Direction type. tusb_dir_t
         } bmRequestType_bit;
-        
+
         uint8_t bmRequestType;
     };
-    
+
     uint8_t bRequest;  ///< Request type audio_cs_req_t
     uint8_t bChannelNumber;
     uint8_t bControlSelector;
diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index f21dfee64..32ba5761e 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 Reinhard Panhuber, Jerzy Kasenberg
@@ -1525,7 +1525,7 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
   #endif
               }
             }
-            
+
           }
         }
         p_desc = tu_desc_next(p_desc);
@@ -2124,7 +2124,7 @@ bool audiod_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint3
     {
       if (tud_audio_fb_done_cb) tud_audio_fb_done_cb(func_id);
 
-      // Schedule a transmit with the new value if EP is not busy 
+      // Schedule a transmit with the new value if EP is not busy
       if (!usbd_edpt_busy(rhport, audio->ep_fb))
       {
         // Schedule next transmission - value is changed bytud_audio_n_fb_set() in the meantime or the old value gets sent
diff --git a/src/class/audio/audio_device.h b/src/class/audio/audio_device.h
index 0ef100fa4..7c88b99fc 100644
--- a/src/class/audio/audio_device.h
+++ b/src/class/audio/audio_device.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 Ha Thach (tinyusb.org)
@@ -473,7 +473,7 @@ TU_ATTR_WEAK void tud_audio_fb_done_cb(uint8_t func_id);
 // the choice of format is left to the caller and feedback argument is sent as-is. If CFG_TUD_AUDIO_ENABLE_FEEDBACK_FORMAT_CORRECTION is set, then tinyusb
 // expects 16.16 format and handles the conversion to 10.14 on FS.
 //
-// Note that due to a bug in its USB Audio 2.0 driver, Windows currently requires 16.16 format for _all_ USB 2.0 devices. On Linux and macOS it seems the 
+// Note that due to a bug in its USB Audio 2.0 driver, Windows currently requires 16.16 format for _all_ USB 2.0 devices. On Linux and macOS it seems the
 // driver can work with either format. So a good compromise is to keep format correction disabled and stick to 16.16 format.
 
 // Feedback value can be determined from within the SOF ISR of the audio driver. This should reduce jitter. If the feature is used, the user can not set the feedback value.
diff --git a/src/class/bth/bth_device.h b/src/class/bth/bth_device.h
index 1b90d0915..921bd7a1a 100755
--- a/src/class/bth/bth_device.h
+++ b/src/class/bth/bth_device.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 Jerzy Kasenberg
diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c
index f372fe462..a82ef1d62 100644
--- a/src/class/cdc/cdc_device.c
+++ b/src/class/cdc/cdc_device.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -386,7 +386,7 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
         bool const rts = tu_bit_test(request->wValue, 1);
 
         p_cdc->line_state = (uint8_t) request->wValue;
-        
+
         // Disable fifo overwriting if DTR bit is set
         tu_fifo_set_overwritable(&p_cdc->tx_ff, !dtr);
 
@@ -433,7 +433,7 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_
   if ( ep_addr == p_cdc->ep_out )
   {
     tu_fifo_write_n(&p_cdc->rx_ff, p_cdc->epout_buf, (uint16_t) xferred_bytes);
-    
+
     // Check for wanted char and invoke callback if needed
     if ( tud_cdc_rx_wanted_cb && (((signed char) p_cdc->wanted_char) != -1) )
     {
@@ -445,14 +445,14 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_
         }
       }
     }
-    
+
     // invoke receive callback (if there is still data)
     if (tud_cdc_rx_cb && !tu_fifo_empty(&p_cdc->rx_ff) ) tud_cdc_rx_cb(itf);
-    
+
     // prepare for OUT transaction
     _prep_out_transaction(p_cdc);
   }
-  
+
   // Data sent to host, we continue to fetch from tx fifo to send.
   // Note: This will cause incorrect baudrate set in line coding.
   //       Though maybe the baudrate is not really important !!!
diff --git a/src/class/cdc/cdc_device.h b/src/class/cdc/cdc_device.h
index f8a004df4..a6e07aa5c 100644
--- a/src/class/cdc/cdc_device.h
+++ b/src/class/cdc/cdc_device.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h
index c759527e6..4090d0e9f 100644
--- a/src/class/cdc/cdc_host.h
+++ b/src/class/cdc/cdc_host.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/class/cdc/cdc_rndis.h b/src/class/cdc/cdc_rndis.h
index e0f129fe3..ad153e0ac 100644
--- a/src/class/cdc/cdc_rndis.h
+++ b/src/class/cdc/cdc_rndis.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/class/cdc/cdc_rndis_host.c b/src/class/cdc/cdc_rndis_host.c
index 44de85b45..41d21bbad 100644
--- a/src/class/cdc/cdc_rndis_host.c
+++ b/src/class/cdc/cdc_rndis_host.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/class/cdc/cdc_rndis_host.h b/src/class/cdc/cdc_rndis_host.h
index 447cc4e97..bb431ec1f 100644
--- a/src/class/cdc/cdc_rndis_host.h
+++ b/src/class/cdc/cdc_rndis_host.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/class/hid/hid.h b/src/class/hid/hid.h
index d9b0ead10..fbd3eef38 100644
--- a/src/class/hid/hid.h
+++ b/src/class/hid/hid.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/class/midi/midi.h b/src/class/midi/midi.h
index 74dc41749..8b78c6555 100644
--- a/src/class/midi/midi.h
+++ b/src/class/midi/midi.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/class/midi/midi_device.c b/src/class/midi/midi_device.c
index 5dea43431..e3e7826da 100644
--- a/src/class/midi/midi_device.c
+++ b/src/class/midi/midi_device.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/class/midi/midi_device.h b/src/class/midi/midi_device.h
index 211edc8d1..1c6f996be 100644
--- a/src/class/midi/midi_device.h
+++ b/src/class/midi/midi_device.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/class/msc/msc.h b/src/class/msc/msc.h
index 84b6e4d79..7f25a29ba 100644
--- a/src/class/msc/msc.h
+++ b/src/class/msc/msc.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/class/msc/msc_device.h b/src/class/msc/msc_device.h
index 5839b168d..72f95be06 100644
--- a/src/class/msc/msc_device.h
+++ b/src/class/msc/msc_device.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c
index 6724e486c..2fddeb818 100644
--- a/src/class/msc/msc_host.c
+++ b/src/class/msc/msc_host.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -232,23 +232,23 @@ bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba,
 
   msc_cbw_t cbw;
   cbw_init(&cbw, lun);
- 
+
   cbw.total_bytes = block_count*p_msc->capacity[lun].block_size;
   cbw.dir         = TUSB_DIR_IN_MASK;
   cbw.cmd_len     = sizeof(scsi_read10_t);
- 
+
   scsi_read10_t const cmd_read10 =
   {
     .cmd_code    = SCSI_CMD_READ_10,
     .lba         = tu_htonl(lba),
     .block_count = tu_htons(block_count)
   };
- 
+
   memcpy(cbw.command, &cmd_read10, cbw.cmd_len);
- 
+
   return tuh_msc_scsi_command(dev_addr, &cbw, buffer, complete_cb, arg);
 }
- 
+
 bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb, uintptr_t arg)
 {
   msch_interface_t* p_msc = get_itf(dev_addr);
diff --git a/src/class/msc/msc_host.h b/src/class/msc/msc_host.h
index 5134b63c2..6c0e5c9dd 100644
--- a/src/class/msc/msc_host.h
+++ b/src/class/msc/msc_host.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/class/net/ecm_rndis_device.c b/src/class/net/ecm_rndis_device.c
index a072bfd79..8ac7cbd01 100644
--- a/src/class/net/ecm_rndis_device.c
+++ b/src/class/net/ecm_rndis_device.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 Peter Lawrence
diff --git a/src/class/net/ncm_device.c b/src/class/net/ncm_device.c
index aa13c9535..9e9580249 100644
--- a/src/class/net/ncm_device.c
+++ b/src/class/net/ncm_device.c
@@ -430,7 +430,7 @@ static void handle_incoming_datagram(uint32_t len)
   {
     ncm_interface.num_datagrams++;
   }
-  
+
   tud_network_recv_renew();
 }
 
diff --git a/src/class/net/net_device.h b/src/class/net/net_device.h
index 6e294465b..133689deb 100644
--- a/src/class/net/net_device.h
+++ b/src/class/net/net_device.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 Peter Lawrence
diff --git a/src/class/usbtmc/usbtmc.h b/src/class/usbtmc/usbtmc.h
index fd52d766e..3c5e86d4c 100644
--- a/src/class/usbtmc/usbtmc.h
+++ b/src/class/usbtmc/usbtmc.h
@@ -316,4 +316,3 @@ typedef struct TU_ATTR_PACKED
 TU_VERIFY_STATIC(sizeof(usbtmc_read_stb_interrupt_488_t) == 2u, "struct wrong length");
 
 #endif
-
diff --git a/src/class/usbtmc/usbtmc_device.c b/src/class/usbtmc/usbtmc_device.c
index a4e6eaeb3..8dbda14c5 100644
--- a/src/class/usbtmc/usbtmc_device.c
+++ b/src/class/usbtmc/usbtmc_device.c
@@ -83,7 +83,7 @@ tu_static char logMsg[150];
 
 // Buffer size must be an exact multiple of the max packet size for both
 // bulk  (up to 64 bytes for FS, 512 bytes for HS). In addation, this driver
-// imposes a minimum buffer size of 32 bytes. 
+// imposes a minimum buffer size of 32 bytes.
 #define USBTMCD_BUFFER_SIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
 
 /*
@@ -598,7 +598,7 @@ bool usbtmcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request
     uint32_t ep_addr = (request->wIndex);
 
     // At this point, a transfer MAY be in progress. Based on USB spec, when clearing bulk EP HALT,
-    // the EP transfer buffer needs to be cleared and DTOG needs to be reset, even if 
+    // the EP transfer buffer needs to be cleared and DTOG needs to be reset, even if
     // the EP is not halted. The only USBD API interface to do this is to stall and then un-stall the EP.
     if(ep_addr == usbtmc_state.ep_bulk_out)
     {
diff --git a/src/class/vendor/vendor_device.h b/src/class/vendor/vendor_device.h
index 2bb6afa67..9abafda50 100644
--- a/src/class/vendor/vendor_device.h
+++ b/src/class/vendor/vendor_device.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/class/vendor/vendor_host.c b/src/class/vendor/vendor_host.c
index dbea1228d..e66c5007f 100644
--- a/src/class/vendor/vendor_host.c
+++ b/src/class/vendor/vendor_host.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/class/vendor/vendor_host.h b/src/class/vendor/vendor_host.h
index 65223fbca..acfebe7a4 100644
--- a/src/class/vendor/vendor_host.h
+++ b/src/class/vendor/vendor_host.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c
index 02a490aee..d6e98602b 100644
--- a/src/class/video/video_device.c
+++ b/src/class/video/video_device.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2021 Koji KITAYAMA
diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index 30478ba6d..1057d7ca3 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -239,7 +239,7 @@
   #define TU_BSWAP16(u16) ((unsigned short)_builtin_revw((unsigned long)u16))
   #define TU_BSWAP32(u32) (_builtin_revl(u32))
 
-#else 
+#else
   #error "Compiler attribute porting is required"
 #endif
 
diff --git a/src/common/tusb_timeout.h b/src/common/tusb_timeout.h
index ce53955f0..533e67ab8 100644
--- a/src/common/tusb_timeout.h
+++ b/src/common/tusb_timeout.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h
index a52a6d269..12355e8be 100644
--- a/src/common/tusb_verify.h
+++ b/src/common/tusb_verify.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/device/dcd.h b/src/device/dcd.h
index 93170732f..00419ff05 100644
--- a/src/device/dcd.h
+++ b/src/device/dcd.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/device/usbd.c b/src/device/usbd.c
index 7733cc2e2..0fb236a88 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -1398,11 +1398,11 @@ bool usbd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep
 
   uint8_t const epnum = tu_edpt_number(desc_ep->bEndpointAddress);
   uint8_t const dir   = tu_edpt_dir(desc_ep->bEndpointAddress);
-  
+
   TU_ASSERT(dcd_edpt_iso_activate);
   TU_ASSERT(epnum < CFG_TUD_ENDPPOINT_MAX);
   TU_ASSERT(tu_edpt_validate(desc_ep, (tusb_speed_t) _usbd_dev.speed));
-  
+
   _usbd_dev.ep_status[epnum][dir].stalled = false;
   _usbd_dev.ep_status[epnum][dir].busy = false;
   _usbd_dev.ep_status[epnum][dir].claimed = false;
diff --git a/src/device/usbd_pvt.h b/src/device/usbd_pvt.h
index f860ab0a1..8393d3469 100644
--- a/src/device/usbd_pvt.h
+++ b/src/device/usbd_pvt.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/host/hcd.h b/src/host/hcd.h
index a400626e4..623c12a12 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/host/hub.c b/src/host/hub.c
index 3da5358b2..b84042fb6 100644
--- a/src/host/hub.c
+++ b/src/host/hub.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -202,7 +202,7 @@ bool hub_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf
 
   TU_ASSERT(TUSB_DESC_ENDPOINT  == desc_ep->bDescriptorType &&
             TUSB_XFER_INTERRUPT == desc_ep->bmAttributes.xfer, 0);
-  
+
   TU_ASSERT(tuh_edpt_open(dev_addr, desc_ep));
 
   hub_interface_t* p_hub = get_itf(dev_addr);
diff --git a/src/host/usbh.h b/src/host/usbh.h
index 37de7093c..7942de5c2 100644
--- a/src/host/usbh.h
+++ b/src/host/usbh.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/osal/osal.h b/src/osal/osal.h
index afa3826fc..f092e8ffb 100644
--- a/src/osal/osal.h
+++ b/src/osal/osal.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h
index 9393d1f26..477f64892 100644
--- a/src/osal/osal_freertos.h
+++ b/src/osal/osal_freertos.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h
index 2e2b3c7ce..5f407378e 100644
--- a/src/osal/osal_none.h
+++ b/src/osal/osal_none.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/osal/osal_pico.h b/src/osal/osal_pico.h
index 8b428d642..e6efa0968 100644
--- a/src/osal/osal_pico.h
+++ b/src/osal/osal_pico.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
diff --git a/src/osal/osal_rtx4.h b/src/osal/osal_rtx4.h
index dea1c12c8..e443135e0 100644
--- a/src/osal/osal_rtx4.h
+++ b/src/osal/osal_rtx4.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2021 Tian Yunhao (t123yh)
@@ -115,7 +115,7 @@ TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hd
   os_mbx_declare(_name##__mbox, _depth);              \
   _declare_box(_name##__pool, sizeof(_type), _depth); \
   osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .pool = _name##__pool, .mbox = _name##__mbox };
-  
+
 
 typedef struct
 {
diff --git a/src/portable/bridgetek/ft9xx/dcd_ft9xx.c b/src/portable/bridgetek/ft9xx/dcd_ft9xx.c
index efca5bdcb..95dfda49c 100644
--- a/src/portable/bridgetek/ft9xx/dcd_ft9xx.c
+++ b/src/portable/bridgetek/ft9xx/dcd_ft9xx.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright 2021 Bridgetek Pte Ltd
@@ -24,15 +24,15 @@
  * This file is part of the TinyUSB stack.
  */
 
-/* 
- * Contains code adapted from Bridgetek Pte Ltd via license terms stated 
+/*
+ * Contains code adapted from Bridgetek Pte Ltd via license terms stated
  * in https://brtchip.com/BRTSourceCodeLicenseAgreement
  */
 
 #include "tusb_option.h"
 
 #if CFG_TUD_ENABLED && \
-  (CFG_TUSB_MCU == OPT_MCU_FT90X || CFG_TUSB_MCU == OPT_MCU_FT93X) 
+  (CFG_TUSB_MCU == OPT_MCU_FT90X || CFG_TUSB_MCU == OPT_MCU_FT93X)
 
 #include <stdint.h>
 #include <ft900.h>
@@ -58,7 +58,7 @@ struct ft9xx_xfer_state
 {
   volatile uint8_t ready; // OUT Transfer has been received and waiting for transfer.
   volatile uint8_t valid; // Transfer is pending and total_size, remain_size, and buff_ptr are valid.
-  
+
   int16_t total_size; // Total transfer size in bytes for this transfer.
   int16_t remain_size; // Total remaining in transfer.
   uint8_t *buff_ptr; // Pointer to buffer to transmit from or receive to.
@@ -92,7 +92,7 @@ static uint16_t _ft9xx_dusb_out(uint8_t ep_number, uint8_t *buffer, uint16_t len
 
 // Manage an OUT transfer from the host.
 // This can be up-to the maximum packet size of the endpoint.
-// Continuation of a transfer beyond the maximum packet size is performed 
+// Continuation of a transfer beyond the maximum packet size is performed
 // by the interrupt handler.
 static uint16_t _ft9xx_edpt_xfer_out(uint8_t ep_number, uint8_t *buffer, uint16_t xfer_bytes)
 {
@@ -125,7 +125,7 @@ static uint16_t _ft9xx_edpt_xfer_out(uint8_t ep_number, uint8_t *buffer, uint16_
 
 // Manage an IN transfer to the host.
 // This can be up-to the maximum packet size of the endpoint.
-// Continuation of a transfer beyond the maximum packet size is performed 
+// Continuation of a transfer beyond the maximum packet size is performed
 // by the interrupt handler.
 static uint16_t _ft9xx_edpt_xfer_in(uint8_t ep_number, uint8_t *buffer, uint16_t xfer_bytes)
 {
@@ -196,7 +196,7 @@ static uint16_t _ft9xx_edpt_xfer_in(uint8_t ep_number, uint8_t *buffer, uint16_t
   return xfer_bytes;
 }
 
-// Reset all non-control endpoints to a default state. 
+// Reset all non-control endpoints to a default state.
 // Control endpoint is always enabled and ready. All others disabled.
 static void _ft9xx_reset_edpts(void)
 {
@@ -208,7 +208,7 @@ static void _ft9xx_reset_edpts(void)
     // Disable hardware.
     USBD_EP_CR_REG(i) = 0;
   }
-  
+
   // Enable interrupts from USB device control.
   USBD_REG(cmie) = MASK_USBD_CMIE_ALL;
 }
@@ -319,7 +319,7 @@ static void _dcd_ft9xx_detach(void)
 }
 
 // Determine the speed of the USB to which we are connected.
-// Set the speed of the PHY accordingly. 
+// Set the speed of the PHY accordingly.
 // High speed can be disabled through CFG_TUSB_RHPORT0_MODE or CFG_TUD_MAX_SPEED settings.
 static void _ft9xx_usb_speed(void)
 {
@@ -379,16 +379,16 @@ static void _ft9xx_usb_speed(void)
 }
 
 // Send a buffer to the USB IN FIFO.
-// When the macro USBD_USE_STREAMS is defined this will stream a buffer of data 
+// When the macro USBD_USE_STREAMS is defined this will stream a buffer of data
 // to the FIFO using the most efficient MCU streamout combination.
-// If streaming is disabled then it will send each byte of the buffer in turn 
+// If streaming is disabled then it will send each byte of the buffer in turn
 // to the FIFO. The is no reason to not stream.
 // The total number of bytes sent to the FIFO is returned.
 static uint16_t _ft9xx_dusb_in(uint8_t ep_number, const uint8_t *buffer, uint16_t length)
 {
   uint16_t bytes_read = 0;
   uint16_t buff_size = length;
-  
+
 #ifdef USBD_USE_STREAMS
   volatile uint8_t *data_reg;
 
@@ -423,7 +423,7 @@ static uint16_t _ft9xx_dusb_in(uint8_t ep_number, const uint8_t *buffer, uint16_
     bytes_read = buff_size;
   }
 #else // USBD_USE_STREAMS
-  
+
   bytes_read = buff_size;
   while (buff_size--)
   {
@@ -438,7 +438,7 @@ static uint16_t _ft9xx_dusb_in(uint8_t ep_number, const uint8_t *buffer, uint16_
 // Receive a buffer from the USB OUT FIFO.
 // When the macro USBD_USE_STREAMS is defined this will stream from the FIFO
 // to a buffer of data using the most efficient MCU streamin combination.
-// If streaming is disabled then it will receive each byte from the FIFO in turn 
+// If streaming is disabled then it will receive each byte from the FIFO in turn
 // to the buffer. The is no reason to not stream.
 // The total number of bytes received from the FIFO is returned.
 static uint16_t _ft9xx_dusb_out(uint8_t ep_number, uint8_t *buffer, uint16_t length)
@@ -448,7 +448,7 @@ static uint16_t _ft9xx_dusb_out(uint8_t ep_number, uint8_t *buffer, uint16_t len
 #endif // USBD_USE_STREAMS
   uint16_t bytes_read = 0;
   uint16_t buff_size = length;
-  
+
   if (length > 0)
   {
     if (ep_number == USBD_EP_0)
@@ -596,7 +596,7 @@ void dcd_remote_wakeup(uint8_t rhport)
   SYS->MSC0CFG = SYS->MSC0CFG | MASK_SYS_MSC0CFG_DEV_RMWAKEUP;
 
   // At least 2 ms of delay needed for RESUME Data K state.
-  delayms(2); 
+  delayms(2);
 
   SYS->MSC0CFG &= ~MASK_SYS_MSC0CFG_DEV_RMWAKEUP;
 
@@ -621,7 +621,7 @@ void dcd_connect(uint8_t rhport)
     // Determine bus speed and signal speed to tusb.
     _ft9xx_usb_speed();
   }
-  
+
   // Setup the control endpoint only.
 #if CFG_TUD_ENDPOINT0_SIZE == 64
   USBD_EP_CR_REG(USBD_EP_0) = (USBD_EP0_MAX_SIZE_64 << BIT_USBD_EP0_MAX_SIZE);
@@ -702,7 +702,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc)
     TU_LOG1("FT9xx endpoint size not valid: requested %d max 1024\r\n", ep_size);
     return false;
   }
-  // Calculate actual amount of buffer RAM used by this endpoint. This may be more than the 
+  // Calculate actual amount of buffer RAM used by this endpoint. This may be more than the
   // requested size.
   ep_buff_size = 8 << ep_reg_size;
 
@@ -714,7 +714,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc)
     if (ep_xfer[ep_number].type != USBD_EP_TYPE_DISABLED)
     {
       // This could be because an endpoint has been assigned with the same number.
-      // On FT9xx, IN and OUT endpoints may not have the same number. e.g. There 
+      // On FT9xx, IN and OUT endpoints may not have the same number. e.g. There
       // cannot been an 0x81 and 0x01 endpoint.
       TU_LOG1("FT9xx endpoint %d already assigned\r\n", ep_number);
       return false;
@@ -723,7 +723,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc)
     // Check that there is enough buffer RAM to allocate to this new endpoint.
     // Available buffer RAM depends on the device revision.
     // The IN and OUT buffer RAM should be the same size.
-    if (ep_dir == USBD_DIR_IN) 
+    if (ep_dir == USBD_DIR_IN)
       total_ram = USBD_RAMTOTAL_IN;
     else
       total_ram = USBD_RAMTOTAL_OUT;
@@ -753,7 +753,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *ep_desc)
     if (total_ram < ep_buff_size)
     {
       TU_LOG1("FT9xx insufficient buffer RAM for endpoint %d\r\n", ep_number);
-      return false;    
+      return false;
     }
 
     // Set the type of this endpoint in the control register.
@@ -827,7 +827,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to
     ep_xfer[ep_number].total_size = total_bytes;
     ep_xfer[ep_number].remain_size = total_bytes;
     ep_xfer[ep_number].buff_ptr = buffer;
-    
+
     if (ep_number == USBD_EP_0)
     {
       ep_xfer[USBD_EP_0].dir = ep_dir;
@@ -876,7 +876,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to
         // then report the transfer complete with dcd_event_xfer_complete.
         ep_xfer[ep_number].valid = 1;
       }
-    } 
+    }
     status = true;
   }
   else
@@ -922,7 +922,7 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
   CRITICAL_SECTION_END
 }
 
-// Clear stall (non-control endpoint), data toggle is also reset to DATA0 
+// Clear stall (non-control endpoint), data toggle is also reset to DATA0
 void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
 {
   uint8_t ep_number = tu_edpt_number(ep_addr);
@@ -1025,7 +1025,7 @@ void dcd_int_handler(uint8_t rhport)
 
         // Host has sent a SETUP packet. Receive this into the SETUP packet store.
         _ft9xx_dusb_out(USBD_EP_0, (uint8_t *)_ft9xx_setup_packet, sizeof(USB_device_request));
-        
+
         // Send the packet to tinyusb.
         dcd_event_setup_received(BOARD_TUD_RHPORT, _ft9xx_setup_packet, true);
 
@@ -1046,13 +1046,13 @@ void dcd_int_handler(uint8_t rhport)
         {
           xfer_bytes = (uint16_t)ep_xfer[USBD_EP_0].total_size;
 
-          // Transfer incoming data from an OUT packet to the buffer supplied.        
+          // Transfer incoming data from an OUT packet to the buffer supplied.
           if (ep_xfer[USBD_EP_0].dir == TUSB_DIR_OUT)
           {
             xfer_bytes = _ft9xx_edpt_xfer_out(USBD_EP_0, ep_xfer[USBD_EP_0].buff_ptr, xfer_bytes);
           }
           // Now signal completion of data packet.
-          dcd_event_xfer_complete(BOARD_TUD_RHPORT, USBD_EP_0 | (ep_xfer[USBD_EP_0].dir ? TUSB_DIR_IN_MASK : 0), 
+          dcd_event_xfer_complete(BOARD_TUD_RHPORT, USBD_EP_0 | (ep_xfer[USBD_EP_0].dir ? TUSB_DIR_IN_MASK : 0),
             xfer_bytes, XFER_RESULT_SUCCESS, true);
 
           // Incoming FIFO has been cleared.
@@ -1097,13 +1097,13 @@ void dcd_int_handler(uint8_t rhport)
           // Start or continue an OUT transfer.
           if (ep_xfer[ep_number].dir == TUSB_DIR_OUT)
           {
-            xfer_bytes = _ft9xx_edpt_xfer_out(ep_number, 
-                            ep_xfer[ep_number].buff_ptr, 
+            xfer_bytes = _ft9xx_edpt_xfer_out(ep_number,
+                            ep_xfer[ep_number].buff_ptr,
                             (uint16_t)ep_xfer[ep_number].remain_size);
 
             // Report each OUT packet received to the stack.
-            dcd_event_xfer_complete(BOARD_TUD_RHPORT, 
-                                      ep_number /* | TUSB_DIR_OUT_MASK */, 
+            dcd_event_xfer_complete(BOARD_TUD_RHPORT,
+                                      ep_number /* | TUSB_DIR_OUT_MASK */,
                                       xfer_bytes, XFER_RESULT_SUCCESS, true);
 
             ep_xfer[ep_number].buff_ptr += xfer_bytes;
@@ -1114,8 +1114,8 @@ void dcd_int_handler(uint8_t rhport)
           {
             if (ep_xfer[ep_number].remain_size > 0)
             {
-              xfer_bytes = _ft9xx_edpt_xfer_in(ep_number, 
-                            ep_xfer[ep_number].buff_ptr, 
+              xfer_bytes = _ft9xx_edpt_xfer_in(ep_number,
+                            ep_xfer[ep_number].buff_ptr,
                             (uint16_t)ep_xfer[ep_number].remain_size);
 
               ep_xfer[ep_number].buff_ptr += xfer_bytes;
@@ -1124,8 +1124,8 @@ void dcd_int_handler(uint8_t rhport)
 
             if (ep_xfer[ep_number].remain_size == 0)
             {
-              dcd_event_xfer_complete(BOARD_TUD_RHPORT, 
-                                      ep_number | TUSB_DIR_IN_MASK, 
+              dcd_event_xfer_complete(BOARD_TUD_RHPORT,
+                                      ep_number | TUSB_DIR_IN_MASK,
                                       ep_xfer[ep_number].total_size, XFER_RESULT_SUCCESS, true);
             }
           }
@@ -1151,7 +1151,7 @@ void dcd_int_handler(uint8_t rhport)
             // once the transfer is initiated.
             // Strictly this should not happen for a non-control endpoint. Interrupts
             // are disabled when there are no transfers setup for an endpoint.
-            ep_xfer[ep_number].ready = 1;          
+            ep_xfer[ep_number].ready = 1;
           }
         }
       }
@@ -1159,13 +1159,13 @@ void dcd_int_handler(uint8_t rhport)
   }
 }
 
-// Power management interrupt handler. 
+// Power management interrupt handler.
 // This handles USB device related power management interrupts only.
 void ft9xx_usbd_pm_ISR(void)
 {
     uint16_t pmcfg = SYS->PMCFG_H;
 
-  // Main interrupt handler is responible for 
+  // Main interrupt handler is responible for
   if (pmcfg & MASK_SYS_PMCFG_DEV_CONN_DEV)
   {
       // Signal connection interrupt
diff --git a/src/portable/chipidea/ci_hs/ci_hs_type.h b/src/portable/chipidea/ci_hs/ci_hs_type.h
index 728a86b86..31b5a012d 100644
--- a/src/portable/chipidea/ci_hs/ci_hs_type.h
+++ b/src/portable/chipidea/ci_hs/ci_hs_type.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2021, Ha Thach (tinyusb.org)
diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
index 5bccf81a7..bc6736cf2 100644
--- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
@@ -545,7 +545,7 @@ static void process_edpt_complete_isr(uint8_t rhport, uint8_t epnum, uint8_t dir
       tu_fifo_advance_write_pointer(p_qhd->ff, xferred_bytes);
     }
   }
-  
+
   // only number of bytes in the IOC qtd
   dcd_event_xfer_complete(rhport, tu_edpt_addr(epnum, dir), xferred_bytes, result, true);
 }
diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
index d0396daea..d607627b4 100644
--- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 7140897a1..ee9dfb11f 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -566,7 +566,7 @@ static void period_list_xfer_complete_isr(uint8_t hostid, uint32_t interval_ms)
       case EHCI_QTYPE_ITD: // TODO support hs/fs ISO
       case EHCI_QTYPE_SITD:
       case EHCI_QTYPE_FSTN:
-				
+
       default: break;
     }
 
@@ -683,7 +683,7 @@ void hcd_int_handler(uint8_t rhport)
 
   uint32_t int_status = regs->status;
   int_status &= regs->inten;
-  
+
   regs->status = int_status; // Acknowledge handled interrupt
 
   if (int_status == 0) return;
diff --git a/src/portable/espressif/esp32sx/dcd_esp32sx.c b/src/portable/espressif/esp32sx/dcd_esp32sx.c
index 41240f737..1fcfb6241 100644
--- a/src/portable/espressif/esp32sx/dcd_esp32sx.c
+++ b/src/portable/espressif/esp32sx/dcd_esp32sx.c
@@ -874,4 +874,3 @@ void dcd_int_disable (uint8_t rhport)
 }
 
 #endif // #if OPT_MCU_ESP32S2 || OPT_MCU_ESP32S3
-
diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c
index 0ba53d4d0..487761847 100644
--- a/src/portable/mentor/musb/dcd_musb.c
+++ b/src/portable/mentor/musb/dcd_musb.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2021 Koji KITAYAMA
@@ -572,7 +572,7 @@ static void process_bus_reset(uint8_t rhport)
   _dcd.pipe0.buf = NULL;
 
   USB0->TXIE = 1; /* Enable only EP0 */
-  USB0->RXIE = 0; 
+  USB0->RXIE = 0;
 
   /* Clear FIFO settings */
   for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
@@ -722,7 +722,7 @@ void dcd_edpt_close_all(uint8_t rhport)
   unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn);
   NVIC_DisableIRQ(USB0_IRQn);
   USB0->TXIE = 1; /* Enable only EP0 */
-  USB0->RXIE = 0; 
+  USB0->RXIE = 0;
   for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) {
     regs->TXMAXP = 0;
     regs->TXCSRH = 0;
@@ -854,7 +854,7 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
   if (tu_edpt_dir(ep_addr)) { /* IN */
     regs->TXCSRL = USB_TXCSRL1_CLRDT;
   } else { /* OUT */
-    regs->RXCSRL = USB_RXCSRL1_CLRDT; 
+    regs->RXCSRL = USB_RXCSRL1_CLRDT;
   }
   if (ie) NVIC_EnableIRQ(USB0_IRQn);
 }
diff --git a/src/portable/mentor/musb/hcd_musb.c b/src/portable/mentor/musb/hcd_musb.c
index 85e18e3aa..9eb2e005e 100644
--- a/src/portable/mentor/musb/hcd_musb.c
+++ b/src/portable/mentor/musb/hcd_musb.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2021 Koji KITAYAMA
@@ -588,7 +588,7 @@ void hcd_int_disable(uint8_t rhport)
 uint32_t hcd_frame_number(uint8_t rhport)
 {
   (void)rhport;
-  /* The device must be reset at least once after connection 
+  /* The device must be reset at least once after connection
    * in order to start the frame counter. */
   if (_hcd.need_reset) hcd_port_reset(rhport);
   return USB0->FRAME;
diff --git a/src/portable/microchip/pic/dcd_pic.c b/src/portable/microchip/pic/dcd_pic.c
index 6cf0e6285..6986c8317 100644
--- a/src/portable/microchip/pic/dcd_pic.c
+++ b/src/portable/microchip/pic/dcd_pic.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 Koji Kitayama
@@ -486,7 +486,7 @@ void dcd_init(uint8_t rhport)
 #else
   U1PWRCbits.USBPWR = 1;
 #endif
-  
+
 #if TU_PIC_INT_SIZE == 4
   uint32_t bdt_phys = KVA_TO_PA((uintptr_t)_dcd.bdt);
 
diff --git a/src/portable/microchip/pic32mz/usbhs_registers.h b/src/portable/microchip/pic32mz/usbhs_registers.h
index 93b552322..03fe78bbd 100644
--- a/src/portable/microchip/pic32mz/usbhs_registers.h
+++ b/src/portable/microchip/pic32mz/usbhs_registers.h
@@ -21,7 +21,7 @@
 * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
 *******************************************************************************/
 /*******************************************************************************
-  USBHS Peripheral Library Register Definitions 
+  USBHS Peripheral Library Register Definitions
 
   File Name:
     usbhs_registers.h
@@ -50,16 +50,16 @@
 #define USBHS_REG_INTRRX        0x004
 #define USBHS_REG_INTRTXE       0x006
 #define USBHS_REG_INTRRXE       0x008
-#define USBHS_REG_INTRUSB       0x00A 
-#define USBHS_REG_INTRUSBE      0x00B 
+#define USBHS_REG_INTRUSB       0x00A
+#define USBHS_REG_INTRUSBE      0x00B
 #define USBHS_REG_FRAME         0x00C
 #define USBHS_REG_INDEX         0x00E
 #define USBHS_REG_TESTMODE      0x00F
 
 /*******************************************************
- * Endpoint Control Status Registers (CSR). These values 
+ * Endpoint Control Status Registers (CSR). These values
  * should be added to either the 0x10 to access the
- * register through Indexed CSR. To access the actual 
+ * register through Indexed CSR. To access the actual
  * CSR, see ahead in this header file.
  ******************************************************/
 
@@ -99,20 +99,20 @@
 #define USBHS_EP_DEVICE_RX_SEND_STALL 0x20
 
 /* FADDR - Device Function Address */
-typedef union 
+typedef union
 {
-    struct __attribute__((packed)) 
+    struct __attribute__((packed))
     {
         unsigned FUNC:7;
         unsigned :1;
     };
 
-    uint8_t w;  
+    uint8_t w;
 
 } __USBHS_FADDR_t;
 
 /* POWER - Control Resume and Suspend signalling */
-typedef union 
+typedef union
 {
     struct __attribute__((packed))
     {
@@ -126,14 +126,14 @@ typedef union
         unsigned ISOUPD:1;
     };
     struct
-    {   
+    {
         uint8_t w;
     };
 
 } __USBHS_POWER_t;
 
 /* INTRTXE - Transmit endpoint interrupt enable */
-typedef union 
+typedef union
 {
     struct __attribute__((packed))
     {
@@ -155,7 +155,7 @@ typedef union
 } __USBHS_INTRTXE_t;
 
 /* INTRRXE - Receive endpoint interrupt enable */
-typedef union 
+typedef union
 {
     struct __attribute__((packed))
     {
@@ -198,7 +198,7 @@ typedef union
 } __USBHS_INTRUSBE_t;
 
 /* FRAME - Frame number */
-typedef union 
+typedef union
 {
     struct __attribute__((packed))
     {
@@ -213,7 +213,7 @@ typedef union
 } __USBHS_FRAME_t;
 
 /* INDEX - Endpoint index */
-typedef union 
+typedef union
 {
     struct __attribute__((packed))
     {
@@ -228,7 +228,7 @@ typedef union
 } __USBHS_INDEX_t;
 
 /* TESTMODE - Test mode register */
-typedef union 
+typedef union
 {
     struct __attribute__((packed))
     {
@@ -248,7 +248,7 @@ typedef union
 
 } __USBHS_TESTMODE_t;
 
-/* COUNT0 - Indicates the amount of data received in endpoint 0 */ 
+/* COUNT0 - Indicates the amount of data received in endpoint 0 */
 typedef union
 {
     struct __attribute__((packed))
@@ -627,7 +627,7 @@ typedef union
     };
     uint16_t w;
 
-} __USBHS_TXMAXP_t;  
+} __USBHS_TXMAXP_t;
 
 /* TXFIFOSZ - Size of the transmit endpoint FIFO */
 typedef struct __attribute__((packed))
@@ -781,7 +781,7 @@ typedef union
 
 } __USBHS_DMACNTL_t;
 
-/* Endpoint Control and Status Register Set */    
+/* Endpoint Control and Status Register Set */
 typedef struct __attribute__((packed))
 {
     volatile __USBHS_TXMAXP_t TXMAXPbits;
@@ -906,7 +906,7 @@ typedef struct __attribute__((aligned(4),packed))
 
     volatile __USBHS_TXFIFOADD_t   TXFIFOADDbits;
     volatile __USBHS_RXFIFOADD_t   RXFIFOADDbits;
-    
+
     volatile uint32_t   VCONTROL;
     volatile uint16_t   HWVERS;
     volatile uint8_t    padding1[10];
@@ -923,7 +923,7 @@ typedef struct __attribute__((aligned(4),packed))
     volatile __USBHS_TARGET_ADDR_t  TADDR[16];
     volatile __USBHS_EPCSR_t        EPCSR[16];
     volatile uint32_t               DMA_INTR;
-    volatile __USBHS_DMA_CHANNEL_t  DMA_CHANNEL[8]; 
+    volatile __USBHS_DMA_CHANNEL_t  DMA_CHANNEL[8];
     volatile uint32_t               RQPKTXOUNT[16];
 
 } usbhs_registers_t;
diff --git a/src/portable/microchip/samg/dcd_samg.c b/src/portable/microchip/samg/dcd_samg.c
index 814e680fb..e3fa51e31 100644
--- a/src/portable/microchip/samg/dcd_samg.c
+++ b/src/portable/microchip/samg/dcd_samg.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2018, hathach (tinyusb.org)
diff --git a/src/portable/microchip/samx7x/common_usb_regs.h b/src/portable/microchip/samx7x/common_usb_regs.h
index d232f0bcb..db4a81e0e 100644
--- a/src/portable/microchip/samx7x/common_usb_regs.h
+++ b/src/portable/microchip/samx7x/common_usb_regs.h
@@ -2007,7 +2007,7 @@
 
 /** \brief DEVDMA hardware registers */
 typedef struct
-{  
+{
   __IO uint32_t DEVDMANXTDSC; /**< (DEVDMA Offset: 0x00) Device DMA Channel Next Descriptor Address Register */
   __IO uint32_t DEVDMAADDRESS; /**< (DEVDMA Offset: 0x04) Device DMA Channel Address Register */
   __IO uint32_t DEVDMACONTROL; /**< (DEVDMA Offset: 0x08) Device DMA Channel Control Register */
@@ -2016,7 +2016,7 @@ typedef struct
 
 /** \brief HSTDMA hardware registers */
 typedef struct
-{  
+{
   __IO uint32_t HSTDMANXTDSC; /**< (HSTDMA Offset: 0x00) Host DMA Channel Next Descriptor Address Register */
   __IO uint32_t HSTDMAADDRESS; /**< (HSTDMA Offset: 0x04) Host DMA Channel Address Register */
   __IO uint32_t HSTDMACONTROL; /**< (HSTDMA Offset: 0x08) Host DMA Channel Control Register */
@@ -2025,7 +2025,7 @@ typedef struct
 
 /** \brief USBHS hardware registers */
 typedef struct
-{  
+{
   __IO uint32_t DEVCTRL;  /**< (USBHS Offset: 0x00) Device General Control Register */
   __I  uint32_t DEVISR;   /**< (USBHS Offset: 0x04) Device Global Interrupt Status Register */
   __O  uint32_t DEVICR;   /**< (USBHS Offset: 0x08) Device Global Interrupt Clear Register */
diff --git a/src/portable/microchip/samx7x/dcd_samx7x.c b/src/portable/microchip/samx7x/dcd_samx7x.c
index 24657872b..2bbb345d6 100644
--- a/src/portable/microchip/samx7x/dcd_samx7x.c
+++ b/src/portable/microchip/samx7x/dcd_samx7x.c
@@ -241,7 +241,7 @@ static void dcd_ep_handler(uint8_t ep_ix)
     if (int_status & DEVEPTISR_RXOUTI)
     {
       uint8_t *ptr = EP_GET_FIFO_PTR(0,8);
-      
+
       if (count && xfer->total_len)
       {
         uint16_t remain = xfer->total_len - xfer->queued_len;
@@ -252,7 +252,7 @@ static void dcd_ep_handler(uint8_t ep_ix)
         if (xfer->buffer)
         {
           memcpy(xfer->buffer + xfer->queued_len, ptr, count);
-        } else 
+        } else
         {
           tu_fifo_write_n(xfer->fifo, ptr, count);
         }
@@ -281,7 +281,7 @@ static void dcd_ep_handler(uint8_t ep_ix)
       {
         // TX not complete
         dcd_transmit_packet(xfer, 0);
-      } else 
+      } else
       {
         // TX complete
         dcd_event_xfer_complete(0, 0x80 + 0, xfer->total_len, XFER_RESULT_SUCCESS, true);
@@ -292,7 +292,7 @@ static void dcd_ep_handler(uint8_t ep_ix)
         }
       }
     }
-  } else 
+  } else
   {
     if (int_status & DEVEPTISR_RXOUTI)
     {
@@ -333,7 +333,7 @@ static void dcd_ep_handler(uint8_t ep_ix)
       {
         // TX not complete
         dcd_transmit_packet(xfer, ep_ix);
-      } else 
+      } else
       {
         // TX complete
         dcd_event_xfer_complete(0, 0x80 + ep_ix, xfer->total_len, XFER_RESULT_SUCCESS, true);
@@ -359,7 +359,7 @@ static void dcd_dma_handler(uint8_t ep_ix)
   if(USB_REG->DEVEPTCFG[ep_ix] & DEVEPTCFG_EPDIR)
   {
     dcd_event_xfer_complete(0, 0x80 + ep_ix, count, XFER_RESULT_SUCCESS, true);
-  } else 
+  } else
   {
     dcd_event_xfer_complete(0, ep_ix, count, XFER_RESULT_SUCCESS, true);
   }
@@ -507,12 +507,12 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
       // Enable Endpoint 0 Interrupts
       USB_REG->DEVIER = DEVIER_PEP_0;
       return true;
-    } else 
+    } else
     {
       // Endpoint configuration is not successful
       return false;
     }
-  } else 
+  } else
   {
     // Enable the endpoint
     USB_REG->DEVEPT |= ((0x01 << epnum) << DEVEPT_EPEN0_Pos);
@@ -544,7 +544,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
     {
       USB_REG->DEVIER = ((0x01 << epnum) << DEVIER_PEP_0_Pos);
       return true;
-    } else 
+    } else
     {
       // Endpoint configuration is not successful
       return false;
@@ -583,7 +583,7 @@ static void dcd_transmit_packet(xfer_ctl_t * xfer, uint8_t ep_ix)
     {
       memcpy(ptr, xfer->buffer + xfer->queued_len, len);
     }
-    else 
+    else
     {
       tu_fifo_read_n(xfer->fifo, ptr, len);
     }
@@ -595,7 +595,7 @@ static void dcd_transmit_packet(xfer_ctl_t * xfer, uint8_t ep_ix)
   {
     // Control endpoint: clear the interrupt flag to send the data
     USB_REG->DEVEPTICR[0] = DEVEPTICR_TXINIC;
-  } else 
+  } else
   {
     // Other endpoint types: clear the FIFO control flag to send the data
     USB_REG->DEVEPTIDR[ep_ix] = DEVEPTIDR_FIFOCONC;
@@ -616,7 +616,7 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
   xfer->total_len = total_bytes;
   xfer->queued_len = 0;
   xfer->fifo = NULL;
-  
+
   if (EP_DMA_SUPPORT(epnum) && total_bytes != 0)
   {
     // Force the CPU to flush the buffer. We increase the size by 32 because the call aligns the
@@ -648,12 +648,12 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
     // and the DMA transfer must be not started.
     // It is the end of transfer
     return false;
-  } else 
+  } else
   {
     if (dir == TUSB_DIR_OUT)
     {
       USB_REG->DEVEPTIER[epnum] = DEVEPTIER_RXOUTES;
-    } else 
+    } else
     {
       dcd_transmit_packet(xfer,epnum);
     }
@@ -701,20 +701,20 @@ bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16
 
     // Clean invalidate cache of linear part
     CleanInValidateCache((uint32_t*) tu_align((uint32_t) info.ptr_lin, 4), info.len_lin + 31);
-    
+
     USB_REG->DEVDMA[epnum - 1].DEVDMAADDRESS = (uint32_t)info.ptr_lin;
     if (info.len_wrap)
     {
       // Clean invalidate cache of wrapped part
       CleanInValidateCache((uint32_t*) tu_align((uint32_t) info.ptr_wrap, 4), info.len_wrap + 31);
-      
+
       dma_desc[epnum - 1].next_desc = 0;
       dma_desc[epnum - 1].buff_addr = (uint32_t)info.ptr_wrap;
       dma_desc[epnum - 1].chnl_ctrl =
         udd_dma_ctrl_wrap | (info.len_wrap << DEVDMACONTROL_BUFF_LENGTH_Pos);
       // Clean cache of wrapped DMA descriptor
       CleanInValidateCache((uint32_t*)&dma_desc[epnum - 1], sizeof(dma_desc_t));
-      
+
       udd_dma_ctrl_lin |= DEVDMASTATUS_DESC_LDST;
       USB_REG->DEVDMA[epnum - 1].DEVDMANXTDSC = (uint32_t)&dma_desc[epnum - 1];
     } else {
@@ -743,7 +743,7 @@ bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16
     if (dir == TUSB_DIR_OUT)
     {
       USB_REG->DEVEPTIER[epnum] = DEVEPTIER_RXOUTES;
-    } else 
+    } else
     {
       dcd_transmit_packet(xfer,epnum);
     }
diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c
index 4aeb85fc0..eee5686f4 100644
--- a/src/portable/nordic/nrf5x/dcd_nrf5x.c
+++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/portable/nuvoton/nuc120/dcd_nuc120.c b/src/portable/nuvoton/nuc120/dcd_nuc120.c
index 2fdc05f36..fb12122e0 100644
--- a/src/portable/nuvoton/nuc120/dcd_nuc120.c
+++ b/src/portable/nuvoton/nuc120/dcd_nuc120.c
@@ -27,9 +27,9 @@
 /*
   Theory of operation:
 
-  The NUC100/NUC120 USBD peripheral has six "EP"s, but each is simplex, 
-  so two collectively (peripheral nomenclature of "EP0" and "EP1") are needed to 
-  implement USB EP0.  PERIPH_EP0 and PERIPH_EP1 are used by this driver for 
+  The NUC100/NUC120 USBD peripheral has six "EP"s, but each is simplex,
+  so two collectively (peripheral nomenclature of "EP0" and "EP1") are needed to
+  implement USB EP0.  PERIPH_EP0 and PERIPH_EP1 are used by this driver for
   EP0_IN and EP0_OUT respectively.  This leaves up to four for user usage.
 */
 
diff --git a/src/portable/nuvoton/nuc121/dcd_nuc121.c b/src/portable/nuvoton/nuc121/dcd_nuc121.c
index a56b5f8e8..873b1b7ef 100644
--- a/src/portable/nuvoton/nuc121/dcd_nuc121.c
+++ b/src/portable/nuvoton/nuc121/dcd_nuc121.c
@@ -27,9 +27,9 @@
 /*
   Theory of operation:
 
-  The NUC121/NUC125/NUC126 USBD peripheral has eight "EP"s, but each is simplex, 
-  so two collectively (peripheral nomenclature of "EP0" and "EP1") are needed to 
-  implement USB EP0.  PERIPH_EP0 and PERIPH_EP1 are used by this driver for 
+  The NUC121/NUC125/NUC126 USBD peripheral has eight "EP"s, but each is simplex,
+  so two collectively (peripheral nomenclature of "EP0" and "EP1") are needed to
+  implement USB EP0.  PERIPH_EP0 and PERIPH_EP1 are used by this driver for
   EP0_IN and EP0_OUT respectively.  This leaves up to six for user usage.
 */
 
diff --git a/src/portable/nuvoton/nuc505/dcd_nuc505.c b/src/portable/nuvoton/nuc505/dcd_nuc505.c
index 3fa7c1ec1..3a92c9794 100644
--- a/src/portable/nuvoton/nuc505/dcd_nuc505.c
+++ b/src/portable/nuvoton/nuc505/dcd_nuc505.c
@@ -27,9 +27,9 @@
 /*
   Theory of operation:
 
-  The NUC505 USBD peripheral has twelve "EP"s, where each is simplex, in addition 
+  The NUC505 USBD peripheral has twelve "EP"s, where each is simplex, in addition
   to dedicated support for the control endpoint (EP0).  The non-user endpoints
-  are referred to as "user" EPs in this code, and follow the datasheet 
+  are referred to as "user" EPs in this code, and follow the datasheet
   nomenclature of EPA through EPL.
 */
 
@@ -389,7 +389,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to
       while (total_bytes < USBD->CEPRXCNT);
       for (int count = 0; count < total_bytes; count++)
         *buffer++ = USBD->CEPDAT_BYTE;
-      
+
       dcd_event_xfer_complete(0, ep_addr, total_bytes, XFER_RESULT_SUCCESS, true);
     }
   }
diff --git a/src/portable/nxp/khci/dcd_khci.c b/src/portable/nxp/khci/dcd_khci.c
index 13eb105cd..b6daec3de 100644
--- a/src/portable/nxp/khci/dcd_khci.c
+++ b/src/portable/nxp/khci/dcd_khci.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 Koji Kitayama
@@ -296,7 +296,7 @@ void dcd_int_disable(uint8_t rhport)
 
 void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
 {
-  _dcd.addr = dev_addr & 0x7F; 
+  _dcd.addr = dev_addr & 0x7F;
   /* Response with status first before changing device address */
   dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0);
 }
@@ -528,7 +528,7 @@ void dcd_int_handler(uint8_t rhport)
   if (is & USB_ISTAT_SLEEP_MASK) {
     // TU_LOG2("Suspend: "); TU_LOG2_HEX(is);
 
-    // Note Host usually has extra delay after bus reset (without SOF), which could falsely 
+    // Note Host usually has extra delay after bus reset (without SOF), which could falsely
     // detected as Sleep event. Though usbd has debouncing logic so we are good
     KHCI->ISTAT = USB_ISTAT_SLEEP_MASK;
     process_bus_sleep(rhport);
diff --git a/src/portable/nxp/khci/hcd_khci.c b/src/portable/nxp/khci/hcd_khci.c
index 0f5fa6275..35763f121 100644
--- a/src/portable/nxp/khci/hcd_khci.c
+++ b/src/portable/nxp/khci/hcd_khci.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2021 Koji Kitayama
@@ -414,7 +414,7 @@ void hcd_int_disable(uint8_t rhport)
 uint32_t hcd_frame_number(uint8_t rhport)
 {
   (void)rhport;
-  /* The device must be reset at least once after connection 
+  /* The device must be reset at least once after connection
    * in order to start the frame counter. */
   if (_hcd.need_reset) hcd_port_reset(rhport);
   uint32_t frmnum = KHCI->FRMNUML;
diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
index 0894a5eeb..86149afd8 100644
--- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
+++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.h b/src/portable/nxp/lpc17_40/dcd_lpc17_40.h
index 07daa32e4..654b80866 100644
--- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.h
+++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/portable/nxp/lpc17_40/hcd_lpc17_40.c b/src/portable/nxp/lpc17_40/hcd_lpc17_40.c
index ad9ed59b4..372dcf51f 100644
--- a/src/portable/nxp/lpc17_40/hcd_lpc17_40.c
+++ b/src/portable/nxp/lpc17_40/hcd_lpc17_40.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019, Ha Thach (tinyusb.org)
@@ -44,4 +44,3 @@ void hcd_int_disable(uint8_t rhport)
 }
 
 #endif
-
diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
index 124656307..5368ef868 100644
--- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
+++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -373,7 +373,7 @@ void dcd_edpt_close_all (uint8_t rhport)
 void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
 {
   (void) rhport;
-  
+
   uint8_t ep_id = ep_addr2id(ep_addr);
   _dcd.ep[ep_id][0].cmd_sts.active = _dcd.ep[ep_id][0].cmd_sts.active = 0; // TODO proper way is to EPSKIP then wait ep[][].active then write ep[][].disable (see table 778 in LPC55S69 Use Manual)
   _dcd.ep[ep_id][0].cmd_sts.disable = _dcd.ep[ep_id][1].cmd_sts.disable = 1;
@@ -426,7 +426,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t to
 static void bus_reset(uint8_t rhport)
 {
   tu_memclr(&_dcd, sizeof(dcd_data_t));
-  edpt_reset_all(rhport); 
+  edpt_reset_all(rhport);
 
   // disable all endpoints as specified by LPC55S69 UM Table 778
   for(uint8_t ep_id = 0; ep_id < 2*MAX_EP_PAIRS; ep_id++)
@@ -575,4 +575,3 @@ void dcd_int_handler(uint8_t rhport)
 }
 
 #endif
-
diff --git a/src/portable/nxp/transdimension/common_transdimension.h b/src/portable/nxp/transdimension/common_transdimension.h
index 69074de41..95ae1903e 100644
--- a/src/portable/nxp/transdimension/common_transdimension.h
+++ b/src/portable/nxp/transdimension/common_transdimension.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2021, Ha Thach (tinyusb.org)
diff --git a/src/portable/nxp/transdimension/dcd_transdimension.c b/src/portable/nxp/transdimension/dcd_transdimension.c
index 1f27a6872..983d7cfcf 100644
--- a/src/portable/nxp/transdimension/dcd_transdimension.c
+++ b/src/portable/nxp/transdimension/dcd_transdimension.c
@@ -569,7 +569,7 @@ static void process_edpt_complete_isr(uint8_t rhport, uint8_t epnum, uint8_t dir
       tu_fifo_advance_write_pointer(p_qhd->ff, xferred_bytes);
     }
   }
-  
+
   // only number of bytes in the IOC qtd
   dcd_event_xfer_complete(rhport, tu_edpt_addr(epnum, dir), xferred_bytes, result, true);
 }
diff --git a/src/portable/nxp/transdimension/hcd_transdimension.c b/src/portable/nxp/transdimension/hcd_transdimension.c
index 392764ff6..0b3e9e4ef 100644
--- a/src/portable/nxp/transdimension/hcd_transdimension.c
+++ b/src/portable/nxp/transdimension/hcd_transdimension.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index b615743b8..260804d3d 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -715,4 +715,3 @@ void hcd_int_handler(uint8_t hostid)
 
 
 #endif
-
diff --git a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c
index 1bc5594d8..e6daf6827 100644
--- a/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c
+++ b/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2018, hathach (tinyusb.org)
diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.h b/src/portable/raspberrypi/rp2040/rp2040_usb.h
index a06407f23..9f8e58d42 100644
--- a/src/portable/raspberrypi/rp2040/rp2040_usb.h
+++ b/src/portable/raspberrypi/rp2040/rp2040_usb.h
@@ -47,7 +47,7 @@ typedef struct hw_endpoint
 {
     // Is this a valid struct
     bool configured;
-    
+
     // Transfer direction (i.e. IN is rx for host but tx for device)
     // allows us to common up transfer functions
     bool rx;
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index e49c0b52e..1677cfa12 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Nathan Conrad
@@ -181,7 +181,7 @@ static void dcd_handle_bus_reset(void);
 static void dcd_transmit_packet(xfer_ctl_t * xfer, uint16_t ep_ix);
 static void dcd_ep_ctr_handler(void);
 
-// PMA allocation/access 
+// PMA allocation/access
 static uint8_t open_ep_count;
 static uint16_t ep_buf_ptr; ///< Points to first free memory location
 static void dcd_pma_alloc_reset(void);
@@ -249,7 +249,7 @@ void dcd_init (uint8_t rhport)
     asm("NOP");
   }
   USB->CNTR = 0; // Enable USB
-  
+
   USB->BTABLE = DCD_STM32_BTABLE_BASE;
 
   USB->ISTR = 0; // Clear pending interrupts
@@ -263,7 +263,7 @@ void dcd_init (uint8_t rhport)
 
   USB->CNTR |= USB_CNTR_RESETM | USB_CNTR_ESOFM | USB_CNTR_CTRM | USB_CNTR_SUSPM | USB_CNTR_WKUPM;
   dcd_handle_bus_reset();
-  
+
   // Enable pull-up if supported
   if ( dcd_connect ) dcd_connect(rhport);
 }
@@ -464,12 +464,12 @@ static void dcd_handle_bus_reset(void)
   //__IO uint16_t * const epreg = &(EPREG(0));
   USB->DADDR = 0u; // disable USB peripheral by clearing the EF flag
 
-  
+
   for(uint32_t i=0; i<STFSDEV_EP_COUNT; i++)
   {
     // Clear all EPREG (or maybe this is automatic? I'm not sure)
     pcd_set_endpoint(USB,i,0u);
-    
+
     // Clear EP allocation status
     ep_alloc_status[i].ep_num = 0xFF;
     ep_alloc_status[i].ep_type = 0xFF;
@@ -531,7 +531,7 @@ static void dcd_ep_ctr_rx_handler(uint32_t wIstr)
   {
     return;
   }
-  
+
   if((ep_addr == 0U) && ((wEPRegVal & USB_EP_SETUP) != 0U)) /* Setup packet */
   {
     // The setup_received function uses memcpy, so this must first copy the setup data into
@@ -743,11 +743,11 @@ static void dcd_pma_alloc_reset(void)
 
 /***
  * Allocate a section of PMA
- * 
+ *
  * If the EP number has already been allocated, and the new allocation
  * is larger than the old allocation, then this will fail with a TU_ASSERT.
  * (This is done to simplify the code. More complicated algorithms could be used)
- * 
+ *
  * During failure, TU_ASSERT is used. If this happens, rework/reallocate memory manually.
  */
 static uint16_t dcd_pma_alloc(uint8_t ep_addr, size_t length)
@@ -838,7 +838,7 @@ static uint8_t dcd_ep_alloc(uint8_t ep_addr, uint8_t ep_type)
           ep_alloc_status[i].ep_num = epnum;
           ep_alloc_status[i].ep_type = ep_type;
           ep_alloc_status[i].allocated[dir] = true;
-          
+
           return i;
         }
       }
@@ -860,7 +860,7 @@ static void dcd_ep_free(uint8_t ep_addr)
   for(uint8_t i = 0; i < STFSDEV_EP_COUNT; i++)
   {
     // Check if EP number & dir are the same
-    if(ep_alloc_status[i].ep_num == epnum && 
+    if(ep_alloc_status[i].ep_num == epnum &&
        ep_alloc_status[i].allocated[dir] == dir)
     {
       ep_alloc_status[i].allocated[dir] = false;
@@ -968,9 +968,9 @@ void dcd_edpt_close_all (uint8_t rhport)
 
 /**
  * Close an endpoint.
- * 
+ *
  * This function may be called with interrupts enabled or disabled.
- * 
+ *
  * This also clears transfers in progress, should there be any.
  */
 void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr)
@@ -998,9 +998,9 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr)
 bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size)
 {
   (void)rhport;
-  
+
   TU_ASSERT(largest_packet_size <= 1024);
-  
+
   uint8_t const ep_idx = dcd_ep_alloc(ep_addr, TUSB_XFER_ISOCHRONOUS);
   const uint16_t buffer_size = pcd_aligned_buffer_size(largest_packet_size);
 
@@ -1011,10 +1011,10 @@ bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet
   xfer_ctl_ptr(ep_addr)->ep_idx = ep_idx;
 
   pcd_set_eptype(USB, ep_idx, USB_EP_ISOCHRONOUS);
-  
+
   *pcd_ep_tx_address_ptr(USB, ep_idx) = pma_addr;
   *pcd_ep_rx_address_ptr(USB, ep_idx) = pma_addr;
-  
+
   return true;
 }
 
@@ -1035,7 +1035,7 @@ bool dcd_edpt_iso_activate(uint8_t rhport,  tusb_desc_endpoint_t const * p_endpo
   {
     pcd_set_ep_rx_status(USB, ep_idx, USB_EP_RX_DIS);
   }
-  
+
   pcd_set_ep_address(USB, ep_idx, tu_edpt_number(p_endpoint_desc->bEndpointAddress));
   // Be normal, for now, instead of only accepting zero-byte packets (on control endpoint)
   // or being double-buffered (bulk endpoints)
@@ -1250,11 +1250,11 @@ static bool dcd_write_packet_memory_ff(tu_fifo_t * ff, uint16_t dst, uint16_t wN
 {
   // Since we copy from a ring buffer FIFO, a wrap might occur making it necessary to conduct two copies
   tu_fifo_buffer_info_t info;
-  tu_fifo_get_read_info(ff, &info); 
-  
+  tu_fifo_get_read_info(ff, &info);
+
   uint16_t cnt_lin =  TU_MIN(wNBytes, info.len_lin);
   uint16_t cnt_wrap = TU_MIN(wNBytes - cnt_lin, info.len_wrap);
-  
+
   // We want to read from the FIFO and write it into the PMA, if LIN part is ODD and has WRAPPED part,
   // last lin byte will be combined with wrapped part
   // To ensure PMA is always access 16bit aligned (dst aligned to 16 bit)
@@ -1352,7 +1352,7 @@ static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNB
     // Copy last linear byte & first wrapped byte
     uint16_t tmp;
     dcd_read_packet_memory(&tmp, src, 2);
-    
+
     ((uint8_t*)info.ptr_lin)[cnt_lin - 1] = (uint8_t)tmp;
     ((uint8_t*)info.ptr_wrap)[0] = (uint8_t)(tmp >> 8U);
     src += 2;
@@ -1379,4 +1379,3 @@ static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNB
 }
 
 #endif
-
diff --git a/src/portable/st/synopsys/synopsys_common.h b/src/portable/st/synopsys/synopsys_common.h
index 6f0602fe9..ce3195b23 100644
--- a/src/portable/st/synopsys/synopsys_common.h
+++ b/src/portable/st/synopsys/synopsys_common.h
@@ -2,15 +2,15 @@
   ******************************************************************************
   * @file    synopsys_common.h
   * @author  MCD Application Team
-  * @brief   CMSIS Cortex-M3 Device USB OTG peripheral Header File. 
-  *          This file contains the USB OTG peripheral register's definitions, bits 
+  * @brief   CMSIS Cortex-M3 Device USB OTG peripheral Header File.
+  *          This file contains the USB OTG peripheral register's definitions, bits
   *          definitions and memory mapping for STM32F1xx devices.
-  *            
+  *
   *          This file contains:
   *           - Data structures and the address mapping for the USB OTG peripheral
   *           - The Peripheral's registers declarations and bits definition
   *           - Macros to access the peripheral's registers hardware
-  *  
+  *
   ******************************************************************************
   * @attention
   *
@@ -40,7 +40,7 @@
 #define     __OM  volatile
 #define     __IOM volatile
 
-/** 
+/**
   * @brief __USB_OTG_Core_register
   */
 
@@ -66,11 +66,11 @@ typedef struct
   __IO uint32_t DIEPTXF[0x0F];        /*!< dev Periodic Transmit FIFO                 Address offset: 0x104 */
 } USB_OTG_GlobalTypeDef;
 
-/** 
+/**
   * @brief __device_Registers
   */
 
-typedef struct 
+typedef struct
 {
   __IO uint32_t DCFG;                 /*!< dev Configuration Register                 Address offset: 800h*/
   __IO uint32_t DCTL;                 /*!< dev Control Register                       Address offset: 804h*/
@@ -87,18 +87,18 @@ typedef struct
   __IO uint32_t DTHRCTL;              /*!< dev thr                                    Address offset: 830h*/
   __IO uint32_t DIEPEMPMSK;           /*!< dev empty msk                              Address offset: 834h*/
   __IO uint32_t DEACHINT;             /*!< dedicated EP interrupt                     Address offset: 838h*/
-  __IO uint32_t DEACHMSK;             /*!< dedicated EP msk                           Address offset: 83Ch*/  
+  __IO uint32_t DEACHMSK;             /*!< dedicated EP msk                           Address offset: 83Ch*/
   uint32_t Reserved40;                /*!< dedicated EP mask                          Address offset: 840h*/
   __IO uint32_t DINEP1MSK;            /*!< dedicated EP mask                          Address offset: 844h*/
   uint32_t  Reserved44[15];           /*!< Reserved 844-87Ch*/
   __IO uint32_t DOUTEP1MSK;           /*!< dedicated EP msk                           Address offset: 884h*/
 } USB_OTG_DeviceTypeDef;
 
-/** 
+/**
   * @brief __IN_Endpoint-Specific_Register
   */
 
-typedef struct 
+typedef struct
 {
   __IO uint32_t DIEPCTL;              /*!< dev IN Endpoint Control Reg                900h + (ep_num * 20h) + 00h*/
   uint32_t Reserved04;                /*!< Reserved                                   900h + (ep_num * 20h) + 04h*/
@@ -110,11 +110,11 @@ typedef struct
   uint32_t Reserved18;                /*!< Reserved                                   900h+(ep_num*20h)+1Ch-900h+ (ep_num * 20h) + 1Ch*/
 } USB_OTG_INEndpointTypeDef;
 
-/** 
+/**
   * @brief __OUT_Endpoint-Specific_Registers
   */
 
-typedef struct 
+typedef struct
 {
   __IO uint32_t DOEPCTL;              /*!< dev OUT Endpoint Control Reg               B00h + (ep_num * 20h) + 00h*/
   uint32_t Reserved04;                /*!< Reserved                                   B00h + (ep_num * 20h) + 04h*/
@@ -125,11 +125,11 @@ typedef struct
   uint32_t Reserved18[2];             /*!< Reserved                                   B00h + (ep_num * 20h) + 18h - B00h + (ep_num * 20h) + 1Ch*/
 } USB_OTG_OUTEndpointTypeDef;
 
-/** 
+/**
   * @brief __Host_Mode_Register_Structures
   */
 
-typedef struct 
+typedef struct
 {
   __IO uint32_t HCFG;                 /*!< Host Configuration Register    400h*/
   __IO uint32_t HFIR;                 /*!< Host Frame Interval Register   404h*/
@@ -140,7 +140,7 @@ typedef struct
   __IO uint32_t HAINTMSK;             /*!< Host All Channels Interrupt Mask 418h*/
 } USB_OTG_HostTypeDef;
 
-/** 
+/**
   * @brief __Host_Channel_Specific_Registers
   */
 
@@ -177,60 +177,60 @@ typedef struct
 /*                                                                            */
 /******************************************************************************/
 /********************  Bit definition for USB_OTG_GOTGCTL register  ***********/
-#define USB_OTG_GOTGCTL_SRQSCS_Pos              (0U)                           
+#define USB_OTG_GOTGCTL_SRQSCS_Pos              (0U)
 #define USB_OTG_GOTGCTL_SRQSCS_Msk              (0x1UL << USB_OTG_GOTGCTL_SRQSCS_Pos) /*!< 0x00000001 */
 #define USB_OTG_GOTGCTL_SRQSCS                  USB_OTG_GOTGCTL_SRQSCS_Msk     /*!< Session request success */
-#define USB_OTG_GOTGCTL_SRQ_Pos                 (1U)                           
+#define USB_OTG_GOTGCTL_SRQ_Pos                 (1U)
 #define USB_OTG_GOTGCTL_SRQ_Msk                 (0x1UL << USB_OTG_GOTGCTL_SRQ_Pos) /*!< 0x00000002 */
 #define USB_OTG_GOTGCTL_SRQ                     USB_OTG_GOTGCTL_SRQ_Msk        /*!< Session request */
-#define USB_OTG_GOTGCTL_HNGSCS_Pos              (8U)                           
+#define USB_OTG_GOTGCTL_HNGSCS_Pos              (8U)
 #define USB_OTG_GOTGCTL_HNGSCS_Msk              (0x1UL << USB_OTG_GOTGCTL_HNGSCS_Pos) /*!< 0x00000100 */
 #define USB_OTG_GOTGCTL_HNGSCS                   USB_OTG_GOTGCTL_HNGSCS_Msk    /*!< Host set HNP enable */
-#define USB_OTG_GOTGCTL_HNPRQ_Pos               (9U)                           
+#define USB_OTG_GOTGCTL_HNPRQ_Pos               (9U)
 #define USB_OTG_GOTGCTL_HNPRQ_Msk               (0x1UL << USB_OTG_GOTGCTL_HNPRQ_Pos) /*!< 0x00000200 */
 #define USB_OTG_GOTGCTL_HNPRQ                   USB_OTG_GOTGCTL_HNPRQ_Msk      /*!< HNP request */
-#define USB_OTG_GOTGCTL_HSHNPEN_Pos             (10U)                          
+#define USB_OTG_GOTGCTL_HSHNPEN_Pos             (10U)
 #define USB_OTG_GOTGCTL_HSHNPEN_Msk             (0x1UL << USB_OTG_GOTGCTL_HSHNPEN_Pos) /*!< 0x00000400 */
 #define USB_OTG_GOTGCTL_HSHNPEN                 USB_OTG_GOTGCTL_HSHNPEN_Msk    /*!< Host set HNP enable */
-#define USB_OTG_GOTGCTL_DHNPEN_Pos              (11U)                          
+#define USB_OTG_GOTGCTL_DHNPEN_Pos              (11U)
 #define USB_OTG_GOTGCTL_DHNPEN_Msk              (0x1UL << USB_OTG_GOTGCTL_DHNPEN_Pos) /*!< 0x00000800 */
 #define USB_OTG_GOTGCTL_DHNPEN                  USB_OTG_GOTGCTL_DHNPEN_Msk     /*!< Device HNP enabled */
-#define USB_OTG_GOTGCTL_CIDSTS_Pos              (16U)                          
+#define USB_OTG_GOTGCTL_CIDSTS_Pos              (16U)
 #define USB_OTG_GOTGCTL_CIDSTS_Msk              (0x1UL << USB_OTG_GOTGCTL_CIDSTS_Pos) /*!< 0x00010000 */
 #define USB_OTG_GOTGCTL_CIDSTS                  USB_OTG_GOTGCTL_CIDSTS_Msk     /*!< Connector ID status */
-#define USB_OTG_GOTGCTL_DBCT_Pos                (17U)                          
+#define USB_OTG_GOTGCTL_DBCT_Pos                (17U)
 #define USB_OTG_GOTGCTL_DBCT_Msk                (0x1UL << USB_OTG_GOTGCTL_DBCT_Pos) /*!< 0x00020000 */
 #define USB_OTG_GOTGCTL_DBCT                    USB_OTG_GOTGCTL_DBCT_Msk       /*!< Long/short debounce time */
-#define USB_OTG_GOTGCTL_ASVLD_Pos               (18U)                          
+#define USB_OTG_GOTGCTL_ASVLD_Pos               (18U)
 #define USB_OTG_GOTGCTL_ASVLD_Msk               (0x1UL << USB_OTG_GOTGCTL_ASVLD_Pos) /*!< 0x00040000 */
 #define USB_OTG_GOTGCTL_ASVLD                   USB_OTG_GOTGCTL_ASVLD_Msk      /*!< A-session valid */
-#define USB_OTG_GOTGCTL_BSVLD_Pos               (19U)                          
+#define USB_OTG_GOTGCTL_BSVLD_Pos               (19U)
 #define USB_OTG_GOTGCTL_BSVLD_Msk               (0x1UL << USB_OTG_GOTGCTL_BSVLD_Pos) /*!< 0x00080000 */
 #define USB_OTG_GOTGCTL_BSVLD                   USB_OTG_GOTGCTL_BSVLD_Msk      /*!< B-session valid */
 
 /********************  Bit definition for USB_OTG_HCFG register  ********************/
 
-#define USB_OTG_HCFG_FSLSPCS_Pos                (0U)                           
+#define USB_OTG_HCFG_FSLSPCS_Pos                (0U)
 #define USB_OTG_HCFG_FSLSPCS_Msk                (0x3UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000003 */
 #define USB_OTG_HCFG_FSLSPCS                    USB_OTG_HCFG_FSLSPCS_Msk       /*!< FS/LS PHY clock select */
 #define USB_OTG_HCFG_FSLSPCS_0                  (0x1UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000001 */
 #define USB_OTG_HCFG_FSLSPCS_1                  (0x2UL << USB_OTG_HCFG_FSLSPCS_Pos) /*!< 0x00000002 */
-#define USB_OTG_HCFG_FSLSS_Pos                  (2U)                           
+#define USB_OTG_HCFG_FSLSS_Pos                  (2U)
 #define USB_OTG_HCFG_FSLSS_Msk                  (0x1UL << USB_OTG_HCFG_FSLSS_Pos) /*!< 0x00000004 */
 #define USB_OTG_HCFG_FSLSS                      USB_OTG_HCFG_FSLSS_Msk         /*!< FS- and LS-only support */
 
 /********************  Bit definition for USB_OTG_DCFG register  ********************/
 
-#define USB_OTG_DCFG_DSPD_Pos                   (0U)                           
+#define USB_OTG_DCFG_DSPD_Pos                   (0U)
 #define USB_OTG_DCFG_DSPD_Msk                   (0x3UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000003 */
 #define USB_OTG_DCFG_DSPD                       USB_OTG_DCFG_DSPD_Msk          /*!< Device speed */
 #define USB_OTG_DCFG_DSPD_0                     (0x1UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000001 */
 #define USB_OTG_DCFG_DSPD_1                     (0x2UL << USB_OTG_DCFG_DSPD_Pos) /*!< 0x00000002 */
-#define USB_OTG_DCFG_NZLSOHSK_Pos               (2U)                           
+#define USB_OTG_DCFG_NZLSOHSK_Pos               (2U)
 #define USB_OTG_DCFG_NZLSOHSK_Msk               (0x1UL << USB_OTG_DCFG_NZLSOHSK_Pos) /*!< 0x00000004 */
 #define USB_OTG_DCFG_NZLSOHSK                   USB_OTG_DCFG_NZLSOHSK_Msk      /*!< Nonzero-length status OUT handshake */
 
-#define USB_OTG_DCFG_DAD_Pos                    (4U)                           
+#define USB_OTG_DCFG_DAD_Pos                    (4U)
 #define USB_OTG_DCFG_DAD_Msk                    (0x7FUL << USB_OTG_DCFG_DAD_Pos) /*!< 0x000007F0 */
 #define USB_OTG_DCFG_DAD                        USB_OTG_DCFG_DAD_Msk           /*!< Device address */
 #define USB_OTG_DCFG_DAD_0                      (0x01UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000010 */
@@ -241,120 +241,120 @@ typedef struct
 #define USB_OTG_DCFG_DAD_5                      (0x20UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000200 */
 #define USB_OTG_DCFG_DAD_6                      (0x40UL << USB_OTG_DCFG_DAD_Pos) /*!< 0x00000400 */
 
-#define USB_OTG_DCFG_PFIVL_Pos                  (11U)                          
+#define USB_OTG_DCFG_PFIVL_Pos                  (11U)
 #define USB_OTG_DCFG_PFIVL_Msk                  (0x3UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00001800 */
 #define USB_OTG_DCFG_PFIVL                      USB_OTG_DCFG_PFIVL_Msk         /*!< Periodic (micro)frame interval */
 #define USB_OTG_DCFG_PFIVL_0                    (0x1UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00000800 */
 #define USB_OTG_DCFG_PFIVL_1                    (0x2UL << USB_OTG_DCFG_PFIVL_Pos) /*!< 0x00001000 */
 
-#define USB_OTG_DCFG_PERSCHIVL_Pos              (24U)                          
+#define USB_OTG_DCFG_PERSCHIVL_Pos              (24U)
 #define USB_OTG_DCFG_PERSCHIVL_Msk              (0x3UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x03000000 */
 #define USB_OTG_DCFG_PERSCHIVL                  USB_OTG_DCFG_PERSCHIVL_Msk     /*!< Periodic scheduling interval */
 #define USB_OTG_DCFG_PERSCHIVL_0                (0x1UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x01000000 */
 #define USB_OTG_DCFG_PERSCHIVL_1                (0x2UL << USB_OTG_DCFG_PERSCHIVL_Pos) /*!< 0x02000000 */
 
 /********************  Bit definition for USB_OTG_PCGCR register  ********************/
-#define USB_OTG_PCGCR_STPPCLK_Pos               (0U)                           
+#define USB_OTG_PCGCR_STPPCLK_Pos               (0U)
 #define USB_OTG_PCGCR_STPPCLK_Msk               (0x1UL << USB_OTG_PCGCR_STPPCLK_Pos) /*!< 0x00000001 */
 #define USB_OTG_PCGCR_STPPCLK                   USB_OTG_PCGCR_STPPCLK_Msk      /*!< Stop PHY clock */
-#define USB_OTG_PCGCR_GATEHCLK_Pos              (1U)                           
+#define USB_OTG_PCGCR_GATEHCLK_Pos              (1U)
 #define USB_OTG_PCGCR_GATEHCLK_Msk              (0x1UL << USB_OTG_PCGCR_GATEHCLK_Pos) /*!< 0x00000002 */
 #define USB_OTG_PCGCR_GATEHCLK                  USB_OTG_PCGCR_GATEHCLK_Msk     /*!< Gate HCLK */
-#define USB_OTG_PCGCR_PHYSUSP_Pos               (4U)                           
+#define USB_OTG_PCGCR_PHYSUSP_Pos               (4U)
 #define USB_OTG_PCGCR_PHYSUSP_Msk               (0x1UL << USB_OTG_PCGCR_PHYSUSP_Pos) /*!< 0x00000010 */
 #define USB_OTG_PCGCR_PHYSUSP                   USB_OTG_PCGCR_PHYSUSP_Msk      /*!< PHY suspended */
 
 /********************  Bit definition for USB_OTG_GOTGINT register  ********************/
-#define USB_OTG_GOTGINT_SEDET_Pos               (2U)                           
+#define USB_OTG_GOTGINT_SEDET_Pos               (2U)
 #define USB_OTG_GOTGINT_SEDET_Msk               (0x1UL << USB_OTG_GOTGINT_SEDET_Pos) /*!< 0x00000004 */
 #define USB_OTG_GOTGINT_SEDET                   USB_OTG_GOTGINT_SEDET_Msk      /*!< Session end detected */
-#define USB_OTG_GOTGINT_SRSSCHG_Pos             (8U)                           
+#define USB_OTG_GOTGINT_SRSSCHG_Pos             (8U)
 #define USB_OTG_GOTGINT_SRSSCHG_Msk             (0x1UL << USB_OTG_GOTGINT_SRSSCHG_Pos) /*!< 0x00000100 */
 #define USB_OTG_GOTGINT_SRSSCHG                 USB_OTG_GOTGINT_SRSSCHG_Msk    /*!< Session request success status change */
-#define USB_OTG_GOTGINT_HNSSCHG_Pos             (9U)                           
+#define USB_OTG_GOTGINT_HNSSCHG_Pos             (9U)
 #define USB_OTG_GOTGINT_HNSSCHG_Msk             (0x1UL << USB_OTG_GOTGINT_HNSSCHG_Pos) /*!< 0x00000200 */
 #define USB_OTG_GOTGINT_HNSSCHG                 USB_OTG_GOTGINT_HNSSCHG_Msk    /*!< Host negotiation success status change */
-#define USB_OTG_GOTGINT_HNGDET_Pos              (17U)                          
+#define USB_OTG_GOTGINT_HNGDET_Pos              (17U)
 #define USB_OTG_GOTGINT_HNGDET_Msk              (0x1UL << USB_OTG_GOTGINT_HNGDET_Pos) /*!< 0x00020000 */
 #define USB_OTG_GOTGINT_HNGDET                  USB_OTG_GOTGINT_HNGDET_Msk     /*!< Host negotiation detected */
-#define USB_OTG_GOTGINT_ADTOCHG_Pos             (18U)                          
+#define USB_OTG_GOTGINT_ADTOCHG_Pos             (18U)
 #define USB_OTG_GOTGINT_ADTOCHG_Msk             (0x1UL << USB_OTG_GOTGINT_ADTOCHG_Pos) /*!< 0x00040000 */
 #define USB_OTG_GOTGINT_ADTOCHG                 USB_OTG_GOTGINT_ADTOCHG_Msk    /*!< A-device timeout change */
-#define USB_OTG_GOTGINT_DBCDNE_Pos              (19U)                          
+#define USB_OTG_GOTGINT_DBCDNE_Pos              (19U)
 #define USB_OTG_GOTGINT_DBCDNE_Msk              (0x1UL << USB_OTG_GOTGINT_DBCDNE_Pos) /*!< 0x00080000 */
 #define USB_OTG_GOTGINT_DBCDNE                  USB_OTG_GOTGINT_DBCDNE_Msk     /*!< Debounce done */
 
 /********************  Bit definition for USB_OTG_DCTL register  ********************/
-#define USB_OTG_DCTL_RWUSIG_Pos                 (0U)                           
+#define USB_OTG_DCTL_RWUSIG_Pos                 (0U)
 #define USB_OTG_DCTL_RWUSIG_Msk                 (0x1UL << USB_OTG_DCTL_RWUSIG_Pos) /*!< 0x00000001 */
 #define USB_OTG_DCTL_RWUSIG                     USB_OTG_DCTL_RWUSIG_Msk        /*!< Remote wakeup signaling */
-#define USB_OTG_DCTL_SDIS_Pos                   (1U)                           
+#define USB_OTG_DCTL_SDIS_Pos                   (1U)
 #define USB_OTG_DCTL_SDIS_Msk                   (0x1UL << USB_OTG_DCTL_SDIS_Pos) /*!< 0x00000002 */
 #define USB_OTG_DCTL_SDIS                       USB_OTG_DCTL_SDIS_Msk          /*!< Soft disconnect */
-#define USB_OTG_DCTL_GINSTS_Pos                 (2U)                           
+#define USB_OTG_DCTL_GINSTS_Pos                 (2U)
 #define USB_OTG_DCTL_GINSTS_Msk                 (0x1UL << USB_OTG_DCTL_GINSTS_Pos) /*!< 0x00000004 */
 #define USB_OTG_DCTL_GINSTS                     USB_OTG_DCTL_GINSTS_Msk        /*!< Global IN NAK status */
-#define USB_OTG_DCTL_GONSTS_Pos                 (3U)                           
+#define USB_OTG_DCTL_GONSTS_Pos                 (3U)
 #define USB_OTG_DCTL_GONSTS_Msk                 (0x1UL << USB_OTG_DCTL_GONSTS_Pos) /*!< 0x00000008 */
 #define USB_OTG_DCTL_GONSTS                     USB_OTG_DCTL_GONSTS_Msk        /*!< Global OUT NAK status */
 
-#define USB_OTG_DCTL_TCTL_Pos                   (4U)                           
+#define USB_OTG_DCTL_TCTL_Pos                   (4U)
 #define USB_OTG_DCTL_TCTL_Msk                   (0x7UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000070 */
 #define USB_OTG_DCTL_TCTL                       USB_OTG_DCTL_TCTL_Msk          /*!< Test control */
 #define USB_OTG_DCTL_TCTL_0                     (0x1UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000010 */
 #define USB_OTG_DCTL_TCTL_1                     (0x2UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000020 */
 #define USB_OTG_DCTL_TCTL_2                     (0x4UL << USB_OTG_DCTL_TCTL_Pos) /*!< 0x00000040 */
-#define USB_OTG_DCTL_SGINAK_Pos                 (7U)                           
+#define USB_OTG_DCTL_SGINAK_Pos                 (7U)
 #define USB_OTG_DCTL_SGINAK_Msk                 (0x1UL << USB_OTG_DCTL_SGINAK_Pos) /*!< 0x00000080 */
 #define USB_OTG_DCTL_SGINAK                     USB_OTG_DCTL_SGINAK_Msk        /*!< Set global IN NAK */
-#define USB_OTG_DCTL_CGINAK_Pos                 (8U)                           
+#define USB_OTG_DCTL_CGINAK_Pos                 (8U)
 #define USB_OTG_DCTL_CGINAK_Msk                 (0x1UL << USB_OTG_DCTL_CGINAK_Pos) /*!< 0x00000100 */
 #define USB_OTG_DCTL_CGINAK                     USB_OTG_DCTL_CGINAK_Msk        /*!< Clear global IN NAK */
-#define USB_OTG_DCTL_SGONAK_Pos                 (9U)                           
+#define USB_OTG_DCTL_SGONAK_Pos                 (9U)
 #define USB_OTG_DCTL_SGONAK_Msk                 (0x1UL << USB_OTG_DCTL_SGONAK_Pos) /*!< 0x00000200 */
 #define USB_OTG_DCTL_SGONAK                     USB_OTG_DCTL_SGONAK_Msk        /*!< Set global OUT NAK */
-#define USB_OTG_DCTL_CGONAK_Pos                 (10U)                          
+#define USB_OTG_DCTL_CGONAK_Pos                 (10U)
 #define USB_OTG_DCTL_CGONAK_Msk                 (0x1UL << USB_OTG_DCTL_CGONAK_Pos) /*!< 0x00000400 */
 #define USB_OTG_DCTL_CGONAK                     USB_OTG_DCTL_CGONAK_Msk        /*!< Clear global OUT NAK */
-#define USB_OTG_DCTL_POPRGDNE_Pos               (11U)                          
+#define USB_OTG_DCTL_POPRGDNE_Pos               (11U)
 #define USB_OTG_DCTL_POPRGDNE_Msk               (0x1UL << USB_OTG_DCTL_POPRGDNE_Pos) /*!< 0x00000800 */
 #define USB_OTG_DCTL_POPRGDNE                   USB_OTG_DCTL_POPRGDNE_Msk      /*!< Power-on programming done */
 
 /********************  Bit definition for USB_OTG_HFIR register  ********************/
-#define USB_OTG_HFIR_FRIVL_Pos                  (0U)                           
+#define USB_OTG_HFIR_FRIVL_Pos                  (0U)
 #define USB_OTG_HFIR_FRIVL_Msk                  (0xFFFFUL << USB_OTG_HFIR_FRIVL_Pos) /*!< 0x0000FFFF */
 #define USB_OTG_HFIR_FRIVL                      USB_OTG_HFIR_FRIVL_Msk         /*!< Frame interval */
 
 /********************  Bit definition for USB_OTG_HFNUM register  ********************/
-#define USB_OTG_HFNUM_FRNUM_Pos                 (0U)                           
+#define USB_OTG_HFNUM_FRNUM_Pos                 (0U)
 #define USB_OTG_HFNUM_FRNUM_Msk                 (0xFFFFUL << USB_OTG_HFNUM_FRNUM_Pos) /*!< 0x0000FFFF */
 #define USB_OTG_HFNUM_FRNUM                     USB_OTG_HFNUM_FRNUM_Msk        /*!< Frame number */
-#define USB_OTG_HFNUM_FTREM_Pos                 (16U)                          
+#define USB_OTG_HFNUM_FTREM_Pos                 (16U)
 #define USB_OTG_HFNUM_FTREM_Msk                 (0xFFFFUL << USB_OTG_HFNUM_FTREM_Pos) /*!< 0xFFFF0000 */
 #define USB_OTG_HFNUM_FTREM                     USB_OTG_HFNUM_FTREM_Msk        /*!< Frame time remaining */
 
 /********************  Bit definition for USB_OTG_DSTS register  ********************/
-#define USB_OTG_DSTS_SUSPSTS_Pos                (0U)                           
+#define USB_OTG_DSTS_SUSPSTS_Pos                (0U)
 #define USB_OTG_DSTS_SUSPSTS_Msk                (0x1UL << USB_OTG_DSTS_SUSPSTS_Pos) /*!< 0x00000001 */
 #define USB_OTG_DSTS_SUSPSTS                    USB_OTG_DSTS_SUSPSTS_Msk       /*!< Suspend status */
 
-#define USB_OTG_DSTS_ENUMSPD_Pos                (1U)                           
+#define USB_OTG_DSTS_ENUMSPD_Pos                (1U)
 #define USB_OTG_DSTS_ENUMSPD_Msk                (0x3UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000006 */
 #define USB_OTG_DSTS_ENUMSPD                    USB_OTG_DSTS_ENUMSPD_Msk       /*!< Enumerated speed */
 #define USB_OTG_DSTS_ENUMSPD_0                  (0x1UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000002 */
 #define USB_OTG_DSTS_ENUMSPD_1                  (0x2UL << USB_OTG_DSTS_ENUMSPD_Pos) /*!< 0x00000004 */
-#define USB_OTG_DSTS_EERR_Pos                   (3U)                           
+#define USB_OTG_DSTS_EERR_Pos                   (3U)
 #define USB_OTG_DSTS_EERR_Msk                   (0x1UL << USB_OTG_DSTS_EERR_Pos) /*!< 0x00000008 */
 #define USB_OTG_DSTS_EERR                       USB_OTG_DSTS_EERR_Msk          /*!< Erratic error */
-#define USB_OTG_DSTS_FNSOF_Pos                  (8U)                           
+#define USB_OTG_DSTS_FNSOF_Pos                  (8U)
 #define USB_OTG_DSTS_FNSOF_Msk                  (0x3FFFUL << USB_OTG_DSTS_FNSOF_Pos) /*!< 0x003FFF00 */
 #define USB_OTG_DSTS_FNSOF                      USB_OTG_DSTS_FNSOF_Msk         /*!< Frame number of the received SOF */
 
 /********************  Bit definition for USB_OTG_GAHBCFG register  ********************/
-#define USB_OTG_GAHBCFG_GINT_Pos                (0U)                           
+#define USB_OTG_GAHBCFG_GINT_Pos                (0U)
 #define USB_OTG_GAHBCFG_GINT_Msk                (0x1UL << USB_OTG_GAHBCFG_GINT_Pos) /*!< 0x00000001 */
 #define USB_OTG_GAHBCFG_GINT                    USB_OTG_GAHBCFG_GINT_Msk       /*!< Global interrupt mask */
-#define USB_OTG_GAHBCFG_HBSTLEN_Pos             (1U)                           
+#define USB_OTG_GAHBCFG_HBSTLEN_Pos             (1U)
 #define USB_OTG_GAHBCFG_HBSTLEN_Msk             (0xFUL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< 0x0000001E */
 #define USB_OTG_GAHBCFG_HBSTLEN                 USB_OTG_GAHBCFG_HBSTLEN_Msk    /*!< Burst length/type */
 #define USB_OTG_GAHBCFG_HBSTLEN_0                (0x0UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< Single */
@@ -362,99 +362,99 @@ typedef struct
 #define USB_OTG_GAHBCFG_HBSTLEN_2                (0x3UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR4 */
 #define USB_OTG_GAHBCFG_HBSTLEN_3                (0x5UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR8 */
 #define USB_OTG_GAHBCFG_HBSTLEN_4                (0x7UL << USB_OTG_GAHBCFG_HBSTLEN_Pos) /*!< INCR16 */
-#define USB_OTG_GAHBCFG_DMAEN_Pos               (5U)                           
+#define USB_OTG_GAHBCFG_DMAEN_Pos               (5U)
 #define USB_OTG_GAHBCFG_DMAEN_Msk               (0x1UL << USB_OTG_GAHBCFG_DMAEN_Pos) /*!< 0x00000020 */
 #define USB_OTG_GAHBCFG_DMAEN                   USB_OTG_GAHBCFG_DMAEN_Msk      /*!< DMA enable */
-#define USB_OTG_GAHBCFG_TXFELVL_Pos             (7U)                           
+#define USB_OTG_GAHBCFG_TXFELVL_Pos             (7U)
 #define USB_OTG_GAHBCFG_TXFELVL_Msk             (0x1UL << USB_OTG_GAHBCFG_TXFELVL_Pos) /*!< 0x00000080 */
 #define USB_OTG_GAHBCFG_TXFELVL                 USB_OTG_GAHBCFG_TXFELVL_Msk    /*!< TxFIFO empty level */
-#define USB_OTG_GAHBCFG_PTXFELVL_Pos            (8U)                           
+#define USB_OTG_GAHBCFG_PTXFELVL_Pos            (8U)
 #define USB_OTG_GAHBCFG_PTXFELVL_Msk            (0x1UL << USB_OTG_GAHBCFG_PTXFELVL_Pos) /*!< 0x00000100 */
 #define USB_OTG_GAHBCFG_PTXFELVL                USB_OTG_GAHBCFG_PTXFELVL_Msk   /*!< Periodic TxFIFO empty level */
 
 /********************  Bit definition for USB_OTG_GUSBCFG register  ********************/
 
-#define USB_OTG_GUSBCFG_TOCAL_Pos               (0U)                           
+#define USB_OTG_GUSBCFG_TOCAL_Pos               (0U)
 #define USB_OTG_GUSBCFG_TOCAL_Msk               (0x7UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000007 */
 #define USB_OTG_GUSBCFG_TOCAL                   USB_OTG_GUSBCFG_TOCAL_Msk      /*!< FS timeout calibration */
 #define USB_OTG_GUSBCFG_TOCAL_0                 (0x1UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000001 */
 #define USB_OTG_GUSBCFG_TOCAL_1                 (0x2UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000002 */
 #define USB_OTG_GUSBCFG_TOCAL_2                 (0x4UL << USB_OTG_GUSBCFG_TOCAL_Pos) /*!< 0x00000004 */
-#define USB_OTG_GUSBCFG_PHYSEL_Pos              (6U)                           
+#define USB_OTG_GUSBCFG_PHYSEL_Pos              (6U)
 #define USB_OTG_GUSBCFG_PHYSEL_Msk              (0x1UL << USB_OTG_GUSBCFG_PHYSEL_Pos) /*!< 0x00000040 */
 #define USB_OTG_GUSBCFG_PHYSEL                  USB_OTG_GUSBCFG_PHYSEL_Msk     /*!< USB 2.0 high-speed ULPI PHY or USB 1.1 full-speed serial transceiver select */
-#define USB_OTG_GUSBCFG_SRPCAP_Pos              (8U)                           
+#define USB_OTG_GUSBCFG_SRPCAP_Pos              (8U)
 #define USB_OTG_GUSBCFG_SRPCAP_Msk              (0x1UL << USB_OTG_GUSBCFG_SRPCAP_Pos) /*!< 0x00000100 */
 #define USB_OTG_GUSBCFG_SRPCAP                  USB_OTG_GUSBCFG_SRPCAP_Msk     /*!< SRP-capable */
-#define USB_OTG_GUSBCFG_HNPCAP_Pos              (9U)                           
+#define USB_OTG_GUSBCFG_HNPCAP_Pos              (9U)
 #define USB_OTG_GUSBCFG_HNPCAP_Msk              (0x1UL << USB_OTG_GUSBCFG_HNPCAP_Pos) /*!< 0x00000200 */
 #define USB_OTG_GUSBCFG_HNPCAP                  USB_OTG_GUSBCFG_HNPCAP_Msk     /*!< HNP-capable */
-#define USB_OTG_GUSBCFG_TRDT_Pos                (10U)                          
+#define USB_OTG_GUSBCFG_TRDT_Pos                (10U)
 #define USB_OTG_GUSBCFG_TRDT_Msk                (0xFUL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00003C00 */
 #define USB_OTG_GUSBCFG_TRDT                    USB_OTG_GUSBCFG_TRDT_Msk       /*!< USB turnaround time */
 #define USB_OTG_GUSBCFG_TRDT_0                  (0x1UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00000400 */
 #define USB_OTG_GUSBCFG_TRDT_1                  (0x2UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00000800 */
 #define USB_OTG_GUSBCFG_TRDT_2                  (0x4UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00001000 */
 #define USB_OTG_GUSBCFG_TRDT_3                  (0x8UL << USB_OTG_GUSBCFG_TRDT_Pos) /*!< 0x00002000 */
-#define USB_OTG_GUSBCFG_PHYLPCS_Pos             (15U)                          
+#define USB_OTG_GUSBCFG_PHYLPCS_Pos             (15U)
 #define USB_OTG_GUSBCFG_PHYLPCS_Msk             (0x1UL << USB_OTG_GUSBCFG_PHYLPCS_Pos) /*!< 0x00008000 */
 #define USB_OTG_GUSBCFG_PHYLPCS                 USB_OTG_GUSBCFG_PHYLPCS_Msk    /*!< PHY Low-power clock select */
-#define USB_OTG_GUSBCFG_ULPIFSLS_Pos            (17U)                          
+#define USB_OTG_GUSBCFG_ULPIFSLS_Pos            (17U)
 #define USB_OTG_GUSBCFG_ULPIFSLS_Msk            (0x1UL << USB_OTG_GUSBCFG_ULPIFSLS_Pos) /*!< 0x00020000 */
 #define USB_OTG_GUSBCFG_ULPIFSLS                USB_OTG_GUSBCFG_ULPIFSLS_Msk   /*!< ULPI FS/LS select */
-#define USB_OTG_GUSBCFG_ULPIAR_Pos              (18U)                          
+#define USB_OTG_GUSBCFG_ULPIAR_Pos              (18U)
 #define USB_OTG_GUSBCFG_ULPIAR_Msk              (0x1UL << USB_OTG_GUSBCFG_ULPIAR_Pos) /*!< 0x00040000 */
 #define USB_OTG_GUSBCFG_ULPIAR                  USB_OTG_GUSBCFG_ULPIAR_Msk     /*!< ULPI Auto-resume */
-#define USB_OTG_GUSBCFG_ULPICSM_Pos             (19U)                          
+#define USB_OTG_GUSBCFG_ULPICSM_Pos             (19U)
 #define USB_OTG_GUSBCFG_ULPICSM_Msk             (0x1UL << USB_OTG_GUSBCFG_ULPICSM_Pos) /*!< 0x00080000 */
 #define USB_OTG_GUSBCFG_ULPICSM                 USB_OTG_GUSBCFG_ULPICSM_Msk    /*!< ULPI Clock SuspendM */
-#define USB_OTG_GUSBCFG_ULPIEVBUSD_Pos          (20U)                          
+#define USB_OTG_GUSBCFG_ULPIEVBUSD_Pos          (20U)
 #define USB_OTG_GUSBCFG_ULPIEVBUSD_Msk          (0x1UL << USB_OTG_GUSBCFG_ULPIEVBUSD_Pos) /*!< 0x00100000 */
 #define USB_OTG_GUSBCFG_ULPIEVBUSD              USB_OTG_GUSBCFG_ULPIEVBUSD_Msk /*!< ULPI External VBUS Drive */
-#define USB_OTG_GUSBCFG_ULPIEVBUSI_Pos          (21U)                          
+#define USB_OTG_GUSBCFG_ULPIEVBUSI_Pos          (21U)
 #define USB_OTG_GUSBCFG_ULPIEVBUSI_Msk          (0x1UL << USB_OTG_GUSBCFG_ULPIEVBUSI_Pos) /*!< 0x00200000 */
 #define USB_OTG_GUSBCFG_ULPIEVBUSI              USB_OTG_GUSBCFG_ULPIEVBUSI_Msk /*!< ULPI external VBUS indicator */
-#define USB_OTG_GUSBCFG_TSDPS_Pos               (22U)                          
+#define USB_OTG_GUSBCFG_TSDPS_Pos               (22U)
 #define USB_OTG_GUSBCFG_TSDPS_Msk               (0x1UL << USB_OTG_GUSBCFG_TSDPS_Pos) /*!< 0x00400000 */
 #define USB_OTG_GUSBCFG_TSDPS                   USB_OTG_GUSBCFG_TSDPS_Msk      /*!< TermSel DLine pulsing selection */
-#define USB_OTG_GUSBCFG_PCCI_Pos                (23U)                          
+#define USB_OTG_GUSBCFG_PCCI_Pos                (23U)
 #define USB_OTG_GUSBCFG_PCCI_Msk                (0x1UL << USB_OTG_GUSBCFG_PCCI_Pos) /*!< 0x00800000 */
 #define USB_OTG_GUSBCFG_PCCI                    USB_OTG_GUSBCFG_PCCI_Msk       /*!< Indicator complement */
-#define USB_OTG_GUSBCFG_PTCI_Pos                (24U)                          
+#define USB_OTG_GUSBCFG_PTCI_Pos                (24U)
 #define USB_OTG_GUSBCFG_PTCI_Msk                (0x1UL << USB_OTG_GUSBCFG_PTCI_Pos) /*!< 0x01000000 */
 #define USB_OTG_GUSBCFG_PTCI                    USB_OTG_GUSBCFG_PTCI_Msk       /*!< Indicator pass through */
-#define USB_OTG_GUSBCFG_ULPIIPD_Pos             (25U)                          
+#define USB_OTG_GUSBCFG_ULPIIPD_Pos             (25U)
 #define USB_OTG_GUSBCFG_ULPIIPD_Msk             (0x1UL << USB_OTG_GUSBCFG_ULPIIPD_Pos) /*!< 0x02000000 */
 #define USB_OTG_GUSBCFG_ULPIIPD                 USB_OTG_GUSBCFG_ULPIIPD_Msk    /*!< ULPI interface protect disable */
-#define USB_OTG_GUSBCFG_FHMOD_Pos               (29U)                          
+#define USB_OTG_GUSBCFG_FHMOD_Pos               (29U)
 #define USB_OTG_GUSBCFG_FHMOD_Msk               (0x1UL << USB_OTG_GUSBCFG_FHMOD_Pos) /*!< 0x20000000 */
 #define USB_OTG_GUSBCFG_FHMOD                   USB_OTG_GUSBCFG_FHMOD_Msk      /*!< Forced host mode */
-#define USB_OTG_GUSBCFG_FDMOD_Pos               (30U)                          
+#define USB_OTG_GUSBCFG_FDMOD_Pos               (30U)
 #define USB_OTG_GUSBCFG_FDMOD_Msk               (0x1UL << USB_OTG_GUSBCFG_FDMOD_Pos) /*!< 0x40000000 */
 #define USB_OTG_GUSBCFG_FDMOD                   USB_OTG_GUSBCFG_FDMOD_Msk      /*!< Forced peripheral mode */
-#define USB_OTG_GUSBCFG_CTXPKT_Pos              (31U)                          
+#define USB_OTG_GUSBCFG_CTXPKT_Pos              (31U)
 #define USB_OTG_GUSBCFG_CTXPKT_Msk              (0x1UL << USB_OTG_GUSBCFG_CTXPKT_Pos) /*!< 0x80000000 */
 #define USB_OTG_GUSBCFG_CTXPKT                  USB_OTG_GUSBCFG_CTXPKT_Msk     /*!< Corrupt Tx packet */
 
 /********************  Bit definition for USB_OTG_GRSTCTL register  ********************/
-#define USB_OTG_GRSTCTL_CSRST_Pos               (0U)                           
+#define USB_OTG_GRSTCTL_CSRST_Pos               (0U)
 #define USB_OTG_GRSTCTL_CSRST_Msk               (0x1UL << USB_OTG_GRSTCTL_CSRST_Pos) /*!< 0x00000001 */
 #define USB_OTG_GRSTCTL_CSRST                   USB_OTG_GRSTCTL_CSRST_Msk      /*!< Core soft reset */
-#define USB_OTG_GRSTCTL_HSRST_Pos               (1U)                           
+#define USB_OTG_GRSTCTL_HSRST_Pos               (1U)
 #define USB_OTG_GRSTCTL_HSRST_Msk               (0x1UL << USB_OTG_GRSTCTL_HSRST_Pos) /*!< 0x00000002 */
 #define USB_OTG_GRSTCTL_HSRST                   USB_OTG_GRSTCTL_HSRST_Msk      /*!< HCLK soft reset */
-#define USB_OTG_GRSTCTL_FCRST_Pos               (2U)                           
+#define USB_OTG_GRSTCTL_FCRST_Pos               (2U)
 #define USB_OTG_GRSTCTL_FCRST_Msk               (0x1UL << USB_OTG_GRSTCTL_FCRST_Pos) /*!< 0x00000004 */
 #define USB_OTG_GRSTCTL_FCRST                   USB_OTG_GRSTCTL_FCRST_Msk      /*!< Host frame counter reset */
-#define USB_OTG_GRSTCTL_RXFFLSH_Pos             (4U)                           
+#define USB_OTG_GRSTCTL_RXFFLSH_Pos             (4U)
 #define USB_OTG_GRSTCTL_RXFFLSH_Msk             (0x1UL << USB_OTG_GRSTCTL_RXFFLSH_Pos) /*!< 0x00000010 */
 #define USB_OTG_GRSTCTL_RXFFLSH                 USB_OTG_GRSTCTL_RXFFLSH_Msk    /*!< RxFIFO flush */
-#define USB_OTG_GRSTCTL_TXFFLSH_Pos             (5U)                           
+#define USB_OTG_GRSTCTL_TXFFLSH_Pos             (5U)
 #define USB_OTG_GRSTCTL_TXFFLSH_Msk             (0x1UL << USB_OTG_GRSTCTL_TXFFLSH_Pos) /*!< 0x00000020 */
 #define USB_OTG_GRSTCTL_TXFFLSH                 USB_OTG_GRSTCTL_TXFFLSH_Msk    /*!< TxFIFO flush */
 
 
-#define USB_OTG_GRSTCTL_TXFNUM_Pos              (6U)                           
+#define USB_OTG_GRSTCTL_TXFNUM_Pos              (6U)
 #define USB_OTG_GRSTCTL_TXFNUM_Msk              (0x1FUL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x000007C0 */
 #define USB_OTG_GRSTCTL_TXFNUM                  USB_OTG_GRSTCTL_TXFNUM_Msk     /*!< TxFIFO number */
 #define USB_OTG_GRSTCTL_TXFNUM_0                (0x01UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000040 */
@@ -462,44 +462,44 @@ typedef struct
 #define USB_OTG_GRSTCTL_TXFNUM_2                (0x04UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000100 */
 #define USB_OTG_GRSTCTL_TXFNUM_3                (0x08UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000200 */
 #define USB_OTG_GRSTCTL_TXFNUM_4                (0x10UL << USB_OTG_GRSTCTL_TXFNUM_Pos) /*!< 0x00000400 */
-#define USB_OTG_GRSTCTL_DMAREQ_Pos              (30U)                          
+#define USB_OTG_GRSTCTL_DMAREQ_Pos              (30U)
 #define USB_OTG_GRSTCTL_DMAREQ_Msk              (0x1UL << USB_OTG_GRSTCTL_DMAREQ_Pos) /*!< 0x40000000 */
 #define USB_OTG_GRSTCTL_DMAREQ                  USB_OTG_GRSTCTL_DMAREQ_Msk     /*!< DMA request signal */
-#define USB_OTG_GRSTCTL_AHBIDL_Pos              (31U)                          
+#define USB_OTG_GRSTCTL_AHBIDL_Pos              (31U)
 #define USB_OTG_GRSTCTL_AHBIDL_Msk              (0x1UL << USB_OTG_GRSTCTL_AHBIDL_Pos) /*!< 0x80000000 */
 #define USB_OTG_GRSTCTL_AHBIDL                  USB_OTG_GRSTCTL_AHBIDL_Msk     /*!< AHB master idle */
 
 /********************  Bit definition for USB_OTG_DIEPMSK register  ********************/
-#define USB_OTG_DIEPMSK_XFRCM_Pos               (0U)                           
+#define USB_OTG_DIEPMSK_XFRCM_Pos               (0U)
 #define USB_OTG_DIEPMSK_XFRCM_Msk               (0x1UL << USB_OTG_DIEPMSK_XFRCM_Pos) /*!< 0x00000001 */
 #define USB_OTG_DIEPMSK_XFRCM                   USB_OTG_DIEPMSK_XFRCM_Msk      /*!< Transfer completed interrupt mask */
-#define USB_OTG_DIEPMSK_EPDM_Pos                (1U)                           
+#define USB_OTG_DIEPMSK_EPDM_Pos                (1U)
 #define USB_OTG_DIEPMSK_EPDM_Msk                (0x1UL << USB_OTG_DIEPMSK_EPDM_Pos) /*!< 0x00000002 */
 #define USB_OTG_DIEPMSK_EPDM                    USB_OTG_DIEPMSK_EPDM_Msk       /*!< Endpoint disabled interrupt mask */
-#define USB_OTG_DIEPMSK_TOM_Pos                 (3U)                           
+#define USB_OTG_DIEPMSK_TOM_Pos                 (3U)
 #define USB_OTG_DIEPMSK_TOM_Msk                 (0x1UL << USB_OTG_DIEPMSK_TOM_Pos) /*!< 0x00000008 */
 #define USB_OTG_DIEPMSK_TOM                     USB_OTG_DIEPMSK_TOM_Msk        /*!< Timeout condition mask (nonisochronous endpoints) */
-#define USB_OTG_DIEPMSK_ITTXFEMSK_Pos           (4U)                           
+#define USB_OTG_DIEPMSK_ITTXFEMSK_Pos           (4U)
 #define USB_OTG_DIEPMSK_ITTXFEMSK_Msk           (0x1UL << USB_OTG_DIEPMSK_ITTXFEMSK_Pos) /*!< 0x00000010 */
 #define USB_OTG_DIEPMSK_ITTXFEMSK               USB_OTG_DIEPMSK_ITTXFEMSK_Msk  /*!< IN token received when TxFIFO empty mask */
-#define USB_OTG_DIEPMSK_INEPNMM_Pos             (5U)                           
+#define USB_OTG_DIEPMSK_INEPNMM_Pos             (5U)
 #define USB_OTG_DIEPMSK_INEPNMM_Msk             (0x1UL << USB_OTG_DIEPMSK_INEPNMM_Pos) /*!< 0x00000020 */
 #define USB_OTG_DIEPMSK_INEPNMM                 USB_OTG_DIEPMSK_INEPNMM_Msk    /*!< IN token received with EP mismatch mask */
-#define USB_OTG_DIEPMSK_INEPNEM_Pos             (6U)                           
+#define USB_OTG_DIEPMSK_INEPNEM_Pos             (6U)
 #define USB_OTG_DIEPMSK_INEPNEM_Msk             (0x1UL << USB_OTG_DIEPMSK_INEPNEM_Pos) /*!< 0x00000040 */
 #define USB_OTG_DIEPMSK_INEPNEM                 USB_OTG_DIEPMSK_INEPNEM_Msk    /*!< IN endpoint NAK effective mask */
-#define USB_OTG_DIEPMSK_TXFURM_Pos              (8U)                           
+#define USB_OTG_DIEPMSK_TXFURM_Pos              (8U)
 #define USB_OTG_DIEPMSK_TXFURM_Msk              (0x1UL << USB_OTG_DIEPMSK_TXFURM_Pos) /*!< 0x00000100 */
 #define USB_OTG_DIEPMSK_TXFURM                  USB_OTG_DIEPMSK_TXFURM_Msk     /*!< FIFO underrun mask */
-#define USB_OTG_DIEPMSK_BIM_Pos                 (9U)                           
+#define USB_OTG_DIEPMSK_BIM_Pos                 (9U)
 #define USB_OTG_DIEPMSK_BIM_Msk                 (0x1UL << USB_OTG_DIEPMSK_BIM_Pos) /*!< 0x00000200 */
 #define USB_OTG_DIEPMSK_BIM                     USB_OTG_DIEPMSK_BIM_Msk        /*!< BNA interrupt mask */
 
 /********************  Bit definition for USB_OTG_HPTXSTS register  ********************/
-#define USB_OTG_HPTXSTS_PTXFSAVL_Pos            (0U)                           
+#define USB_OTG_HPTXSTS_PTXFSAVL_Pos            (0U)
 #define USB_OTG_HPTXSTS_PTXFSAVL_Msk            (0xFFFFUL << USB_OTG_HPTXSTS_PTXFSAVL_Pos) /*!< 0x0000FFFF */
 #define USB_OTG_HPTXSTS_PTXFSAVL                USB_OTG_HPTXSTS_PTXFSAVL_Msk   /*!< Periodic transmit data FIFO space available */
-#define USB_OTG_HPTXSTS_PTXQSAV_Pos             (16U)                          
+#define USB_OTG_HPTXSTS_PTXQSAV_Pos             (16U)
 #define USB_OTG_HPTXSTS_PTXQSAV_Msk             (0xFFUL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00FF0000 */
 #define USB_OTG_HPTXSTS_PTXQSAV                 USB_OTG_HPTXSTS_PTXQSAV_Msk    /*!< Periodic transmit request queue space available */
 #define USB_OTG_HPTXSTS_PTXQSAV_0               (0x01UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00010000 */
@@ -511,7 +511,7 @@ typedef struct
 #define USB_OTG_HPTXSTS_PTXQSAV_6               (0x40UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00400000 */
 #define USB_OTG_HPTXSTS_PTXQSAV_7               (0x80UL << USB_OTG_HPTXSTS_PTXQSAV_Pos) /*!< 0x00800000 */
 
-#define USB_OTG_HPTXSTS_PTXQTOP_Pos             (24U)                          
+#define USB_OTG_HPTXSTS_PTXQTOP_Pos             (24U)
 #define USB_OTG_HPTXSTS_PTXQTOP_Msk             (0xFFUL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0xFF000000 */
 #define USB_OTG_HPTXSTS_PTXQTOP                 USB_OTG_HPTXSTS_PTXQTOP_Msk    /*!< Top of the periodic transmit request queue */
 #define USB_OTG_HPTXSTS_PTXQTOP_0               (0x01UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x01000000 */
@@ -524,36 +524,36 @@ typedef struct
 #define USB_OTG_HPTXSTS_PTXQTOP_7               (0x80UL << USB_OTG_HPTXSTS_PTXQTOP_Pos) /*!< 0x80000000 */
 
 /********************  Bit definition for USB_OTG_HAINT register  ********************/
-#define USB_OTG_HAINT_HAINT_Pos                 (0U)                           
+#define USB_OTG_HAINT_HAINT_Pos                 (0U)
 #define USB_OTG_HAINT_HAINT_Msk                 (0xFFFFUL << USB_OTG_HAINT_HAINT_Pos) /*!< 0x0000FFFF */
 #define USB_OTG_HAINT_HAINT                     USB_OTG_HAINT_HAINT_Msk        /*!< Channel interrupts */
 
 /********************  Bit definition for USB_OTG_DOEPMSK register  ********************/
-#define USB_OTG_DOEPMSK_XFRCM_Pos               (0U)                           
+#define USB_OTG_DOEPMSK_XFRCM_Pos               (0U)
 #define USB_OTG_DOEPMSK_XFRCM_Msk               (0x1UL << USB_OTG_DOEPMSK_XFRCM_Pos) /*!< 0x00000001 */
 #define USB_OTG_DOEPMSK_XFRCM                   USB_OTG_DOEPMSK_XFRCM_Msk      /*!< Transfer completed interrupt mask */
-#define USB_OTG_DOEPMSK_EPDM_Pos                (1U)                           
+#define USB_OTG_DOEPMSK_EPDM_Pos                (1U)
 #define USB_OTG_DOEPMSK_EPDM_Msk                (0x1UL << USB_OTG_DOEPMSK_EPDM_Pos) /*!< 0x00000002 */
 #define USB_OTG_DOEPMSK_EPDM                    USB_OTG_DOEPMSK_EPDM_Msk       /*!< Endpoint disabled interrupt mask */
 #define USB_OTG_DOEPMSK_AHBERRM_Pos              (2U)
 #define USB_OTG_DOEPMSK_AHBERRM_Msk              (0x1UL << USB_OTG_DOEPMSK_AHBERRM_Pos) /*!< 0x00000004 */
 #define USB_OTG_DOEPMSK_AHBERRM                  USB_OTG_DOEPMSK_AHBERRM_Msk   /*!< OUT transaction AHB Error interrupt mask       */
-#define USB_OTG_DOEPMSK_STUPM_Pos               (3U)                           
+#define USB_OTG_DOEPMSK_STUPM_Pos               (3U)
 #define USB_OTG_DOEPMSK_STUPM_Msk               (0x1UL << USB_OTG_DOEPMSK_STUPM_Pos) /*!< 0x00000008 */
 #define USB_OTG_DOEPMSK_STUPM                   USB_OTG_DOEPMSK_STUPM_Msk      /*!< SETUP phase done mask */
-#define USB_OTG_DOEPMSK_OTEPDM_Pos              (4U)                           
+#define USB_OTG_DOEPMSK_OTEPDM_Pos              (4U)
 #define USB_OTG_DOEPMSK_OTEPDM_Msk              (0x1UL << USB_OTG_DOEPMSK_OTEPDM_Pos) /*!< 0x00000010 */
 #define USB_OTG_DOEPMSK_OTEPDM                  USB_OTG_DOEPMSK_OTEPDM_Msk     /*!< OUT token received when endpoint disabled mask */
-#define USB_OTG_DOEPMSK_OTEPSPRM_Pos             (5U)                          
+#define USB_OTG_DOEPMSK_OTEPSPRM_Pos             (5U)
 #define USB_OTG_DOEPMSK_OTEPSPRM_Msk             (0x1UL << USB_OTG_DOEPMSK_OTEPSPRM_Pos) /*!< 0x00000020 */
 #define USB_OTG_DOEPMSK_OTEPSPRM                 USB_OTG_DOEPMSK_OTEPSPRM_Msk  /*!< Status Phase Received mask                     */
-#define USB_OTG_DOEPMSK_B2BSTUP_Pos             (6U)                           
+#define USB_OTG_DOEPMSK_B2BSTUP_Pos             (6U)
 #define USB_OTG_DOEPMSK_B2BSTUP_Msk             (0x1UL << USB_OTG_DOEPMSK_B2BSTUP_Pos) /*!< 0x00000040 */
 #define USB_OTG_DOEPMSK_B2BSTUP                 USB_OTG_DOEPMSK_B2BSTUP_Msk    /*!< Back-to-back SETUP packets received mask */
-#define USB_OTG_DOEPMSK_OPEM_Pos                (8U)                           
+#define USB_OTG_DOEPMSK_OPEM_Pos                (8U)
 #define USB_OTG_DOEPMSK_OPEM_Msk                (0x1UL << USB_OTG_DOEPMSK_OPEM_Pos) /*!< 0x00000100 */
 #define USB_OTG_DOEPMSK_OPEM                    USB_OTG_DOEPMSK_OPEM_Msk       /*!< OUT packet error mask */
-#define USB_OTG_DOEPMSK_BOIM_Pos                (9U)                           
+#define USB_OTG_DOEPMSK_BOIM_Pos                (9U)
 #define USB_OTG_DOEPMSK_BOIM_Msk                (0x1UL << USB_OTG_DOEPMSK_BOIM_Pos) /*!< 0x00000200 */
 #define USB_OTG_DOEPMSK_BOIM                    USB_OTG_DOEPMSK_BOIM_Msk       /*!< BNA interrupt mask */
 #define USB_OTG_DOEPMSK_BERRM_Pos                (12U)
@@ -566,235 +566,235 @@ typedef struct
 #define USB_OTG_DOEPMSK_NYETM_Msk                (0x1UL << USB_OTG_DOEPMSK_NYETM_Pos) /*!< 0x00004000 */
 #define USB_OTG_DOEPMSK_NYETM                    USB_OTG_DOEPMSK_NYETM_Msk     /*!< NYET interrupt mask                            */
 /********************  Bit definition for USB_OTG_GINTSTS register  ********************/
-#define USB_OTG_GINTSTS_CMOD_Pos                (0U)                           
+#define USB_OTG_GINTSTS_CMOD_Pos                (0U)
 #define USB_OTG_GINTSTS_CMOD_Msk                (0x1UL << USB_OTG_GINTSTS_CMOD_Pos) /*!< 0x00000001 */
 #define USB_OTG_GINTSTS_CMOD                    USB_OTG_GINTSTS_CMOD_Msk       /*!< Current mode of operation */
-#define USB_OTG_GINTSTS_MMIS_Pos                (1U)                           
+#define USB_OTG_GINTSTS_MMIS_Pos                (1U)
 #define USB_OTG_GINTSTS_MMIS_Msk                (0x1UL << USB_OTG_GINTSTS_MMIS_Pos) /*!< 0x00000002 */
 #define USB_OTG_GINTSTS_MMIS                    USB_OTG_GINTSTS_MMIS_Msk       /*!< Mode mismatch interrupt */
-#define USB_OTG_GINTSTS_OTGINT_Pos              (2U)                           
+#define USB_OTG_GINTSTS_OTGINT_Pos              (2U)
 #define USB_OTG_GINTSTS_OTGINT_Msk              (0x1UL << USB_OTG_GINTSTS_OTGINT_Pos) /*!< 0x00000004 */
 #define USB_OTG_GINTSTS_OTGINT                  USB_OTG_GINTSTS_OTGINT_Msk     /*!< OTG interrupt */
-#define USB_OTG_GINTSTS_SOF_Pos                 (3U)                           
+#define USB_OTG_GINTSTS_SOF_Pos                 (3U)
 #define USB_OTG_GINTSTS_SOF_Msk                 (0x1UL << USB_OTG_GINTSTS_SOF_Pos) /*!< 0x00000008 */
 #define USB_OTG_GINTSTS_SOF                     USB_OTG_GINTSTS_SOF_Msk        /*!< Start of frame */
-#define USB_OTG_GINTSTS_RXFLVL_Pos              (4U)                           
+#define USB_OTG_GINTSTS_RXFLVL_Pos              (4U)
 #define USB_OTG_GINTSTS_RXFLVL_Msk              (0x1UL << USB_OTG_GINTSTS_RXFLVL_Pos) /*!< 0x00000010 */
 #define USB_OTG_GINTSTS_RXFLVL                  USB_OTG_GINTSTS_RXFLVL_Msk     /*!< RxFIFO nonempty */
-#define USB_OTG_GINTSTS_NPTXFE_Pos              (5U)                           
+#define USB_OTG_GINTSTS_NPTXFE_Pos              (5U)
 #define USB_OTG_GINTSTS_NPTXFE_Msk              (0x1UL << USB_OTG_GINTSTS_NPTXFE_Pos) /*!< 0x00000020 */
 #define USB_OTG_GINTSTS_NPTXFE                  USB_OTG_GINTSTS_NPTXFE_Msk     /*!< Nonperiodic TxFIFO empty */
-#define USB_OTG_GINTSTS_GINAKEFF_Pos            (6U)                           
+#define USB_OTG_GINTSTS_GINAKEFF_Pos            (6U)
 #define USB_OTG_GINTSTS_GINAKEFF_Msk            (0x1UL << USB_OTG_GINTSTS_GINAKEFF_Pos) /*!< 0x00000040 */
 #define USB_OTG_GINTSTS_GINAKEFF                USB_OTG_GINTSTS_GINAKEFF_Msk   /*!< Global IN nonperiodic NAK effective */
-#define USB_OTG_GINTSTS_BOUTNAKEFF_Pos          (7U)                           
+#define USB_OTG_GINTSTS_BOUTNAKEFF_Pos          (7U)
 #define USB_OTG_GINTSTS_BOUTNAKEFF_Msk          (0x1UL << USB_OTG_GINTSTS_BOUTNAKEFF_Pos) /*!< 0x00000080 */
 #define USB_OTG_GINTSTS_BOUTNAKEFF              USB_OTG_GINTSTS_BOUTNAKEFF_Msk /*!< Global OUT NAK effective */
-#define USB_OTG_GINTSTS_ESUSP_Pos               (10U)                          
+#define USB_OTG_GINTSTS_ESUSP_Pos               (10U)
 #define USB_OTG_GINTSTS_ESUSP_Msk               (0x1UL << USB_OTG_GINTSTS_ESUSP_Pos) /*!< 0x00000400 */
 #define USB_OTG_GINTSTS_ESUSP                   USB_OTG_GINTSTS_ESUSP_Msk      /*!< Early suspend */
-#define USB_OTG_GINTSTS_USBSUSP_Pos             (11U)                          
+#define USB_OTG_GINTSTS_USBSUSP_Pos             (11U)
 #define USB_OTG_GINTSTS_USBSUSP_Msk             (0x1UL << USB_OTG_GINTSTS_USBSUSP_Pos) /*!< 0x00000800 */
 #define USB_OTG_GINTSTS_USBSUSP                 USB_OTG_GINTSTS_USBSUSP_Msk    /*!< USB suspend */
-#define USB_OTG_GINTSTS_USBRST_Pos              (12U)                          
+#define USB_OTG_GINTSTS_USBRST_Pos              (12U)
 #define USB_OTG_GINTSTS_USBRST_Msk              (0x1UL << USB_OTG_GINTSTS_USBRST_Pos) /*!< 0x00001000 */
 #define USB_OTG_GINTSTS_USBRST                  USB_OTG_GINTSTS_USBRST_Msk     /*!< USB reset */
-#define USB_OTG_GINTSTS_ENUMDNE_Pos             (13U)                          
+#define USB_OTG_GINTSTS_ENUMDNE_Pos             (13U)
 #define USB_OTG_GINTSTS_ENUMDNE_Msk             (0x1UL << USB_OTG_GINTSTS_ENUMDNE_Pos) /*!< 0x00002000 */
 #define USB_OTG_GINTSTS_ENUMDNE                 USB_OTG_GINTSTS_ENUMDNE_Msk    /*!< Enumeration done */
-#define USB_OTG_GINTSTS_ISOODRP_Pos             (14U)                          
+#define USB_OTG_GINTSTS_ISOODRP_Pos             (14U)
 #define USB_OTG_GINTSTS_ISOODRP_Msk             (0x1UL << USB_OTG_GINTSTS_ISOODRP_Pos) /*!< 0x00004000 */
 #define USB_OTG_GINTSTS_ISOODRP                 USB_OTG_GINTSTS_ISOODRP_Msk    /*!< Isochronous OUT packet dropped interrupt */
-#define USB_OTG_GINTSTS_EOPF_Pos                (15U)                          
+#define USB_OTG_GINTSTS_EOPF_Pos                (15U)
 #define USB_OTG_GINTSTS_EOPF_Msk                (0x1UL << USB_OTG_GINTSTS_EOPF_Pos) /*!< 0x00008000 */
 #define USB_OTG_GINTSTS_EOPF                    USB_OTG_GINTSTS_EOPF_Msk       /*!< End of periodic frame interrupt */
-#define USB_OTG_GINTSTS_IEPINT_Pos              (18U)                          
+#define USB_OTG_GINTSTS_IEPINT_Pos              (18U)
 #define USB_OTG_GINTSTS_IEPINT_Msk              (0x1UL << USB_OTG_GINTSTS_IEPINT_Pos) /*!< 0x00040000 */
 #define USB_OTG_GINTSTS_IEPINT                  USB_OTG_GINTSTS_IEPINT_Msk     /*!< IN endpoint interrupt */
-#define USB_OTG_GINTSTS_OEPINT_Pos              (19U)                          
+#define USB_OTG_GINTSTS_OEPINT_Pos              (19U)
 #define USB_OTG_GINTSTS_OEPINT_Msk              (0x1UL << USB_OTG_GINTSTS_OEPINT_Pos) /*!< 0x00080000 */
 #define USB_OTG_GINTSTS_OEPINT                  USB_OTG_GINTSTS_OEPINT_Msk     /*!< OUT endpoint interrupt */
-#define USB_OTG_GINTSTS_IISOIXFR_Pos            (20U)                          
+#define USB_OTG_GINTSTS_IISOIXFR_Pos            (20U)
 #define USB_OTG_GINTSTS_IISOIXFR_Msk            (0x1UL << USB_OTG_GINTSTS_IISOIXFR_Pos) /*!< 0x00100000 */
 #define USB_OTG_GINTSTS_IISOIXFR                USB_OTG_GINTSTS_IISOIXFR_Msk   /*!< Incomplete isochronous IN transfer */
-#define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Pos   (21U)                          
+#define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Pos   (21U)
 #define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Msk   (0x1UL << USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Pos) /*!< 0x00200000 */
 #define USB_OTG_GINTSTS_PXFR_INCOMPISOOUT       USB_OTG_GINTSTS_PXFR_INCOMPISOOUT_Msk /*!< Incomplete periodic transfer */
-#define USB_OTG_GINTSTS_DATAFSUSP_Pos           (22U)                          
+#define USB_OTG_GINTSTS_DATAFSUSP_Pos           (22U)
 #define USB_OTG_GINTSTS_DATAFSUSP_Msk           (0x1UL << USB_OTG_GINTSTS_DATAFSUSP_Pos) /*!< 0x00400000 */
 #define USB_OTG_GINTSTS_DATAFSUSP               USB_OTG_GINTSTS_DATAFSUSP_Msk  /*!< Data fetch suspended */
-#define USB_OTG_GINTSTS_HPRTINT_Pos             (24U)                          
+#define USB_OTG_GINTSTS_HPRTINT_Pos             (24U)
 #define USB_OTG_GINTSTS_HPRTINT_Msk             (0x1UL << USB_OTG_GINTSTS_HPRTINT_Pos) /*!< 0x01000000 */
 #define USB_OTG_GINTSTS_HPRTINT                 USB_OTG_GINTSTS_HPRTINT_Msk    /*!< Host port interrupt */
-#define USB_OTG_GINTSTS_HCINT_Pos               (25U)                          
+#define USB_OTG_GINTSTS_HCINT_Pos               (25U)
 #define USB_OTG_GINTSTS_HCINT_Msk               (0x1UL << USB_OTG_GINTSTS_HCINT_Pos) /*!< 0x02000000 */
 #define USB_OTG_GINTSTS_HCINT                   USB_OTG_GINTSTS_HCINT_Msk      /*!< Host channels interrupt */
-#define USB_OTG_GINTSTS_PTXFE_Pos               (26U)                          
+#define USB_OTG_GINTSTS_PTXFE_Pos               (26U)
 #define USB_OTG_GINTSTS_PTXFE_Msk               (0x1UL << USB_OTG_GINTSTS_PTXFE_Pos) /*!< 0x04000000 */
 #define USB_OTG_GINTSTS_PTXFE                   USB_OTG_GINTSTS_PTXFE_Msk      /*!< Periodic TxFIFO empty */
-#define USB_OTG_GINTSTS_CIDSCHG_Pos             (28U)                          
+#define USB_OTG_GINTSTS_CIDSCHG_Pos             (28U)
 #define USB_OTG_GINTSTS_CIDSCHG_Msk             (0x1UL << USB_OTG_GINTSTS_CIDSCHG_Pos) /*!< 0x10000000 */
 #define USB_OTG_GINTSTS_CIDSCHG                 USB_OTG_GINTSTS_CIDSCHG_Msk    /*!< Connector ID status change */
-#define USB_OTG_GINTSTS_DISCINT_Pos             (29U)                          
+#define USB_OTG_GINTSTS_DISCINT_Pos             (29U)
 #define USB_OTG_GINTSTS_DISCINT_Msk             (0x1UL << USB_OTG_GINTSTS_DISCINT_Pos) /*!< 0x20000000 */
 #define USB_OTG_GINTSTS_DISCINT                 USB_OTG_GINTSTS_DISCINT_Msk    /*!< Disconnect detected interrupt */
-#define USB_OTG_GINTSTS_SRQINT_Pos              (30U)                          
+#define USB_OTG_GINTSTS_SRQINT_Pos              (30U)
 #define USB_OTG_GINTSTS_SRQINT_Msk              (0x1UL << USB_OTG_GINTSTS_SRQINT_Pos) /*!< 0x40000000 */
 #define USB_OTG_GINTSTS_SRQINT                  USB_OTG_GINTSTS_SRQINT_Msk     /*!< Session request/new session detected interrupt */
-#define USB_OTG_GINTSTS_WKUINT_Pos              (31U)                          
+#define USB_OTG_GINTSTS_WKUINT_Pos              (31U)
 #define USB_OTG_GINTSTS_WKUINT_Msk              (0x1UL << USB_OTG_GINTSTS_WKUINT_Pos) /*!< 0x80000000 */
 #define USB_OTG_GINTSTS_WKUINT                  USB_OTG_GINTSTS_WKUINT_Msk     /*!< Resume/remote wakeup detected interrupt */
 
 /********************  Bit definition for USB_OTG_GINTMSK register  ********************/
-#define USB_OTG_GINTMSK_MMISM_Pos               (1U)                           
+#define USB_OTG_GINTMSK_MMISM_Pos               (1U)
 #define USB_OTG_GINTMSK_MMISM_Msk               (0x1UL << USB_OTG_GINTMSK_MMISM_Pos) /*!< 0x00000002 */
 #define USB_OTG_GINTMSK_MMISM                   USB_OTG_GINTMSK_MMISM_Msk      /*!< Mode mismatch interrupt mask */
-#define USB_OTG_GINTMSK_OTGINT_Pos              (2U)                           
+#define USB_OTG_GINTMSK_OTGINT_Pos              (2U)
 #define USB_OTG_GINTMSK_OTGINT_Msk              (0x1UL << USB_OTG_GINTMSK_OTGINT_Pos) /*!< 0x00000004 */
 #define USB_OTG_GINTMSK_OTGINT                  USB_OTG_GINTMSK_OTGINT_Msk     /*!< OTG interrupt mask */
-#define USB_OTG_GINTMSK_SOFM_Pos                (3U)                           
+#define USB_OTG_GINTMSK_SOFM_Pos                (3U)
 #define USB_OTG_GINTMSK_SOFM_Msk                (0x1UL << USB_OTG_GINTMSK_SOFM_Pos) /*!< 0x00000008 */
 #define USB_OTG_GINTMSK_SOFM                    USB_OTG_GINTMSK_SOFM_Msk       /*!< Start of frame mask */
-#define USB_OTG_GINTMSK_RXFLVLM_Pos             (4U)                           
+#define USB_OTG_GINTMSK_RXFLVLM_Pos             (4U)
 #define USB_OTG_GINTMSK_RXFLVLM_Msk             (0x1UL << USB_OTG_GINTMSK_RXFLVLM_Pos) /*!< 0x00000010 */
 #define USB_OTG_GINTMSK_RXFLVLM                 USB_OTG_GINTMSK_RXFLVLM_Msk    /*!< Receive FIFO nonempty mask */
-#define USB_OTG_GINTMSK_NPTXFEM_Pos             (5U)                           
+#define USB_OTG_GINTMSK_NPTXFEM_Pos             (5U)
 #define USB_OTG_GINTMSK_NPTXFEM_Msk             (0x1UL << USB_OTG_GINTMSK_NPTXFEM_Pos) /*!< 0x00000020 */
 #define USB_OTG_GINTMSK_NPTXFEM                 USB_OTG_GINTMSK_NPTXFEM_Msk    /*!< Nonperiodic TxFIFO empty mask */
-#define USB_OTG_GINTMSK_GINAKEFFM_Pos           (6U)                           
+#define USB_OTG_GINTMSK_GINAKEFFM_Pos           (6U)
 #define USB_OTG_GINTMSK_GINAKEFFM_Msk           (0x1UL << USB_OTG_GINTMSK_GINAKEFFM_Pos) /*!< 0x00000040 */
 #define USB_OTG_GINTMSK_GINAKEFFM               USB_OTG_GINTMSK_GINAKEFFM_Msk  /*!< Global nonperiodic IN NAK effective mask */
-#define USB_OTG_GINTMSK_GONAKEFFM_Pos           (7U)                           
+#define USB_OTG_GINTMSK_GONAKEFFM_Pos           (7U)
 #define USB_OTG_GINTMSK_GONAKEFFM_Msk           (0x1UL << USB_OTG_GINTMSK_GONAKEFFM_Pos) /*!< 0x00000080 */
 #define USB_OTG_GINTMSK_GONAKEFFM               USB_OTG_GINTMSK_GONAKEFFM_Msk  /*!< Global OUT NAK effective mask */
-#define USB_OTG_GINTMSK_ESUSPM_Pos              (10U)                          
+#define USB_OTG_GINTMSK_ESUSPM_Pos              (10U)
 #define USB_OTG_GINTMSK_ESUSPM_Msk              (0x1UL << USB_OTG_GINTMSK_ESUSPM_Pos) /*!< 0x00000400 */
 #define USB_OTG_GINTMSK_ESUSPM                  USB_OTG_GINTMSK_ESUSPM_Msk     /*!< Early suspend mask */
-#define USB_OTG_GINTMSK_USBSUSPM_Pos            (11U)                          
+#define USB_OTG_GINTMSK_USBSUSPM_Pos            (11U)
 #define USB_OTG_GINTMSK_USBSUSPM_Msk            (0x1UL << USB_OTG_GINTMSK_USBSUSPM_Pos) /*!< 0x00000800 */
 #define USB_OTG_GINTMSK_USBSUSPM                USB_OTG_GINTMSK_USBSUSPM_Msk   /*!< USB suspend mask */
-#define USB_OTG_GINTMSK_USBRST_Pos              (12U)                          
+#define USB_OTG_GINTMSK_USBRST_Pos              (12U)
 #define USB_OTG_GINTMSK_USBRST_Msk              (0x1UL << USB_OTG_GINTMSK_USBRST_Pos) /*!< 0x00001000 */
 #define USB_OTG_GINTMSK_USBRST                  USB_OTG_GINTMSK_USBRST_Msk     /*!< USB reset mask */
-#define USB_OTG_GINTMSK_ENUMDNEM_Pos            (13U)                          
+#define USB_OTG_GINTMSK_ENUMDNEM_Pos            (13U)
 #define USB_OTG_GINTMSK_ENUMDNEM_Msk            (0x1UL << USB_OTG_GINTMSK_ENUMDNEM_Pos) /*!< 0x00002000 */
 #define USB_OTG_GINTMSK_ENUMDNEM                USB_OTG_GINTMSK_ENUMDNEM_Msk   /*!< Enumeration done mask */
-#define USB_OTG_GINTMSK_ISOODRPM_Pos            (14U)                          
+#define USB_OTG_GINTMSK_ISOODRPM_Pos            (14U)
 #define USB_OTG_GINTMSK_ISOODRPM_Msk            (0x1UL << USB_OTG_GINTMSK_ISOODRPM_Pos) /*!< 0x00004000 */
 #define USB_OTG_GINTMSK_ISOODRPM                USB_OTG_GINTMSK_ISOODRPM_Msk   /*!< Isochronous OUT packet dropped interrupt mask */
-#define USB_OTG_GINTMSK_EOPFM_Pos               (15U)                          
+#define USB_OTG_GINTMSK_EOPFM_Pos               (15U)
 #define USB_OTG_GINTMSK_EOPFM_Msk               (0x1UL << USB_OTG_GINTMSK_EOPFM_Pos) /*!< 0x00008000 */
 #define USB_OTG_GINTMSK_EOPFM                   USB_OTG_GINTMSK_EOPFM_Msk      /*!< End of periodic frame interrupt mask */
-#define USB_OTG_GINTMSK_EPMISM_Pos              (17U)                          
+#define USB_OTG_GINTMSK_EPMISM_Pos              (17U)
 #define USB_OTG_GINTMSK_EPMISM_Msk              (0x1UL << USB_OTG_GINTMSK_EPMISM_Pos) /*!< 0x00020000 */
 #define USB_OTG_GINTMSK_EPMISM                  USB_OTG_GINTMSK_EPMISM_Msk     /*!< Endpoint mismatch interrupt mask */
-#define USB_OTG_GINTMSK_IEPINT_Pos              (18U)                          
+#define USB_OTG_GINTMSK_IEPINT_Pos              (18U)
 #define USB_OTG_GINTMSK_IEPINT_Msk              (0x1UL << USB_OTG_GINTMSK_IEPINT_Pos) /*!< 0x00040000 */
 #define USB_OTG_GINTMSK_IEPINT                  USB_OTG_GINTMSK_IEPINT_Msk     /*!< IN endpoints interrupt mask */
-#define USB_OTG_GINTMSK_OEPINT_Pos              (19U)                          
+#define USB_OTG_GINTMSK_OEPINT_Pos              (19U)
 #define USB_OTG_GINTMSK_OEPINT_Msk              (0x1UL << USB_OTG_GINTMSK_OEPINT_Pos) /*!< 0x00080000 */
 #define USB_OTG_GINTMSK_OEPINT                  USB_OTG_GINTMSK_OEPINT_Msk     /*!< OUT endpoints interrupt mask */
-#define USB_OTG_GINTMSK_IISOIXFRM_Pos           (20U)                          
+#define USB_OTG_GINTMSK_IISOIXFRM_Pos           (20U)
 #define USB_OTG_GINTMSK_IISOIXFRM_Msk           (0x1UL << USB_OTG_GINTMSK_IISOIXFRM_Pos) /*!< 0x00100000 */
 #define USB_OTG_GINTMSK_IISOIXFRM               USB_OTG_GINTMSK_IISOIXFRM_Msk  /*!< Incomplete isochronous IN transfer mask */
-#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Pos     (21U)                          
+#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Pos     (21U)
 #define USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Msk     (0x1UL << USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Pos) /*!< 0x00200000 */
 #define USB_OTG_GINTMSK_PXFRM_IISOOXFRM         USB_OTG_GINTMSK_PXFRM_IISOOXFRM_Msk /*!< Incomplete periodic transfer mask */
-#define USB_OTG_GINTMSK_FSUSPM_Pos              (22U)                          
+#define USB_OTG_GINTMSK_FSUSPM_Pos              (22U)
 #define USB_OTG_GINTMSK_FSUSPM_Msk              (0x1UL << USB_OTG_GINTMSK_FSUSPM_Pos) /*!< 0x00400000 */
 #define USB_OTG_GINTMSK_FSUSPM                  USB_OTG_GINTMSK_FSUSPM_Msk     /*!< Data fetch suspended mask */
-#define USB_OTG_GINTMSK_PRTIM_Pos               (24U)                          
+#define USB_OTG_GINTMSK_PRTIM_Pos               (24U)
 #define USB_OTG_GINTMSK_PRTIM_Msk               (0x1UL << USB_OTG_GINTMSK_PRTIM_Pos) /*!< 0x01000000 */
 #define USB_OTG_GINTMSK_PRTIM                   USB_OTG_GINTMSK_PRTIM_Msk      /*!< Host port interrupt mask */
-#define USB_OTG_GINTMSK_HCIM_Pos                (25U)                          
+#define USB_OTG_GINTMSK_HCIM_Pos                (25U)
 #define USB_OTG_GINTMSK_HCIM_Msk                (0x1UL << USB_OTG_GINTMSK_HCIM_Pos) /*!< 0x02000000 */
 #define USB_OTG_GINTMSK_HCIM                    USB_OTG_GINTMSK_HCIM_Msk       /*!< Host channels interrupt mask */
-#define USB_OTG_GINTMSK_PTXFEM_Pos              (26U)                          
+#define USB_OTG_GINTMSK_PTXFEM_Pos              (26U)
 #define USB_OTG_GINTMSK_PTXFEM_Msk              (0x1UL << USB_OTG_GINTMSK_PTXFEM_Pos) /*!< 0x04000000 */
 #define USB_OTG_GINTMSK_PTXFEM                  USB_OTG_GINTMSK_PTXFEM_Msk     /*!< Periodic TxFIFO empty mask */
-#define USB_OTG_GINTMSK_CIDSCHGM_Pos            (28U)                          
+#define USB_OTG_GINTMSK_CIDSCHGM_Pos            (28U)
 #define USB_OTG_GINTMSK_CIDSCHGM_Msk            (0x1UL << USB_OTG_GINTMSK_CIDSCHGM_Pos) /*!< 0x10000000 */
 #define USB_OTG_GINTMSK_CIDSCHGM                USB_OTG_GINTMSK_CIDSCHGM_Msk   /*!< Connector ID status change mask */
-#define USB_OTG_GINTMSK_DISCINT_Pos             (29U)                          
+#define USB_OTG_GINTMSK_DISCINT_Pos             (29U)
 #define USB_OTG_GINTMSK_DISCINT_Msk             (0x1UL << USB_OTG_GINTMSK_DISCINT_Pos) /*!< 0x20000000 */
 #define USB_OTG_GINTMSK_DISCINT                 USB_OTG_GINTMSK_DISCINT_Msk    /*!< Disconnect detected interrupt mask */
-#define USB_OTG_GINTMSK_SRQIM_Pos               (30U)                          
+#define USB_OTG_GINTMSK_SRQIM_Pos               (30U)
 #define USB_OTG_GINTMSK_SRQIM_Msk               (0x1UL << USB_OTG_GINTMSK_SRQIM_Pos) /*!< 0x40000000 */
 #define USB_OTG_GINTMSK_SRQIM                   USB_OTG_GINTMSK_SRQIM_Msk      /*!< Session request/new session detected interrupt mask */
-#define USB_OTG_GINTMSK_WUIM_Pos                (31U)                          
+#define USB_OTG_GINTMSK_WUIM_Pos                (31U)
 #define USB_OTG_GINTMSK_WUIM_Msk                (0x1UL << USB_OTG_GINTMSK_WUIM_Pos) /*!< 0x80000000 */
 #define USB_OTG_GINTMSK_WUIM                    USB_OTG_GINTMSK_WUIM_Msk       /*!< Resume/remote wakeup detected interrupt mask */
 
 /********************  Bit definition for USB_OTG_DAINT register  ********************/
-#define USB_OTG_DAINT_IEPINT_Pos                (0U)                           
+#define USB_OTG_DAINT_IEPINT_Pos                (0U)
 #define USB_OTG_DAINT_IEPINT_Msk                (0xFFFFUL << USB_OTG_DAINT_IEPINT_Pos) /*!< 0x0000FFFF */
 #define USB_OTG_DAINT_IEPINT                    USB_OTG_DAINT_IEPINT_Msk       /*!< IN endpoint interrupt bits */
-#define USB_OTG_DAINT_OEPINT_Pos                (16U)                          
+#define USB_OTG_DAINT_OEPINT_Pos                (16U)
 #define USB_OTG_DAINT_OEPINT_Msk                (0xFFFFUL << USB_OTG_DAINT_OEPINT_Pos) /*!< 0xFFFF0000 */
 #define USB_OTG_DAINT_OEPINT                    USB_OTG_DAINT_OEPINT_Msk       /*!< OUT endpoint interrupt bits */
 
 /********************  Bit definition for USB_OTG_HAINTMSK register  ********************/
-#define USB_OTG_HAINTMSK_HAINTM_Pos             (0U)                           
+#define USB_OTG_HAINTMSK_HAINTM_Pos             (0U)
 #define USB_OTG_HAINTMSK_HAINTM_Msk             (0xFFFFUL << USB_OTG_HAINTMSK_HAINTM_Pos) /*!< 0x0000FFFF */
 #define USB_OTG_HAINTMSK_HAINTM                 USB_OTG_HAINTMSK_HAINTM_Msk    /*!< Channel interrupt mask */
 
 /********************  Bit definition for USB_OTG_GRXSTSP register  ********************/
-#define USB_OTG_GRXSTSP_EPNUM_Pos               (0U)                           
+#define USB_OTG_GRXSTSP_EPNUM_Pos               (0U)
 #define USB_OTG_GRXSTSP_EPNUM_Msk               (0xFUL << USB_OTG_GRXSTSP_EPNUM_Pos) /*!< 0x0000000F */
 #define USB_OTG_GRXSTSP_EPNUM                   USB_OTG_GRXSTSP_EPNUM_Msk      /*!< IN EP interrupt mask bits */
-#define USB_OTG_GRXSTSP_BCNT_Pos                (4U)                           
+#define USB_OTG_GRXSTSP_BCNT_Pos                (4U)
 #define USB_OTG_GRXSTSP_BCNT_Msk                (0x7FFUL << USB_OTG_GRXSTSP_BCNT_Pos) /*!< 0x00007FF0 */
 #define USB_OTG_GRXSTSP_BCNT                    USB_OTG_GRXSTSP_BCNT_Msk       /*!< OUT EP interrupt mask bits */
-#define USB_OTG_GRXSTSP_DPID_Pos                (15U)                          
+#define USB_OTG_GRXSTSP_DPID_Pos                (15U)
 #define USB_OTG_GRXSTSP_DPID_Msk                (0x3UL << USB_OTG_GRXSTSP_DPID_Pos) /*!< 0x00018000 */
 #define USB_OTG_GRXSTSP_DPID                    USB_OTG_GRXSTSP_DPID_Msk       /*!< OUT EP interrupt mask bits */
-#define USB_OTG_GRXSTSP_PKTSTS_Pos              (17U)                          
+#define USB_OTG_GRXSTSP_PKTSTS_Pos              (17U)
 #define USB_OTG_GRXSTSP_PKTSTS_Msk              (0xFUL << USB_OTG_GRXSTSP_PKTSTS_Pos) /*!< 0x001E0000 */
 #define USB_OTG_GRXSTSP_PKTSTS                  USB_OTG_GRXSTSP_PKTSTS_Msk     /*!< OUT EP interrupt mask bits */
 
 /********************  Bit definition for USB_OTG_DAINTMSK register  ********************/
-#define USB_OTG_DAINTMSK_IEPM_Pos               (0U)                           
+#define USB_OTG_DAINTMSK_IEPM_Pos               (0U)
 #define USB_OTG_DAINTMSK_IEPM_Msk               (0xFFFFUL << USB_OTG_DAINTMSK_IEPM_Pos) /*!< 0x0000FFFF */
 #define USB_OTG_DAINTMSK_IEPM                   USB_OTG_DAINTMSK_IEPM_Msk      /*!< IN EP interrupt mask bits */
-#define USB_OTG_DAINTMSK_OEPM_Pos               (16U)                          
+#define USB_OTG_DAINTMSK_OEPM_Pos               (16U)
 #define USB_OTG_DAINTMSK_OEPM_Msk               (0xFFFFUL << USB_OTG_DAINTMSK_OEPM_Pos) /*!< 0xFFFF0000 */
 #define USB_OTG_DAINTMSK_OEPM                   USB_OTG_DAINTMSK_OEPM_Msk      /*!< OUT EP interrupt mask bits */
 
 /********************  Bit definition for USB_OTG_GRXFSIZ register  ********************/
-#define USB_OTG_GRXFSIZ_RXFD_Pos                (0U)                           
+#define USB_OTG_GRXFSIZ_RXFD_Pos                (0U)
 #define USB_OTG_GRXFSIZ_RXFD_Msk                (0xFFFFUL << USB_OTG_GRXFSIZ_RXFD_Pos) /*!< 0x0000FFFF */
 #define USB_OTG_GRXFSIZ_RXFD                    USB_OTG_GRXFSIZ_RXFD_Msk       /*!< RxFIFO depth */
 
 /********************  Bit definition for USB_OTG_DVBUSDIS register  ********************/
-#define USB_OTG_DVBUSDIS_VBUSDT_Pos             (0U)                           
+#define USB_OTG_DVBUSDIS_VBUSDT_Pos             (0U)
 #define USB_OTG_DVBUSDIS_VBUSDT_Msk             (0xFFFFUL << USB_OTG_DVBUSDIS_VBUSDT_Pos) /*!< 0x0000FFFF */
 #define USB_OTG_DVBUSDIS_VBUSDT                 USB_OTG_DVBUSDIS_VBUSDT_Msk    /*!< Device VBUS discharge time */
 
 /********************  Bit definition for OTG register  ********************/
-#define USB_OTG_NPTXFSA_Pos                     (0U)                           
+#define USB_OTG_NPTXFSA_Pos                     (0U)
 #define USB_OTG_NPTXFSA_Msk                     (0xFFFFUL << USB_OTG_NPTXFSA_Pos) /*!< 0x0000FFFF */
 #define USB_OTG_NPTXFSA                         USB_OTG_NPTXFSA_Msk            /*!< Nonperiodic transmit RAM start address */
-#define USB_OTG_NPTXFD_Pos                      (16U)                          
+#define USB_OTG_NPTXFD_Pos                      (16U)
 #define USB_OTG_NPTXFD_Msk                      (0xFFFFUL << USB_OTG_NPTXFD_Pos) /*!< 0xFFFF0000 */
 #define USB_OTG_NPTXFD                          USB_OTG_NPTXFD_Msk             /*!< Nonperiodic TxFIFO depth */
-#define USB_OTG_TX0FSA_Pos                      (0U)                           
+#define USB_OTG_TX0FSA_Pos                      (0U)
 #define USB_OTG_TX0FSA_Msk                      (0xFFFFUL << USB_OTG_TX0FSA_Pos) /*!< 0x0000FFFF */
 #define USB_OTG_TX0FSA                          USB_OTG_TX0FSA_Msk             /*!< Endpoint 0 transmit RAM start address */
-#define USB_OTG_TX0FD_Pos                       (16U)                          
+#define USB_OTG_TX0FD_Pos                       (16U)
 #define USB_OTG_TX0FD_Msk                       (0xFFFFUL << USB_OTG_TX0FD_Pos) /*!< 0xFFFF0000 */
 #define USB_OTG_TX0FD                           USB_OTG_TX0FD_Msk              /*!< Endpoint 0 TxFIFO depth */
 
 /********************  Bit definition for USB_OTG_DVBUSPULSE register  ********************/
-#define USB_OTG_DVBUSPULSE_DVBUSP_Pos           (0U)                           
+#define USB_OTG_DVBUSPULSE_DVBUSP_Pos           (0U)
 #define USB_OTG_DVBUSPULSE_DVBUSP_Msk           (0xFFFUL << USB_OTG_DVBUSPULSE_DVBUSP_Pos) /*!< 0x00000FFF */
 #define USB_OTG_DVBUSPULSE_DVBUSP               USB_OTG_DVBUSPULSE_DVBUSP_Msk  /*!< Device VBUS pulsing time */
 
 /********************  Bit definition for USB_OTG_GNPTXSTS register  ********************/
-#define USB_OTG_GNPTXSTS_NPTXFSAV_Pos           (0U)                           
+#define USB_OTG_GNPTXSTS_NPTXFSAV_Pos           (0U)
 #define USB_OTG_GNPTXSTS_NPTXFSAV_Msk           (0xFFFFUL << USB_OTG_GNPTXSTS_NPTXFSAV_Pos) /*!< 0x0000FFFF */
 #define USB_OTG_GNPTXSTS_NPTXFSAV               USB_OTG_GNPTXSTS_NPTXFSAV_Msk  /*!< Nonperiodic TxFIFO space available */
 
-#define USB_OTG_GNPTXSTS_NPTQXSAV_Pos           (16U)                          
+#define USB_OTG_GNPTXSTS_NPTQXSAV_Pos           (16U)
 #define USB_OTG_GNPTXSTS_NPTQXSAV_Msk           (0xFFUL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00FF0000 */
 #define USB_OTG_GNPTXSTS_NPTQXSAV               USB_OTG_GNPTXSTS_NPTQXSAV_Msk  /*!< Nonperiodic transmit request queue space available */
 #define USB_OTG_GNPTXSTS_NPTQXSAV_0             (0x01UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00010000 */
@@ -806,7 +806,7 @@ typedef struct
 #define USB_OTG_GNPTXSTS_NPTQXSAV_6             (0x40UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00400000 */
 #define USB_OTG_GNPTXSTS_NPTQXSAV_7             (0x80UL << USB_OTG_GNPTXSTS_NPTQXSAV_Pos) /*!< 0x00800000 */
 
-#define USB_OTG_GNPTXSTS_NPTXQTOP_Pos           (24U)                          
+#define USB_OTG_GNPTXSTS_NPTXQTOP_Pos           (24U)
 #define USB_OTG_GNPTXSTS_NPTXQTOP_Msk           (0x7FUL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x7F000000 */
 #define USB_OTG_GNPTXSTS_NPTXQTOP               USB_OTG_GNPTXSTS_NPTXQTOP_Msk  /*!< Top of the nonperiodic transmit request queue */
 #define USB_OTG_GNPTXSTS_NPTXQTOP_0             (0x01UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x01000000 */
@@ -818,14 +818,14 @@ typedef struct
 #define USB_OTG_GNPTXSTS_NPTXQTOP_6             (0x40UL << USB_OTG_GNPTXSTS_NPTXQTOP_Pos) /*!< 0x40000000 */
 
 /********************  Bit definition for USB_OTG_DTHRCTL register  ********************/
-#define USB_OTG_DTHRCTL_NONISOTHREN_Pos         (0U)                           
+#define USB_OTG_DTHRCTL_NONISOTHREN_Pos         (0U)
 #define USB_OTG_DTHRCTL_NONISOTHREN_Msk         (0x1UL << USB_OTG_DTHRCTL_NONISOTHREN_Pos) /*!< 0x00000001 */
 #define USB_OTG_DTHRCTL_NONISOTHREN             USB_OTG_DTHRCTL_NONISOTHREN_Msk /*!< Nonisochronous IN endpoints threshold enable */
-#define USB_OTG_DTHRCTL_ISOTHREN_Pos            (1U)                           
+#define USB_OTG_DTHRCTL_ISOTHREN_Pos            (1U)
 #define USB_OTG_DTHRCTL_ISOTHREN_Msk            (0x1UL << USB_OTG_DTHRCTL_ISOTHREN_Pos) /*!< 0x00000002 */
 #define USB_OTG_DTHRCTL_ISOTHREN                USB_OTG_DTHRCTL_ISOTHREN_Msk   /*!< ISO IN endpoint threshold enable */
 
-#define USB_OTG_DTHRCTL_TXTHRLEN_Pos            (2U)                           
+#define USB_OTG_DTHRCTL_TXTHRLEN_Pos            (2U)
 #define USB_OTG_DTHRCTL_TXTHRLEN_Msk            (0x1FFUL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x000007FC */
 #define USB_OTG_DTHRCTL_TXTHRLEN                USB_OTG_DTHRCTL_TXTHRLEN_Msk   /*!< Transmit threshold length */
 #define USB_OTG_DTHRCTL_TXTHRLEN_0              (0x001UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000004 */
@@ -837,11 +837,11 @@ typedef struct
 #define USB_OTG_DTHRCTL_TXTHRLEN_6              (0x040UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000100 */
 #define USB_OTG_DTHRCTL_TXTHRLEN_7              (0x080UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000200 */
 #define USB_OTG_DTHRCTL_TXTHRLEN_8              (0x100UL << USB_OTG_DTHRCTL_TXTHRLEN_Pos) /*!< 0x00000400 */
-#define USB_OTG_DTHRCTL_RXTHREN_Pos             (16U)                          
+#define USB_OTG_DTHRCTL_RXTHREN_Pos             (16U)
 #define USB_OTG_DTHRCTL_RXTHREN_Msk             (0x1UL << USB_OTG_DTHRCTL_RXTHREN_Pos) /*!< 0x00010000 */
 #define USB_OTG_DTHRCTL_RXTHREN                 USB_OTG_DTHRCTL_RXTHREN_Msk    /*!< Receive threshold enable */
 
-#define USB_OTG_DTHRCTL_RXTHRLEN_Pos            (17U)                          
+#define USB_OTG_DTHRCTL_RXTHRLEN_Pos            (17U)
 #define USB_OTG_DTHRCTL_RXTHRLEN_Msk            (0x1FFUL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x03FE0000 */
 #define USB_OTG_DTHRCTL_RXTHRLEN                USB_OTG_DTHRCTL_RXTHRLEN_Msk   /*!< Receive threshold length */
 #define USB_OTG_DTHRCTL_RXTHRLEN_0              (0x001UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00020000 */
@@ -853,118 +853,118 @@ typedef struct
 #define USB_OTG_DTHRCTL_RXTHRLEN_6              (0x040UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x00800000 */
 #define USB_OTG_DTHRCTL_RXTHRLEN_7              (0x080UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x01000000 */
 #define USB_OTG_DTHRCTL_RXTHRLEN_8              (0x100UL << USB_OTG_DTHRCTL_RXTHRLEN_Pos) /*!< 0x02000000 */
-#define USB_OTG_DTHRCTL_ARPEN_Pos               (27U)                          
+#define USB_OTG_DTHRCTL_ARPEN_Pos               (27U)
 #define USB_OTG_DTHRCTL_ARPEN_Msk               (0x1UL << USB_OTG_DTHRCTL_ARPEN_Pos) /*!< 0x08000000 */
 #define USB_OTG_DTHRCTL_ARPEN                   USB_OTG_DTHRCTL_ARPEN_Msk      /*!< Arbiter parking enable */
 
 /********************  Bit definition for USB_OTG_DIEPEMPMSK register  ********************/
-#define USB_OTG_DIEPEMPMSK_INEPTXFEM_Pos        (0U)                           
+#define USB_OTG_DIEPEMPMSK_INEPTXFEM_Pos        (0U)
 #define USB_OTG_DIEPEMPMSK_INEPTXFEM_Msk        (0xFFFFUL << USB_OTG_DIEPEMPMSK_INEPTXFEM_Pos) /*!< 0x0000FFFF */
 #define USB_OTG_DIEPEMPMSK_INEPTXFEM            USB_OTG_DIEPEMPMSK_INEPTXFEM_Msk /*!< IN EP Tx FIFO empty interrupt mask bits */
 
 /********************  Bit definition for USB_OTG_DEACHINT register  ********************/
-#define USB_OTG_DEACHINT_IEP1INT_Pos            (1U)                           
+#define USB_OTG_DEACHINT_IEP1INT_Pos            (1U)
 #define USB_OTG_DEACHINT_IEP1INT_Msk            (0x1UL << USB_OTG_DEACHINT_IEP1INT_Pos) /*!< 0x00000002 */
 #define USB_OTG_DEACHINT_IEP1INT                USB_OTG_DEACHINT_IEP1INT_Msk   /*!< IN endpoint 1interrupt bit */
-#define USB_OTG_DEACHINT_OEP1INT_Pos            (17U)                          
+#define USB_OTG_DEACHINT_OEP1INT_Pos            (17U)
 #define USB_OTG_DEACHINT_OEP1INT_Msk            (0x1UL << USB_OTG_DEACHINT_OEP1INT_Pos) /*!< 0x00020000 */
 #define USB_OTG_DEACHINT_OEP1INT                USB_OTG_DEACHINT_OEP1INT_Msk   /*!< OUT endpoint 1 interrupt bit */
 
 /********************  Bit definition for USB_OTG_GCCFG register  ********************/
-#define USB_OTG_GCCFG_PWRDWN_Pos                (16U)                          
+#define USB_OTG_GCCFG_PWRDWN_Pos                (16U)
 #define USB_OTG_GCCFG_PWRDWN_Msk                (0x1UL << USB_OTG_GCCFG_PWRDWN_Pos) /*!< 0x00010000 */
 #define USB_OTG_GCCFG_PWRDWN                    USB_OTG_GCCFG_PWRDWN_Msk       /*!< Power down */
-#define USB_OTG_GCCFG_VBUSASEN_Pos              (18U)                          
+#define USB_OTG_GCCFG_VBUSASEN_Pos              (18U)
 #define USB_OTG_GCCFG_VBUSASEN_Msk              (0x1UL << USB_OTG_GCCFG_VBUSASEN_Pos) /*!< 0x00040000 */
 #define USB_OTG_GCCFG_VBUSASEN                  USB_OTG_GCCFG_VBUSASEN_Msk     /*!< Enable the VBUS sensing device */
-#define USB_OTG_GCCFG_VBUSBSEN_Pos              (19U)                          
+#define USB_OTG_GCCFG_VBUSBSEN_Pos              (19U)
 #define USB_OTG_GCCFG_VBUSBSEN_Msk              (0x1UL << USB_OTG_GCCFG_VBUSBSEN_Pos) /*!< 0x00080000 */
 #define USB_OTG_GCCFG_VBUSBSEN                  USB_OTG_GCCFG_VBUSBSEN_Msk     /*!< Enable the VBUS sensing device */
-#define USB_OTG_GCCFG_SOFOUTEN_Pos              (20U)                          
+#define USB_OTG_GCCFG_SOFOUTEN_Pos              (20U)
 #define USB_OTG_GCCFG_SOFOUTEN_Msk              (0x1UL << USB_OTG_GCCFG_SOFOUTEN_Pos) /*!< 0x00100000 */
 #define USB_OTG_GCCFG_SOFOUTEN                  USB_OTG_GCCFG_SOFOUTEN_Msk     /*!< SOF output enable */
 
 /********************  Bit definition for USB_OTG_DEACHINTMSK register  ********************/
-#define USB_OTG_DEACHINTMSK_IEP1INTM_Pos        (1U)                           
+#define USB_OTG_DEACHINTMSK_IEP1INTM_Pos        (1U)
 #define USB_OTG_DEACHINTMSK_IEP1INTM_Msk        (0x1UL << USB_OTG_DEACHINTMSK_IEP1INTM_Pos) /*!< 0x00000002 */
 #define USB_OTG_DEACHINTMSK_IEP1INTM            USB_OTG_DEACHINTMSK_IEP1INTM_Msk /*!< IN Endpoint 1 interrupt mask bit */
-#define USB_OTG_DEACHINTMSK_OEP1INTM_Pos        (17U)                          
+#define USB_OTG_DEACHINTMSK_OEP1INTM_Pos        (17U)
 #define USB_OTG_DEACHINTMSK_OEP1INTM_Msk        (0x1UL << USB_OTG_DEACHINTMSK_OEP1INTM_Pos) /*!< 0x00020000 */
 #define USB_OTG_DEACHINTMSK_OEP1INTM            USB_OTG_DEACHINTMSK_OEP1INTM_Msk /*!< OUT Endpoint 1 interrupt mask bit */
 
 /********************  Bit definition for USB_OTG_CID register  ********************/
-#define USB_OTG_CID_PRODUCT_ID_Pos              (0U)                           
+#define USB_OTG_CID_PRODUCT_ID_Pos              (0U)
 #define USB_OTG_CID_PRODUCT_ID_Msk              (0xFFFFFFFFUL << USB_OTG_CID_PRODUCT_ID_Pos) /*!< 0xFFFFFFFF */
 #define USB_OTG_CID_PRODUCT_ID                  USB_OTG_CID_PRODUCT_ID_Msk     /*!< Product ID field */
 
 /********************  Bit definition for USB_OTG_DIEPEACHMSK1 register  ********************/
-#define USB_OTG_DIEPEACHMSK1_XFRCM_Pos          (0U)                           
+#define USB_OTG_DIEPEACHMSK1_XFRCM_Pos          (0U)
 #define USB_OTG_DIEPEACHMSK1_XFRCM_Msk          (0x1UL << USB_OTG_DIEPEACHMSK1_XFRCM_Pos) /*!< 0x00000001 */
 #define USB_OTG_DIEPEACHMSK1_XFRCM              USB_OTG_DIEPEACHMSK1_XFRCM_Msk /*!< Transfer completed interrupt mask */
-#define USB_OTG_DIEPEACHMSK1_EPDM_Pos           (1U)                           
+#define USB_OTG_DIEPEACHMSK1_EPDM_Pos           (1U)
 #define USB_OTG_DIEPEACHMSK1_EPDM_Msk           (0x1UL << USB_OTG_DIEPEACHMSK1_EPDM_Pos) /*!< 0x00000002 */
 #define USB_OTG_DIEPEACHMSK1_EPDM               USB_OTG_DIEPEACHMSK1_EPDM_Msk  /*!< Endpoint disabled interrupt mask */
-#define USB_OTG_DIEPEACHMSK1_TOM_Pos            (3U)                           
+#define USB_OTG_DIEPEACHMSK1_TOM_Pos            (3U)
 #define USB_OTG_DIEPEACHMSK1_TOM_Msk            (0x1UL << USB_OTG_DIEPEACHMSK1_TOM_Pos) /*!< 0x00000008 */
 #define USB_OTG_DIEPEACHMSK1_TOM                USB_OTG_DIEPEACHMSK1_TOM_Msk   /*!< Timeout condition mask (nonisochronous endpoints) */
-#define USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Pos      (4U)                           
+#define USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Pos      (4U)
 #define USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Msk      (0x1UL << USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Pos) /*!< 0x00000010 */
 #define USB_OTG_DIEPEACHMSK1_ITTXFEMSK          USB_OTG_DIEPEACHMSK1_ITTXFEMSK_Msk /*!< IN token received when TxFIFO empty mask */
-#define USB_OTG_DIEPEACHMSK1_INEPNMM_Pos        (5U)                           
+#define USB_OTG_DIEPEACHMSK1_INEPNMM_Pos        (5U)
 #define USB_OTG_DIEPEACHMSK1_INEPNMM_Msk        (0x1UL << USB_OTG_DIEPEACHMSK1_INEPNMM_Pos) /*!< 0x00000020 */
 #define USB_OTG_DIEPEACHMSK1_INEPNMM            USB_OTG_DIEPEACHMSK1_INEPNMM_Msk /*!< IN token received with EP mismatch mask */
-#define USB_OTG_DIEPEACHMSK1_INEPNEM_Pos        (6U)                           
+#define USB_OTG_DIEPEACHMSK1_INEPNEM_Pos        (6U)
 #define USB_OTG_DIEPEACHMSK1_INEPNEM_Msk        (0x1UL << USB_OTG_DIEPEACHMSK1_INEPNEM_Pos) /*!< 0x00000040 */
 #define USB_OTG_DIEPEACHMSK1_INEPNEM            USB_OTG_DIEPEACHMSK1_INEPNEM_Msk /*!< IN endpoint NAK effective mask */
-#define USB_OTG_DIEPEACHMSK1_TXFURM_Pos         (8U)                           
+#define USB_OTG_DIEPEACHMSK1_TXFURM_Pos         (8U)
 #define USB_OTG_DIEPEACHMSK1_TXFURM_Msk         (0x1UL << USB_OTG_DIEPEACHMSK1_TXFURM_Pos) /*!< 0x00000100 */
 #define USB_OTG_DIEPEACHMSK1_TXFURM             USB_OTG_DIEPEACHMSK1_TXFURM_Msk /*!< FIFO underrun mask */
-#define USB_OTG_DIEPEACHMSK1_BIM_Pos            (9U)                           
+#define USB_OTG_DIEPEACHMSK1_BIM_Pos            (9U)
 #define USB_OTG_DIEPEACHMSK1_BIM_Msk            (0x1UL << USB_OTG_DIEPEACHMSK1_BIM_Pos) /*!< 0x00000200 */
 #define USB_OTG_DIEPEACHMSK1_BIM                USB_OTG_DIEPEACHMSK1_BIM_Msk   /*!< BNA interrupt mask */
-#define USB_OTG_DIEPEACHMSK1_NAKM_Pos           (13U)                          
+#define USB_OTG_DIEPEACHMSK1_NAKM_Pos           (13U)
 #define USB_OTG_DIEPEACHMSK1_NAKM_Msk           (0x1UL << USB_OTG_DIEPEACHMSK1_NAKM_Pos) /*!< 0x00002000 */
 #define USB_OTG_DIEPEACHMSK1_NAKM               USB_OTG_DIEPEACHMSK1_NAKM_Msk  /*!< NAK interrupt mask */
 
 /********************  Bit definition for USB_OTG_HPRT register  ********************/
-#define USB_OTG_HPRT_PCSTS_Pos                  (0U)                           
+#define USB_OTG_HPRT_PCSTS_Pos                  (0U)
 #define USB_OTG_HPRT_PCSTS_Msk                  (0x1UL << USB_OTG_HPRT_PCSTS_Pos) /*!< 0x00000001 */
 #define USB_OTG_HPRT_PCSTS                      USB_OTG_HPRT_PCSTS_Msk         /*!< Port connect status */
-#define USB_OTG_HPRT_PCDET_Pos                  (1U)                           
+#define USB_OTG_HPRT_PCDET_Pos                  (1U)
 #define USB_OTG_HPRT_PCDET_Msk                  (0x1UL << USB_OTG_HPRT_PCDET_Pos) /*!< 0x00000002 */
 #define USB_OTG_HPRT_PCDET                      USB_OTG_HPRT_PCDET_Msk         /*!< Port connect detected */
-#define USB_OTG_HPRT_PENA_Pos                   (2U)                           
+#define USB_OTG_HPRT_PENA_Pos                   (2U)
 #define USB_OTG_HPRT_PENA_Msk                   (0x1UL << USB_OTG_HPRT_PENA_Pos) /*!< 0x00000004 */
 #define USB_OTG_HPRT_PENA                       USB_OTG_HPRT_PENA_Msk          /*!< Port enable */
-#define USB_OTG_HPRT_PENCHNG_Pos                (3U)                           
+#define USB_OTG_HPRT_PENCHNG_Pos                (3U)
 #define USB_OTG_HPRT_PENCHNG_Msk                (0x1UL << USB_OTG_HPRT_PENCHNG_Pos) /*!< 0x00000008 */
 #define USB_OTG_HPRT_PENCHNG                    USB_OTG_HPRT_PENCHNG_Msk       /*!< Port enable/disable change */
-#define USB_OTG_HPRT_POCA_Pos                   (4U)                           
+#define USB_OTG_HPRT_POCA_Pos                   (4U)
 #define USB_OTG_HPRT_POCA_Msk                   (0x1UL << USB_OTG_HPRT_POCA_Pos) /*!< 0x00000010 */
 #define USB_OTG_HPRT_POCA                       USB_OTG_HPRT_POCA_Msk          /*!< Port overcurrent active */
-#define USB_OTG_HPRT_POCCHNG_Pos                (5U)                           
+#define USB_OTG_HPRT_POCCHNG_Pos                (5U)
 #define USB_OTG_HPRT_POCCHNG_Msk                (0x1UL << USB_OTG_HPRT_POCCHNG_Pos) /*!< 0x00000020 */
 #define USB_OTG_HPRT_POCCHNG                    USB_OTG_HPRT_POCCHNG_Msk       /*!< Port overcurrent change */
-#define USB_OTG_HPRT_PRES_Pos                   (6U)                           
+#define USB_OTG_HPRT_PRES_Pos                   (6U)
 #define USB_OTG_HPRT_PRES_Msk                   (0x1UL << USB_OTG_HPRT_PRES_Pos) /*!< 0x00000040 */
 #define USB_OTG_HPRT_PRES                       USB_OTG_HPRT_PRES_Msk          /*!< Port resume */
-#define USB_OTG_HPRT_PSUSP_Pos                  (7U)                           
+#define USB_OTG_HPRT_PSUSP_Pos                  (7U)
 #define USB_OTG_HPRT_PSUSP_Msk                  (0x1UL << USB_OTG_HPRT_PSUSP_Pos) /*!< 0x00000080 */
 #define USB_OTG_HPRT_PSUSP                      USB_OTG_HPRT_PSUSP_Msk         /*!< Port suspend */
-#define USB_OTG_HPRT_PRST_Pos                   (8U)                           
+#define USB_OTG_HPRT_PRST_Pos                   (8U)
 #define USB_OTG_HPRT_PRST_Msk                   (0x1UL << USB_OTG_HPRT_PRST_Pos) /*!< 0x00000100 */
 #define USB_OTG_HPRT_PRST                       USB_OTG_HPRT_PRST_Msk          /*!< Port reset */
 
-#define USB_OTG_HPRT_PLSTS_Pos                  (10U)                          
+#define USB_OTG_HPRT_PLSTS_Pos                  (10U)
 #define USB_OTG_HPRT_PLSTS_Msk                  (0x3UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000C00 */
 #define USB_OTG_HPRT_PLSTS                      USB_OTG_HPRT_PLSTS_Msk         /*!< Port line status */
 #define USB_OTG_HPRT_PLSTS_0                    (0x1UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000400 */
 #define USB_OTG_HPRT_PLSTS_1                    (0x2UL << USB_OTG_HPRT_PLSTS_Pos) /*!< 0x00000800 */
-#define USB_OTG_HPRT_PPWR_Pos                   (12U)                          
+#define USB_OTG_HPRT_PPWR_Pos                   (12U)
 #define USB_OTG_HPRT_PPWR_Msk                   (0x1UL << USB_OTG_HPRT_PPWR_Pos) /*!< 0x00001000 */
 #define USB_OTG_HPRT_PPWR                       USB_OTG_HPRT_PPWR_Msk          /*!< Port power */
 
-#define USB_OTG_HPRT_PTCTL_Pos                  (13U)                          
+#define USB_OTG_HPRT_PTCTL_Pos                  (13U)
 #define USB_OTG_HPRT_PTCTL_Msk                  (0xFUL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x0001E000 */
 #define USB_OTG_HPRT_PTCTL                      USB_OTG_HPRT_PTCTL_Msk         /*!< Port test control */
 #define USB_OTG_HPRT_PTCTL_0                    (0x1UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00002000 */
@@ -972,136 +972,136 @@ typedef struct
 #define USB_OTG_HPRT_PTCTL_2                    (0x4UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00008000 */
 #define USB_OTG_HPRT_PTCTL_3                    (0x8UL << USB_OTG_HPRT_PTCTL_Pos) /*!< 0x00010000 */
 
-#define USB_OTG_HPRT_PSPD_Pos                   (17U)                          
+#define USB_OTG_HPRT_PSPD_Pos                   (17U)
 #define USB_OTG_HPRT_PSPD_Msk                   (0x3UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00060000 */
 #define USB_OTG_HPRT_PSPD                       USB_OTG_HPRT_PSPD_Msk          /*!< Port speed */
 #define USB_OTG_HPRT_PSPD_0                     (0x1UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00020000 */
 #define USB_OTG_HPRT_PSPD_1                     (0x2UL << USB_OTG_HPRT_PSPD_Pos) /*!< 0x00040000 */
 
 /********************  Bit definition for USB_OTG_DOEPEACHMSK1 register  ********************/
-#define USB_OTG_DOEPEACHMSK1_XFRCM_Pos          (0U)                           
+#define USB_OTG_DOEPEACHMSK1_XFRCM_Pos          (0U)
 #define USB_OTG_DOEPEACHMSK1_XFRCM_Msk          (0x1UL << USB_OTG_DOEPEACHMSK1_XFRCM_Pos) /*!< 0x00000001 */
 #define USB_OTG_DOEPEACHMSK1_XFRCM              USB_OTG_DOEPEACHMSK1_XFRCM_Msk /*!< Transfer completed interrupt mask */
-#define USB_OTG_DOEPEACHMSK1_EPDM_Pos           (1U)                           
+#define USB_OTG_DOEPEACHMSK1_EPDM_Pos           (1U)
 #define USB_OTG_DOEPEACHMSK1_EPDM_Msk           (0x1UL << USB_OTG_DOEPEACHMSK1_EPDM_Pos) /*!< 0x00000002 */
 #define USB_OTG_DOEPEACHMSK1_EPDM               USB_OTG_DOEPEACHMSK1_EPDM_Msk  /*!< Endpoint disabled interrupt mask */
-#define USB_OTG_DOEPEACHMSK1_TOM_Pos            (3U)                           
+#define USB_OTG_DOEPEACHMSK1_TOM_Pos            (3U)
 #define USB_OTG_DOEPEACHMSK1_TOM_Msk            (0x1UL << USB_OTG_DOEPEACHMSK1_TOM_Pos) /*!< 0x00000008 */
 #define USB_OTG_DOEPEACHMSK1_TOM                USB_OTG_DOEPEACHMSK1_TOM_Msk   /*!< Timeout condition mask */
-#define USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Pos      (4U)                           
+#define USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Pos      (4U)
 #define USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Msk      (0x1UL << USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Pos) /*!< 0x00000010 */
 #define USB_OTG_DOEPEACHMSK1_ITTXFEMSK          USB_OTG_DOEPEACHMSK1_ITTXFEMSK_Msk /*!< IN token received when TxFIFO empty mask */
-#define USB_OTG_DOEPEACHMSK1_INEPNMM_Pos        (5U)                           
+#define USB_OTG_DOEPEACHMSK1_INEPNMM_Pos        (5U)
 #define USB_OTG_DOEPEACHMSK1_INEPNMM_Msk        (0x1UL << USB_OTG_DOEPEACHMSK1_INEPNMM_Pos) /*!< 0x00000020 */
 #define USB_OTG_DOEPEACHMSK1_INEPNMM            USB_OTG_DOEPEACHMSK1_INEPNMM_Msk /*!< IN token received with EP mismatch mask */
-#define USB_OTG_DOEPEACHMSK1_INEPNEM_Pos        (6U)                           
+#define USB_OTG_DOEPEACHMSK1_INEPNEM_Pos        (6U)
 #define USB_OTG_DOEPEACHMSK1_INEPNEM_Msk        (0x1UL << USB_OTG_DOEPEACHMSK1_INEPNEM_Pos) /*!< 0x00000040 */
 #define USB_OTG_DOEPEACHMSK1_INEPNEM            USB_OTG_DOEPEACHMSK1_INEPNEM_Msk /*!< IN endpoint NAK effective mask */
-#define USB_OTG_DOEPEACHMSK1_TXFURM_Pos         (8U)                           
+#define USB_OTG_DOEPEACHMSK1_TXFURM_Pos         (8U)
 #define USB_OTG_DOEPEACHMSK1_TXFURM_Msk         (0x1UL << USB_OTG_DOEPEACHMSK1_TXFURM_Pos) /*!< 0x00000100 */
 #define USB_OTG_DOEPEACHMSK1_TXFURM             USB_OTG_DOEPEACHMSK1_TXFURM_Msk /*!< OUT packet error mask */
-#define USB_OTG_DOEPEACHMSK1_BIM_Pos            (9U)                           
+#define USB_OTG_DOEPEACHMSK1_BIM_Pos            (9U)
 #define USB_OTG_DOEPEACHMSK1_BIM_Msk            (0x1UL << USB_OTG_DOEPEACHMSK1_BIM_Pos) /*!< 0x00000200 */
 #define USB_OTG_DOEPEACHMSK1_BIM                USB_OTG_DOEPEACHMSK1_BIM_Msk   /*!< BNA interrupt mask */
-#define USB_OTG_DOEPEACHMSK1_BERRM_Pos          (12U)                          
+#define USB_OTG_DOEPEACHMSK1_BERRM_Pos          (12U)
 #define USB_OTG_DOEPEACHMSK1_BERRM_Msk          (0x1UL << USB_OTG_DOEPEACHMSK1_BERRM_Pos) /*!< 0x00001000 */
 #define USB_OTG_DOEPEACHMSK1_BERRM              USB_OTG_DOEPEACHMSK1_BERRM_Msk /*!< Bubble error interrupt mask */
-#define USB_OTG_DOEPEACHMSK1_NAKM_Pos           (13U)                          
+#define USB_OTG_DOEPEACHMSK1_NAKM_Pos           (13U)
 #define USB_OTG_DOEPEACHMSK1_NAKM_Msk           (0x1UL << USB_OTG_DOEPEACHMSK1_NAKM_Pos) /*!< 0x00002000 */
 #define USB_OTG_DOEPEACHMSK1_NAKM               USB_OTG_DOEPEACHMSK1_NAKM_Msk  /*!< NAK interrupt mask */
-#define USB_OTG_DOEPEACHMSK1_NYETM_Pos          (14U)                          
+#define USB_OTG_DOEPEACHMSK1_NYETM_Pos          (14U)
 #define USB_OTG_DOEPEACHMSK1_NYETM_Msk          (0x1UL << USB_OTG_DOEPEACHMSK1_NYETM_Pos) /*!< 0x00004000 */
 #define USB_OTG_DOEPEACHMSK1_NYETM              USB_OTG_DOEPEACHMSK1_NYETM_Msk /*!< NYET interrupt mask */
 
 /********************  Bit definition for USB_OTG_HPTXFSIZ register  ********************/
-#define USB_OTG_HPTXFSIZ_PTXSA_Pos              (0U)                           
+#define USB_OTG_HPTXFSIZ_PTXSA_Pos              (0U)
 #define USB_OTG_HPTXFSIZ_PTXSA_Msk              (0xFFFFUL << USB_OTG_HPTXFSIZ_PTXSA_Pos) /*!< 0x0000FFFF */
 #define USB_OTG_HPTXFSIZ_PTXSA                  USB_OTG_HPTXFSIZ_PTXSA_Msk     /*!< Host periodic TxFIFO start address */
-#define USB_OTG_HPTXFSIZ_PTXFD_Pos              (16U)                          
+#define USB_OTG_HPTXFSIZ_PTXFD_Pos              (16U)
 #define USB_OTG_HPTXFSIZ_PTXFD_Msk              (0xFFFFUL << USB_OTG_HPTXFSIZ_PTXFD_Pos) /*!< 0xFFFF0000 */
 #define USB_OTG_HPTXFSIZ_PTXFD                  USB_OTG_HPTXFSIZ_PTXFD_Msk     /*!< Host periodic TxFIFO depth */
 
 /********************  Bit definition for USB_OTG_DIEPCTL register  ********************/
-#define USB_OTG_DIEPCTL_MPSIZ_Pos               (0U)                           
+#define USB_OTG_DIEPCTL_MPSIZ_Pos               (0U)
 #define USB_OTG_DIEPCTL_MPSIZ_Msk               (0x7FFUL << USB_OTG_DIEPCTL_MPSIZ_Pos) /*!< 0x000007FF */
 #define USB_OTG_DIEPCTL_MPSIZ                   USB_OTG_DIEPCTL_MPSIZ_Msk      /*!< Maximum packet size */
-#define USB_OTG_DIEPCTL_USBAEP_Pos              (15U)                          
+#define USB_OTG_DIEPCTL_USBAEP_Pos              (15U)
 #define USB_OTG_DIEPCTL_USBAEP_Msk              (0x1UL << USB_OTG_DIEPCTL_USBAEP_Pos) /*!< 0x00008000 */
 #define USB_OTG_DIEPCTL_USBAEP                  USB_OTG_DIEPCTL_USBAEP_Msk     /*!< USB active endpoint */
-#define USB_OTG_DIEPCTL_EONUM_DPID_Pos          (16U)                          
+#define USB_OTG_DIEPCTL_EONUM_DPID_Pos          (16U)
 #define USB_OTG_DIEPCTL_EONUM_DPID_Msk          (0x1UL << USB_OTG_DIEPCTL_EONUM_DPID_Pos) /*!< 0x00010000 */
 #define USB_OTG_DIEPCTL_EONUM_DPID              USB_OTG_DIEPCTL_EONUM_DPID_Msk /*!< Even/odd frame */
-#define USB_OTG_DIEPCTL_NAKSTS_Pos              (17U)                          
+#define USB_OTG_DIEPCTL_NAKSTS_Pos              (17U)
 #define USB_OTG_DIEPCTL_NAKSTS_Msk              (0x1UL << USB_OTG_DIEPCTL_NAKSTS_Pos) /*!< 0x00020000 */
 #define USB_OTG_DIEPCTL_NAKSTS                  USB_OTG_DIEPCTL_NAKSTS_Msk     /*!< NAK status */
 
-#define USB_OTG_DIEPCTL_EPTYP_Pos               (18U)                          
+#define USB_OTG_DIEPCTL_EPTYP_Pos               (18U)
 #define USB_OTG_DIEPCTL_EPTYP_Msk               (0x3UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x000C0000 */
 #define USB_OTG_DIEPCTL_EPTYP                   USB_OTG_DIEPCTL_EPTYP_Msk      /*!< Endpoint type */
 #define USB_OTG_DIEPCTL_EPTYP_0                 (0x1UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x00040000 */
 #define USB_OTG_DIEPCTL_EPTYP_1                 (0x2UL << USB_OTG_DIEPCTL_EPTYP_Pos) /*!< 0x00080000 */
-#define USB_OTG_DIEPCTL_STALL_Pos               (21U)                          
+#define USB_OTG_DIEPCTL_STALL_Pos               (21U)
 #define USB_OTG_DIEPCTL_STALL_Msk               (0x1UL << USB_OTG_DIEPCTL_STALL_Pos) /*!< 0x00200000 */
 #define USB_OTG_DIEPCTL_STALL                   USB_OTG_DIEPCTL_STALL_Msk      /*!< STALL handshake */
 
-#define USB_OTG_DIEPCTL_TXFNUM_Pos              (22U)                          
+#define USB_OTG_DIEPCTL_TXFNUM_Pos              (22U)
 #define USB_OTG_DIEPCTL_TXFNUM_Msk              (0xFUL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x03C00000 */
 #define USB_OTG_DIEPCTL_TXFNUM                  USB_OTG_DIEPCTL_TXFNUM_Msk     /*!< TxFIFO number */
 #define USB_OTG_DIEPCTL_TXFNUM_0                (0x1UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x00400000 */
 #define USB_OTG_DIEPCTL_TXFNUM_1                (0x2UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x00800000 */
 #define USB_OTG_DIEPCTL_TXFNUM_2                (0x4UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x01000000 */
 #define USB_OTG_DIEPCTL_TXFNUM_3                (0x8UL << USB_OTG_DIEPCTL_TXFNUM_Pos) /*!< 0x02000000 */
-#define USB_OTG_DIEPCTL_CNAK_Pos                (26U)                          
+#define USB_OTG_DIEPCTL_CNAK_Pos                (26U)
 #define USB_OTG_DIEPCTL_CNAK_Msk                (0x1UL << USB_OTG_DIEPCTL_CNAK_Pos) /*!< 0x04000000 */
 #define USB_OTG_DIEPCTL_CNAK                    USB_OTG_DIEPCTL_CNAK_Msk       /*!< Clear NAK */
-#define USB_OTG_DIEPCTL_SNAK_Pos                (27U)                          
+#define USB_OTG_DIEPCTL_SNAK_Pos                (27U)
 #define USB_OTG_DIEPCTL_SNAK_Msk                (0x1UL << USB_OTG_DIEPCTL_SNAK_Pos) /*!< 0x08000000 */
 #define USB_OTG_DIEPCTL_SNAK                    USB_OTG_DIEPCTL_SNAK_Msk       /*!< Set NAK */
-#define USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Pos      (28U)                          
+#define USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Pos      (28U)
 #define USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Msk      (0x1UL << USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Pos) /*!< 0x10000000 */
 #define USB_OTG_DIEPCTL_SD0PID_SEVNFRM          USB_OTG_DIEPCTL_SD0PID_SEVNFRM_Msk /*!< Set DATA0 PID */
-#define USB_OTG_DIEPCTL_SODDFRM_Pos             (29U)                          
+#define USB_OTG_DIEPCTL_SODDFRM_Pos             (29U)
 #define USB_OTG_DIEPCTL_SODDFRM_Msk             (0x1UL << USB_OTG_DIEPCTL_SODDFRM_Pos) /*!< 0x20000000 */
 #define USB_OTG_DIEPCTL_SODDFRM                 USB_OTG_DIEPCTL_SODDFRM_Msk    /*!< Set odd frame */
-#define USB_OTG_DIEPCTL_EPDIS_Pos               (30U)                          
+#define USB_OTG_DIEPCTL_EPDIS_Pos               (30U)
 #define USB_OTG_DIEPCTL_EPDIS_Msk               (0x1UL << USB_OTG_DIEPCTL_EPDIS_Pos) /*!< 0x40000000 */
 #define USB_OTG_DIEPCTL_EPDIS                   USB_OTG_DIEPCTL_EPDIS_Msk      /*!< Endpoint disable */
-#define USB_OTG_DIEPCTL_EPENA_Pos               (31U)                          
+#define USB_OTG_DIEPCTL_EPENA_Pos               (31U)
 #define USB_OTG_DIEPCTL_EPENA_Msk               (0x1UL << USB_OTG_DIEPCTL_EPENA_Pos) /*!< 0x80000000 */
 #define USB_OTG_DIEPCTL_EPENA                   USB_OTG_DIEPCTL_EPENA_Msk      /*!< Endpoint enable */
 
 /********************  Bit definition for USB_OTG_HCCHAR register  ********************/
-#define USB_OTG_HCCHAR_MPSIZ_Pos                (0U)                           
+#define USB_OTG_HCCHAR_MPSIZ_Pos                (0U)
 #define USB_OTG_HCCHAR_MPSIZ_Msk                (0x7FFUL << USB_OTG_HCCHAR_MPSIZ_Pos) /*!< 0x000007FF */
 #define USB_OTG_HCCHAR_MPSIZ                    USB_OTG_HCCHAR_MPSIZ_Msk       /*!< Maximum packet size */
 
-#define USB_OTG_HCCHAR_EPNUM_Pos                (11U)                          
+#define USB_OTG_HCCHAR_EPNUM_Pos                (11U)
 #define USB_OTG_HCCHAR_EPNUM_Msk                (0xFUL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00007800 */
 #define USB_OTG_HCCHAR_EPNUM                    USB_OTG_HCCHAR_EPNUM_Msk       /*!< Endpoint number */
 #define USB_OTG_HCCHAR_EPNUM_0                  (0x1UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00000800 */
 #define USB_OTG_HCCHAR_EPNUM_1                  (0x2UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00001000 */
 #define USB_OTG_HCCHAR_EPNUM_2                  (0x4UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00002000 */
 #define USB_OTG_HCCHAR_EPNUM_3                  (0x8UL << USB_OTG_HCCHAR_EPNUM_Pos) /*!< 0x00004000 */
-#define USB_OTG_HCCHAR_EPDIR_Pos                (15U)                          
+#define USB_OTG_HCCHAR_EPDIR_Pos                (15U)
 #define USB_OTG_HCCHAR_EPDIR_Msk                (0x1UL << USB_OTG_HCCHAR_EPDIR_Pos) /*!< 0x00008000 */
 #define USB_OTG_HCCHAR_EPDIR                    USB_OTG_HCCHAR_EPDIR_Msk       /*!< Endpoint direction */
-#define USB_OTG_HCCHAR_LSDEV_Pos                (17U)                          
+#define USB_OTG_HCCHAR_LSDEV_Pos                (17U)
 #define USB_OTG_HCCHAR_LSDEV_Msk                (0x1UL << USB_OTG_HCCHAR_LSDEV_Pos) /*!< 0x00020000 */
 #define USB_OTG_HCCHAR_LSDEV                    USB_OTG_HCCHAR_LSDEV_Msk       /*!< Low-speed device */
 
-#define USB_OTG_HCCHAR_EPTYP_Pos                (18U)                          
+#define USB_OTG_HCCHAR_EPTYP_Pos                (18U)
 #define USB_OTG_HCCHAR_EPTYP_Msk                (0x3UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x000C0000 */
 #define USB_OTG_HCCHAR_EPTYP                    USB_OTG_HCCHAR_EPTYP_Msk       /*!< Endpoint type */
 #define USB_OTG_HCCHAR_EPTYP_0                  (0x1UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x00040000 */
 #define USB_OTG_HCCHAR_EPTYP_1                  (0x2UL << USB_OTG_HCCHAR_EPTYP_Pos) /*!< 0x00080000 */
-                                      
-#define USB_OTG_HCCHAR_MC_Pos                   (20U)                          
+
+#define USB_OTG_HCCHAR_MC_Pos                   (20U)
 #define USB_OTG_HCCHAR_MC_Msk                   (0x3UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00300000 */
 #define USB_OTG_HCCHAR_MC                       USB_OTG_HCCHAR_MC_Msk          /*!< Multi Count (MC) / Error Count (EC) */
 #define USB_OTG_HCCHAR_MC_0                     (0x1UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00100000 */
 #define USB_OTG_HCCHAR_MC_1                     (0x2UL << USB_OTG_HCCHAR_MC_Pos) /*!< 0x00200000 */
 
-#define USB_OTG_HCCHAR_DAD_Pos                  (22U)                          
+#define USB_OTG_HCCHAR_DAD_Pos                  (22U)
 #define USB_OTG_HCCHAR_DAD_Msk                  (0x7FUL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x1FC00000 */
 #define USB_OTG_HCCHAR_DAD                      USB_OTG_HCCHAR_DAD_Msk         /*!< Device address */
 #define USB_OTG_HCCHAR_DAD_0                    (0x01UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x00400000 */
@@ -1111,19 +1111,19 @@ typedef struct
 #define USB_OTG_HCCHAR_DAD_4                    (0x10UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x04000000 */
 #define USB_OTG_HCCHAR_DAD_5                    (0x20UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x08000000 */
 #define USB_OTG_HCCHAR_DAD_6                    (0x40UL << USB_OTG_HCCHAR_DAD_Pos) /*!< 0x10000000 */
-#define USB_OTG_HCCHAR_ODDFRM_Pos               (29U)                          
+#define USB_OTG_HCCHAR_ODDFRM_Pos               (29U)
 #define USB_OTG_HCCHAR_ODDFRM_Msk               (0x1UL << USB_OTG_HCCHAR_ODDFRM_Pos) /*!< 0x20000000 */
 #define USB_OTG_HCCHAR_ODDFRM                   USB_OTG_HCCHAR_ODDFRM_Msk      /*!< Odd frame */
-#define USB_OTG_HCCHAR_CHDIS_Pos                (30U)                          
+#define USB_OTG_HCCHAR_CHDIS_Pos                (30U)
 #define USB_OTG_HCCHAR_CHDIS_Msk                (0x1UL << USB_OTG_HCCHAR_CHDIS_Pos) /*!< 0x40000000 */
 #define USB_OTG_HCCHAR_CHDIS                    USB_OTG_HCCHAR_CHDIS_Msk       /*!< Channel disable */
-#define USB_OTG_HCCHAR_CHENA_Pos                (31U)                          
+#define USB_OTG_HCCHAR_CHENA_Pos                (31U)
 #define USB_OTG_HCCHAR_CHENA_Msk                (0x1UL << USB_OTG_HCCHAR_CHENA_Pos) /*!< 0x80000000 */
 #define USB_OTG_HCCHAR_CHENA                    USB_OTG_HCCHAR_CHENA_Msk       /*!< Channel enable */
 
 /********************  Bit definition for USB_OTG_HCSPLT register  ********************/
 
-#define USB_OTG_HCSPLT_PRTADDR_Pos              (0U)                           
+#define USB_OTG_HCSPLT_PRTADDR_Pos              (0U)
 #define USB_OTG_HCSPLT_PRTADDR_Msk              (0x7FUL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x0000007F */
 #define USB_OTG_HCSPLT_PRTADDR                  USB_OTG_HCSPLT_PRTADDR_Msk     /*!< Port address */
 #define USB_OTG_HCSPLT_PRTADDR_0                (0x01UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000001 */
@@ -1134,7 +1134,7 @@ typedef struct
 #define USB_OTG_HCSPLT_PRTADDR_5                (0x20UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000020 */
 #define USB_OTG_HCSPLT_PRTADDR_6                (0x40UL << USB_OTG_HCSPLT_PRTADDR_Pos) /*!< 0x00000040 */
 
-#define USB_OTG_HCSPLT_HUBADDR_Pos              (7U)                           
+#define USB_OTG_HCSPLT_HUBADDR_Pos              (7U)
 #define USB_OTG_HCSPLT_HUBADDR_Msk              (0x7FUL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00003F80 */
 #define USB_OTG_HCSPLT_HUBADDR                  USB_OTG_HCSPLT_HUBADDR_Msk     /*!< Hub address */
 #define USB_OTG_HCSPLT_HUBADDR_0                (0x01UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00000080 */
@@ -1145,240 +1145,240 @@ typedef struct
 #define USB_OTG_HCSPLT_HUBADDR_5                (0x20UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00001000 */
 #define USB_OTG_HCSPLT_HUBADDR_6                (0x40UL << USB_OTG_HCSPLT_HUBADDR_Pos) /*!< 0x00002000 */
 
-#define USB_OTG_HCSPLT_XACTPOS_Pos              (14U)                          
+#define USB_OTG_HCSPLT_XACTPOS_Pos              (14U)
 #define USB_OTG_HCSPLT_XACTPOS_Msk              (0x3UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x0000C000 */
 #define USB_OTG_HCSPLT_XACTPOS                  USB_OTG_HCSPLT_XACTPOS_Msk     /*!< XACTPOS */
 #define USB_OTG_HCSPLT_XACTPOS_0                (0x1UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x00004000 */
 #define USB_OTG_HCSPLT_XACTPOS_1                (0x2UL << USB_OTG_HCSPLT_XACTPOS_Pos) /*!< 0x00008000 */
-#define USB_OTG_HCSPLT_COMPLSPLT_Pos            (16U)                          
+#define USB_OTG_HCSPLT_COMPLSPLT_Pos            (16U)
 #define USB_OTG_HCSPLT_COMPLSPLT_Msk            (0x1UL << USB_OTG_HCSPLT_COMPLSPLT_Pos) /*!< 0x00010000 */
 #define USB_OTG_HCSPLT_COMPLSPLT                USB_OTG_HCSPLT_COMPLSPLT_Msk   /*!< Do complete split */
-#define USB_OTG_HCSPLT_SPLITEN_Pos              (31U)                          
+#define USB_OTG_HCSPLT_SPLITEN_Pos              (31U)
 #define USB_OTG_HCSPLT_SPLITEN_Msk              (0x1UL << USB_OTG_HCSPLT_SPLITEN_Pos) /*!< 0x80000000 */
 #define USB_OTG_HCSPLT_SPLITEN                  USB_OTG_HCSPLT_SPLITEN_Msk     /*!< Split enable */
 
 /********************  Bit definition for USB_OTG_HCINT register  ********************/
-#define USB_OTG_HCINT_XFRC_Pos                  (0U)                           
+#define USB_OTG_HCINT_XFRC_Pos                  (0U)
 #define USB_OTG_HCINT_XFRC_Msk                  (0x1UL << USB_OTG_HCINT_XFRC_Pos) /*!< 0x00000001 */
 #define USB_OTG_HCINT_XFRC                      USB_OTG_HCINT_XFRC_Msk         /*!< Transfer completed */
-#define USB_OTG_HCINT_CHH_Pos                   (1U)                           
+#define USB_OTG_HCINT_CHH_Pos                   (1U)
 #define USB_OTG_HCINT_CHH_Msk                   (0x1UL << USB_OTG_HCINT_CHH_Pos) /*!< 0x00000002 */
 #define USB_OTG_HCINT_CHH                       USB_OTG_HCINT_CHH_Msk          /*!< Channel halted */
-#define USB_OTG_HCINT_AHBERR_Pos                (2U)                           
+#define USB_OTG_HCINT_AHBERR_Pos                (2U)
 #define USB_OTG_HCINT_AHBERR_Msk                (0x1UL << USB_OTG_HCINT_AHBERR_Pos) /*!< 0x00000004 */
 #define USB_OTG_HCINT_AHBERR                    USB_OTG_HCINT_AHBERR_Msk       /*!< AHB error */
-#define USB_OTG_HCINT_STALL_Pos                 (3U)                           
+#define USB_OTG_HCINT_STALL_Pos                 (3U)
 #define USB_OTG_HCINT_STALL_Msk                 (0x1UL << USB_OTG_HCINT_STALL_Pos) /*!< 0x00000008 */
 #define USB_OTG_HCINT_STALL                     USB_OTG_HCINT_STALL_Msk        /*!< STALL response received interrupt */
-#define USB_OTG_HCINT_NAK_Pos                   (4U)                           
+#define USB_OTG_HCINT_NAK_Pos                   (4U)
 #define USB_OTG_HCINT_NAK_Msk                   (0x1UL << USB_OTG_HCINT_NAK_Pos) /*!< 0x00000010 */
 #define USB_OTG_HCINT_NAK                       USB_OTG_HCINT_NAK_Msk          /*!< NAK response received interrupt */
-#define USB_OTG_HCINT_ACK_Pos                   (5U)                           
+#define USB_OTG_HCINT_ACK_Pos                   (5U)
 #define USB_OTG_HCINT_ACK_Msk                   (0x1UL << USB_OTG_HCINT_ACK_Pos) /*!< 0x00000020 */
 #define USB_OTG_HCINT_ACK                       USB_OTG_HCINT_ACK_Msk          /*!< ACK response received/transmitted interrupt */
-#define USB_OTG_HCINT_NYET_Pos                  (6U)                           
+#define USB_OTG_HCINT_NYET_Pos                  (6U)
 #define USB_OTG_HCINT_NYET_Msk                  (0x1UL << USB_OTG_HCINT_NYET_Pos) /*!< 0x00000040 */
 #define USB_OTG_HCINT_NYET                      USB_OTG_HCINT_NYET_Msk         /*!< Response received interrupt */
-#define USB_OTG_HCINT_TXERR_Pos                 (7U)                           
+#define USB_OTG_HCINT_TXERR_Pos                 (7U)
 #define USB_OTG_HCINT_TXERR_Msk                 (0x1UL << USB_OTG_HCINT_TXERR_Pos) /*!< 0x00000080 */
 #define USB_OTG_HCINT_TXERR                     USB_OTG_HCINT_TXERR_Msk        /*!< Transaction error */
-#define USB_OTG_HCINT_BBERR_Pos                 (8U)                           
+#define USB_OTG_HCINT_BBERR_Pos                 (8U)
 #define USB_OTG_HCINT_BBERR_Msk                 (0x1UL << USB_OTG_HCINT_BBERR_Pos) /*!< 0x00000100 */
 #define USB_OTG_HCINT_BBERR                     USB_OTG_HCINT_BBERR_Msk        /*!< Babble error */
-#define USB_OTG_HCINT_FRMOR_Pos                 (9U)                           
+#define USB_OTG_HCINT_FRMOR_Pos                 (9U)
 #define USB_OTG_HCINT_FRMOR_Msk                 (0x1UL << USB_OTG_HCINT_FRMOR_Pos) /*!< 0x00000200 */
 #define USB_OTG_HCINT_FRMOR                     USB_OTG_HCINT_FRMOR_Msk        /*!< Frame overrun */
-#define USB_OTG_HCINT_DTERR_Pos                 (10U)                          
+#define USB_OTG_HCINT_DTERR_Pos                 (10U)
 #define USB_OTG_HCINT_DTERR_Msk                 (0x1UL << USB_OTG_HCINT_DTERR_Pos) /*!< 0x00000400 */
 #define USB_OTG_HCINT_DTERR                     USB_OTG_HCINT_DTERR_Msk        /*!< Data toggle error */
 
 /********************  Bit definition for USB_OTG_DIEPINT register  ********************/
-#define USB_OTG_DIEPINT_XFRC_Pos                (0U)                           
+#define USB_OTG_DIEPINT_XFRC_Pos                (0U)
 #define USB_OTG_DIEPINT_XFRC_Msk                (0x1UL << USB_OTG_DIEPINT_XFRC_Pos) /*!< 0x00000001 */
 #define USB_OTG_DIEPINT_XFRC                    USB_OTG_DIEPINT_XFRC_Msk       /*!< Transfer completed interrupt */
-#define USB_OTG_DIEPINT_EPDISD_Pos              (1U)                           
+#define USB_OTG_DIEPINT_EPDISD_Pos              (1U)
 #define USB_OTG_DIEPINT_EPDISD_Msk              (0x1UL << USB_OTG_DIEPINT_EPDISD_Pos) /*!< 0x00000002 */
 #define USB_OTG_DIEPINT_EPDISD                  USB_OTG_DIEPINT_EPDISD_Msk     /*!< Endpoint disabled interrupt */
 #define USB_OTG_DIEPINT_AHBERR_Pos               (2U)
 #define USB_OTG_DIEPINT_AHBERR_Msk               (0x1UL << USB_OTG_DIEPINT_AHBERR_Pos) /*!< 0x00000004 */
 #define USB_OTG_DIEPINT_AHBERR                   USB_OTG_DIEPINT_AHBERR_Msk   /*!< AHB Error (AHBErr) during an IN transaction */
-#define USB_OTG_DIEPINT_TOC_Pos                 (3U)                           
+#define USB_OTG_DIEPINT_TOC_Pos                 (3U)
 #define USB_OTG_DIEPINT_TOC_Msk                 (0x1UL << USB_OTG_DIEPINT_TOC_Pos) /*!< 0x00000008 */
 #define USB_OTG_DIEPINT_TOC                     USB_OTG_DIEPINT_TOC_Msk        /*!< Timeout condition */
-#define USB_OTG_DIEPINT_ITTXFE_Pos              (4U)                           
+#define USB_OTG_DIEPINT_ITTXFE_Pos              (4U)
 #define USB_OTG_DIEPINT_ITTXFE_Msk              (0x1UL << USB_OTG_DIEPINT_ITTXFE_Pos) /*!< 0x00000010 */
 #define USB_OTG_DIEPINT_ITTXFE                  USB_OTG_DIEPINT_ITTXFE_Msk     /*!< IN token received when TxFIFO is empty */
 #define USB_OTG_DIEPINT_INEPNM_Pos               (5U)
 #define USB_OTG_DIEPINT_INEPNM_Msk               (0x1UL << USB_OTG_DIEPINT_INEPNM_Pos) /*!< 0x00000004 */
 #define USB_OTG_DIEPINT_INEPNM                   USB_OTG_DIEPINT_INEPNM_Msk   /*!< IN token received with EP mismatch */
-#define USB_OTG_DIEPINT_INEPNE_Pos              (6U)                           
+#define USB_OTG_DIEPINT_INEPNE_Pos              (6U)
 #define USB_OTG_DIEPINT_INEPNE_Msk              (0x1UL << USB_OTG_DIEPINT_INEPNE_Pos) /*!< 0x00000040 */
 #define USB_OTG_DIEPINT_INEPNE                  USB_OTG_DIEPINT_INEPNE_Msk     /*!< IN endpoint NAK effective */
-#define USB_OTG_DIEPINT_TXFE_Pos                (7U)                           
+#define USB_OTG_DIEPINT_TXFE_Pos                (7U)
 #define USB_OTG_DIEPINT_TXFE_Msk                (0x1UL << USB_OTG_DIEPINT_TXFE_Pos) /*!< 0x00000080 */
 #define USB_OTG_DIEPINT_TXFE                    USB_OTG_DIEPINT_TXFE_Msk       /*!< Transmit FIFO empty */
-#define USB_OTG_DIEPINT_TXFIFOUDRN_Pos          (8U)                           
+#define USB_OTG_DIEPINT_TXFIFOUDRN_Pos          (8U)
 #define USB_OTG_DIEPINT_TXFIFOUDRN_Msk          (0x1UL << USB_OTG_DIEPINT_TXFIFOUDRN_Pos) /*!< 0x00000100 */
 #define USB_OTG_DIEPINT_TXFIFOUDRN              USB_OTG_DIEPINT_TXFIFOUDRN_Msk /*!< Transmit Fifo Underrun */
-#define USB_OTG_DIEPINT_BNA_Pos                 (9U)                           
+#define USB_OTG_DIEPINT_BNA_Pos                 (9U)
 #define USB_OTG_DIEPINT_BNA_Msk                 (0x1UL << USB_OTG_DIEPINT_BNA_Pos) /*!< 0x00000200 */
 #define USB_OTG_DIEPINT_BNA                     USB_OTG_DIEPINT_BNA_Msk        /*!< Buffer not available interrupt */
-#define USB_OTG_DIEPINT_PKTDRPSTS_Pos           (11U)                          
+#define USB_OTG_DIEPINT_PKTDRPSTS_Pos           (11U)
 #define USB_OTG_DIEPINT_PKTDRPSTS_Msk           (0x1UL << USB_OTG_DIEPINT_PKTDRPSTS_Pos) /*!< 0x00000800 */
 #define USB_OTG_DIEPINT_PKTDRPSTS               USB_OTG_DIEPINT_PKTDRPSTS_Msk  /*!< Packet dropped status */
-#define USB_OTG_DIEPINT_BERR_Pos                (12U)                          
+#define USB_OTG_DIEPINT_BERR_Pos                (12U)
 #define USB_OTG_DIEPINT_BERR_Msk                (0x1UL << USB_OTG_DIEPINT_BERR_Pos) /*!< 0x00001000 */
 #define USB_OTG_DIEPINT_BERR                    USB_OTG_DIEPINT_BERR_Msk       /*!< Babble error interrupt */
-#define USB_OTG_DIEPINT_NAK_Pos                 (13U)                          
+#define USB_OTG_DIEPINT_NAK_Pos                 (13U)
 #define USB_OTG_DIEPINT_NAK_Msk                 (0x1UL << USB_OTG_DIEPINT_NAK_Pos) /*!< 0x00002000 */
 #define USB_OTG_DIEPINT_NAK                     USB_OTG_DIEPINT_NAK_Msk        /*!< NAK interrupt */
 
 /********************  Bit definition for USB_OTG_HCINTMSK register  ********************/
-#define USB_OTG_HCINTMSK_XFRCM_Pos              (0U)                           
+#define USB_OTG_HCINTMSK_XFRCM_Pos              (0U)
 #define USB_OTG_HCINTMSK_XFRCM_Msk              (0x1UL << USB_OTG_HCINTMSK_XFRCM_Pos) /*!< 0x00000001 */
 #define USB_OTG_HCINTMSK_XFRCM                  USB_OTG_HCINTMSK_XFRCM_Msk     /*!< Transfer completed mask */
-#define USB_OTG_HCINTMSK_CHHM_Pos               (1U)                           
+#define USB_OTG_HCINTMSK_CHHM_Pos               (1U)
 #define USB_OTG_HCINTMSK_CHHM_Msk               (0x1UL << USB_OTG_HCINTMSK_CHHM_Pos) /*!< 0x00000002 */
 #define USB_OTG_HCINTMSK_CHHM                   USB_OTG_HCINTMSK_CHHM_Msk      /*!< Channel halted mask */
-#define USB_OTG_HCINTMSK_AHBERR_Pos             (2U)                           
+#define USB_OTG_HCINTMSK_AHBERR_Pos             (2U)
 #define USB_OTG_HCINTMSK_AHBERR_Msk             (0x1UL << USB_OTG_HCINTMSK_AHBERR_Pos) /*!< 0x00000004 */
 #define USB_OTG_HCINTMSK_AHBERR                 USB_OTG_HCINTMSK_AHBERR_Msk    /*!< AHB error */
-#define USB_OTG_HCINTMSK_STALLM_Pos             (3U)                           
+#define USB_OTG_HCINTMSK_STALLM_Pos             (3U)
 #define USB_OTG_HCINTMSK_STALLM_Msk             (0x1UL << USB_OTG_HCINTMSK_STALLM_Pos) /*!< 0x00000008 */
 #define USB_OTG_HCINTMSK_STALLM                 USB_OTG_HCINTMSK_STALLM_Msk    /*!< STALL response received interrupt mask */
-#define USB_OTG_HCINTMSK_NAKM_Pos               (4U)                           
+#define USB_OTG_HCINTMSK_NAKM_Pos               (4U)
 #define USB_OTG_HCINTMSK_NAKM_Msk               (0x1UL << USB_OTG_HCINTMSK_NAKM_Pos) /*!< 0x00000010 */
 #define USB_OTG_HCINTMSK_NAKM                   USB_OTG_HCINTMSK_NAKM_Msk      /*!< NAK response received interrupt mask */
-#define USB_OTG_HCINTMSK_ACKM_Pos               (5U)                           
+#define USB_OTG_HCINTMSK_ACKM_Pos               (5U)
 #define USB_OTG_HCINTMSK_ACKM_Msk               (0x1UL << USB_OTG_HCINTMSK_ACKM_Pos) /*!< 0x00000020 */
 #define USB_OTG_HCINTMSK_ACKM                   USB_OTG_HCINTMSK_ACKM_Msk      /*!< ACK response received/transmitted interrupt mask */
-#define USB_OTG_HCINTMSK_NYET_Pos               (6U)                           
+#define USB_OTG_HCINTMSK_NYET_Pos               (6U)
 #define USB_OTG_HCINTMSK_NYET_Msk               (0x1UL << USB_OTG_HCINTMSK_NYET_Pos) /*!< 0x00000040 */
 #define USB_OTG_HCINTMSK_NYET                   USB_OTG_HCINTMSK_NYET_Msk      /*!< response received interrupt mask */
-#define USB_OTG_HCINTMSK_TXERRM_Pos             (7U)                           
+#define USB_OTG_HCINTMSK_TXERRM_Pos             (7U)
 #define USB_OTG_HCINTMSK_TXERRM_Msk             (0x1UL << USB_OTG_HCINTMSK_TXERRM_Pos) /*!< 0x00000080 */
 #define USB_OTG_HCINTMSK_TXERRM                 USB_OTG_HCINTMSK_TXERRM_Msk    /*!< Transaction error mask */
-#define USB_OTG_HCINTMSK_BBERRM_Pos             (8U)                           
+#define USB_OTG_HCINTMSK_BBERRM_Pos             (8U)
 #define USB_OTG_HCINTMSK_BBERRM_Msk             (0x1UL << USB_OTG_HCINTMSK_BBERRM_Pos) /*!< 0x00000100 */
 #define USB_OTG_HCINTMSK_BBERRM                 USB_OTG_HCINTMSK_BBERRM_Msk    /*!< Babble error mask */
-#define USB_OTG_HCINTMSK_FRMORM_Pos             (9U)                           
+#define USB_OTG_HCINTMSK_FRMORM_Pos             (9U)
 #define USB_OTG_HCINTMSK_FRMORM_Msk             (0x1UL << USB_OTG_HCINTMSK_FRMORM_Pos) /*!< 0x00000200 */
 #define USB_OTG_HCINTMSK_FRMORM                 USB_OTG_HCINTMSK_FRMORM_Msk    /*!< Frame overrun mask */
-#define USB_OTG_HCINTMSK_DTERRM_Pos             (10U)                          
+#define USB_OTG_HCINTMSK_DTERRM_Pos             (10U)
 #define USB_OTG_HCINTMSK_DTERRM_Msk             (0x1UL << USB_OTG_HCINTMSK_DTERRM_Pos) /*!< 0x00000400 */
 #define USB_OTG_HCINTMSK_DTERRM                 USB_OTG_HCINTMSK_DTERRM_Msk    /*!< Data toggle error mask */
 
 /********************  Bit definition for USB_OTG_DIEPTSIZ register  ********************/
 
-#define USB_OTG_DIEPTSIZ_XFRSIZ_Pos             (0U)                           
+#define USB_OTG_DIEPTSIZ_XFRSIZ_Pos             (0U)
 #define USB_OTG_DIEPTSIZ_XFRSIZ_Msk             (0x7FFFFUL << USB_OTG_DIEPTSIZ_XFRSIZ_Pos) /*!< 0x0007FFFF */
 #define USB_OTG_DIEPTSIZ_XFRSIZ                 USB_OTG_DIEPTSIZ_XFRSIZ_Msk    /*!< Transfer size */
-#define USB_OTG_DIEPTSIZ_PKTCNT_Pos             (19U)                          
+#define USB_OTG_DIEPTSIZ_PKTCNT_Pos             (19U)
 #define USB_OTG_DIEPTSIZ_PKTCNT_Msk             (0x3FFUL << USB_OTG_DIEPTSIZ_PKTCNT_Pos) /*!< 0x1FF80000 */
 #define USB_OTG_DIEPTSIZ_PKTCNT                 USB_OTG_DIEPTSIZ_PKTCNT_Msk    /*!< Packet count */
-#define USB_OTG_DIEPTSIZ_MULCNT_Pos             (29U)                          
+#define USB_OTG_DIEPTSIZ_MULCNT_Pos             (29U)
 #define USB_OTG_DIEPTSIZ_MULCNT_Msk             (0x3UL << USB_OTG_DIEPTSIZ_MULCNT_Pos) /*!< 0x60000000 */
 #define USB_OTG_DIEPTSIZ_MULCNT                 USB_OTG_DIEPTSIZ_MULCNT_Msk    /*!< Packet count */
 /********************  Bit definition for USB_OTG_HCTSIZ register  ********************/
-#define USB_OTG_HCTSIZ_XFRSIZ_Pos               (0U)                           
+#define USB_OTG_HCTSIZ_XFRSIZ_Pos               (0U)
 #define USB_OTG_HCTSIZ_XFRSIZ_Msk               (0x7FFFFUL << USB_OTG_HCTSIZ_XFRSIZ_Pos) /*!< 0x0007FFFF */
 #define USB_OTG_HCTSIZ_XFRSIZ                   USB_OTG_HCTSIZ_XFRSIZ_Msk      /*!< Transfer size */
-#define USB_OTG_HCTSIZ_PKTCNT_Pos               (19U)                          
+#define USB_OTG_HCTSIZ_PKTCNT_Pos               (19U)
 #define USB_OTG_HCTSIZ_PKTCNT_Msk               (0x3FFUL << USB_OTG_HCTSIZ_PKTCNT_Pos) /*!< 0x1FF80000 */
 #define USB_OTG_HCTSIZ_PKTCNT                   USB_OTG_HCTSIZ_PKTCNT_Msk      /*!< Packet count */
-#define USB_OTG_HCTSIZ_DOPING_Pos               (31U)                          
+#define USB_OTG_HCTSIZ_DOPING_Pos               (31U)
 #define USB_OTG_HCTSIZ_DOPING_Msk               (0x1UL << USB_OTG_HCTSIZ_DOPING_Pos) /*!< 0x80000000 */
 #define USB_OTG_HCTSIZ_DOPING                   USB_OTG_HCTSIZ_DOPING_Msk      /*!< Do PING */
-#define USB_OTG_HCTSIZ_DPID_Pos                 (29U)                          
+#define USB_OTG_HCTSIZ_DPID_Pos                 (29U)
 #define USB_OTG_HCTSIZ_DPID_Msk                 (0x3UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x60000000 */
 #define USB_OTG_HCTSIZ_DPID                     USB_OTG_HCTSIZ_DPID_Msk        /*!< Data PID */
 #define USB_OTG_HCTSIZ_DPID_0                   (0x1UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x20000000 */
 #define USB_OTG_HCTSIZ_DPID_1                   (0x2UL << USB_OTG_HCTSIZ_DPID_Pos) /*!< 0x40000000 */
 
 /********************  Bit definition for USB_OTG_DIEPDMA register  ********************/
-#define USB_OTG_DIEPDMA_DMAADDR_Pos             (0U)                           
+#define USB_OTG_DIEPDMA_DMAADDR_Pos             (0U)
 #define USB_OTG_DIEPDMA_DMAADDR_Msk             (0xFFFFFFFFUL << USB_OTG_DIEPDMA_DMAADDR_Pos) /*!< 0xFFFFFFFF */
 #define USB_OTG_DIEPDMA_DMAADDR                 USB_OTG_DIEPDMA_DMAADDR_Msk    /*!< DMA address */
 
 /********************  Bit definition for USB_OTG_HCDMA register  ********************/
-#define USB_OTG_HCDMA_DMAADDR_Pos               (0U)                           
+#define USB_OTG_HCDMA_DMAADDR_Pos               (0U)
 #define USB_OTG_HCDMA_DMAADDR_Msk               (0xFFFFFFFFUL << USB_OTG_HCDMA_DMAADDR_Pos) /*!< 0xFFFFFFFF */
 #define USB_OTG_HCDMA_DMAADDR                   USB_OTG_HCDMA_DMAADDR_Msk      /*!< DMA address */
 
 /********************  Bit definition for USB_OTG_DTXFSTS register  ********************/
-#define USB_OTG_DTXFSTS_INEPTFSAV_Pos           (0U)                           
+#define USB_OTG_DTXFSTS_INEPTFSAV_Pos           (0U)
 #define USB_OTG_DTXFSTS_INEPTFSAV_Msk           (0xFFFFUL << USB_OTG_DTXFSTS_INEPTFSAV_Pos) /*!< 0x0000FFFF */
 #define USB_OTG_DTXFSTS_INEPTFSAV                USB_OTG_DTXFSTS_INEPTFSAV_Msk /*!< IN endpoint TxFIFO space available */
 
 /********************  Bit definition for USB_OTG_DIEPTXF register  ********************/
-#define USB_OTG_DIEPTXF_INEPTXSA_Pos            (0U)                           
+#define USB_OTG_DIEPTXF_INEPTXSA_Pos            (0U)
 #define USB_OTG_DIEPTXF_INEPTXSA_Msk            (0xFFFFUL << USB_OTG_DIEPTXF_INEPTXSA_Pos) /*!< 0x0000FFFF */
 #define USB_OTG_DIEPTXF_INEPTXSA                USB_OTG_DIEPTXF_INEPTXSA_Msk   /*!< IN endpoint FIFOx transmit RAM start address */
-#define USB_OTG_DIEPTXF_INEPTXFD_Pos            (16U)                          
+#define USB_OTG_DIEPTXF_INEPTXFD_Pos            (16U)
 #define USB_OTG_DIEPTXF_INEPTXFD_Msk            (0xFFFFUL << USB_OTG_DIEPTXF_INEPTXFD_Pos) /*!< 0xFFFF0000 */
 #define USB_OTG_DIEPTXF_INEPTXFD                USB_OTG_DIEPTXF_INEPTXFD_Msk   /*!< IN endpoint TxFIFO depth */
 
 /********************  Bit definition for USB_OTG_DOEPCTL register  ********************/
 
-#define USB_OTG_DOEPCTL_MPSIZ_Pos               (0U)                           
+#define USB_OTG_DOEPCTL_MPSIZ_Pos               (0U)
 #define USB_OTG_DOEPCTL_MPSIZ_Msk               (0x7FFUL << USB_OTG_DOEPCTL_MPSIZ_Pos) /*!< 0x000007FF */
 #define USB_OTG_DOEPCTL_MPSIZ                    USB_OTG_DOEPCTL_MPSIZ_Msk     /*!< Maximum packet size */          /*!<Bit 1 */
-#define USB_OTG_DOEPCTL_USBAEP_Pos              (15U)                          
+#define USB_OTG_DOEPCTL_USBAEP_Pos              (15U)
 #define USB_OTG_DOEPCTL_USBAEP_Msk              (0x1UL << USB_OTG_DOEPCTL_USBAEP_Pos) /*!< 0x00008000 */
 #define USB_OTG_DOEPCTL_USBAEP                  USB_OTG_DOEPCTL_USBAEP_Msk     /*!< USB active endpoint */
-#define USB_OTG_DOEPCTL_NAKSTS_Pos              (17U)                          
+#define USB_OTG_DOEPCTL_NAKSTS_Pos              (17U)
 #define USB_OTG_DOEPCTL_NAKSTS_Msk              (0x1UL << USB_OTG_DOEPCTL_NAKSTS_Pos) /*!< 0x00020000 */
 #define USB_OTG_DOEPCTL_NAKSTS                  USB_OTG_DOEPCTL_NAKSTS_Msk     /*!< NAK status */
-#define USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Pos      (28U)                          
+#define USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Pos      (28U)
 #define USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Msk      (0x1UL << USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Pos) /*!< 0x10000000 */
 #define USB_OTG_DOEPCTL_SD0PID_SEVNFRM          USB_OTG_DOEPCTL_SD0PID_SEVNFRM_Msk /*!< Set DATA0 PID */
-#define USB_OTG_DOEPCTL_SODDFRM_Pos             (29U)                          
+#define USB_OTG_DOEPCTL_SODDFRM_Pos             (29U)
 #define USB_OTG_DOEPCTL_SODDFRM_Msk             (0x1UL << USB_OTG_DOEPCTL_SODDFRM_Pos) /*!< 0x20000000 */
 #define USB_OTG_DOEPCTL_SODDFRM                 USB_OTG_DOEPCTL_SODDFRM_Msk    /*!< Set odd frame */
-#define USB_OTG_DOEPCTL_EPTYP_Pos               (18U)                          
+#define USB_OTG_DOEPCTL_EPTYP_Pos               (18U)
 #define USB_OTG_DOEPCTL_EPTYP_Msk               (0x3UL << USB_OTG_DOEPCTL_EPTYP_Pos) /*!< 0x000C0000 */
 #define USB_OTG_DOEPCTL_EPTYP                   USB_OTG_DOEPCTL_EPTYP_Msk      /*!< Endpoint type */
 #define USB_OTG_DOEPCTL_EPTYP_0                 (0x1UL << USB_OTG_DOEPCTL_EPTYP_Pos) /*!< 0x00040000 */
 #define USB_OTG_DOEPCTL_EPTYP_1                 (0x2UL << USB_OTG_DOEPCTL_EPTYP_Pos) /*!< 0x00080000 */
-#define USB_OTG_DOEPCTL_SNPM_Pos                (20U)                          
+#define USB_OTG_DOEPCTL_SNPM_Pos                (20U)
 #define USB_OTG_DOEPCTL_SNPM_Msk                (0x1UL << USB_OTG_DOEPCTL_SNPM_Pos) /*!< 0x00100000 */
 #define USB_OTG_DOEPCTL_SNPM                    USB_OTG_DOEPCTL_SNPM_Msk       /*!< Snoop mode */
-#define USB_OTG_DOEPCTL_STALL_Pos               (21U)                          
+#define USB_OTG_DOEPCTL_STALL_Pos               (21U)
 #define USB_OTG_DOEPCTL_STALL_Msk               (0x1UL << USB_OTG_DOEPCTL_STALL_Pos) /*!< 0x00200000 */
 #define USB_OTG_DOEPCTL_STALL                   USB_OTG_DOEPCTL_STALL_Msk      /*!< STALL handshake */
-#define USB_OTG_DOEPCTL_CNAK_Pos                (26U)                          
+#define USB_OTG_DOEPCTL_CNAK_Pos                (26U)
 #define USB_OTG_DOEPCTL_CNAK_Msk                (0x1UL << USB_OTG_DOEPCTL_CNAK_Pos) /*!< 0x04000000 */
 #define USB_OTG_DOEPCTL_CNAK                    USB_OTG_DOEPCTL_CNAK_Msk       /*!< Clear NAK */
-#define USB_OTG_DOEPCTL_SNAK_Pos                (27U)                          
+#define USB_OTG_DOEPCTL_SNAK_Pos                (27U)
 #define USB_OTG_DOEPCTL_SNAK_Msk                (0x1UL << USB_OTG_DOEPCTL_SNAK_Pos) /*!< 0x08000000 */
 #define USB_OTG_DOEPCTL_SNAK                    USB_OTG_DOEPCTL_SNAK_Msk       /*!< Set NAK */
-#define USB_OTG_DOEPCTL_EPDIS_Pos               (30U)                          
+#define USB_OTG_DOEPCTL_EPDIS_Pos               (30U)
 #define USB_OTG_DOEPCTL_EPDIS_Msk               (0x1UL << USB_OTG_DOEPCTL_EPDIS_Pos) /*!< 0x40000000 */
 #define USB_OTG_DOEPCTL_EPDIS                   USB_OTG_DOEPCTL_EPDIS_Msk      /*!< Endpoint disable */
-#define USB_OTG_DOEPCTL_EPENA_Pos               (31U)                          
+#define USB_OTG_DOEPCTL_EPENA_Pos               (31U)
 #define USB_OTG_DOEPCTL_EPENA_Msk               (0x1UL << USB_OTG_DOEPCTL_EPENA_Pos) /*!< 0x80000000 */
 #define USB_OTG_DOEPCTL_EPENA                   USB_OTG_DOEPCTL_EPENA_Msk      /*!< Endpoint enable */
 
 /********************  Bit definition for USB_OTG_DOEPINT register  ********************/
-#define USB_OTG_DOEPINT_XFRC_Pos                (0U)                           
+#define USB_OTG_DOEPINT_XFRC_Pos                (0U)
 #define USB_OTG_DOEPINT_XFRC_Msk                (0x1UL << USB_OTG_DOEPINT_XFRC_Pos) /*!< 0x00000001 */
 #define USB_OTG_DOEPINT_XFRC                    USB_OTG_DOEPINT_XFRC_Msk       /*!< Transfer completed interrupt */
-#define USB_OTG_DOEPINT_EPDISD_Pos              (1U)                           
+#define USB_OTG_DOEPINT_EPDISD_Pos              (1U)
 #define USB_OTG_DOEPINT_EPDISD_Msk              (0x1UL << USB_OTG_DOEPINT_EPDISD_Pos) /*!< 0x00000002 */
 #define USB_OTG_DOEPINT_EPDISD                  USB_OTG_DOEPINT_EPDISD_Msk     /*!< Endpoint disabled interrupt */
 #define USB_OTG_DOEPINT_AHBERR_Pos               (2U)
 #define USB_OTG_DOEPINT_AHBERR_Msk               (0x1UL << USB_OTG_DOEPINT_AHBERR_Pos) /*!< 0x00000004 */
 #define USB_OTG_DOEPINT_AHBERR                   USB_OTG_DOEPINT_AHBERR_Msk   /*!< AHB Error (AHBErr) during an OUT transaction */
-#define USB_OTG_DOEPINT_STUP_Pos                (3U)                           
+#define USB_OTG_DOEPINT_STUP_Pos                (3U)
 #define USB_OTG_DOEPINT_STUP_Msk                (0x1UL << USB_OTG_DOEPINT_STUP_Pos) /*!< 0x00000008 */
 #define USB_OTG_DOEPINT_STUP                    USB_OTG_DOEPINT_STUP_Msk       /*!< SETUP phase done */
-#define USB_OTG_DOEPINT_OTEPDIS_Pos             (4U)                           
+#define USB_OTG_DOEPINT_OTEPDIS_Pos             (4U)
 #define USB_OTG_DOEPINT_OTEPDIS_Msk             (0x1UL << USB_OTG_DOEPINT_OTEPDIS_Pos) /*!< 0x00000010 */
 #define USB_OTG_DOEPINT_OTEPDIS                 USB_OTG_DOEPINT_OTEPDIS_Msk    /*!< OUT token received when endpoint disabled */
-#define USB_OTG_DOEPINT_OTEPSPR_Pos              (5U)                          
+#define USB_OTG_DOEPINT_OTEPSPR_Pos              (5U)
 #define USB_OTG_DOEPINT_OTEPSPR_Msk              (0x1UL << USB_OTG_DOEPINT_OTEPSPR_Pos) /*!< 0x00000020 */
 #define USB_OTG_DOEPINT_OTEPSPR                  USB_OTG_DOEPINT_OTEPSPR_Msk   /*!< Status Phase Received For Control Write */
-#define USB_OTG_DOEPINT_B2BSTUP_Pos             (6U)                           
+#define USB_OTG_DOEPINT_B2BSTUP_Pos             (6U)
 #define USB_OTG_DOEPINT_B2BSTUP_Msk             (0x1UL << USB_OTG_DOEPINT_B2BSTUP_Pos) /*!< 0x00000040 */
 #define USB_OTG_DOEPINT_B2BSTUP                 USB_OTG_DOEPINT_B2BSTUP_Msk    /*!< Back-to-back SETUP packets received */
 #define USB_OTG_DOEPINT_OUTPKTERR_Pos            (8U)
@@ -1387,7 +1387,7 @@ typedef struct
 #define USB_OTG_DOEPINT_NAK_Pos                  (13U)
 #define USB_OTG_DOEPINT_NAK_Msk                  (0x1UL << USB_OTG_DOEPINT_NAK_Pos) /*!< 0x00002000 */
 #define USB_OTG_DOEPINT_NAK                      USB_OTG_DOEPINT_NAK_Msk   /*!< NAK Packet is transmitted by the device */
-#define USB_OTG_DOEPINT_NYET_Pos                (14U)                          
+#define USB_OTG_DOEPINT_NYET_Pos                (14U)
 #define USB_OTG_DOEPINT_NYET_Msk                (0x1UL << USB_OTG_DOEPINT_NYET_Pos) /*!< 0x00004000 */
 #define USB_OTG_DOEPINT_NYET                    USB_OTG_DOEPINT_NYET_Msk       /*!< NYET interrupt */
 #define USB_OTG_DOEPINT_STPKTRX_Pos              (15U)
@@ -1395,50 +1395,50 @@ typedef struct
 #define USB_OTG_DOEPINT_STPKTRX                  USB_OTG_DOEPINT_STPKTRX_Msk   /*!< Setup Packet Received */
 /********************  Bit definition for USB_OTG_DOEPTSIZ register  ********************/
 
-#define USB_OTG_DOEPTSIZ_XFRSIZ_Pos             (0U)                           
+#define USB_OTG_DOEPTSIZ_XFRSIZ_Pos             (0U)
 #define USB_OTG_DOEPTSIZ_XFRSIZ_Msk             (0x7FFFFUL << USB_OTG_DOEPTSIZ_XFRSIZ_Pos) /*!< 0x0007FFFF */
 #define USB_OTG_DOEPTSIZ_XFRSIZ                 USB_OTG_DOEPTSIZ_XFRSIZ_Msk    /*!< Transfer size */
-#define USB_OTG_DOEPTSIZ_PKTCNT_Pos             (19U)                          
+#define USB_OTG_DOEPTSIZ_PKTCNT_Pos             (19U)
 #define USB_OTG_DOEPTSIZ_PKTCNT_Msk             (0x3FFUL << USB_OTG_DOEPTSIZ_PKTCNT_Pos) /*!< 0x1FF80000 */
 #define USB_OTG_DOEPTSIZ_PKTCNT                 USB_OTG_DOEPTSIZ_PKTCNT_Msk    /*!< Packet count */
 
-#define USB_OTG_DOEPTSIZ_STUPCNT_Pos            (29U)                          
+#define USB_OTG_DOEPTSIZ_STUPCNT_Pos            (29U)
 #define USB_OTG_DOEPTSIZ_STUPCNT_Msk            (0x3UL << USB_OTG_DOEPTSIZ_STUPCNT_Pos) /*!< 0x60000000 */
 #define USB_OTG_DOEPTSIZ_STUPCNT                USB_OTG_DOEPTSIZ_STUPCNT_Msk   /*!< SETUP packet count */
 #define USB_OTG_DOEPTSIZ_STUPCNT_0              (0x1UL << USB_OTG_DOEPTSIZ_STUPCNT_Pos) /*!< 0x20000000 */
 #define USB_OTG_DOEPTSIZ_STUPCNT_1              (0x2UL << USB_OTG_DOEPTSIZ_STUPCNT_Pos) /*!< 0x40000000 */
 
 /********************  Bit definition for PCGCCTL register  ********************/
-#define USB_OTG_PCGCCTL_STOPCLK_Pos             (0U)                           
+#define USB_OTG_PCGCCTL_STOPCLK_Pos             (0U)
 #define USB_OTG_PCGCCTL_STOPCLK_Msk             (0x1UL << USB_OTG_PCGCCTL_STOPCLK_Pos) /*!< 0x00000001 */
 #define USB_OTG_PCGCCTL_STOPCLK                 USB_OTG_PCGCCTL_STOPCLK_Msk    /*!< SETUP packet count */
-#define USB_OTG_PCGCCTL_GATECLK_Pos             (1U)                           
+#define USB_OTG_PCGCCTL_GATECLK_Pos             (1U)
 #define USB_OTG_PCGCCTL_GATECLK_Msk             (0x1UL << USB_OTG_PCGCCTL_GATECLK_Pos) /*!< 0x00000002 */
 #define USB_OTG_PCGCCTL_GATECLK                 USB_OTG_PCGCCTL_GATECLK_Msk    /*!<Bit 0 */
-#define USB_OTG_PCGCCTL_PHYSUSP_Pos             (4U)                           
+#define USB_OTG_PCGCCTL_PHYSUSP_Pos             (4U)
 #define USB_OTG_PCGCCTL_PHYSUSP_Msk             (0x1UL << USB_OTG_PCGCCTL_PHYSUSP_Pos) /*!< 0x00000010 */
 #define USB_OTG_PCGCCTL_PHYSUSP                 USB_OTG_PCGCCTL_PHYSUSP_Msk    /*!<Bit 1 */
 
 /* Legacy define */
 /********************  Bit definition for OTG register  ********************/
-#define USB_OTG_CHNUM_Pos                       (0U)                           
+#define USB_OTG_CHNUM_Pos                       (0U)
 #define USB_OTG_CHNUM_Msk                       (0xFUL << USB_OTG_CHNUM_Pos)    /*!< 0x0000000F */
 #define USB_OTG_CHNUM                           USB_OTG_CHNUM_Msk              /*!< Channel number */
 #define USB_OTG_CHNUM_0                         (0x1UL << USB_OTG_CHNUM_Pos)    /*!< 0x00000001 */
 #define USB_OTG_CHNUM_1                         (0x2UL << USB_OTG_CHNUM_Pos)    /*!< 0x00000002 */
 #define USB_OTG_CHNUM_2                         (0x4UL << USB_OTG_CHNUM_Pos)    /*!< 0x00000004 */
 #define USB_OTG_CHNUM_3                         (0x8UL << USB_OTG_CHNUM_Pos)    /*!< 0x00000008 */
-#define USB_OTG_BCNT_Pos                        (4U)                           
+#define USB_OTG_BCNT_Pos                        (4U)
 #define USB_OTG_BCNT_Msk                        (0x7FFUL << USB_OTG_BCNT_Pos)   /*!< 0x00007FF0 */
 #define USB_OTG_BCNT                            USB_OTG_BCNT_Msk               /*!< Byte count */
 
-#define USB_OTG_DPID_Pos                        (15U)                          
+#define USB_OTG_DPID_Pos                        (15U)
 #define USB_OTG_DPID_Msk                        (0x3UL << USB_OTG_DPID_Pos)     /*!< 0x00018000 */
 #define USB_OTG_DPID                            USB_OTG_DPID_Msk               /*!< Data PID */
 #define USB_OTG_DPID_0                          (0x1UL << USB_OTG_DPID_Pos)     /*!< 0x00008000 */
 #define USB_OTG_DPID_1                          (0x2UL << USB_OTG_DPID_Pos)     /*!< 0x00010000 */
 
-#define USB_OTG_PKTSTS_Pos                      (17U)                          
+#define USB_OTG_PKTSTS_Pos                      (17U)
 #define USB_OTG_PKTSTS_Msk                      (0xFUL << USB_OTG_PKTSTS_Pos)   /*!< 0x001E0000 */
 #define USB_OTG_PKTSTS                          USB_OTG_PKTSTS_Msk             /*!< Packet status */
 #define USB_OTG_PKTSTS_0                        (0x1UL << USB_OTG_PKTSTS_Pos)   /*!< 0x00020000 */
@@ -1446,7 +1446,7 @@ typedef struct
 #define USB_OTG_PKTSTS_2                        (0x4UL << USB_OTG_PKTSTS_Pos)   /*!< 0x00080000 */
 #define USB_OTG_PKTSTS_3                        (0x8UL << USB_OTG_PKTSTS_Pos)   /*!< 0x00100000 */
 
-#define USB_OTG_EPNUM_Pos                       (0U)                           
+#define USB_OTG_EPNUM_Pos                       (0U)
 #define USB_OTG_EPNUM_Msk                       (0xFUL << USB_OTG_EPNUM_Pos)    /*!< 0x0000000F */
 #define USB_OTG_EPNUM                           USB_OTG_EPNUM_Msk              /*!< Endpoint number */
 #define USB_OTG_EPNUM_0                         (0x1UL << USB_OTG_EPNUM_Pos)    /*!< 0x00000001 */
@@ -1454,7 +1454,7 @@ typedef struct
 #define USB_OTG_EPNUM_2                         (0x4UL << USB_OTG_EPNUM_Pos)    /*!< 0x00000004 */
 #define USB_OTG_EPNUM_3                         (0x8UL << USB_OTG_EPNUM_Pos)    /*!< 0x00000008 */
 
-#define USB_OTG_FRMNUM_Pos                      (21U)                          
+#define USB_OTG_FRMNUM_Pos                      (21U)
 #define USB_OTG_FRMNUM_Msk                      (0xFUL << USB_OTG_FRMNUM_Pos)   /*!< 0x01E00000 */
 #define USB_OTG_FRMNUM                          USB_OTG_FRMNUM_Msk             /*!< Frame number */
 #define USB_OTG_FRMNUM_0                        (0x1UL << USB_OTG_FRMNUM_Pos)   /*!< 0x00200000 */
diff --git a/src/portable/sunxi/dcd_sunxi_musb.c b/src/portable/sunxi/dcd_sunxi_musb.c
index 2d0e379ad..e26be775d 100644
--- a/src/portable/sunxi/dcd_sunxi_musb.c
+++ b/src/portable/sunxi/dcd_sunxi_musb.c
@@ -996,7 +996,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   if (dir_in) {
     USBC_Writew(mps, USBC_REG_TXMAXP(USBC0_BASE));
 
-    reg_val = (1 << USBC_BP_TXCSR_D_MODE) 
+    reg_val = (1 << USBC_BP_TXCSR_D_MODE)
       | (1 << USBC_BP_TXCSR_D_FLUSH_FIFO)
       | (1 << USBC_BP_TXCSR_D_CLEAR_DATA_TOGGLE);
     if  (xfer == TUSB_XFER_ISOCHRONOUS)
@@ -1048,7 +1048,7 @@ void dcd_edpt_close_all(uint8_t rhport)
       USBC_REG_TXCSR(USBC0_BASE));
 
     USBC_Writew(0, USBC_REG_RXMAXP(USBC0_BASE));
-	  USBC_Writew((1 << USBC_BP_RXCSR_D_CLEAR_DATA_TOGGLE) | (1 << USBC_BP_RXCSR_D_FLUSH_FIFO), 
+	  USBC_Writew((1 << USBC_BP_RXCSR_D_CLEAR_DATA_TOGGLE) | (1 << USBC_BP_RXCSR_D_FLUSH_FIFO),
       USBC_REG_RXCSR(USBC0_BASE));
 
     USBC_Writew(0, USBC_REG_TXFIFOAD(USBC0_BASE));
@@ -1078,7 +1078,7 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
   } else {
     USBC_INT_DisableRxEp(epn);
     USBC_Writew(0, USBC_REG_RXMAXP(USBC0_BASE));
-	  USBC_Writew((1 << USBC_BP_RXCSR_D_CLEAR_DATA_TOGGLE) | (1 << USBC_BP_RXCSR_D_FLUSH_FIFO), 
+	  USBC_Writew((1 << USBC_BP_RXCSR_D_CLEAR_DATA_TOGGLE) | (1 << USBC_BP_RXCSR_D_FLUSH_FIFO),
       USBC_REG_RXCSR(USBC0_BASE));
 
     USBC_Writew(0, USBC_REG_RXFIFOAD(USBC0_BASE));
diff --git a/src/portable/template/dcd_template.c b/src/portable/template/dcd_template.c
index 26b5dce9d..590dd9fcf 100644
--- a/src/portable/template/dcd_template.c
+++ b/src/portable/template/dcd_template.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2018, hathach (tinyusb.org)
diff --git a/src/portable/valentyusb/eptri/dcd_eptri.c b/src/portable/valentyusb/eptri/dcd_eptri.c
index a3f228dd9..58628a8bb 100644
--- a/src/portable/valentyusb/eptri/dcd_eptri.c
+++ b/src/portable/valentyusb/eptri/dcd_eptri.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/portable/valentyusb/eptri/dcd_eptri.h b/src/portable/valentyusb/eptri/dcd_eptri.h
index 0fa6ecc64..d67635d7c 100644
--- a/src/portable/valentyusb/eptri/dcd_eptri.h
+++ b/src/portable/valentyusb/eptri/dcd_eptri.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/src/portable/wch/ch32v307/dcd_usbhs.c b/src/portable/wch/ch32v307/dcd_usbhs.c
index b7a79e166..3ad011cff 100644
--- a/src/portable/wch/ch32v307/dcd_usbhs.c
+++ b/src/portable/wch/ch32v307/dcd_usbhs.c
@@ -1,7 +1,7 @@
-/* 
+/*
  * The MIT License (MIT)
  *
- * Copyright (c) 2022 Greg Davill 
+ * Copyright (c) 2022 Greg Davill
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -261,7 +261,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to
                 USBHS_Dev_Endp0_Tog ^= 1;
             } else {
                 xfer->queued_len += short_packet_size;
-                
+
                 EP_TX_DMA_ADDR(epnum) = (uint32_t)buffer;
                 USBHSD->ENDP_CONFIG |= (USBHS_EP0_T_EN << epnum);
                 EP_TX_LEN(epnum) = short_packet_size;
@@ -366,7 +366,7 @@ void dcd_int_handler(uint8_t rhport) {
     } else if (intflag & USBHS_SETUP_FLAG) {
         USBHS_Dev_Endp0_Tog = 1;
         dcd_event_setup_received(0, EP0_DatabufHD, true);
-        
+
         USBHSD->INT_FG = USBHS_SETUP_FLAG; /* Clear flag */
     } else if (intflag & USBHS_DETECT_FLAG) {
         USBHS_Dev_Endp0_Tog = 1;
diff --git a/test/fuzz/dcd_fuzz.cc b/test/fuzz/dcd_fuzz.cc
index 6403015dd..06ddddc4a 100644
--- a/test/fuzz/dcd_fuzz.cc
+++ b/test/fuzz/dcd_fuzz.cc
@@ -185,7 +185,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer,
 
 /* TODO: implement a fuzzed version of this.
 bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t *ff,
-                        uint16_t total_bytes) {} 
+                        uint16_t total_bytes) {}
 */
 
 // Stall endpoint, any queuing transfer should be removed from endpoint
@@ -205,4 +205,4 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
   UNUSED(ep_addr);
   return;
 }
-}
\ No newline at end of file
+}
diff --git a/test/fuzz/device/cdc/CMakeLists.txt b/test/fuzz/device/cdc/CMakeLists.txt
index fa6e83b7e..8e4db9d29 100644
--- a/test/fuzz/device/cdc/CMakeLists.txt
+++ b/test/fuzz/device/cdc/CMakeLists.txt
@@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
\ No newline at end of file
+family_configure_device_example(${PROJECT})
diff --git a/test/fuzz/device/cdc/src/fuzz.cc b/test/fuzz/device/cdc/src/fuzz.cc
index d40483ca6..0560e8621 100644
--- a/test/fuzz/device/cdc/src/fuzz.cc
+++ b/test/fuzz/device/cdc/src/fuzz.cc
@@ -143,7 +143,7 @@ void cdc_task(FuzzedDataProvider *provider) {
     // TODO: Fuzz interface number
     (void)tud_cdc_n_write(0, buffer.data(), buffer.size());
   } break;
-  
+
 case kCdcNWriteChar:
   // TODO: Fuzz interface number
   (void)tud_cdc_n_write_char(0, provider->ConsumeIntegral<char>());
@@ -171,4 +171,4 @@ case kMaxValue:
   break;
 }
 }
-}
\ No newline at end of file
+}
diff --git a/test/fuzz/device/msc/CMakeLists.txt b/test/fuzz/device/msc/CMakeLists.txt
index fa6e83b7e..8e4db9d29 100644
--- a/test/fuzz/device/msc/CMakeLists.txt
+++ b/test/fuzz/device/msc/CMakeLists.txt
@@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
\ No newline at end of file
+family_configure_device_example(${PROJECT})
diff --git a/test/fuzz/device/msc/src/fuzz.cc b/test/fuzz/device/msc/src/fuzz.cc
index 568900452..371d49882 100644
--- a/test/fuzz/device/msc/src/fuzz.cc
+++ b/test/fuzz/device/msc/src/fuzz.cc
@@ -59,4 +59,3 @@ extern "C" int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
 
   return 0;
 }
-
diff --git a/test/fuzz/device/net/CMakeLists.txt b/test/fuzz/device/net/CMakeLists.txt
index fa6e83b7e..8e4db9d29 100644
--- a/test/fuzz/device/net/CMakeLists.txt
+++ b/test/fuzz/device/net/CMakeLists.txt
@@ -26,4 +26,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
\ No newline at end of file
+family_configure_device_example(${PROJECT})
diff --git a/test/fuzz/device/net/src/arch/cc.h b/test/fuzz/device/net/src/arch/cc.h
index 56a0cacf7..9f30b91cb 100644
--- a/test/fuzz/device/net/src/arch/cc.h
+++ b/test/fuzz/device/net/src/arch/cc.h
@@ -1,8 +1,8 @@
 /*
  * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
- * All rights reserved. 
- * 
- * Redistribution and use in source and binary forms, with or without modification, 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
  * are permitted provided that the following conditions are met:
  *
  * 1. Redistributions of source code must retain the above copyright notice,
@@ -11,21 +11,21 @@
  *    this list of conditions and the following disclaimer in the documentation
  *    and/or other materials provided with the distribution.
  * 3. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission. 
+ *    derived from this software without specific prior written permission.
  *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT 
- * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT 
- * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 
- * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  * OF SUCH DAMAGE.
  *
  * This file is part of the lwIP TCP/IP stack.
- * 
+ *
  * Author: Adam Dunkels <adam@sics.se>
  *
  */
@@ -42,7 +42,7 @@ typedef int sys_prot_t;
 #if defined (__ICCARM__)
 
 #define PACK_STRUCT_BEGIN
-#define PACK_STRUCT_STRUCT 
+#define PACK_STRUCT_STRUCT
 #define PACK_STRUCT_END
 #define PACK_STRUCT_FIELD(x) x
 #define PACK_STRUCT_USE_INCLUDES
@@ -50,7 +50,7 @@ typedef int sys_prot_t;
 #elif defined (__CC_ARM)
 
 #define PACK_STRUCT_BEGIN __packed
-#define PACK_STRUCT_STRUCT 
+#define PACK_STRUCT_STRUCT
 #define PACK_STRUCT_END
 #define PACK_STRUCT_FIELD(x) x
 
diff --git a/test/fuzz/device/net/src/fuzz.cc b/test/fuzz/device/net/src/fuzz.cc
index ea4943665..a6935928a 100644
--- a/test/fuzz/device/net/src/fuzz.cc
+++ b/test/fuzz/device/net/src/fuzz.cc
@@ -81,7 +81,7 @@ void net_task(FuzzedDataProvider *provider) {
 
   assert(provider != NULL);
   switch (provider->ConsumeEnum<NetApiFuncs>()) {
-  
+
   case kNetworkRecvRenew:
     tud_network_recv_renew();
     break;
diff --git a/test/fuzz/device/net/src/lwipopts.h b/test/fuzz/device/net/src/lwipopts.h
index a215017c7..336c9243d 100644
--- a/test/fuzz/device/net/src/lwipopts.h
+++ b/test/fuzz/device/net/src/lwipopts.h
@@ -1,8 +1,8 @@
 /*
  * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
- * All rights reserved. 
- * 
- * Redistribution and use in source and binary forms, with or without modification, 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
  * are permitted provided that the following conditions are met:
  *
  * 1. Redistributions of source code must retain the above copyright notice,
@@ -11,21 +11,21 @@
  *    this list of conditions and the following disclaimer in the documentation
  *    and/or other materials provided with the distribution.
  * 3. The name of the author may not be used to endorse or promote products
- *    derived from this software without specific prior written permission. 
+ *    derived from this software without specific prior written permission.
  *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT 
- * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT 
- * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 
- * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  * OF SUCH DAMAGE.
  *
  * This file is part of the lwIP TCP/IP stack.
- * 
+ *
  * Author: Simon Goldschmidt
  *
  */
diff --git a/test/fuzz/dicts/cdc.dict b/test/fuzz/dicts/cdc.dict
index 138775cdc..421eb8ed9 100644
--- a/test/fuzz/dicts/cdc.dict
+++ b/test/fuzz/dicts/cdc.dict
@@ -71,4 +71,3 @@ RNDIS_PACKET_TYPE_FUNCTIONAL="\x00\x00\x40\x00"
 # NIC driver frames that a Token Ring NIC receives.
 RNDIS_PACKET_TYPE_MAC_FRAME="\x00\x00\x80\x00"
 RNDIS_PACKET_TYPE_NO_LOCAL="\x00\x01\x00\x00"
-
diff --git a/test/fuzz/make.mk b/test/fuzz/make.mk
index 934819665..b7b6d6a75 100644
--- a/test/fuzz/make.mk
+++ b/test/fuzz/make.mk
@@ -114,7 +114,7 @@ CXXFLAGS += \
 
 # conversion is too strict for most mcu driver, may be disable sign/int/arith-conversion
 #  -Wconversion
-  
+
 # Debugging/Optimization
 ifeq ($(DEBUG), 1)
   CFLAGS += -Og
@@ -132,4 +132,3 @@ endif
 ifneq ($(LOGGER),)
 	CMAKE_DEFSYM +=	-DLOGGER=$(LOGGER)
 endif
-
diff --git a/test/fuzz/msc_fuzz.cc b/test/fuzz/msc_fuzz.cc
index e906ca971..6e838a682 100644
--- a/test/fuzz/msc_fuzz.cc
+++ b/test/fuzz/msc_fuzz.cc
@@ -159,4 +159,4 @@ int32_t tud_msc_scsi_cb(uint8_t lun, uint8_t const scsi_cmd[16], void *buffer,
 }
 }
 
-#endif
\ No newline at end of file
+#endif
diff --git a/test/fuzz/net_fuzz.cc b/test/fuzz/net_fuzz.cc
index 8467d6d8e..3158e74ef 100644
--- a/test/fuzz/net_fuzz.cc
+++ b/test/fuzz/net_fuzz.cc
@@ -79,4 +79,4 @@ void tud_network_link_state_cb(bool state) {
 }
 }
 
-#endif
\ No newline at end of file
+#endif
diff --git a/test/fuzz/rules.mk b/test/fuzz/rules.mk
index d9c2a1a77..825abddc5 100644
--- a/test/fuzz/rules.mk
+++ b/test/fuzz/rules.mk
@@ -89,7 +89,7 @@ endif
 # Rules
 # ---------------------------------------
 
-all: $(BUILD)/$(PROJECT) 
+all: $(BUILD)/$(PROJECT)
 
 OBJ_DIRS = $(sort $(dir $(OBJ)))
 $(OBJ): | $(OBJ_DIRS)
@@ -111,7 +111,7 @@ vpath %.c . $(TOP)
 $(BUILD)/obj/%.o: %.c
 	@echo CC $(notdir $@)
 	@$(CC) $(CFLAGS) -c -MD -o $@ $<
-	
+
 # All cpp srcs
 vpath %.cc . $(TOP)
 $(BUILD)/obj/%_cxx.o: %.cc
@@ -158,4 +158,4 @@ linkermap: $(BUILD)/$(PROJECT)
 # Print out the value of a make variable.
 # https://stackoverflow.com/questions/16467718/how-to-print-out-a-variable-in-makefile
 print-%:
-	@echo $* = $($*)
\ No newline at end of file
+	@echo $* = $($*)
diff --git a/test/unit-test/test/device/msc/test_msc_device.c b/test/unit-test/test/device/msc/test_msc_device.c
index 63684e76a..c757cdcfa 100644
--- a/test/unit-test/test/device/msc/test_msc_device.c
+++ b/test/unit-test/test/device/msc/test_msc_device.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019, hathach (tinyusb.org)
diff --git a/test/unit-test/test/device/usbd/test_usbd.c b/test/unit-test/test/device/usbd/test_usbd.c
index ad95eb47a..dcded605a 100644
--- a/test/unit-test/test/device/usbd/test_usbd.c
+++ b/test/unit-test/test/device/usbd/test_usbd.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019, Ha Thach (tinyusb.org)
diff --git a/test/unit-test/test/test_fifo.c b/test/unit-test/test/test_fifo.c
index 28be6d8fc..3b4deb33e 100644
--- a/test/unit-test/test/test_fifo.c
+++ b/test/unit-test/test/test_fifo.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling.rb b/test/unit-test/vendor/ceedling/lib/ceedling.rb
index 7f3400236..6c57fb48d 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling.rb
@@ -96,4 +96,3 @@ module Ceedling
     DEFAULT_CEEDLING_CONFIG[:plugins][:load_paths] << gem_dir
   end
 end
-
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/build_invoker_utils.rb b/test/unit-test/vendor/ceedling/lib/ceedling/build_invoker_utils.rb
index 5727bcabc..31abe6d99 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/build_invoker_utils.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/build_invoker_utils.rb
@@ -5,7 +5,7 @@ require 'ceedling/constants'
 class BuildInvokerUtils
 
   constructor :configurator, :streaminator
- 
+
   ##
   # Processes exceptions and tries to display a useful message for the user.
   #
@@ -13,27 +13,27 @@ class BuildInvokerUtils
   #
   # * _exception_:  The exception given by a rescue statement.
   # * _context_:    A symbol representing where in the build the exception
-  # occurs. 
+  # occurs.
   # * _test_build_: A bool to signify if the exception occurred while building
   # from test or source.
   #
   def process_exception(exception, context, test_build=true)
     if (exception.message =~ /Don't know how to build task '(.+)'/i)
       error_header  = "ERROR: Rake could not find file referenced in source"
-      error_header += " or test" if (test_build) 
+      error_header += " or test" if (test_build)
       error_header += ": '#{$1}'. Possible stale dependency."
-      
+
       @streaminator.stderr_puts( error_header )
 
       if (@configurator.project_use_deep_dependencies)
-        help_message = "Try fixing #include statements or adding missing file. Then run '#{REFRESH_TASK_ROOT}#{context.to_s}' task and try again."      
+        help_message = "Try fixing #include statements or adding missing file. Then run '#{REFRESH_TASK_ROOT}#{context.to_s}' task and try again."
         @streaminator.stderr_puts( help_message )
       end
-      
+
       raise ''
     else
       raise exception
     end
   end
-  
+
 end
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator.rb
index 519a4aab4..fd7451fa7 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator.rb
@@ -2,7 +2,7 @@
 class Cacheinator
 
   constructor :cacheinator_helper, :file_path_utils, :file_wrapper, :yaml_wrapper
-  
+
   def cache_test_config(hash)
     @yaml_wrapper.dump( @file_path_utils.form_test_build_cache_path( INPUT_CONFIGURATION_CACHE_FILE), hash )
   end
@@ -11,15 +11,15 @@ class Cacheinator
     @yaml_wrapper.dump( @file_path_utils.form_release_build_cache_path( INPUT_CONFIGURATION_CACHE_FILE ), hash )
   end
 
-  
+
   def diff_cached_test_file( filepath )
     cached_filepath = @file_path_utils.form_test_build_cache_path( filepath )
-  
+
     if (@file_wrapper.exist?( cached_filepath ) and (!@file_wrapper.compare( filepath, cached_filepath )))
       @file_wrapper.cp(filepath, cached_filepath, {:preserve => false})
       return filepath
     elsif (!@file_wrapper.exist?( cached_filepath ))
-      @file_wrapper.cp(filepath, cached_filepath, {:preserve => false}) 
+      @file_wrapper.cp(filepath, cached_filepath, {:preserve => false})
       return filepath
     end
 
@@ -43,5 +43,5 @@ class Cacheinator
 
     return @cacheinator_helper.diff_cached_config?( cached_filepath, hash )
   end
-  
+
 end
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator_helper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator_helper.rb
index 14e8a6ef0..b7fa5863f 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator_helper.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/cacheinator_helper.rb
@@ -2,7 +2,7 @@
 class CacheinatorHelper
 
   constructor :file_wrapper, :yaml_wrapper
-  
+
   def diff_cached_config?(cached_filepath, hash)
     return false if ( not @file_wrapper.exist?(cached_filepath) )
     return true if (@yaml_wrapper.load(cached_filepath) != hash)
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/cmock_builder.rb b/test/unit-test/vendor/ceedling/lib/ceedling/cmock_builder.rb
index 4a74aa842..82ef96135 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/cmock_builder.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/cmock_builder.rb
@@ -1,13 +1,13 @@
 require 'cmock'
 
 class CmockBuilder
-  
+
   attr_accessor :cmock
-  
-  def setup 
+
+  def setup
     @cmock = nil
   end
-  
+
   def manufacture(cmock_config)
     @cmock = CMock.new(cmock_config)
   end
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/configurator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/configurator.rb
index 0ae4d04a8..8dc11aa5a 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/configurator.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/configurator.rb
@@ -379,4 +379,3 @@ class Configurator
 
 
 end
-
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/configurator_plugins.rb b/test/unit-test/vendor/ceedling/lib/ceedling/configurator_plugins.rb
index 75bcd982d..c2e198597 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/configurator_plugins.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/configurator_plugins.rb
@@ -109,7 +109,7 @@ class ConfiguratorPlugins
     return defaults_with_path
   end
 
-  # gather up and return 
+  # gather up and return
   def find_plugin_hash_defaults(config, plugin_paths)
     defaults_hash= []
 
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/configurator_setup.rb b/test/unit-test/vendor/ceedling/lib/ceedling/configurator_setup.rb
index c43bb5c12..cba88df3c 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/configurator_setup.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/configurator_setup.rb
@@ -79,7 +79,7 @@ class ConfiguratorSetup
 
     if config[:cmock][:unity_helper]
       config[:cmock][:unity_helper].each do |path|
-        validation << @configurator_validator.validate_filepath_simple( path, :cmock, :unity_helper ) 
+        validation << @configurator_validator.validate_filepath_simple( path, :cmock, :unity_helper )
       end
     end
 
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/configurator_validator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/configurator_validator.rb
index fc0210124..fc2950e0b 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/configurator_validator.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/configurator_validator.rb
@@ -6,7 +6,7 @@ require 'ceedling/file_path_utils'  # for glob handling class methods
 
 
 class ConfiguratorValidator
-  
+
   constructor :file_wrapper, :stream_wrapper, :system_wrapper
 
   # walk into config hash verify existence of data at key depth
@@ -16,9 +16,9 @@ class ConfiguratorValidator
 
     if (not exist)
       # no verbosity checking since this is lowest level anyhow & verbosity checking depends on configurator
-      @stream_wrapper.stderr_puts("ERROR: Required config file entry #{format_key_sequence(keys, hash[:depth])} does not exist.")    
+      @stream_wrapper.stderr_puts("ERROR: Required config file entry #{format_key_sequence(keys, hash[:depth])} does not exist.")
     end
-    
+
     return exist
   end
 
@@ -33,39 +33,39 @@ class ConfiguratorValidator
 
     path_list = []
     exist = true
-    
+
     case list
       when String then path_list << list
       when Array  then path_list =  list
     end
-    
+
     path_list.each do |path|
       base_path = FilePathUtils::extract_path(path) # lop off add/subtract notation & glob specifiers
-      
+
       if (not @file_wrapper.exist?(base_path))
         # no verbosity checking since this is lowest level anyhow & verbosity checking depends on configurator
-        @stream_wrapper.stderr_puts("ERROR: Config path #{format_key_sequence(keys, hash[:depth])}['#{base_path}'] does not exist on disk.") 
+        @stream_wrapper.stderr_puts("ERROR: Config path #{format_key_sequence(keys, hash[:depth])}['#{base_path}'] does not exist on disk.")
         exist = false
-      end 
+      end
     end
-    
+
     return exist
   end
 
-  
+
   # simple path verification
   def validate_filepath_simple(path, *keys)
     validate_path = path
-    
+
     if (not @file_wrapper.exist?(validate_path))
       # no verbosity checking since this is lowest level anyhow & verbosity checking depends on configurator
-      @stream_wrapper.stderr_puts("ERROR: Config path '#{validate_path}' associated with #{format_key_sequence(keys, keys.size)} does not exist on disk.") 
+      @stream_wrapper.stderr_puts("ERROR: Config path '#{validate_path}' associated with #{format_key_sequence(keys, keys.size)} does not exist on disk.")
       return false
-    end 
-    
+    end
+
     return true
   end
- 
+
   # walk into config hash. verify specified file exists.
   def validate_filepath(config, *keys)
     hash          = retrieve_value(config, keys)
@@ -76,21 +76,21 @@ class ConfiguratorValidator
 
     # skip everything if we've got an argument replacement pattern
     return true if (filepath =~ TOOL_EXECUTOR_ARGUMENT_REPLACEMENT_PATTERN)
-    
+
     if (not @file_wrapper.exist?(filepath))
 
       # See if we can deal with it internally.
-      if GENERATED_DIR_PATH.include?(filepath)      
+      if GENERATED_DIR_PATH.include?(filepath)
         # we already made this directory before let's make it again.
         FileUtils.mkdir_p File.join(File.dirname(__FILE__), filepath)
-        @stream_wrapper.stderr_puts("WARNING: Generated filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist on disk. Recreating") 
- 
+        @stream_wrapper.stderr_puts("WARNING: Generated filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist on disk. Recreating")
+
       else
         # no verbosity checking since this is lowest level anyhow & verbosity checking depends on configurator
         @stream_wrapper.stderr_puts("ERROR: Config filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist on disk.")
         return false
       end
-    end      
+    end
 
     return true
   end
@@ -106,17 +106,17 @@ class ConfiguratorValidator
 
     # skip everything if we've got an argument replacement pattern
     return true if (filepath =~ TOOL_EXECUTOR_ARGUMENT_REPLACEMENT_PATTERN)
-    
+
     # if there's no path included, verify file exists somewhere in system search paths
     if (not filepath.include?('/'))
       exists = false
-      
+
       @system_wrapper.search_paths.each do |path|
         if (@file_wrapper.exist?( File.join(path, filepath)) )
           exists = true
           break
         end
-        
+
         if (@file_wrapper.exist?( (File.join(path, filepath)).ext( exe_extension ) ))
           exists = true
           break
@@ -125,25 +125,25 @@ class ConfiguratorValidator
           break
         end
       end
-      
+
       if (not exists)
         # no verbosity checking since this is lowest level anyhow & verbosity checking depends on configurator
-        @stream_wrapper.stderr_puts("ERROR: Config filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist in system search paths.") 
-        return false        
+        @stream_wrapper.stderr_puts("ERROR: Config filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist in system search paths.")
+        return false
       end
-      
+
     # if there is a path included, check that explicit filepath exists
     else
       if (not @file_wrapper.exist?(filepath))
         # no verbosity checking since this is lowest level anyhow & verbosity checking depends on configurator
-        @stream_wrapper.stderr_puts("ERROR: Config filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist on disk.") 
+        @stream_wrapper.stderr_puts("ERROR: Config filepath #{format_key_sequence(keys, hash[:depth])}['#{filepath}'] does not exist on disk.")
         return false
-      end      
+      end
     end
 
     return true
   end
-  
+
   def validate_tool_stderr_redirect(config, tools, tool)
     redirect = config[tools][tool][:stderr_redirect]
     if (redirect.class == Symbol)
@@ -151,17 +151,17 @@ class ConfiguratorValidator
       if (not StdErrRedirect.constants.map{|constant| constant.to_s}.include?(redirect.to_s.upcase))
         error = "ERROR: [:#{tools}][:#{tool}][:stderr_redirect][:#{redirect}] is not a recognized option " +
                 "{#{StdErrRedirect.constants.map{|constant| ':' + constant.to_s.downcase}.join(', ')}}."
-        @stream_wrapper.stderr_puts(error) 
-        return false        
+        @stream_wrapper.stderr_puts(error)
+        return false
       end
     end
-    
+
     return true
   end
-  
+
   private #########################################
-  
-  
+
+
   def retrieve_value(config, keys)
     value = nil
     hash  = config
@@ -178,7 +178,7 @@ class ConfiguratorValidator
         break
       end
     end
-    
+
     return {:value => value, :depth => depth}
   end
 
@@ -186,8 +186,8 @@ class ConfiguratorValidator
   def format_key_sequence(keys, depth)
     walked_keys    = keys.slice(0, depth)
     formatted_keys = walked_keys.map{|key| "[:#{key.to_s}]"}
-    
+
     return formatted_keys.join
   end
-  
+
 end
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/erb_wrapper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/erb_wrapper.rb
index 8d70b6d28..dab8d736b 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/erb_wrapper.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/erb_wrapper.rb
@@ -6,4 +6,4 @@ class ErbWrapper
       f << ERB.new(template, 0, "<>").result(binding)
     end
   end
-end
\ No newline at end of file
+end
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/file_finder.rb b/test/unit-test/vendor/ceedling/lib/ceedling/file_finder.rb
index 53775b7bb..4a1064c52 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/file_finder.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/file_finder.rb
@@ -146,4 +146,3 @@ class FileFinder
     return @file_finder_helper.find_file_in_collection(file_path, file_list, complain)
   end
 end
-
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/file_finder_helper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/file_finder_helper.rb
index a168e5cb5..f2d6a5e91 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/file_finder_helper.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/file_finder_helper.rb
@@ -4,11 +4,11 @@ require 'ceedling/constants' # for Verbosity enumeration
 class FileFinderHelper
 
   constructor :streaminator
-  
-  
+
+
   def find_file_in_collection(file_name, file_list, complain, extra_message="")
     file_to_find = nil
-    
+
     file_list.each do |item|
       base_file = File.basename(item)
 
@@ -22,29 +22,29 @@ class FileFinderHelper
           blow_up(file_name, "However, a filename having different capitalization was found: '#{item}'.")
         end
       end
-      
+
     end
-    
+
     if file_to_find.nil?
       case (complain)
-        when :error then blow_up(file_name, extra_message) 
+        when :error then blow_up(file_name, extra_message)
         when :warn  then gripe(file_name, extra_message)
-        #when :ignore then      
+        #when :ignore then
       end
     end
-    
+
     return file_to_find
   end
 
   private
-  
+
   def blow_up(file_name, extra_message="")
     error = "ERROR: Found no file '#{file_name}' in search paths."
     error += ' ' if (extra_message.length > 0)
     @streaminator.stderr_puts(error + extra_message, Verbosity::ERRORS)
     raise
   end
-  
+
   def gripe(file_name, extra_message="")
     warning = "WARNING: Found no file '#{file_name}' in search paths."
     warning += ' ' if (extra_message.length > 0)
@@ -52,5 +52,3 @@ class FileFinderHelper
   end
 
 end
-
-
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/file_system_utils.rb b/test/unit-test/vendor/ceedling/lib/ceedling/file_system_utils.rb
index 97e5856fb..245d8f826 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/file_system_utils.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/file_system_utils.rb
@@ -6,7 +6,7 @@ require 'ceedling/file_path_utils'
 
 
 class FileSystemUtils
-  
+
   constructor :file_wrapper
 
   # build up path list from input of one or more strings or arrays of (+/-) paths & globs
@@ -14,7 +14,7 @@ class FileSystemUtils
     raw   = []  # all paths and globs
     plus  = Set.new # all paths to expand and add
     minus = Set.new # all paths to remove from plus set
-    
+
     # assemble all globs and simple paths, reforming our glob notation to ruby globs
     paths.each do |paths_container|
       case (paths_container)
@@ -26,29 +26,29 @@ class FileSystemUtils
 
     # iterate through each path and glob
     raw.each do |path|
-    
+
       dirs = []  # container for only (expanded) paths
-    
+
       # if a glob, expand it and slurp up all non-file paths
       if path.include?('*')
         # grab base directory only if globs are snug up to final path separator
         if (path =~ /\/\*+$/)
           dirs << FilePathUtils.extract_path(path)
         end
-        
+
         # grab expanded sub-directory globs
         expanded = @file_wrapper.directory_listing( FilePathUtils.extract_path_no_aggregation_operators(path) )
         expanded.each do |entry|
           dirs << entry if @file_wrapper.directory?(entry)
         end
-        
+
       # else just grab simple path
       # note: we could just run this through glob expansion but such an
       #       approach doesn't handle a path not yet on disk)
       else
         dirs << FilePathUtils.extract_path_no_aggregation_operators(path)
       end
-      
+
       # add dirs to the appropriate set based on path aggregation modifier if present
       FilePathUtils.add_path?(path) ? plus.merge(dirs) : minus.merge(dirs)
     end
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/file_system_wrapper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/file_system_wrapper.rb
index 807cbd23f..1bb2883ee 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/file_system_wrapper.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/file_system_wrapper.rb
@@ -7,4 +7,4 @@ class FileSystemWrapper
     end
   end
 
-end
\ No newline at end of file
+end
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/flaginator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/flaginator.rb
index 31d62c46a..175b3c5ac 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/flaginator.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/flaginator.rb
@@ -29,25 +29,25 @@ class Flaginator
 
   def get_flag(hash, file_name)
     file_key = file_name.to_sym
-   
+
     # 1. try literals
-    literals, magic = partition(hash) { |k, v| k.to_s =~ /^\w+$/ }  
+    literals, magic = partition(hash) { |k, v| k.to_s =~ /^\w+$/ }
     return literals[file_key] if literals.include?(file_key)
-    
+
     any, regex = partition(magic) { |k, v| (k == :'*') || (k == :'.*')  } # glob or regex wild card
-    
+
     # 2. try regexes
     find_res = regex.find { |k, v| file_name =~ /^#{k.to_s}$/ }
     return find_res[1] if find_res
-    
+
     # 3. try anything
     find_res = any.find { |k, v| file_name =~ /.*/ }
     return find_res[1] if find_res
-      
+
     # 4. well, we've tried
     return []
   end
-  
+
   def flag_down( operation, context, file )
     # create configurator accessor method
     accessor = ('flags_' + context.to_s).to_sym
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/generator_helper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/generator_helper.rb
index 343156092..a6682c275 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/generator_helper.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/generator_helper.rb
@@ -9,7 +9,7 @@ class GeneratorHelper
   def test_results_error_handler(executable, shell_result)
     notice = ''
     error  = false
-    
+
     if (shell_result[:output].nil? or shell_result[:output].strip.empty?)
       error = true
       # mirror style of generic tool_executor failure output
@@ -24,7 +24,7 @@ class GeneratorHelper
                 "> Produced no final test result counts in $stdout:\n" +
                 "#{shell_result[:output].strip}\n"
     end
-    
+
     if (error)
       # since we told the tool executor to ignore the exit code, handle it explicitly here
       notice += "> And exited with status: [#{shell_result[:exit_code]}] (count of failed tests).\n" if (shell_result[:exit_code] != nil)
@@ -33,8 +33,8 @@ class GeneratorHelper
       notice += "> This is often a symptom of a bad memory access in source or test code.\n\n"
 
       @streaminator.stderr_puts(notice, Verbosity::COMPLAIN)
-      raise      
+      raise
     end
   end
-  
+
 end
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results.rb b/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results.rb
index 3af2d720a..2cd96478c 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results.rb
@@ -77,7 +77,7 @@ class GeneratorTestResults
     # handle anything preceding filename in line as extra output to be collected
     stdout = nil
     stdout_regex = /(.+)#{Regexp.escape(filename)}.+/i
-    unity_test_time = 0 
+    unity_test_time = 0
 
     if (line =~ stdout_regex)
       stdout = $1.clone
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results_sanity_checker.rb b/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results_sanity_checker.rb
index 0b518325b..1d193c844 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results_sanity_checker.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/generator_test_results_sanity_checker.rb
@@ -6,34 +6,34 @@ require 'ceedling/constants'
 class GeneratorTestResultsSanityChecker
 
   constructor :configurator, :streaminator
-  
+
   def verify(results, unity_exit_code)
-  
+
     # do no sanity checking if it's disabled
     return if (@configurator.sanity_checks == TestResultsSanityChecks::NONE)
     raise "results nil or empty" if results.nil? || results.empty?
 
-    ceedling_ignores_count   = results[:ignores].size 
+    ceedling_ignores_count   = results[:ignores].size
     ceedling_failures_count  = results[:failures].size
     ceedling_tests_summation = (ceedling_ignores_count + ceedling_failures_count + results[:successes].size)
 
-    # Exit code handling is not a sanity check that can always be performed because 
+    # Exit code handling is not a sanity check that can always be performed because
     # command line simulators may or may not pass through Unity's exit code
     if (@configurator.sanity_checks >= TestResultsSanityChecks::THOROUGH)
       # many platforms limit exit codes to a maximum of 255
       if ((ceedling_failures_count != unity_exit_code) and (unity_exit_code < 255))
         sanity_check_warning(results[:source][:file], "Unity's exit code (#{unity_exit_code}) does not match Ceedling's summation of failed test cases (#{ceedling_failures_count}).")
       end
-      
+
       if ((ceedling_failures_count < 255) and (unity_exit_code == 255))
         sanity_check_warning(results[:source][:file], "Ceedling's summation of failed test cases (#{ceedling_failures_count}) is less than Unity's exit code (255 or more).")
       end
     end
-    
+
     if (ceedling_ignores_count != results[:counts][:ignored])
       sanity_check_warning(results[:source][:file], "Unity's final ignore count (#{results[:counts][:ignored]}) does not match Ceedling's summation of ignored test cases (#{ceedling_ignores_count}).")
     end
-    
+
     if (ceedling_failures_count != results[:counts][:failed])
       sanity_check_warning(results[:source][:file], "Unity's final fail count (#{results[:counts][:failed]}) does not match Ceedling's summation of failed test cases (#{ceedling_failures_count}).")
     end
@@ -41,14 +41,14 @@ class GeneratorTestResultsSanityChecker
     if (ceedling_tests_summation != results[:counts][:total])
       sanity_check_warning(results[:source][:file], "Unity's final test count (#{results[:counts][:total]}) does not match Ceedling's summation of all test cases (#{ceedling_tests_summation}).")
     end
-    
+
   end
 
   private
-  
+
   def sanity_check_warning(file, message)
     unless defined?(CEEDLING_IGNORE_SANITY_CHECK)
-      notice = "\n" + 
+      notice = "\n" +
                "ERROR: Internal sanity check for test fixture '#{file.ext(@configurator.extension_executable)}' finds that #{message}\n" +
                "  Possible causes:\n" +
                "    1. Your test + source dereferenced a null pointer.\n" +
@@ -56,7 +56,7 @@ class GeneratorTestResultsSanityChecker
                "    3. Your test + source committed a memory access violation.\n" +
                "    4. Your test fixture produced an exit code of 0 despite execution ending prematurely.\n" +
                "  Sanity check failures of test results are usually a symptom of interrupted test execution.\n\n"
-      
+
       @streaminator.stderr_puts( notice )
       raise
     end
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/loginator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/loginator.rb
index 92276e1df..38147b322 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/loginator.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/loginator.rb
@@ -11,7 +11,7 @@ class Loginator
     config_files.concat( @project_config_manager.options_files )
     config_files.compact!
     config_files.map! { |file| file.ext('') }
-    
+
     log_name = config_files.join( '_' )
 
     @project_log_filepath = File.join( @configurator.project_log_path, log_name.ext('.log') )
@@ -20,12 +20,12 @@ class Loginator
 
   def log(string, heading=nil)
     return if (not @configurator.project_logging)
-  
+
     output  = "\n[#{@system_wrapper.time_now}]"
     output += " :: #{heading}" if (not heading.nil?)
     output += "\n#{string.strip}\n"
 
     @file_wrapper.write(@project_log_filepath, output, 'a')
   end
-  
+
 end
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/makefile.rb b/test/unit-test/vendor/ceedling/lib/ceedling/makefile.rb
index c3d7496d2..9ad894ea0 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/makefile.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/makefile.rb
@@ -1,6 +1,6 @@
 
 # modified version of Rake's provided make-style dependency loader
-# customizations: 
+# customizations:
 #  (1) handles windows drives in paths -- colons don't confuse task demarcation
 #  (2) handles spaces in directory paths
 
@@ -29,7 +29,7 @@ module Rake
       file_tasks, args = line.split(/:\s/)
 
       return if args.nil?
-      
+
       # split at non-escaped space boundary between files (i.e. escaped spaces in paths are left alone)
       dependents = args.split(/\b\s+/)
       # replace escaped spaces and clean up any extra whitespace
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/objects.yml b/test/unit-test/vendor/ceedling/lib/ceedling/objects.yml
index 43bbc066c..d73987f7c 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/objects.yml
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/objects.yml
@@ -223,7 +223,7 @@ dependinator:
     - configurator
     - project_config_manager
     - test_includes_extractor
-    - file_path_utils 
+    - file_path_utils
     - rake_wrapper
     - file_wrapper
 
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/par_map.rb b/test/unit-test/vendor/ceedling/lib/ceedling/par_map.rb
index 98198a2ce..250b5ad30 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/par_map.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/par_map.rb
@@ -16,4 +16,3 @@ def par_map(n, things, &block)
   end
   threads.each { |t| t.join }
 end
-
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/plugin.rb b/test/unit-test/vendor/ceedling/lib/ceedling/plugin.rb
index f20b3a3b2..835c08c52 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/plugin.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/plugin.rb
@@ -5,7 +5,7 @@ class String
   def left_margin(margin=0)
     non_whitespace_column = 0
     new_lines = []
-    
+
     # find first line with non-whitespace and count left columns of whitespace
     self.each_line do |line|
       if (line =~ /^\s*\S/)
@@ -13,7 +13,7 @@ class String
         break
       end
     end
-    
+
     # iterate through each line, chopping off leftmost whitespace columns and add back the desired whitespace margin
     self.each_line do |line|
       columns = []
@@ -25,7 +25,7 @@ class String
         new_lines << "\n"
       end
     end
-    
+
     return new_lines.join
   end
 end
@@ -74,7 +74,7 @@ class Plugin
   # whole shebang (any use of Ceedling)
   def pre_build; end
   def post_build; end
-  
+
   def summary; end
 
 end
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/plugin_builder.rb b/test/unit-test/vendor/ceedling/lib/ceedling/plugin_builder.rb
index 1269141f1..a010e1d0f 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/plugin_builder.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/plugin_builder.rb
@@ -23,7 +23,7 @@ class PluginBuilder
   end
 
   private
-  
+
   def camelize(underscored_name)
     return underscored_name.gsub(/(_|^)([a-z0-9])/) {$2.upcase}
   end
@@ -50,4 +50,4 @@ class PluginBuilder
     end
   end
 
-end
\ No newline at end of file
+end
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator.rb
index 8d83727ba..afc54494b 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator.rb
@@ -2,46 +2,46 @@ require 'ceedling/constants'
 require 'ceedling/defaults'
 
 class PluginReportinator
-  
+
   constructor :plugin_reportinator_helper, :plugin_manager, :reportinator
 
   def setup
     @test_results_template = nil
   end
-  
-  
+
+
   def set_system_objects(system_objects)
     @plugin_reportinator_helper.ceedling = system_objects
   end
-  
-  
+
+
   def fetch_results(results_path, test, options={:boom => false})
     return @plugin_reportinator_helper.fetch_results( File.join(results_path, test), options )
   end
 
-  
+
   def generate_banner(message)
     return @reportinator.generate_banner(message)
   end
 
-  
+
   def assemble_test_results(results_list, options={:boom => false})
     aggregated_results = get_results_structure
-    
-    results_list.each do |result_path| 
+
+    results_list.each do |result_path|
       results = @plugin_reportinator_helper.fetch_results( result_path, options )
       @plugin_reportinator_helper.process_results(aggregated_results, results)
     end
 
     return aggregated_results
   end
-  
-  
+
+
   def register_test_results_template(template)
     @test_results_template = template if (@test_results_template.nil?)
   end
-  
-  
+
+
   def run_test_results_report(hash, verbosity=Verbosity::NORMAL, &block)
     run_report( $stdout,
                 ((@test_results_template.nil?) ? DEFAULT_TESTS_RESULTS_REPORT_TEMPLATE : @test_results_template),
@@ -49,19 +49,19 @@ class PluginReportinator
                 verbosity,
                 &block )
   end
-  
-  
+
+
   def run_report(stream, template, hash=nil, verbosity=Verbosity::NORMAL)
     failure = nil
     failure = yield() if block_given?
-  
+
     @plugin_manager.register_build_failure( failure )
-    
+
     @plugin_reportinator_helper.run_report( stream, template, hash, verbosity )
   end
-  
+
   private ###############################
-  
+
   def get_results_structure
     return {
       :successes => [],
@@ -72,5 +72,5 @@ class PluginReportinator
       :time      => 0.0
       }
   end
- 
+
 end
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator_helper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator_helper.rb
index 322a530b5..783158797 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator_helper.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/plugin_reportinator_helper.rb
@@ -4,11 +4,11 @@ require 'rake' # for ext()
 require 'ceedling/constants'
 
 class PluginReportinatorHelper
-  
+
   attr_writer :ceedling
-  
+
   constructor :configurator, :streaminator, :yaml_wrapper, :file_wrapper
-  
+
   def fetch_results(results_path, options)
     pass_path = File.join(results_path.ext( @configurator.extension_testpass ))
     fail_path = File.join(results_path.ext( @configurator.extension_testfail ))
@@ -23,7 +23,7 @@ class PluginReportinatorHelper
         raise
       end
     end
-    
+
     return {}
   end
 
@@ -47,5 +47,5 @@ class PluginReportinatorHelper
     output = ERB.new(template, 0, "%<>")
     @streaminator.stream_puts(stream, output.result(binding()), verbosity)
   end
-  
+
 end
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/preprocessinator_includes_handler.rb b/test/unit-test/vendor/ceedling/lib/ceedling/preprocessinator_includes_handler.rb
index 8b89c0b3a..916d31332 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/preprocessinator_includes_handler.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/preprocessinator_includes_handler.rb
@@ -94,7 +94,7 @@ class PreprocessinatorIncludesHandler
     target_file = make_rule.split[0].gsub(':', '').gsub('\\','/')
     base = File.basename(target_file, File.extname(target_file))
     make_rule_dependencies = make_rule.gsub(/.*\b#{Regexp.escape(base)}\S*/, '').gsub(/\\$/, '')
-    
+
     # Extract the headers dependencies from the make rule
     hdr_ext = @configurator.extension_header
     headers_dependencies = make_rule_dependencies.split.find_all {|path| path.end_with?(hdr_ext) }.uniq
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/project_config_manager.rb b/test/unit-test/vendor/ceedling/lib/ceedling/project_config_manager.rb
index ed7a73b8c..b1d455127 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/project_config_manager.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/project_config_manager.rb
@@ -20,7 +20,7 @@ class ProjectConfigManager
   def merge_options(config_hash, option_filepath)
     @options_files << File.basename( option_filepath )
     config_hash.deep_merge!( @yaml_wrapper.load( option_filepath ) )
-  end 
+  end
 
 
   def filter_internal_sources(sources)
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rake_utils.rb b/test/unit-test/vendor/ceedling/lib/ceedling/rake_utils.rb
index 3f667c852..b13749738 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/rake_utils.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/rake_utils.rb
@@ -1,6 +1,6 @@
 
 class RakeUtils
-  
+
   constructor :rake_wrapper
 
   def task_invoked?(task_regex)
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/reportinator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/reportinator.rb
index 0f583d06d..fcb5286b9 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/reportinator.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/reportinator.rb
@@ -14,8 +14,8 @@ class Reportinator
   # ==== Examples
   #
   #    rp = Reportinator.new
-  #    rp.generate_banner("Hello world!") => "------------\nHello world!\n------------\n" 
-  #    rp.generate_banner("Hello world!", 3) => "---\nHello world!\n---\n" 
+  #    rp.generate_banner("Hello world!") => "------------\nHello world!\n------------\n"
+  #    rp.generate_banner("Hello world!", 3) => "---\nHello world!\n---\n"
   #
   #
   def generate_banner(message, width=nil)
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rules_cmock.rake b/test/unit-test/vendor/ceedling/lib/ceedling/rules_cmock.rake
index 70ddcbc2e..51485d3a8 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/rules_cmock.rake
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/rules_cmock.rake
@@ -3,7 +3,7 @@
 rule(/#{CMOCK_MOCK_PREFIX}[^\/\\]+#{'\\'+EXTENSION_SOURCE}$/ => [
     proc do |task_name|
       @ceedling[:file_finder].find_header_input_for_mock_file(task_name)
-    end  
+    end
   ]) do |mock|
   @ceedling[:generator].generate_mock(TEST_SYM, mock.source)
 end
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rules_preprocess.rake b/test/unit-test/vendor/ceedling/lib/ceedling/rules_preprocess.rake
index c29111272..936961ce8 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/rules_preprocess.rake
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/rules_preprocess.rake
@@ -6,7 +6,7 @@
 rule(/#{PROJECT_TEST_PREPROCESS_FILES_PATH}\/.+/ => [
     proc do |task_name|
       @ceedling[:file_finder].find_test_or_source_or_header_file(task_name)
-    end  
+    end
   ]) do |file|
   if (not @ceedling[:configurator].project_use_deep_dependencies)
     raise 'ERROR: Ceedling preprocessing rule invoked though neccessary auxiliary dependency support not enabled.'
@@ -19,8 +19,7 @@ end
 rule(/#{PROJECT_TEST_PREPROCESS_INCLUDES_PATH}\/.+/ => [
     proc do |task_name|
       @ceedling[:file_finder].find_test_or_source_or_header_file(task_name)
-    end  
+    end
   ]) do |file|
   @ceedling[:generator].generate_shallow_includes_list(TEST_SYM, file.source)
 end
-
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rules_release.rake b/test/unit-test/vendor/ceedling/lib/ceedling/rules_release.rake
index 4a583bd6c..47eec858f 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/rules_release.rake
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/rules_release.rake
@@ -96,4 +96,3 @@ namespace RELEASE_SYM do
   end
 
 end
-
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rules_release_deep_dependencies.rake b/test/unit-test/vendor/ceedling/lib/ceedling/rules_release_deep_dependencies.rake
index 9550783cc..bf944de25 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/rules_release_deep_dependencies.rake
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/rules_release_deep_dependencies.rake
@@ -3,7 +3,7 @@
 rule(/#{PROJECT_RELEASE_DEPENDENCIES_PATH}\/#{'.+\\'+EXTENSION_DEPENDENCIES}$/ => [
     proc do |task_name|
       @ceedling[:file_finder].find_compilation_input_file(task_name, :error, true)
-    end  
+    end
   ]) do |dep|
   @ceedling[:generator].generate_dependencies_file(
   	TOOLS_RELEASE_DEPENDENCIES_GENERATOR,
@@ -12,4 +12,3 @@ rule(/#{PROJECT_RELEASE_DEPENDENCIES_PATH}\/#{'.+\\'+EXTENSION_DEPENDENCIES}$/ =
   	@ceedling[:file_path_utils].form_release_build_c_object_filepath(dep.source),
   	dep.name)
 end
-
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests.rake b/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests.rake
index 61e15e2cc..3ab80f3a9 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests.rake
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests.rake
@@ -70,4 +70,3 @@ namespace TEST_SYM do
     @ceedling[:test_invoker].setup_and_invoke([test.source])
   end
 end
-
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests_deep_dependencies.rake b/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests_deep_dependencies.rake
index 7175ee3f2..a8dfd296e 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests_deep_dependencies.rake
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/rules_tests_deep_dependencies.rake
@@ -12,4 +12,3 @@ rule(/#{PROJECT_TEST_DEPENDENCIES_PATH}\/#{'.+\\'+EXTENSION_DEPENDENCIES}$/ => [
   	@ceedling[:file_path_utils].form_test_build_c_object_filepath(dep.source),
   	dep.name)
 end
-
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/setupinator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/setupinator.rb
index ea78fd97e..cf9922f07 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/setupinator.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/setupinator.rb
@@ -18,7 +18,7 @@ class Setupinator
     @config_hash = config_hash
 
     # load up all the constants and accessors our rake files, objects, & external scripts will need;
-    # note: configurator modifies the cmock section of the hash with a couple defaults to tie 
+    # note: configurator modifies the cmock section of the hash with a couple defaults to tie
     #       project together - the modified hash is used to build cmock object
     @ceedling[:configurator].populate_defaults( config_hash )
     @ceedling[:configurator].populate_unity_defaults( config_hash )
@@ -31,16 +31,16 @@ class Setupinator
     @ceedling[:configurator].standardize_paths( config_hash )
     @ceedling[:configurator].validate( config_hash )
     @ceedling[:configurator].build( config_hash, :environment )
-    
+
     @ceedling[:configurator].insert_rake_plugins( @ceedling[:configurator].rake_plugins )
     @ceedling[:configurator].tools_supplement_arguments( config_hash )
-    
+
     # merge in any environment variables plugins specify, after the main build
     @ceedling[:plugin_manager].load_plugin_scripts( @ceedling[:configurator].script_plugins, @ceedling ) do |env|
       @ceedling[:configurator].eval_environment_variables( env )
       @ceedling[:configurator].build_supplement( config_hash, env )
     end
-    
+
     @ceedling[:plugin_reportinator].set_system_objects( @ceedling )
     @ceedling[:file_finder].prepare_search_sources
     @ceedling[:loginator].setup_log_filepath
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/stream_wrapper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/stream_wrapper.rb
index 7e160527f..2cee58d3e 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/stream_wrapper.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/stream_wrapper.rb
@@ -16,7 +16,7 @@ class StreamWrapper
   def stdout_flush
     $stdout.flush
   end
-  
+
   def stderr_puts(string)
     $stderr.puts(string)
   end
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/streaminator.rb b/test/unit-test/vendor/ceedling/lib/ceedling/streaminator.rb
index b8dcd070f..e30440c7d 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/streaminator.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/streaminator.rb
@@ -12,7 +12,7 @@ class Streaminator
       @stream_wrapper.stdout_puts(string)
       @stream_wrapper.stdout_flush
     end
-    
+
     # write to log as though Verbosity::OBNOXIOUS
     @loginator.log( string, @streaminator_helper.extract_name($stdout) )
   end
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/streaminator_helper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/streaminator_helper.rb
index 9fb5cc0b7..cbaef7c92 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/streaminator_helper.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/streaminator_helper.rb
@@ -8,7 +8,7 @@ class StreaminatorHelper
       when 2 then '#<IO:$stderr>'
       else stream.inspect
     end
-    
+
     return name
   end
 
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/system_utils.rb b/test/unit-test/vendor/ceedling/lib/ceedling/system_utils.rb
index 477aba4f1..81bb7bc54 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/system_utils.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/system_utils.rb
@@ -13,7 +13,7 @@ class SystemUtils
   constructor :system_wrapper
 
   ##
-  # Sets up the class. 
+  # Sets up the class.
   def setup
     @tcsh_shell = nil
   end
@@ -23,7 +23,7 @@ class SystemUtils
   def tcsh_shell?
     # once run a single time, return state determined at that execution
     return @tcsh_shell if not @tcsh_shell.nil?
-  
+
     result = @system_wrapper.shell_backticks('echo $version')
 
     if ((result[:exit_code] == 0) and (result[:output].strip =~ /^tcsh/))
@@ -31,7 +31,7 @@ class SystemUtils
     else
       @tcsh_shell = false
     end
-  
+
     return @tcsh_shell
   end
 end
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/task_invoker.rb b/test/unit-test/vendor/ceedling/lib/ceedling/task_invoker.rb
index 7bfabbb12..35f92ae03 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/task_invoker.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/task_invoker.rb
@@ -11,7 +11,7 @@ class TaskInvoker
     @release_regexs = [/^#{RELEASE_ROOT_NAME}(:|$)/]
     @first_run = true
   end
-  
+
   def add_test_task_regex(regex)
     @test_regexs << regex
   end
@@ -19,26 +19,26 @@ class TaskInvoker
   def add_release_task_regex(regex)
     @release_regexs << regex
   end
-  
+
   def test_invoked?
     invoked = false
-    
+
     @test_regexs.each do |regex|
       invoked = true if (@rake_utils.task_invoked?(regex))
       break if invoked
     end
-    
+
     return invoked
   end
-  
+
   def release_invoked?
     invoked = false
-    
+
     @release_regexs.each do |regex|
       invoked = true if (@rake_utils.task_invoked?(regex))
       break if invoked
     end
-    
+
     return invoked
   end
 
@@ -60,7 +60,7 @@ class TaskInvoker
       @rake_wrapper[mock].invoke
     }
   end
-  
+
   def invoke_test_runner(runner)
     @dependinator.enhance_runner_dependencies( runner )
     reset_rake_task_for_changed_defines( runner )
@@ -112,11 +112,11 @@ class TaskInvoker
       @rake_wrapper[file].invoke
     end
   end
-  
+
   def invoke_release_objects(objects)
     par_map(PROJECT_COMPILE_THREADS, objects) do |object|
       @rake_wrapper[object].invoke
     end
   end
-  
+
 end
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_base.rake b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_base.rake
index a35cde75e..67a3b503a 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_base.rake
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_base.rake
@@ -113,4 +113,3 @@ task :summary do
   puts "\nNOTE: Summaries may be out of date with project sources.\n\n"
 end
 end
-
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_filesystem.rake b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_filesystem.rake
index 7b950ca0b..8263955fa 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_filesystem.rake
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_filesystem.rake
@@ -109,5 +109,3 @@ namespace :files do
   end
 
 end
-
-
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_release.rake b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_release.rake
index b313b2f53..9d3a59c53 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_release.rake
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_release.rake
@@ -5,8 +5,8 @@ require 'ceedling/file_path_utils'
 desc "Build release target."
 task RELEASE_SYM => [:directories] do
   header = "Release build '#{File.basename(PROJECT_RELEASE_BUILD_TARGET)}'"
-  @ceedling[:streaminator].stdout_puts("\n\n#{header}\n#{'-' * header.length}")  
-  
+  @ceedling[:streaminator].stdout_puts("\n\n#{header}\n#{'-' * header.length}")
+
   begin
     @ceedling[:plugin_manager].pre_release
 
@@ -15,16 +15,15 @@ task RELEASE_SYM => [:directories] do
 
     @ceedling[:project_config_manager].process_release_config_change
     core_objects.concat( @ceedling[:release_invoker].setup_and_invoke_c_objects( COLLECTION_ALL_SOURCE ) )
-  
+
     # if assembler use isn't enabled, COLLECTION_ALL_ASSEMBLY is empty array & nothing happens
     core_objects.concat( @ceedling[:release_invoker].setup_and_invoke_asm_objects( COLLECTION_ALL_ASSEMBLY ) )
-  
+
     # if we're using libraries, we need to add those to our collection as well
     library_objects = (defined? LIBRARIES_RELEASE && !LIBRARIES_RELEASE.empty?) ? LIBRARIES_RELEASE.flatten.compact : []
     file( PROJECT_RELEASE_BUILD_TARGET => (core_objects + extra_objects + library_objects) )
     Rake::Task[PROJECT_RELEASE_BUILD_TARGET].invoke
   ensure
-    @ceedling[:plugin_manager].post_release  
+    @ceedling[:plugin_manager].post_release
   end
 end
-
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_tests.rake b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_tests.rake
index 6c51ebcc9..5c1006b36 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/tasks_tests.rake
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/tasks_tests.rake
@@ -59,4 +59,3 @@ namespace TEST_SYM do
   end
 
 end
-
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/test_invoker_helper.rb b/test/unit-test/vendor/ceedling/lib/ceedling/test_invoker_helper.rb
index 403d93e3e..a48edf9f9 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/test_invoker_helper.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/test_invoker_helper.rb
@@ -19,14 +19,14 @@ class TestInvokerHelper
 
     yield( dependencies_list ) if block_given?
   end
-  
+
   def extract_sources(test)
     sources  = []
     includes = @test_includes_extractor.lookup_includes_list(test)
-    
+
     includes.each { |include| sources << @file_finder.find_compilation_input_file(include, :ignore) }
-    
+
     return sources.compact
   end
-  
+
 end
diff --git a/test/unit-test/vendor/ceedling/plugins/beep/lib/beep.rb b/test/unit-test/vendor/ceedling/plugins/beep/lib/beep.rb
index 6a6d01ab2..cbc5e3e38 100644
--- a/test/unit-test/vendor/ceedling/plugins/beep/lib/beep.rb
+++ b/test/unit-test/vendor/ceedling/plugins/beep/lib/beep.rb
@@ -37,4 +37,3 @@ class Beep < Plugin
     end
   end
 end
-
diff --git a/test/unit-test/vendor/ceedling/plugins/bullseye/README.md b/test/unit-test/vendor/ceedling/plugins/bullseye/README.md
index ab0b53b45..aad449204 100644
--- a/test/unit-test/vendor/ceedling/plugins/bullseye/README.md
+++ b/test/unit-test/vendor/ceedling/plugins/bullseye/README.md
@@ -5,7 +5,7 @@ ceedling-bullseye
 
 Plugin for integrating Bullseye code coverage tool into Ceedling projects.
 This plugin requires a working license to Bullseye code coverage tools. The tools
-must be within the path or the path should be added to the environment in the 
+must be within the path or the path should be added to the environment in the
 `project.yml file`.
 
 ## Configuration
diff --git a/test/unit-test/vendor/ceedling/plugins/bullseye/assets/template.erb b/test/unit-test/vendor/ceedling/plugins/bullseye/assets/template.erb
index 504f85583..e1ef9874b 100644
--- a/test/unit-test/vendor/ceedling/plugins/bullseye/assets/template.erb
+++ b/test/unit-test/vendor/ceedling/plugins/bullseye/assets/template.erb
@@ -12,4 +12,3 @@ BRANCHES:  <%=sprintf(format_string, hash[:coverage][:branches])%>%
 % else
 BRANCHES:  none
 % end
-
diff --git a/test/unit-test/vendor/ceedling/plugins/bullseye/lib/bullseye.rb b/test/unit-test/vendor/ceedling/plugins/bullseye/lib/bullseye.rb
index ffa444ac7..3e7622006 100644
--- a/test/unit-test/vendor/ceedling/plugins/bullseye/lib/bullseye.rb
+++ b/test/unit-test/vendor/ceedling/plugins/bullseye/lib/bullseye.rb
@@ -38,7 +38,7 @@ class Bullseye < Plugin
     @ceedling[:plugin_manager].pre_compile_execute(arg_hash)
 
     @ceedling[:streaminator].stdout_puts("Compiling #{File.basename(source)} with coverage...")
-    compile_command  = 
+    compile_command  =
       @ceedling[:tool_executor].build_command_line(
         TOOLS_BULLSEYE_COMPILER,
         @ceedling[:flaginator].flag_down( OPERATION_COMPILE_SYM, BULLSEYE_SYM, source ),
@@ -48,14 +48,14 @@ class Bullseye < Plugin
     coverage_command = @ceedling[:tool_executor].build_command_line(TOOLS_BULLSEYE_INSTRUMENTATION, [], compile_command[:line] )
 
     shell_result     = @ceedling[:tool_executor].exec( coverage_command[:line], coverage_command[:options] )
-    
+
     arg_hash[:shell_result] = shell_result
     @ceedling[:plugin_manager].post_compile_execute(arg_hash)
   end
 
   def post_test_fixture_execute(arg_hash)
     result_file = arg_hash[:result_file]
-  
+
     if ((result_file =~ /#{BULLSEYE_RESULTS_PATH}/) and (not @result_list.include?(result_file)))
       @result_list << arg_hash[:result_file]
     end
@@ -70,13 +70,13 @@ class Bullseye < Plugin
       :header => BULLSEYE_ROOT_NAME.upcase,
       :results => results
     }
-    
+
     @ceedling[:plugin_reportinator].run_test_results_report(hash) do
       message = ''
       message = 'Unit test failures.' if (results[:counts][:failed] > 0)
       message
     end
-    
+
     # coverage results
     return if (verify_coverage_file() == false)
     if (@ceedling[:task_invoker].invoked?(/^#{BULLSEYE_TASK_ROOT}(all|delta)/))
@@ -100,13 +100,13 @@ class Bullseye < Plugin
     }
 
     @ceedling[:plugin_reportinator].run_test_results_report(hash)
-    
+
     # coverage results
     command = @ceedling[:tool_executor].build_command_line(TOOLS_BULLSEYE_REPORT_COVSRC)
     shell_result = @ceedling[:tool_executor].exec(command[:line], command[:options])
     report_coverage_results_all(shell_result[:output])
   end
-  
+
   def enableBullseye(enable)
     if BULLSEYE_AUTO_LICENSE
       if (enable)
@@ -117,14 +117,14 @@ class Bullseye < Plugin
         @ceedling[:streaminator].stdout_puts("Reverting Bullseye to previous state")
       end
 
-      args.each do |arg| 
+      args.each do |arg|
         command = @ceedling[:tool_executor].build_command_line(TOOLS_BULLSEYE_BUILD_ENABLE_DISABLE, [], arg)
         shell_result = @ceedling[:tool_executor].exec(command[:line], command[:options])
       end
 
     end
   end
-  
+
   private ###################################
 
   def report_coverage_results_all(coverage)
@@ -139,7 +139,7 @@ class Bullseye < Plugin
     if (coverage =~ /^Total.*?=\s+([0-9]+)\%/)
       results[:coverage][:functions] = $1.to_i
     end
-    
+
     if (coverage =~ /^Total.*=\s+([0-9]+)\%\s*$/)
       results[:coverage][:branches] = $1.to_i
     end
@@ -177,10 +177,10 @@ class Bullseye < Plugin
       banner = @ceedling[:plugin_reportinator].generate_banner( "#{BULLSEYE_ROOT_NAME.upcase}: CODE COVERAGE SUMMARY" )
       @ceedling[:streaminator].stdout_puts "\n" + banner + "\nNo coverage file.\n\n"
     end
-    
+
     return exist
   end
-  
+
 end
 
 
@@ -188,7 +188,7 @@ end
 END {
   # cache our input configurations to use in comparison upon next execution
   if (@ceedling[:task_invoker].invoked?(/^#{BULLSEYE_TASK_ROOT}/))
-    @ceedling[:cacheinator].cache_test_config( @ceedling[:setupinator].config_hash ) 
+    @ceedling[:cacheinator].cache_test_config( @ceedling[:setupinator].config_hash )
     @ceedling[BULLSEYE_SYM].enableBullseye(false)
   end
 }
diff --git a/test/unit-test/vendor/ceedling/plugins/colour_report/README.md b/test/unit-test/vendor/ceedling/plugins/colour_report/README.md
index 4e0fcd45e..5f4ff77b1 100644
--- a/test/unit-test/vendor/ceedling/plugins/colour_report/README.md
+++ b/test/unit-test/vendor/ceedling/plugins/colour_report/README.md
@@ -3,7 +3,7 @@ ceedling-colour-report
 
 ## Overview
 
-The colour_report replaces the normal ceedling "pretty" output with 
+The colour_report replaces the normal ceedling "pretty" output with
 a colorized variant, in order to make the results easier to read from
 a standard command line. This is very useful on developer machines, but
 can occasionally cause problems with parsing on CI servers.
diff --git a/test/unit-test/vendor/ceedling/plugins/command_hooks/lib/command_hooks.rb b/test/unit-test/vendor/ceedling/plugins/command_hooks/lib/command_hooks.rb
index 4bf8b5312..67e94f935 100644
--- a/test/unit-test/vendor/ceedling/plugins/command_hooks/lib/command_hooks.rb
+++ b/test/unit-test/vendor/ceedling/plugins/command_hooks/lib/command_hooks.rb
@@ -89,4 +89,3 @@ class CommandHooks < Plugin
     end
   end
 end
-
diff --git a/test/unit-test/vendor/ceedling/plugins/compile_commands_json/README.md b/test/unit-test/vendor/ceedling/plugins/compile_commands_json/README.md
index ea80b7397..7e3846e56 100644
--- a/test/unit-test/vendor/ceedling/plugins/compile_commands_json/README.md
+++ b/test/unit-test/vendor/ceedling/plugins/compile_commands_json/README.md
@@ -9,7 +9,7 @@ In June of 2016, Microsoft with Red Hat and Codenvy got together to create a sta
 
 For C and C++ projects, many people use the `clangd` backend. So that it can do things like "go to definition", `clangd` needs to know how to build the project so that it can figure out all the pieces to the puzzle. There are manual tools such as `bear` which can be run with `gcc` or `clang` to extract this information it has a big limitation in that if run with `ceedling release` you won't get any auto completion for Unity and you'll also get error messages reported by your IDE because of what it perceives as missing headers. If you do the same with `ceedling test` now you get Unity but you might miss things that are only seen in the release build.
 
-This plugin resolves that issue. As it is run by Ceedling, it has access to all the build information it needs to create the perfect `compile_commands.json`. Once enabled, this plugin will generate that file and place it in `./build/artifacts/compile_commands.json`. `clangd` will search your project for this file, but it is easier to symlink it into the root directory (for example `ln -s ./build/artifacts/compile_commands.json`. 
+This plugin resolves that issue. As it is run by Ceedling, it has access to all the build information it needs to create the perfect `compile_commands.json`. Once enabled, this plugin will generate that file and place it in `./build/artifacts/compile_commands.json`. `clangd` will search your project for this file, but it is easier to symlink it into the root directory (for example `ln -s ./build/artifacts/compile_commands.json`.
 
 For more information on LSP and to find out if your editor supports it, check out https://langserver.org/
 
diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/Rakefile b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/Rakefile
index bc5594110..2fd9f859f 100644
--- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/Rakefile
+++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/Rakefile
@@ -16,4 +16,4 @@ task :integration_test do
     end
 end
 
-task :default => [:spec, :integration_test]
\ No newline at end of file
+task :default => [:spec, :integration_test]
diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/project.yml b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/project.yml
index 6bda22291..00e395d0c 100644
--- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/project.yml
+++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/project.yml
@@ -28,7 +28,7 @@
   :source:
     - src/**
   :support:
-      
+
 :defines:
   # in order to add common defines:
   #  1) remove the trailing [] from the :common: section
diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/src/display.c b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/src/display.c
index 2f03449b0..797d46878 100644
--- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/src/display.c
+++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/src/display.c
@@ -4,4 +4,4 @@
 void display_turnOffStatusLed(void)
 {
     printf("Display: Status LED off");
-}
\ No newline at end of file
+}
diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/lib/fff_mock_generator.rb b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/lib/fff_mock_generator.rb
index 9dc03a653..d439a8d7f 100644
--- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/lib/fff_mock_generator.rb
+++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/lib/fff_mock_generator.rb
@@ -90,7 +90,7 @@ class FffMockGenerator
     # In the init function, reset the FFF globals. These are used for things
     # like the call history.
     output.puts "    FFF_RESET_HISTORY();"
-    
+
     # Also, reset all of the fakes.
     if parsed_header[:functions]
       parsed_header[:functions].each do |function|
diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_header_generator_spec.rb b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_header_generator_spec.rb
index e6ac11dd0..09d317551 100644
--- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_header_generator_spec.rb
+++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_header_generator_spec.rb
@@ -254,7 +254,7 @@ describe "FffMockGenerator.create_mock_header" do
       )
     end
   end
-  
+
   context "when there is a function that returns a const int" do
     let(:mock_header){
       parsed_header = {}
diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_source_generator_spec.rb b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_source_generator_spec.rb
index 364f8521e..7b7f04f58 100644
--- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_source_generator_spec.rb
+++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/fff_mock_source_generator_spec.rb
@@ -146,4 +146,4 @@ describe "FffMockGenerator.create_mock_source" do
       )
     end
   end
-end
\ No newline at end of file
+end
diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/header_generator.rb b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/header_generator.rb
index cda278440..3b6fa7120 100644
--- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/header_generator.rb
+++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/spec/header_generator.rb
@@ -48,4 +48,4 @@ def create_cmock_style_parsed_header(functions, typedefs = nil)
     end
   end
   parsed_header
-end
\ No newline at end of file
+end
diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/src/fff_unity_helper.h b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/src/fff_unity_helper.h
index de3db44aa..970ecbb35 100644
--- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/src/fff_unity_helper.h
+++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/src/fff_unity_helper.h
@@ -30,4 +30,4 @@
         fff.call_history[order_],                                           \
         "Function " #function_ " not called in order " #order_ )
 
-#endif
\ No newline at end of file
+#endif
diff --git a/test/unit-test/vendor/ceedling/plugins/gcov/assets/template.erb b/test/unit-test/vendor/ceedling/plugins/gcov/assets/template.erb
index 5e5a1742b..266750497 100644
--- a/test/unit-test/vendor/ceedling/plugins/gcov/assets/template.erb
+++ b/test/unit-test/vendor/ceedling/plugins/gcov/assets/template.erb
@@ -12,4 +12,3 @@ BRANCHES:  <%=sprintf(format_string, hash[:coverage][:branches])%>%
 % else
 BRANCHES:  none
 % end
-
diff --git a/test/unit-test/vendor/ceedling/plugins/gcov/lib/reportinator_helper.rb b/test/unit-test/vendor/ceedling/plugins/gcov/lib/reportinator_helper.rb
index 92617fba5..10a0a6c5c 100644
--- a/test/unit-test/vendor/ceedling/plugins/gcov/lib/reportinator_helper.rb
+++ b/test/unit-test/vendor/ceedling/plugins/gcov/lib/reportinator_helper.rb
@@ -5,7 +5,7 @@ class ReportinatorHelper
     def print_shell_result(shell_result)
       if !(shell_result.nil?)
         puts "Done in %.3f seconds." % shell_result[:time]
-  
+
         if !(shell_result[:output].nil?) && (shell_result[:output].length > 0)
           puts shell_result[:output]
         end
diff --git a/test/unit-test/vendor/ceedling/plugins/json_tests_report/README.md b/test/unit-test/vendor/ceedling/plugins/json_tests_report/README.md
index 8e5a1e571..b383492e2 100644
--- a/test/unit-test/vendor/ceedling/plugins/json_tests_report/README.md
+++ b/test/unit-test/vendor/ceedling/plugins/json_tests_report/README.md
@@ -3,8 +3,8 @@ json_tests_report
 
 ## Overview
 
-The json_tests_report plugin creates a JSON file of test results, which is 
-handy for Continuous Integration build servers or as input into other 
+The json_tests_report plugin creates a JSON file of test results, which is
+handy for Continuous Integration build servers or as input into other
 reporting tools. The JSON file is output to the appropriate
 `<build_root>/artifacts/` directory (e.g. `artifacts/test/` for test tasks,
 `artifacts/gcov/` for gcov, or `artifacts/bullseye/` for bullseye runs).
diff --git a/test/unit-test/vendor/ceedling/plugins/json_tests_report/lib/json_tests_report.rb b/test/unit-test/vendor/ceedling/plugins/json_tests_report/lib/json_tests_report.rb
index e7023db7b..f09339ee2 100644
--- a/test/unit-test/vendor/ceedling/plugins/json_tests_report/lib/json_tests_report.rb
+++ b/test/unit-test/vendor/ceedling/plugins/json_tests_report/lib/json_tests_report.rb
@@ -33,7 +33,7 @@ class JsonTestsReport < Plugin
           "IgnoredTests" => write_tests(results[:ignores]),
           "Summary" => write_statistics(results[:counts])
         }
-        
+
         f << JSON.pretty_generate(json)
       end
     end
@@ -62,7 +62,7 @@ class JsonTestsReport < Plugin
     results.each do |result|
       result[:collection].each do |item|
         @test_counter += 1
-        retval << { 
+        retval << {
           "file" => File.join(result[:source][:path], result[:source][:file]),
           "test" => item[:test]
         }
diff --git a/test/unit-test/vendor/ceedling/plugins/module_generator/README.md b/test/unit-test/vendor/ceedling/plugins/module_generator/README.md
index a3c2c7ad9..61cf45bd6 100644
--- a/test/unit-test/vendor/ceedling/plugins/module_generator/README.md
+++ b/test/unit-test/vendor/ceedling/plugins/module_generator/README.md
@@ -96,7 +96,7 @@ put that corporate copyright notice (or maybe a copyleft notice, if that's your
 ### Test Defines
 
 You can specify the "#ifdef TEST" at the top of the test files with a custom define.
-This example will put a "#ifdef CEEDLING_TEST" at the top of the test files.  
+This example will put a "#ifdef CEEDLING_TEST" at the top of the test files.
 
 ```
 :module_generator:
@@ -115,5 +115,3 @@ Your options are as follows:
   - `:camel` - camelFilesAreSimilarButStartLow
   - `:snake` - snake_case_is_all_lower_and_uses_underscores
   - `:caps`  - CAPS_FEELS_LIKE_YOU_ARE_SCREAMING
-
-
diff --git a/test/unit-test/vendor/ceedling/plugins/module_generator/config/module_generator.yml b/test/unit-test/vendor/ceedling/plugins/module_generator/config/module_generator.yml
index cdb2da2eb..b90afd0ff 100644
--- a/test/unit-test/vendor/ceedling/plugins/module_generator/config/module_generator.yml
+++ b/test/unit-test/vendor/ceedling/plugins/module_generator/config/module_generator.yml
@@ -1,4 +1,4 @@
 :module_generator:
   :project_root: ./
   :source_root: src/
-  :test_root: test/
\ No newline at end of file
+  :test_root: test/
diff --git a/test/unit-test/vendor/ceedling/plugins/stdout_gtestlike_tests_report/README.md b/test/unit-test/vendor/ceedling/plugins/stdout_gtestlike_tests_report/README.md
index 9ab60847e..e95106ed1 100644
--- a/test/unit-test/vendor/ceedling/plugins/stdout_gtestlike_tests_report/README.md
+++ b/test/unit-test/vendor/ceedling/plugins/stdout_gtestlike_tests_report/README.md
@@ -3,8 +3,8 @@ ceedling-stdout-gtestlike-tests-report
 
 ## Overview
 
-The stdout_gtestlike_tests_report replaces the normal ceedling "pretty" output with 
-a variant that resembles the output of gtest. This is most helpful when trying to 
+The stdout_gtestlike_tests_report replaces the normal ceedling "pretty" output with
+a variant that resembles the output of gtest. This is most helpful when trying to
 integrate into an IDE or CI that is meant to work with google test.
 
 ## Setup
diff --git a/test/unit-test/vendor/ceedling/plugins/stdout_ide_tests_report/README.md b/test/unit-test/vendor/ceedling/plugins/stdout_ide_tests_report/README.md
index ed6c65582..da04d1c14 100644
--- a/test/unit-test/vendor/ceedling/plugins/stdout_ide_tests_report/README.md
+++ b/test/unit-test/vendor/ceedling/plugins/stdout_ide_tests_report/README.md
@@ -3,7 +3,7 @@ ceedling-stdout-ide-tests-report
 
 ## Overview
 
-The stdout_ide_tests_report replaces the normal ceedling "pretty" output with 
+The stdout_ide_tests_report replaces the normal ceedling "pretty" output with
 a simplified variant intended to be easily parseable.
 
 ## Setup
diff --git a/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/README.md b/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/README.md
index 7e1be2382..358aa93ab 100644
--- a/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/README.md
+++ b/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/README.md
@@ -5,7 +5,7 @@ ceedling-pretty-tests-report
 
 The stdout_pretty_tests_report is the default output of ceedling. Instead of
 showing most of the raw output of CMock, Ceedling, etc., it shows a simplified
-view. It also creates a nice summary at the end of execution which groups the 
+view. It also creates a nice summary at the end of execution which groups the
 results into ignored and failed tests.
 
 ## Setup
diff --git a/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/assets/template.erb b/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/assets/template.erb
index 52b29f7f0..1c025bf1b 100644
--- a/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/assets/template.erb
+++ b/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/assets/template.erb
@@ -56,4 +56,3 @@ IGNORED: <%=sprintf(format_string, ignored)%>
 
 No tests executed.
 % end
-
diff --git a/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/lib/stdout_pretty_tests_report.rb b/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/lib/stdout_pretty_tests_report.rb
index 018388fc1..fd9589183 100644
--- a/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/lib/stdout_pretty_tests_report.rb
+++ b/test/unit-test/vendor/ceedling/plugins/stdout_pretty_tests_report/lib/stdout_pretty_tests_report.rb
@@ -2,20 +2,20 @@ require 'ceedling/plugin'
 require 'ceedling/defaults'
 
 class StdoutPrettyTestsReport < Plugin
-  
+
   def setup
     @result_list = []
     @plugin_root = File.expand_path(File.join(File.dirname(__FILE__), '..'))
     template = @ceedling[:file_wrapper].read(File.join(@plugin_root, 'assets/template.erb'))
     @ceedling[:plugin_reportinator].register_test_results_template( template )
   end
-  
+
   def post_test_fixture_execute(arg_hash)
     return if not (arg_hash[:context] == TEST_SYM)
-  
+
     @result_list << arg_hash[:result_file]
   end
-  
+
   def post_build
     return if not (@ceedling[:task_invoker].test_invoked?)
 
diff --git a/test/unit-test/vendor/ceedling/plugins/subprojects/README.md b/test/unit-test/vendor/ceedling/plugins/subprojects/README.md
index e51a4e60e..ef4caa57b 100644
--- a/test/unit-test/vendor/ceedling/plugins/subprojects/README.md
+++ b/test/unit-test/vendor/ceedling/plugins/subprojects/README.md
@@ -1,9 +1,9 @@
 ceedling-subprojects
 ====================
 
-Plugin for supporting subprojects that are built as static libraries. It continues to support  
-dependency tracking, without getting confused between your main project files and your   
-subproject files. It accepts different compiler flags and linker flags, allowing you to   
+Plugin for supporting subprojects that are built as static libraries. It continues to support
+dependency tracking, without getting confused between your main project files and your
+subproject files. It accepts different compiler flags and linker flags, allowing you to
 optimize for your situation.
 
 First, you're going to want to add the extension to your list of known extensions:
@@ -13,12 +13,12 @@ First, you're going to want to add the extension to your list of known extension
   :subprojects: '.a'
 ```
 
-Define a new section called :subprojects. There, you can list as many subprojects  
-as you may need under the :paths key. For each, you specify a unique place to build  
+Define a new section called :subprojects. There, you can list as many subprojects
+as you may need under the :paths key. For each, you specify a unique place to build
 and a unique name.
 
 ```
-:subprojects:  
+:subprojects:
   :paths:
    - :name: libprojectA
      :source:
@@ -27,7 +27,7 @@ and a unique name.
      :include:
        - ./subprojectA/include/dir
      :build_root: ./subprojectA/build/dir
-     :defines: 
+     :defines:
        - DEFINE_JUST_FOR_THIS_FILE
        - AND_ANOTHER
    - :name: libprojectB
diff --git a/test/unit-test/vendor/ceedling/plugins/subprojects/subprojects.rake b/test/unit-test/vendor/ceedling/plugins/subprojects/subprojects.rake
index 0025c3ecd..f80c812f3 100644
--- a/test/unit-test/vendor/ceedling/plugins/subprojects/subprojects.rake
+++ b/test/unit-test/vendor/ceedling/plugins/subprojects/subprojects.rake
@@ -73,6 +73,5 @@ SUBPROJECTS_PATHS.each do |subproj|
   task :directories => subproj_directories.clone
 
   # Finally, add the static library to our RELEASE build dependency list
-  task RELEASE_SYM => ["#{subproj_build_root}/#{subproj_name}#{EXTENSION_SUBPROJECTS}"] 
+  task RELEASE_SYM => ["#{subproj_build_root}/#{subproj_name}#{EXTENSION_SUBPROJECTS}"]
 end
-
diff --git a/test/unit-test/vendor/ceedling/plugins/teamcity_tests_report/README.md b/test/unit-test/vendor/ceedling/plugins/teamcity_tests_report/README.md
index 9fcda7d5b..2467ebe99 100644
--- a/test/unit-test/vendor/ceedling/plugins/teamcity_tests_report/README.md
+++ b/test/unit-test/vendor/ceedling/plugins/teamcity_tests_report/README.md
@@ -3,7 +3,7 @@ ceedling-teamcity-tests-report
 
 ## Overview
 
-The teamcity_tests_report replaces the normal ceedling "pretty" output with 
+The teamcity_tests_report replaces the normal ceedling "pretty" output with
 a version that has results tagged to be consumed with the teamcity CI server.
 
 ## Setup
diff --git a/test/unit-test/vendor/ceedling/vendor/c_exception/lib/CException.c b/test/unit-test/vendor/ceedling/vendor/c_exception/lib/CException.c
index fdff8f475..24b3b09e8 100644
--- a/test/unit-test/vendor/ceedling/vendor/c_exception/lib/CException.c
+++ b/test/unit-test/vendor/ceedling/vendor/c_exception/lib/CException.c
@@ -43,4 +43,3 @@ void Throw(CEXCEPTION_T ExceptionID)
     }                                                                   <- finish off that local scope we created to have our own variables
     if (CExceptionFrames[CEXCEPTION_GET_ID].Exception != CEXCEPTION_NONE)  <- start the actual 'catch' processing if we have an exception id saved away
  */
-
diff --git a/test/unit-test/vendor/ceedling/vendor/c_exception/lib/meson.build b/test/unit-test/vendor/ceedling/vendor/c_exception/lib/meson.build
index 2770122af..9694e51c7 100644
--- a/test/unit-test/vendor/ceedling/vendor/c_exception/lib/meson.build
+++ b/test/unit-test/vendor/ceedling/vendor/c_exception/lib/meson.build
@@ -6,6 +6,6 @@
 #
 cexception_dir = include_directories('.')
 
-cexception_lib = static_library(meson.project_name(), 
+cexception_lib = static_library(meson.project_name(),
     files('CException.c'),
     include_directories : cexception_dir)
diff --git a/test/unit-test/vendor/ceedling/vendor/cmock/src/cmock.c b/test/unit-test/vendor/ceedling/vendor/cmock/src/cmock.c
index 88f2c2b25..d8bdb1369 100644
--- a/test/unit-test/vendor/ceedling/vendor/cmock/src/cmock.c
+++ b/test/unit-test/vendor/ceedling/vendor/cmock/src/cmock.c
@@ -213,4 +213,3 @@ void CMock_Guts_MemFreeFinal(void)
   }
 #endif
 }
-
diff --git a/test/unit-test/vendor/ceedling/vendor/cmock/src/meson.build b/test/unit-test/vendor/ceedling/vendor/cmock/src/meson.build
index c03c4e5bb..b3145c02e 100644
--- a/test/unit-test/vendor/ceedling/vendor/cmock/src/meson.build
+++ b/test/unit-test/vendor/ceedling/vendor/cmock/src/meson.build
@@ -6,7 +6,7 @@
 #
 cmock_dir = include_directories('.')
 
-cmock_lib = static_library(meson.project_name(), 
+cmock_lib = static_library(meson.project_name(),
     files('cmock.c'),
     dependencies: [unity_dep],
     include_directories: cmock_dir)
diff --git a/test/unit-test/vendor/ceedling/vendor/diy/lib/diy.rb b/test/unit-test/vendor/ceedling/vendor/diy/lib/diy.rb
index 581afc7e6..cbeb8267a 100644
--- a/test/unit-test/vendor/ceedling/vendor/diy/lib/diy.rb
+++ b/test/unit-test/vendor/ceedling/vendor/diy/lib/diy.rb
@@ -18,8 +18,8 @@ module DIY #:nodoc:#
       raise "Nil context hash" unless context_hash
       raise "Need a hash" unless context_hash.kind_of?(Hash)
       [ "[]", "keys" ].each do |mname|
-        unless extra_inputs.respond_to?(mname) 
-          raise "Extra inputs must respond to hash-like [] operator and methods #keys and #each" 
+        unless extra_inputs.respond_to?(mname)
+          raise "Extra inputs must respond to hash-like [] operator and methods #keys and #each"
         end
       end
 
@@ -37,7 +37,7 @@ module DIY #:nodoc:#
       @cache = {}
       @cache['this_context'] = self
     end
-   
+
 
     # Convenience: create a new DIY::Context by loading from a String (or open file handle.)
     def self.from_yaml(io_or_string, extra_inputs={})
@@ -51,7 +51,7 @@ module DIY #:nodoc:#
       self.from_yaml(File.read(fname), extra_inputs)
     end
 
-    # Return a reference to the object named.  If necessary, the object will 
+    # Return a reference to the object named.  If necessary, the object will
     # be instantiated on first use.  If the object is non-singleton, a new
     # object will be produced each time.
     def get_object(obj_name)
@@ -77,7 +77,7 @@ module DIY #:nodoc:#
     end
     alias :[] :get_object
 
-    # Inject a named object into the Context.  This must be done before the Context has instantiated the 
+    # Inject a named object into the Context.  This must be done before the Context has instantiated the
     # object in question.
     def set_object(obj_name,obj)
       key = obj_name.to_s
@@ -108,9 +108,9 @@ module DIY #:nodoc:#
       @defs.keys.member?(key) or extra_inputs_has(key)
     end
 
-    # Every top level object in the Context is instantiated.  This is especially useful for 
+    # Every top level object in the Context is instantiated.  This is especially useful for
     # systems that have "floating observers"... objects that are never directly accessed, who
-    # would thus never be instantiated by coincedence.  This does not build any subcontexts 
+    # would thus never be instantiated by coincedence.  This does not build any subcontexts
     # that may exist.
     def build_everything
       @defs.keys.each { |k| self[k] }
@@ -131,7 +131,7 @@ module DIY #:nodoc:#
         # we modify the info hash below so it's important to have a new
         # instance to play with
         info = info.dup if info
-        
+
         # see if we are building a factory
         if info and info.has_key?('builds')
           unless info.has_key?('auto_require')
@@ -150,21 +150,21 @@ module DIY #:nodoc:#
 
         name = name.to_s
         case name
-        when /^\+/ 
+        when /^\+/
           # subcontext
           @sub_context_defs[name.gsub(/^\+/,'')] = info
-          
+
         when /^using_namespace/
           # namespace: use a module(s) prefix for the classname of contained object defs
           # NOTE: namespacing is NOT scope... it's just a convenient way to setup class names for a group of objects.
           get_defs_from info, parse_namespace(name)
         when /^method\s/
           key_name = name.gsub(/^method\s/, "")
-          @defs[key_name] = MethodDef.new(:name => key_name, 
-                                      :object => info['object'], 
+          @defs[key_name] = MethodDef.new(:name => key_name,
+                                      :object => info['object'],
                                       :method => info['method'],
                                       :attach => info['attach'])
-        else 
+        else
           # Normal object def
           info ||= {}
           if extra_inputs_has(name)
@@ -173,14 +173,14 @@ module DIY #:nodoc:#
           unless info.has_key?('auto_require')
             info['auto_require'] = self.class.auto_require
           end
-          if namespace 
+          if namespace
             if info['class']
               info['class'] = namespace.build_classname(info['class'])
             else
               info['class'] = namespace.build_classname(name)
             end
           end
-            
+
           @defs[name] = ObjectDef.new(:name => name, :info => info)
 
         end
@@ -191,10 +191,10 @@ module DIY #:nodoc:#
       method_definition = @defs[key]
       object = get_object(method_definition.object)
       method = object.method(method_definition.method)
-      
+
       unless method_definition.attach.nil?
         instance_var_name = "@__diy_#{method_definition.object}"
-        
+
         method_definition.attach.each do |object_key|
           get_object(object_key).instance_eval do
             instance_variable_set(instance_var_name, object)
@@ -202,14 +202,14 @@ module DIY #:nodoc:#
               #{instance_var_name}.#{method_definition.method}(*args)
             end|
           end
-        end      
+        end
       end
-      
+
       return method
     rescue Exception => oops
       build_and_raise_construction_error(key, oops)
     end
-    
+
     def construct_object(key)
       # Find the object definition
       obj_def = @defs[key]
@@ -242,13 +242,13 @@ module DIY #:nodoc:#
     rescue Exception => oops
       build_and_raise_construction_error(key, oops)
     end
-    
+
     def build_and_raise_construction_error(key, oops)
       cerr = ConstructionError.new(key,oops)
       cerr.set_backtrace(oops.backtrace)
       raise cerr
     end
-      
+
     def get_class_for_name_with_module_delimeters(class_name)
       class_name.split(/::/).inject(Object) do |mod,const_name| mod.const_get(const_name) end
     end
@@ -264,7 +264,7 @@ module DIY #:nodoc:#
       Namespace.new(str)
     end
   end
-  
+
   class Namespace #:nodoc:#
     def initialize(str)
       # 'using_namespace Animal Reptile'
@@ -292,15 +292,15 @@ module DIY #:nodoc:#
       @name = obj_name
     end
   end
-  
+
   class MethodDef #:nodoc:
     attr_accessor :name, :object, :method, :attach
-    
+
     def initialize(opts)
       @name, @object, @method, @attach = opts[:name], opts[:object], opts[:method], opts[:attach]
     end
   end
-  
+
   class ObjectDef #:nodoc:
     attr_accessor :name, :class_name, :library, :components
     def initialize(opts)
@@ -330,7 +330,7 @@ module DIY #:nodoc:#
 
       # Use Class Directly
       @use_class_directly = info.delete 'use_class_directly'
-      
+
       # Auto-compose
       compose = info.delete 'compose'
       if compose
@@ -380,7 +380,7 @@ module DIY #:nodoc:#
       object_name = object_name
       cause = cause
       m = "Failed to construct '#{object_name}'"
-      if cause 
+      if cause
         m << "\n  ...caused by:\n  >>> #{cause}"
       end
       super m
@@ -388,11 +388,11 @@ module DIY #:nodoc:#
   end
 
   class NamespaceError < RuntimeError #:nodoc:#
-  end 
+  end
 
   module Infl #:nodoc:#
     # Ganked this from Inflector:
-    def self.camelize(lower_case_and_underscored_word) 
+    def self.camelize(lower_case_and_underscored_word)
       lower_case_and_underscored_word.to_s.gsub(/\/(.?)/) { "::" + $1.upcase }.gsub(/(^|_)(.)/) { $2.upcase }
     end
     # Ganked this from Inflector:
diff --git a/test/unit-test/vendor/ceedling/vendor/diy/lib/diy/factory.rb b/test/unit-test/vendor/ceedling/vendor/diy/lib/diy/factory.rb
index d2566c5d1..8f00e5e45 100644
--- a/test/unit-test/vendor/ceedling/vendor/diy/lib/diy/factory.rb
+++ b/test/unit-test/vendor/ceedling/vendor/diy/lib/diy/factory.rb
@@ -1,7 +1,7 @@
 module DIY #:nodoc:#
   class FactoryDef #:nodoc:
     attr_accessor :name, :target, :class_name, :library
-    
+
     def initialize(opts)
       @name, @target, @library, @auto_require =
         opts[:name], opts[:target], opts[:library], opts[:auto_require]
@@ -10,7 +10,7 @@ module DIY #:nodoc:#
 			@library ||= Infl.underscore(@class_name) if @auto_require
     end
   end
-  
+
 	class Context
     def construct_factory(key)
       factory_def = @defs[key]
@@ -33,4 +33,3 @@ module DIY #:nodoc:#
     end
   end
 end
-
diff --git a/test/unit-test/vendor/ceedling/vendor/unity/auto/generate_config.yml b/test/unit-test/vendor/ceedling/vendor/unity/auto/generate_config.yml
index 4a5e47424..c7679aefc 100644
--- a/test/unit-test/vendor/ceedling/vendor/unity/auto/generate_config.yml
+++ b/test/unit-test/vendor/ceedling/vendor/unity/auto/generate_config.yml
@@ -18,7 +18,7 @@
       - Defs.h
       - Board.h
       - Exception.h
-  :boilerplates: 
+  :boilerplates:
     #these are inserted at the top of generated files.
     #just comment out or remove if not desired.
     #use %1$s where you would like the file name to appear (path/extension not included)
diff --git a/test/unit-test/vendor/ceedling/vendor/unity/src/meson.build b/test/unit-test/vendor/ceedling/vendor/unity/src/meson.build
index 1c7b426ff..5acd51a9b 100644
--- a/test/unit-test/vendor/ceedling/vendor/unity/src/meson.build
+++ b/test/unit-test/vendor/ceedling/vendor/unity/src/meson.build
@@ -6,6 +6,6 @@
 #
 unity_dir = include_directories('.')
 
-unity_lib = static_library(meson.project_name(), 
+unity_lib = static_library(meson.project_name(),
     files('unity.c'),
     include_directories: unity_dir)
diff --git a/tools/build_board.py b/tools/build_board.py
index 4593dafa5..13376d126 100644
--- a/tools/build_board.py
+++ b/tools/build_board.py
@@ -56,7 +56,7 @@ if __name__ == '__main__':
             result = pool.starmap(build_utils.build_example, pool_args)
             # sum all element of same index (column sum)
             result = list(map(sum, list(zip(*result))))
-            
+
             # add to total result
             total_result = list(map(lambda x, y: x + y, total_result, result))
 
diff --git a/tools/build_utils.py b/tools/build_utils.py
index de9052d2d..d0ef52717 100644
--- a/tools/build_utils.py
+++ b/tools/build_utils.py
@@ -124,4 +124,4 @@ def build_size(make_cmd):
             sram_size = int(size_list[1]) + int(size_list[2])
             return (flash_size, sram_size)
 
-    return (0, 0)
\ No newline at end of file
+    return (0, 0)
diff --git a/tools/iar_template.ipcf b/tools/iar_template.ipcf
index ba54fe057..d243aab0a 100644
--- a/tools/iar_template.ipcf
+++ b/tools/iar_template.ipcf
@@ -141,5 +141,5 @@
             <path>$TUSB_DIR$/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_IAR.c</path>
 		</group>
     </files>
-    
+
 </iarProjectConnection>
diff --git a/tools/mksunxi.py b/tools/mksunxi.py
index 04786f429..fd8557cfc 100644
--- a/tools/mksunxi.py
+++ b/tools/mksunxi.py
@@ -45,4 +45,4 @@ if __name__ == "__main__":
     if len(sys.argv) != 3:
         print("Usage: mksunxi.py input.bin output.bin")
         exit(1)
-    exit(process_file(sys.argv[1], sys.argv[2]))
\ No newline at end of file
+    exit(process_file(sys.argv[1], sys.argv[2]))
diff --git a/tools/pcapng_to_corpus.py b/tools/pcapng_to_corpus.py
index 78b1f77a2..9c31365eb 100755
--- a/tools/pcapng_to_corpus.py
+++ b/tools/pcapng_to_corpus.py
@@ -16,7 +16,7 @@ def extract_packets(pcap_file):
 
 def build_corpus_zip(zip_file_output, packets):
     """Builds a zip file with a file per packet
-    
+
     The structure of this zip corpus is a simple content addressable storage
     i.e. seed_file_name == sha256_digest(packet).
     """
@@ -25,7 +25,7 @@ def build_corpus_zip(zip_file_output, packets):
             hash = hashlib.sha256(packet).hexdigest()
             if hash not in out.namelist():
                 out.writestr(hash, packet)
-    
+
 
 def main(pcap_file, output_zip_file):
     packets = extract_packets(pcap_file)
@@ -35,12 +35,10 @@ if __name__ == "__main__":
     parser = argparse.ArgumentParser(
         prog = "pcapng_to_corpus.py",
         description="""Converts a wireshark capture to a zip of binary packet
-                    files suitable for an oss-fuzz corpus. In the case the 
-                    zip corpus already exists, this script will modify 
+                    files suitable for an oss-fuzz corpus. In the case the
+                    zip corpus already exists, this script will modify
                     the zip file in place adding seed entries.""")
     parser.add_argument('pcapng_capture_file')
     parser.add_argument('oss_fuzz_corpus_zip')
     args = parser.parse_args()
     main(args.pcapng_capture_file, args.oss_fuzz_corpus_zip)
-    
-    
diff --git a/tools/usb_drivers/tinyusb_win_usbser.inf b/tools/usb_drivers/tinyusb_win_usbser.inf
index e7f7a9b22..659f048ae 100644
--- a/tools/usb_drivers/tinyusb_win_usbser.inf
+++ b/tools/usb_drivers/tinyusb_win_usbser.inf
@@ -105,4 +105,4 @@ DRIVERFILENAME ="usbser"
 MFGNAME="tinyusb.org"
 INSTDISK="tinyusb CDC Driver"
 DESCRIPTION="tinyusb Serial"
-SERVICE="USB RS-232 Emulation Driver"
\ No newline at end of file
+SERVICE="USB RS-232 Emulation Driver"

From 2e5f649fd3ba3e0a17bb6007f773461bdc0e82fb Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Mar 2023 16:57:30 +0700
Subject: [PATCH 165/691] fix run unit test with pre-commit

---
 .github/workflows/pre-commit.yml | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/.github/workflows/pre-commit.yml b/.github/workflows/pre-commit.yml
index 6deee872f..86c106151 100644
--- a/.github/workflows/pre-commit.yml
+++ b/.github/workflows/pre-commit.yml
@@ -26,19 +26,18 @@ jobs:
     - name: Checkout TinyUSB
       uses: actions/checkout@v3
 
+    - name: Get Dependencies
+      run: |
+        gem install ceedling
+        #cd test/unit-test
+        #ceedling test:all
+
     - name: Run pre-commit
       uses: pre-commit/action@v3.0.0
 
     - name: Run codespell
       uses: codespell-project/actions-codespell@master
 
-    - name: Run Unit Tests
-      run: |
-        # Install Ceedling
-        gem install ceedling
-        cd test/unit-test
-        ceedling test:all
-
     - name: Build Fuzzer
       run: |
         export CC=clang

From a4b17483b9e7cb5f73ec1b64cdd41987743ef4da Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Mar 2023 17:01:56 +0700
Subject: [PATCH 166/691] fix ci build with fomu

---
 examples/rules.mk | 2 --
 tools/get_deps.py | 3 ---
 2 files changed, 5 deletions(-)

diff --git a/examples/rules.mk b/examples/rules.mk
index 56ad89fd0..59cf4fd1f 100644
--- a/examples/rules.mk
+++ b/examples/rules.mk
@@ -192,9 +192,7 @@ endif
 # get depenecies
 .PHONY: get-deps
 get-deps:
-  ifdef DEPS_SUBMODULES
 	$(PYTHON) $(TOP)/tools/get_deps.py $(DEPS_SUBMODULES)
-  endif
 
 .PHONY: size
 size: $(BUILD)/$(PROJECT).elf
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 24e5f383a..574e5d089 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -104,9 +104,6 @@ def get_a_dep(d):
 
 
 if __name__ == "__main__":
-    if len(sys.argv) <= 1:
-        sys.exit(1)
-
     status = 0
     deps = list(deps_mandatory.keys()) + sys.argv[1:]
     with Pool() as pool:

From 0c174c17ad98249f5862440b9f4ff25e10fc0824 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Mar 2023 17:04:11 +0700
Subject: [PATCH 167/691] fix ci with building fuzz

---
 test/fuzz/rules.mk | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/test/fuzz/rules.mk b/test/fuzz/rules.mk
index 825abddc5..ee91c706d 100644
--- a/test/fuzz/rules.mk
+++ b/test/fuzz/rules.mk
@@ -142,9 +142,7 @@ endif
 # get depenecies
 .PHONY: get-deps
 get-deps:
-  ifdef DEPS_SUBMODULES
-	git -C $(TOP) submodule update --init $(DEPS_SUBMODULES)
-  endif
+	$(PYTHON) $(TOP)/tools/get_deps.py $(DEPS_SUBMODULES)
 
 size: $(BUILD)/$(PROJECT)
 	-@echo ''

From f14b4ba30a1800a1ed3ffa4977d182b5c1e1f5a5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Mar 2023 17:20:01 +0700
Subject: [PATCH 168/691] use codespell as pre-commit

---
 .pre-commit-config.yaml | 41 ++++++++++++++++++++---------------------
 1 file changed, 20 insertions(+), 21 deletions(-)

diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index 976f04e63..7d7c1a3ce 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -3,26 +3,25 @@
 # SPDX-License-Identifier: Unlicense
 
 repos:
--   repo: https://github.com/pre-commit/pre-commit-hooks
-    rev: v4.4.0
-    hooks:
-    - id: check-yaml
-    - id: trailing-whitespace
-    - id: end-of-file-fixer
-    - id: forbid-submodules
+- repo: https://github.com/pre-commit/pre-commit-hooks
+  rev: v4.4.0
+  hooks:
+  - id: check-yaml
+  - id: trailing-whitespace
+  - id: end-of-file-fixer
+  - id: forbid-submodules
 
--   repo: local
-    hooks:
-    #-   id: codespell
-    #    name: codespell
-    #    entry: codespell
-    #    types_or: [c, header]
-    #    language: system
+- repo: https://github.com/codespell-project/codespell
+  rev: v2.2.4
+  hooks:
+  - id: codespell
 
-    -   id: unit-test
-        name: unit-test
-        files: ^(src/|test/unit-test/)
-        entry: sh -c "cd test/unit-test && ceedling test:all"
-        pass_filenames: false
-        types_or: [c, header]
-        language: system
+- repo: local
+  hooks:
+  - id: unit-test
+    name: unit-test
+    files: ^(src/|test/unit-test/)
+    entry: sh -c "cd test/unit-test && ceedling test:all"
+    pass_filenames: false
+    types_or: [c, header]
+    language: system

From 25d802532c27f11a6445f71ef44af98a2a780864 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Mar 2023 17:27:34 +0700
Subject: [PATCH 169/691] fix spelling

---
 .codespell/ignore-words.txt                            |  2 ++
 .codespellrc                                           |  2 +-
 .pre-commit-config.yaml                                |  2 ++
 .../da1469x/SDK_10.0.8.105/sdk/bsp/include/DA1469xAB.h | 10 +++++-----
 hw/mcu/dialog/da1469x/src/system_da1469x.c             |  2 +-
 .../nrf5x/s140_nrf52_6.1.1_API/include/ble_l2cap.h     |  2 +-
 hw/mcu/sony/cxd56/tools/flash_writer.py                |  6 +++---
 hw/mcu/sony/cxd56/tools/xmodem.py                      |  4 ++--
 test/unit-test/vendor/ceedling/bin/ceedling            |  2 +-
 test/unit-test/vendor/ceedling/lib/ceedling.rb         |  2 +-
 .../lib/ceedling/preprocessinator_includes_handler.rb  |  2 +-
 .../vendor/ceedling/lib/ceedling/rules_preprocess.rake |  2 +-
 .../vendor/ceedling/lib/ceedling/system_utils.rb       |  2 +-
 .../ceedling/plugins/dependencies/dependencies.rake    |  2 +-
 .../ceedling/plugins/fake_function_framework/README.md |  2 +-
 .../examples/fff_example/project.yml                   |  2 +-
 .../examples/fff_example/test/test_event_processor.c   |  2 +-
 .../lib/fake_function_framework.rb                     |  2 +-
 .../plugins/gcov/lib/reportgenerator_reportinator.rb   |  2 +-
 .../vendor/ceedling/plugins/module_generator/README.md |  2 +-
 .../ceedling/vendor/cmock/lib/cmock_header_parser.rb   |  4 ++--
 .../ceedling/vendor/unity/auto/generate_test_runner.rb |  2 +-
 .../unit-test/vendor/ceedling/vendor/unity/src/unity.c |  2 +-
 23 files changed, 33 insertions(+), 29 deletions(-)

diff --git a/.codespell/ignore-words.txt b/.codespell/ignore-words.txt
index e1ad88a07..fc14fe417 100644
--- a/.codespell/ignore-words.txt
+++ b/.codespell/ignore-words.txt
@@ -7,3 +7,5 @@ dout
 mot
 te
 attch
+endianess
+pris
diff --git a/.codespellrc b/.codespellrc
index 8c32ed706..dc089903c 100644
--- a/.codespellrc
+++ b/.codespellrc
@@ -7,4 +7,4 @@ exclude-file = .codespell/exclude-file.txt
 check-filenames =
 check-hidden =
 count =
-skip = .cproject,./.git,./hw/mcu,./lib,./examples/*/*/_build,./examples/*/*/ses,./examples/*/*/ozone,./hw/mcu,./test/unit-test/vendor,./tests_obsolete,./tools/uf2
+skip = *.rb,.cproject,.git,./lib,./examples/*/*/_build,./examples/*/*/ses,./examples/*/*/ozone,./hw/mcu,./tests_obsolete
diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index 7d7c1a3ce..d37c27d40 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -15,6 +15,8 @@ repos:
   rev: v2.2.4
   hooks:
   - id: codespell
+    args: [-w]
+    exclude: ^lib/
 
 - repo: local
   hooks:
diff --git a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/DA1469xAB.h b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/DA1469xAB.h
index fa2ca5d94..faf8b852a 100644
--- a/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/DA1469xAB.h
+++ b/hw/mcu/dialog/da1469x/SDK_10.0.8.105/sdk/bsp/include/DA1469xAB.h
@@ -954,11 +954,11 @@ typedef struct {                                /*!< (@ 0x50030A00) LRA Structur
   __IOM uint32_t  LRA_FLT_COEF3_REG;            /*!< (@ 0x00000034) LRA Filter Coefficient Register                            */
   __IOM uint32_t  LRA_BRD_LS_REG;               /*!< (@ 0x00000038) LRA Bridge Register                                        */
   __IOM uint32_t  LRA_BRD_HS_REG;               /*!< (@ 0x0000003C) LRA Bridge Register                                        */
-  __IOM uint32_t  LRA_BRD_STAT_REG;             /*!< (@ 0x00000040) LRA Bridge Staus Register                                  */
+  __IOM uint32_t  LRA_BRD_STAT_REG;             /*!< (@ 0x00000040) LRA Bridge Status Register                                  */
   __IOM uint32_t  LRA_ADC_CTRL1_REG;            /*!< (@ 0x00000044) General Purpose ADC Control Register                       */
   __IM  uint32_t  RESERVED[2];
   __IOM uint32_t  LRA_ADC_RESULT_REG;           /*!< (@ 0x00000050) General Purpose ADC Result Register                        */
-  __IOM uint32_t  LRA_LDO_REG;                  /*!< (@ 0x00000054) LRA LDO Regsiter                                           */
+  __IOM uint32_t  LRA_LDO_REG;                  /*!< (@ 0x00000054) LRA LDO Register                                           */
   __IOM uint32_t  LRA_DFT_REG;                  /*!< (@ 0x00000058) LRA test Register                                          */
 } LRA_Type;                                     /*!< Size = 92 (0x5c)                                                          */
 
@@ -1043,7 +1043,7 @@ typedef struct {                                /*!< (@ 0x50000200) PDC Structur
   __IOM uint32_t  PDC_CTRL15_REG;               /*!< (@ 0x0000003C) PDC control register                                       */
   __IM  uint32_t  RESERVED[16];
   __IOM uint32_t  PDC_ACKNOWLEDGE_REG;          /*!< (@ 0x00000080) Clear a pending PDC bit                                    */
-  __IOM uint32_t  PDC_PENDING_REG;              /*!< (@ 0x00000084) Shows any pending wakup event                              */
+  __IOM uint32_t  PDC_PENDING_REG;              /*!< (@ 0x00000084) Shows any pending wakeup event                              */
   __IOM uint32_t  PDC_PENDING_SNC_REG;          /*!< (@ 0x00000088) Shows any pending IRQ to SNC                               */
   __IOM uint32_t  PDC_PENDING_CM33_REG;         /*!< (@ 0x0000008C) Shows any pending IRQ to CM33                              */
   __IOM uint32_t  PDC_PENDING_CMAC_REG;         /*!< (@ 0x00000090) Shows any pending IRQ to CM33                              */
@@ -1752,8 +1752,8 @@ typedef struct {                                /*!< (@ 0x50000100) WAKEUP Struc
   __IOM uint32_t  WKUP_SELECT_P1_REG;           /*!< (@ 0x00000018) select which inputs from P1 port can trigger
                                                                     wkup counter                                               */
   __IM  uint32_t  RESERVED2[3];
-  __IOM uint32_t  WKUP_POL_P0_REG;              /*!< (@ 0x00000028) select the sesitivity polarity for each P0 input           */
-  __IOM uint32_t  WKUP_POL_P1_REG;              /*!< (@ 0x0000002C) select the sesitivity polarity for each P1 input           */
+  __IOM uint32_t  WKUP_POL_P0_REG;              /*!< (@ 0x00000028) select the sensitivity polarity for each P0 input           */
+  __IOM uint32_t  WKUP_POL_P1_REG;              /*!< (@ 0x0000002C) select the sensitivity polarity for each P1 input           */
   __IM  uint32_t  RESERVED3[3];
   __IOM uint32_t  WKUP_STATUS_P0_REG;           /*!< (@ 0x0000003C) Event status register for P0                               */
   __IOM uint32_t  WKUP_STATUS_P1_REG;           /*!< (@ 0x00000040) Event status register for P1                               */
diff --git a/hw/mcu/dialog/da1469x/src/system_da1469x.c b/hw/mcu/dialog/da1469x/src/system_da1469x.c
index 538bac79f..91477b553 100644
--- a/hw/mcu/dialog/da1469x/src/system_da1469x.c
+++ b/hw/mcu/dialog/da1469x/src/system_da1469x.c
@@ -34,7 +34,7 @@ SystemInit(void)
   __ISB();
 #endif
 
-  /* Freez watchdog */
+  /* Freeze watchdog */
   GPREG->SET_FREEZE_REG |= GPREG_SET_FREEZE_REG_FRZ_SYS_WDOG_Msk;
   /* Initialize power domains (disable radio only) */
   CRG_TOP->PMU_CTRL_REG = CRG_TOP_PMU_CTRL_REG_RADIO_SLEEP_Msk;
diff --git a/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble_l2cap.h b/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble_l2cap.h
index edaf6641f..8cbed0fac 100644
--- a/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble_l2cap.h
+++ b/hw/mcu/nordic/nrf5x/s140_nrf52_6.1.1_API/include/ble_l2cap.h
@@ -286,7 +286,7 @@ typedef struct
 /**@brief L2CAP event structure. */
 typedef struct
 {
-  uint16_t conn_handle;                                     /**< Connection Handle on which the event occured. */
+  uint16_t conn_handle;                                     /**< Connection Handle on which the event occurred. */
   uint16_t local_cid;                                       /**< Local Channel ID of the L2CAP channel, or
                                                                  @ref BLE_L2CAP_CID_INVALID if not present. */
   union
diff --git a/hw/mcu/sony/cxd56/tools/flash_writer.py b/hw/mcu/sony/cxd56/tools/flash_writer.py
index 840f10c32..bf630547a 100755
--- a/hw/mcu/sony/cxd56/tools/flash_writer.py
+++ b/hw/mcu/sony/cxd56/tools/flash_writer.py
@@ -46,7 +46,7 @@ import xmodem
 
 import_serial_module = True
 
-# When SDK release, plase set SDK_RELEASE as True.
+# When SDK release, please set SDK_RELEASE as True.
 SDK_RELEASE = False
 
 if SDK_RELEASE :
@@ -508,7 +508,7 @@ def main():
 	do_wait_reset = True
 	if ConfigArgs.AUTO_RESET:
 		if subprocess.call("cd " + sys.path[0] + "; ./reset_board.sh", shell=True) == 0:
-			print("auto reset board sucess!!")
+			print("auto reset board success!!")
 			do_wait_reset = False
 			bootrom_msg = writer.cancel_autoboot()
 
@@ -536,7 +536,7 @@ def main():
 
 	# Remove files
 	if ConfigArgs.ERASE_NAME :
-		print(">>> Remove exisiting files ...")
+		print(">>> Remove existing files ...")
 		writer.delete_files(ConfigArgs.ERASE_NAME)
 
 	# Install files
diff --git a/hw/mcu/sony/cxd56/tools/xmodem.py b/hw/mcu/sony/cxd56/tools/xmodem.py
index c93430056..60fcc952c 100644
--- a/hw/mcu/sony/cxd56/tools/xmodem.py
+++ b/hw/mcu/sony/cxd56/tools/xmodem.py
@@ -147,7 +147,7 @@ class XMODEM(object):
     >>> modem = XMODEM(getc, putc)
 
 
-    :param getc: Function to retreive bytes from a stream
+    :param getc: Function to retrieve bytes from a stream
     :type getc: callable
     :param putc: Function to transmit bytes to a stream
     :type putc: callable
@@ -215,7 +215,7 @@ class XMODEM(object):
             >>> print modem.send(stream)
             True
 
-        Returns ``True`` upon succesful transmission or ``False`` in case of
+        Returns ``True`` upon successful transmission or ``False`` in case of
         failure.
 
         :param stream: The stream object to send data from.
diff --git a/test/unit-test/vendor/ceedling/bin/ceedling b/test/unit-test/vendor/ceedling/bin/ceedling
index d110f3d4c..b317db2f1 100644
--- a/test/unit-test/vendor/ceedling/bin/ceedling
+++ b/test/unit-test/vendor/ceedling/bin/ceedling
@@ -86,7 +86,7 @@ unless (project_found)
           end
         end
 
-        # Genarate gitkeep in test support path
+        # Generate gitkeep in test support path
         FileUtils.touch(File.join(test_support_path, '.gitkeep'))
 
         # If documentation requested, create a place to dump them and do so
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling.rb b/test/unit-test/vendor/ceedling/lib/ceedling.rb
index 6c57fb48d..063cfddd5 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling.rb
@@ -77,7 +77,7 @@ module Ceedling
   # * The gem name must be prefixed with 'ceedling-' followed by the plugin
   #   name (ex. 'ceedling-bullseye')
   #
-  # * The contents of the plugin must be isntalled into a subdirectory of
+  # * The contents of the plugin must be installed into a subdirectory of
   #   the gem with the same name as the plugin (ex. 'bullseye/')
   #
   # === Arguments
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/preprocessinator_includes_handler.rb b/test/unit-test/vendor/ceedling/lib/ceedling/preprocessinator_includes_handler.rb
index 916d31332..9e5ae1fbf 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/preprocessinator_includes_handler.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/preprocessinator_includes_handler.rb
@@ -181,7 +181,7 @@ class PreprocessinatorIncludesHandler
       end
       # If we found a real file, delete it from the array and return it,
       # otherwise return nil. Since nil is falsy this has the effect of making
-      # find_all return only the annotated filess for which a real file was
+      # find_all return only the annotated files for which a real file was
       # found/deleted
       idx ? real_files.delete_at(idx) : nil
     end.compact
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/rules_preprocess.rake b/test/unit-test/vendor/ceedling/lib/ceedling/rules_preprocess.rake
index 936961ce8..d599421c0 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/rules_preprocess.rake
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/rules_preprocess.rake
@@ -9,7 +9,7 @@ rule(/#{PROJECT_TEST_PREPROCESS_FILES_PATH}\/.+/ => [
     end
   ]) do |file|
   if (not @ceedling[:configurator].project_use_deep_dependencies)
-    raise 'ERROR: Ceedling preprocessing rule invoked though neccessary auxiliary dependency support not enabled.'
+    raise 'ERROR: Ceedling preprocessing rule invoked though necessary auxiliary dependency support not enabled.'
   end
   @ceedling[:generator].generate_preprocessed_file(TEST_SYM, file.source)
 end
diff --git a/test/unit-test/vendor/ceedling/lib/ceedling/system_utils.rb b/test/unit-test/vendor/ceedling/lib/ceedling/system_utils.rb
index 81bb7bc54..7d232a7fb 100644
--- a/test/unit-test/vendor/ceedling/lib/ceedling/system_utils.rb
+++ b/test/unit-test/vendor/ceedling/lib/ceedling/system_utils.rb
@@ -7,7 +7,7 @@ end
 
 
 ##
-# Class containing system utility funcions.
+# Class containing system utility functions.
 class SystemUtils
 
   constructor :system_wrapper
diff --git a/test/unit-test/vendor/ceedling/plugins/dependencies/dependencies.rake b/test/unit-test/vendor/ceedling/plugins/dependencies/dependencies.rake
index 08a1a48eb..4b9409bed 100644
--- a/test/unit-test/vendor/ceedling/plugins/dependencies/dependencies.rake
+++ b/test/unit-test/vendor/ceedling/plugins/dependencies/dependencies.rake
@@ -113,7 +113,7 @@ end
 # Add any artifact:include or :source folders to our release & test includes paths so linking and mocking work.
 @ceedling[DEPENDENCIES_SYM].add_headers_and_sources()
 
-# Add tasks for building or cleaning ALL depencies
+# Add tasks for building or cleaning ALL dependencies
 namespace DEPENDENCIES_SYM do
   desc "Deploy missing dependencies."
   task :deploy => DEPENDENCIES_LIBRARIES.map{|deplib| "#{DEPENDENCIES_SYM}:deploy:#{@ceedling[DEPENDENCIES_SYM].get_name(deplib)}"}
diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/README.md b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/README.md
index 8042775e5..c99a95196 100644
--- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/README.md
+++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/README.md
@@ -34,7 +34,7 @@ In the `:plugins` configuration, add `fake_function_framework` to the list of en
     - module_generator
     - fake_function_framework
 ```
-*Note that you could put the plugin source in some other loaction.
+*Note that you could put the plugin source in some other location.
 In that case you'd need to add a new path the `:load_paths`.*
 
 ## How to use it
diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/project.yml b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/project.yml
index 00e395d0c..3253acf69 100644
--- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/project.yml
+++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/project.yml
@@ -33,7 +33,7 @@
   # in order to add common defines:
   #  1) remove the trailing [] from the :common: section
   #  2) add entries to the :common: section (e.g. :test: has TEST defined)
-  :commmon: &common_defines []
+  :common: &common_defines []
   :test:
     - *common_defines
     - TEST
diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/test/test_event_processor.c b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/test/test_event_processor.c
index 9f999443d..ea59cd3e6 100644
--- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/test/test_event_processor.c
+++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/examples/fff_example/test/test_event_processor.c
@@ -41,7 +41,7 @@ test_whenThePowerReadingIsLessThan5_thenTheStatusLedIsNotTurnedOn(void)
 }
 
 /*
-    Test that a single function was called with the correct arugment.
+    Test that a single function was called with the correct argument.
 */
 void
 test_whenTheVolumeKnobIsMaxed_thenVolumeDisplayIsSetTo11(void)
diff --git a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/lib/fake_function_framework.rb b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/lib/fake_function_framework.rb
index 51a90b3a5..8fbb1e9b5 100644
--- a/test/unit-test/vendor/ceedling/plugins/fake_function_framework/lib/fake_function_framework.rb
+++ b/test/unit-test/vendor/ceedling/plugins/fake_function_framework/lib/fake_function_framework.rb
@@ -23,7 +23,7 @@ class FakeFunctionFramework < Plugin
     # all mocks linked into the test.
     File.open(arg_hash[:runner_file], 'a') do |f|
       f.puts
-      f.puts "//=======Defintions of FFF variables====="
+      f.puts "//=======Definitions of FFF variables====="
       f.puts %{#include "fff.h"}
       f.puts "DEFINE_FFF_GLOBALS;"
     end
diff --git a/test/unit-test/vendor/ceedling/plugins/gcov/lib/reportgenerator_reportinator.rb b/test/unit-test/vendor/ceedling/plugins/gcov/lib/reportgenerator_reportinator.rb
index d4a885c97..96cf89163 100644
--- a/test/unit-test/vendor/ceedling/plugins/gcov/lib/reportgenerator_reportinator.rb
+++ b/test/unit-test/vendor/ceedling/plugins/gcov/lib/reportgenerator_reportinator.rb
@@ -138,7 +138,7 @@ class ReportGeneratorReportinator
       # Removing trailing ';' after the last report type.
       args = args.chomp(";")
 
-      # Append a space seperator after the report type.
+      # Append a space separator after the report type.
       args += "\" "
     end
 
diff --git a/test/unit-test/vendor/ceedling/plugins/module_generator/README.md b/test/unit-test/vendor/ceedling/plugins/module_generator/README.md
index 61cf45bd6..c7e982352 100644
--- a/test/unit-test/vendor/ceedling/plugins/module_generator/README.md
+++ b/test/unit-test/vendor/ceedling/plugins/module_generator/README.md
@@ -82,7 +82,7 @@ by adding to the `:includes` array. For example:
 ### Boilerplates
 
 You can specify the actual boilerplate used for each of your files. This is the handy place to
-put that corporate copyright notice (or maybe a copyleft notice, if that's your perference?)
+put that corporate copyright notice (or maybe a copyleft notice, if that's your preference?)
 
 ```
 :module_generator:
diff --git a/test/unit-test/vendor/ceedling/vendor/cmock/lib/cmock_header_parser.rb b/test/unit-test/vendor/ceedling/vendor/cmock/lib/cmock_header_parser.rb
index 9730bf40b..b008dc149 100644
--- a/test/unit-test/vendor/ceedling/vendor/cmock/lib/cmock_header_parser.rb
+++ b/test/unit-test/vendor/ceedling/vendor/cmock/lib/cmock_header_parser.rb
@@ -119,7 +119,7 @@ class CMockHeaderParser
     square_bracket_pair_regex_format = /\{[^\{\}]*\}/ # Regex to match one whole block enclosed by two square brackets
 
     # Convert user provided string patterns to regex
-    # Use word bounderies before and after the user regex to limit matching to actual word iso part of a word
+    # Use word boundaries before and after the user regex to limit matching to actual word iso part of a word
     @inline_function_patterns.each do |user_format_string|
       user_regex = Regexp.new(user_format_string)
       word_boundary_before_user_regex = /\b/
@@ -258,7 +258,7 @@ class CMockHeaderParser
 
     source.gsub!(/\s*=\s*['"a-zA-Z0-9_\.]+\s*/, '')                                        # remove default value statements from argument lists
     source.gsub!(/^(?:[\w\s]*\W)?typedef\W[^;]*/m, '')                                     # remove typedef statements
-    source.gsub!(/\)(\w)/, ') \1')                                                         # add space between parenthese and alphanumeric
+    source.gsub!(/\)(\w)/, ') \1')                                                         # add space between parentheses and alphanumeric
     source.gsub!(/(^|\W+)(?:#{@c_strippables.join('|')})(?=$|\W+)/, '\1') unless @c_strippables.empty? # remove known attributes slated to be stripped
 
     # scan standalone function pointers and remove them, because they can just be ignored
diff --git a/test/unit-test/vendor/ceedling/vendor/unity/auto/generate_test_runner.rb b/test/unit-test/vendor/ceedling/vendor/unity/auto/generate_test_runner.rb
index d1d8f91af..6821bdc60 100644
--- a/test/unit-test/vendor/ceedling/vendor/unity/auto/generate_test_runner.rb
+++ b/test/unit-test/vendor/ceedling/vendor/unity/auto/generate_test_runner.rb
@@ -114,7 +114,7 @@ class UnityTestRunnerGenerator
     # @ is not a valid C character, so there should be no clashes with files genuinely containing these markers
     substring_subs = { '{' => '@co@', '}' => '@cc@', ';' => '@ss@', '/' => '@fs@' }
     substring_re = Regexp.union(substring_subs.keys)
-    substring_unsubs = substring_subs.invert                   # the inverse map will be used to fix the strings afterwords
+    substring_unsubs = substring_subs.invert                   # the inverse map will be used to fix the strings afterwards
     substring_unsubs['@quote@'] = '\\"'
     substring_unsubs['@apos@'] = '\\\''
     substring_unre = Regexp.union(substring_unsubs.keys)
diff --git a/test/unit-test/vendor/ceedling/vendor/unity/src/unity.c b/test/unit-test/vendor/ceedling/vendor/unity/src/unity.c
index 764a42b18..ae5afa856 100644
--- a/test/unit-test/vendor/ceedling/vendor/unity/src/unity.c
+++ b/test/unit-test/vendor/ceedling/vendor/unity/src/unity.c
@@ -13,7 +13,7 @@
 #define PROGMEM
 #endif
 
-/* If omitted from header, declare overrideable prototypes here so they're ready for use */
+/* If omitted from header, declare overridable prototypes here so they're ready for use */
 #ifdef UNITY_OMIT_OUTPUT_CHAR_HEADER_DECLARATION
 void UNITY_OUTPUT_CHAR(int);
 #endif

From 57d23c7a68b37555cfe1c8a8dc4c0983fb07f0e9 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Mar 2023 18:34:56 +0700
Subject: [PATCH 170/691] update example description

---
 examples/host/msc_file_explorer/src/main.c | 32 ++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/examples/host/msc_file_explorer/src/main.c b/examples/host/msc_file_explorer/src/main.c
index 40c88a7d3..7b1c2ef27 100644
--- a/examples/host/msc_file_explorer/src/main.c
+++ b/examples/host/msc_file_explorer/src/main.c
@@ -23,6 +23,38 @@
  *
  */
 
+/* Example to show how to navigate mass storage device with built-in command line.
+ * Type help for list of supported commands and syntax (mostly linux commands)
+
+ > help
+ * help
+        Print list of commands
+ * cat
+        Usage: cat [FILE]...
+        Concatenate FILE(s) to standard output..
+ * cd
+        Usage: cd [DIR]...
+        Change the current directory to DIR.
+ * cp
+        Usage: cp SOURCE DEST
+        Copy SOURCE to DEST.
+ * ls
+        Usage: ls [DIR]...
+        List information about the FILEs (the current directory by default).
+ * pwd
+        Usage: pwd
+        Print the name of the current working directory.
+ * mkdir
+        Usage: mkdir DIR...
+        Create the DIRECTORY(ies), if they do not already exist..
+ * mv
+        Usage: mv SOURCE DEST...
+        Rename SOURCE to DEST.
+ * rm
+        Usage: rm [FILE]...
+        Remove (unlink) the FILE(s).
+ */
+
 #include <stdlib.h>
 #include <stdio.h>
 #include <string.h>

From 6683053f4827b682f51c56ed664e440c0286de80 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Mar 2023 18:44:30 +0700
Subject: [PATCH 171/691] finalize

---
 .github/workflows/pre-commit.yml | 3 ---
 .pre-commit-config.yaml          | 2 +-
 2 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/.github/workflows/pre-commit.yml b/.github/workflows/pre-commit.yml
index 86c106151..ab416bc52 100644
--- a/.github/workflows/pre-commit.yml
+++ b/.github/workflows/pre-commit.yml
@@ -35,9 +35,6 @@ jobs:
     - name: Run pre-commit
       uses: pre-commit/action@v3.0.0
 
-    - name: Run codespell
-      uses: codespell-project/actions-codespell@master
-
     - name: Build Fuzzer
       run: |
         export CC=clang
diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index d37c27d40..7fa6f52ee 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -15,7 +15,7 @@ repos:
   rev: v2.2.4
   hooks:
   - id: codespell
-    args: [-w]
+    #args: [-w]
     exclude: ^lib/
 
 - repo: local

From bc57358eb0b9a72325a10b0324ae4a8a024cc692 Mon Sep 17 00:00:00 2001
From: Ha Thach <thach@tinyusb.org>
Date: Fri, 17 Mar 2023 19:29:25 +0700
Subject: [PATCH 172/691] Update README.rst

---
 README.rst | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/README.rst b/README.rst
index 566af8584..adca22433 100644
--- a/README.rst
+++ b/README.rst
@@ -50,8 +50,8 @@ The stack supports the following MCUs:
 - **Raspberry Pi:** RP2040
 - **Renesas:**
 
-	- RX Series: 63N, 65N, 72N
-	- RA Series: RA4M1, RA4M3
+  - RX Series: 63N, 65N, 72N
+  - RA Series: RA4M1, RA4M3
 
 - **Silabs:** EFM32GG
 - **Sony:** CXD56

From 899e7cc4f908b721c619818b6c0c5f9d71974edb Mon Sep 17 00:00:00 2001
From: Koen De Vleeschauwer <kdv@kdvelectronics.eu>
Date: Thu, 2 Feb 2023 10:16:57 +0100
Subject: [PATCH 173/691] add board: DshanMCU Pitaya Lite

---
 .../boards/mm32f327x_bluepillplus/board.mk    |   8 +
 .../boards/mm32f327x_bluepillplus/flash.ld    | 163 ++++++++++++++++
 .../mm32f327x_bluepillplus.c                  | 182 ++++++++++++++++++
 .../boards/mm32f327x_pitaya_lite/board.mk     |   8 +
 .../boards/mm32f327x_pitaya_lite/flash.ld     | 163 ++++++++++++++++
 .../mm32f327x_pitaya_lite.c                   | 182 ++++++++++++++++++
 6 files changed, 706 insertions(+)
 create mode 100644 hw/bsp/mm32/boards/mm32f327x_bluepillplus/board.mk
 create mode 100644 hw/bsp/mm32/boards/mm32f327x_bluepillplus/flash.ld
 create mode 100644 hw/bsp/mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c
 create mode 100644 hw/bsp/mm32/boards/mm32f327x_pitaya_lite/board.mk
 create mode 100644 hw/bsp/mm32/boards/mm32f327x_pitaya_lite/flash.ld
 create mode 100644 hw/bsp/mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c

diff --git a/hw/bsp/mm32/boards/mm32f327x_bluepillplus/board.mk b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/board.mk
new file mode 100644
index 000000000..b7663926f
--- /dev/null
+++ b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/board.mk
@@ -0,0 +1,8 @@
+LD_FILE = $(BOARD_PATH)/flash.ld
+SRC_S += $(SDK_DIR)/mm32f327x/MM32F327x/Source/GCC_StartAsm/startup_mm32m3ux_u_gcc.S
+
+# For flash-jlink target
+#JLINK_DEVICE = stm32f411ve
+
+# flash target using on-board stlink
+#flash: flash-jlink
diff --git a/hw/bsp/mm32/boards/mm32f327x_bluepillplus/flash.ld b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/flash.ld
new file mode 100644
index 000000000..0b45ee7bd
--- /dev/null
+++ b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/flash.ld
@@ -0,0 +1,163 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 MM32 SE TEAM
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = 0x2001FFFF;    /* end of RAM */
+
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200;      /* required amount of heap  */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 512K
+RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 128K
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into FLASH */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data goes into FLASH */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data goes into FLASH */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+  .ARM : {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } >FLASH
+
+  .preinit_array     :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >FLASH
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >FLASH
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >FLASH
+
+  /* used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections goes into RAM, load LMA copy after code */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+  } >RAM AT> FLASH
+
+  
+  /* Uninitialized data section */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough RAM left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  
+
+  /* Remove information from the standard libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/hw/bsp/mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c
new file mode 100644
index 000000000..08abc83c6
--- /dev/null
+++ b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c
@@ -0,0 +1,182 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 MM32 SE TEAM
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* WeAct BluePillPlus with MM32F3273G6P */
+
+#include "mm32_device.h"
+#include "hal_conf.h"
+#include "tusb.h"
+#include "../board.h"
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void OTG_FS_IRQHandler (void)
+{
+  tud_int_handler(0);
+
+}
+void USB_DeviceClockInit (void)
+{
+  /* Select USBCLK source */
+  //  RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_Div1);
+  RCC->CFGR &= ~(0x3 << 22);
+  RCC->CFGR |= (0x1 << 22);
+
+  /* Enable USB clock */
+  RCC->AHB2ENR |= 0x1 << 7;
+}
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM DECLARATION
+//--------------------------------------------------------------------+
+// LED
+
+extern u32 SystemCoreClock;
+const int baudrate = 115200;
+
+void board_init (void)
+{
+//   usb clock	
+  USB_DeviceClockInit();
+
+  if ( SysTick_Config(SystemCoreClock / 1000) )
+  {
+    while ( 1 )
+      ;
+  }
+  NVIC_SetPriority(SysTick_IRQn, 0x0);
+
+  // LED on PB2
+  GPIO_InitTypeDef GPIO_InitStruct;
+  RCC_AHBPeriphClockCmd(RCC_AHBENR_GPIOB, ENABLE);
+  GPIO_StructInit(&GPIO_InitStruct);
+
+  GPIO_InitStruct.GPIO_Pin = GPIO_Pin_2;
+  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
+  GPIO_InitStruct.GPIO_Mode = GPIO_Mode_Out_PP;
+  GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+  board_led_write(true);
+
+  // KEY on PA0
+  RCC_AHBPeriphClockCmd(RCC_AHBENR_GPIOA, ENABLE);
+  GPIO_StructInit(&GPIO_InitStruct);
+  GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0;
+  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_10MHz;
+  GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IPD;
+  GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  // UART
+  UART_InitTypeDef UART_InitStruct;
+
+  RCC_APB2PeriphClockCmd(RCC_APB2ENR_UART1, ENABLE);    //enableUART1,GPIOAclock
+  RCC_AHBPeriphClockCmd(RCC_AHBENR_GPIOA, ENABLE);      //
+  //UART initialset
+
+  GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_7);
+  GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_7);
+
+  UART_StructInit(&UART_InitStruct);
+  UART_InitStruct.UART_BaudRate = baudrate;
+  UART_InitStruct.UART_WordLength = UART_WordLength_8b;
+  UART_InitStruct.UART_StopBits = UART_StopBits_1;    //one stopbit
+  UART_InitStruct.UART_Parity = UART_Parity_No;    //none odd-even  verify bit
+  UART_InitStruct.UART_HardwareFlowControl = UART_HardwareFlowControl_None;    //No hardware flow control
+  UART_InitStruct.UART_Mode = UART_Mode_Rx | UART_Mode_Tx;    // receive and sent  mode
+
+  UART_Init(UART1, &UART_InitStruct);    //initial uart 1
+  UART_Cmd(UART1, ENABLE);                    //enable uart 1
+
+  //UART1_TX   GPIOA.9
+  GPIO_StructInit(&GPIO_InitStruct);
+  GPIO_InitStruct.GPIO_Pin = GPIO_Pin_9;
+  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
+  GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
+  GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  //UART1_RX    GPIOA.10
+  GPIO_InitStruct.GPIO_Pin = GPIO_Pin_5;
+  GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IPU;
+  GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+}
+
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write (bool state)
+{
+  state ? (GPIO_ResetBits(GPIOB, GPIO_Pin_2)) : (GPIO_SetBits(GPIOB, GPIO_Pin_2));
+}
+
+uint32_t board_button_read (void)
+{
+  uint32_t key = GPIO_ReadInputDataBit(GPIOA, GPIO_Pin_0) == Bit_SET;
+  return key;
+}
+
+int board_uart_read (uint8_t *buf, int len)
+{
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+int board_uart_write (void const *buf, int len)
+{
+  const char *buff = buf;
+  while ( len )
+  {
+    while ( (UART1->CSR & UART_IT_TXIEN) == 0 )
+      ;    //The loop is sent until it is finished
+    UART1->TDR = (*buff & 0xFF);
+    buff++;
+    len--;
+  }
+  return len;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler (void)
+{
+  system_ticks++;
+}
+
+uint32_t board_millis (void)
+{
+  return system_ticks;
+}
+#endif
+
+// Required by __libc_init_array in startup code if we are compiling using
+// -nostdlib/-nostartfiles.
+void _init(void)
+{
+
+}
diff --git a/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/board.mk b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/board.mk
new file mode 100644
index 000000000..fbf0322c1
--- /dev/null
+++ b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/board.mk
@@ -0,0 +1,8 @@
+LD_FILE = $(BOARD_PATH)/flash.ld
+SRC_S += $(SDK_DIR)/mm32f327x/MM32F327x/Source/GCC_StartAsm/startup_mm32m3ux_u_gcc.S
+
+# For flash-jlink target
+#JLINK_DEVICE = MM32F3273G8P
+
+# flash target using on-board stlink
+#flash: flash-jlink
diff --git a/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/flash.ld b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/flash.ld
new file mode 100644
index 000000000..0b45ee7bd
--- /dev/null
+++ b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/flash.ld
@@ -0,0 +1,163 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 MM32 SE TEAM
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = 0x2001FFFF;    /* end of RAM */
+
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200;      /* required amount of heap  */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 512K
+RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 128K
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into FLASH */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data goes into FLASH */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data goes into FLASH */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+  .ARM : {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } >FLASH
+
+  .preinit_array     :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >FLASH
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >FLASH
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >FLASH
+
+  /* used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections goes into RAM, load LMA copy after code */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+  } >RAM AT> FLASH
+
+  
+  /* Uninitialized data section */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough RAM left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  
+
+  /* Remove information from the standard libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c
new file mode 100644
index 000000000..819b440e5
--- /dev/null
+++ b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c
@@ -0,0 +1,182 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 MM32 SE TEAM
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* DshanMCU Pitaya Lite with MM32F3273 */
+
+#include "mm32_device.h"
+#include "hal_conf.h"
+#include "tusb.h"
+#include "../board.h"
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void OTG_FS_IRQHandler (void)
+{
+  tud_int_handler(0);
+
+}
+void USB_DeviceClockInit (void)
+{
+  /* Select USBCLK source */
+  //  RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_Div1);
+  RCC->CFGR &= ~(0x3 << 22);
+  RCC->CFGR |= (0x1 << 22);
+
+  /* Enable USB clock */
+  RCC->AHB2ENR |= 0x1 << 7;
+}
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM DECLARATION
+//--------------------------------------------------------------------+
+// LED
+
+extern u32 SystemCoreClock;
+const int baudrate = 115200;
+
+void board_init (void)
+{
+//   usb clock
+// requires SYSCLK_FREQ_XXMHz  (HSE_VALUE*8) in system_mm32f327x.c
+  USB_DeviceClockInit();
+
+  if ( SysTick_Config(SystemCoreClock / 1000) )
+  {
+    while ( 1 )
+      ;
+  }
+  NVIC_SetPriority(SysTick_IRQn, 0x0);
+
+  // LED on PA1
+  GPIO_InitTypeDef GPIO_InitStruct;
+  RCC_AHBPeriphClockCmd(RCC_AHBENR_GPIOA, ENABLE);
+  GPIO_StructInit(&GPIO_InitStruct);
+
+  GPIO_InitStruct.GPIO_Pin = GPIO_Pin_1;
+  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_10MHz;
+  GPIO_InitStruct.GPIO_Mode = GPIO_Mode_Out_PP;
+  GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  board_led_write(true);
+
+  // KEY on PA0
+  GPIO_StructInit(&GPIO_InitStruct);
+  GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0;
+  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_10MHz;
+  GPIO_InitStruct.GPIO_Mode = GPIO_Mode_FLOATING;
+  GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  // UART
+  UART_InitTypeDef UART_InitStruct;
+
+  RCC_APB2PeriphClockCmd(RCC_APB2ENR_UART1, ENABLE);    //enableUART1,GPIOAclock
+  RCC_AHBPeriphClockCmd(RCC_AHBENR_GPIOA, ENABLE);      //
+  //UART initialset
+
+  GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_7);
+  GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_7);
+
+  UART_StructInit(&UART_InitStruct);
+  UART_InitStruct.UART_BaudRate = baudrate;
+  UART_InitStruct.UART_WordLength = UART_WordLength_8b;
+  UART_InitStruct.UART_StopBits = UART_StopBits_1;    //one stopbit
+  UART_InitStruct.UART_Parity = UART_Parity_No;    //none odd-even  verify bit
+  UART_InitStruct.UART_HardwareFlowControl = UART_HardwareFlowControl_None;    //No hardware flow control
+  UART_InitStruct.UART_Mode = UART_Mode_Rx | UART_Mode_Tx;    // receive and sent  mode
+
+  UART_Init(UART1, &UART_InitStruct);    //initial uart 1
+  UART_Cmd(UART1, ENABLE);                    //enable uart 1
+
+  //UART1_TX   GPIOA.9
+  GPIO_StructInit(&GPIO_InitStruct);
+  GPIO_InitStruct.GPIO_Pin = GPIO_Pin_9;
+  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
+  GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF_PP;
+  GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  //UART1_RX    GPIOA.10
+  GPIO_InitStruct.GPIO_Pin = GPIO_Pin_5;
+  GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IPU;
+  GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+}
+
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write (bool state)
+{
+  state ? (GPIO_ResetBits(GPIOA, GPIO_Pin_1)) : (GPIO_SetBits(GPIOA, GPIO_Pin_1));
+}
+
+uint32_t board_button_read (void)
+{
+  uint32_t key = GPIO_ReadInputDataBit(GPIOA, GPIO_Pin_0) == Bit_RESET;
+  return key;
+}
+
+int board_uart_read (uint8_t *buf, int len)
+{
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+int board_uart_write (void const *buf, int len)
+{
+  const char *buff = buf;
+  while ( len )
+  {
+    while ( (UART1->CSR & UART_IT_TXIEN) == 0 )
+      ;    //The loop is sent until it is finished
+    UART1->TDR = (*buff & 0xFF);
+    buff++;
+    len--;
+  }
+  return len;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler (void)
+{
+  system_ticks++;
+}
+
+uint32_t board_millis (void)
+{
+  return system_ticks;
+}
+#endif
+
+// Required by __libc_init_array in startup code if we are compiling using
+// -nostdlib/-nostartfiles.
+void _init(void)
+{
+
+}

From b3ecf82196f09ca26161d63dc15c4c3aec6ae57d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Mar 2023 19:31:45 +0700
Subject: [PATCH 174/691] whitespace

---
 hw/bsp/mm32/boards/mm32f327x_bluepillplus/flash.ld        | 8 ++++----
 .../mm32f327x_bluepillplus/mm32f327x_bluepillplus.c       | 4 ++--
 hw/bsp/mm32/boards/mm32f327x_pitaya_lite/flash.ld         | 8 ++++----
 .../boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c  | 2 +-
 4 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/hw/bsp/mm32/boards/mm32f327x_bluepillplus/flash.ld b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/flash.ld
index 0b45ee7bd..796ed04f6 100644
--- a/hw/bsp/mm32/boards/mm32f327x_bluepillplus/flash.ld
+++ b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/flash.ld
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 MM32 SE TEAM
@@ -110,7 +110,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -121,7 +121,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -149,7 +149,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
diff --git a/hw/bsp/mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c
index 08abc83c6..0a07dc749 100644
--- a/hw/bsp/mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c
+++ b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 MM32 SE TEAM
@@ -59,7 +59,7 @@ const int baudrate = 115200;
 
 void board_init (void)
 {
-//   usb clock	
+//   usb clock
   USB_DeviceClockInit();
 
   if ( SysTick_Config(SystemCoreClock / 1000) )
diff --git a/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/flash.ld b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/flash.ld
index 0b45ee7bd..796ed04f6 100644
--- a/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/flash.ld
+++ b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/flash.ld
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 MM32 SE TEAM
@@ -110,7 +110,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -121,7 +121,7 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
@@ -149,7 +149,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
diff --git a/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c
index 819b440e5..381e93e11 100644
--- a/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c
+++ b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2020 MM32 SE TEAM

From 1ed04ad05d1c44ea2821173cadd7c3ea871f4610 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Mar 2023 19:46:22 +0700
Subject: [PATCH 175/691] update mm32sdk with idndef for SYSCLK_FREQ_XXMHz and
 SYSCLK_HSI_XXMHz

add HSE_VALUE define for each board with 8mhz, 12mhz accordingly
---
 hw/bsp/mm32/boards/mm32f327x_bluepillplus/board.mk | 3 +++
 hw/bsp/mm32/boards/mm32f327x_mb39/board.mk         | 4 ++++
 hw/bsp/mm32/boards/mm32f327x_pitaya_lite/board.mk  | 3 +++
 tools/get_deps.py                                  | 2 +-
 4 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/hw/bsp/mm32/boards/mm32f327x_bluepillplus/board.mk b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/board.mk
index b7663926f..bda3daf91 100644
--- a/hw/bsp/mm32/boards/mm32f327x_bluepillplus/board.mk
+++ b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/board.mk
@@ -1,3 +1,6 @@
+CFLAGS += \
+	-DHSE_VALUE=8000000
+
 LD_FILE = $(BOARD_PATH)/flash.ld
 SRC_S += $(SDK_DIR)/mm32f327x/MM32F327x/Source/GCC_StartAsm/startup_mm32m3ux_u_gcc.S
 
diff --git a/hw/bsp/mm32/boards/mm32f327x_mb39/board.mk b/hw/bsp/mm32/boards/mm32f327x_mb39/board.mk
index b7663926f..a0d92d1c7 100644
--- a/hw/bsp/mm32/boards/mm32f327x_mb39/board.mk
+++ b/hw/bsp/mm32/boards/mm32f327x_mb39/board.mk
@@ -1,6 +1,10 @@
+CFLAGS += \
+	-DHSE_VALUE=8000000
+
 LD_FILE = $(BOARD_PATH)/flash.ld
 SRC_S += $(SDK_DIR)/mm32f327x/MM32F327x/Source/GCC_StartAsm/startup_mm32m3ux_u_gcc.S
 
+
 # For flash-jlink target
 #JLINK_DEVICE = stm32f411ve
 
diff --git a/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/board.mk b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/board.mk
index fbf0322c1..a778e749f 100644
--- a/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/board.mk
+++ b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/board.mk
@@ -1,3 +1,6 @@
+CFLAGS += \
+	-DHSE_VALUE=12000000
+
 LD_FILE = $(BOARD_PATH)/flash.ld
 SRC_S += $(SDK_DIR)/mm32f327x/MM32F327x/Source/GCC_StartAsm/startup_mm32m3ux_u_gcc.S
 
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 574e5d089..92bad1408 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -20,7 +20,7 @@ deps_optional = {
     'hw/mcu/gd/nuclei-sdk'                     : ['7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7', 'https://github.com/Nuclei-Software/nuclei-sdk.git'             ],
     'hw/mcu/infineon/mtb-xmclib-cat3'          : ['daf5500d03cba23e68c2f241c30af79cd9d63880', 'https://github.com/Infineon/mtb-xmclib-cat3.git'               ],
     'hw/mcu/microchip'                         : ['9e8b37e307d8404033bb881623a113931e1edf27', 'https://github.com/hathach/microchip_driver.git'               ],
-    'hw/mcu/mindmotion/mm32sdk'                : ['708a7152952ac595d24837069dcc0f7f59a4c30b', 'https://github.com/hathach/mm32sdk.git'                        ],
+    'hw/mcu/mindmotion/mm32sdk'                : ['f6e458fea77074990ce011e3716c08cfeddbd6d5', 'https://github.com/hathach/mm32sdk.git'                        ],
     'hw/mcu/nordic/nrfx'                       : ['281cc2e178fd9a470d844b3afdea9eb322a0b0e8', 'https://github.com/NordicSemiconductor/nrfx.git'               ],
     'hw/mcu/nuvoton'                           : ['2204191ec76283371419fbcec207da02e1bc22fa', 'https://github.com/majbthrd/nuc_driver.git'                    ],
     'hw/mcu/nxp/lpcopen'                       : ['43c45c85405a5dd114fff0ea95cca62837740c13', 'https://github.com/hathach/nxp_lpcopen.git'                    ],

From b2568eb02b5a9ff3af266a2bb1326969830e038a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Mar 2023 20:22:08 +0700
Subject: [PATCH 176/691] bump up mm32sdk to fix HSE_VALUE not 8Mhz warnings

---
 tools/get_deps.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/get_deps.py b/tools/get_deps.py
index 92bad1408..8bf56cd8d 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -20,7 +20,7 @@ deps_optional = {
     'hw/mcu/gd/nuclei-sdk'                     : ['7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7', 'https://github.com/Nuclei-Software/nuclei-sdk.git'             ],
     'hw/mcu/infineon/mtb-xmclib-cat3'          : ['daf5500d03cba23e68c2f241c30af79cd9d63880', 'https://github.com/Infineon/mtb-xmclib-cat3.git'               ],
     'hw/mcu/microchip'                         : ['9e8b37e307d8404033bb881623a113931e1edf27', 'https://github.com/hathach/microchip_driver.git'               ],
-    'hw/mcu/mindmotion/mm32sdk'                : ['f6e458fea77074990ce011e3716c08cfeddbd6d5', 'https://github.com/hathach/mm32sdk.git'                        ],
+    'hw/mcu/mindmotion/mm32sdk'                : ['0b79559eb411149d36e073c1635c620e576308d4', 'https://github.com/hathach/mm32sdk.git'                        ],
     'hw/mcu/nordic/nrfx'                       : ['281cc2e178fd9a470d844b3afdea9eb322a0b0e8', 'https://github.com/NordicSemiconductor/nrfx.git'               ],
     'hw/mcu/nuvoton'                           : ['2204191ec76283371419fbcec207da02e1bc22fa', 'https://github.com/majbthrd/nuc_driver.git'                    ],
     'hw/mcu/nxp/lpcopen'                       : ['43c45c85405a5dd114fff0ea95cca62837740c13', 'https://github.com/hathach/nxp_lpcopen.git'                    ],

From d919f107c71021b2dfa20cd9bfe252c4f544422f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 18 Mar 2023 11:22:44 +0700
Subject: [PATCH 177/691] minor clean up

---
 examples/device/uac2_headset/src/usb_descriptors.h | 8 ++++----
 examples/device/usbtmc/src/usbtmc_app.c            | 1 -
 src/class/video/video.h                            | 2 +-
 src/common/tusb_compiler.h                         | 2 +-
 src/device/usbd.h                                  | 8 ++++----
 5 files changed, 10 insertions(+), 11 deletions(-)

diff --git a/examples/device/uac2_headset/src/usb_descriptors.h b/examples/device/uac2_headset/src/usb_descriptors.h
index 2069cc975..457e69882 100644
--- a/examples/device/uac2_headset/src/usb_descriptors.h
+++ b/examples/device/uac2_headset/src/usb_descriptors.h
@@ -114,7 +114,7 @@ enum
     /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
     TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_RESOLUTION_RX),\
     /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
-    TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\
+    TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\
     /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
     TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_MILLISEC, /*_lockdelay*/ 0x0001),\
     /* Interface 1, Alternate 2 - alternate interface for data streaming */\
@@ -124,7 +124,7 @@ enum
     /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
     TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_RESOLUTION_RX),\
     /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
-    TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\
+    TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\
     /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
     TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_MILLISEC, /*_lockdelay*/ 0x0001),\
     /* Standard AS Interface Descriptor(4.9.1) */\
@@ -138,7 +138,7 @@ enum
     /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
     TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_RESOLUTION_TX),\
     /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
-    TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\
+    TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\
     /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
     TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000),\
     /* Interface 2, Alternate 2 - alternate interface for data streaming */\
@@ -148,7 +148,7 @@ enum
     /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
     TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_RESOLUTION_TX),\
     /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
-    TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\
+    TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\
     /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
     TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000)
 
diff --git a/examples/device/usbtmc/src/usbtmc_app.c b/examples/device/usbtmc/src/usbtmc_app.c
index f1596f6d0..72989b4fe 100644
--- a/examples/device/usbtmc/src/usbtmc_app.c
+++ b/examples/device/usbtmc/src/usbtmc_app.c
@@ -242,7 +242,6 @@ void usbtmc_app_task_iter(void) {
     break;
   default:
     TU_ASSERT(false,);
-    return;
   }
 }
 
diff --git a/src/class/video/video.h b/src/class/video/video.h
index 40dae4c1a..c0088c4f6 100644
--- a/src/class/video/video.h
+++ b/src/class/video/video.h
@@ -549,7 +549,7 @@ TU_VERIFY_STATIC( sizeof(video_probe_and_commit_control_t) == 48, "size is not c
 
 /* 3.10.1.1 */
 #define TUD_VIDEO_DESC_EP_ISO(_ep, _epsize, _ep_interval) \
-  7, TUSB_DESC_ENDPOINT, _ep, (uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS,\
+  7, TUSB_DESC_ENDPOINT, _ep, (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS),\
   U16_TO_U8S_LE(_epsize), _ep_interval
 
 /* 3.10.1.2 */
diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index cea876413..713bbb8d4 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -196,7 +196,7 @@
   #define TU_ATTR_DEPRECATED(mess)      __attribute__ ((deprecated(mess))) // warn if function with this attribute is used
   #define TU_ATTR_UNUSED                __attribute__ ((unused))           // Function/Variable is meant to be possibly unused
   #define TU_ATTR_USED                  __attribute__ ((used))             // Function/Variable is meant to be used
-  #define TU_ATTR_FALLTHROUGH
+  #define TU_ATTR_FALLTHROUGH           do {} while (0)  /* fallthrough */
 
   #define TU_ATTR_PACKED_BEGIN
   #define TU_ATTR_PACKED_END
diff --git a/src/device/usbd.h b/src/device/usbd.h
index 7bb9f916b..255e5a844 100644
--- a/src/device/usbd.h
+++ b/src/device/usbd.h
@@ -420,7 +420,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
 /* Standard AS Isochronous Feedback Endpoint Descriptor(4.10.2.1) */
 #define TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN 7
 #define TUD_AUDIO_DESC_STD_AS_ISO_FB_EP(_ep, _interval) \
-  TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN, TUSB_DESC_ENDPOINT, _ep, ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_NO_SYNC | TUSB_ISO_EP_ATT_EXPLICIT_FB), U16_TO_U8S_LE(4), _interval
+  TUD_AUDIO_DESC_STD_AS_ISO_FB_EP_LEN, TUSB_DESC_ENDPOINT, _ep, (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_NO_SYNC | TUSB_ISO_EP_ATT_EXPLICIT_FB), U16_TO_U8S_LE(4), _interval
 
 // AUDIO simple descriptor (UAC2) for 1 microphone input
 // - 1 Input Terminal, 1 Feature Unit (Mute and Volume Control), 1 Output Terminal, 1 Clock Source
@@ -467,7 +467,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
   /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
   TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\
   /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
-  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\
+  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\
   /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
   TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000)
 
@@ -516,7 +516,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
   /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
   TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\
   /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
-  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\
+  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\
   /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
   TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000)
 
@@ -564,7 +564,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
   /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
   TUD_AUDIO_DESC_TYPE_I_FORMAT(_nBytesPerSample, _nBitsUsedPerSample),\
   /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
-  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ ((uint8_t) TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\
+  TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ _epsize, /*_interval*/ TUD_OPT_HIGH_SPEED ? 0x04 : 0x01),\
   /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
   TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000),\
   /* Standard AS Isochronous Feedback Endpoint Descriptor(4.10.2.1) */\

From 9f54cc1eb725e7d77a5b275b209d8257b180d7ed Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 18 Mar 2023 11:43:47 +0700
Subject: [PATCH 178/691] more clean up

---
 src/class/usbtmc/usbtmc_device.c             | 7 +++++++
 src/portable/raspberrypi/rp2040/rp2040_usb.h | 4 ++--
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/src/class/usbtmc/usbtmc_device.c b/src/class/usbtmc/usbtmc_device.c
index 8dbda14c5..4e320a778 100644
--- a/src/class/usbtmc/usbtmc_device.c
+++ b/src/class/usbtmc/usbtmc_device.c
@@ -154,7 +154,10 @@ TU_VERIFY_STATIC(USBTMCD_BUFFER_SIZE >= 32u,"USBTMC dev buffer size too small");
 static bool handle_devMsgOutStart(uint8_t rhport, void *data, size_t len);
 static bool handle_devMsgOut(uint8_t rhport, void *data, size_t len, size_t packetLen);
 
+#ifndef NDEBUG
 tu_static uint8_t termChar;
+#endif
+
 tu_static uint8_t termCharRequested = false;
 
 #if OSAL_MUTEX_REQUIRED
@@ -442,7 +445,10 @@ static bool handle_devMsgIn(void *data, size_t len)
   usbtmc_state.transfer_size_sent = 0u;
 
   termCharRequested = msg->bmTransferAttributes.TermCharEnabled;
+
+#ifndef NDEBUG
   termChar = msg->TermChar;
+#endif
 
   if(termCharRequested)
     TU_VERIFY(usbtmc_state.capabilities->bmDevCapabilities.canEndBulkInOnTermChar);
@@ -511,6 +517,7 @@ bool usbtmcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint
       return true;
 
     case STATE_ABORTING_BULK_OUT:
+      // Should be stalled by now, shouldn't have received a packet.
       return false;
 
     case STATE_TX_REQUESTED:
diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.h b/src/portable/raspberrypi/rp2040/rp2040_usb.h
index 79af0204b..5d3d792cb 100644
--- a/src/portable/raspberrypi/rp2040/rp2040_usb.h
+++ b/src/portable/raspberrypi/rp2040/rp2040_usb.h
@@ -36,8 +36,8 @@
 #define __tusb_irq_path_func(x) x
 #endif
 
-#define usb_hw_set hw_set_alias(usb_hw)
-#define usb_hw_clear hw_clear_alias(usb_hw)
+#define usb_hw_set    ((usb_hw_t *) hw_set_alias(usb_hw))
+#define usb_hw_clear  ((usb_hw_t *) hw_clear_alias(usb_hw))
 
 #define pico_info(...)  TU_LOG(2, __VA_ARGS__)
 #define pico_trace(...) TU_LOG(3, __VA_ARGS__)

From f9b8a0667a2cc42a6c6521c51bba695ca8e9e28f Mon Sep 17 00:00:00 2001
From: Bob Paddock <bob.pddock@pm.me>
Date: Mon, 16 Jan 2023 15:05:31 -0500
Subject: [PATCH 179/691] Add support for NXP FRDM_K32L2A4S eval board.

---
 hw/bsp/board_mcu.h                   |   2 +-
 hw/bsp/frdm_k32l2a4s/README.rst      |  51 ++++++++
 hw/bsp/frdm_k32l2a4s/board.h         |  58 +++++++++
 hw/bsp/frdm_k32l2a4s/board.mk        |  80 +++++++++++++
 hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c | 171 +++++++++++++++++++++++++++
 src/common/tusb_mcu.h                |   2 +-
 src/portable/nxp/khci/dcd_khci.c     |   9 +-
 src/portable/nxp/khci/hcd_khci.c     |   9 +-
 src/tusb_option.h                    |   1 +
 9 files changed, 375 insertions(+), 8 deletions(-)
 create mode 100644 hw/bsp/frdm_k32l2a4s/README.rst
 create mode 100644 hw/bsp/frdm_k32l2a4s/board.h
 create mode 100644 hw/bsp/frdm_k32l2a4s/board.mk
 create mode 100644 hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c

diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h
index b34197e6c..920e7d0d9 100644
--- a/hw/bsp/board_mcu.h
+++ b/hw/bsp/board_mcu.h
@@ -47,7 +47,7 @@
 
 #elif CFG_TUSB_MCU == OPT_MCU_LPC51UXX || CFG_TUSB_MCU == OPT_MCU_LPC54XXX || \
       CFG_TUSB_MCU == OPT_MCU_LPC55XX  || CFG_TUSB_MCU == OPT_MCU_MKL25ZXX || \
-      CFG_TUSB_MCU == OPT_MCU_K32L2BXX
+      CFG_TUSB_MCU == OPT_MCU_K32L2AXX || OPT_MCU_K32L2BXX
   #include "fsl_device_registers.h"
 
 #elif CFG_TUSB_MCU == OPT_MCU_NRF5X
diff --git a/hw/bsp/frdm_k32l2a4s/README.rst b/hw/bsp/frdm_k32l2a4s/README.rst
new file mode 100644
index 000000000..68ab409c3
--- /dev/null
+++ b/hw/bsp/frdm_k32l2a4s/README.rst
@@ -0,0 +1,51 @@
+Jan/13/2023 13:04
+
+The FRDM-K32L2B3 Freedom development board provides a platform for
+evaluation and development of the K32 L2B MCU Family. -
+https://www.nxp.com/part/FRDM-K32L2B3#/
+
+TinyUSB does not include the board specific drivers. Those drivers
+need to be extracted from the MCUXpresso IDE and SDK.
+
+Install MCUXPresso version 11.6 or later and SDK 2.12 or later.  Then
+build the example project "frdmk32l2b_hellow_worldvirual_com".
+
+From the frdmk32l2b_hellow_worldvirual_com project copy these files to
+this directory structure, in this directory:
+
+hw/mcu/nxp/mcux-sdk/devices/K32L2B31A
+
+CMSIS/
+config/
+drivers/
+gcc/
+fsl_device_registers.h
+K32L2B31A_features.h
+K32L2B31A.h
+
+./CMSIS:
+cmsis_armcc.h     cmsis_armclang_ltm.h  cmsis_gcc.h     cmsis_version.h  mpu_armv7.h
+cmsis_armclang.h  cmsis_compiler.h      cmsis_iccarm.h  core_cm0plus.h
+
+./config:
+clock_config.c  clock_config.h  system_K32L2B31A.c  system_K32L2B31A.h
+
+./drivers:
+fsl_clock.c       fsl_common_arm.h  fsl_gpio.c    fsl_lpuart.h  fsl_smc.h
+fsl_clock.h       fsl_common.c      fsl_gpio.h    fsl_port.h    fsl_uart.c
+fsl_common_arm.c  fsl_common.h      fsl_lpuart.c  fsl_smc.c     fsl_uart.h
+
+./gcc:
+frdmk32l2b.ld          startup_k32l2b31a.c
+frdmk32l2b_library.ld  frdmk32l2b_memory.ld
+
+The linker files have been renamed and the #include directive edited
+to match.
+
+Then to build a test project change to the directory
+examples/devices/cdc_msc and do:
+
+make BOARD=frdm_k32l2b
+
+The resulting .hex file will be found in the _build directory, copy
+that will to the FRDM board to run the demo.
diff --git a/hw/bsp/frdm_k32l2a4s/board.h b/hw/bsp/frdm_k32l2a4s/board.h
new file mode 100644
index 000000000..14eefda17
--- /dev/null
+++ b/hw/bsp/frdm_k32l2a4s/board.h
@@ -0,0 +1,58 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#include "fsl_device_registers.h"
+
+// LED
+// The Red   LED is on PTE29.
+// The Green LED is on PTC4.
+// The Blue  LED is on PTE31.
+#define LED_PIN_CLOCK         kCLOCK_PortC
+#define LED_GPIO              GPIOC
+#define LED_PORT              PORTC
+#define LED_PIN               4
+#define LED_STATE_ON          0
+
+// SW3 button1
+#define BUTTON_PIN_CLOCK      kCLOCK_PortE
+#define BUTTON_GPIO           GPIOE
+#define BUTTON_PORT           PORTE
+#define BUTTON_PIN            4
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_PORT             LPUART0
+#define UART_PIN_CLOCK        kCLOCK_PortB
+#define UART_PIN_GPIO         GPIOB
+#define UART_PIN_PORT         PORTB
+#define UART_PIN_RX           16u
+#define UART_PIN_TX           17u
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/frdm_k32l2a4s/board.mk b/hw/bsp/frdm_k32l2a4s/board.mk
new file mode 100644
index 000000000..e9e606fe6
--- /dev/null
+++ b/hw/bsp/frdm_k32l2a4s/board.mk
@@ -0,0 +1,80 @@
+
+# Default to a less-verbose build.  If you want all the gory compiler output,
+# "VERBOSE=1" to the make command line.
+ifndef VERBOSE
+.SILENT:
+$(info Non-Verbose Output)
+else
+$(info Verbose Output)
+endif
+
+SDK_DIR = hw/mcu/nxp/mcux-sdk
+MCU_DIR = $(SDK_DIR)/devices/K32L2A4S
+
+ifdef VERBOSE
+$(info TOP='$(TOP)')
+$(info )
+
+$(info BSP='$(TOP)/hw/bsp/$(BOARD)')
+$(info )
+
+$(info TOP/SDK_DIR='$(TOP)/$(SDK_DIR)')
+$(info )
+
+$(info MCU_DIR='$(MCU_DIR)')
+$(info )
+endif
+
+DEPS_SUBMODULES += $(SDK_DIR)
+
+CFLAGS += \
+  -mthumb \
+  -mabi=aapcs \
+  -mcpu=cortex-m0plus \
+  -DCPU_K32L2A41VLH1A \
+  -DCFG_TUSB_MCU=OPT_MCU_K32L2AXX
+
+# mcu driver cause following warnings
+CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual
+
+# All source paths should be relative to the top level.
+
+LD_FILE  = $(MCU_DIR)/gcc/frdmk32l2a4s.ld
+LDFLAGS += -L$(TOP)/$(MCU_DIR)/gcc
+
+# Define Recursive Depth wildcard:
+rwildcard=$(foreach d,$(wildcard $1*),$(call rwildcard,$d/,$2) $(filter $(subst *,%,$2),$d))
+
+SRC_C += \
+	src/portable/nxp/khci/dcd_khci.c \
+	$(MCU_DIR)/gcc/startup_k32l2a41a.c
+
+SRC_C += $(call rwildcard,$(TOP)/$(MCU_DIR)/config,*.c)
+SRC_C += $(call rwildcard,$(TOP)/$(MCU_DIR)/drivers,*.c)
+
+INC += \
+	$(TOP)/hw/bsp/$(BOARD) \
+	$(TOP)/$(MCU_DIR)/CMSIS/ \
+	$(TOP)/$(MCU_DIR) \
+	$(TOP)/$(MCU_DIR)/config \
+	$(TOP)/$(MCU_DIR)/drivers
+
+ifdef VERBOSE
+$(info INC = '$(strip $(INC))')
+$(info )
+
+$(info SRC_C = '$(sort $(strip $(SRC_C)))')
+$(info )
+endif
+
+# For freeRTOS port source
+FREERTOS_PORT = ARM_CM0
+
+# For flash-jlink target
+#JLINK_DEVICE = ?
+
+# For flash-pyocd target
+PYOCD_TARGET = K32L2A
+
+# flash using pyocd
+flash: flash-pyocd
diff --git a/hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c b/hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c
new file mode 100644
index 000000000..47dd0c8ec
--- /dev/null
+++ b/hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c
@@ -0,0 +1,171 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018, hathach (tinyusb.org)
+ * Copyright (c) 2020, Koji Kitayama
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "../board.h"
+#include "board.h"
+#include "fsl_gpio.h"
+#include "fsl_port.h"
+#include "fsl_clock.h"
+#include "fsl_lpuart.h"
+
+#include "clock_config.h"
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void USB0_IRQHandler(void)
+{
+  tud_int_handler(0);
+}
+
+void board_init(void)
+{
+  /* Enable port clocks for UART/LED/Button pins */
+  CLOCK_EnableClock(UART_PIN_CLOCK);
+  CLOCK_EnableClock(LED_PIN_CLOCK);
+  CLOCK_EnableClock(BUTTON_PIN_CLOCK);
+
+  gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 };
+  GPIO_PinInit(LED_GPIO, LED_PIN, &led_config);
+  PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio);
+
+  gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 };
+  GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config);
+  const port_pin_config_t BUTTON_CFG = {
+    kPORT_PullUp,
+    kPORT_FastSlewRate,
+    kPORT_PassiveFilterDisable,
+    kPORT_OpenDrainDisable,
+    kPORT_LowDriveStrength,
+    kPORT_MuxAsGpio,
+    kPORT_UnlockRegister
+  };
+  PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG);
+
+  /*
+    Enable LPUART0 clock and configure port pins.
+    FIR clock is being used so the USB examples work.
+  */
+  PCC_LPUART0  = 0U;                          /* Clock must be off to set PCS */
+  PCC_LPUART0  = PCC_CLKCFG_PCS( 3U );        /* Select the clock. 1:OSCCLK/Bus Clock, 2:Slow IRC, 3: Fast IRC, 6: System PLL */
+  PCC_LPUART0 |= PCC_CLKCFG_CGC( 1U );        /* Enable LPUART */
+
+  /* PORTB16 (pin 62) is configured as LPUART0_RX */
+  gpio_pin_config_t const lpuart_config_rx = { kGPIO_DigitalInput, 0 };
+  GPIO_PinInit(UART_PIN_GPIO, UART_PIN_RX, &lpuart_config_rx);
+  const port_pin_config_t UART_CFG = {
+    kPORT_PullUp,
+    kPORT_FastSlewRate,
+    kPORT_PassiveFilterDisable,
+    kPORT_OpenDrainDisable,
+    kPORT_LowDriveStrength,
+    kPORT_MuxAsGpio,
+    kPORT_UnlockRegister
+  };
+  PORT_SetPinConfig(UART_PIN_PORT, UART_PIN_RX, &UART_CFG);
+  PORT_SetPinMux(   UART_PIN_PORT, UART_PIN_RX, kPORT_MuxAlt3);
+
+  /* PORTB17 (pin 63) is configured as LPUART0_TX */
+  gpio_pin_config_t const lpuart_config_tx = { kGPIO_DigitalOutput, 0 };
+  GPIO_PinInit(   UART_PIN_GPIO, UART_PIN_TX, &lpuart_config_tx);
+  PORT_SetPinMux( UART_PIN_PORT, UART_PIN_TX, kPORT_MuxAlt3);
+
+  BOARD_BootClockRUN();
+  SystemCoreClockUpdate();
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(SystemCoreClock / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
+#endif
+
+  lpuart_config_t uart_config;
+  LPUART_GetDefaultConfig(&uart_config);
+  uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE;
+  uart_config.enableTx = true;
+  uart_config.enableRx = true;
+  LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_ScgFircClk));
+
+  // USB
+  CLOCK_EnableUsbfs0Clock(kCLOCK_IpSrcFircAsync, 48000000U);
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+  GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
+}
+
+uint32_t board_button_read(void)
+{
+  return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN);
+}
+
+int board_uart_read(uint8_t* buf, int len)
+{
+#if 0 /*
+	Use this version if want the LED to blink during BOARD=board_test,
+	without having to hit a key.
+      */
+  if( 0U != (kLPUART_RxDataRegFullFlag & LPUART_GetStatusFlags( UART_PORT )) )
+    {
+      LPUART_ReadBlocking(UART_PORT, buf, len);
+      return len;
+    }
+
+  return( 0 );
+#else /* Wait for 'len' characters to come in */
+
+  LPUART_ReadBlocking(UART_PORT, buf, len);
+  return len;
+
+#endif
+}
+
+int board_uart_write(void const * buf, int len)
+{
+  LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len);
+  return len;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler(void)
+{
+  system_ticks++;
+}
+
+uint32_t board_millis(void)
+{
+  return system_ticks;
+}
+#endif
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 1d27f47af..18e40e1b1 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -85,7 +85,7 @@
   #define TUP_DCD_ENDPOINT_MAX    8
   #define TUP_RHPORT_HIGHSPEED    1 // Port0 HS, Port1 HS
 
-#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX)
+#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2AXX, OPT_MCU_K32L2BXX)
   #define TUP_DCD_ENDPOINT_MAX    16
 
 #elif TU_CHECK_MCU(OPT_MCU_MM32F327X)
diff --git a/src/portable/nxp/khci/dcd_khci.c b/src/portable/nxp/khci/dcd_khci.c
index b6daec3de..2678cdca1 100644
--- a/src/portable/nxp/khci/dcd_khci.c
+++ b/src/portable/nxp/khci/dcd_khci.c
@@ -26,9 +26,12 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUD_ENABLED && ( \
-      ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || ( CFG_TUSB_MCU == OPT_MCU_K32L2BXX ) \
-    )
+#if CFG_TUD_ENABLED &&                     \
+  (					   \
+   ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || \
+   ( CFG_TUSB_MCU == OPT_MCU_K32L2AXX ) || \
+   ( CFG_TUSB_MCU == OPT_MCU_K32L2BXX )	   \
+  )
 
 #include "fsl_device_registers.h"
 #define KHCI        USB0
diff --git a/src/portable/nxp/khci/hcd_khci.c b/src/portable/nxp/khci/hcd_khci.c
index 35763f121..8ff1feff7 100644
--- a/src/portable/nxp/khci/hcd_khci.c
+++ b/src/portable/nxp/khci/hcd_khci.c
@@ -26,9 +26,12 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUH_ENABLED && ( \
-      ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || ( CFG_TUSB_MCU == OPT_MCU_K32L2BXX ) \
-    )
+#if CFG_TUD_ENABLED &&                     \
+  (					   \
+   ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || \
+   ( CFG_TUSB_MCU == OPT_MCU_K32L2AXX ) || \
+   ( CFG_TUSB_MCU == OPT_MCU_K32L2BXX )	   \
+  )
 
 #include "fsl_device_registers.h"
 #define KHCI        USB0
diff --git a/src/tusb_option.h b/src/tusb_option.h
index c019b0ba4..5a234e357 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -119,6 +119,7 @@
 // NXP Kinetis
 #define OPT_MCU_MKL25ZXX         1200 ///< NXP MKL25Zxx
 #define OPT_MCU_K32L2BXX         1201 ///< NXP K32L2Bxx
+#define OPT_MCU_K32L2AXX         1202 ///< NXP K32L2Axx
 
 // Silabs
 #define OPT_MCU_EFM32GG          1300 ///< Silabs EFM32GG

From b13b95a6705348947aa2117423788b5dc2289047 Mon Sep 17 00:00:00 2001
From: Bob Paddock <bob.pddock@pm.me>
Date: Mon, 16 Jan 2023 15:17:11 -0500
Subject: [PATCH 180/691] Document that support for the FRDM-K32L2A4S has been
 added.

---
 docs/reference/supported.rst | 1 +
 1 file changed, 1 insertion(+)

diff --git a/docs/reference/supported.rst b/docs/reference/supported.rst
index b3f3f41d3..b1e0c0a68 100644
--- a/docs/reference/supported.rst
+++ b/docs/reference/supported.rst
@@ -253,6 +253,7 @@ Kinetis
 ^^^^^^^
 
 -  `Freedom FRDM-KL25Z <https://www.nxp.com/design/development-boards/freedom-development-boards/mcu-boards/freedom-development-platform-for-kinetis-kl14-kl15-kl24-kl25-mcus:FRDM-KL25Z>`__
+-  `Freedom FRDM-K32L2A  <https://www.nxp.com/design/development-boards/freedom-development-boards/mcu-boards/nxp-freedom-platform-for-k32-l2a-mcus:FRDM-K32L2A4S>`__
 -  `Freedom FRDM-K32L2B3 <https://www.nxp.com/design/development-boards/freedom-development-boards/mcu-boards/nxp-freedom-development-platform-for-k32-l2b-mcus:FRDM-K32L2B3>`__
 -  `KUIIC <https://github.com/nxf58843/kuiic>`__
 

From 2d187777c0eb625ad7c63c21dd881ca7362363fc Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 18 Mar 2023 18:30:51 +0700
Subject: [PATCH 181/691] merge kinetis into its own family in bsp

---
 hw/bsp/frdm_k32l2a4s/README.rst               | 51 ------------
 hw/bsp/frdm_k32l2a4s/board.mk                 | 80 -------------------
 hw/bsp/frdm_k32l2b/board.mk                   | 51 ------------
 .../boards}/frdm_k32l2a4s/board.h             |  2 +-
 hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk  | 26 ++++++
 .../boards}/frdm_k32l2a4s/frdm_k32l2a4s.c     |  2 +-
 .../{ => kinetis/boards}/frdm_k32l2b/board.h  |  0
 hw/bsp/kinetis/boards/frdm_k32l2b/board.mk    | 26 ++++++
 .../boards}/frdm_k32l2b/frdm_k32l2b.c         |  2 +-
 .../{ => kinetis/boards}/frdm_kl25z/board.mk  | 27 +------
 .../boards}/frdm_kl25z/frdm_kl25z.c           |  0
 hw/bsp/kinetis/family.mk                      | 46 +++++++++++
 src/common/tusb_mcu.h                         |  2 +
 src/portable/nxp/khci/dcd_khci.c              | 15 ++--
 src/portable/nxp/khci/hcd_khci.c              |  2 +-
 15 files changed, 114 insertions(+), 218 deletions(-)
 delete mode 100644 hw/bsp/frdm_k32l2a4s/README.rst
 delete mode 100644 hw/bsp/frdm_k32l2a4s/board.mk
 delete mode 100644 hw/bsp/frdm_k32l2b/board.mk
 rename hw/bsp/{ => kinetis/boards}/frdm_k32l2a4s/board.h (99%)
 create mode 100644 hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk
 rename hw/bsp/{ => kinetis/boards}/frdm_k32l2a4s/frdm_k32l2a4s.c (99%)
 rename hw/bsp/{ => kinetis/boards}/frdm_k32l2b/board.h (100%)
 create mode 100644 hw/bsp/kinetis/boards/frdm_k32l2b/board.mk
 rename hw/bsp/{ => kinetis/boards}/frdm_k32l2b/frdm_k32l2b.c (99%)
 rename hw/bsp/{ => kinetis/boards}/frdm_kl25z/board.mk (54%)
 rename hw/bsp/{ => kinetis/boards}/frdm_kl25z/frdm_kl25z.c (100%)
 create mode 100644 hw/bsp/kinetis/family.mk

diff --git a/hw/bsp/frdm_k32l2a4s/README.rst b/hw/bsp/frdm_k32l2a4s/README.rst
deleted file mode 100644
index 68ab409c3..000000000
--- a/hw/bsp/frdm_k32l2a4s/README.rst
+++ /dev/null
@@ -1,51 +0,0 @@
-Jan/13/2023 13:04
-
-The FRDM-K32L2B3 Freedom development board provides a platform for
-evaluation and development of the K32 L2B MCU Family. -
-https://www.nxp.com/part/FRDM-K32L2B3#/
-
-TinyUSB does not include the board specific drivers. Those drivers
-need to be extracted from the MCUXpresso IDE and SDK.
-
-Install MCUXPresso version 11.6 or later and SDK 2.12 or later.  Then
-build the example project "frdmk32l2b_hellow_worldvirual_com".
-
-From the frdmk32l2b_hellow_worldvirual_com project copy these files to
-this directory structure, in this directory:
-
-hw/mcu/nxp/mcux-sdk/devices/K32L2B31A
-
-CMSIS/
-config/
-drivers/
-gcc/
-fsl_device_registers.h
-K32L2B31A_features.h
-K32L2B31A.h
-
-./CMSIS:
-cmsis_armcc.h     cmsis_armclang_ltm.h  cmsis_gcc.h     cmsis_version.h  mpu_armv7.h
-cmsis_armclang.h  cmsis_compiler.h      cmsis_iccarm.h  core_cm0plus.h
-
-./config:
-clock_config.c  clock_config.h  system_K32L2B31A.c  system_K32L2B31A.h
-
-./drivers:
-fsl_clock.c       fsl_common_arm.h  fsl_gpio.c    fsl_lpuart.h  fsl_smc.h
-fsl_clock.h       fsl_common.c      fsl_gpio.h    fsl_port.h    fsl_uart.c
-fsl_common_arm.c  fsl_common.h      fsl_lpuart.c  fsl_smc.c     fsl_uart.h
-
-./gcc:
-frdmk32l2b.ld          startup_k32l2b31a.c
-frdmk32l2b_library.ld  frdmk32l2b_memory.ld
-
-The linker files have been renamed and the #include directive edited
-to match.
-
-Then to build a test project change to the directory
-examples/devices/cdc_msc and do:
-
-make BOARD=frdm_k32l2b
-
-The resulting .hex file will be found in the _build directory, copy
-that will to the FRDM board to run the demo.
diff --git a/hw/bsp/frdm_k32l2a4s/board.mk b/hw/bsp/frdm_k32l2a4s/board.mk
deleted file mode 100644
index e9e606fe6..000000000
--- a/hw/bsp/frdm_k32l2a4s/board.mk
+++ /dev/null
@@ -1,80 +0,0 @@
-
-# Default to a less-verbose build.  If you want all the gory compiler output,
-# "VERBOSE=1" to the make command line.
-ifndef VERBOSE
-.SILENT:
-$(info Non-Verbose Output)
-else
-$(info Verbose Output)
-endif
-
-SDK_DIR = hw/mcu/nxp/mcux-sdk
-MCU_DIR = $(SDK_DIR)/devices/K32L2A4S
-
-ifdef VERBOSE
-$(info TOP='$(TOP)')
-$(info )
-
-$(info BSP='$(TOP)/hw/bsp/$(BOARD)')
-$(info )
-
-$(info TOP/SDK_DIR='$(TOP)/$(SDK_DIR)')
-$(info )
-
-$(info MCU_DIR='$(MCU_DIR)')
-$(info )
-endif
-
-DEPS_SUBMODULES += $(SDK_DIR)
-
-CFLAGS += \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m0plus \
-  -DCPU_K32L2A41VLH1A \
-  -DCFG_TUSB_MCU=OPT_MCU_K32L2AXX
-
-# mcu driver cause following warnings
-CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual
-
-# All source paths should be relative to the top level.
-
-LD_FILE  = $(MCU_DIR)/gcc/frdmk32l2a4s.ld
-LDFLAGS += -L$(TOP)/$(MCU_DIR)/gcc
-
-# Define Recursive Depth wildcard:
-rwildcard=$(foreach d,$(wildcard $1*),$(call rwildcard,$d/,$2) $(filter $(subst *,%,$2),$d))
-
-SRC_C += \
-	src/portable/nxp/khci/dcd_khci.c \
-	$(MCU_DIR)/gcc/startup_k32l2a41a.c
-
-SRC_C += $(call rwildcard,$(TOP)/$(MCU_DIR)/config,*.c)
-SRC_C += $(call rwildcard,$(TOP)/$(MCU_DIR)/drivers,*.c)
-
-INC += \
-	$(TOP)/hw/bsp/$(BOARD) \
-	$(TOP)/$(MCU_DIR)/CMSIS/ \
-	$(TOP)/$(MCU_DIR) \
-	$(TOP)/$(MCU_DIR)/config \
-	$(TOP)/$(MCU_DIR)/drivers
-
-ifdef VERBOSE
-$(info INC = '$(strip $(INC))')
-$(info )
-
-$(info SRC_C = '$(sort $(strip $(SRC_C)))')
-$(info )
-endif
-
-# For freeRTOS port source
-FREERTOS_PORT = ARM_CM0
-
-# For flash-jlink target
-#JLINK_DEVICE = ?
-
-# For flash-pyocd target
-PYOCD_TARGET = K32L2A
-
-# flash using pyocd
-flash: flash-pyocd
diff --git a/hw/bsp/frdm_k32l2b/board.mk b/hw/bsp/frdm_k32l2b/board.mk
deleted file mode 100644
index feb0a25f4..000000000
--- a/hw/bsp/frdm_k32l2b/board.mk
+++ /dev/null
@@ -1,51 +0,0 @@
-SDK_DIR = hw/mcu/nxp/mcux-sdk
-DEPS_SUBMODULES += $(SDK_DIR)
-
-CFLAGS += \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m0plus \
-  -DCPU_K32L2B31VLH0A \
-  -DCFG_TUSB_MCU=OPT_MCU_K32L2BXX
-
-# mcu driver cause following warnings
-CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls
-
-MCU_DIR = $(SDK_DIR)/devices/K32L2B31A
-
-# All source paths should be relative to the top level.
-LD_FILE = $(MCU_DIR)/gcc/K32L2B31xxxxA_flash.ld
-
-SRC_C += \
-	src/portable/nxp/khci/dcd_khci.c \
-	$(MCU_DIR)/system_K32L2B31A.c \
-	$(MCU_DIR)/project_template/clock_config.c \
-	$(MCU_DIR)/drivers/fsl_clock.c \
-	$(SDK_DIR)/drivers/gpio/fsl_gpio.c \
-	$(SDK_DIR)/drivers/lpuart/fsl_lpuart.c
-
-INC += \
-	$(TOP)/hw/bsp/$(BOARD) \
-	$(TOP)/$(SDK_DIR)/CMSIS/Include \
-	$(TOP)/$(SDK_DIR)/drivers/smc \
-	$(TOP)/$(SDK_DIR)/drivers/common \
-	$(TOP)/$(SDK_DIR)/drivers/gpio \
-	$(TOP)/$(SDK_DIR)/drivers/port \
-	$(TOP)/$(SDK_DIR)/drivers/lpuart \
-	$(TOP)/$(MCU_DIR) \
-	$(TOP)/$(MCU_DIR)/drivers \
-	$(TOP)/$(MCU_DIR)/project_template \
-
-SRC_S += $(MCU_DIR)/gcc/startup_K32L2B31A.S
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
-
-# For flash-jlink target
-JLINK_DEVICE = MKL25Z128xxx4
-
-# For flash-pyocd target
-PYOCD_TARGET = K32L2B
-
-# flash using pyocd
-flash: flash-pyocd
diff --git a/hw/bsp/frdm_k32l2a4s/board.h b/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.h
similarity index 99%
rename from hw/bsp/frdm_k32l2a4s/board.h
rename to hw/bsp/kinetis/boards/frdm_k32l2a4s/board.h
index 14eefda17..b1f38c997 100644
--- a/hw/bsp/frdm_k32l2a4s/board.h
+++ b/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019, Ha Thach (tinyusb.org)
diff --git a/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk b/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk
new file mode 100644
index 000000000..723fb3893
--- /dev/null
+++ b/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk
@@ -0,0 +1,26 @@
+SDK_DIR = hw/mcu/nxp/mcux-sdk
+MCU = K32L2A41A
+MCU_DIR = $(SDK_DIR)/devices/$(MCU)
+
+CFLAGS += \
+  -mcpu=cortex-m0plus \
+  -DCPU_K32L2A41VLH1A \
+  -DCFG_TUSB_MCU=OPT_MCU_K32L2AXX
+
+# mcu driver cause following warnings
+CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual
+
+# All source paths should be relative to the top level.
+LD_FILE = $(MCU_DIR)/gcc/K32L2A41xxxxA_flash.ld
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
+
+# For flash-jlink target
+JLINK_DEVICE = K32L2A41xxxxA
+
+# For flash-pyocd target
+PYOCD_TARGET = K32L2A
+
+# flash using pyocd
+flash: flash-pyocd
diff --git a/hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c b/hw/bsp/kinetis/boards/frdm_k32l2a4s/frdm_k32l2a4s.c
similarity index 99%
rename from hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c
rename to hw/bsp/kinetis/boards/frdm_k32l2a4s/frdm_k32l2a4s.c
index 47dd0c8ec..80830163b 100644
--- a/hw/bsp/frdm_k32l2a4s/frdm_k32l2a4s.c
+++ b/hw/bsp/kinetis/boards/frdm_k32l2a4s/frdm_k32l2a4s.c
@@ -25,7 +25,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "../board.h"
+#include "bsp/board.h"
 #include "board.h"
 #include "fsl_gpio.h"
 #include "fsl_port.h"
diff --git a/hw/bsp/frdm_k32l2b/board.h b/hw/bsp/kinetis/boards/frdm_k32l2b/board.h
similarity index 100%
rename from hw/bsp/frdm_k32l2b/board.h
rename to hw/bsp/kinetis/boards/frdm_k32l2b/board.h
diff --git a/hw/bsp/kinetis/boards/frdm_k32l2b/board.mk b/hw/bsp/kinetis/boards/frdm_k32l2b/board.mk
new file mode 100644
index 000000000..66d408c67
--- /dev/null
+++ b/hw/bsp/kinetis/boards/frdm_k32l2b/board.mk
@@ -0,0 +1,26 @@
+SDK_DIR = hw/mcu/nxp/mcux-sdk
+MCU = K32L2B31A
+MCU_DIR = $(SDK_DIR)/devices/$(MCU)
+
+CFLAGS += \
+  -mcpu=cortex-m0plus \
+  -DCPU_K32L2B31VLH0A \
+  -DCFG_TUSB_MCU=OPT_MCU_K32L2BXX
+
+# mcu driver cause following warnings
+CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls
+
+# All source paths should be relative to the top level.
+LD_FILE = $(MCU_DIR)/gcc/K32L2B31xxxxA_flash.ld
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
+
+# For flash-jlink target
+JLINK_DEVICE = K32L2B31xxxxA
+
+# For flash-pyocd target
+PYOCD_TARGET = K32L2B
+
+# flash using pyocd
+flash: flash-pyocd
diff --git a/hw/bsp/frdm_k32l2b/frdm_k32l2b.c b/hw/bsp/kinetis/boards/frdm_k32l2b/frdm_k32l2b.c
similarity index 99%
rename from hw/bsp/frdm_k32l2b/frdm_k32l2b.c
rename to hw/bsp/kinetis/boards/frdm_k32l2b/frdm_k32l2b.c
index 8d2b39500..1566b4e2e 100644
--- a/hw/bsp/frdm_k32l2b/frdm_k32l2b.c
+++ b/hw/bsp/kinetis/boards/frdm_k32l2b/frdm_k32l2b.c
@@ -25,7 +25,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "../board.h"
+#include "bsp/board.h"
 #include "board.h"
 #include "fsl_gpio.h"
 #include "fsl_port.h"
diff --git a/hw/bsp/frdm_kl25z/board.mk b/hw/bsp/kinetis/boards/frdm_kl25z/board.mk
similarity index 54%
rename from hw/bsp/frdm_kl25z/board.mk
rename to hw/bsp/kinetis/boards/frdm_kl25z/board.mk
index fd616f7ed..5ce6cd51e 100644
--- a/hw/bsp/frdm_kl25z/board.mk
+++ b/hw/bsp/kinetis/boards/frdm_kl25z/board.mk
@@ -1,9 +1,8 @@
 SDK_DIR = hw/mcu/nxp/nxp_sdk
-DEPS_SUBMODULES += $(SDK_DIR)
+MCU = MKL25Z4
+MCU_DIR = $(SDK_DIR)/devices/$(MCU)
 
 CFLAGS += \
-  -mthumb \
-  -mabi=aapcs \
   -mcpu=cortex-m0plus \
   -DCPU_MKL25Z128VLK4 \
   -DCFG_TUSB_MCU=OPT_MCU_MKL25ZXX \
@@ -16,29 +15,9 @@ LDFLAGS += \
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter -Wno-error=format -Wno-error=redundant-decls
 
-MCU_DIR = $(SDK_DIR)/devices/MKL25Z4
-
 # All source paths should be relative to the top level.
 LD_FILE = $(MCU_DIR)/gcc/MKL25Z128xxx4_flash.ld
 
-SRC_C += \
-	src/portable/nxp/khci/dcd_khci.c \
-	src/portable/nxp/khci/hcd_khci.c \
-	$(MCU_DIR)/system_MKL25Z4.c \
-	$(MCU_DIR)/project_template/clock_config.c \
-	$(MCU_DIR)/drivers/fsl_clock.c \
-	$(MCU_DIR)/drivers/fsl_gpio.c \
-	$(MCU_DIR)/drivers/fsl_lpsci.c
-
-INC += \
-	$(TOP)/hw/bsp/$(BOARD) \
-	$(TOP)/$(SDK_DIR)/CMSIS/Include \
-	$(TOP)/$(MCU_DIR) \
-	$(TOP)/$(MCU_DIR)/drivers \
-	$(TOP)/$(MCU_DIR)/project_template \
-
-SRC_S += $(MCU_DIR)/gcc/startup_MKL25Z4.S
-
 # For freeRTOS port source
 FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
 
@@ -49,4 +28,4 @@ JLINK_DEVICE = MKL25Z128xxx4
 PYOCD_TARGET = mkl25zl128
 
 # flash using pyocd
-flash: flash-pyocd
+flash: flash-jlink
diff --git a/hw/bsp/frdm_kl25z/frdm_kl25z.c b/hw/bsp/kinetis/boards/frdm_kl25z/frdm_kl25z.c
similarity index 100%
rename from hw/bsp/frdm_kl25z/frdm_kl25z.c
rename to hw/bsp/kinetis/boards/frdm_kl25z/frdm_kl25z.c
diff --git a/hw/bsp/kinetis/family.mk b/hw/bsp/kinetis/family.mk
new file mode 100644
index 000000000..65767988a
--- /dev/null
+++ b/hw/bsp/kinetis/family.mk
@@ -0,0 +1,46 @@
+DEPS_SUBMODULES += hw/mcu/nxp/nxp_sdk hw/mcu/nxp/mcux-sdk
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+CFLAGS += \
+  -mthumb \
+  -mabi=aapcs \
+
+SRC_C += \
+	src/portable/nxp/khci/dcd_khci.c \
+	src/portable/nxp/khci/hcd_khci.c \
+	$(MCU_DIR)/system_$(MCU).c \
+	$(MCU_DIR)/project_template/clock_config.c \
+	$(MCU_DIR)/drivers/fsl_clock.c \
+
+INC += \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/$(SDK_DIR)/CMSIS/Include \
+	$(TOP)/$(MCU_DIR) \
+	$(TOP)/$(MCU_DIR)/project_template \
+	$(TOP)/$(MCU_DIR)/drivers
+
+# mcu-sdk has different driver layout than previous old sdk
+ifeq ($(SDK_DIR),hw/mcu/nxp/mcux-sdk)
+
+SRC_C += \
+	$(SDK_DIR)/drivers/gpio/fsl_gpio.c \
+	$(SDK_DIR)/drivers/lpuart/fsl_lpuart.c
+
+INC += \
+	$(TOP)/$(SDK_DIR)/drivers/smc \
+	$(TOP)/$(SDK_DIR)/drivers/common \
+	$(TOP)/$(SDK_DIR)/drivers/gpio \
+	$(TOP)/$(SDK_DIR)/drivers/port \
+	$(TOP)/$(SDK_DIR)/drivers/lpuart \
+
+else
+
+SRC_C += \
+	$(MCU_DIR)/drivers/fsl_gpio.c \
+	$(MCU_DIR)/drivers/fsl_lpsci.c \
+	$(MCU_DIR)/drivers/fsl_uart.c
+
+endif
+
+SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 18e40e1b1..a94e1877f 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -86,6 +86,8 @@
   #define TUP_RHPORT_HIGHSPEED    1 // Port0 HS, Port1 HS
 
 #elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2AXX, OPT_MCU_K32L2BXX)
+  #define TUP_USBIP_CHIPIDEA_FS
+  #define TUP_USBIP_CHIPIDEA_FS_KINETIS
   #define TUP_DCD_ENDPOINT_MAX    16
 
 #elif TU_CHECK_MCU(OPT_MCU_MM32F327X)
diff --git a/src/portable/nxp/khci/dcd_khci.c b/src/portable/nxp/khci/dcd_khci.c
index 2678cdca1..52f4145f2 100644
--- a/src/portable/nxp/khci/dcd_khci.c
+++ b/src/portable/nxp/khci/dcd_khci.c
@@ -26,15 +26,14 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUD_ENABLED &&                     \
-  (					   \
-   ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || \
-   ( CFG_TUSB_MCU == OPT_MCU_K32L2AXX ) || \
-   ( CFG_TUSB_MCU == OPT_MCU_K32L2BXX )	   \
-  )
+#if CFG_TUD_ENABLED && defined(TUP_USBIP_CHIPIDEA_FS)
 
-#include "fsl_device_registers.h"
-#define KHCI        USB0
+#ifdef TUP_USBIP_CHIPIDEA_FS_KINETIS
+  #include "fsl_device_registers.h"
+  #define KHCI        USB0
+#else
+  #error "MCU is not supported"
+#endif
 
 #include "device/dcd.h"
 
diff --git a/src/portable/nxp/khci/hcd_khci.c b/src/portable/nxp/khci/hcd_khci.c
index 8ff1feff7..27073dce7 100644
--- a/src/portable/nxp/khci/hcd_khci.c
+++ b/src/portable/nxp/khci/hcd_khci.c
@@ -26,7 +26,7 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUD_ENABLED &&                     \
+#if CFG_TUH_ENABLED &&                     \
   (					   \
    ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || \
    ( CFG_TUSB_MCU == OPT_MCU_K32L2AXX ) || \

From 1fc203b085ba6ce2edef90e9dcc75ec72eaeb314 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 18 Mar 2023 19:50:24 +0700
Subject: [PATCH 182/691] more update to kinetis bsp

---
 docs/reference/supported.rst                  |  2 +-
 hw/bsp/board_mcu.h                            | 14 ++---
 .../boards/frdm_k32l2a4s/board.h              |  0
 .../boards/frdm_k32l2a4s/board.mk             |  6 +--
 .../boards/frdm_k32l2a4s/frdm_k32l2a4s.c      |  0
 .../boards/frdm_k32l2b/board.h                |  0
 .../boards/frdm_k32l2b/board.mk               |  6 +--
 .../boards/frdm_k32l2b/frdm_k32l2b.c          |  0
 .../boards}/kuiic/K32L2B31xxxxA_flash.ld      |  0
 hw/bsp/{ => kinetis_k32/boards}/kuiic/board.h |  0
 hw/bsp/kinetis_k32/boards/kuiic/board.mk      | 26 ++++++++++
 hw/bsp/{ => kinetis_k32/boards}/kuiic/kuiic.c |  2 +-
 hw/bsp/{kinetis => kinetis_k32}/family.mk     | 28 +++-------
 .../boards/frdm_kl25z/board.mk                | 11 ----
 .../boards/frdm_kl25z/frdm_kl25z.c            |  0
 hw/bsp/kinetis_kl/family.mk                   | 37 +++++++++++++
 hw/bsp/kuiic/board.mk                         | 52 -------------------
 src/common/tusb_mcu.h                         |  2 +-
 src/portable/nxp/khci/hcd_khci.c              | 15 +++---
 src/tusb_option.h                             |  8 +--
 20 files changed, 98 insertions(+), 111 deletions(-)
 rename hw/bsp/{kinetis => kinetis_k32}/boards/frdm_k32l2a4s/board.h (100%)
 rename hw/bsp/{kinetis => kinetis_k32}/boards/frdm_k32l2a4s/board.mk (84%)
 rename hw/bsp/{kinetis => kinetis_k32}/boards/frdm_k32l2a4s/frdm_k32l2a4s.c (100%)
 rename hw/bsp/{kinetis => kinetis_k32}/boards/frdm_k32l2b/board.h (100%)
 rename hw/bsp/{kinetis => kinetis_k32}/boards/frdm_k32l2b/board.mk (83%)
 rename hw/bsp/{kinetis => kinetis_k32}/boards/frdm_k32l2b/frdm_k32l2b.c (100%)
 rename hw/bsp/{ => kinetis_k32/boards}/kuiic/K32L2B31xxxxA_flash.ld (100%)
 rename hw/bsp/{ => kinetis_k32/boards}/kuiic/board.h (100%)
 create mode 100644 hw/bsp/kinetis_k32/boards/kuiic/board.mk
 rename hw/bsp/{ => kinetis_k32/boards}/kuiic/kuiic.c (99%)
 rename hw/bsp/{kinetis => kinetis_k32}/family.mk (63%)
 rename hw/bsp/{kinetis => kinetis_kl}/boards/frdm_kl25z/board.mk (60%)
 rename hw/bsp/{kinetis => kinetis_kl}/boards/frdm_kl25z/frdm_kl25z.c (100%)
 create mode 100644 hw/bsp/kinetis_kl/family.mk
 delete mode 100644 hw/bsp/kuiic/board.mk

diff --git a/docs/reference/supported.rst b/docs/reference/supported.rst
index b1e0c0a68..a5d055893 100644
--- a/docs/reference/supported.rst
+++ b/docs/reference/supported.rst
@@ -253,7 +253,7 @@ Kinetis
 ^^^^^^^
 
 -  `Freedom FRDM-KL25Z <https://www.nxp.com/design/development-boards/freedom-development-boards/mcu-boards/freedom-development-platform-for-kinetis-kl14-kl15-kl24-kl25-mcus:FRDM-KL25Z>`__
--  `Freedom FRDM-K32L2A  <https://www.nxp.com/design/development-boards/freedom-development-boards/mcu-boards/nxp-freedom-platform-for-k32-l2a-mcus:FRDM-K32L2A4S>`__
+-  `Freedom FRDM-K32L2A4S  <https://www.nxp.com/design/development-boards/freedom-development-boards/mcu-boards/nxp-freedom-platform-for-k32-l2a-mcus:FRDM-K32L2A4S>`__
 -  `Freedom FRDM-K32L2B3 <https://www.nxp.com/design/development-boards/freedom-development-boards/mcu-boards/nxp-freedom-development-platform-for-k32-l2b-mcus:FRDM-K32L2B3>`__
 -  `KUIIC <https://github.com/nxf58843/kuiic>`__
 
diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h
index 920e7d0d9..cd195a19b 100644
--- a/hw/bsp/board_mcu.h
+++ b/hw/bsp/board_mcu.h
@@ -39,15 +39,15 @@
 //--------------------------------------------------------------------+
 
 // Include order follows OPT_MCU_ number
-#if   CFG_TUSB_MCU == OPT_MCU_LPC11UXX   || CFG_TUSB_MCU == OPT_MCU_LPC13XX    || \
-      CFG_TUSB_MCU == OPT_MCU_LPC15XX    || CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || \
-      CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC18XX    || \
-      CFG_TUSB_MCU == OPT_MCU_LPC40XX    || CFG_TUSB_MCU == OPT_MCU_LPC43XX
+#if   TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX) || \
+      TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC18XX)  || \
+      TU_CHECK_MCU(OPT_MCU_LPC40XX, OPT_MCU_LPC43XX)
   #include "chip.h"
 
-#elif CFG_TUSB_MCU == OPT_MCU_LPC51UXX || CFG_TUSB_MCU == OPT_MCU_LPC54XXX || \
-      CFG_TUSB_MCU == OPT_MCU_LPC55XX  || CFG_TUSB_MCU == OPT_MCU_MKL25ZXX || \
-      CFG_TUSB_MCU == OPT_MCU_K32L2AXX || OPT_MCU_K32L2BXX
+#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX, OPT_MCU_LPC54XXX, OPT_MCU_LPC55XX)
+  #include "fsl_device_registers.h"
+
+#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32)
   #include "fsl_device_registers.h"
 
 #elif CFG_TUSB_MCU == OPT_MCU_NRF5X
diff --git a/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.h b/hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.h
similarity index 100%
rename from hw/bsp/kinetis/boards/frdm_k32l2a4s/board.h
rename to hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.h
diff --git a/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk b/hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.mk
similarity index 84%
rename from hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk
rename to hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.mk
index 723fb3893..d96ab58b8 100644
--- a/hw/bsp/kinetis/boards/frdm_k32l2a4s/board.mk
+++ b/hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.mk
@@ -1,11 +1,8 @@
-SDK_DIR = hw/mcu/nxp/mcux-sdk
 MCU = K32L2A41A
-MCU_DIR = $(SDK_DIR)/devices/$(MCU)
 
 CFLAGS += \
   -mcpu=cortex-m0plus \
   -DCPU_K32L2A41VLH1A \
-  -DCFG_TUSB_MCU=OPT_MCU_K32L2AXX
 
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual
@@ -13,6 +10,9 @@ CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast
 # All source paths should be relative to the top level.
 LD_FILE = $(MCU_DIR)/gcc/K32L2A41xxxxA_flash.ld
 
+SRC_C += \
+	$(MCU_DIR)/project_template/clock_config.c \
+
 # For freeRTOS port source
 FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
 
diff --git a/hw/bsp/kinetis/boards/frdm_k32l2a4s/frdm_k32l2a4s.c b/hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/frdm_k32l2a4s.c
similarity index 100%
rename from hw/bsp/kinetis/boards/frdm_k32l2a4s/frdm_k32l2a4s.c
rename to hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/frdm_k32l2a4s.c
diff --git a/hw/bsp/kinetis/boards/frdm_k32l2b/board.h b/hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.h
similarity index 100%
rename from hw/bsp/kinetis/boards/frdm_k32l2b/board.h
rename to hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.h
diff --git a/hw/bsp/kinetis/boards/frdm_k32l2b/board.mk b/hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.mk
similarity index 83%
rename from hw/bsp/kinetis/boards/frdm_k32l2b/board.mk
rename to hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.mk
index 66d408c67..5f8ecbfe4 100644
--- a/hw/bsp/kinetis/boards/frdm_k32l2b/board.mk
+++ b/hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.mk
@@ -1,11 +1,8 @@
-SDK_DIR = hw/mcu/nxp/mcux-sdk
 MCU = K32L2B31A
-MCU_DIR = $(SDK_DIR)/devices/$(MCU)
 
 CFLAGS += \
   -mcpu=cortex-m0plus \
   -DCPU_K32L2B31VLH0A \
-  -DCFG_TUSB_MCU=OPT_MCU_K32L2BXX
 
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls
@@ -13,6 +10,9 @@ CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls
 # All source paths should be relative to the top level.
 LD_FILE = $(MCU_DIR)/gcc/K32L2B31xxxxA_flash.ld
 
+SRC_C += \
+	$(MCU_DIR)/project_template/clock_config.c \
+
 # For freeRTOS port source
 FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
 
diff --git a/hw/bsp/kinetis/boards/frdm_k32l2b/frdm_k32l2b.c b/hw/bsp/kinetis_k32/boards/frdm_k32l2b/frdm_k32l2b.c
similarity index 100%
rename from hw/bsp/kinetis/boards/frdm_k32l2b/frdm_k32l2b.c
rename to hw/bsp/kinetis_k32/boards/frdm_k32l2b/frdm_k32l2b.c
diff --git a/hw/bsp/kuiic/K32L2B31xxxxA_flash.ld b/hw/bsp/kinetis_k32/boards/kuiic/K32L2B31xxxxA_flash.ld
similarity index 100%
rename from hw/bsp/kuiic/K32L2B31xxxxA_flash.ld
rename to hw/bsp/kinetis_k32/boards/kuiic/K32L2B31xxxxA_flash.ld
diff --git a/hw/bsp/kuiic/board.h b/hw/bsp/kinetis_k32/boards/kuiic/board.h
similarity index 100%
rename from hw/bsp/kuiic/board.h
rename to hw/bsp/kinetis_k32/boards/kuiic/board.h
diff --git a/hw/bsp/kinetis_k32/boards/kuiic/board.mk b/hw/bsp/kinetis_k32/boards/kuiic/board.mk
new file mode 100644
index 000000000..29a12e982
--- /dev/null
+++ b/hw/bsp/kinetis_k32/boards/kuiic/board.mk
@@ -0,0 +1,26 @@
+MCU = K32L2B31A
+
+# This board uses TinyUF2 for updates
+UF2_FAMILY_ID = 0x7f83e793
+
+CFLAGS += \
+  -mcpu=cortex-m0plus \
+  -DCPU_K32L2B31VLH0A \
+
+# mcu driver cause following warnings
+CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/K32L2B31xxxxA_flash.ld
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
+
+# For flash-jlink target
+JLINK_DEVICE = K32L2B31xxxxA
+
+# For flash-pyocd target
+PYOCD_TARGET = K32L2B
+
+# flash using pyocd
+flash: flash-pyocd
diff --git a/hw/bsp/kuiic/kuiic.c b/hw/bsp/kinetis_k32/boards/kuiic/kuiic.c
similarity index 99%
rename from hw/bsp/kuiic/kuiic.c
rename to hw/bsp/kinetis_k32/boards/kuiic/kuiic.c
index 97677d47a..f9002a6d3 100644
--- a/hw/bsp/kuiic/kuiic.c
+++ b/hw/bsp/kinetis_k32/boards/kuiic/kuiic.c
@@ -25,7 +25,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "../board.h"
+#include "bsp/board.h"
 #include "board.h"
 #include "fsl_smc.h"
 #include "fsl_gpio.h"
diff --git a/hw/bsp/kinetis/family.mk b/hw/bsp/kinetis_k32/family.mk
similarity index 63%
rename from hw/bsp/kinetis/family.mk
rename to hw/bsp/kinetis_k32/family.mk
index 65767988a..f89138b72 100644
--- a/hw/bsp/kinetis/family.mk
+++ b/hw/bsp/kinetis_k32/family.mk
@@ -1,46 +1,32 @@
-DEPS_SUBMODULES += hw/mcu/nxp/nxp_sdk hw/mcu/nxp/mcux-sdk
+SDK_DIR = hw/mcu/nxp/mcux-sdk
+DEPS_SUBMODULES += $(SDK_DIR)
 
+MCU_DIR = $(SDK_DIR)/devices/$(MCU)
 include $(TOP)/$(BOARD_PATH)/board.mk
 
 CFLAGS += \
   -mthumb \
   -mabi=aapcs \
+	-DCFG_TUSB_MCU=OPT_MCU_KINETIS_K32
 
 SRC_C += \
 	src/portable/nxp/khci/dcd_khci.c \
 	src/portable/nxp/khci/hcd_khci.c \
 	$(MCU_DIR)/system_$(MCU).c \
-	$(MCU_DIR)/project_template/clock_config.c \
 	$(MCU_DIR)/drivers/fsl_clock.c \
+	$(SDK_DIR)/drivers/gpio/fsl_gpio.c \
+	$(SDK_DIR)/drivers/lpuart/fsl_lpuart.c
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
 	$(TOP)/$(SDK_DIR)/CMSIS/Include \
 	$(TOP)/$(MCU_DIR) \
 	$(TOP)/$(MCU_DIR)/project_template \
-	$(TOP)/$(MCU_DIR)/drivers
-
-# mcu-sdk has different driver layout than previous old sdk
-ifeq ($(SDK_DIR),hw/mcu/nxp/mcux-sdk)
-
-SRC_C += \
-	$(SDK_DIR)/drivers/gpio/fsl_gpio.c \
-	$(SDK_DIR)/drivers/lpuart/fsl_lpuart.c
-
-INC += \
+	$(TOP)/$(MCU_DIR)/drivers \
 	$(TOP)/$(SDK_DIR)/drivers/smc \
 	$(TOP)/$(SDK_DIR)/drivers/common \
 	$(TOP)/$(SDK_DIR)/drivers/gpio \
 	$(TOP)/$(SDK_DIR)/drivers/port \
 	$(TOP)/$(SDK_DIR)/drivers/lpuart \
 
-else
-
-SRC_C += \
-	$(MCU_DIR)/drivers/fsl_gpio.c \
-	$(MCU_DIR)/drivers/fsl_lpsci.c \
-	$(MCU_DIR)/drivers/fsl_uart.c
-
-endif
-
 SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S
diff --git a/hw/bsp/kinetis/boards/frdm_kl25z/board.mk b/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk
similarity index 60%
rename from hw/bsp/kinetis/boards/frdm_kl25z/board.mk
rename to hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk
index 5ce6cd51e..affe864fb 100644
--- a/hw/bsp/kinetis/boards/frdm_kl25z/board.mk
+++ b/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk
@@ -1,26 +1,15 @@
-SDK_DIR = hw/mcu/nxp/nxp_sdk
 MCU = MKL25Z4
-MCU_DIR = $(SDK_DIR)/devices/$(MCU)
 
 CFLAGS += \
-  -mcpu=cortex-m0plus \
   -DCPU_MKL25Z128VLK4 \
-  -DCFG_TUSB_MCU=OPT_MCU_MKL25ZXX \
   -DCFG_EXAMPLE_VIDEO_READONLY
 
-LDFLAGS += \
-  -Wl,--defsym,__stack_size__=0x400 \
-  -Wl,--defsym,__heap_size__=0
-
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter -Wno-error=format -Wno-error=redundant-decls
 
 # All source paths should be relative to the top level.
 LD_FILE = $(MCU_DIR)/gcc/MKL25Z128xxx4_flash.ld
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
-
 # For flash-jlink target
 JLINK_DEVICE = MKL25Z128xxx4
 
diff --git a/hw/bsp/kinetis/boards/frdm_kl25z/frdm_kl25z.c b/hw/bsp/kinetis_kl/boards/frdm_kl25z/frdm_kl25z.c
similarity index 100%
rename from hw/bsp/kinetis/boards/frdm_kl25z/frdm_kl25z.c
rename to hw/bsp/kinetis_kl/boards/frdm_kl25z/frdm_kl25z.c
diff --git a/hw/bsp/kinetis_kl/family.mk b/hw/bsp/kinetis_kl/family.mk
new file mode 100644
index 000000000..e805d6dae
--- /dev/null
+++ b/hw/bsp/kinetis_kl/family.mk
@@ -0,0 +1,37 @@
+SDK_DIR = hw/mcu/nxp/nxp_sdk
+DEPS_SUBMODULES += $(SDK_DIR)
+
+MCU_DIR = $(SDK_DIR)/devices/$(MCU)
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+CFLAGS += \
+  -mthumb \
+  -mabi=aapcs \
+  -mcpu=cortex-m0plus \
+  -DCFG_TUSB_MCU=OPT_MCU_KINETIS_KL \
+
+LDFLAGS += \
+  -Wl,--defsym,__stack_size__=0x400 \
+  -Wl,--defsym,__heap_size__=0
+
+SRC_C += \
+	src/portable/nxp/khci/dcd_khci.c \
+	src/portable/nxp/khci/hcd_khci.c \
+	$(MCU_DIR)/system_$(MCU).c \
+	$(MCU_DIR)/project_template/clock_config.c \
+	$(MCU_DIR)/drivers/fsl_clock.c \
+	$(MCU_DIR)/drivers/fsl_gpio.c \
+	$(MCU_DIR)/drivers/fsl_lpsci.c \
+	$(MCU_DIR)/drivers/fsl_uart.c
+
+INC += \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/$(SDK_DIR)/CMSIS/Include \
+	$(TOP)/$(MCU_DIR) \
+	$(TOP)/$(MCU_DIR)/project_template \
+	$(TOP)/$(MCU_DIR)/drivers
+
+SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
diff --git a/hw/bsp/kuiic/board.mk b/hw/bsp/kuiic/board.mk
deleted file mode 100644
index cb3459586..000000000
--- a/hw/bsp/kuiic/board.mk
+++ /dev/null
@@ -1,52 +0,0 @@
-SDK_DIR = hw/mcu/nxp/mcux-sdk
-DEPS_SUBMODULES += $(SDK_DIR) tools/uf2
-
-# This board uses TinyUF2 for updates
-UF2_FAMILY_ID = 0x7f83e793
-
-CFLAGS += \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m0plus \
-  -DCPU_K32L2B31VLH0A \
-  -DCFG_TUSB_MCU=OPT_MCU_K32L2BXX
-
-# mcu driver cause following warnings
-CFLAGS += -Wno-error=unused-parameter
-
-MCU_DIR = $(SDK_DIR)/devices/K32L2B31A
-
-# All source paths should be relative to the top level.
-LD_FILE = /hw/bsp/$(BOARD)/K32L2B31xxxxA_flash.ld
-
-SRC_C += \
-	src/portable/nxp/khci/dcd_khci.c \
-	$(MCU_DIR)/system_K32L2B31A.c \
-	$(MCU_DIR)/drivers/fsl_clock.c \
-	$(SDK_DIR)/drivers/gpio/fsl_gpio.c \
-	$(SDK_DIR)/drivers/lpuart/fsl_lpuart.c
-
-INC += \
-	$(TOP)/hw/bsp/$(BOARD) \
-	$(TOP)/$(SDK_DIR)/CMSIS/Include \
-	$(TOP)/$(SDK_DIR)/drivers/smc \
-	$(TOP)/$(SDK_DIR)/drivers/common \
-	$(TOP)/$(SDK_DIR)/drivers/gpio \
-	$(TOP)/$(SDK_DIR)/drivers/port \
-	$(TOP)/$(SDK_DIR)/drivers/lpuart \
-	$(TOP)/$(MCU_DIR) \
-	$(TOP)/$(MCU_DIR)/drivers
-
-SRC_S += $(MCU_DIR)/gcc/startup_K32L2B31A.S
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
-
-# For flash-jlink target
-JLINK_DEVICE = MKL25Z128xxx4
-
-# For flash-pyocd target
-PYOCD_TARGET = K32L2B
-
-# flash using pyocd
-flash: flash-pyocd
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index a94e1877f..b903abeca 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -85,7 +85,7 @@
   #define TUP_DCD_ENDPOINT_MAX    8
   #define TUP_RHPORT_HIGHSPEED    1 // Port0 HS, Port1 HS
 
-#elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2AXX, OPT_MCU_K32L2BXX)
+#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32)
   #define TUP_USBIP_CHIPIDEA_FS
   #define TUP_USBIP_CHIPIDEA_FS_KINETIS
   #define TUP_DCD_ENDPOINT_MAX    16
diff --git a/src/portable/nxp/khci/hcd_khci.c b/src/portable/nxp/khci/hcd_khci.c
index 27073dce7..6d25cd862 100644
--- a/src/portable/nxp/khci/hcd_khci.c
+++ b/src/portable/nxp/khci/hcd_khci.c
@@ -26,15 +26,14 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUH_ENABLED &&                     \
-  (					   \
-   ( CFG_TUSB_MCU == OPT_MCU_MKL25ZXX ) || \
-   ( CFG_TUSB_MCU == OPT_MCU_K32L2AXX ) || \
-   ( CFG_TUSB_MCU == OPT_MCU_K32L2BXX )	   \
-  )
+#if CFG_TUH_ENABLED && defined(TUP_USBIP_CHIPIDEA_FS)
 
-#include "fsl_device_registers.h"
-#define KHCI        USB0
+#ifdef TUP_USBIP_CHIPIDEA_FS_KINETIS
+  #include "fsl_device_registers.h"
+  #define KHCI        USB0
+#else
+  #error "MCU is not supported"
+#endif
 
 #include "host/hcd.h"
 
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 5a234e357..c679f2f12 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -117,9 +117,11 @@
 #define OPT_MCU_RP2040           1100 ///< Raspberry Pi RP2040
 
 // NXP Kinetis
-#define OPT_MCU_MKL25ZXX         1200 ///< NXP MKL25Zxx
-#define OPT_MCU_K32L2BXX         1201 ///< NXP K32L2Bxx
-#define OPT_MCU_K32L2AXX         1202 ///< NXP K32L2Axx
+#define OPT_MCU_KINETIS_KL       1200 ///< NXP KL series
+#define OPT_MCU_KINETIS_K32      1201 ///< NXP K32 series
+
+#define OPT_MCU_MKL25ZXX         1200 ///< Alias to KL (obsolete)
+#define OPT_MCU_K32L2BXX         1201 ///< Alias to K32 (obsolete)
 
 // Silabs
 #define OPT_MCU_EFM32GG          1300 ///< Silabs EFM32GG

From bbe550efa0d99c18721c230b3a0a45e8ac6cd28e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 18 Mar 2023 20:19:37 +0700
Subject: [PATCH 183/691] add kinetis family to ci

---
 .github/workflows/build_arm.yml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 7aecb8386..f63f637b1 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -34,6 +34,7 @@ jobs:
         # Alphabetical order
         - 'broadcom_32bit'
         - 'imxrt'
+        - 'kinetis_k32 kinetis_kl'
         - 'lpc15 lpc18'
         - 'lpc54 lpc55'
         - 'mm32 msp432e4'

From ec0f25d095a670d24578e39145729b2eb3028c28 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 18 Mar 2023 20:30:49 +0700
Subject: [PATCH 184/691] fix ci with kl25z

---
 examples/device/net_lwip_webserver/skip.txt  | 1 +
 hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/examples/device/net_lwip_webserver/skip.txt b/examples/device/net_lwip_webserver/skip.txt
index b0e5235ac..77c7ec63a 100644
--- a/examples/device/net_lwip_webserver/skip.txt
+++ b/examples/device/net_lwip_webserver/skip.txt
@@ -8,3 +8,4 @@ mcu:MKL25ZXX
 family:broadcom_64bit
 family:broadcom_32bit
 board:curiosity_nano
+board:frdm_kl25z
diff --git a/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk b/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk
index affe864fb..0d0bceaa4 100644
--- a/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk
+++ b/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk
@@ -2,7 +2,8 @@ MCU = MKL25Z4
 
 CFLAGS += \
   -DCPU_MKL25Z128VLK4 \
-  -DCFG_EXAMPLE_VIDEO_READONLY
+  -DCFG_EXAMPLE_VIDEO_READONLY \
+  -DCFG_EXAMPLE_MSC_READONLY
 
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter -Wno-error=format -Wno-error=redundant-decls

From 3944f1c4dab07569cb6fa781facd6afc20bbf35d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 19 Mar 2023 11:28:06 +0700
Subject: [PATCH 185/691] group same5x

---
 .codespell/ignore-words.txt                   |  1 +
 .github/workflows/build_arm.yml               |  2 +-
 hw/bsp/d5035_01/board.mk                      | 61 -------------------
 hw/bsp/same54xplainedpro/board.mk             | 48 ---------------
 hw/bsp/same5x/boards/d5035_01/board.mk        | 21 +++++++
 .../{ => same5x/boards}/d5035_01/d5035_01.c   |  0
 .../boards}/d5035_01/same51j19a_flash.ld      |  0
 hw/bsp/same5x/boards/same54_xplained/board.mk | 12 ++++
 .../boards/same54_xplained/same54_xplained.c} |  0
 .../same54_xplained}/same54p20a_flash.ld      |  0
 .../same54_xplained}/same54p20a_sram.ld       |  0
 hw/bsp/same5x/family.mk                       | 42 +++++++++++++
 12 files changed, 77 insertions(+), 110 deletions(-)
 delete mode 100644 hw/bsp/d5035_01/board.mk
 delete mode 100644 hw/bsp/same54xplainedpro/board.mk
 create mode 100644 hw/bsp/same5x/boards/d5035_01/board.mk
 rename hw/bsp/{ => same5x/boards}/d5035_01/d5035_01.c (100%)
 rename hw/bsp/{ => same5x/boards}/d5035_01/same51j19a_flash.ld (100%)
 create mode 100644 hw/bsp/same5x/boards/same54_xplained/board.mk
 rename hw/bsp/{same54xplainedpro/same54xplainedpro.c => same5x/boards/same54_xplained/same54_xplained.c} (100%)
 rename hw/bsp/{same54xplainedpro => same5x/boards/same54_xplained}/same54p20a_flash.ld (100%)
 rename hw/bsp/{same54xplainedpro => same5x/boards/same54_xplained}/same54p20a_sram.ld (100%)
 create mode 100644 hw/bsp/same5x/family.mk

diff --git a/.codespell/ignore-words.txt b/.codespell/ignore-words.txt
index fc14fe417..5c89bae1c 100644
--- a/.codespell/ignore-words.txt
+++ b/.codespell/ignore-words.txt
@@ -9,3 +9,4 @@ te
 attch
 endianess
 pris
+busses
diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index f63f637b1..905cc4f9a 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -41,7 +41,7 @@ jobs:
         - 'nrf'
         - 'ra'
         - 'rp2040'
-        - 'samd11'
+        - 'samd11 same5x'
         - 'samd21'
         - 'samd51'
         - 'saml2x'
diff --git a/hw/bsp/d5035_01/board.mk b/hw/bsp/d5035_01/board.mk
deleted file mode 100644
index fc196b339..000000000
--- a/hw/bsp/d5035_01/board.mk
+++ /dev/null
@@ -1,61 +0,0 @@
-DEPS_SUBMODULES += hw/mcu/microchip
-HWREV ?= 1
-
-CFLAGS += \
-  -mthumb \
-  -mabi=aapcs \
-  -mlong-calls \
-  -mcpu=cortex-m4 \
-  -mfloat-abi=hard \
-  -mfpu=fpv4-sp-d16 \
-  -nostdlib -nostartfiles \
-  -D__SAME51J19A__ \
-  -DCONF_CPU_FREQUENCY=80000000 \
-  -DCONF_GCLK_USB_FREQUENCY=48000000 \
-  -DCFG_TUSB_MCU=OPT_MCU_SAME5X \
-  -DD5035_01=1 \
-  -DBOARD_NAME="\"D5035-01\"" \
-  -DSVC_Handler=SVCall_Handler \
-  -DHWREV=$(HWREV)
-
-# suppress warning caused by vendor mcu driver
-CFLAGS += -Wno-error=cast-qual
-
-# All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/same51j19a_flash.ld
-
-SRC_C += \
-  src/portable/microchip/samd/dcd_samd.c \
-  hw/mcu/microchip/same51/gcc/gcc/startup_same51.c \
-  hw/mcu/microchip/same51/gcc/system_same51.c
-
-ifdef SYSCALLS
-ifneq ($(SYSCALLS),0)
-  SRC_C += hw/mcu/microchip/same51/hal/utils/src/utils_syscalls.c
-endif
-endif
-
-ifdef LOG
-ifneq ($(LOG),0)
-  SRC_C += hw/mcu/microchip/same51/hal/utils/src/utils_syscalls.c
-endif
-endif
-
-INC += \
-	$(TOP)/hw/mcu/microchip/same51/ \
-	$(TOP)/hw/mcu/microchip/same51/config \
-	$(TOP)/hw/mcu/microchip/same51/include \
-	$(TOP)/hw/mcu/microchip/same51/hal/include \
-	$(TOP)/hw/mcu/microchip/same51/hal/utils/include \
-	$(TOP)/hw/mcu/microchip/same51/hpl/port \
-	$(TOP)/hw/mcu/microchip/same51/hri \
-	$(TOP)/hw/mcu/microchip/same51/CMSIS/Include
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
-
-# For flash-jlink target
-JLINK_DEVICE = ATSAME51J19
-
-# flash using jlink
-flash: flash-jlink
diff --git a/hw/bsp/same54xplainedpro/board.mk b/hw/bsp/same54xplainedpro/board.mk
deleted file mode 100644
index 1c6732231..000000000
--- a/hw/bsp/same54xplainedpro/board.mk
+++ /dev/null
@@ -1,48 +0,0 @@
-DEPS_SUBMODULES += hw/mcu/microchip
-
-CONF_CPU_FREQUENCY ?= 48000000
-
-CFLAGS += \
-  -mthumb \
-  -mabi=aapcs \
-  -mlong-calls \
-  -mcpu=cortex-m4 \
-  -mfloat-abi=hard \
-  -mfpu=fpv4-sp-d16 \
-  -nostdlib -nostartfiles \
-  -D__SAME54P20A__ \
-  -DCONF_CPU_FREQUENCY=$(CONF_CPU_FREQUENCY) \
-  -DCFG_TUSB_MCU=OPT_MCU_SAME5X \
-  -DBOARD_NAME="\"Microchip SAM E54 Xplained Pro\""
-
-# suppress warning caused by vendor mcu driver
-CFLAGS += -Wno-error=cast-qual
-
-# All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/same54p20a_flash.ld
-
-SRC_C += \
-  src/portable/microchip/samd/dcd_samd.c \
-  hw/mcu/microchip/same54/gcc/gcc/startup_same54.c \
-  hw/mcu/microchip/same54/gcc/system_same54.c \
-  hw/mcu/microchip/same54/hal/utils/src/utils_syscalls.c
-
-INC += \
-	$(TOP)/hw/mcu/microchip/same54/ \
-	$(TOP)/hw/mcu/microchip/same54/config \
-	$(TOP)/hw/mcu/microchip/same54/include \
-	$(TOP)/hw/mcu/microchip/same54/hal/include \
-	$(TOP)/hw/mcu/microchip/same54/hal/utils/include \
-	$(TOP)/hw/mcu/microchip/same54/hpl/port \
-	$(TOP)/hw/mcu/microchip/same54/hri \
-	$(TOP)/hw/mcu/microchip/same54/CMSIS/Include
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
-
-# For flash-jlink target
-JLINK_DEVICE = ATSAME54P20
-
-# flash using edbg from https://github.com/ataradov/edbg
-flash: $(BUILD)/$(PROJECT).bin
-	edbg --verbose -t same54 -pv -f $<
diff --git a/hw/bsp/same5x/boards/d5035_01/board.mk b/hw/bsp/same5x/boards/d5035_01/board.mk
new file mode 100644
index 000000000..c53411bb8
--- /dev/null
+++ b/hw/bsp/same5x/boards/d5035_01/board.mk
@@ -0,0 +1,21 @@
+MCU = same51
+
+HWREV ?= 1
+
+CFLAGS += \
+  -D__SAME51J19A__ \
+  -DCONF_CPU_FREQUENCY=80000000 \
+  -DCONF_GCLK_USB_FREQUENCY=48000000 \
+  -DD5035_01=1 \
+  -DBOARD_NAME="\"D5035-01\"" \
+  -DSVC_Handler=SVCall_Handler \
+  -DHWREV=$(HWREV)
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/same51j19a_flash.ld
+
+# For flash-jlink target
+JLINK_DEVICE = ATSAME51J19
+
+# flash using jlink
+flash: flash-jlink
diff --git a/hw/bsp/d5035_01/d5035_01.c b/hw/bsp/same5x/boards/d5035_01/d5035_01.c
similarity index 100%
rename from hw/bsp/d5035_01/d5035_01.c
rename to hw/bsp/same5x/boards/d5035_01/d5035_01.c
diff --git a/hw/bsp/d5035_01/same51j19a_flash.ld b/hw/bsp/same5x/boards/d5035_01/same51j19a_flash.ld
similarity index 100%
rename from hw/bsp/d5035_01/same51j19a_flash.ld
rename to hw/bsp/same5x/boards/d5035_01/same51j19a_flash.ld
diff --git a/hw/bsp/same5x/boards/same54_xplained/board.mk b/hw/bsp/same5x/boards/same54_xplained/board.mk
new file mode 100644
index 000000000..41cf95bfc
--- /dev/null
+++ b/hw/bsp/same5x/boards/same54_xplained/board.mk
@@ -0,0 +1,12 @@
+MCU = same54
+
+CFLAGS += \
+  -DCONF_CPU_FREQUENCY=48000000 \
+  -D__SAME54P20A__ \
+  -DBOARD_NAME="\"Microchip SAM E54 Xplained Pro\""
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/same54p20a_flash.ld
+
+# For flash-jlink target
+JLINK_DEVICE = ATSAME54P20
diff --git a/hw/bsp/same54xplainedpro/same54xplainedpro.c b/hw/bsp/same5x/boards/same54_xplained/same54_xplained.c
similarity index 100%
rename from hw/bsp/same54xplainedpro/same54xplainedpro.c
rename to hw/bsp/same5x/boards/same54_xplained/same54_xplained.c
diff --git a/hw/bsp/same54xplainedpro/same54p20a_flash.ld b/hw/bsp/same5x/boards/same54_xplained/same54p20a_flash.ld
similarity index 100%
rename from hw/bsp/same54xplainedpro/same54p20a_flash.ld
rename to hw/bsp/same5x/boards/same54_xplained/same54p20a_flash.ld
diff --git a/hw/bsp/same54xplainedpro/same54p20a_sram.ld b/hw/bsp/same5x/boards/same54_xplained/same54p20a_sram.ld
similarity index 100%
rename from hw/bsp/same54xplainedpro/same54p20a_sram.ld
rename to hw/bsp/same5x/boards/same54_xplained/same54p20a_sram.ld
diff --git a/hw/bsp/same5x/family.mk b/hw/bsp/same5x/family.mk
new file mode 100644
index 000000000..7f8692c97
--- /dev/null
+++ b/hw/bsp/same5x/family.mk
@@ -0,0 +1,42 @@
+DEPS_SUBMODULES += hw/mcu/microchip
+
+SDK_DIR = hw/mcu/microchip/$(MCU)
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+CFLAGS += \
+  -mthumb \
+  -mabi=aapcs \
+  -mlong-calls \
+  -mcpu=cortex-m4 \
+  -mfloat-abi=hard \
+  -mfpu=fpv4-sp-d16 \
+  -nostdlib -nostartfiles \
+  -DCFG_TUSB_MCU=OPT_MCU_SAME5X
+
+# suppress warning caused by vendor mcu driver
+#CFLAGS += -Wno-error=cast-qual
+
+SRC_C += \
+  src/portable/microchip/samd/dcd_samd.c \
+  $(SDK_DIR)/gcc/gcc/startup_$(MCU).c \
+  $(SDK_DIR)/gcc/system_$(MCU).c \
+  $(SDK_DIR)/hal/utils/src/utils_syscalls.c
+
+INC += \
+	$(TOP)/$(SDK_DIR) \
+	$(TOP)/$(SDK_DIR)/config \
+	$(TOP)/$(SDK_DIR)/include \
+	$(TOP)/$(SDK_DIR)/hal/include \
+	$(TOP)/$(SDK_DIR)/hal/utils/include \
+	$(TOP)/$(SDK_DIR)/hpl/port \
+	$(TOP)/$(SDK_DIR)/hri \
+	$(TOP)/$(SDK_DIR)/CMSIS/Include
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
+
+# flash using edbg from https://github.com/ataradov/edbg
+flash-edbg: $(BUILD)/$(PROJECT).bin
+	edbg --verbose -t $(MCU) -pv -f $<
+
+flash: flash-edbg

From ab0da3c30baab6eb63e55217f2b4d5a719fb86e4 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 19 Mar 2023 12:01:33 +0700
Subject: [PATCH 186/691] group stm32l0

---
 .github/workflows/build_arm.yml               |   2 +-
 hw/bsp/stm32l0/boards/stm32l052dap52/board.mk |   3 +-
 .../stm32l0538disco/STM32L053C8Tx_FLASH.ld    |   0
 .../boards/stm32l0538disco/board.h}           | 147 ++------
 .../stm32l0/boards/stm32l0538disco/board.mk   |  14 +
 hw/bsp/stm32l0/family.c                       |  32 +-
 hw/bsp/stm32l0/family.mk                      |  13 +-
 hw/bsp/stm32l0/stm32l0xx_hal_conf.h           |  90 +++--
 hw/bsp/stm32l0538disco/board.mk               |  54 ---
 hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h   | 331 ------------------
 10 files changed, 130 insertions(+), 556 deletions(-)
 rename hw/bsp/{ => stm32l0/boards}/stm32l0538disco/STM32L053C8Tx_FLASH.ld (100%)
 rename hw/bsp/{stm32l0538disco/stm32l0538disco.c => stm32l0/boards/stm32l0538disco/board.h} (51%)
 create mode 100644 hw/bsp/stm32l0/boards/stm32l0538disco/board.mk
 delete mode 100644 hw/bsp/stm32l0538disco/board.mk
 delete mode 100644 hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 905cc4f9a..3abfd50a8 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -50,7 +50,7 @@ jobs:
         - 'stm32f7'
         - 'stm32g4 stm32wb'
         - 'stm32h7'
-        - 'stm32l4'
+        - 'stm32l0 stm32l4'
         - 'tm4c123 xmc4000'
     steps:
     - name: Setup Python
diff --git a/hw/bsp/stm32l0/boards/stm32l052dap52/board.mk b/hw/bsp/stm32l0/boards/stm32l052dap52/board.mk
index 84662344d..0b1348474 100644
--- a/hw/bsp/stm32l0/boards/stm32l052dap52/board.mk
+++ b/hw/bsp/stm32l0/boards/stm32l052dap52/board.mk
@@ -1,4 +1,5 @@
-CFLAGS += -DSTM32L052xx -DCFG_EXAMPLE_VIDEO_READONLY
+CFLAGS += \
+	-DSTM32L052xx
 
 LD_FILE = $(BOARD_PATH)/STM32L052K8Ux_FLASH.ld
 
diff --git a/hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld b/hw/bsp/stm32l0/boards/stm32l0538disco/STM32L053C8Tx_FLASH.ld
similarity index 100%
rename from hw/bsp/stm32l0538disco/STM32L053C8Tx_FLASH.ld
rename to hw/bsp/stm32l0/boards/stm32l0538disco/STM32L053C8Tx_FLASH.ld
diff --git a/hw/bsp/stm32l0538disco/stm32l0538disco.c b/hw/bsp/stm32l0/boards/stm32l0538disco/board.h
similarity index 51%
rename from hw/bsp/stm32l0538disco/stm32l0538disco.c
rename to hw/bsp/stm32l0/boards/stm32l0538disco/board.h
index 46f6f0ff6..0722e3102 100644
--- a/hw/bsp/stm32l0538disco/stm32l0538disco.c
+++ b/hw/bsp/stm32l0/boards/stm32l0538disco/board.h
@@ -1,7 +1,7 @@
 /*
  * The MIT License (MIT)
  *
- * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -24,45 +24,35 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "../board.h"
-#include "stm32l0xx_hal.h"
+#ifndef BOARD_H_
+#define BOARD_H_
 
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-void USB_IRQHandler(void)
-{
-  tud_int_handler(0);
-}
+#ifdef __cplusplus
+ extern "C" {
+#endif
 
-//--------------------------------------------------------------------+
-// MACRO TYPEDEF CONSTANT ENUM
-//--------------------------------------------------------------------+
+// LED
 #define LED_PORT              GPIOA
 #define LED_PIN               GPIO_PIN_5
 #define LED_STATE_ON          1
 
+// Button
 #define BUTTON_PORT           GPIOA
 #define BUTTON_PIN            GPIO_PIN_0
 #define BUTTON_STATE_ACTIVE   1
 
-/**
-  * @brief  System Clock Configuration
-  *         The system Clock is configured as follow:
-  *         HSI48 used as USB clock source
-  *              - System Clock source            = HSI
-  *              - HSI Frequency(Hz)              = 16000000
-  *              - SYSCLK(Hz)                     = 16000000
-  *              - HCLK(Hz)                       = 16000000
-  *              - AHB Prescaler                  = 1
-  *              - APB1 Prescaler                 = 1
-  *              - APB2 Prescaler                 = 1
-  *              - Flash Latency(WS)              = 0
-  *              - Main regulator output voltage  = Scale1 mode
-  * @param  None
-  * @retval None
-  */
-static void SystemClock_Config(void)
+// UART
+//#define UART_DEV              USART2
+//#define UART_CLK_EN           __HAL_RCC_USART2_CLK_ENABLE
+//#define UART_GPIO_PORT        GPIOA
+//#define UART_GPIO_AF          GPIO_AF4_USART2
+//#define UART_TX_PIN           GPIO_PIN_2
+//#define UART_RX_PIN           GPIO_PIN_3
+
+//--------------------------------------------------------------------+
+// RCC Clock
+//--------------------------------------------------------------------+
+static inline void board_stm32l0_clock_init(void)
 {
   RCC_ClkInitTypeDef RCC_ClkInitStruct;
   RCC_OscInitTypeDef RCC_OscInitStruct;
@@ -108,99 +98,12 @@ static void SystemClock_Config(void)
   HAL_RCCEx_CRSConfig (&RCC_CRSInitStruct);
 }
 
-void board_init(void)
+static inline void board_vbus_sense_init(void)
 {
-  SystemClock_Config();
+}
 
-#if CFG_TUSB_OS  == OPT_OS_NONE
-  // 1ms tick timer
-  SysTick_Config(SystemCoreClock / 1000);
-#elif CFG_TUSB_OS == OPT_OS_FREERTOS
-  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
-  //NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
+#ifdef __cplusplus
+ }
 #endif
 
-  GPIO_InitTypeDef  GPIO_InitStruct;
-
-  // LED
-  __HAL_RCC_GPIOA_CLK_ENABLE();
-  GPIO_InitStruct.Pin = LED_PIN;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_PULLUP;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
-  HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
-
-  board_led_write(false);
-
-  // Button
-  //__HAL_RCC_GPIOA_CLK_ENABLE();
-  GPIO_InitStruct.Pin = BUTTON_PIN;
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-  GPIO_InitStruct.Pull = GPIO_PULLDOWN;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
-  HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
-
-  // USB
-  /* Configure DM DP Pins */
-  __HAL_RCC_GPIOA_CLK_ENABLE();
-  GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
-  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
-  /* Enable USB FS Clock */
-  __HAL_RCC_USB_CLK_ENABLE();
-}
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-void board_led_write(bool state)
-{
-  HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
-}
-
-uint32_t board_button_read(void)
-{
-  return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
-}
-
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
-
-int board_uart_write(void const * buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
-
-#if CFG_TUSB_OS  == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
-  HAL_IncTick();
-  system_ticks++;
-}
-
-uint32_t board_millis(void)
-{
-  return system_ticks;
-}
-#endif
-
-void HardFault_Handler (void)
-{
-  asm("bkpt");
-}
-
-// Required by __libc_init_array in startup code if we are compiling using
-// -nostdlib/-nostartfiles.
-void _init(void)
-{
-
-}
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/stm32l0/boards/stm32l0538disco/board.mk b/hw/bsp/stm32l0/boards/stm32l0538disco/board.mk
new file mode 100644
index 000000000..deed519ba
--- /dev/null
+++ b/hw/bsp/stm32l0/boards/stm32l0538disco/board.mk
@@ -0,0 +1,14 @@
+CFLAGS += \
+  -DSTM32L053xx
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/STM32L053C8Tx_FLASH.ld
+
+SRC_S += \
+  $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l053xx.s
+
+# For flash-jlink target
+JLINK_DEVICE = STM32L053R8
+
+# flash target using on-board stlink
+flash: flash-stlink
diff --git a/hw/bsp/stm32l0/family.c b/hw/bsp/stm32l0/family.c
index 6bce88b39..89749fb50 100644
--- a/hw/bsp/stm32l0/family.c
+++ b/hw/bsp/stm32l0/family.c
@@ -39,21 +39,14 @@ void USB_IRQHandler(void)
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
+#ifdef UART_DEV
 UART_HandleTypeDef UartHandle;
+#endif
 
 void board_init(void)
 {
   board_stm32l0_clock_init();
 
-  // Enable All GPIOs clocks
-  __HAL_RCC_GPIOA_CLK_ENABLE();
-  __HAL_RCC_GPIOB_CLK_ENABLE();
-  __HAL_RCC_GPIOC_CLK_ENABLE();
-  __HAL_RCC_GPIOD_CLK_ENABLE();
-
-  // Enable UART Clock
-  UART_CLK_EN();
-
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
@@ -66,6 +59,12 @@ void board_init(void)
   NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
 #endif
 
+  // Enable All GPIOs clocks
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+
   // LED
   GPIO_InitTypeDef  GPIO_InitStruct;
   GPIO_InitStruct.Pin = LED_PIN;
@@ -74,6 +73,8 @@ void board_init(void)
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
 
+  board_led_write(false);
+
   // Button
   GPIO_InitStruct.Pin = BUTTON_PIN;
   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
@@ -81,7 +82,10 @@ void board_init(void)
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
 
-  // Uart
+#ifdef UART_DEV
+  // Enable UART Clock
+  UART_CLK_EN();
+
   GPIO_InitStruct.Pin       = UART_TX_PIN | UART_RX_PIN;
   GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
   GPIO_InitStruct.Pull      = GPIO_PULLUP;
@@ -98,13 +102,14 @@ void board_init(void)
   UartHandle.Init.Mode       = UART_MODE_TX_RX;
   UartHandle.Init.OverSampling = UART_OVERSAMPLING_16;
   HAL_UART_Init(&UartHandle);
+#endif
 
   // USB Pins
   // Configure USB DM and DP pins. This is optional, and maintained only for user guidance.
   GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
   GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
   // USB Clock enable
@@ -133,8 +138,13 @@ int board_uart_read(uint8_t* buf, int len)
 
 int board_uart_write(void const * buf, int len)
 {
+#ifdef UART_DEV
   HAL_UART_Transmit(&UartHandle, (uint8_t*)(uintptr_t) buf, len, 0xffff);
   return len;
+#else
+  (void) buf; (void) len;
+  return 0;
+#endif
 }
 
 #if CFG_TUSB_OS  == OPT_OS_NONE
diff --git a/hw/bsp/stm32l0/family.mk b/hw/bsp/stm32l0/family.mk
index 67a5c69b8..f069ae8f0 100644
--- a/hw/bsp/stm32l0/family.mk
+++ b/hw/bsp/stm32l0/family.mk
@@ -1,5 +1,8 @@
 ST_FAMILY = l0
-DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_$(ST_FAMILY) hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
+DEPS_SUBMODULES += \
+	lib/CMSIS_5 \
+	hw/mcu/st/cmsis_device_$(ST_FAMILY) \
+	hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
 
 ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
 ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
@@ -17,8 +20,12 @@ CFLAGS += \
   -DCFG_EXAMPLE_VIDEO_READONLY \
   -DCFG_TUSB_MCU=OPT_MCU_STM32L0
 
-# suppress warning caused by vendor mcu driver
-CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-align -Wno-error=maybe-uninitialized
+# mcu driver cause following warnings
+CFLAGS += \
+	-Wno-error=unused-parameter \
+	-Wno-error=redundant-decls \
+	-Wno-error=cast-align \
+	-Wno-error=maybe-uninitialized
 
 SRC_C += \
   src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
diff --git a/hw/bsp/stm32l0/stm32l0xx_hal_conf.h b/hw/bsp/stm32l0/stm32l0xx_hal_conf.h
index e3a131043..fd109bc8c 100644
--- a/hw/bsp/stm32l0/stm32l0xx_hal_conf.h
+++ b/hw/bsp/stm32l0/stm32l0xx_hal_conf.h
@@ -2,19 +2,41 @@
   ******************************************************************************
   * @file    stm32l0xx_hal_conf.h
   * @author  MCD Application Team
-  * @brief   HAL configuration template file.
-  *          This file should be copied to the application folder and renamed
-  *          to stm32l0xx_hal_conf.h.
+  * @brief   HAL configuration file.
   ******************************************************************************
-  * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2016 STMicroelectronics International N.V. All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * Redistribution and use in source and binary forms, with or without
+  * modification, are permitted, provided that the following conditions are met:
+  *
+  * 1. Redistribution of source code must retain the above copyright notice,
+  *    this list of conditions and the following disclaimer.
+  * 2. Redistributions in binary form must reproduce the above copyright notice,
+  *    this list of conditions and the following disclaimer in the documentation
+  *    and/or other materials provided with the distribution.
+  * 3. Neither the name of STMicroelectronics nor the names of other
+  *    contributors to this software may be used to endorse or promote products
+  *    derived from this software without specific written permission.
+  * 4. This software, including modifications and/or derivative works of this
+  *    software, must execute solely and exclusively on microcontroller or
+  *    microprocessor devices manufactured by or for STMicroelectronics.
+  * 5. Redistribution and use of this software other than as permitted under
+  *    this license is void and will automatically terminate your rights under
+  *    this license.
+  *
+  * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT
+  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
+  * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
+  * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT
+  * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+  * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************
   */
@@ -35,35 +57,37 @@
   * @brief This is the list of modules to be used in the HAL driver
   */
 #define HAL_MODULE_ENABLED
-/*#define HAL_ADC_MODULE_ENABLED */
-/*#define HAL_COMP_MODULE_ENABLED */
-/*#define HAL_CRC_MODULE_ENABLED */
-/*#define HAL_CRYP_MODULE_ENABLED */
-/*#define HAL_DAC_MODULE_ENABLED */
+// #define HAL_ADC_MODULE_ENABLED
+/* #define HAL_COMP_MODULE_ENABLED */
+/* #define HAL_CRC_MODULE_ENABLED */
+/* #define HAL_CRYP_MODULE_ENABLED */
+/* #define HAL_DAC_MODULE_ENABLED */
 #define HAL_DMA_MODULE_ENABLED
-/*#define HAL_FIREWALL_MODULE_ENABLED */
+/* #define HAL_FIREWALL_MODULE_ENABLED */
 #define HAL_FLASH_MODULE_ENABLED
 #define HAL_GPIO_MODULE_ENABLED
-/*#define HAL_I2C_MODULE_ENABLED */
-/*#define HAL_I2S_MODULE_ENABLED */
-/*#define HAL_IWDG_MODULE_ENABLED */
-/*#define HAL_LCD_MODULE_ENABLED */
-/*#define HAL_LPTIM_MODULE_ENABLED */
+/* #define HAL_I2C_MODULE_ENABLED */
+/* #define HAL_I2S_MODULE_ENABLED */
+/* #define HAL_IWDG_MODULE_ENABLED */
+/* #define HAL_LCD_MODULE_ENABLED */
+/* #define HAL_LPTIM_MODULE_ENABLED */
 #define HAL_PWR_MODULE_ENABLED
 #define HAL_RCC_MODULE_ENABLED
-/*#define HAL_RNG_MODULE_ENABLED */
-/*#define HAL_RTC_MODULE_ENABLED */
-/*#define HAL_SPI_MODULE_ENABLED */
-/*#define HAL_TIM_MODULE_ENABLED */
-/*#define HAL_TSC_MODULE_ENABLED */
+//#define HAL_RNG_MODULE_ENABLED
+/* #define HAL_RTC_MODULE_ENABLED */
+//#define HAL_SPI_MODULE_ENABLED
+/* #define HAL_TIM_MODULE_ENABLED */
+/* #define HAL_TSC_MODULE_ENABLED */
 #define HAL_UART_MODULE_ENABLED
-/*#define HAL_USART_MODULE_ENABLED */
-/*#define HAL_IRDA_MODULE_ENABLED */
-/*#define HAL_SMARTCARD_MODULE_ENABLED */
-/*#define HAL_SMBUS_MODULE_ENABLED */
-/*#define HAL_WWDG_MODULE_ENABLED */
+/* #define HAL_USART_MODULE_ENABLED */
+/* #define HAL_IRDA_MODULE_ENABLED */
+/* #define HAL_SMARTCARD_MODULE_ENABLED */
+/* #define HAL_SMBUS_MODULE_ENABLED */
+/* #define HAL_WWDG_MODULE_ENABLED */
+//#define HAL_PCD_MODULE_ENABLED
 #define HAL_CORTEX_MODULE_ENABLED
-#define HAL_PCD_MODULE_ENABLED
+/* #define HAL_PCD_MODULE_ENABLED */
+
 
 /* ########################## Oscillator Values adaptation ####################*/
 /**
@@ -322,7 +346,7 @@
   */
   #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
 /* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
+  void assert_failed(uint8_t *file, uint32_t line);
 #else
   #define assert_param(expr) ((void)0U)
 #endif /* USE_FULL_ASSERT */
diff --git a/hw/bsp/stm32l0538disco/board.mk b/hw/bsp/stm32l0538disco/board.mk
deleted file mode 100644
index 72e887adf..000000000
--- a/hw/bsp/stm32l0538disco/board.mk
+++ /dev/null
@@ -1,54 +0,0 @@
-ST_FAMILY = l0
-DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_$(ST_FAMILY) hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
-
-ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
-ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
-
-CFLAGS += \
-  -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m0plus \
-  -mfloat-abi=soft \
-  -nostdlib -nostartfiles \
-  -DSTM32L053xx \
-  -DCFG_EXAMPLE_MSC_READONLY \
-  -DCFG_EXAMPLE_VIDEO_READONLY \
-  -DCFG_TUSB_MCU=OPT_MCU_STM32L0
-
-# mcu driver cause following warnings
-CFLAGS += -Wno-error=unused-parameter -Wno-error=maybe-uninitialized -Wno-error=redundant-decls
-
-# All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/STM32L053C8Tx_FLASH.ld
-
-SRC_C += \
-  src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
-  $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
-  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
-  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
-  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
-  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
-  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c
-
-SRC_S += \
-  $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l053xx.s
-
-INC += \
-  $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
-  $(TOP)/$(ST_CMSIS)/Include \
-  $(TOP)/$(ST_HAL_DRIVER)/Inc \
-  $(TOP)/hw/bsp/$(BOARD)
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
-
-# For flash-jlink target
-JLINK_DEVICE = STM32L053R8
-
-# Path to STM32 Cube Programmer CLI, should be added into system path
-STM32Prog = STM32_Programmer_CLI
-
-# flash target using on-board stlink
-flash: $(BUILD)/$(PROJECT).elf
-	$(STM32Prog) --connect port=swd --write $< --go
diff --git a/hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h b/hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h
deleted file mode 100644
index a917214c3..000000000
--- a/hw/bsp/stm32l0538disco/stm32l0xx_hal_conf.h
+++ /dev/null
@@ -1,331 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l0xx_hal_conf.h
-  * @author  MCD Application Team
-  * @brief   HAL configuration file.
-  ******************************************************************************
-  *
-  * Copyright (c) 2016 STMicroelectronics International N.V. All rights reserved.
-  *
-  * Redistribution and use in source and binary forms, with or without
-  * modification, are permitted, provided that the following conditions are met:
-  *
-  * 1. Redistribution of source code must retain the above copyright notice,
-  *    this list of conditions and the following disclaimer.
-  * 2. Redistributions in binary form must reproduce the above copyright notice,
-  *    this list of conditions and the following disclaimer in the documentation
-  *    and/or other materials provided with the distribution.
-  * 3. Neither the name of STMicroelectronics nor the names of other
-  *    contributors to this software may be used to endorse or promote products
-  *    derived from this software without specific written permission.
-  * 4. This software, including modifications and/or derivative works of this
-  *    software, must execute solely and exclusively on microcontroller or
-  *    microprocessor devices manufactured by or for STMicroelectronics.
-  * 5. Redistribution and use of this software other than as permitted under
-  *    this license is void and will automatically terminate your rights under
-  *    this license.
-  *
-  * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT
-  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
-  * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
-  * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT
-  * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
-  * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
-  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L0xx_HAL_CONF_H
-#define __STM32L0xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver
-  */
-#define HAL_MODULE_ENABLED
-// #define HAL_ADC_MODULE_ENABLED
-/* #define HAL_COMP_MODULE_ENABLED */
-/* #define HAL_CRC_MODULE_ENABLED */
-/* #define HAL_CRYP_MODULE_ENABLED */
-/* #define HAL_DAC_MODULE_ENABLED */
-#define HAL_DMA_MODULE_ENABLED
-/* #define HAL_FIREWALL_MODULE_ENABLED */
-#define HAL_FLASH_MODULE_ENABLED
-#define HAL_GPIO_MODULE_ENABLED
-/* #define HAL_I2C_MODULE_ENABLED */
-/* #define HAL_I2S_MODULE_ENABLED */
-/* #define HAL_IWDG_MODULE_ENABLED */
-/* #define HAL_LCD_MODULE_ENABLED */
-/* #define HAL_LPTIM_MODULE_ENABLED */
-#define HAL_PWR_MODULE_ENABLED
-#define HAL_RCC_MODULE_ENABLED
-//#define HAL_RNG_MODULE_ENABLED
-/* #define HAL_RTC_MODULE_ENABLED */
-//#define HAL_SPI_MODULE_ENABLED
-/* #define HAL_TIM_MODULE_ENABLED */
-/* #define HAL_TSC_MODULE_ENABLED */
-/* #define HAL_UART_MODULE_ENABLED */
-/* #define HAL_USART_MODULE_ENABLED */
-/* #define HAL_IRDA_MODULE_ENABLED */
-/* #define HAL_SMARTCARD_MODULE_ENABLED */
-/* #define HAL_SMBUS_MODULE_ENABLED */
-/* #define HAL_WWDG_MODULE_ENABLED */
-//#define HAL_PCD_MODULE_ENABLED
-#define HAL_CORTEX_MODULE_ENABLED
-/* #define HAL_PCD_MODULE_ENABLED */
-
-
-/* ########################## Oscillator Values adaptation ####################*/
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSE_VALUE)
-  #define HSE_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)100U)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal Multiple Speed oscillator (MSI) default value.
-  *        This value is the default MSI range value after Reset.
-  */
-#if !defined  (MSI_VALUE)
-  #define MSI_VALUE    ((uint32_t)2097152U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* MSI_VALUE */
-
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal High Speed oscillator for USB (HSI48) value.
-  */
-#if !defined  (HSI48_VALUE)
-#define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB in Hz.
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.  */
-#endif /* HSI48_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE)
- #define LSI_VALUE  ((uint32_t)37000U)       /*!< LSI Typical Value in Hz*/
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.*/
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  *        This value is used by the UART, RTC HAL module to compute the system frequency
-  */
-#if !defined  (LSE_VALUE)
-  #define LSE_VALUE    ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/
-#endif /* LSE_VALUE */
-
-/**
-  * @brief Time out for LSE start up value in ms.
-  */
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000U)   /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */
-
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */
-#define  VDD_VALUE                    ((uint32_t)3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            ((uint32_t)0U)    /*!< tick interrupt priority */
-#define  USE_RTOS                     0U
-#define  PREFETCH_ENABLE              1U
-#define  PREREAD_ENABLE               1U
-#define  BUFFER_CACHE_DISABLE         0U
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1 */
-
-/* ################## SPI peripheral configuration ########################## */
-
-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
- * Activated: CRC code is present inside driver
- * Deactivated: CRC code cleaned from driver
- */
-
-#define USE_SPI_CRC                   1U
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32l0xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32l0xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32l0xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32l0xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32l0xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_COMP_MODULE_ENABLED
-  #include "stm32l0xx_hal_comp.h"
-#endif /* HAL_COMP_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32l0xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32l0xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32l0xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_FIREWALL_MODULE_ENABLED
-  #include "stm32l0xx_hal_firewall.h"
-#endif /* HAL_FIREWALL_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32l0xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32l0xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32l0xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32l0xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LCD_MODULE_ENABLED
- #include "stm32l0xx_hal_lcd.h"
-#endif /* HAL_LCD_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
-#include "stm32l0xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32l0xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32l0xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
-  #include "stm32l0xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32l0xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32l0xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_TSC_MODULE_ENABLED
-  #include "stm32l0xx_hal_tsc.h"
-#endif /* HAL_TSC_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32l0xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32l0xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32l0xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32l0xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_SMBUS_MODULE_ENABLED
- #include "stm32l0xx_hal_smbus.h"
-#endif /* HAL_SMBUS_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32l0xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32l0xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed.
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t *file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L0xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

From 322f58ea8530e2b43d00a087b6d501776be25a00 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 19 Mar 2023 12:47:05 +0700
Subject: [PATCH 187/691] add CFLAGS_SKIP to improve sam compile time

---
 .github/workflows/build_arm.yml | 5 ++---
 examples/rules.mk               | 4 ++++
 hw/bsp/samd11/family.mk         | 7 ++++++-
 hw/bsp/samd21/family.mk         | 5 ++++-
 hw/bsp/samd51/family.mk         | 4 ++--
 hw/bsp/same5x/family.mk         | 4 ++--
 hw/bsp/same70_qmtech/board.mk   | 5 ++++-
 hw/bsp/same70_xplained/board.mk | 5 ++++-
 hw/bsp/samg55xplained/board.mk  | 5 ++++-
 hw/bsp/saml2x/family.mk         | 5 ++++-
 10 files changed, 36 insertions(+), 13 deletions(-)

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 3abfd50a8..8a3181440 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -48,9 +48,8 @@ jobs:
         - 'stm32f0 stm32f1'
         - 'stm32f4'
         - 'stm32f7'
-        - 'stm32g4 stm32wb'
-        - 'stm32h7'
-        - 'stm32l0 stm32l4'
+        - 'stm32g4 stm32h7'
+        - 'stm32l0 stm32l4 stm32u5 stm32wb'
         - 'tm4c123 xmc4000'
     steps:
     - name: Setup Python
diff --git a/examples/rules.mk b/examples/rules.mk
index 59cf4fd1f..b85837c16 100644
--- a/examples/rules.mk
+++ b/examples/rules.mk
@@ -66,6 +66,10 @@ ifeq ($(NO_LTO),1)
 CFLAGS := $(filter-out -flto,$(CFLAGS))
 endif
 
+ifneq ($(CFLAGS_SKIP),)
+CFLAGS := $(filter-out $(CFLAGS_SKIP),$(CFLAGS))
+endif
+
 LDFLAGS += $(CFLAGS) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections
 
 ifdef LD_FILE
diff --git a/hw/bsp/samd11/family.mk b/hw/bsp/samd11/family.mk
index dc6678b30..a2a5268aa 100644
--- a/hw/bsp/samd11/family.mk
+++ b/hw/bsp/samd11/family.mk
@@ -9,10 +9,15 @@ CFLAGS += \
   -nostdlib -nostartfiles \
   -DCONF_DFLL_OVERWRITE_CALIBRATION=0 \
   -DOSC32K_OVERWRITE_CALIBRATION=0 \
+  -DCFG_EXAMPLE_MSC_READONLY \
+  -DCFG_EXAMPLE_VIDEO_READONLY \
   -DCFG_TUSB_MCU=OPT_MCU_SAMD11
 
 # suppress warning caused by vendor mcu driver
-CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls
+CFLAGS += -Wno-error=redundant-decls
+
+# SAM driver is flooded with -Wcast-qual which slow down complication significantly
+CFLAGS_SKIP += -Wcast-qual
 
 SRC_C += \
 	src/portable/microchip/samd/dcd_samd.c \
diff --git a/hw/bsp/samd21/family.mk b/hw/bsp/samd21/family.mk
index 6d02d7fa6..30eccacb2 100644
--- a/hw/bsp/samd21/family.mk
+++ b/hw/bsp/samd21/family.mk
@@ -13,7 +13,10 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_SAMD21
 
 # suppress warning caused by vendor mcu driver
-CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls
+CFLAGS += -Wno-error=redundant-decls
+
+# SAM driver is flooded with -Wcast-qual which slow down complication significantly
+CFLAGS_SKIP += -Wcast-qual
 
 SRC_C += \
 	src/portable/microchip/samd/dcd_samd.c \
diff --git a/hw/bsp/samd51/family.mk b/hw/bsp/samd51/family.mk
index 3ecc5aa66..657e33438 100644
--- a/hw/bsp/samd51/family.mk
+++ b/hw/bsp/samd51/family.mk
@@ -13,8 +13,8 @@ CFLAGS += \
   -nostdlib -nostartfiles \
   -DCFG_TUSB_MCU=OPT_MCU_SAMD51
 
-# suppress warning caused by vendor mcu driver
-CFLAGS += -Wno-error=cast-qual
+# SAM driver is flooded with -Wcast-qual which slow down complication significantly
+CFLAGS_SKIP += -Wcast-qual
 
 SRC_C += \
 	src/portable/microchip/samd/dcd_samd.c \
diff --git a/hw/bsp/same5x/family.mk b/hw/bsp/same5x/family.mk
index 7f8692c97..df1af4a9d 100644
--- a/hw/bsp/same5x/family.mk
+++ b/hw/bsp/same5x/family.mk
@@ -13,8 +13,8 @@ CFLAGS += \
   -nostdlib -nostartfiles \
   -DCFG_TUSB_MCU=OPT_MCU_SAME5X
 
-# suppress warning caused by vendor mcu driver
-#CFLAGS += -Wno-error=cast-qual
+# SAM driver is flooded with -Wcast-qual which slow down complication significantly
+CFLAGS_SKIP += -Wcast-qual
 
 SRC_C += \
   src/portable/microchip/samd/dcd_samd.c \
diff --git a/hw/bsp/same70_qmtech/board.mk b/hw/bsp/same70_qmtech/board.mk
index 1dcb8bfcd..ad5af2020 100644
--- a/hw/bsp/same70_qmtech/board.mk
+++ b/hw/bsp/same70_qmtech/board.mk
@@ -11,7 +11,10 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_SAMX7X
 
 # suppress following warnings from mcu driver
-CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=cast-qual -Wno-error=redundant-decls
+CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=redundant-decls
+
+# SAM driver is flooded with -Wcast-qual which slow down complication significantly
+CFLAGS_SKIP += -Wcast-qual
 
 ASF_DIR = hw/mcu/microchip/same70
 
diff --git a/hw/bsp/same70_xplained/board.mk b/hw/bsp/same70_xplained/board.mk
index 95c4aaaa2..769d03e21 100644
--- a/hw/bsp/same70_xplained/board.mk
+++ b/hw/bsp/same70_xplained/board.mk
@@ -11,7 +11,10 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_SAMX7X
 
 # suppress following warnings from mcu driver
-CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=cast-qual -Wno-error=redundant-decls
+CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=redundant-decls
+
+# SAM driver is flooded with -Wcast-qual which slow down complication significantly
+CFLAGS_SKIP += -Wcast-qual
 
 ASF_DIR = hw/mcu/microchip/same70
 
diff --git a/hw/bsp/samg55xplained/board.mk b/hw/bsp/samg55xplained/board.mk
index 7cc9487fd..ed0d59772 100644
--- a/hw/bsp/samg55xplained/board.mk
+++ b/hw/bsp/samg55xplained/board.mk
@@ -12,7 +12,10 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_SAMG
 
 # suppress following warnings from mcu driver
-CFLAGS += -Wno-error=undef -Wno-error=cast-qual -Wno-error=null-dereference -Wno-error=redundant-decls
+CFLAGS += -Wno-error=undef -Wno-error=null-dereference -Wno-error=redundant-decls
+
+# SAM driver is flooded with -Wcast-qual which slow down complication significantly
+CFLAGS_SKIP += -Wcast-qual
 
 ASF_DIR = hw/mcu/microchip/samg55
 
diff --git a/hw/bsp/saml2x/family.mk b/hw/bsp/saml2x/family.mk
index 6022158de..91c2cfa61 100644
--- a/hw/bsp/saml2x/family.mk
+++ b/hw/bsp/saml2x/family.mk
@@ -14,7 +14,10 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_SAML22
 
 # suppress warning caused by vendor mcu driver
-CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls
+CFLAGS += -Wno-error=redundant-decls
+
+# SAM driver is flooded with -Wcast-qual which slow down complication significantly
+CFLAGS_SKIP += -Wcast-qual
 
 SRC_C += \
 	src/portable/microchip/samd/dcd_samd.c \

From b46632ba07d5e3827029413f69618f41f987f452 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 19 Mar 2023 13:11:41 +0700
Subject: [PATCH 188/691] bsp for f2 f3

---
 .github/workflows/build_arm.yml               |  7 ++-
 .../stm32f207nucleo/STM32F207ZGTx_FLASH.ld    |  0
 .../stm32f2/boards/stm32f207nucleo/board.mk   | 14 ++++++
 .../boards}/stm32f207nucleo/stm32f207nucleo.c |  2 +-
 .../board.mk => stm32f2/family.mk}            | 23 +++------
 .../stm32f2xx_hal_conf.h                      |  0
 .../stm32f303disco/STM32F303VCTx_FLASH.ld     |  0
 hw/bsp/stm32f3/boards/stm32f303disco/board.mk | 14 ++++++
 .../boards}/stm32f303disco/stm32f303disco.c   |  0
 .../stm32f303disco/stm32f3xx_hal_conf.h       |  0
 hw/bsp/stm32f303disco/board.mk                | 49 -------------------
 11 files changed, 40 insertions(+), 69 deletions(-)
 rename hw/bsp/{ => stm32f2/boards}/stm32f207nucleo/STM32F207ZGTx_FLASH.ld (100%)
 create mode 100644 hw/bsp/stm32f2/boards/stm32f207nucleo/board.mk
 rename hw/bsp/{ => stm32f2/boards}/stm32f207nucleo/stm32f207nucleo.c (99%)
 rename hw/bsp/{stm32f207nucleo/board.mk => stm32f2/family.mk} (68%)
 rename hw/bsp/{stm32f207nucleo => stm32f2}/stm32f2xx_hal_conf.h (100%)
 rename hw/bsp/{ => stm32f3/boards}/stm32f303disco/STM32F303VCTx_FLASH.ld (100%)
 create mode 100644 hw/bsp/stm32f3/boards/stm32f303disco/board.mk
 rename hw/bsp/{ => stm32f3/boards}/stm32f303disco/stm32f303disco.c (100%)
 rename hw/bsp/{ => stm32f3/boards}/stm32f303disco/stm32f3xx_hal_conf.h (100%)
 delete mode 100644 hw/bsp/stm32f303disco/board.mk

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 8a3181440..2f72e758a 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -41,11 +41,10 @@ jobs:
         - 'nrf'
         - 'ra'
         - 'rp2040'
-        - 'samd11 same5x'
-        - 'samd21'
-        - 'samd51'
+        - 'samd11 samd21'
+        - 'samd51 same5x'
         - 'saml2x'
-        - 'stm32f0 stm32f1'
+        - 'stm32f0 stm32f1 stm32f2 stm32f3'
         - 'stm32f4'
         - 'stm32f7'
         - 'stm32g4 stm32h7'
diff --git a/hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld b/hw/bsp/stm32f2/boards/stm32f207nucleo/STM32F207ZGTx_FLASH.ld
similarity index 100%
rename from hw/bsp/stm32f207nucleo/STM32F207ZGTx_FLASH.ld
rename to hw/bsp/stm32f2/boards/stm32f207nucleo/STM32F207ZGTx_FLASH.ld
diff --git a/hw/bsp/stm32f2/boards/stm32f207nucleo/board.mk b/hw/bsp/stm32f2/boards/stm32f207nucleo/board.mk
new file mode 100644
index 000000000..ba185d199
--- /dev/null
+++ b/hw/bsp/stm32f2/boards/stm32f207nucleo/board.mk
@@ -0,0 +1,14 @@
+CFLAGS += \
+  -DSTM32F207xx \
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/STM32F207ZGTx_FLASH.ld
+
+SRC_S += \
+  $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f207xx.s
+
+# For flash-jlink target
+JLINK_DEVICE = stm32f207zg
+
+# flash target using on-board stlink
+flash: flash-stlink
diff --git a/hw/bsp/stm32f207nucleo/stm32f207nucleo.c b/hw/bsp/stm32f2/boards/stm32f207nucleo/stm32f207nucleo.c
similarity index 99%
rename from hw/bsp/stm32f207nucleo/stm32f207nucleo.c
rename to hw/bsp/stm32f2/boards/stm32f207nucleo/stm32f207nucleo.c
index 80f762c93..48203b787 100644
--- a/hw/bsp/stm32f207nucleo/stm32f207nucleo.c
+++ b/hw/bsp/stm32f2/boards/stm32f207nucleo/stm32f207nucleo.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "../board.h"
+#include "bsp/board.h"
 
 #include "stm32f2xx_hal.h"
 
diff --git a/hw/bsp/stm32f207nucleo/board.mk b/hw/bsp/stm32f2/family.mk
similarity index 68%
rename from hw/bsp/stm32f207nucleo/board.mk
rename to hw/bsp/stm32f2/family.mk
index 55581e1ec..7ca378548 100644
--- a/hw/bsp/stm32f207nucleo/board.mk
+++ b/hw/bsp/stm32f2/family.mk
@@ -1,9 +1,15 @@
 ST_FAMILY = f2
-DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_$(ST_FAMILY) hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
 
 ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
 ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
 
+DEPS_SUBMODULES += \
+	lib/CMSIS_5 \
+	$(ST_CMSIS) \
+	$(ST_HAL_DRIVER)
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+
 CFLAGS += \
   -flto \
   -mthumb \
@@ -11,15 +17,11 @@ CFLAGS += \
   -mcpu=cortex-m3 \
   -mfloat-abi=soft \
   -nostdlib -nostartfiles \
-  -DSTM32F207xx \
   -DCFG_TUSB_MCU=OPT_MCU_STM32F2
 
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=sign-compare
 
-# All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/STM32F207ZGTx_FLASH.ld
-
 SRC_C += \
   src/portable/synopsys/dwc2/dcd_dwc2.c \
   $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
@@ -29,20 +31,11 @@ SRC_C += \
   $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
   $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c
 
-SRC_S += \
-  $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f207xx.s
-
 INC += \
   $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
   $(TOP)/$(ST_CMSIS)/Include \
   $(TOP)/$(ST_HAL_DRIVER)/Inc \
-  $(TOP)/hw/bsp/$(BOARD)
+  $(TOP)/$(BOARD_PATH)
 
 # For freeRTOS port source
 FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
-
-# For flash-jlink target
-JLINK_DEVICE = stm32f207zg
-
-# flash target using on-board stlink
-flash: flash-stlink
diff --git a/hw/bsp/stm32f207nucleo/stm32f2xx_hal_conf.h b/hw/bsp/stm32f2/stm32f2xx_hal_conf.h
similarity index 100%
rename from hw/bsp/stm32f207nucleo/stm32f2xx_hal_conf.h
rename to hw/bsp/stm32f2/stm32f2xx_hal_conf.h
diff --git a/hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld b/hw/bsp/stm32f3/boards/stm32f303disco/STM32F303VCTx_FLASH.ld
similarity index 100%
rename from hw/bsp/stm32f303disco/STM32F303VCTx_FLASH.ld
rename to hw/bsp/stm32f3/boards/stm32f303disco/STM32F303VCTx_FLASH.ld
diff --git a/hw/bsp/stm32f3/boards/stm32f303disco/board.mk b/hw/bsp/stm32f3/boards/stm32f303disco/board.mk
new file mode 100644
index 000000000..e387f2d54
--- /dev/null
+++ b/hw/bsp/stm32f3/boards/stm32f303disco/board.mk
@@ -0,0 +1,14 @@
+CFLAGS += \
+  -DSTM32F303xC \
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/STM32F303VCTx_FLASH.ld
+
+SRC_S += \
+  $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f303xc.s
+
+# For flash-jlink target
+JLINK_DEVICE = stm32f303vc
+
+# flash target using on-board stlink
+flash: flash-stlink
diff --git a/hw/bsp/stm32f303disco/stm32f303disco.c b/hw/bsp/stm32f3/boards/stm32f303disco/stm32f303disco.c
similarity index 100%
rename from hw/bsp/stm32f303disco/stm32f303disco.c
rename to hw/bsp/stm32f3/boards/stm32f303disco/stm32f303disco.c
diff --git a/hw/bsp/stm32f303disco/stm32f3xx_hal_conf.h b/hw/bsp/stm32f3/boards/stm32f303disco/stm32f3xx_hal_conf.h
similarity index 100%
rename from hw/bsp/stm32f303disco/stm32f3xx_hal_conf.h
rename to hw/bsp/stm32f3/boards/stm32f303disco/stm32f3xx_hal_conf.h
diff --git a/hw/bsp/stm32f303disco/board.mk b/hw/bsp/stm32f303disco/board.mk
deleted file mode 100644
index b81de4ee4..000000000
--- a/hw/bsp/stm32f303disco/board.mk
+++ /dev/null
@@ -1,49 +0,0 @@
-ST_FAMILY = f3
-DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_$(ST_FAMILY) hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
-
-ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
-ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
-
-CFLAGS += \
-  -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m4 \
-  -mfloat-abi=hard \
-  -mfpu=fpv4-sp-d16 \
-  -nostdlib -nostartfiles \
-  -DSTM32F303xC \
-  -DCFG_TUSB_MCU=OPT_MCU_STM32F3
-
-# mcu driver cause following warnings
-CFLAGS += -Wno-error=unused-parameter
-
-# All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/STM32F303VCTx_FLASH.ld
-
-SRC_C += \
-  src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
-  $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
-  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
-  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
-  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
-  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
-  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c
-
-SRC_S += \
-  $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f303xc.s
-
-INC += \
-  $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
-  $(TOP)/$(ST_CMSIS)/Include \
-  $(TOP)/$(ST_HAL_DRIVER)/Inc \
-  $(TOP)/hw/bsp/$(BOARD)
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
-
-# For flash-jlink target
-JLINK_DEVICE = stm32f303vc
-
-# flash target using on-board stlink
-flash: flash-stlink

From aa11e213584526e69e4e7e16553b24fc08481bc5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 19 Mar 2023 13:15:05 +0700
Subject: [PATCH 189/691] add mising file

---
 hw/bsp/stm32f3/family.mk | 42 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)
 create mode 100644 hw/bsp/stm32f3/family.mk

diff --git a/hw/bsp/stm32f3/family.mk b/hw/bsp/stm32f3/family.mk
new file mode 100644
index 000000000..f3b21d530
--- /dev/null
+++ b/hw/bsp/stm32f3/family.mk
@@ -0,0 +1,42 @@
+ST_FAMILY = f3
+
+ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
+ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
+
+DEPS_SUBMODULES += \
+	lib/CMSIS_5 \
+	$(ST_CMSIS) \
+	$(ST_HAL_DRIVER)
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+CFLAGS += \
+  -flto \
+  -mthumb \
+  -mabi=aapcs \
+  -mcpu=cortex-m4 \
+  -mfloat-abi=hard \
+  -mfpu=fpv4-sp-d16 \
+  -nostdlib -nostartfiles \
+  -DCFG_TUSB_MCU=OPT_MCU_STM32F3
+
+# mcu driver cause following warnings
+CFLAGS += -Wno-error=unused-parameter
+
+SRC_C += \
+  src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+  $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
+  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
+  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
+  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
+  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
+  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c
+
+INC += \
+  $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
+  $(TOP)/$(ST_CMSIS)/Include \
+  $(TOP)/$(ST_HAL_DRIVER)/Inc \
+  $(TOP)/$(BOARD_PATH)
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F

From 1867ba0bc10c89977a8370a8a55e5d68f6231e13 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 19 Mar 2023 16:43:59 +0700
Subject: [PATCH 190/691] fix l4 hw testing ci

---
 .github/workflows/build_arm.yml | 19 ++++++++++++++-----
 1 file changed, 14 insertions(+), 5 deletions(-)

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 2f72e758a..ee3d9f533 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -94,21 +94,30 @@ jobs:
     # Upload binaries for rp2040/stm32l412nucleo hardware test with self-hosted
 
     - name: Prepare rp2040 Artifacts
-      if: matrix.family == 'rp2040' && github.repository_owner == 'hathach'
+      if: contains(matrix.family, 'rp2040') && github.repository_owner == 'hathach'
       run: find examples/ -name "*.elf" -exec mv {} . \;
 
     - name: Prepare stm32l412nucleo Artifacts
-      if: matrix.family == 'stm32l4'
+      if: contains(matrix.family, 'stm32l4')
       run: find examples/ -path "*stm32l412nucleo/*.elf" -exec mv {} . \;
 
-    - name: Upload Artifacts for hardware testing
-      if: matrix.family == 'stm32l4' || (matrix.family == 'rp2040' && github.repository_owner == 'hathach')
+    - name: Upload Artifacts for rp2040
+      if: contains(matrix.family,'rp2040') && github.repository_owner == 'hathach')
       uses: actions/upload-artifact@v3
       with:
-        name: ${{ matrix.family }}
+        name: rp2040
         path: |
           *.elf
 
+    - name: Upload Artifacts for stm32l412nucleo
+      if: contains(matrix.family, 'stm32l4') && github.repository_owner == 'hathach')
+      uses: actions/upload-artifact@v3
+      with:
+        name: stm32l4
+        path: |
+          *.elf
+
+
   # ---------------------------------------
   # Build all no-family (orphaned) boards
   # disable this workflow since it is often failed randomly

From 80be1aa13dcdd0b86c01212b6266a099669c98b2 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 19 Mar 2023 17:19:33 +0700
Subject: [PATCH 191/691] bsp lpc11

---
 .github/workflows/build_arm.yml               |  2 +-
 hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk  | 24 ++++++++++
 .../boards}/lpcxpresso11u37/lpc11u37.ld       |  0
 .../boards}/lpcxpresso11u37/lpcxpresso11u37.c |  2 +-
 hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk  | 18 ++++++++
 .../boards}/lpcxpresso11u68/lpc11u68.ld       |  0
 .../boards}/lpcxpresso11u68/lpcxpresso11u68.c |  2 +-
 hw/bsp/lpc11/family.mk                        | 43 +++++++++++++++++
 hw/bsp/lpcxpresso11u37/board.mk               | 46 -------------------
 hw/bsp/lpcxpresso11u68/board.mk               | 42 -----------------
 10 files changed, 88 insertions(+), 91 deletions(-)
 create mode 100644 hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk
 rename hw/bsp/{ => lpc11/boards}/lpcxpresso11u37/lpc11u37.ld (100%)
 rename hw/bsp/{ => lpc11/boards}/lpcxpresso11u37/lpcxpresso11u37.c (99%)
 create mode 100644 hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk
 rename hw/bsp/{ => lpc11/boards}/lpcxpresso11u68/lpc11u68.ld (100%)
 rename hw/bsp/{ => lpc11/boards}/lpcxpresso11u68/lpcxpresso11u68.c (99%)
 create mode 100644 hw/bsp/lpc11/family.mk
 delete mode 100644 hw/bsp/lpcxpresso11u37/board.mk
 delete mode 100644 hw/bsp/lpcxpresso11u68/board.mk

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index ee3d9f533..1a0e556e9 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -35,7 +35,7 @@ jobs:
         - 'broadcom_32bit'
         - 'imxrt'
         - 'kinetis_k32 kinetis_kl'
-        - 'lpc15 lpc18'
+        - 'lpc11 lpc15 lpc18'
         - 'lpc54 lpc55'
         - 'mm32 msp432e4'
         - 'nrf'
diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk b/hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk
new file mode 100644
index 000000000..fdc17374b
--- /dev/null
+++ b/hw/bsp/lpc11/boards/lpcxpresso11u37/board.mk
@@ -0,0 +1,24 @@
+MCU = 11uxx
+MCU_DRV = 11xx
+
+CFLAGS += \
+  -DCORE_M0 \
+  -DCFG_EXAMPLE_MSC_READONLY \
+  -DCFG_EXAMPLE_VIDEO_READONLY \
+  -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))'
+
+# mcu driver cause following warnings
+CFLAGS += \
+	-Wno-error=strict-prototypes \
+	-Wno-error=unused-parameter \
+	-Wno-error=redundant-decls
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/lpc11u37.ld
+
+# For flash-jlink target
+JLINK_DEVICE = LPC11U37/401
+PYOCD_TARGET = lpc11u37
+
+# flash using pyocd
+flash: flash-pyocd
diff --git a/hw/bsp/lpcxpresso11u37/lpc11u37.ld b/hw/bsp/lpc11/boards/lpcxpresso11u37/lpc11u37.ld
similarity index 100%
rename from hw/bsp/lpcxpresso11u37/lpc11u37.ld
rename to hw/bsp/lpc11/boards/lpcxpresso11u37/lpc11u37.ld
diff --git a/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c b/hw/bsp/lpc11/boards/lpcxpresso11u37/lpcxpresso11u37.c
similarity index 99%
rename from hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c
rename to hw/bsp/lpc11/boards/lpcxpresso11u37/lpcxpresso11u37.c
index 79cd685c3..02dc2cbf9 100644
--- a/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c
+++ b/hw/bsp/lpc11/boards/lpcxpresso11u37/lpcxpresso11u37.c
@@ -25,7 +25,7 @@
  */
 
 #include "chip.h"
-#include "../board.h"
+#include "bsp/board.h"
 
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk b/hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk
new file mode 100644
index 000000000..fbe97b853
--- /dev/null
+++ b/hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk
@@ -0,0 +1,18 @@
+MCU = 11u6x
+MCU_DRV = 11u6x
+
+CFLAGS += \
+  -DCORE_M0PLUS \
+  -D__VTOR_PRESENT=0 \
+  -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \
+  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/lpc11u68.ld
+
+# For flash-jlink target
+JLINK_DEVICE = LPC11U68
+PYOCD_TARGET = lpc11u68
+
+# flash using pyocd
+flash: flash-pyocd
diff --git a/hw/bsp/lpcxpresso11u68/lpc11u68.ld b/hw/bsp/lpc11/boards/lpcxpresso11u68/lpc11u68.ld
similarity index 100%
rename from hw/bsp/lpcxpresso11u68/lpc11u68.ld
rename to hw/bsp/lpc11/boards/lpcxpresso11u68/lpc11u68.ld
diff --git a/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c b/hw/bsp/lpc11/boards/lpcxpresso11u68/lpcxpresso11u68.c
similarity index 99%
rename from hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c
rename to hw/bsp/lpc11/boards/lpcxpresso11u68/lpcxpresso11u68.c
index a04e43867..44d091511 100644
--- a/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c
+++ b/hw/bsp/lpc11/boards/lpcxpresso11u68/lpcxpresso11u68.c
@@ -25,7 +25,7 @@
  */
 
 #include "chip.h"
-#include "../board.h"
+#include "bsp/board.h"
 
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
diff --git a/hw/bsp/lpc11/family.mk b/hw/bsp/lpc11/family.mk
new file mode 100644
index 000000000..eb427c09d
--- /dev/null
+++ b/hw/bsp/lpc11/family.mk
@@ -0,0 +1,43 @@
+DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
+
+MCU_DIR = hw/mcu/nxp/lpcopen/lpc$(MCU)/lpc_chip_$(MCU)
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+CFLAGS += \
+  -flto \
+  -mthumb \
+  -mabi=aapcs \
+  -mcpu=cortex-m0plus \
+  -nostdlib \
+  -D__USE_LPCOPEN \
+  -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
+  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
+
+SRC_C += \
+	src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
+	$(MCU_DIR)/../gcc/cr_startup_lpc$(MCU_DRV).c \
+	$(MCU_DIR)/src/chip_$(MCU_DRV).c \
+	$(MCU_DIR)/src/clock_$(MCU_DRV).c \
+	$(MCU_DIR)/src/iocon_$(MCU_DRV).c \
+	$(MCU_DIR)/src/sysinit_$(MCU_DRV).c
+
+ifeq ($(MCU),11u6x)
+SRC_C += \
+	$(MCU_DIR)/src/gpio_$(MCU_DRV).c \
+	$(MCU_DIR)/src/syscon_$(MCU_DRV).c \
+
+else
+
+SRC_C += \
+	$(MCU_DIR)/src/gpio_$(MCU_DRV)_1.c \
+	$(MCU_DIR)/src/sysctl_$(MCU_DRV).c
+endif
+
+INC += \
+	$(TOP)/$(MCU_DIR)/inc
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
+
+# For flash-jlink target
+JLINK_DEVICE = LPC11U68
diff --git a/hw/bsp/lpcxpresso11u37/board.mk b/hw/bsp/lpcxpresso11u37/board.mk
deleted file mode 100644
index 61e5eda7e..000000000
--- a/hw/bsp/lpcxpresso11u37/board.mk
+++ /dev/null
@@ -1,46 +0,0 @@
-DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
-
-CFLAGS += \
-  -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m0 \
-  -nostdlib \
-  -DCORE_M0 \
-  -D__USE_LPCOPEN \
-  -DCFG_EXAMPLE_MSC_READONLY \
-  -DCFG_EXAMPLE_VIDEO_READONLY \
-  -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
-  -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
-  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
-
-# mcu driver cause following warnings
-CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=redundant-decls
-
-MCU_DIR = hw/mcu/nxp/lpcopen/lpc11uxx/lpc_chip_11uxx
-
-# All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/lpc11u37.ld
-
-SRC_C += \
-	src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
-	$(MCU_DIR)/../gcc/cr_startup_lpc11xx.c \
-	$(MCU_DIR)/src/chip_11xx.c \
-	$(MCU_DIR)/src/clock_11xx.c \
-	$(MCU_DIR)/src/gpio_11xx_1.c \
-	$(MCU_DIR)/src/iocon_11xx.c \
-	$(MCU_DIR)/src/sysctl_11xx.c \
-	$(MCU_DIR)/src/sysinit_11xx.c
-
-INC += \
-	$(TOP)/$(MCU_DIR)/inc
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
-
-# For flash-jlink target
-JLINK_DEVICE = LPC11U37/401
-
-# flash using pyocd
-flash: $(BUILD)/$(PROJECT).hex
-	pyocd flash -t lpc11u37 $<
diff --git a/hw/bsp/lpcxpresso11u68/board.mk b/hw/bsp/lpcxpresso11u68/board.mk
deleted file mode 100644
index cd6ad3617..000000000
--- a/hw/bsp/lpcxpresso11u68/board.mk
+++ /dev/null
@@ -1,42 +0,0 @@
-DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
-
-CFLAGS += \
-  -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m0plus \
-  -nostdlib \
-  -DCORE_M0PLUS \
-  -D__VTOR_PRESENT=0 \
-  -D__USE_LPCOPEN \
-  -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
-  -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \
-  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
-
-MCU_DIR = hw/mcu/nxp/lpcopen/lpc11u6x/lpc_chip_11u6x
-
-# All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/lpc11u68.ld
-
-SRC_C += \
-	src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
-	$(MCU_DIR)/../gcc/cr_startup_lpc11u6x.c \
-	$(MCU_DIR)/src/chip_11u6x.c \
-	$(MCU_DIR)/src/clock_11u6x.c \
-	$(MCU_DIR)/src/gpio_11u6x.c \
-	$(MCU_DIR)/src/iocon_11u6x.c \
-	$(MCU_DIR)/src/syscon_11u6x.c \
-	$(MCU_DIR)/src/sysinit_11u6x.c
-
-INC += \
-	$(TOP)/$(MCU_DIR)/inc
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
-
-# For flash-jlink target
-JLINK_DEVICE = LPC11U68
-
-# flash using pyocd
-flash: $(BUILD)/$(PROJECT).hex
-	pyocd flash -t lpc11u68 $<

From 64c6b715cecb80788b23a5f8f07e256e1c96ed38 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 19 Mar 2023 17:26:49 +0700
Subject: [PATCH 192/691] bsp lpc13

---
 .github/workflows/build_arm.yml               |  6 +--
 hw/bsp/lpc13/boards/lpcxpresso1347/board.mk   | 13 ++++++
 .../boards}/lpcxpresso1347/lpc1347.ld         |  0
 .../boards}/lpcxpresso1347/lpcxpresso1347.c   |  0
 hw/bsp/lpcxpresso1347/board.mk                | 45 -------------------
 5 files changed, 16 insertions(+), 48 deletions(-)
 create mode 100644 hw/bsp/lpc13/boards/lpcxpresso1347/board.mk
 rename hw/bsp/{ => lpc13/boards}/lpcxpresso1347/lpc1347.ld (100%)
 rename hw/bsp/{ => lpc13/boards}/lpcxpresso1347/lpcxpresso1347.c (100%)
 delete mode 100644 hw/bsp/lpcxpresso1347/board.mk

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 1a0e556e9..01b390ac8 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -35,7 +35,7 @@ jobs:
         - 'broadcom_32bit'
         - 'imxrt'
         - 'kinetis_k32 kinetis_kl'
-        - 'lpc11 lpc15 lpc18'
+        - 'lpc11 lpc13 lpc15 lpc18'
         - 'lpc54 lpc55'
         - 'mm32 msp432e4'
         - 'nrf'
@@ -102,7 +102,7 @@ jobs:
       run: find examples/ -path "*stm32l412nucleo/*.elf" -exec mv {} . \;
 
     - name: Upload Artifacts for rp2040
-      if: contains(matrix.family,'rp2040') && github.repository_owner == 'hathach')
+      if: contains(matrix.family,'rp2040') && github.repository_owner == 'hathach'
       uses: actions/upload-artifact@v3
       with:
         name: rp2040
@@ -110,7 +110,7 @@ jobs:
           *.elf
 
     - name: Upload Artifacts for stm32l412nucleo
-      if: contains(matrix.family, 'stm32l4') && github.repository_owner == 'hathach')
+      if: contains(matrix.family, 'stm32l4') && github.repository_owner == 'hathach'
       uses: actions/upload-artifact@v3
       with:
         name: stm32l4
diff --git a/hw/bsp/lpc13/boards/lpcxpresso1347/board.mk b/hw/bsp/lpc13/boards/lpcxpresso1347/board.mk
new file mode 100644
index 000000000..31eb2f28f
--- /dev/null
+++ b/hw/bsp/lpc13/boards/lpcxpresso1347/board.mk
@@ -0,0 +1,13 @@
+DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
+
+CFLAGS += \
+  -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))'
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/lpc1347.ld
+
+# For flash-jlink target
+JLINK_DEVICE = LPC1347
+
+# flash using jlink
+flash: flash-jlink
diff --git a/hw/bsp/lpcxpresso1347/lpc1347.ld b/hw/bsp/lpc13/boards/lpcxpresso1347/lpc1347.ld
similarity index 100%
rename from hw/bsp/lpcxpresso1347/lpc1347.ld
rename to hw/bsp/lpc13/boards/lpcxpresso1347/lpc1347.ld
diff --git a/hw/bsp/lpcxpresso1347/lpcxpresso1347.c b/hw/bsp/lpc13/boards/lpcxpresso1347/lpcxpresso1347.c
similarity index 100%
rename from hw/bsp/lpcxpresso1347/lpcxpresso1347.c
rename to hw/bsp/lpc13/boards/lpcxpresso1347/lpcxpresso1347.c
diff --git a/hw/bsp/lpcxpresso1347/board.mk b/hw/bsp/lpcxpresso1347/board.mk
deleted file mode 100644
index 25d6fa7a3..000000000
--- a/hw/bsp/lpcxpresso1347/board.mk
+++ /dev/null
@@ -1,45 +0,0 @@
-DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
-
-CFLAGS += \
-  -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m3 \
-  -nostdlib \
-  -DCORE_M3 \
-  -D__USE_LPCOPEN \
-  -DCFG_EXAMPLE_MSC_READONLY \
-  -DCFG_EXAMPLE_VIDEO_READONLY \
-  -DCFG_TUSB_MCU=OPT_MCU_LPC13XX \
-  -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
-  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
-
-# startup.c and lpc_types.h cause following errors
-CFLAGS += -Wno-error=strict-prototypes -Wno-error=redundant-decls
-
-MCU_DIR = hw/mcu/nxp/lpcopen/lpc13xx/lpc_chip_13xx
-
-# All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/lpc1347.ld
-
-SRC_C += \
-	src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
-	$(MCU_DIR)/../gcc/cr_startup_lpc13xx.c \
-	$(MCU_DIR)/src/chip_13xx.c \
-	$(MCU_DIR)/src/clock_13xx.c \
-	$(MCU_DIR)/src/gpio_13xx_1.c \
-	$(MCU_DIR)/src/iocon_13xx.c \
-	$(MCU_DIR)/src/sysctl_13xx.c \
-	$(MCU_DIR)/src/sysinit_13xx.c
-
-INC += \
-	$(TOP)/$(MCU_DIR)/inc
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
-
-# For flash-jlink target
-JLINK_DEVICE = LPC1347
-
-# flash using jlink
-flash: flash-jlink

From 1154b7a9e733fd6571c2a47e52d6d49da0b3b096 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 19 Mar 2023 17:40:44 +0700
Subject: [PATCH 193/691] add mising lpc13 file

---
 hw/bsp/lpc13/family.mk | 39 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)
 create mode 100644 hw/bsp/lpc13/family.mk

diff --git a/hw/bsp/lpc13/family.mk b/hw/bsp/lpc13/family.mk
new file mode 100644
index 000000000..28f98e4ca
--- /dev/null
+++ b/hw/bsp/lpc13/family.mk
@@ -0,0 +1,39 @@
+DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
+
+MCU_DIR = hw/mcu/nxp/lpcopen/lpc13xx/lpc_chip_13xx
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+CFLAGS += \
+  -flto \
+  -mthumb \
+  -mabi=aapcs \
+  -mcpu=cortex-m3 \
+  -nostdlib \
+  -DCORE_M3 \
+  -D__USE_LPCOPEN \
+  -DCFG_EXAMPLE_MSC_READONLY \
+  -DCFG_EXAMPLE_VIDEO_READONLY \
+  -DCFG_TUSB_MCU=OPT_MCU_LPC13XX \
+  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
+
+# startup.c and lpc_types.h cause following errors
+CFLAGS += -Wno-error=strict-prototypes -Wno-error=redundant-decls
+
+# caused by freeRTOS port !!
+CFLAGS += -Wno-error=maybe-uninitialized
+
+SRC_C += \
+	src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
+	$(MCU_DIR)/../gcc/cr_startup_lpc13xx.c \
+	$(MCU_DIR)/src/chip_13xx.c \
+	$(MCU_DIR)/src/clock_13xx.c \
+	$(MCU_DIR)/src/gpio_13xx_1.c \
+	$(MCU_DIR)/src/iocon_13xx.c \
+	$(MCU_DIR)/src/sysctl_13xx.c \
+	$(MCU_DIR)/src/sysinit_13xx.c
+
+INC += \
+	$(TOP)/$(MCU_DIR)/inc
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3

From 934baae9b8dd58dd17881ef8ad8bd3428b208b1f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 19 Mar 2023 17:58:20 +0700
Subject: [PATCH 194/691] bsp lpc51

---
 .github/workflows/build_arm.yml               |  2 +-
 hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk  | 37 +++++++++++++++++++
 .../boards}/lpcxpresso51u68/lpcxpresso51u68.c |  0
 .../board.mk => lpc51/family.mk}              | 19 +++-------
 4 files changed, 44 insertions(+), 14 deletions(-)
 create mode 100644 hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk
 rename hw/bsp/{ => lpc51/boards}/lpcxpresso51u68/lpcxpresso51u68.c (100%)
 rename hw/bsp/{lpcxpresso51u68/board.mk => lpc51/family.mk} (74%)

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 01b390ac8..2b64e5410 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -36,7 +36,7 @@ jobs:
         - 'imxrt'
         - 'kinetis_k32 kinetis_kl'
         - 'lpc11 lpc13 lpc15 lpc18'
-        - 'lpc54 lpc55'
+        - 'lpc51 lpc54 lpc55'
         - 'mm32 msp432e4'
         - 'nrf'
         - 'ra'
diff --git a/hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk b/hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk
new file mode 100644
index 000000000..27b9b371f
--- /dev/null
+++ b/hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk
@@ -0,0 +1,37 @@
+MCU = LPC51U68
+
+CFLAGS += \
+  -DCPU_LPC51U68JBD64 \
+  -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))'
+
+SRC_C += \
+	src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
+	$(MCU_DIR)/system_LPC51U68.c \
+	$(MCU_DIR)/drivers/fsl_clock.c \
+	$(MCU_DIR)/drivers/fsl_power.c \
+	$(MCU_DIR)/drivers/fsl_reset.c \
+	$(SDK_DIR)/drivers/lpc_gpio/fsl_gpio.c \
+	$(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \
+	$(SDK_DIR)/drivers/flexcomm/fsl_usart.c
+
+INC += \
+	$(TOP)/$(MCU_DIR)/../../CMSIS/Include \
+	$(TOP)/$(MCU_DIR) \
+	$(TOP)/$(MCU_DIR)/drivers \
+	$(TOP)/$(SDK_DIR)/drivers/common \
+	$(TOP)/$(SDK_DIR)/drivers/flexcomm \
+	$(TOP)/$(SDK_DIR)/drivers/lpc_iocon \
+	$(TOP)/$(SDK_DIR)/drivers/lpc_gpio
+
+SRC_S += $(MCU_DIR)/gcc/startup_LPC51U68.S
+
+LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower.a
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
+
+JLINK_DEVICE = LPC51U68
+PYOCD_TARGET = LPC51U68
+
+# flash using pyocd (51u68 is not supported yet)
+flash: flash-pyocd
diff --git a/hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c b/hw/bsp/lpc51/boards/lpcxpresso51u68/lpcxpresso51u68.c
similarity index 100%
rename from hw/bsp/lpcxpresso51u68/lpcxpresso51u68.c
rename to hw/bsp/lpc51/boards/lpcxpresso51u68/lpcxpresso51u68.c
diff --git a/hw/bsp/lpcxpresso51u68/board.mk b/hw/bsp/lpc51/family.mk
similarity index 74%
rename from hw/bsp/lpcxpresso51u68/board.mk
rename to hw/bsp/lpc51/family.mk
index b1a126c51..8a64f0945 100644
--- a/hw/bsp/lpcxpresso51u68/board.mk
+++ b/hw/bsp/lpc51/family.mk
@@ -1,27 +1,26 @@
 SDK_DIR = hw/mcu/nxp/mcux-sdk
 DEPS_SUBMODULES += $(SDK_DIR)
 
+MCU_DIR = $(SDK_DIR)/devices/$(MCU)
+include $(TOP)/$(BOARD_PATH)/board.mk
+
 CFLAGS += \
   -flto \
   -mthumb \
   -mabi=aapcs \
   -mcpu=cortex-m0plus \
-  -DCPU_LPC51U68JBD64 \
   -DCFG_TUSB_MCU=OPT_MCU_LPC51UXX \
-  -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))' \
   -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
 
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter
 
-MCU_DIR = $(SDK_DIR)/devices/LPC51U68
-
 # All source paths should be relative to the top level.
-LD_FILE = $(MCU_DIR)/gcc/LPC51U68_flash.ld
+LD_FILE = $(MCU_DIR)/gcc/$(MCU)_flash.ld
 
 SRC_C += \
 	src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
-	$(MCU_DIR)/system_LPC51U68.c \
+	$(MCU_DIR)/system_$(MCU).c \
 	$(MCU_DIR)/drivers/fsl_clock.c \
 	$(MCU_DIR)/drivers/fsl_power.c \
 	$(MCU_DIR)/drivers/fsl_reset.c \
@@ -38,15 +37,9 @@ INC += \
 	$(TOP)/$(SDK_DIR)/drivers/lpc_iocon \
 	$(TOP)/$(SDK_DIR)/drivers/lpc_gpio
 
-SRC_S += $(MCU_DIR)/gcc/startup_LPC51U68.S
+SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S
 
 LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower.a
 
 # For freeRTOS port source
 FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
-
-JLINK_DEVICE = LPC51U68
-PYOCD_TARGET = LPC51U68
-
-# flash using pyocd (51u68 is not supported yet)
-flash: flash-pyocd

From f75a019732c266a5c1eede1c763389210e8bc79d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 19 Mar 2023 18:03:18 +0700
Subject: [PATCH 195/691] bsp lpc17

---
 .github/workflows/build_arm.yml               |  2 +-
 hw/bsp/lpc17/boards/lpcxpresso1769/board.mk   |  8 ++++
 .../boards}/lpcxpresso1769/lpc1769.ld         |  0
 .../boards}/lpcxpresso1769/lpcxpresso1769.c   |  0
 hw/bsp/lpc17/boards/mbed1768/board.mk         |  9 ++++
 hw/bsp/{ => lpc17/boards}/mbed1768/lpc1768.ld |  0
 hw/bsp/{ => lpc17/boards}/mbed1768/mbed1768.c |  0
 .../board.mk => lpc17/family.mk}              | 15 +++----
 hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk  | 26 -----------
 hw/bsp/mbed1768/board.mk                      | 44 -------------------
 10 files changed, 24 insertions(+), 80 deletions(-)
 create mode 100644 hw/bsp/lpc17/boards/lpcxpresso1769/board.mk
 rename hw/bsp/{ => lpc17/boards}/lpcxpresso1769/lpc1769.ld (100%)
 rename hw/bsp/{ => lpc17/boards}/lpcxpresso1769/lpcxpresso1769.c (100%)
 create mode 100644 hw/bsp/lpc17/boards/mbed1768/board.mk
 rename hw/bsp/{ => lpc17/boards}/mbed1768/lpc1768.ld (100%)
 rename hw/bsp/{ => lpc17/boards}/mbed1768/mbed1768.c (100%)
 rename hw/bsp/{lpcxpresso1769/board.mk => lpc17/family.mk} (82%)
 delete mode 100644 hw/bsp/mbed1768/board.mk

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 2b64e5410..a62d587ce 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -35,7 +35,7 @@ jobs:
         - 'broadcom_32bit'
         - 'imxrt'
         - 'kinetis_k32 kinetis_kl'
-        - 'lpc11 lpc13 lpc15 lpc18'
+        - 'lpc11 lpc13 lpc15 lpc17 lpc18'
         - 'lpc51 lpc54 lpc55'
         - 'mm32 msp432e4'
         - 'nrf'
diff --git a/hw/bsp/lpc17/boards/lpcxpresso1769/board.mk b/hw/bsp/lpc17/boards/lpcxpresso1769/board.mk
new file mode 100644
index 000000000..e22c4f64b
--- /dev/null
+++ b/hw/bsp/lpc17/boards/lpcxpresso1769/board.mk
@@ -0,0 +1,8 @@
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/lpc1769.ld
+
+# For flash-jlink target
+JLINK_DEVICE = LPC1769
+
+# flash using jlink
+flash: flash-jlink
diff --git a/hw/bsp/lpcxpresso1769/lpc1769.ld b/hw/bsp/lpc17/boards/lpcxpresso1769/lpc1769.ld
similarity index 100%
rename from hw/bsp/lpcxpresso1769/lpc1769.ld
rename to hw/bsp/lpc17/boards/lpcxpresso1769/lpc1769.ld
diff --git a/hw/bsp/lpcxpresso1769/lpcxpresso1769.c b/hw/bsp/lpc17/boards/lpcxpresso1769/lpcxpresso1769.c
similarity index 100%
rename from hw/bsp/lpcxpresso1769/lpcxpresso1769.c
rename to hw/bsp/lpc17/boards/lpcxpresso1769/lpcxpresso1769.c
diff --git a/hw/bsp/lpc17/boards/mbed1768/board.mk b/hw/bsp/lpc17/boards/mbed1768/board.mk
new file mode 100644
index 000000000..a982a970b
--- /dev/null
+++ b/hw/bsp/lpc17/boards/mbed1768/board.mk
@@ -0,0 +1,9 @@
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/lpc1768.ld
+
+# For flash-jlink target
+JLINK_DEVICE = LPC1768
+PYOCD_TARGET = lpc1768
+
+# flash using pyocd
+flash: flash-pyocd
diff --git a/hw/bsp/mbed1768/lpc1768.ld b/hw/bsp/lpc17/boards/mbed1768/lpc1768.ld
similarity index 100%
rename from hw/bsp/mbed1768/lpc1768.ld
rename to hw/bsp/lpc17/boards/mbed1768/lpc1768.ld
diff --git a/hw/bsp/mbed1768/mbed1768.c b/hw/bsp/lpc17/boards/mbed1768/mbed1768.c
similarity index 100%
rename from hw/bsp/mbed1768/mbed1768.c
rename to hw/bsp/lpc17/boards/mbed1768/mbed1768.c
diff --git a/hw/bsp/lpcxpresso1769/board.mk b/hw/bsp/lpc17/family.mk
similarity index 82%
rename from hw/bsp/lpcxpresso1769/board.mk
rename to hw/bsp/lpc17/family.mk
index d459c8b7b..af01b55a8 100644
--- a/hw/bsp/lpcxpresso1769/board.mk
+++ b/hw/bsp/lpc17/family.mk
@@ -1,5 +1,8 @@
 DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
 
+MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x
+include $(TOP)/$(BOARD_PATH)/board.mk
+
 CFLAGS += \
   -flto \
   -mthumb \
@@ -14,10 +17,10 @@ CFLAGS += \
 # lpc_types.h cause following errors
 CFLAGS += -Wno-error=strict-prototypes -Wno-error=cast-qual
 
-MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x
+# caused by freeRTOS port !!
+CFLAGS += -Wno-error=maybe-uninitialized
 
-# All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/lpc1769.ld
+MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x
 
 SRC_C += \
 	src/portable/nxp/lpc17_40/dcd_lpc17_40.c \
@@ -35,9 +38,3 @@ INC += \
 
 # For freeRTOS port source
 FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
-
-# For flash-jlink target
-JLINK_DEVICE = LPC1769
-
-# flash using jlink
-flash: flash-jlink
diff --git a/hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk b/hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk
index 27b9b371f..5627cb024 100644
--- a/hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk
+++ b/hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk
@@ -4,32 +4,6 @@ CFLAGS += \
   -DCPU_LPC51U68JBD64 \
   -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))'
 
-SRC_C += \
-	src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
-	$(MCU_DIR)/system_LPC51U68.c \
-	$(MCU_DIR)/drivers/fsl_clock.c \
-	$(MCU_DIR)/drivers/fsl_power.c \
-	$(MCU_DIR)/drivers/fsl_reset.c \
-	$(SDK_DIR)/drivers/lpc_gpio/fsl_gpio.c \
-	$(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \
-	$(SDK_DIR)/drivers/flexcomm/fsl_usart.c
-
-INC += \
-	$(TOP)/$(MCU_DIR)/../../CMSIS/Include \
-	$(TOP)/$(MCU_DIR) \
-	$(TOP)/$(MCU_DIR)/drivers \
-	$(TOP)/$(SDK_DIR)/drivers/common \
-	$(TOP)/$(SDK_DIR)/drivers/flexcomm \
-	$(TOP)/$(SDK_DIR)/drivers/lpc_iocon \
-	$(TOP)/$(SDK_DIR)/drivers/lpc_gpio
-
-SRC_S += $(MCU_DIR)/gcc/startup_LPC51U68.S
-
-LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower.a
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
-
 JLINK_DEVICE = LPC51U68
 PYOCD_TARGET = LPC51U68
 
diff --git a/hw/bsp/mbed1768/board.mk b/hw/bsp/mbed1768/board.mk
deleted file mode 100644
index 6940bbb55..000000000
--- a/hw/bsp/mbed1768/board.mk
+++ /dev/null
@@ -1,44 +0,0 @@
-DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
-
-CFLAGS += \
-  -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m3 \
-  -nostdlib \
-  -DCORE_M3 \
-  -D__USE_LPCOPEN \
-  -DCFG_TUSB_MCU=OPT_MCU_LPC175X_6X \
-  -DRTC_EV_SUPPORT=0
-
-# startup.c and lpc_types.h cause following errors
-CFLAGS += -Wno-error=strict-prototypes -Wno-error=cast-qual
-
-MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x
-
-# All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/lpc1768.ld
-
-SRC_C += \
-	src/portable/nxp/lpc17_40/dcd_lpc17_40.c \
-	$(MCU_DIR)/../gcc/cr_startup_lpc175x_6x.c \
-	$(MCU_DIR)/src/chip_17xx_40xx.c \
-	$(MCU_DIR)/src/clock_17xx_40xx.c \
-	$(MCU_DIR)/src/gpio_17xx_40xx.c \
-	$(MCU_DIR)/src/iocon_17xx_40xx.c \
-	$(MCU_DIR)/src/sysctl_17xx_40xx.c \
-	$(MCU_DIR)/src/sysinit_17xx_40xx.c \
-	$(MCU_DIR)/src/uart_17xx_40xx.c
-
-INC += \
-	$(TOP)/$(MCU_DIR)/inc
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
-
-# For flash-jlink target
-JLINK_DEVICE = LPC1768
-
-# flash using pyocd
-flash: $(BUILD)/$(PROJECT).hex
-	pyocd flash -t lpc1768 $<

From f58da311453b13808db775f27337345bcbdf9aba Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 19 Mar 2023 18:12:03 +0700
Subject: [PATCH 196/691] clean up

---
 .github/workflows/build_arm.yml | 36 ---------------------------------
 1 file changed, 36 deletions(-)

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index a62d587ce..b60d12a98 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -117,42 +117,6 @@ jobs:
         path: |
           *.elf
 
-
-  # ---------------------------------------
-  # Build all no-family (orphaned) boards
-  # disable this workflow since it is often failed randomly
-  # ---------------------------------------
-  build-board:
-    runs-on: ubuntu-latest
-    if: false
-    strategy:
-      fail-fast: false
-      matrix:
-        example:
-        # Alphabetical order, a group of 4
-        - 'device/audio_test device/board_test device/cdc_dual_ports device/cdc_msc'
-        - 'device/cdc_msc_freertos device/dfu_runtime device/hid_composite device/hid_composite_freertos'
-        - 'device/hid_generic_inout device/hid_multiple_interface device/midi_test device/msc_dual_lun'
-        - 'device/net_lwip_webserver'
-        - 'device/uac2_headset device/usbtmc device/webusb_serial host/cdc_msc_hid'
-
-    steps:
-    - name: Setup Python
-      uses: actions/setup-python@v4
-      with:
-        python-version: '3.x'
-
-    - name: Install ARM GCC
-      uses: carlosperate/arm-none-eabi-gcc-action@v1
-      with:
-        release: '11.2-2022.02'
-
-    - name: Checkout TinyUSB
-      uses: actions/checkout@v3
-
-    - name: Build
-      run: python3 tools/build_board.py ${{ matrix.example }}
-
   # ---------------------------------------
   # Hardware in the loop (HIL)
   # Current self-hosted instance is running on an RPI4 with

From 45202187864d6dce8c4bc1a3d698e90ae98b7855 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 20 Mar 2023 11:33:39 +0700
Subject: [PATCH 197/691] more compatible with IAR

---
 src/portable/raspberrypi/rp2040/rp2040_usb.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.h b/src/portable/raspberrypi/rp2040/rp2040_usb.h
index 5d3d792cb..d4d29a816 100644
--- a/src/portable/raspberrypi/rp2040/rp2040_usb.h
+++ b/src/portable/raspberrypi/rp2040/rp2040_usb.h
@@ -36,8 +36,8 @@
 #define __tusb_irq_path_func(x) x
 #endif
 
-#define usb_hw_set    ((usb_hw_t *) hw_set_alias(usb_hw))
-#define usb_hw_clear  ((usb_hw_t *) hw_clear_alias(usb_hw))
+#define usb_hw_set    ((usb_hw_t *) hw_set_alias_untyped(usb_hw))
+#define usb_hw_clear  ((usb_hw_t *) hw_clear_alias_untyped(usb_hw))
 
 #define pico_info(...)  TU_LOG(2, __VA_ARGS__)
 #define pico_trace(...) TU_LOG(3, __VA_ARGS__)

From e44e461ce3295f5680ea211048ade473963ba016 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 21 Mar 2023 12:54:43 +0700
Subject: [PATCH 198/691] add tuh_set_interface

---
 src/class/cdc/cdc_host.c |  6 ++---
 src/class/cdc/cdc_host.h |  2 +-
 src/common/tusb_common.h |  6 -----
 src/common/tusb_types.h  |  5 ++++
 src/host/usbh.c          | 50 ++++++++++++++++++++++++++++++++--------
 src/host/usbh.h          |  5 ++++
 6 files changed, 55 insertions(+), 19 deletions(-)

diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index 011ee49dc..d34662cb7 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -97,7 +97,7 @@ static inline uint8_t get_idx_by_ep_addr(uint8_t daddr, uint8_t ep_addr)
     }
   }
 
-  return TU_INDEX_INVALID_8;
+  return TUSB_INDEX_INVALID_8;
 }
 
 
@@ -124,7 +124,7 @@ uint8_t tuh_cdc_itf_get_index(uint8_t daddr, uint8_t itf_num)
     if (p_cdc->daddr == daddr && p_cdc->bInterfaceNumber == itf_num) return i;
   }
 
-  return TU_INDEX_INVALID_8;
+  return TUSB_INDEX_INVALID_8;
 }
 
 bool tuh_cdc_itf_get_info(uint8_t idx, tuh_cdc_itf_info_t* info)
@@ -533,7 +533,7 @@ static void process_cdc_config(tuh_xfer_t* xfer)
   uintptr_t const state = xfer->user_data;
   uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
   uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
-  TU_ASSERT(idx != TU_INDEX_INVALID_8, );
+  TU_ASSERT(idx != TUSB_INDEX_INVALID_8, );
 
   switch(state)
   {
diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h
index 4090d0e9f..03f32e542 100644
--- a/src/class/cdc/cdc_host.h
+++ b/src/class/cdc/cdc_host.h
@@ -80,7 +80,7 @@ typedef struct
 } tuh_cdc_itf_info_t;
 
 // Get Interface index from device address + interface number
-// return TUSB_INDEX_INVALID (0xFF) if not found
+// return TUSB_INDEX_INVALID_8 (0xFF) if not found
 uint8_t tuh_cdc_itf_get_index(uint8_t daddr, uint8_t itf_num);
 
 // Get Interface information
diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index faccf8726..957491aa9 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -75,12 +75,6 @@
 
 #include "tusb_timeout.h" // TODO remove
 
-enum
-{
-  TU_INDEX_INVALID_8 = 0xFFu
-};
-
-
 //--------------------------------------------------------------------+
 // Optional API implemented by application if needed
 // TODO move to a more ovious place/file
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index d567bd482..39a2d4564 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -273,6 +273,11 @@ enum
   CONTROL_STAGE_ACK
 };
 
+enum
+{
+  TUSB_INDEX_INVALID_8 = 0xFFu
+};
+
 //--------------------------------------------------------------------+
 // USB Descriptors
 //--------------------------------------------------------------------+
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 9ccbe7557..5a14aea5f 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -195,7 +195,7 @@ enum { CONFIG_NUM = 1 }; // default to use configuration 1
 // sum of end device + hub
 #define TOTAL_DEVICES   (CFG_TUH_DEVICE_MAX + CFG_TUH_HUB)
 
-static uint8_t _usbh_controller = TU_INDEX_INVALID_8;
+static uint8_t _usbh_controller = TUSB_INDEX_INVALID_8;
 
 // Device with address = 0 for enumeration
 static usbh_dev0_t _dev0;
@@ -303,13 +303,13 @@ tusb_speed_t tuh_speed_get (uint8_t dev_addr)
 static void clear_device(usbh_device_t* dev)
 {
   tu_memclr(dev, sizeof(usbh_device_t));
-  memset(dev->itf2drv, TU_INDEX_INVALID_8, sizeof(dev->itf2drv)); // invalid mapping
-  memset(dev->ep2drv , TU_INDEX_INVALID_8, sizeof(dev->ep2drv )); // invalid mapping
+  memset(dev->itf2drv, TUSB_INDEX_INVALID_8, sizeof(dev->itf2drv)); // invalid mapping
+  memset(dev->ep2drv , TUSB_INDEX_INVALID_8, sizeof(dev->ep2drv )); // invalid mapping
 }
 
 bool tuh_inited(void)
 {
-  return _usbh_controller != TU_INDEX_INVALID_8;
+  return _usbh_controller != TUSB_INDEX_INVALID_8;
 }
 
 bool tuh_init(uint8_t controller_id)
@@ -1033,6 +1033,38 @@ bool tuh_configuration_set(uint8_t daddr, uint8_t config_num,
   return tuh_control_xfer(&xfer);
 }
 
+bool tuh_interface_set(uint8_t daddr, uint8_t itf_num, uint8_t itf_alt,
+                       tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+{
+  TU_LOG_USBH("Set Interface %u Alternate %u\r\n", itf_num, itf_alt);
+
+  tusb_control_request_t const request =
+  {
+    .bmRequestType_bit =
+    {
+      .recipient = TUSB_REQ_RCPT_DEVICE,
+      .type      = TUSB_REQ_TYPE_STANDARD,
+      .direction = TUSB_DIR_OUT
+    },
+    .bRequest = TUSB_REQ_SET_INTERFACE,
+    .wValue   = tu_htole16(itf_alt),
+    .wIndex   = tu_htole16(itf_num),
+    .wLength  = 0
+  };
+
+  tuh_xfer_t xfer =
+  {
+    .daddr       = daddr,
+    .ep_addr     = 0,
+    .setup       = &request,
+    .buffer      = NULL,
+    .complete_cb = complete_cb,
+    .user_data   = user_data
+  };
+
+  return tuh_control_xfer(&xfer);
+}
+
 //--------------------------------------------------------------------+
 // Descriptor Sync
 //--------------------------------------------------------------------+
@@ -1358,11 +1390,11 @@ static void process_enumeration(tuh_xfer_t* xfer)
 
       dev->configured = 1;
 
-      // Start the Set Configuration process for interfaces (itf = TU_INDEX_INVALID_8)
+      // Start the Set Configuration process for interfaces (itf = TUSB_INDEX_INVALID_8)
       // Since driver can perform control transfer within its set_config, this is done asynchronously.
       // The process continue with next interface when class driver complete its sequence with usbh_driver_set_config_complete()
-      // TODO use separated API instead of using TU_INDEX_INVALID_8
-      usbh_driver_set_config_complete(daddr, TU_INDEX_INVALID_8);
+      // TODO use separated API instead of using TUSB_INDEX_INVALID_8
+      usbh_driver_set_config_complete(daddr, TUSB_INDEX_INVALID_8);
     }
     break;
 
@@ -1562,7 +1594,7 @@ static bool _parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configur
           uint8_t const itf_num = desc_itf->bInterfaceNumber+i;
 
           // Interface number must not be used already
-          TU_ASSERT( TU_INDEX_INVALID_8 == dev->itf2drv[itf_num] );
+          TU_ASSERT( TUSB_INDEX_INVALID_8 == dev->itf2drv[itf_num] );
           dev->itf2drv[itf_num] = drv_id;
         }
 
@@ -1596,7 +1628,7 @@ void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num)
     // IAD binding interface such as CDCs should return itf_num + 1 when complete
     // with usbh_driver_set_config_complete()
     uint8_t const drv_id = dev->itf2drv[itf_num];
-    if (drv_id != TU_INDEX_INVALID_8)
+    if (drv_id != TUSB_INDEX_INVALID_8)
     {
       usbh_class_driver_t const * driver = &usbh_class_drivers[drv_id];
       TU_LOG_USBH("%s set config: itf = %u\r\n", driver->name, itf_num);
diff --git a/src/host/usbh.h b/src/host/usbh.h
index 7942de5c2..45e6356bc 100644
--- a/src/host/usbh.h
+++ b/src/host/usbh.h
@@ -171,6 +171,11 @@ bool tuh_edpt_open(uint8_t dev_addr, tusb_desc_endpoint_t const * desc_ep);
 bool tuh_configuration_set(uint8_t daddr, uint8_t config_num,
                            tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 
+// Set Interface (control transfer)
+// true on success, false if there is on-going control transfer or incorrect parameters
+bool tuh_interface_set(uint8_t daddr, uint8_t itf_num, uint8_t itf_alt,
+                       tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
 //--------------------------------------------------------------------+
 // Descriptors Asynchronous (non-blocking)
 //--------------------------------------------------------------------+

From ccf17e3cde4c3ca42731829107ca18217aab541e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 21 Mar 2023 13:21:59 +0700
Subject: [PATCH 199/691] add  -Wreturn-type

---
 examples/make.mk | 1 +
 1 file changed, 1 insertion(+)

diff --git a/examples/make.mk b/examples/make.mk
index 0a07da21c..2ce6fb398 100644
--- a/examples/make.mk
+++ b/examples/make.mk
@@ -150,6 +150,7 @@ GCC_CFLAGS += \
   -Wnull-dereference \
   -Wuninitialized \
   -Wunused \
+  -Wreturn-type \
   -Wredundant-decls
 
 # conversion is too strict for most mcu driver, may be disable sign/int/arith-conversion

From 42decd94e5de3a25fd7e7702da2f756b53a6c9f9 Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Tue, 21 Mar 2023 07:58:39 +0100
Subject: [PATCH 200/691] UAC2: fix feedback EP buffer alignment.

---
 src/class/audio/audio_device.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 32ba5761e..f487fe60e 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -312,7 +312,7 @@ typedef struct
 
 #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
   struct {
-    uint32_t value;       // Feedback value for asynchronous mode (in 16.16 format).
+    CFG_TUSB_MEM_ALIGN uint32_t value;  // Feedback value for asynchronous mode (in 16.16 format).
     uint32_t min_value;   // min value according to UAC2 FMT-2.0 section 2.3.1.1.
     uint32_t max_value;   // max value according to UAC2 FMT-2.0 section 2.3.1.1.
 

From 878f2b54fe208f717677cabda57180ef8a4bc3cd Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 21 Mar 2023 18:12:55 +0700
Subject: [PATCH 201/691] relax hid host enumeration, allow set protocol to be
 stalled

---
 src/class/hid/hid_host.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c
index e5fc86267..df220d7c3 100644
--- a/src/class/hid/hid_host.c
+++ b/src/class/hid/hid_host.c
@@ -465,8 +465,10 @@ bool hidh_set_config(uint8_t dev_addr, uint8_t itf_num)
 
 static void process_set_config(tuh_xfer_t* xfer)
 {
-  // Stall is a valid response for SET_IDLE, therefore we could ignore its result
-  if ( xfer->setup->bRequest != HID_REQ_CONTROL_SET_IDLE )
+  // Stall is a valid response for SET_IDLE, sometime SET_PROTOCOL as well
+  // therefore we could ignore its result
+  if ( !(xfer->setup->bRequest == HID_REQ_CONTROL_SET_IDLE ||
+         xfer->setup->bRequest == HID_REQ_CONTROL_SET_PROTOCOL) )
   {
     TU_ASSERT(xfer->result == XFER_RESULT_SUCCESS, );
   }

From d34508a316a2b97db749651452b8e1650e854f37 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 21 Mar 2023 18:13:25 +0700
Subject: [PATCH 202/691] add note for blocking tuh_configuration_set(),
 tuh_interface_set()

---
 src/host/usbh.c | 20 ++++++++++++++++++--
 src/host/usbh.h |  2 ++
 2 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/src/host/usbh.c b/src/host/usbh.c
index 5a14aea5f..a3335102f 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -1030,7 +1030,15 @@ bool tuh_configuration_set(uint8_t daddr, uint8_t config_num,
     .user_data   = user_data
   };
 
-  return tuh_control_xfer(&xfer);
+  bool ret = tuh_control_xfer(&xfer);
+
+  // if blocking, user_data could be pointed to xfer_result
+  if ( !complete_cb && user_data )
+  {
+    *((xfer_result_t*) user_data) = xfer.result;
+  }
+
+  return ret;
 }
 
 bool tuh_interface_set(uint8_t daddr, uint8_t itf_num, uint8_t itf_alt,
@@ -1062,7 +1070,15 @@ bool tuh_interface_set(uint8_t daddr, uint8_t itf_num, uint8_t itf_alt,
     .user_data   = user_data
   };
 
-  return tuh_control_xfer(&xfer);
+  bool ret = tuh_control_xfer(&xfer);
+
+  // if blocking, user_data could be pointed to xfer_result
+  if ( !complete_cb && user_data )
+  {
+    *((xfer_result_t*) user_data) = xfer.result;
+  }
+
+  return ret;
 }
 
 //--------------------------------------------------------------------+
diff --git a/src/host/usbh.h b/src/host/usbh.h
index 45e6356bc..125d8f4c9 100644
--- a/src/host/usbh.h
+++ b/src/host/usbh.h
@@ -168,11 +168,13 @@ bool tuh_edpt_open(uint8_t dev_addr, tusb_desc_endpoint_t const * desc_ep);
 // Set Configuration (control transfer)
 // config_num = 0 will un-configure device. Note: config_num = config_descriptor_index + 1
 // true on success, false if there is on-going control transfer or incorrect parameters
+// if complete_cb == NULL i.e blocking, user_data should be pointed to xfer_reuslt_t*
 bool tuh_configuration_set(uint8_t daddr, uint8_t config_num,
                            tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 
 // Set Interface (control transfer)
 // true on success, false if there is on-going control transfer or incorrect parameters
+// if complete_cb == NULL i.e blocking, user_data should be pointed to xfer_reuslt_t*
 bool tuh_interface_set(uint8_t daddr, uint8_t itf_num, uint8_t itf_alt,
                        tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 

From 8a0b17598c14497805addbb7c670e41c9eb5c0b7 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 21 Mar 2023 18:15:45 +0700
Subject: [PATCH 203/691] add osal_task_delay() for control blocking

---
 src/host/usbh.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/host/usbh.c b/src/host/usbh.c
index a3335102f..dc347c458 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -568,6 +568,8 @@ bool tuh_control_xfer (tuh_xfer_t* xfer)
       // only need to call task if not preempted RTOS
       #if CFG_TUSB_OS == OPT_OS_NONE || CFG_TUSB_OS == OPT_OS_PICO
       tuh_task();
+      #else
+      osal_task_delay(1); // TODO maybe yield()
       #endif
 
       // TODO probably some timeout to prevent hanged

From d22fc550c76f0d2c5d980a253161e95f1a853309 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 21 Mar 2023 21:04:06 +0700
Subject: [PATCH 204/691] change meaning of CFG_TUH_HID to total number of HID
 interfaces supported.

- previously CFG_TUH_HID is max number of interfaces per device which is
rather limited and consume more resources than needed.
- change hid host instance in API to index
---
 .../host_hid_to_device_cdc/src/tusb_config.h  |   2 +-
 examples/host/cdc_msc_hid/src/tusb_config.h   |   4 +-
 .../host/hid_controller/src/tusb_config.h     |   2 +-
 src/class/hid/hid_host.c                      | 355 +++++++++---------
 src/class/hid/hid_host.h                      |  44 ++-
 5 files changed, 218 insertions(+), 189 deletions(-)

diff --git a/examples/dual/host_hid_to_device_cdc/src/tusb_config.h b/examples/dual/host_hid_to_device_cdc/src/tusb_config.h
index f749bd712..72ec8d654 100644
--- a/examples/dual/host_hid_to_device_cdc/src/tusb_config.h
+++ b/examples/dual/host_hid_to_device_cdc/src/tusb_config.h
@@ -132,7 +132,7 @@
 // max device support (excluding hub device)
 #define CFG_TUH_DEVICE_MAX          (CFG_TUH_HUB ? 4 : 1) // hub typically has 4 ports
 
-#define CFG_TUH_HID                  4
+#define CFG_TUH_HID                 (4*CFG_TUH_DEVICE_MAX)
 #define CFG_TUH_HID_EPIN_BUFSIZE    64
 #define CFG_TUH_HID_EPOUT_BUFSIZE   64
 
diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h
index 4b50f2096..a0a740c6e 100644
--- a/examples/host/cdc_msc_hid/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid/src/tusb_config.h
@@ -36,7 +36,7 @@
 
 #if CFG_TUSB_MCU == OPT_MCU_RP2040
 // change to 1 if using pico-pio-usb as host controller for raspberry rp2040
-#define CFG_TUH_RPI_PIO_USB   0
+#define CFG_TUH_RPI_PIO_USB   1
 #define BOARD_TUH_RHPORT      CFG_TUH_RPI_PIO_USB
 #endif
 
@@ -97,7 +97,7 @@
 
 #define CFG_TUH_HUB                 1 // number of supported hubs
 #define CFG_TUH_CDC                 1
-#define CFG_TUH_HID                 4 // typical keyboard + mouse device can have 3-4 HID interfaces
+#define CFG_TUH_HID                 (4*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces
 #define CFG_TUH_MSC                 1
 #define CFG_TUH_VENDOR              0
 
diff --git a/examples/host/hid_controller/src/tusb_config.h b/examples/host/hid_controller/src/tusb_config.h
index 2e0dd0dbe..f4ddc1b81 100644
--- a/examples/host/hid_controller/src/tusb_config.h
+++ b/examples/host/hid_controller/src/tusb_config.h
@@ -97,7 +97,7 @@
 
 #define CFG_TUH_HUB                 0
 #define CFG_TUH_CDC                 0
-#define CFG_TUH_HID                 4 // typical keyboard + mouse device can have 3-4 HID interfaces
+#define CFG_TUH_HID                 (4*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces
 #define CFG_TUH_MSC                 0
 #define CFG_TUH_VENDOR              0
 
diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c
index df220d7c3..f65b2dc20 100644
--- a/src/class/hid/hid_host.c
+++ b/src/class/hid/hid_host.c
@@ -39,6 +39,8 @@
 
 typedef struct
 {
+  uint8_t daddr;
+
   uint8_t itf_num;
   uint8_t ep_in;
   uint8_t ep_out;
@@ -56,74 +58,131 @@ typedef struct
   uint8_t epout_buf[CFG_TUH_HID_EPOUT_BUFSIZE];
 } hidh_interface_t;
 
-typedef struct
-{
-  uint8_t inst_count;
-  hidh_interface_t instances[CFG_TUH_HID];
-} hidh_device_t;
-
 CFG_TUSB_MEM_SECTION
-static hidh_device_t _hidh_dev[CFG_TUH_DEVICE_MAX];
+tu_static hidh_interface_t _hidh_itf[CFG_TUH_HID];
 
-//------------- Internal prototypes -------------//
+//--------------------------------------------------------------------+
+// Helper
+//--------------------------------------------------------------------+
 
-// Get HID device & interface
-TU_ATTR_ALWAYS_INLINE static inline hidh_device_t* get_dev(uint8_t dev_addr);
-TU_ATTR_ALWAYS_INLINE static inline hidh_interface_t* get_instance(uint8_t dev_addr, uint8_t instance);
-static uint8_t get_instance_id_by_itfnum(uint8_t dev_addr, uint8_t itf);
-static uint8_t get_instance_id_by_epaddr(uint8_t dev_addr, uint8_t ep_addr);
+TU_ATTR_ALWAYS_INLINE static inline
+hidh_interface_t* get_hid_itf(uint8_t daddr, uint8_t idx)
+{
+  TU_ASSERT(daddr && idx < CFG_TUH_HID, NULL);
+  hidh_interface_t* p_hid = &_hidh_itf[idx];
+  return (p_hid->daddr == daddr) ? p_hid : NULL;
+}
+
+// Get instance ID by endpoint address
+static uint8_t get_idx_by_epaddr(uint8_t daddr, uint8_t ep_addr)
+{
+  for ( uint8_t idx = 0; idx < CFG_TUH_HID; idx++ )
+  {
+    hidh_interface_t const * p_hid = &_hidh_itf[idx];
+
+    if ( p_hid->daddr == daddr &&
+         (p_hid->ep_in == ep_addr || p_hid->ep_out == ep_addr) )
+    {
+      return idx;
+    }
+  }
+
+  return TUSB_INDEX_INVALID_8;
+}
+
+static hidh_interface_t* find_new_itf(void)
+{
+  for(uint8_t i=0; i<CFG_TUH_HID; i++)
+  {
+    if (_hidh_itf[i].daddr == 0) return &_hidh_itf[i];
+  }
+
+  return NULL;
+}
 
 //--------------------------------------------------------------------+
 // Interface API
 //--------------------------------------------------------------------+
 
-uint8_t tuh_hid_instance_count(uint8_t dev_addr)
+uint8_t tuh_hid_itf_get_count(uint8_t daddr)
 {
-  return get_dev(dev_addr)->inst_count;
+  uint8_t count = 0;
+
+  for(uint8_t i=0; i<CFG_TUH_HID; i++)
+  {
+    if (_hidh_itf[i].daddr == daddr) count++;
+  }
+
+  return count;
 }
 
-bool tuh_hid_mounted(uint8_t dev_addr, uint8_t instance)
+uint8_t tuh_hid_itf_get_total_count(void)
 {
-  hidh_interface_t* hid_itf = get_instance(dev_addr, instance);
-  return (hid_itf->ep_in != 0) || (hid_itf->ep_out != 0);
+  uint8_t count = 0;
+
+  for(uint8_t i=0; i<CFG_TUH_HID; i++)
+  {
+    if (_hidh_itf[i].daddr != 0) count++;
+  }
+
+  return count;
 }
 
-uint8_t tuh_hid_interface_protocol(uint8_t dev_addr, uint8_t instance)
+bool tuh_hid_mounted(uint8_t daddr, uint8_t idx)
 {
-  hidh_interface_t* hid_itf = get_instance(dev_addr, instance);
-  return hid_itf->itf_protocol;
+  hidh_interface_t* p_hid = get_hid_itf(daddr, idx);
+  return p_hid != NULL;
+}
+
+uint8_t tuh_hid_itf_get_index(uint8_t daddr, uint8_t itf_num)
+{
+  for ( uint8_t idx = 0; idx < CFG_TUH_HID; idx++ )
+  {
+    hidh_interface_t const * p_hid = &_hidh_itf[idx];
+
+    if ( p_hid->daddr == daddr && p_hid->itf_num == itf_num) return idx;
+  }
+
+  return TUSB_INDEX_INVALID_8;
+}
+
+uint8_t tuh_hid_interface_protocol(uint8_t daddr, uint8_t idx)
+{
+  hidh_interface_t* p_hid = get_hid_itf(daddr, idx);
+  return p_hid ? p_hid->itf_protocol : 0;
 }
 
 //--------------------------------------------------------------------+
 // Control Endpoint API
 //--------------------------------------------------------------------+
 
-uint8_t tuh_hid_get_protocol(uint8_t dev_addr, uint8_t instance)
+uint8_t tuh_hid_get_protocol(uint8_t daddr, uint8_t idx)
 {
-  hidh_interface_t* hid_itf = get_instance(dev_addr, instance);
-  return hid_itf->protocol_mode;
+  hidh_interface_t* p_hid = get_hid_itf(daddr, idx);
+  return p_hid ? p_hid->protocol_mode : 0;
 }
 
 static void set_protocol_complete(tuh_xfer_t* xfer)
 {
-  uint8_t const itf_num     = (uint8_t) tu_le16toh(xfer->setup->wIndex);
-  uint8_t const daddr       = xfer->daddr;
-  uint8_t const instance    = get_instance_id_by_itfnum(daddr, itf_num);
-  hidh_interface_t* hid_itf = get_instance(daddr, instance);
+  uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
+  uint8_t const daddr   = xfer->daddr;
+  uint8_t const idx     = tuh_hid_itf_get_index(daddr, itf_num);
+
+  hidh_interface_t* p_hid = get_hid_itf(daddr, idx);
+  TU_VERIFY(p_hid, );
 
   if (XFER_RESULT_SUCCESS == xfer->result)
   {
-    hid_itf->protocol_mode = (uint8_t) tu_le16toh(xfer->setup->wValue);
+    p_hid->protocol_mode = (uint8_t) tu_le16toh(xfer->setup->wValue);
   }
 
   if (tuh_hid_set_protocol_complete_cb)
   {
-    tuh_hid_set_protocol_complete_cb(daddr, instance, hid_itf->protocol_mode);
+    tuh_hid_set_protocol_complete_cb(daddr, idx, p_hid->protocol_mode);
   }
 }
 
-
-static bool _hidh_set_protocol(uint8_t dev_addr, uint8_t itf_num, uint8_t protocol, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+static bool _hidh_set_protocol(uint8_t daddr, uint8_t itf_num, uint8_t protocol, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
   TU_LOG2("HID Set Protocol = %d\r\n", protocol);
 
@@ -143,7 +202,7 @@ static bool _hidh_set_protocol(uint8_t dev_addr, uint8_t itf_num, uint8_t protoc
 
   tuh_xfer_t xfer =
   {
-    .daddr       = dev_addr,
+    .daddr       = daddr,
     .ep_addr     = 0,
     .setup       = &request,
     .buffer      = NULL,
@@ -151,16 +210,15 @@ static bool _hidh_set_protocol(uint8_t dev_addr, uint8_t itf_num, uint8_t protoc
     .user_data   = user_data
   };
 
-  TU_ASSERT( tuh_control_xfer(&xfer) );
-  return true;
+  return tuh_control_xfer(&xfer);
 }
 
-bool tuh_hid_set_protocol(uint8_t dev_addr, uint8_t instance, uint8_t protocol)
+bool tuh_hid_set_protocol(uint8_t daddr, uint8_t idx, uint8_t protocol)
 {
-  hidh_interface_t* hid_itf = get_instance(dev_addr, instance);
-  TU_VERIFY(hid_itf->itf_protocol != HID_ITF_PROTOCOL_NONE);
+  hidh_interface_t* p_hid = get_hid_itf(daddr, idx);
+  TU_VERIFY(p_hid && p_hid->itf_protocol != HID_ITF_PROTOCOL_NONE);
 
-  return _hidh_set_protocol(dev_addr, hid_itf->itf_num, protocol, set_protocol_complete, 0);
+  return _hidh_set_protocol(daddr, p_hid->itf_num, protocol, set_protocol_complete, 0);
 }
 
 static void set_report_complete(tuh_xfer_t* xfer)
@@ -169,20 +227,22 @@ static void set_report_complete(tuh_xfer_t* xfer)
 
   if (tuh_hid_set_report_complete_cb)
   {
-    uint8_t const itf_num     = (uint8_t) tu_le16toh(xfer->setup->wIndex);
-    uint8_t const instance    = get_instance_id_by_itfnum(xfer->daddr, itf_num);
+    uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
+    uint8_t const idx     = tuh_hid_itf_get_index(xfer->daddr, itf_num);
 
     uint8_t const report_type = tu_u16_high(xfer->setup->wValue);
     uint8_t const report_id   = tu_u16_low(xfer->setup->wValue);
 
-    tuh_hid_set_report_complete_cb(xfer->daddr, instance, report_id, report_type,
+    tuh_hid_set_report_complete_cb(xfer->daddr, idx, report_id, report_type,
                                    (xfer->result == XFER_RESULT_SUCCESS) ? xfer->setup->wLength : 0);
   }
 }
 
-bool tuh_hid_set_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t report_type, void* report, uint16_t len)
+bool tuh_hid_set_report(uint8_t daddr, uint8_t idx, uint8_t report_id, uint8_t report_type, void* report, uint16_t len)
 {
-  hidh_interface_t* hid_itf = get_instance(dev_addr, instance);
+  hidh_interface_t* p_hid = get_hid_itf(daddr, idx);
+  TU_VERIFY(p_hid);
+
   TU_LOG2("HID Set Report: id = %u, type = %u, len = %u\r\n", report_id, report_type, len);
 
   tusb_control_request_t const request =
@@ -194,14 +254,14 @@ bool tuh_hid_set_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, u
       .direction = TUSB_DIR_OUT
     },
     .bRequest = HID_REQ_CONTROL_SET_REPORT,
-    .wValue   = tu_u16(report_type, report_id),
-    .wIndex   = hid_itf->itf_num,
+    .wValue   = tu_htole16(tu_u16(report_type, report_id)),
+    .wIndex   = tu_htole16((uint16_t)p_hid->itf_num),
     .wLength  = len
   };
 
   tuh_xfer_t xfer =
   {
-    .daddr       = dev_addr,
+    .daddr       = daddr,
     .ep_addr     = 0,
     .setup       = &request,
     .buffer      = report,
@@ -209,14 +269,14 @@ bool tuh_hid_set_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, u
     .user_data   = 0
   };
 
-  TU_ASSERT( tuh_control_xfer(&xfer) );
-  return true;
+  return tuh_control_xfer(&xfer);
 }
 
-static bool _hidh_set_idle(uint8_t dev_addr, uint8_t itf_num, uint16_t idle_rate, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+static bool _hidh_set_idle(uint8_t daddr, uint8_t itf_num, uint16_t idle_rate, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
   // SET IDLE request, device can stall if not support this request
   TU_LOG2("HID Set Idle \r\n");
+
   tusb_control_request_t const request =
   {
     .bmRequestType_bit =
@@ -226,14 +286,14 @@ static bool _hidh_set_idle(uint8_t dev_addr, uint8_t itf_num, uint16_t idle_rate
       .direction = TUSB_DIR_OUT
     },
     .bRequest = HID_REQ_CONTROL_SET_IDLE,
-    .wValue   = idle_rate,
-    .wIndex   = itf_num,
+    .wValue   = tu_htole16(idle_rate),
+    .wIndex   = tu_htole16((uint16_t)itf_num),
     .wLength  = 0
   };
 
   tuh_xfer_t xfer =
   {
-    .daddr       = dev_addr,
+    .daddr       = daddr,
     .ep_addr     = 0,
     .setup       = &request,
     .buffer      = NULL,
@@ -241,25 +301,24 @@ static bool _hidh_set_idle(uint8_t dev_addr, uint8_t itf_num, uint16_t idle_rate
     .user_data   = user_data
   };
 
-  TU_ASSERT( tuh_control_xfer(&xfer) );
-
-  return true;
+  return tuh_control_xfer(&xfer);
 }
 
 //--------------------------------------------------------------------+
 // Interrupt Endpoint API
 //--------------------------------------------------------------------+
 
-bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t instance)
+bool tuh_hid_receive_report(uint8_t daddr, uint8_t idx)
 {
-  hidh_interface_t* hid_itf = get_instance(dev_addr, instance);
+  hidh_interface_t* p_hid = get_hid_itf(daddr, idx);
+  TU_VERIFY(p_hid);
 
   // claim endpoint
-  TU_VERIFY( usbh_edpt_claim(dev_addr, hid_itf->ep_in) );
+  TU_VERIFY( usbh_edpt_claim(daddr, p_hid->ep_in) );
 
-  if ( !usbh_edpt_xfer(dev_addr, hid_itf->ep_in, hid_itf->epin_buf, hid_itf->epin_size) )
+  if ( !usbh_edpt_xfer(daddr, p_hid->ep_in, p_hid->epin_buf, p_hid->epin_size) )
   {
-    usbh_edpt_release(dev_addr, hid_itf->ep_in);
+    usbh_edpt_release(daddr, p_hid->ep_in);
     return false;
   }
 
@@ -274,44 +333,45 @@ bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t instance)
 //  return !usbh_edpt_busy(dev_addr, hid_itf->ep_in);
 //}
 
-bool tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, const void* report, uint16_t len)
+bool tuh_hid_send_report(uint8_t daddr, uint8_t idx, uint8_t report_id, const void* report, uint16_t len)
 {
   TU_LOG2("HID Send Report %d\r\n", report_id);
 
-  hidh_interface_t* hid_itf = get_instance(dev_addr, instance);
+  hidh_interface_t* p_hid = get_hid_itf(daddr, idx);
+  TU_VERIFY(p_hid);
 
-  if (hid_itf->ep_out == 0)
+  if (p_hid->ep_out == 0)
   {
     // This HID does not have an out endpoint (other than control)
     return false;
   }
-  else if (len > CFG_TUH_HID_EPOUT_BUFSIZE
-           || (report_id != 0 && len > (CFG_TUH_HID_EPOUT_BUFSIZE - 1)))
+  else if (len > CFG_TUH_HID_EPOUT_BUFSIZE ||
+           (report_id != 0 && len > (CFG_TUH_HID_EPOUT_BUFSIZE - 1)))
   {
     // ep_out buffer is not large enough to hold contents
     return false;
   }
 
   // claim endpoint
-  TU_VERIFY( usbh_edpt_claim(dev_addr, hid_itf->ep_out) );
+  TU_VERIFY( usbh_edpt_claim(daddr, p_hid->ep_out) );
 
   if (report_id == 0)
   {
     // No report ID in transmission
-    memcpy(&hid_itf->epout_buf[0], report, len);
+    memcpy(&p_hid->epout_buf[0], report, len);
   }
   else
   {
-    hid_itf->epout_buf[0] = report_id;
-    memcpy(&hid_itf->epout_buf[1], report, len);
+    p_hid->epout_buf[0] = report_id;
+    memcpy(&p_hid->epout_buf[1], report, len);
     ++len; // 1 more byte for report_id
   }
 
-  TU_LOG3_MEM(hid_itf->epout_buf, len, 2);
+  TU_LOG3_MEM(p_hid->epout_buf, len, 2);
 
-  if ( !usbh_edpt_xfer(dev_addr, hid_itf->ep_out, hid_itf->epout_buf, len) )
+  if ( !usbh_edpt_xfer(daddr, p_hid->ep_out, p_hid->epout_buf, len) )
   {
-    usbh_edpt_release(dev_addr, hid_itf->ep_out);
+    usbh_edpt_release(daddr, p_hid->ep_out);
     return false;
   }
 
@@ -323,56 +383,57 @@ bool tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id,
 //--------------------------------------------------------------------+
 void hidh_init(void)
 {
-  tu_memclr(_hidh_dev, sizeof(_hidh_dev));
+  tu_memclr(_hidh_itf, sizeof(_hidh_itf));
 }
 
-bool hidh_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes)
+bool hidh_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes)
 {
   (void) result;
 
   uint8_t const dir = tu_edpt_dir(ep_addr);
-  uint8_t const instance = get_instance_id_by_epaddr(dev_addr, ep_addr);
-  hidh_interface_t* hid_itf = get_instance(dev_addr, instance);
+  uint8_t const idx = get_idx_by_epaddr(daddr, ep_addr);
+
+  hidh_interface_t* p_hid = get_hid_itf(daddr, idx);
+  TU_VERIFY(p_hid);
 
   if ( dir == TUSB_DIR_IN )
   {
-    TU_LOG2("  Get Report callback (%u, %u)\r\n", dev_addr, instance);
-    TU_LOG3_MEM(hid_itf->epin_buf, xferred_bytes, 2);
-    tuh_hid_report_received_cb(dev_addr, instance, hid_itf->epin_buf, (uint16_t) xferred_bytes);
+    TU_LOG2("  Get Report callback (%u, %u)\r\n", daddr, idx);
+    TU_LOG3_MEM(p_hid->epin_buf, xferred_bytes, 2);
+    tuh_hid_report_received_cb(daddr, idx, p_hid->epin_buf, (uint16_t) xferred_bytes);
   }else
   {
-    if (tuh_hid_report_sent_cb) tuh_hid_report_sent_cb(dev_addr, instance, hid_itf->epout_buf, (uint16_t) xferred_bytes);
+    if (tuh_hid_report_sent_cb) tuh_hid_report_sent_cb(daddr, idx, p_hid->epout_buf, (uint16_t) xferred_bytes);
   }
 
   return true;
 }
 
-void hidh_close(uint8_t dev_addr)
+void hidh_close(uint8_t daddr)
 {
-  TU_VERIFY(dev_addr <= CFG_TUH_DEVICE_MAX, );
-
-  hidh_device_t* hid_dev = get_dev(dev_addr);
-
-  if (tuh_hid_umount_cb)
+  for(uint8_t i=0; i<CFG_TUH_HID; i++)
   {
-    for (uint8_t inst = 0; inst < hid_dev->inst_count; inst++ ) tuh_hid_umount_cb(dev_addr, inst);
+    hidh_interface_t* p_hid = &_hidh_itf[i];
+    if (p_hid->daddr == daddr)
+    {
+       if(tuh_hid_umount_cb) tuh_hid_umount_cb(daddr, i);
+       p_hid->daddr = 0;
+    }
   }
-
-  tu_memclr(hid_dev, sizeof(hidh_device_t));
 }
 
 //--------------------------------------------------------------------+
 // Enumeration
 //--------------------------------------------------------------------+
 
-bool hidh_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *desc_itf, uint16_t max_len)
+bool hidh_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *desc_itf, uint16_t max_len)
 {
   (void) rhport;
   (void) max_len;
 
   TU_VERIFY(TUSB_CLASS_HID == desc_itf->bInterfaceClass);
 
-  TU_LOG2("[%u] HID opening Interface %u\r\n", dev_addr, desc_itf->bInterfaceNumber);
+  TU_LOG2("[%u] HID opening Interface %u\r\n", daddr, desc_itf->bInterfaceNumber);
 
   // len = interface + hid + n*endpoints
   uint16_t const drv_len = (uint16_t) (sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) +
@@ -386,12 +447,9 @@ bool hidh_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *de
   tusb_hid_descriptor_hid_t const *desc_hid = (tusb_hid_descriptor_hid_t const *) p_desc;
   TU_ASSERT(HID_DESC_TYPE_HID == desc_hid->bDescriptorType);
 
-  // not enough interface, try to increase CFG_TUH_HID
-  // TODO multiple devices
-  hidh_device_t* hid_dev = get_dev(dev_addr);
-  TU_ASSERT(hid_dev->inst_count < CFG_TUH_HID, 0);
-
-  hidh_interface_t* hid_itf = get_instance(dev_addr, hid_dev->inst_count);
+  hidh_interface_t* p_hid = find_new_itf();
+  TU_ASSERT(p_hid); // not enough interface, try to increase CFG_TUH_HID
+  p_hid->daddr = daddr;
 
   //------------- Endpoint Descriptors -------------//
   p_desc = tu_desc_next(p_desc);
@@ -400,34 +458,35 @@ bool hidh_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *de
   for(int i = 0; i < desc_itf->bNumEndpoints; i++)
   {
     TU_ASSERT(TUSB_DESC_ENDPOINT == desc_ep->bDescriptorType);
-    TU_ASSERT( tuh_edpt_open(dev_addr, desc_ep) );
+    TU_ASSERT( tuh_edpt_open(daddr, desc_ep) );
 
     if(tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN)
     {
-      hid_itf->ep_in     = desc_ep->bEndpointAddress;
-      hid_itf->epin_size = tu_edpt_packet_size(desc_ep);
+      p_hid->ep_in     = desc_ep->bEndpointAddress;
+      p_hid->epin_size = tu_edpt_packet_size(desc_ep);
     }
     else
     {
-      hid_itf->ep_out     = desc_ep->bEndpointAddress;
-      hid_itf->epout_size = tu_edpt_packet_size(desc_ep);
+      p_hid->ep_out     = desc_ep->bEndpointAddress;
+      p_hid->epout_size = tu_edpt_packet_size(desc_ep);
     }
 
     p_desc = tu_desc_next(p_desc);
     desc_ep = (tusb_desc_endpoint_t const *) p_desc;
   }
 
-  hid_dev->inst_count++;
-
-  hid_itf->itf_num   = desc_itf->bInterfaceNumber;
+  p_hid->itf_num   = desc_itf->bInterfaceNumber;
 
   // Assume bNumDescriptors = 1
-  hid_itf->report_desc_type = desc_hid->bReportType;
-  hid_itf->report_desc_len  = tu_unaligned_read16(&desc_hid->wReportLength);
+  p_hid->report_desc_type = desc_hid->bReportType;
+  p_hid->report_desc_len  = tu_unaligned_read16(&desc_hid->wReportLength);
 
   // Per HID Specs: default is Report protocol, though we will force Boot protocol when set_config
-  hid_itf->protocol_mode = HID_PROTOCOL_BOOT;
-  if ( HID_SUBCLASS_BOOT == desc_itf->bInterfaceSubClass ) hid_itf->itf_protocol = desc_itf->bInterfaceProtocol;
+  p_hid->protocol_mode = HID_PROTOCOL_BOOT;
+  if ( HID_SUBCLASS_BOOT == desc_itf->bInterfaceSubClass )
+  {
+    p_hid->itf_protocol = desc_itf->bInterfaceProtocol;
+  }
 
   return true;
 }
@@ -443,16 +502,16 @@ enum {
   CONFIG_COMPLETE
 };
 
-static void config_driver_mount_complete(uint8_t dev_addr, uint8_t instance, uint8_t const* desc_report, uint16_t desc_len);
+static void config_driver_mount_complete(uint8_t daddr, uint8_t idx, uint8_t const* desc_report, uint16_t desc_len);
 static void process_set_config(tuh_xfer_t* xfer);
 
-bool hidh_set_config(uint8_t dev_addr, uint8_t itf_num)
+bool hidh_set_config(uint8_t daddr, uint8_t itf_num)
 {
   tusb_control_request_t request;
   request.wIndex = tu_htole16((uint16_t) itf_num);
 
   tuh_xfer_t xfer;
-  xfer.daddr     = dev_addr;
+  xfer.daddr     = daddr;
   xfer.result    = XFER_RESULT_SUCCESS;
   xfer.setup     = &request;
   xfer.user_data = CONFG_SET_IDLE;
@@ -477,8 +536,9 @@ static void process_set_config(tuh_xfer_t* xfer)
   uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
   uint8_t const daddr   = xfer->daddr;
 
-  uint8_t const instance    = get_instance_id_by_itfnum(daddr, itf_num);
-  hidh_interface_t* hid_itf = get_instance(daddr, instance);
+  uint8_t const idx       = tuh_hid_itf_get_index(daddr, itf_num);
+  hidh_interface_t* p_hid = get_hid_itf(daddr, idx);
+  TU_VERIFY(p_hid, );
 
   switch(state)
   {
@@ -486,27 +546,27 @@ static void process_set_config(tuh_xfer_t* xfer)
     {
       // Idle rate = 0 mean only report when there is changes
       const uint16_t idle_rate = 0;
-      const uintptr_t next_state = (hid_itf->itf_protocol != HID_ITF_PROTOCOL_NONE) ? CONFIG_SET_PROTOCOL : CONFIG_GET_REPORT_DESC;
+      const uintptr_t next_state = (p_hid->itf_protocol != HID_ITF_PROTOCOL_NONE) ? CONFIG_SET_PROTOCOL : CONFIG_GET_REPORT_DESC;
       _hidh_set_idle(daddr, itf_num, idle_rate, process_set_config, next_state);
     }
     break;
 
     case CONFIG_SET_PROTOCOL:
-      _hidh_set_protocol(daddr, hid_itf->itf_num, HID_PROTOCOL_BOOT, process_set_config, CONFIG_GET_REPORT_DESC);
+      _hidh_set_protocol(daddr, p_hid->itf_num, HID_PROTOCOL_BOOT, process_set_config, CONFIG_GET_REPORT_DESC);
     break;
 
     case CONFIG_GET_REPORT_DESC:
       // Get Report Descriptor if possible
       // using usbh enumeration buffer since report descriptor can be very long
-      if( hid_itf->report_desc_len > CFG_TUH_ENUMERATION_BUFSIZE )
+      if( p_hid->report_desc_len > CFG_TUH_ENUMERATION_BUFSIZE )
       {
-        TU_LOG2("HID Skip Report Descriptor since it is too large %u bytes\r\n", hid_itf->report_desc_len);
+        TU_LOG2("HID Skip Report Descriptor since it is too large %u bytes\r\n", p_hid->report_desc_len);
 
         // Driver is mounted without report descriptor
-        config_driver_mount_complete(daddr, instance, NULL, 0);
+        config_driver_mount_complete(daddr, idx, NULL, 0);
       }else
       {
-        tuh_descriptor_get_hid_report(daddr, itf_num, hid_itf->report_desc_type, 0, usbh_get_enum_buf(), hid_itf->report_desc_len, process_set_config, CONFIG_COMPLETE);
+        tuh_descriptor_get_hid_report(daddr, itf_num, p_hid->report_desc_type, 0, usbh_get_enum_buf(), p_hid->report_desc_len, process_set_config, CONFIG_COMPLETE);
       }
       break;
 
@@ -515,7 +575,7 @@ static void process_set_config(tuh_xfer_t* xfer)
       uint8_t const* desc_report = usbh_get_enum_buf();
       uint16_t const desc_len    = tu_le16toh(xfer->setup->wLength);
 
-      config_driver_mount_complete(daddr, instance, desc_report, desc_len);
+      config_driver_mount_complete(daddr, idx, desc_report, desc_len);
     }
     break;
 
@@ -523,15 +583,16 @@ static void process_set_config(tuh_xfer_t* xfer)
   }
 }
 
-static void config_driver_mount_complete(uint8_t dev_addr, uint8_t instance, uint8_t const* desc_report, uint16_t desc_len)
+static void config_driver_mount_complete(uint8_t daddr, uint8_t idx, uint8_t const* desc_report, uint16_t desc_len)
 {
-  hidh_interface_t* hid_itf = get_instance(dev_addr, instance);
+  hidh_interface_t* p_hid = get_hid_itf(daddr, idx);
+  TU_VERIFY(p_hid, );
 
   // enumeration is complete
-  tuh_hid_mount_cb(dev_addr, instance, desc_report, desc_len);
+  if (tuh_hid_mount_cb) tuh_hid_mount_cb(daddr, idx, desc_report, desc_len);
 
   // notify usbh that driver enumeration is complete
-  usbh_driver_set_config_complete(dev_addr, hid_itf->itf_num);
+  usbh_driver_set_config_complete(daddr, p_hid->itf_num);
 }
 
 //--------------------------------------------------------------------+
@@ -676,46 +737,4 @@ uint8_t tuh_hid_parse_report_descriptor(tuh_hid_report_info_t* report_info_arr,
   return report_num;
 }
 
-//--------------------------------------------------------------------+
-// Helper
-//--------------------------------------------------------------------+
-
-// Get Device by address
-TU_ATTR_ALWAYS_INLINE static inline hidh_device_t* get_dev(uint8_t dev_addr)
-{
-  return &_hidh_dev[dev_addr-1];
-}
-
-// Get Interface by instance number
-TU_ATTR_ALWAYS_INLINE static inline hidh_interface_t* get_instance(uint8_t dev_addr, uint8_t instance)
-{
-  return &_hidh_dev[dev_addr-1].instances[instance];
-}
-
-// Get instance ID by interface number
-static uint8_t get_instance_id_by_itfnum(uint8_t dev_addr, uint8_t itf)
-{
-  for ( uint8_t inst = 0; inst < CFG_TUH_HID; inst++ )
-  {
-    hidh_interface_t *hid = get_instance(dev_addr, inst);
-
-    if ( (hid->itf_num == itf) && (hid->ep_in || hid->ep_out) ) return inst;
-  }
-
-  return 0xff;
-}
-
-// Get instance ID by endpoint address
-static uint8_t get_instance_id_by_epaddr(uint8_t dev_addr, uint8_t ep_addr)
-{
-  for ( uint8_t inst = 0; inst < CFG_TUH_HID; inst++ )
-  {
-    hidh_interface_t *hid = get_instance(dev_addr, inst);
-
-    if ( (ep_addr == hid->ep_in) || ( ep_addr == hid->ep_out) ) return inst;
-  }
-
-  return 0xff;
-}
-
 #endif
diff --git a/src/class/hid/hid_host.h b/src/class/hid/hid_host.h
index c152e527a..f808f36d4 100644
--- a/src/class/hid/hid_host.h
+++ b/src/class/hid/hid_host.h
@@ -62,14 +62,24 @@ typedef struct
 // Interface API
 //--------------------------------------------------------------------+
 
-// Get the number of HID instances
-uint8_t tuh_hid_instance_count(uint8_t dev_addr);
+// Get the number of mounted HID interfaces of a device
+uint8_t tuh_hid_itf_get_count(uint8_t dev_addr);
 
-// Check if HID instance is mounted
-bool tuh_hid_mounted(uint8_t dev_addr, uint8_t instance);
+// Get all mounted interfaces across devices
+uint8_t tuh_hid_itf_get_total_count(void);
+
+// backward compatible rename
+#define tuh_hid_instance_count    tuh_hid_itf_get_count
+
+// Check if HID interface is mounted
+bool tuh_hid_mounted(uint8_t dev_addr, uint8_t idx);
+
+// Get Interface index from device address + interface number
+// return TUSB_INDEX_INVALID_8 (0xFF) if not found
+uint8_t tuh_hid_itf_get_index(uint8_t daddr, uint8_t itf_num);
 
 // Get interface supported protocol (bInterfaceProtocol) check out hid_interface_protocol_enum_t for possible values
-uint8_t tuh_hid_interface_protocol(uint8_t dev_addr, uint8_t instance);
+uint8_t tuh_hid_interface_protocol(uint8_t dev_addr, uint8_t idx);
 
 // Parse report descriptor into array of report_info struct and return number of reports.
 // For complicated report, application should write its own parser.
@@ -82,31 +92,31 @@ uint8_t tuh_hid_parse_report_descriptor(tuh_hid_report_info_t* reports_info_arr,
 // Get current protocol: HID_PROTOCOL_BOOT (0) or HID_PROTOCOL_REPORT (1)
 // Note: Device will be initialized in Boot protocol for simplicity.
 //       Application can use set_protocol() to switch back to Report protocol.
-uint8_t tuh_hid_get_protocol(uint8_t dev_addr, uint8_t instance);
+uint8_t tuh_hid_get_protocol(uint8_t dev_addr, uint8_t idx);
 
 // Set protocol to HID_PROTOCOL_BOOT (0) or HID_PROTOCOL_REPORT (1)
 // This function is only supported by Boot interface (tuh_n_hid_interface_protocol() != NONE)
-bool tuh_hid_set_protocol(uint8_t dev_addr, uint8_t instance, uint8_t protocol);
+bool tuh_hid_set_protocol(uint8_t dev_addr, uint8_t idx, uint8_t protocol);
 
 // Set Report using control endpoint
 // report_type is either Input, Output or Feature, (value from hid_report_type_t)
-bool tuh_hid_set_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t report_type, void* report, uint16_t len);
+bool tuh_hid_set_report(uint8_t dev_addr, uint8_t idx, uint8_t report_id, uint8_t report_type, void* report, uint16_t len);
 
 //--------------------------------------------------------------------+
 // Interrupt Endpoint API
 //--------------------------------------------------------------------+
 
 // Check if the interface is ready to use
-//bool tuh_n_hid_n_ready(uint8_t dev_addr, uint8_t instance);
+//bool tuh_n_hid_n_ready(uint8_t dev_addr, uint8_t idx);
 
 // Try to receive next report on Interrupt Endpoint. Immediately return
 // - true If succeeded, tuh_hid_report_received_cb() callback will be invoked when report is available
 // - false if failed to queue the transfer e.g endpoint is busy
-bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t instance);
+bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t idx);
 
 // Send report using interrupt endpoint
 // If report_id > 0 (composite), it will be sent as 1st byte, then report contents. Otherwise only report content is sent.
-bool tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id, const void* report, uint16_t len);
+bool tuh_hid_send_report(uint8_t dev_addr, uint8_t idx, uint8_t report_id, const void* report, uint16_t len);
 
 //--------------------------------------------------------------------+
 // Callbacks (Weak is optional)
@@ -117,24 +127,24 @@ bool tuh_hid_send_report(uint8_t dev_addr, uint8_t instance, uint8_t report_id,
 // can be used to parse common/simple enough descriptor.
 // Note: if report descriptor length > CFG_TUH_ENUMERATION_BUFSIZE, it will be skipped
 // therefore report_desc = NULL, desc_len = 0
-void tuh_hid_mount_cb(uint8_t dev_addr, uint8_t instance, uint8_t const* report_desc, uint16_t desc_len);
+TU_ATTR_WEAK void tuh_hid_mount_cb(uint8_t dev_addr, uint8_t idx, uint8_t const* report_desc, uint16_t desc_len);
 
 // Invoked when device with hid interface is un-mounted
-TU_ATTR_WEAK void tuh_hid_umount_cb(uint8_t dev_addr, uint8_t instance);
+TU_ATTR_WEAK void tuh_hid_umount_cb(uint8_t dev_addr, uint8_t idx);
 
 // Invoked when received report from device via interrupt endpoint
 // Note: if there is report ID (composite), it is 1st byte of report
-void tuh_hid_report_received_cb(uint8_t dev_addr, uint8_t instance, uint8_t const* report, uint16_t len);
+void tuh_hid_report_received_cb(uint8_t dev_addr, uint8_t idx, uint8_t const* report, uint16_t len);
 
 // Invoked when sent report to device successfully via interrupt endpoint
-TU_ATTR_WEAK void tuh_hid_report_sent_cb(uint8_t dev_addr, uint8_t instance, uint8_t const* report, uint16_t len);
+TU_ATTR_WEAK void tuh_hid_report_sent_cb(uint8_t dev_addr, uint8_t idx, uint8_t const* report, uint16_t len);
 
 // Invoked when Sent Report to device via either control endpoint
 // len = 0 indicate there is error in the transfer e.g stalled response
-TU_ATTR_WEAK void tuh_hid_set_report_complete_cb(uint8_t dev_addr, uint8_t instance, uint8_t report_id, uint8_t report_type, uint16_t len);
+TU_ATTR_WEAK void tuh_hid_set_report_complete_cb(uint8_t dev_addr, uint8_t idx, uint8_t report_id, uint8_t report_type, uint16_t len);
 
 // Invoked when Set Protocol request is complete
-TU_ATTR_WEAK void tuh_hid_set_protocol_complete_cb(uint8_t dev_addr, uint8_t instance, uint8_t protocol);
+TU_ATTR_WEAK void tuh_hid_set_protocol_complete_cb(uint8_t dev_addr, uint8_t idx, uint8_t protocol);
 
 //--------------------------------------------------------------------+
 // Internal Class Driver API

From a97f39151ebdf5569ff4831902648c518821a25c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 22 Mar 2023 08:33:30 +0700
Subject: [PATCH 205/691] fine tune CFG_TUH_HID value

---
 examples/dual/host_hid_to_device_cdc/src/tusb_config.h | 2 +-
 examples/host/cdc_msc_hid/src/tusb_config.h            | 2 +-
 examples/host/hid_controller/src/tusb_config.h         | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/examples/dual/host_hid_to_device_cdc/src/tusb_config.h b/examples/dual/host_hid_to_device_cdc/src/tusb_config.h
index 72ec8d654..604cc6681 100644
--- a/examples/dual/host_hid_to_device_cdc/src/tusb_config.h
+++ b/examples/dual/host_hid_to_device_cdc/src/tusb_config.h
@@ -132,7 +132,7 @@
 // max device support (excluding hub device)
 #define CFG_TUH_DEVICE_MAX          (CFG_TUH_HUB ? 4 : 1) // hub typically has 4 ports
 
-#define CFG_TUH_HID                 (4*CFG_TUH_DEVICE_MAX)
+#define CFG_TUH_HID                 (3*CFG_TUH_DEVICE_MAX)
 #define CFG_TUH_HID_EPIN_BUFSIZE    64
 #define CFG_TUH_HID_EPOUT_BUFSIZE   64
 
diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h
index a0a740c6e..6d5933bca 100644
--- a/examples/host/cdc_msc_hid/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid/src/tusb_config.h
@@ -97,7 +97,7 @@
 
 #define CFG_TUH_HUB                 1 // number of supported hubs
 #define CFG_TUH_CDC                 1
-#define CFG_TUH_HID                 (4*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces
+#define CFG_TUH_HID                 (3*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces
 #define CFG_TUH_MSC                 1
 #define CFG_TUH_VENDOR              0
 
diff --git a/examples/host/hid_controller/src/tusb_config.h b/examples/host/hid_controller/src/tusb_config.h
index f4ddc1b81..f5ae2fd6f 100644
--- a/examples/host/hid_controller/src/tusb_config.h
+++ b/examples/host/hid_controller/src/tusb_config.h
@@ -97,7 +97,7 @@
 
 #define CFG_TUH_HUB                 0
 #define CFG_TUH_CDC                 0
-#define CFG_TUH_HID                 (4*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces
+#define CFG_TUH_HID                 (3*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces
 #define CFG_TUH_MSC                 0
 #define CFG_TUH_VENDOR              0
 

From 0921edaf5924d498e8115815dc23acfb1decb7a0 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 22 Mar 2023 09:23:11 +0700
Subject: [PATCH 206/691] use tud_inited() instead of tusb_inited()

---
 src/device/usbd.c                                | 4 ++--
 test/unit-test/test/device/msc/test_msc_device.c | 2 +-
 test/unit-test/test/device/usbd/test_usbd.c      | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/device/usbd.c b/src/device/usbd.c
index 0fb236a88..cee56af60 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -450,7 +450,7 @@ static void usbd_reset(uint8_t rhport)
 bool tud_task_event_ready(void)
 {
   // Skip if stack is not initialized
-  if ( !tusb_inited() ) return false;
+  if ( !tud_inited() ) return false;
 
   return !osal_queue_empty(_usbd_q);
 }
@@ -478,7 +478,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr)
   (void) in_isr; // not implemented yet
 
   // Skip if stack is not initialized
-  if ( !tusb_inited() ) return;
+  if ( !tud_inited() ) return;
 
   // Loop until there is no more events in the queue
   while (1)
diff --git a/test/unit-test/test/device/msc/test_msc_device.c b/test/unit-test/test/device/msc/test_msc_device.c
index c757cdcfa..a62418524 100644
--- a/test/unit-test/test/device/msc/test_msc_device.c
+++ b/test/unit-test/test/device/msc/test_msc_device.c
@@ -197,7 +197,7 @@ void setUp(void)
   dcd_int_disable_Ignore();
   dcd_int_enable_Ignore();
 
-  if ( !tusb_inited() )
+  if ( !tud_inited() )
   {
     dcd_init_Expect(rhport);
     tusb_init();
diff --git a/test/unit-test/test/device/usbd/test_usbd.c b/test/unit-test/test/device/usbd/test_usbd.c
index dcded605a..00950c5a9 100644
--- a/test/unit-test/test/device/usbd/test_usbd.c
+++ b/test/unit-test/test/device/usbd/test_usbd.c
@@ -124,7 +124,7 @@ void setUp(void)
   dcd_int_disable_Ignore();
   dcd_int_enable_Ignore();
 
-  if ( !tusb_inited() )
+  if ( !tud_inited() )
   {
     mscd_init_Expect();
     dcd_init_Expect(rhport);

From f8a5cde3c7fde62c3d6bd379fea6eaa9a629ded6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 22 Mar 2023 09:23:44 +0700
Subject: [PATCH 207/691] add tuh_task_event_ready(), better implement blocking
 control transfer for rtos

---
 src/host/usbh.c | 22 +++++++++++++++-------
 src/host/usbh.h | 10 ++++++++++
 2 files changed, 25 insertions(+), 7 deletions(-)

diff --git a/src/host/usbh.c b/src/host/usbh.c
index dc347c458..3eff0830a 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -360,6 +360,14 @@ bool tuh_init(uint8_t controller_id)
   return true;
 }
 
+bool tuh_task_event_ready(void)
+{
+  // Skip if stack is not initialized
+  if ( !tuh_inited() ) return false;
+
+  return !osal_queue_empty(_usbh_q);
+}
+
 /* USB Host Driver task
  * This top level thread manages all host controller event and delegates events to class-specific drivers.
  * This should be called periodically within the mainloop or rtos thread.
@@ -383,7 +391,7 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr)
   (void) in_isr; // not implemented yet
 
   // Skip if stack is not initialized
-  if ( !tusb_inited() ) return;
+  if ( !tuh_inited() ) return;
 
   // Loop until there is no more events in the queue
   while (1)
@@ -565,12 +573,12 @@ bool tuh_control_xfer (tuh_xfer_t* xfer)
 
     while (result == XFER_RESULT_INVALID)
     {
-      // only need to call task if not preempted RTOS
-      #if CFG_TUSB_OS == OPT_OS_NONE || CFG_TUSB_OS == OPT_OS_PICO
-      tuh_task();
-      #else
-      osal_task_delay(1); // TODO maybe yield()
-      #endif
+      // Note: this can be called within an callback ie. part of tuh_task()
+      // therefore event with RTOS tuh_task() still need to be invoked
+      if (tuh_task_event_ready())
+      {
+        tuh_task();
+      }
 
       // TODO probably some timeout to prevent hanged
     }
diff --git a/src/host/usbh.h b/src/host/usbh.h
index 125d8f4c9..0f969a46a 100644
--- a/src/host/usbh.h
+++ b/src/host/usbh.h
@@ -69,6 +69,13 @@ struct tuh_xfer_s
   // uint32_t timeout_ms;    // place holder, not supported yet
 };
 
+// Subject to change
+typedef struct
+{
+  uint8_t daddr;
+  tusb_desc_interface_t desc;
+} tuh_itf_info_t;
+
 // ConfigID for tuh_config()
 enum
 {
@@ -118,6 +125,9 @@ void tuh_task(void)
   tuh_task_ext(UINT32_MAX, false);
 }
 
+// Check if there is pending events need processing by tuh_task()
+bool tuh_task_event_ready(void);
+
 #ifndef _TUSB_HCD_H_
 extern void hcd_int_handler(uint8_t rhport);
 #endif

From f27486e19abcc020c93c0c938c71e3692c21b9f5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 22 Mar 2023 10:00:42 +0700
Subject: [PATCH 208/691] add tuh_hid_itf_get_info() and change
 tuh_cdc_itf_get_info() to use new tuh_itf_info_t

---
 .pre-commit-config.yaml                 |  2 +-
 examples/host/cdc_msc_hid/src/cdc_app.c |  8 ++++----
 src/class/cdc/cdc_host.c                | 20 +++++++++++++++-----
 src/class/cdc/cdc_host.h                | 10 +---------
 src/class/hid/hid_host.c                | 23 +++++++++++++++++++++++
 src/class/hid/hid_host.h                |  7 +++++--
 tools/build_family.py                   |  4 ++--
 tools/get_deps.py                       |  8 +++++++-
 8 files changed, 58 insertions(+), 24 deletions(-)

diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index 7fa6f52ee..d37c27d40 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -15,7 +15,7 @@ repos:
   rev: v2.2.4
   hooks:
   - id: codespell
-    #args: [-w]
+    args: [-w]
     exclude: ^lib/
 
 - repo: local
diff --git a/examples/host/cdc_msc_hid/src/cdc_app.c b/examples/host/cdc_msc_hid/src/cdc_app.c
index b1b137e0e..7769d109e 100644
--- a/examples/host/cdc_msc_hid/src/cdc_app.c
+++ b/examples/host/cdc_msc_hid/src/cdc_app.c
@@ -87,10 +87,10 @@ void tuh_cdc_rx_cb(uint8_t idx)
 
 void tuh_cdc_mount_cb(uint8_t idx)
 {
-  tuh_cdc_itf_info_t itf_info = { 0 };
+  tuh_itf_info_t itf_info = { 0 };
   tuh_cdc_itf_get_info(idx, &itf_info);
 
-  printf("CDC Interface is mounted: address = %u, itf_num = %u\r\n", itf_info.daddr, itf_info.bInterfaceNumber);
+  printf("CDC Interface is mounted: address = %u, itf_num = %u\r\n", itf_info.daddr, itf_info.desc.bInterfaceNumber);
 
 #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
   // CFG_TUH_CDC_LINE_CODING_ON_ENUM must be defined for line coding is set by tinyusb in enumeration
@@ -106,8 +106,8 @@ void tuh_cdc_mount_cb(uint8_t idx)
 
 void tuh_cdc_umount_cb(uint8_t idx)
 {
-  tuh_cdc_itf_info_t itf_info = { 0 };
+  tuh_itf_info_t itf_info = { 0 };
   tuh_cdc_itf_get_info(idx, &itf_info);
 
-  printf("CDC Interface is unmounted: address = %u, itf_num = %u\r\n", itf_info.daddr, itf_info.bInterfaceNumber);
+  printf("CDC Interface is unmounted: address = %u, itf_num = %u\r\n", itf_info.daddr, itf_info.desc.bInterfaceNumber);
 }
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index d34662cb7..fee314823 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -127,15 +127,25 @@ uint8_t tuh_cdc_itf_get_index(uint8_t daddr, uint8_t itf_num)
   return TUSB_INDEX_INVALID_8;
 }
 
-bool tuh_cdc_itf_get_info(uint8_t idx, tuh_cdc_itf_info_t* info)
+bool tuh_cdc_itf_get_info(uint8_t idx, tuh_itf_info_t* info)
 {
   cdch_interface_t* p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc && info);
 
-  info->daddr              = p_cdc->daddr;
-  info->bInterfaceNumber   = p_cdc->bInterfaceNumber;
-  info->bInterfaceSubClass = p_cdc->bInterfaceSubClass;
-  info->bInterfaceProtocol = p_cdc->bInterfaceProtocol;
+  info->daddr = p_cdc->daddr;
+
+  // re-construct descriptor
+  tusb_desc_interface_t* desc = &info->desc;
+  desc->bLength            = sizeof(tusb_desc_interface_t);
+  desc->bDescriptorType    = TUSB_DESC_INTERFACE;
+
+  desc->bInterfaceNumber   = p_cdc->bInterfaceNumber;
+  desc->bAlternateSetting  = 0;
+  desc->bNumEndpoints      = 2u + (p_cdc->ep_notif ? 1u : 0u);
+  desc->bInterfaceClass    = TUSB_CLASS_CDC;
+  desc->bInterfaceSubClass = p_cdc->bInterfaceSubClass;
+  desc->bInterfaceProtocol = p_cdc->bInterfaceProtocol;
+  desc->iInterface         = 0; // not used yet
 
   return true;
 }
diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h
index 03f32e542..a1e78f158 100644
--- a/src/class/cdc/cdc_host.h
+++ b/src/class/cdc/cdc_host.h
@@ -71,21 +71,13 @@
 // Application API
 //--------------------------------------------------------------------+
 
-typedef struct
-{
-  uint8_t daddr;
-  uint8_t bInterfaceNumber;
-  uint8_t bInterfaceSubClass;
-  uint8_t bInterfaceProtocol;
-} tuh_cdc_itf_info_t;
-
 // Get Interface index from device address + interface number
 // return TUSB_INDEX_INVALID_8 (0xFF) if not found
 uint8_t tuh_cdc_itf_get_index(uint8_t daddr, uint8_t itf_num);
 
 // Get Interface information
 // return true if index is correct and interface is currently mounted
-bool tuh_cdc_itf_get_info(uint8_t idx, tuh_cdc_itf_info_t* info);
+bool tuh_cdc_itf_get_info(uint8_t idx, tuh_itf_info_t* info);
 
 // Check if a interface is mounted
 bool tuh_cdc_mounted(uint8_t idx);
diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c
index f65b2dc20..20373f541 100644
--- a/src/class/hid/hid_host.c
+++ b/src/class/hid/hid_host.c
@@ -134,6 +134,29 @@ bool tuh_hid_mounted(uint8_t daddr, uint8_t idx)
   return p_hid != NULL;
 }
 
+bool tuh_hid_itf_get_info(uint8_t daddr, uint8_t idx, tuh_itf_info_t* info)
+{
+  hidh_interface_t* p_hid = get_hid_itf(daddr, idx);
+  TU_VERIFY(p_hid && info);
+
+  info->daddr = daddr;
+
+  // re-construct descriptor
+  tusb_desc_interface_t* desc = &info->desc;
+  desc->bLength            = sizeof(tusb_desc_interface_t);
+  desc->bDescriptorType    = TUSB_DESC_INTERFACE;
+
+  desc->bInterfaceNumber   = p_hid->itf_num;
+  desc->bAlternateSetting  = 0;
+  desc->bNumEndpoints      = (uint8_t) ((p_hid->ep_in ? 1u : 0u) + (p_hid->ep_out ? 1u : 0u));
+  desc->bInterfaceClass    = TUSB_CLASS_HID;
+  desc->bInterfaceSubClass = (p_hid->itf_protocol ? HID_SUBCLASS_BOOT : HID_SUBCLASS_NONE);
+  desc->bInterfaceProtocol = p_hid->itf_protocol;
+  desc->iInterface         = 0; // not used yet
+
+  return true;
+}
+
 uint8_t tuh_hid_itf_get_index(uint8_t daddr, uint8_t itf_num)
 {
   for ( uint8_t idx = 0; idx < CFG_TUH_HID; idx++ )
diff --git a/src/class/hid/hid_host.h b/src/class/hid/hid_host.h
index f808f36d4..c0c727e6a 100644
--- a/src/class/hid/hid_host.h
+++ b/src/class/hid/hid_host.h
@@ -71,8 +71,8 @@ uint8_t tuh_hid_itf_get_total_count(void);
 // backward compatible rename
 #define tuh_hid_instance_count    tuh_hid_itf_get_count
 
-// Check if HID interface is mounted
-bool tuh_hid_mounted(uint8_t dev_addr, uint8_t idx);
+// Get Interface information
+bool tuh_hid_itf_get_info(uint8_t daddr, uint8_t idx, tuh_itf_info_t* itf_info);
 
 // Get Interface index from device address + interface number
 // return TUSB_INDEX_INVALID_8 (0xFF) if not found
@@ -81,6 +81,9 @@ uint8_t tuh_hid_itf_get_index(uint8_t daddr, uint8_t itf_num);
 // Get interface supported protocol (bInterfaceProtocol) check out hid_interface_protocol_enum_t for possible values
 uint8_t tuh_hid_interface_protocol(uint8_t dev_addr, uint8_t idx);
 
+// Check if HID interface is mounted
+bool tuh_hid_mounted(uint8_t dev_addr, uint8_t idx);
+
 // Parse report descriptor into array of report_info struct and return number of reports.
 // For complicated report, application should write its own parser.
 uint8_t tuh_hid_parse_report_descriptor(tuh_hid_report_info_t* reports_info_arr, uint8_t arr_count, uint8_t const* desc_report, uint16_t desc_len) TU_ATTR_UNUSED;
diff --git a/tools/build_family.py b/tools/build_family.py
index cdc099691..532938d42 100644
--- a/tools/build_family.py
+++ b/tools/build_family.py
@@ -34,7 +34,6 @@ def build_family(example, family, make_option):
         # sum all element of same index (column sum)
         return list(map(sum, list(zip(*result))))
 
-
 if __name__ == '__main__':
     # IAR CC
     if make_iar_option not in sys.argv:
@@ -68,7 +67,8 @@ if __name__ == '__main__':
         print(build_separator)
         for family in all_families:
             fret = build_family(example, family, make_iar_option)
-            total_result = list(map(lambda x, y: x + y, total_result, fret))
+            if len(fret) == len(total_result):
+                total_result = [total_result[i] + fret[i] for i in range(len(fret))]
 
     total_time = time.monotonic() - total_time
     print(build_separator)
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 8bf56cd8d..4b81d1468 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -105,7 +105,13 @@ def get_a_dep(d):
 
 if __name__ == "__main__":
     status = 0
-    deps = list(deps_mandatory.keys()) + sys.argv[1:]
+    deps = list(deps_mandatory.keys())
+    # get all if executed with all as argument
+    if len(sys.argv) == 2 and sys.argv[1] == 'all':
+        deps += deps_optional
+    else:
+        deps += sys.argv[1:]
+
     with Pool() as pool:
         status = sum(pool.map(get_a_dep, deps))
     sys.exit(status)

From c85f46c4ab8c680eb02e6a964cf3afadf2301328 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 22 Mar 2023 16:59:57 +0700
Subject: [PATCH 209/691] fix bitorder in usbtmc_response_capabilities_488_t

---
 src/class/usbtmc/usbtmc.h | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/class/usbtmc/usbtmc.h b/src/class/usbtmc/usbtmc.h
index 3c5e86d4c..1b3c3ab6d 100644
--- a/src/class/usbtmc/usbtmc.h
+++ b/src/class/usbtmc/usbtmc.h
@@ -277,17 +277,17 @@ typedef struct TU_ATTR_PACKED
 
   struct TU_ATTR_PACKED
   {
-    unsigned int is488_2 :1;
-    unsigned int supportsREN_GTL_LLO :1;
-    unsigned int supportsTrigger :1;
+    uint8_t supportsTrigger :1;
+    uint8_t supportsREN_GTL_LLO :1;
+    uint8_t is488_2 :1;
   } bmIntfcCapabilities488;
 
   struct TU_ATTR_PACKED
   {
-    unsigned int SCPI :1;
-    unsigned int SR1 :1;
-    unsigned int RL1 :1;
-    unsigned int DT1 :1;
+    uint8_t DT1 :1;
+    uint8_t RL1 :1;
+    uint8_t SR1 :1;
+    uint8_t SCPI :1;
   } bmDevCapabilities488;
   uint8_t _reserved3[8];
 } usbtmc_response_capabilities_488_t;

From 096da11e88cd9d4714db9590955fb7db62edb75e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 22 Mar 2023 17:01:04 +0700
Subject: [PATCH 210/691] more update

---
 src/class/usbtmc/usbtmc.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/class/usbtmc/usbtmc.h b/src/class/usbtmc/usbtmc.h
index 1b3c3ab6d..090ab3c4a 100644
--- a/src/class/usbtmc/usbtmc.h
+++ b/src/class/usbtmc/usbtmc.h
@@ -262,14 +262,14 @@ typedef struct TU_ATTR_PACKED
 
   struct TU_ATTR_PACKED
   {
-    unsigned int listenOnly :1;
-    unsigned int talkOnly :1;
-    unsigned int supportsIndicatorPulse :1;
+    uint8_t listenOnly :1;
+    uint8_t talkOnly :1;
+    uint8_t supportsIndicatorPulse :1;
   } bmIntfcCapabilities;
 
   struct TU_ATTR_PACKED
   {
-    unsigned int canEndBulkInOnTermChar :1;
+    uint8_t canEndBulkInOnTermChar :1;
   } bmDevCapabilities;
 
   uint8_t _reserved2[6];

From 4274cab3950cfa30b387bab7d388b6a4b8480edb Mon Sep 17 00:00:00 2001
From: Matt Mills <mmills@2bn.net>
Date: Wed, 22 Mar 2023 07:18:27 -0600
Subject: [PATCH 211/691] Update net_device.h

---
 src/class/net/net_device.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/class/net/net_device.h b/src/class/net/net_device.h
index 133689deb..399916355 100644
--- a/src/class/net/net_device.h
+++ b/src/class/net/net_device.h
@@ -94,7 +94,7 @@ void tud_network_init_cb(void);
 
 // client must provide this: 48-bit MAC address
 // TODO removed later since it is not part of tinyusb stack
-extern const uint8_t tud_network_mac_address[6];
+extern uint8_t tud_network_mac_address[6];
 
 //------------- NCM -------------//
 

From 033627ee4118b5015f1d31b88b8c4fcbad14292d Mon Sep 17 00:00:00 2001
From: Matt Mills <mmills@2bn.net>
Date: Wed, 22 Mar 2023 07:30:46 -0600
Subject: [PATCH 212/691] Remove const from tud_network_mac_address in example
 and test files

---
 examples/device/net_lwip_webserver/src/main.c | 2 +-
 test/fuzz/net_fuzz.cc                         | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/examples/device/net_lwip_webserver/src/main.c b/examples/device/net_lwip_webserver/src/main.c
index 88081ffe2..19a0eae9d 100644
--- a/examples/device/net_lwip_webserver/src/main.c
+++ b/examples/device/net_lwip_webserver/src/main.c
@@ -64,7 +64,7 @@ static struct pbuf *received_frame;
 /* this is used by this code, ./class/net/net_driver.c, and usb_descriptors.c */
 /* ideally speaking, this should be generated from the hardware's unique ID (if available) */
 /* it is suggested that the first byte is 0x02 to indicate a link-local address */
-const uint8_t tud_network_mac_address[6] = {0x02,0x02,0x84,0x6A,0x96,0x00};
+uint8_t tud_network_mac_address[6] = {0x02,0x02,0x84,0x6A,0x96,0x00};
 
 /* network parameters of this MCU */
 static const ip4_addr_t ipaddr  = INIT_IP4(192, 168, 7, 1);
diff --git a/test/fuzz/net_fuzz.cc b/test/fuzz/net_fuzz.cc
index 3158e74ef..63cd1ac98 100644
--- a/test/fuzz/net_fuzz.cc
+++ b/test/fuzz/net_fuzz.cc
@@ -67,7 +67,7 @@ void tud_network_init_cb(void) {
 
 // client must provide this: 48-bit MAC address
 // TODO removed later since it is not part of tinyusb stack
-const uint8_t tud_network_mac_address[6] = {0};
+uint8_t tud_network_mac_address[6] = {0};
 
 //------------- NCM -------------//
 

From 4cee79af274c999b885b05c79ab1082c01dcc25a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 23 Mar 2023 13:08:09 +0700
Subject: [PATCH 213/691] rename and change default pio usb pin to adafruit
 feather usb host

---
 examples/host/cdc_msc_hid/src/tusb_config.h |  2 +-
 hw/bsp/rp2040/board.h                       | 25 ++++++++++++++++-----
 hw/bsp/rp2040/family.c                      |  8 +++----
 3 files changed, 24 insertions(+), 11 deletions(-)

diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h
index 6d5933bca..6c5e68a87 100644
--- a/examples/host/cdc_msc_hid/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid/src/tusb_config.h
@@ -36,7 +36,7 @@
 
 #if CFG_TUSB_MCU == OPT_MCU_RP2040
 // change to 1 if using pico-pio-usb as host controller for raspberry rp2040
-#define CFG_TUH_RPI_PIO_USB   1
+#define CFG_TUH_RPI_PIO_USB   0
 #define BOARD_TUH_RHPORT      CFG_TUH_RPI_PIO_USB
 #endif
 
diff --git a/hw/bsp/rp2040/board.h b/hw/bsp/rp2040/board.h
index 1eeeaf9af..ccad00c4a 100644
--- a/hw/bsp/rp2040/board.h
+++ b/hw/bsp/rp2040/board.h
@@ -31,6 +31,7 @@
  extern "C" {
 #endif
 
+// LED
 #ifdef PICO_DEFAULT_LED_PIN
 #define LED_PIN               PICO_DEFAULT_LED_PIN
 #define LED_STATE_ON          (!(PICO_DEFAULT_LED_PIN_INVERTED))
@@ -40,6 +41,7 @@
 #define BUTTON_BOOTSEL
 #define BUTTON_STATE_ACTIVE   0
 
+// UART
 #if defined(PICO_DEFAULT_UART_TX_PIN) && defined(PICO_DEFAULT_UART_RX_PIN) && \
     defined(PICO_DEFAULT_UART) && defined(LIB_PICO_STDIO_UART)
 #define UART_DEV              PICO_DEFAULT_UART
@@ -47,16 +49,27 @@
 #define UART_RX_PIN           PICO_DEFAULT_UART_RX_PIN
 #endif
 
-// PIO_USB_DP_PIN_DEFAULT is 0, which conflict with UART, change to other pin
-#ifndef PIO_USB_DP_PIN
-#define PIO_USB_DP_PIN        20
+// PIO_USB
+
+// #define USE_ADAFRUIT_RP2040_TESTER
+#ifdef USE_ADAFRUIT_RP2040_TESTER
+#define PICO_DEFAULT_PIO_USB_DP_PIN       20
+#define PICO_DEFAULT_PIO_USB_VBUSEN_PIN   22
+#endif
+
+// following default to pin on Adafruit Feather rp2040 USB Host
+#ifndef PICO_DEFAULT_PIO_USB_DP_PIN
+#define PICO_DEFAULT_PIO_USB_DP_PIN       16
 #endif
 
 // VBUS enable pin and its active state
-#define PIO_USB_VBUSEN_PIN    22
+#ifndef PICO_DEFAULT_PIO_USB_VBUSEN_PIN
+#define PICO_DEFAULT_PIO_USB_VBUSEN_PIN   18
+#endif
 
-#ifndef PIO_USB_VBUSEN_STATE
-#define PIO_USB_VBUSEN_STATE  1
+// VBUS enable state
+#ifndef PICO_DEFAULT_PIO_USB_VBUSEN_STATE
+#define PICO_DEFAULT_PIO_USB_VBUSEN_STATE 1
 #endif
 
 #ifdef __cplusplus
diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index f9fa88ac4..920869585 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -126,15 +126,15 @@ void board_init(void)
   set_sys_clock_khz(120000, true);
 
 #ifdef PIO_USB_VBUSEN_PIN
-  gpio_init(PIO_USB_VBUSEN_PIN);
-  gpio_set_dir(PIO_USB_VBUSEN_PIN, GPIO_OUT);
-  gpio_put(PIO_USB_VBUSEN_PIN, PIO_USB_VBUSEN_STATE);
+  gpio_init(PICO_DEFAULT_PIO_USB_VBUSEN_PIN);
+  gpio_set_dir(PICO_DEFAULT_PIO_USB_VBUSEN_PIN, GPIO_OUT);
+  gpio_put(PICO_DEFAULT_PIO_USB_VBUSEN_PIN, PIO_USB_VBUSEN_STATE);
 #endif
 
   // rp2040 use pico-pio-usb for host tuh_configure() can be used to passed pio configuration to the host stack
   // Note: tuh_configure() must be called before tuh_init()
   pio_usb_configuration_t pio_cfg = PIO_USB_DEFAULT_CONFIG;
-  pio_cfg.pin_dp = PIO_USB_DP_PIN;
+  pio_cfg.pin_dp = PICO_DEFAULT_PIO_USB_DP_PIN;
   tuh_configure(BOARD_TUH_RHPORT, TUH_CFGID_RPI_PIO_USB_CONFIGURATION, &pio_cfg);
 #endif
 

From f80d11301ea03746d86dd64c651b31bd600772f7 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 23 Mar 2023 16:33:35 +0700
Subject: [PATCH 214/691] update doc and generate deps list

---
 README.rst                         |  2 +
 docs/reference/dependencies.rst    | 64 ++++++++++++++++++++++++++++++
 docs/reference/getting_started.rst | 22 +++++-----
 docs/reference/index.rst           |  1 +
 tools/gen_doc.py                   | 33 +++++++++++++++
 5 files changed, 109 insertions(+), 13 deletions(-)
 create mode 100644 docs/reference/dependencies.rst
 create mode 100644 tools/gen_doc.py

diff --git a/README.rst b/README.rst
index adca22433..ef441a596 100644
--- a/README.rst
+++ b/README.rst
@@ -112,6 +112,7 @@ Docs
 
   - `Supported Devices`_
   - `Getting Started`_
+  - `Dependencies`_
   - `Concurrency`_
 
 - `Contributing`_
@@ -146,6 +147,7 @@ in your project.
 .. _Reference: docs/reference/index.rst
 .. _Supported Devices: docs/reference/supported.rst
 .. _Getting Started: docs/reference/getting_started.rst
+.. _Dependencies: docs/reference/dependencies.rst
 .. _Concurrency: docs/reference/concurrency.rst
 .. _Contributing: docs/contributing/index.rst
 .. _Code of Conduct: CODE_OF_CONDUCT.rst
diff --git a/docs/reference/dependencies.rst b/docs/reference/dependencies.rst
new file mode 100644
index 000000000..130527e2c
--- /dev/null
+++ b/docs/reference/dependencies.rst
@@ -0,0 +1,64 @@
+************
+Dependencies
+************
+
+MCU low-level peripheral driver and external libraries for building TinyUSB examples
+
+========================================  ==============================================================  ========================================
+Path                                      Project                                                         Commit
+========================================  ==============================================================  ========================================
+hw/mcu/allwinner                          https://github.com/hathach/allwinner_driver.git                 8e5e89e8e132c0fd90e72d5422e5d3d68232b756
+hw/mcu/bridgetek/ft9xx/ft90x-sdk          https://github.com/BRTSG-FOSS/ft90x-sdk.git                     91060164afe239fcb394122e8bf9eb24d3194eb1
+hw/mcu/broadcom                           https://github.com/adafruit/broadcom-peripherals.git            08370086080759ed54ac1136d62d2ad24c6fa267
+hw/mcu/gd/nuclei-sdk                      https://github.com/Nuclei-Software/nuclei-sdk.git               7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7
+hw/mcu/infineon/mtb-xmclib-cat3           https://github.com/Infineon/mtb-xmclib-cat3.git                 daf5500d03cba23e68c2f241c30af79cd9d63880
+hw/mcu/microchip                          https://github.com/hathach/microchip_driver.git                 9e8b37e307d8404033bb881623a113931e1edf27
+hw/mcu/mindmotion/mm32sdk                 https://github.com/hathach/mm32sdk.git                          0b79559eb411149d36e073c1635c620e576308d4
+hw/mcu/nordic/nrfx                        https://github.com/NordicSemiconductor/nrfx.git                 281cc2e178fd9a470d844b3afdea9eb322a0b0e8
+hw/mcu/nuvoton                            https://github.com/majbthrd/nuc_driver.git                      2204191ec76283371419fbcec207da02e1bc22fa
+hw/mcu/nxp/lpcopen                        https://github.com/hathach/nxp_lpcopen.git                      43c45c85405a5dd114fff0ea95cca62837740c13
+hw/mcu/nxp/mcux-sdk                       https://github.com/NXPmicro/mcux-sdk.git                        ae2ab01d9d70ad00cd0e935c2552bd5f0e5c0294
+hw/mcu/nxp/nxp_sdk                        https://github.com/hathach/nxp_sdk.git                          845c8fc49b6fb660f06a5c45225494eacb06f00c
+hw/mcu/raspberry_pi/Pico-PIO-USB          https://github.com/sekigon-gonnoc/Pico-PIO-USB.git              c3715ce94b6f6391856de56081d4d9b3e98fa93d
+hw/mcu/renesas/fsp                        https://github.com/renesas/fsp.git                              8dc14709f2a6518b43f71efad70d900b7718d9f1
+hw/mcu/renesas/rx                         https://github.com/kkitayam/rx_device.git                       706b4e0cf485605c32351e2f90f5698267996023
+hw/mcu/silabs/cmsis-dfp-efm32gg12b        https://github.com/cmsis-packs/cmsis-dfp-efm32gg12b.git         f1c31b7887669cb230b3ea63f9b56769078960bc
+hw/mcu/sony/cxd56/spresense-exported-sdk  https://github.com/sonydevworld/spresense-exported-sdk.git      2ec2a1538362696118dc3fdf56f33dacaf8f4067
+hw/mcu/st/cmsis_device_f0                 https://github.com/STMicroelectronics/cmsis_device_f0.git       2fc25ee22264bc27034358be0bd400b893ef837e
+hw/mcu/st/cmsis_device_f1                 https://github.com/STMicroelectronics/cmsis_device_f1.git       6601104a6397299b7304fd5bcd9a491f56cb23a6
+hw/mcu/st/cmsis_device_f2                 https://github.com/STMicroelectronics/cmsis_device_f2.git       182fcb3681ce116816feb41b7764f1b019ce796f
+hw/mcu/st/cmsis_device_f3                 https://github.com/STMicroelectronics/cmsis_device_f3.git       5e4ee5ed7a7b6c85176bb70a9fd3c72d6eb99f1b
+hw/mcu/st/cmsis_device_f4                 https://github.com/STMicroelectronics/cmsis_device_f4.git       2615e866fa48fe1ff1af9e31c348813f2b19e7ec
+hw/mcu/st/cmsis_device_f7                 https://github.com/STMicroelectronics/cmsis_device_f7.git       fc676ef1ad177eb874eaa06444d3d75395fc51f4
+hw/mcu/st/cmsis_device_g0                 https://github.com/STMicroelectronics/cmsis_device_g0.git       08258b28ee95f50cb9624d152a1cbf084be1f9a5
+hw/mcu/st/cmsis_device_g4                 https://github.com/STMicroelectronics/cmsis_device_g4.git       ce822adb1dc552b3aedd13621edbc7fdae124878
+hw/mcu/st/cmsis_device_h7                 https://github.com/STMicroelectronics/cmsis_device_h7.git       60dc2c913203dc8629dc233d4384dcc41c91e77f
+hw/mcu/st/cmsis_device_l0                 https://github.com/STMicroelectronics/cmsis_device_l0.git       06748ca1f93827befdb8b794402320d94d02004f
+hw/mcu/st/cmsis_device_l1                 https://github.com/STMicroelectronics/cmsis_device_l1.git       7f16ec0a1c4c063f84160b4cc6bf88ad554a823e
+hw/mcu/st/cmsis_device_l4                 https://github.com/STMicroelectronics/cmsis_device_l4.git       6ca7312fa6a5a460b5a5a63d66da527fdd8359a6
+hw/mcu/st/cmsis_device_l5                 https://github.com/STMicroelectronics/cmsis_device_l5.git       d922865fc0326a102c26211c44b8e42f52c1e53d
+hw/mcu/st/cmsis_device_u5                 https://github.com/STMicroelectronics/cmsis_device_u5.git       bc00f3c9d8a4e25220f84c26d414902cc6bdf566
+hw/mcu/st/cmsis_device_wb                 https://github.com/STMicroelectronics/cmsis_device_wb.git       9c5d1920dd9fabbe2548e10561d63db829bb744f
+hw/mcu/st/stm32f0xx_hal_driver            https://github.com/STMicroelectronics/stm32f0xx_hal_driver.git  0e95cd88657030f640a11e690a8a5186c7712ea5
+hw/mcu/st/stm32f1xx_hal_driver            https://github.com/STMicroelectronics/stm32f1xx_hal_driver.git  1dd9d3662fb7eb2a7f7d3bc0a4c1dc7537915a29
+hw/mcu/st/stm32f2xx_hal_driver            https://github.com/STMicroelectronics/stm32f2xx_hal_driver.git  c75ace9b908a9aca631193ebf2466963b8ea33d0
+hw/mcu/st/stm32f3xx_hal_driver            https://github.com/STMicroelectronics/stm32f3xx_hal_driver.git  1761b6207318ede021706e75aae78f452d72b6fa
+hw/mcu/st/stm32f4xx_hal_driver            https://github.com/STMicroelectronics/stm32f4xx_hal_driver.git  04e99fbdabd00ab8f370f377c66b0a4570365b58
+hw/mcu/st/stm32f7xx_hal_driver            https://github.com/STMicroelectronics/stm32f7xx_hal_driver.git  f7ffdf6bf72110e58b42c632b0a051df5997e4ee
+hw/mcu/st/stm32g0xx_hal_driver            https://github.com/STMicroelectronics/stm32g0xx_hal_driver.git  5b53e6cee664a82b16c86491aa0060e2110c00cb
+hw/mcu/st/stm32g4xx_hal_driver            https://github.com/STMicroelectronics/stm32g4xx_hal_driver.git  8b4518417706d42eef5c14e56a650005abf478a8
+hw/mcu/st/stm32h7xx_hal_driver            https://github.com/STMicroelectronics/stm32h7xx_hal_driver.git  d8461b980b59b1625207d8c4f2ce0a9c2a7a3b04
+hw/mcu/st/stm32l0xx_hal_driver            https://github.com/STMicroelectronics/stm32l0xx_hal_driver.git  fbdacaf6f8c82a4e1eb9bd74ba650b491e97e17b
+hw/mcu/st/stm32l1xx_hal_driver            https://github.com/STMicroelectronics/stm32l1xx_hal_driver.git  44efc446fa69ed8344e7fd966e68ed11043b35d9
+hw/mcu/st/stm32l4xx_hal_driver            https://github.com/STMicroelectronics/stm32l4xx_hal_driver.git  aee3d5bf283ae5df87532b781bdd01b7caf256fc
+hw/mcu/st/stm32l5xx_hal_driver            https://github.com/STMicroelectronics/stm32l5xx_hal_driver.git  675c32a75df37f39d50d61f51cb0dcf53f07e1cb
+hw/mcu/st/stm32u5xx_hal_driver            https://github.com/STMicroelectronics/stm32u5xx_hal_driver.git  2e1d4cdb386e33391cb261dfff4fefa92e4aa35a
+hw/mcu/st/stm32wbxx_hal_driver            https://github.com/STMicroelectronics/stm32wbxx_hal_driver.git  2c5f06638be516c1b772f768456ba637f077bac8
+hw/mcu/ti                                 https://github.com/hathach/ti_driver.git                        143ed6cc20a7615d042b03b21e070197d473e6e5
+hw/mcu/wch/ch32v307                       https://github.com/openwch/ch32v307.git                         17761f5cf9dbbf2dcf665b7c04934188add20082
+lib/CMSIS_5                               https://github.com/ARM-software/CMSIS_5.git                     20285262657d1b482d132d20d755c8c330d55c1f
+lib/FreeRTOS-Kernel                       https://github.com/FreeRTOS/FreeRTOS-Kernel.git                 def7d2df2b0506d3d249334974f51e427c17a41c
+lib/lwip                                  https://github.com/lwip-tcpip/lwip.git                          159e31b689577dbf69cf0683bbaffbd71fa5ee10
+lib/sct_neopixel                          https://github.com/gsteiert/sct_neopixel.git                    e73e04ca63495672d955f9268e003cffe168fcd8
+tools/uf2                                 https://github.com/microsoft/uf2.git                            19615407727073e36d81bf239c52108ba92e7660
+========================================  ==============================================================  ========================================
diff --git a/docs/reference/getting_started.rst b/docs/reference/getting_started.rst
index ef4a6ba61..1f41cb888 100644
--- a/docs/reference/getting_started.rst
+++ b/docs/reference/getting_started.rst
@@ -44,12 +44,6 @@ For your convenience, TinyUSB contains a handful of examples for both host and d
    $ git clone https://github.com/hathach/tinyusb tinyusb
    $ cd tinyusb
 
-Some TinyUSB examples also requires external submodule libraries in ``/lib`` such as FreeRTOS, Lightweight IP to build. Run following command to fetch them
-
-.. code-block::
-
-   $ git submodule update --init lib
-
 Some ports will also require a port-specific SDK (e.g. RP2040) or binary (e.g. Sony Spresense) to build examples. They are out of scope for tinyusb, you should download/install it first according to its manufacturer guide.
 
 Build
@@ -61,23 +55,25 @@ To build example, first change directory to an example folder.
 
    $ cd examples/device/cdc_msc
 
-Before building, we need to download MCU driver submodule to provide low-level MCU peripheral's driver first. Run the ``get-deps`` target in one of the example folder as follow. You only need to do this once per mcu
+Before building, we firstly need to download dependencies such as: MCU low-level peripheral driver and external libraries e.g FreeRTOS (required by some examples). Run the ``get-deps`` target in one of the example folder as follow. You only need to do this once per mcu. Check out `complete list of dependencies and their designated path here <dependencies.rst>`_
 
 .. code-block::
 
-   $ make BOARD=feather_nrf52840_express get-deps
-
-
-Some modules (e.g. RP2040 and ESP32s2) require the project makefiles to be customized using CMake. If necessary apply any setup steps for the platform's SDK.
+   $ make BOARD=raspberry_pi_pico get-deps
 
 Then compile with ``make BOARD=[board_name] all``\ , for example
 
 .. code-block::
 
-   $ make BOARD=feather_nrf52840_express all
+   $ make BOARD=raspberry_pi_pico all
 
 Note: ``BOARD`` can be found as directory name in ``hw/bsp``\ , either in its family/boards or directly under bsp (no family).
-Note: some examples especially those that uses Vendor class (e.g webUSB) may requires udev permission on Linux (and/or macOS) to access usb device. It depends on your OS distro, typically copy ``/examples/device/99-tinyusb.rules`` file to /etc/udev/rules.d/ then run ``sudo udevadm control --reload-rules && sudo udevadm trigger`` is good enough.
+Note: some examples especially those that uses Vendor class (e.g webUSB) may requires udev permission on Linux (and/or macOS) to access usb device. It depends on your OS distro, typically copy ``99-tinyusb.rules`` and reload your udev is good to go
+
+.. code-block::
+
+   $ cp examples/device/99-tinyusb.rules /etc/udev/rules.d/
+   $ sudo udevadm control --reload-rules && sudo udevadm trigger
 
 Port Selection
 ~~~~~~~~~~~~~~
diff --git a/docs/reference/index.rst b/docs/reference/index.rst
index 292fb1a93..a9663ee7d 100644
--- a/docs/reference/index.rst
+++ b/docs/reference/index.rst
@@ -56,4 +56,5 @@ Index
 
    supported
    getting_started
+   dependencies
    concurrency
diff --git a/tools/gen_doc.py b/tools/gen_doc.py
new file mode 100644
index 000000000..db11e2cfb
--- /dev/null
+++ b/tools/gen_doc.py
@@ -0,0 +1,33 @@
+import pandas as pd
+from tabulate import tabulate
+from pathlib import Path
+from get_deps import deps_all
+
+# TOP is tinyusb root dir
+TOP = Path(__file__).parent.parent.resolve()
+
+###########################################
+# Dependencies
+###########################################
+def gen_deps_doc():
+    deps_rst = Path(TOP) / "docs/reference/dependencies.rst"
+    df = pd.DataFrame.from_dict(deps_all, orient='index', columns=['Commit', 'Project'])
+    df = df[['Project', 'Commit']].sort_index()
+    df = df.rename_axis("Path")
+
+    outstr = f"""\
+************
+Dependencies
+************
+
+MCU low-level peripheral driver and external libraries for building TinyUSB examples
+
+{tabulate(df, headers="keys", tablefmt='rst')}
+"""
+
+    with deps_rst.open('w') as f:
+        f.write(outstr)
+
+
+if __name__ == "__main__":
+    gen_deps_doc()

From 71fb6469d4997347f2014daa41839391cc070a74 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 24 Mar 2023 14:02:09 +0700
Subject: [PATCH 215/691] separate CFG_TUSB_MEM_SECTION and CFG_TUSB_MEM_ALIGN
 to

- CFG_TUD_MEM_SECTION and CFG_TUD_MEM_ALIGN
- CFG_TUH_MEM_SECTION and CFG_TUH_MEM_ALIGN
- fix missing mem section and align for host
---
 hw/bsp/ea4088qs/board.mk         |  3 ++-
 src/class/cdc/cdc_host.c         |  6 ++---
 src/class/cdc/cdc_rndis_host.c   |  4 ++--
 src/class/hid/hid_host.c         |  6 ++---
 src/class/msc/msc_host.c         |  8 +++----
 src/host/hub.c                   |  8 +++----
 src/host/usbh.c                  |  8 +++----
 src/portable/ehci/ehci.c         |  2 +-
 src/portable/nxp/khci/hcd_khci.c |  4 ++--
 src/portable/ohci/ohci.c         |  2 +-
 src/tusb_option.h                | 40 +++++++++++++++++++++++++++++++-
 tools/build_utils.py             |  2 +-
 tools/gen_doc.py                 |  2 ++
 13 files changed, 68 insertions(+), 27 deletions(-)

diff --git a/hw/bsp/ea4088qs/board.mk b/hw/bsp/ea4088qs/board.mk
index 376840fb1..e1e14b717 100644
--- a/hw/bsp/ea4088qs/board.mk
+++ b/hw/bsp/ea4088qs/board.mk
@@ -10,7 +10,8 @@ CFLAGS += \
   -nostdlib \
   -DCORE_M4 \
   -D__USE_LPCOPEN \
-  -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
+  -DCFG_TUD_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
+  -DCFG_TUH_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
   -DCFG_TUSB_MCU=OPT_MCU_LPC40XX
 
 # mcu driver cause following warnings
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index fee314823..734ddd1b8 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -62,10 +62,10 @@ typedef struct {
     tu_edpt_stream_t rx;
 
     uint8_t tx_ff_buf[CFG_TUH_CDC_TX_BUFSIZE];
-    CFG_TUSB_MEM_ALIGN uint8_t tx_ep_buf[CFG_TUH_CDC_TX_EPSIZE];
+    CFG_TUH_MEM_ALIGN uint8_t tx_ep_buf[CFG_TUH_CDC_TX_EPSIZE];
 
     uint8_t rx_ff_buf[CFG_TUH_CDC_TX_BUFSIZE];
-    CFG_TUSB_MEM_ALIGN uint8_t rx_ep_buf[CFG_TUH_CDC_TX_EPSIZE];
+    CFG_TUH_MEM_ALIGN uint8_t rx_ep_buf[CFG_TUH_CDC_TX_EPSIZE];
   } stream;
 
 } cdch_interface_t;
@@ -74,7 +74,7 @@ typedef struct {
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
 
-CFG_TUSB_MEM_SECTION
+CFG_TUH_MEM_SECTION
 static cdch_interface_t cdch_data[CFG_TUH_CDC];
 
 static inline cdch_interface_t* get_itf(uint8_t idx)
diff --git a/src/class/cdc/cdc_rndis_host.c b/src/class/cdc/cdc_rndis_host.c
index 41d21bbad..11a5355aa 100644
--- a/src/class/cdc/cdc_rndis_host.c
+++ b/src/class/cdc/cdc_rndis_host.c
@@ -50,8 +50,8 @@
 //--------------------------------------------------------------------+
 #define RNDIS_MSG_PAYLOAD_MAX   (1024*4)
 
-CFG_TUSB_MEM_SECTION static uint8_t msg_notification[CFG_TUH_DEVICE_MAX][8];
-CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4) static uint8_t msg_payload[RNDIS_MSG_PAYLOAD_MAX];
+CFG_TUH_MEM_SECTION static uint8_t msg_notification[CFG_TUH_DEVICE_MAX][8];
+CFG_TUH_MEM_SECTION CFG_TUH_MEM_ALIGN static uint8_t msg_payload[RNDIS_MSG_PAYLOAD_MAX];
 
 static rndish_data_t rndish_data[CFG_TUH_DEVICE_MAX];
 
diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c
index 20373f541..a0032aeba 100644
--- a/src/class/hid/hid_host.c
+++ b/src/class/hid/hid_host.c
@@ -54,11 +54,11 @@ typedef struct
   uint16_t epin_size;
   uint16_t epout_size;
 
-  uint8_t epin_buf[CFG_TUH_HID_EPIN_BUFSIZE];
-  uint8_t epout_buf[CFG_TUH_HID_EPOUT_BUFSIZE];
+  CFG_TUH_MEM_ALIGN uint8_t epin_buf[CFG_TUH_HID_EPIN_BUFSIZE];
+  CFG_TUH_MEM_ALIGN uint8_t epout_buf[CFG_TUH_HID_EPOUT_BUFSIZE];
 } hidh_interface_t;
 
-CFG_TUSB_MEM_SECTION
+CFG_TUH_MEM_SECTION
 tu_static hidh_interface_t _hidh_itf[CFG_TUH_HID];
 
 //--------------------------------------------------------------------+
diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c
index 2fddeb818..1b48813ec 100644
--- a/src/class/msc/msc_host.c
+++ b/src/class/msc/msc_host.c
@@ -71,15 +71,15 @@ typedef struct
   tuh_msc_complete_cb_t complete_cb;
   uintptr_t complete_arg;
 
-  msc_cbw_t cbw;
-  msc_csw_t csw;
+  CFG_TUH_MEM_ALIGN msc_cbw_t cbw;
+  CFG_TUH_MEM_ALIGN msc_csw_t csw;
 }msch_interface_t;
 
-CFG_TUSB_MEM_SECTION static msch_interface_t _msch_itf[CFG_TUH_DEVICE_MAX];
+CFG_TUH_MEM_SECTION static msch_interface_t _msch_itf[CFG_TUH_DEVICE_MAX];
 
 // buffer used to read scsi information when mounted
 // largest response data currently is inquiry TODO Inquiry is not part of enum anymore
-CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4)
+CFG_TUH_MEM_SECTION CFG_TUH_MEM_ALIGN
 static uint8_t _msch_buffer[sizeof(scsi_inquiry_resp_t)];
 
 TU_ATTR_ALWAYS_INLINE
diff --git a/src/host/hub.c b/src/host/hub.c
index b84042fb6..386ad6aae 100644
--- a/src/host/hub.c
+++ b/src/host/hub.c
@@ -43,12 +43,12 @@ typedef struct
   uint8_t port_count;
   uint8_t status_change; // data from status change interrupt endpoint
 
-  hub_port_status_response_t port_status;
-  hub_status_response_t hub_status;
+  CFG_TUH_MEM_ALIGN hub_port_status_response_t port_status;
+  CFG_TUH_MEM_ALIGN hub_status_response_t hub_status;
 } hub_interface_t;
 
-CFG_TUSB_MEM_SECTION static hub_interface_t hub_data[CFG_TUH_HUB];
-CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4) static uint8_t _hub_buffer[sizeof(descriptor_hub_desc_t)];
+CFG_TUH_MEM_SECTION static hub_interface_t hub_data[CFG_TUH_HUB];
+CFG_TUH_MEM_SECTION CFG_TUH_MEM_ALIGN static uint8_t _hub_buffer[sizeof(descriptor_hub_desc_t)];
 
 TU_ATTR_ALWAYS_INLINE
 static inline hub_interface_t* get_itf(uint8_t dev_addr)
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 3eff0830a..3be662c63 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -203,7 +203,7 @@ static usbh_dev0_t _dev0;
 // all devices excluding zero-address
 // hub address start from CFG_TUH_DEVICE_MAX+1
 // TODO: hub can has its own simpler struct to save memory
-CFG_TUSB_MEM_SECTION usbh_device_t _usbh_devices[TOTAL_DEVICES];
+static usbh_device_t _usbh_devices[TOTAL_DEVICES];
 
 // Mutex for claiming endpoint
 #if OSAL_MUTEX_REQUIRED
@@ -218,15 +218,15 @@ CFG_TUSB_MEM_SECTION usbh_device_t _usbh_devices[TOTAL_DEVICES];
 OSAL_QUEUE_DEF(usbh_int_set, _usbh_qdef, CFG_TUH_TASK_QUEUE_SZ, hcd_event_t);
 static osal_queue_t _usbh_q;
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN
+CFG_TUH_MEM_SECTION CFG_TUH_MEM_ALIGN
 static uint8_t _usbh_ctrl_buf[CFG_TUH_ENUMERATION_BUFSIZE];
 
 // Control transfers: since most controllers do not support multiple control transfers
 // on multiple devices concurrently and control transfers are not used much except for
 // enumeration, we will only execute control transfers one at a time.
-CFG_TUSB_MEM_SECTION struct
+CFG_TUH_MEM_SECTION struct
 {
-  tusb_control_request_t request TU_ATTR_ALIGNED(4);
+  CFG_TUH_MEM_ALIGN tusb_control_request_t request;
   uint8_t* buffer;
   tuh_xfer_cb_t complete_cb;
   uintptr_t user_data;
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index ee9dfb11f..9951aa5da 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -85,7 +85,7 @@ typedef struct
 }ehci_data_t;
 
 // Periodic frame list must be 4K alignment
-CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4096) static ehci_data_t ehci_data;
+CFG_TUH_MEM_SECTION TU_ATTR_ALIGNED(4096) static ehci_data_t ehci_data;
 
 //--------------------------------------------------------------------+
 // PROTOTYPE
diff --git a/src/portable/nxp/khci/hcd_khci.c b/src/portable/nxp/khci/hcd_khci.c
index 6d25cd862..f6029ee0d 100644
--- a/src/portable/nxp/khci/hcd_khci.c
+++ b/src/portable/nxp/khci/hcd_khci.c
@@ -137,8 +137,8 @@ typedef struct
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
 // BDT(Buffer Descriptor Table) must be 256-byte aligned
-CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(512) static hcd_data_t _hcd;
-//CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4) static uint8_t _rx_buf[1024];
+CFG_TUH_MEM_SECTION TU_ATTR_ALIGNED(512) static hcd_data_t _hcd;
+//CFG_TUH_MEM_SECTION TU_ATTR_ALIGNED(4) static uint8_t _rx_buf[1024];
 
 int find_pipe(uint8_t dev_addr, uint8_t ep_addr)
 {
diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index 260804d3d..3f702d22c 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -145,7 +145,7 @@ enum {
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
-CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(256) static ohci_data_t ohci_data;
+CFG_TUH_MEM_SECTION TU_ATTR_ALIGNED(256) static ohci_data_t ohci_data;
 
 static ohci_ed_t * const p_ed_head[] =
 {
diff --git a/src/tusb_option.h b/src/tusb_option.h
index c679f2f12..f8ac722f4 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -289,12 +289,15 @@
   #define CFG_TUSB_DEBUG 0
 #endif
 
-// place data in accessible RAM for usb controller
+// TODO MEM_SECTION can be different for host and device controller
+// should use CFG_TUD_MEM_SECTION, CFG_TUH_MEM_SECTION
 #ifndef CFG_TUSB_MEM_SECTION
   #define CFG_TUSB_MEM_SECTION
 #endif
 
 // alignment requirement of buffer used for endpoint transferring
+// TODO MEM_ALIGN can be different for host and device controller
+// should use CFG_TUD_MEM_ALIGN, CFG_TUH_MEM_ALIGN
 #ifndef CFG_TUSB_MEM_ALIGN
   #define CFG_TUSB_MEM_ALIGN      TU_ATTR_ALIGNED(4)
 #endif
@@ -312,6 +315,26 @@
 // Device Options (Default)
 //--------------------------------------------------------------------
 
+// Attribute to place data in accessible RAM for device controller
+// default to CFG_TUSB_MEM_SECTION for backward-compatible
+#ifndef CFG_TUD_MEM_SECTION
+  #ifdef CFG_TUSB_MEM_SECTION
+    #define CFG_TUD_MEM_SECTION   CFG_TUSB_MEM_SECTION
+  #else
+    #define CFG_TUD_MEM_SECTION
+  #endif
+#endif
+
+// Attribute to align memory for device controller
+// default to CFG_TUSB_MEM_ALIGN for backward-compatible
+#ifndef CFG_TUD_MEM_ALIGN
+  #ifdef CFG_TUSB_MEM_ALIGN
+    #define CFG_TUD_MEM_ALIGN   CFG_TUSB_MEM_ALIGN
+  #else
+    #define CFG_TUD_MEM_ALIGN   TU_ATTR_ALIGNED(4)
+  #endif
+#endif
+
 #ifndef CFG_TUD_ENDPOINT0_SIZE
   #define CFG_TUD_ENDPOINT0_SIZE  64
 #endif
@@ -390,6 +413,21 @@
   #endif
 #endif // CFG_TUH_ENABLED
 
+// Attribute to place data in accessible RAM for host controller
+// default to CFG_TUSB_MEM_SECTION for backward-compatible
+#ifndef CFG_TUH_MEM_SECTION
+  #ifdef CFG_TUSB_MEM_SECTION
+    #define CFG_TUH_MEM_SECTION   CFG_TUSB_MEM_SECTION
+  #else
+    #define CFG_TUH_MEM_SECTION
+  #endif
+#endif
+
+// Attribute to align memory for host controller
+#ifndef CFG_TUH_MEM_ALIGN
+  #define CFG_TUH_MEM_ALIGN   TU_ATTR_ALIGNED(4)
+#endif
+
 //------------- CLASS -------------//
 
 #ifndef CFG_TUH_HUB
diff --git a/tools/build_utils.py b/tools/build_utils.py
index d0ef52717..905d06a86 100644
--- a/tools/build_utils.py
+++ b/tools/build_utils.py
@@ -93,7 +93,7 @@ def build_example(example, board, make_option):
         ret[2] = 1
         print(build_format.format(example, board, status, '-', flash_size, sram_size))
     else:
-        subprocess.run(make_cmd + " clean", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+        #subprocess.run(make_cmd + " clean", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
         build_result = subprocess.run(make_cmd + " all", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
 
         if build_result.returncode == 0:
diff --git a/tools/gen_doc.py b/tools/gen_doc.py
index db11e2cfb..9078299cc 100644
--- a/tools/gen_doc.py
+++ b/tools/gen_doc.py
@@ -6,9 +6,11 @@ from get_deps import deps_all
 # TOP is tinyusb root dir
 TOP = Path(__file__).parent.parent.resolve()
 
+
 ###########################################
 # Dependencies
 ###########################################
+
 def gen_deps_doc():
     deps_rst = Path(TOP) / "docs/reference/dependencies.rst"
     df = pd.DataFrame.from_dict(deps_all, orient='index', columns=['Commit', 'Project'])

From 76dae8d8c1764e94c99effe5d3f4f9b0ec0d4c99 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 24 Mar 2023 14:08:57 +0700
Subject: [PATCH 216/691] update host example to use new tuh mem macros

---
 .../host_hid_to_device_cdc/src/tusb_config.h     | 16 ++++++++++++----
 examples/host/bare_api/src/tusb_config.h         |  8 ++++----
 examples/host/cdc_msc_hid/src/tusb_config.h      |  8 ++++----
 examples/host/hid_controller/src/tusb_config.h   |  8 ++++----
 .../host/msc_file_explorer/src/tusb_config.h     |  8 ++++----
 5 files changed, 28 insertions(+), 20 deletions(-)

diff --git a/examples/dual/host_hid_to_device_cdc/src/tusb_config.h b/examples/dual/host_hid_to_device_cdc/src/tusb_config.h
index 604cc6681..2185cd1f1 100644
--- a/examples/dual/host_hid_to_device_cdc/src/tusb_config.h
+++ b/examples/dual/host_hid_to_device_cdc/src/tusb_config.h
@@ -95,12 +95,12 @@
  * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") ))
  * - CFG_TUSB_MEM_ALIGN   : __attribute__ ((aligned(4)))
  */
-#ifndef CFG_TUSB_MEM_SECTION
-#define CFG_TUSB_MEM_SECTION
+#ifndef CFG_TUD_MEM_SECTION
+#define CFG_TUD_MEM_SECTION
 #endif
 
-#ifndef CFG_TUSB_MEM_ALIGN
-#define CFG_TUSB_MEM_ALIGN        __attribute__ ((aligned(4)))
+#ifndef CFG_TUD_MEM_ALIGN
+#define CFG_TUD_MEM_ALIGN        __attribute__ ((aligned(4)))
 #endif
 
 //--------------------------------------------------------------------
@@ -128,6 +128,14 @@
 // Size of buffer to hold descriptors and other data used for enumeration
 #define CFG_TUH_ENUMERATION_BUFSIZE 256
 
+#ifndef CFG_TUH_MEM_SECTION
+#define CFG_TUH_MEM_SECTION
+#endif
+
+#ifndef CFG_TUH_MEM_ALIGN
+#define CFG_TUH_MEM_ALIGN        __attribute__ ((aligned(4)))
+#endif
+
 #define CFG_TUH_HUB                 1
 // max device support (excluding hub device)
 #define CFG_TUH_DEVICE_MAX          (CFG_TUH_HUB ? 4 : 1) // hub typically has 4 ports
diff --git a/examples/host/bare_api/src/tusb_config.h b/examples/host/bare_api/src/tusb_config.h
index 64be41a4e..ede9618d3 100644
--- a/examples/host/bare_api/src/tusb_config.h
+++ b/examples/host/bare_api/src/tusb_config.h
@@ -80,12 +80,12 @@
  * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") ))
  * - CFG_TUSB_MEM_ALIGN   : __attribute__ ((aligned(4)))
  */
-#ifndef CFG_TUSB_MEM_SECTION
-#define CFG_TUSB_MEM_SECTION
+#ifndef CFG_TUH_MEM_SECTION
+#define CFG_TUH_MEM_SECTION
 #endif
 
-#ifndef CFG_TUSB_MEM_ALIGN
-#define CFG_TUSB_MEM_ALIGN          __attribute__ ((aligned(4)))
+#ifndef CFG_TUH_MEM_ALIGN
+#define CFG_TUH_MEM_ALIGN        __attribute__ ((aligned(4)))
 #endif
 
 //--------------------------------------------------------------------
diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h
index 6c5e68a87..1152e4910 100644
--- a/examples/host/cdc_msc_hid/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid/src/tusb_config.h
@@ -80,12 +80,12 @@
  * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") ))
  * - CFG_TUSB_MEM_ALIGN   : __attribute__ ((aligned(4)))
  */
-#ifndef CFG_TUSB_MEM_SECTION
-#define CFG_TUSB_MEM_SECTION
+#ifndef CFG_TUH_MEM_SECTION
+#define CFG_TUH_MEM_SECTION
 #endif
 
-#ifndef CFG_TUSB_MEM_ALIGN
-#define CFG_TUSB_MEM_ALIGN          __attribute__ ((aligned(4)))
+#ifndef CFG_TUH_MEM_ALIGN
+#define CFG_TUH_MEM_ALIGN        __attribute__ ((aligned(4)))
 #endif
 
 //--------------------------------------------------------------------
diff --git a/examples/host/hid_controller/src/tusb_config.h b/examples/host/hid_controller/src/tusb_config.h
index f5ae2fd6f..d37fc02d2 100644
--- a/examples/host/hid_controller/src/tusb_config.h
+++ b/examples/host/hid_controller/src/tusb_config.h
@@ -80,12 +80,12 @@
  * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") ))
  * - CFG_TUSB_MEM_ALIGN   : __attribute__ ((aligned(4)))
  */
-#ifndef CFG_TUSB_MEM_SECTION
-#define CFG_TUSB_MEM_SECTION
+#ifndef CFG_TUH_MEM_SECTION
+#define CFG_TUH_MEM_SECTION
 #endif
 
-#ifndef CFG_TUSB_MEM_ALIGN
-#define CFG_TUSB_MEM_ALIGN          __attribute__ ((aligned(4)))
+#ifndef CFG_TUH_MEM_ALIGN
+#define CFG_TUH_MEM_ALIGN        __attribute__ ((aligned(4)))
 #endif
 
 //--------------------------------------------------------------------
diff --git a/examples/host/msc_file_explorer/src/tusb_config.h b/examples/host/msc_file_explorer/src/tusb_config.h
index eaf3ea6d4..1e0d067bf 100644
--- a/examples/host/msc_file_explorer/src/tusb_config.h
+++ b/examples/host/msc_file_explorer/src/tusb_config.h
@@ -80,12 +80,12 @@
  * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") ))
  * - CFG_TUSB_MEM_ALIGN   : __attribute__ ((aligned(4)))
  */
-#ifndef CFG_TUSB_MEM_SECTION
-#define CFG_TUSB_MEM_SECTION
+#ifndef CFG_TUH_MEM_SECTION
+#define CFG_TUH_MEM_SECTION
 #endif
 
-#ifndef CFG_TUSB_MEM_ALIGN
-#define CFG_TUSB_MEM_ALIGN          __attribute__ ((aligned(4)))
+#ifndef CFG_TUH_MEM_ALIGN
+#define CFG_TUH_MEM_ALIGN        __attribute__ ((aligned(4)))
 #endif
 
 //--------------------------------------------------------------------

From b05422978004f076de665f5101e5cc1bac34175c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 24 Mar 2023 17:26:30 +0700
Subject: [PATCH 217/691] fix cdc host enumeration issue when device does not
 support line request

---
 src/class/cdc/cdc_host.c | 39 +++++++++++++++++++++++----------------
 1 file changed, 23 insertions(+), 16 deletions(-)

diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index 734ddd1b8..08b82416d 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -323,7 +323,8 @@ bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_c
     .user_data   = user_data
   };
 
-  return tuh_control_xfer(&xfer);
+  TU_ASSERT(tuh_control_xfer(&xfer));
+  return true;
 }
 
 bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
@@ -363,7 +364,8 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding,
     .user_data   = user_data
   };
 
-  return tuh_control_xfer(&xfer);
+  TU_ASSERT(tuh_control_xfer(&xfer));
+  return true;
 }
 
 //--------------------------------------------------------------------+
@@ -543,26 +545,31 @@ static void process_cdc_config(tuh_xfer_t* xfer)
   uintptr_t const state = xfer->user_data;
   uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
   uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
-  TU_ASSERT(idx != TUSB_INDEX_INVALID_8, );
+  cdch_interface_t * p_cdc = get_itf(idx);
+  TU_ASSERT(p_cdc, );
 
   switch(state)
   {
     case CONFIG_SET_CONTROL_LINE_STATE:
-    #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
-      TU_ASSERT( tuh_cdc_set_control_line_state(idx, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_cdc_config, CONFIG_SET_LINE_CODING), );
-      break;
-    #endif
-    TU_ATTR_FALLTHROUGH;
+      #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
+      if (p_cdc->acm_capability.support_line_request)
+      {
+        TU_ASSERT( tuh_cdc_set_control_line_state(idx, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_cdc_config, CONFIG_SET_LINE_CODING), );
+        break;
+      }
+      #endif
+      TU_ATTR_FALLTHROUGH;
 
     case CONFIG_SET_LINE_CODING:
-    #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
-    {
-      cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
-      TU_ASSERT( tuh_cdc_set_line_coding(idx, &line_coding, process_cdc_config, CONFIG_COMPLETE), );
-      break;
-    }
-    #endif
-    TU_ATTR_FALLTHROUGH;
+      #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
+      if (p_cdc->acm_capability.support_line_request)
+      {
+        cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
+        TU_ASSERT( tuh_cdc_set_line_coding(idx, &line_coding, process_cdc_config, CONFIG_COMPLETE), );
+        break;
+      }
+      #endif
+      TU_ATTR_FALLTHROUGH;
 
     case CONFIG_COMPLETE:
       if (tuh_cdc_mount_cb) tuh_cdc_mount_cb(idx);

From df5f60b6d67400891c5887afe29fcac5644cc668 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 24 Mar 2023 17:36:29 +0700
Subject: [PATCH 218/691] fix shadow warning

---
 src/class/cdc/cdc_host.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index 08b82416d..c0cc41adf 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -575,7 +575,6 @@ static void process_cdc_config(tuh_xfer_t* xfer)
       if (tuh_cdc_mount_cb) tuh_cdc_mount_cb(idx);
 
       // Prepare for incoming data
-      cdch_interface_t* p_cdc = get_itf(idx);
       tu_edpt_stream_read_xfer(&p_cdc->stream.rx);
 
       // notify usbh that driver enumeration is complete

From 97f9321e1d94ddb4904dba0a472790a1189e53f2 Mon Sep 17 00:00:00 2001
From: kkitayam <45088311+kkitayam@users.noreply.github.com>
Date: Fri, 3 Mar 2023 22:06:57 +0900
Subject: [PATCH 219/691] Add handling for bulk EPs

---
 src/class/video/video_device.c | 39 +++++++++++++++++++++-------------
 1 file changed, 24 insertions(+), 15 deletions(-)

diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c
index d6e98602b..e03ca6b1f 100644
--- a/src/class/video/video_device.c
+++ b/src/class/video/video_device.c
@@ -680,24 +680,30 @@ static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint
       (video_probe_and_commit_control_t *)&stm->ep_buf;
     tu_memclr(param, sizeof(*param));
     TU_LOG2("    done 0\n");
-    return _update_streaming_parameters(stm, param);
+    if (!_update_streaming_parameters(stm, param))
+      return false;
+    /* Open bulk endpoint if present. */
+    for (i = 0, cur = tu_desc_next(cur); i < numeps; ++i, cur = tu_desc_next(cur)) {
+      cur = _find_desc_ep(cur, end);
+      TU_ASSERT(cur < end);
+      tusb_desc_endpoint_t const *ep = (tusb_desc_endpoint_t const*)cur;
+      TU_VERIFY(TUSB_XFER_BULK == ep->bmAttributes.xfer);
+      TU_ASSERT(usbd_edpt_open(rhport, ep));
+      stm->desc.ep[i] = (uint16_t)(cur - desc);
+      TU_LOG2("    open EP%02x\n", _desc_ep_addr(cur));
+    }
+    return true;
   }
-  /* Open endpoints of the new settings. */
+  /* Open isochronous endpoints of the new settings. */
   for (i = 0, cur = tu_desc_next(cur); i < numeps; ++i, cur = tu_desc_next(cur)) {
     cur = _find_desc_ep(cur, end);
     TU_ASSERT(cur < end);
     tusb_desc_endpoint_t const *ep = (tusb_desc_endpoint_t const*)cur;
-    if (!stm->max_payload_transfer_size) {
-      video_probe_and_commit_control_t const *param = (video_probe_and_commit_control_t const*)&stm->ep_buf;
-      uint_fast32_t max_size = param->dwMaxPayloadTransferSize;
-      if ((TUSB_XFER_ISOCHRONOUS == ep->bmAttributes.xfer) &&
-          (tu_edpt_packet_size(ep) < max_size))
-      {
-        /* FS must be less than or equal to max packet size */
-        return false;
-      }
-      /* Set the negotiated value */
-      stm->max_payload_transfer_size = max_size;
+    uint_fast32_t max_size = stm->max_payload_transfer_size;
+    if ((TUSB_XFER_ISOCHRONOUS == ep->bmAttributes.xfer) &&
+        (tu_edpt_packet_size(ep) < max_size)) {
+      /* FS must be less than or equal to max packet size */
+      return false;
     }
     TU_ASSERT(usbd_edpt_open(rhport, ep));
     stm->desc.ep[i] = (uint16_t) (cur - desc);
@@ -982,9 +988,12 @@ static int handle_video_stm_cs_req(uint8_t rhport, uint8_t stage,
             TU_VERIFY(sizeof(video_probe_and_commit_control_t) >= request->wLength, VIDEO_ERROR_UNKNOWN);
             TU_VERIFY(tud_control_xfer(rhport, request, self->ep_buf, sizeof(video_probe_and_commit_control_t)), VIDEO_ERROR_UNKNOWN);
           } else if (stage == CONTROL_STAGE_DATA) {
-            TU_VERIFY(_update_streaming_parameters(self, (video_probe_and_commit_control_t*)self->ep_buf), VIDEO_ERROR_INVALID_VALUE_WITHIN_RANGE);
+            video_probe_and_commit_control_t *param = (video_probe_and_commit_control_t*)self->ep_buf;
+            TU_VERIFY(_update_streaming_parameters(self, param), VIDEO_ERROR_INVALID_VALUE_WITHIN_RANGE);
+            /* Set the negotiated value */
+            self->max_payload_transfer_size = param->dwMaxPayloadTransferSize;
             if (tud_video_commit_cb) {
-              return tud_video_commit_cb(self->index_vc, self->index_vs, (video_probe_and_commit_control_t*)self->ep_buf);
+              return tud_video_commit_cb(self->index_vc, self->index_vs, param);
             }
           }
           return VIDEO_ERROR_NONE;

From 78732d6733fa75e6f8b25dc9e694d4d38e7b72ce Mon Sep 17 00:00:00 2001
From: kkitayam <45088311+kkitayam@users.noreply.github.com>
Date: Fri, 10 Mar 2023 22:51:49 +0900
Subject: [PATCH 220/691] Fix streaming interface handling

---
 src/class/video/video_device.c | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c
index e03ca6b1f..d53de2bac 100644
--- a/src/class/video/video_device.c
+++ b/src/class/video/video_device.c
@@ -709,11 +709,6 @@ static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint
     stm->desc.ep[i] = (uint16_t) (cur - desc);
     TU_LOG2("    open EP%02x\n", _desc_ep_addr(cur));
   }
-  /* initialize payload header */
-  tusb_video_payload_header_t *hdr = (tusb_video_payload_header_t*)stm->ep_buf;
-  hdr->bHeaderLength = sizeof(*hdr);
-  hdr->bmHeaderInfo  = 0;
-
   TU_LOG2("    done\n");
   return true;
 }
@@ -992,8 +987,15 @@ static int handle_video_stm_cs_req(uint8_t rhport, uint8_t stage,
             TU_VERIFY(_update_streaming_parameters(self, param), VIDEO_ERROR_INVALID_VALUE_WITHIN_RANGE);
             /* Set the negotiated value */
             self->max_payload_transfer_size = param->dwMaxPayloadTransferSize;
+            int ret = VIDEO_ERROR_NONE;
             if (tud_video_commit_cb) {
-              return tud_video_commit_cb(self->index_vc, self->index_vs, param);
+              ret = tud_video_commit_cb(self->index_vc, self->index_vs, param);
+            }
+            if (VIDEO_ERROR_NONE == ret) {
+              /* initialize payload header */
+              tusb_video_payload_header_t *hdr = (tusb_video_payload_header_t*)self->ep_buf;
+              hdr->bHeaderLength = sizeof(*hdr);
+              hdr->bmHeaderInfo  = 0;
             }
           }
           return VIDEO_ERROR_NONE;
@@ -1166,6 +1168,7 @@ uint16_t videod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
   tusb_desc_vc_itf_t const *vc = _get_desc_vc(self);
   uint_fast8_t bInCollection   = vc->ctl.bInCollection;
 
+  videod_streaming_interface_t *default_stm = NULL;
   /* Find the end of the video interface descriptor */
   void const *cur = _next_desc_itf(itf_desc, end);
   for (uint8_t stm_idx = 0; stm_idx < bInCollection; ++stm_idx) {
@@ -1183,7 +1186,9 @@ uint16_t videod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
     stm->desc.beg = (uint16_t) ((uintptr_t)cur - (uintptr_t)itf_desc);
     cur = _next_desc_itf(cur, end);
     stm->desc.end = (uint16_t) ((uintptr_t)cur - (uintptr_t)itf_desc);
+    if (!default_stm) default_stm = stm;
   }
+  TU_VERIFY(_open_vs_itf(rhport, default_stm, 0), 0);
   self->len = (uint16_t) ((uintptr_t)cur - (uintptr_t)itf_desc);
   return (uint16_t) ((uintptr_t)cur - (uintptr_t)itf_desc);
 }

From e508831561da46cfd03e59876e4218aadd57855c Mon Sep 17 00:00:00 2001
From: kkitayam <45088311+kkitayam@users.noreply.github.com>
Date: Mon, 13 Mar 2023 22:50:31 +0900
Subject: [PATCH 221/691] Update handle streaming interface

---
 src/class/video/video_device.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c
index d53de2bac..8dd39242f 100644
--- a/src/class/video/video_device.c
+++ b/src/class/video/video_device.c
@@ -1168,7 +1168,6 @@ uint16_t videod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
   tusb_desc_vc_itf_t const *vc = _get_desc_vc(self);
   uint_fast8_t bInCollection   = vc->ctl.bInCollection;
 
-  videod_streaming_interface_t *default_stm = NULL;
   /* Find the end of the video interface descriptor */
   void const *cur = _next_desc_itf(itf_desc, end);
   for (uint8_t stm_idx = 0; stm_idx < bInCollection; ++stm_idx) {
@@ -1186,9 +1185,16 @@ uint16_t videod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
     stm->desc.beg = (uint16_t) ((uintptr_t)cur - (uintptr_t)itf_desc);
     cur = _next_desc_itf(cur, end);
     stm->desc.end = (uint16_t) ((uintptr_t)cur - (uintptr_t)itf_desc);
-    if (!default_stm) default_stm = stm;
+    if (0 == stm_idx && 1 == bInCollection) {
+      /* If there is only one streaming interface and no alternate settings,
+       * host may not issue set_interface so open the streaming interface here. */
+      uint8_t const *sbeg = (uint8_t const*)itf_desc + stm->desc.beg;
+      uint8_t const *send = (uint8_t const*)itf_desc + stm->desc.end;
+      if (end == _find_desc_itf(sbeg, send, _desc_itfnum(sbeg), 1)) {
+        TU_VERIFY(_open_vs_itf(rhport, stm, 0), 0);
+      }
+    }
   }
-  TU_VERIFY(_open_vs_itf(rhport, default_stm, 0), 0);
   self->len = (uint16_t) ((uintptr_t)cur - (uintptr_t)itf_desc);
   return (uint16_t) ((uintptr_t)cur - (uintptr_t)itf_desc);
 }
@@ -1201,7 +1207,6 @@ bool videod_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_
   int err;
   TU_VERIFY(request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_INTERFACE);
   uint_fast8_t itfnum = tu_u16_low(request->wIndex);
-
   /* Identify which control interface to use */
   uint_fast8_t itf;
   for (itf = 0; itf < CFG_TUD_VIDEO; ++itf) {

From 389babf20bcf77159a268bbdebd534bc7e1d1bb9 Mon Sep 17 00:00:00 2001
From: kkitayam <45088311+kkitayam@users.noreply.github.com>
Date: Mon, 13 Mar 2023 22:51:21 +0900
Subject: [PATCH 222/691] Add descriptor for a bulk endpoint as a streaming
 endpoint

---
 .../device/video_capture/src/tusb_config.h    |  3 ++
 .../video_capture/src/usb_descriptors.c       | 10 ++++
 .../video_capture/src/usb_descriptors.h       | 51 +++++++++++++++++++
 3 files changed, 64 insertions(+)

diff --git a/examples/device/video_capture/src/tusb_config.h b/examples/device/video_capture/src/tusb_config.h
index e567ba669..274bf2b9c 100644
--- a/examples/device/video_capture/src/tusb_config.h
+++ b/examples/device/video_capture/src/tusb_config.h
@@ -100,6 +100,9 @@
 // video streaming endpoint size
 #define CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE  256
 
+// use bulk endpoint for streaming interface
+#define CFG_TUD_VIDEO_STREAMING_BULK 0
+
 #ifdef __cplusplus
  }
 #endif
diff --git a/examples/device/video_capture/src/usb_descriptors.c b/examples/device/video_capture/src/usb_descriptors.c
index af18d15d1..f85e3cd8a 100644
--- a/examples/device/video_capture/src/usb_descriptors.c
+++ b/examples/device/video_capture/src/usb_descriptors.c
@@ -77,6 +77,8 @@ uint8_t const * tud_descriptor_device_cb(void)
 
 #if defined(CFG_EXAMPLE_VIDEO_READONLY) && !defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG)
 #define CONFIG_TOTAL_LEN    (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_MJPEG_LEN)
+#elif 1 == CFG_TUD_VIDEO_STREAMING_BULK
+#define CONFIG_TOTAL_LEN    (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_UNCOMPR_BULK_LEN)
 #else
 #define CONFIG_TOTAL_LEN    (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_UNCOMPR_LEN)
 #endif
@@ -84,7 +86,11 @@ uint8_t const * tud_descriptor_device_cb(void)
 #if TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
   // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number
   // 0 control, 1 In, 2 Bulk, 3 Iso, 4 In, 5 Bulk etc ...
+#if 1 == CFG_TUD_VIDEO_STREAMING_BULK
+  #define EPNUM_VIDEO_IN    0x82
+#else
   #define EPNUM_VIDEO_IN    0x83
+#endif
 
 #elif TU_CHECK_MCU(OPT_MCU_NRF5X)
   // nRF5x ISO can only be endpoint 8
@@ -105,6 +111,10 @@ uint8_t const desc_fs_configuration[] =
   TUD_VIDEO_CAPTURE_DESCRIPTOR_MJPEG(4, EPNUM_VIDEO_IN,
                                      FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE,
                                      CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE)
+#elif 1 == CFG_TUD_VIDEO_STREAMING_BULK
+  TUD_VIDEO_CAPTURE_DESCRIPTOR_UNCOMPR_BULK(4, EPNUM_VIDEO_IN,
+                                       FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE,
+                                       64)
 #else
   TUD_VIDEO_CAPTURE_DESCRIPTOR_UNCOMPR(4, EPNUM_VIDEO_IN,
                                        FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE,
diff --git a/examples/device/video_capture/src/usb_descriptors.h b/examples/device/video_capture/src/usb_descriptors.h
index 93f148a82..7b7857246 100644
--- a/examples/device/video_capture/src/usb_descriptors.h
+++ b/examples/device/video_capture/src/usb_descriptors.h
@@ -79,6 +79,22 @@ enum {
     + 7/* Endpoint */\
   )
 
+#define TUD_VIDEO_CAPTURE_DESC_UNCOMPR_BULK_LEN (\
+    TUD_VIDEO_DESC_IAD_LEN\
+    /* control */\
+    + TUD_VIDEO_DESC_STD_VC_LEN\
+    + (TUD_VIDEO_DESC_CS_VC_LEN + 1/*bInCollection*/)\
+    + TUD_VIDEO_DESC_CAMERA_TERM_LEN\
+    + TUD_VIDEO_DESC_OUTPUT_TERM_LEN\
+    /* Interface 1, Alternate 0 */\
+    + TUD_VIDEO_DESC_STD_VS_LEN\
+    + (TUD_VIDEO_DESC_CS_VS_IN_LEN + 1/*bNumFormats x bControlSize*/)\
+    + TUD_VIDEO_DESC_CS_VS_FMT_UNCOMPR_LEN\
+    + TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT_LEN\
+    + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN\
+    + 7/* Endpoint */\
+  )
+
 /* Windows support YUY2 and NV12
  * https://docs.microsoft.com/en-us/windows-hardware/drivers/stream/usb-video-class-driver-overview */
 
@@ -165,4 +181,39 @@ enum {
     /* EP */ \
     TUD_VIDEO_DESC_EP_ISO(_epin, _epsize, 1)
 
+
+#define TUD_VIDEO_CAPTURE_DESCRIPTOR_UNCOMPR_BULK(_stridx, _epin, _width, _height, _fps, _epsize) \
+  TUD_VIDEO_DESC_IAD(ITF_NUM_VIDEO_CONTROL, /* 2 Interfaces */ 0x02, _stridx), \
+  /* Video control 0 */ \
+  TUD_VIDEO_DESC_STD_VC(ITF_NUM_VIDEO_CONTROL, 0, _stridx), \
+    TUD_VIDEO_DESC_CS_VC( /* UVC 1.5*/ 0x0150, \
+         /* wTotalLength - bLength */ \
+         TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, \
+         UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \
+      TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0,\
+                                 /*wObjectiveFocalLengthMin*/0, /*wObjectiveFocalLengthMax*/0,\
+                                 /*wObjectiveFocalLength*/0, /*bmControls*/0), \
+      TUD_VIDEO_DESC_OUTPUT_TERM(UVC_ENTITY_CAP_OUTPUT_TERMINAL, VIDEO_TT_STREAMING, 0, 1, 0), \
+  /* Video stream alt. 0 */ \
+  TUD_VIDEO_DESC_STD_VS(ITF_NUM_VIDEO_STREAMING, 0, 1, _stridx), \
+    /* Video stream header for without still image capture */ \
+    TUD_VIDEO_DESC_CS_VS_INPUT( /*bNumFormats*/1, \
+        /*wTotalLength - bLength */\
+        TUD_VIDEO_DESC_CS_VS_FMT_UNCOMPR_LEN\
+        + TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT_LEN\
+        + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN,\
+        _epin, /*bmInfo*/0, /*bTerminalLink*/UVC_ENTITY_CAP_OUTPUT_TERMINAL, \
+        /*bStillCaptureMethod*/0, /*bTriggerSupport*/0, /*bTriggerUsage*/0, \
+        /*bmaControls(1)*/0), \
+      /* Video stream format */ \
+      TUD_VIDEO_DESC_CS_VS_FMT_YUY2(/*bFormatIndex*/1, /*bNumFrameDescriptors*/1, \
+        /*bDefaultFrameIndex*/1, 0, 0, 0, /*bCopyProtect*/0), \
+        /* Video stream frame format */ \
+        TUD_VIDEO_DESC_CS_VS_FRM_UNCOMPR_CONT(/*bFrameIndex */1, 0, _width, _height, \
+            _width * _height * 16, _width * _height * 16 * _fps, \
+            _width * _height * 16, \
+            (10000000/_fps), (10000000/_fps), (10000000/_fps)*_fps, (10000000/_fps)), \
+        TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING(VIDEO_COLOR_PRIMARIES_BT709, VIDEO_COLOR_XFER_CH_BT709, VIDEO_COLOR_COEF_SMPTE170M), \
+        TUD_VIDEO_DESC_EP_BULK(_epin, _epsize, 1)
+
 #endif

From 993b8d66861253408c1029bf98923ccba7317482 Mon Sep 17 00:00:00 2001
From: kkitayam <45088311+kkitayam@users.noreply.github.com>
Date: Sat, 25 Mar 2023 22:13:20 +0900
Subject: [PATCH 223/691] Add state variable

---
 src/class/video/video_device.c | 68 +++++++++++++++++++++-------------
 1 file changed, 42 insertions(+), 26 deletions(-)

diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c
index 8dd39242f..91f452afc 100644
--- a/src/class/video/video_device.c
+++ b/src/class/video/video_device.c
@@ -37,6 +37,10 @@
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
+#define VS_STATE_PROBING      0     /* Configuration in progress */
+#define VS_STATE_COMMITTED    1     /* Ready for streaming or Streaming via bulk endpoint */
+#define VS_STATE_STREAMING    2     /* Streaming via isochronous endpoint */
+
 typedef struct {
   tusb_desc_interface_t            std;
   tusb_desc_cs_video_ctl_itf_hdr_t ctl;
@@ -102,6 +106,7 @@ typedef struct TU_ATTR_PACKED {
   uint32_t offset;   /* offset for the next payload transfer */
   uint32_t max_payload_transfer_size;
   uint8_t  error_code;/* error code */
+  uint8_t  state;    /* 0:probing 1:committed 2:streaming */
   /*------------- From this point, data is not cleared by bus reset -------------*/
   CFG_TUSB_MEM_ALIGN uint8_t ep_buf[CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE]; /* EP transfer buffer for streaming */
 } videod_streaming_interface_t;
@@ -639,6 +644,17 @@ static bool _open_vc_itf(uint8_t rhport, videod_interface_t *self, uint_fast8_t
   return true;
 }
 
+static bool _init_vs_configuration(videod_streaming_interface_t *stm)
+{
+  /* initialize streaming settings */
+  stm->state = VS_STATE_PROBING;
+  stm->max_payload_transfer_size = 0;
+  video_probe_and_commit_control_t *param =
+    (video_probe_and_commit_control_t *)&stm->ep_buf;
+  tu_memclr(param, sizeof(*param));
+  return _update_streaming_parameters(stm, param);
+}
+
 /** Set the alternate setting to own video streaming interface.
  *
  * @param[in,out] stm      Streaming interface context.
@@ -672,43 +688,32 @@ static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint
 
   uint_fast8_t numeps = ((tusb_desc_interface_t const *)cur)->bNumEndpoints;
   TU_ASSERT(numeps <= TU_ARRAY_SIZE(stm->desc.ep));
-  stm->desc.cur = (uint16_t) (cur - desc); /* Save the offset of the new settings */
-  if (!altnum) {
-    /* initialize streaming settings */
-    stm->max_payload_transfer_size = 0;
-    video_probe_and_commit_control_t *param =
-      (video_probe_and_commit_control_t *)&stm->ep_buf;
-    tu_memclr(param, sizeof(*param));
-    TU_LOG2("    done 0\n");
-    if (!_update_streaming_parameters(stm, param))
-      return false;
-    /* Open bulk endpoint if present. */
-    for (i = 0, cur = tu_desc_next(cur); i < numeps; ++i, cur = tu_desc_next(cur)) {
-      cur = _find_desc_ep(cur, end);
-      TU_ASSERT(cur < end);
-      tusb_desc_endpoint_t const *ep = (tusb_desc_endpoint_t const*)cur;
-      TU_VERIFY(TUSB_XFER_BULK == ep->bmAttributes.xfer);
-      TU_ASSERT(usbd_edpt_open(rhport, ep));
-      stm->desc.ep[i] = (uint16_t)(cur - desc);
-      TU_LOG2("    open EP%02x\n", _desc_ep_addr(cur));
-    }
-    return true;
+  stm->desc.cur = (uint16_t)(cur - desc); /* Save the offset of the new settings */
+  if (!altnum && (VS_STATE_COMMITTED != stm->state)) {
+    TU_VERIFY(_init_vs_configuration(stm));
   }
-  /* Open isochronous endpoints of the new settings. */
+  /* Open bulk or isochronous endpoints of the new settings. */
   for (i = 0, cur = tu_desc_next(cur); i < numeps; ++i, cur = tu_desc_next(cur)) {
     cur = _find_desc_ep(cur, end);
     TU_ASSERT(cur < end);
     tusb_desc_endpoint_t const *ep = (tusb_desc_endpoint_t const*)cur;
     uint_fast32_t max_size = stm->max_payload_transfer_size;
-    if ((TUSB_XFER_ISOCHRONOUS == ep->bmAttributes.xfer) &&
-        (tu_edpt_packet_size(ep) < max_size)) {
-      /* FS must be less than or equal to max packet size */
-      return false;
+    if (altnum) {
+      if ((TUSB_XFER_ISOCHRONOUS == ep->bmAttributes.xfer) &&
+          (tu_edpt_packet_size(ep) < max_size)) {
+        /* FS must be less than or equal to max packet size */
+        return false;
+      }
+    } else {
+      TU_VERIFY(TUSB_XFER_BULK == ep->bmAttributes.xfer);
     }
     TU_ASSERT(usbd_edpt_open(rhport, ep));
     stm->desc.ep[i] = (uint16_t) (cur - desc);
     TU_LOG2("    open EP%02x\n", _desc_ep_addr(cur));
   }
+  if (altnum) {
+    stm->state = VS_STATE_STREAMING;
+  }
   TU_LOG2("    done\n");
   return true;
 }
@@ -921,6 +926,10 @@ static int handle_video_stm_cs_req(uint8_t rhport, uint8_t stage,
       break;
 
     case VIDEO_VS_CTL_PROBE:
+      if (self->state != VS_STATE_PROBING) {
+        self->state = VS_STATE_PROBING;
+        _init_vs_configuration(self);
+      }
       switch (request->bRequest) {
         case VIDEO_REQUEST_SET_CUR:
           if (stage == CONTROL_STAGE_SETUP) {
@@ -992,6 +1001,10 @@ static int handle_video_stm_cs_req(uint8_t rhport, uint8_t stage,
               ret = tud_video_commit_cb(self->index_vc, self->index_vs, param);
             }
             if (VIDEO_ERROR_NONE == ret) {
+              self->state   = VS_STATE_COMMITTED;
+              self->buffer  = NULL;
+              self->bufsize = 0;
+              self->offset  = 0;
               /* initialize payload header */
               tusb_video_payload_header_t *hdr = (tusb_video_payload_header_t*)self->ep_buf;
               hdr->bHeaderLength = sizeof(*hdr);
@@ -1080,6 +1093,7 @@ bool tud_video_n_streaming(uint_fast8_t ctl_idx, uint_fast8_t stm_idx)
   TU_ASSERT(stm_idx < CFG_TUD_VIDEO_STREAMING);
   videod_streaming_interface_t *stm = _get_instance_streaming(ctl_idx, stm_idx);
   if (!stm || !stm->desc.ep[0]) return false;
+  if (stm->state == VS_STATE_PROBING) return false;
   return true;
 }
 
@@ -1090,6 +1104,7 @@ bool tud_video_n_frame_xfer(uint_fast8_t ctl_idx, uint_fast8_t stm_idx, void *bu
   if (!buffer || !bufsize) return false;
   videod_streaming_interface_t *stm = _get_instance_streaming(ctl_idx, stm_idx);
   if (!stm || !stm->desc.ep[0] || stm->buffer) return false;
+  if (stm->state == VS_STATE_PROBING) return false;
 
   /* Find EP address */
   uint8_t const *desc = _videod_itf[stm->index_vc].beg;
@@ -1185,6 +1200,7 @@ uint16_t videod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
     stm->desc.beg = (uint16_t) ((uintptr_t)cur - (uintptr_t)itf_desc);
     cur = _next_desc_itf(cur, end);
     stm->desc.end = (uint16_t) ((uintptr_t)cur - (uintptr_t)itf_desc);
+    stm->state = VS_STATE_PROBING;
     if (0 == stm_idx && 1 == bInCollection) {
       /* If there is only one streaming interface and no alternate settings,
        * host may not issue set_interface so open the streaming interface here. */

From 5ce60c5d207b9e7de419be6956164aebde14c3f2 Mon Sep 17 00:00:00 2001
From: kkitayam <45088311+kkitayam@users.noreply.github.com>
Date: Sun, 26 Mar 2023 21:22:52 +0900
Subject: [PATCH 224/691] Add MJPEG descriptor for bulk transfer

---
 .../video_capture/src/usb_descriptors.c       | 30 ++++++++---
 .../video_capture/src/usb_descriptors.h       | 52 +++++++++++++++++++
 2 files changed, 74 insertions(+), 8 deletions(-)

diff --git a/examples/device/video_capture/src/usb_descriptors.c b/examples/device/video_capture/src/usb_descriptors.c
index f85e3cd8a..9847cf7c5 100644
--- a/examples/device/video_capture/src/usb_descriptors.c
+++ b/examples/device/video_capture/src/usb_descriptors.c
@@ -76,11 +76,17 @@ uint8_t const * tud_descriptor_device_cb(void)
 //--------------------------------------------------------------------+
 
 #if defined(CFG_EXAMPLE_VIDEO_READONLY) && !defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG)
-#define CONFIG_TOTAL_LEN    (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_MJPEG_LEN)
-#elif 1 == CFG_TUD_VIDEO_STREAMING_BULK
-#define CONFIG_TOTAL_LEN    (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_UNCOMPR_BULK_LEN)
+# if 1 == CFG_TUD_VIDEO_STREAMING_BULK
+#  define CONFIG_TOTAL_LEN    (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_MJPEG_BULK_LEN)
+# else
+#  define CONFIG_TOTAL_LEN    (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_MJPEG_LEN)
+# endif
 #else
-#define CONFIG_TOTAL_LEN    (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_UNCOMPR_LEN)
+# if 1 == CFG_TUD_VIDEO_STREAMING_BULK
+#  define CONFIG_TOTAL_LEN    (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_UNCOMPR_BULK_LEN)
+# else
+#  define CONFIG_TOTAL_LEN    (TUD_CONFIG_DESC_LEN + TUD_VIDEO_CAPTURE_DESC_UNCOMPR_LEN)
+# endif
 #endif
 
 #if TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
@@ -108,17 +114,25 @@ uint8_t const desc_fs_configuration[] =
 
   // IAD for Video Control
 #if defined(CFG_EXAMPLE_VIDEO_READONLY) && !defined(CFG_EXAMPLE_VIDEO_DISABLE_MJPEG)
+# if 1 == CFG_TUD_VIDEO_STREAMING_BULK
+  TUD_VIDEO_CAPTURE_DESCRIPTOR_MJPEG_BULK(4, EPNUM_VIDEO_IN,
+                                          FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE,
+                                          64)
+# else
   TUD_VIDEO_CAPTURE_DESCRIPTOR_MJPEG(4, EPNUM_VIDEO_IN,
                                      FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE,
                                      CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE)
-#elif 1 == CFG_TUD_VIDEO_STREAMING_BULK
-  TUD_VIDEO_CAPTURE_DESCRIPTOR_UNCOMPR_BULK(4, EPNUM_VIDEO_IN,
-                                       FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE,
-                                       64)
+# endif
 #else
+# if 1 == CFG_TUD_VIDEO_STREAMING_BULK
+  TUD_VIDEO_CAPTURE_DESCRIPTOR_UNCOMPR_BULK(4, EPNUM_VIDEO_IN,
+                                            FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE,
+                                            64)
+# else
   TUD_VIDEO_CAPTURE_DESCRIPTOR_UNCOMPR(4, EPNUM_VIDEO_IN,
                                        FRAME_WIDTH, FRAME_HEIGHT, FRAME_RATE,
                                        CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE)
+# endif
 #endif
 };
 
diff --git a/examples/device/video_capture/src/usb_descriptors.h b/examples/device/video_capture/src/usb_descriptors.h
index 7b7857246..b924c8dbe 100644
--- a/examples/device/video_capture/src/usb_descriptors.h
+++ b/examples/device/video_capture/src/usb_descriptors.h
@@ -95,6 +95,22 @@ enum {
     + 7/* Endpoint */\
   )
 
+#define TUD_VIDEO_CAPTURE_DESC_MJPEG_BULK_LEN (\
+    TUD_VIDEO_DESC_IAD_LEN\
+    /* control */\
+    + TUD_VIDEO_DESC_STD_VC_LEN\
+    + (TUD_VIDEO_DESC_CS_VC_LEN + 1/*bInCollection*/)\
+    + TUD_VIDEO_DESC_CAMERA_TERM_LEN\
+    + TUD_VIDEO_DESC_OUTPUT_TERM_LEN\
+    /* Interface 1, Alternate 0 */\
+    + TUD_VIDEO_DESC_STD_VS_LEN\
+    + (TUD_VIDEO_DESC_CS_VS_IN_LEN + 1/*bNumFormats x bControlSize*/)\
+    + TUD_VIDEO_DESC_CS_VS_FMT_MJPEG_LEN\
+    + TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_CONT_LEN\
+    + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN\
+    + 7/* Endpoint */\
+  )
+
 /* Windows support YUY2 and NV12
  * https://docs.microsoft.com/en-us/windows-hardware/drivers/stream/usb-video-class-driver-overview */
 
@@ -216,4 +232,40 @@ enum {
         TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING(VIDEO_COLOR_PRIMARIES_BT709, VIDEO_COLOR_XFER_CH_BT709, VIDEO_COLOR_COEF_SMPTE170M), \
         TUD_VIDEO_DESC_EP_BULK(_epin, _epsize, 1)
 
+#define TUD_VIDEO_CAPTURE_DESCRIPTOR_MJPEG_BULK(_stridx, _epin, _width, _height, _fps, _epsize) \
+  TUD_VIDEO_DESC_IAD(ITF_NUM_VIDEO_CONTROL, /* 2 Interfaces */ 0x02, _stridx), \
+  /* Video control 0 */ \
+  TUD_VIDEO_DESC_STD_VC(ITF_NUM_VIDEO_CONTROL, 0, _stridx), \
+    TUD_VIDEO_DESC_CS_VC( /* UVC 1.5*/ 0x0150, \
+         /* wTotalLength - bLength */ \
+         TUD_VIDEO_DESC_CAMERA_TERM_LEN + TUD_VIDEO_DESC_OUTPUT_TERM_LEN, \
+         UVC_CLOCK_FREQUENCY, ITF_NUM_VIDEO_STREAMING), \
+      TUD_VIDEO_DESC_CAMERA_TERM(UVC_ENTITY_CAP_INPUT_TERMINAL, 0, 0,\
+                                 /*wObjectiveFocalLengthMin*/0, /*wObjectiveFocalLengthMax*/0,\
+                                 /*wObjectiveFocalLength*/0, /*bmControls*/0), \
+      TUD_VIDEO_DESC_OUTPUT_TERM(UVC_ENTITY_CAP_OUTPUT_TERMINAL, VIDEO_TT_STREAMING, 0, 1, 0), \
+  /* Video stream alt. 0 */ \
+  TUD_VIDEO_DESC_STD_VS(ITF_NUM_VIDEO_STREAMING, 0, 1, _stridx), \
+    /* Video stream header for without still image capture */ \
+    TUD_VIDEO_DESC_CS_VS_INPUT( /*bNumFormats*/1, \
+        /*wTotalLength - bLength */\
+        TUD_VIDEO_DESC_CS_VS_FMT_MJPEG_LEN\
+        + TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_CONT_LEN\
+        + TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING_LEN,\
+        _epin, /*bmInfo*/0, /*bTerminalLink*/UVC_ENTITY_CAP_OUTPUT_TERMINAL, \
+        /*bStillCaptureMethod*/0, /*bTriggerSupport*/0, /*bTriggerUsage*/0, \
+        /*bmaControls(1)*/0), \
+      /* Video stream format */ \
+      TUD_VIDEO_DESC_CS_VS_FMT_MJPEG(/*bFormatIndex*/1, /*bNumFrameDescriptors*/1, \
+        /*bmFlags*/0, /*bDefaultFrameIndex*/1, 0, 0, 0, /*bCopyProtect*/0), \
+        /* Video stream frame format */ \
+        TUD_VIDEO_DESC_CS_VS_FRM_MJPEG_CONT(/*bFrameIndex */1, 0, _width, _height, \
+            _width * _height * 16, _width * _height * 16 * _fps, \
+            _width * _height * 16 / 8, \
+            (10000000/_fps), (10000000/_fps), (10000000/_fps)*_fps, (10000000/_fps)), \
+        TUD_VIDEO_DESC_CS_VS_COLOR_MATCHING(VIDEO_COLOR_PRIMARIES_BT709, VIDEO_COLOR_XFER_CH_BT709, VIDEO_COLOR_COEF_SMPTE170M), \
+        /* EP */ \
+        TUD_VIDEO_DESC_EP_BULK(_epin, _epsize, 1)
+
+
 #endif

From faaed198b48b3af7482503bacf3188040c245a1e Mon Sep 17 00:00:00 2001
From: epatstarkey <58745560+epatstarkey@users.noreply.github.com>
Date: Tue, 28 Mar 2023 13:59:59 -0500
Subject: [PATCH 225/691] Update vendor_device.h

---
 src/class/vendor/vendor_device.h | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/src/class/vendor/vendor_device.h b/src/class/vendor/vendor_device.h
index 9abafda50..ca4837d7b 100644
--- a/src/class/vendor/vendor_device.h
+++ b/src/class/vendor/vendor_device.h
@@ -1,4 +1,4 @@
-/*
+/* 
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
@@ -48,6 +48,7 @@ bool     tud_vendor_n_peek            (uint8_t itf, uint8_t* ui8);
 void     tud_vendor_n_read_flush      (uint8_t itf);
 
 uint32_t tud_vendor_n_write           (uint8_t itf, void const* buffer, uint32_t bufsize);
+uint32_t tud_vendor_n_write_flush     (uint8_t itf);
 uint32_t tud_vendor_n_write_available (uint8_t itf);
 
 static inline uint32_t tud_vendor_n_write_str (uint8_t itf, char const* str);
@@ -64,7 +65,7 @@ static inline void     tud_vendor_read_flush      (void);
 static inline uint32_t tud_vendor_write           (void const* buffer, uint32_t bufsize);
 static inline uint32_t tud_vendor_write_str       (char const* str);
 static inline uint32_t tud_vendor_write_available (void);
-static inline uint32_t tud_vendor_flush           (void);
+static inline uint32_t tud_vendor_write_flush     (void);
 
 //--------------------------------------------------------------------+
 // Application Callback API (weak is optional)
@@ -114,6 +115,11 @@ static inline uint32_t tud_vendor_write (void const* buffer, uint32_t bufsize)
   return tud_vendor_n_write(0, buffer, bufsize);
 }
 
+static inline uint32_t tud_vendor_write_flush (void)
+{
+  return tud_vendor_n_write_flush(0);
+}
+
 static inline uint32_t tud_vendor_write_str (char const* str)
 {
   return tud_vendor_n_write_str(0, str);
@@ -124,11 +130,6 @@ static inline uint32_t tud_vendor_write_available (void)
   return tud_vendor_n_write_available(0);
 }
 
-static inline uint32_t tud_vendor_flush (void)
-{
-  return tud_vendor_n_flush(0);
-}
-
 //--------------------------------------------------------------------+
 // Internal Class Driver API
 //--------------------------------------------------------------------+

From 876f49f6ad10ef2bca000602fe862889c3e0268f Mon Sep 17 00:00:00 2001
From: epatstarkey <58745560+epatstarkey@users.noreply.github.com>
Date: Tue, 28 Mar 2023 14:00:23 -0500
Subject: [PATCH 226/691] Update vendor_device.c

---
 src/class/vendor/vendor_device.c | 65 ++++++++++++++++++++------------
 1 file changed, 40 insertions(+), 25 deletions(-)

diff --git a/src/class/vendor/vendor_device.c b/src/class/vendor/vendor_device.c
index d07bd75ec..260da0125 100644
--- a/src/class/vendor/vendor_device.c
+++ b/src/class/vendor/vendor_device.c
@@ -59,7 +59,7 @@ typedef struct
   CFG_TUSB_MEM_ALIGN uint8_t epin_buf[CFG_TUD_VENDOR_EPSIZE];
 } vendord_interface_t;
 
-CFG_TUSB_MEM_SECTION tu_static vendord_interface_t _vendord_itf[CFG_TUD_VENDOR];
+CFG_TUSB_MEM_SECTION static vendord_interface_t _vendord_itf[CFG_TUD_VENDOR];
 
 #define ITF_MEM_RESET_SIZE   offsetof(vendord_interface_t, rx_ff)
 
@@ -86,8 +86,8 @@ static void _prep_out_transaction (vendord_interface_t* p_itf)
 {
   uint8_t const rhport = 0;
 
-  // skip if previous transfer not complete
-  if ( usbd_edpt_busy(rhport, p_itf->ep_out) ) return;
+    // claim endpoint
+  TU_VERIFY(usbd_edpt_claim(rhport, p_itf->ep_out), );
 
   // Prepare for incoming data but only allow what we can store in the ring buffer.
   uint16_t max_read = tu_fifo_remaining(&p_itf->rx_ff);
@@ -95,6 +95,11 @@ static void _prep_out_transaction (vendord_interface_t* p_itf)
   {
     usbd_edpt_xfer(rhport, p_itf->ep_out, p_itf->epout_buf, CFG_TUD_VENDOR_EPSIZE);
   }
+  else
+  {
+    // Release endpoint since we don't make any transfer
+    usbd_edpt_release(rhport, p_itf->ep_out);
+  }
 }
 
 uint32_t tud_vendor_n_read (uint8_t itf, void* buffer, uint32_t bufsize)
@@ -115,37 +120,47 @@ void tud_vendor_n_read_flush (uint8_t itf)
 //--------------------------------------------------------------------+
 // Write API
 //--------------------------------------------------------------------+
-static uint16_t maybe_transmit(vendord_interface_t* p_itf)
-{
-  uint8_t const rhport = 0;
-
-  // skip if previous transfer not complete
-  TU_VERIFY( !usbd_edpt_busy(rhport, p_itf->ep_in) );
-
-  uint16_t count = tu_fifo_read_n(&p_itf->tx_ff, p_itf->epin_buf, CFG_TUD_VENDOR_EPSIZE);
-  if (count > 0)
-  {
-    TU_ASSERT( usbd_edpt_xfer(rhport, p_itf->ep_in, p_itf->epin_buf, count) );
-  }
-  return count;
-}
-
 uint32_t tud_vendor_n_write (uint8_t itf, void const* buffer, uint32_t bufsize)
 {
   vendord_interface_t* p_itf = &_vendord_itf[itf];
   uint16_t ret = tu_fifo_write_n(&p_itf->tx_ff, buffer, (uint16_t) bufsize);
+
+  // flush if queue more than packet size
   if (tu_fifo_count(&p_itf->tx_ff) >= CFG_TUD_VENDOR_EPSIZE) {
-    maybe_transmit(p_itf);
+    tud_vendor_n_write_flush(itf);
   }
   return ret;
 }
 
-uint32_t tud_vendor_n_flush (uint8_t itf)
+uint32_t tud_vendor_n_write_flush (uint8_t itf)
 {
   vendord_interface_t* p_itf = &_vendord_itf[itf];
-  uint32_t ret = maybe_transmit(p_itf);
 
-  return ret;
+  // Skip if usb is not ready yet
+  TU_VERIFY( tud_ready(), 0 );
+
+  // No data to send
+  if ( !tu_fifo_count(&p_itf->tx_ff) ) return 0;
+
+  uint8_t const rhport = 0;
+
+  // Claim the endpoint
+  TU_VERIFY( usbd_edpt_claim(rhport, p_itf->ep_in), 0 );
+
+  // Pull data from FIFO
+  uint16_t const count = tu_fifo_read_n(&p_itf->tx_ff, p_itf->epin_buf, sizeof(p_itf->epin_buf));
+
+  if ( count )
+  {
+    TU_ASSERT( usbd_edpt_xfer(rhport, p_itf->ep_in, p_itf->epin_buf, count), 0 );
+    return count;
+  }else
+  {
+    // Release endpoint since we don't make any transfer
+    // Note: data is dropped if terminal is not connected
+    usbd_edpt_release(rhport, p_itf->ep_in);
+    return 0;
+  }
 }
 
 uint32_t tud_vendor_n_write_available (uint8_t itf)
@@ -225,10 +240,10 @@ uint16_t vendord_open(uint8_t rhport, tusb_desc_interface_t const * desc_itf, ui
     // Prepare for incoming data
     if ( p_vendor->ep_out )
     {
-      TU_ASSERT(usbd_edpt_xfer(rhport, p_vendor->ep_out, p_vendor->epout_buf, sizeof(p_vendor->epout_buf)), 0);
+      _prep_out_transaction(p_vendor);
     }
 
-    if ( p_vendor->ep_in ) maybe_transmit(p_vendor);
+    if ( p_vendor->ep_in ) tud_vendor_n_write_flush((uint8_t)(p_vendor - _vendord_itf));
   }
 
   return (uint16_t) ((uintptr_t) p_desc - (uintptr_t) desc_itf);
@@ -263,7 +278,7 @@ bool vendord_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint
   {
     if (tud_vendor_tx_cb) tud_vendor_tx_cb(itf, (uint16_t) xferred_bytes);
     // Send complete, try to send more if possible
-    maybe_transmit(p_itf);
+    tud_vendor_n_write_flush(itf);
   }
 
   return true;

From 1fb2a2f1bd61f06dc9384df1b9df3b39aeec42cf Mon Sep 17 00:00:00 2001
From: epatstarkey <58745560+epatstarkey@users.noreply.github.com>
Date: Tue, 28 Mar 2023 14:01:33 -0500
Subject: [PATCH 227/691] Update vendor_device.c

---
 src/class/vendor/vendor_device.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/class/vendor/vendor_device.c b/src/class/vendor/vendor_device.c
index 260da0125..93596ee33 100644
--- a/src/class/vendor/vendor_device.c
+++ b/src/class/vendor/vendor_device.c
@@ -59,7 +59,7 @@ typedef struct
   CFG_TUSB_MEM_ALIGN uint8_t epin_buf[CFG_TUD_VENDOR_EPSIZE];
 } vendord_interface_t;
 
-CFG_TUSB_MEM_SECTION static vendord_interface_t _vendord_itf[CFG_TUD_VENDOR];
+CFG_TUSB_MEM_SECTION tu_static vendord_interface_t _vendord_itf[CFG_TUD_VENDOR];
 
 #define ITF_MEM_RESET_SIZE   offsetof(vendord_interface_t, rx_ff)
 

From 99315bcca35e1ffb9d14705a0cd533f962bc79eb Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 29 Mar 2023 14:23:11 +0700
Subject: [PATCH 228/691] adding more cmake support

---
 .gitignore                       | 2 ++
 examples/CMakeLists.txt          | 9 +++++++++
 hw/bsp/rp2040/rp2040-openocd.cfg | 3 +++
 3 files changed, 14 insertions(+)
 create mode 100644 examples/CMakeLists.txt
 create mode 100644 hw/bsp/rp2040/rp2040-openocd.cfg

diff --git a/.gitignore b/.gitignore
index bd4271925..268decfc6 100644
--- a/.gitignore
+++ b/.gitignore
@@ -28,6 +28,8 @@ cov-int
 *-build-dir
 /_bin/
 __pycache__
+cmake-build-*
+sdkconfig
 
 # submodules
 hw/mcu/allwinner
diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt
new file mode 100644
index 000000000..8f5626fa9
--- /dev/null
+++ b/examples/CMakeLists.txt
@@ -0,0 +1,9 @@
+cmake_minimum_required(VERSION 3.5)
+
+include(${CMAKE_CURRENT_SOURCE_DIR}/../hw/bsp/family_support.cmake)
+
+project(tinyusb_examples)
+
+add_subdirectory(device)
+add_subdirectory(dual)
+add_subdirectory(host)
diff --git a/hw/bsp/rp2040/rp2040-openocd.cfg b/hw/bsp/rp2040/rp2040-openocd.cfg
new file mode 100644
index 000000000..3364c595e
--- /dev/null
+++ b/hw/bsp/rp2040/rp2040-openocd.cfg
@@ -0,0 +1,3 @@
+source [find interface/cmsis-dap.cfg]
+adapter speed 5000
+source [find target/rp2040.cfg]

From 96718b7ca08d1d74cf1ecfb3816b57df50bf1616 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 30 Mar 2023 00:31:26 +0700
Subject: [PATCH 229/691] merge s2 and s3, update cmake for espressif, add
 tinyusb_src as component

---
 .../device/cdc_msc_freertos/CMakeLists.txt    |   3 +-
 .../cdc_msc_freertos/src/CMakeLists.txt       |  26 +--
 examples/rules.mk                             |   2 +-
 hw/bsp/esp32s2/boards/CMakeLists.txt          |  12 --
 .../adafruit_feather_esp32s2/board.cmake      |  17 --
 .../boards/adafruit_magtag_29gray/board.cmake |  17 --
 .../boards/adafruit_metro_esp32s2/board.cmake |  17 --
 .../boards/espressif_kaluga_1/board.cmake     |  17 --
 .../boards/espressif_saola_1/board.cmake      |  17 --
 hw/bsp/esp32s2/family.cmake                   |   7 -
 hw/bsp/esp32s3/boards/esp32s3.c               | 152 ----------------
 .../boards/espressif_addax_1/board.cmake      |   7 -
 .../boards/espressif_s3_devkitc/board.cmake   |   7 -
 .../boards/espressif_s3_devkitm/board.cmake   |   7 -
 .../components/led_strip/CMakeLists.txt       |   7 -
 .../components/led_strip/include/led_strip.h  | 126 -------------
 .../led_strip/src/led_strip_rmt_ws2812.c      | 171 ------------------
 hw/bsp/esp32s3/family.cmake                   |   7 -
 hw/bsp/esp32s3/family.mk                      |  25 ---
 .../boards/CMakeLists.txt                     |   4 +-
 .../adafruit_feather_esp32s2/board.cmake      |   3 +
 .../boards/adafruit_feather_esp32s2/board.h   |   0
 .../boards/adafruit_magtag_29gray/board.cmake |   3 +
 .../boards/adafruit_magtag_29gray/board.h     |   0
 .../boards/adafruit_metro_esp32s2/board.cmake |   3 +
 .../boards/adafruit_metro_esp32s2/board.h     |   0
 .../boards/espressif_addax_1/board.cmake      |   3 +
 .../boards/espressif_addax_1/board.h          |   0
 .../boards/espressif_kaluga_1/board.cmake     |   3 +
 .../boards/espressif_kaluga_1/board.h         |   0
 .../boards/espressif_s3_devkitc/board.cmake   |   3 +
 .../boards/espressif_s3_devkitc/board.h       |   0
 .../boards/espressif_s3_devkitm/board.cmake   |   3 +
 .../boards/espressif_s3_devkitm/board.h       |   0
 .../boards/espressif_saola_1/board.cmake      |   3 +
 .../boards/espressif_saola_1/board.h          |   0
 .../esp32s2.c => espressif/boards/family.c}   |   0
 .../components/led_strip/CMakeLists.txt       |   0
 .../components/led_strip/include/led_strip.h  |   0
 .../led_strip/src/led_strip_rmt_ws2812.c      |   0
 .../components/tinyusb_src/CMakeLists.txt     |  60 ++++++
 hw/bsp/espressif/family.cmake                 |   9 +
 hw/bsp/{esp32s2 => espressif}/family.mk       |  17 +-
 tools/build_esp32sx.py                        |   5 +-
 tools/build_family.py                         |   2 +-
 45 files changed, 114 insertions(+), 651 deletions(-)
 delete mode 100644 hw/bsp/esp32s2/boards/CMakeLists.txt
 delete mode 100644 hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.cmake
 delete mode 100644 hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.cmake
 delete mode 100644 hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.cmake
 delete mode 100644 hw/bsp/esp32s2/boards/espressif_kaluga_1/board.cmake
 delete mode 100644 hw/bsp/esp32s2/boards/espressif_saola_1/board.cmake
 delete mode 100644 hw/bsp/esp32s2/family.cmake
 delete mode 100644 hw/bsp/esp32s3/boards/esp32s3.c
 delete mode 100644 hw/bsp/esp32s3/boards/espressif_addax_1/board.cmake
 delete mode 100644 hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.cmake
 delete mode 100644 hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.cmake
 delete mode 100644 hw/bsp/esp32s3/components/led_strip/CMakeLists.txt
 delete mode 100644 hw/bsp/esp32s3/components/led_strip/include/led_strip.h
 delete mode 100644 hw/bsp/esp32s3/components/led_strip/src/led_strip_rmt_ws2812.c
 delete mode 100644 hw/bsp/esp32s3/family.cmake
 delete mode 100644 hw/bsp/esp32s3/family.mk
 rename hw/bsp/{esp32s3 => espressif}/boards/CMakeLists.txt (73%)
 create mode 100644 hw/bsp/espressif/boards/adafruit_feather_esp32s2/board.cmake
 rename hw/bsp/{esp32s2 => espressif}/boards/adafruit_feather_esp32s2/board.h (100%)
 create mode 100644 hw/bsp/espressif/boards/adafruit_magtag_29gray/board.cmake
 rename hw/bsp/{esp32s2 => espressif}/boards/adafruit_magtag_29gray/board.h (100%)
 create mode 100644 hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.cmake
 rename hw/bsp/{esp32s2 => espressif}/boards/adafruit_metro_esp32s2/board.h (100%)
 create mode 100644 hw/bsp/espressif/boards/espressif_addax_1/board.cmake
 rename hw/bsp/{esp32s3 => espressif}/boards/espressif_addax_1/board.h (100%)
 create mode 100644 hw/bsp/espressif/boards/espressif_kaluga_1/board.cmake
 rename hw/bsp/{esp32s2 => espressif}/boards/espressif_kaluga_1/board.h (100%)
 create mode 100644 hw/bsp/espressif/boards/espressif_s3_devkitc/board.cmake
 rename hw/bsp/{esp32s3 => espressif}/boards/espressif_s3_devkitc/board.h (100%)
 create mode 100644 hw/bsp/espressif/boards/espressif_s3_devkitm/board.cmake
 rename hw/bsp/{esp32s3 => espressif}/boards/espressif_s3_devkitm/board.h (100%)
 create mode 100644 hw/bsp/espressif/boards/espressif_saola_1/board.cmake
 rename hw/bsp/{esp32s2 => espressif}/boards/espressif_saola_1/board.h (100%)
 rename hw/bsp/{esp32s2/boards/esp32s2.c => espressif/boards/family.c} (100%)
 rename hw/bsp/{esp32s2 => espressif}/components/led_strip/CMakeLists.txt (100%)
 rename hw/bsp/{esp32s2 => espressif}/components/led_strip/include/led_strip.h (100%)
 rename hw/bsp/{esp32s2 => espressif}/components/led_strip/src/led_strip_rmt_ws2812.c (100%)
 create mode 100644 hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
 create mode 100644 hw/bsp/espressif/family.cmake
 rename hw/bsp/{esp32s2 => espressif}/family.mk (62%)

diff --git a/examples/device/cdc_msc_freertos/CMakeLists.txt b/examples/device/cdc_msc_freertos/CMakeLists.txt
index cbd75efd6..82bf79f19 100644
--- a/examples/device/cdc_msc_freertos/CMakeLists.txt
+++ b/examples/device/cdc_msc_freertos/CMakeLists.txt
@@ -16,7 +16,6 @@ project(${PROJECT})
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
 # Check for -DFAMILY=
-if(FAMILY MATCHES "^esp32s[2-3]")
-else()
+if(NOT FAMILY  STREQUAL "espressif")
   message(FATAL_ERROR "Invalid FAMILY specified: ${FAMILY}")
 endif()
diff --git a/examples/device/cdc_msc_freertos/src/CMakeLists.txt b/examples/device/cdc_msc_freertos/src/CMakeLists.txt
index 9216e2b49..e433e5074 100644
--- a/examples/device/cdc_msc_freertos/src/CMakeLists.txt
+++ b/examples/device/cdc_msc_freertos/src/CMakeLists.txt
@@ -1,35 +1,11 @@
 idf_component_register(SRCS "main.c" "usb_descriptors.c" "msc_disk.c"
                     INCLUDE_DIRS "."
-                    REQUIRES freertos soc)
-
-file(TO_NATIVE_PATH "${TOP}/hw/bsp/${FAMILY}/boards/${BOARD}/board.cmake" board_cmake)
-
-if(EXISTS ${board_cmake})
-    include(${board_cmake})
-endif()
+                    REQUIRES freertos soc tinyusb_src)
 
 target_include_directories(${COMPONENT_TARGET} PUBLIC
   "${TOP}/hw"
-  "${TOP}/src"
 )
 
 target_compile_definitions(${COMPONENT_TARGET} PUBLIC
   ESP_PLATFORM
 )
-
-target_sources(${COMPONENT_TARGET} PUBLIC
-  "${TOP}/src/tusb.c"
-  "${TOP}/src/common/tusb_fifo.c"
-  "${TOP}/src/device/usbd.c"
-  "${TOP}/src/device/usbd_control.c"
-  "${TOP}/src/class/cdc/cdc_device.c"
-  "${TOP}/src/class/dfu/dfu_rt_device.c"
-  "${TOP}/src/class/hid/hid_device.c"
-  "${TOP}/src/class/midi/midi_device.c"
-  "${TOP}/src/class/msc/msc_device.c"
-  "${TOP}/src/class/net/ecm_rndis_device.c"
-  "${TOP}/src/class/net/ncm_device.c"
-  "${TOP}/src/class/usbtmc/usbtmc_device.c"
-  "${TOP}/src/class/vendor/vendor_device.c"
-  "${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c"
-)
diff --git a/examples/rules.mk b/examples/rules.mk
index b85837c16..c125408df 100644
--- a/examples/rules.mk
+++ b/examples/rules.mk
@@ -7,7 +7,7 @@
 
 # ---------------- GNU Make Start -----------------------
 # ESP32-Sx and RP2040 has its own CMake build system
-ifeq (,$(findstring $(FAMILY),esp32s2 esp32s3 rp2040))
+ifeq (,$(findstring $(FAMILY),espressif rp2040))
 
 # ---------------------------------------
 # Compiler Flags
diff --git a/hw/bsp/esp32s2/boards/CMakeLists.txt b/hw/bsp/esp32s2/boards/CMakeLists.txt
deleted file mode 100644
index ff90acbde..000000000
--- a/hw/bsp/esp32s2/boards/CMakeLists.txt
+++ /dev/null
@@ -1,12 +0,0 @@
-idf_component_register(SRCS esp32s2.c
-                    INCLUDE_DIRS "." "${BOARD}"
-                    PRIV_REQUIRES "driver"
-                    REQUIRES freertos src led_strip)
-
-# Apply board specific content
-include("${BOARD}/board.cmake")
-
-target_include_directories(${COMPONENT_TARGET} PUBLIC
-  "${TOP}/hw"
-  "${TOP}/src"
-)
diff --git a/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.cmake b/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.cmake
deleted file mode 100644
index e39ceb887..000000000
--- a/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.cmake
+++ /dev/null
@@ -1,17 +0,0 @@
-# Apply board specific content here
-target_include_directories(${COMPONENT_LIB} PRIVATE .)
-
-idf_build_get_property(idf_target IDF_TARGET)
-
-message(STATUS "Apply ${BOARD}(${idf_target}) specific options for component: ${COMPONENT_TARGET}")
-
-if(NOT ${idf_target} STREQUAL "esp32s2")
-    message(FATAL_ERROR "Incorrect target for board ${BOARD}: $ENV{IDF_TARGET}(${idf_target}), try to clean the build first." )
-endif()
-
-set(IDF_TARGET "esp32s2" FORCE)
-
-target_compile_options(${COMPONENT_TARGET} PUBLIC
-  "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2"
-  "-DCFG_TUSB_OS=OPT_OS_FREERTOS"
-)
diff --git a/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.cmake b/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.cmake
deleted file mode 100644
index e39ceb887..000000000
--- a/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.cmake
+++ /dev/null
@@ -1,17 +0,0 @@
-# Apply board specific content here
-target_include_directories(${COMPONENT_LIB} PRIVATE .)
-
-idf_build_get_property(idf_target IDF_TARGET)
-
-message(STATUS "Apply ${BOARD}(${idf_target}) specific options for component: ${COMPONENT_TARGET}")
-
-if(NOT ${idf_target} STREQUAL "esp32s2")
-    message(FATAL_ERROR "Incorrect target for board ${BOARD}: $ENV{IDF_TARGET}(${idf_target}), try to clean the build first." )
-endif()
-
-set(IDF_TARGET "esp32s2" FORCE)
-
-target_compile_options(${COMPONENT_TARGET} PUBLIC
-  "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2"
-  "-DCFG_TUSB_OS=OPT_OS_FREERTOS"
-)
diff --git a/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.cmake b/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.cmake
deleted file mode 100644
index 16b0e9cdd..000000000
--- a/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.cmake
+++ /dev/null
@@ -1,17 +0,0 @@
-# Apply board specific content here
-target_include_directories(${COMPONENT_LIB} PRIVATE .)
-
-idf_build_get_property(idf_target IDF_TARGET)
-
-message(STATUS "Apply ${BOARD}(${idf_target}) specific options for component: ${COMPONENT_TARGET}")
-
-if(NOT ${idf_target} STREQUAL "esp32s2")
-    message(FATAL_ERROR "Incorrect target for board ${BOARD}: (${idf_target}), try to clean the build first." )
-endif()
-
-set(IDF_TARGET "esp32s2" FORCE)
-
-target_compile_options(${COMPONENT_TARGET} PUBLIC
-  "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2"
-  "-DCFG_TUSB_OS=OPT_OS_FREERTOS"
-)
diff --git a/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.cmake b/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.cmake
deleted file mode 100644
index 16b0e9cdd..000000000
--- a/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.cmake
+++ /dev/null
@@ -1,17 +0,0 @@
-# Apply board specific content here
-target_include_directories(${COMPONENT_LIB} PRIVATE .)
-
-idf_build_get_property(idf_target IDF_TARGET)
-
-message(STATUS "Apply ${BOARD}(${idf_target}) specific options for component: ${COMPONENT_TARGET}")
-
-if(NOT ${idf_target} STREQUAL "esp32s2")
-    message(FATAL_ERROR "Incorrect target for board ${BOARD}: (${idf_target}), try to clean the build first." )
-endif()
-
-set(IDF_TARGET "esp32s2" FORCE)
-
-target_compile_options(${COMPONENT_TARGET} PUBLIC
-  "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2"
-  "-DCFG_TUSB_OS=OPT_OS_FREERTOS"
-)
diff --git a/hw/bsp/esp32s2/boards/espressif_saola_1/board.cmake b/hw/bsp/esp32s2/boards/espressif_saola_1/board.cmake
deleted file mode 100644
index 16b0e9cdd..000000000
--- a/hw/bsp/esp32s2/boards/espressif_saola_1/board.cmake
+++ /dev/null
@@ -1,17 +0,0 @@
-# Apply board specific content here
-target_include_directories(${COMPONENT_LIB} PRIVATE .)
-
-idf_build_get_property(idf_target IDF_TARGET)
-
-message(STATUS "Apply ${BOARD}(${idf_target}) specific options for component: ${COMPONENT_TARGET}")
-
-if(NOT ${idf_target} STREQUAL "esp32s2")
-    message(FATAL_ERROR "Incorrect target for board ${BOARD}: (${idf_target}), try to clean the build first." )
-endif()
-
-set(IDF_TARGET "esp32s2" FORCE)
-
-target_compile_options(${COMPONENT_TARGET} PUBLIC
-  "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2"
-  "-DCFG_TUSB_OS=OPT_OS_FREERTOS"
-)
diff --git a/hw/bsp/esp32s2/family.cmake b/hw/bsp/esp32s2/family.cmake
deleted file mode 100644
index 0973adcac..000000000
--- a/hw/bsp/esp32s2/family.cmake
+++ /dev/null
@@ -1,7 +0,0 @@
-cmake_minimum_required(VERSION 3.5)
-
-# Add example src and bsp directories
-set(EXTRA_COMPONENT_DIRS "src" "${TOP}/hw/bsp/esp32s2/boards" "${TOP}/hw/bsp/esp32s2/components")
-include($ENV{IDF_PATH}/tools/cmake/project.cmake)
-set(SUPPORTED_TARGETS esp32s2)
-set(FAMILY_MCUS ESP32S2)
diff --git a/hw/bsp/esp32s3/boards/esp32s3.c b/hw/bsp/esp32s3/boards/esp32s3.c
deleted file mode 100644
index 015d8305b..000000000
--- a/hw/bsp/esp32s3/boards/esp32s3.c
+++ /dev/null
@@ -1,152 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "../../board.h"
-#include "board.h"
-
-#include "esp_rom_gpio.h"
-#include "hal/gpio_ll.h"
-#include "hal/usb_hal.h"
-#include "soc/usb_periph.h"
-
-#include "driver/rmt.h"
-
-#if ESP_IDF_VERSION_MAJOR > 4
-  #include "esp_private/periph_ctrl.h"
-#else
-  #include "driver/periph_ctrl.h"
-#endif
-
-#ifdef NEOPIXEL_PIN
-#include "led_strip.h"
-static led_strip_t *strip;
-#endif
-
-//--------------------------------------------------------------------+
-// MACRO TYPEDEF CONSTANT ENUM DECLARATION
-//--------------------------------------------------------------------+
-
-static void configure_pins(usb_hal_context_t *usb);
-
-// Initialize on-board peripherals : led, button, uart and USB
-void board_init(void)
-{
-
-#ifdef NEOPIXEL_PIN
-  #ifdef NEOPIXEL_POWER_PIN
-  gpio_reset_pin(NEOPIXEL_POWER_PIN);
-  gpio_set_direction(NEOPIXEL_POWER_PIN, GPIO_MODE_OUTPUT);
-  gpio_set_level(NEOPIXEL_POWER_PIN, NEOPIXEL_POWER_STATE);
-  #endif
-
-  // WS2812 Neopixel driver with RMT peripheral
-  rmt_config_t config = RMT_DEFAULT_CONFIG_TX(NEOPIXEL_PIN, RMT_CHANNEL_0);
-  config.clk_div = 2; // set counter clock to 40MHz
-
-  rmt_config(&config);
-  rmt_driver_install(config.channel, 0, 0);
-
-  led_strip_config_t strip_config = LED_STRIP_DEFAULT_CONFIG(1, (led_strip_dev_t) config.channel);
-  strip = led_strip_new_rmt_ws2812(&strip_config);
-  strip->clear(strip, 100); // off led
-#endif
-
-  // Button
-  esp_rom_gpio_pad_select_gpio(BUTTON_PIN);
-  gpio_set_direction(BUTTON_PIN, GPIO_MODE_INPUT);
-  gpio_set_pull_mode(BUTTON_PIN, BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN_ONLY : GPIO_PULLUP_ONLY);
-
-  // USB Controller Hal init
-  periph_module_reset(PERIPH_USB_MODULE);
-  periph_module_enable(PERIPH_USB_MODULE);
-
-  usb_hal_context_t hal = {
-    .use_external_phy = false // use built-in PHY
-  };
-  usb_hal_init(&hal);
-  configure_pins(&hal);
-}
-
-static void configure_pins(usb_hal_context_t *usb)
-{
-  /* usb_periph_iopins currently configures USB_OTG as USB Device.
-   * Introduce additional parameters in usb_hal_context_t when adding support
-   * for USB Host.
-   */
-  for (const usb_iopin_dsc_t *iopin = usb_periph_iopins; iopin->pin != -1; ++iopin) {
-    if ((usb->use_external_phy) || (iopin->ext_phy_only == 0)) {
-      esp_rom_gpio_pad_select_gpio(iopin->pin);
-      if (iopin->is_output) {
-        esp_rom_gpio_connect_out_signal(iopin->pin, iopin->func, false, false);
-      } else {
-        esp_rom_gpio_connect_in_signal(iopin->pin, iopin->func, false);
-#if ESP_IDF_VERSION_MAJOR > 4
-        if ((iopin->pin != GPIO_MATRIX_CONST_ZERO_INPUT) && (iopin->pin != GPIO_MATRIX_CONST_ONE_INPUT))
-#else
-        if ((iopin->pin != GPIO_FUNC_IN_LOW) && (iopin->pin != GPIO_FUNC_IN_HIGH))
-#endif
-        {
-          gpio_ll_input_enable(&GPIO, iopin->pin);
-        }
-      }
-      esp_rom_gpio_pad_unhold(iopin->pin);
-    }
-  }
-  if (!usb->use_external_phy) {
-    gpio_set_drive_capability(USBPHY_DM_NUM, GPIO_DRIVE_CAP_3);
-    gpio_set_drive_capability(USBPHY_DP_NUM, GPIO_DRIVE_CAP_3);
-  }
-}
-
-// Turn LED on or off
-void board_led_write(bool state)
-{
-#ifdef NEOPIXEL_PIN
-  strip->set_pixel(strip, 0, (state ? 0x88 : 0x00), 0x00, 0x00);
-  strip->refresh(strip, 100);
-#endif
-}
-
-// Get the current state of button
-// a '1' means active (pressed), a '0' means inactive.
-uint32_t board_button_read(void)
-{
-  return gpio_get_level(BUTTON_PIN) == BUTTON_STATE_ACTIVE;
-}
-
-// Get characters from UART
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
-
-// Send characters to UART
-int board_uart_write(void const * buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
diff --git a/hw/bsp/esp32s3/boards/espressif_addax_1/board.cmake b/hw/bsp/esp32s3/boards/espressif_addax_1/board.cmake
deleted file mode 100644
index 2bff4f836..000000000
--- a/hw/bsp/esp32s3/boards/espressif_addax_1/board.cmake
+++ /dev/null
@@ -1,7 +0,0 @@
-# Apply board specific content here
-target_include_directories(${COMPONENT_LIB} PRIVATE .)
-
-target_compile_options(${COMPONENT_TARGET} PUBLIC
-  "-DCFG_TUSB_MCU=OPT_MCU_ESP32S3"
-  "-DCFG_TUSB_OS=OPT_OS_FREERTOS"
-)
diff --git a/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.cmake b/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.cmake
deleted file mode 100644
index 2bff4f836..000000000
--- a/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.cmake
+++ /dev/null
@@ -1,7 +0,0 @@
-# Apply board specific content here
-target_include_directories(${COMPONENT_LIB} PRIVATE .)
-
-target_compile_options(${COMPONENT_TARGET} PUBLIC
-  "-DCFG_TUSB_MCU=OPT_MCU_ESP32S3"
-  "-DCFG_TUSB_OS=OPT_OS_FREERTOS"
-)
diff --git a/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.cmake b/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.cmake
deleted file mode 100644
index 2bff4f836..000000000
--- a/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.cmake
+++ /dev/null
@@ -1,7 +0,0 @@
-# Apply board specific content here
-target_include_directories(${COMPONENT_LIB} PRIVATE .)
-
-target_compile_options(${COMPONENT_TARGET} PUBLIC
-  "-DCFG_TUSB_MCU=OPT_MCU_ESP32S3"
-  "-DCFG_TUSB_OS=OPT_OS_FREERTOS"
-)
diff --git a/hw/bsp/esp32s3/components/led_strip/CMakeLists.txt b/hw/bsp/esp32s3/components/led_strip/CMakeLists.txt
deleted file mode 100644
index 8266c5a1c..000000000
--- a/hw/bsp/esp32s3/components/led_strip/CMakeLists.txt
+++ /dev/null
@@ -1,7 +0,0 @@
-set(component_srcs "src/led_strip_rmt_ws2812.c")
-
-idf_component_register(SRCS "${component_srcs}"
-                       INCLUDE_DIRS "include"
-                       PRIV_INCLUDE_DIRS ""
-                       PRIV_REQUIRES "driver"
-                       REQUIRES "")
diff --git a/hw/bsp/esp32s3/components/led_strip/include/led_strip.h b/hw/bsp/esp32s3/components/led_strip/include/led_strip.h
deleted file mode 100644
index a9dffc325..000000000
--- a/hw/bsp/esp32s3/components/led_strip/include/led_strip.h
+++ /dev/null
@@ -1,126 +0,0 @@
-// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-#pragma once
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "esp_err.h"
-
-/**
-* @brief LED Strip Type
-*
-*/
-typedef struct led_strip_s led_strip_t;
-
-/**
-* @brief LED Strip Device Type
-*
-*/
-typedef void *led_strip_dev_t;
-
-/**
-* @brief Declare of LED Strip Type
-*
-*/
-struct led_strip_s {
-    /**
-    * @brief Set RGB for a specific pixel
-    *
-    * @param strip: LED strip
-    * @param index: index of pixel to set
-    * @param red: red part of color
-    * @param green: green part of color
-    * @param blue: blue part of color
-    *
-    * @return
-    *      - ESP_OK: Set RGB for a specific pixel successfully
-    *      - ESP_ERR_INVALID_ARG: Set RGB for a specific pixel failed because of invalid parameters
-    *      - ESP_FAIL: Set RGB for a specific pixel failed because other error occurred
-    */
-    esp_err_t (*set_pixel)(led_strip_t *strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue);
-
-    /**
-    * @brief Refresh memory colors to LEDs
-    *
-    * @param strip: LED strip
-    * @param timeout_ms: timeout value for refreshing task
-    *
-    * @return
-    *      - ESP_OK: Refresh successfully
-    *      - ESP_ERR_TIMEOUT: Refresh failed because of timeout
-    *      - ESP_FAIL: Refresh failed because some other error occurred
-    *
-    * @note:
-    *      After updating the LED colors in the memory, a following invocation of this API is needed to flush colors to strip.
-    */
-    esp_err_t (*refresh)(led_strip_t *strip, uint32_t timeout_ms);
-
-    /**
-    * @brief Clear LED strip (turn off all LEDs)
-    *
-    * @param strip: LED strip
-    * @param timeout_ms: timeout value for clearing task
-    *
-    * @return
-    *      - ESP_OK: Clear LEDs successfully
-    *      - ESP_ERR_TIMEOUT: Clear LEDs failed because of timeout
-    *      - ESP_FAIL: Clear LEDs failed because some other error occurred
-    */
-    esp_err_t (*clear)(led_strip_t *strip, uint32_t timeout_ms);
-
-    /**
-    * @brief Free LED strip resources
-    *
-    * @param strip: LED strip
-    *
-    * @return
-    *      - ESP_OK: Free resources successfully
-    *      - ESP_FAIL: Free resources failed because error occurred
-    */
-    esp_err_t (*del)(led_strip_t *strip);
-};
-
-/**
-* @brief LED Strip Configuration Type
-*
-*/
-typedef struct {
-    uint32_t max_leds;   /*!< Maximum LEDs in a single strip */
-    led_strip_dev_t dev; /*!< LED strip device (e.g. RMT channel, PWM channel, etc) */
-} led_strip_config_t;
-
-/**
- * @brief Default configuration for LED strip
- *
- */
-#define LED_STRIP_DEFAULT_CONFIG(number, dev_hdl) \
-    {                                             \
-        .max_leds = number,                       \
-        .dev = dev_hdl,                           \
-    }
-
-/**
-* @brief Install a new ws2812 driver (based on RMT peripheral)
-*
-* @param config: LED strip configuration
-* @return
-*      LED strip instance or NULL
-*/
-led_strip_t *led_strip_new_rmt_ws2812(const led_strip_config_t *config);
-
-#ifdef __cplusplus
-}
-#endif
diff --git a/hw/bsp/esp32s3/components/led_strip/src/led_strip_rmt_ws2812.c b/hw/bsp/esp32s3/components/led_strip/src/led_strip_rmt_ws2812.c
deleted file mode 100644
index fd1746cad..000000000
--- a/hw/bsp/esp32s3/components/led_strip/src/led_strip_rmt_ws2812.c
+++ /dev/null
@@ -1,171 +0,0 @@
-// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-#include <stdlib.h>
-#include <string.h>
-#include <sys/cdefs.h>
-#include "esp_log.h"
-#include "esp_attr.h"
-#include "led_strip.h"
-#include "driver/rmt.h"
-
-static const char *TAG = "ws2812";
-#define STRIP_CHECK(a, str, goto_tag, ret_value, ...)                             \
-    do                                                                            \
-    {                                                                             \
-        if (!(a))                                                                 \
-        {                                                                         \
-            ESP_LOGE(TAG, "%s(%d): " str, __FUNCTION__, __LINE__, ##__VA_ARGS__); \
-            ret = ret_value;                                                      \
-            goto goto_tag;                                                        \
-        }                                                                         \
-    } while (0)
-
-#define WS2812_T0H_NS (350)
-#define WS2812_T0L_NS (1000)
-#define WS2812_T1H_NS (1000)
-#define WS2812_T1L_NS (350)
-#define WS2812_RESET_US (280)
-
-static uint32_t ws2812_t0h_ticks = 0;
-static uint32_t ws2812_t1h_ticks = 0;
-static uint32_t ws2812_t0l_ticks = 0;
-static uint32_t ws2812_t1l_ticks = 0;
-
-typedef struct {
-    led_strip_t parent;
-    rmt_channel_t rmt_channel;
-    uint32_t strip_len;
-    uint8_t buffer[0];
-} ws2812_t;
-
-/**
- * @brief Convert RGB data to RMT format.
- *
- * @note For WS2812, R,G,B each contains 256 different choices (i.e. uint8_t)
- *
- * @param[in] src: source data, to converted to RMT format
- * @param[in] dest: place where to store the convert result
- * @param[in] src_size: size of source data
- * @param[in] wanted_num: number of RMT items that want to get
- * @param[out] translated_size: number of source data that got converted
- * @param[out] item_num: number of RMT items which are converted from source data
- */
-static void IRAM_ATTR ws2812_rmt_adapter(const void *src, rmt_item32_t *dest, size_t src_size,
-        size_t wanted_num, size_t *translated_size, size_t *item_num)
-{
-    if (src == NULL || dest == NULL) {
-        *translated_size = 0;
-        *item_num = 0;
-        return;
-    }
-    const rmt_item32_t bit0 = {{{ ws2812_t0h_ticks, 1, ws2812_t0l_ticks, 0 }}}; //Logical 0
-    const rmt_item32_t bit1 = {{{ ws2812_t1h_ticks, 1, ws2812_t1l_ticks, 0 }}}; //Logical 1
-    size_t size = 0;
-    size_t num = 0;
-    uint8_t *psrc = (uint8_t *)src;
-    rmt_item32_t *pdest = dest;
-    while (size < src_size && num < wanted_num) {
-        for (int i = 0; i < 8; i++) {
-            // MSB first
-            if (*psrc & (1 << (7 - i))) {
-                pdest->val =  bit1.val;
-            } else {
-                pdest->val =  bit0.val;
-            }
-            num++;
-            pdest++;
-        }
-        size++;
-        psrc++;
-    }
-    *translated_size = size;
-    *item_num = num;
-}
-
-static esp_err_t ws2812_set_pixel(led_strip_t *strip, uint32_t index, uint32_t red, uint32_t green, uint32_t blue)
-{
-    esp_err_t ret = ESP_OK;
-    ws2812_t *ws2812 = __containerof(strip, ws2812_t, parent);
-    STRIP_CHECK(index < ws2812->strip_len, "index out of the maximum number of leds", err, ESP_ERR_INVALID_ARG);
-    uint32_t start = index * 3;
-    // In thr order of GRB
-    ws2812->buffer[start + 0] = green & 0xFF;
-    ws2812->buffer[start + 1] = red & 0xFF;
-    ws2812->buffer[start + 2] = blue & 0xFF;
-    return ESP_OK;
-err:
-    return ret;
-}
-
-static esp_err_t ws2812_refresh(led_strip_t *strip, uint32_t timeout_ms)
-{
-    esp_err_t ret = ESP_OK;
-    ws2812_t *ws2812 = __containerof(strip, ws2812_t, parent);
-    STRIP_CHECK(rmt_write_sample(ws2812->rmt_channel, ws2812->buffer, ws2812->strip_len * 3, true) == ESP_OK,
-                "transmit RMT samples failed", err, ESP_FAIL);
-    return rmt_wait_tx_done(ws2812->rmt_channel, pdMS_TO_TICKS(timeout_ms));
-err:
-    return ret;
-}
-
-static esp_err_t ws2812_clear(led_strip_t *strip, uint32_t timeout_ms)
-{
-    ws2812_t *ws2812 = __containerof(strip, ws2812_t, parent);
-    // Write zero to turn off all leds
-    memset(ws2812->buffer, 0, ws2812->strip_len * 3);
-    return ws2812_refresh(strip, timeout_ms);
-}
-
-static esp_err_t ws2812_del(led_strip_t *strip)
-{
-    ws2812_t *ws2812 = __containerof(strip, ws2812_t, parent);
-    free(ws2812);
-    return ESP_OK;
-}
-
-led_strip_t *led_strip_new_rmt_ws2812(const led_strip_config_t *config)
-{
-    led_strip_t *ret = NULL;
-    STRIP_CHECK(config, "configuration can't be null", err, NULL);
-
-    // 24 bits per led
-    uint32_t ws2812_size = sizeof(ws2812_t) + config->max_leds * 3;
-    ws2812_t *ws2812 = calloc(1, ws2812_size);
-    STRIP_CHECK(ws2812, "request memory for ws2812 failed", err, NULL);
-
-    uint32_t counter_clk_hz = 0;
-    STRIP_CHECK(rmt_get_counter_clock((rmt_channel_t)config->dev, &counter_clk_hz) == ESP_OK,
-                "get rmt counter clock failed", err, NULL);
-    // ns -> ticks
-    float ratio = (float)counter_clk_hz / 1e9;
-    ws2812_t0h_ticks = (uint32_t)(ratio * WS2812_T0H_NS);
-    ws2812_t0l_ticks = (uint32_t)(ratio * WS2812_T0L_NS);
-    ws2812_t1h_ticks = (uint32_t)(ratio * WS2812_T1H_NS);
-    ws2812_t1l_ticks = (uint32_t)(ratio * WS2812_T1L_NS);
-
-    // set ws2812 to rmt adapter
-    rmt_translator_init((rmt_channel_t)config->dev, ws2812_rmt_adapter);
-
-    ws2812->rmt_channel = (rmt_channel_t)config->dev;
-    ws2812->strip_len = config->max_leds;
-
-    ws2812->parent.set_pixel = ws2812_set_pixel;
-    ws2812->parent.refresh = ws2812_refresh;
-    ws2812->parent.clear = ws2812_clear;
-    ws2812->parent.del = ws2812_del;
-
-    return &ws2812->parent;
-err:
-    return ret;
-}
diff --git a/hw/bsp/esp32s3/family.cmake b/hw/bsp/esp32s3/family.cmake
deleted file mode 100644
index 0bcad035e..000000000
--- a/hw/bsp/esp32s3/family.cmake
+++ /dev/null
@@ -1,7 +0,0 @@
-cmake_minimum_required(VERSION 3.5)
-
-# Add example src and bsp directories
-set(EXTRA_COMPONENT_DIRS "src" "${TOP}/hw/bsp/esp32s3/boards" "${TOP}/hw/bsp/esp32s3/components")
-include($ENV{IDF_PATH}/tools/cmake/project.cmake)
-set(SUPPORTED_TARGETS esp32s3)
-set(FAMILY_MCUS ESP32S3)
diff --git a/hw/bsp/esp32s3/family.mk b/hw/bsp/esp32s3/family.mk
deleted file mode 100644
index d82a1c969..000000000
--- a/hw/bsp/esp32s3/family.mk
+++ /dev/null
@@ -1,25 +0,0 @@
-#DEPS_SUBMODULES +=
-
-.PHONY: all clean flash bootloader-flash app-flash erase monitor dfu-flash dfu
-
-all:
-	idf.py -B$(BUILD) -DFAMILY=$(FAMILY) -DBOARD=$(BOARD) $(CMAKE_DEFSYM) -DIDF_TARGET=esp32s3 build
-
-build: all
-
-clean:
-	idf.py -B$(BUILD) -DFAMILY=$(FAMILY) -DBOARD=$(BOARD) $(CMAKE_DEFSYM) clean
-
-fullclean:
-	if test -f sdkconfig; then $(RM) -f sdkconfig ; fi
-	if test -d $(BUILD); then $(RM) -rf $(BUILD) ; fi
-
-flash bootloader-flash app-flash erase monitor dfu-flash dfu:
-	idf.py -B$(BUILD) -DFAMILY=$(FAMILY) -DBOARD=$(BOARD) $(CMAKE_DEFSYM) $@
-
-uf2: $(BUILD)/$(PROJECT).uf2
-
-UF2_FAMILY_ID = 0xc47e5767
-$(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).bin
-	@echo CREATE $@
-	$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -b 0x0 -c -o $@ $^
diff --git a/hw/bsp/esp32s3/boards/CMakeLists.txt b/hw/bsp/espressif/boards/CMakeLists.txt
similarity index 73%
rename from hw/bsp/esp32s3/boards/CMakeLists.txt
rename to hw/bsp/espressif/boards/CMakeLists.txt
index 311c6e900..3832037a9 100644
--- a/hw/bsp/esp32s3/boards/CMakeLists.txt
+++ b/hw/bsp/espressif/boards/CMakeLists.txt
@@ -1,4 +1,4 @@
-idf_component_register(SRCS esp32s3.c
+idf_component_register(SRCS family.c
                     INCLUDE_DIRS "." "${BOARD}"
                     PRIV_REQUIRES "driver"
                     REQUIRES freertos src led_strip)
@@ -6,7 +6,7 @@ idf_component_register(SRCS esp32s3.c
 # Apply board specific content
 include("${BOARD}/board.cmake")
 
-idf_component_get_property( FREERTOS_ORIG_INCLUDE_PATH freertos ORIG_INCLUDE_PATH)
+idf_component_get_property(FREERTOS_ORIG_INCLUDE_PATH freertos ORIG_INCLUDE_PATH)
 target_include_directories(${COMPONENT_TARGET} PUBLIC
   "${FREERTOS_ORIG_INCLUDE_PATH}"
   "${TOP}/hw"
diff --git a/hw/bsp/espressif/boards/adafruit_feather_esp32s2/board.cmake b/hw/bsp/espressif/boards/adafruit_feather_esp32s2/board.cmake
new file mode 100644
index 000000000..fcd2f6e9f
--- /dev/null
+++ b/hw/bsp/espressif/boards/adafruit_feather_esp32s2/board.cmake
@@ -0,0 +1,3 @@
+# Apply board specific content here
+set(IDF_TARGET "esp32s2")
+set(FAMILY_MCUS ESP32S2)
diff --git a/hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.h b/hw/bsp/espressif/boards/adafruit_feather_esp32s2/board.h
similarity index 100%
rename from hw/bsp/esp32s2/boards/adafruit_feather_esp32s2/board.h
rename to hw/bsp/espressif/boards/adafruit_feather_esp32s2/board.h
diff --git a/hw/bsp/espressif/boards/adafruit_magtag_29gray/board.cmake b/hw/bsp/espressif/boards/adafruit_magtag_29gray/board.cmake
new file mode 100644
index 000000000..fcd2f6e9f
--- /dev/null
+++ b/hw/bsp/espressif/boards/adafruit_magtag_29gray/board.cmake
@@ -0,0 +1,3 @@
+# Apply board specific content here
+set(IDF_TARGET "esp32s2")
+set(FAMILY_MCUS ESP32S2)
diff --git a/hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.h b/hw/bsp/espressif/boards/adafruit_magtag_29gray/board.h
similarity index 100%
rename from hw/bsp/esp32s2/boards/adafruit_magtag_29gray/board.h
rename to hw/bsp/espressif/boards/adafruit_magtag_29gray/board.h
diff --git a/hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.cmake b/hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.cmake
new file mode 100644
index 000000000..fcd2f6e9f
--- /dev/null
+++ b/hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.cmake
@@ -0,0 +1,3 @@
+# Apply board specific content here
+set(IDF_TARGET "esp32s2")
+set(FAMILY_MCUS ESP32S2)
diff --git a/hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.h b/hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.h
similarity index 100%
rename from hw/bsp/esp32s2/boards/adafruit_metro_esp32s2/board.h
rename to hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.h
diff --git a/hw/bsp/espressif/boards/espressif_addax_1/board.cmake b/hw/bsp/espressif/boards/espressif_addax_1/board.cmake
new file mode 100644
index 000000000..bc528e9fa
--- /dev/null
+++ b/hw/bsp/espressif/boards/espressif_addax_1/board.cmake
@@ -0,0 +1,3 @@
+# Apply board specific content here
+set(IDF_TARGET "esp32s3")
+set(FAMILY_MCUS ESP32S3)
diff --git a/hw/bsp/esp32s3/boards/espressif_addax_1/board.h b/hw/bsp/espressif/boards/espressif_addax_1/board.h
similarity index 100%
rename from hw/bsp/esp32s3/boards/espressif_addax_1/board.h
rename to hw/bsp/espressif/boards/espressif_addax_1/board.h
diff --git a/hw/bsp/espressif/boards/espressif_kaluga_1/board.cmake b/hw/bsp/espressif/boards/espressif_kaluga_1/board.cmake
new file mode 100644
index 000000000..fcd2f6e9f
--- /dev/null
+++ b/hw/bsp/espressif/boards/espressif_kaluga_1/board.cmake
@@ -0,0 +1,3 @@
+# Apply board specific content here
+set(IDF_TARGET "esp32s2")
+set(FAMILY_MCUS ESP32S2)
diff --git a/hw/bsp/esp32s2/boards/espressif_kaluga_1/board.h b/hw/bsp/espressif/boards/espressif_kaluga_1/board.h
similarity index 100%
rename from hw/bsp/esp32s2/boards/espressif_kaluga_1/board.h
rename to hw/bsp/espressif/boards/espressif_kaluga_1/board.h
diff --git a/hw/bsp/espressif/boards/espressif_s3_devkitc/board.cmake b/hw/bsp/espressif/boards/espressif_s3_devkitc/board.cmake
new file mode 100644
index 000000000..bc528e9fa
--- /dev/null
+++ b/hw/bsp/espressif/boards/espressif_s3_devkitc/board.cmake
@@ -0,0 +1,3 @@
+# Apply board specific content here
+set(IDF_TARGET "esp32s3")
+set(FAMILY_MCUS ESP32S3)
diff --git a/hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.h b/hw/bsp/espressif/boards/espressif_s3_devkitc/board.h
similarity index 100%
rename from hw/bsp/esp32s3/boards/espressif_s3_devkitc/board.h
rename to hw/bsp/espressif/boards/espressif_s3_devkitc/board.h
diff --git a/hw/bsp/espressif/boards/espressif_s3_devkitm/board.cmake b/hw/bsp/espressif/boards/espressif_s3_devkitm/board.cmake
new file mode 100644
index 000000000..bc528e9fa
--- /dev/null
+++ b/hw/bsp/espressif/boards/espressif_s3_devkitm/board.cmake
@@ -0,0 +1,3 @@
+# Apply board specific content here
+set(IDF_TARGET "esp32s3")
+set(FAMILY_MCUS ESP32S3)
diff --git a/hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.h b/hw/bsp/espressif/boards/espressif_s3_devkitm/board.h
similarity index 100%
rename from hw/bsp/esp32s3/boards/espressif_s3_devkitm/board.h
rename to hw/bsp/espressif/boards/espressif_s3_devkitm/board.h
diff --git a/hw/bsp/espressif/boards/espressif_saola_1/board.cmake b/hw/bsp/espressif/boards/espressif_saola_1/board.cmake
new file mode 100644
index 000000000..fcd2f6e9f
--- /dev/null
+++ b/hw/bsp/espressif/boards/espressif_saola_1/board.cmake
@@ -0,0 +1,3 @@
+# Apply board specific content here
+set(IDF_TARGET "esp32s2")
+set(FAMILY_MCUS ESP32S2)
diff --git a/hw/bsp/esp32s2/boards/espressif_saola_1/board.h b/hw/bsp/espressif/boards/espressif_saola_1/board.h
similarity index 100%
rename from hw/bsp/esp32s2/boards/espressif_saola_1/board.h
rename to hw/bsp/espressif/boards/espressif_saola_1/board.h
diff --git a/hw/bsp/esp32s2/boards/esp32s2.c b/hw/bsp/espressif/boards/family.c
similarity index 100%
rename from hw/bsp/esp32s2/boards/esp32s2.c
rename to hw/bsp/espressif/boards/family.c
diff --git a/hw/bsp/esp32s2/components/led_strip/CMakeLists.txt b/hw/bsp/espressif/components/led_strip/CMakeLists.txt
similarity index 100%
rename from hw/bsp/esp32s2/components/led_strip/CMakeLists.txt
rename to hw/bsp/espressif/components/led_strip/CMakeLists.txt
diff --git a/hw/bsp/esp32s2/components/led_strip/include/led_strip.h b/hw/bsp/espressif/components/led_strip/include/led_strip.h
similarity index 100%
rename from hw/bsp/esp32s2/components/led_strip/include/led_strip.h
rename to hw/bsp/espressif/components/led_strip/include/led_strip.h
diff --git a/hw/bsp/esp32s2/components/led_strip/src/led_strip_rmt_ws2812.c b/hw/bsp/espressif/components/led_strip/src/led_strip_rmt_ws2812.c
similarity index 100%
rename from hw/bsp/esp32s2/components/led_strip/src/led_strip_rmt_ws2812.c
rename to hw/bsp/espressif/components/led_strip/src/led_strip_rmt_ws2812.c
diff --git a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
new file mode 100644
index 000000000..0bd404cee
--- /dev/null
+++ b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
@@ -0,0 +1,60 @@
+idf_build_get_property(target IDF_TARGET)
+
+set(srcs)
+set(includes_public)
+set(includes_private)
+set(compile_options)
+set(tusb_src "${TOP}/src")
+
+if(target STREQUAL "esp32s3")
+  set(tusb_mcu "OPT_MCU_ESP32S3")
+elseif(target STREQUAL "esp32s2")
+  set(tusb_mcu "OPT_MCU_ESP32S2")
+else()
+  # CONFIG_TINYUSB dependency has been guaranteed by Kconfig logic,
+  # So it's not possible that cmake goes here
+  message(FATAL_ERROR "TinyUSB is not support on ${target}.")
+  return()
+endif()
+
+list(APPEND compile_options
+    "-DCFG_TUSB_MCU=${tusb_mcu}"
+    #"-DCFG_TUSB_DEBUG=1"
+    )
+
+idf_component_get_property(freertos_component_dir freertos COMPONENT_DIR)
+
+list(APPEND includes_private
+    "${tusb_src}"
+    )
+
+list(APPEND includes_public
+    "${tusb_src}"
+    # The FreeRTOS API include convention in tinyusb is different from esp-idf
+    "${freertos_component_dir}/include/freertos"
+    )
+
+list(APPEND srcs
+    "${tusb_src}/tusb.c"
+    "${tusb_src}/common/tusb_fifo.c"
+    "${tusb_src}/device/usbd.c"
+    "${tusb_src}/device/usbd_control.c"
+    "${tusb_src}/class/cdc/cdc_device.c"
+    "${tusb_src}/class/dfu/dfu_rt_device.c"
+    "${tusb_src}/class/hid/hid_device.c"
+    "${tusb_src}/class/midi/midi_device.c"
+    "${tusb_src}/class/msc/msc_device.c"
+    "${tusb_src}/class/net/ecm_rndis_device.c"
+    "${tusb_src}/class/net/ncm_device.c"
+    "${tusb_src}/class/usbtmc/usbtmc_device.c"
+    "${tusb_src}/class/vendor/vendor_device.c"
+    "${tusb_src}/portable/synopsys/dwc2/dcd_dwc2.c"
+    )
+
+idf_component_register(SRCS ${srcs}
+    INCLUDE_DIRS ${includes_public}
+    PRIV_INCLUDE_DIRS ${includes_private}
+    PRIV_REQUIRES src
+    )
+
+target_compile_options(${COMPONENT_LIB} PUBLIC ${compile_options})
diff --git a/hw/bsp/espressif/family.cmake b/hw/bsp/espressif/family.cmake
new file mode 100644
index 000000000..19b9139c3
--- /dev/null
+++ b/hw/bsp/espressif/family.cmake
@@ -0,0 +1,9 @@
+cmake_minimum_required(VERSION 3.5)
+
+# Apply board specific content
+include("${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake")
+
+# Add example src and bsp directories
+set(EXTRA_COMPONENT_DIRS "src" "${CMAKE_CURRENT_LIST_DIR}/boards" "${CMAKE_CURRENT_LIST_DIR}/components")
+
+include($ENV{IDF_PATH}/tools/cmake/project.cmake)
diff --git a/hw/bsp/esp32s2/family.mk b/hw/bsp/espressif/family.mk
similarity index 62%
rename from hw/bsp/esp32s2/family.mk
rename to hw/bsp/espressif/family.mk
index fba0f038b..0dc21b8eb 100644
--- a/hw/bsp/esp32s2/family.mk
+++ b/hw/bsp/espressif/family.mk
@@ -1,9 +1,21 @@
 #DEPS_SUBMODULES +=
 
+UF2_FAMILY_ID_esp32s2 = 0xbfdd4eee
+UF2_FAMILY_ID_esp32s3 = 0xc47e5767
+
+BOARD_CMAKE := $(file < $(TOP)/$(BOARD_PATH)/board.cmake)
+ifneq ($(findstring esp32s2,$(BOARD_CMAKE)),)
+	IDF_TARGET = esp32s2
+else
+ifneq ($(findstring esp32s3,$(BOARD_CMAKE)),)
+	IDF_TARGET = esp32s3
+endif
+endif
+
 .PHONY: all clean flash bootloader-flash app-flash erase monitor dfu-flash dfu
 
 all:
-	idf.py -B$(BUILD) -DFAMILY=$(FAMILY) -DBOARD=$(BOARD) $(CMAKE_DEFSYM) -DIDF_TARGET=esp32s2 build
+	idf.py -B$(BUILD) -DFAMILY=$(FAMILY) -DBOARD=$(BOARD) $(CMAKE_DEFSYM) build
 
 build: all
 
@@ -17,7 +29,6 @@ clean flash bootloader-flash app-flash erase monitor dfu-flash dfu size size-com
 
 uf2: $(BUILD)/$(PROJECT).uf2
 
-UF2_FAMILY_ID = 0xbfdd4eee
 $(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).bin
 	@echo CREATE $@
-	$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -b 0x0 -c -o $@ $^
+	$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID_$(IDF_TARGET)) -b 0x0 -c -o $@ $^
diff --git a/tools/build_esp32sx.py b/tools/build_esp32sx.py
index 2947a0a6b..00783bf58 100644
--- a/tools/build_esp32sx.py
+++ b/tools/build_esp32sx.py
@@ -37,10 +37,7 @@ all_examples.sort()
 
 # Build all boards if not specified
 all_boards = []
-for entry in os.scandir("hw/bsp/esp32s2/boards"):
-    if entry.is_dir():
-        all_boards.append(entry.name)
-for entry in os.scandir("hw/bsp/esp32s3/boards"):
+for entry in os.scandir("hw/bsp/espressif/boards"):
     if entry.is_dir():
         all_boards.append(entry.name)
 filter_with_input(all_boards)
diff --git a/tools/build_family.py b/tools/build_family.py
index 532938d42..ae0bb282d 100644
--- a/tools/build_family.py
+++ b/tools/build_family.py
@@ -52,7 +52,7 @@ if __name__ == '__main__':
     # If family are not specified in arguments, build all
     all_families = []
     for entry in os.scandir("hw/bsp"):
-        if entry.is_dir() and os.path.isdir(entry.path + "/boards") and entry.name not in ("esp32s2", "esp32s3"):
+        if entry.is_dir() and os.path.isdir(entry.path + "/boards") and entry.name != 'espressif'
             all_families.append(entry.name)
     filter_with_input(all_families)
     all_families.sort()

From 641613c428e10a029b172c318d4db077e35fee7d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 30 Mar 2023 10:41:11 +0700
Subject: [PATCH 230/691] update all cmake for esp32 build

---
 examples/device/board_test/CMakeLists.txt     | 27 ++++++---------
 examples/device/board_test/src/CMakeLists.txt | 16 ++-------
 examples/device/board_test/src/main.c         |  2 +-
 .../device/cdc_msc_freertos/CMakeLists.txt    |  2 +-
 .../cdc_msc_freertos/src/CMakeLists.txt       |  4 ---
 .../device/cdc_msc_freertos/src/tusb_config.h |  2 ++
 .../hid_composite_freertos/CMakeLists.txt     | 20 ++++++-----
 .../hid_composite_freertos/src/CMakeLists.txt | 34 ++-----------------
 .../hid_composite_freertos/src/tusb_config.h  |  2 ++
 hw/bsp/espressif/boards/CMakeLists.txt        |  8 +----
 hw/bsp/espressif/boards/family.c              |  2 +-
 .../components/tinyusb_src/CMakeLists.txt     |  1 +
 tools/build_family.py                         |  4 +--
 13 files changed, 40 insertions(+), 84 deletions(-)

diff --git a/examples/device/board_test/CMakeLists.txt b/examples/device/board_test/CMakeLists.txt
index 37113578e..b21d56f9e 100644
--- a/examples/device/board_test/CMakeLists.txt
+++ b/examples/device/board_test/CMakeLists.txt
@@ -1,29 +1,24 @@
 cmake_minimum_required(VERSION 3.5)
 
-include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
-
-# Check for -DFAMILY=
-if(FAMILY MATCHES "^esp32s[2-3]")
-  # use BOARD-Directory name for project id
-  get_filename_component(PROJECT ${CMAKE_CURRENT_SOURCE_DIR} NAME)
-  set(PROJECT ${BOARD}-${PROJECT})
-
+# -DFAMILY=espressif
+if(FAMILY STREQUAL "espressif")
   # TOP is absolute path to root directory of TinyUSB git repo
   set(TOP "../../..")
   get_filename_component(TOP "${TOP}" REALPATH)
+endif()
 
-  project(${PROJECT})
+include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-else()
+# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
+family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-  # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-  family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
+project(${PROJECT})
 
-  project(${PROJECT})
-
-  # Checks this example is valid for the family and initializes the project
-  family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+# Checks this example is valid for the family and initializes the project
+family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
+# Other family such as rp2040
+if(NOT FAMILY STREQUAL "espressif")
   add_executable(${PROJECT})
 
   # Example source
diff --git a/examples/device/board_test/src/CMakeLists.txt b/examples/device/board_test/src/CMakeLists.txt
index 37625f441..03f4c7505 100644
--- a/examples/device/board_test/src/CMakeLists.txt
+++ b/examples/device/board_test/src/CMakeLists.txt
@@ -1,17 +1,7 @@
-# FAMILY = esp32sx
 idf_component_register(SRCS "main.c"
                     INCLUDE_DIRS "."
-                    REQUIRES freertos soc)
+                    REQUIRES freertos soc tinyusb_src)
 
-file(TO_NATIVE_PATH "${TOP}/hw/bsp/${FAMILY}/boards/${BOARD}/board.cmake" board_cmake)
-
-if(EXISTS ${board_cmake})
-    include(${board_cmake})
-endif()
-
-idf_component_get_property( FREERTOS_ORIG_INCLUDE_PATH freertos ORIG_INCLUDE_PATH)
 target_include_directories(${COMPONENT_TARGET} PUBLIC
-  "${FREERTOS_ORIG_INCLUDE_PATH}"
-  "${TOP}/hw"
-  "${TOP}/src"
-)
+    "${TOP}/hw"
+    )
diff --git a/examples/device/board_test/src/main.c b/examples/device/board_test/src/main.c
index 3f8d55c52..b11f6f2bb 100644
--- a/examples/device/board_test/src/main.c
+++ b/examples/device/board_test/src/main.c
@@ -30,7 +30,7 @@
 #include "bsp/board.h"
 
 //--------------------------------------------------------------------+
-// MACRO CONSTANT TYPEDEF PROTYPES
+// MACRO CONSTANT TYPEDEF PROTOTYPES
 //--------------------------------------------------------------------+
 
 /* Blink pattern
diff --git a/examples/device/cdc_msc_freertos/CMakeLists.txt b/examples/device/cdc_msc_freertos/CMakeLists.txt
index 82bf79f19..573924b18 100644
--- a/examples/device/cdc_msc_freertos/CMakeLists.txt
+++ b/examples/device/cdc_msc_freertos/CMakeLists.txt
@@ -16,6 +16,6 @@ project(${PROJECT})
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
 # Check for -DFAMILY=
-if(NOT FAMILY  STREQUAL "espressif")
+if(NOT FAMILY STREQUAL "espressif")
   message(FATAL_ERROR "Invalid FAMILY specified: ${FAMILY}")
 endif()
diff --git a/examples/device/cdc_msc_freertos/src/CMakeLists.txt b/examples/device/cdc_msc_freertos/src/CMakeLists.txt
index e433e5074..9c597b302 100644
--- a/examples/device/cdc_msc_freertos/src/CMakeLists.txt
+++ b/examples/device/cdc_msc_freertos/src/CMakeLists.txt
@@ -5,7 +5,3 @@ idf_component_register(SRCS "main.c" "usb_descriptors.c" "msc_disk.c"
 target_include_directories(${COMPONENT_TARGET} PUBLIC
   "${TOP}/hw"
 )
-
-target_compile_definitions(${COMPONENT_TARGET} PUBLIC
-  ESP_PLATFORM
-)
diff --git a/examples/device/cdc_msc_freertos/src/tusb_config.h b/examples/device/cdc_msc_freertos/src/tusb_config.h
index 0ec8896b9..91efe7d40 100644
--- a/examples/device/cdc_msc_freertos/src/tusb_config.h
+++ b/examples/device/cdc_msc_freertos/src/tusb_config.h
@@ -54,7 +54,9 @@
 #endif
 
 // This examples use FreeRTOS
+#ifndef CFG_TUSB_OS
 #define CFG_TUSB_OS           OPT_OS_FREERTOS
+#endif
 
 // Espressif IDF requires "freertos/" prefix in include path
 #if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
diff --git a/examples/device/hid_composite_freertos/CMakeLists.txt b/examples/device/hid_composite_freertos/CMakeLists.txt
index ed734b954..573924b18 100644
--- a/examples/device/hid_composite_freertos/CMakeLists.txt
+++ b/examples/device/hid_composite_freertos/CMakeLists.txt
@@ -1,17 +1,21 @@
 cmake_minimum_required(VERSION 3.5)
 
-# use BOARD-Directory name for project id
-get_filename_component(PROJECT ${CMAKE_CURRENT_SOURCE_DIR} NAME)
-set(PROJECT ${BOARD}-${PROJECT})
-
 # TOP is absolute path to root directory of TinyUSB git repo
+# needed for esp32sx build. TODO could be removed later on
 set(TOP "../../..")
 get_filename_component(TOP "${TOP}" REALPATH)
 
+include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
+
+# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
+family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
+
+project(${PROJECT})
+
+# Checks this example is valid for the family and initializes the project
+family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+
 # Check for -DFAMILY=
-if(FAMILY MATCHES "^esp32s[2-3]")
-  include(${TOP}/hw/bsp/${FAMILY}/family.cmake)
-  project(${PROJECT})
-else()
+if(NOT FAMILY STREQUAL "espressif")
   message(FATAL_ERROR "Invalid FAMILY specified: ${FAMILY}")
 endif()
diff --git a/examples/device/hid_composite_freertos/src/CMakeLists.txt b/examples/device/hid_composite_freertos/src/CMakeLists.txt
index 25da8fcd7..1e1e465e0 100644
--- a/examples/device/hid_composite_freertos/src/CMakeLists.txt
+++ b/examples/device/hid_composite_freertos/src/CMakeLists.txt
@@ -1,35 +1,7 @@
 idf_component_register(SRCS "main.c" "usb_descriptors.c"
                     INCLUDE_DIRS "."
-                    REQUIRES freertos soc)
-
-file(TO_NATIVE_PATH "${TOP}/hw/bsp/${FAMILY}/boards/${BOARD}/board.cmake" board_cmake)
-
-if(EXISTS ${board_cmake})
-    include(${board_cmake})
-endif()
+                    REQUIRES freertos soc tinyusb_src)
 
 target_include_directories(${COMPONENT_TARGET} PUBLIC
-  "${TOP}/hw"
-  "${TOP}/src"
-)
-
-target_compile_definitions(${COMPONENT_TARGET} PUBLIC
-  ESP_PLATFORM
-)
-
-target_sources(${COMPONENT_TARGET} PUBLIC
-  "${TOP}/src/tusb.c"
-  "${TOP}/src/common/tusb_fifo.c"
-  "${TOP}/src/device/usbd.c"
-  "${TOP}/src/device/usbd_control.c"
-  "${TOP}/src/class/cdc/cdc_device.c"
-  "${TOP}/src/class/dfu/dfu_rt_device.c"
-  "${TOP}/src/class/hid/hid_device.c"
-  "${TOP}/src/class/midi/midi_device.c"
-  "${TOP}/src/class/msc/msc_device.c"
-  "${TOP}/src/class/net/ecm_rndis_device.c"
-  "${TOP}/src/class/net/ncm_device.c"
-  "${TOP}/src/class/usbtmc/usbtmc_device.c"
-  "${TOP}/src/class/vendor/vendor_device.c"
-  "${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c"
-)
+    "${TOP}/hw"
+    )
diff --git a/examples/device/hid_composite_freertos/src/tusb_config.h b/examples/device/hid_composite_freertos/src/tusb_config.h
index 935ae9453..3ba9bf311 100644
--- a/examples/device/hid_composite_freertos/src/tusb_config.h
+++ b/examples/device/hid_composite_freertos/src/tusb_config.h
@@ -54,7 +54,9 @@
 #endif
 
 // This examples use FreeRTOS
+#ifndef CFG_TUSB_OS
 #define CFG_TUSB_OS           OPT_OS_FREERTOS
+#endif
 
 // Espressif IDF requires "freertos/" prefix in include path
 #if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
diff --git a/hw/bsp/espressif/boards/CMakeLists.txt b/hw/bsp/espressif/boards/CMakeLists.txt
index 3832037a9..a5332d715 100644
--- a/hw/bsp/espressif/boards/CMakeLists.txt
+++ b/hw/bsp/espressif/boards/CMakeLists.txt
@@ -1,14 +1,8 @@
 idf_component_register(SRCS family.c
                     INCLUDE_DIRS "." "${BOARD}"
                     PRIV_REQUIRES "driver"
-                    REQUIRES freertos src led_strip)
+                    REQUIRES led_strip src tinyusb_src)
 
-# Apply board specific content
-include("${BOARD}/board.cmake")
-
-idf_component_get_property(FREERTOS_ORIG_INCLUDE_PATH freertos ORIG_INCLUDE_PATH)
 target_include_directories(${COMPONENT_TARGET} PUBLIC
-  "${FREERTOS_ORIG_INCLUDE_PATH}"
   "${TOP}/hw"
-  "${TOP}/src"
 )
diff --git a/hw/bsp/espressif/boards/family.c b/hw/bsp/espressif/boards/family.c
index 015d8305b..8fc4a1cc8 100644
--- a/hw/bsp/espressif/boards/family.c
+++ b/hw/bsp/espressif/boards/family.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "../../board.h"
+#include "bsp/board.h"
 #include "board.h"
 
 #include "esp_rom_gpio.h"
diff --git a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
index 0bd404cee..9aadda43d 100644
--- a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
+++ b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
@@ -19,6 +19,7 @@ endif()
 
 list(APPEND compile_options
     "-DCFG_TUSB_MCU=${tusb_mcu}"
+    "-DCFG_TUSB_OS=OPT_OS_FREERTOS"
     #"-DCFG_TUSB_DEBUG=1"
     )
 
diff --git a/tools/build_family.py b/tools/build_family.py
index ae0bb282d..f9f7261fe 100644
--- a/tools/build_family.py
+++ b/tools/build_family.py
@@ -42,7 +42,7 @@ if __name__ == '__main__':
     # If examples are not specified in arguments, build all
     all_examples = []
     for dir1 in os.scandir("examples"):
-        if dir1.is_dir():
+        if dir1.is_dir() and 'cmake-build' not in dir1.name:
             for entry in os.scandir(dir1.path):
                 if entry.is_dir():
                     all_examples.append(dir1.name + '/' + entry.name)
@@ -52,7 +52,7 @@ if __name__ == '__main__':
     # If family are not specified in arguments, build all
     all_families = []
     for entry in os.scandir("hw/bsp"):
-        if entry.is_dir() and os.path.isdir(entry.path + "/boards") and entry.name != 'espressif'
+        if entry.is_dir() and os.path.isdir(entry.path + "/boards") and entry.name != 'espressif':
             all_families.append(entry.name)
     filter_with_input(all_families)
     all_families.sort()

From cf7aad790c23dd1adebd0d86ae2338a1cd64aa97 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 30 Mar 2023 11:37:36 +0700
Subject: [PATCH 231/691] more esp32 cmake clean up

---
 examples/device/board_test/CMakeLists.txt              |  7 -------
 examples/device/board_test/src/CMakeLists.txt          |  6 +-----
 examples/device/cdc_msc_freertos/CMakeLists.txt        |  5 -----
 examples/device/cdc_msc_freertos/src/CMakeLists.txt    |  6 +-----
 examples/device/hid_composite_freertos/CMakeLists.txt  |  5 -----
 .../device/hid_composite_freertos/src/CMakeLists.txt   |  6 +-----
 hw/bsp/espressif/boards/CMakeLists.txt                 |  8 +++-----
 hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt | 10 ++--------
 hw/bsp/espressif/family.cmake                          |  2 +-
 9 files changed, 9 insertions(+), 46 deletions(-)

diff --git a/examples/device/board_test/CMakeLists.txt b/examples/device/board_test/CMakeLists.txt
index b21d56f9e..4435bd523 100644
--- a/examples/device/board_test/CMakeLists.txt
+++ b/examples/device/board_test/CMakeLists.txt
@@ -1,12 +1,5 @@
 cmake_minimum_required(VERSION 3.5)
 
-# -DFAMILY=espressif
-if(FAMILY STREQUAL "espressif")
-  # TOP is absolute path to root directory of TinyUSB git repo
-  set(TOP "../../..")
-  get_filename_component(TOP "${TOP}" REALPATH)
-endif()
-
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
diff --git a/examples/device/board_test/src/CMakeLists.txt b/examples/device/board_test/src/CMakeLists.txt
index 03f4c7505..8d85dcafd 100644
--- a/examples/device/board_test/src/CMakeLists.txt
+++ b/examples/device/board_test/src/CMakeLists.txt
@@ -1,7 +1,3 @@
 idf_component_register(SRCS "main.c"
                     INCLUDE_DIRS "."
-                    REQUIRES freertos soc tinyusb_src)
-
-target_include_directories(${COMPONENT_TARGET} PUBLIC
-    "${TOP}/hw"
-    )
+                    REQUIRES boards tinyusb_src)
diff --git a/examples/device/cdc_msc_freertos/CMakeLists.txt b/examples/device/cdc_msc_freertos/CMakeLists.txt
index 573924b18..714e5333b 100644
--- a/examples/device/cdc_msc_freertos/CMakeLists.txt
+++ b/examples/device/cdc_msc_freertos/CMakeLists.txt
@@ -1,10 +1,5 @@
 cmake_minimum_required(VERSION 3.5)
 
-# TOP is absolute path to root directory of TinyUSB git repo
-# needed for esp32sx build. TODO could be removed later on
-set(TOP "../../..")
-get_filename_component(TOP "${TOP}" REALPATH)
-
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
diff --git a/examples/device/cdc_msc_freertos/src/CMakeLists.txt b/examples/device/cdc_msc_freertos/src/CMakeLists.txt
index 9c597b302..b77a68c8d 100644
--- a/examples/device/cdc_msc_freertos/src/CMakeLists.txt
+++ b/examples/device/cdc_msc_freertos/src/CMakeLists.txt
@@ -1,7 +1,3 @@
 idf_component_register(SRCS "main.c" "usb_descriptors.c" "msc_disk.c"
                     INCLUDE_DIRS "."
-                    REQUIRES freertos soc tinyusb_src)
-
-target_include_directories(${COMPONENT_TARGET} PUBLIC
-  "${TOP}/hw"
-)
+                    REQUIRES boards tinyusb_src)
diff --git a/examples/device/hid_composite_freertos/CMakeLists.txt b/examples/device/hid_composite_freertos/CMakeLists.txt
index 573924b18..714e5333b 100644
--- a/examples/device/hid_composite_freertos/CMakeLists.txt
+++ b/examples/device/hid_composite_freertos/CMakeLists.txt
@@ -1,10 +1,5 @@
 cmake_minimum_required(VERSION 3.5)
 
-# TOP is absolute path to root directory of TinyUSB git repo
-# needed for esp32sx build. TODO could be removed later on
-set(TOP "../../..")
-get_filename_component(TOP "${TOP}" REALPATH)
-
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
diff --git a/examples/device/hid_composite_freertos/src/CMakeLists.txt b/examples/device/hid_composite_freertos/src/CMakeLists.txt
index 1e1e465e0..6d912854f 100644
--- a/examples/device/hid_composite_freertos/src/CMakeLists.txt
+++ b/examples/device/hid_composite_freertos/src/CMakeLists.txt
@@ -1,7 +1,3 @@
 idf_component_register(SRCS "main.c" "usb_descriptors.c"
                     INCLUDE_DIRS "."
-                    REQUIRES freertos soc tinyusb_src)
-
-target_include_directories(${COMPONENT_TARGET} PUBLIC
-    "${TOP}/hw"
-    )
+                    REQUIRES boards tinyusb_src)
diff --git a/hw/bsp/espressif/boards/CMakeLists.txt b/hw/bsp/espressif/boards/CMakeLists.txt
index a5332d715..325263c1d 100644
--- a/hw/bsp/espressif/boards/CMakeLists.txt
+++ b/hw/bsp/espressif/boards/CMakeLists.txt
@@ -1,8 +1,6 @@
+set(hw_dir "${CMAKE_CURRENT_LIST_DIR}/../../../")
+
 idf_component_register(SRCS family.c
-                    INCLUDE_DIRS "." "${BOARD}"
+                    INCLUDE_DIRS "." ${BOARD} ${hw_dir}
                     PRIV_REQUIRES "driver"
                     REQUIRES led_strip src tinyusb_src)
-
-target_include_directories(${COMPONENT_TARGET} PUBLIC
-  "${TOP}/hw"
-)
diff --git a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
index 9aadda43d..5e0ed9ac7 100644
--- a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
+++ b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
@@ -2,9 +2,8 @@ idf_build_get_property(target IDF_TARGET)
 
 set(srcs)
 set(includes_public)
-set(includes_private)
 set(compile_options)
-set(tusb_src "${TOP}/src")
+set(tusb_src "${CMAKE_CURRENT_SOURCE_DIR}/../../../../../src")
 
 if(target STREQUAL "esp32s3")
   set(tusb_mcu "OPT_MCU_ESP32S3")
@@ -25,10 +24,6 @@ list(APPEND compile_options
 
 idf_component_get_property(freertos_component_dir freertos COMPONENT_DIR)
 
-list(APPEND includes_private
-    "${tusb_src}"
-    )
-
 list(APPEND includes_public
     "${tusb_src}"
     # The FreeRTOS API include convention in tinyusb is different from esp-idf
@@ -54,8 +49,7 @@ list(APPEND srcs
 
 idf_component_register(SRCS ${srcs}
     INCLUDE_DIRS ${includes_public}
-    PRIV_INCLUDE_DIRS ${includes_private}
-    PRIV_REQUIRES src
+    REQUIRES src
     )
 
 target_compile_options(${COMPONENT_LIB} PUBLIC ${compile_options})
diff --git a/hw/bsp/espressif/family.cmake b/hw/bsp/espressif/family.cmake
index 19b9139c3..954dc635b 100644
--- a/hw/bsp/espressif/family.cmake
+++ b/hw/bsp/espressif/family.cmake
@@ -1,6 +1,6 @@
 cmake_minimum_required(VERSION 3.5)
 
-# Apply board specific content
+# Apply board specific content i.e IDF_TARGET must be set before project.cmake is included
 include("${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake")
 
 # Add example src and bsp directories

From d7d4e7b527357d0d4eac63e1c7c26548de5177e3 Mon Sep 17 00:00:00 2001
From: epatstarkey <ep.atstarkey@gmail.com>
Date: Thu, 30 Mar 2023 11:34:39 -0500
Subject: [PATCH 232/691] Update samples

---
 examples/device/webusb_serial/src/main.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/examples/device/webusb_serial/src/main.c b/examples/device/webusb_serial/src/main.c
index 838d86381..eaca78c73 100644
--- a/examples/device/webusb_serial/src/main.c
+++ b/examples/device/webusb_serial/src/main.c
@@ -112,7 +112,7 @@ void echo_all(uint8_t buf[], uint32_t count)
   if ( web_serial_connected )
   {
     tud_vendor_write(buf, count);
-    tud_vendor_flush();
+    tud_vendor_write_flush();
   }
 
   // echo to cdc
@@ -211,7 +211,7 @@ bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_requ
           blink_interval_ms = BLINK_ALWAYS_ON;
 
           tud_vendor_write_str("\r\nWebUSB interface connected\r\n");
-          tud_vendor_flush();
+          tud_vendor_write_flush();
         }else
         {
           blink_interval_ms = BLINK_MOUNTED;

From 1372d4e4d55ee0ff63e07e75aa873c3df3f9e108 Mon Sep 17 00:00:00 2001
From: epatstarkey <ep.atstarkey@gmail.com>
Date: Fri, 31 Mar 2023 12:58:51 -0500
Subject: [PATCH 233/691] Remove trailing whitespace

---
 src/class/vendor/vendor_device.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/class/vendor/vendor_device.h b/src/class/vendor/vendor_device.h
index ca4837d7b..7afd49cc1 100644
--- a/src/class/vendor/vendor_device.h
+++ b/src/class/vendor/vendor_device.h
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)

From 160e2a8aeb2b2ed67f2abb6231b4efd2e0792077 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 3 Apr 2023 11:07:48 +0700
Subject: [PATCH 234/691] skip .idea

---
 .gitignore | 1 -
 1 file changed, 1 deletion(-)

diff --git a/.gitignore b/.gitignore
index 268decfc6..8f5bb6efd 100644
--- a/.gitignore
+++ b/.gitignore
@@ -12,7 +12,6 @@ latex
 *.ind
 .env
 .settings/
-.idea/
 .vscode/
 .gdb_history
 /examples/*/*/build*

From 1911c613c7f66d13bf22a1252144cadae1264533 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 3 Apr 2023 11:33:53 +0700
Subject: [PATCH 235/691] add some .idea configuration

---
 .idea/.gitignore                             |  8 +++
 .idea/cmake.xml                              | 28 +++++++++
 .idea/runConfigurations/cdc_msc.xml          | 10 +++
 .idea/runConfigurations/hid_composite.xml    | 10 +++
 .idea/runConfigurations/msc_dual_lun.xml     | 10 +++
 .idea/runConfigurations/tinyusb_examples.xml |  5 ++
 .idea/vcs.xml                                | 65 ++++++++++++++++++++
 .pre-commit-config.yaml                      |  1 +
 8 files changed, 137 insertions(+)
 create mode 100644 .idea/.gitignore
 create mode 100644 .idea/cmake.xml
 create mode 100644 .idea/runConfigurations/cdc_msc.xml
 create mode 100644 .idea/runConfigurations/hid_composite.xml
 create mode 100644 .idea/runConfigurations/msc_dual_lun.xml
 create mode 100644 .idea/runConfigurations/tinyusb_examples.xml
 create mode 100644 .idea/vcs.xml

diff --git a/.idea/.gitignore b/.idea/.gitignore
new file mode 100644
index 000000000..73f69e095
--- /dev/null
+++ b/.idea/.gitignore
@@ -0,0 +1,8 @@
+# Default ignored files
+/shelf/
+/workspace.xml
+# Datasource local storage ignored files
+/dataSources/
+/dataSources.local.xml
+# Editor-based HTTP Client requests
+/httpRequests/
diff --git a/.idea/cmake.xml b/.idea/cmake.xml
new file mode 100644
index 000000000..291da5371
--- /dev/null
+++ b/.idea/cmake.xml
@@ -0,0 +1,28 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project version="4">
+  <component name="CMakeSharedSettings">
+    <configurations>
+      <configuration PROFILE_NAME="esp32s3" ENABLED="false" GENERATION_OPTIONS="-DFAMILY=espressif -DBOARD=espressif_s3_devkitm -DIDF_TARGET=esp32s3">
+        <ADDITIONAL_GENERATION_ENVIRONMENT>
+          <envs>
+            <env name="ESPBAUD" value="1500000" />
+            <env name="ESPPORT" value="/dev/ttyUSB0" />
+            <env name="IDF_PATH" value="$PROJECT_DIR$/../esp-idf" />
+            <env name="PATH" value="$PROJECT_DIR$/../esp-idf/components/esptool_py/esptool:/home/hathach/code/esp-idf/components/espcoredump:/home/hathach/code/esp-idf/components/partition_table:/home/hathach/code/esp-idf/components/app_update:/home/hathach/.espressif/tools/xtensa-esp-elf-gdb/11.2_20220823/xtensa-esp-elf-gdb/bin:/home/hathach/.espressif/tools/riscv32-esp-elf-gdb/11.2_20220823/riscv32-esp-elf-gdb/bin:/home/hathach/.espressif/tools/xtensa-esp32-elf/esp-2021r2-patch5-8.4.0/xtensa-esp32-elf/bin:/home/hathach/.espressif/tools/xtensa-esp32s2-elf/esp-2021r2-patch5-8.4.0/xtensa-esp32s2-elf/bin:/home/hathach/.espressif/tools/xtensa-esp32s3-elf/esp-2021r2-patch5-8.4.0/xtensa-esp32s3-elf/bin:/home/hathach/.espressif/tools/riscv32-esp-elf/esp-2021r2-patch5-8.4.0/riscv32-esp-elf/bin:/home/hathach/.espressif/tools/esp32ulp-elf/2.35_20220830/esp32ulp-elf/bin:/home/hathach/.espressif/tools/openocd-esp32/v0.11.0-esp32-20221026/openocd-esp32/bin:/home/hathach/.espressif/python_env/idf4.4_py3.10_env/bin:/home/hathach/code/esp-idf/tools:/home/hathach/app/riscv-openocd-wch/src:/home/hathach/app/arm-gnu-toolchain-12.2.rel1-x86_64-arm-none-eabi/bin:/home/hathach/.local/bin:/home/hathach/bin:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games:/snap/bin:/snap/bin:/opt/SEGGER/JLink:/home/hathach/app/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf/bin:/home/hathach/.local/xPacks/@xpack-dev-tools/riscv-none-embed-gcc/10.2.0-1.2.1/.content/bin:/home/hathach/.local/xPacks/@xpack-dev-tools/openocd/*/.content/bin:/home/hathach/ti/msp430-gcc/bin:/home/hathach/ti/MSPFlasher_1.3.20:/home/hathach/ti/uniflash_7.0.0:/home/hathach/app/gcc_8.3.0.202102_gnurx-elf/bin:/home/hathach/app/RFP_CLI_Linux_V31101_x64/linux-x64:/home/hathach/app/fomu-toolchain-linux_x86_64-v1.5.5/bin:/home/hathach/app/nuclei_riscv_newlibc_prebuilt_linux64_2020.08/gcc/bin:/home/hathach/app/riscv32-embecosm-ubuntu2004-gcc11.1.0/bin:/home/hathach/app/cov-analysis-linux64-2019.03/bin:/opt/iarsystems/bxarm/arm/bin:/home/hathach/.local/bin" />
+          </envs>
+        </ADDITIONAL_GENERATION_ENVIRONMENT>
+      </configuration>
+      <configuration PROFILE_NAME="esp32s2" ENABLED="false" GENERATION_OPTIONS="-DFAMILY=espressif -DBOARD=espressif_saola_1 -DIDF_TARGET=esp32s2">
+        <ADDITIONAL_GENERATION_ENVIRONMENT>
+          <envs>
+            <env name="ESPBAUD" value="1500000" />
+            <env name="ESPPORT" value="/dev/ttyUSB0" />
+            <env name="IDF_PATH" value="$PROJECT_DIR$/../esp-idf" />
+            <env name="PATH" value="$PROJECT_DIR$/../esp-idf/components/esptool_py/esptool:/home/hathach/code/esp-idf/components/espcoredump:/home/hathach/code/esp-idf/components/partition_table:/home/hathach/code/esp-idf/components/app_update:/home/hathach/.espressif/tools/xtensa-esp-elf-gdb/11.2_20220823/xtensa-esp-elf-gdb/bin:/home/hathach/.espressif/tools/riscv32-esp-elf-gdb/11.2_20220823/riscv32-esp-elf-gdb/bin:/home/hathach/.espressif/tools/xtensa-esp32-elf/esp-2021r2-patch5-8.4.0/xtensa-esp32-elf/bin:/home/hathach/.espressif/tools/xtensa-esp32s2-elf/esp-2021r2-patch5-8.4.0/xtensa-esp32s2-elf/bin:/home/hathach/.espressif/tools/xtensa-esp32s3-elf/esp-2021r2-patch5-8.4.0/xtensa-esp32s3-elf/bin:/home/hathach/.espressif/tools/riscv32-esp-elf/esp-2021r2-patch5-8.4.0/riscv32-esp-elf/bin:/home/hathach/.espressif/tools/esp32ulp-elf/2.35_20220830/esp32ulp-elf/bin:/home/hathach/.espressif/tools/openocd-esp32/v0.11.0-esp32-20221026/openocd-esp32/bin:/home/hathach/.espressif/python_env/idf4.4_py3.10_env/bin:/home/hathach/code/esp-idf/tools:/home/hathach/app/riscv-openocd-wch/src:/home/hathach/app/arm-gnu-toolchain-12.2.rel1-x86_64-arm-none-eabi/bin:/home/hathach/.local/bin:/home/hathach/bin:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games:/snap/bin:/snap/bin:/opt/SEGGER/JLink:/home/hathach/app/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf/bin:/home/hathach/.local/xPacks/@xpack-dev-tools/riscv-none-embed-gcc/10.2.0-1.2.1/.content/bin:/home/hathach/.local/xPacks/@xpack-dev-tools/openocd/*/.content/bin:/home/hathach/ti/msp430-gcc/bin:/home/hathach/ti/MSPFlasher_1.3.20:/home/hathach/ti/uniflash_7.0.0:/home/hathach/app/gcc_8.3.0.202102_gnurx-elf/bin:/home/hathach/app/RFP_CLI_Linux_V31101_x64/linux-x64:/home/hathach/app/fomu-toolchain-linux_x86_64-v1.5.5/bin:/home/hathach/app/nuclei_riscv_newlibc_prebuilt_linux64_2020.08/gcc/bin:/home/hathach/app/riscv32-embecosm-ubuntu2004-gcc11.1.0/bin:/home/hathach/app/cov-analysis-linux64-2019.03/bin:/opt/iarsystems/bxarm/arm/bin:/home/hathach/.local/bin" />
+          </envs>
+        </ADDITIONAL_GENERATION_ENVIRONMENT>
+      </configuration>
+      <configuration PROFILE_NAME="rp2040" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=rp2040 -DBOARD=raspberry_pi_pico" />
+    </configurations>
+  </component>
+</project>
\ No newline at end of file
diff --git a/.idea/runConfigurations/cdc_msc.xml b/.idea/runConfigurations/cdc_msc.xml
new file mode 100644
index 000000000..fbeb4ae05
--- /dev/null
+++ b/.idea/runConfigurations/cdc_msc.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="cdc_msc" type="com.jetbrains.cidr.embedded.openocd.conf.type" factoryName="com.jetbrains.cidr.embedded.openocd.conf.factory" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
+    <openocd version="1" gdb-port="3333" telnet-port="4444" board-config="$PROJECT_DIR$/hw/bsp/rp2040/rp2040-openocd.cfg" reset-type="INIT" download-type="UPDATED_ONLY">
+      <debugger kind="GDB" isBundled="true" />
+    </openocd>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/hid_composite.xml b/.idea/runConfigurations/hid_composite.xml
new file mode 100644
index 000000000..b9f1d1a72
--- /dev/null
+++ b/.idea/runConfigurations/hid_composite.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="hid_composite" type="com.jetbrains.cidr.embedded.openocd.conf.type" factoryName="com.jetbrains.cidr.embedded.openocd.conf.factory" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="hid_composite" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="hid_composite">
+    <openocd version="1" gdb-port="3333" telnet-port="4444" board-config="$PROJECT_DIR$/hw/bsp/rp2040/rp2040-openocd.cfg" reset-type="INIT" download-type="UPDATED_ONLY">
+      <debugger kind="GDB" isBundled="true" />
+    </openocd>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/msc_dual_lun.xml b/.idea/runConfigurations/msc_dual_lun.xml
new file mode 100644
index 000000000..6e0d74f5b
--- /dev/null
+++ b/.idea/runConfigurations/msc_dual_lun.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="msc_dual_lun" type="com.jetbrains.cidr.embedded.openocd.conf.type" factoryName="com.jetbrains.cidr.embedded.openocd.conf.factory" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="msc_dual_lun" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="msc_dual_lun">
+    <openocd version="1" gdb-port="3333" telnet-port="4444" board-config="$PROJECT_DIR$/hw/bsp/rp2040/rp2040-openocd.cfg" reset-type="INIT" download-type="UPDATED_ONLY">
+      <debugger kind="GDB" isBundled="true" />
+    </openocd>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/tinyusb_examples.xml b/.idea/runConfigurations/tinyusb_examples.xml
new file mode 100644
index 000000000..60e586bbc
--- /dev/null
+++ b/.idea/runConfigurations/tinyusb_examples.xml
@@ -0,0 +1,5 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="tinyusb_examples" type="CMakeListConfigurationType" factoryName="CMakeListConfigurationFactory">
+    <method v="2" />
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/vcs.xml b/.idea/vcs.xml
new file mode 100644
index 000000000..f05d025e7
--- /dev/null
+++ b/.idea/vcs.xml
@@ -0,0 +1,65 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project version="4">
+  <component name="VcsDirectoryMappings">
+    <mapping directory="$PROJECT_DIR$/../pico/pico-sdk" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/allwinner" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/bridgetek/ft9xx/ft90x-sdk" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/broadcom" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/gd/nuclei-sdk" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/infineon/mtb-xmclib-cat3" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/microchip" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/mindmotion/mm32sdk" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/nordic/nrfx" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/nuvoton" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/nxp/lpcopen" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/nxp/mcux-sdk" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/nxp/nxp_sdk" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/Pico-PIO-USB" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/pico-sdk" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/pico-sdk/lib/cyw43-driver" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/pico-sdk/lib/lwip" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/pico-sdk/lib/tinyusb" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/renesas/fsp" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/renesas/rx" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/silabs/cmsis-dfp-efm32gg12b" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/sony/cxd56/spresense-exported-sdk" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_f0" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_f1" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_f2" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_f3" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_f4" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_f7" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_g0" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_g4" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_h7" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_l0" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_l1" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_l4" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_l5" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_u5" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_wb" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32f0xx_hal_driver" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32f1xx_hal_driver" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32f2xx_hal_driver" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32f3xx_hal_driver" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32f4xx_hal_driver" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32f7xx_hal_driver" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32g0xx_hal_driver" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32g4xx_hal_driver" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32h7xx_hal_driver" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32l0xx_hal_driver" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32l1xx_hal_driver" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32l4xx_hal_driver" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32l5xx_hal_driver" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32u5xx_hal_driver" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32wbxx_hal_driver" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/ti" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/wch/ch32v307" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/lib/CMSIS_5" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/lib/FreeRTOS-Kernel" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/lib/lwip" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/lib/sct_neopixel" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/tools/uf2" vcs="Git" />
+  </component>
+</project>
\ No newline at end of file
diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index d37c27d40..6fb98afb8 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -9,6 +9,7 @@ repos:
   - id: check-yaml
   - id: trailing-whitespace
   - id: end-of-file-fixer
+    exclude: ^.idea/
   - id: forbid-submodules
 
 - repo: https://github.com/codespell-project/codespell

From f2faf72f7fe6bf04870c65437088ae76a9db8baf Mon Sep 17 00:00:00 2001
From: raiden00pl <raiden00@railab.me>
Date: Sat, 1 Apr 2023 21:22:33 +0200
Subject: [PATCH 236/691] openh743i: initialize USB3300 reset pin

---
 hw/bsp/stm32h7/boards/waveshare_openh743i/board.h | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.h b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.h
index cf6ad762e..a3d0d07f9 100644
--- a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.h
+++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.h
@@ -192,6 +192,14 @@ static inline void board_stm32h7_post_init(void)
   // Init timer
   TIM_HandleTypeDef tim2Handle;
   TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  GPIO_InitTypeDef  GPIO_InitStruct;
+
+  // ULPI_RST
+  GPIO_InitStruct.Pin   = ULPI_RST_PIN;
+  GPIO_InitStruct.Mode  = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull  = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = 0;
+  HAL_GPIO_Init(ULPI_RST_PORT, &GPIO_InitStruct);
 
   __HAL_RCC_TIM2_CLK_ENABLE();
 

From 5ef260d5fceeef49c8d1eb08fe39a12712b1ae53 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 3 Apr 2023 17:44:05 +0700
Subject: [PATCH 237/691] fix build for esp32

---
 .github/workflows/build_esp.yml                            | 2 +-
 examples/CMakeLists.txt                                    | 1 +
 .../espressif/boards/adafruit_feather_esp32s2/board.cmake  | 1 -
 hw/bsp/espressif/boards/adafruit_magtag_29gray/board.cmake | 1 -
 hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.cmake | 1 -
 hw/bsp/espressif/boards/espressif_addax_1/board.cmake      | 1 -
 hw/bsp/espressif/boards/espressif_kaluga_1/board.cmake     | 1 -
 hw/bsp/espressif/boards/espressif_s3_devkitc/board.cmake   | 1 -
 hw/bsp/espressif/boards/espressif_s3_devkitm/board.cmake   | 1 -
 hw/bsp/espressif/boards/espressif_saola_1/board.cmake      | 1 -
 hw/bsp/espressif/family.cmake                              | 6 ++++++
 tools/{build_esp32sx.py => build_esp32.py}                 | 0
 tools/build_utils.py                                       | 7 +++++++
 13 files changed, 15 insertions(+), 9 deletions(-)
 rename tools/{build_esp32sx.py => build_esp32.py} (100%)

diff --git a/.github/workflows/build_esp.yml b/.github/workflows/build_esp.yml
index dbc51a60f..0a6815ea2 100644
--- a/.github/workflows/build_esp.yml
+++ b/.github/workflows/build_esp.yml
@@ -54,7 +54,7 @@ jobs:
          path: linkermap
 
     - name: Build
-      run: docker run --rm -v $PWD:/project -w /project espressif/idf:latest python3 tools/build_esp32sx.py ${{ matrix.board }}
+      run: docker run --rm -v $PWD:/project -w /project espressif/idf:latest python3 tools/build_esp32.py ${{ matrix.board }}
 
     - name: Linker Map
       run: |
diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt
index 8f5626fa9..d91d8ca62 100644
--- a/examples/CMakeLists.txt
+++ b/examples/CMakeLists.txt
@@ -1,5 +1,6 @@
 cmake_minimum_required(VERSION 3.5)
 
+#set(CMAKE_EXPORT_COMPILE_COMMANDS ON)
 include(${CMAKE_CURRENT_SOURCE_DIR}/../hw/bsp/family_support.cmake)
 
 project(tinyusb_examples)
diff --git a/hw/bsp/espressif/boards/adafruit_feather_esp32s2/board.cmake b/hw/bsp/espressif/boards/adafruit_feather_esp32s2/board.cmake
index fcd2f6e9f..abbdf7abc 100644
--- a/hw/bsp/espressif/boards/adafruit_feather_esp32s2/board.cmake
+++ b/hw/bsp/espressif/boards/adafruit_feather_esp32s2/board.cmake
@@ -1,3 +1,2 @@
 # Apply board specific content here
 set(IDF_TARGET "esp32s2")
-set(FAMILY_MCUS ESP32S2)
diff --git a/hw/bsp/espressif/boards/adafruit_magtag_29gray/board.cmake b/hw/bsp/espressif/boards/adafruit_magtag_29gray/board.cmake
index fcd2f6e9f..abbdf7abc 100644
--- a/hw/bsp/espressif/boards/adafruit_magtag_29gray/board.cmake
+++ b/hw/bsp/espressif/boards/adafruit_magtag_29gray/board.cmake
@@ -1,3 +1,2 @@
 # Apply board specific content here
 set(IDF_TARGET "esp32s2")
-set(FAMILY_MCUS ESP32S2)
diff --git a/hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.cmake b/hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.cmake
index fcd2f6e9f..abbdf7abc 100644
--- a/hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.cmake
+++ b/hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.cmake
@@ -1,3 +1,2 @@
 # Apply board specific content here
 set(IDF_TARGET "esp32s2")
-set(FAMILY_MCUS ESP32S2)
diff --git a/hw/bsp/espressif/boards/espressif_addax_1/board.cmake b/hw/bsp/espressif/boards/espressif_addax_1/board.cmake
index bc528e9fa..9bac46d64 100644
--- a/hw/bsp/espressif/boards/espressif_addax_1/board.cmake
+++ b/hw/bsp/espressif/boards/espressif_addax_1/board.cmake
@@ -1,3 +1,2 @@
 # Apply board specific content here
 set(IDF_TARGET "esp32s3")
-set(FAMILY_MCUS ESP32S3)
diff --git a/hw/bsp/espressif/boards/espressif_kaluga_1/board.cmake b/hw/bsp/espressif/boards/espressif_kaluga_1/board.cmake
index fcd2f6e9f..abbdf7abc 100644
--- a/hw/bsp/espressif/boards/espressif_kaluga_1/board.cmake
+++ b/hw/bsp/espressif/boards/espressif_kaluga_1/board.cmake
@@ -1,3 +1,2 @@
 # Apply board specific content here
 set(IDF_TARGET "esp32s2")
-set(FAMILY_MCUS ESP32S2)
diff --git a/hw/bsp/espressif/boards/espressif_s3_devkitc/board.cmake b/hw/bsp/espressif/boards/espressif_s3_devkitc/board.cmake
index bc528e9fa..9bac46d64 100644
--- a/hw/bsp/espressif/boards/espressif_s3_devkitc/board.cmake
+++ b/hw/bsp/espressif/boards/espressif_s3_devkitc/board.cmake
@@ -1,3 +1,2 @@
 # Apply board specific content here
 set(IDF_TARGET "esp32s3")
-set(FAMILY_MCUS ESP32S3)
diff --git a/hw/bsp/espressif/boards/espressif_s3_devkitm/board.cmake b/hw/bsp/espressif/boards/espressif_s3_devkitm/board.cmake
index bc528e9fa..9bac46d64 100644
--- a/hw/bsp/espressif/boards/espressif_s3_devkitm/board.cmake
+++ b/hw/bsp/espressif/boards/espressif_s3_devkitm/board.cmake
@@ -1,3 +1,2 @@
 # Apply board specific content here
 set(IDF_TARGET "esp32s3")
-set(FAMILY_MCUS ESP32S3)
diff --git a/hw/bsp/espressif/boards/espressif_saola_1/board.cmake b/hw/bsp/espressif/boards/espressif_saola_1/board.cmake
index fcd2f6e9f..abbdf7abc 100644
--- a/hw/bsp/espressif/boards/espressif_saola_1/board.cmake
+++ b/hw/bsp/espressif/boards/espressif_saola_1/board.cmake
@@ -1,3 +1,2 @@
 # Apply board specific content here
 set(IDF_TARGET "esp32s2")
-set(FAMILY_MCUS ESP32S2)
diff --git a/hw/bsp/espressif/family.cmake b/hw/bsp/espressif/family.cmake
index 954dc635b..92a9bcb04 100644
--- a/hw/bsp/espressif/family.cmake
+++ b/hw/bsp/espressif/family.cmake
@@ -3,6 +3,12 @@ cmake_minimum_required(VERSION 3.5)
 # Apply board specific content i.e IDF_TARGET must be set before project.cmake is included
 include("${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake")
 
+if(IDF_TARGET STREQUAL "esp32s2")
+  set(FAMILY_MCUS ESP32S2)
+elseif(IDF_TARGET STREQUAL "esp32s3")
+  set(FAMILY_MCUS ESP32S3)
+endif()
+
 # Add example src and bsp directories
 set(EXTRA_COMPONENT_DIRS "src" "${CMAKE_CURRENT_LIST_DIR}/boards" "${CMAKE_CURRENT_LIST_DIR}/components")
 
diff --git a/tools/build_esp32sx.py b/tools/build_esp32.py
similarity index 100%
rename from tools/build_esp32sx.py
rename to tools/build_esp32.py
diff --git a/tools/build_utils.py b/tools/build_utils.py
index 905d06a86..ec850e732 100644
--- a/tools/build_utils.py
+++ b/tools/build_utils.py
@@ -53,6 +53,13 @@ def skip_example(example, board):
             token = token.strip("\"")
             _, opt_mcu = token.split("=")
             mcu = opt_mcu[len("OPT_MCU_"):]
+            break
+        if "esp32s2" in token:
+            mcu = "ESP32S2"
+            break
+        if "esp32s3" in token:
+            mcu = "ESP32S3"
+            break
 
     # Skip all OPT_MCU_NONE these are WIP port
     if mcu == "NONE":

From 4f96a1f3b2f4dd265214594450277e4851680258 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 3 Apr 2023 18:05:22 +0700
Subject: [PATCH 238/691] more fix

---
 hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
index 5e0ed9ac7..bf8e45be2 100644
--- a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
+++ b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
@@ -27,7 +27,7 @@ idf_component_get_property(freertos_component_dir freertos COMPONENT_DIR)
 list(APPEND includes_public
     "${tusb_src}"
     # The FreeRTOS API include convention in tinyusb is different from esp-idf
-    "${freertos_component_dir}/include/freertos"
+    #"${freertos_component_dir}/include/freertos"
     )
 
 list(APPEND srcs

From 718bcdb8bc3b9b522e9bad12ace2c7b62589cb4c Mon Sep 17 00:00:00 2001
From: John Cronin <jncronin@tysos.org>
Date: Mon, 3 Apr 2023 13:56:16 +0100
Subject: [PATCH 239/691] Add STM32L5 support - no OTG similar to some L4s

---
 src/common/tusb_mcu.h                                | 6 ++++++
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c        | 6 ++++++
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h | 8 ++++++++
 src/tusb_option.h                                    | 1 +
 4 files changed, 21 insertions(+)

diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index b903abeca..ba8976a8c 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -229,6 +229,12 @@
   #define TUP_USBIP_DWC2_STM32
   #define TUP_DCD_ENDPOINT_MAX    6
 
+#elif TU_CHECK_MCU(OPT_MCU_STM32L5)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+  #define TUP_DCD_ENDPOINT_MAX    8
+
+
 //--------------------------------------------------------------------+
 // Sony
 //--------------------------------------------------------------------+
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 1677cfa12..98d3d0829 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -362,6 +362,9 @@ void dcd_int_enable (uint8_t rhport)
   NVIC_EnableIRQ(USB_HP_IRQn);
   NVIC_EnableIRQ(USB_LP_IRQn);
 
+#elif CFG_TUSB_MCU == OPT_MCU_STM32L5
+  NVIC_EnableIRQ(USB_FS_IRQn);
+
 #else
   #error Unknown arch in USB driver
 #endif
@@ -409,6 +412,9 @@ void dcd_int_disable(uint8_t rhport)
   NVIC_DisableIRQ(USB_HP_IRQn);
   NVIC_DisableIRQ(USB_LP_IRQn);
 
+#elif CFG_TUSB_MCU == OPT_MCU_STM32L5
+  NVIC_DisableIRQ(USB_FS_IRQn);
+
 #else
   #error Unknown arch in USB driver
 #endif
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index 015b177cf..e3fc8aeb5 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -93,6 +93,14 @@
   #include "stm32l4xx.h"
   #define PMA_LENGTH (1024u)
 
+#elif CFG_TUSB_MCU == OPT_MCU_STM32L5
+  #include "stm32l5xx.h"
+  #define PMA_LENGTH (1024u)
+
+  #ifndef USB_PMAADDR
+    #define USB_PMAADDR (USB_BASE + (USB_PMAADDR_NS - USB_BASE_NS))
+  #endif
+
 #else
   #error You are using an untested or unimplemented STM32 variant. Please update the driver.
   // This includes L1x0, L1x1, L1x2, L4x2 and L4x3, G1x1, G1x3, and G1x4
diff --git a/src/tusb_option.h b/src/tusb_option.h
index f8ac722f4..44d036ea4 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -82,6 +82,7 @@
 #define OPT_MCU_STM32G4           311 ///< ST G4
 #define OPT_MCU_STM32WB           312 ///< ST WB
 #define OPT_MCU_STM32U5           313 ///< ST U5
+#define OPT_MCU_STM32L5           314 ///< ST L5
 
 // Sony
 #define OPT_MCU_CXD56             400 ///< SONY CXD56

From 44fab77c3df784fd6ac94ff75aaa19f70e7760f4 Mon Sep 17 00:00:00 2001
From: Ha Thach <thach@tinyusb.org>
Date: Tue, 4 Apr 2023 11:02:20 +0700
Subject: [PATCH 240/691] Update bug_report.yml

---
 .github/ISSUE_TEMPLATE/bug_report.yml | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/.github/ISSUE_TEMPLATE/bug_report.yml b/.github/ISSUE_TEMPLATE/bug_report.yml
index dc5f0ee16..d00ee78bd 100644
--- a/.github/ISSUE_TEMPLATE/bug_report.yml
+++ b/.github/ISSUE_TEMPLATE/bug_report.yml
@@ -60,15 +60,15 @@ body:
 
   - type: textarea
     attributes:
-      label: Debug Log as txt file
+      label: Debug Log as txt file (LOG/CFG_TUSB_DEBUG=2)
       placeholder: |
         Attach your debug log txt file here, where the issue occurred, best with comments to explain the actual events.
 
         Note1: Please DO NOT paste your lengthy log contents here since it hurts the readability.
-        Note2: To enable logging, add `LOG=3` to to the make command if building with stock examples or set `CFG_TUSB_DEBUG=3` in your tusb_config.h.
+        Note2: To enable logging, add `LOG=2` to to the make command if building with stock examples or set `CFG_TUSB_DEBUG=2` in your tusb_config.h.
         More information can be found at [example's readme](https://github.com/hathach/tinyusb/blob/master/docs/getting_started.md)
     validations:
-      required: false
+      required: true
 
   - type: textarea
     attributes:

From 106084289dec0146c117fad69925696b388509be Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 6 Apr 2023 11:15:57 +0700
Subject: [PATCH 241/691] add define for vendor_flush() to write_flush() for
 backward compatible

---
 src/class/vendor/vendor_device.h | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/class/vendor/vendor_device.h b/src/class/vendor/vendor_device.h
index 7afd49cc1..d239406b4 100644
--- a/src/class/vendor/vendor_device.h
+++ b/src/class/vendor/vendor_device.h
@@ -52,7 +52,9 @@ uint32_t tud_vendor_n_write_flush     (uint8_t itf);
 uint32_t tud_vendor_n_write_available (uint8_t itf);
 
 static inline uint32_t tud_vendor_n_write_str (uint8_t itf, char const* str);
-uint32_t tud_vendor_n_flush           (uint8_t itf);
+
+// backward compatible
+#define tud_vendor_n_flush(itf) tud_vendor_n_write_flush(itf)
 
 //--------------------------------------------------------------------+
 // Application API (Single Port)
@@ -67,6 +69,9 @@ static inline uint32_t tud_vendor_write_str       (char const* str);
 static inline uint32_t tud_vendor_write_available (void);
 static inline uint32_t tud_vendor_write_flush     (void);
 
+// backward compatible
+#define tud_vendor_flush() tud_vendor_write_flush()
+
 //--------------------------------------------------------------------+
 // Application Callback API (weak is optional)
 //--------------------------------------------------------------------+

From 6db24e0dbae248c865ec3ed0e5febcf341b489d4 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 6 Apr 2023 11:16:28 +0700
Subject: [PATCH 242/691] implement tuh_hid_receive_ready() and
 tuh_hid_send_ready()

---
 src/class/hid/hid_host.c | 23 ++++++++++++++++-------
 src/class/hid/hid_host.h |  9 ++++++---
 2 files changed, 22 insertions(+), 10 deletions(-)

diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c
index a0032aeba..d95d3ef35 100644
--- a/src/class/hid/hid_host.c
+++ b/src/class/hid/hid_host.c
@@ -331,6 +331,15 @@ static bool _hidh_set_idle(uint8_t daddr, uint8_t itf_num, uint16_t idle_rate, t
 // Interrupt Endpoint API
 //--------------------------------------------------------------------+
 
+// Check if HID interface is ready to receive report
+bool tuh_hid_receive_ready(uint8_t dev_addr, uint8_t idx)
+{
+  hidh_interface_t* p_hid = get_hid_itf(dev_addr, idx);
+  TU_VERIFY(p_hid);
+
+  return !usbh_edpt_busy(dev_addr, p_hid->ep_in);
+}
+
 bool tuh_hid_receive_report(uint8_t daddr, uint8_t idx)
 {
   hidh_interface_t* p_hid = get_hid_itf(daddr, idx);
@@ -348,13 +357,13 @@ bool tuh_hid_receive_report(uint8_t daddr, uint8_t idx)
   return true;
 }
 
-//bool tuh_n_hid_n_ready(uint8_t dev_addr, uint8_t instance)
-//{
-//  TU_VERIFY(tuh_n_hid_n_mounted(dev_addr, instance));
-//
-//  hidh_interface_t* hid_itf = get_instance(dev_addr, instance);
-//  return !usbh_edpt_busy(dev_addr, hid_itf->ep_in);
-//}
+bool tuh_hid_send_ready(uint8_t dev_addr, uint8_t idx)
+{
+  hidh_interface_t* p_hid = get_hid_itf(dev_addr, idx);
+  TU_VERIFY(p_hid);
+
+  return !usbh_edpt_busy(dev_addr, p_hid->ep_out);
+}
 
 bool tuh_hid_send_report(uint8_t daddr, uint8_t idx, uint8_t report_id, const void* report, uint16_t len)
 {
diff --git a/src/class/hid/hid_host.h b/src/class/hid/hid_host.h
index c0c727e6a..08ad421d2 100644
--- a/src/class/hid/hid_host.h
+++ b/src/class/hid/hid_host.h
@@ -62,7 +62,7 @@ typedef struct
 // Interface API
 //--------------------------------------------------------------------+
 
-// Get the number of mounted HID interfaces of a device
+// Get the total number of mounted HID interfaces of a device
 uint8_t tuh_hid_itf_get_count(uint8_t dev_addr);
 
 // Get all mounted interfaces across devices
@@ -109,14 +109,17 @@ bool tuh_hid_set_report(uint8_t dev_addr, uint8_t idx, uint8_t report_id, uint8_
 // Interrupt Endpoint API
 //--------------------------------------------------------------------+
 
-// Check if the interface is ready to use
-//bool tuh_n_hid_n_ready(uint8_t dev_addr, uint8_t idx);
+// Check if HID interface is ready to receive report
+bool tuh_hid_receive_ready(uint8_t dev_addr, uint8_t idx);
 
 // Try to receive next report on Interrupt Endpoint. Immediately return
 // - true If succeeded, tuh_hid_report_received_cb() callback will be invoked when report is available
 // - false if failed to queue the transfer e.g endpoint is busy
 bool tuh_hid_receive_report(uint8_t dev_addr, uint8_t idx);
 
+// Check if HID interface is ready to send report
+bool tuh_hid_send_ready(uint8_t dev_addr, uint8_t idx);
+
 // Send report using interrupt endpoint
 // If report_id > 0 (composite), it will be sent as 1st byte, then report contents. Otherwise only report content is sent.
 bool tuh_hid_send_report(uint8_t dev_addr, uint8_t idx, uint8_t report_id, const void* report, uint16_t len);

From 2cda9b60c99894db9a4610f80fc6f974f0499622 Mon Sep 17 00:00:00 2001
From: Scott Shawcroft <scott@tannewt.org>
Date: Thu, 6 Apr 2023 15:45:23 -0700
Subject: [PATCH 243/691] Handle iMX RT 1042 usb naming

---
 src/portable/chipidea/ci_hs/ci_hs_imxrt.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h
index 2de0d9cb4..607926a65 100644
--- a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h
+++ b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h
@@ -37,6 +37,11 @@
 #define USB2_BASE USB_OTG2_BASE
 #endif
 
+// RT1040 calls its only USB USB_OTG (no 1)
+#if defined(MIMXRT1042_SERIES)
+#define USB_OTG1_IRQn USB_OTG_IRQn
+#endif
+
 static const ci_hs_controller_t _ci_controller[] =
 {
   // RT1010 and RT1020 only has 1 USB controller

From d4c7c9871ed4e304385aab125116720cb553298d Mon Sep 17 00:00:00 2001
From: tyustli <1225613647@qq.com>
Date: Sat, 8 Apr 2023 18:14:10 +0800
Subject: [PATCH 244/691] fix audio comment error

---
 examples/device/audio_4_channel_mic/src/usb_descriptors.c   | 4 ++--
 examples/device/audio_test/src/usb_descriptors.c            | 4 ++--
 examples/device/audio_test_multi_rate/src/usb_descriptors.c | 4 ++--
 examples/device/uac2_headset/src/usb_descriptors.c          | 4 ++--
 4 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/examples/device/audio_4_channel_mic/src/usb_descriptors.c b/examples/device/audio_4_channel_mic/src/usb_descriptors.c
index 8bf9eebc4..160e4f12f 100644
--- a/examples/device/audio_4_channel_mic/src/usb_descriptors.c
+++ b/examples/device/audio_4_channel_mic/src/usb_descriptors.c
@@ -44,7 +44,7 @@ tusb_desc_device_t const desc_device =
     .bDescriptorType    = TUSB_DESC_DEVICE,
     .bcdUSB             = 0x0200,
 
-    // Use Interface Association Descriptor (IAD) for CDC
+    // Use Interface Association Descriptor (IAD) for Audio
     // As required by USB Specs IAD's subclass must be common class (2) and protocol must be IAD (1)
     .bDeviceClass       = TUSB_CLASS_MISC,
     .bDeviceSubClass    = MISC_SUBCLASS_COMMON,
@@ -96,7 +96,7 @@ enum
 
 uint8_t const desc_configuration[] =
 {
-  // Interface count, string index, total length, attribute, power in mA
+  // Config number, Interface count, string index, total length, attribute, power in mA
   TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
   // Interface number, string index, EP Out & EP In address, EP size
diff --git a/examples/device/audio_test/src/usb_descriptors.c b/examples/device/audio_test/src/usb_descriptors.c
index 891e90802..e9c3aee7a 100644
--- a/examples/device/audio_test/src/usb_descriptors.c
+++ b/examples/device/audio_test/src/usb_descriptors.c
@@ -44,7 +44,7 @@ tusb_desc_device_t const desc_device =
     .bDescriptorType    = TUSB_DESC_DEVICE,
     .bcdUSB             = 0x0200,
 
-    // Use Interface Association Descriptor (IAD) for CDC
+    // Use Interface Association Descriptor (IAD) for Audio
     // As required by USB Specs IAD's subclass must be common class (2) and protocol must be IAD (1)
     .bDeviceClass       = TUSB_CLASS_MISC,
     .bDeviceSubClass    = MISC_SUBCLASS_COMMON,
@@ -96,7 +96,7 @@ enum
 
 uint8_t const desc_configuration[] =
 {
-    // Interface count, string index, total length, attribute, power in mA
+    // Config number, Interface count, string index, total length, attribute, power in mA
     TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
     // Interface number, string index, EP Out & EP In address, EP size
diff --git a/examples/device/audio_test_multi_rate/src/usb_descriptors.c b/examples/device/audio_test_multi_rate/src/usb_descriptors.c
index 276bf8aa0..78c72a6c2 100644
--- a/examples/device/audio_test_multi_rate/src/usb_descriptors.c
+++ b/examples/device/audio_test_multi_rate/src/usb_descriptors.c
@@ -46,7 +46,7 @@ tusb_desc_device_t const desc_device =
     .bDescriptorType    = TUSB_DESC_DEVICE,
     .bcdUSB             = 0x0200,
 
-    // Use Interface Association Descriptor (IAD) for CDC
+    // Use Interface Association Descriptor (IAD) for Audio
     // As required by USB Specs IAD's subclass must be common class (2) and protocol must be IAD (1)
     .bDeviceClass       = TUSB_CLASS_MISC,
     .bDeviceSubClass    = MISC_SUBCLASS_COMMON,
@@ -98,7 +98,7 @@ enum
 
 uint8_t const desc_configuration[] =
 {
-    // Interface count, string index, total length, attribute, power in mA
+    // Config number, Interface count, string index, total length, attribute, power in mA
     TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
     // Interface number, string index, EP Out & EP In address, EP size
diff --git a/examples/device/uac2_headset/src/usb_descriptors.c b/examples/device/uac2_headset/src/usb_descriptors.c
index 0a0b4c602..6d6931682 100644
--- a/examples/device/uac2_headset/src/usb_descriptors.c
+++ b/examples/device/uac2_headset/src/usb_descriptors.c
@@ -46,7 +46,7 @@ tusb_desc_device_t const desc_device =
     .bDescriptorType    = TUSB_DESC_DEVICE,
     .bcdUSB             = 0x0200,
 
-    // Use Interface Association Descriptor (IAD) for CDC
+    // Use Interface Association Descriptor (IAD) for Audio
     // As required by USB Specs IAD's subclass must be common class (2) and protocol must be IAD (1)
     .bDeviceClass       = TUSB_CLASS_MISC,
     .bDeviceSubClass    = MISC_SUBCLASS_COMMON,
@@ -106,7 +106,7 @@ uint8_t const * tud_descriptor_device_cb(void)
 
 uint8_t const desc_configuration[] =
 {
-    // Interface count, string index, total length, attribute, power in mA
+    // Config number, Interface count, string index, total length, attribute, power in mA
     TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
     // Interface number, string index, EP Out & EP In address, EP size

From 95dec2ac26fd1b552f2b892f62ec0ed96033e4ba Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sat, 8 Apr 2023 15:39:33 +0200
Subject: [PATCH 245/691] Fix case.

---
 examples/device/audio_4_channel_mic/src/usb_descriptors.c   | 2 +-
 examples/device/audio_test/src/usb_descriptors.c            | 2 +-
 examples/device/audio_test_multi_rate/src/usb_descriptors.c | 2 +-
 examples/device/uac2_headset/src/usb_descriptors.c          | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/examples/device/audio_4_channel_mic/src/usb_descriptors.c b/examples/device/audio_4_channel_mic/src/usb_descriptors.c
index 160e4f12f..b77da9fac 100644
--- a/examples/device/audio_4_channel_mic/src/usb_descriptors.c
+++ b/examples/device/audio_4_channel_mic/src/usb_descriptors.c
@@ -96,7 +96,7 @@ enum
 
 uint8_t const desc_configuration[] =
 {
-  // Config number, Interface count, string index, total length, attribute, power in mA
+  // Config number, interface count, string index, total length, attribute, power in mA
   TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
   // Interface number, string index, EP Out & EP In address, EP size
diff --git a/examples/device/audio_test/src/usb_descriptors.c b/examples/device/audio_test/src/usb_descriptors.c
index e9c3aee7a..cc364ee88 100644
--- a/examples/device/audio_test/src/usb_descriptors.c
+++ b/examples/device/audio_test/src/usb_descriptors.c
@@ -96,7 +96,7 @@ enum
 
 uint8_t const desc_configuration[] =
 {
-    // Config number, Interface count, string index, total length, attribute, power in mA
+    // Config number, interface count, string index, total length, attribute, power in mA
     TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
     // Interface number, string index, EP Out & EP In address, EP size
diff --git a/examples/device/audio_test_multi_rate/src/usb_descriptors.c b/examples/device/audio_test_multi_rate/src/usb_descriptors.c
index 78c72a6c2..2c72edb17 100644
--- a/examples/device/audio_test_multi_rate/src/usb_descriptors.c
+++ b/examples/device/audio_test_multi_rate/src/usb_descriptors.c
@@ -98,7 +98,7 @@ enum
 
 uint8_t const desc_configuration[] =
 {
-    // Config number, Interface count, string index, total length, attribute, power in mA
+    // Config number, interface count, string index, total length, attribute, power in mA
     TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
     // Interface number, string index, EP Out & EP In address, EP size
diff --git a/examples/device/uac2_headset/src/usb_descriptors.c b/examples/device/uac2_headset/src/usb_descriptors.c
index 6d6931682..682774b72 100644
--- a/examples/device/uac2_headset/src/usb_descriptors.c
+++ b/examples/device/uac2_headset/src/usb_descriptors.c
@@ -106,7 +106,7 @@ uint8_t const * tud_descriptor_device_cb(void)
 
 uint8_t const desc_configuration[] =
 {
-    // Config number, Interface count, string index, total length, attribute, power in mA
+    // Config number, interface count, string index, total length, attribute, power in mA
     TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
     // Interface number, string index, EP Out & EP In address, EP size

From 16ed10a6e4b42b5bcfa0de9868f5bbe83401a099 Mon Sep 17 00:00:00 2001
From: Devin Auclair <devinauclair@gmail.com>
Date: Fri, 14 Apr 2023 12:48:59 +0000
Subject: [PATCH 246/691] Fix spelling configuraiton->configuration

---
 examples/device/dynamic_configuration/src/usb_descriptors.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/examples/device/dynamic_configuration/src/usb_descriptors.c b/examples/device/dynamic_configuration/src/usb_descriptors.c
index 0590bd679..71348abef 100644
--- a/examples/device/dynamic_configuration/src/usb_descriptors.c
+++ b/examples/device/dynamic_configuration/src/usb_descriptors.c
@@ -183,7 +183,7 @@ uint8_t const desc_configuration_0[] =
 };
 
 
-uint8_t const desc_configuraiton_1[] =
+uint8_t const desc_configuration_1[] =
 {
   // Config number, interface count, string index, total length, attribute, power in mA
   TUD_CONFIG_DESCRIPTOR(1, ITF_1_NUM_TOTAL, 0, CONFIG_1_TOTAL_LEN, 0x00, 100),
@@ -199,7 +199,7 @@ uint8_t const desc_configuraiton_1[] =
 uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 {
   (void) index; // for multiple configurations
-  return mode ? desc_configuraiton_1 : desc_configuration_0;
+  return mode ? desc_configuration_1 : desc_configuration_0;
 }
 
 //--------------------------------------------------------------------+

From 152a22f3eef3e3c6977a99df1aae26eb3095c9f1 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 14 Apr 2023 16:05:56 +0200
Subject: [PATCH 247/691] Update lib & template.

---
 tools/get_deps.py       | 4 ++--
 tools/iar_template.ipcf | 6 +++---
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/tools/get_deps.py b/tools/get_deps.py
index 4b81d1468..dfe00b32a 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -37,7 +37,7 @@ deps_optional = {
     'hw/mcu/st/cmsis_device_f3'                : ['5e4ee5ed7a7b6c85176bb70a9fd3c72d6eb99f1b', 'https://github.com/STMicroelectronics/cmsis_device_f3.git'     ],
     'hw/mcu/st/cmsis_device_f4'                : ['2615e866fa48fe1ff1af9e31c348813f2b19e7ec', 'https://github.com/STMicroelectronics/cmsis_device_f4.git'     ],
     'hw/mcu/st/cmsis_device_f7'                : ['fc676ef1ad177eb874eaa06444d3d75395fc51f4', 'https://github.com/STMicroelectronics/cmsis_device_f7.git'     ],
-    'hw/mcu/st/cmsis_device_g0'                : ['08258b28ee95f50cb9624d152a1cbf084be1f9a5', 'https://github.com/STMicroelectronics/cmsis_device_g0.git'     ],
+    'hw/mcu/st/cmsis_device_g0'                : ['3a23e1224417f3f2d00300ecd620495e363f2094', 'https://github.com/STMicroelectronics/cmsis_device_g0.git'     ],
     'hw/mcu/st/cmsis_device_g4'                : ['ce822adb1dc552b3aedd13621edbc7fdae124878', 'https://github.com/STMicroelectronics/cmsis_device_g4.git'     ],
     'hw/mcu/st/cmsis_device_h7'                : ['60dc2c913203dc8629dc233d4384dcc41c91e77f', 'https://github.com/STMicroelectronics/cmsis_device_h7.git'     ],
     'hw/mcu/st/cmsis_device_l0'                : ['06748ca1f93827befdb8b794402320d94d02004f', 'https://github.com/STMicroelectronics/cmsis_device_l0.git'     ],
@@ -52,7 +52,7 @@ deps_optional = {
     'hw/mcu/st/stm32f3xx_hal_driver'           : ['1761b6207318ede021706e75aae78f452d72b6fa', 'https://github.com/STMicroelectronics/stm32f3xx_hal_driver.git'],
     'hw/mcu/st/stm32f4xx_hal_driver'           : ['04e99fbdabd00ab8f370f377c66b0a4570365b58', 'https://github.com/STMicroelectronics/stm32f4xx_hal_driver.git'],
     'hw/mcu/st/stm32f7xx_hal_driver'           : ['f7ffdf6bf72110e58b42c632b0a051df5997e4ee', 'https://github.com/STMicroelectronics/stm32f7xx_hal_driver.git'],
-    'hw/mcu/st/stm32g0xx_hal_driver'           : ['5b53e6cee664a82b16c86491aa0060e2110c00cb', 'https://github.com/STMicroelectronics/stm32g0xx_hal_driver.git'],
+    'hw/mcu/st/stm32g0xx_hal_driver'           : ['e911b12c7f67084d7f6b76157a4c0d4e2ec3779c', 'https://github.com/STMicroelectronics/stm32g0xx_hal_driver.git'],
     'hw/mcu/st/stm32g4xx_hal_driver'           : ['8b4518417706d42eef5c14e56a650005abf478a8', 'https://github.com/STMicroelectronics/stm32g4xx_hal_driver.git'],
     'hw/mcu/st/stm32h7xx_hal_driver'           : ['d8461b980b59b1625207d8c4f2ce0a9c2a7a3b04', 'https://github.com/STMicroelectronics/stm32h7xx_hal_driver.git'],
     'hw/mcu/st/stm32l0xx_hal_driver'           : ['fbdacaf6f8c82a4e1eb9bd74ba650b491e97e17b', 'https://github.com/STMicroelectronics/stm32l0xx_hal_driver.git'],
diff --git a/tools/iar_template.ipcf b/tools/iar_template.ipcf
index d243aab0a..2d262c414 100644
--- a/tools/iar_template.ipcf
+++ b/tools/iar_template.ipcf
@@ -57,7 +57,6 @@
 		<group name="src/host">
 			<path>$TUSB_DIR$/src/host/hub.c</path>
 			<path>$TUSB_DIR$/src/host/usbh.c</path>
-			<path>$TUSB_DIR$/src/host/usbh_control.c</path>
 		</group>
 		<group name="src/portable/synopsys/dwc2">
 			<path>$TUSB_DIR$/src/portable/synopsys/dwc2/dcd_dwc2.c</path>
@@ -120,8 +119,9 @@
 			<path>$TUSB_DIR$/src/portable/raspberrypi/rp2040/hcd_rp2040.c</path>
 			<path>$TUSB_DIR$/src/portable/raspberrypi/rp2040/rp2040_usb.c</path>
 		</group>
-		<group name="src/portable/renesas/usba">
-			<path>$TUSB_DIR$/src/portable/renesas/usba/dcd_usba.c</path>
+		<group name="src/portable/renesas/rusb2">
+			<path>$TUSB_DIR$/src/portable/renesas/rusb2/dcd_rusb2.c</path>
+            <path>$TUSB_DIR$/src/portable/renesas/rusb2/hcd_rusb2.c</path>
 		</group>
 		<group name="src/portable/sony/cxd56">
 			<path>$TUSB_DIR$/src/portable/sony/cxd56/dcd_cxd56.c</path>

From 0ea23904c4deb8641b90f32b668e2f9cdb96c34e Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 14 Apr 2023 16:07:04 +0200
Subject: [PATCH 248/691] Add stm32g0b1nucleo BSP.

---
 .../stm32g0b1nucleo/STM32G0B1RETx_FLASH.ld    | 189 ++++++++++
 hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h | 116 ++++++
 .../stm32g0/boards/stm32g0b1nucleo/board.mk   |  13 +
 hw/bsp/stm32g0/family.c                       | 189 ++++++++++
 hw/bsp/stm32g0/family.mk                      |  57 +++
 hw/bsp/stm32g0/stm32g0xx_hal_conf.h           | 351 ++++++++++++++++++
 6 files changed, 915 insertions(+)
 create mode 100644 hw/bsp/stm32g0/boards/stm32g0b1nucleo/STM32G0B1RETx_FLASH.ld
 create mode 100644 hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
 create mode 100644 hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.mk
 create mode 100644 hw/bsp/stm32g0/family.c
 create mode 100644 hw/bsp/stm32g0/family.mk
 create mode 100644 hw/bsp/stm32g0/stm32g0xx_hal_conf.h

diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/STM32G0B1RETx_FLASH.ld b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/STM32G0B1RETx_FLASH.ld
new file mode 100644
index 000000000..842cf1372
--- /dev/null
+++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/STM32G0B1RETx_FLASH.ld
@@ -0,0 +1,189 @@
+/*
+******************************************************************************
+**
+
+**  File        : LinkerScript.ld
+**
+**  Author		: STM32CubeMX
+**
+**  Abstract    : Linker script for STM32G0B1RETx series
+**                512Kbytes FLASH and 144Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed “as is,” without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);    /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200;      /* required amount of heap  */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 144K
+FLASH (rx)      : ORIGIN = 0x8000000, LENGTH = 512K
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into FLASH */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data goes into FLASH */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data goes into FLASH */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+  .ARM : {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } >FLASH
+
+  .preinit_array     :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >FLASH
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >FLASH
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >FLASH
+
+  /* used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections goes into RAM, load LMA copy after code */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+  } >RAM AT> FLASH
+
+  
+  /* Uninitialized data section */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss secion */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough RAM left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  
+
+  /* Remove information from the standard libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
+
+
diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
new file mode 100644
index 000000000..3f5bc60b7
--- /dev/null
+++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
@@ -0,0 +1,116 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ * Copyright (c) 2034, HiFiPhile
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// G0B1RE Nucleo does not has usb connection. We need to manually connect
+// - PA12 for D+, CN10.12
+// - PA11 for D-, CN10.14
+
+// LED
+#define LED_PORT              GPIOA
+#define LED_PIN               GPIO_PIN_5
+#define LED_STATE_ON          0
+
+// Button
+#define BUTTON_PORT           GPIOC
+#define BUTTON_PIN            GPIO_PIN_13
+#define BUTTON_STATE_ACTIVE   1
+
+// UART Enable for STLink VCOM
+#define UART_DEV              USART2
+#define UART_CLK_EN           __HAL_RCC_USART2_CLK_ENABLE
+#define UART_GPIO_PORT        GPIOA
+#define UART_GPIO_AF          GPIO_AF1_USART2
+#define UART_TX_PIN           GPIO_PIN_2
+#define UART_RX_PIN           GPIO_PIN_3
+
+
+//--------------------------------------------------------------------+
+// RCC Clock
+//--------------------------------------------------------------------+
+static inline void board_clock_init(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_CRSInitTypeDef pInit = {0};
+
+  /** Tick priority is used in HAL_RCC_OscConfig, so we need to enable it now
+  */
+  HAL_InitTick(0);
+  
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSI48;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+  RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+  HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+
+  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
+
+  /** Enable the SYSCFG APB clock
+  */
+  __HAL_RCC_CRS_CLK_ENABLE();
+
+  /** Configures CRS
+  */
+  pInit.Prescaler = RCC_CRS_SYNC_DIV1;
+  pInit.Source = RCC_CRS_SYNC_SOURCE_USB;
+  pInit.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
+  pInit.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000,1000);
+  pInit.ErrorLimitValue = 34;
+  pInit.HSI48CalibrationValue = 32;
+
+  HAL_RCCEx_CRSConfig(&pInit);
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.mk b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.mk
new file mode 100644
index 000000000..50f282b09
--- /dev/null
+++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.mk
@@ -0,0 +1,13 @@
+CFLAGS += \
+	-DSTM32G0B1xx
+
+# GCC
+GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32g0b1xx.s
+GCC_LD_FILE = $(BOARD_PATH)/STM32G0B1RETx_FLASH.ld
+
+# IAR
+IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32g0b1xx.s
+IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32g0b1xx_flash.icf
+
+# For flash-jlink target
+JLINK_DEVICE = stm32g0b1re
diff --git a/hw/bsp/stm32g0/family.c b/hw/bsp/stm32g0/family.c
new file mode 100644
index 000000000..585398974
--- /dev/null
+++ b/hw/bsp/stm32g0/family.c
@@ -0,0 +1,189 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ * Copyright (c) 2023 HiFiPhile
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "stm32g0xx_hal.h"
+#include "bsp/board.h"
+#include "board.h"
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void USB_UCPD1_2_IRQHandler(void)
+{
+  tud_int_handler(0);
+}
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM
+//--------------------------------------------------------------------+
+UART_HandleTypeDef UartHandle;
+
+void board_init(void)
+{
+  board_clock_init();
+
+  // Enable All GPIOs clocks
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+
+  UART_CLK_EN();
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(SystemCoreClock / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR runs before scheduler start
+  SysTick->CTRL &= ~1U;
+
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(USB_UCPD1_2_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+#endif
+
+  GPIO_InitTypeDef  GPIO_InitStruct;
+
+  // LED
+  GPIO_InitStruct.Pin = LED_PIN;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_PULLUP;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+  HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
+
+  board_led_write(false);
+
+  // Button
+  GPIO_InitStruct.Pin = BUTTON_PIN;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN : GPIO_PULLUP;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+  HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
+
+#ifdef UART_DEV
+  // UART
+  GPIO_InitStruct.Pin       = UART_TX_PIN | UART_RX_PIN;
+  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull      = GPIO_PULLUP;
+  GPIO_InitStruct.Speed     = GPIO_SPEED_FREQ_HIGH;
+  GPIO_InitStruct.Alternate = UART_GPIO_AF;
+  HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
+
+  UartHandle = (UART_HandleTypeDef){
+    .Instance        = UART_DEV,
+    .Init.BaudRate   = CFG_BOARD_UART_BAUDRATE,
+    .Init.WordLength = UART_WORDLENGTH_8B,
+    .Init.StopBits   = UART_STOPBITS_1,
+    .Init.Parity     = UART_PARITY_NONE,
+    .Init.HwFlowCtl  = UART_HWCONTROL_NONE,
+    .Init.Mode       = UART_MODE_TX_RX,
+    .Init.OverSampling = UART_OVERSAMPLING_16,
+    .AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT
+  };
+  HAL_UART_Init(&UartHandle);
+#endif
+
+  // USB Pins TODO double check USB clock and pin setup
+  // Configure USB DM and DP pins. This is optional, and maintained only for user guidance.
+  GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* Peripheral clock enable */
+  __HAL_RCC_USB_CLK_ENABLE();
+
+  /* Enable VDDUSB */
+  if(__HAL_RCC_PWR_IS_CLK_DISABLED())
+  {
+    __HAL_RCC_PWR_CLK_ENABLE();
+    HAL_PWREx_EnableVddUSB();
+    __HAL_RCC_PWR_CLK_DISABLE();
+  }
+  else
+  {
+    HAL_PWREx_EnableVddUSB();
+  }
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+  GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1-LED_STATE_ON));
+  HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
+}
+
+uint32_t board_button_read(void)
+{
+  return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
+}
+
+int board_uart_read(uint8_t* buf, int len)
+{
+  (void) buf; (void) len;
+  return 0;
+}
+
+int board_uart_write(void const * buf, int len)
+{
+#ifdef UART_DEV
+  HAL_UART_Transmit(&UartHandle, (uint8_t*)(uintptr_t) buf, len, 0xffff);
+  return len;
+#else
+  (void) buf; (void) len; (void) UartHandle;
+  return 0;
+#endif
+}
+
+#if CFG_TUSB_OS  == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler (void)
+{
+  system_ticks++;
+}
+
+uint32_t board_millis(void)
+{
+  return system_ticks;
+}
+#endif
+
+void HardFault_Handler (void)
+{
+  __asm("BKPT #0\n");
+}
+
+// Required by __libc_init_array in startup code if we are compiling using
+// -nostdlib/-nostartfiles.
+void _init(void)
+{
+
+}
diff --git a/hw/bsp/stm32g0/family.mk b/hw/bsp/stm32g0/family.mk
new file mode 100644
index 000000000..ac0eee156
--- /dev/null
+++ b/hw/bsp/stm32g0/family.mk
@@ -0,0 +1,57 @@
+ST_FAMILY = g0
+DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_$(ST_FAMILY) hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
+
+ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
+ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+# --------------
+# Compiler Flags
+# --------------
+CFLAGS += \
+  -DCFG_TUSB_MCU=OPT_MCU_STM32G0
+  
+# GCC Flags
+GCC_CFLAGS += \
+  -flto \
+  -mthumb \
+  -mabi=aapcs \
+  -mcpu=cortex-m0plus \
+  -mfloat-abi=soft \
+  -nostdlib -nostartfiles
+
+# suppress warning caused by vendor mcu driver
+GCC_CFLAGS += -Wno-error=cast-align
+
+# IAR Flags
+IAR_CFLAGS += --cpu cortex-m0
+IAR_ASFLAGS += --cpu cortex-m0
+
+# -----------------
+# Sources & Include
+# -----------------
+
+SRC_C += \
+	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+	$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart_ex.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c
+
+INC += \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
+	$(TOP)/$(ST_CMSIS)/Include \
+	$(TOP)/$(ST_HAL_DRIVER)/Inc
+
+# For freeRTOS port source
+FREERTOS_PORT = ARM_CM0
+
+# flash target using on-board stlink
+flash: flash-stlink
diff --git a/hw/bsp/stm32g0/stm32g0xx_hal_conf.h b/hw/bsp/stm32g0/stm32g0xx_hal_conf.h
new file mode 100644
index 000000000..b2e335676
--- /dev/null
+++ b/hw/bsp/stm32g0/stm32g0xx_hal_conf.h
@@ -0,0 +1,351 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32g0xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2018-2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32G0xx_HAL_CONF_H
+#define STM32G0xx_HAL_CONF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+#define HAL_MODULE_ENABLED
+/* #define HAL_ADC_MODULE_ENABLED   */
+/* #define HAL_CEC_MODULE_ENABLED   */
+/* #define HAL_COMP_MODULE_ENABLED   */
+/* #define HAL_CRC_MODULE_ENABLED   */
+/* #define HAL_CRYP_MODULE_ENABLED   */
+/* #define HAL_DAC_MODULE_ENABLED   */
+/* #define HAL_EXTI_MODULE_ENABLED   */
+/* #define HAL_FDCAN_MODULE_ENABLED   */
+/* #define HAL_HCD_MODULE_ENABLED   */
+/* #define HAL_I2C_MODULE_ENABLED   */
+/* #define HAL_I2S_MODULE_ENABLED   */
+/* #define HAL_IWDG_MODULE_ENABLED   */
+/* #define HAL_IRDA_MODULE_ENABLED   */
+/* #define HAL_LPTIM_MODULE_ENABLED   */
+/* #define HAL_PCD_MODULE_ENABLED   */
+/* #define HAL_RNG_MODULE_ENABLED   */
+/* #define HAL_RTC_MODULE_ENABLED   */
+/* #define HAL_SMARTCARD_MODULE_ENABLED   */
+/* #define HAL_SMBUS_MODULE_ENABLED   */
+/* #define HAL_SPI_MODULE_ENABLED   */
+/* #define HAL_TIM_MODULE_ENABLED   */
+/* #define HAL_USART_MODULE_ENABLED   */
+/* #define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+#define HAL_UART_MODULE_ENABLED
+
+/* ########################## Register Callbacks selection ############################## */
+/**
+  * @brief This is the list of modules where register callback can be used
+  */
+#define USE_HAL_ADC_REGISTER_CALLBACKS    0u
+#define USE_HAL_CEC_REGISTER_CALLBACKS    0u
+#define USE_HAL_COMP_REGISTER_CALLBACKS   0u
+#define USE_HAL_CRYP_REGISTER_CALLBACKS   0u
+#define USE_HAL_DAC_REGISTER_CALLBACKS    0u
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS  0u
+#define USE_HAL_HCD_REGISTER_CALLBACKS    0u
+#define USE_HAL_I2C_REGISTER_CALLBACKS    0u
+#define USE_HAL_I2S_REGISTER_CALLBACKS    0u
+#define USE_HAL_IRDA_REGISTER_CALLBACKS   0u
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS  0u
+#define USE_HAL_PCD_REGISTER_CALLBACKS    0u
+#define USE_HAL_RNG_REGISTER_CALLBACKS    0u
+#define USE_HAL_RTC_REGISTER_CALLBACKS    0u
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS  0u
+#define USE_HAL_SPI_REGISTER_CALLBACKS    0u
+#define USE_HAL_TIM_REGISTER_CALLBACKS    0u
+#define USE_HAL_UART_REGISTER_CALLBACKS   0u
+#define USE_HAL_USART_REGISTER_CALLBACKS  0u
+#define USE_HAL_WWDG_REGISTER_CALLBACKS   0u
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+#define HSE_VALUE    (8000000UL)         /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+#define HSE_STARTUP_TIMEOUT    (100UL)         /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+#define HSI_VALUE    (16000000UL)            /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+#if defined(STM32G0C1xx) || defined(STM32G0B1xx) || defined(STM32G0B0xx)
+/**
+  * @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG.
+  *        This internal oscillator is mainly dedicated to provide a high precision clock to
+  *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+  *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+  *        which is subject to manufacturing process variations.
+  */
+#if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE   48000000U             /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz.
+                                               The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+#endif
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+#define LSI_VALUE  (32000UL)                /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
+The real value may vary depending on the variations
+in voltage and temperature.*/
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE    (32768UL)               /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    (5000UL)      /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S1 peripheral
+  *        This value is used by the RCC HAL module to compute the I2S1 clock source
+  *        frequency.
+  */
+#if !defined  (EXTERNAL_I2S1_CLOCK_VALUE)
+#define EXTERNAL_I2S1_CLOCK_VALUE    (48000UL) /*!< Value of the I2S1 External clock source in Hz*/
+#endif /* EXTERNAL_I2S1_CLOCK_VALUE */
+
+#if defined(STM32G0C1xx) || defined(STM32G0B1xx) || defined(STM32G0B0xx)
+/**
+  * @brief External clock source for I2S2 peripheral
+  *        This value is used by the RCC HAL module to compute the I2S2 clock source
+  *        frequency.
+  */
+#if !defined  (EXTERNAL_I2S2_CLOCK_VALUE)
+  #define EXTERNAL_I2S2_CLOCK_VALUE    48000U /*!< Value of the I2S2 External clock source in Hz*/
+#endif /* EXTERNAL_I2S2_CLOCK_VALUE */
+#endif
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+#define  VDD_VALUE                    (3300UL)                                        /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            0U /*!< tick interrupt priority */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              1U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+
+#define USE_SPI_CRC                     0U
+
+/* ################## CRYP peripheral configuration ########################## */
+
+#define USE_HAL_CRYP_SUSPEND_RESUME     1U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include modules header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32g0xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32g0xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32g0xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32g0xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32g0xx_hal_adc.h"
+#include "stm32g0xx_hal_adc_ex.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+#include "stm32g0xx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32g0xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32g0xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32g0xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32g0xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32g0xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32g0xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32g0xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+#include "stm32g0xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32g0xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+#include "stm32g0xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32g0xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32g0xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32g0xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32g0xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32g0xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32g0xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32g0xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32g0xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32g0xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32g0xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32g0xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32g0xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32g0xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32g0xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for functions parameters check.
+  * @param  expr If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32G0xx_HAL_CONF_H */

From 413b0a7da5b9ef1e519e4087a577bfc6d6681d97 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 14 Apr 2023 17:12:47 +0200
Subject: [PATCH 249/691] Use PLL clock.

---
 hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h | 38 ++++++++-----------
 hw/bsp/stm32g0/family.c                       | 14 ++-----
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c |  1 +
 3 files changed, 21 insertions(+), 32 deletions(-)

diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
index 3f5bc60b7..60357d1e8 100644
--- a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
+++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
@@ -62,7 +62,7 @@ static inline void board_clock_init(void)
 {
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-  RCC_CRSInitTypeDef pInit = {0};
+  RCC_PeriphCLKInitTypeDef  PeriphClkInitStruct = { 0 };
 
   /** Tick priority is used in HAL_RCC_OscConfig, so we need to enable it now
   */
@@ -75,38 +75,32 @@ static inline void board_clock_init(void)
   /** Initializes the RCC Oscillators according to the specified parameters
   * in the RCC_OscInitTypeDef structure.
   */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSI48;
-  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
-  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
-  RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
-  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
-  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
+  RCC_OscInitStruct.PLL.PLLN = 12;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
   HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
+  /* Select HSI48 as USB clock source */
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
+  PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
+  HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
+
   /** Initializes the CPU, AHB and APB buses clocks
   */
   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
                               |RCC_CLOCKTYPE_PCLK1;
-  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
 
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
 
-  /** Enable the SYSCFG APB clock
-  */
-  __HAL_RCC_CRS_CLK_ENABLE();
-
-  /** Configures CRS
-  */
-  pInit.Prescaler = RCC_CRS_SYNC_DIV1;
-  pInit.Source = RCC_CRS_SYNC_SOURCE_USB;
-  pInit.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
-  pInit.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000,1000);
-  pInit.ErrorLimitValue = 34;
-  pInit.HSI48CalibrationValue = 32;
-
-  HAL_RCCEx_CRSConfig(&pInit);
 }
 
 #ifdef __cplusplus
diff --git a/hw/bsp/stm32g0/family.c b/hw/bsp/stm32g0/family.c
index 585398974..be356efe9 100644
--- a/hw/bsp/stm32g0/family.c
+++ b/hw/bsp/stm32g0/family.c
@@ -53,6 +53,9 @@ void board_init(void)
   __HAL_RCC_GPIOD_CLK_ENABLE();
   __HAL_RCC_GPIOE_CLK_ENABLE();
 
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+
   UART_CLK_EN();
 
 #if CFG_TUSB_OS == OPT_OS_NONE
@@ -119,16 +122,7 @@ void board_init(void)
   __HAL_RCC_USB_CLK_ENABLE();
 
   /* Enable VDDUSB */
-  if(__HAL_RCC_PWR_IS_CLK_DISABLED())
-  {
-    __HAL_RCC_PWR_CLK_ENABLE();
-    HAL_PWREx_EnableVddUSB();
-    __HAL_RCC_PWR_CLK_DISABLE();
-  }
-  else
-  {
-    HAL_PWREx_EnableVddUSB();
-  }
+  HAL_PWREx_EnableVddUSB();
 }
 
 //--------------------------------------------------------------------+
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 36b9133be..23b328b49 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -44,6 +44,7 @@
  * L0x2, L0x3                     1024 byte buffer
  * L1                              512 byte buffer
  * L4x2, L4x3                     1024 byte buffer
+ * G0                             2048 byte buffer
  *
  * To use this driver, you must:
  * - If you are using a device with crystal-less USB, set up the clock recovery system (CRS)

From 71d2ccd78f643886237944729f4bd03876dd108f Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 14 Apr 2023 17:22:25 +0200
Subject: [PATCH 250/691] Fix CI

---
 .../boards/stm32g0b1nucleo/STM32G0B1RETx_FLASH.ld      | 10 ++++------
 hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h          |  2 +-
 hw/bsp/stm32g0/family.c                                |  2 +-
 hw/bsp/stm32g0/family.mk                               |  2 +-
 4 files changed, 7 insertions(+), 9 deletions(-)

diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/STM32G0B1RETx_FLASH.ld b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/STM32G0B1RETx_FLASH.ld
index 842cf1372..0f3fed096 100644
--- a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/STM32G0B1RETx_FLASH.ld
+++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/STM32G0B1RETx_FLASH.ld
@@ -134,7 +134,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(4);
     _sdata = .;        /* create a global symbol at data start */
@@ -145,12 +145,12 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
   {
-    /* This is used by the startup in order to initialize the .bss secion */
+    /* This is used by the startup in order to initialize the .bss section */
     _sbss = .;         /* define a global symbol at bss start */
     __bss_start__ = _sbss;
     *(.bss)
@@ -173,7 +173,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -185,5 +185,3 @@ SECTIONS
 
   .ARM.attributes 0 : { *(.ARM.attributes) }
 }
-
-
diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
index 60357d1e8..0d651ea4e 100644
--- a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
+++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
@@ -67,7 +67,7 @@ static inline void board_clock_init(void)
   /** Tick priority is used in HAL_RCC_OscConfig, so we need to enable it now
   */
   HAL_InitTick(0);
-  
+
   /** Configure the main internal regulator output voltage
   */
   HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
diff --git a/hw/bsp/stm32g0/family.c b/hw/bsp/stm32g0/family.c
index be356efe9..10023b7e2 100644
--- a/hw/bsp/stm32g0/family.c
+++ b/hw/bsp/stm32g0/family.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
diff --git a/hw/bsp/stm32g0/family.mk b/hw/bsp/stm32g0/family.mk
index ac0eee156..faf92dca9 100644
--- a/hw/bsp/stm32g0/family.mk
+++ b/hw/bsp/stm32g0/family.mk
@@ -11,7 +11,7 @@ include $(TOP)/$(BOARD_PATH)/board.mk
 # --------------
 CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32G0
-  
+
 # GCC Flags
 GCC_CFLAGS += \
   -flto \

From 2f2c8ce9ec4a567603cbd5e0420fc3dcaffbdfb6 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 14 Apr 2023 17:54:25 +0200
Subject: [PATCH 251/691] Fix GCC build.

---
 hw/bsp/board_mcu.h                                   |  3 +++
 hw/bsp/stm32g0/family.mk                             |  2 +-
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c        | 12 ++++++++++--
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h | 11 +++++++++++
 4 files changed, 25 insertions(+), 3 deletions(-)

diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h
index cd195a19b..6d40aa0d1 100644
--- a/hw/bsp/board_mcu.h
+++ b/hw/bsp/board_mcu.h
@@ -101,6 +101,9 @@
 #elif CFG_TUSB_MCU == OPT_MCU_STM32U5
   #include "stm32u5xx.h"
 
+#elif CFG_TUSB_MCU == OPT_MCU_STM32G0
+  #include "stm32g0xx.h"
+
 #elif CFG_TUSB_MCU == OPT_MCU_CXD56
   // no header needed
 
diff --git a/hw/bsp/stm32g0/family.mk b/hw/bsp/stm32g0/family.mk
index faf92dca9..76f59fc34 100644
--- a/hw/bsp/stm32g0/family.mk
+++ b/hw/bsp/stm32g0/family.mk
@@ -51,7 +51,7 @@ INC += \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # For freeRTOS port source
-FREERTOS_PORT = ARM_CM0
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 23b328b49..32bab2bed 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -367,7 +367,11 @@ void dcd_int_enable (uint8_t rhport)
   NVIC_EnableIRQ(USBWakeUp_IRQn);
 
 #elif CFG_TUSB_MCU == OPT_MCU_STM32G0
-  NVIC_EnableIRQ(USB_UCPD1_2_IRQn);
+  #ifdef STM32G0B0xx
+    NVIC_EnableIRQ(USB_IRQn);
+  #else
+    NVIC_EnableIRQ(USB_UCPD1_2_IRQn);
+  #endif
 
 #elif CFG_TUSB_MCU == OPT_MCU_STM32WB
   NVIC_EnableIRQ(USB_HP_IRQn);
@@ -420,7 +424,11 @@ void dcd_int_disable(uint8_t rhport)
   NVIC_DisableIRQ(USBWakeUp_IRQn);
 
 #elif CFG_TUSB_MCU == OPT_MCU_STM32G0
-  NVIC_DisableIRQ(USB_UCPD1_2_IRQn);
+  #ifdef STM32G0B0xx
+    NVIC_DisableIRQ(USB_IRQn);
+  #else
+    NVIC_DisableIRQ(USB_UCPD1_2_IRQn);
+  #endif
 
 #elif CFG_TUSB_MCU == OPT_MCU_STM32WB
   NVIC_DisableIRQ(USB_HP_IRQn);
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index c0f923c8f..32f715e6e 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -184,6 +184,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t pcd_aligned_buffer_size(uint16_t si
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_endpoint(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wRegValue)
 {
 #ifdef PMA_32BIT_ACCESS
+  (void) USBx;
   __O uint32_t *reg = (__O uint32_t *)(USB_DRD_BASE + bEpIdx*4);
   *reg = wRegValue;
 #else
@@ -195,6 +196,7 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_endpoint(USB_TypeDef * USBx, ui
 /* GetENDPOINT */
 TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_endpoint(USB_TypeDef * USBx, uint32_t bEpIdx) {
 #ifdef PMA_32BIT_ACCESS
+  (void) USBx;
   __I uint32_t *reg = (__I uint32_t *)(USB_DRD_BASE + bEpIdx*4);
 #else
   __I uint16_t *reg = (__I uint16_t *)((&USBx->EP0R) + bEpIdx*2u);
@@ -249,6 +251,7 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx,
 TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_tx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx)
 {
 #ifdef PMA_32BIT_ACCESS
+  (void) USBx;
   return (pma32[2*bEpIdx] & 0x03FF0000) >> 16;
 #else
   __I uint16_t *regPtr = pcd_ep_tx_cnt_ptr(USBx, bEpIdx);
@@ -259,6 +262,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_tx_cnt(USB_TypeDef * USB
 TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx)
 {
 #ifdef PMA_32BIT_ACCESS
+  (void) USBx;
   return (pma32[2*bEpIdx + 1] & 0x03FF0000) >> 16;
 #else
   __I uint16_t *regPtr = pcd_ep_rx_cnt_ptr(USBx, bEpIdx);
@@ -285,6 +289,7 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_address(USB_TypeDef * USBx,
 TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_tx_address(USB_TypeDef * USBx, uint32_t bEpIdx)
 {
 #ifdef PMA_32BIT_ACCESS
+  (void) USBx;
   return pma32[2*bEpIdx] & 0x0000FFFFu ;
 #else
   return *pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 0u);
@@ -294,6 +299,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_tx_address(USB_TypeDef *
 TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_address(USB_TypeDef * USBx, uint32_t bEpIdx)
 {
 #ifdef PMA_32BIT_ACCESS
+  (void) USBx;
   return pma32[2*bEpIdx + 1] & 0x0000FFFFu;
 #else
   return *pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 2u);
@@ -303,6 +309,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t pcd_get_ep_rx_address(USB_TypeDef *
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_address(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t addr)
 {
 #ifdef PMA_32BIT_ACCESS
+  (void) USBx;
   pma32[2*bEpIdx] = (pma32[2*bEpIdx] & 0xFFFF0000u) | (addr & 0x0000FFFCu);
 #else
   *pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 0u) = addr;
@@ -312,6 +319,7 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_address(USB_TypeDef * USB
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_address(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t addr)
 {
 #ifdef PMA_32BIT_ACCESS
+  (void) USBx;
   pma32[2*bEpIdx + 1] = (pma32[2*bEpIdx + 1] & 0xFFFF0000u) | (addr & 0x0000FFFCu);
 #else
   *pcd_btable_word_ptr(USBx,(bEpIdx)*4u + 2u) = addr;
@@ -321,6 +329,7 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_address(USB_TypeDef * USB
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wCount)
 {
 #ifdef PMA_32BIT_ACCESS
+  (void) USBx;
   pma32[2*bEpIdx] = (pma32[2*bEpIdx] & ~0x03FF0000u) | ((wCount & 0x3FFu) << 16);
 #else
   __IO uint16_t * reg = pcd_ep_tx_cnt_ptr(USBx, bEpIdx);
@@ -331,6 +340,7 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_tx_cnt(USB_TypeDef * USBx, u
 TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_rx_cnt(USB_TypeDef * USBx, uint32_t bEpIdx, uint32_t wCount)
 {
 #ifdef PMA_32BIT_ACCESS
+  (void) USBx;
   pma32[2*bEpIdx + 1] = (pma32[2*bEpIdx + 1] & ~0x03FF0000u) | ((wCount & 0x3FFu) << 16);
 #else
   __IO uint16_t * reg = pcd_ep_rx_cnt_ptr(USBx, bEpIdx);
@@ -342,6 +352,7 @@ TU_ATTR_ALWAYS_INLINE static inline void pcd_set_ep_blsize_num_blocks(USB_TypeDe
 {
   /* Encode into register. When BLSIZE==1, we need to subtract 1 block count */
 #ifdef PMA_32BIT_ACCESS
+  (void) USBx;
   pma32[rxtx_idx] = (pma32[rxtx_idx] & 0x0000FFFFu) | (blocksize << 31) | ((numblocks - blocksize) << 26);
 #else
   __IO uint16_t *pdwReg = pcd_btable_word_ptr(USBx, rxtx_idx*2u + 1u);

From 818bda18c23e17c08c689b543d77ecc944681dea Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 14 Apr 2023 23:34:20 +0200
Subject: [PATCH 252/691] Fix FIFO transfer and buffer alignment.

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 166 +++++++++++++++---
 .../st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h   |   2 +-
 2 files changed, 142 insertions(+), 26 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 32bab2bed..b8d04331a 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -186,12 +186,12 @@ static void dcd_ep_ctr_handler(void);
 static uint8_t open_ep_count;
 static uint16_t ep_buf_ptr; ///< Points to first free memory location
 static void dcd_pma_alloc_reset(void);
-static uint16_t dcd_pma_alloc(uint8_t ep_addr, size_t length);
+static uint16_t dcd_pma_alloc(uint8_t ep_addr, uint16_t length);
 static void dcd_pma_free(uint8_t ep_addr);
 static void dcd_ep_free(uint8_t ep_addr);
 static uint8_t dcd_ep_alloc(uint8_t ep_addr, uint8_t ep_type);
-static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, size_t wNBytes);
-static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wNBytes);
+static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t wNBytes);
+static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t wNBytes);
 
 static bool dcd_write_packet_memory_ff(tu_fifo_t * ff, uint16_t dst, uint16_t wNBytes);
 static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNBytes);
@@ -792,7 +792,7 @@ static void dcd_pma_alloc_reset(void)
  *
  * During failure, TU_ASSERT is used. If this happens, rework/reallocate memory manually.
  */
-static uint16_t dcd_pma_alloc(uint8_t ep_addr, size_t length)
+static uint16_t dcd_pma_alloc(uint8_t ep_addr, uint16_t length)
 {
   xfer_ctl_t* epXferCtl = xfer_ctl_ptr(ep_addr);
 
@@ -804,6 +804,13 @@ static uint16_t dcd_pma_alloc(uint8_t ep_addr, size_t length)
     return epXferCtl->pma_ptr;
   }
 
+  // Ensure allocated buffer is aligned
+#ifdef PMA_32BIT_ACCESS
+  length = (length + 3) & ~0x03;
+#else
+  length = (length + 1) & ~0x01;
+#endif
+
   open_ep_count++;
 
   uint16_t addr = ep_buf_ptr;
@@ -814,7 +821,7 @@ static uint16_t dcd_pma_alloc(uint8_t ep_addr, size_t length)
 
   epXferCtl->pma_ptr = addr;
   epXferCtl->pma_alloc_size = length;
-  //TU_LOG2("dcd_pma_alloc(%x,%x)=%x\r\n",ep_addr,length,addr);
+  //TU_LOG1("dcd_pma_alloc(%x,%x)=%x\r\n",ep_addr,length,addr);
 
   return addr;
 }
@@ -1240,15 +1247,36 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
 }
 
 #ifdef PMA_32BIT_ACCESS
-static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, size_t wNBytes)
+static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t wNBytes)
 {
-  // FIXME original function uses byte-access to source memory (to support non-aligned buffers)
-  const uint32_t* src32 = (const uint32_t*)(src);
+  const uint8_t* srcVal = src;
   volatile uint32_t* dst32 = (volatile uint32_t*)(USB_PMAADDR + dst);
-  for (unsigned n=wNBytes/4; n>0; --n) {
-    *dst32++ = *src32++;
+
+  for (uint32_t n = wNBytes / 4; n > 0; --n) {
+    *dst32++ = tu_unaligned_read32(srcVal);
+    srcVal += 4;
   }
-  *dst32 = (*src32) & ((1<<8*(wNBytes % 4)) - 1);
+
+  wNBytes = wNBytes & 0x03;
+  if (wNBytes)
+  {
+    uint32_t wrVal = *srcVal;
+    wNBytes--;
+
+    if (wNBytes)
+    {
+      wrVal |= *++srcVal << 8;
+      wNBytes--;
+
+      if (wNBytes)
+      {
+        wrVal |= *++srcVal << 16;
+      }
+    }
+
+    *dst32 = wrVal;
+  }
+
   return true;
 }
 #else
@@ -1263,7 +1291,7 @@ static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, si
   * @param   wNBytes no. of bytes to be copied.
   * @retval None
   */
-static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, size_t wNBytes)
+static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t wNBytes)
 {
   uint32_t n = (uint32_t)wNBytes >> 1U;
   uint16_t temp1, temp2;
@@ -1286,7 +1314,7 @@ static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, si
     srcVal++;
   }
 
-  if (wNBytes & 0x01)
+  if (wNBytes)
   {
     temp1 = *srcVal;
     *pdwVal = temp1;
@@ -1313,7 +1341,37 @@ static bool dcd_write_packet_memory_ff(tu_fifo_t * ff, uint16_t dst, uint16_t wN
 
   // We want to read from the FIFO and write it into the PMA, if LIN part is ODD and has WRAPPED part,
   // last lin byte will be combined with wrapped part
-  // To ensure PMA is always access 16bit aligned (dst aligned to 16 bit)
+  // To ensure PMA is always access aligned (dst aligned to 16 or 32 bit)
+#ifdef PMA_32BIT_ACCESS
+  if((cnt_lin & 0x03) && cnt_wrap)
+  {
+    // Copy first linear part
+    dcd_write_packet_memory(dst, info.ptr_lin, cnt_lin &~0x03);
+    dst += cnt_lin &~0x03;
+
+    // Copy last linear bytes & first wrapped bytes to buffer
+    uint32_t i;
+    uint8_t tmp[4];
+    for (i = 0; i < (cnt_lin & 0x03); i++)
+    {
+      tmp[i] = ((uint8_t*)info.ptr_lin)[(cnt_lin &~0x03) + i];
+    }
+    uint32_t wCnt = cnt_wrap;
+    for (; i < 4 && wCnt > 0; i++, wCnt--)
+    {
+      tmp[i] = *(uint8_t*)info.ptr_wrap;
+      info.ptr_wrap = (uint8_t*)info.ptr_wrap + 1;
+    }
+
+    // Write unaligned buffer
+    dcd_write_packet_memory(dst, &tmp, 4);
+    dst += 4;
+
+    // Copy rest of wrapped byte
+    if (wCnt)
+        dcd_write_packet_memory(dst, info.ptr_wrap, wCnt);
+  }
+#else
   if((cnt_lin & 0x01) && cnt_wrap)
   {
     // Copy first linear part
@@ -1328,6 +1386,7 @@ static bool dcd_write_packet_memory_ff(tu_fifo_t * ff, uint16_t dst, uint16_t wN
     // Copy rest of wrapped byte
     dcd_write_packet_memory(dst, ((uint8_t*)info.ptr_wrap) + 1, cnt_wrap - 1);
   }
+#endif
   else
   {
     // Copy linear part
@@ -1347,11 +1406,37 @@ static bool dcd_write_packet_memory_ff(tu_fifo_t * ff, uint16_t dst, uint16_t wN
 }
 
 #ifdef PMA_32BIT_ACCESS
-static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wNBytes)
+static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t wNBytes)
 {
-    // FIXME this should probably be modified for possible unaligned access?
-    memcpy(dst, (void*)(USB_PMAADDR+src), wNBytes);
-    return true;
+  uint8_t* dstVal = dst;
+  volatile uint32_t* src32 = (volatile uint32_t*)(USB_PMAADDR + src);
+
+  for (uint32_t n = wNBytes / 4; n > 0; --n) {
+    tu_unaligned_write32(dstVal, *src32++);
+    dstVal += 4;
+  }
+
+  wNBytes = wNBytes & 0x03;
+  if (wNBytes)
+  {
+    uint32_t rdVal = *src32;
+
+    *dstVal = tu_u32_byte0(rdVal);
+    wNBytes--;
+
+    if (wNBytes)
+    {
+      *++dstVal = tu_u32_byte1(rdVal);
+      wNBytes--;
+
+      if (wNBytes)
+      {
+        *++dstVal = tu_u32_byte2(rdVal);
+      }
+    }
+  }
+
+  return true;
 }
 #else
 /**
@@ -1360,7 +1445,7 @@ static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wN
   * @param   wNBytes no. of bytes to be copied.
   * @retval None
   */
-static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wNBytes)
+static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t wNBytes)
 {
   uint32_t n = (uint32_t)wNBytes >> 1U;
   // The GCC optimizer will combine access to 32-bit sizes if we let it. Force
@@ -1405,9 +1490,39 @@ static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNB
   uint16_t cnt_lin =  TU_MIN(wNBytes, info.len_lin);
   uint16_t cnt_wrap = TU_MIN(wNBytes - cnt_lin, info.len_wrap);
 
+
   // We want to read from PMA and write it into the FIFO, if LIN part is ODD and has WRAPPED part,
   // last lin byte will be combined with wrapped part
-  // To ensure PMA is always access 16bit aligned (src aligned to 16 bit)
+  // To ensure PMA is always access aligned (src aligned to 16 or 32 bit)
+#ifdef PMA_32BIT_ACCESS
+  if((cnt_lin & 0x03) && cnt_wrap)
+  {
+    // Copy first linear part
+    dcd_read_packet_memory(info.ptr_lin, src, cnt_lin &~0x03);
+    src += cnt_lin &~0x03;
+
+    // Copy last linear bytes & first wrapped bytes
+    uint8_t tmp[4];
+    dcd_read_packet_memory(tmp, src, 4);
+    src += 4;
+
+    uint32_t i;
+    for (i = 0; i < (cnt_lin & 0x03); i++)
+    {
+      ((uint8_t*)info.ptr_lin)[(cnt_lin &~0x03) + i] = tmp[i];
+    }
+    uint32_t wCnt = cnt_wrap;
+    for (; i < 4 && wCnt > 0; i++, wCnt--)
+    {
+      *(uint8_t*)info.ptr_wrap = tmp[i];
+      info.ptr_wrap = (uint8_t*)info.ptr_wrap + 1;
+    }
+
+    // Copy rest of wrapped byte
+    if (wCnt)
+      dcd_read_packet_memory(info.ptr_wrap, src, wCnt);
+  }
+#else
   if((cnt_lin & 0x01) && cnt_wrap)
   {
     // Copy first linear part
@@ -1415,16 +1530,17 @@ static bool dcd_read_packet_memory_ff(tu_fifo_t * ff, uint16_t src, uint16_t wNB
     src += cnt_lin &~0x01;
 
     // Copy last linear byte & first wrapped byte
-    uint16_t tmp;
-    dcd_read_packet_memory(&tmp, src, 2);
-
-    ((uint8_t*)info.ptr_lin)[cnt_lin - 1] = (uint8_t)tmp;
-    ((uint8_t*)info.ptr_wrap)[0] = (uint8_t)(tmp >> 8U);
+    uint8_t tmp[2];
+    dcd_read_packet_memory(tmp, src, 2);
     src += 2;
 
+    ((uint8_t*)info.ptr_lin)[cnt_lin - 1] = tmp[0];
+    ((uint8_t*)info.ptr_wrap)[0] = tmp[1];
+
     // Copy rest of wrapped byte
     dcd_read_packet_memory(((uint8_t*)info.ptr_wrap) + 1, src, cnt_wrap - 1);
   }
+#endif
   else
   {
     // Copy linear part
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
index 32f715e6e..e6649de5a 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
@@ -85,7 +85,7 @@
 #elif CFG_TUSB_MCU == OPT_MCU_STM32G0
   #include "stm32g0xx.h"
   #define PMA_32BIT_ACCESS
-  #define PMA_LENGTH (1024u) // FIXME it is 2048, really
+  #define PMA_LENGTH (2048u)
   #undef USB_PMAADDR
   #define USB_PMAADDR USB_DRD_PMAADDR
   #define USB_TypeDef USB_DRD_TypeDef

From 8c780a9564a05ea0f0e3bf0d929fd5dbe6c4806a Mon Sep 17 00:00:00 2001
From: slc-tl <91279938+slc-tl@users.noreply.github.com>
Date: Fri, 14 Apr 2023 17:07:33 -0600
Subject: [PATCH 253/691] Update porting.rst

Adds more in depth documentation of how tud_task does not need to be polled in implementations that use an RTOS / scheduler.
---
 docs/contributing/porting.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/contributing/porting.rst b/docs/contributing/porting.rst
index 710af51c3..9ec392661 100644
--- a/docs/contributing/porting.rst
+++ b/docs/contributing/porting.rst
@@ -69,7 +69,7 @@ The code is almost entirely agnostic of MCU and lives in ``src/osal``.
 Device API
 ^^^^^^^^^^
 
-After the USB device is setup, the USB device code works by processing events on the main thread (by calling ``tud_task``\ ). These events are queued by the USB interrupt handler. So, there are three parts to the device low-level API: device setup, endpoint setup and interrupt processing.
+After the USB device is setup, the USB device code works by processing events on the main thread (by calling ``tud_task``\ ). In RTOS configurations, tud_task blocks behind a synchronization structure when the event queue is empty, so that the scheduler may give the CPU to a different task. To take advantage of the library's capability to yield the CPU when there are no actionable USB device events, ensure that the `CFG_TUSB_OS` symbol is defined in your modified ``tusb_config.h``. For example `#define CFG_TUSB_OS  OPT_OS_FREERTOS` enables the FreeRTOS scheduler to schedule other threads than that which calls `tud_task`. These events are queued by the USB interrupt handler. So, there are three parts to the device low-level API: device setup, endpoint setup and interrupt processing. 
 
 All of the code for the low-level device API is in ``src/portable/<vendor>/<chip family>/dcd_<chip family>.c``.
 

From d97b6d57de0b2586624dec51b37ccd699a0314a6 Mon Sep 17 00:00:00 2001
From: Reimu NotMoe <reimu@sudomaker.com>
Date: Mon, 17 Apr 2023 20:20:22 +0800
Subject: [PATCH 254/691] Fix compatibility with the latest Microchip XC16
 compiler

---
 src/common/tusb_compiler.h | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index 713bbb8d4..a1794584d 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -138,10 +138,14 @@
   #define TU_ATTR_BIT_FIELD_ORDER_BEGIN
   #define TU_ATTR_BIT_FIELD_ORDER_END
 
-  #if __has_attribute(__fallthrough__)
-    #define TU_ATTR_FALLTHROUGH         __attribute__((fallthrough))
-  #else
+  #if defined(__XC16)
     #define TU_ATTR_FALLTHROUGH         do {} while (0)  /* fallthrough */
+  #else
+    #if __has_attribute(__fallthrough__)
+      #define TU_ATTR_FALLTHROUGH         __attribute__((fallthrough))
+    #else
+      #define TU_ATTR_FALLTHROUGH         do {} while (0)  /* fallthrough */
+    #endif
   #endif
 
   // Endian conversion use well-known host to network (big endian) naming

From fa8f3731c1b2e069dd07d30e86ea4a3af18c34dc Mon Sep 17 00:00:00 2001
From: Reimu NotMoe <reimu@sudomaker.com>
Date: Mon, 17 Apr 2023 21:02:12 +0800
Subject: [PATCH 255/691] Implement TU_BSWAP{16,32} correctly for Microchip
 XC16

---
 src/common/tusb_compiler.h | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index a1794584d..dce32e92b 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -155,8 +155,17 @@
     #define TU_BYTE_ORDER TU_BIG_ENDIAN
   #endif
 
-  #define TU_BSWAP16(u16) (__builtin_bswap16(u16))
-  #define TU_BSWAP32(u32) (__builtin_bswap32(u32))
+  // Unfortunately XC16 doesn't provide builtins for 32bit endian conversion
+  #if defined(__XC16)
+    #define TU_BSWAP16(u16) (__builtin_swap(u16))
+    #define TU_BSWAP32(u32) ((((u32) & 0xff000000) >> 24) |  \
+                            (((u32) & 0x00ff0000) >> 8)  |  \
+                            (((u32) & 0x0000ff00) << 8)  |  \
+                            (((u32) & 0x000000ff) << 24))
+  #else
+    #define TU_BSWAP16(u16) (__builtin_bswap16(u16))
+    #define TU_BSWAP32(u32) (__builtin_bswap32(u32))
+  #endif
 
 	#ifndef __ARMCC_VERSION
   // List of obsolete callback function that is renamed and should not be defined.

From 412b557a080526fbfe7b42dd8aa07468c16413cc Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Mon, 17 Apr 2023 15:34:20 +0200
Subject: [PATCH 256/691] Cleanup unnecessary code for 16bit access.

---
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 39 ++++---------------
 1 file changed, 7 insertions(+), 32 deletions(-)

diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index b8d04331a..14cabaf8d 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -210,17 +210,6 @@ TU_ATTR_ALWAYS_INLINE static inline xfer_ctl_t* xfer_ctl_ptr(uint32_t ep_addr)
   return &xfer_status[epnum][dir];
 }
 
-// Using a function due to better type checks
-// This seems better than having to do type casts everywhere else
-TU_ATTR_ALWAYS_INLINE static inline void reg16_clear_bits(__IO uint16_t *reg, uint16_t mask) {
-  *reg = (uint16_t)(*reg & ~mask);
-}
-
-// Bits in ISTR are cleared upon writing 0
-TU_ATTR_ALWAYS_INLINE static inline void clear_istr_bits(uint32_t mask) {
-  USB->ISTR = ~mask;
-}
-
 //--------------------------------------------------------------------+
 // Controller API
 //--------------------------------------------------------------------+
@@ -244,11 +233,7 @@ void dcd_init (uint8_t rhport)
     asm("NOP");
   }
 
-#ifdef PMA_32BIT_ACCESS // CNTR register is 32bits on STM32G0, 16bit on older versions
   USB->CNTR &= ~USB_CNTR_PDWN;
-#else
-  reg16_clear_bits(&USB->CNTR, USB_CNTR_PDWN);// Remove powerdown
-#endif
 
   // Wait startup time, for F042 and F070, this is <= 1 us.
   for(uint32_t i = 0; i<200; i++) // should be a few us
@@ -492,7 +477,6 @@ static void dcd_handle_bus_reset(void)
   //__IO uint16_t * const epreg = &(EPREG(0));
   USB->DADDR = 0u; // disable USB peripheral by clearing the EF flag
 
-
   for(uint32_t i=0; i<STFSDEV_EP_COUNT; i++)
   {
     // Clear all EPREG (or maybe this is automatic? I'm not sure)
@@ -683,13 +667,13 @@ void dcd_int_handler(uint8_t rhport) {
 
   /* Put SOF flag at the beginning of ISR in case to get least amount of jitter if it is used for timing purposes */
   if(int_status & USB_ISTR_SOF) {
-    clear_istr_bits(USB_ISTR_SOF);
+    USB->ISTR &=~USB_ISTR_SOF;
     dcd_event_sof(0, USB->FNR & USB_FNR_FN, true);
   }
 
   if(int_status & USB_ISTR_RESET) {
     // USBRST is start of reset.
-    clear_istr_bits(USB_ISTR_RESET);
+    USB->ISTR &=~USB_ISTR_RESET;
     dcd_handle_bus_reset();
     dcd_event_bus_reset(0, TUSB_SPEED_FULL, true);
     return; // Don't do the rest of the things here; perhaps they've been cleared?
@@ -704,14 +688,10 @@ void dcd_int_handler(uint8_t rhport) {
 
   if (int_status & USB_ISTR_WKUP)
   {
-#ifdef PMA_32BIT_ACCESS // CNTR register is 32bits on STM32G0, 16bit on older versions
     USB->CNTR &= ~USB_CNTR_LPMODE;
     USB->CNTR &= ~USB_CNTR_FSUSP;
-#else
-    reg16_clear_bits(&USB->CNTR, USB_CNTR_LPMODE);
-    reg16_clear_bits(&USB->CNTR, USB_CNTR_FSUSP);
-#endif
-    clear_istr_bits(USB_ISTR_WKUP);
+
+    USB->ISTR &=~USB_ISTR_WKUP;
     dcd_event_bus_signal(0, DCD_EVENT_RESUME, true);
   }
 
@@ -725,7 +705,7 @@ void dcd_int_handler(uint8_t rhport) {
     USB->CNTR |= USB_CNTR_LPMODE;
 
     /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
-    clear_istr_bits(USB_ISTR_SUSP);
+    USB->ISTR &=~USB_ISTR_SUSP;
     dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true);
   }
 
@@ -738,7 +718,7 @@ void dcd_int_handler(uint8_t rhport) {
     {
       remoteWakeCountdown--;
     }
-    clear_istr_bits(USB_ISTR_ESOF);
+    USB->ISTR &=~USB_ISTR_ESOF;
   }
 }
 
@@ -759,13 +739,8 @@ void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * re
     uint8_t const dev_addr = (uint8_t) request->wValue;
 
     // Setting new address after the whole request is complete
-#ifdef PMA_32BIT_ACCESS
     USB->DADDR &= ~USB_DADDR_ADD;
-    USB->DADDR = (USB->DADDR & ~USB_DADDR_ADD_Msk) | dev_addr; // leave the enable bit set
-#else
-    reg16_clear_bits(&USB->DADDR, USB_DADDR_ADD);
-    USB->DADDR = (uint16_t)(USB->DADDR | dev_addr); // leave the enable bit set
-#endif
+    USB->DADDR |= dev_addr; // leave the enable bit set
   }
 }
 

From 9002dc706711741b6db2c53de4e5b94b02322f37 Mon Sep 17 00:00:00 2001
From: Reimu NotMoe <reimu@sudomaker.com>
Date: Tue, 18 Apr 2023 17:27:42 +0800
Subject: [PATCH 257/691] Use __GNUC__ macro to determine if __has_attribute is
 supported

---
 src/common/tusb_compiler.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index dce32e92b..5ab56e145 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -138,7 +138,7 @@
   #define TU_ATTR_BIT_FIELD_ORDER_BEGIN
   #define TU_ATTR_BIT_FIELD_ORDER_END
 
-  #if defined(__XC16)
+  #if __GNUC__ < 5
     #define TU_ATTR_FALLTHROUGH         do {} while (0)  /* fallthrough */
   #else
     #if __has_attribute(__fallthrough__)

From fab48e5bcc0708077a0efb6f2412b92a6529bc3e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 20 Apr 2023 14:09:38 +0700
Subject: [PATCH 258/691] adding cmake build for imxrt1010

---
 .idea/cmake.xml                               |  1 +
 .idea/runConfigurations/msc_dual_lun.xml      |  2 +-
 cmake/cpu/cortex-m7.cmake                     |  6 ++
 cmake/toolchain/arm_gcc.cmake                 | 19 +++++
 cmake/toolchain/set_flags.cmake               | 22 ++++++
 examples/device/board_test/CMakeLists.txt     | 47 +++++++++++--
 examples/device/cdc_msc/CMakeLists.txt        |  2 +-
 .../imxrt/boards/mimxrt1010_evk/board.cmake   | 10 +++
 hw/bsp/imxrt/family.cmake                     | 69 +++++++++++++++++++
 9 files changed, 172 insertions(+), 6 deletions(-)
 create mode 100644 cmake/cpu/cortex-m7.cmake
 create mode 100644 cmake/toolchain/arm_gcc.cmake
 create mode 100644 cmake/toolchain/set_flags.cmake
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
 create mode 100644 hw/bsp/imxrt/family.cmake

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 291da5371..4d9fc9aa5 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -23,6 +23,7 @@
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
       <configuration PROFILE_NAME="rp2040" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=rp2040 -DBOARD=raspberry_pi_pico" />
+      <configuration PROFILE_NAME="rt1010 evk" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1010_evk" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/.idea/runConfigurations/msc_dual_lun.xml b/.idea/runConfigurations/msc_dual_lun.xml
index 6e0d74f5b..5c1ea270b 100644
--- a/.idea/runConfigurations/msc_dual_lun.xml
+++ b/.idea/runConfigurations/msc_dual_lun.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="msc_dual_lun" type="com.jetbrains.cidr.embedded.openocd.conf.type" factoryName="com.jetbrains.cidr.embedded.openocd.conf.factory" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="msc_dual_lun" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="msc_dual_lun">
+  <configuration default="false" name="msc_dual_lun" type="com.jetbrains.cidr.embedded.openocd.conf.type" factoryName="com.jetbrains.cidr.embedded.openocd.conf.factory" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="msc_dual_lun" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="msc_dual_lun">
     <openocd version="1" gdb-port="3333" telnet-port="4444" board-config="$PROJECT_DIR$/hw/bsp/rp2040/rp2040-openocd.cfg" reset-type="INIT" download-type="UPDATED_ONLY">
       <debugger kind="GDB" isBundled="true" />
     </openocd>
diff --git a/cmake/cpu/cortex-m7.cmake b/cmake/cpu/cortex-m7.cmake
new file mode 100644
index 000000000..2b258726f
--- /dev/null
+++ b/cmake/cpu/cortex-m7.cmake
@@ -0,0 +1,6 @@
+set(TOOLCHAIN_COMMON_FLAGS
+  -mthumb
+  -mcpu=cortex-m7
+  -mfloat-abi=hard
+  -mfpu=fpv5-d16
+  )
diff --git a/cmake/toolchain/arm_gcc.cmake b/cmake/toolchain/arm_gcc.cmake
new file mode 100644
index 000000000..44683118e
--- /dev/null
+++ b/cmake/toolchain/arm_gcc.cmake
@@ -0,0 +1,19 @@
+set(CMAKE_SYSTEM_NAME Generic)
+
+set(CMAKE_ASM_COMPILER "arm-none-eabi-gcc")
+set(CMAKE_C_COMPILER "arm-none-eabi-gcc")
+set(CMAKE_CXX_COMPILER "arm-none-eabi-g++")
+set(GCC_ELF2BIN "arm-none-eabi-objcopy")
+set_property(GLOBAL PROPERTY ELF2BIN ${GCC_ELF2BIN})
+
+# Look for includes and libraries only in the target system prefix.
+set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
+set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
+set(CMAKE_FIND_ROOT_PATH_MODE_PACKAGE ONLY)
+set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
+
+# pass TOOLCHAIN_CPU to
+set(CMAKE_TRY_COMPILE_PLATFORM_VARIABLES CMAKE_SYSTEM_PROCESSOR)
+
+include(${CMAKE_CURRENT_LIST_DIR}/../cpu/${CMAKE_SYSTEM_PROCESSOR}.cmake)
+include(${CMAKE_CURRENT_LIST_DIR}/set_flags.cmake)
diff --git a/cmake/toolchain/set_flags.cmake b/cmake/toolchain/set_flags.cmake
new file mode 100644
index 000000000..e6c7b6feb
--- /dev/null
+++ b/cmake/toolchain/set_flags.cmake
@@ -0,0 +1,22 @@
+get_property(IS_IN_TRY_COMPILE GLOBAL PROPERTY IN_TRY_COMPILE)
+
+# join the toolchain flags into a single string
+list(JOIN TOOLCHAIN_COMMON_FLAGS " " TOOLCHAIN_COMMON_FLAGS)
+
+foreach(LANG IN ITEMS C CXX ASM)
+    set(CMAKE_${LANG}_FLAGS_INIT "${TOOLCHAIN_COMMON_FLAGS}")
+    if (PICO_DEOPTIMIZED_DEBUG)
+        set(CMAKE_${LANG}_FLAGS_DEBUG_INIT "-O0")
+    else()
+        set(CMAKE_${LANG}_FLAGS_DEBUG_INIT "-Og")
+    endif()
+    set(CMAKE_${LANG}_LINK_FLAGS "-Wl,--build-id=none")
+
+    # try_compile is where the feature testing is done, and at that point,
+    # pico_standard_link is not ready to be linked in to provide essential
+    # functions like _exit. So pass -nostdlib so it doesn't link in an exit()
+    # function at all.
+    if(IS_IN_TRY_COMPILE)
+        set(CMAKE_${LANG}_LINK_FLAGS "${CMAKE_${LANG}_LINK_FLAGS} -nostdlib")
+    endif()
+endforeach()
diff --git a/examples/device/board_test/CMakeLists.txt b/examples/device/board_test/CMakeLists.txt
index 4435bd523..ac47bf0b4 100644
--- a/examples/device/board_test/CMakeLists.txt
+++ b/examples/device/board_test/CMakeLists.txt
@@ -1,4 +1,10 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.13)
+include(CMakePrintHelpers)
+
+# default toolchain is gcc
+if (NOT TOOLCHAIN)
+  set(TOOLCHAIN "gcc")
+endif ()
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
@@ -24,7 +30,40 @@ if(NOT FAMILY STREQUAL "espressif")
           ${CMAKE_CURRENT_SOURCE_DIR}/src
           )
 
-  # Configure compilation flags and libraries for the example... see the corresponding function
-  # in hw/bsp/FAMILY/family.cmake for details.
-  family_configure_device_example(${PROJECT})
+  if(FAMILY STREQUAL "rp2040")
+    # Configure compilation flags and libraries for the example... see the corresponding function
+    # in hw/bsp/FAMILY/family.cmake for details.
+    family_configure_device_example(${PROJECT})
+  else ()
+    # TOP is absolute path to root directory of TinyUSB git repo
+    set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
+    get_filename_component(TOP "${TOP}" REALPATH)
+
+    # re-include family.cmake
+    include(${TOP}/hw/bsp/${FAMILY}/family.cmake)
+
+    target_sources(${PROJECT} PUBLIC
+      ${TOP}/src/device/usbd.c
+      ${TOP}/src/device/usbd_control.c
+      ${TOP}/src/class/audio/audio_device.c
+      ${TOP}/src/class/cdc/cdc_device.c
+      ${TOP}/src/class/dfu/dfu_device.c
+      ${TOP}/src/class/dfu/dfu_rt_device.c
+      ${TOP}/src/class/hid/hid_device.c
+      ${TOP}/src/class/midi/midi_device.c
+      ${TOP}/src/class/msc/msc_device.c
+      ${TOP}/src/class/net/ecm_rndis_device.c
+      ${TOP}/src/class/net/ncm_device.c
+      ${TOP}/src/class/usbtmc/usbtmc_device.c
+      ${TOP}/src/class/vendor/vendor_device.c
+      ${TOP}/src/class/video/video_device.c
+      )
+
+    target_include_directories(${PROJECT} PUBLIC
+      ${TOP}/hw
+      ${TOP}/src
+      )
+
+
+  endif ()
 endif()
diff --git a/examples/device/cdc_msc/CMakeLists.txt b/examples/device/cdc_msc/CMakeLists.txt
index 8e4db9d29..caac260d1 100644
--- a/examples/device/cdc_msc/CMakeLists.txt
+++ b/examples/device/cdc_msc/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.13)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
new file mode 100644
index 000000000..52d1846ea
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
@@ -0,0 +1,10 @@
+set(MCU_VARIANT MIMXRT1011)
+
+target_sources(${PROJECT} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/evkmimxrt1010_flexspi_nor_config.c
+  )
+
+target_compile_definitions(${PROJECT} PUBLIC
+  CPU_MIMXRT1011DAE5A
+  CFG_EXAMPLE_VIDEO_READONLY
+  )
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
new file mode 100644
index 000000000..1e095ebfb
--- /dev/null
+++ b/hw/bsp/imxrt/family.cmake
@@ -0,0 +1,69 @@
+# toolchain set up, include before project()
+if (NOT TARGET ${PROJECT})
+  set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
+  set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_LIST_DIR}/../../../cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+else ()
+  if (NOT BOARD)
+    message(FATAL_ERROR "BOARD not specified")
+  endif ()
+
+  set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
+  set(DEPS_SUBMODULES ${SDK_DIR})
+
+  # include basic family CMake functionality
+  #set(FAMILY_MCUS RP2040)
+
+  include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+  target_compile_definitions(${PROJECT} PUBLIC
+    CFG_TUSB_MCU=OPT_MCU_MIMXRT
+    __ARMVFP__=0
+    __ARMFPV5__=0
+    XIP_EXTERNAL_FLASH=1
+    XIP_BOOT_HEADER_ENABLE=1
+    )
+
+  target_link_options(${PROJECT} PUBLIC
+    --specs=nosys.specs
+    --specs=nano.specs
+    #-lgcc -lm -lnosys
+    )
+
+#  target_link_libraries(${PROJECT} PUBLIC
+#    -lgcc -lm -lnosys
+#    )
+
+  target_sources(${PROJECT} PUBLIC
+    # TinyUSB
+    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+    ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+    ${TOP}/src/portable/ehci/ehci.c
+    # BSP
+    ${CMAKE_CURRENT_LIST_DIR}/family.c
+    ${SDK_DIR}/drivers/common/fsl_common.c
+    ${SDK_DIR}/drivers/igpio/fsl_gpio.c
+    ${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/xip/fsl_flexspi_nor_boot.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/project_template/clock_config.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
+    )
+
+  if (TOOLCHAIN STREQUAL "gcc")
+    target_sources(${PROJECT} PUBLIC
+      ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S
+      )
+  endif ()
+
+  target_include_directories(${PROJECT} PUBLIC
+    ${CMAKE_CURRENT_LIST_DIR}
+    ${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}
+    ${SDK_DIR}/CMSIS/Include
+    ${SDK_DIR}/devices/${MCU_VARIANT}
+    ${SDK_DIR}/devices/${MCU_VARIANT}/project_template
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+    ${SDK_DIR}/drivers/common
+    ${SDK_DIR}/drivers/igpio
+    ${SDK_DIR}/drivers/lpuart
+    )
+endif ()

From b42d3e431c15ac082b17a1725d639c4ee4980264 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 20 Apr 2023 16:42:13 +0700
Subject: [PATCH 259/691] board test running with cmake

---
 .idea/runConfigurations/rt1010.xml        | 10 ++++++++++
 examples/device/board_test/CMakeLists.txt |  2 +-
 hw/bsp/imxrt/family.cmake                 |  9 ++++-----
 3 files changed, 15 insertions(+), 6 deletions(-)
 create mode 100644 .idea/runConfigurations/rt1010.xml

diff --git a/.idea/runConfigurations/rt1010.xml b/.idea/runConfigurations/rt1010.xml
new file mode 100644
index 000000000..50659c95c
--- /dev/null
+++ b/.idea/runConfigurations/rt1010.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="rt1010" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" folderName="imxrt" PROGRAM_PARAMS="gdbserver -p 55503 -t mimxrt1010" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="board_test" TARGET_NAME="board_test" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="board_test" RUN_TARGET_NAME="board_test">
+    <custom-gdb-server version="1" gdb-connect="tcp::55503" executable="$USER_HOME$/.local/bin/pyocd" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/examples/device/board_test/CMakeLists.txt b/examples/device/board_test/CMakeLists.txt
index ac47bf0b4..847246453 100644
--- a/examples/device/board_test/CMakeLists.txt
+++ b/examples/device/board_test/CMakeLists.txt
@@ -11,7 +11,7 @@ include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 1e095ebfb..399e2be92 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -26,13 +26,8 @@ else ()
   target_link_options(${PROJECT} PUBLIC
     --specs=nosys.specs
     --specs=nano.specs
-    #-lgcc -lm -lnosys
     )
 
-#  target_link_libraries(${PROJECT} PUBLIC
-#    -lgcc -lm -lnosys
-#    )
-
   target_sources(${PROJECT} PUBLIC
     # TinyUSB
     ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
@@ -53,6 +48,10 @@ else ()
     target_sources(${PROJECT} PUBLIC
       ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S
       )
+
+    target_link_options(${PROJECT} PUBLIC
+      "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld"
+      )
   endif ()
 
   target_include_directories(${PROJECT} PUBLIC

From 2ac289685aa5a93ac56d0e5705d8067a1f751bc6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 20 Apr 2023 16:55:48 +0700
Subject: [PATCH 260/691] clean up

---
 examples/device/board_test/CMakeLists.txt | 106 ++++++++++------------
 examples/device/cdc_msc/CMakeLists.txt    |   7 +-
 hw/bsp/family_support.cmake               |   7 ++
 hw/bsp/imxrt/family.cmake                 |   4 +-
 4 files changed, 66 insertions(+), 58 deletions(-)

diff --git a/examples/device/board_test/CMakeLists.txt b/examples/device/board_test/CMakeLists.txt
index 847246453..835d15488 100644
--- a/examples/device/board_test/CMakeLists.txt
+++ b/examples/device/board_test/CMakeLists.txt
@@ -1,10 +1,4 @@
 cmake_minimum_required(VERSION 3.13)
-include(CMakePrintHelpers)
-
-# default toolchain is gcc
-if (NOT TOOLCHAIN)
-  set(TOOLCHAIN "gcc")
-endif ()
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
@@ -16,54 +10,54 @@ project(${PROJECT} C CXX ASM)
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
-# Other family such as rp2040
-if(NOT FAMILY STREQUAL "espressif")
-  add_executable(${PROJECT})
-
-  # Example source
-  target_sources(${PROJECT} PUBLIC
-          ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
-          )
-
-  # Example include
-  target_include_directories(${PROJECT} PUBLIC
-          ${CMAKE_CURRENT_SOURCE_DIR}/src
-          )
-
-  if(FAMILY STREQUAL "rp2040")
-    # Configure compilation flags and libraries for the example... see the corresponding function
-    # in hw/bsp/FAMILY/family.cmake for details.
-    family_configure_device_example(${PROJECT})
-  else ()
-    # TOP is absolute path to root directory of TinyUSB git repo
-    set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
-    get_filename_component(TOP "${TOP}" REALPATH)
-
-    # re-include family.cmake
-    include(${TOP}/hw/bsp/${FAMILY}/family.cmake)
-
-    target_sources(${PROJECT} PUBLIC
-      ${TOP}/src/device/usbd.c
-      ${TOP}/src/device/usbd_control.c
-      ${TOP}/src/class/audio/audio_device.c
-      ${TOP}/src/class/cdc/cdc_device.c
-      ${TOP}/src/class/dfu/dfu_device.c
-      ${TOP}/src/class/dfu/dfu_rt_device.c
-      ${TOP}/src/class/hid/hid_device.c
-      ${TOP}/src/class/midi/midi_device.c
-      ${TOP}/src/class/msc/msc_device.c
-      ${TOP}/src/class/net/ecm_rndis_device.c
-      ${TOP}/src/class/net/ncm_device.c
-      ${TOP}/src/class/usbtmc/usbtmc_device.c
-      ${TOP}/src/class/vendor/vendor_device.c
-      ${TOP}/src/class/video/video_device.c
-      )
-
-    target_include_directories(${PROJECT} PUBLIC
-      ${TOP}/hw
-      ${TOP}/src
-      )
-
-
-  endif ()
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
 endif()
+
+add_executable(${PROJECT})
+
+# Example source
+target_sources(${PROJECT} PUBLIC
+        ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
+        )
+
+# Example include
+target_include_directories(${PROJECT} PUBLIC
+        ${CMAKE_CURRENT_SOURCE_DIR}/src
+        )
+
+if(FAMILY STREQUAL "rp2040")
+  # Configure compilation flags and libraries for the example... see the corresponding function
+  # in hw/bsp/FAMILY/family.cmake for details.
+  family_configure_device_example(${PROJECT})
+else ()
+  # TOP is absolute path to root directory of TinyUSB git repo
+  set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
+  get_filename_component(TOP "${TOP}" REALPATH)
+
+  # re-include family.cmake
+  include(${TOP}/hw/bsp/${FAMILY}/family.cmake)
+
+  target_sources(${PROJECT} PUBLIC
+    ${TOP}/src/device/usbd.c
+    ${TOP}/src/device/usbd_control.c
+    ${TOP}/src/class/audio/audio_device.c
+    ${TOP}/src/class/cdc/cdc_device.c
+    ${TOP}/src/class/dfu/dfu_device.c
+    ${TOP}/src/class/dfu/dfu_rt_device.c
+    ${TOP}/src/class/hid/hid_device.c
+    ${TOP}/src/class/midi/midi_device.c
+    ${TOP}/src/class/msc/msc_device.c
+    ${TOP}/src/class/net/ecm_rndis_device.c
+    ${TOP}/src/class/net/ncm_device.c
+    ${TOP}/src/class/usbtmc/usbtmc_device.c
+    ${TOP}/src/class/vendor/vendor_device.c
+    ${TOP}/src/class/video/video_device.c
+    )
+
+  target_include_directories(${PROJECT} PUBLIC
+    ${TOP}/hw
+    ${TOP}/src
+    )
+endif ()
diff --git a/examples/device/cdc_msc/CMakeLists.txt b/examples/device/cdc_msc/CMakeLists.txt
index caac260d1..43b81ce23 100644
--- a/examples/device/cdc_msc/CMakeLists.txt
+++ b/examples/device/cdc_msc/CMakeLists.txt
@@ -5,11 +5,16 @@ include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
 add_executable(${PROJECT})
 
 # Example source
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 08bb20bc3..cc95dde9e 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -1,4 +1,11 @@
 if (NOT TARGET _family_support_marker)
+    include(CMakePrintHelpers)
+
+    # Default to gcc
+    if(NOT DEFINED TOOLCHAIN)
+        set(TOOLCHAIN gcc)
+    endif()
+
     add_library(_family_support_marker INTERFACE)
 
     if (NOT FAMILY)
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 399e2be92..7da81dfb6 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -1,5 +1,7 @@
-# toolchain set up, include before project()
+
+
 if (NOT TARGET ${PROJECT})
+  # toolchain set up, include before project()
   set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
   set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_LIST_DIR}/../../../cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 else ()

From 9bf97e3e52c09e2f7279ee37a86ec0b38275c494 Mon Sep 17 00:00:00 2001
From: Jacek Fedorynski <jfedor@jfedor.org>
Date: Thu, 13 Apr 2023 20:04:04 +0200
Subject: [PATCH 261/691] [rp2040] Make writes to SIE_CTRL aware of concurrent
 access

This commit makes it so that when setting the START_TRANS bit in the
SIE_CTRL register, along with some other bits, we first set all the
other bits, then wait some cycles, and then set the START_TRANS bit.

Doing so protects against a situation where the USB controller is
reading the register at the same time and gets an incorrect value.

This mirrors the procedure already applied to buffer control
registers.
---
 src/portable/raspberrypi/rp2040/hcd_rp2040.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c
index 661255cf6..02f9968a7 100644
--- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c
@@ -562,6 +562,11 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
     uint32_t flags = USB_SIE_CTRL_START_TRANS_BITS | SIE_CTRL_BASE |
                      (ep_dir ? USB_SIE_CTRL_RECEIVE_DATA_BITS : USB_SIE_CTRL_SEND_DATA_BITS) |
                      (need_pre(dev_addr) ? USB_SIE_CTRL_PREAMBLE_EN_BITS : 0);
+    // START_TRANS bit on SIE_CTRL seems to exhibit the same behavior as the AVAILABLE bit
+    // described in RP2040 Datasheet, release 2.1, section "4.1.2.5.1. Concurrent access".
+    // We write everything except the START_TRANS bit first, then wait some cycles.
+    usb_hw->sie_ctrl = flags & ~USB_SIE_CTRL_START_TRANS_BITS;
+    busy_wait_at_least_cycles(12);
     usb_hw->sie_ctrl = flags;
   }else
   {
@@ -602,6 +607,11 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
   uint32_t const flags = SIE_CTRL_BASE | USB_SIE_CTRL_SEND_SETUP_BITS | USB_SIE_CTRL_START_TRANS_BITS |
                          (need_pre(dev_addr) ? USB_SIE_CTRL_PREAMBLE_EN_BITS : 0);
 
+  // START_TRANS bit on SIE_CTRL seems to exhibit the same behavior as the AVAILABLE bit
+  // described in RP2040 Datasheet, release 2.1, section "4.1.2.5.1. Concurrent access".
+  // We write everything except the START_TRANS bit first, then wait some cycles.
+  usb_hw->sie_ctrl = flags & ~USB_SIE_CTRL_START_TRANS_BITS;
+  busy_wait_at_least_cycles(12);
   usb_hw->sie_ctrl = flags;
 
   return true;

From 0afe1b36842c1542293e2133212aa0cfca9608c8 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 21 Apr 2023 18:10:28 +0700
Subject: [PATCH 262/691] example run well with cmake for imxrt

---
 examples/device/board_test/CMakeLists.txt   | 39 ++--------------
 examples/device/cdc_msc/CMakeLists.txt      |  2 +-
 examples/device/msc_dual_lun/CMakeLists.txt | 21 +++++----
 hw/bsp/imxrt/family.cmake                   | 50 +++++++++++++--------
 src/CMakeLists.txt                          | 25 +++++++++++
 5 files changed, 74 insertions(+), 63 deletions(-)
 create mode 100644 src/CMakeLists.txt

diff --git a/examples/device/board_test/CMakeLists.txt b/examples/device/board_test/CMakeLists.txt
index 835d15488..c48efdaa5 100644
--- a/examples/device/board_test/CMakeLists.txt
+++ b/examples/device/board_test/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.13)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
@@ -27,37 +27,6 @@ target_include_directories(${PROJECT} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
-if(FAMILY STREQUAL "rp2040")
-  # Configure compilation flags and libraries for the example... see the corresponding function
-  # in hw/bsp/FAMILY/family.cmake for details.
-  family_configure_device_example(${PROJECT})
-else ()
-  # TOP is absolute path to root directory of TinyUSB git repo
-  set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
-  get_filename_component(TOP "${TOP}" REALPATH)
-
-  # re-include family.cmake
-  include(${TOP}/hw/bsp/${FAMILY}/family.cmake)
-
-  target_sources(${PROJECT} PUBLIC
-    ${TOP}/src/device/usbd.c
-    ${TOP}/src/device/usbd_control.c
-    ${TOP}/src/class/audio/audio_device.c
-    ${TOP}/src/class/cdc/cdc_device.c
-    ${TOP}/src/class/dfu/dfu_device.c
-    ${TOP}/src/class/dfu/dfu_rt_device.c
-    ${TOP}/src/class/hid/hid_device.c
-    ${TOP}/src/class/midi/midi_device.c
-    ${TOP}/src/class/msc/msc_device.c
-    ${TOP}/src/class/net/ecm_rndis_device.c
-    ${TOP}/src/class/net/ncm_device.c
-    ${TOP}/src/class/usbtmc/usbtmc_device.c
-    ${TOP}/src/class/vendor/vendor_device.c
-    ${TOP}/src/class/video/video_device.c
-    )
-
-  target_include_directories(${PROJECT} PUBLIC
-    ${TOP}/hw
-    ${TOP}/src
-    )
-endif ()
+# Configure compilation flags and libraries for the example... see the corresponding function
+# in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT})
diff --git a/examples/device/cdc_msc/CMakeLists.txt b/examples/device/cdc_msc/CMakeLists.txt
index 43b81ce23..7eddc2422 100644
--- a/examples/device/cdc_msc/CMakeLists.txt
+++ b/examples/device/cdc_msc/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.13)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/msc_dual_lun/CMakeLists.txt b/examples/device/msc_dual_lun/CMakeLists.txt
index 9188ab06c..dc8d5512c 100644
--- a/examples/device/msc_dual_lun/CMakeLists.txt
+++ b/examples/device/msc_dual_lun/CMakeLists.txt
@@ -1,28 +1,33 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
 add_executable(${PROJECT})
 
 # Example source
 target_sources(${PROJECT} PUBLIC
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_disk_dual.c
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
-        )
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_disk_dual.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
+  )
 
 # Example include
 target_include_directories(${PROJECT} PUBLIC
-        ${CMAKE_CURRENT_SOURCE_DIR}/src
-        )
+  ${CMAKE_CURRENT_SOURCE_DIR}/src
+  )
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 7da81dfb6..d1d28d4eb 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -1,23 +1,27 @@
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../../cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
-
-if (NOT TARGET ${PROJECT})
-  # toolchain set up, include before project()
-  set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
-  set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_LIST_DIR}/../../../cmake/toolchain/arm_${TOOLCHAIN}.cmake)
-else ()
+function(family_configure_target TARGET)
   if (NOT BOARD)
     message(FATAL_ERROR "BOARD not specified")
   endif ()
 
+  # set output name to .elf
+  set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf)
+
+  # TOP is absolute path to root directory of TinyUSB git repo
+  set(TOP "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../..")
+  get_filename_component(TOP "${TOP}" REALPATH)
+
   set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
   set(DEPS_SUBMODULES ${SDK_DIR})
 
-  # include basic family CMake functionality
-  #set(FAMILY_MCUS RP2040)
+  include(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board.cmake)
 
-  include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+  cmake_print_variables(TOP CMAKE_CURRENT_FUNCTION_LIST_DIR)
 
-  target_compile_definitions(${PROJECT} PUBLIC
+  target_compile_definitions(${TARGET} PUBLIC
     CFG_TUSB_MCU=OPT_MCU_MIMXRT
     __ARMVFP__=0
     __ARMFPV5__=0
@@ -25,18 +29,18 @@ else ()
     XIP_BOOT_HEADER_ENABLE=1
     )
 
-  target_link_options(${PROJECT} PUBLIC
+  target_link_options(${TARGET} PUBLIC
     --specs=nosys.specs
     --specs=nano.specs
     )
 
-  target_sources(${PROJECT} PUBLIC
+  target_sources(${TARGET} PUBLIC
     # TinyUSB
     ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
     ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
     ${TOP}/src/portable/ehci/ehci.c
     # BSP
-    ${CMAKE_CURRENT_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${SDK_DIR}/drivers/common/fsl_common.c
     ${SDK_DIR}/drivers/igpio/fsl_gpio.c
     ${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
@@ -47,18 +51,19 @@ else ()
     )
 
   if (TOOLCHAIN STREQUAL "gcc")
-    target_sources(${PROJECT} PUBLIC
+    target_sources(${TARGET} PUBLIC
       ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S
       )
 
-    target_link_options(${PROJECT} PUBLIC
+    target_link_options(${TARGET} PUBLIC
       "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld"
       )
   endif ()
 
-  target_include_directories(${PROJECT} PUBLIC
-    ${CMAKE_CURRENT_LIST_DIR}
-    ${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     ${SDK_DIR}/CMSIS/Include
     ${SDK_DIR}/devices/${MCU_VARIANT}
     ${SDK_DIR}/devices/${MCU_VARIANT}/project_template
@@ -67,4 +72,11 @@ else ()
     ${SDK_DIR}/drivers/igpio
     ${SDK_DIR}/drivers/lpuart
     )
-endif ()
+
+  # include tinyusb cmake
+  include(${TOP}/src/CMakeLists.txt)
+endfunction()
+
+function(family_configure_device_example TARGET)
+  family_configure_target(${TARGET})
+endfunction()
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
new file mode 100644
index 000000000..ade4c2c85
--- /dev/null
+++ b/src/CMakeLists.txt
@@ -0,0 +1,25 @@
+# cmake_minimum_required(VERSION 3.17)
+# TODO make tinyusb as library that depends on 'tusb_config' interface that exposes the tusb_config.h file
+
+target_sources(${PROJECT} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/tusb.c
+  ${CMAKE_CURRENT_LIST_DIR}/common/tusb_fifo.c
+  ${CMAKE_CURRENT_LIST_DIR}/device/usbd.c
+  ${CMAKE_CURRENT_LIST_DIR}/device/usbd_control.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/audio/audio_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/cdc/cdc_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/dfu/dfu_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/dfu/dfu_rt_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/hid/hid_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/midi/midi_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/msc/msc_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/net/ecm_rndis_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/net/ncm_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/usbtmc/usbtmc_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/vendor/vendor_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/video/video_device.c
+  )
+
+target_include_directories(${PROJECT} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}
+  )

From 6daa135201b16c287f0b0d7ad7463877d471ceef Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 21 Apr 2023 18:23:40 +0700
Subject: [PATCH 263/691] update most examples cmake to build with imxrt

---
 examples/device/audio_4_channel_mic/CMakeLists.txt  | 13 +++++++++----
 examples/device/audio_test/CMakeLists.txt           |  9 +++++++--
 .../device/audio_test_multi_rate/CMakeLists.txt     |  9 +++++++--
 examples/device/cdc_dual_ports/CMakeLists.txt       |  9 +++++++--
 examples/device/cdc_msc_freertos/CMakeLists.txt     |  2 +-
 examples/device/dfu/CMakeLists.txt                  |  8 ++++++--
 examples/device/dfu_runtime/CMakeLists.txt          |  8 ++++++--
 .../device/dynamic_configuration/CMakeLists.txt     |  8 ++++++--
 examples/device/hid_boot_interface/CMakeLists.txt   |  8 ++++++--
 examples/device/hid_composite/CMakeLists.txt        |  8 ++++++--
 examples/device/hid_generic_inout/CMakeLists.txt    |  8 ++++++--
 .../device/hid_multiple_interface/CMakeLists.txt    |  8 ++++++--
 examples/device/midi_test/CMakeLists.txt            |  9 ++++++---
 examples/device/uac2_headset/CMakeLists.txt         |  9 +++++++--
 examples/device/usbtmc/CMakeLists.txt               |  9 +++++++--
 examples/device/video_capture/CMakeLists.txt        |  9 +++++++--
 examples/device/webusb_serial/CMakeLists.txt        |  9 +++++++--
 17 files changed, 107 insertions(+), 36 deletions(-)

diff --git a/examples/device/audio_4_channel_mic/CMakeLists.txt b/examples/device/audio_4_channel_mic/CMakeLists.txt
index f6e10e2ea..87b7d07d4 100644
--- a/examples/device/audio_4_channel_mic/CMakeLists.txt
+++ b/examples/device/audio_4_channel_mic/CMakeLists.txt
@@ -1,27 +1,32 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
 add_executable(${PROJECT})
 
 # Example source
 target_sources(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
-)
+  )
 
 # Example include
 target_include_directories(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
-)
+  )
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
diff --git a/examples/device/audio_test/CMakeLists.txt b/examples/device/audio_test/CMakeLists.txt
index f6e10e2ea..b0889285c 100644
--- a/examples/device/audio_test/CMakeLists.txt
+++ b/examples/device/audio_test/CMakeLists.txt
@@ -1,15 +1,20 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
 add_executable(${PROJECT})
 
 # Example source
diff --git a/examples/device/audio_test_multi_rate/CMakeLists.txt b/examples/device/audio_test_multi_rate/CMakeLists.txt
index f6e10e2ea..b0889285c 100644
--- a/examples/device/audio_test_multi_rate/CMakeLists.txt
+++ b/examples/device/audio_test_multi_rate/CMakeLists.txt
@@ -1,15 +1,20 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
 add_executable(${PROJECT})
 
 # Example source
diff --git a/examples/device/cdc_dual_ports/CMakeLists.txt b/examples/device/cdc_dual_ports/CMakeLists.txt
index acaa54198..d142e9c04 100644
--- a/examples/device/cdc_dual_ports/CMakeLists.txt
+++ b/examples/device/cdc_dual_ports/CMakeLists.txt
@@ -1,15 +1,20 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
 add_executable(${PROJECT})
 
 # Example source
diff --git a/examples/device/cdc_msc_freertos/CMakeLists.txt b/examples/device/cdc_msc_freertos/CMakeLists.txt
index 714e5333b..c6cce711a 100644
--- a/examples/device/cdc_msc_freertos/CMakeLists.txt
+++ b/examples/device/cdc_msc_freertos/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/dfu/CMakeLists.txt b/examples/device/dfu/CMakeLists.txt
index acaa54198..eb4c198d6 100644
--- a/examples/device/dfu/CMakeLists.txt
+++ b/examples/device/dfu/CMakeLists.txt
@@ -1,14 +1,18 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
 
 add_executable(${PROJECT})
 
diff --git a/examples/device/dfu_runtime/CMakeLists.txt b/examples/device/dfu_runtime/CMakeLists.txt
index acaa54198..eb4c198d6 100644
--- a/examples/device/dfu_runtime/CMakeLists.txt
+++ b/examples/device/dfu_runtime/CMakeLists.txt
@@ -1,14 +1,18 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
 
 add_executable(${PROJECT})
 
diff --git a/examples/device/dynamic_configuration/CMakeLists.txt b/examples/device/dynamic_configuration/CMakeLists.txt
index 8e4db9d29..046a32257 100644
--- a/examples/device/dynamic_configuration/CMakeLists.txt
+++ b/examples/device/dynamic_configuration/CMakeLists.txt
@@ -1,14 +1,18 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
 
 add_executable(${PROJECT})
 
diff --git a/examples/device/hid_boot_interface/CMakeLists.txt b/examples/device/hid_boot_interface/CMakeLists.txt
index acaa54198..eb4c198d6 100644
--- a/examples/device/hid_boot_interface/CMakeLists.txt
+++ b/examples/device/hid_boot_interface/CMakeLists.txt
@@ -1,14 +1,18 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
 
 add_executable(${PROJECT})
 
diff --git a/examples/device/hid_composite/CMakeLists.txt b/examples/device/hid_composite/CMakeLists.txt
index acaa54198..eb4c198d6 100644
--- a/examples/device/hid_composite/CMakeLists.txt
+++ b/examples/device/hid_composite/CMakeLists.txt
@@ -1,14 +1,18 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
 
 add_executable(${PROJECT})
 
diff --git a/examples/device/hid_generic_inout/CMakeLists.txt b/examples/device/hid_generic_inout/CMakeLists.txt
index acaa54198..eb4c198d6 100644
--- a/examples/device/hid_generic_inout/CMakeLists.txt
+++ b/examples/device/hid_generic_inout/CMakeLists.txt
@@ -1,14 +1,18 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
 
 add_executable(${PROJECT})
 
diff --git a/examples/device/hid_multiple_interface/CMakeLists.txt b/examples/device/hid_multiple_interface/CMakeLists.txt
index acaa54198..eb4c198d6 100644
--- a/examples/device/hid_multiple_interface/CMakeLists.txt
+++ b/examples/device/hid_multiple_interface/CMakeLists.txt
@@ -1,14 +1,18 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
 
 add_executable(${PROJECT})
 
diff --git a/examples/device/midi_test/CMakeLists.txt b/examples/device/midi_test/CMakeLists.txt
index acaa54198..5b1a5547d 100644
--- a/examples/device/midi_test/CMakeLists.txt
+++ b/examples/device/midi_test/CMakeLists.txt
@@ -1,17 +1,20 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
 
 add_executable(${PROJECT})
-
 # Example source
 target_sources(${PROJECT} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
diff --git a/examples/device/uac2_headset/CMakeLists.txt b/examples/device/uac2_headset/CMakeLists.txt
index acaa54198..d142e9c04 100644
--- a/examples/device/uac2_headset/CMakeLists.txt
+++ b/examples/device/uac2_headset/CMakeLists.txt
@@ -1,15 +1,20 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
 add_executable(${PROJECT})
 
 # Example source
diff --git a/examples/device/usbtmc/CMakeLists.txt b/examples/device/usbtmc/CMakeLists.txt
index b4678dc5e..a6b22ab36 100644
--- a/examples/device/usbtmc/CMakeLists.txt
+++ b/examples/device/usbtmc/CMakeLists.txt
@@ -1,15 +1,20 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
 add_executable(${PROJECT})
 
 # Example source
diff --git a/examples/device/video_capture/CMakeLists.txt b/examples/device/video_capture/CMakeLists.txt
index f1ef247e1..e0bd975c4 100644
--- a/examples/device/video_capture/CMakeLists.txt
+++ b/examples/device/video_capture/CMakeLists.txt
@@ -1,15 +1,20 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
 add_executable(${PROJECT})
 
 if (FORCE_READONLY)
diff --git a/examples/device/webusb_serial/CMakeLists.txt b/examples/device/webusb_serial/CMakeLists.txt
index acaa54198..d142e9c04 100644
--- a/examples/device/webusb_serial/CMakeLists.txt
+++ b/examples/device/webusb_serial/CMakeLists.txt
@@ -1,15 +1,20 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
 add_executable(${PROJECT})
 
 # Example source

From 11e1aff3891c7e88f66391b5b5ee850c26f10594 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 21 Apr 2023 20:55:44 +0700
Subject: [PATCH 264/691] update freeRTOS kernel to latest for library cmake

add per family freeRTOSConfig.h also make changes to build with
freertos_kernel cmake
- hard coded configPRIO_BITS based on family
- change configSUPPORT_STATIC_ALLOCATION to 0,
configSUPPORT_DYNAMIC_ALLOCATION to 1
- enable configRECORD_STACK_HIGH_ADDRESS for tracing
- enable INCLUDE_xTaskGetCurrentTaskHandle which is required to compile
stream_buffer (although we don't use it).
---
 .../device/cdc_msc_freertos/CMakeLists.txt    |  37 +++-
 .../cdc_msc_freertos/src/CMakeLists.txt       |   1 +
 hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h  | 166 ++++++++++++++++++
 hw/bsp/imxrt/family.cmake                     |  18 ++
 tools/get_deps.py                             |   2 +-
 5 files changed, 219 insertions(+), 5 deletions(-)
 create mode 100644 hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h

diff --git a/examples/device/cdc_msc_freertos/CMakeLists.txt b/examples/device/cdc_msc_freertos/CMakeLists.txt
index c6cce711a..89ff87e13 100644
--- a/examples/device/cdc_msc_freertos/CMakeLists.txt
+++ b/examples/device/cdc_msc_freertos/CMakeLists.txt
@@ -5,12 +5,41 @@ include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
-# Check for -DFAMILY=
-if(NOT FAMILY STREQUAL "espressif")
-  message(FATAL_ERROR "Invalid FAMILY specified: ${FAMILY}")
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
 endif()
+
+add_executable(${PROJECT})
+
+set(freertos_path ${CMAKE_CURRENT_SOURCE_DIR}/../../../lib/FreeRTOS-Kernel)
+
+# Example source
+target_sources(${PROJECT} PUBLIC
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/freertos_hook.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_disk.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
+  )
+
+# Example include
+target_include_directories(${PROJECT} PUBLIC
+  ${CMAKE_CURRENT_SOURCE_DIR}/src
+  ${freertos_path}/include
+  )
+
+# Configure compilation flags and libraries for the example... see the corresponding function
+# in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT})
+
+family_add_freertos_config(${PROJECT})
+add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/../../../lib/FreeRTOS-Kernel lib/FreeRTOS-Kernel)
+
+target_link_libraries(${PROJECT} PUBLIC
+  freertos_kernel
+  )
diff --git a/examples/device/cdc_msc_freertos/src/CMakeLists.txt b/examples/device/cdc_msc_freertos/src/CMakeLists.txt
index b77a68c8d..fee264363 100644
--- a/examples/device/cdc_msc_freertos/src/CMakeLists.txt
+++ b/examples/device/cdc_msc_freertos/src/CMakeLists.txt
@@ -1,3 +1,4 @@
+# This file is for ESP-IDF only
 idf_component_register(SRCS "main.c" "usb_descriptors.c" "msc_disk.c"
                     INCLUDE_DIRS "."
                     REQUIRES boards tinyusb_src)
diff --git a/hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..c8d94f9ed
--- /dev/null
+++ b/hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,166 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+// FIXME cause redundant-decls warnings
+extern uint32_t SystemCoreClock;
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU								        0
+#define configENABLE_FPU								        1
+#define configENABLE_TRUSTZONE					        0
+#define configMINIMAL_SECURE_STACK_SIZE					( 1024 )
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               2
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       4
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif /* __FREERTOS_CONFIG__H */
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index d1d28d4eb..40b8ab974 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -58,6 +58,8 @@ function(family_configure_target TARGET)
     target_link_options(${TARGET} PUBLIC
       "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld"
       )
+  else ()
+    # TODO support IAR
   endif ()
 
   target_include_directories(${TARGET} PUBLIC
@@ -77,6 +79,22 @@ function(family_configure_target TARGET)
   include(${TOP}/src/CMakeLists.txt)
 endfunction()
 
+function(family_add_freertos_config TARGET)
+  add_library(freertos_config INTERFACE)
+
+  # add path to FreeRTOSConfig.h
+  target_include_directories(freertos_config SYSTEM INTERFACE
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/FreeRTOSConfig
+    )
+
+  # select freertos port
+  if (TOOLCHAIN STREQUAL "gcc")
+    set(FREERTOS_PORT "GCC_ARM_CM7" CACHE INTERNAL "")
+  else ()
+    # TODO support IAR
+  endif ()
+endfunction()
+
 function(family_configure_device_example TARGET)
   family_configure_target(${TARGET})
 endfunction()
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 4b81d1468..f1723fde2 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -6,7 +6,7 @@ from multiprocessing import Pool
 # Mandatory Dependencies that is always fetched
 # path, url, commit (Alphabet sorted by path)
 deps_mandatory = {
-    'lib/FreeRTOS-Kernel'                      : ['def7d2df2b0506d3d249334974f51e427c17a41c', 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git'               ],
+    'lib/FreeRTOS-Kernel'                      : ['5f19e34f878af97810a7662a75eac59bd74d628b', 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git'               ],
     'lib/lwip'                                 : ['159e31b689577dbf69cf0683bbaffbd71fa5ee10', 'https://github.com/lwip-tcpip/lwip.git'                        ],
     'tools/uf2'                                : ['19615407727073e36d81bf239c52108ba92e7660', 'https://github.com/microsoft/uf2.git'                          ],
 }

From 9858d45815ca5dec16b267d3c795e42b5084e394 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 21 Apr 2023 22:07:58 +0700
Subject: [PATCH 265/691] build all freertos, not able to build net lwip due to
 lack of sio_open()

---
 .../device/cdc_msc_freertos/CMakeLists.txt    |  5 +--
 .../hid_composite_freertos/CMakeLists.txt     | 37 ++++++++++++++++---
 .../device/net_lwip_webserver/CMakeLists.txt  |  4 +-
 3 files changed, 36 insertions(+), 10 deletions(-)

diff --git a/examples/device/cdc_msc_freertos/CMakeLists.txt b/examples/device/cdc_msc_freertos/CMakeLists.txt
index 89ff87e13..699860223 100644
--- a/examples/device/cdc_msc_freertos/CMakeLists.txt
+++ b/examples/device/cdc_msc_freertos/CMakeLists.txt
@@ -17,8 +17,6 @@ endif()
 
 add_executable(${PROJECT})
 
-set(freertos_path ${CMAKE_CURRENT_SOURCE_DIR}/../../../lib/FreeRTOS-Kernel)
-
 # Example source
 target_sources(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/freertos_hook.c
@@ -30,15 +28,16 @@ target_sources(${PROJECT} PUBLIC
 # Example include
 target_include_directories(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
-  ${freertos_path}/include
   )
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
 family_configure_device_example(${PROJECT})
 
+if (NOT TARGET freertos_kernel)
 family_add_freertos_config(${PROJECT})
 add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/../../../lib/FreeRTOS-Kernel lib/FreeRTOS-Kernel)
+endif()
 
 target_link_libraries(${PROJECT} PUBLIC
   freertos_kernel
diff --git a/examples/device/hid_composite_freertos/CMakeLists.txt b/examples/device/hid_composite_freertos/CMakeLists.txt
index 714e5333b..9b0ffa4b6 100644
--- a/examples/device/hid_composite_freertos/CMakeLists.txt
+++ b/examples/device/hid_composite_freertos/CMakeLists.txt
@@ -1,16 +1,43 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
-# Check for -DFAMILY=
-if(NOT FAMILY STREQUAL "espressif")
-  message(FATAL_ERROR "Invalid FAMILY specified: ${FAMILY}")
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
 endif()
+
+add_executable(${PROJECT})
+
+# Example source
+target_sources(${PROJECT} PUBLIC
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/freertos_hook.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
+  )
+
+# Example include
+target_include_directories(${PROJECT} PUBLIC
+  ${CMAKE_CURRENT_SOURCE_DIR}/src
+  )
+
+# Configure compilation flags and libraries for the example... see the corresponding function
+# in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT})
+
+if (NOT TARGET freertos_kernel)
+family_add_freertos_config(${PROJECT})
+add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/../../../lib/FreeRTOS-Kernel lib/FreeRTOS-Kernel)
+endif()
+
+target_link_libraries(${PROJECT} PUBLIC
+  freertos_kernel
+  )
diff --git a/examples/device/net_lwip_webserver/CMakeLists.txt b/examples/device/net_lwip_webserver/CMakeLists.txt
index 5f1e37931..e7338c809 100644
--- a/examples/device/net_lwip_webserver/CMakeLists.txt
+++ b/examples/device/net_lwip_webserver/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 set(TOP "../../..")
 get_filename_component(TOP "${TOP}" REALPATH)
@@ -9,7 +9,7 @@ if (EXISTS ${TOP}/lib/lwip/src)
     # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
     family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-    project(${PROJECT})
+    project(${PROJECT} C CXX ASM)
 
     # Checks this example is valid for the family and initializes the project
     family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})

From 5254202b203ee58e2fdb319c85e2ae1a87518140 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 24 Apr 2023 11:54:58 +0700
Subject: [PATCH 266/691] minor update

---
 cmake/toolchain/arm_gcc.cmake   | 35 +++++++++++++++++++++++
 cmake/toolchain/set_flags.cmake | 36 +++++++++++-------------
 hw/bsp/imxrt/family.cmake       |  4 +--
 src/CMakeLists.txt              | 50 +++++++++++++++++++--------------
 4 files changed, 83 insertions(+), 42 deletions(-)

diff --git a/cmake/toolchain/arm_gcc.cmake b/cmake/toolchain/arm_gcc.cmake
index 44683118e..c5937192e 100644
--- a/cmake/toolchain/arm_gcc.cmake
+++ b/cmake/toolchain/arm_gcc.cmake
@@ -16,4 +16,39 @@ set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
 set(CMAKE_TRY_COMPILE_PLATFORM_VARIABLES CMAKE_SYSTEM_PROCESSOR)
 
 include(${CMAKE_CURRENT_LIST_DIR}/../cpu/${CMAKE_SYSTEM_PROCESSOR}.cmake)
+
+# enable all possible warnings for building examples
+list(APPEND TOOLCHAIN_COMMON_FLAGS
+  -fdata-sections
+  -ffunction-sections
+  -fsingle-precision-constant
+  -fno-strict-aliasing
+  )
+
+set(TOOLCHAIN_WARNING_FLAGS
+  -Wall
+  -Wextra
+  -Werror
+  -Wfatal-errors
+  -Wdouble-promotion
+  -Wstrict-prototypes
+  -Wstrict-overflow
+  -Werror-implicit-function-declaration
+  -Wfloat-equal
+  -Wundef
+  -Wshadow
+  -Wwrite-strings
+  -Wsign-compare
+  -Wmissing-format-attribute
+  -Wunreachable-code
+  -Wcast-align
+  -Wcast-function-type
+  -Wcast-qual
+  -Wnull-dereference
+  -Wuninitialized
+  -Wunused
+  -Wreturn-type
+  -Wredundant-decls
+  )
+
 include(${CMAKE_CURRENT_LIST_DIR}/set_flags.cmake)
diff --git a/cmake/toolchain/set_flags.cmake b/cmake/toolchain/set_flags.cmake
index e6c7b6feb..da381c254 100644
--- a/cmake/toolchain/set_flags.cmake
+++ b/cmake/toolchain/set_flags.cmake
@@ -1,22 +1,20 @@
-get_property(IS_IN_TRY_COMPILE GLOBAL PROPERTY IN_TRY_COMPILE)
-
-# join the toolchain flags into a single string
-list(JOIN TOOLCHAIN_COMMON_FLAGS " " TOOLCHAIN_COMMON_FLAGS)
-
+include(CMakePrintHelpers)
 foreach(LANG IN ITEMS C CXX ASM)
-    set(CMAKE_${LANG}_FLAGS_INIT "${TOOLCHAIN_COMMON_FLAGS}")
-    if (PICO_DEOPTIMIZED_DEBUG)
-        set(CMAKE_${LANG}_FLAGS_DEBUG_INIT "-O0")
-    else()
-        set(CMAKE_${LANG}_FLAGS_DEBUG_INIT "-Og")
-    endif()
-    set(CMAKE_${LANG}_LINK_FLAGS "-Wl,--build-id=none")
+    # join the toolchain flags into a single string
+    list(APPEND TOOLCHAIN_${LANG}_FLAGS ${TOOLCHAIN_COMMON_FLAGS})
+    list(JOIN TOOLCHAIN_${LANG}_FLAGS " " TOOLCHAIN_${LANG}_FLAGS)
+    set(CMAKE_${LANG}_FLAGS_INIT "${TOOLCHAIN_${LANG}_FLAGS}")
 
-    # try_compile is where the feature testing is done, and at that point,
-    # pico_standard_link is not ready to be linked in to provide essential
-    # functions like _exit. So pass -nostdlib so it doesn't link in an exit()
-    # function at all.
-    if(IS_IN_TRY_COMPILE)
-        set(CMAKE_${LANG}_LINK_FLAGS "${CMAKE_${LANG}_LINK_FLAGS} -nostdlib")
-    endif()
+    #cmake_print_variables(CMAKE_${LANG}_FLAGS_INIT)
+
+    # optimization flags
+    set(CMAKE_${LANG}_FLAGS_DEBUG_INIT "-Og")
 endforeach()
+
+# try_compile is cmake test compiling its own example,
+# pass -nostdlib to skip stdlib linking
+get_property(IS_IN_TRY_COMPILE GLOBAL PROPERTY IN_TRY_COMPILE)
+if(IS_IN_TRY_COMPILE)
+    set(CMAKE_C_LINK_FLAGS "${CMAKE_C_LINK_FLAGS} -nostdlib")
+    set(CMAKE_CXX_LINK_FLAGS "${CMAKE_CXX_LINK_FLAGS} -nostdlib")
+endif()
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 40b8ab974..e36adaf5a 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -19,8 +19,6 @@ function(family_configure_target TARGET)
 
   include(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board.cmake)
 
-  cmake_print_variables(TOP CMAKE_CURRENT_FUNCTION_LIST_DIR)
-
   target_compile_definitions(${TARGET} PUBLIC
     CFG_TUSB_MCU=OPT_MCU_MIMXRT
     __ARMVFP__=0
@@ -77,6 +75,8 @@ function(family_configure_target TARGET)
 
   # include tinyusb cmake
   include(${TOP}/src/CMakeLists.txt)
+  add_tinyusb(${TARGET})
+
 endfunction()
 
 function(family_add_freertos_config TARGET)
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index ade4c2c85..00755df95 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -1,25 +1,33 @@
 # cmake_minimum_required(VERSION 3.17)
 # TODO make tinyusb as library that depends on 'tusb_config' interface that exposes the tusb_config.h file
 
-target_sources(${PROJECT} PUBLIC
-  ${CMAKE_CURRENT_LIST_DIR}/tusb.c
-  ${CMAKE_CURRENT_LIST_DIR}/common/tusb_fifo.c
-  ${CMAKE_CURRENT_LIST_DIR}/device/usbd.c
-  ${CMAKE_CURRENT_LIST_DIR}/device/usbd_control.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/audio/audio_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/cdc/cdc_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/dfu/dfu_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/dfu/dfu_rt_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/hid/hid_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/midi/midi_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/msc/msc_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/net/ecm_rndis_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/net/ncm_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/usbtmc/usbtmc_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/vendor/vendor_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/video/video_device.c
-  )
+function(add_tinyusb TARGET)
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/tusb.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/common/tusb_fifo.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/device/usbd.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/device/usbd_control.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/audio/audio_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/cdc/cdc_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/dfu/dfu_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/dfu/dfu_rt_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/hid/hid_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/midi/midi_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/msc/msc_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/net/ecm_rndis_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/net/ncm_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/usbtmc/usbtmc_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/vendor/vendor_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/video/video_device.c
+    )
 
-target_include_directories(${PROJECT} PUBLIC
-  ${CMAKE_CURRENT_LIST_DIR}
-  )
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    )
+
+  # enable all possible warnings
+  target_compile_options(${TARGET} PUBLIC
+
+    )
+
+endfunction()

From a4d5d515493187437731eae830cb4b173fd11c02 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 24 Apr 2023 16:24:06 +0700
Subject: [PATCH 267/691] add wip note

---
 .idea/runConfigurations/cdc_msc.xml       | 10 ----------
 .idea/runConfigurations/hid_composite.xml | 10 ----------
 .idea/runConfigurations/msc_dual_lun.xml  | 10 ----------
 .idea/runConfigurations/rt1010.xml        | 10 ----------
 src/CMakeLists.txt                        |  4 +++-
 5 files changed, 3 insertions(+), 41 deletions(-)
 delete mode 100644 .idea/runConfigurations/cdc_msc.xml
 delete mode 100644 .idea/runConfigurations/hid_composite.xml
 delete mode 100644 .idea/runConfigurations/msc_dual_lun.xml
 delete mode 100644 .idea/runConfigurations/rt1010.xml

diff --git a/.idea/runConfigurations/cdc_msc.xml b/.idea/runConfigurations/cdc_msc.xml
deleted file mode 100644
index fbeb4ae05..000000000
--- a/.idea/runConfigurations/cdc_msc.xml
+++ /dev/null
@@ -1,10 +0,0 @@
-<component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="cdc_msc" type="com.jetbrains.cidr.embedded.openocd.conf.type" factoryName="com.jetbrains.cidr.embedded.openocd.conf.factory" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
-    <openocd version="1" gdb-port="3333" telnet-port="4444" board-config="$PROJECT_DIR$/hw/bsp/rp2040/rp2040-openocd.cfg" reset-type="INIT" download-type="UPDATED_ONLY">
-      <debugger kind="GDB" isBundled="true" />
-    </openocd>
-    <method v="2">
-      <option name="CLION.COMPOUND.BUILD" enabled="true" />
-    </method>
-  </configuration>
-</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/hid_composite.xml b/.idea/runConfigurations/hid_composite.xml
deleted file mode 100644
index b9f1d1a72..000000000
--- a/.idea/runConfigurations/hid_composite.xml
+++ /dev/null
@@ -1,10 +0,0 @@
-<component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="hid_composite" type="com.jetbrains.cidr.embedded.openocd.conf.type" factoryName="com.jetbrains.cidr.embedded.openocd.conf.factory" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="hid_composite" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="hid_composite">
-    <openocd version="1" gdb-port="3333" telnet-port="4444" board-config="$PROJECT_DIR$/hw/bsp/rp2040/rp2040-openocd.cfg" reset-type="INIT" download-type="UPDATED_ONLY">
-      <debugger kind="GDB" isBundled="true" />
-    </openocd>
-    <method v="2">
-      <option name="CLION.COMPOUND.BUILD" enabled="true" />
-    </method>
-  </configuration>
-</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/msc_dual_lun.xml b/.idea/runConfigurations/msc_dual_lun.xml
deleted file mode 100644
index 5c1ea270b..000000000
--- a/.idea/runConfigurations/msc_dual_lun.xml
+++ /dev/null
@@ -1,10 +0,0 @@
-<component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="msc_dual_lun" type="com.jetbrains.cidr.embedded.openocd.conf.type" factoryName="com.jetbrains.cidr.embedded.openocd.conf.factory" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="msc_dual_lun" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="msc_dual_lun">
-    <openocd version="1" gdb-port="3333" telnet-port="4444" board-config="$PROJECT_DIR$/hw/bsp/rp2040/rp2040-openocd.cfg" reset-type="INIT" download-type="UPDATED_ONLY">
-      <debugger kind="GDB" isBundled="true" />
-    </openocd>
-    <method v="2">
-      <option name="CLION.COMPOUND.BUILD" enabled="true" />
-    </method>
-  </configuration>
-</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/rt1010.xml b/.idea/runConfigurations/rt1010.xml
deleted file mode 100644
index 50659c95c..000000000
--- a/.idea/runConfigurations/rt1010.xml
+++ /dev/null
@@ -1,10 +0,0 @@
-<component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rt1010" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" folderName="imxrt" PROGRAM_PARAMS="gdbserver -p 55503 -t mimxrt1010" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="board_test" TARGET_NAME="board_test" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="board_test" RUN_TARGET_NAME="board_test">
-    <custom-gdb-server version="1" gdb-connect="tcp::55503" executable="$USER_HOME$/.local/bin/pyocd" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
-      <debugger kind="GDB" isBundled="true" />
-    </custom-gdb-server>
-    <method v="2">
-      <option name="CLION.COMPOUND.BUILD" enabled="true" />
-    </method>
-  </configuration>
-</component>
\ No newline at end of file
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 00755df95..a270ea8b7 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -1,5 +1,7 @@
-# cmake_minimum_required(VERSION 3.17)
 # TODO make tinyusb as library that depends on 'tusb_config' interface that exposes the tusb_config.h file
+# This file is WIP and should not used yet
+
+cmake_minimum_required(VERSION 3.17)
 
 function(add_tinyusb TARGET)
   target_sources(${TARGET} PUBLIC

From 841a62170e79944d0b03a2ca7e18c949eea70fe3 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 24 Apr 2023 16:54:26 +0700
Subject: [PATCH 268/691] bump up imxrt mcux-sdk to 2.13.1 commit
 f357a1150f6cf6c6b844f53f2d426bfb3e649850

---
 tools/get_deps.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/get_deps.py b/tools/get_deps.py
index f1723fde2..d8b044343 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -24,7 +24,7 @@ deps_optional = {
     'hw/mcu/nordic/nrfx'                       : ['281cc2e178fd9a470d844b3afdea9eb322a0b0e8', 'https://github.com/NordicSemiconductor/nrfx.git'               ],
     'hw/mcu/nuvoton'                           : ['2204191ec76283371419fbcec207da02e1bc22fa', 'https://github.com/majbthrd/nuc_driver.git'                    ],
     'hw/mcu/nxp/lpcopen'                       : ['43c45c85405a5dd114fff0ea95cca62837740c13', 'https://github.com/hathach/nxp_lpcopen.git'                    ],
-    'hw/mcu/nxp/mcux-sdk'                      : ['ae2ab01d9d70ad00cd0e935c2552bd5f0e5c0294', 'https://github.com/NXPmicro/mcux-sdk.git'                      ],
+    'hw/mcu/nxp/mcux-sdk'                      : ['f357a1150f6cf6c6b844f53f2d426bfb3e649850', 'https://github.com/NXPmicro/mcux-sdk.git'                      ],
     'hw/mcu/nxp/nxp_sdk'                       : ['845c8fc49b6fb660f06a5c45225494eacb06f00c', 'https://github.com/hathach/nxp_sdk.git'                        ],
     'hw/mcu/raspberry_pi/Pico-PIO-USB'         : ['c3715ce94b6f6391856de56081d4d9b3e98fa93d', 'https://github.com/sekigon-gonnoc/Pico-PIO-USB.git'            ],
     'hw/mcu/renesas/fsp'                       : ['8dc14709f2a6518b43f71efad70d900b7718d9f1', 'https://github.com/renesas/fsp.git'                            ],

From ad39833ea4c76f3b85317858fb52767fa07fea11 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 26 Apr 2023 22:10:13 +0700
Subject: [PATCH 269/691] fix build with nxp since mcux-sdk from 2.13.0 remove
 CMSIS folder

---
 hw/bsp/imxrt/family.mk       | 4 ++--
 hw/bsp/kinetis_k32/family.mk | 4 ++--
 hw/bsp/lpc51/family.mk       | 4 ++--
 hw/bsp/lpc54/family.mk       | 4 ++--
 hw/bsp/lpc55/family.mk       | 4 ++--
 5 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk
index 6788de8df..0c297f060 100644
--- a/hw/bsp/imxrt/family.mk
+++ b/hw/bsp/imxrt/family.mk
@@ -1,6 +1,6 @@
 UF2_FAMILY_ID = 0x4fb2d5bd
 SDK_DIR = hw/mcu/nxp/mcux-sdk
-DEPS_SUBMODULES += $(SDK_DIR)
+DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
 
 include $(TOP)/$(BOARD_PATH)/board.mk
 
@@ -48,7 +48,7 @@ SRC_C += \
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
-	$(TOP)/$(MCU_DIR)/../../CMSIS/Include \
+	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
 	$(TOP)/$(MCU_DIR) \
 	$(TOP)/$(MCU_DIR)/project_template \
 	$(TOP)/$(MCU_DIR)/drivers \
diff --git a/hw/bsp/kinetis_k32/family.mk b/hw/bsp/kinetis_k32/family.mk
index f89138b72..41f22e250 100644
--- a/hw/bsp/kinetis_k32/family.mk
+++ b/hw/bsp/kinetis_k32/family.mk
@@ -1,5 +1,5 @@
 SDK_DIR = hw/mcu/nxp/mcux-sdk
-DEPS_SUBMODULES += $(SDK_DIR)
+DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
 
 MCU_DIR = $(SDK_DIR)/devices/$(MCU)
 include $(TOP)/$(BOARD_PATH)/board.mk
@@ -19,7 +19,7 @@ SRC_C += \
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
-	$(TOP)/$(SDK_DIR)/CMSIS/Include \
+	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
 	$(TOP)/$(MCU_DIR) \
 	$(TOP)/$(MCU_DIR)/project_template \
 	$(TOP)/$(MCU_DIR)/drivers \
diff --git a/hw/bsp/lpc51/family.mk b/hw/bsp/lpc51/family.mk
index 8a64f0945..bfca2f6b1 100644
--- a/hw/bsp/lpc51/family.mk
+++ b/hw/bsp/lpc51/family.mk
@@ -1,5 +1,5 @@
 SDK_DIR = hw/mcu/nxp/mcux-sdk
-DEPS_SUBMODULES += $(SDK_DIR)
+DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
 
 MCU_DIR = $(SDK_DIR)/devices/$(MCU)
 include $(TOP)/$(BOARD_PATH)/board.mk
@@ -29,7 +29,7 @@ SRC_C += \
 	$(SDK_DIR)/drivers/flexcomm/fsl_usart.c
 
 INC += \
-	$(TOP)/$(MCU_DIR)/../../CMSIS/Include \
+	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
 	$(TOP)/$(MCU_DIR) \
 	$(TOP)/$(MCU_DIR)/drivers \
 	$(TOP)/$(SDK_DIR)/drivers/common \
diff --git a/hw/bsp/lpc54/family.mk b/hw/bsp/lpc54/family.mk
index 0ec59f9bf..f52b9b5eb 100644
--- a/hw/bsp/lpc54/family.mk
+++ b/hw/bsp/lpc54/family.mk
@@ -1,5 +1,5 @@
 SDK_DIR = hw/mcu/nxp/mcux-sdk
-DEPS_SUBMODULES += $(SDK_DIR)
+DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
 
 include $(TOP)/$(BOARD_PATH)/board.mk
 
@@ -40,7 +40,7 @@ SRC_C += \
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
-	$(TOP)/$(MCU_DIR)/../../CMSIS/Include \
+	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
 	$(TOP)/$(MCU_DIR) \
 	$(TOP)/$(MCU_DIR)/drivers \
 	$(TOP)/$(SDK_DIR)/drivers/common \
diff --git a/hw/bsp/lpc55/family.mk b/hw/bsp/lpc55/family.mk
index 789f7727d..f9dabcfa3 100644
--- a/hw/bsp/lpc55/family.mk
+++ b/hw/bsp/lpc55/family.mk
@@ -1,6 +1,6 @@
 UF2_FAMILY_ID = 0x2abc77ec
 SDK_DIR = hw/mcu/nxp/mcux-sdk
-DEPS_SUBMODULES += lib/sct_neopixel $(SDK_DIR)
+DEPS_SUBMODULES += lib/CMSIS_5 lib/sct_neopixel $(SDK_DIR)
 
 include $(TOP)/$(BOARD_PATH)/board.mk
 
@@ -51,7 +51,7 @@ SRC_C += \
 INC += \
 	$(TOP)/$(BOARD_PATH) \
 	$(TOP)/lib/sct_neopixel \
-	$(TOP)/$(MCU_DIR)/../../CMSIS/Include \
+	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
 	$(TOP)/$(MCU_DIR) \
 	$(TOP)/$(MCU_DIR)/drivers \
 	$(TOP)/$(SDK_DIR)/drivers/common \

From 1a229f3ce2623f8e0cf072e66e3770ee7f95e095 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 24 Apr 2023 21:42:31 +0700
Subject: [PATCH 270/691] fix pio vbus typo

---
 hw/bsp/rp2040/family.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index 920869585..3aa989c0e 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -125,10 +125,10 @@ void board_init(void)
   // Set the system clock to a multiple of 120mhz for bitbanging USB with pico-usb
   set_sys_clock_khz(120000, true);
 
-#ifdef PIO_USB_VBUSEN_PIN
+#ifdef PICO_DEFAULT_PIO_USB_VBUSEN_PIN
   gpio_init(PICO_DEFAULT_PIO_USB_VBUSEN_PIN);
   gpio_set_dir(PICO_DEFAULT_PIO_USB_VBUSEN_PIN, GPIO_OUT);
-  gpio_put(PICO_DEFAULT_PIO_USB_VBUSEN_PIN, PIO_USB_VBUSEN_STATE);
+  gpio_put(PICO_DEFAULT_PIO_USB_VBUSEN_PIN, PICO_DEFAULT_PIO_USB_VBUSEN_STATE);
 #endif
 
   // rp2040 use pico-pio-usb for host tuh_configure() can be used to passed pio configuration to the host stack

From 45169d833d05ec8b64d0ce11a5ff1efbea0b7917 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 26 Apr 2023 12:43:46 +0700
Subject: [PATCH 271/691] hacky, but ftdi work with hard code baudrate = 9600

---
 .codespell/ignore-words.txt      |   1 +
 src/class/cdc/cdc_host.c         | 366 ++++++++++++++++++++++++-------
 src/class/cdc/serial/ftdi_host.h | 258 ++++++++++++++++++++++
 src/host/usbh.c                  |   2 +-
 src/tusb_option.h                |   5 +
 5 files changed, 549 insertions(+), 83 deletions(-)
 create mode 100644 src/class/cdc/serial/ftdi_host.h

diff --git a/.codespell/ignore-words.txt b/.codespell/ignore-words.txt
index 5c89bae1c..2513691cb 100644
--- a/.codespell/ignore-words.txt
+++ b/.codespell/ignore-words.txt
@@ -1,6 +1,7 @@
 synopsys
 sie
 tre
+thre
 hsi
 fro
 dout
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index c0cc41adf..7949ff8d3 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -33,6 +33,10 @@
 
 #include "cdc_host.h"
 
+#if CFG_TUH_CDC_FTDI
+  #include "serial/ftdi_host.h"
+#endif
+
 
 // Debug level, TUSB_CFG_DEBUG must be at least this level for debug message
 #define CDCH_DEBUG   2
@@ -43,12 +47,18 @@
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
 
+enum {
+  SERIAL_PROTOCOL_ACM  = 0,
+  SERIAL_PROTOCOL_FTDI = 1,
+};
+
 typedef struct {
   uint8_t daddr;
   uint8_t bInterfaceNumber;
   uint8_t bInterfaceSubClass;
   uint8_t bInterfaceProtocol;
 
+  uint8_t serial_protocol;
   cdc_acm_capability_t acm_capability;
   uint8_t ep_notif;
 
@@ -111,6 +121,11 @@ static cdch_interface_t* find_new_itf(void)
   return NULL;
 }
 
+static inline bool support_line_request(cdch_interface_t const* p_cdc) {
+  return (p_cdc->serial_protocol == SERIAL_PROTOCOL_ACM && p_cdc->acm_capability.support_line_request) ||
+          (p_cdc->serial_protocol == SERIAL_PROTOCOL_FTDI);
+}
+
 //--------------------------------------------------------------------+
 // APPLICATION API
 //--------------------------------------------------------------------+
@@ -270,21 +285,32 @@ static void cdch_internal_control_complete(tuh_xfer_t* xfer)
 
   if (xfer->result == XFER_RESULT_SUCCESS)
   {
-    switch(xfer->setup->bRequest)
-    {
-      case CDC_REQUEST_SET_CONTROL_LINE_STATE:
-        p_cdc->line_state = (uint8_t) tu_le16toh(xfer->setup->wValue);
-      break;
+    if (p_cdc->serial_protocol == SERIAL_PROTOCOL_ACM) {
+      switch (xfer->setup->bRequest) {
+        case CDC_REQUEST_SET_CONTROL_LINE_STATE:
+          p_cdc->line_state = (uint8_t) tu_le16toh(xfer->setup->wValue);
+          break;
 
-      case CDC_REQUEST_SET_LINE_CODING:
-      {
-        uint16_t const len = tu_min16(sizeof(cdc_line_coding_t), tu_le16toh(xfer->setup->wLength));
-        memcpy(&p_cdc->line_coding, xfer->buffer, len);
+        case CDC_REQUEST_SET_LINE_CODING: {
+          uint16_t const len = tu_min16(sizeof(cdc_line_coding_t), tu_le16toh(xfer->setup->wLength));
+          memcpy(&p_cdc->line_coding, xfer->buffer, len);
+        }
+          break;
+
+        default: break;
       }
-      break;
-
-      default: break;
     }
+    #if CFG_TUH_CDC_FTDI
+    else if (p_cdc->serial_protocol == SERIAL_PROTOCOL_FTDI) {
+      switch (xfer->setup->bRequest) {
+        case FTDI_SIO_MODEM_CTRL:
+          p_cdc->line_state = (uint8_t) (tu_le16toh(xfer->setup->wValue) & 0x00ff);
+          break;
+
+        default: break;
+      }
+    }
+    #endif
   }
 
   xfer->complete_cb = p_cdc->user_control_cb;
@@ -294,27 +320,51 @@ static void cdch_internal_control_complete(tuh_xfer_t* xfer)
 bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
   cdch_interface_t* p_cdc = get_itf(idx);
-  TU_VERIFY(p_cdc && p_cdc->acm_capability.support_line_request);
+  TU_VERIFY(p_cdc && support_line_request(p_cdc));
 
   TU_LOG_CDCH("CDC Set Control Line State\r\n");
 
-  tusb_control_request_t const request =
-  {
-    .bmRequestType_bit =
-    {
-      .recipient = TUSB_REQ_RCPT_INTERFACE,
-      .type      = TUSB_REQ_TYPE_CLASS,
-      .direction = TUSB_DIR_OUT
-    },
-    .bRequest = CDC_REQUEST_SET_CONTROL_LINE_STATE,
-    .wValue   = tu_htole16(line_state),
-    .wIndex   = tu_htole16((uint16_t) p_cdc->bInterfaceNumber),
-    .wLength  = 0
-  };
+  tusb_control_request_t request;
+
+  if(p_cdc->serial_protocol == SERIAL_PROTOCOL_ACM ) {
+    tusb_control_request_t const acm_request = {
+      .bmRequestType_bit = {
+        .recipient = TUSB_REQ_RCPT_INTERFACE,
+        .type      = TUSB_REQ_TYPE_CLASS,
+        .direction = TUSB_DIR_OUT
+      },
+      .bRequest = CDC_REQUEST_SET_CONTROL_LINE_STATE,
+      .wValue   = tu_htole16(line_state),
+      .wIndex   = tu_htole16((uint16_t) p_cdc->bInterfaceNumber),
+      .wLength  = 0
+    };
+
+    request = acm_request;
+  }
+  #if CFG_TUH_CDC_FTDI
+  else if (p_cdc->serial_protocol == SERIAL_PROTOCOL_FTDI) {
+    // FTDI use vendor specific request to set control line state
+    tusb_control_request_t const ftdi_request = {
+      .bmRequestType_bit = {
+        .recipient = TUSB_REQ_RCPT_INTERFACE,
+        .type      = TUSB_REQ_TYPE_VENDOR,
+        .direction = TUSB_DIR_OUT
+      },
+      .bRequest = FTDI_SIO_MODEM_CTRL,
+      .wValue   = tu_htole16(0x0300 | line_state), // 0x0300 is DTR and RTS enable
+      .wIndex   = 0, // port
+      .wLength  = 0
+    };
+
+    request = ftdi_request;
+  }
+  #endif
+  else {
+    return false;
+  }
 
   p_cdc->user_control_cb = complete_cb;
-  tuh_xfer_t xfer =
-  {
+  tuh_xfer_t xfer = {
     .daddr       = p_cdc->daddr,
     .ep_addr     = 0,
     .setup       = &request,
@@ -324,34 +374,60 @@ bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_c
   };
 
   TU_ASSERT(tuh_control_xfer(&xfer));
+
   return true;
 }
 
 bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
   cdch_interface_t* p_cdc = get_itf(idx);
-  TU_VERIFY(p_cdc && p_cdc->acm_capability.support_line_request);
+  TU_VERIFY(p_cdc && support_line_request(p_cdc));
 
   TU_LOG_CDCH("CDC Set Line Conding\r\n");
 
-  tusb_control_request_t const request =
-  {
-    .bmRequestType_bit =
-    {
-      .recipient = TUSB_REQ_RCPT_INTERFACE,
-      .type      = TUSB_REQ_TYPE_CLASS,
-      .direction = TUSB_DIR_OUT
-    },
-    .bRequest = CDC_REQUEST_SET_LINE_CODING,
-    .wValue   = 0,
-    .wIndex   = tu_htole16(p_cdc->bInterfaceNumber),
-    .wLength  = tu_htole16(sizeof(cdc_line_coding_t))
-  };
+  tusb_control_request_t request;
+  uint8_t* enum_buf = NULL;
 
-  // use usbh enum buf to hold line coding since user line_coding variable may not live long enough
-  // for the transfer to complete
-  uint8_t* enum_buf = usbh_get_enum_buf();
-  memcpy(enum_buf, line_coding, sizeof(cdc_line_coding_t));
+  if (p_cdc->serial_protocol == SERIAL_PROTOCOL_ACM) {
+    tusb_control_request_t const acm_request = {
+      .bmRequestType_bit = {
+        .recipient = TUSB_REQ_RCPT_INTERFACE,
+        .type      = TUSB_REQ_TYPE_CLASS,
+        .direction = TUSB_DIR_OUT
+      },
+      .bRequest = CDC_REQUEST_SET_LINE_CODING,
+      .wValue   = 0,
+      .wIndex   = tu_htole16(p_cdc->bInterfaceNumber),
+      .wLength  = tu_htole16(sizeof(cdc_line_coding_t))
+    };
+
+    request = acm_request;
+
+    // use usbh enum buf to hold line coding since user line_coding variable does not live long enough
+    enum_buf = usbh_get_enum_buf();
+    memcpy(enum_buf, line_coding, sizeof(cdc_line_coding_t));
+  }
+  #if CFG_TUH_CDC_FTDI
+  else if (p_cdc->serial_protocol == SERIAL_PROTOCOL_FTDI) {
+    // FTDI need to set baud rate and data bits, parity, stop bits separately
+    tusb_control_request_t const ftdi_request = {
+      .bmRequestType_bit = {
+        .recipient = TUSB_REQ_RCPT_INTERFACE,
+        .type      = TUSB_REQ_TYPE_VENDOR,
+        .direction = TUSB_DIR_OUT
+      },
+      .bRequest = FTDI_SIO_SET_BAUD_RATE,
+      .wValue   = 0x4138, // FIXME hardcoded to 9600 baud
+      .wIndex   = 0, // port
+      .wLength  = tu_htole16(sizeof(cdc_line_coding_t))
+    };
+
+    request = ftdi_request;
+  }
+  #endif
+  else {
+    return false;
+  }
 
   p_cdc->user_control_cb = complete_cb;
   tuh_xfer_t xfer =
@@ -434,8 +510,17 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t
   {
     tu_edpt_stream_read_xfer_complete(&p_cdc->stream.rx, xferred_bytes);
 
+    #if CFG_TUH_CDC_FTDI
+    // FTDI reserve 2 bytes for status
+    if (p_cdc->serial_protocol == SERIAL_PROTOCOL_FTDI) {
+      uint8_t status[2];
+      tu_edpt_stream_read(&p_cdc->stream.rx, status, 2);
+      (void) status; // TODO handle status
+    }
+    #endif
+
     // invoke receive callback
-    if (tuh_cdc_rx_cb)  tuh_cdc_rx_cb(idx);
+    if (tuh_cdc_rx_cb) tuh_cdc_rx_cb(idx);
 
     // prepare for next transfer if needed
     tu_edpt_stream_read_xfer(&p_cdc->stream.rx);
@@ -453,17 +538,99 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t
 //--------------------------------------------------------------------+
 // Enumeration
 //--------------------------------------------------------------------+
-
-bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len)
+enum
 {
-  (void) rhport;
+  // ACM
+  CONFIG_SET_CONTROL_LINE_STATE,
+  CONFIG_SET_LINE_CODING,
+  CONFIG_COMPLETE,
 
-  // Only support ACM subclass
-  // Protocol 0xFF can be RNDIS device for windows XP
-  TU_VERIFY( TUSB_CLASS_CDC                           == itf_desc->bInterfaceClass &&
-             CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL == itf_desc->bInterfaceSubClass &&
-             0xFF                                     != itf_desc->bInterfaceProtocol);
+  // FTDI
+  CONFIG_FTDI_RESET
+};
 
+static bool open_ep_stream_pair(cdch_interface_t* p_cdc , tusb_desc_endpoint_t const *desc_ep)
+{
+  for(size_t i=0; i<2; i++)
+  {
+    TU_ASSERT(TUSB_DESC_ENDPOINT == desc_ep->bDescriptorType &&
+              TUSB_XFER_BULK     == desc_ep->bmAttributes.xfer);
+
+    TU_ASSERT(tuh_edpt_open(p_cdc->daddr, desc_ep));
+
+    if ( tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN )
+    {
+      tu_edpt_stream_open(&p_cdc->stream.rx, p_cdc->daddr, desc_ep);
+    }else
+    {
+      tu_edpt_stream_open(&p_cdc->stream.tx, p_cdc->daddr, desc_ep);
+    }
+
+    desc_ep = (tusb_desc_endpoint_t const*) tu_desc_next(desc_ep);
+  }
+
+  return true;
+}
+
+#if CFG_TUH_CDC_FTDI
+bool ftdih_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) {
+  // FTDI configuration includes 1 vendor interface + 2 bulk endpoints
+  TU_VERIFY(itf_desc->bInterfaceSubClass == 0xff && itf_desc->bInterfaceProtocol == 0xff && itf_desc->bNumEndpoints == 2);
+  TU_VERIFY(sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t) <= max_len);
+
+  cdch_interface_t * p_cdc = find_new_itf();
+  TU_VERIFY(p_cdc);
+
+  p_cdc->daddr              = daddr;
+  p_cdc->bInterfaceNumber   = itf_desc->bInterfaceNumber;
+  p_cdc->bInterfaceSubClass = itf_desc->bInterfaceSubClass;
+  p_cdc->bInterfaceProtocol = itf_desc->bInterfaceProtocol;
+  p_cdc->line_state         = 0;
+  p_cdc->serial_protocol    = SERIAL_PROTOCOL_FTDI;
+
+  // endpoint pair
+  tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
+
+  // data endpoints expected to be in pairs
+  TU_ASSERT(open_ep_stream_pair(p_cdc, desc_ep));
+
+  return true;
+}
+
+static bool ftdih_sio_reset(cdch_interface_t* p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+{
+  tusb_control_request_t const request = {
+    .bmRequestType_bit = {
+      .recipient = TUSB_REQ_RCPT_DEVICE,
+      .type      = TUSB_REQ_TYPE_VENDOR,
+      .direction = TUSB_DIR_OUT
+    },
+    .bRequest = FTDI_SIO_RESET,
+    .wValue   = tu_htole16(FTDI_SIO_RESET_SIO),
+    .wIndex   = 0,
+    .wLength  = 0
+  };
+
+  p_cdc->user_control_cb = complete_cb;
+
+  tuh_xfer_t xfer = {
+    .daddr       = p_cdc->daddr,
+    .ep_addr     = 0,
+    .setup       = &request,
+    .buffer      = NULL,
+    .complete_cb = complete_cb,
+    .user_data   = user_data
+  };
+
+  TU_ASSERT(tuh_control_xfer(&xfer));
+  return true;
+}
+
+#endif
+
+
+static bool acm_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len)
+{
   uint8_t const * p_desc_end = ((uint8_t const*) itf_desc) + max_len;
 
   cdch_interface_t * p_cdc = find_new_itf();
@@ -474,6 +641,7 @@ bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *itf_d
   p_cdc->bInterfaceSubClass = itf_desc->bInterfaceSubClass;
   p_cdc->bInterfaceProtocol = itf_desc->bInterfaceProtocol;
   p_cdc->line_state         = 0;
+  p_cdc->serial_protocol    = SERIAL_PROTOCOL_ACM;
 
   //------------- Control Interface -------------//
   uint8_t const * p_desc = tu_desc_next(itf_desc);
@@ -510,35 +678,45 @@ bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *itf_d
     p_desc = tu_desc_next(p_desc);
 
     // data endpoints expected to be in pairs
-    for(uint32_t i=0; i<2; i++)
-    {
-      tusb_desc_endpoint_t const *desc_ep = (tusb_desc_endpoint_t const *) p_desc;
-      TU_ASSERT(TUSB_DESC_ENDPOINT == desc_ep->bDescriptorType &&
-                TUSB_XFER_BULK     == desc_ep->bmAttributes.xfer);
-
-      TU_ASSERT(tuh_edpt_open(daddr, desc_ep));
-
-      if ( tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN )
-      {
-        tu_edpt_stream_open(&p_cdc->stream.rx, daddr, desc_ep);
-      }else
-      {
-        tu_edpt_stream_open(&p_cdc->stream.tx, daddr, desc_ep);
-      }
-
-      p_desc = tu_desc_next(p_desc);
-    }
+    TU_ASSERT(open_ep_stream_pair(p_cdc, (tusb_desc_endpoint_t const *) p_desc));
   }
 
   return true;
 }
 
-enum
+
+bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len)
 {
-  CONFIG_SET_CONTROL_LINE_STATE,
-  CONFIG_SET_LINE_CODING,
-  CONFIG_COMPLETE
-};
+  (void) rhport;
+
+  // Only support ACM subclass
+  // Note: Protocol 0xFF can be RNDIS device
+  if ( TUSB_CLASS_CDC                           == itf_desc->bInterfaceClass &&
+       CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL == itf_desc->bInterfaceSubClass)
+  {
+    return acm_open(daddr, itf_desc, max_len);
+  }
+  else if ( 0xff == itf_desc->bInterfaceClass )
+  {
+    uint16_t vid, pid;
+    TU_VERIFY(tuh_vid_pid_get(daddr, &vid, &pid));
+
+#if CFG_TUH_CDC_FTDI
+    if (TU_FTDI_VID == vid) {
+      uint16_t const ftdi_pids[] = {TU_FTDI_PID_LIST};
+      enum { FTDI_PID_COUNT = sizeof(ftdi_pids) / sizeof(ftdi_pids[0]) };
+
+      for (size_t i = 0; i < FTDI_PID_COUNT; i++) {
+        if (ftdi_pids[i] == pid) {
+          return ftdih_open(daddr, itf_desc, max_len);
+        }
+      }
+    }
+#endif
+  }
+
+  return false;
+}
 
 static void process_cdc_config(tuh_xfer_t* xfer)
 {
@@ -550,9 +728,16 @@ static void process_cdc_config(tuh_xfer_t* xfer)
 
   switch(state)
   {
+    #if CFG_TUH_CDC_FTDI
+    // Note may need to read FTDI eeprom
+    case CONFIG_FTDI_RESET:
+      TU_ASSERT(ftdih_sio_reset(p_cdc, process_cdc_config, CONFIG_SET_CONTROL_LINE_STATE), );
+      break;
+    #endif
+
     case CONFIG_SET_CONTROL_LINE_STATE:
       #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
-      if (p_cdc->acm_capability.support_line_request)
+      if (support_line_request(p_cdc))
       {
         TU_ASSERT( tuh_cdc_set_control_line_state(idx, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_cdc_config, CONFIG_SET_LINE_CODING), );
         break;
@@ -562,7 +747,7 @@ static void process_cdc_config(tuh_xfer_t* xfer)
 
     case CONFIG_SET_LINE_CODING:
       #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
-      if (p_cdc->acm_capability.support_line_request)
+      if (support_line_request(p_cdc))
       {
         cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
         TU_ASSERT( tuh_cdc_set_line_coding(idx, &line_coding, process_cdc_config, CONFIG_COMPLETE), );
@@ -588,7 +773,6 @@ static void process_cdc_config(tuh_xfer_t* xfer)
 
 bool cdch_set_config(uint8_t daddr, uint8_t itf_num)
 {
-  // fake transfer to kick-off process
   tusb_control_request_t request;
   request.wIndex = tu_htole16((uint16_t) itf_num);
 
@@ -596,7 +780,25 @@ bool cdch_set_config(uint8_t daddr, uint8_t itf_num)
   xfer.daddr     = daddr;
   xfer.result    = XFER_RESULT_SUCCESS;
   xfer.setup     = &request;
-  xfer.user_data = CONFIG_SET_CONTROL_LINE_STATE;
+
+  // fake transfer to kick-off process
+  uint8_t const idx = tuh_cdc_itf_get_index(daddr, itf_num);
+  cdch_interface_t * p_cdc = get_itf(idx);
+  TU_ASSERT(p_cdc);
+
+  switch (p_cdc->serial_protocol) {
+    case SERIAL_PROTOCOL_ACM:
+      xfer.user_data = CONFIG_SET_CONTROL_LINE_STATE;
+      break;
+
+  #if CFG_TUH_CDC_FTDI
+    case SERIAL_PROTOCOL_FTDI:
+      xfer.user_data = CONFIG_FTDI_RESET;
+      break;
+  #endif
+
+      default: return false;
+  }
 
   process_cdc_config(&xfer);
 
diff --git a/src/class/cdc/serial/ftdi_host.h b/src/class/cdc/serial/ftdi_host.h
new file mode 100644
index 000000000..4276d374e
--- /dev/null
+++ b/src/class/cdc/serial/ftdi_host.h
@@ -0,0 +1,258 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (thach@tinyusb.org) for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef TUSB_FTDI_HOST_H
+#define TUSB_FTDI_HOST_H
+
+// VID/PID for matching FTDI devices
+#define TU_FTDI_VID 0x0403
+#define TU_FTDI_PID_LIST \
+  0x6001, 0x6006, 0x6010, 0x6011, 0x6014, 0x6015, 0x8372, 0xFBFA, \
+  0xcd18
+
+// Commands
+#define FTDI_SIO_RESET             	0    /* Reset the port */
+#define FTDI_SIO_MODEM_CTRL        	1    /* Set the modem control register */
+#define FTDI_SIO_SET_FLOW_CTRL     	2    /* Set flow control register */
+#define FTDI_SIO_SET_BAUD_RATE     	3    /* Set baud rate */
+#define FTDI_SIO_SET_DATA          	4    /* Set the data characteristics of the port */
+#define FTDI_SIO_GET_MODEM_STATUS  	5    /* Retrieve current value of modem status register */
+#define FTDI_SIO_SET_EVENT_CHAR    	6    /* Set the event character */
+#define FTDI_SIO_SET_ERROR_CHAR    	7    /* Set the error character */
+#define FTDI_SIO_SET_LATENCY_TIMER 	9    /* Set the latency timer */
+#define FTDI_SIO_GET_LATENCY_TIMER 	0x0a /* Get the latency timer */
+#define FTDI_SIO_SET_BITMODE       	0x0b /* Set bitbang mode */
+#define FTDI_SIO_READ_PINS         	0x0c /* Read immediate value of pins */
+#define FTDI_SIO_READ_EEPROM       	0x90 /* Read EEPROM */
+
+/* FTDI_SIO_RESET */
+#define FTDI_SIO_RESET_SIO 0
+#define FTDI_SIO_RESET_PURGE_RX 1
+#define FTDI_SIO_RESET_PURGE_TX 2
+
+/*
+ * BmRequestType:  0100 0000B
+ * bRequest:       FTDI_SIO_RESET
+ * wValue:         Control Value
+ *                   0 = Reset SIO
+ *                   1 = Purge RX buffer
+ *                   2 = Purge TX buffer
+ * wIndex:         Port
+ * wLength:        0
+ * Data:           None
+ *
+ * The Reset SIO command has this effect:
+ *
+ *    Sets flow control set to 'none'
+ *    Event char = $0D
+ *    Event trigger = disabled
+ *    Purge RX buffer
+ *    Purge TX buffer
+ *    Clear DTR
+ *    Clear RTS
+ *    baud and data format not reset
+ *
+ * The Purge RX and TX buffer commands affect nothing except the buffers
+ *
+   */
+
+/* FTDI_SIO_MODEM_CTRL */
+/*
+ * BmRequestType:   0100 0000B
+ * bRequest:        FTDI_SIO_MODEM_CTRL
+ * wValue:          ControlValue (see below)
+ * wIndex:          Port
+ * wLength:         0
+ * Data:            None
+ *
+ * NOTE: If the device is in RTS/CTS flow control, the RTS set by this
+ * command will be IGNORED without an error being returned
+ * Also - you can not set DTR and RTS with one control message
+ */
+
+#define FTDI_SIO_SET_DTR_MASK 0x1
+#define FTDI_SIO_SET_DTR_HIGH ((FTDI_SIO_SET_DTR_MASK << 8) | 1)
+#define FTDI_SIO_SET_DTR_LOW  ((FTDI_SIO_SET_DTR_MASK << 8) | 0)
+#define FTDI_SIO_SET_RTS_MASK 0x2
+#define FTDI_SIO_SET_RTS_HIGH ((FTDI_SIO_SET_RTS_MASK << 8) | 2)
+#define FTDI_SIO_SET_RTS_LOW  ((FTDI_SIO_SET_RTS_MASK << 8) | 0)
+
+/*
+ * ControlValue
+ * B0    DTR state
+ *          0 = reset
+ *          1 = set
+ * B1    RTS state
+ *          0 = reset
+ *          1 = set
+ * B2..7 Reserved
+ * B8    DTR state enable
+ *          0 = ignore
+ *          1 = use DTR state
+ * B9    RTS state enable
+ *          0 = ignore
+ *          1 = use RTS state
+ * B10..15 Reserved
+ */
+
+/* FTDI_SIO_SET_FLOW_CTRL */
+#define FTDI_SIO_DISABLE_FLOW_CTRL 0x0
+#define FTDI_SIO_RTS_CTS_HS (0x1 << 8)
+#define FTDI_SIO_DTR_DSR_HS (0x2 << 8)
+#define FTDI_SIO_XON_XOFF_HS (0x4 << 8)
+
+/*
+ *   BmRequestType:  0100 0000b
+ *   bRequest:       FTDI_SIO_SET_FLOW_CTRL
+ *   wValue:         Xoff/Xon
+ *   wIndex:         Protocol/Port - hIndex is protocol / lIndex is port
+ *   wLength:        0
+ *   Data:           None
+ *
+ * hIndex protocol is:
+ *   B0 Output handshaking using RTS/CTS
+ *       0 = disabled
+ *       1 = enabled
+ *   B1 Output handshaking using DTR/DSR
+ *       0 = disabled
+ *       1 = enabled
+ *   B2 Xon/Xoff handshaking
+ *       0 = disabled
+ *       1 = enabled
+ *
+ * A value of zero in the hIndex field disables handshaking
+ *
+ * If Xon/Xoff handshaking is specified, the hValue field should contain the
+ * XOFF character and the lValue field contains the XON character.
+ */
+
+/* FTDI_SIO_SET_BAUD_RATE */
+/*
+ * BmRequestType:  0100 0000B
+ * bRequest:       FTDI_SIO_SET_BAUDRATE
+ * wValue:         BaudDivisor value - see below
+ * wIndex:         Port
+ * wLength:        0
+ * Data:           None
+ * The BaudDivisor values are calculated as follows (too complicated):
+ */
+
+/* FTDI_SIO_SET_DATA */
+#define FTDI_SIO_SET_DATA_PARITY_NONE	(0x0 << 8)
+#define FTDI_SIO_SET_DATA_PARITY_ODD	(0x1 << 8)
+#define FTDI_SIO_SET_DATA_PARITY_EVEN	(0x2 << 8)
+#define FTDI_SIO_SET_DATA_PARITY_MARK	(0x3 << 8)
+#define FTDI_SIO_SET_DATA_PARITY_SPACE	(0x4 << 8)
+#define FTDI_SIO_SET_DATA_STOP_BITS_1	(0x0 << 11)
+#define FTDI_SIO_SET_DATA_STOP_BITS_15	(0x1 << 11)
+#define FTDI_SIO_SET_DATA_STOP_BITS_2	(0x2 << 11)
+#define FTDI_SIO_SET_BREAK		(0x1 << 14)
+
+/*
+ * BmRequestType:  0100 0000B
+ * bRequest:       FTDI_SIO_SET_DATA
+ * wValue:         Data characteristics (see below)
+ * wIndex:         Port
+ * wLength:        0
+ * Data:           No
+ *
+ * Data characteristics
+ *
+ *   B0..7   Number of data bits
+ *   B8..10  Parity
+ *           0 = None
+ *           1 = Odd
+ *           2 = Even
+ *           3 = Mark
+ *           4 = Space
+ *   B11..13 Stop Bits
+ *           0 = 1
+ *           1 = 1.5
+ *           2 = 2
+ *   B14
+ *           1 = TX ON (break)
+ *           0 = TX OFF (normal state)
+ *   B15 Reserved
+ *
+ */
+
+/*
+* DATA FORMAT
+*
+* IN Endpoint
+*
+* The device reserves the first two bytes of data on this endpoint to contain
+* the current values of the modem and line status registers. In the absence of
+* data, the device generates a message consisting of these two status bytes
+  * every 40 ms
+  *
+  * Byte 0: Modem Status
+*
+* Offset	Description
+* B0	Reserved - must be 1
+* B1	Reserved - must be 0
+* B2	Reserved - must be 0
+* B3	Reserved - must be 0
+* B4	Clear to Send (CTS)
+* B5	Data Set Ready (DSR)
+* B6	Ring Indicator (RI)
+* B7	Receive Line Signal Detect (RLSD)
+*
+* Byte 1: Line Status
+*
+* Offset	Description
+* B0	Data Ready (DR)
+* B1	Overrun Error (OE)
+* B2	Parity Error (PE)
+* B3	Framing Error (FE)
+* B4	Break Interrupt (BI)
+* B5	Transmitter Holding Register (THRE)
+* B6	Transmitter Empty (TEMT)
+* B7	Error in RCVR FIFO
+*
+*/
+#define FTDI_RS0_CTS	(1 << 4)
+#define FTDI_RS0_DSR	(1 << 5)
+#define FTDI_RS0_RI	(1 << 6)
+#define FTDI_RS0_RLSD	(1 << 7)
+
+#define FTDI_RS_DR	1
+#define FTDI_RS_OE	(1<<1)
+#define FTDI_RS_PE	(1<<2)
+#define FTDI_RS_FE	(1<<3)
+#define FTDI_RS_BI	(1<<4)
+#define FTDI_RS_THRE	(1<<5)
+#define FTDI_RS_TEMT	(1<<6)
+#define FTDI_RS_FIFO	(1<<7)
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void ftdih_init       (void);
+bool ftdih_open       (uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len);
+bool ftdih_set_config (uint8_t daddr, uint8_t itf_num);
+bool ftdih_xfer_cb    (uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
+void ftdih_close      (uint8_t daddr);
+
+#endif //TUSB_FTDI_HOST_H
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 3be662c63..3953d5b21 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -286,7 +286,7 @@ bool tuh_vid_pid_get(uint8_t dev_addr, uint16_t* vid, uint16_t* pid)
   *vid = *pid = 0;
 
   usbh_device_t const* dev = get_device(dev_addr);
-  TU_VERIFY(dev && dev->configured);
+  TU_VERIFY(dev && dev->addressed && dev->vid != 0);
 
   *vid = dev->vid;
   *pid = dev->pid;
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 44d036ea4..a372e9950 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -439,6 +439,11 @@
 #define CFG_TUH_CDC    0
 #endif
 
+#ifndef CFG_TUH_CDC_FTDI
+  // FTDI is not part of CDC class, CDC is used for Serial-over-USB here
+  #define CFG_TUH_CDC_FTDI 0
+#endif
+
 #ifndef CFG_TUH_HID
 #define CFG_TUH_HID    0
 #endif

From cf95b4400167f6e523d8e5d1762a78744f63e2a9 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 26 Apr 2023 22:35:28 +0700
Subject: [PATCH 272/691] enable CDC FTDI

---
 examples/host/cdc_msc_hid/src/tusb_config.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h
index 1152e4910..2baf2b1ac 100644
--- a/examples/host/cdc_msc_hid/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid/src/tusb_config.h
@@ -96,7 +96,8 @@
 #define CFG_TUH_ENUMERATION_BUFSIZE 256
 
 #define CFG_TUH_HUB                 1 // number of supported hubs
-#define CFG_TUH_CDC                 1
+#define CFG_TUH_CDC                 1 // CDC ACM
+#define CFG_TUH_CDC_FTDI            1 // FTDI UART
 #define CFG_TUH_HID                 (3*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces
 #define CFG_TUH_MSC                 1
 #define CFG_TUH_VENDOR              0

From 293a6222f81ac1085f8b34730f1907f899ce17cf Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 27 Apr 2023 11:08:42 +0700
Subject: [PATCH 273/691] rename ftdi_host to ftdi_sio

---
 examples/host/cdc_msc_hid/CMakeLists.txt         |  2 +-
 src/class/cdc/cdc_host.c                         |  2 +-
 src/class/cdc/serial/{ftdi_host.h => ftdi_sio.h} | 15 +++------------
 3 files changed, 5 insertions(+), 14 deletions(-)
 rename src/class/cdc/serial/{ftdi_host.h => ftdi_sio.h} (92%)

diff --git a/examples/host/cdc_msc_hid/CMakeLists.txt b/examples/host/cdc_msc_hid/CMakeLists.txt
index d7d1a54d7..b66ff2382 100644
--- a/examples/host/cdc_msc_hid/CMakeLists.txt
+++ b/examples/host/cdc_msc_hid/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index 7949ff8d3..d33f31f1a 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -34,7 +34,7 @@
 #include "cdc_host.h"
 
 #if CFG_TUH_CDC_FTDI
-  #include "serial/ftdi_host.h"
+  #include "serial/ftdi_sio.h"
 #endif
 
 
diff --git a/src/class/cdc/serial/ftdi_host.h b/src/class/cdc/serial/ftdi_sio.h
similarity index 92%
rename from src/class/cdc/serial/ftdi_host.h
rename to src/class/cdc/serial/ftdi_sio.h
index 4276d374e..6916e4031 100644
--- a/src/class/cdc/serial/ftdi_host.h
+++ b/src/class/cdc/serial/ftdi_sio.h
@@ -22,8 +22,8 @@
  * THE SOFTWARE.
  */
 
-#ifndef TUSB_FTDI_HOST_H
-#define TUSB_FTDI_HOST_H
+#ifndef TUSB_FTDI_SIO_H
+#define TUSB_FTDI_SIO_H
 
 // VID/PID for matching FTDI devices
 #define TU_FTDI_VID 0x0403
@@ -246,13 +246,4 @@
 #define FTDI_RS_TEMT	(1<<6)
 #define FTDI_RS_FIFO	(1<<7)
 
-//--------------------------------------------------------------------+
-// Internal Class Driver API
-//--------------------------------------------------------------------+
-void ftdih_init       (void);
-bool ftdih_open       (uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len);
-bool ftdih_set_config (uint8_t daddr, uint8_t itf_num);
-bool ftdih_xfer_cb    (uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
-void ftdih_close      (uint8_t daddr);
-
-#endif //TUSB_FTDI_HOST_H
+#endif //TUSB_FTDI_SIO_H

From 85d9925d24feb41bd355a9248207acaf853b70ff Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 27 Apr 2023 15:20:04 +0700
Subject: [PATCH 274/691] refactor ftdi driver

---
 src/class/cdc/cdc_host.c | 463 +++++++++++++++++++++++++--------------
 src/tusb_option.h        |   7 +-
 2 files changed, 307 insertions(+), 163 deletions(-)

diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index d33f31f1a..fc7a7a038 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -37,6 +37,9 @@
   #include "serial/ftdi_sio.h"
 #endif
 
+#if CFG_TUH_CDC_CP210X
+  #include "serial/cp210x.h"
+#endif
 
 // Debug level, TUSB_CFG_DEBUG must be at least this level for debug message
 #define CDCH_DEBUG   2
@@ -48,8 +51,9 @@
 //--------------------------------------------------------------------+
 
 enum {
-  SERIAL_PROTOCOL_ACM  = 0,
-  SERIAL_PROTOCOL_FTDI = 1,
+  SERIAL_PROTOCOL_ACM = 0,
+  SERIAL_PROTOCOL_FTDI,
+  SERIAL_PROTOCOL_CP210X,
 };
 
 typedef struct {
@@ -111,11 +115,20 @@ static inline uint8_t get_idx_by_ep_addr(uint8_t daddr, uint8_t ep_addr)
 }
 
 
-static cdch_interface_t* find_new_itf(void)
+static cdch_interface_t* make_new_itf(uint8_t daddr, tusb_desc_interface_t const *itf_desc)
 {
   for(uint8_t i=0; i<CFG_TUH_CDC; i++)
   {
-    if (cdch_data[i].daddr == 0) return &cdch_data[i];
+    if (cdch_data[i].daddr == 0) {
+      cdch_interface_t* p_cdc = &cdch_data[i];
+
+      p_cdc->daddr              = daddr;
+      p_cdc->bInterfaceNumber   = itf_desc->bInterfaceNumber;
+      p_cdc->bInterfaceSubClass = itf_desc->bInterfaceSubClass;
+      p_cdc->bInterfaceProtocol = itf_desc->bInterfaceProtocol;
+      p_cdc->line_state         = 0;
+      return p_cdc;
+    }
   }
 
   return NULL;
@@ -126,6 +139,221 @@ static inline bool support_line_request(cdch_interface_t const* p_cdc) {
           (p_cdc->serial_protocol == SERIAL_PROTOCOL_FTDI);
 }
 
+static bool open_ep_stream_pair(cdch_interface_t* p_cdc , tusb_desc_endpoint_t const *desc_ep);
+static void set_config_complete(cdch_interface_t * p_cdc, uint8_t idx, uint8_t itf_num);
+static void cdch_internal_control_complete(tuh_xfer_t* xfer);
+
+//--------------------------------------------------------------------+
+// FTDI
+//--------------------------------------------------------------------+
+#if CFG_TUH_CDC_FTDI
+
+static uint16_t const ftdi_pids[] = { TU_FTDI_PID_LIST };
+enum {
+  FTDI_PID_COUNT = sizeof(ftdi_pids) / sizeof(ftdi_pids[0])
+};
+
+enum {
+  CONFIG_FTDI_RESET,
+  CONFIG_FTDI_MODEM_CTRL,
+  CONFIG_FTDI_SET_BAUDRATE,
+  CONFIG_FTDI_SET_DATA,
+  CONFIG_FTDI_COMPLETE
+};
+
+static bool ftdih_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) {
+  // FTDI Interface includes 1 vendor interface + 2 bulk endpoints
+  TU_VERIFY(itf_desc->bInterfaceSubClass == 0xff && itf_desc->bInterfaceProtocol == 0xff && itf_desc->bNumEndpoints == 2);
+  TU_VERIFY(sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t) <= max_len);
+
+  cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
+  TU_VERIFY(p_cdc);
+
+  p_cdc->serial_protocol = SERIAL_PROTOCOL_FTDI;
+
+  // endpoint pair
+  tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
+
+  // data endpoints expected to be in pairs
+  return open_ep_stream_pair(p_cdc, desc_ep);
+}
+
+static bool ftdih_sio_reset(cdch_interface_t* p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+{
+  tusb_control_request_t const request = {
+    .bmRequestType_bit = {
+      .recipient = TUSB_REQ_RCPT_DEVICE,
+      .type      = TUSB_REQ_TYPE_VENDOR,
+      .direction = TUSB_DIR_OUT
+    },
+    .bRequest = FTDI_SIO_RESET,
+    .wValue   = tu_htole16(FTDI_SIO_RESET_SIO),
+    .wIndex   = 0,
+    .wLength  = 0
+  };
+
+  p_cdc->user_control_cb = complete_cb;
+
+  tuh_xfer_t xfer = {
+    .daddr       = p_cdc->daddr,
+    .ep_addr     = 0,
+    .setup       = &request,
+    .buffer      = NULL,
+    .complete_cb = complete_cb,
+    .user_data   = user_data
+  };
+
+  TU_ASSERT(tuh_control_xfer(&xfer));
+  return true;
+}
+
+static bool ftdi_sio_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+{
+  tusb_control_request_t const request = {
+    .bmRequestType_bit = {
+      .recipient = TUSB_REQ_RCPT_INTERFACE,
+      .type      = TUSB_REQ_TYPE_VENDOR,
+      .direction = TUSB_DIR_OUT
+    },
+    .bRequest = FTDI_SIO_MODEM_CTRL,
+    .wValue   = tu_htole16(0x0300 | line_state), // 0x0300 is DTR and RTS enable
+    .wIndex   = 0, // port
+    .wLength  = 0
+  };
+
+  p_cdc->user_control_cb = complete_cb;
+
+  tuh_xfer_t xfer = {
+    .daddr       = p_cdc->daddr,
+    .ep_addr     = 0,
+    .setup       = &request,
+    .buffer      = NULL,
+    .complete_cb = cdch_internal_control_complete,
+    .user_data   = user_data
+  };
+
+  TU_ASSERT(tuh_control_xfer(&xfer));
+  return true;
+}
+
+static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+{
+  // TODO baudrate to baud divisor
+  (void) baudrate;
+
+  uint16_t divisor = 0x4138; // FIXME hardcoded to 9600 baud
+
+  tusb_control_request_t const request = {
+    .bmRequestType_bit = {
+      .recipient = TUSB_REQ_RCPT_INTERFACE,
+      .type      = TUSB_REQ_TYPE_VENDOR,
+      .direction = TUSB_DIR_OUT
+    },
+    .bRequest = FTDI_SIO_SET_BAUD_RATE,
+    .wValue   = tu_htole16(divisor),
+    .wIndex   = 0, // port
+    .wLength  = 0
+  };
+
+  p_cdc->user_control_cb = complete_cb;
+
+  tuh_xfer_t xfer = {
+    .daddr       = p_cdc->daddr,
+    .ep_addr     = 0,
+    .setup       = &request,
+    .buffer      = NULL,
+    .complete_cb = cdch_internal_control_complete,
+    .user_data   = user_data
+  };
+
+  TU_ASSERT(tuh_control_xfer(&xfer));
+  return true;
+}
+
+static void process_ftdi_config(tuh_xfer_t* xfer) {
+  uintptr_t const state = xfer->user_data;
+  uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
+  uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
+  cdch_interface_t * p_cdc = get_itf(idx);
+  TU_ASSERT(p_cdc, );
+
+  switch(state) {
+    // Note may need to read FTDI eeprom
+    case CONFIG_FTDI_RESET:
+      TU_ASSERT(ftdih_sio_reset(p_cdc, process_ftdi_config, CONFIG_FTDI_MODEM_CTRL),);
+      break;
+
+    case CONFIG_FTDI_MODEM_CTRL:
+      #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
+      TU_ASSERT(ftdi_sio_modem_ctrl(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_ftdi_config, CONFIG_FTDI_SET_BAUDRATE),);
+      break;
+      #else
+      TU_ATTR_FALLTHROUGH;
+      #endif
+
+    case CONFIG_FTDI_SET_BAUDRATE: {
+      #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
+      cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
+      TU_ASSERT(ftdi_sio_set_baudrate(p_cdc, line_coding.bit_rate, process_ftdi_config, CONFIG_FTDI_SET_DATA),);
+      break;
+      #else
+      TU_ATTR_FALLTHROUGH;
+      #endif
+    }
+
+    case CONFIG_FTDI_SET_DATA: {
+  #if 0 // TODO set data format
+      #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
+      cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
+      TU_ASSERT(ftdi_sio_set_data(p_cdc, process_ftdi_config, CONFIG_FTDI_COMPLETE),);
+      break;
+      #endif
+  #endif
+
+      TU_ATTR_FALLTHROUGH;
+    }
+
+    case CONFIG_FTDI_COMPLETE:
+      set_config_complete(p_cdc, idx, itf_num);
+      break;
+
+    default:
+      break;
+  }
+}
+
+#endif
+
+//--------------------------------------------------------------------+
+// CP210x
+//--------------------------------------------------------------------+
+
+#if CFG_TUH_CDC_CP210X
+
+static uint16_t const cp210x_pids[] = { TU_CP210X_PID_LIST };
+enum {
+  CP210X_PID_COUNT = sizeof(cp210x_pids) / sizeof(cp210x_pids[0])
+};
+
+static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) {
+  // CP210x Interface includes 1 vendor interface + 2 bulk endpoints
+  TU_VERIFY(itf_desc->bInterfaceSubClass == 0 && itf_desc->bInterfaceProtocol == 0 && itf_desc->bNumEndpoints == 2);
+  TU_VERIFY(sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t) <= max_len);
+
+  cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
+  TU_VERIFY(p_cdc);
+
+  p_cdc->serial_protocol = SERIAL_PROTOCOL_CP210X;
+
+  // endpoint pair
+  tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
+
+  // data endpoints expected to be in pairs
+  return open_ep_stream_pair(p_cdc, desc_ep);
+}
+
+#endif
+
 //--------------------------------------------------------------------+
 // APPLICATION API
 //--------------------------------------------------------------------+
@@ -324,10 +552,8 @@ bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_c
 
   TU_LOG_CDCH("CDC Set Control Line State\r\n");
 
-  tusb_control_request_t request;
-
   if(p_cdc->serial_protocol == SERIAL_PROTOCOL_ACM ) {
-    tusb_control_request_t const acm_request = {
+    tusb_control_request_t const request = {
       .bmRequestType_bit = {
         .recipient = TUSB_REQ_RCPT_INTERFACE,
         .type      = TUSB_REQ_TYPE_CLASS,
@@ -339,43 +565,27 @@ bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_c
       .wLength  = 0
     };
 
-    request = acm_request;
+    p_cdc->user_control_cb = complete_cb;
+    tuh_xfer_t xfer = {
+      .daddr       = p_cdc->daddr,
+      .ep_addr     = 0,
+      .setup       = &request,
+      .buffer      = NULL,
+      .complete_cb = cdch_internal_control_complete,
+      .user_data   = user_data
+    };
+
+    TU_ASSERT(tuh_control_xfer(&xfer));
+    return true;
   }
   #if CFG_TUH_CDC_FTDI
   else if (p_cdc->serial_protocol == SERIAL_PROTOCOL_FTDI) {
-    // FTDI use vendor specific request to set control line state
-    tusb_control_request_t const ftdi_request = {
-      .bmRequestType_bit = {
-        .recipient = TUSB_REQ_RCPT_INTERFACE,
-        .type      = TUSB_REQ_TYPE_VENDOR,
-        .direction = TUSB_DIR_OUT
-      },
-      .bRequest = FTDI_SIO_MODEM_CTRL,
-      .wValue   = tu_htole16(0x0300 | line_state), // 0x0300 is DTR and RTS enable
-      .wIndex   = 0, // port
-      .wLength  = 0
-    };
-
-    request = ftdi_request;
+    return ftdi_sio_modem_ctrl(p_cdc, line_state, complete_cb, user_data);
   }
   #endif
   else {
     return false;
   }
-
-  p_cdc->user_control_cb = complete_cb;
-  tuh_xfer_t xfer = {
-    .daddr       = p_cdc->daddr,
-    .ep_addr     = 0,
-    .setup       = &request,
-    .buffer      = NULL,
-    .complete_cb = cdch_internal_control_complete,
-    .user_data   = user_data
-  };
-
-  TU_ASSERT(tuh_control_xfer(&xfer));
-
-  return true;
 }
 
 bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
@@ -385,11 +595,8 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding,
 
   TU_LOG_CDCH("CDC Set Line Conding\r\n");
 
-  tusb_control_request_t request;
-  uint8_t* enum_buf = NULL;
-
   if (p_cdc->serial_protocol == SERIAL_PROTOCOL_ACM) {
-    tusb_control_request_t const acm_request = {
+    tusb_control_request_t const request = {
       .bmRequestType_bit = {
         .recipient = TUSB_REQ_RCPT_INTERFACE,
         .type      = TUSB_REQ_TYPE_CLASS,
@@ -401,47 +608,32 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding,
       .wLength  = tu_htole16(sizeof(cdc_line_coding_t))
     };
 
-    request = acm_request;
-
     // use usbh enum buf to hold line coding since user line_coding variable does not live long enough
-    enum_buf = usbh_get_enum_buf();
+    uint8_t* enum_buf = usbh_get_enum_buf();
     memcpy(enum_buf, line_coding, sizeof(cdc_line_coding_t));
+
+    p_cdc->user_control_cb = complete_cb;
+    tuh_xfer_t xfer = {
+      .daddr       = p_cdc->daddr,
+      .ep_addr     = 0,
+      .setup       = &request,
+      .buffer      = enum_buf,
+      .complete_cb = cdch_internal_control_complete,
+      .user_data   = user_data
+    };
+
+    TU_ASSERT(tuh_control_xfer(&xfer));
+    return true;
   }
   #if CFG_TUH_CDC_FTDI
   else if (p_cdc->serial_protocol == SERIAL_PROTOCOL_FTDI) {
     // FTDI need to set baud rate and data bits, parity, stop bits separately
-    tusb_control_request_t const ftdi_request = {
-      .bmRequestType_bit = {
-        .recipient = TUSB_REQ_RCPT_INTERFACE,
-        .type      = TUSB_REQ_TYPE_VENDOR,
-        .direction = TUSB_DIR_OUT
-      },
-      .bRequest = FTDI_SIO_SET_BAUD_RATE,
-      .wValue   = 0x4138, // FIXME hardcoded to 9600 baud
-      .wIndex   = 0, // port
-      .wLength  = tu_htole16(sizeof(cdc_line_coding_t))
-    };
-
-    request = ftdi_request;
+    return ftdi_sio_set_baudrate(p_cdc, line_coding->bit_rate, complete_cb, user_data);
   }
   #endif
   else {
     return false;
   }
-
-  p_cdc->user_control_cb = complete_cb;
-  tuh_xfer_t xfer =
-  {
-    .daddr       = p_cdc->daddr,
-    .ep_addr     = 0,
-    .setup       = &request,
-    .buffer      = enum_buf,
-    .complete_cb = cdch_internal_control_complete,
-    .user_data   = user_data
-  };
-
-  TU_ASSERT(tuh_control_xfer(&xfer));
-  return true;
 }
 
 //--------------------------------------------------------------------+
@@ -544,9 +736,6 @@ enum
   CONFIG_SET_CONTROL_LINE_STATE,
   CONFIG_SET_LINE_CODING,
   CONFIG_COMPLETE,
-
-  // FTDI
-  CONFIG_FTDI_RESET
 };
 
 static bool open_ep_stream_pair(cdch_interface_t* p_cdc , tusb_desc_endpoint_t const *desc_ep)
@@ -572,76 +761,14 @@ static bool open_ep_stream_pair(cdch_interface_t* p_cdc , tusb_desc_endpoint_t c
   return true;
 }
 
-#if CFG_TUH_CDC_FTDI
-bool ftdih_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) {
-  // FTDI configuration includes 1 vendor interface + 2 bulk endpoints
-  TU_VERIFY(itf_desc->bInterfaceSubClass == 0xff && itf_desc->bInterfaceProtocol == 0xff && itf_desc->bNumEndpoints == 2);
-  TU_VERIFY(sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t) <= max_len);
-
-  cdch_interface_t * p_cdc = find_new_itf();
-  TU_VERIFY(p_cdc);
-
-  p_cdc->daddr              = daddr;
-  p_cdc->bInterfaceNumber   = itf_desc->bInterfaceNumber;
-  p_cdc->bInterfaceSubClass = itf_desc->bInterfaceSubClass;
-  p_cdc->bInterfaceProtocol = itf_desc->bInterfaceProtocol;
-  p_cdc->line_state         = 0;
-  p_cdc->serial_protocol    = SERIAL_PROTOCOL_FTDI;
-
-  // endpoint pair
-  tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
-
-  // data endpoints expected to be in pairs
-  TU_ASSERT(open_ep_stream_pair(p_cdc, desc_ep));
-
-  return true;
-}
-
-static bool ftdih_sio_reset(cdch_interface_t* p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
-{
-  tusb_control_request_t const request = {
-    .bmRequestType_bit = {
-      .recipient = TUSB_REQ_RCPT_DEVICE,
-      .type      = TUSB_REQ_TYPE_VENDOR,
-      .direction = TUSB_DIR_OUT
-    },
-    .bRequest = FTDI_SIO_RESET,
-    .wValue   = tu_htole16(FTDI_SIO_RESET_SIO),
-    .wIndex   = 0,
-    .wLength  = 0
-  };
-
-  p_cdc->user_control_cb = complete_cb;
-
-  tuh_xfer_t xfer = {
-    .daddr       = p_cdc->daddr,
-    .ep_addr     = 0,
-    .setup       = &request,
-    .buffer      = NULL,
-    .complete_cb = complete_cb,
-    .user_data   = user_data
-  };
-
-  TU_ASSERT(tuh_control_xfer(&xfer));
-  return true;
-}
-
-#endif
-
-
 static bool acm_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len)
 {
   uint8_t const * p_desc_end = ((uint8_t const*) itf_desc) + max_len;
 
-  cdch_interface_t * p_cdc = find_new_itf();
+  cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
   TU_VERIFY(p_cdc);
 
-  p_cdc->daddr              = daddr;
-  p_cdc->bInterfaceNumber   = itf_desc->bInterfaceNumber;
-  p_cdc->bInterfaceSubClass = itf_desc->bInterfaceSubClass;
-  p_cdc->bInterfaceProtocol = itf_desc->bInterfaceProtocol;
-  p_cdc->line_state         = 0;
-  p_cdc->serial_protocol    = SERIAL_PROTOCOL_ACM;
+  p_cdc->serial_protocol = SERIAL_PROTOCOL_ACM;
 
   //------------- Control Interface -------------//
   uint8_t const * p_desc = tu_desc_next(itf_desc);
@@ -696,28 +823,47 @@ bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *itf_d
   {
     return acm_open(daddr, itf_desc, max_len);
   }
+  #if CFG_TUH_CDC_FTDI || CFG_TUH_CDC_CP210X
   else if ( 0xff == itf_desc->bInterfaceClass )
   {
     uint16_t vid, pid;
     TU_VERIFY(tuh_vid_pid_get(daddr, &vid, &pid));
 
-#if CFG_TUH_CDC_FTDI
+    #if CFG_TUH_CDC_FTDI
     if (TU_FTDI_VID == vid) {
-      uint16_t const ftdi_pids[] = {TU_FTDI_PID_LIST};
-      enum { FTDI_PID_COUNT = sizeof(ftdi_pids) / sizeof(ftdi_pids[0]) };
-
       for (size_t i = 0; i < FTDI_PID_COUNT; i++) {
         if (ftdi_pids[i] == pid) {
           return ftdih_open(daddr, itf_desc, max_len);
         }
       }
     }
-#endif
+    #endif
+
+    #if CFG_TUH_CDC_CP210X
+    if (TU_CP210X_VID == vid) {
+      for (size_t i = 0; i < CP210X_PID_COUNT; i++) {
+        if (cp210x_pids[i] == pid) {
+          return cp210x_open(daddr, itf_desc, max_len);
+        }
+      }
+    }
+    #endif
   }
+  #endif
 
   return false;
 }
 
+static void set_config_complete(cdch_interface_t * p_cdc, uint8_t idx, uint8_t itf_num) {
+  if (tuh_cdc_mount_cb) tuh_cdc_mount_cb(idx);
+
+  // Prepare for incoming data
+  tu_edpt_stream_read_xfer(&p_cdc->stream.rx);
+
+  // notify usbh that driver enumeration is complete
+  usbh_driver_set_config_complete(p_cdc->daddr, itf_num);
+}
+
 static void process_cdc_config(tuh_xfer_t* xfer)
 {
   uintptr_t const state = xfer->user_data;
@@ -728,16 +874,9 @@ static void process_cdc_config(tuh_xfer_t* xfer)
 
   switch(state)
   {
-    #if CFG_TUH_CDC_FTDI
-    // Note may need to read FTDI eeprom
-    case CONFIG_FTDI_RESET:
-      TU_ASSERT(ftdih_sio_reset(p_cdc, process_cdc_config, CONFIG_SET_CONTROL_LINE_STATE), );
-      break;
-    #endif
-
     case CONFIG_SET_CONTROL_LINE_STATE:
       #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
-      if (support_line_request(p_cdc))
+      if (p_cdc->acm_capability.support_line_request)
       {
         TU_ASSERT( tuh_cdc_set_control_line_state(idx, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_cdc_config, CONFIG_SET_LINE_CODING), );
         break;
@@ -747,7 +886,7 @@ static void process_cdc_config(tuh_xfer_t* xfer)
 
     case CONFIG_SET_LINE_CODING:
       #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
-      if (support_line_request(p_cdc))
+      if (p_cdc->acm_capability.support_line_request)
       {
         cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
         TU_ASSERT( tuh_cdc_set_line_coding(idx, &line_coding, process_cdc_config, CONFIG_COMPLETE), );
@@ -757,14 +896,8 @@ static void process_cdc_config(tuh_xfer_t* xfer)
       TU_ATTR_FALLTHROUGH;
 
     case CONFIG_COMPLETE:
-      if (tuh_cdc_mount_cb) tuh_cdc_mount_cb(idx);
-
-      // Prepare for incoming data
-      tu_edpt_stream_read_xfer(&p_cdc->stream.rx);
-
-      // notify usbh that driver enumeration is complete
       // itf_num+1 to account for data interface as well
-      usbh_driver_set_config_complete(xfer->daddr, itf_num+1);
+      set_config_complete(p_cdc, idx, itf_num+1);
     break;
 
     default: break;
@@ -789,19 +922,25 @@ bool cdch_set_config(uint8_t daddr, uint8_t itf_num)
   switch (p_cdc->serial_protocol) {
     case SERIAL_PROTOCOL_ACM:
       xfer.user_data = CONFIG_SET_CONTROL_LINE_STATE;
+      process_cdc_config(&xfer);
       break;
 
-  #if CFG_TUH_CDC_FTDI
+    #if CFG_TUH_CDC_FTDI
     case SERIAL_PROTOCOL_FTDI:
       xfer.user_data = CONFIG_FTDI_RESET;
+      process_ftdi_config(&xfer);
       break;
-  #endif
+    #endif
+
+    #if CFG_TUH_CDC_CP210X
+    case SERIAL_PROTOCOL_CP210X:
+      //xfer.user_data = CONFIG_SET_CONTROL_LINE_STATE;
+      break;
+    #endif
 
       default: return false;
   }
 
-  process_cdc_config(&xfer);
-
   return true;
 }
 
diff --git a/src/tusb_option.h b/src/tusb_option.h
index a372e9950..4f3f3a985 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -440,10 +440,15 @@
 #endif
 
 #ifndef CFG_TUH_CDC_FTDI
-  // FTDI is not part of CDC class, CDC is used for Serial-over-USB here
+  // FTDI is not part of CDC class, only to re-use CDC driver API
   #define CFG_TUH_CDC_FTDI 0
 #endif
 
+#ifndef CFG_TUH_CDC_CP210X
+  // CP210X is not part of CDC class, only to re-use CDC driver API
+  #define CFG_TUH_CDC_CP210X 0
+#endif
+
 #ifndef CFG_TUH_HID
 #define CFG_TUH_HID    0
 #endif

From 9698a088db7616eb628b47457f717574221c9153 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 27 Apr 2023 15:29:44 +0700
Subject: [PATCH 275/691] refactor acm function

---
 src/class/cdc/cdc_host.c | 138 +++++++++++++++++++++------------------
 1 file changed, 73 insertions(+), 65 deletions(-)

diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index fc7a7a038..00a86888c 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -545,38 +545,42 @@ static void cdch_internal_control_complete(tuh_xfer_t* xfer)
   xfer->complete_cb(xfer);
 }
 
+static bool acm_set_control_line_state(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  tusb_control_request_t const request = {
+    .bmRequestType_bit = {
+      .recipient = TUSB_REQ_RCPT_INTERFACE,
+      .type      = TUSB_REQ_TYPE_CLASS,
+      .direction = TUSB_DIR_OUT
+    },
+    .bRequest = CDC_REQUEST_SET_CONTROL_LINE_STATE,
+    .wValue   = tu_htole16(line_state),
+    .wIndex   = tu_htole16((uint16_t) p_cdc->bInterfaceNumber),
+    .wLength  = 0
+  };
+
+  p_cdc->user_control_cb = complete_cb;
+
+  tuh_xfer_t xfer = {
+    .daddr       = p_cdc->daddr,
+    .ep_addr     = 0,
+    .setup       = &request,
+    .buffer      = NULL,
+    .complete_cb = cdch_internal_control_complete,
+    .user_data   = user_data
+  };
+
+  TU_ASSERT(tuh_control_xfer(&xfer));
+  return true;
+}
+
 bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
   cdch_interface_t* p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc && support_line_request(p_cdc));
-
   TU_LOG_CDCH("CDC Set Control Line State\r\n");
 
   if(p_cdc->serial_protocol == SERIAL_PROTOCOL_ACM ) {
-    tusb_control_request_t const request = {
-      .bmRequestType_bit = {
-        .recipient = TUSB_REQ_RCPT_INTERFACE,
-        .type      = TUSB_REQ_TYPE_CLASS,
-        .direction = TUSB_DIR_OUT
-      },
-      .bRequest = CDC_REQUEST_SET_CONTROL_LINE_STATE,
-      .wValue   = tu_htole16(line_state),
-      .wIndex   = tu_htole16((uint16_t) p_cdc->bInterfaceNumber),
-      .wLength  = 0
-    };
-
-    p_cdc->user_control_cb = complete_cb;
-    tuh_xfer_t xfer = {
-      .daddr       = p_cdc->daddr,
-      .ep_addr     = 0,
-      .setup       = &request,
-      .buffer      = NULL,
-      .complete_cb = cdch_internal_control_complete,
-      .user_data   = user_data
-    };
-
-    TU_ASSERT(tuh_control_xfer(&xfer));
-    return true;
+    return acm_set_control_line_state(p_cdc, line_state, complete_cb, user_data);
   }
   #if CFG_TUH_CDC_FTDI
   else if (p_cdc->serial_protocol == SERIAL_PROTOCOL_FTDI) {
@@ -588,42 +592,45 @@ bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_c
   }
 }
 
+bool acm_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  tusb_control_request_t const request = {
+    .bmRequestType_bit = {
+      .recipient = TUSB_REQ_RCPT_INTERFACE,
+      .type      = TUSB_REQ_TYPE_CLASS,
+      .direction = TUSB_DIR_OUT
+    },
+    .bRequest = CDC_REQUEST_SET_LINE_CODING,
+    .wValue   = 0,
+    .wIndex   = tu_htole16(p_cdc->bInterfaceNumber),
+    .wLength  = tu_htole16(sizeof(cdc_line_coding_t))
+  };
+
+  // use usbh enum buf to hold line coding since user line_coding variable does not live long enough
+  uint8_t* enum_buf = usbh_get_enum_buf();
+  memcpy(enum_buf, line_coding, sizeof(cdc_line_coding_t));
+
+  p_cdc->user_control_cb = complete_cb;
+  tuh_xfer_t xfer = {
+    .daddr       = p_cdc->daddr,
+    .ep_addr     = 0,
+    .setup       = &request,
+    .buffer      = enum_buf,
+    .complete_cb = cdch_internal_control_complete,
+    .user_data   = user_data
+  };
+
+  TU_ASSERT(tuh_control_xfer(&xfer));
+  return true;
+}
+
 bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
   cdch_interface_t* p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc && support_line_request(p_cdc));
-
   TU_LOG_CDCH("CDC Set Line Conding\r\n");
 
   if (p_cdc->serial_protocol == SERIAL_PROTOCOL_ACM) {
-    tusb_control_request_t const request = {
-      .bmRequestType_bit = {
-        .recipient = TUSB_REQ_RCPT_INTERFACE,
-        .type      = TUSB_REQ_TYPE_CLASS,
-        .direction = TUSB_DIR_OUT
-      },
-      .bRequest = CDC_REQUEST_SET_LINE_CODING,
-      .wValue   = 0,
-      .wIndex   = tu_htole16(p_cdc->bInterfaceNumber),
-      .wLength  = tu_htole16(sizeof(cdc_line_coding_t))
-    };
-
-    // use usbh enum buf to hold line coding since user line_coding variable does not live long enough
-    uint8_t* enum_buf = usbh_get_enum_buf();
-    memcpy(enum_buf, line_coding, sizeof(cdc_line_coding_t));
-
-    p_cdc->user_control_cb = complete_cb;
-    tuh_xfer_t xfer = {
-      .daddr       = p_cdc->daddr,
-      .ep_addr     = 0,
-      .setup       = &request,
-      .buffer      = enum_buf,
-      .complete_cb = cdch_internal_control_complete,
-      .user_data   = user_data
-    };
-
-    TU_ASSERT(tuh_control_xfer(&xfer));
-    return true;
+    return acm_set_line_coding(p_cdc, line_coding, complete_cb, user_data);
   }
   #if CFG_TUH_CDC_FTDI
   else if (p_cdc->serial_protocol == SERIAL_PROTOCOL_FTDI) {
@@ -733,9 +740,9 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t
 enum
 {
   // ACM
-  CONFIG_SET_CONTROL_LINE_STATE,
-  CONFIG_SET_LINE_CODING,
-  CONFIG_COMPLETE,
+  CONFIG_ACM_SET_CONTROL_LINE_STATE,
+  CONFIG_ACM_SET_LINE_CODING,
+  CONFIG_ACM_COMPLETE,
 };
 
 static bool open_ep_stream_pair(cdch_interface_t* p_cdc , tusb_desc_endpoint_t const *desc_ep)
@@ -864,7 +871,7 @@ static void set_config_complete(cdch_interface_t * p_cdc, uint8_t idx, uint8_t i
   usbh_driver_set_config_complete(p_cdc->daddr, itf_num);
 }
 
-static void process_cdc_config(tuh_xfer_t* xfer)
+static void process_acm_config(tuh_xfer_t* xfer)
 {
   uintptr_t const state = xfer->user_data;
   uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
@@ -874,28 +881,29 @@ static void process_cdc_config(tuh_xfer_t* xfer)
 
   switch(state)
   {
-    case CONFIG_SET_CONTROL_LINE_STATE:
+    case CONFIG_ACM_SET_CONTROL_LINE_STATE:
       #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
       if (p_cdc->acm_capability.support_line_request)
       {
-        TU_ASSERT( tuh_cdc_set_control_line_state(idx, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_cdc_config, CONFIG_SET_LINE_CODING), );
+        TU_ASSERT(tuh_cdc_set_control_line_state(idx, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_acm_config,
+                                                 CONFIG_ACM_SET_LINE_CODING), );
         break;
       }
       #endif
       TU_ATTR_FALLTHROUGH;
 
-    case CONFIG_SET_LINE_CODING:
+    case CONFIG_ACM_SET_LINE_CODING:
       #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
       if (p_cdc->acm_capability.support_line_request)
       {
         cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
-        TU_ASSERT( tuh_cdc_set_line_coding(idx, &line_coding, process_cdc_config, CONFIG_COMPLETE), );
+        TU_ASSERT(tuh_cdc_set_line_coding(idx, &line_coding, process_acm_config, CONFIG_ACM_COMPLETE), );
         break;
       }
       #endif
       TU_ATTR_FALLTHROUGH;
 
-    case CONFIG_COMPLETE:
+    case CONFIG_ACM_COMPLETE:
       // itf_num+1 to account for data interface as well
       set_config_complete(p_cdc, idx, itf_num+1);
     break;
@@ -921,8 +929,8 @@ bool cdch_set_config(uint8_t daddr, uint8_t itf_num)
 
   switch (p_cdc->serial_protocol) {
     case SERIAL_PROTOCOL_ACM:
-      xfer.user_data = CONFIG_SET_CONTROL_LINE_STATE;
-      process_cdc_config(&xfer);
+      xfer.user_data = CONFIG_ACM_SET_CONTROL_LINE_STATE;
+      process_acm_config(&xfer);
       break;
 
     #if CFG_TUH_CDC_FTDI

From a32ef1cde124251d86696ed980a87eb25739c6a8 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 27 Apr 2023 16:32:42 +0700
Subject: [PATCH 276/691] more host serial refactor

---
 src/class/cdc/cdc_host.c | 112 ++++++++++++++++-----------------------
 1 file changed, 47 insertions(+), 65 deletions(-)

diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index 00a86888c..c25ed48b0 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -154,14 +154,14 @@ enum {
 };
 
 enum {
-  CONFIG_FTDI_RESET,
+  CONFIG_FTDI_RESET = 0,
   CONFIG_FTDI_MODEM_CTRL,
   CONFIG_FTDI_SET_BAUDRATE,
   CONFIG_FTDI_SET_DATA,
   CONFIG_FTDI_COMPLETE
 };
 
-static bool ftdih_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) {
+static bool ftdi_open(uint8_t daddr, const tusb_desc_interface_t *itf_desc, uint16_t max_len) {
   // FTDI Interface includes 1 vendor interface + 2 bulk endpoints
   TU_VERIFY(itf_desc->bInterfaceSubClass == 0xff && itf_desc->bInterfaceProtocol == 0xff && itf_desc->bNumEndpoints == 2);
   TU_VERIFY(sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t) <= max_len);
@@ -169,6 +169,8 @@ static bool ftdih_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uin
   cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
   TU_VERIFY(p_cdc);
 
+  TU_LOG_CDCH("FTDI opened\r\n");
+
   p_cdc->serial_protocol = SERIAL_PROTOCOL_FTDI;
 
   // endpoint pair
@@ -178,22 +180,19 @@ static bool ftdih_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uin
   return open_ep_stream_pair(p_cdc, desc_ep);
 }
 
-static bool ftdih_sio_reset(cdch_interface_t* p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
-{
+static bool ftdi_sio_set_request(cdch_interface_t* p_cdc, uint8_t command, uint16_t value, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   tusb_control_request_t const request = {
     .bmRequestType_bit = {
       .recipient = TUSB_REQ_RCPT_DEVICE,
       .type      = TUSB_REQ_TYPE_VENDOR,
       .direction = TUSB_DIR_OUT
     },
-    .bRequest = FTDI_SIO_RESET,
-    .wValue   = tu_htole16(FTDI_SIO_RESET_SIO),
+    .bRequest = command,
+    .wValue   = tu_htole16(value),
     .wIndex   = 0,
     .wLength  = 0
   };
 
-  p_cdc->user_control_cb = complete_cb;
-
   tuh_xfer_t xfer = {
     .daddr       = p_cdc->daddr,
     .ep_addr     = 0,
@@ -203,36 +202,19 @@ static bool ftdih_sio_reset(cdch_interface_t* p_cdc, tuh_xfer_cb_t complete_cb,
     .user_data   = user_data
   };
 
-  TU_ASSERT(tuh_control_xfer(&xfer));
+  return tuh_control_xfer(&xfer);
+}
+
+static bool ftdi_sio_reset(cdch_interface_t* p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+{
+  TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_RESET, FTDI_SIO_RESET_SIO, complete_cb, user_data));
   return true;
 }
 
 static bool ftdi_sio_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
-  tusb_control_request_t const request = {
-    .bmRequestType_bit = {
-      .recipient = TUSB_REQ_RCPT_INTERFACE,
-      .type      = TUSB_REQ_TYPE_VENDOR,
-      .direction = TUSB_DIR_OUT
-    },
-    .bRequest = FTDI_SIO_MODEM_CTRL,
-    .wValue   = tu_htole16(0x0300 | line_state), // 0x0300 is DTR and RTS enable
-    .wIndex   = 0, // port
-    .wLength  = 0
-  };
-
   p_cdc->user_control_cb = complete_cb;
-
-  tuh_xfer_t xfer = {
-    .daddr       = p_cdc->daddr,
-    .ep_addr     = 0,
-    .setup       = &request,
-    .buffer      = NULL,
-    .complete_cb = cdch_internal_control_complete,
-    .user_data   = user_data
-  };
-
-  TU_ASSERT(tuh_control_xfer(&xfer));
+  TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_MODEM_CTRL, 0x0300 | line_state, cdch_internal_control_complete, user_data));
   return true;
 }
 
@@ -240,33 +222,10 @@ static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tu
 {
   // TODO baudrate to baud divisor
   (void) baudrate;
-
   uint16_t divisor = 0x4138; // FIXME hardcoded to 9600 baud
 
-  tusb_control_request_t const request = {
-    .bmRequestType_bit = {
-      .recipient = TUSB_REQ_RCPT_INTERFACE,
-      .type      = TUSB_REQ_TYPE_VENDOR,
-      .direction = TUSB_DIR_OUT
-    },
-    .bRequest = FTDI_SIO_SET_BAUD_RATE,
-    .wValue   = tu_htole16(divisor),
-    .wIndex   = 0, // port
-    .wLength  = 0
-  };
-
   p_cdc->user_control_cb = complete_cb;
-
-  tuh_xfer_t xfer = {
-    .daddr       = p_cdc->daddr,
-    .ep_addr     = 0,
-    .setup       = &request,
-    .buffer      = NULL,
-    .complete_cb = cdch_internal_control_complete,
-    .user_data   = user_data
-  };
-
-  TU_ASSERT(tuh_control_xfer(&xfer));
+  TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_SET_BAUD_RATE, divisor, cdch_internal_control_complete, user_data));
   return true;
 }
 
@@ -280,7 +239,7 @@ static void process_ftdi_config(tuh_xfer_t* xfer) {
   switch(state) {
     // Note may need to read FTDI eeprom
     case CONFIG_FTDI_RESET:
-      TU_ASSERT(ftdih_sio_reset(p_cdc, process_ftdi_config, CONFIG_FTDI_MODEM_CTRL),);
+      TU_ASSERT(ftdi_sio_reset(p_cdc, process_ftdi_config, CONFIG_FTDI_MODEM_CTRL),);
       break;
 
     case CONFIG_FTDI_MODEM_CTRL:
@@ -335,6 +294,13 @@ enum {
   CP210X_PID_COUNT = sizeof(cp210x_pids) / sizeof(cp210x_pids[0])
 };
 
+enum {
+  CONFIG_CP210X_IFC_ENABLE = 0,
+  CONFIG_CP210X_SET_BAUDRATE,
+  CONFIG_CP210X_SET_LINE_CTL,
+  CONFIG_CP210X_SET_MHS
+};
+
 static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) {
   // CP210x Interface includes 1 vendor interface + 2 bulk endpoints
   TU_VERIFY(itf_desc->bInterfaceSubClass == 0 && itf_desc->bInterfaceProtocol == 0 && itf_desc->bNumEndpoints == 2);
@@ -343,6 +309,7 @@ static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, ui
   cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
   TU_VERIFY(p_cdc);
 
+  TU_LOG_CDCH("CP210x opened\r\n");
   p_cdc->serial_protocol = SERIAL_PROTOCOL_CP210X;
 
   // endpoint pair
@@ -352,6 +319,22 @@ static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, ui
   return open_ep_stream_pair(p_cdc, desc_ep);
 }
 
+static void process_cp210x_config(tuh_xfer_t* xfer) {
+  uintptr_t const state   = xfer->user_data;
+  uint8_t const   itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
+  uint8_t const   idx     = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
+  cdch_interface_t *p_cdc = get_itf(idx);
+  TU_ASSERT(p_cdc,);
+
+  switch (state) {
+    case CONFIG_CP210X_IFC_ENABLE:
+
+      break;
+
+    default: break;
+  }
+}
+
 #endif
 
 //--------------------------------------------------------------------+
@@ -740,7 +723,7 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t
 enum
 {
   // ACM
-  CONFIG_ACM_SET_CONTROL_LINE_STATE,
+  CONFIG_ACM_SET_CONTROL_LINE_STATE = 0,
   CONFIG_ACM_SET_LINE_CODING,
   CONFIG_ACM_COMPLETE,
 };
@@ -840,7 +823,7 @@ bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *itf_d
     if (TU_FTDI_VID == vid) {
       for (size_t i = 0; i < FTDI_PID_COUNT; i++) {
         if (ftdi_pids[i] == pid) {
-          return ftdih_open(daddr, itf_desc, max_len);
+          return ftdi_open(daddr, itf_desc, max_len);
         }
       }
     }
@@ -918,9 +901,10 @@ bool cdch_set_config(uint8_t daddr, uint8_t itf_num)
   request.wIndex = tu_htole16((uint16_t) itf_num);
 
   tuh_xfer_t xfer;
-  xfer.daddr     = daddr;
-  xfer.result    = XFER_RESULT_SUCCESS;
-  xfer.setup     = &request;
+  xfer.daddr  = daddr;
+  xfer.result = XFER_RESULT_SUCCESS;
+  xfer.setup  = &request;
+  xfer.user_data = 0;
 
   // fake transfer to kick-off process
   uint8_t const idx = tuh_cdc_itf_get_index(daddr, itf_num);
@@ -929,20 +913,18 @@ bool cdch_set_config(uint8_t daddr, uint8_t itf_num)
 
   switch (p_cdc->serial_protocol) {
     case SERIAL_PROTOCOL_ACM:
-      xfer.user_data = CONFIG_ACM_SET_CONTROL_LINE_STATE;
       process_acm_config(&xfer);
       break;
 
     #if CFG_TUH_CDC_FTDI
     case SERIAL_PROTOCOL_FTDI:
-      xfer.user_data = CONFIG_FTDI_RESET;
       process_ftdi_config(&xfer);
       break;
     #endif
 
     #if CFG_TUH_CDC_CP210X
     case SERIAL_PROTOCOL_CP210X:
-      //xfer.user_data = CONFIG_SET_CONTROL_LINE_STATE;
+      process_cp210x_config(&xfer);
       break;
     #endif
 

From 86f6fd17edec73c6c7f19ece19fe1dba8575985a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 27 Apr 2023 17:09:21 +0700
Subject: [PATCH 277/691] cp210x seems to work well

---
 examples/host/cdc_msc_hid/src/tusb_config.h |  3 +-
 src/class/cdc/cdc_host.c                    | 93 +++++++++++++++++++--
 2 files changed, 89 insertions(+), 7 deletions(-)

diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h
index 2baf2b1ac..cc3775a76 100644
--- a/examples/host/cdc_msc_hid/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid/src/tusb_config.h
@@ -97,7 +97,8 @@
 
 #define CFG_TUH_HUB                 1 // number of supported hubs
 #define CFG_TUH_CDC                 1 // CDC ACM
-#define CFG_TUH_CDC_FTDI            1 // FTDI UART
+#define CFG_TUH_CDC_FTDI            1 // FTDI Serial
+#define CFG_TUH_CDC_CP210X          1 // CP210x Serial
 #define CFG_TUH_HID                 (3*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces
 #define CFG_TUH_MSC                 1
 #define CFG_TUH_VENDOR              0
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index c25ed48b0..a19f66181 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -180,6 +180,7 @@ static bool ftdi_open(uint8_t daddr, const tusb_desc_interface_t *itf_desc, uint
   return open_ep_stream_pair(p_cdc, desc_ep);
 }
 
+// set request without data
 static bool ftdi_sio_set_request(cdch_interface_t* p_cdc, uint8_t command, uint16_t value, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   tusb_control_request_t const request = {
     .bmRequestType_bit = {
@@ -207,11 +208,10 @@ static bool ftdi_sio_set_request(cdch_interface_t* p_cdc, uint8_t command, uint1
 
 static bool ftdi_sio_reset(cdch_interface_t* p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
-  TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_RESET, FTDI_SIO_RESET_SIO, complete_cb, user_data));
-  return true;
+  return ftdi_sio_set_request(p_cdc, FTDI_SIO_RESET, FTDI_SIO_RESET_SIO, complete_cb, user_data);
 }
 
-static bool ftdi_sio_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+static bool ftdi_sio_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
   p_cdc->user_control_cb = complete_cb;
   TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_MODEM_CTRL, 0x0300 | line_state, cdch_internal_control_complete, user_data));
@@ -244,7 +244,8 @@ static void process_ftdi_config(tuh_xfer_t* xfer) {
 
     case CONFIG_FTDI_MODEM_CTRL:
       #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
-      TU_ASSERT(ftdi_sio_modem_ctrl(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_ftdi_config, CONFIG_FTDI_SET_BAUDRATE),);
+      TU_ASSERT(
+        ftdi_sio_set_modem_ctrl(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_ftdi_config, CONFIG_FTDI_SET_BAUDRATE),);
       break;
       #else
       TU_ATTR_FALLTHROUGH;
@@ -298,7 +299,8 @@ enum {
   CONFIG_CP210X_IFC_ENABLE = 0,
   CONFIG_CP210X_SET_BAUDRATE,
   CONFIG_CP210X_SET_LINE_CTL,
-  CONFIG_CP210X_SET_MHS
+  CONFIG_CP210X_SET_DTR_RTS,
+  CONFIG_CP210X_COMPLETE
 };
 
 static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) {
@@ -319,6 +321,54 @@ static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, ui
   return open_ep_stream_pair(p_cdc, desc_ep);
 }
 
+static bool cp210x_set_request(cdch_interface_t* p_cdc, uint8_t command, uint16_t value, uint8_t* buffer, uint16_t length, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  tusb_control_request_t const request = {
+    .bmRequestType_bit = {
+      .recipient = TUSB_REQ_RCPT_INTERFACE,
+      .type      = TUSB_REQ_TYPE_VENDOR,
+      .direction = TUSB_DIR_OUT
+    },
+    .bRequest = command,
+    .wValue   = tu_htole16(value),
+    .wIndex   = p_cdc->bInterfaceNumber,
+    .wLength  = tu_htole16(length)
+  };
+
+  // use usbh enum buf since application variable does not live long enough
+  uint8_t* enum_buf = NULL;
+
+  if (buffer && length > 0) {
+    enum_buf = usbh_get_enum_buf();
+    tu_memcpy_s(enum_buf, CFG_TUH_ENUMERATION_BUFSIZE, buffer, length);
+  }
+
+  tuh_xfer_t xfer = {
+    .daddr       = p_cdc->daddr,
+    .ep_addr     = 0,
+    .setup       = &request,
+    .buffer      = enum_buf,
+    .complete_cb = complete_cb,
+    .user_data   = user_data
+  };
+
+  return tuh_control_xfer(&xfer);
+}
+
+static bool cp210x_ifc_enable(cdch_interface_t* p_cdc, uint16_t enabled, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  return cp210x_set_request(p_cdc, CP210X_IFC_ENABLE, enabled, NULL, 0, complete_cb, user_data);
+}
+
+static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  baudrate = tu_htole32(baudrate);
+  return cp210x_set_request(p_cdc, CP210X_SET_BAUDRATE, 0, (uint8_t *) &baudrate, 4, complete_cb, user_data);
+}
+
+static bool cp210x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+{
+  p_cdc->user_control_cb = complete_cb;
+  return cp210x_set_request(p_cdc, CP210X_SET_MHS, 0x0300 | line_state, NULL, 0, cdch_internal_control_complete, user_data);
+}
+
 static void process_cp210x_config(tuh_xfer_t* xfer) {
   uintptr_t const state   = xfer->user_data;
   uint8_t const   itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
@@ -328,7 +378,38 @@ static void process_cp210x_config(tuh_xfer_t* xfer) {
 
   switch (state) {
     case CONFIG_CP210X_IFC_ENABLE:
+      TU_ASSERT(cp210x_ifc_enable(p_cdc, 1, process_cp210x_config, CONFIG_CP210X_SET_BAUDRATE),);
+      break;
 
+    case CONFIG_CP210X_SET_BAUDRATE: {
+      #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
+      cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
+      TU_ASSERT(cp210x_set_baudrate(p_cdc, line_coding.bit_rate, process_cp210x_config, CONFIG_CP210X_SET_LINE_CTL),);
+      break;
+      #else
+      TU_ATTR_FALLTHROUGH;
+      #endif
+    }
+
+    case CONFIG_CP210X_SET_LINE_CTL: {
+      #if defined(CFG_TUH_CDC_LINE_CODING_ON_ENUM) && 0 // skip for now
+      cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
+      break;
+      #else
+      TU_ATTR_FALLTHROUGH;
+      #endif
+    }
+
+    case CONFIG_CP210X_SET_DTR_RTS:
+      #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
+      TU_ASSERT(cp210x_set_modem_ctrl(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_cp210x_config, CONFIG_CP210X_COMPLETE),);
+      break;
+      #else
+      TU_ATTR_FALLTHROUGH;
+      #endif
+
+    case CONFIG_CP210X_COMPLETE:
+      set_config_complete(p_cdc, idx, itf_num);
       break;
 
     default: break;
@@ -567,7 +648,7 @@ bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_c
   }
   #if CFG_TUH_CDC_FTDI
   else if (p_cdc->serial_protocol == SERIAL_PROTOCOL_FTDI) {
-    return ftdi_sio_modem_ctrl(p_cdc, line_state, complete_cb, user_data);
+    return ftdi_sio_set_modem_ctrl(p_cdc, line_state, complete_cb, user_data);
   }
   #endif
   else {

From 438387be8c308c3bfed1ca952f5908a51a97b5c2 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 27 Apr 2023 17:32:56 +0700
Subject: [PATCH 278/691] more refactor

---
 examples/host/cdc_msc_hid/src/tusb_config.h |   4 +-
 src/class/cdc/cdc_host.c                    | 595 +++++++++++---------
 2 files changed, 317 insertions(+), 282 deletions(-)

diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h
index cc3775a76..abb75f068 100644
--- a/examples/host/cdc_msc_hid/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid/src/tusb_config.h
@@ -97,8 +97,8 @@
 
 #define CFG_TUH_HUB                 1 // number of supported hubs
 #define CFG_TUH_CDC                 1 // CDC ACM
-#define CFG_TUH_CDC_FTDI            1 // FTDI Serial
-#define CFG_TUH_CDC_CP210X          1 // CP210x Serial
+#define CFG_TUH_CDC_FTDI            1 // FTDI Serial.  FTDI is not part of CDC class, only to re-use CDC driver API
+#define CFG_TUH_CDC_CP210X          1 // CP210x Serial. CP210X is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_HID                 (3*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces
 #define CFG_TUH_MSC                 1
 #define CFG_TUH_VENDOR              0
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index a19f66181..f47ac4f10 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -143,281 +143,35 @@ static bool open_ep_stream_pair(cdch_interface_t* p_cdc , tusb_desc_endpoint_t c
 static void set_config_complete(cdch_interface_t * p_cdc, uint8_t idx, uint8_t itf_num);
 static void cdch_internal_control_complete(tuh_xfer_t* xfer);
 
-//--------------------------------------------------------------------+
-// FTDI
-//--------------------------------------------------------------------+
+//------------- FTDI prototypes -------------//
 #if CFG_TUH_CDC_FTDI
-
 static uint16_t const ftdi_pids[] = { TU_FTDI_PID_LIST };
 enum {
   FTDI_PID_COUNT = sizeof(ftdi_pids) / sizeof(ftdi_pids[0])
 };
 
-enum {
-  CONFIG_FTDI_RESET = 0,
-  CONFIG_FTDI_MODEM_CTRL,
-  CONFIG_FTDI_SET_BAUDRATE,
-  CONFIG_FTDI_SET_DATA,
-  CONFIG_FTDI_COMPLETE
-};
-
-static bool ftdi_open(uint8_t daddr, const tusb_desc_interface_t *itf_desc, uint16_t max_len) {
-  // FTDI Interface includes 1 vendor interface + 2 bulk endpoints
-  TU_VERIFY(itf_desc->bInterfaceSubClass == 0xff && itf_desc->bInterfaceProtocol == 0xff && itf_desc->bNumEndpoints == 2);
-  TU_VERIFY(sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t) <= max_len);
-
-  cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
-  TU_VERIFY(p_cdc);
-
-  TU_LOG_CDCH("FTDI opened\r\n");
-
-  p_cdc->serial_protocol = SERIAL_PROTOCOL_FTDI;
-
-  // endpoint pair
-  tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
-
-  // data endpoints expected to be in pairs
-  return open_ep_stream_pair(p_cdc, desc_ep);
-}
-
-// set request without data
-static bool ftdi_sio_set_request(cdch_interface_t* p_cdc, uint8_t command, uint16_t value, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  tusb_control_request_t const request = {
-    .bmRequestType_bit = {
-      .recipient = TUSB_REQ_RCPT_DEVICE,
-      .type      = TUSB_REQ_TYPE_VENDOR,
-      .direction = TUSB_DIR_OUT
-    },
-    .bRequest = command,
-    .wValue   = tu_htole16(value),
-    .wIndex   = 0,
-    .wLength  = 0
-  };
-
-  tuh_xfer_t xfer = {
-    .daddr       = p_cdc->daddr,
-    .ep_addr     = 0,
-    .setup       = &request,
-    .buffer      = NULL,
-    .complete_cb = complete_cb,
-    .user_data   = user_data
-  };
-
-  return tuh_control_xfer(&xfer);
-}
-
-static bool ftdi_sio_reset(cdch_interface_t* p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
-{
-  return ftdi_sio_set_request(p_cdc, FTDI_SIO_RESET, FTDI_SIO_RESET_SIO, complete_cb, user_data);
-}
-
-static bool ftdi_sio_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
-{
-  p_cdc->user_control_cb = complete_cb;
-  TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_MODEM_CTRL, 0x0300 | line_state, cdch_internal_control_complete, user_data));
-  return true;
-}
-
-static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
-{
-  // TODO baudrate to baud divisor
-  (void) baudrate;
-  uint16_t divisor = 0x4138; // FIXME hardcoded to 9600 baud
-
-  p_cdc->user_control_cb = complete_cb;
-  TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_SET_BAUD_RATE, divisor, cdch_internal_control_complete, user_data));
-  return true;
-}
-
-static void process_ftdi_config(tuh_xfer_t* xfer) {
-  uintptr_t const state = xfer->user_data;
-  uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
-  uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
-  cdch_interface_t * p_cdc = get_itf(idx);
-  TU_ASSERT(p_cdc, );
-
-  switch(state) {
-    // Note may need to read FTDI eeprom
-    case CONFIG_FTDI_RESET:
-      TU_ASSERT(ftdi_sio_reset(p_cdc, process_ftdi_config, CONFIG_FTDI_MODEM_CTRL),);
-      break;
-
-    case CONFIG_FTDI_MODEM_CTRL:
-      #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
-      TU_ASSERT(
-        ftdi_sio_set_modem_ctrl(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_ftdi_config, CONFIG_FTDI_SET_BAUDRATE),);
-      break;
-      #else
-      TU_ATTR_FALLTHROUGH;
-      #endif
-
-    case CONFIG_FTDI_SET_BAUDRATE: {
-      #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
-      cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
-      TU_ASSERT(ftdi_sio_set_baudrate(p_cdc, line_coding.bit_rate, process_ftdi_config, CONFIG_FTDI_SET_DATA),);
-      break;
-      #else
-      TU_ATTR_FALLTHROUGH;
-      #endif
-    }
-
-    case CONFIG_FTDI_SET_DATA: {
-  #if 0 // TODO set data format
-      #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
-      cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
-      TU_ASSERT(ftdi_sio_set_data(p_cdc, process_ftdi_config, CONFIG_FTDI_COMPLETE),);
-      break;
-      #endif
-  #endif
-
-      TU_ATTR_FALLTHROUGH;
-    }
-
-    case CONFIG_FTDI_COMPLETE:
-      set_config_complete(p_cdc, idx, itf_num);
-      break;
-
-    default:
-      break;
-  }
-}
+static bool ftdi_open(uint8_t daddr, const tusb_desc_interface_t *itf_desc, uint16_t max_len);
+static void process_ftdi_config(tuh_xfer_t* xfer);
 
+static bool ftdi_sio_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 #endif
 
-//--------------------------------------------------------------------+
-// CP210x
-//--------------------------------------------------------------------+
-
+//------------- CP210X prototypes -------------//
 #if CFG_TUH_CDC_CP210X
-
 static uint16_t const cp210x_pids[] = { TU_CP210X_PID_LIST };
 enum {
   CP210X_PID_COUNT = sizeof(cp210x_pids) / sizeof(cp210x_pids[0])
 };
 
-enum {
-  CONFIG_CP210X_IFC_ENABLE = 0,
-  CONFIG_CP210X_SET_BAUDRATE,
-  CONFIG_CP210X_SET_LINE_CTL,
-  CONFIG_CP210X_SET_DTR_RTS,
-  CONFIG_CP210X_COMPLETE
-};
-
-static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) {
-  // CP210x Interface includes 1 vendor interface + 2 bulk endpoints
-  TU_VERIFY(itf_desc->bInterfaceSubClass == 0 && itf_desc->bInterfaceProtocol == 0 && itf_desc->bNumEndpoints == 2);
-  TU_VERIFY(sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t) <= max_len);
-
-  cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
-  TU_VERIFY(p_cdc);
-
-  TU_LOG_CDCH("CP210x opened\r\n");
-  p_cdc->serial_protocol = SERIAL_PROTOCOL_CP210X;
-
-  // endpoint pair
-  tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
-
-  // data endpoints expected to be in pairs
-  return open_ep_stream_pair(p_cdc, desc_ep);
-}
-
-static bool cp210x_set_request(cdch_interface_t* p_cdc, uint8_t command, uint16_t value, uint8_t* buffer, uint16_t length, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  tusb_control_request_t const request = {
-    .bmRequestType_bit = {
-      .recipient = TUSB_REQ_RCPT_INTERFACE,
-      .type      = TUSB_REQ_TYPE_VENDOR,
-      .direction = TUSB_DIR_OUT
-    },
-    .bRequest = command,
-    .wValue   = tu_htole16(value),
-    .wIndex   = p_cdc->bInterfaceNumber,
-    .wLength  = tu_htole16(length)
-  };
-
-  // use usbh enum buf since application variable does not live long enough
-  uint8_t* enum_buf = NULL;
-
-  if (buffer && length > 0) {
-    enum_buf = usbh_get_enum_buf();
-    tu_memcpy_s(enum_buf, CFG_TUH_ENUMERATION_BUFSIZE, buffer, length);
-  }
-
-  tuh_xfer_t xfer = {
-    .daddr       = p_cdc->daddr,
-    .ep_addr     = 0,
-    .setup       = &request,
-    .buffer      = enum_buf,
-    .complete_cb = complete_cb,
-    .user_data   = user_data
-  };
-
-  return tuh_control_xfer(&xfer);
-}
-
-static bool cp210x_ifc_enable(cdch_interface_t* p_cdc, uint16_t enabled, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  return cp210x_set_request(p_cdc, CP210X_IFC_ENABLE, enabled, NULL, 0, complete_cb, user_data);
-}
-
-static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  baudrate = tu_htole32(baudrate);
-  return cp210x_set_request(p_cdc, CP210X_SET_BAUDRATE, 0, (uint8_t *) &baudrate, 4, complete_cb, user_data);
-}
-
-static bool cp210x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
-{
-  p_cdc->user_control_cb = complete_cb;
-  return cp210x_set_request(p_cdc, CP210X_SET_MHS, 0x0300 | line_state, NULL, 0, cdch_internal_control_complete, user_data);
-}
-
-static void process_cp210x_config(tuh_xfer_t* xfer) {
-  uintptr_t const state   = xfer->user_data;
-  uint8_t const   itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
-  uint8_t const   idx     = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
-  cdch_interface_t *p_cdc = get_itf(idx);
-  TU_ASSERT(p_cdc,);
-
-  switch (state) {
-    case CONFIG_CP210X_IFC_ENABLE:
-      TU_ASSERT(cp210x_ifc_enable(p_cdc, 1, process_cp210x_config, CONFIG_CP210X_SET_BAUDRATE),);
-      break;
-
-    case CONFIG_CP210X_SET_BAUDRATE: {
-      #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
-      cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
-      TU_ASSERT(cp210x_set_baudrate(p_cdc, line_coding.bit_rate, process_cp210x_config, CONFIG_CP210X_SET_LINE_CTL),);
-      break;
-      #else
-      TU_ATTR_FALLTHROUGH;
-      #endif
-    }
-
-    case CONFIG_CP210X_SET_LINE_CTL: {
-      #if defined(CFG_TUH_CDC_LINE_CODING_ON_ENUM) && 0 // skip for now
-      cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
-      break;
-      #else
-      TU_ATTR_FALLTHROUGH;
-      #endif
-    }
-
-    case CONFIG_CP210X_SET_DTR_RTS:
-      #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
-      TU_ASSERT(cp210x_set_modem_ctrl(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_cp210x_config, CONFIG_CP210X_COMPLETE),);
-      break;
-      #else
-      TU_ATTR_FALLTHROUGH;
-      #endif
-
-    case CONFIG_CP210X_COMPLETE:
-      set_config_complete(p_cdc, idx, itf_num);
-      break;
-
-    default: break;
-  }
-}
+static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len);
+static void process_cp210x_config(tuh_xfer_t* xfer);
 
+static bool cp210x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 #endif
 
+
 //--------------------------------------------------------------------+
 // APPLICATION API
 //--------------------------------------------------------------------+
@@ -610,6 +364,7 @@ static void cdch_internal_control_complete(tuh_xfer_t* xfer)
 }
 
 static bool acm_set_control_line_state(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  TU_LOG_CDCH("CDC ACM Set Control Line State\r\n");
   tusb_control_request_t const request = {
     .bmRequestType_bit = {
       .recipient = TUSB_REQ_RCPT_INTERFACE,
@@ -641,18 +396,23 @@ bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_c
 {
   cdch_interface_t* p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc && support_line_request(p_cdc));
-  TU_LOG_CDCH("CDC Set Control Line State\r\n");
 
-  if(p_cdc->serial_protocol == SERIAL_PROTOCOL_ACM ) {
-    return acm_set_control_line_state(p_cdc, line_state, complete_cb, user_data);
-  }
-  #if CFG_TUH_CDC_FTDI
-  else if (p_cdc->serial_protocol == SERIAL_PROTOCOL_FTDI) {
-    return ftdi_sio_set_modem_ctrl(p_cdc, line_state, complete_cb, user_data);
-  }
-  #endif
-  else {
-    return false;
+  switch(p_cdc->serial_protocol) {
+    case SERIAL_PROTOCOL_ACM:
+      return acm_set_control_line_state(p_cdc, line_state, complete_cb, user_data);
+
+    #if CFG_TUH_CDC_FTDI
+    case SERIAL_PROTOCOL_FTDI:
+      return ftdi_sio_set_modem_ctrl(p_cdc, line_state, complete_cb, user_data);
+    #endif
+
+    #if CFG_TUH_CDC_CP210X
+    case SERIAL_PROTOCOL_CP210X:
+      return ftdi_sio_set_modem_ctrl(p_cdc, line_state, complete_cb, user_data);
+    #endif
+
+    default:
+      return false;
   }
 }
 
@@ -693,17 +453,22 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding,
   TU_VERIFY(p_cdc && support_line_request(p_cdc));
   TU_LOG_CDCH("CDC Set Line Conding\r\n");
 
-  if (p_cdc->serial_protocol == SERIAL_PROTOCOL_ACM) {
-    return acm_set_line_coding(p_cdc, line_coding, complete_cb, user_data);
-  }
-  #if CFG_TUH_CDC_FTDI
-  else if (p_cdc->serial_protocol == SERIAL_PROTOCOL_FTDI) {
-    // FTDI need to set baud rate and data bits, parity, stop bits separately
-    return ftdi_sio_set_baudrate(p_cdc, line_coding->bit_rate, complete_cb, user_data);
-  }
-  #endif
-  else {
-    return false;
+  switch(p_cdc->serial_protocol) {
+    case SERIAL_PROTOCOL_ACM:
+      return acm_set_line_coding(p_cdc, line_coding, complete_cb, user_data);
+
+    #if CFG_TUH_CDC_FTDI
+    case SERIAL_PROTOCOL_FTDI:
+      // FTDI need to set baud rate and data bits, parity, stop bits separately
+      return ftdi_sio_set_baudrate(p_cdc, line_coding->bit_rate, complete_cb, user_data);
+    #endif
+
+    #if CFG_TUH_CDC_CP210X
+    case SERIAL_PROTOCOL_CP210X:
+      return cp210x_set_baudrate(p_cdc, line_coding->bit_rate, complete_cb, user_data);
+    #endif
+
+    default: return false;
   }
 }
 
@@ -949,7 +714,7 @@ static void process_acm_config(tuh_xfer_t* xfer)
       #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
       if (p_cdc->acm_capability.support_line_request)
       {
-        TU_ASSERT(tuh_cdc_set_control_line_state(idx, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_acm_config,
+        TU_ASSERT(acm_set_control_line_state(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_acm_config,
                                                  CONFIG_ACM_SET_LINE_CODING), );
         break;
       }
@@ -1015,4 +780,274 @@ bool cdch_set_config(uint8_t daddr, uint8_t itf_num)
   return true;
 }
 
+//--------------------------------------------------------------------+
+// FTDI
+//--------------------------------------------------------------------+
+#if CFG_TUH_CDC_FTDI
+
+enum {
+  CONFIG_FTDI_RESET = 0,
+  CONFIG_FTDI_MODEM_CTRL,
+  CONFIG_FTDI_SET_BAUDRATE,
+  CONFIG_FTDI_SET_DATA,
+  CONFIG_FTDI_COMPLETE
+};
+
+static bool ftdi_open(uint8_t daddr, const tusb_desc_interface_t *itf_desc, uint16_t max_len) {
+  // FTDI Interface includes 1 vendor interface + 2 bulk endpoints
+  TU_VERIFY(itf_desc->bInterfaceSubClass == 0xff && itf_desc->bInterfaceProtocol == 0xff && itf_desc->bNumEndpoints == 2);
+  TU_VERIFY(sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t) <= max_len);
+
+  cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
+  TU_VERIFY(p_cdc);
+
+  TU_LOG_CDCH("FTDI opened\r\n");
+
+  p_cdc->serial_protocol = SERIAL_PROTOCOL_FTDI;
+
+  // endpoint pair
+  tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
+
+  // data endpoints expected to be in pairs
+  return open_ep_stream_pair(p_cdc, desc_ep);
+}
+
+// set request without data
+static bool ftdi_sio_set_request(cdch_interface_t* p_cdc, uint8_t command, uint16_t value, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  tusb_control_request_t const request = {
+    .bmRequestType_bit = {
+      .recipient = TUSB_REQ_RCPT_DEVICE,
+      .type      = TUSB_REQ_TYPE_VENDOR,
+      .direction = TUSB_DIR_OUT
+    },
+    .bRequest = command,
+    .wValue   = tu_htole16(value),
+    .wIndex   = 0,
+    .wLength  = 0
+  };
+
+  tuh_xfer_t xfer = {
+    .daddr       = p_cdc->daddr,
+    .ep_addr     = 0,
+    .setup       = &request,
+    .buffer      = NULL,
+    .complete_cb = complete_cb,
+    .user_data   = user_data
+  };
+
+  return tuh_control_xfer(&xfer);
+}
+
+static bool ftdi_sio_reset(cdch_interface_t* p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+{
+  return ftdi_sio_set_request(p_cdc, FTDI_SIO_RESET, FTDI_SIO_RESET_SIO, complete_cb, user_data);
+}
+
+static bool ftdi_sio_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+{
+  TU_LOG_CDCH("CDC FTDI Set Control Line State\r\n");
+  p_cdc->user_control_cb = complete_cb;
+  TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_MODEM_CTRL, 0x0300 | line_state, cdch_internal_control_complete, user_data));
+  return true;
+}
+
+static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+{
+  // TODO baudrate to baud divisor
+  (void) baudrate;
+  uint16_t divisor = 0x4138; // FIXME hardcoded to 9600 baud
+
+  TU_LOG_CDCH("CDC FTDI Set BaudRate = %u, divisor = %u\n", baudrate, divisor);
+
+  p_cdc->user_control_cb = complete_cb;
+  TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_SET_BAUD_RATE, divisor, cdch_internal_control_complete, user_data));
+  return true;
+}
+
+static void process_ftdi_config(tuh_xfer_t* xfer) {
+  uintptr_t const state = xfer->user_data;
+  uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
+  uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
+  cdch_interface_t * p_cdc = get_itf(idx);
+  TU_ASSERT(p_cdc, );
+
+  switch(state) {
+    // Note may need to read FTDI eeprom
+    case CONFIG_FTDI_RESET:
+      TU_ASSERT(ftdi_sio_reset(p_cdc, process_ftdi_config, CONFIG_FTDI_MODEM_CTRL),);
+      break;
+
+    case CONFIG_FTDI_MODEM_CTRL:
+      #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
+      TU_ASSERT(
+        ftdi_sio_set_modem_ctrl(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_ftdi_config, CONFIG_FTDI_SET_BAUDRATE),);
+      break;
+      #else
+      TU_ATTR_FALLTHROUGH;
+      #endif
+
+    case CONFIG_FTDI_SET_BAUDRATE: {
+      #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
+      cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
+      TU_ASSERT(ftdi_sio_set_baudrate(p_cdc, line_coding.bit_rate, process_ftdi_config, CONFIG_FTDI_SET_DATA),);
+      break;
+      #else
+      TU_ATTR_FALLTHROUGH;
+      #endif
+    }
+
+    case CONFIG_FTDI_SET_DATA: {
+      #if 0 // TODO set data format
+      #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
+      cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
+      TU_ASSERT(ftdi_sio_set_data(p_cdc, process_ftdi_config, CONFIG_FTDI_COMPLETE),);
+      break;
+      #endif
+      #endif
+
+      TU_ATTR_FALLTHROUGH;
+    }
+
+    case CONFIG_FTDI_COMPLETE:
+      set_config_complete(p_cdc, idx, itf_num);
+      break;
+
+    default:
+      break;
+  }
+}
+
+#endif
+
+//--------------------------------------------------------------------+
+// CP210x
+//--------------------------------------------------------------------+
+
+#if CFG_TUH_CDC_CP210X
+
+enum {
+  CONFIG_CP210X_IFC_ENABLE = 0,
+  CONFIG_CP210X_SET_BAUDRATE,
+  CONFIG_CP210X_SET_LINE_CTL,
+  CONFIG_CP210X_SET_DTR_RTS,
+  CONFIG_CP210X_COMPLETE
+};
+
+static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) {
+  // CP210x Interface includes 1 vendor interface + 2 bulk endpoints
+  TU_VERIFY(itf_desc->bInterfaceSubClass == 0 && itf_desc->bInterfaceProtocol == 0 && itf_desc->bNumEndpoints == 2);
+  TU_VERIFY(sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t) <= max_len);
+
+  cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
+  TU_VERIFY(p_cdc);
+
+  TU_LOG_CDCH("CP210x opened\r\n");
+  p_cdc->serial_protocol = SERIAL_PROTOCOL_CP210X;
+
+  // endpoint pair
+  tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
+
+  // data endpoints expected to be in pairs
+  return open_ep_stream_pair(p_cdc, desc_ep);
+}
+
+static bool cp210x_set_request(cdch_interface_t* p_cdc, uint8_t command, uint16_t value, uint8_t* buffer, uint16_t length, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  tusb_control_request_t const request = {
+    .bmRequestType_bit = {
+      .recipient = TUSB_REQ_RCPT_INTERFACE,
+      .type      = TUSB_REQ_TYPE_VENDOR,
+      .direction = TUSB_DIR_OUT
+    },
+    .bRequest = command,
+    .wValue   = tu_htole16(value),
+    .wIndex   = p_cdc->bInterfaceNumber,
+    .wLength  = tu_htole16(length)
+  };
+
+  // use usbh enum buf since application variable does not live long enough
+  uint8_t* enum_buf = NULL;
+
+  if (buffer && length > 0) {
+    enum_buf = usbh_get_enum_buf();
+    tu_memcpy_s(enum_buf, CFG_TUH_ENUMERATION_BUFSIZE, buffer, length);
+  }
+
+  tuh_xfer_t xfer = {
+    .daddr       = p_cdc->daddr,
+    .ep_addr     = 0,
+    .setup       = &request,
+    .buffer      = enum_buf,
+    .complete_cb = complete_cb,
+    .user_data   = user_data
+  };
+
+  return tuh_control_xfer(&xfer);
+}
+
+static bool cp210x_ifc_enable(cdch_interface_t* p_cdc, uint16_t enabled, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  return cp210x_set_request(p_cdc, CP210X_IFC_ENABLE, enabled, NULL, 0, complete_cb, user_data);
+}
+
+static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  TU_LOG_CDCH("CDC CP210x Set BaudRate = %u\n", baudrate);
+  baudrate = tu_htole32(baudrate);
+  return cp210x_set_request(p_cdc, CP210X_SET_BAUDRATE, 0, (uint8_t *) &baudrate, 4, complete_cb, user_data);
+}
+
+static bool cp210x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+{
+  TU_LOG_CDCH("CDC CP210x Set Control Line State\r\n");
+  p_cdc->user_control_cb = complete_cb;
+  return cp210x_set_request(p_cdc, CP210X_SET_MHS, 0x0300 | line_state, NULL, 0, cdch_internal_control_complete, user_data);
+}
+
+static void process_cp210x_config(tuh_xfer_t* xfer) {
+  uintptr_t const state   = xfer->user_data;
+  uint8_t const   itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
+  uint8_t const   idx     = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
+  cdch_interface_t *p_cdc = get_itf(idx);
+  TU_ASSERT(p_cdc,);
+
+  switch (state) {
+    case CONFIG_CP210X_IFC_ENABLE:
+      TU_ASSERT(cp210x_ifc_enable(p_cdc, 1, process_cp210x_config, CONFIG_CP210X_SET_BAUDRATE),);
+      break;
+
+    case CONFIG_CP210X_SET_BAUDRATE: {
+      #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
+      cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
+      TU_ASSERT(cp210x_set_baudrate(p_cdc, line_coding.bit_rate, process_cp210x_config, CONFIG_CP210X_SET_LINE_CTL),);
+      break;
+      #else
+      TU_ATTR_FALLTHROUGH;
+      #endif
+    }
+
+    case CONFIG_CP210X_SET_LINE_CTL: {
+      #if defined(CFG_TUH_CDC_LINE_CODING_ON_ENUM) && 0 // skip for now
+      cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
+      break;
+      #else
+      TU_ATTR_FALLTHROUGH;
+      #endif
+    }
+
+    case CONFIG_CP210X_SET_DTR_RTS:
+      #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
+      TU_ASSERT(cp210x_set_modem_ctrl(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_cp210x_config, CONFIG_CP210X_COMPLETE),);
+      break;
+      #else
+      TU_ATTR_FALLTHROUGH;
+      #endif
+
+    case CONFIG_CP210X_COMPLETE:
+      set_config_complete(p_cdc, idx, itf_num);
+      break;
+
+    default: break;
+  }
+}
+
+#endif
+
 #endif

From c10f52b2375de8cca153beffb7852877d4cd7e58 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 27 Apr 2023 17:39:02 +0700
Subject: [PATCH 279/691] forgot to add cp210x header

---
 src/class/cdc/serial/cp210x.h | 64 +++++++++++++++++++++++++++++++++++
 1 file changed, 64 insertions(+)
 create mode 100644 src/class/cdc/serial/cp210x.h

diff --git a/src/class/cdc/serial/cp210x.h b/src/class/cdc/serial/cp210x.h
new file mode 100644
index 000000000..b01417092
--- /dev/null
+++ b/src/class/cdc/serial/cp210x.h
@@ -0,0 +1,64 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (thach@tinyusb.org) for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef TUSB_CP210X_H
+#define TUSB_CP210X_H
+
+// Protocol details can be found at AN571: CP210x Virtual COM Port Interface
+// https://www.silabs.com/documents/public/application-notes/AN571.pdf
+
+#define TU_CP210X_VID 0x10C4
+#define TU_CP210X_PID_LIST \
+  0xEA60, 0xEA70
+
+/* Config request codes */
+#define CP210X_IFC_ENABLE      0x00
+#define CP210X_SET_BAUDDIV     0x01
+#define CP210X_GET_BAUDDIV     0x02
+#define CP210X_SET_LINE_CTL    0x03 // Set parity, data bits, stop bits
+#define CP210X_GET_LINE_CTL    0x04
+#define CP210X_SET_BREAK       0x05
+#define CP210X_IMM_CHAR        0x06
+#define CP210X_SET_MHS         0x07 // Set DTR, RTS
+#define CP210X_GET_MDMSTS      0x08 // Get modem status (DTR, RTS, CTS, DSR, RI, DCD)
+#define CP210X_SET_XON         0x09
+#define CP210X_SET_XOFF        0x0A
+#define CP210X_SET_EVENTMASK   0x0B
+#define CP210X_GET_EVENTMASK   0x0C
+#define CP210X_SET_CHAR        0x0D
+#define CP210X_GET_CHARS       0x0E
+#define CP210X_GET_PROPS       0x0F
+#define CP210X_GET_COMM_STATUS 0x10
+#define CP210X_RESET           0x11
+#define CP210X_PURGE           0x12
+#define CP210X_SET_FLOW        0x13
+#define CP210X_GET_FLOW        0x14
+#define CP210X_EMBED_EVENTS    0x15
+#define CP210X_GET_EVENTSTATE  0x16
+#define CP210X_SET_CHARS       0x19
+#define CP210X_GET_BAUDRATE    0x1D
+#define CP210X_SET_BAUDRATE    0x1E
+#define CP210X_VENDOR_SPECIFIC 0xFF // GPIO, Recipient must be Device
+
+#endif //TUSB_CP210X_H

From 8214f0f497271116d07e874f2e5f764f1e8ebd47 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 27 Apr 2023 17:40:08 +0700
Subject: [PATCH 280/691] clean up

---
 src/class/cdc/cdc_host.c | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index f47ac4f10..ab1a10427 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -33,14 +33,6 @@
 
 #include "cdc_host.h"
 
-#if CFG_TUH_CDC_FTDI
-  #include "serial/ftdi_sio.h"
-#endif
-
-#if CFG_TUH_CDC_CP210X
-  #include "serial/cp210x.h"
-#endif
-
 // Debug level, TUSB_CFG_DEBUG must be at least this level for debug message
 #define CDCH_DEBUG   2
 
@@ -145,6 +137,8 @@ static void cdch_internal_control_complete(tuh_xfer_t* xfer);
 
 //------------- FTDI prototypes -------------//
 #if CFG_TUH_CDC_FTDI
+#include "serial/ftdi_sio.h"
+
 static uint16_t const ftdi_pids[] = { TU_FTDI_PID_LIST };
 enum {
   FTDI_PID_COUNT = sizeof(ftdi_pids) / sizeof(ftdi_pids[0])
@@ -159,6 +153,8 @@ static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tu
 
 //------------- CP210X prototypes -------------//
 #if CFG_TUH_CDC_CP210X
+#include "serial/cp210x.h"
+
 static uint16_t const cp210x_pids[] = { TU_CP210X_PID_LIST };
 enum {
   CP210X_PID_COUNT = sizeof(cp210x_pids) / sizeof(cp210x_pids[0])

From ee58278ed2502a6e9b6d2625f2fe1bf453038716 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 27 Apr 2023 23:08:25 +0700
Subject: [PATCH 281/691] add code to calculate divisor from baudrate for ftdi

---
 src/class/cdc/cdc_host.c | 35 +++++++++++++++++++++++++++++------
 1 file changed, 29 insertions(+), 6 deletions(-)

diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index ab1a10427..132b1ef09 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -847,13 +847,36 @@ static bool ftdi_sio_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state
   return true;
 }
 
+static uint32_t ftdi_232bm_baud_base_to_divisor(uint32_t baud, uint32_t base)
+{
+  const uint8_t divfrac[8] = { 0, 3, 2, 4, 1, 5, 6, 7 };
+  uint32_t divisor;
+
+  /* divisor shifted 3 bits to the left */
+  uint32_t divisor3 = base / (2 * baud);
+  divisor = (divisor3 >> 3);
+  divisor |= (uint32_t) divfrac[divisor3 & 0x7] << 14;
+
+  /* Deal with special cases for highest baud rates. */
+  if (divisor == 1) { /* 1.0 */
+    divisor = 0;
+  }
+  else if (divisor == 0x4001) { /* 1.5 */
+    divisor = 1;
+  }
+
+  return divisor;
+}
+
+static uint32_t ftdi_232bm_baud_to_divisor(uint32_t baud)
+{
+  return ftdi_232bm_baud_base_to_divisor(baud, 48000000u);
+}
+
 static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
-  // TODO baudrate to baud divisor
-  (void) baudrate;
-  uint16_t divisor = 0x4138; // FIXME hardcoded to 9600 baud
-
-  TU_LOG_CDCH("CDC FTDI Set BaudRate = %u, divisor = %u\n", baudrate, divisor);
+  uint16_t const divisor = (uint16_t) ftdi_232bm_baud_to_divisor(baudrate);
+  TU_LOG_CDCH("CDC FTDI Set BaudRate = %lu, divisor = 0x%04x\n", baudrate, divisor);
 
   p_cdc->user_control_cb = complete_cb;
   TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_SET_BAUD_RATE, divisor, cdch_internal_control_complete, user_data));
@@ -985,7 +1008,7 @@ static bool cp210x_ifc_enable(cdch_interface_t* p_cdc, uint16_t enabled, tuh_xfe
 }
 
 static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  TU_LOG_CDCH("CDC CP210x Set BaudRate = %u\n", baudrate);
+  TU_LOG_CDCH("CDC CP210x Set BaudRate = %lu\n", baudrate);
   baudrate = tu_htole32(baudrate);
   return cp210x_set_request(p_cdc, CP210X_SET_BAUDRATE, 0, (uint8_t *) &baudrate, 4, complete_cb, user_data);
 }

From 732686cc109aea9527d3133c3b8e61dc045dc233 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 27 Apr 2023 23:22:10 +0700
Subject: [PATCH 282/691] add tuh_cdc_set_baudrate()

---
 src/class/cdc/cdc_host.c | 43 +++++++++++++++++++++++++++++++---------
 src/class/cdc/cdc_host.h | 13 ++++++++----
 2 files changed, 43 insertions(+), 13 deletions(-)

diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index 132b1ef09..4c87ff1ad 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -126,11 +126,6 @@ static cdch_interface_t* make_new_itf(uint8_t daddr, tusb_desc_interface_t const
   return NULL;
 }
 
-static inline bool support_line_request(cdch_interface_t const* p_cdc) {
-  return (p_cdc->serial_protocol == SERIAL_PROTOCOL_ACM && p_cdc->acm_capability.support_line_request) ||
-          (p_cdc->serial_protocol == SERIAL_PROTOCOL_FTDI);
-}
-
 static bool open_ep_stream_pair(cdch_interface_t* p_cdc , tusb_desc_endpoint_t const *desc_ep);
 static void set_config_complete(cdch_interface_t * p_cdc, uint8_t idx, uint8_t itf_num);
 static void cdch_internal_control_complete(tuh_xfer_t* xfer);
@@ -391,10 +386,11 @@ static bool acm_set_control_line_state(cdch_interface_t* p_cdc, uint16_t line_st
 bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
   cdch_interface_t* p_cdc = get_itf(idx);
-  TU_VERIFY(p_cdc && support_line_request(p_cdc));
+  TU_VERIFY(p_cdc);
 
   switch(p_cdc->serial_protocol) {
     case SERIAL_PROTOCOL_ACM:
+      TU_VERIFY(p_cdc->acm_capability.support_line_request);
       return acm_set_control_line_state(p_cdc, line_state, complete_cb, user_data);
 
     #if CFG_TUH_CDC_FTDI
@@ -413,6 +409,8 @@ bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_c
 }
 
 bool acm_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  TU_LOG_CDCH("CDC ACM Set Line Conding\r\n");
+
   tusb_control_request_t const request = {
     .bmRequestType_bit = {
       .recipient = TUSB_REQ_RCPT_INTERFACE,
@@ -446,11 +444,11 @@ bool acm_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_
 bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
   cdch_interface_t* p_cdc = get_itf(idx);
-  TU_VERIFY(p_cdc && support_line_request(p_cdc));
-  TU_LOG_CDCH("CDC Set Line Conding\r\n");
+  TU_VERIFY(p_cdc);
 
   switch(p_cdc->serial_protocol) {
     case SERIAL_PROTOCOL_ACM:
+      TU_VERIFY(p_cdc->acm_capability.support_line_request);
       return acm_set_line_coding(p_cdc, line_coding, complete_cb, user_data);
 
     #if CFG_TUH_CDC_FTDI
@@ -468,6 +466,33 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding,
   }
 }
 
+bool tuh_cdc_set_baudrate(uint8_t idx, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  cdch_interface_t* p_cdc = get_itf(idx);
+  TU_VERIFY(p_cdc);
+
+  switch(p_cdc->serial_protocol) {
+    case SERIAL_PROTOCOL_ACM: {
+      TU_VERIFY(p_cdc->acm_capability.support_line_request);
+      cdc_line_coding_t line_coding = p_cdc->line_coding;
+      line_coding.bit_rate = baudrate;
+      return acm_set_line_coding(p_cdc, &line_coding, complete_cb, user_data);
+    }
+
+    #if CFG_TUH_CDC_FTDI
+    case SERIAL_PROTOCOL_FTDI:
+      // FTDI need to set baud rate and data bits, parity, stop bits separately
+      return ftdi_sio_set_baudrate(p_cdc, baudrate, complete_cb, user_data);
+    #endif
+
+    #if CFG_TUH_CDC_CP210X
+    case SERIAL_PROTOCOL_CP210X:
+      return cp210x_set_baudrate(p_cdc, baudrate, complete_cb, user_data);
+    #endif
+
+    default: return false;
+  }
+}
+
 //--------------------------------------------------------------------+
 // CLASS-USBH API
 //--------------------------------------------------------------------+
@@ -722,7 +747,7 @@ static void process_acm_config(tuh_xfer_t* xfer)
       if (p_cdc->acm_capability.support_line_request)
       {
         cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
-        TU_ASSERT(tuh_cdc_set_line_coding(idx, &line_coding, process_acm_config, CONFIG_ACM_COMPLETE), );
+        TU_ASSERT(acm_set_line_coding(p_cdc, &line_coding, process_acm_config, CONFIG_ACM_COMPLETE), );
         break;
       }
       #endif
diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h
index a1e78f158..971ebe2ae 100644
--- a/src/class/cdc/cdc_host.h
+++ b/src/class/cdc/cdc_host.h
@@ -140,22 +140,27 @@ bool tuh_cdc_read_clear (uint8_t idx);
 // Request to Set Control Line State: DTR (bit 0), RTS (bit 1)
 bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 
-// Request to Set Line Coding
+// Request to set baudrate
+bool tuh_cdc_set_baudrate(uint8_t idx, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+// Request to Set Line Coding (ACM only)
 bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 
-// Request to Get Line Coding
+// Request to Get Line Coding (ACM only)
 // Should only use if tuh_cdc_set_line_coding() / tuh_cdc_get_line_coding() never got invoked and
 // CFG_TUH_CDC_LINE_CODING_ON_ENUM is not defined
 // bool tuh_cdc_get_line_coding(uint8_t idx, cdc_line_coding_t* coding);
 
 // Connect by set both DTR, RTS
-static inline bool tuh_cdc_connect(uint8_t idx, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+TU_ATTR_ALWAYS_INLINE static inline
+bool tuh_cdc_connect(uint8_t idx, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
   return tuh_cdc_set_control_line_state(idx, CDC_CONTROL_LINE_STATE_DTR | CDC_CONTROL_LINE_STATE_RTS, complete_cb, user_data);
 }
 
 // Disconnect by clear both DTR, RTS
-static inline bool tuh_cdc_disconnect(uint8_t idx, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+TU_ATTR_ALWAYS_INLINE static inline
+bool tuh_cdc_disconnect(uint8_t idx, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
   return tuh_cdc_set_control_line_state(idx, 0x00, complete_cb, user_data);
 }

From 8f4797663902cd445994ed48f2cd093161af68f2 Mon Sep 17 00:00:00 2001
From: Jean-Baptiste Theou <jb@thing.com>
Date: Thu, 27 Apr 2023 15:48:15 -1000
Subject: [PATCH 283/691] cdc: fix line_coding aligment

While calling tud_cdc_n_get_line_coding, the structure is copied into
the destination.

Dump of assembler code for function tud_cdc_n_get_line_coding:
   0x000193f4 <+0>:	mov.w	r2, #2112	@ 0x840
0x000193f8 <+4>:	ldr	r3, [pc, #20]	@ (0x19410
<tud_cdc_n_get_line_coding+28>)
   0x000193fa <+6>:	mla	r0, r2, r0, r3
=> 0x000193fe <+10>:	ldr.w	r3, [r0, #6]
   0x00019402 <+14>:	str	r3, [r1, #0]

On some platform (tested on LPC55S28), the address needs to be 4-bytes
aligned. Without this, the address is

(gdb) p &_cdcd_itf.line_coding
$3 = (cdc_line_coding_t *) 0x40100006 <_cdcd_itf+6>

which leads to a HardFault. With this fix

(gdb) p &_cdcd_itf.line_coding
$5 = (cdc_line_coding_t *) 0x40100008 <_cdcd_itf+8>

and the function can be called properly

Signed-off-by: Jean-Baptiste Theou <jb@thing.com>
---
 src/class/cdc/cdc_device.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c
index a82ef1d62..bf15d0d97 100644
--- a/src/class/cdc/cdc_device.c
+++ b/src/class/cdc/cdc_device.c
@@ -53,7 +53,7 @@ typedef struct
 
   /*------------- From this point, data is not cleared by bus reset -------------*/
   char    wanted_char;
-  cdc_line_coding_t line_coding;
+  CFG_TUSB_MEM_ALIGN cdc_line_coding_t line_coding;
 
   // FIFO
   tu_fifo_t rx_ff;

From 190acc1fb0579d3e097ba2b0b96033740ecee26e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 28 Apr 2023 11:12:03 +0700
Subject: [PATCH 284/691] add aligned(4) for cdc_line_coding_t

---
 src/class/cdc/cdc_device.c | 2 +-
 src/class/cdc/cdc_host.c   | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c
index bf15d0d97..5adce521d 100644
--- a/src/class/cdc/cdc_device.c
+++ b/src/class/cdc/cdc_device.c
@@ -53,7 +53,7 @@ typedef struct
 
   /*------------- From this point, data is not cleared by bus reset -------------*/
   char    wanted_char;
-  CFG_TUSB_MEM_ALIGN cdc_line_coding_t line_coding;
+  TU_ATTR_ALIGNED(4) cdc_line_coding_t line_coding;
 
   // FIFO
   tu_fifo_t rx_ff;
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index 4c87ff1ad..e2447d033 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -58,8 +58,8 @@ typedef struct {
   cdc_acm_capability_t acm_capability;
   uint8_t ep_notif;
 
-  cdc_line_coding_t line_coding;  // Baudrate, stop bits, parity, data width
-  uint8_t line_state;             // DTR (bit0), RTS (bit1)
+  uint8_t line_state;                               // DTR (bit0), RTS (bit1)
+  TU_ATTR_ALIGNED(4) cdc_line_coding_t line_coding; // Baudrate, stop bits, parity, data width
 
   tuh_xfer_cb_t user_control_cb;
 

From 090078542fd8b9a11d72163b11b99e7d25f63072 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 28 Apr 2023 11:34:12 +0700
Subject: [PATCH 285/691] update osal note

---
 docs/contributing/porting.rst | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/docs/contributing/porting.rst b/docs/contributing/porting.rst
index 9ec392661..f81d98782 100644
--- a/docs/contributing/porting.rst
+++ b/docs/contributing/porting.rst
@@ -62,14 +62,14 @@ Feel free to skip this until you want to verify your demo code is running. To im
 OS Abstraction Layer (OSAL)
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-The OS Abstraction Layer is responsible for providing basic data structures for TinyUSB that may allow for concurrency when used with an RTOS. Without an RTOS it simply handles concurrency issues between the main code and interrupts.
+The OS Abstraction Layer is responsible for providing basic data structures for TinyUSB that may allow for concurrency when used with an RTOS. Without an RTOS it simply handles concurrency issues between the main code and interrupts. The code is almost entirely agnostic of MCU and lives in ``src/osal``.
 
-The code is almost entirely agnostic of MCU and lives in ``src/osal``.
+In RTOS configurations, tud_task()/tuh_task() blocks behind a synchronization structure when the event queue is empty, so that the scheduler may give the CPU to a different task. To take advantage of the library's capability to yield the CPU when there are no actionable USB device events, ensure that the `CFG_TUSB_OS` symbol is defined, e.g `OPT_OS_FREERTOS` enables the FreeRTOS scheduler to schedule other threads than that which calls `tud_task()/tuh_task()`.
 
 Device API
 ^^^^^^^^^^
 
-After the USB device is setup, the USB device code works by processing events on the main thread (by calling ``tud_task``\ ). In RTOS configurations, tud_task blocks behind a synchronization structure when the event queue is empty, so that the scheduler may give the CPU to a different task. To take advantage of the library's capability to yield the CPU when there are no actionable USB device events, ensure that the `CFG_TUSB_OS` symbol is defined in your modified ``tusb_config.h``. For example `#define CFG_TUSB_OS  OPT_OS_FREERTOS` enables the FreeRTOS scheduler to schedule other threads than that which calls `tud_task`. These events are queued by the USB interrupt handler. So, there are three parts to the device low-level API: device setup, endpoint setup and interrupt processing. 
+After the USB device is setup, the USB device code works by processing events on the main thread (by calling ``tud_task``\ ). These events are queued by the USB interrupt handler. So, there are three parts to the device low-level API: device setup, endpoint setup and interrupt processing.
 
 All of the code for the low-level device API is in ``src/portable/<vendor>/<chip family>/dcd_<chip family>.c``.
 

From 0a43a7b418dc9ba510505eef6abbc2da6f9151e5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 28 Apr 2023 19:06:08 +0700
Subject: [PATCH 286/691] improve host serial drivers

- tuh_control_xfer() update xfer result to user_data if complete
callback = NULL (sync/blocking)
- refactor host serial driver for acm/ftdi/cp210x
---
 src/class/cdc/cdc_host.c | 638 ++++++++++++++++++++-------------------
 src/class/cdc/cdc_host.h |   6 +-
 src/host/usbh.c          |  56 +---
 3 files changed, 347 insertions(+), 353 deletions(-)

diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index e2447d033..b25bc5512 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -39,22 +39,16 @@
 #define TU_LOG_CDCH(...)   TU_LOG(CDCH_DEBUG, __VA_ARGS__)
 
 //--------------------------------------------------------------------+
-// MACRO CONSTANT TYPEDEF
+// Host CDC Interface
 //--------------------------------------------------------------------+
 
-enum {
-  SERIAL_PROTOCOL_ACM = 0,
-  SERIAL_PROTOCOL_FTDI,
-  SERIAL_PROTOCOL_CP210X,
-};
-
 typedef struct {
   uint8_t daddr;
   uint8_t bInterfaceNumber;
   uint8_t bInterfaceSubClass;
   uint8_t bInterfaceProtocol;
 
-  uint8_t serial_protocol;
+  uint8_t serial_drid; // Serial Driver ID
   cdc_acm_capability_t acm_capability;
   uint8_t ep_notif;
 
@@ -76,13 +70,103 @@ typedef struct {
 
 } cdch_interface_t;
 
+CFG_TUH_MEM_SECTION
+static cdch_interface_t cdch_data[CFG_TUH_CDC];
+
+//--------------------------------------------------------------------+
+// Serial Driver
+//--------------------------------------------------------------------+
+
+//------------- ACM prototypes -------------//
+static void acm_process_config(tuh_xfer_t* xfer);
+
+static bool acm_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool acm_set_control_line_state(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool acm_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
+//------------- FTDI prototypes -------------//
+#if CFG_TUH_CDC_FTDI
+#include "serial/ftdi_sio.h"
+
+static uint16_t const ftdi_pids[] = { TU_FTDI_PID_LIST };
+enum {
+  FTDI_PID_COUNT = sizeof(ftdi_pids) / sizeof(ftdi_pids[0])
+};
+
+// Store last request baudrate since divisor to baudrate is not easy
+static uint32_t _ftdi_requested_baud;
+
+static bool ftdi_open(uint8_t daddr, const tusb_desc_interface_t *itf_desc, uint16_t max_len);
+static void ftdi_process_config(tuh_xfer_t* xfer);
+
+static bool ftdi_sio_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+#endif
+
+//------------- CP210X prototypes -------------//
+#if CFG_TUH_CDC_CP210X
+#include "serial/cp210x.h"
+
+static uint16_t const cp210x_pids[] = { TU_CP210X_PID_LIST };
+enum {
+  CP210X_PID_COUNT = sizeof(cp210x_pids) / sizeof(cp210x_pids[0])
+};
+
+static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len);
+static void cp210x_process_config(tuh_xfer_t* xfer);
+
+static bool cp210x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+#endif
+
+enum {
+  SERIAL_DRIVER_ACM = 0,
+
+#if CFG_TUH_CDC_FTDI
+  SERIAL_DRIVER_FTDI,
+#endif
+
+#if CFG_TUH_CDC_CP210X
+  SERIAL_DRIVER_CP210X,
+#endif
+};
+
+typedef struct {
+  void (*const process_set_config)(tuh_xfer_t* xfer);
+  bool (*const set_control_line_state)(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+  bool (*const set_baudrate)(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+} cdch_serial_driver_t;
+
+// Note driver list must be in the same order as SERIAL_DRIVER enum
+static const cdch_serial_driver_t serial_drivers[] = {
+  { .process_set_config     = acm_process_config,
+    .set_control_line_state = acm_set_control_line_state,
+    .set_baudrate           = acm_set_baudrate
+  },
+
+  #if CFG_TUH_CDC_FTDI
+  { .process_set_config     = ftdi_process_config,
+    .set_control_line_state = ftdi_sio_set_modem_ctrl,
+    .set_baudrate           = ftdi_sio_set_baudrate
+  },
+  #endif
+
+  #if CFG_TUH_CDC_CP210X
+  { .process_set_config     = cp210x_process_config,
+    .set_control_line_state = cp210x_set_modem_ctrl,
+    .set_baudrate           = cp210x_set_baudrate
+  },
+  #endif
+};
+
+enum {
+  SERIAL_DRIVER_COUNT = sizeof(serial_drivers) / sizeof(serial_drivers[0])
+};
+
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
 
-CFG_TUH_MEM_SECTION
-static cdch_interface_t cdch_data[CFG_TUH_CDC];
-
 static inline cdch_interface_t* get_itf(uint8_t idx)
 {
   TU_ASSERT(idx < CFG_TUH_CDC, NULL);
@@ -130,39 +214,6 @@ static bool open_ep_stream_pair(cdch_interface_t* p_cdc , tusb_desc_endpoint_t c
 static void set_config_complete(cdch_interface_t * p_cdc, uint8_t idx, uint8_t itf_num);
 static void cdch_internal_control_complete(tuh_xfer_t* xfer);
 
-//------------- FTDI prototypes -------------//
-#if CFG_TUH_CDC_FTDI
-#include "serial/ftdi_sio.h"
-
-static uint16_t const ftdi_pids[] = { TU_FTDI_PID_LIST };
-enum {
-  FTDI_PID_COUNT = sizeof(ftdi_pids) / sizeof(ftdi_pids[0])
-};
-
-static bool ftdi_open(uint8_t daddr, const tusb_desc_interface_t *itf_desc, uint16_t max_len);
-static void process_ftdi_config(tuh_xfer_t* xfer);
-
-static bool ftdi_sio_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-#endif
-
-//------------- CP210X prototypes -------------//
-#if CFG_TUH_CDC_CP210X
-#include "serial/cp210x.h"
-
-static uint16_t const cp210x_pids[] = { TU_CP210X_PID_LIST };
-enum {
-  CP210X_PID_COUNT = sizeof(cp210x_pids) / sizeof(cp210x_pids[0])
-};
-
-static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len);
-static void process_cp210x_config(tuh_xfer_t* xfer);
-
-static bool cp210x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-#endif
-
-
 //--------------------------------------------------------------------+
 // APPLICATION API
 //--------------------------------------------------------------------+
@@ -322,175 +373,86 @@ static void cdch_internal_control_complete(tuh_xfer_t* xfer)
 
   if (xfer->result == XFER_RESULT_SUCCESS)
   {
-    if (p_cdc->serial_protocol == SERIAL_PROTOCOL_ACM) {
-      switch (xfer->setup->bRequest) {
-        case CDC_REQUEST_SET_CONTROL_LINE_STATE:
-          p_cdc->line_state = (uint8_t) tu_le16toh(xfer->setup->wValue);
-          break;
+    switch (p_cdc->serial_drid) {
+      case SERIAL_DRIVER_ACM:
+        switch (xfer->setup->bRequest) {
+          case CDC_REQUEST_SET_CONTROL_LINE_STATE:
+            p_cdc->line_state = (uint8_t) tu_le16toh(xfer->setup->wValue);
+            break;
 
-        case CDC_REQUEST_SET_LINE_CODING: {
-          uint16_t const len = tu_min16(sizeof(cdc_line_coding_t), tu_le16toh(xfer->setup->wLength));
-          memcpy(&p_cdc->line_coding, xfer->buffer, len);
+          case CDC_REQUEST_SET_LINE_CODING: {
+            uint16_t const len = tu_min16(sizeof(cdc_line_coding_t), tu_le16toh(xfer->setup->wLength));
+            memcpy(&p_cdc->line_coding, xfer->buffer, len);
+          }
+            break;
+
+          default: break;
         }
-          break;
+        break;
 
-        default: break;
-      }
-    }
-    #if CFG_TUH_CDC_FTDI
-    else if (p_cdc->serial_protocol == SERIAL_PROTOCOL_FTDI) {
-      switch (xfer->setup->bRequest) {
-        case FTDI_SIO_MODEM_CTRL:
-          p_cdc->line_state = (uint8_t) (tu_le16toh(xfer->setup->wValue) & 0x00ff);
-          break;
+      #if CFG_TUH_CDC_FTDI
+      case SERIAL_DRIVER_FTDI:
+        switch (xfer->setup->bRequest) {
+          case FTDI_SIO_MODEM_CTRL:
+            p_cdc->line_state = (uint8_t) (tu_le16toh(xfer->setup->wValue) & 0x00ff);
+            break;
 
-        default: break;
-      }
+          case FTDI_SIO_SET_BAUD_RATE:
+            // convert from divisor to baudrate is not supported
+            p_cdc->line_coding.bit_rate = _ftdi_requested_baud;
+            break;
+
+          default: break;
+        }
+        break;
+      #endif
+
+      #if CFG_TUH_CDC_CP210X
+      case SERIAL_DRIVER_CP210X:
+        switch(xfer->setup->bRequest) {
+          case CP210X_SET_MHS:
+            p_cdc->line_state = (uint8_t) (tu_le16toh(xfer->setup->wValue) & 0x00ff);
+            break;
+
+          case CP210X_SET_BAUDRATE: {
+            uint32_t baudrate;
+            memcpy(&baudrate, xfer->buffer, sizeof(uint32_t));
+            p_cdc->line_coding.bit_rate = tu_le32toh(baudrate);
+          }
+            break;
+        }
+        break;
+      #endif
+
+      default: break;
     }
-    #endif
   }
 
   xfer->complete_cb = p_cdc->user_control_cb;
-  xfer->complete_cb(xfer);
-}
-
-static bool acm_set_control_line_state(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  TU_LOG_CDCH("CDC ACM Set Control Line State\r\n");
-  tusb_control_request_t const request = {
-    .bmRequestType_bit = {
-      .recipient = TUSB_REQ_RCPT_INTERFACE,
-      .type      = TUSB_REQ_TYPE_CLASS,
-      .direction = TUSB_DIR_OUT
-    },
-    .bRequest = CDC_REQUEST_SET_CONTROL_LINE_STATE,
-    .wValue   = tu_htole16(line_state),
-    .wIndex   = tu_htole16((uint16_t) p_cdc->bInterfaceNumber),
-    .wLength  = 0
-  };
-
-  p_cdc->user_control_cb = complete_cb;
-
-  tuh_xfer_t xfer = {
-    .daddr       = p_cdc->daddr,
-    .ep_addr     = 0,
-    .setup       = &request,
-    .buffer      = NULL,
-    .complete_cb = cdch_internal_control_complete,
-    .user_data   = user_data
-  };
-
-  TU_ASSERT(tuh_control_xfer(&xfer));
-  return true;
-}
-
-bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
-{
-  cdch_interface_t* p_cdc = get_itf(idx);
-  TU_VERIFY(p_cdc);
-
-  switch(p_cdc->serial_protocol) {
-    case SERIAL_PROTOCOL_ACM:
-      TU_VERIFY(p_cdc->acm_capability.support_line_request);
-      return acm_set_control_line_state(p_cdc, line_state, complete_cb, user_data);
-
-    #if CFG_TUH_CDC_FTDI
-    case SERIAL_PROTOCOL_FTDI:
-      return ftdi_sio_set_modem_ctrl(p_cdc, line_state, complete_cb, user_data);
-    #endif
-
-    #if CFG_TUH_CDC_CP210X
-    case SERIAL_PROTOCOL_CP210X:
-      return ftdi_sio_set_modem_ctrl(p_cdc, line_state, complete_cb, user_data);
-    #endif
-
-    default:
-      return false;
+  if (xfer->complete_cb) {
+    xfer->complete_cb(xfer);
   }
 }
 
-bool acm_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  TU_LOG_CDCH("CDC ACM Set Line Conding\r\n");
+bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  cdch_interface_t* p_cdc = get_itf(idx);
+  TU_VERIFY(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
+  return serial_drivers[p_cdc->serial_drid].set_control_line_state(p_cdc, line_state, complete_cb, user_data);
+}
 
-  tusb_control_request_t const request = {
-    .bmRequestType_bit = {
-      .recipient = TUSB_REQ_RCPT_INTERFACE,
-      .type      = TUSB_REQ_TYPE_CLASS,
-      .direction = TUSB_DIR_OUT
-    },
-    .bRequest = CDC_REQUEST_SET_LINE_CODING,
-    .wValue   = 0,
-    .wIndex   = tu_htole16(p_cdc->bInterfaceNumber),
-    .wLength  = tu_htole16(sizeof(cdc_line_coding_t))
-  };
-
-  // use usbh enum buf to hold line coding since user line_coding variable does not live long enough
-  uint8_t* enum_buf = usbh_get_enum_buf();
-  memcpy(enum_buf, line_coding, sizeof(cdc_line_coding_t));
-
-  p_cdc->user_control_cb = complete_cb;
-  tuh_xfer_t xfer = {
-    .daddr       = p_cdc->daddr,
-    .ep_addr     = 0,
-    .setup       = &request,
-    .buffer      = enum_buf,
-    .complete_cb = cdch_internal_control_complete,
-    .user_data   = user_data
-  };
-
-  TU_ASSERT(tuh_control_xfer(&xfer));
-  return true;
+bool tuh_cdc_set_baudrate(uint8_t idx, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  cdch_interface_t* p_cdc = get_itf(idx);
+  TU_VERIFY(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
+  return serial_drivers[p_cdc->serial_drid].set_baudrate(p_cdc, baudrate, complete_cb, user_data);
 }
 
 bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
   cdch_interface_t* p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc);
-
-  switch(p_cdc->serial_protocol) {
-    case SERIAL_PROTOCOL_ACM:
-      TU_VERIFY(p_cdc->acm_capability.support_line_request);
-      return acm_set_line_coding(p_cdc, line_coding, complete_cb, user_data);
-
-    #if CFG_TUH_CDC_FTDI
-    case SERIAL_PROTOCOL_FTDI:
-      // FTDI need to set baud rate and data bits, parity, stop bits separately
-      return ftdi_sio_set_baudrate(p_cdc, line_coding->bit_rate, complete_cb, user_data);
-    #endif
-
-    #if CFG_TUH_CDC_CP210X
-    case SERIAL_PROTOCOL_CP210X:
-      return cp210x_set_baudrate(p_cdc, line_coding->bit_rate, complete_cb, user_data);
-    #endif
-
-    default: return false;
-  }
-}
-
-bool tuh_cdc_set_baudrate(uint8_t idx, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  cdch_interface_t* p_cdc = get_itf(idx);
-  TU_VERIFY(p_cdc);
-
-  switch(p_cdc->serial_protocol) {
-    case SERIAL_PROTOCOL_ACM: {
-      TU_VERIFY(p_cdc->acm_capability.support_line_request);
-      cdc_line_coding_t line_coding = p_cdc->line_coding;
-      line_coding.bit_rate = baudrate;
-      return acm_set_line_coding(p_cdc, &line_coding, complete_cb, user_data);
-    }
-
-    #if CFG_TUH_CDC_FTDI
-    case SERIAL_PROTOCOL_FTDI:
-      // FTDI need to set baud rate and data bits, parity, stop bits separately
-      return ftdi_sio_set_baudrate(p_cdc, baudrate, complete_cb, user_data);
-    #endif
-
-    #if CFG_TUH_CDC_CP210X
-    case SERIAL_PROTOCOL_CP210X:
-      return cp210x_set_baudrate(p_cdc, baudrate, complete_cb, user_data);
-    #endif
-
-    default: return false;
-  }
+  // only ACM support this set line coding request
+  TU_VERIFY(p_cdc->serial_drid == SERIAL_DRIVER_ACM && p_cdc->acm_capability.support_line_request);
+  return acm_set_line_coding(p_cdc, line_coding, complete_cb, user_data);
 }
 
 //--------------------------------------------------------------------+
@@ -561,7 +523,7 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t
 
     #if CFG_TUH_CDC_FTDI
     // FTDI reserve 2 bytes for status
-    if (p_cdc->serial_protocol == SERIAL_PROTOCOL_FTDI) {
+    if (p_cdc->serial_drid == SERIAL_DRIVER_FTDI) {
       uint8_t status[2];
       tu_edpt_stream_read(&p_cdc->stream.rx, status, 2);
       (void) status; // TODO handle status
@@ -587,15 +549,10 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t
 //--------------------------------------------------------------------+
 // Enumeration
 //--------------------------------------------------------------------+
-enum
-{
-  // ACM
-  CONFIG_ACM_SET_CONTROL_LINE_STATE = 0,
-  CONFIG_ACM_SET_LINE_CODING,
-  CONFIG_ACM_COMPLETE,
-};
 
-static bool open_ep_stream_pair(cdch_interface_t* p_cdc , tusb_desc_endpoint_t const *desc_ep)
+static bool acm_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len);
+
+static bool open_ep_stream_pair(cdch_interface_t* p_cdc, tusb_desc_endpoint_t const *desc_ep)
 {
   for(size_t i=0; i<2; i++)
   {
@@ -618,57 +575,6 @@ static bool open_ep_stream_pair(cdch_interface_t* p_cdc , tusb_desc_endpoint_t c
   return true;
 }
 
-static bool acm_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len)
-{
-  uint8_t const * p_desc_end = ((uint8_t const*) itf_desc) + max_len;
-
-  cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
-  TU_VERIFY(p_cdc);
-
-  p_cdc->serial_protocol = SERIAL_PROTOCOL_ACM;
-
-  //------------- Control Interface -------------//
-  uint8_t const * p_desc = tu_desc_next(itf_desc);
-
-  // Communication Functional Descriptors
-  while( (p_desc < p_desc_end) && (TUSB_DESC_CS_INTERFACE == tu_desc_type(p_desc)) )
-  {
-    if ( CDC_FUNC_DESC_ABSTRACT_CONTROL_MANAGEMENT == cdc_functional_desc_typeof(p_desc) )
-    {
-      // save ACM bmCapabilities
-      p_cdc->acm_capability = ((cdc_desc_func_acm_t const *) p_desc)->bmCapabilities;
-    }
-
-    p_desc = tu_desc_next(p_desc);
-  }
-
-  // Open notification endpoint of control interface if any
-  if (itf_desc->bNumEndpoints == 1)
-  {
-    TU_ASSERT(TUSB_DESC_ENDPOINT == tu_desc_type(p_desc));
-    tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) p_desc;
-
-    TU_ASSERT( tuh_edpt_open(daddr, desc_ep) );
-    p_cdc->ep_notif = desc_ep->bEndpointAddress;
-
-    p_desc = tu_desc_next(p_desc);
-  }
-
-  //------------- Data Interface (if any) -------------//
-  if ( (TUSB_DESC_INTERFACE == tu_desc_type(p_desc)) &&
-       (TUSB_CLASS_CDC_DATA == ((tusb_desc_interface_t const *) p_desc)->bInterfaceClass) )
-  {
-    // next to endpoint descriptor
-    p_desc = tu_desc_next(p_desc);
-
-    // data endpoints expected to be in pairs
-    TU_ASSERT(open_ep_stream_pair(p_cdc, (tusb_desc_endpoint_t const *) p_desc));
-  }
-
-  return true;
-}
-
-
 bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len)
 {
   (void) rhport;
@@ -721,7 +627,88 @@ static void set_config_complete(cdch_interface_t * p_cdc, uint8_t idx, uint8_t i
   usbh_driver_set_config_complete(p_cdc->daddr, itf_num);
 }
 
-static void process_acm_config(tuh_xfer_t* xfer)
+
+bool cdch_set_config(uint8_t daddr, uint8_t itf_num)
+{
+  tusb_control_request_t request;
+  request.wIndex = tu_htole16((uint16_t) itf_num);
+
+  // fake transfer to kick-off process
+  tuh_xfer_t xfer;
+  xfer.daddr  = daddr;
+  xfer.result = XFER_RESULT_SUCCESS;
+  xfer.setup  = &request;
+  xfer.user_data = 0; // initial state
+
+  uint8_t const idx = tuh_cdc_itf_get_index(daddr, itf_num);
+  cdch_interface_t * p_cdc = get_itf(idx);
+  TU_ASSERT(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
+
+  serial_drivers[p_cdc->serial_drid].process_set_config(&xfer);
+  return true;
+}
+
+//--------------------------------------------------------------------+
+// ACM
+//--------------------------------------------------------------------+
+
+enum {
+  CONFIG_ACM_SET_CONTROL_LINE_STATE = 0,
+  CONFIG_ACM_SET_LINE_CODING,
+  CONFIG_ACM_COMPLETE,
+};
+
+static bool acm_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len)
+{
+  uint8_t const * p_desc_end = ((uint8_t const*) itf_desc) + max_len;
+
+  cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
+  TU_VERIFY(p_cdc);
+
+  p_cdc->serial_drid = SERIAL_DRIVER_ACM;
+
+  //------------- Control Interface -------------//
+  uint8_t const * p_desc = tu_desc_next(itf_desc);
+
+  // Communication Functional Descriptors
+  while( (p_desc < p_desc_end) && (TUSB_DESC_CS_INTERFACE == tu_desc_type(p_desc)) )
+  {
+    if ( CDC_FUNC_DESC_ABSTRACT_CONTROL_MANAGEMENT == cdc_functional_desc_typeof(p_desc) )
+    {
+      // save ACM bmCapabilities
+      p_cdc->acm_capability = ((cdc_desc_func_acm_t const *) p_desc)->bmCapabilities;
+    }
+
+    p_desc = tu_desc_next(p_desc);
+  }
+
+  // Open notification endpoint of control interface if any
+  if (itf_desc->bNumEndpoints == 1)
+  {
+    TU_ASSERT(TUSB_DESC_ENDPOINT == tu_desc_type(p_desc));
+    tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) p_desc;
+
+    TU_ASSERT( tuh_edpt_open(daddr, desc_ep) );
+    p_cdc->ep_notif = desc_ep->bEndpointAddress;
+
+    p_desc = tu_desc_next(p_desc);
+  }
+
+  //------------- Data Interface (if any) -------------//
+  if ( (TUSB_DESC_INTERFACE == tu_desc_type(p_desc)) &&
+       (TUSB_CLASS_CDC_DATA == ((tusb_desc_interface_t const *) p_desc)->bInterfaceClass) )
+  {
+    // next to endpoint descriptor
+    p_desc = tu_desc_next(p_desc);
+
+    // data endpoints expected to be in pairs
+    TU_ASSERT(open_ep_stream_pair(p_cdc, (tusb_desc_endpoint_t const *) p_desc));
+  }
+
+  return true;
+}
+
+static void acm_process_config(tuh_xfer_t* xfer)
 {
   uintptr_t const state = xfer->user_data;
   uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
@@ -735,72 +722,103 @@ static void process_acm_config(tuh_xfer_t* xfer)
       #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
       if (p_cdc->acm_capability.support_line_request)
       {
-        TU_ASSERT(acm_set_control_line_state(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_acm_config,
-                                                 CONFIG_ACM_SET_LINE_CODING), );
+        TU_ASSERT(acm_set_control_line_state(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, acm_process_config,
+                                             CONFIG_ACM_SET_LINE_CODING), );
         break;
       }
-      #endif
+          #endif
       TU_ATTR_FALLTHROUGH;
 
     case CONFIG_ACM_SET_LINE_CODING:
-      #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
+        #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
       if (p_cdc->acm_capability.support_line_request)
       {
         cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
-        TU_ASSERT(acm_set_line_coding(p_cdc, &line_coding, process_acm_config, CONFIG_ACM_COMPLETE), );
+        TU_ASSERT(acm_set_line_coding(p_cdc, &line_coding, acm_process_config, CONFIG_ACM_COMPLETE), );
         break;
       }
-      #endif
+        #endif
       TU_ATTR_FALLTHROUGH;
 
     case CONFIG_ACM_COMPLETE:
       // itf_num+1 to account for data interface as well
       set_config_complete(p_cdc, idx, itf_num+1);
-    break;
+      break;
 
     default: break;
   }
 }
 
-bool cdch_set_config(uint8_t daddr, uint8_t itf_num)
-{
-  tusb_control_request_t request;
-  request.wIndex = tu_htole16((uint16_t) itf_num);
+static bool acm_set_control_line_state(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  TU_VERIFY(p_cdc->acm_capability.support_line_request);
+  TU_LOG_CDCH("CDC ACM Set Control Line State\r\n");
+  tusb_control_request_t const request = {
+    .bmRequestType_bit = {
+      .recipient = TUSB_REQ_RCPT_INTERFACE,
+      .type      = TUSB_REQ_TYPE_CLASS,
+      .direction = TUSB_DIR_OUT
+    },
+    .bRequest = CDC_REQUEST_SET_CONTROL_LINE_STATE,
+    .wValue   = tu_htole16(line_state),
+    .wIndex   = tu_htole16((uint16_t) p_cdc->bInterfaceNumber),
+    .wLength  = 0
+  };
 
-  tuh_xfer_t xfer;
-  xfer.daddr  = daddr;
-  xfer.result = XFER_RESULT_SUCCESS;
-  xfer.setup  = &request;
-  xfer.user_data = 0;
+  p_cdc->user_control_cb = complete_cb;
 
-  // fake transfer to kick-off process
-  uint8_t const idx = tuh_cdc_itf_get_index(daddr, itf_num);
-  cdch_interface_t * p_cdc = get_itf(idx);
-  TU_ASSERT(p_cdc);
-
-  switch (p_cdc->serial_protocol) {
-    case SERIAL_PROTOCOL_ACM:
-      process_acm_config(&xfer);
-      break;
-
-    #if CFG_TUH_CDC_FTDI
-    case SERIAL_PROTOCOL_FTDI:
-      process_ftdi_config(&xfer);
-      break;
-    #endif
-
-    #if CFG_TUH_CDC_CP210X
-    case SERIAL_PROTOCOL_CP210X:
-      process_cp210x_config(&xfer);
-      break;
-    #endif
-
-      default: return false;
-  }
+  tuh_xfer_t xfer = {
+    .daddr       = p_cdc->daddr,
+    .ep_addr     = 0,
+    .setup       = &request,
+    .buffer      = NULL,
+    .complete_cb = cdch_internal_control_complete,
+    .user_data   = user_data
+  };
 
+  TU_ASSERT(tuh_control_xfer(&xfer));
   return true;
 }
 
+static bool acm_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  TU_LOG_CDCH("CDC ACM Set Line Conding\r\n");
+
+  tusb_control_request_t const request = {
+    .bmRequestType_bit = {
+      .recipient = TUSB_REQ_RCPT_INTERFACE,
+      .type      = TUSB_REQ_TYPE_CLASS,
+      .direction = TUSB_DIR_OUT
+    },
+    .bRequest = CDC_REQUEST_SET_LINE_CODING,
+    .wValue   = 0,
+    .wIndex   = tu_htole16(p_cdc->bInterfaceNumber),
+    .wLength  = tu_htole16(sizeof(cdc_line_coding_t))
+  };
+
+  // use usbh enum buf to hold line coding since user line_coding variable does not live long enough
+  uint8_t* enum_buf = usbh_get_enum_buf();
+  memcpy(enum_buf, line_coding, sizeof(cdc_line_coding_t));
+
+  p_cdc->user_control_cb = complete_cb;
+  tuh_xfer_t xfer = {
+    .daddr       = p_cdc->daddr,
+    .ep_addr     = 0,
+    .setup       = &request,
+    .buffer      = enum_buf,
+    .complete_cb = cdch_internal_control_complete,
+    .user_data   = user_data
+  };
+
+  TU_ASSERT(tuh_control_xfer(&xfer));
+  return true;
+}
+
+static bool acm_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  TU_VERIFY(p_cdc->acm_capability.support_line_request);
+  cdc_line_coding_t line_coding = p_cdc->line_coding;
+  line_coding.bit_rate = baudrate;
+  return acm_set_line_coding(p_cdc, &line_coding, complete_cb, user_data);
+}
+
 //--------------------------------------------------------------------+
 // FTDI
 //--------------------------------------------------------------------+
@@ -824,7 +842,7 @@ static bool ftdi_open(uint8_t daddr, const tusb_desc_interface_t *itf_desc, uint
 
   TU_LOG_CDCH("FTDI opened\r\n");
 
-  p_cdc->serial_protocol = SERIAL_PROTOCOL_FTDI;
+  p_cdc->serial_drid = SERIAL_DRIVER_FTDI;
 
   // endpoint pair
   tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
@@ -904,11 +922,13 @@ static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tu
   TU_LOG_CDCH("CDC FTDI Set BaudRate = %lu, divisor = 0x%04x\n", baudrate, divisor);
 
   p_cdc->user_control_cb = complete_cb;
+  _ftdi_requested_baud = baudrate;
   TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_SET_BAUD_RATE, divisor, cdch_internal_control_complete, user_data));
+
   return true;
 }
 
-static void process_ftdi_config(tuh_xfer_t* xfer) {
+static void ftdi_process_config(tuh_xfer_t* xfer) {
   uintptr_t const state = xfer->user_data;
   uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
   uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
@@ -918,13 +938,13 @@ static void process_ftdi_config(tuh_xfer_t* xfer) {
   switch(state) {
     // Note may need to read FTDI eeprom
     case CONFIG_FTDI_RESET:
-      TU_ASSERT(ftdi_sio_reset(p_cdc, process_ftdi_config, CONFIG_FTDI_MODEM_CTRL),);
+      TU_ASSERT(ftdi_sio_reset(p_cdc, ftdi_process_config, CONFIG_FTDI_MODEM_CTRL),);
       break;
 
     case CONFIG_FTDI_MODEM_CTRL:
       #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
       TU_ASSERT(
-        ftdi_sio_set_modem_ctrl(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_ftdi_config, CONFIG_FTDI_SET_BAUDRATE),);
+        ftdi_sio_set_modem_ctrl(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, ftdi_process_config, CONFIG_FTDI_SET_BAUDRATE),);
       break;
       #else
       TU_ATTR_FALLTHROUGH;
@@ -933,7 +953,7 @@ static void process_ftdi_config(tuh_xfer_t* xfer) {
     case CONFIG_FTDI_SET_BAUDRATE: {
       #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
       cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
-      TU_ASSERT(ftdi_sio_set_baudrate(p_cdc, line_coding.bit_rate, process_ftdi_config, CONFIG_FTDI_SET_DATA),);
+      TU_ASSERT(ftdi_sio_set_baudrate(p_cdc, line_coding.bit_rate, ftdi_process_config, CONFIG_FTDI_SET_DATA),);
       break;
       #else
       TU_ATTR_FALLTHROUGH;
@@ -986,7 +1006,7 @@ static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, ui
   TU_VERIFY(p_cdc);
 
   TU_LOG_CDCH("CP210x opened\r\n");
-  p_cdc->serial_protocol = SERIAL_PROTOCOL_CP210X;
+  p_cdc->serial_drid = SERIAL_DRIVER_CP210X;
 
   // endpoint pair
   tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
@@ -1034,8 +1054,9 @@ static bool cp210x_ifc_enable(cdch_interface_t* p_cdc, uint16_t enabled, tuh_xfe
 
 static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   TU_LOG_CDCH("CDC CP210x Set BaudRate = %lu\n", baudrate);
-  baudrate = tu_htole32(baudrate);
-  return cp210x_set_request(p_cdc, CP210X_SET_BAUDRATE, 0, (uint8_t *) &baudrate, 4, complete_cb, user_data);
+  uint32_t baud_le = tu_htole32(baudrate);
+  p_cdc->user_control_cb = complete_cb;
+  return cp210x_set_request(p_cdc, CP210X_SET_BAUDRATE, 0, (uint8_t *) &baud_le, 4, cdch_internal_control_complete, user_data);
 }
 
 static bool cp210x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
@@ -1045,7 +1066,7 @@ static bool cp210x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state,
   return cp210x_set_request(p_cdc, CP210X_SET_MHS, 0x0300 | line_state, NULL, 0, cdch_internal_control_complete, user_data);
 }
 
-static void process_cp210x_config(tuh_xfer_t* xfer) {
+static void cp210x_process_config(tuh_xfer_t* xfer) {
   uintptr_t const state   = xfer->user_data;
   uint8_t const   itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
   uint8_t const   idx     = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
@@ -1054,13 +1075,13 @@ static void process_cp210x_config(tuh_xfer_t* xfer) {
 
   switch (state) {
     case CONFIG_CP210X_IFC_ENABLE:
-      TU_ASSERT(cp210x_ifc_enable(p_cdc, 1, process_cp210x_config, CONFIG_CP210X_SET_BAUDRATE),);
+      TU_ASSERT(cp210x_ifc_enable(p_cdc, 1, cp210x_process_config, CONFIG_CP210X_SET_BAUDRATE),);
       break;
 
     case CONFIG_CP210X_SET_BAUDRATE: {
       #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
       cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
-      TU_ASSERT(cp210x_set_baudrate(p_cdc, line_coding.bit_rate, process_cp210x_config, CONFIG_CP210X_SET_LINE_CTL),);
+      TU_ASSERT(cp210x_set_baudrate(p_cdc, line_coding.bit_rate, cp210x_process_config, CONFIG_CP210X_SET_LINE_CTL),);
       break;
       #else
       TU_ATTR_FALLTHROUGH;
@@ -1078,7 +1099,8 @@ static void process_cp210x_config(tuh_xfer_t* xfer) {
 
     case CONFIG_CP210X_SET_DTR_RTS:
       #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
-      TU_ASSERT(cp210x_set_modem_ctrl(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, process_cp210x_config, CONFIG_CP210X_COMPLETE),);
+      TU_ASSERT(
+        cp210x_set_modem_ctrl(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, cp210x_process_config, CONFIG_CP210X_COMPLETE),);
       break;
       #else
       TU_ATTR_FALLTHROUGH;
diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h
index 971ebe2ae..f6cc3812f 100644
--- a/src/class/cdc/cdc_host.h
+++ b/src/class/cdc/cdc_host.h
@@ -134,7 +134,11 @@ bool tuh_cdc_read_clear (uint8_t idx);
 
 //--------------------------------------------------------------------+
 // Control Endpoint (Request) API
-// Each Function will make a USB transfer request to/from device
+// Each Function will make a USB control transfer request to/from device
+// - If complete_cb is provided, the function will return immediately and invoke
+// the callback when request is complete.
+// - If complete_cb is NULL, the function will block until request is complete.
+// In this case, user_data should be pointed to xfer_result_t to hold the transfer result.
 //--------------------------------------------------------------------+
 
 // Request to Set Control Line State: DTR (bit 0), RTS (bit 1)
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 3953d5b21..24ce47a7f 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -571,19 +571,19 @@ bool tuh_control_xfer (tuh_xfer_t* xfer)
 
     TU_ASSERT( hcd_setup_send(rhport, daddr, (uint8_t*) &_ctrl_xfer.request) );
 
-    while (result == XFER_RESULT_INVALID)
-    {
+    while (result == XFER_RESULT_INVALID) {
       // Note: this can be called within an callback ie. part of tuh_task()
       // therefore event with RTOS tuh_task() still need to be invoked
-      if (tuh_task_event_ready())
-      {
+      if (tuh_task_event_ready()) {
         tuh_task();
       }
-
       // TODO probably some timeout to prevent hanged
     }
 
-    // update transfer result
+    // update transfer result, user_data is expected to point to xfer_result_t
+    if (xfer->user_data != 0) {
+      *((xfer_result_t*) xfer->user_data) = result;
+    }
     xfer->result     = result;
     xfer->actual_len = _ctrl_xfer.actual_len;
   }
@@ -877,7 +877,7 @@ TU_ATTR_FAST_FUNC void hcd_event_handler(hcd_event_t const* event, bool in_isr)
 //--------------------------------------------------------------------+
 
 // generic helper to get a descriptor
-// if blocking, user_data could be pointed to xfer_result
+// if blocking, user_data is pointed to xfer_result
 static bool _get_descriptor(uint8_t daddr, uint8_t type, uint8_t index, uint16_t language_id, void* buffer, uint16_t len,
                             tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
@@ -905,15 +905,7 @@ static bool _get_descriptor(uint8_t daddr, uint8_t type, uint8_t index, uint16_t
     .user_data   = user_data
   };
 
-  bool const ret = tuh_control_xfer(&xfer);
-
-  // if blocking, user_data could be pointed to xfer_result
-  if ( !complete_cb && user_data )
-  {
-    *((xfer_result_t*) user_data) = xfer.result;
-  }
-
-  return ret;
+  return tuh_control_xfer(&xfer);
 }
 
 bool tuh_descriptor_get(uint8_t daddr, uint8_t type, uint8_t index, void* buffer, uint16_t len,
@@ -971,7 +963,7 @@ bool tuh_descriptor_get_serial_string(uint8_t daddr, uint16_t language_id, void*
 }
 
 // Get HID report descriptor
-// if blocking, user_data could be pointed to xfer_result
+// if blocking, user_data is pointed to xfer_result
 bool tuh_descriptor_get_hid_report(uint8_t daddr, uint8_t itf_num, uint8_t desc_type, uint8_t index, void* buffer, uint16_t len,
                                    tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
@@ -1000,15 +992,7 @@ bool tuh_descriptor_get_hid_report(uint8_t daddr, uint8_t itf_num, uint8_t desc_
     .user_data   = user_data
   };
 
-  bool const ret = tuh_control_xfer(&xfer);
-
-  // if blocking, user_data could be pointed to xfer_result
-  if ( !complete_cb && user_data )
-  {
-    *((xfer_result_t*) user_data) = xfer.result;
-  }
-
-  return ret;
+  return tuh_control_xfer(&xfer);
 }
 
 bool tuh_configuration_set(uint8_t daddr, uint8_t config_num,
@@ -1040,15 +1024,7 @@ bool tuh_configuration_set(uint8_t daddr, uint8_t config_num,
     .user_data   = user_data
   };
 
-  bool ret = tuh_control_xfer(&xfer);
-
-  // if blocking, user_data could be pointed to xfer_result
-  if ( !complete_cb && user_data )
-  {
-    *((xfer_result_t*) user_data) = xfer.result;
-  }
-
-  return ret;
+  return tuh_control_xfer(&xfer);
 }
 
 bool tuh_interface_set(uint8_t daddr, uint8_t itf_num, uint8_t itf_alt,
@@ -1080,15 +1056,7 @@ bool tuh_interface_set(uint8_t daddr, uint8_t itf_num, uint8_t itf_alt,
     .user_data   = user_data
   };
 
-  bool ret = tuh_control_xfer(&xfer);
-
-  // if blocking, user_data could be pointed to xfer_result
-  if ( !complete_cb && user_data )
-  {
-    *((xfer_result_t*) user_data) = xfer.result;
-  }
-
-  return ret;
+  return tuh_control_xfer(&xfer);
 }
 
 //--------------------------------------------------------------------+

From fb5fe3360fb29a5d937cb6d6f1baa7695c04c361 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 28 Apr 2023 21:50:54 +0700
Subject: [PATCH 287/691] allow call tuh cdc with blocking (callback = NULL)

- tuh_cdc_set_control_line_state()
- tuh_cdc_set_baudrate()
- tuh_cdc_set_line_coding()
---
 src/class/cdc/cdc_host.c | 83 ++++++++++++++++++++++++++++++++++------
 src/class/cdc/cdc_host.h |  1 +
 2 files changed, 73 insertions(+), 11 deletions(-)

diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index b25bc5512..858fdd9a7 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -437,22 +437,78 @@ static void cdch_internal_control_complete(tuh_xfer_t* xfer)
 bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   cdch_interface_t* p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
-  return serial_drivers[p_cdc->serial_drid].set_control_line_state(p_cdc, line_state, complete_cb, user_data);
+  cdch_serial_driver_t const* driver = &serial_drivers[p_cdc->serial_drid];
+
+  if ( complete_cb ) {
+    return driver->set_control_line_state(p_cdc, line_state, complete_cb, user_data);
+  }else {
+    // blocking
+    xfer_result_t result;
+    bool ret = driver->set_control_line_state(p_cdc, line_state, complete_cb, (uintptr_t) &result);
+
+    if (user_data) {
+      // user_data is not NULL, return result via user_data
+      *((xfer_result_t*) user_data) = result;
+    }
+
+    if (result == XFER_RESULT_SUCCESS) {
+      p_cdc->line_state = (uint8_t) line_state;
+    }
+
+    return ret;
+  }
 }
 
 bool tuh_cdc_set_baudrate(uint8_t idx, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   cdch_interface_t* p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
-  return serial_drivers[p_cdc->serial_drid].set_baudrate(p_cdc, baudrate, complete_cb, user_data);
+  cdch_serial_driver_t const* driver = &serial_drivers[p_cdc->serial_drid];
+
+  if ( complete_cb ) {
+    return driver->set_baudrate(p_cdc, baudrate, complete_cb, user_data);
+  }else {
+    // blocking
+    xfer_result_t result;
+    bool ret = driver->set_baudrate(p_cdc, baudrate, complete_cb, (uintptr_t) &result);
+
+    if (user_data) {
+      // user_data is not NULL, return result via user_data
+      *((xfer_result_t*) user_data) = result;
+    }
+
+    if (result == XFER_RESULT_SUCCESS) {
+      p_cdc->line_coding.bit_rate = baudrate;
+    }
+
+    return ret;
+  }
 }
 
 bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
   cdch_interface_t* p_cdc = get_itf(idx);
-  TU_VERIFY(p_cdc);
   // only ACM support this set line coding request
-  TU_VERIFY(p_cdc->serial_drid == SERIAL_DRIVER_ACM && p_cdc->acm_capability.support_line_request);
-  return acm_set_line_coding(p_cdc, line_coding, complete_cb, user_data);
+  TU_VERIFY(p_cdc && p_cdc->serial_drid == SERIAL_DRIVER_ACM);
+  TU_VERIFY(p_cdc->acm_capability.support_line_request);
+
+  if ( complete_cb ) {
+    return acm_set_line_coding(p_cdc, line_coding, complete_cb, user_data);
+  }else {
+    // blocking
+    xfer_result_t result;
+    bool ret = acm_set_line_coding(p_cdc, line_coding, complete_cb, (uintptr_t) &result);
+
+    if (user_data) {
+      // user_data is not NULL, return result via user_data
+      *((xfer_result_t*) user_data) = result;
+    }
+
+    if (result == XFER_RESULT_SUCCESS) {
+      p_cdc->line_coding = *line_coding;
+    }
+
+    return ret;
+  }
 }
 
 //--------------------------------------------------------------------+
@@ -752,6 +808,7 @@ static void acm_process_config(tuh_xfer_t* xfer)
 static bool acm_set_control_line_state(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   TU_VERIFY(p_cdc->acm_capability.support_line_request);
   TU_LOG_CDCH("CDC ACM Set Control Line State\r\n");
+
   tusb_control_request_t const request = {
     .bmRequestType_bit = {
       .recipient = TUSB_REQ_RCPT_INTERFACE,
@@ -771,7 +828,7 @@ static bool acm_set_control_line_state(cdch_interface_t* p_cdc, uint16_t line_st
     .ep_addr     = 0,
     .setup       = &request,
     .buffer      = NULL,
-    .complete_cb = cdch_internal_control_complete,
+    .complete_cb = complete_cb ? cdch_internal_control_complete : NULL, // complete_cb is NULL for sync call
     .user_data   = user_data
   };
 
@@ -804,7 +861,7 @@ static bool acm_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const
     .ep_addr     = 0,
     .setup       = &request,
     .buffer      = enum_buf,
-    .complete_cb = cdch_internal_control_complete,
+    .complete_cb = complete_cb ? cdch_internal_control_complete : NULL, // complete_cb is NULL for sync call
     .user_data   = user_data
   };
 
@@ -886,7 +943,8 @@ static bool ftdi_sio_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state
 {
   TU_LOG_CDCH("CDC FTDI Set Control Line State\r\n");
   p_cdc->user_control_cb = complete_cb;
-  TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_MODEM_CTRL, 0x0300 | line_state, cdch_internal_control_complete, user_data));
+  TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_MODEM_CTRL, 0x0300 | line_state,
+                                 complete_cb ? cdch_internal_control_complete : NULL, user_data));
   return true;
 }
 
@@ -923,7 +981,8 @@ static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tu
 
   p_cdc->user_control_cb = complete_cb;
   _ftdi_requested_baud = baudrate;
-  TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_SET_BAUD_RATE, divisor, cdch_internal_control_complete, user_data));
+  TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_SET_BAUD_RATE, divisor,
+                                 complete_cb ? cdch_internal_control_complete : NULL, user_data));
 
   return true;
 }
@@ -1056,14 +1115,16 @@ static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_
   TU_LOG_CDCH("CDC CP210x Set BaudRate = %lu\n", baudrate);
   uint32_t baud_le = tu_htole32(baudrate);
   p_cdc->user_control_cb = complete_cb;
-  return cp210x_set_request(p_cdc, CP210X_SET_BAUDRATE, 0, (uint8_t *) &baud_le, 4, cdch_internal_control_complete, user_data);
+  return cp210x_set_request(p_cdc, CP210X_SET_BAUDRATE, 0, (uint8_t *) &baud_le, 4,
+                            complete_cb ? cdch_internal_control_complete : NULL, user_data);
 }
 
 static bool cp210x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
   TU_LOG_CDCH("CDC CP210x Set Control Line State\r\n");
   p_cdc->user_control_cb = complete_cb;
-  return cp210x_set_request(p_cdc, CP210X_SET_MHS, 0x0300 | line_state, NULL, 0, cdch_internal_control_complete, user_data);
+  return cp210x_set_request(p_cdc, CP210X_SET_MHS, 0x0300 | line_state, NULL, 0,
+                            complete_cb ? cdch_internal_control_complete : NULL, user_data);
 }
 
 static void cp210x_process_config(tuh_xfer_t* xfer) {
diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h
index f6cc3812f..8544ff740 100644
--- a/src/class/cdc/cdc_host.h
+++ b/src/class/cdc/cdc_host.h
@@ -148,6 +148,7 @@ bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_c
 bool tuh_cdc_set_baudrate(uint8_t idx, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 
 // Request to Set Line Coding (ACM only)
+// Should only use if you don't work with serial devices such as FTDI/CP210x
 bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 
 // Request to Get Line Coding (ACM only)

From 1763eede4839d0131cda077e2dd9631f315ce115 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 28 Apr 2023 22:14:14 +0700
Subject: [PATCH 288/691] more update to host serial API

---
 src/class/cdc/cdc_host.c | 27 ++++++++++++---------------
 src/class/cdc/cdc_host.h |  3 ++-
 2 files changed, 14 insertions(+), 16 deletions(-)

diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index 858fdd9a7..fe3691bf4 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -443,7 +443,7 @@ bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_c
     return driver->set_control_line_state(p_cdc, line_state, complete_cb, user_data);
   }else {
     // blocking
-    xfer_result_t result;
+    xfer_result_t result = XFER_RESULT_INVALID;
     bool ret = driver->set_control_line_state(p_cdc, line_state, complete_cb, (uintptr_t) &result);
 
     if (user_data) {
@@ -451,11 +451,10 @@ bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_c
       *((xfer_result_t*) user_data) = result;
     }
 
-    if (result == XFER_RESULT_SUCCESS) {
-      p_cdc->line_state = (uint8_t) line_state;
-    }
+    TU_VERIFY(ret && result == XFER_RESULT_SUCCESS);
 
-    return ret;
+    p_cdc->line_state = (uint8_t) line_state;
+    return true;
   }
 }
 
@@ -468,7 +467,7 @@ bool tuh_cdc_set_baudrate(uint8_t idx, uint32_t baudrate, tuh_xfer_cb_t complete
     return driver->set_baudrate(p_cdc, baudrate, complete_cb, user_data);
   }else {
     // blocking
-    xfer_result_t result;
+    xfer_result_t result = XFER_RESULT_INVALID;
     bool ret = driver->set_baudrate(p_cdc, baudrate, complete_cb, (uintptr_t) &result);
 
     if (user_data) {
@@ -476,11 +475,10 @@ bool tuh_cdc_set_baudrate(uint8_t idx, uint32_t baudrate, tuh_xfer_cb_t complete
       *((xfer_result_t*) user_data) = result;
     }
 
-    if (result == XFER_RESULT_SUCCESS) {
-      p_cdc->line_coding.bit_rate = baudrate;
-    }
+    TU_VERIFY(ret && result == XFER_RESULT_SUCCESS);
 
-    return ret;
+    p_cdc->line_coding.bit_rate = baudrate;
+    return true;
   }
 }
 
@@ -495,7 +493,7 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding,
     return acm_set_line_coding(p_cdc, line_coding, complete_cb, user_data);
   }else {
     // blocking
-    xfer_result_t result;
+    xfer_result_t result = XFER_RESULT_INVALID;
     bool ret = acm_set_line_coding(p_cdc, line_coding, complete_cb, (uintptr_t) &result);
 
     if (user_data) {
@@ -503,11 +501,10 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding,
       *((xfer_result_t*) user_data) = result;
     }
 
-    if (result == XFER_RESULT_SUCCESS) {
-      p_cdc->line_coding = *line_coding;
-    }
+    TU_VERIFY(ret && result == XFER_RESULT_SUCCESS);
 
-    return ret;
+    p_cdc->line_coding = *line_coding;
+    return true;
   }
 }
 
diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h
index 8544ff740..19552f1ee 100644
--- a/src/class/cdc/cdc_host.h
+++ b/src/class/cdc/cdc_host.h
@@ -138,7 +138,8 @@ bool tuh_cdc_read_clear (uint8_t idx);
 // - If complete_cb is provided, the function will return immediately and invoke
 // the callback when request is complete.
 // - If complete_cb is NULL, the function will block until request is complete.
-// In this case, user_data should be pointed to xfer_result_t to hold the transfer result.
+//   - In this case, user_data should be pointed to xfer_result_t to hold the transfer result.
+//   - The function will return true if transfer is successful, false otherwise.
 //--------------------------------------------------------------------+
 
 // Request to Set Control Line State: DTR (bit 0), RTS (bit 1)

From be54870c3b2f7f1c14b0f5527f4928c8a4a4a7ae Mon Sep 17 00:00:00 2001
From: Martino Facchin <m.facchin@arduino.cc>
Date: Wed, 3 May 2023 10:02:24 +0200
Subject: [PATCH 289/691] renesas_ra: add support for HS port

---
 hw/bsp/ra/family.mk                    |  2 +
 src/portable/renesas/rusb2/dcd_rusb2.c | 76 ++++++++++++++++++++++----
 src/portable/renesas/rusb2/hcd_rusb2.c | 46 +++++++++++-----
 src/portable/renesas/rusb2/rusb2_ra.c  | 16 ++++++
 src/portable/renesas/rusb2/rusb2_ra.h  | 37 +++++++++++--
 5 files changed, 147 insertions(+), 30 deletions(-)
 create mode 100644 src/portable/renesas/rusb2/rusb2_ra.c

diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk
index d48272e61..3ed17f79f 100644
--- a/hw/bsp/ra/family.mk
+++ b/hw/bsp/ra/family.mk
@@ -22,6 +22,7 @@ CFLAGS += \
 SRC_C += \
 	src/portable/renesas/rusb2/dcd_rusb2.c \
 	src/portable/renesas/rusb2/hcd_rusb2.c \
+	src/portable/renesas/rusb2/rusb2_ra.c \
 	hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c \
 	hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c \
 	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_clocks.c \
@@ -47,6 +48,7 @@ INC += \
 	$(TOP)/hw/mcu/renesas/fsp/ra/fsp/inc \
 	$(TOP)/hw/mcu/renesas/fsp/ra/fsp/inc/api \
 	$(TOP)/hw/mcu/renesas/fsp/ra/fsp/inc/instances \
+	$(TOP)/hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all \
 	$(TOP)/$(FSP_MCU_DIR) \
 	$(TOP)/$(FSP_BOARD_DIR)
 
diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 78584125f..9ae36e253 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -52,8 +52,10 @@
 /* LINK core registers */
 #if defined(__CCRX__)
   #define RUSB2 ((RUSB2_REG_t __evenaccess*) RUSB2_REG_BASE)
+#elif (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
+  #define RUSB2 ((R_USB_HS0_Type*)R_USB_HS0_BASE)
 #else
-  #define RUSB2 ((RUSB2_REG_t*) RUSB2_REG_BASE)
+  #define RUSB2 ((R_USB_FS0_Type*)R_USB_FS0_BASE)
 #endif
 
 /* Start of definition of packed structs (used by the CCRX toolchain) */
@@ -81,6 +83,18 @@ typedef union TU_ATTR_PACKED {
   volatile uint16_t u16;
 } hw_fifo_t;
 
+typedef union TU_ATTR_PACKED {
+  struct {
+    volatile uint32_t  : 24;
+    volatile uint32_t u8: 8;
+  };
+  struct {
+    volatile uint32_t    : 16;
+    volatile uint32_t u16: 16;
+  };
+  volatile uint32_t u32;
+} hw_fifo32_t;
+
 typedef struct TU_ATTR_PACKED
 {
   void      *buf;      /* the start address of a transfer data buffer */
@@ -185,14 +199,18 @@ static inline void pipe_wait_for_ready(unsigned num)
 
 static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
 {
+#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
+  volatile hw_fifo32_t *reg = (volatile hw_fifo32_t*) fifo;
+#else
   volatile hw_fifo_t *reg = (volatile hw_fifo_t*) fifo;
+#endif
   uintptr_t addr = (uintptr_t)buf;
   while (len >= 2) {
     reg->u16 = *(const uint16_t *)addr;
     addr += 2;
     len  -= 2;
   }
-  if (len) {
+  if (len > 0) {
     reg->u8 = *(const uint8_t *)addr;
     ++addr;
   }
@@ -519,12 +537,17 @@ static void process_bus_reset(uint8_t rhport)
     ++ctr;
   }
   tu_varclr(&_dcd);
+
+#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
+  dcd_event_bus_reset(rhport, TUSB_SPEED_HIGH, true);
+#else
   dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true);
+#endif
 }
 
 static void process_set_address(uint8_t rhport)
 {
-  const uint32_t addr = RUSB2->USBADDR_b.USBADDR;
+  const uint32_t addr = RUSB2->USBADDR & 0xFF;
   if (!addr) return;
   const tusb_control_request_t setup_packet = {
 #if defined(__CCRX__)
@@ -572,34 +595,53 @@ void dcd_init(uint8_t rhport)
 {
   (void)rhport;
 
-#if 0 // previously present in the rx driver before generalization
-  uint32_t pswi = disable_interrupt();
-  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
-  MSTP(USB0) = 0;
-  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
-  enable_interrupt(pswi);
-#endif
-
+#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
+  RUSB2->SYSCFG_b.HSE = 1;
+  RUSB2->PHYSET_b.DIRPD = 0;
+  R_BSP_SoftwareDelay((uint32_t) 1, BSP_DELAY_UNITS_MILLISECONDS);
+  RUSB2->PHYSET_b.PLLRESET = 0;
+  //RUSB2->PHYSET_b.REPSTART = 1;
+  RUSB2->SYSCFG_b.DRPD = 0;
+  RUSB2->SYSCFG_b.USBE = 1;
+  RUSB2->LPSTS_b.SUSPENDM = 1;
+  while (!RUSB2->PLLSTA_b.PLLLOCK);
+  //RUSB2->BUSWAIT |= 0x0F00U;
+  //RUSB2->PHYSET_b.REPSEL = 1;
+  RUSB2->CFIFOSEL_b.MBW = 1;
+  RUSB2->D0FIFOSEL_b.MBW = 1;
+  RUSB2->D1FIFOSEL_b.MBW = 1;
+  RUSB2->INTSTS0 = 0;
+#else
   RUSB2->SYSCFG_b.SCKE = 1;
   while (!RUSB2->SYSCFG_b.SCKE) ;
   RUSB2->SYSCFG_b.DRPD = 0;
   RUSB2->SYSCFG_b.DCFM = 0;
   RUSB2->SYSCFG_b.USBE = 1;
+#endif
 
   // MCU specific PHY init
   rusb2_phy_init();
 
+#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE)
   RUSB2->PHYSLEW = 0x5;
   RUSB2->DPUSR0R_FS_b.FIXPHY0 = 0u; /* USB_BASE Transceiver Output fixed */
 
+  #define USB_VDCEN                 (0x0080U) /* b7: Regulator ON/OFF control */
+  RUSB2->USBMC = (uint16_t) (RUSB2->USBMC | (USB_VDCEN));
+#endif
+
   /* Setup default control pipe */
   RUSB2->DCPMAXP_b.MXPS = 64;
   RUSB2->INTENB0 = RUSB2_INTSTS0_VBINT_Msk | RUSB2_INTSTS0_BRDY_Msk | RUSB2_INTSTS0_BEMP_Msk |
           RUSB2_INTSTS0_DVST_Msk | RUSB2_INTSTS0_CTRT_Msk | (USE_SOF ? RUSB2_INTSTS0_SOFR_Msk : 0) |
-          RUSB2_INTSTS0_RESM_Msk;
+          RUSB2_INTSTS0_RESM_Msk | RUSB2_INTSTS0_NRDY_Msk;
   RUSB2->BEMPENB = 1;
   RUSB2->BRDYENB = 1;
 
+#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE)
+  RUSB2->SYSCFG_b.DPRPU = 1;  /* necessary in this position */
+#endif
+
   if (RUSB2->INTSTS0_b.VBSTS) {
     dcd_connect(rhport);
   }
@@ -630,6 +672,10 @@ void dcd_remote_wakeup(uint8_t rhport)
 void dcd_connect(uint8_t rhport)
 {
   (void)rhport;
+  #if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
+  RUSB2->SYSCFG_b.CNEN = 1;
+  R_BSP_SoftwareDelay((uint32_t) 10, BSP_DELAY_UNITS_MILLISECONDS);
+  #endif
   RUSB2->SYSCFG_b.DPRPU = 1;
 }
 
@@ -672,6 +718,9 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
 
   /* setup pipe */
   dcd_int_disable(rhport);
+  #if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
+  RUSB2->PIPEBUF = 0x7C08;
+  #endif
   RUSB2->PIPESEL = num;
   RUSB2->PIPEMAXP = mps;
   volatile uint16_t *ctr = get_pipectr(num);
@@ -826,6 +875,9 @@ void dcd_int_handler(uint8_t rhport)
       break;
     }
   }
+  if (is0 & RUSB2_INTSTS0_NRDY_Msk) {
+    RUSB2->NRDYSTS = 0;
+  }
   if (is0 & RUSB2_INTSTS0_CTRT_Msk) {
     if (is0 & RUSB2_INTSTS0_CTSQ_CTRL_RDATA) {
       /* A setup packet has been received. */
diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index e4743223e..03811d63f 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -48,8 +48,10 @@
 /* LINK core registers */
 #if defined(__CCRX__)
   #define RUSB2 ((RUSB2_REG_t __evenaccess*) RUSB2_REG_BASE)
+#elif (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST)
+  #define RUSB2 ((R_USB_HS0_Type*) R_USB_HS0_BASE)
 #else
-  #define RUSB2 ((RUSB2_REG_t*) RUSB2_REG_BASE)
+  #define RUSB2 ((R_USB_FS0_Type*) R_USB_FS0_BASE)
 #endif
 
 TU_ATTR_PACKED_BEGIN
@@ -477,31 +479,49 @@ bool hcd_init(uint8_t rhport)
 {
   (void)rhport;
 
-#if 0 // previously present in the rx driver before generalization
-  uint32_t pswi = disable_interrupt();
-  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
-  MSTP(USB0) = 0;
-  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
-  enable_interrupt(pswi);
-#endif
-
-  RUSB2->SYSCFG_b.SCKE = 1;
-  while (!RUSB2->SYSCFG_b.SCKE) ;
-  RUSB2->SYSCFG_b.DPRPU = 0;
-  RUSB2->SYSCFG_b.DRPD = 0;
+#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST)
+  RUSB2->SYSCFG_b.HSE = 1;
+  RUSB2->PHYSET_b.HSEB = 0;
+  RUSB2->PHYSET_b.DIRPD = 0;
+  R_BSP_SoftwareDelay((uint32_t) 1, BSP_DELAY_UNITS_MILLISECONDS);
+  RUSB2->PHYSET_b.PLLRESET = 0;
+  RUSB2->LPSTS_b.SUSPENDM = 1;
+  while (!RUSB2->PLLSTA_b.PLLLOCK);
+  RUSB2->SYSCFG_b.DRPD = 1;
   RUSB2->SYSCFG_b.DCFM = 1;
+  RUSB2->SYSCFG_b.DPRPU = 0;
+  RUSB2->SYSCFG_b.CNEN = 1;
+  RUSB2->BUSWAIT |= 0x0F00U;
+  RUSB2->SOFCFG_b.INTL = 1;
+  RUSB2->DVSTCTR0_b.VBUSEN = 1;
+  RUSB2->CFIFOSEL_b.MBW = 1;
+  RUSB2->D0FIFOSEL_b.MBW = 1;
+  RUSB2->D1FIFOSEL_b.MBW = 1;
+  RUSB2->INTSTS0 = 0;
+  for (volatile int i = 0; i < 30000; ++i) ;
+  RUSB2->SYSCFG_b.USBE = 1;
+#else
+  /* HOST DEVICE Full SPEED */
+  RUSB2->SYSCFG_b.SCKE = 1;         /* USB Clock enable */
+  while (!RUSB2->SYSCFG_b.SCKE) ;
+  RUSB2->SYSCFG_b.DPRPU = 0;        /* D+ pull up enable - 0/disable in host mode */
+  RUSB2->SYSCFG_b.DRPD = 1;         /* D+/D- pull down - 1/in Host mode (pag.834)*/
+  RUSB2->SYSCFG_b.DCFM = 1;         /* HOST or Device - 1/HOST */
 
   RUSB2->DVSTCTR0_b.VBUSEN = 1;
 
   RUSB2->SYSCFG_b.DRPD = 1;
   for (volatile int i = 0; i < 30000; ++i) ;
   RUSB2->SYSCFG_b.USBE = 1;
+#endif
 
   // MCU specific PHY init
   rusb2_phy_init();
 
+#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST)
   RUSB2->PHYSLEW = 0x5;
   RUSB2->DPUSR0R_FS_b.FIXPHY0 = 0u; /* Transceiver Output fixed */
+#endif
 
   /* Setup default control pipe */
   RUSB2->DCPCFG  = RUSB2_PIPECFG_SHTNAK_Msk;
diff --git a/src/portable/renesas/rusb2/rusb2_ra.c b/src/portable/renesas/rusb2/rusb2_ra.c
new file mode 100644
index 000000000..2b6ce7b2f
--- /dev/null
+++ b/src/portable/renesas/rusb2/rusb2_ra.c
@@ -0,0 +1,16 @@
+#include "tusb_option.h"
+#include "rusb2_ra.h"
+
+#ifdef CFG_TUSB_RHPORT0_MODE
+IRQn_Type _usb_fs_irqn = USBFS_INT_IRQn;
+void tud_set_irq_usbfs(IRQn_Type q) {
+  _usb_fs_irqn = q;
+}
+#endif
+
+#ifdef CFG_TUSB_RHPORT1_MODE
+IRQn_Type _usb_hs_irqn = USBHS_USB_INT_RESUME_IRQn;
+void tud_set_irq_usbhs(IRQn_Type q) {
+  _usb_hs_irqn = q;
+}
+#endif
\ No newline at end of file
diff --git a/src/portable/renesas/rusb2/rusb2_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h
index 5785850cc..b18b506e5 100644
--- a/src/portable/renesas/rusb2/rusb2_ra.h
+++ b/src/portable/renesas/rusb2/rusb2_ra.h
@@ -34,18 +34,45 @@ extern "C" {
 /* renesas fsp api */
 #include "bsp_api.h"
 
-#define RUSB2_REG_BASE (0x40090000)
+extern IRQn_Type _usb_fs_irqn;
+extern IRQn_Type _usb_hs_irqn;
 
 TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_enable(uint8_t rhport)
 {
-  (void) rhport;
-  NVIC_EnableIRQ(TU_IRQn);
+#ifdef CFG_TUSB_RHPORT1_MODE
+#if (CFG_TUSB_RHPORT1_MODE != 0)
+  if (rhport == 1) {
+    NVIC_EnableIRQ(_usb_hs_irqn);
+  }
+#endif
+#endif
+
+#ifdef CFG_TUSB_RHPORT0_MODE
+#if  (CFG_TUSB_RHPORT0_MODE != 0)
+  if (rhport == 0) {
+    NVIC_EnableIRQ(_usb_fs_irqn);
+  }
+#endif
+#endif
 }
 
 TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_disable(uint8_t rhport)
 {
-  (void) rhport;
-  NVIC_DisableIRQ(TU_IRQn);
+#ifdef CFG_TUSB_RHPORT1_MODE
+#if (CFG_TUSB_RHPORT1_MODE != 0)
+  if (rhport == 1) {
+    NVIC_DisableIRQ(_usb_hs_irqn);
+  }
+#endif
+#endif
+
+#ifdef CFG_TUSB_RHPORT0_MODE
+#if (CFG_TUSB_RHPORT0_MODE != 0)
+  if (rhport == 0) {
+    NVIC_DisableIRQ(_usb_fs_irqn);
+  }
+#endif
+#endif
 }
 
 // MCU specific PHY init

From 4afed62646d18dd96eef619d7d21b47a2422672f Mon Sep 17 00:00:00 2001
From: Martino Facchin <m.facchin@arduino.cc>
Date: Wed, 3 May 2023 10:05:29 +0200
Subject: [PATCH 290/691] renesas_ra: host: handle retry on attach()

---
 src/portable/renesas/rusb2/hcd_rusb2.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index 03811d63f..9dd4f0a48 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -759,9 +759,10 @@ void hcd_int_handler(uint8_t rhport)
     7, 17, 0, 25, 22, 31, 15, 29, 10, 12, 6, 0, 21, 14, 9, 5,
     20, 8, 19, 18};
 #endif
-
+  static unsigned char attach_attempt = 0;
   unsigned is1 = RUSB2->INTSTS1;
   unsigned is0 = RUSB2->INTSTS0;
+
   /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */
   RUSB2->INTSTS1 = ~((RUSB2_INTSTS1_SACK_Msk | RUSB2_INTSTS1_SIGN_Msk | RUSB2_INTSTS1_ATTCH_Msk | RUSB2_INTSTS1_DTCH_Msk) & is1);
   RUSB2->INTSTS0 = ~((RUSB2_INTSTS0_BRDY_Msk | RUSB2_INTSTS0_NRDY_Msk | RUSB2_INTSTS0_BEMP_Msk) & is0);
@@ -772,12 +773,21 @@ void hcd_int_handler(uint8_t rhport)
   if (is1 & RUSB2_INTSTS1_SACK_Msk) {
     /* Set DATA1 in advance for the next transfer. */
     RUSB2->DCPCTR_b.SQSET = 1;
+    attach_attempt = 0;
     hcd_event_xfer_complete(RUSB2->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true);
   }
   if (is1 & RUSB2_INTSTS1_SIGN_Msk) {
     hcd_event_xfer_complete(RUSB2->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true);
+    if(attach_attempt > 0) {
+      RUSB2->DVSTCTR0_b.UACT = 1;
+      _hcd.need_reset = true;
+      RUSB2->INTENB1 = (RUSB2->INTENB1 & ~RUSB2_INTSTS1_ATTCH_Msk) | RUSB2_INTSTS1_DTCH_Msk;
+      hcd_event_device_attach(rhport, true);
+    }
+    attach_attempt--;
   }
   if (is1 & RUSB2_INTSTS1_ATTCH_Msk) {
+    attach_attempt = 10;
     RUSB2->DVSTCTR0_b.UACT = 1;
     _hcd.need_reset = true;
     RUSB2->INTENB1 = (RUSB2->INTENB1 & ~RUSB2_INTSTS1_ATTCH_Msk) | RUSB2_INTSTS1_DTCH_Msk;

From 5f7e7b4b0a9f65a401c679d5045b96b4b56755df Mon Sep 17 00:00:00 2001
From: Martino Facchin <m.facchin@arduino.cc>
Date: Wed, 3 May 2023 10:06:13 +0200
Subject: [PATCH 291/691] renesas_ra: support RA2A1 (FS only)

---
 src/portable/renesas/rusb2/dcd_rusb2.c | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 9ae36e253..f3bda5205 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -41,6 +41,15 @@
   #include "rusb2_rx.h"
 #elif TU_CHECK_MCU(OPT_MCU_RAXXX)
   #include "rusb2_ra.h"
+  #if defined(RENESAS_CORTEX_M23)
+    #define D0FIFO CFIFO
+    #define D0FIFOSEL CFIFOSEL
+    #define D0FIFOSEL_b CFIFOSEL_b
+    #define D1FIFOSEL CFIFOSEL
+    #define D1FIFOSEL_b CFIFOSEL_b
+    #define D0FIFOCTR CFIFOCTR
+    #define D0FIFOCTR_b CFIFOCTR_b
+  #endif
 #else
   #error "Unsupported MCU"
 #endif
@@ -121,6 +130,10 @@ typedef struct
 //--------------------------------------------------------------------+
 static dcd_data_t _dcd;
 
+#ifndef FIRST_BULK_PIPE
+#define FIRST_BULK_PIPE 3
+#endif
+
 static unsigned find_pipe(unsigned xfer)
 {
   switch (xfer) {
@@ -130,7 +143,7 @@ static unsigned find_pipe(unsigned xfer)
     }
     break;
   case TUSB_XFER_BULK:
-    for (int i = 3; i <= 5; ++i) {
+    for (int i = FIRST_BULK_PIPE; i <= 5; ++i) {
       if (0 == _dcd.pipe[i].ep) return  i;
     }
     for (int i = 1; i <= 1; ++i) {

From a349869906a41f959103b7aead2a1fd839773581 Mon Sep 17 00:00:00 2001
From: Martino Facchin <m.facchin@arduino.cc>
Date: Wed, 3 May 2023 10:06:58 +0200
Subject: [PATCH 292/691] renesas_ra: fix existing boards support

---
 hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/vector_data.h | 2 +-
 hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c            | 2 +-
 hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/vector_data.h | 2 +-
 hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c            | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/vector_data.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/vector_data.h
index 37739c12a..4719e22e6 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/vector_data.h
+++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/vector_data.h
@@ -1,5 +1,5 @@
 /* vector numbers are configurable/dynamic, hence this, it will be used inside the port */
-#define TU_IRQn 0
+#define USBFS_INT_IRQn 0
 #define USBFS_RESUME_IRQn 1
 #define USBFS_FIFO_0_IRQn 2
 #define USBFS_FIFO_1_IRQn 3
diff --git a/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c b/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c
index ea2204837..300cf6178 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c
+++ b/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c
@@ -151,7 +151,7 @@ void board_init(void)
 
 #if CFG_TUSB_OS == OPT_OS_FREERTOS
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
-  NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  NVIC_SetPriority(USBFS_INT_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
   NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
   NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
   NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/vector_data.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/vector_data.h
index 37739c12a..4719e22e6 100644
--- a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/vector_data.h
+++ b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/vector_data.h
@@ -1,5 +1,5 @@
 /* vector numbers are configurable/dynamic, hence this, it will be used inside the port */
-#define TU_IRQn 0
+#define USBFS_INT_IRQn 0
 #define USBFS_RESUME_IRQn 1
 #define USBFS_FIFO_0_IRQn 2
 #define USBFS_FIFO_1_IRQn 3
diff --git a/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c b/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c
index 327ef71d5..b68228008 100644
--- a/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c
+++ b/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c
@@ -153,7 +153,7 @@ void board_init(void)
 
 #if CFG_TUSB_OS == OPT_OS_FREERTOS
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
-  NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  NVIC_SetPriority(USBFS_INT_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
   NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
   NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
   NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);

From 6ff62c0fe85e825d077d7d803c657181769e542f Mon Sep 17 00:00:00 2001
From: Martino Facchin <m.facchin@arduino.cc>
Date: Wed, 3 May 2023 11:47:41 +0200
Subject: [PATCH 293/691] renesas: add fallback for targets not defining
 CFG_TUSB_RHPORT*_MODE

---
 src/portable/renesas/rusb2/dcd_rusb2.c | 5 +++++
 src/portable/renesas/rusb2/hcd_rusb2.c | 5 +++++
 src/portable/renesas/rusb2/rusb2_ra.h  | 5 +++++
 3 files changed, 15 insertions(+)

diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index f3bda5205..f509dcc56 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -37,6 +37,11 @@
 #include "device/dcd.h"
 #include "rusb2_type.h"
 
+#if !defined(CFG_TUSB_RHPORT0_MODE) && !defined(CFG_TUSB_RHPORT1_MODE)
+// fallback
+#define CFG_TUSB_RHPORT0_MODE   OPT_MODE_DEVICE
+#endif
+
 #if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
   #include "rusb2_rx.h"
 #elif TU_CHECK_MCU(OPT_MCU_RAXXX)
diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index 9dd4f0a48..1ec25f1e2 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -33,6 +33,11 @@
 #include "host/hcd.h"
 #include "rusb2_type.h"
 
+#if !defined(CFG_TUSB_RHPORT0_MODE) && !defined(CFG_TUSB_RHPORT1_MODE)
+// fallback
+#define CFG_TUSB_RHPORT0_MODE   OPT_MODE_HOST
+#endif
+
 #if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
   #include "rusb2_rx.h"
 #elif TU_CHECK_MCU(OPT_MCU_RAXXX)
diff --git a/src/portable/renesas/rusb2/rusb2_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h
index b18b506e5..874492304 100644
--- a/src/portable/renesas/rusb2/rusb2_ra.h
+++ b/src/portable/renesas/rusb2/rusb2_ra.h
@@ -37,6 +37,11 @@ extern "C" {
 extern IRQn_Type _usb_fs_irqn;
 extern IRQn_Type _usb_hs_irqn;
 
+#if !defined(CFG_TUSB_RHPORT0_MODE) && !defined(CFG_TUSB_RHPORT1_MODE)
+// fallback
+#define CFG_TUSB_RHPORT0_MODE   ( CFG_TUD_ENABLED ? OPT_MODE_DEVICE : OPT_MODE_HOST )
+#endif
+
 TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_enable(uint8_t rhport)
 {
 #ifdef CFG_TUSB_RHPORT1_MODE

From 629717cd13730fa5f7543ce414ff11b5c175add0 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 4 May 2023 16:38:06 +0700
Subject: [PATCH 294/691] fix cmake build

---
 {cmake => examples/cmake}/cpu/cortex-m7.cmake       | 0
 {cmake => examples/cmake}/toolchain/arm_gcc.cmake   | 0
 {cmake => examples/cmake}/toolchain/set_flags.cmake | 0
 hw/bsp/imxrt/family.cmake                           | 2 +-
 tools/build_family.py                               | 8 ++++----
 5 files changed, 5 insertions(+), 5 deletions(-)
 rename {cmake => examples/cmake}/cpu/cortex-m7.cmake (100%)
 rename {cmake => examples/cmake}/toolchain/arm_gcc.cmake (100%)
 rename {cmake => examples/cmake}/toolchain/set_flags.cmake (100%)

diff --git a/cmake/cpu/cortex-m7.cmake b/examples/cmake/cpu/cortex-m7.cmake
similarity index 100%
rename from cmake/cpu/cortex-m7.cmake
rename to examples/cmake/cpu/cortex-m7.cmake
diff --git a/cmake/toolchain/arm_gcc.cmake b/examples/cmake/toolchain/arm_gcc.cmake
similarity index 100%
rename from cmake/toolchain/arm_gcc.cmake
rename to examples/cmake/toolchain/arm_gcc.cmake
diff --git a/cmake/toolchain/set_flags.cmake b/examples/cmake/toolchain/set_flags.cmake
similarity index 100%
rename from cmake/toolchain/set_flags.cmake
rename to examples/cmake/toolchain/set_flags.cmake
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index e36adaf5a..95c4c0415 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -1,6 +1,6 @@
 # toolchain set up
 set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
-set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../../cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_LIST_DIR}/../../../examples/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 function(family_configure_target TARGET)
   if (NOT BOARD)
diff --git a/tools/build_family.py b/tools/build_family.py
index f9f7261fe..1fc25907b 100644
--- a/tools/build_family.py
+++ b/tools/build_family.py
@@ -41,11 +41,11 @@ if __name__ == '__main__':
 
     # If examples are not specified in arguments, build all
     all_examples = []
-    for dir1 in os.scandir("examples"):
-        if dir1.is_dir() and 'cmake-build' not in dir1.name:
-            for entry in os.scandir(dir1.path):
+    for d in os.scandir("examples"):
+        if d.is_dir() and 'cmake-build' not in d.name and 'cmake' not in d.name:
+            for entry in os.scandir(d.path):
                 if entry.is_dir():
-                    all_examples.append(dir1.name + '/' + entry.name)
+                    all_examples.append(d.name + '/' + entry.name)
     filter_with_input(all_examples)
     all_examples.sort()
 

From 161c95f1b7d63394b184a351f7bbaa54841c02f6 Mon Sep 17 00:00:00 2001
From: Martino Facchin <m.facchin@arduino.cc>
Date: Thu, 4 May 2023 14:42:32 +0200
Subject: [PATCH 295/691] renesas: update fsp to 4.0.0

---
 tools/get_deps.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/get_deps.py b/tools/get_deps.py
index d8b044343..4f2f7b089 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -27,7 +27,7 @@ deps_optional = {
     'hw/mcu/nxp/mcux-sdk'                      : ['f357a1150f6cf6c6b844f53f2d426bfb3e649850', 'https://github.com/NXPmicro/mcux-sdk.git'                      ],
     'hw/mcu/nxp/nxp_sdk'                       : ['845c8fc49b6fb660f06a5c45225494eacb06f00c', 'https://github.com/hathach/nxp_sdk.git'                        ],
     'hw/mcu/raspberry_pi/Pico-PIO-USB'         : ['c3715ce94b6f6391856de56081d4d9b3e98fa93d', 'https://github.com/sekigon-gonnoc/Pico-PIO-USB.git'            ],
-    'hw/mcu/renesas/fsp'                       : ['8dc14709f2a6518b43f71efad70d900b7718d9f1', 'https://github.com/renesas/fsp.git'                            ],
+    'hw/mcu/renesas/fsp'                       : ['9860fae1f180340a0e3c097dc6e91323cf83b926', 'https://github.com/renesas/fsp.git'                            ],
     'hw/mcu/renesas/rx'                        : ['706b4e0cf485605c32351e2f90f5698267996023', 'https://github.com/kkitayam/rx_device.git'                     ],
     'hw/mcu/silabs/cmsis-dfp-efm32gg12b'       : ['f1c31b7887669cb230b3ea63f9b56769078960bc', 'https://github.com/cmsis-packs/cmsis-dfp-efm32gg12b.git'       ],
     'hw/mcu/sony/cxd56/spresense-exported-sdk' : ['2ec2a1538362696118dc3fdf56f33dacaf8f4067', 'https://github.com/sonydevworld/spresense-exported-sdk.git'    ],

From 8a9d2b4b759990f9609a33c313b154cc7314bec7 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 4 May 2023 23:29:37 +0700
Subject: [PATCH 296/691] wip

---
 examples/device/cdc_msc/CMakeLists.txt |  7 ++++++
 hw/bsp/imxrt/family.cmake              | 17 ++++++++++++--
 src/CMakeLists.txt                     | 31 ++++++++++++++++++++++++++
 3 files changed, 53 insertions(+), 2 deletions(-)

diff --git a/examples/device/cdc_msc/CMakeLists.txt b/examples/device/cdc_msc/CMakeLists.txt
index 7eddc2422..1115f51d1 100644
--- a/examples/device/cdc_msc/CMakeLists.txt
+++ b/examples/device/cdc_msc/CMakeLists.txt
@@ -29,6 +29,13 @@ target_include_directories(${PROJECT} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
+# define tinyusb_config target
+add_library(tinyusb_config INTERFACE)
+
+target_include_directories(tinyusb_config INTERFACE
+  ${CMAKE_CURRENT_SOURCE_DIR}/src
+  )
+
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
 family_configure_device_example(${PROJECT})
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 95c4c0415..c18fb01ab 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -73,9 +73,22 @@ function(family_configure_target TARGET)
     ${SDK_DIR}/drivers/lpuart
     )
 
+  # define tinyusb_config target
+
+  #target_include_directories(tinyusb_config INTERFACE
+  #  )
+
+  target_compile_definitions(tinyusb_config PUBLIC
+    )
+
   # include tinyusb cmake
-  include(${TOP}/src/CMakeLists.txt)
-  add_tinyusb(${TARGET})
+  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+  target_link_libraries(${TARGET} PUBLIC
+    tinyusb
+    )
+
+  #include(${TOP}/src/CMakeLists.txt)
+  #add_tinyusb(${TARGET})
 
 endfunction()
 
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index a270ea8b7..ec7fe32c4 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -3,6 +3,37 @@
 
 cmake_minimum_required(VERSION 3.17)
 
+if (NOT TARGET tinyusb_config)
+  message(FATAL_ERROR "tinyusb_config target is not defined")
+endif()
+
+add_library(tinyusb STATIC
+  ${CMAKE_CURRENT_LIST_DIR}/tusb.c
+  ${CMAKE_CURRENT_LIST_DIR}/common/tusb_fifo.c
+  ${CMAKE_CURRENT_LIST_DIR}/device/usbd.c
+  ${CMAKE_CURRENT_LIST_DIR}/device/usbd_control.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/audio/audio_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/cdc/cdc_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/dfu/dfu_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/dfu/dfu_rt_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/hid/hid_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/midi/midi_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/msc/msc_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/net/ecm_rndis_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/net/ncm_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/usbtmc/usbtmc_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/vendor/vendor_device.c
+  ${CMAKE_CURRENT_LIST_DIR}/class/video/video_device.c
+  )
+
+target_include_directories(tinyusb PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}
+  )
+
+target_link_libraries(tinyusb PUBLIC
+  tinyusb_config
+  )
+
 function(add_tinyusb TARGET)
   target_sources(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/tusb.c

From 97ee40fd7bf8b094417810a7f1816e60fdf9497b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 5 May 2023 16:51:50 +0700
Subject: [PATCH 297/691] add clion files

---
 .idea/runConfigurations/rp2040.xml       | 10 ++++++++++
 .idea/runConfigurations/rt10xx.xml       | 10 ++++++++++
 .idea/runConfigurations/rt10xx_pyocd.xml |  7 +++++++
 .idea/vcs.xml                            |  2 ++
 4 files changed, 29 insertions(+)
 create mode 100644 .idea/runConfigurations/rp2040.xml
 create mode 100644 .idea/runConfigurations/rt10xx.xml
 create mode 100644 .idea/runConfigurations/rt10xx_pyocd.xml

diff --git a/.idea/runConfigurations/rp2040.xml b/.idea/runConfigurations/rp2040.xml
new file mode 100644
index 000000000..227a5e2bc
--- /dev/null
+++ b/.idea/runConfigurations/rp2040.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="rp2040" type="com.jetbrains.cidr.embedded.openocd.conf.type" factoryName="com.jetbrains.cidr.embedded.openocd.conf.factory" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc_hid" TARGET_NAME="cdc_msc_hid" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc_hid" RUN_TARGET_NAME="cdc_msc_hid">
+    <openocd version="1" gdb-port="3333" telnet-port="4444" board-config="$PROJECT_DIR$/hw/bsp/rp2040/rp2040-openocd.cfg" reset-type="INIT" download-type="UPDATED_ONLY">
+      <debugger kind="GDB" isBundled="true" />
+    </openocd>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/rt10xx.xml b/.idea/runConfigurations/rt10xx.xml
new file mode 100644
index 000000000..332b4d477
--- /dev/null
+++ b/.idea/runConfigurations/rt10xx.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="rt10xx" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="gdbserver -p 55503 -t mimxrt1010" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_device_examples" TARGET_NAME="cdc_msc_freertos" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_device_examples" RUN_TARGET_NAME="cdc_msc_freertos">
+    <custom-gdb-server version="1" gdb-connect="tcp::55503" executable="$USER_HOME$/.local/bin/pyocd" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/rt10xx_pyocd.xml b/.idea/runConfigurations/rt10xx_pyocd.xml
new file mode 100644
index 000000000..f5c142690
--- /dev/null
+++ b/.idea/runConfigurations/rt10xx_pyocd.xml
@@ -0,0 +1,7 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="rt10xx pyocd" type="CMakeRunConfiguration" factoryName="Application" PROGRAM_PARAMS="flash -t mimxrt1010 $CMakeCurrentProductFile$" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc_hid" TARGET_NAME="msc_dual_lun" RUN_PATH="$USER_HOME$/.local/bin/pyocd">
+    <method v="2">
+      <option name="com.jetbrains.cidr.execution.CidrBuildBeforeRunTaskProvider$BuildBeforeRunTask" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/vcs.xml b/.idea/vcs.xml
index f05d025e7..63371256f 100644
--- a/.idea/vcs.xml
+++ b/.idea/vcs.xml
@@ -17,8 +17,10 @@
     <mapping directory="$PROJECT_DIR$/hw/mcu/nxp/nxp_sdk" vcs="Git" />
     <mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/Pico-PIO-USB" vcs="Git" />
     <mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/pico-sdk" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/pico-sdk/lib/btstack" vcs="Git" />
     <mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/pico-sdk/lib/cyw43-driver" vcs="Git" />
     <mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/pico-sdk/lib/lwip" vcs="Git" />
+    <mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/pico-sdk/lib/mbedtls" vcs="Git" />
     <mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/pico-sdk/lib/tinyusb" vcs="Git" />
     <mapping directory="$PROJECT_DIR$/hw/mcu/renesas/fsp" vcs="Git" />
     <mapping directory="$PROJECT_DIR$/hw/mcu/renesas/rx" vcs="Git" />

From cda5ab8b259522be962840a49a448648d3f5d308 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 5 May 2023 19:15:19 +0700
Subject: [PATCH 298/691] more temp work

---
 .../imxrt/boards/mimxrt1010_evk/board.cmake   |  4 +-
 hw/bsp/imxrt/family.cmake                     | 48 +++++++++------
 src/CMakeLists.txt                            | 58 +++++++++----------
 3 files changed, 60 insertions(+), 50 deletions(-)

diff --git a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
index 52d1846ea..c43de5ba4 100644
--- a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
+++ b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
@@ -1,10 +1,10 @@
 set(MCU_VARIANT MIMXRT1011)
 
-target_sources(${PROJECT} PUBLIC
+target_sources(bsp PUBLIC
   ${CMAKE_CURRENT_LIST_DIR}/evkmimxrt1010_flexspi_nor_config.c
   )
 
-target_compile_definitions(${PROJECT} PUBLIC
+target_compile_definitions(bsp PUBLIC
   CPU_MIMXRT1011DAE5A
   CFG_EXAMPLE_VIDEO_READONLY
   )
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index c18fb01ab..53df88c47 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -2,6 +2,7 @@
 set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
 set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_LIST_DIR}/../../../examples/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
+
 function(family_configure_target TARGET)
   if (NOT BOARD)
     message(FATAL_ERROR "BOARD not specified")
@@ -17,9 +18,14 @@ function(family_configure_target TARGET)
   set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
   set(DEPS_SUBMODULES ${SDK_DIR})
 
+  # define BSP target
+  add_library(bsp STATIC
+    )
+
+  # include board specific cmake
   include(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board.cmake)
 
-  target_compile_definitions(${TARGET} PUBLIC
+  target_compile_definitions(bsp PUBLIC
     CFG_TUSB_MCU=OPT_MCU_MIMXRT
     __ARMVFP__=0
     __ARMFPV5__=0
@@ -32,11 +38,11 @@ function(family_configure_target TARGET)
     --specs=nano.specs
     )
 
-  target_sources(${TARGET} PUBLIC
+  target_sources(bsp PUBLIC
     # TinyUSB
-    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
-    ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
-    ${TOP}/src/portable/ehci/ehci.c
+#    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+#    ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+#    ${TOP}/src/portable/ehci/ehci.c
     # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${SDK_DIR}/drivers/common/fsl_common.c
@@ -49,18 +55,18 @@ function(family_configure_target TARGET)
     )
 
   if (TOOLCHAIN STREQUAL "gcc")
-    target_sources(${TARGET} PUBLIC
+    target_sources(bsp PUBLIC
       ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S
       )
 
-    target_link_options(${TARGET} PUBLIC
+    target_link_options(bsp PUBLIC
       "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld"
       )
   else ()
     # TODO support IAR
   endif ()
 
-  target_include_directories(${TARGET} PUBLIC
+  target_include_directories(bsp PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
@@ -73,25 +79,31 @@ function(family_configure_target TARGET)
     ${SDK_DIR}/drivers/lpuart
     )
 
-  # define tinyusb_config target
+  if(NOT TARGET tinyusb_config)
+    message(FATAL_ERROR "tinyusb_config target not found")
+  endif()
 
-  #target_include_directories(tinyusb_config INTERFACE
-  #  )
-
-  target_compile_definitions(tinyusb_config PUBLIC
+  target_compile_definitions(tinyusb_config INTERFACE
+    CFG_TUSB_MCU=OPT_MCU_MIMXRT
     )
 
-  # include tinyusb cmake
+  # include tinyusb CMakeList.txt for tinyusb target
   add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+
+  add_library(tinyusb_port STATIC
+    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+    ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+    ${TOP}/src/portable/ehci/ehci.c
+    )
+
+
   target_link_libraries(${TARGET} PUBLIC
     tinyusb
+    bsp
     )
-
-  #include(${TOP}/src/CMakeLists.txt)
-  #add_tinyusb(${TARGET})
-
 endfunction()
 
+
 function(family_add_freertos_config TARGET)
   add_library(freertos_config INTERFACE)
 
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index ec7fe32c4..e7e3125a2 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -34,33 +34,31 @@ target_link_libraries(tinyusb PUBLIC
   tinyusb_config
   )
 
-function(add_tinyusb TARGET)
-  target_sources(${TARGET} PUBLIC
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/tusb.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/common/tusb_fifo.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/device/usbd.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/device/usbd_control.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/audio/audio_device.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/cdc/cdc_device.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/dfu/dfu_device.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/dfu/dfu_rt_device.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/hid/hid_device.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/midi/midi_device.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/msc/msc_device.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/net/ecm_rndis_device.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/net/ncm_device.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/usbtmc/usbtmc_device.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/vendor/vendor_device.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/video/video_device.c
-    )
-
-  target_include_directories(${TARGET} PUBLIC
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-    )
-
-  # enable all possible warnings
-  target_compile_options(${TARGET} PUBLIC
-
-    )
-
-endfunction()
+#function(add_tinyusb TARGET)
+#  target_sources(${TARGET} PUBLIC
+#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/tusb.c
+#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/common/tusb_fifo.c
+#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/device/usbd.c
+#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/device/usbd_control.c
+#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/audio/audio_device.c
+#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/cdc/cdc_device.c
+#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/dfu/dfu_device.c
+#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/dfu/dfu_rt_device.c
+#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/hid/hid_device.c
+#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/midi/midi_device.c
+#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/msc/msc_device.c
+#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/net/ecm_rndis_device.c
+#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/net/ncm_device.c
+#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/usbtmc/usbtmc_device.c
+#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/vendor/vendor_device.c
+#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/video/video_device.c
+#    )
+#
+#  target_include_directories(${TARGET} PUBLIC
+#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+#    )
+#
+#  # enable all possible warnings
+#  target_compile_options(${TARGET} PUBLIC
+#    )
+#endfunction()

From f15f79df5d242fdeff06dff14a9550905f29d514 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 6 May 2023 15:14:54 +0700
Subject: [PATCH 299/691] cmake work well with imxrt

---
 examples/CMakeLists.txt                       |   6 +-
 examples/device/CMakeLists.txt                |   2 +-
 examples/device/audio_test/CMakeLists.txt     |   4 +-
 .../audio_test_multi_rate/CMakeLists.txt      |   4 +-
 examples/device/board_test/CMakeLists.txt     |   8 +-
 examples/device/cdc_dual_ports/CMakeLists.txt |  10 +-
 examples/device/cdc_msc/CMakeLists.txt        |  15 +-
 .../device/cdc_msc_freertos/CMakeLists.txt    |   2 +-
 .../hid_composite_freertos/CMakeLists.txt     |   2 +-
 examples/host/cdc_msc_hid/CMakeLists.txt      |   2 +-
 hw/bsp/family_support.cmake                   |   4 +-
 .../imxrt/boards/mimxrt1010_evk/board.cmake   |  17 +-
 hw/bsp/imxrt/family.cmake                     | 151 ++++++++++--------
 src/CMakeLists.txt                            | 106 ++++++------
 14 files changed, 167 insertions(+), 166 deletions(-)

diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt
index d91d8ca62..a23b4ed62 100644
--- a/examples/CMakeLists.txt
+++ b/examples/CMakeLists.txt
@@ -3,8 +3,8 @@ cmake_minimum_required(VERSION 3.5)
 #set(CMAKE_EXPORT_COMPILE_COMMANDS ON)
 include(${CMAKE_CURRENT_SOURCE_DIR}/../hw/bsp/family_support.cmake)
 
-project(tinyusb_examples)
+project(tinyusb_examples C CXX ASM)
 
 add_subdirectory(device)
-add_subdirectory(dual)
-add_subdirectory(host)
+#add_subdirectory(dual)
+#add_subdirectory(host)
diff --git a/examples/device/CMakeLists.txt b/examples/device/CMakeLists.txt
index 5520209e0..ac1bbf161 100644
--- a/examples/device/CMakeLists.txt
+++ b/examples/device/CMakeLists.txt
@@ -2,7 +2,7 @@ cmake_minimum_required(VERSION 3.5)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../hw/bsp/family_support.cmake)
 
-project(tinyusb_device_examples)
+project(tinyusb_device_examples C CXX ASM)
 family_initialize_project(tinyusb_device_examples ${CMAKE_CURRENT_LIST_DIR})
 
 # family_add_subdirectory will filter what to actually add based on selected FAMILY
diff --git a/examples/device/audio_test/CMakeLists.txt b/examples/device/audio_test/CMakeLists.txt
index b0889285c..87b7d07d4 100644
--- a/examples/device/audio_test/CMakeLists.txt
+++ b/examples/device/audio_test/CMakeLists.txt
@@ -21,12 +21,12 @@ add_executable(${PROJECT})
 target_sources(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
-)
+  )
 
 # Example include
 target_include_directories(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
-)
+  )
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
diff --git a/examples/device/audio_test_multi_rate/CMakeLists.txt b/examples/device/audio_test_multi_rate/CMakeLists.txt
index b0889285c..87b7d07d4 100644
--- a/examples/device/audio_test_multi_rate/CMakeLists.txt
+++ b/examples/device/audio_test_multi_rate/CMakeLists.txt
@@ -21,12 +21,12 @@ add_executable(${PROJECT})
 target_sources(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
-)
+  )
 
 # Example include
 target_include_directories(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
-)
+  )
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
diff --git a/examples/device/board_test/CMakeLists.txt b/examples/device/board_test/CMakeLists.txt
index c48efdaa5..4ab8d5a65 100644
--- a/examples/device/board_test/CMakeLists.txt
+++ b/examples/device/board_test/CMakeLists.txt
@@ -19,13 +19,13 @@ add_executable(${PROJECT})
 
 # Example source
 target_sources(${PROJECT} PUBLIC
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
-        )
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
+  )
 
 # Example include
 target_include_directories(${PROJECT} PUBLIC
-        ${CMAKE_CURRENT_SOURCE_DIR}/src
-        )
+  ${CMAKE_CURRENT_SOURCE_DIR}/src
+  )
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
diff --git a/examples/device/cdc_dual_ports/CMakeLists.txt b/examples/device/cdc_dual_ports/CMakeLists.txt
index d142e9c04..87b7d07d4 100644
--- a/examples/device/cdc_dual_ports/CMakeLists.txt
+++ b/examples/device/cdc_dual_ports/CMakeLists.txt
@@ -19,14 +19,14 @@ add_executable(${PROJECT})
 
 # Example source
 target_sources(${PROJECT} PUBLIC
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
-        )
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
+  )
 
 # Example include
 target_include_directories(${PROJECT} PUBLIC
-        ${CMAKE_CURRENT_SOURCE_DIR}/src
-        )
+  ${CMAKE_CURRENT_SOURCE_DIR}/src
+  )
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
diff --git a/examples/device/cdc_msc/CMakeLists.txt b/examples/device/cdc_msc/CMakeLists.txt
index 1115f51d1..63030e733 100644
--- a/examples/device/cdc_msc/CMakeLists.txt
+++ b/examples/device/cdc_msc/CMakeLists.txt
@@ -19,20 +19,13 @@ add_executable(${PROJECT})
 
 # Example source
 target_sources(${PROJECT} PUBLIC
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_disk.c
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
-        )
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_disk.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
+  )
 
 # Example include
 target_include_directories(${PROJECT} PUBLIC
-        ${CMAKE_CURRENT_SOURCE_DIR}/src
-        )
-
-# define tinyusb_config target
-add_library(tinyusb_config INTERFACE)
-
-target_include_directories(tinyusb_config INTERFACE
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
diff --git a/examples/device/cdc_msc_freertos/CMakeLists.txt b/examples/device/cdc_msc_freertos/CMakeLists.txt
index 699860223..75ec33145 100644
--- a/examples/device/cdc_msc_freertos/CMakeLists.txt
+++ b/examples/device/cdc_msc_freertos/CMakeLists.txt
@@ -35,7 +35,7 @@ target_include_directories(${PROJECT} PUBLIC
 family_configure_device_example(${PROJECT})
 
 if (NOT TARGET freertos_kernel)
-family_add_freertos_config(${PROJECT})
+family_configure_freertos_example(${PROJECT})
 add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/../../../lib/FreeRTOS-Kernel lib/FreeRTOS-Kernel)
 endif()
 
diff --git a/examples/device/hid_composite_freertos/CMakeLists.txt b/examples/device/hid_composite_freertos/CMakeLists.txt
index 9b0ffa4b6..30729f438 100644
--- a/examples/device/hid_composite_freertos/CMakeLists.txt
+++ b/examples/device/hid_composite_freertos/CMakeLists.txt
@@ -34,7 +34,7 @@ target_include_directories(${PROJECT} PUBLIC
 family_configure_device_example(${PROJECT})
 
 if (NOT TARGET freertos_kernel)
-family_add_freertos_config(${PROJECT})
+family_configure_freertos_example(${PROJECT})
 add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/../../../lib/FreeRTOS-Kernel lib/FreeRTOS-Kernel)
 endif()
 
diff --git a/examples/host/cdc_msc_hid/CMakeLists.txt b/examples/host/cdc_msc_hid/CMakeLists.txt
index b66ff2382..42dac5be7 100644
--- a/examples/host/cdc_msc_hid/CMakeLists.txt
+++ b/examples/host/cdc_msc_hid/CMakeLists.txt
@@ -5,7 +5,7 @@ include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index cc95dde9e..26baa6365 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -1,4 +1,6 @@
 if (NOT TARGET _family_support_marker)
+    add_library(_family_support_marker INTERFACE)
+
     include(CMakePrintHelpers)
 
     # Default to gcc
@@ -6,8 +8,6 @@ if (NOT TARGET _family_support_marker)
         set(TOOLCHAIN gcc)
     endif()
 
-    add_library(_family_support_marker INTERFACE)
-
     if (NOT FAMILY)
         message(FATAL_ERROR "You must set a FAMILY variable for the build (e.g. rp2040, eps32s2, esp32s3). You can do this via -DFAMILY=xxx on the cmake command line")
     endif()
diff --git a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
index c43de5ba4..d4015e488 100644
--- a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
+++ b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
@@ -1,10 +1,11 @@
 set(MCU_VARIANT MIMXRT1011)
 
-target_sources(bsp PUBLIC
-  ${CMAKE_CURRENT_LIST_DIR}/evkmimxrt1010_flexspi_nor_config.c
-  )
-
-target_compile_definitions(bsp PUBLIC
-  CPU_MIMXRT1011DAE5A
-  CFG_EXAMPLE_VIDEO_READONLY
-  )
+function(update_board TARGET)
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkmimxrt1010_flexspi_nor_config.c
+    )
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_MIMXRT1011DAE5A
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 53df88c47..1731d9e60 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -1,50 +1,34 @@
+if (TARGET _imxrt_family_inclusion_marker)
+  return()
+endif ()
+
+add_library(_imxrt_family_inclusion_marker INTERFACE)
+
+if (NOT BOARD)
+  message(FATAL_ERROR "BOARD not specified")
+endif ()
+
 # toolchain set up
 set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
 set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_LIST_DIR}/../../../examples/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 
-function(family_configure_target TARGET)
-  if (NOT BOARD)
-    message(FATAL_ERROR "BOARD not specified")
-  endif ()
 
-  # set output name to .elf
-  set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf)
-
-  # TOP is absolute path to root directory of TinyUSB git repo
-  set(TOP "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../..")
-  get_filename_component(TOP "${TOP}" REALPATH)
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+set(BOARD_TARGET board_${BOARD})
+if (NOT TARGET ${BOARD_TARGET})
+  # TOP is path to root directory
+  set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
 
   set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
-  set(DEPS_SUBMODULES ${SDK_DIR})
+  set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
 
-  # define BSP target
-  add_library(bsp STATIC
-    )
-
-  # include board specific cmake
-  include(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board.cmake)
-
-  target_compile_definitions(bsp PUBLIC
-    CFG_TUSB_MCU=OPT_MCU_MIMXRT
-    __ARMVFP__=0
-    __ARMFPV5__=0
-    XIP_EXTERNAL_FLASH=1
-    XIP_BOOT_HEADER_ENABLE=1
-    )
-
-  target_link_options(${TARGET} PUBLIC
-    --specs=nosys.specs
-    --specs=nano.specs
-    )
-
-  target_sources(bsp PUBLIC
-    # TinyUSB
-#    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
-#    ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
-#    ${TOP}/src/portable/ehci/ehci.c
-    # BSP
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+  add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/drivers/common/fsl_common.c
     ${SDK_DIR}/drivers/igpio/fsl_gpio.c
     ${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
@@ -53,24 +37,15 @@ function(family_configure_target TARGET)
     ${SDK_DIR}/devices/${MCU_VARIANT}/project_template/clock_config.c
     ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
     )
-
-  if (TOOLCHAIN STREQUAL "gcc")
-    target_sources(bsp PUBLIC
-      ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S
-      )
-
-    target_link_options(bsp PUBLIC
-      "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld"
-      )
-  else ()
-    # TODO support IAR
-  endif ()
-
-  target_include_directories(bsp PUBLIC
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
-    ${SDK_DIR}/CMSIS/Include
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    CFG_TUSB_MCU=OPT_MCU_MIMXRT
+    __ARMVFP__=0
+    __ARMFPV5__=0
+    XIP_EXTERNAL_FLASH=1
+    XIP_BOOT_HEADER_ENABLE=1
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMSIS_DIR}/CMSIS/Core/Include
     ${SDK_DIR}/devices/${MCU_VARIANT}
     ${SDK_DIR}/devices/${MCU_VARIANT}/project_template
     ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
@@ -78,33 +53,71 @@ function(family_configure_target TARGET)
     ${SDK_DIR}/drivers/igpio
     ${SDK_DIR}/drivers/lpuart
     )
+  update_board(${BOARD_TARGET})
 
-  if(NOT TARGET tinyusb_config)
-    message(FATAL_ERROR "tinyusb_config target not found")
-  endif()
+  if (TOOLCHAIN STREQUAL "gcc")
+    target_sources(${BOARD_TARGET} PUBLIC
+      ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S
+      )
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld"
+      --specs=nosys.specs
+      --specs=nano.specs
+      )
+  else ()
+    # TODO support IAR
+  endif ()
+endif () # BOARD_TARGET
 
-  target_compile_definitions(tinyusb_config INTERFACE
-    CFG_TUSB_MCU=OPT_MCU_MIMXRT
-    )
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_target TARGET)
+  # set output name to .elf
+  set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf)
 
-  # include tinyusb CMakeList.txt for tinyusb target
-  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+  # TOP is path to root directory
+  set(TOP "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../..")
 
-  add_library(tinyusb_port STATIC
+  #---------- BSP_TARGET ----------
+  # BSP_TARGET is built for each example since it depends on example's tusb_config.h
+  set(BSP_TARGET "${TARGET}_bsp_${BOARD}")
+  add_library(${BSP_TARGET} STATIC
+    # TinyUSB
     ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
     ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
     ${TOP}/src/portable/ehci/ehci.c
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    )
+  target_include_directories(${BSP_TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
+  #---------- TinyUSB ----------
+  # tinyusb target is built for each example since it depends on example's tusb_config.h
+  set(TINYUSB_TARGET_PREFIX ${TARGET})
+  add_library(${TARGET}_tinyusb_config INTERFACE)
 
-  target_link_libraries(${TARGET} PUBLIC
-    tinyusb
-    bsp
+  target_include_directories(${TARGET}_tinyusb_config INTERFACE
+    ${CMAKE_CURRENT_SOURCE_DIR}/src
     )
+  target_compile_definitions(${TARGET}_tinyusb_config INTERFACE
+    CFG_TUSB_MCU=OPT_MCU_MIMXRT
+    )
+
+  # tinyusb's CMakeList.txt
+  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+
+  # Link dependencies
+  target_link_libraries(${BSP_TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}_tinyusb)
+  target_link_libraries(${TARGET} PUBLIC ${BSP_TARGET} ${TARGET}_tinyusb)
 endfunction()
 
 
-function(family_add_freertos_config TARGET)
+function(family_configure_freertos_example TARGET)
   add_library(freertos_config INTERFACE)
 
   # add path to FreeRTOSConfig.h
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index e7e3125a2..21aa23d54 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -3,62 +3,56 @@
 
 cmake_minimum_required(VERSION 3.17)
 
-if (NOT TARGET tinyusb_config)
-  message(FATAL_ERROR "tinyusb_config target is not defined")
+# Add tinyusb to a target
+function(add_tinyusb TARGET)
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/tusb.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/common/tusb_fifo.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/device/usbd.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/device/usbd_control.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/audio/audio_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/cdc/cdc_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/dfu/dfu_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/dfu/dfu_rt_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/hid/hid_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/midi/midi_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/msc/msc_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/net/ecm_rndis_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/net/ncm_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/usbtmc/usbtmc_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/vendor/vendor_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/video/video_device.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    )
+  # enable all possible warnings
+  target_compile_options(${TARGET} PUBLIC
+    )
+endfunction()
+
+set(TINYUSB_TARGET "tinyusb")
+set(TINYUSB_CONFIG_TARGET "tinyusb_config")
+
+if (DEFINED TINYUSB_TARGET_PREFIX)
+  set(TINYUSB_TARGET "${TINYUSB_TARGET_PREFIX}_${TINYUSB_TARGET}")
+  set(TINYUSB_CONFIG_TARGET "${TINYUSB_TARGET_PREFIX}_${TINYUSB_CONFIG_TARGET}")
+endif ()
+
+if (DEFINED TINYUSB_TARGET_SUFFIX)
+  set(TINYUSB_TARGET "${TINYUSB_TARGET}_${TINYUSB_TARGET_SUFFIX}")
+  set(TINYUSB_CONFIG_TARGET "${TINYUSB_CONFIG_TARGET}_${TINYUSB_TARGET_SUFFIX}")
+endif ()
+
+add_library(${TINYUSB_TARGET} STATIC)
+add_tinyusb(${TINYUSB_TARGET})
+
+# Link with tinyusb_config target
+
+if (NOT TARGET ${TINYUSB_CONFIG_TARGET})
+  message(FATAL_ERROR "${TINYUSB_CONFIG_TARGET} target is not defined")
 endif()
 
-add_library(tinyusb STATIC
-  ${CMAKE_CURRENT_LIST_DIR}/tusb.c
-  ${CMAKE_CURRENT_LIST_DIR}/common/tusb_fifo.c
-  ${CMAKE_CURRENT_LIST_DIR}/device/usbd.c
-  ${CMAKE_CURRENT_LIST_DIR}/device/usbd_control.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/audio/audio_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/cdc/cdc_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/dfu/dfu_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/dfu/dfu_rt_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/hid/hid_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/midi/midi_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/msc/msc_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/net/ecm_rndis_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/net/ncm_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/usbtmc/usbtmc_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/vendor/vendor_device.c
-  ${CMAKE_CURRENT_LIST_DIR}/class/video/video_device.c
+target_link_libraries(${TINYUSB_TARGET} PUBLIC
+  ${TINYUSB_CONFIG_TARGET}
   )
-
-target_include_directories(tinyusb PUBLIC
-  ${CMAKE_CURRENT_LIST_DIR}
-  )
-
-target_link_libraries(tinyusb PUBLIC
-  tinyusb_config
-  )
-
-#function(add_tinyusb TARGET)
-#  target_sources(${TARGET} PUBLIC
-#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/tusb.c
-#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/common/tusb_fifo.c
-#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/device/usbd.c
-#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/device/usbd_control.c
-#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/audio/audio_device.c
-#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/cdc/cdc_device.c
-#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/dfu/dfu_device.c
-#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/dfu/dfu_rt_device.c
-#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/hid/hid_device.c
-#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/midi/midi_device.c
-#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/msc/msc_device.c
-#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/net/ecm_rndis_device.c
-#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/net/ncm_device.c
-#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/usbtmc/usbtmc_device.c
-#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/vendor/vendor_device.c
-#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/video/video_device.c
-#    )
-#
-#  target_include_directories(${TARGET} PUBLIC
-#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-#    )
-#
-#  # enable all possible warnings
-#  target_compile_options(${TARGET} PUBLIC
-#    )
-#endfunction()

From 6945c594d53ca6a35f1f0bb120b5a652c6ce9e84 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 7 May 2023 22:09:08 +0700
Subject: [PATCH 300/691] update all device cmake example for imx

---
 .idea/runConfigurations/rt10xx_pyocd.xml      |  7 ---
 examples/CMakeLists.txt                       |  6 +--
 examples/cmake/cpu/cortex-m7.cmake            | 18 ++++---
 examples/device/CMakeLists.txt                |  2 +-
 .../device/cdc_msc_freertos/CMakeLists.txt    | 10 +---
 .../hid_composite_freertos/CMakeLists.txt     | 10 +---
 examples/dual/CMakeLists.txt                  |  4 +-
 .../host_hid_to_device_cdc/CMakeLists.txt     |  4 +-
 examples/host/CMakeLists.txt                  |  4 +-
 examples/host/bare_api/CMakeLists.txt         |  4 +-
 examples/host/hid_controller/CMakeLists.txt   |  4 +-
 .../host/msc_file_explorer/CMakeLists.txt     |  4 +-
 hw/bsp/imxrt/FreeRTOSConfig/CMakeLists.txt    |  8 +++
 .../imxrt/boards/mimxrt1010_evk/board.cmake   |  3 ++
 hw/bsp/imxrt/family.cmake                     | 52 ++++++++++++-------
 src/CMakeLists.txt                            |  8 +--
 16 files changed, 81 insertions(+), 67 deletions(-)
 delete mode 100644 .idea/runConfigurations/rt10xx_pyocd.xml
 create mode 100644 hw/bsp/imxrt/FreeRTOSConfig/CMakeLists.txt

diff --git a/.idea/runConfigurations/rt10xx_pyocd.xml b/.idea/runConfigurations/rt10xx_pyocd.xml
deleted file mode 100644
index f5c142690..000000000
--- a/.idea/runConfigurations/rt10xx_pyocd.xml
+++ /dev/null
@@ -1,7 +0,0 @@
-<component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rt10xx pyocd" type="CMakeRunConfiguration" factoryName="Application" PROGRAM_PARAMS="flash -t mimxrt1010 $CMakeCurrentProductFile$" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc_hid" TARGET_NAME="msc_dual_lun" RUN_PATH="$USER_HOME$/.local/bin/pyocd">
-    <method v="2">
-      <option name="com.jetbrains.cidr.execution.CidrBuildBeforeRunTaskProvider$BuildBeforeRunTask" enabled="true" />
-    </method>
-  </configuration>
-</component>
\ No newline at end of file
diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt
index a23b4ed62..91c9fb098 100644
--- a/examples/CMakeLists.txt
+++ b/examples/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 #set(CMAKE_EXPORT_COMPILE_COMMANDS ON)
 include(${CMAKE_CURRENT_SOURCE_DIR}/../hw/bsp/family_support.cmake)
@@ -6,5 +6,5 @@ include(${CMAKE_CURRENT_SOURCE_DIR}/../hw/bsp/family_support.cmake)
 project(tinyusb_examples C CXX ASM)
 
 add_subdirectory(device)
-#add_subdirectory(dual)
-#add_subdirectory(host)
+add_subdirectory(dual)
+add_subdirectory(host)
diff --git a/examples/cmake/cpu/cortex-m7.cmake b/examples/cmake/cpu/cortex-m7.cmake
index 2b258726f..458d8b438 100644
--- a/examples/cmake/cpu/cortex-m7.cmake
+++ b/examples/cmake/cpu/cortex-m7.cmake
@@ -1,6 +1,12 @@
-set(TOOLCHAIN_COMMON_FLAGS
-  -mthumb
-  -mcpu=cortex-m7
-  -mfloat-abi=hard
-  -mfpu=fpv5-d16
-  )
+if (TOOLCHAIN STREQUAL "gcc")
+  set(TOOLCHAIN_COMMON_FLAGS
+    -mthumb
+    -mcpu=cortex-m7
+    -mfloat-abi=hard
+    -mfpu=fpv5-d16
+    )
+
+  set(FREERTOS_PORT GCC_ARM_CM7 CACHE INTERNAL "")
+else ()
+  # TODO support IAR
+endif ()
diff --git a/examples/device/CMakeLists.txt b/examples/device/CMakeLists.txt
index ac1bbf161..5b077a5e1 100644
--- a/examples/device/CMakeLists.txt
+++ b/examples/device/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/cdc_msc_freertos/CMakeLists.txt b/examples/device/cdc_msc_freertos/CMakeLists.txt
index 75ec33145..319ad0356 100644
--- a/examples/device/cdc_msc_freertos/CMakeLists.txt
+++ b/examples/device/cdc_msc_freertos/CMakeLists.txt
@@ -34,11 +34,5 @@ target_include_directories(${PROJECT} PUBLIC
 # in hw/bsp/FAMILY/family.cmake for details.
 family_configure_device_example(${PROJECT})
 
-if (NOT TARGET freertos_kernel)
-family_configure_freertos_example(${PROJECT})
-add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/../../../lib/FreeRTOS-Kernel lib/FreeRTOS-Kernel)
-endif()
-
-target_link_libraries(${PROJECT} PUBLIC
-  freertos_kernel
-  )
+# Add FreeRTOS for this example
+family_add_freertos(${PROJECT})
diff --git a/examples/device/hid_composite_freertos/CMakeLists.txt b/examples/device/hid_composite_freertos/CMakeLists.txt
index 30729f438..211904cf9 100644
--- a/examples/device/hid_composite_freertos/CMakeLists.txt
+++ b/examples/device/hid_composite_freertos/CMakeLists.txt
@@ -33,11 +33,5 @@ target_include_directories(${PROJECT} PUBLIC
 # in hw/bsp/FAMILY/family.cmake for details.
 family_configure_device_example(${PROJECT})
 
-if (NOT TARGET freertos_kernel)
-family_configure_freertos_example(${PROJECT})
-add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/../../../lib/FreeRTOS-Kernel lib/FreeRTOS-Kernel)
-endif()
-
-target_link_libraries(${PROJECT} PUBLIC
-  freertos_kernel
-  )
+# Add FreeRTOS for this example
+family_add_freertos(${PROJECT})
diff --git a/examples/dual/CMakeLists.txt b/examples/dual/CMakeLists.txt
index d2f9a42f0..d211c8b83 100644
--- a/examples/dual/CMakeLists.txt
+++ b/examples/dual/CMakeLists.txt
@@ -1,8 +1,8 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../hw/bsp/family_support.cmake)
 
-project(tinyusb_dual_examples)
+project(tinyusb_dual_examples C CXX ASM)
 family_initialize_project(tinyusb_dual_examples ${CMAKE_CURRENT_LIST_DIR})
 if (FAMILY STREQUAL "rp2040" AND NOT TARGET tinyusb_pico_pio_usb)
     message("Skipping dual host/device mode examples as Pico-PIO-USB is not available")
diff --git a/examples/dual/host_hid_to_device_cdc/CMakeLists.txt b/examples/dual/host_hid_to_device_cdc/CMakeLists.txt
index 724d1e119..3505d39eb 100644
--- a/examples/dual/host_hid_to_device_cdc/CMakeLists.txt
+++ b/examples/dual/host_hid_to_device_cdc/CMakeLists.txt
@@ -1,11 +1,11 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
diff --git a/examples/host/CMakeLists.txt b/examples/host/CMakeLists.txt
index 758973ab2..bedd2220b 100644
--- a/examples/host/CMakeLists.txt
+++ b/examples/host/CMakeLists.txt
@@ -1,8 +1,8 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../hw/bsp/family_support.cmake)
 
-project(tinyusb_host_examples)
+project(tinyusb_host_examples C CXX ASM)
 family_initialize_project(tinyusb_host_examples ${CMAKE_CURRENT_LIST_DIR})
 
 # family_add_subdirectory will filter what to actually add based on selected FAMILY
diff --git a/examples/host/bare_api/CMakeLists.txt b/examples/host/bare_api/CMakeLists.txt
index 616edd4ac..b6d8c9c89 100644
--- a/examples/host/bare_api/CMakeLists.txt
+++ b/examples/host/bare_api/CMakeLists.txt
@@ -1,11 +1,11 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
diff --git a/examples/host/hid_controller/CMakeLists.txt b/examples/host/hid_controller/CMakeLists.txt
index ac3070b82..e1d2f1642 100644
--- a/examples/host/hid_controller/CMakeLists.txt
+++ b/examples/host/hid_controller/CMakeLists.txt
@@ -1,11 +1,11 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
diff --git a/examples/host/msc_file_explorer/CMakeLists.txt b/examples/host/msc_file_explorer/CMakeLists.txt
index 7955b3078..2ab0aa881 100644
--- a/examples/host/msc_file_explorer/CMakeLists.txt
+++ b/examples/host/msc_file_explorer/CMakeLists.txt
@@ -1,11 +1,11 @@
-cmake_minimum_required(VERSION 3.5)
+cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
-project(${PROJECT})
+project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
diff --git a/hw/bsp/imxrt/FreeRTOSConfig/CMakeLists.txt b/hw/bsp/imxrt/FreeRTOSConfig/CMakeLists.txt
new file mode 100644
index 000000000..0bacaf824
--- /dev/null
+++ b/hw/bsp/imxrt/FreeRTOSConfig/CMakeLists.txt
@@ -0,0 +1,8 @@
+if (NOT TARGET freertos_config)
+  add_library(freertos_config INTERFACE)
+
+  # add path to FreeRTOSConfig.h
+  target_include_directories(freertos_config SYSTEM INTERFACE
+    ${CMAKE_CURRENT_LIST_DIR}
+    )
+endif()
diff --git a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
index d4015e488..02955e356 100644
--- a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
+++ b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
@@ -1,5 +1,8 @@
 set(MCU_VARIANT MIMXRT1011)
 
+set(JLINK_DEVICE MIMXRT1011DAE5A)
+set(PYOCD_TARGET mimxrt1010)
+
 function(update_board TARGET)
   target_sources(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkmimxrt1010_flexspi_nor_config.c
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 1731d9e60..653885bb2 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -81,7 +81,7 @@ function(family_configure_target TARGET)
 
   #---------- BSP_TARGET ----------
   # BSP_TARGET is built for each example since it depends on example's tusb_config.h
-  set(BSP_TARGET "${TARGET}_bsp_${BOARD}")
+  set(BSP_TARGET "${TARGET}-bsp")
   add_library(${BSP_TARGET} STATIC
     # TinyUSB
     ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
@@ -98,13 +98,13 @@ function(family_configure_target TARGET)
 
   #---------- TinyUSB ----------
   # tinyusb target is built for each example since it depends on example's tusb_config.h
-  set(TINYUSB_TARGET_PREFIX ${TARGET})
-  add_library(${TARGET}_tinyusb_config INTERFACE)
+  set(TINYUSB_TARGET_PREFIX ${TARGET}-)
+  add_library(${TARGET}-tinyusb_config INTERFACE)
 
-  target_include_directories(${TARGET}_tinyusb_config INTERFACE
+  target_include_directories(${TARGET}-tinyusb_config INTERFACE
     ${CMAKE_CURRENT_SOURCE_DIR}/src
     )
-  target_compile_definitions(${TARGET}_tinyusb_config INTERFACE
+  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
     CFG_TUSB_MCU=OPT_MCU_MIMXRT
     )
 
@@ -112,25 +112,41 @@ function(family_configure_target TARGET)
   add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
 
   # Link dependencies
-  target_link_libraries(${BSP_TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}_tinyusb)
-  target_link_libraries(${TARGET} PUBLIC ${BSP_TARGET} ${TARGET}_tinyusb)
+  target_link_libraries(${BSP_TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
+  target_link_libraries(${TARGET} PUBLIC ${BSP_TARGET} ${TARGET}-tinyusb)
+
+  # Flash Target
+  add_custom_target(${TARGET}-pyocd
+    COMMAND pyocd flash -t ${PYOCD_TARGET} $<TARGET_FILE:${TARGET}>
+    )
 endfunction()
 
 
-function(family_configure_freertos_example TARGET)
-  add_library(freertos_config INTERFACE)
+function(family_add_freertos TARGET)
+  # freertos_config
+  add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/FreeRTOSConfig ${CMAKE_CURRENT_BINARY_DIR}/freertos_config)
 
-  # add path to FreeRTOSConfig.h
-  target_include_directories(freertos_config SYSTEM INTERFACE
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/FreeRTOSConfig
+  ## freertos
+  if (NOT TARGET freertos_kernel)
+    add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../../lib/FreeRTOS-Kernel ${CMAKE_CURRENT_BINARY_DIR}/freertos_kernel)
+  endif ()
+
+  # Add FreeRTOS option to tinyusb_config
+  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
+    CFG_TUSB_OS=OPT_OS_FREERTOS
+    )
+  # tinyusb need to be linked with freeRTOS kernel
+  target_link_libraries(${TARGET}-tinyusb PUBLIC
+    freertos_kernel
     )
 
-  # select freertos port
-  if (TOOLCHAIN STREQUAL "gcc")
-    set(FREERTOS_PORT "GCC_ARM_CM7" CACHE INTERNAL "")
-  else ()
-    # TODO support IAR
-  endif ()
+  target_link_libraries(${TARGET}-tinyusb PUBLIC
+    freertos_kernel
+    )
+
+  target_link_libraries(${TARGET} PUBLIC
+    freertos_kernel
+    )
 endfunction()
 
 function(family_configure_device_example TARGET)
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 21aa23d54..02f962f44 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -35,13 +35,13 @@ set(TINYUSB_TARGET "tinyusb")
 set(TINYUSB_CONFIG_TARGET "tinyusb_config")
 
 if (DEFINED TINYUSB_TARGET_PREFIX)
-  set(TINYUSB_TARGET "${TINYUSB_TARGET_PREFIX}_${TINYUSB_TARGET}")
-  set(TINYUSB_CONFIG_TARGET "${TINYUSB_TARGET_PREFIX}_${TINYUSB_CONFIG_TARGET}")
+  set(TINYUSB_TARGET "${TINYUSB_TARGET_PREFIX}${TINYUSB_TARGET}")
+  set(TINYUSB_CONFIG_TARGET "${TINYUSB_TARGET_PREFIX}${TINYUSB_CONFIG_TARGET}")
 endif ()
 
 if (DEFINED TINYUSB_TARGET_SUFFIX)
-  set(TINYUSB_TARGET "${TINYUSB_TARGET}_${TINYUSB_TARGET_SUFFIX}")
-  set(TINYUSB_CONFIG_TARGET "${TINYUSB_CONFIG_TARGET}_${TINYUSB_TARGET_SUFFIX}")
+  set(TINYUSB_TARGET "${TINYUSB_TARGET}${TINYUSB_TARGET_SUFFIX}")
+  set(TINYUSB_CONFIG_TARGET "${TINYUSB_CONFIG_TARGET}${TINYUSB_TARGET_SUFFIX}")
 endif ()
 
 add_library(${TINYUSB_TARGET} STATIC)

From 654f1821769f50c44f786032bedfe417a9ad4d0f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 8 May 2023 00:24:48 +0700
Subject: [PATCH 301/691] build host examples with imx

---
 examples/host/cdc_msc_hid/CMakeLists.txt      | 14 +++---
 examples/host/hid_controller/CMakeLists.txt   | 10 ++--
 .../host/msc_file_explorer/CMakeLists.txt     | 20 ++++----
 hw/bsp/board.c                                | 49 -------------------
 hw/bsp/imxrt/family.cmake                     |  7 +++
 src/CMakeLists.txt                            |  9 ++++
 6 files changed, 38 insertions(+), 71 deletions(-)

diff --git a/examples/host/cdc_msc_hid/CMakeLists.txt b/examples/host/cdc_msc_hid/CMakeLists.txt
index 42dac5be7..68b52e274 100644
--- a/examples/host/cdc_msc_hid/CMakeLists.txt
+++ b/examples/host/cdc_msc_hid/CMakeLists.txt
@@ -14,16 +14,16 @@ add_executable(${PROJECT})
 
 # Example source
 target_sources(${PROJECT} PUBLIC
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/cdc_app.c
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/hid_app.c
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_app.c
-        )
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/cdc_app.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/hid_app.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_app.c
+  )
 
 # Example include
 target_include_directories(${PROJECT} PUBLIC
-        ${CMAKE_CURRENT_SOURCE_DIR}/src
-        )
+  ${CMAKE_CURRENT_SOURCE_DIR}/src
+  )
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
diff --git a/examples/host/hid_controller/CMakeLists.txt b/examples/host/hid_controller/CMakeLists.txt
index e1d2f1642..e27f83c53 100644
--- a/examples/host/hid_controller/CMakeLists.txt
+++ b/examples/host/hid_controller/CMakeLists.txt
@@ -14,14 +14,14 @@ add_executable(${PROJECT})
 
 # Example source
 target_sources(${PROJECT} PUBLIC
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/hid_app.c
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
-        )
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/hid_app.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
+  )
 
 # Example include
 target_include_directories(${PROJECT} PUBLIC
-        ${CMAKE_CURRENT_SOURCE_DIR}/src
-        )
+  ${CMAKE_CURRENT_SOURCE_DIR}/src
+  )
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
diff --git a/examples/host/msc_file_explorer/CMakeLists.txt b/examples/host/msc_file_explorer/CMakeLists.txt
index 2ab0aa881..2d5600059 100644
--- a/examples/host/msc_file_explorer/CMakeLists.txt
+++ b/examples/host/msc_file_explorer/CMakeLists.txt
@@ -14,19 +14,19 @@ add_executable(${PROJECT})
 
 # Example source
 target_sources(${PROJECT} PUBLIC
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_app.c
-        ${TOP}/lib/fatfs/source/ff.c
-        ${TOP}/lib/fatfs/source/ffsystem.c
-        ${TOP}/lib/fatfs/source/ffunicode.c
-        )
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_app.c
+  ${TOP}/lib/fatfs/source/ff.c
+  ${TOP}/lib/fatfs/source/ffsystem.c
+  ${TOP}/lib/fatfs/source/ffunicode.c
+  )
 
 # Example include
 target_include_directories(${PROJECT} PUBLIC
-        ${CMAKE_CURRENT_SOURCE_DIR}/src
-        ${TOP}/lib/fatfs/source
-        ${TOP}/lib/embedded-cli
-        )
+  ${CMAKE_CURRENT_SOURCE_DIR}/src
+  ${TOP}/lib/fatfs/source
+  ${TOP}/lib/embedded-cli
+  )
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
diff --git a/hw/bsp/board.c b/hw/bsp/board.c
index e715bdf2e..66ffcb199 100644
--- a/hw/bsp/board.c
+++ b/hw/bsp/board.c
@@ -25,55 +25,6 @@
 
 #include "board.h"
 
-#if 0
-#define LED_PHASE_MAX   8
-
-static struct
-{
-  uint32_t phase[LED_PHASE_MAX];
-  uint8_t phase_count;
-
-  bool led_state;
-  uint8_t current_phase;
-  uint32_t current_ms;
-}led_pattern;
-
-void board_led_pattern(uint32_t const phase_ms[], uint8_t count)
-{
-  memcpy(led_pattern.phase, phase_ms, 4*count);
-  led_pattern.phase_count = count;
-
-  // reset with 1st phase is on
-  led_pattern.current_ms = board_millis();
-  led_pattern.current_phase = 0;
-  led_pattern.led_state = true;
-  board_led_on();
-}
-
-void board_led_task(void)
-{
-  if ( led_pattern.phase_count == 0 ) return;
-
-  uint32_t const duration = led_pattern.phase[led_pattern.current_phase];
-
-  // return if not enough time
-  if (board_millis() - led_pattern.current_ms < duration) return;
-
-  led_pattern.led_state = !led_pattern.led_state;
-  board_led_write(led_pattern.led_state);
-
-  led_pattern.current_ms += duration;
-  led_pattern.current_phase++;
-
-  if (led_pattern.current_phase == led_pattern.phase_count)
-  {
-    led_pattern.current_phase = 0;
-    led_pattern.led_state = true;
-    board_led_on();
-  }
-}
-#endif
-
 //--------------------------------------------------------------------+
 // newlib read()/write() retarget
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 653885bb2..b180f725e 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -12,6 +12,8 @@ endif ()
 set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
 set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_LIST_DIR}/../../../examples/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
+set(FAMILY_MCUS MIMXRT CACHE INTERNAL "")
+
 # include board specific
 include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 
@@ -89,6 +91,7 @@ function(family_configure_target TARGET)
     ${TOP}/src/portable/ehci/ehci.c
     # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
   target_include_directories(${BSP_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -152,3 +155,7 @@ endfunction()
 function(family_configure_device_example TARGET)
   family_configure_target(${TARGET})
 endfunction()
+
+function(family_configure_host_example TARGET)
+  family_configure_target(${TARGET})
+endfunction()
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 02f962f44..0b99d8919 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -6,8 +6,10 @@ cmake_minimum_required(VERSION 3.17)
 # Add tinyusb to a target
 function(add_tinyusb TARGET)
   target_sources(${TARGET} PUBLIC
+    # common
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/tusb.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/common/tusb_fifo.c
+    # device
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/device/usbd.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/device/usbd_control.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/audio/audio_device.c
@@ -22,6 +24,13 @@ function(add_tinyusb TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/usbtmc/usbtmc_device.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/vendor/vendor_device.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/video/video_device.c
+    # host
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/host/usbh.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/host/hub.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/cdc/cdc_host.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/hid/hid_host.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/msc/msc_host.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/vendor/vendor_host.c
     )
   target_include_directories(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}

From 4fc4f35a8af6465eb2137f765e994de1029e9c5a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 8 May 2023 17:25:47 +0700
Subject: [PATCH 302/691] fix linking missing ivt symbol for imxrt with cmake

changed device port = 0, host port =1 for imxrt 1060 and 1064
---
 .../runConfigurations/{rt10xx.xml => rt1010.xml}  |  2 +-
 .idea/runConfigurations/tinyusb_examples.xml      |  5 -----
 examples/cmake/cpu/cortex-m7.cmake                |  2 +-
 examples/cmake/toolchain/arm_gcc.cmake            |  8 +++++++-
 examples/cmake/toolchain/set_flags.cmake          |  3 +++
 examples/device/cdc_msc/CMakeLists.txt            |  1 +
 examples/rules.mk                                 |  2 +-
 hw/bsp/imxrt/boards/mimxrt1060_evk/board.cmake    | 15 +++++++++++++++
 hw/bsp/imxrt/boards/mimxrt1060_evk/board.mk       |  4 ++--
 hw/bsp/imxrt/boards/mimxrt1064_evk/board.cmake    | 15 +++++++++++++++
 hw/bsp/imxrt/boards/mimxrt1064_evk/board.mk       |  4 ++--
 hw/bsp/imxrt/family.c                             |  1 +
 hw/bsp/imxrt/family.cmake                         | 12 +++++++++++-
 13 files changed, 60 insertions(+), 14 deletions(-)
 rename .idea/runConfigurations/{rt10xx.xml => rt1010.xml} (74%)
 delete mode 100644 .idea/runConfigurations/tinyusb_examples.xml
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1060_evk/board.cmake
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1064_evk/board.cmake

diff --git a/.idea/runConfigurations/rt10xx.xml b/.idea/runConfigurations/rt1010.xml
similarity index 74%
rename from .idea/runConfigurations/rt10xx.xml
rename to .idea/runConfigurations/rt1010.xml
index 332b4d477..700cb5732 100644
--- a/.idea/runConfigurations/rt10xx.xml
+++ b/.idea/runConfigurations/rt1010.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rt10xx" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="gdbserver -p 55503 -t mimxrt1010" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_device_examples" TARGET_NAME="cdc_msc_freertos" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_device_examples" RUN_TARGET_NAME="cdc_msc_freertos">
+  <configuration default="false" name="rt1010" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="gdbserver -p 55503 -t mimxrt1010" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="rt1060 evk" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::55503" executable="$USER_HOME$/.local/bin/pyocd" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/tinyusb_examples.xml b/.idea/runConfigurations/tinyusb_examples.xml
deleted file mode 100644
index 60e586bbc..000000000
--- a/.idea/runConfigurations/tinyusb_examples.xml
+++ /dev/null
@@ -1,5 +0,0 @@
-<component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="tinyusb_examples" type="CMakeListConfigurationType" factoryName="CMakeListConfigurationFactory">
-    <method v="2" />
-  </configuration>
-</component>
\ No newline at end of file
diff --git a/examples/cmake/cpu/cortex-m7.cmake b/examples/cmake/cpu/cortex-m7.cmake
index 458d8b438..481c86bc5 100644
--- a/examples/cmake/cpu/cortex-m7.cmake
+++ b/examples/cmake/cpu/cortex-m7.cmake
@@ -1,5 +1,5 @@
 if (TOOLCHAIN STREQUAL "gcc")
-  set(TOOLCHAIN_COMMON_FLAGS
+  list(APPEND TOOLCHAIN_COMMON_FLAGS
     -mthumb
     -mcpu=cortex-m7
     -mfloat-abi=hard
diff --git a/examples/cmake/toolchain/arm_gcc.cmake b/examples/cmake/toolchain/arm_gcc.cmake
index c5937192e..c7b6cff98 100644
--- a/examples/cmake/toolchain/arm_gcc.cmake
+++ b/examples/cmake/toolchain/arm_gcc.cmake
@@ -25,7 +25,13 @@ list(APPEND TOOLCHAIN_COMMON_FLAGS
   -fno-strict-aliasing
   )
 
-set(TOOLCHAIN_WARNING_FLAGS
+list(APPEND TOOLCHAIN_EXE_LINKER_FLAGS
+  -Wl,--print-memory-usage
+  -Wl,--gc-sections
+  -Wl,--cref
+  )
+
+list(APPEND TOOLCHAIN_WARNING_FLAGS
   -Wall
   -Wextra
   -Werror
diff --git a/examples/cmake/toolchain/set_flags.cmake b/examples/cmake/toolchain/set_flags.cmake
index da381c254..27631abcd 100644
--- a/examples/cmake/toolchain/set_flags.cmake
+++ b/examples/cmake/toolchain/set_flags.cmake
@@ -11,6 +11,9 @@ foreach(LANG IN ITEMS C CXX ASM)
     set(CMAKE_${LANG}_FLAGS_DEBUG_INIT "-Og")
 endforeach()
 
+# Linker
+list(JOIN TOOLCHAIN_EXE_LINKER_FLAGS " " CMAKE_EXE_LINKER_FLAGS_INIT)
+
 # try_compile is cmake test compiling its own example,
 # pass -nostdlib to skip stdlib linking
 get_property(IS_IN_TRY_COMPILE GLOBAL PROPERTY IN_TRY_COMPILE)
diff --git a/examples/device/cdc_msc/CMakeLists.txt b/examples/device/cdc_msc/CMakeLists.txt
index 63030e733..4ec172f17 100644
--- a/examples/device/cdc_msc/CMakeLists.txt
+++ b/examples/device/cdc_msc/CMakeLists.txt
@@ -1,4 +1,5 @@
 cmake_minimum_required(VERSION 3.17)
+set_property(GLOBAL PROPERTY USE_FOLDERS ON)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/rules.mk b/examples/rules.mk
index c125408df..3ec3c880b 100644
--- a/examples/rules.mk
+++ b/examples/rules.mk
@@ -169,7 +169,7 @@ $(BUILD)/$(PROJECT).hex: $(BUILD)/$(PROJECT).elf
 
 $(BUILD)/$(PROJECT).elf: $(OBJ)
 	@echo LINK $@
-	@$(LD) -o $@ $(LDFLAGS) $^ -Wl,--start-group $(LIBS) -Wl,--end-group
+	@$(LD) -o $@ $(LDFLAGS) $^ -Wl,--print-memory-usage -Wl,--start-group $(LIBS) -Wl,--end-group
 
 endif
 
diff --git a/hw/bsp/imxrt/boards/mimxrt1060_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1060_evk/board.cmake
new file mode 100644
index 000000000..033f9fcf9
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1060_evk/board.cmake
@@ -0,0 +1,15 @@
+set(MCU_VARIANT MIMXRT1062)
+
+set(JLINK_DEVICE MIMXRT1062xxx6A)
+set(PYOCD_TARGET mimxrt1060)
+
+function(update_board TARGET)
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkmimxrt1060_flexspi_nor_config.c
+    )
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_MIMXRT1062DVL6A
+    BOARD_TUD_RHPORT=0
+    BOARD_TUH_RHPORT=1
+    )
+endfunction()
diff --git a/hw/bsp/imxrt/boards/mimxrt1060_evk/board.mk b/hw/bsp/imxrt/boards/mimxrt1060_evk/board.mk
index d21063c99..0317ee452 100644
--- a/hw/bsp/imxrt/boards/mimxrt1060_evk/board.mk
+++ b/hw/bsp/imxrt/boards/mimxrt1060_evk/board.mk
@@ -7,8 +7,8 @@ JLINK_DEVICE = MIMXRT1062xxx6A
 # For flash-pyocd target
 PYOCD_TARGET = mimxrt1060
 
-BOARD_TUD_RHPORT = 1
-BOARD_TUH_RHPORT = 0
+BOARD_TUD_RHPORT = 0
+BOARD_TUH_RHPORT = 1
 
 # flash using pyocd
 flash: flash-pyocd
diff --git a/hw/bsp/imxrt/boards/mimxrt1064_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1064_evk/board.cmake
new file mode 100644
index 000000000..925664b41
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1064_evk/board.cmake
@@ -0,0 +1,15 @@
+set(MCU_VARIANT MIMXRT1064)
+
+set(JLINK_DEVICE MIMXRT1064xxx6A)
+set(PYOCD_TARGET mimxrt1064)
+
+function(update_board TARGET)
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkmimxrt1064_flexspi_nor_config.c
+    )
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_MIMXRT1064DVL6A
+    BOARD_TUD_RHPORT=0
+    BOARD_TUH_RHPORT=1
+    )
+endfunction()
diff --git a/hw/bsp/imxrt/boards/mimxrt1064_evk/board.mk b/hw/bsp/imxrt/boards/mimxrt1064_evk/board.mk
index 00b574c52..ddde419ae 100644
--- a/hw/bsp/imxrt/boards/mimxrt1064_evk/board.mk
+++ b/hw/bsp/imxrt/boards/mimxrt1064_evk/board.mk
@@ -7,8 +7,8 @@ JLINK_DEVICE = MIMXRT1064xxx6A
 # For flash-pyocd target
 PYOCD_TARGET = mimxrt1064
 
-BOARD_TUD_RHPORT = 1
-BOARD_TUH_RHPORT = 0
+BOARD_TUD_RHPORT = 0
+BOARD_TUH_RHPORT = 1
 
 # flash using pyocd
 flash: flash-pyocd
diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c
index 5eb672c24..b009b27e1 100644
--- a/hw/bsp/imxrt/family.c
+++ b/hw/bsp/imxrt/family.c
@@ -47,6 +47,7 @@
 #endif
 
 // needed by fsl_flexspi_nor_boot
+TU_ATTR_USED
 const uint8_t dcd_data[] = { 0x00 };
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index b180f725e..9e084b4fd 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -63,8 +63,13 @@ if (NOT TARGET ${BOARD_TARGET})
       )
     target_link_options(${BOARD_TARGET} PUBLIC
       "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld"
+      "LINKER:-Map=$<IF:$<BOOL:$<TARGET_PROPERTY:OUTPUT_NAME>>,$<TARGET_PROPERTY:OUTPUT_NAME>,$<TARGET_PROPERTY:NAME>>${CMAKE_EXECUTABLE_SUFFIX}.map"
+      # nanolib
       --specs=nosys.specs
       --specs=nano.specs
+      # force linker to look for these symbols
+      -Wl,-uimage_vector_table
+      -Wl,-ug_boot_data
       )
   else ()
     # TODO support IAR
@@ -116,12 +121,17 @@ function(family_configure_target TARGET)
 
   # Link dependencies
   target_link_libraries(${BSP_TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
-  target_link_libraries(${TARGET} PUBLIC ${BSP_TARGET} ${TARGET}-tinyusb)
+  target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${BSP_TARGET} ${TARGET}-tinyusb)
 
   # Flash Target
   add_custom_target(${TARGET}-pyocd
     COMMAND pyocd flash -t ${PYOCD_TARGET} $<TARGET_FILE:${TARGET}>
     )
+
+  # group target
+  set_target_properties(${BSP_TARGET} ${TARGET}-tinyusb ${TARGET}-tinyusb_config ${TARGET}-pyocd
+    PROPERTIES FOLDER ${TARGET}
+    )
 endfunction()
 
 

From fd50be2e626fc606b6c367e42a6f0f6867f76322 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 8 May 2023 19:43:48 +0700
Subject: [PATCH 303/691] change imxrt board_uart_read() to non-blocking

simple host seems to work
---
 hw/bsp/imxrt/family.c | 77 +++++++++++++++++++++++--------------------
 1 file changed, 42 insertions(+), 35 deletions(-)

diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c
index b009b27e1..6c4b0706b 100644
--- a/hw/bsp/imxrt/family.c
+++ b/hw/bsp/imxrt/family.c
@@ -54,6 +54,21 @@ const uint8_t dcd_data[] = { 0x00 };
 //
 //--------------------------------------------------------------------+
 
+static void init_usb_phy(USBPHY_Type* usb_phy) {
+  // Enable PHY support for Low speed device + LS via FS Hub
+  usb_phy->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK;
+
+  // Enable all power for normal operation
+  // TODO may not be needed since it is called within CLOCK_EnableUsbhs0PhyPllClock()
+  usb_phy->PWD = 0;
+
+  // TX Timing
+  uint32_t phytx = usb_phy->TX;
+  phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
+  phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
+  usb_phy->TX = phytx;
+}
+
 void board_init(void)
 {
   // make sure the dcache is on.
@@ -117,52 +132,24 @@ void board_init(void)
 
   LPUART_Init(UART_PORT, &uart_config, freq);
 
-  //------------- USB0 -------------//
+  //------------- USB -------------//
+  // Note: RT105x RT106x and later have dual USB controllers.
 
   // Clock
   CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usbphy480M, 480000000U);
   CLOCK_EnableUsbhs0Clock(kCLOCK_Usb480M, 480000000U);
 
-  USBPHY_Type* usb_phy;
-
-  // RT105x RT106x have dual USB controller.
 #ifdef USBPHY1
-  usb_phy = USBPHY1;
+  init_usb_phy(USBPHY1);
 #else
-  usb_phy = USBPHY;
+  init_usb_phy(USBPHY);
 #endif
 
-  // Enable PHY support for Low speed device + LS via FS Hub
-  usb_phy->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK;
-
-  // Enable all power for normal operation
-  usb_phy->PWD = 0;
-
-  // TX Timing
-  uint32_t phytx = usb_phy->TX;
-  phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
-  phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
-  usb_phy->TX = phytx;
-
-  // RT105x RT106x have dual USB controller.
 #ifdef USBPHY2
   // USB1
   CLOCK_EnableUsbhs1PhyPllClock(kCLOCK_Usbphy480M, 480000000U);
   CLOCK_EnableUsbhs1Clock(kCLOCK_Usb480M, 480000000U);
-
-  usb_phy = USBPHY2;
-
-  // Enable PHY support for Low speed device + LS via FS Hub
-  usb_phy->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK;
-
-  // Enable all power for normal operation
-  usb_phy->PWD = 0;
-
-  // TX Timing
-  phytx = usb_phy->TX;
-  phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
-  phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
-  usb_phy->TX = phytx;
+  init_usb_phy(USBPHY2);
 #endif
 }
 
@@ -208,8 +195,28 @@ uint32_t board_button_read(void)
 
 int board_uart_read(uint8_t* buf, int len)
 {
-  LPUART_ReadBlocking(UART_PORT, buf, len);
-  return len;
+  int count = 0;
+
+  while( count < len )
+  {
+    uint8_t const rx_count = LPUART_GetRxFifoCount(UART_PORT);
+    if (!rx_count)
+    {
+      // clear all error flag if any
+      uint32_t status_flags = LPUART_GetStatusFlags(UART_PORT);
+      status_flags  &= (kLPUART_RxOverrunFlag | kLPUART_ParityErrorFlag | kLPUART_FramingErrorFlag | kLPUART_NoiseErrorFlag);
+      LPUART_ClearStatusFlags(UART_PORT, status_flags);
+      break;
+    }
+
+    for(int i=0; i<rx_count; i++)
+    {
+      buf[count] = LPUART_ReadByte(UART_PORT);
+      count++;
+    }
+  }
+
+  return count;
 }
 
 int board_uart_write(void const * buf, int len)

From 4be7546372eb18f4e33293f5ba9ab78b1303f6b6 Mon Sep 17 00:00:00 2001
From: Aladdin Bakosh <aladdin.bakosh@emerson.com>
Date: Mon, 8 May 2023 15:57:34 +0200
Subject: [PATCH 304/691] fix(iar_template.ipcf): add missing portable links,
 and delete the usbh_control.c from the list

---
 tools/iar_template.ipcf | 35 +++++++++++++++++++++++++++++++----
 1 file changed, 31 insertions(+), 4 deletions(-)

diff --git a/tools/iar_template.ipcf b/tools/iar_template.ipcf
index d243aab0a..32bfce08c 100644
--- a/tools/iar_template.ipcf
+++ b/tools/iar_template.ipcf
@@ -57,7 +57,13 @@
 		<group name="src/host">
 			<path>$TUSB_DIR$/src/host/hub.c</path>
 			<path>$TUSB_DIR$/src/host/usbh.c</path>
-			<path>$TUSB_DIR$/src/host/usbh_control.c</path>
+		</group>
+		<group name="src/portable/bridgetek/ft9xx">
+			<path>$TUSB_DIR$/src/portable/bridgetek/ft9xx/dcd_ft9xx.c</path>
+		</group>
+		<group name="src/portable/chipidea/ci_hs">
+			<path>$TUSB_DIR$/src/portable/chipidea/ci_hs/dcd_ci_hs.c</path>
+			<path>$TUSB_DIR$/src/portable/chipidea/ci_hs/hcd_ci_hs.c</path>
 		</group>
 		<group name="src/portable/synopsys/dwc2">
 			<path>$TUSB_DIR$/src/portable/synopsys/dwc2/dcd_dwc2.c</path>
@@ -73,6 +79,7 @@
 		</group>
 		<group name="src/portable/mentor/musb">
 			<path>$TUSB_DIR$/src/portable/mentor/musb/dcd_musb.c</path>
+			<path>$TUSB_DIR$/src/portable/mentor/musb/hcd_musb.c</path>
 		</group>
 		<group name="src/portable/microchip/samd">
 			<path>$TUSB_DIR$/src/portable/microchip/samd/dcd_samd.c</path>
@@ -83,6 +90,12 @@
 		<group name="src/portable/microchip/samx7x">
 			<path>$TUSB_DIR$/src/portable/microchip/samx7x/dcd_samx7x.c</path>
 		</group>
+		<group name="src/portable/microchip/pic">
+			<path>$TUSB_DIR$/src/portable/microchip/pic/dcd_pic.c</path>
+		</group>
+		<group name="src/portable/microchip/pic32mz">
+			<path>$TUSB_DIR$/src/portable/microchip/pic32mz/dcd_pic32mz.c</path>
+		</group>
 		<group name="src/portable/mindmotion/mm32">
 			<path>$TUSB_DIR$/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c</path>
 		</group>
@@ -100,6 +113,7 @@
 		</group>
 		<group name="src/portable/nxp/khci">
 			<path>$TUSB_DIR$/src/portable/nxp/khci/dcd_khci.c</path>
+			<path>$TUSB_DIR$/src/portable/nxp/khci/hcd_khci.c</path>
 		</group>
 		<group name="src/portable/nxp/lpc17_40">
 			<path>$TUSB_DIR$/src/portable/nxp/lpc17_40/dcd_lpc17_40.c</path>
@@ -115,13 +129,17 @@
 		<group name="src/portable/ohci">
 			<path>$TUSB_DIR$/src/portable/ohci/ohci.c</path>
 		</group>
+		<group name="src/portable/raspberrypi/pio_usb">
+			<path>$TUSB_DIR$/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c</path>
+			<path>$TUSB_DIR$/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c</path>
+		</group>
 		<group name="src/portable/raspberrypi/rp2040">
 			<path>$TUSB_DIR$/src/portable/raspberrypi/rp2040/dcd_rp2040.c</path>
 			<path>$TUSB_DIR$/src/portable/raspberrypi/rp2040/hcd_rp2040.c</path>
-			<path>$TUSB_DIR$/src/portable/raspberrypi/rp2040/rp2040_usb.c</path>
 		</group>
-		<group name="src/portable/renesas/usba">
-			<path>$TUSB_DIR$/src/portable/renesas/usba/dcd_usba.c</path>
+		<group name="src/portable/renesas/rusb2">
+			<path>$TUSB_DIR$/src/portable/renesas/rusb2/dcd_rusb2.c</path>
+			<path>$TUSB_DIR$/src/portable/renesas/rusb2/hcd_rusb2.c</path>
 		</group>
 		<group name="src/portable/sony/cxd56">
 			<path>$TUSB_DIR$/src/portable/sony/cxd56/dcd_cxd56.c</path>
@@ -129,12 +147,21 @@
 		<group name="src/portable/st/stm32_fsdev">
 			<path>$TUSB_DIR$/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c</path>
 		</group>
+		<group name="src/portable/st/synopsys">
+			<path>$TUSB_DIR$/src/portable/st/synopsys/dcd_synopsys.c</path>
+		</group>
+		<group name="src/portable/sunxi">
+			<path>$TUSB_DIR$/src/portable/sunxi/dcd_sunxi_musb.c</path>
+		</group>
 		<group name="src/portable/ti/msp430x5xx">
 			<path>$TUSB_DIR$/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c</path>
 		</group>
 		<group name="src/portable/valentyusb/eptri">
 			<path>$TUSB_DIR$/src/portable/valentyusb/eptri/dcd_eptri.c</path>
 		</group>
+		<group name="src/portable/wch/ch32v307">
+			<path>$TUSB_DIR$/src/portable/wch/ch32v307/dcd_usbhs.c</path>
+		</group>
         <group name="lib/SEGGER_RTT">
 			<path>$TUSB_DIR$/lib/SEGGER_RTT/RTT/SEGGER_RTT.c</path>
             <path>$TUSB_DIR$/lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c</path>

From 04c759028af73af095c773d84374004c86c70c1e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 9 May 2023 10:02:44 +0700
Subject: [PATCH 305/691] simplify cmake target, remove -bsp

---
 hw/bsp/imxrt/family.c     |  1 +
 hw/bsp/imxrt/family.cmake | 25 +++++++++----------------
 2 files changed, 10 insertions(+), 16 deletions(-)

diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c
index 6c4b0706b..52d3bb91b 100644
--- a/hw/bsp/imxrt/family.c
+++ b/hw/bsp/imxrt/family.c
@@ -86,6 +86,7 @@ void board_init(void)
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
+
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB_OTG1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 9e084b4fd..e9615a1f4 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -86,11 +86,10 @@ function(family_configure_target TARGET)
   # TOP is path to root directory
   set(TOP "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../..")
 
-  #---------- BSP_TARGET ----------
-  # BSP_TARGET is built for each example since it depends on example's tusb_config.h
-  set(BSP_TARGET "${TARGET}-bsp")
-  add_library(${BSP_TARGET} STATIC
-    # TinyUSB
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # TinyUSB Port
     ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
     ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
     ${TOP}/src/portable/ehci/ehci.c
@@ -98,7 +97,7 @@ function(family_configure_target TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
-  target_include_directories(${BSP_TARGET} PUBLIC
+  target_include_directories(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
@@ -120,8 +119,7 @@ function(family_configure_target TARGET)
   add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
 
   # Link dependencies
-  target_link_libraries(${BSP_TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
-  target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${BSP_TARGET} ${TARGET}-tinyusb)
+  target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
 
   # Flash Target
   add_custom_target(${TARGET}-pyocd
@@ -129,8 +127,8 @@ function(family_configure_target TARGET)
     )
 
   # group target
-  set_target_properties(${BSP_TARGET} ${TARGET}-tinyusb ${TARGET}-tinyusb_config ${TARGET}-pyocd
-    PROPERTIES FOLDER ${TARGET}
+  set_target_properties(${TARGET}-tinyusb ${TARGET}-tinyusb_config
+    PROPERTIES FOLDER ${TARGET}_sub
     )
 endfunction()
 
@@ -148,15 +146,10 @@ function(family_add_freertos TARGET)
   target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
     CFG_TUSB_OS=OPT_OS_FREERTOS
     )
-  # tinyusb need to be linked with freeRTOS kernel
+  # link tinyusb with freeRTOS kernel
   target_link_libraries(${TARGET}-tinyusb PUBLIC
     freertos_kernel
     )
-
-  target_link_libraries(${TARGET}-tinyusb PUBLIC
-    freertos_kernel
-    )
-
   target_link_libraries(${TARGET} PUBLIC
     freertos_kernel
     )

From 77f0726361c66bf2783c1ce68e0f00bdd5f58229 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 9 May 2023 17:32:14 +0700
Subject: [PATCH 306/691] fix ehci issue with portsc when enable port power and
 port reset

fix attached device not regconized if attached before power on
---
 .idea/runConfigurations/rt1060_redlink.xml    |  10 ++
 .../imxrt/boards/mimxrt1060_evk/board.cmake   |   1 +
 hw/bsp/imxrt/family.cmake                     |  19 ++-
 src/portable/ehci/ehci.c                      |  94 ++++++++-----
 src/portable/ehci/ehci.h                      | 132 ++++++++++++------
 5 files changed, 173 insertions(+), 83 deletions(-)
 create mode 100644 .idea/runConfigurations/rt1060_redlink.xml

diff --git a/.idea/runConfigurations/rt1060_redlink.xml b/.idea/runConfigurations/rt1060_redlink.xml
new file mode 100644
index 000000000..a6f345fac
--- /dev/null
+++ b/.idea/runConfigurations/rt1060_redlink.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="rt1060 redlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="gdbserver --gdb-port 55503 --semihost-port -1 MIMXRT1062xxxxA:EVK-MIMXRT1060" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc_hid" TARGET_NAME="cdc_msc_hid" CONFIG_NAME="rt1060 evk" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc_hid" RUN_TARGET_NAME="cdc_msc_hid">
+    <custom-gdb-server version="1" gdb-connect="tcp::55503" executable="/usr/local/LinkServer/LinkServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/hw/bsp/imxrt/boards/mimxrt1060_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1060_evk/board.cmake
index 033f9fcf9..171d427de 100644
--- a/hw/bsp/imxrt/boards/mimxrt1060_evk/board.cmake
+++ b/hw/bsp/imxrt/boards/mimxrt1060_evk/board.cmake
@@ -2,6 +2,7 @@ set(MCU_VARIANT MIMXRT1062)
 
 set(JLINK_DEVICE MIMXRT1062xxx6A)
 set(PYOCD_TARGET mimxrt1060)
+set(NXPLS_DEVICE MIMXRT1062xxxxA:EVK-MIMXRT1060)
 
 function(update_board TARGET)
   target_sources(${TARGET} PUBLIC
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index e9615a1f4..e38bcf4b1 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -121,15 +121,26 @@ function(family_configure_target TARGET)
   # Link dependencies
   target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
 
-  # Flash Target
+  # group target (not yet supported by clion)
+  set_target_properties(${TARGET}-tinyusb ${TARGET}-tinyusb_config
+    PROPERTIES FOLDER ${TARGET}_sub
+    )
+
+  #---------- Flash ----------
+  # Flash using pyocd
   add_custom_target(${TARGET}-pyocd
     COMMAND pyocd flash -t ${PYOCD_TARGET} $<TARGET_FILE:${TARGET}>
     )
 
-  # group target
-  set_target_properties(${TARGET}-tinyusb ${TARGET}-tinyusb_config
-    PROPERTIES FOLDER ${TARGET}_sub
+  # Flash using NXP LinkServer (redlink)
+  # https://www.nxp.com/design/software/development-software/mcuxpresso-software-and-tools-/linkserver-for-microcontrollers:LINKERSERVER
+  # LinkServer has a bug that can only execute with full path otherwise it throws:
+  # realpath error: No such file or directory
+  execute_process(COMMAND which LinkServer OUTPUT_VARIABLE LINKSERVER_PATH OUTPUT_STRIP_TRAILING_WHITESPACE)
+  add_custom_target(${TARGET}-redlink
+    COMMAND ${LINKSERVER_PATH} flash ${NXPLS_DEVICE} load $<TARGET_FILE:${TARGET}>
     )
+
 endfunction()
 
 
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 9951aa5da..494e2e50f 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -79,7 +79,8 @@ typedef struct
   ehci_qhd_t qhd_pool[QHD_MAX];
   ehci_qtd_t qtd_pool[QTD_MAX] TU_ATTR_ALIGNED(32);
 
-  ehci_registers_t* regs;
+  ehci_registers_t* regs;         // operational register
+  ehci_cap_registers_t* cap_regs; // capability register
 
   volatile uint32_t uframe_number;
 }ehci_data_t;
@@ -87,6 +88,26 @@ typedef struct
 // Periodic frame list must be 4K alignment
 CFG_TUH_MEM_SECTION TU_ATTR_ALIGNED(4096) static ehci_data_t ehci_data;
 
+//--------------------------------------------------------------------+
+// Debug
+//--------------------------------------------------------------------+
+#if CFG_TUSB_DEBUG >= EHCI_DBG
+static inline void print_portsc(ehci_registers_t* regs)
+{
+  TU_LOG_HEX(EHCI_DBG, regs->portsc);
+  TU_LOG(EHCI_DBG, "  Current Connect Status: %u\r\n", regs->portsc_bm.current_connect_status);
+  TU_LOG(EHCI_DBG, "  Connect Status Change : %u\r\n", regs->portsc_bm.connect_status_change);
+  TU_LOG(EHCI_DBG, "  Port Enabled          : %u\r\n", regs->portsc_bm.port_enabled);
+  TU_LOG(EHCI_DBG, "  Port Enabled Change   : %u\r\n", regs->portsc_bm.port_enable_change);
+
+  TU_LOG(EHCI_DBG, "  Port Reset            : %u\r\n", regs->portsc_bm.port_reset);
+  TU_LOG(EHCI_DBG, "  Port Power            : %u\r\n", regs->portsc_bm.port_power);
+}
+
+#else
+#define print_portsc(_reg)
+#endif
+
 //--------------------------------------------------------------------+
 // PROTOTYPE
 //--------------------------------------------------------------------+
@@ -152,11 +173,11 @@ void hcd_port_reset(uint8_t rhport)
 
   ehci_registers_t* regs = ehci_data.regs;
 
-//  regs->portsc_bm.port_enabled = 0; // disable port before reset
-//  regs->portsc_bm.port_reset = 1;
-
-  uint32_t portsc = regs->portsc;
+  // mask out all change bits since they are Write 1 to clear
+  uint32_t portsc = regs->portsc & ~EHCI_PORTSC_MASK_CHANGE_ALL;
 
+  // EHCI Table 2-16 PortSC
+  // when software writes Port Reset bit to a one, it must also write a zero to the Port Enable bit.
   portsc &= ~(EHCI_PORTSC_MASK_PORT_EANBLED);
   portsc |= EHCI_PORTSC_MASK_PORT_RESET;
 
@@ -167,9 +188,14 @@ void hcd_port_reset_end(uint8_t rhport)
 {
   (void) rhport;
 
-#if 0
+#if 0 // TODO check if this is necessary
   ehci_registers_t* regs = ehci_data.regs;
-  regs->portsc_bm.port_reset = 0;
+
+  // mask out all change bits since they are Write 1 to clear
+  uint32_t portsc = regs->portsc & ~EHCI_PORTSC_MASK_CHANGE_ALL;
+  portsc &= ~(EHCI_PORTSC_MASK_PORT_RESET);
+
+  regs->portsc = portsc;
 #endif
 }
 
@@ -240,19 +266,26 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
 
 bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
 {
-  (void) capability_reg; // not used yet
-
   tu_memclr(&ehci_data, sizeof(ehci_data_t));
 
-  ehci_data.regs = (ehci_registers_t* ) operatial_reg;
+  ehci_data.regs = (ehci_registers_t*) operatial_reg;
+  ehci_data.cap_regs = (ehci_cap_registers_t*) capability_reg;
 
   ehci_registers_t* regs = ehci_data.regs;
 
-  //------------- CTRLDSSEGMENT Register (skip) -------------//
-  //------------- USB INT Register -------------//
-  regs->inten  = 0;                 // 1. disable all the interrupt
-  regs->status = EHCI_INT_MASK_ALL; // 2. clear all status
+  // EHCI 4.1 Host Controller Initialization
 
+  //------------- CTRLDSSEGMENT Register (skip) -------------//
+
+  //------------- USB INT Register -------------//
+
+  // disable all the interrupt
+  regs->inten  = 0;
+
+  // clear all status except port change since device maybe connected before this driver is initialized
+  regs->status = (EHCI_INT_MASK_ALL & ~EHCI_INT_MASK_PORT_CHANGE);
+
+  // Enable interrupts
   regs->inten  = EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE | EHCI_INT_MASK_ASYNC_ADVANCE |
                  EHCI_INT_MASK_NXP_PERIODIC | EHCI_INT_MASK_NXP_ASYNC | EHCI_INT_MASK_FRAMELIST_ROLLOVER;
 
@@ -316,7 +349,16 @@ bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
                    FRAMELIST_SIZE_USBCMD_VALUE;
 
   //------------- ConfigFlag Register (skip) -------------//
-  regs->portsc_bm.port_power = 1; // enable port power
+
+  // enable port power bit in portsc. The function of this bit depends on the value of the Port
+  // Power Control (PPC) field in the HCSPARAMS register.
+  if (ehci_data.cap_regs->hcsparams_bm.port_power_control) {
+    // mask out all change bits since they are Write 1 to clear
+    uint32_t portsc = (regs->portsc & ~EHCI_PORTSC_MASK_CHANGE_ALL);
+    portsc |= ECHI_PORTSC_MASK_PORT_POWER;
+
+    regs->portsc = portsc;
+  }
 
   return true;
 }
@@ -656,26 +698,6 @@ static void xfer_error_isr(uint8_t hostid)
   }
 }
 
-#if CFG_TUSB_DEBUG >= EHCI_DBG
-
-static inline void print_portsc(ehci_registers_t* regs)
-{
-  TU_LOG_HEX(EHCI_DBG, regs->portsc);
-  TU_LOG(EHCI_DBG, "  Current Connect Status: %u\r\n", regs->portsc_bm.current_connect_status);
-  TU_LOG(EHCI_DBG, "  Connect Status Change : %u\r\n", regs->portsc_bm.connect_status_change);
-  TU_LOG(EHCI_DBG, "  Port Enabled          : %u\r\n", regs->portsc_bm.port_enabled);
-  TU_LOG(EHCI_DBG, "  Port Enabled Change   : %u\r\n", regs->portsc_bm.port_enable_change);
-
-  TU_LOG(EHCI_DBG, "  Port Reset            : %u\r\n", regs->portsc_bm.port_reset);
-  TU_LOG(EHCI_DBG, "  Port Power            : %u\r\n", regs->portsc_bm.port_power);
-}
-
-#else
-
-#define print_portsc(_reg)
-
-#endif
-
 //------------- Host Controller Driver's Interrupt Handler -------------//
 void hcd_int_handler(uint8_t rhport)
 {
@@ -695,7 +717,7 @@ void hcd_int_handler(uint8_t rhport)
 
   if (int_status & EHCI_INT_MASK_PORT_CHANGE)
   {
-    uint32_t const port_status = regs->portsc & EHCI_PORTSC_MASK_ALL;
+    uint32_t const port_status = regs->portsc & EHCI_PORTSC_MASK_CHANGE_ALL;
     print_portsc(regs);
 
     if (regs->portsc_bm.connect_status_change)
diff --git a/src/portable/ehci/ehci.h b/src/portable/ehci/ehci.h
index 36f8649be..dd090cb36 100644
--- a/src/portable/ehci/ehci.h
+++ b/src/portable/ehci/ehci.h
@@ -267,16 +267,15 @@ TU_VERIFY_STATIC( sizeof(ehci_sitd_t) == 32, "size is not correct" );
 //--------------------------------------------------------------------+
 // EHCI Operational Register
 //--------------------------------------------------------------------+
-enum ehci_interrupt_mask_{
+enum {
   EHCI_INT_MASK_USB                   = TU_BIT(0),
   EHCI_INT_MASK_ERROR                 = TU_BIT(1),
   EHCI_INT_MASK_PORT_CHANGE           = TU_BIT(2),
-
   EHCI_INT_MASK_FRAMELIST_ROLLOVER    = TU_BIT(3),
   EHCI_INT_MASK_PCI_HOST_SYSTEM_ERROR = TU_BIT(4),
   EHCI_INT_MASK_ASYNC_ADVANCE         = TU_BIT(5),
-  EHCI_INT_MASK_NXP_SOF               = TU_BIT(7),
 
+  EHCI_INT_MASK_NXP_SOF               = TU_BIT(7),
   EHCI_INT_MASK_NXP_ASYNC             = TU_BIT(18),
   EHCI_INT_MASK_NXP_PERIODIC          = TU_BIT(19),
 
@@ -287,7 +286,7 @@ enum ehci_interrupt_mask_{
       EHCI_INT_MASK_NXP_ASYNC | EHCI_INT_MASK_NXP_PERIODIC
 };
 
-enum ehci_usbcmd_pos_ {
+enum {
   EHCI_USBCMD_POS_RUN_STOP               = 0,
   EHCI_USBCMD_POS_FRAMELIST_SIZE         = 2,
   EHCI_USBCMD_POS_PERIOD_ENABLE          = 4,
@@ -296,24 +295,27 @@ enum ehci_usbcmd_pos_ {
   EHCI_USBCMD_POS_INTERRUPT_THRESHOLD    = 16
 };
 
-enum ehci_portsc_change_mask_{
+enum {
   EHCI_PORTSC_MASK_CURRENT_CONNECT_STATUS = TU_BIT(0),
   EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE  = TU_BIT(1),
   EHCI_PORTSC_MASK_PORT_EANBLED           = TU_BIT(2),
-  EHCI_PORTSC_MASK_PORT_ENABLE_CHAGNE     = TU_BIT(3),
+  EHCI_PORTSC_MASK_PORT_ENABLE_CHANGE     = TU_BIT(3),
   EHCI_PORTSC_MASK_OVER_CURRENT_CHANGE    = TU_BIT(5),
+  EHCI_PORTSC_MASK_FORCE_RESUME           = TU_BIT(6),
+  EHCI_PORTSC_MASK_PORT_SUSPEND           = TU_BIT(7),
   EHCI_PORTSC_MASK_PORT_RESET             = TU_BIT(8),
+  ECHI_PORTSC_MASK_PORT_POWER             = TU_BIT(12),
 
-  EHCI_PORTSC_MASK_ALL =
-      EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE |
-      EHCI_PORTSC_MASK_PORT_ENABLE_CHAGNE |
-      EHCI_PORTSC_MASK_OVER_CURRENT_CHANGE
+  EHCI_PORTSC_MASK_CHANGE_ALL =
+    EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE |
+    EHCI_PORTSC_MASK_PORT_ENABLE_CHANGE |
+    EHCI_PORTSC_MASK_OVER_CURRENT_CHANGE
 };
 
 typedef volatile struct
 {
   union {
-    uint32_t command;
+    uint32_t command; // 0x00
 
     struct {
       uint32_t run_stop               : 1 ; ///< 1=Run. 0=Stop
@@ -333,7 +335,7 @@ typedef volatile struct
   };
 
   union {
-    uint32_t status;
+    uint32_t status; // 0x04
 
     struct {
       uint32_t usb                   : 1  ; ///< qTD with IOC is retired
@@ -357,7 +359,7 @@ typedef volatile struct
   };
 
   union{
-    uint32_t inten;
+    uint32_t inten; // 0x08
 
     struct {
       uint32_t usb                   : 1  ;
@@ -375,43 +377,87 @@ typedef volatile struct
     }inten_bm;
   };
 
-  uint32_t frame_index        ; ///< Micro frame counter
-  uint32_t ctrl_ds_seg        ; ///< Control Data Structure Segment
-  uint32_t periodic_list_base ; ///< Beginning address of perodic frame list
-  uint32_t async_list_addr    ; ///< Address of next async QHD to be executed
+  uint32_t frame_index        ; ///< 0x0C Micro frame counter
+  uint32_t ctrl_ds_seg        ; ///< 0x10 Control Data Structure Segment
+  uint32_t periodic_list_base ; ///< 0x14 Beginning address of perodic frame list
+  uint32_t async_list_addr    ; ///< 0x18 Address of next async QHD to be executed
   uint32_t nxp_tt_control     ; ///< nxp embedded transaction translator (reserved by EHCI specs)
   uint32_t reserved[8]        ;
-  uint32_t config_flag        ; ///< not used by NXP
+  uint32_t config_flag        ; ///< 0x40 not used by NXP
 
   union {
-    uint32_t portsc             ; ///< port status and control
-    struct {
-      uint32_t current_connect_status      : 1; ///< 0: No device, 1: Device is present on port
-      uint32_t connect_status_change       : 1; ///< Change in Current Connect Status
-      uint32_t port_enabled                : 1; ///< Ports can only be enabled by HC as a part of the reset and enable. SW can write 0 to disable
-      uint32_t port_enable_change          : 1; ///< Port Enabled has changed
-      uint32_t over_current_active         : 1; ///< Port has an over-current condition
-      uint32_t over_current_change         : 1; ///< Change to Over-current Active
-      uint32_t force_port_resume           : 1; ///< Resume detected/driven on port. This functionality defined for manipulating this bit depends on the value of the Suspend bit.
-      uint32_t suspend                     : 1; ///< Port in suspend state
-      uint32_t port_reset                  : 1; ///< 1=Port is in Reset. 0=Port is not in Reset
-      uint32_t nxp_highspeed_status        : 1; ///< NXP customized: 0=connected to the port is not in High-speed mode, 1=connected to the port is in High-speed mode
-      uint32_t line_status                 : 2; ///< D+/D- state: 00: SE0, 10: J-state, 01: K-state
-      uint32_t port_power                  : 1; ///< 0= power off, 1= power on
-      uint32_t port_owner                  : 1; ///< not used by NXP
-      uint32_t port_indicator_control      : 2; ///< 00b: off, 01b: Amber, 10b: green, 11b: undefined
-      uint32_t port_test_control           : 4; ///< Port test mode, not used by tinyusb
-      uint32_t wake_on_connect_enable      : 1; ///< Enables device connects as wake-up events
-      uint32_t wake_on_disconnect_enable   : 1; ///< Enables device disconnects as wake-up events
-      uint32_t wake_on_over_current_enable : 1; ///< Enables over-current conditions as wake-up events
-      uint32_t nxp_phy_clock_disable       : 1; ///< NXP customized: the PHY can be put into Low Power Suspend – Clock Disable when the downstream device has been put into suspend mode or when no downstream device is connected. Low power suspend is completely under the control of software. 0: enable PHY clock, 1: disable PHY clock
-      uint32_t nxp_port_force_fullspeed    : 1; ///< NXP customized: Writing this bit to a 1 will force the port to only connect at Full Speed. It disables the chirp sequence that allowsthe port to identify itself as High Speed. This is useful for testing FS configurations with a HS host, hub or device.
-      uint32_t TU_RESERVED                 : 1;
-      uint32_t nxp_port_speed              : 2; ///< NXP customized: This register field indicates the speed atwhich the port is operating. For HS mode operation in the host controllerand HS/FS operation in the device controller the port routing steers data to the Protocol engine. For FS and LS mode operation in the host controller, the port routing steers data to the Protocol Engine w/ Embedded Transaction Translator. 0x0: Fullspeed, 0x1: Lowspeed, 0x2: Highspeed
+    // mixed with RW and R/WC bits, care should be taken when writing to this register
+    uint32_t portsc           ; ///< 0x44 port status and control
+    const struct {
+      uint32_t current_connect_status      : 1; ///< 00: 0: No device, 1: Device is present on port
+      uint32_t connect_status_change       : 1; ///< 01: [R/WC] Change in Current Connect Status
+      uint32_t port_enabled                : 1; ///< 02: Ports can only be enabled by HC as a part of the reset and enable. SW can write 0 to disable
+      uint32_t port_enable_change          : 1; ///< 03: [R/WC] Port Enabled has changed
+      uint32_t over_current_active         : 1; ///< 04: Port has an over-current condition
+      uint32_t over_current_change         : 1; ///< 05: [R/WC] Change to Over-current Active
+      uint32_t force_port_resume           : 1; ///< 06: Resume detected/driven on port. This functionality defined for manipulating this bit depends on the value of the Suspend bit.
+      uint32_t suspend                     : 1; ///< 07: Port in suspend state
+      uint32_t port_reset                  : 1; ///< 08: 1=Port is in Reset. 0=Port is not in Reset
+      uint32_t nxp_highspeed_status        : 1; ///< 09: NXP customized: 0=connected to the port is not in High-speed mode, 1=connected to the port is in High-speed mode
+      uint32_t line_status                 : 2; ///< 10-11: D+/D- state: 00: SE0, 10: J-state, 01: K-state
+      uint32_t port_power                  : 1; ///< 12: 0= power off, 1= power on
+      uint32_t port_owner                  : 1; ///< 13: not used by NXP
+      uint32_t port_indicator_control      : 2; ///< 14-15: 00b: off, 01b: Amber, 10b: green, 11b: undefined
+      uint32_t port_test_control           : 4; ///< 16-19: Port test mode, not used by tinyusb
+      uint32_t wake_on_connect_enable      : 1; ///< 20: Enables device connects as wake-up events
+      uint32_t wake_on_disconnect_enable   : 1; ///< 21: Enables device disconnects as wake-up events
+      uint32_t wake_on_over_current_enable : 1; ///< 22: Enables over-current conditions as wake-up events
+      uint32_t nxp_phy_clock_disable       : 1; ///< 23: NXP customized: the PHY can be put into Low Power Suspend – Clock Disable when the downstream device has been put into suspend mode or when no downstream device is connected. Low power suspend is completely under the control of software. 0: enable PHY clock, 1: disable PHY clock
+      uint32_t nxp_port_force_fullspeed    : 1; ///< 24: NXP customized: Writing this bit to a 1 will force the port to only connect at Full Speed. It disables the chirp sequence that allowsthe port to identify itself as High Speed. This is useful for testing FS configurations with a HS host, hub or device.
+      uint32_t TU_RESERVED                 : 1; ///< 25
+      uint32_t nxp_port_speed              : 2; ///< 26-27: NXP customized: This register field indicates the speed atwhich the port is operating. For HS mode operation in the host controllerand HS/FS operation in the device controller the port routing steers data to the Protocol engine. For FS and LS mode operation in the host controller, the port routing steers data to the Protocol Engine w/ Embedded Transaction Translator. 0x0: Fullspeed, 0x1: Lowspeed, 0x2: Highspeed
       uint32_t TU_RESERVED                 : 4;
     }portsc_bm;
   };
-}ehci_registers_t;
+} ehci_registers_t;
+
+//--------------------------------------------------------------------+
+// Capability Registers
+//--------------------------------------------------------------------+
+typedef volatile struct {
+  uint8_t caplength;   // 0x00
+  uint8_t TU_RESERVED; // 0x01
+  uint16_t hciversion; // 0x02
+
+  union {
+    uint32_t hcsparams; // 0x04
+    struct {
+      uint32_t num_ports          : 4; // [00:03]
+      uint32_t port_power_control : 1; // [04]
+      uint32_t TU_RESERVED        : 2; // [05:06]
+      uint32_t port_route_rule    : 1; // [07]
+      uint32_t n_pcc              : 4; // [08:11] Number of Ports per Companion Controller
+      uint32_t n_cc               : 4; // [12:15] Number of Companion Controllers
+      uint32_t port_ind           : 1; // [16] Port Indicators
+      uint32_t TU_RESERVED        : 3; // [17:19]
+      uint32_t n_ptt              : 4; // [20:23] ChipIdea: Number of Ports per Transaction Translator
+      uint32_t n_tt               : 4; // [24:27] ChipIdea: Number of Transaction Translators
+      uint32_t TU_RESERVED        : 4; // [28:31]
+    } hcsparams_bm;
+  };
+
+  union {
+    uint32_t hccparams; // 0x08
+    struct {
+      uint32_t addr_64bit                   : 1; // [00] 64-bit Addressing Capability
+      uint32_t programmable_frame_list_flag : 1; // [01] Programmable Frame List Flag
+      uint32_t async_park_cap               : 1; // [02] Asynchronous Schedule Park Capability
+      uint32_t TU_RESERVED                  : 1; // [03]
+      uint32_t iso_schedule_threshold       : 4; // [4:7] Isochronous Scheduling Threshold
+      uint32_t eecp                         : 8; // [8:15] EHCI Extended Capabilities Pointer
+      uint32_t TU_RESERVED                  : 16;// [16:31]
+    } hccparams_bm;
+  };
+
+  uint32_t hcsp_portroute; // 0x0C HCSP Port Route Register
+} ehci_cap_registers_t;
+
+TU_VERIFY_STATIC(sizeof(ehci_cap_registers_t) == 16, "size is not correct");
 
 #ifdef __cplusplus
  }

From bc579c045e5d62050f0b58f20fd28fb71e4070a8 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 9 May 2023 21:39:10 +0700
Subject: [PATCH 307/691] skip link option --print-memory-usage for renesas rx
 since it does not support this option

---
 .../{rt1060_redlink.xml => rt1060_nxplink.xml}             | 2 +-
 examples/rules.mk                                          | 7 ++++++-
 hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake             | 1 +
 hw/bsp/imxrt/boards/mimxrt1060_evk/board.cmake             | 2 +-
 hw/bsp/imxrt/boards/mimxrt1064_evk/board.cmake             | 1 +
 hw/bsp/imxrt/family.cmake                                  | 4 ++--
 6 files changed, 12 insertions(+), 5 deletions(-)
 rename .idea/runConfigurations/{rt1060_redlink.xml => rt1060_nxplink.xml} (92%)

diff --git a/.idea/runConfigurations/rt1060_redlink.xml b/.idea/runConfigurations/rt1060_nxplink.xml
similarity index 92%
rename from .idea/runConfigurations/rt1060_redlink.xml
rename to .idea/runConfigurations/rt1060_nxplink.xml
index a6f345fac..d3303bdb6 100644
--- a/.idea/runConfigurations/rt1060_redlink.xml
+++ b/.idea/runConfigurations/rt1060_nxplink.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rt1060 redlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="gdbserver --gdb-port 55503 --semihost-port -1 MIMXRT1062xxxxA:EVK-MIMXRT1060" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc_hid" TARGET_NAME="cdc_msc_hid" CONFIG_NAME="rt1060 evk" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc_hid" RUN_TARGET_NAME="cdc_msc_hid">
+  <configuration default="false" name="rt1060 nxplink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="gdbserver --gdb-port 55503 --semihost-port -1 MIMXRT1062xxxxA:EVK-MIMXRT1060" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc_hid" TARGET_NAME="cdc_msc_hid" CONFIG_NAME="rt1060 evk" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc_hid" RUN_TARGET_NAME="cdc_msc_hid">
     <custom-gdb-server version="1" gdb-connect="tcp::55503" executable="/usr/local/LinkServer/LinkServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/examples/rules.mk b/examples/rules.mk
index 3ec3c880b..516beca78 100644
--- a/examples/rules.mk
+++ b/examples/rules.mk
@@ -72,6 +72,11 @@ endif
 
 LDFLAGS += $(CFLAGS) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections
 
+# Some toolchain such as renesas rx does not support --print-memory-usage flags
+ifneq ($(FAMILY),rx)
+LDFLAGS += -Wl,--print-memory-usage
+endif
+
 ifdef LD_FILE
 LDFLAGS += -Wl,-T,$(TOP)/$(LD_FILE)
 endif
@@ -169,7 +174,7 @@ $(BUILD)/$(PROJECT).hex: $(BUILD)/$(PROJECT).elf
 
 $(BUILD)/$(PROJECT).elf: $(OBJ)
 	@echo LINK $@
-	@$(LD) -o $@ $(LDFLAGS) $^ -Wl,--print-memory-usage -Wl,--start-group $(LIBS) -Wl,--end-group
+	@$(LD) -o $@ $(LDFLAGS) $^ -Wl,--start-group $(LIBS) -Wl,--end-group
 
 endif
 
diff --git a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
index 02955e356..3ba95bf2c 100644
--- a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
+++ b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
@@ -2,6 +2,7 @@ set(MCU_VARIANT MIMXRT1011)
 
 set(JLINK_DEVICE MIMXRT1011DAE5A)
 set(PYOCD_TARGET mimxrt1010)
+set(NXPLINK_DEVICE MIMXRT1011xxxxx:EVK-MIMXRT1010)
 
 function(update_board TARGET)
   target_sources(${TARGET} PUBLIC
diff --git a/hw/bsp/imxrt/boards/mimxrt1060_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1060_evk/board.cmake
index 171d427de..fd335cdf5 100644
--- a/hw/bsp/imxrt/boards/mimxrt1060_evk/board.cmake
+++ b/hw/bsp/imxrt/boards/mimxrt1060_evk/board.cmake
@@ -2,7 +2,7 @@ set(MCU_VARIANT MIMXRT1062)
 
 set(JLINK_DEVICE MIMXRT1062xxx6A)
 set(PYOCD_TARGET mimxrt1060)
-set(NXPLS_DEVICE MIMXRT1062xxxxA:EVK-MIMXRT1060)
+set(NXPLINK_DEVICE MIMXRT1062xxxxA:EVK-MIMXRT1060)
 
 function(update_board TARGET)
   target_sources(${TARGET} PUBLIC
diff --git a/hw/bsp/imxrt/boards/mimxrt1064_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1064_evk/board.cmake
index 925664b41..cd75c5227 100644
--- a/hw/bsp/imxrt/boards/mimxrt1064_evk/board.cmake
+++ b/hw/bsp/imxrt/boards/mimxrt1064_evk/board.cmake
@@ -2,6 +2,7 @@ set(MCU_VARIANT MIMXRT1064)
 
 set(JLINK_DEVICE MIMXRT1064xxx6A)
 set(PYOCD_TARGET mimxrt1064)
+set(NXPLINK_DEVICE MIMXRT1064xxxxA:EVK-MIMXRT1064)
 
 function(update_board TARGET)
   target_sources(${TARGET} PUBLIC
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index e38bcf4b1..85ad104a0 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -137,8 +137,8 @@ function(family_configure_target TARGET)
   # LinkServer has a bug that can only execute with full path otherwise it throws:
   # realpath error: No such file or directory
   execute_process(COMMAND which LinkServer OUTPUT_VARIABLE LINKSERVER_PATH OUTPUT_STRIP_TRAILING_WHITESPACE)
-  add_custom_target(${TARGET}-redlink
-    COMMAND ${LINKSERVER_PATH} flash ${NXPLS_DEVICE} load $<TARGET_FILE:${TARGET}>
+  add_custom_target(${TARGET}-nxplink
+    COMMAND ${LINKSERVER_PATH} flash ${NXPLINK_DEVICE} load $<TARGET_FILE:${TARGET}>
     )
 
 endfunction()

From c0e4c02b9d70240b97aa4924e6002ccb3d8057dd Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 10 May 2023 11:15:11 +0700
Subject: [PATCH 308/691] allow imxrt build with dual exmaples

---
 examples/cmake/toolchain/set_flags.cmake      |  3 +-
 examples/dual/CMakeLists.txt                  | 11 ++++----
 .../host_hid_to_device_cdc/CMakeLists.txt     | 28 +++++++++----------
 hw/bsp/family_support.cmake                   |  4 +--
 hw/bsp/imxrt/family.cmake                     |  4 +++
 src/portable/chipidea/ci_hs/hcd_ci_hs.c       |  2 ++
 6 files changed, 30 insertions(+), 22 deletions(-)

diff --git a/examples/cmake/toolchain/set_flags.cmake b/examples/cmake/toolchain/set_flags.cmake
index 27631abcd..3f109b59e 100644
--- a/examples/cmake/toolchain/set_flags.cmake
+++ b/examples/cmake/toolchain/set_flags.cmake
@@ -8,7 +8,8 @@ foreach(LANG IN ITEMS C CXX ASM)
     #cmake_print_variables(CMAKE_${LANG}_FLAGS_INIT)
 
     # optimization flags
-    set(CMAKE_${LANG}_FLAGS_DEBUG_INIT "-Og")
+    set(CMAKE_${LANG}_FLAGS_RELEASE_INIT "-Os")
+    set(CMAKE_${LANG}_FLAGS_DEBUG_INIT "-O0")
 endforeach()
 
 # Linker
diff --git a/examples/dual/CMakeLists.txt b/examples/dual/CMakeLists.txt
index d211c8b83..15081cf26 100644
--- a/examples/dual/CMakeLists.txt
+++ b/examples/dual/CMakeLists.txt
@@ -4,9 +4,10 @@ include(${CMAKE_CURRENT_SOURCE_DIR}/../../hw/bsp/family_support.cmake)
 
 project(tinyusb_dual_examples C CXX ASM)
 family_initialize_project(tinyusb_dual_examples ${CMAKE_CURRENT_LIST_DIR})
+
 if (FAMILY STREQUAL "rp2040" AND NOT TARGET tinyusb_pico_pio_usb)
-    message("Skipping dual host/device mode examples as Pico-PIO-USB is not available")
-else()
-    # family_add_subdirectory will filter what to actually add based on selected FAMILY
-    family_add_subdirectory(host_hid_to_device_cdc)
-endif()
+  message("Skipping dual host/device mode examples as Pico-PIO-USB is not available")
+else ()
+  # family_add_subdirectory will filter what to actually add based on selected FAMILY
+  family_add_subdirectory(host_hid_to_device_cdc)
+endif ()
diff --git a/examples/dual/host_hid_to_device_cdc/CMakeLists.txt b/examples/dual/host_hid_to_device_cdc/CMakeLists.txt
index 3505d39eb..c6d19a720 100644
--- a/examples/dual/host_hid_to_device_cdc/CMakeLists.txt
+++ b/examples/dual/host_hid_to_device_cdc/CMakeLists.txt
@@ -14,14 +14,14 @@ add_executable(${PROJECT})
 
 # Example source
 target_sources(${PROJECT} PUBLIC
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
-        )
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
+  )
 
 # Example include
 target_include_directories(${PROJECT} PUBLIC
-        ${CMAKE_CURRENT_SOURCE_DIR}/src
-        )
+  ${CMAKE_CURRENT_SOURCE_DIR}/src
+  )
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
@@ -29,12 +29,12 @@ family_configure_dual_usb_example(${PROJECT})
 
 # due to warnings from Pico-PIO-USB
 target_compile_options(${PROJECT} PUBLIC
-        -Wno-error=shadow
-        -Wno-error=cast-align
-        -Wno-error=cast-qual
-        -Wno-error=redundant-decls
-        -Wno-error=sign-conversion
-        -Wno-error=conversion
-        -Wno-error=sign-compare
-        -Wno-error=unused-function
-        )
+  -Wno-error=shadow
+  -Wno-error=cast-align
+  -Wno-error=cast-qual
+  -Wno-error=redundant-decls
+  -Wno-error=sign-conversion
+  -Wno-error=conversion
+  -Wno-error=sign-compare
+  -Wno-error=unused-function
+  )
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 26baa6365..01e7bb018 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -27,8 +27,8 @@ if (NOT TARGET _family_support_marker)
             foreach(MCU IN LISTS FAMILY_MCUS)
                 # For each line in only.txt
                 foreach(_line ${ONLYS_LINES})
-                    # If mcu:xxx exists for this mcu then include
-                    if (${_line} STREQUAL "mcu:${MCU}")
+                    # If mcu:xxx exists for this mcu or board:xxx then include
+                    if (${_line} STREQUAL "mcu:${MCU}" OR ${_line} STREQUAL "board:${BOARD}")
                         set(${RESULT} 1 PARENT_SCOPE)
                         return()
                     endif()
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 85ad104a0..b510c064e 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -173,3 +173,7 @@ endfunction()
 function(family_configure_host_example TARGET)
   family_configure_target(${TARGET})
 endfunction()
+
+function(family_configure_dual_usb_example TARGET)
+  family_configure_target(${TARGET})
+endfunction()
diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
index d607627b4..b06633f30 100644
--- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
@@ -76,6 +76,8 @@ bool hcd_init(uint8_t rhport)
 #endif
 
   // FIXME force full speed, still have issue with Highspeed enumeration
+  // 1. Have issue when plug/unplug devices, maybe the port is not reset properly
+  // 2. Also does not seems to detect disconnection
   hcd_reg->PORTSC1 |= PORTSC1_FORCE_FULL_SPEED;
 
   return ehci_init(rhport, (uint32_t) &hcd_reg->CAPLENGTH, (uint32_t) &hcd_reg->USBCMD);

From 4c796b89d80606e40fb098f1b4b5496dbb5bb7dc Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 10 May 2023 11:20:26 +0700
Subject: [PATCH 309/691] try to build with cmake on ci

---
 .github/workflows/cmake_arm.yml | 58 +++++++++++++++++++++++++++++++++
 examples/device/CMakeLists.txt  |  7 +++-
 2 files changed, 64 insertions(+), 1 deletion(-)
 create mode 100644 .github/workflows/cmake_arm.yml

diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
new file mode 100644
index 000000000..98aae7df2
--- /dev/null
+++ b/.github/workflows/cmake_arm.yml
@@ -0,0 +1,58 @@
+name: CMake Build ARM
+
+on:
+  push:
+    paths:
+      - 'src/**'
+      - 'examples/**'
+      - 'lib/**'
+      - 'hw/**'
+      - '.github/workflows/cmake_arm.yml'
+  pull_request:
+    branches: [ master ]
+    paths:
+      - 'src/**'
+      - 'examples/**'
+      - 'lib/**'
+      - 'hw/**'
+      - '.github/workflows/cmake_arm.yml'
+
+concurrency:
+  group: ${{ github.workflow }}-${{ github.head_ref || github.run_id }}
+  cancel-in-progress: true
+
+jobs:
+  # ---------------------------------------
+  # Build ARM family
+  # ---------------------------------------
+  build-arm:
+    runs-on: ubuntu-latest
+    strategy:
+      fail-fast: false
+      matrix:
+        family:
+        # Alphabetical order
+        - 'imxrt'
+    steps:
+    - name: Setup Python
+      uses: actions/setup-python@v4
+      with:
+        python-version: '3.x'
+
+    - name: Install ARM GCC
+      uses: carlosperate/arm-none-eabi-gcc-action@v1
+      with:
+        release: '11.2-2022.02'
+
+    - name: Checkout TinyUSB
+      uses: actions/checkout@v3
+
+    - name: Get Dependencies
+      run: python3 tools/get_family_deps.py ${{ matrix.family }}
+
+    - name: Build
+      run: |
+        mkdir -p examples/build
+        cd examples/build
+        cmake -DFAMILY=${{ matrix.family }} -DBOARD=mimxrt1060_evk ..
+        cmake --build .
diff --git a/examples/device/CMakeLists.txt b/examples/device/CMakeLists.txt
index 5b077a5e1..10a1f4c26 100644
--- a/examples/device/CMakeLists.txt
+++ b/examples/device/CMakeLists.txt
@@ -22,7 +22,12 @@ family_add_subdirectory(hid_generic_inout)
 family_add_subdirectory(hid_multiple_interface)
 family_add_subdirectory(midi_test)
 family_add_subdirectory(msc_dual_lun)
-family_add_subdirectory(net_lwip_webserver)
+
+# FIXME temp skip net_lwip_webserver for imxrt for now
+if (NOT ${FAMILY} STREQUAL "imxrt")
+  family_add_subdirectory(net_lwip_webserver)
+endif()
+
 family_add_subdirectory(uac2_headset)
 family_add_subdirectory(usbtmc)
 family_add_subdirectory(video_capture)

From 8e3bdd23913468acace297f09286c942a1a025c3 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 10 May 2023 13:09:15 +0700
Subject: [PATCH 310/691] add python script to help building cmake, build all
 imxrt boards with ci

---
 .github/workflows/cmake_arm.yml               |  8 +-
 hw/bsp/imxrt/boards/metro_m7_1011/board.cmake | 15 +++
 .../imxrt/boards/mimxrt1015_evk/board.cmake   | 15 +++
 .../imxrt/boards/mimxrt1020_evk/board.cmake   | 14 +++
 .../imxrt/boards/mimxrt1024_evk/board.cmake   | 16 +++
 .../imxrt/boards/mimxrt1050_evkb/board.cmake  | 16 +++
 hw/bsp/imxrt/boards/teensy_40/board.cmake     | 21 ++++
 .../teensy_40/teensy40_flexspi_nor_config.c   |  2 +-
 hw/bsp/imxrt/boards/teensy_41/board.cmake     | 21 ++++
 .../teensy_41/teensy41_flexspi_nor_config.c   |  2 +-
 tools/build_cmake.py                          | 99 +++++++++++++++++++
 11 files changed, 221 insertions(+), 8 deletions(-)
 create mode 100644 hw/bsp/imxrt/boards/metro_m7_1011/board.cmake
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1015_evk/board.cmake
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1020_evk/board.cmake
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1024_evk/board.cmake
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1050_evkb/board.cmake
 create mode 100644 hw/bsp/imxrt/boards/teensy_40/board.cmake
 create mode 100644 hw/bsp/imxrt/boards/teensy_41/board.cmake
 create mode 100644 tools/build_cmake.py

diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index 98aae7df2..3a1ef4f4f 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -1,4 +1,4 @@
-name: CMake Build ARM
+name: CMake ARM
 
 on:
   push:
@@ -51,8 +51,4 @@ jobs:
       run: python3 tools/get_family_deps.py ${{ matrix.family }}
 
     - name: Build
-      run: |
-        mkdir -p examples/build
-        cd examples/build
-        cmake -DFAMILY=${{ matrix.family }} -DBOARD=mimxrt1060_evk ..
-        cmake --build .
+      run: python tools/build_cmake.py ${{ matrix.family }}
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011/board.cmake b/hw/bsp/imxrt/boards/metro_m7_1011/board.cmake
new file mode 100644
index 000000000..3ba95bf2c
--- /dev/null
+++ b/hw/bsp/imxrt/boards/metro_m7_1011/board.cmake
@@ -0,0 +1,15 @@
+set(MCU_VARIANT MIMXRT1011)
+
+set(JLINK_DEVICE MIMXRT1011DAE5A)
+set(PYOCD_TARGET mimxrt1010)
+set(NXPLINK_DEVICE MIMXRT1011xxxxx:EVK-MIMXRT1010)
+
+function(update_board TARGET)
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkmimxrt1010_flexspi_nor_config.c
+    )
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_MIMXRT1011DAE5A
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/imxrt/boards/mimxrt1015_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1015_evk/board.cmake
new file mode 100644
index 000000000..becad46d4
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1015_evk/board.cmake
@@ -0,0 +1,15 @@
+set(MCU_VARIANT MIMXRT1015)
+
+set(JLINK_DEVICE MIMXRT1015DAF5A)
+set(PYOCD_TARGET mimxrt1015)
+set(NXPLINK_DEVICE MIMXRT1015xxxxx:EVK-MIMXRT1015)
+
+function(update_board TARGET)
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkmimxrt1015_flexspi_nor_config.c
+    )
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_MIMXRT1015DAF5A
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/imxrt/boards/mimxrt1020_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1020_evk/board.cmake
new file mode 100644
index 000000000..1696dc987
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1020_evk/board.cmake
@@ -0,0 +1,14 @@
+set(MCU_VARIANT MIMXRT1021)
+
+set(JLINK_DEVICE MIMXRT1021DAG5A)
+set(PYOCD_TARGET mimxrt1020)
+set(NXPLINK_DEVICE MIMXRT1021xxxxx:EVK-MIMXRT1020)
+
+function(update_board TARGET)
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkmimxrt1020_flexspi_nor_config.c
+    )
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_MIMXRT1021DAG5A
+    )
+endfunction()
diff --git a/hw/bsp/imxrt/boards/mimxrt1024_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1024_evk/board.cmake
new file mode 100644
index 000000000..7011fec9b
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1024_evk/board.cmake
@@ -0,0 +1,16 @@
+set(MCU_VARIANT MIMXRT1024)
+
+set(JLINK_DEVICE MIMXRT1024DAG5A)
+set(PYOCD_TARGET mimxrt1024)
+set(NXPLINK_DEVICE MIMXRT1024xxxxx:MIMXRT1024-EVK)
+
+function(update_board TARGET)
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkmimxrt1024_flexspi_nor_config.c
+    )
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_MIMXRT1024DAG5A
+    CFG_EXAMPLE_VIDEO_READONLY
+    #-Wno-error=array-bounds
+    )
+endfunction()
diff --git a/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.cmake b/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.cmake
new file mode 100644
index 000000000..1aee75b0d
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.cmake
@@ -0,0 +1,16 @@
+set(MCU_VARIANT MIMXRT1052)
+
+set(JLINK_DEVICE MIMXRT1052xxxxB)
+set(PYOCD_TARGET mimxrt1050)
+set(NXPLINK_DEVICE MIMXRT1052xxxxB:EVK-MIMXRT1050)
+
+function(update_board TARGET)
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkbimxrt1050_flexspi_nor_config.c
+    )
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_MIMXRT1052DVL6B
+    BOARD_TUD_RHPORT=0
+    BOARD_TUH_RHPORT=1
+    )
+endfunction()
diff --git a/hw/bsp/imxrt/boards/teensy_40/board.cmake b/hw/bsp/imxrt/boards/teensy_40/board.cmake
new file mode 100644
index 000000000..41fdc78f5
--- /dev/null
+++ b/hw/bsp/imxrt/boards/teensy_40/board.cmake
@@ -0,0 +1,21 @@
+set(MCU_VARIANT MIMXRT1062)
+
+set(JLINK_DEVICE MIMXRT1062xxx6A)
+set(PYOCD_TARGET mimxrt1060)
+set(NXPLINK_DEVICE MIMXRT1062xxxxA:EVK-MIMXRT1060)
+
+function(update_board TARGET)
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/teensy40_flexspi_nor_config.c
+    )
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_MIMXRT1062DVL6A
+    BOARD_TUD_RHPORT=0
+    BOARD_TUH_RHPORT=1
+    )
+endfunction()
+
+# flash by using teensy_loader_cli https://github.com/PaulStoffregen/teensy_loader_cli
+# Make sure it is in your PATH
+# flash: $(BUILD)/$(PROJECT).hex
+# teensy_loader_cli --mcu=imxrt1062 -v -w $<
diff --git a/hw/bsp/imxrt/boards/teensy_40/teensy40_flexspi_nor_config.c b/hw/bsp/imxrt/boards/teensy_40/teensy40_flexspi_nor_config.c
index 7929906eb..dbedc90a0 100644
--- a/hw/bsp/imxrt/boards/teensy_40/teensy40_flexspi_nor_config.c
+++ b/hw/bsp/imxrt/boards/teensy_40/teensy40_flexspi_nor_config.c
@@ -5,7 +5,7 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#include <bsp/imxrt/boards/teensy_40/teensy40_flexspi_nor_config.h>
+#include "teensy40_flexspi_nor_config.h"
 
 /* Component ID definition, used by tools. */
 #ifndef FSL_COMPONENT_ID
diff --git a/hw/bsp/imxrt/boards/teensy_41/board.cmake b/hw/bsp/imxrt/boards/teensy_41/board.cmake
new file mode 100644
index 000000000..0fd8d528e
--- /dev/null
+++ b/hw/bsp/imxrt/boards/teensy_41/board.cmake
@@ -0,0 +1,21 @@
+set(MCU_VARIANT MIMXRT1062)
+
+set(JLINK_DEVICE MIMXRT1062xxx6A)
+set(PYOCD_TARGET mimxrt1060)
+set(NXPLINK_DEVICE MIMXRT1062xxxxA:EVK-MIMXRT1060)
+
+function(update_board TARGET)
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/teensy41_flexspi_nor_config.c
+    )
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_MIMXRT1062DVL6A
+    BOARD_TUD_RHPORT=0
+    BOARD_TUH_RHPORT=1
+    )
+endfunction()
+
+# flash by using teensy_loader_cli https://github.com/PaulStoffregen/teensy_loader_cli
+# Make sure it is in your PATH
+# flash: $(BUILD)/$(PROJECT).hex
+# teensy_loader_cli --mcu=imxrt1062 -v -w $<
diff --git a/hw/bsp/imxrt/boards/teensy_41/teensy41_flexspi_nor_config.c b/hw/bsp/imxrt/boards/teensy_41/teensy41_flexspi_nor_config.c
index 2d2bf8f09..f40c72cf7 100644
--- a/hw/bsp/imxrt/boards/teensy_41/teensy41_flexspi_nor_config.c
+++ b/hw/bsp/imxrt/boards/teensy_41/teensy41_flexspi_nor_config.c
@@ -5,7 +5,7 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#include <bsp/imxrt/boards/teensy_40/teensy40_flexspi_nor_config.h>
+#include "teensy41_flexspi_nor_config.h"
 
 /* Component ID definition, used by tools. */
 #ifndef FSL_COMPONENT_ID
diff --git a/tools/build_cmake.py b/tools/build_cmake.py
new file mode 100644
index 000000000..88d27dfb8
--- /dev/null
+++ b/tools/build_cmake.py
@@ -0,0 +1,99 @@
+import os
+import sys
+import time
+import subprocess
+import pathlib
+from multiprocessing import Pool
+
+import build_utils
+
+SUCCEEDED = "\033[32msucceeded\033[0m"
+FAILED = "\033[31mfailed\033[0m"
+SKIPPED = "\033[33mskipped\033[0m"
+
+build_separator = '-' * 106
+
+make_iar_option = 'CC=iccarm'
+
+def filter_with_input(mylist):
+    if len(sys.argv) > 1:
+        input_args = list(set(mylist).intersection(sys.argv))
+        if len(input_args) > 0:
+            mylist[:] = input_args
+
+
+def build_family(family, make_option):
+    all_boards = []
+    for entry in os.scandir("hw/bsp/{}/boards".format(family)):
+        if entry.is_dir() and entry.name != 'pico_sdk':
+            all_boards.append(entry.name)
+    all_boards.sort()
+
+    # success, failed, skipped
+    ret = [0, 0, 0]
+    for board in all_boards:
+        start_time = time.monotonic()
+
+        # Generate build
+        r = subprocess.run(f"cmake examples -B cmake-build-ci-{board} -G \"Ninja\" -DFAMILY={family} -DBOARD"
+                           f"={board}", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+
+        # Build
+        if r.returncode == 0:
+            r = subprocess.run(f"cmake --build cmake-build-ci-{board}", shell=True, stdout=subprocess.PIPE,
+                               stderr=subprocess.STDOUT)
+
+        duration = time.monotonic() - start_time
+
+        if r.returncode == 0:
+            status = SUCCEEDED
+            ret[0] += 1
+        else:
+            status = FAILED
+            ret[1] += 1
+
+        flash_size = "-"
+        sram_size = "-"
+        example = 'all'
+        print(build_utils.build_format.format(example, board, status, "{:.2f}s".format(duration), flash_size, sram_size))
+
+        if r.returncode != 0:
+            # group output in CI
+            print(f"::group::{board} build error")
+            print(r.stdout.decode("utf-8"))
+            print(f"::endgroup::")
+
+    return ret
+
+
+if __name__ == '__main__':
+    # IAR CC
+    if make_iar_option not in sys.argv:
+        make_iar_option = ''
+
+    # If family are not specified in arguments, build all
+    all_families = []
+    for entry in os.scandir("hw/bsp"):
+        if entry.is_dir() and os.path.isdir(entry.path + "/boards") and entry.name != 'espressif':
+            all_families.append(entry.name)
+    filter_with_input(all_families)
+    all_families.sort()
+
+    print(build_separator)
+    print(build_utils.build_format.format('Example', 'Board', '\033[39mResult\033[0m', 'Time', 'Flash', 'SRAM'))
+    total_time = time.monotonic()
+
+    # succeeded, failed, skipped
+    total_result = [0, 0, 0]
+    for family in all_families:
+        fret = build_family(family, make_iar_option)
+        if len(fret) == len(total_result):
+            total_result = [total_result[i] + fret[i] for i in range(len(fret))]
+
+    total_time = time.monotonic() - total_time
+    print(build_separator)
+    print("Build Summary: {} {}, {} {}, {} {} and took {:.2f}s".format(total_result[0], SUCCEEDED, total_result[1],
+                                                                       FAILED, total_result[2], SKIPPED, total_time))
+    print(build_separator)
+
+    sys.exit(total_result[1])

From c3770019cb3d49d8b17a1135e10cfc2d77905a4e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 10 May 2023 13:50:24 +0700
Subject: [PATCH 311/691] install ninja

---
 .github/workflows/cmake_arm.yml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index 3a1ef4f4f..412244836 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -44,6 +44,9 @@ jobs:
       with:
         release: '11.2-2022.02'
 
+    - name: Install Ninja
+      run: apt install -y ninja-build
+
     - name: Checkout TinyUSB
       uses: actions/checkout@v3
 

From c4b2fed8bd8e54d60925c90b2876f87c3662d56c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 10 May 2023 13:51:45 +0700
Subject: [PATCH 312/691] forgot sudo

---
 .github/workflows/cmake_arm.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index 412244836..844a03443 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -45,7 +45,7 @@ jobs:
         release: '11.2-2022.02'
 
     - name: Install Ninja
-      run: apt install -y ninja-build
+      run: sudo apt install -y ninja-build
 
     - name: Checkout TinyUSB
       uses: actions/checkout@v3

From 1e91fc97e2f99c26e672a2c4ad76bcb6af529c28 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 10 May 2023 14:59:23 +0700
Subject: [PATCH 313/691] remove imxrt from makebuild

---
 .github/workflows/build_arm.yml | 1 -
 1 file changed, 1 deletion(-)

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index b60d12a98..f0b01b43d 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -33,7 +33,6 @@ jobs:
         family:
         # Alphabetical order
         - 'broadcom_32bit'
-        - 'imxrt'
         - 'kinetis_k32 kinetis_kl'
         - 'lpc11 lpc13 lpc15 lpc17 lpc18'
         - 'lpc51 lpc54 lpc55'

From 137d51688225915e8251a55a5dad6d9f41963036 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 10 May 2023 15:32:39 +0700
Subject: [PATCH 314/691] try to fix build doc

---
 .readthedocs.yaml | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/.readthedocs.yaml b/.readthedocs.yaml
index 1421b397a..e26b1f475 100644
--- a/.readthedocs.yaml
+++ b/.readthedocs.yaml
@@ -4,11 +4,18 @@
 
 version: 2
 
+# Set the version of Python and other tools you might need
+build:
+  os: ubuntu-22.04
+  tools:
+    python: "3.11"
+
+# Build documentation in the docs/ directory with Sphinx
 sphinx:
    configuration: docs/conf.py
 
+# Optionally declare the Python requirements required to build your docs
 python:
-  version: 3.8
   install:
     - requirements: docs/requirements.txt
 

From eaa159c0a6a0a56a56507e44e83fe1883b3995c2 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 10 May 2023 15:52:33 +0700
Subject: [PATCH 315/691] more doc build fix

---
 docs/info/changelog.rst | 2 +-
 docs/requirements.txt   | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/docs/info/changelog.rst b/docs/info/changelog.rst
index ca715cb58..c6c02d181 100644
--- a/docs/info/changelog.rst
+++ b/docs/info/changelog.rst
@@ -93,7 +93,7 @@ Controller Driver (DCD & HCD)
 
   - CFG_TUD_ENABLED/CFG_TUH_ENABLED, CFG_TUD_MAX_SPEED/CFG_TUH_MAX_SPEED can be used to replace CFG_TUSB_RHPORT0_MODE/CFG_TUSB_RHPORT1_MODE
   - tud_init(rphort), tuh_init(rhport) can be used to init stack on specified roothub port (controller) instead of tusb_init(void)
-- Add dcd/hcd port specific defines TUP_ (stand for tinyusb port-specific)
+- Add dcd/hcd port specific defines `TUP_` (stand for tinyusb port-specific)
 - [dwc2]
 
   - Update to support stm32 h72x, h73x with only 1 otg controller
diff --git a/docs/requirements.txt b/docs/requirements.txt
index 15022e147..ad5c89922 100644
--- a/docs/requirements.txt
+++ b/docs/requirements.txt
@@ -1,4 +1,4 @@
-sphinx~=3.0
+sphinx>=5.0
 furo>=2020.12.30.b24
 sphinx-autodoc-typehints>=1.10
-jinja2==3.0.3
+jinja2>=3.0.3

From 9c1918fe465b9cbb77540bf3c37b64103a537d47 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 12 May 2023 13:13:42 +0200
Subject: [PATCH 316/691] Remove deprecated dcd_synopsys

---
 tools/iar_template.ipcf | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/tools/iar_template.ipcf b/tools/iar_template.ipcf
index 32bfce08c..6ea1d576d 100644
--- a/tools/iar_template.ipcf
+++ b/tools/iar_template.ipcf
@@ -147,9 +147,6 @@
 		<group name="src/portable/st/stm32_fsdev">
 			<path>$TUSB_DIR$/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c</path>
 		</group>
-		<group name="src/portable/st/synopsys">
-			<path>$TUSB_DIR$/src/portable/st/synopsys/dcd_synopsys.c</path>
-		</group>
 		<group name="src/portable/sunxi">
 			<path>$TUSB_DIR$/src/portable/sunxi/dcd_sunxi_musb.c</path>
 		</group>

From 2c745d1b1eb6c57235372e2f8fe4a8a806a8f4f7 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 10 May 2023 18:15:48 +0700
Subject: [PATCH 317/691] able to build lpc55

---
 examples/cmake/cpu/cortex-m33.cmake           |  12 ++
 hw/bsp/imxrt/family.cmake                     |   1 +
 .../lpc55/boards/lpcxpresso55s69/board.cmake  |  12 ++
 hw/bsp/lpc55/family.c                         |   3 +
 hw/bsp/lpc55/family.cmake                     | 181 ++++++++++++++++++
 hw/bsp/lpc55/family.mk                        |   1 +
 6 files changed, 210 insertions(+)
 create mode 100644 examples/cmake/cpu/cortex-m33.cmake
 create mode 100644 hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
 create mode 100644 hw/bsp/lpc55/family.cmake

diff --git a/examples/cmake/cpu/cortex-m33.cmake b/examples/cmake/cpu/cortex-m33.cmake
new file mode 100644
index 000000000..fbd5027b1
--- /dev/null
+++ b/examples/cmake/cpu/cortex-m33.cmake
@@ -0,0 +1,12 @@
+if (TOOLCHAIN STREQUAL "gcc")
+  list(APPEND TOOLCHAIN_COMMON_FLAGS
+    -mthumb
+    -mcpu=cortex-m33
+    -mfloat-abi=hard
+    -mfpu=fpv5-d16
+    )
+
+  set(FREERTOS_PORT GCC_ARM_CM33_NONSECURE CACHE INTERNAL "")
+else ()
+  # TODO support IAR
+endif ()
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index b510c064e..4881f9c0f 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -98,6 +98,7 @@ function(family_configure_target TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
   target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
new file mode 100644
index 000000000..9cc5ed3c5
--- /dev/null
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
@@ -0,0 +1,12 @@
+set(MCU_VARIANT LPC55S69)
+set(MCU_CORE LPC55S69_cm33_core0)
+
+set(JLINK_DEVICE LPC55S69)
+set(PYOCD_TARGET LPC55S69)
+set(NXPLINK_DEVICE LPC55S69:LPCXpresso55S69)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_LPC55S69JBD100_cm33_core0
+    )
+endfunction()
diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c
index 3ed00e7da..1d2c87b4f 100644
--- a/hw/bsp/lpc55/family.c
+++ b/hw/bsp/lpc55/family.c
@@ -31,8 +31,11 @@
 #include "fsl_power.h"
 #include "fsl_iocon.h"
 #include "fsl_usart.h"
+
+#ifdef NEOPIXEL_PIN
 #include "fsl_sctimer.h"
 #include "sct_neopixel.h"
+#endif
 
 #ifdef BOARD_TUD_RHPORT
   #define PORT_SUPPORT_DEVICE(_n)  (BOARD_TUD_RHPORT == _n)
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
new file mode 100644
index 000000000..729454b5e
--- /dev/null
+++ b/hw/bsp/lpc55/family.cmake
@@ -0,0 +1,181 @@
+if (TARGET _${FAMILY}_family_inclusion_marker)
+  return()
+endif ()
+
+add_library(_${FAMILY}_family_inclusion_marker INTERFACE)
+
+if (NOT BOARD)
+  message(FATAL_ERROR "BOARD not specified")
+endif ()
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_LIST_DIR}/../../../examples/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS LPC55XX CACHE INTERNAL "")
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+set(BOARD_TARGET board_${BOARD})
+if (NOT TARGET ${BOARD_TARGET})
+  # TOP is path to root directory
+  set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
+
+  set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
+  set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
+
+  add_library(${BOARD_TARGET} STATIC
+    # external driver
+    #lib/sct_neopixel/sct_neopixel.c
+    # driver
+    ${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
+    ${SDK_DIR}/drivers/common/fsl_common_arm.c
+    ${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
+    ${SDK_DIR}/drivers/flexcomm/fsl_usart.c
+    # mcu
+    ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_power.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    CFG_TUSB_MCU=OPT_MCU_LPC55XX
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    # driver
+    ${SDK_DIR}/drivers/common
+    ${SDK_DIR}/drivers/flexcomm
+    ${SDK_DIR}/drivers/lpc_iocon
+    ${SDK_DIR}/drivers/lpc_gpio
+    ${SDK_DIR}/drivers/lpuart
+    # mcu
+    ${CMSIS_DIR}/CMSIS/Core/Include
+    ${SDK_DIR}/devices/${MCU_VARIANT}
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+    )
+  update_board(${BOARD_TARGET})
+
+  if (TOOLCHAIN STREQUAL "gcc")
+    target_sources(${BOARD_TARGET} PUBLIC
+      ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S
+      )
+    target_link_options(${BOARD_TARGET} PUBLIC
+      # linker file
+      "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld"
+      # link map
+      "LINKER:-Map=$<IF:$<BOOL:$<TARGET_PROPERTY:OUTPUT_NAME>>,$<TARGET_PROPERTY:OUTPUT_NAME>,$<TARGET_PROPERTY:NAME>>${CMAKE_EXECUTABLE_SUFFIX}.map"
+      # nanolib
+      --specs=nosys.specs
+      --specs=nano.specs
+      )
+  else ()
+    # TODO support IAR
+  endif ()
+endif () # BOARD_TARGET
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_target TARGET)
+  # set output name to .elf
+  set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf)
+
+  # TOP is path to root directory
+  set(TOP "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../..")
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # TinyUSB Port
+    ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  #---------- TinyUSB ----------
+  # tinyusb target is built for each example since it depends on example's tusb_config.h
+  set(TINYUSB_TARGET_PREFIX ${TARGET}-)
+  add_library(${TARGET}-tinyusb_config INTERFACE)
+
+  target_include_directories(${TARGET}-tinyusb_config INTERFACE
+    ${CMAKE_CURRENT_SOURCE_DIR}/src
+    )
+  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
+    CFG_TUSB_MCU=OPT_MCU_LPC55XX
+    )
+
+  # tinyusb's CMakeList.txt
+  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
+
+  # group target (not yet supported by clion)
+  set_target_properties(${TARGET}-tinyusb ${TARGET}-tinyusb_config
+    PROPERTIES FOLDER ${TARGET}_sub
+    )
+
+  #---------- Flash ----------
+  # Flash using pyocd
+  add_custom_target(${TARGET}-pyocd
+    COMMAND pyocd flash -t ${PYOCD_TARGET} $<TARGET_FILE:${TARGET}>
+    )
+
+  # Flash using NXP LinkServer (redlink)
+  # https://www.nxp.com/design/software/development-software/mcuxpresso-software-and-tools-/linkserver-for-microcontrollers:LINKERSERVER
+  # LinkServer has a bug that can only execute with full path otherwise it throws:
+  # realpath error: No such file or directory
+  execute_process(COMMAND which LinkServer OUTPUT_VARIABLE LINKSERVER_PATH OUTPUT_STRIP_TRAILING_WHITESPACE)
+  add_custom_target(${TARGET}-nxplink
+    COMMAND ${LINKSERVER_PATH} flash ${NXPLINK_DEVICE} load $<TARGET_FILE:${TARGET}>
+    )
+
+endfunction()
+
+
+function(family_add_freertos TARGET)
+  # freertos_config
+  add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/FreeRTOSConfig ${CMAKE_CURRENT_BINARY_DIR}/freertos_config)
+
+  ## freertos
+  if (NOT TARGET freertos_kernel)
+    add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../../lib/FreeRTOS-Kernel ${CMAKE_CURRENT_BINARY_DIR}/freertos_kernel)
+  endif ()
+
+  # Add FreeRTOS option to tinyusb_config
+  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
+    CFG_TUSB_OS=OPT_OS_FREERTOS
+    )
+  # link tinyusb with freeRTOS kernel
+  target_link_libraries(${TARGET}-tinyusb PUBLIC
+    freertos_kernel
+    )
+  target_link_libraries(${TARGET} PUBLIC
+    freertos_kernel
+    )
+endfunction()
+
+function(family_configure_device_example TARGET)
+  family_configure_target(${TARGET})
+endfunction()
+
+function(family_configure_host_example TARGET)
+  family_configure_target(${TARGET})
+endfunction()
+
+function(family_configure_dual_usb_example TARGET)
+  family_configure_target(${TARGET})
+endfunction()
diff --git a/hw/bsp/lpc55/family.mk b/hw/bsp/lpc55/family.mk
index f9dabcfa3..ee0b1ca7f 100644
--- a/hw/bsp/lpc55/family.mk
+++ b/hw/bsp/lpc55/family.mk
@@ -42,6 +42,7 @@ SRC_C += \
 	$(MCU_DIR)/drivers/fsl_clock.c \
 	$(MCU_DIR)/drivers/fsl_power.c \
 	$(MCU_DIR)/drivers/fsl_reset.c \
+
 	$(SDK_DIR)/drivers/lpc_gpio/fsl_gpio.c \
 	$(SDK_DIR)/drivers/common/fsl_common_arm.c \
 	$(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \

From dbcef41f95a1c52079c005586d196a5b22060b13 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 10 May 2023 18:22:51 +0700
Subject: [PATCH 318/691] add support for other lpc55 boards

---
 hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake | 12 ++++++++++++
 hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake |  2 ++
 hw/bsp/lpc55/boards/mcu_link/board.cmake        | 14 ++++++++++++++
 3 files changed, 28 insertions(+)
 create mode 100644 hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake
 create mode 100644 hw/bsp/lpc55/boards/mcu_link/board.cmake

diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake b/hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake
new file mode 100644
index 000000000..d935b70e6
--- /dev/null
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake
@@ -0,0 +1,12 @@
+set(MCU_VARIANT LPC55S28)
+set(MCU_CORE LPC55S28)
+
+set(JLINK_DEVICE LPC55S28)
+set(PYOCD_TARGET LPC55S28)
+set(NXPLINK_DEVICE LPC55S28:LPCXpresso55S28)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_LPC55S28JBD100
+    )
+endfunction()
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
index 9cc5ed3c5..fd7cb6de6 100644
--- a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
@@ -8,5 +8,7 @@ set(NXPLINK_DEVICE LPC55S69:LPCXpresso55S69)
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     CPU_LPC55S69JBD100_cm33_core0
+    # port 1 is highspeed
+    # BOARD_TUD_RHPORT=1
     )
 endfunction()
diff --git a/hw/bsp/lpc55/boards/mcu_link/board.cmake b/hw/bsp/lpc55/boards/mcu_link/board.cmake
new file mode 100644
index 000000000..fd7cb6de6
--- /dev/null
+++ b/hw/bsp/lpc55/boards/mcu_link/board.cmake
@@ -0,0 +1,14 @@
+set(MCU_VARIANT LPC55S69)
+set(MCU_CORE LPC55S69_cm33_core0)
+
+set(JLINK_DEVICE LPC55S69)
+set(PYOCD_TARGET LPC55S69)
+set(NXPLINK_DEVICE LPC55S69:LPCXpresso55S69)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_LPC55S69JBD100_cm33_core0
+    # port 1 is highspeed
+    # BOARD_TUD_RHPORT=1
+    )
+endfunction()

From a57ba87859c90ae7e5d8419685fffef87db67b21 Mon Sep 17 00:00:00 2001
From: Ha Thach <thach@tinyusb.org>
Date: Thu, 11 May 2023 15:16:32 +0700
Subject: [PATCH 319/691] revert family.mk

---
 hw/bsp/lpc55/family.mk | 1 -
 1 file changed, 1 deletion(-)

diff --git a/hw/bsp/lpc55/family.mk b/hw/bsp/lpc55/family.mk
index ee0b1ca7f..f9dabcfa3 100644
--- a/hw/bsp/lpc55/family.mk
+++ b/hw/bsp/lpc55/family.mk
@@ -42,7 +42,6 @@ SRC_C += \
 	$(MCU_DIR)/drivers/fsl_clock.c \
 	$(MCU_DIR)/drivers/fsl_power.c \
 	$(MCU_DIR)/drivers/fsl_reset.c \
-
 	$(SDK_DIR)/drivers/lpc_gpio/fsl_gpio.c \
 	$(SDK_DIR)/drivers/common/fsl_common_arm.c \
 	$(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \

From 9fd0fee458759c49acbeab6b9382df287620e532 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 15 May 2023 14:25:42 +0700
Subject: [PATCH 320/691] adding nrf

---
 .idea/cmake.xml                        |   6 +-
 examples/cmake/cpu/cortex-m4.cmake     |  12 ++
 examples/rules.mk                      |   2 +-
 hw/bsp/lpc55/family.cmake              |   4 +-
 hw/bsp/nrf/boards/pca10056/board.cmake |   8 ++
 hw/bsp/nrf/family.cmake                | 176 +++++++++++++++++++++++++
 6 files changed, 203 insertions(+), 5 deletions(-)
 create mode 100644 examples/cmake/cpu/cortex-m4.cmake
 create mode 100644 hw/bsp/nrf/boards/pca10056/board.cmake
 create mode 100644 hw/bsp/nrf/family.cmake

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 4d9fc9aa5..52b698227 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -2,6 +2,8 @@
 <project version="4">
   <component name="CMakeSharedSettings">
     <configurations>
+      <configuration PROFILE_NAME="pca10056" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10056" />
+      <configuration PROFILE_NAME="lpc55s69" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc55 -DBOARD=lpcxpresso55s69" />
       <configuration PROFILE_NAME="esp32s3" ENABLED="false" GENERATION_OPTIONS="-DFAMILY=espressif -DBOARD=espressif_s3_devkitm -DIDF_TARGET=esp32s3">
         <ADDITIONAL_GENERATION_ENVIRONMENT>
           <envs>
@@ -22,8 +24,8 @@
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
-      <configuration PROFILE_NAME="rp2040" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=rp2040 -DBOARD=raspberry_pi_pico" />
-      <configuration PROFILE_NAME="rt1010 evk" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1010_evk" />
+      <configuration PROFILE_NAME="rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=rp2040 -DBOARD=raspberry_pi_pico" />
+      <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1010_evk" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/examples/cmake/cpu/cortex-m4.cmake b/examples/cmake/cpu/cortex-m4.cmake
new file mode 100644
index 000000000..5a2d16c05
--- /dev/null
+++ b/examples/cmake/cpu/cortex-m4.cmake
@@ -0,0 +1,12 @@
+if (TOOLCHAIN STREQUAL "gcc")
+  list(APPEND TOOLCHAIN_COMMON_FLAGS
+    -mthumb
+    -mcpu=cortex-m4
+    -mfloat-abi=hard
+    -mfpu=fpv4-sp-d16
+    )
+
+  set(FREERTOS_PORT GCC_ARM_CM4F CACHE INTERNAL "")
+else ()
+  # TODO support IAR
+endif ()
diff --git a/examples/rules.mk b/examples/rules.mk
index 516beca78..2eaa48e2e 100644
--- a/examples/rules.mk
+++ b/examples/rules.mk
@@ -86,7 +86,7 @@ LDFLAGS += -Wl,-T,$(TOP)/$(GCC_LD_FILE)
 endif
 
 ifneq ($(SKIP_NANOLIB), 1)
-LDFLAGS += -specs=nosys.specs -specs=nano.specs
+LDFLAGS += --specs=nosys.specs --specs=nano.specs
 endif
 
 ASFLAGS += $(CFLAGS)
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index 729454b5e..0ac2b6ce3 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -1,8 +1,8 @@
-if (TARGET _${FAMILY}_family_inclusion_marker)
+if (TARGET _lpc55_family_inclusion_marker)
   return()
 endif ()
 
-add_library(_${FAMILY}_family_inclusion_marker INTERFACE)
+add_library(_lpc55_family_inclusion_marker INTERFACE)
 
 if (NOT BOARD)
   message(FATAL_ERROR "BOARD not specified")
diff --git a/hw/bsp/nrf/boards/pca10056/board.cmake b/hw/bsp/nrf/boards/pca10056/board.cmake
new file mode 100644
index 000000000..cc8ef2fcb
--- /dev/null
+++ b/hw/bsp/nrf/boards/pca10056/board.cmake
@@ -0,0 +1,8 @@
+set(MCU_VARIANT nrf52840)
+set(LD_FILE_gcc ${NRFX_DIR}/mdk/nrf52840_xxaa.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    NRF52840_XXAA
+    )
+endfunction()
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
new file mode 100644
index 000000000..7adee5a03
--- /dev/null
+++ b/hw/bsp/nrf/family.cmake
@@ -0,0 +1,176 @@
+if (TARGET _nrf_family_inclusion_marker)
+  return()
+endif ()
+
+add_library(_nrf_family_inclusion_marker INTERFACE)
+
+if (NOT BOARD)
+  message(FATAL_ERROR "BOARD not specified")
+endif ()
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_LIST_DIR}/../../../examples/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS NRF5X CACHE INTERNAL "")
+
+# TOP is path to root directory
+set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
+set(NRFX_DIR ${TOP}/hw/mcu/nordic/nrfx)
+set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+set(JLINK_DEVICE $(MCU_VARIANT)_xxaa)
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+set(BOARD_TARGET board_${BOARD})
+if (NOT TARGET ${BOARD_TARGET})
+  add_library(${BOARD_TARGET} STATIC
+    # driver
+    ${NRFX_DIR}/drivers/src/nrfx_power.c
+    ${NRFX_DIR}/drivers/src/nrfx_uarte.c
+    # mcu
+    ${NRFX_DIR}/mdk/system_${MCU_VARIANT}.c
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    CONFIG_GPIO_AS_PINRESET
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${NRFX_DIR}/../ # hw/mcu/nordic: remove later
+    # driver
+    ${NRFX_DIR}
+    ${NRFX_DIR}/mdk
+    ${NRFX_DIR}/hal
+    ${NRFX_DIR}/drivers/include
+    ${NRFX_DIR}/drivers/src
+    ${CMSIS_DIR}/CMSIS/Core/Include
+    )
+  update_board(${BOARD_TARGET})
+
+  if (NOT DEFINED LD_FILE_${TOOLCHAIN})
+    set(LD_FILE_gcc ${NRFX_DIR}/mdk/${MCU_VARIANT}_xxaa.ld)
+  endif ()
+
+  if (TOOLCHAIN STREQUAL "gcc")
+    target_sources(${BOARD_TARGET} PUBLIC
+      ${NRFX_DIR}/mdk/gcc_startup_${MCU_VARIANT}.S
+      )
+    target_link_options(${BOARD_TARGET} PUBLIC
+      # linker file
+      "LINKER:--script=${LD_FILE_gcc}"
+      -L${NRFX_DIR}/mdk
+      # link map
+      "LINKER:-Map=$<IF:$<BOOL:$<TARGET_PROPERTY:OUTPUT_NAME>>,$<TARGET_PROPERTY:OUTPUT_NAME>,$<TARGET_PROPERTY:NAME>>${CMAKE_EXECUTABLE_SUFFIX}.map"
+      # nanolib
+      --specs=nosys.specs
+      --specs=nano.specs
+      )
+  else ()
+    # TODO support IAR
+  endif ()
+endif () # BOARD_TARGET
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_target TARGET)
+  # set output name to .elf
+  set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf)
+
+  # TOP is path to root directory
+  set(TOP "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../..")
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # TinyUSB Port
+    ${TOP}/src/portable/nordic/nrf5x/dcd_nrf5x.c
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  #---------- TinyUSB ----------
+  # tinyusb target is built for each example since it depends on example's tusb_config.h
+  set(TINYUSB_TARGET_PREFIX ${TARGET}-)
+  add_library(${TARGET}-tinyusb_config INTERFACE)
+
+  target_include_directories(${TARGET}-tinyusb_config INTERFACE
+    ${CMAKE_CURRENT_SOURCE_DIR}/src
+    )
+  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
+    CFG_TUSB_MCU=OPT_MCU_NRF5X
+    )
+
+  # tinyusb's CMakeList.txt
+  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
+
+  # group target (not yet supported by clion)
+  set_target_properties(${TARGET}-tinyusb ${TARGET}-tinyusb_config
+    PROPERTIES FOLDER ${TARGET}_sub
+    )
+
+  #---------- Flash ----------
+  # Flash using pyocd
+  add_custom_target(${TARGET}-pyocd
+    COMMAND pyocd flash -t ${PYOCD_TARGET} $<TARGET_FILE:${TARGET}>
+    )
+
+  # Flash using NXP LinkServer (redlink)
+  # https://www.nxp.com/design/software/development-software/mcuxpresso-software-and-tools-/linkserver-for-microcontrollers:LINKERSERVER
+  # LinkServer has a bug that can only execute with full path otherwise it throws:
+  # realpath error: No such file or directory
+  execute_process(COMMAND which LinkServer OUTPUT_VARIABLE LINKSERVER_PATH OUTPUT_STRIP_TRAILING_WHITESPACE)
+  add_custom_target(${TARGET}-nxplink
+    COMMAND ${LINKSERVER_PATH} flash ${NXPLINK_DEVICE} load $<TARGET_FILE:${TARGET}>
+    )
+
+endfunction()
+
+
+function(family_add_freertos TARGET)
+  # freertos_config
+  add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/FreeRTOSConfig ${CMAKE_CURRENT_BINARY_DIR}/freertos_config)
+
+  ## freertos
+  if (NOT TARGET freertos_kernel)
+    add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../../lib/FreeRTOS-Kernel ${CMAKE_CURRENT_BINARY_DIR}/freertos_kernel)
+  endif ()
+
+  # Add FreeRTOS option to tinyusb_config
+  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
+    CFG_TUSB_OS=OPT_OS_FREERTOS
+    )
+  # link tinyusb with freeRTOS kernel
+  target_link_libraries(${TARGET}-tinyusb PUBLIC
+    freertos_kernel
+    )
+  target_link_libraries(${TARGET} PUBLIC
+    freertos_kernel
+    )
+endfunction()
+
+function(family_configure_device_example TARGET)
+  family_configure_target(${TARGET})
+endfunction()
+
+function(family_configure_host_example TARGET)
+  family_configure_target(${TARGET})
+endfunction()
+
+function(family_configure_dual_usb_example TARGET)
+  family_configure_target(${TARGET})
+endfunction()

From 9f5b08dc93176485c5a4d9ce58271e22f765d976 Mon Sep 17 00:00:00 2001
From: Ha Thach <thach@tinyusb.org>
Date: Mon, 15 May 2023 14:39:49 +0700
Subject: [PATCH 321/691] Update build_arm.yml

try bump up gcc to 12
---
 .github/workflows/build_arm.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index f0b01b43d..565fc3f27 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -58,7 +58,7 @@ jobs:
     - name: Install ARM GCC
       uses: carlosperate/arm-none-eabi-gcc-action@v1
       with:
-        release: '11.2-2022.02'
+        release: '12.2.Rel1'
 
     - name: Checkout TinyUSB
       uses: actions/checkout@v3

From d7175ad834ff80978a560db9c3a5e21b0716029e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 15 May 2023 16:51:06 +0700
Subject: [PATCH 322/691] update nrf cmake and make to support nrf5340
 (pca10095)

---
 .idea/cmake.xml                        |  3 +-
 examples/rules.mk                      |  2 +-
 hw/bsp/imxrt/family.cmake              |  2 ++
 hw/bsp/nrf/boards/pca10095/board.cmake | 12 +++++++
 hw/bsp/nrf/boards/pca10095/board.h     | 50 ++++++++++++++++++++++++++
 hw/bsp/nrf/boards/pca10095/board.mk    | 13 +++++++
 hw/bsp/nrf/family.c                    | 40 ++++++++++++++++-----
 hw/bsp/nrf/family.cmake                | 46 +++++++++++++++---------
 hw/bsp/nrf/family.mk                   |  5 ++-
 hw/bsp/nrf/nrfx_config.h               | 46 ++++++++++++++++++++++++
 hw/{mcu/nordic => bsp/nrf}/nrfx_glue.h |  0
 hw/{mcu/nordic => bsp/nrf}/nrfx_log.h  |  0
 hw/mcu/nordic/nrfx_config.h            | 18 ----------
 13 files changed, 189 insertions(+), 48 deletions(-)
 create mode 100644 hw/bsp/nrf/boards/pca10095/board.cmake
 create mode 100644 hw/bsp/nrf/boards/pca10095/board.h
 create mode 100644 hw/bsp/nrf/boards/pca10095/board.mk
 create mode 100644 hw/bsp/nrf/nrfx_config.h
 rename hw/{mcu/nordic => bsp/nrf}/nrfx_glue.h (100%)
 rename hw/{mcu/nordic => bsp/nrf}/nrfx_log.h (100%)
 delete mode 100644 hw/mcu/nordic/nrfx_config.h

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 52b698227..bbef86164 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -2,7 +2,8 @@
 <project version="4">
   <component name="CMakeSharedSettings">
     <configurations>
-      <configuration PROFILE_NAME="pca10056" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10056" />
+      <configuration PROFILE_NAME="pca10095" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10095" BUILD_OPTIONS="-v" />
+      <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10056" BUILD_OPTIONS="-v" />
       <configuration PROFILE_NAME="lpc55s69" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc55 -DBOARD=lpcxpresso55s69" />
       <configuration PROFILE_NAME="esp32s3" ENABLED="false" GENERATION_OPTIONS="-DFAMILY=espressif -DBOARD=espressif_s3_devkitm -DIDF_TARGET=esp32s3">
         <ADDITIONAL_GENERATION_ENVIRONMENT>
diff --git a/examples/rules.mk b/examples/rules.mk
index 2eaa48e2e..426000128 100644
--- a/examples/rules.mk
+++ b/examples/rules.mk
@@ -230,7 +230,7 @@ JLINK_IF ?= swd
 # Flash using jlink
 flash-jlink: $(BUILD)/$(PROJECT).hex
 	@echo halt > $(BUILD)/$(BOARD).jlink
-	@echo r > $(BUILD)/$(BOARD).jlink
+	@echo r >> $(BUILD)/$(BOARD).jlink
 	@echo loadfile $^ >> $(BUILD)/$(BOARD).jlink
 	@echo r >> $(BUILD)/$(BOARD).jlink
 	@echo go >> $(BUILD)/$(BOARD).jlink
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 4881f9c0f..77ac05c87 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -130,6 +130,7 @@ function(family_configure_target TARGET)
   #---------- Flash ----------
   # Flash using pyocd
   add_custom_target(${TARGET}-pyocd
+    DEPENDS ${TARGET}
     COMMAND pyocd flash -t ${PYOCD_TARGET} $<TARGET_FILE:${TARGET}>
     )
 
@@ -139,6 +140,7 @@ function(family_configure_target TARGET)
   # realpath error: No such file or directory
   execute_process(COMMAND which LinkServer OUTPUT_VARIABLE LINKSERVER_PATH OUTPUT_STRIP_TRAILING_WHITESPACE)
   add_custom_target(${TARGET}-nxplink
+    DEPENDS ${TARGET}
     COMMAND ${LINKSERVER_PATH} flash ${NXPLINK_DEVICE} load $<TARGET_FILE:${TARGET}>
     )
 
diff --git a/hw/bsp/nrf/boards/pca10095/board.cmake b/hw/bsp/nrf/boards/pca10095/board.cmake
new file mode 100644
index 000000000..e90d76e91
--- /dev/null
+++ b/hw/bsp/nrf/boards/pca10095/board.cmake
@@ -0,0 +1,12 @@
+set(MCU_VARIANT nrf5340_application)
+set(LD_FILE_gcc ${NRFX_DIR}/mdk/nrf5340_xxaa_application.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    NRF5340_XXAA
+    NRF5340_XXAA_APPLICATION
+    )
+  target_sources(${TARGET} PUBLIC
+    ${NRFX_DIR}/drivers/src/nrfx_usbreg.c
+    )
+endfunction()
diff --git a/hw/bsp/nrf/boards/pca10095/board.h b/hw/bsp/nrf/boards/pca10095/board.h
new file mode 100644
index 000000000..fd3c63d6a
--- /dev/null
+++ b/hw/bsp/nrf/boards/pca10095/board.h
@@ -0,0 +1,50 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_PIN               28
+#define LED_STATE_ON          0
+
+// Button
+#define BUTTON_PIN            23
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_RX_PIN           32
+#define UART_TX_PIN           33
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/nrf/boards/pca10095/board.mk b/hw/bsp/nrf/boards/pca10095/board.mk
new file mode 100644
index 000000000..5ad103d62
--- /dev/null
+++ b/hw/bsp/nrf/boards/pca10095/board.mk
@@ -0,0 +1,13 @@
+MCU_VARIANT = nrf5340_application
+CFLAGS += -DNRF5340_XXAA -DNRF5340_XXAA_APPLICATION
+
+LD_FILE = hw/mcu/nordic/nrfx/mdk/nrf5340_xxaa_application.ld
+
+SRC_C += hw/mcu/nordic/nrfx/drivers/src/nrfx_usbreg.c
+
+# caused by void SystemStoreFICRNS() (without void) in system_nrf5340_application.c
+CFLAGS += -Wno-error=strict-prototypes
+
+# flash using jlink
+JLINK_DEVICE = nrf5340_xxaa_app
+flash: flash-jlink
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 02cec31ef..157b2bf21 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -28,9 +28,9 @@
 #include "board.h"
 
 #include "nrfx.h"
-#include "nrfx/hal/nrf_gpio.h"
-#include "nrfx/drivers/include/nrfx_power.h"
-#include "nrfx/drivers/include/nrfx_uarte.h"
+#include "hal/nrf_gpio.h"
+#include "drivers/include/nrfx_power.h"
+#include "drivers/include/nrfx_uarte.h"
 
 #ifdef SOFTDEVICE_PRESENT
 #include "nrf_sdm.h"
@@ -49,6 +49,23 @@ void USBD_IRQHandler(void)
 /* MACRO TYPEDEF CONSTANT ENUM
  *------------------------------------------------------------------*/
 
+// Value is chosen to be as same as NRFX_POWER_USB_EVT_* in nrfx_power.h
+enum {
+  USB_EVT_DETECTED = 0,
+  USB_EVT_REMOVED = 1,
+  USB_EVT_READY = 2
+};
+
+#ifdef NRF5340_XXAA
+  #define LFCLK_SRC_RC CLOCK_LFCLKSRC_SRC_LFRC
+  #define VBUSDETECT_Msk USBREG_USBREGSTATUS_VBUSDETECT_Msk
+  #define OUTPUTRDY_Msk USBREG_USBREGSTATUS_OUTPUTRDY_Msk
+#else
+  #define LFCLK_SRC_RC CLOCK_LFCLKSRC_SRC_RC
+  #define VBUSDETECT_Msk POWER_USBREGSTATUS_VBUSDETECT_Msk
+  #define OUTPUTRDY_Msk POWER_USBREGSTATUS_OUTPUTRDY_Msk
+#endif
+
 static nrfx_uarte_t _uart_id = NRFX_UARTE_INSTANCE(0);
 
 // tinyusb function that handles power event (detected, ready, removed)
@@ -68,7 +85,7 @@ void board_init(void)
   NRF_CLOCK->TASKS_LFCLKSTOP = 1UL;
 
   // Use Internal OSC to compatible with all boards
-  NRF_CLOCK->LFCLKSRC = CLOCK_LFCLKSRC_SRC_RC;
+  NRF_CLOCK->LFCLKSRC = LFCLK_SRC_RC;
   NRF_CLOCK->TASKS_LFCLKSTART = 1UL;
 
   // LED
@@ -123,21 +140,26 @@ void board_init(void)
 #endif
   {
     // Power module init
-    const nrfx_power_config_t pwr_cfg = { 0 };
+    const nrfx_power_config_t pwr_cfg = {0};
     nrfx_power_init(&pwr_cfg);
 
     // Register tusb function as USB power handler
     // cause cast-function-type warning
-    const nrfx_power_usbevt_config_t config = { .handler = power_event_handler };
+    const nrfx_power_usbevt_config_t config = {.handler = power_event_handler};
     nrfx_power_usbevt_init(&config);
-
     nrfx_power_usbevt_enable();
 
+    // USB power may already be ready at this time -> no event generated
+    // We need to invoke the handler based on the status initially
+    #ifdef NRF5340_XXAA
+    usb_reg = NRF_USBREGULATOR->USBREGSTATUS;
+    #else
     usb_reg = NRF_POWER->USBREGSTATUS;
+    #endif
   }
 
-  if ( usb_reg & POWER_USBREGSTATUS_VBUSDETECT_Msk ) tusb_hal_nrf_power_event(NRFX_POWER_USB_EVT_DETECTED);
-  if ( usb_reg & POWER_USBREGSTATUS_OUTPUTRDY_Msk  ) tusb_hal_nrf_power_event(NRFX_POWER_USB_EVT_READY);
+  if ( usb_reg & VBUSDETECT_Msk ) tusb_hal_nrf_power_event(USB_EVT_DETECTED);
+  if ( usb_reg & OUTPUTRDY_Msk  ) tusb_hal_nrf_power_event(USB_EVT_READY);
 #endif
 }
 
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 7adee5a03..c8faa23cc 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -8,12 +8,6 @@ if (NOT BOARD)
   message(FATAL_ERROR "BOARD not specified")
 endif ()
 
-# toolchain set up
-set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
-set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_LIST_DIR}/../../../examples/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
-
-set(FAMILY_MCUS NRF5X CACHE INTERNAL "")
-
 # TOP is path to root directory
 set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
 set(NRFX_DIR ${TOP}/hw/mcu/nordic/nrfx)
@@ -21,7 +15,19 @@ set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
 
 # include board specific
 include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
-set(JLINK_DEVICE $(MCU_VARIANT)_xxaa)
+
+# toolchain set up
+if (MCU_VARIANT STREQUAL "nrf5340_application")
+  set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
+  set(JLINK_DEVICE nrf5340_xxaa_app)
+else ()
+  set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
+  set(JLINK_DEVICE ${MCU_VARIANT}_xxaa)
+endif ()
+
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS NRF5X CACHE INTERNAL "")
 
 #------------------------------------
 # BOARD_TARGET
@@ -40,8 +46,7 @@ if (NOT TARGET ${BOARD_TARGET})
     CONFIG_GPIO_AS_PINRESET
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
-    ${NRFX_DIR}/../ # hw/mcu/nordic: remove later
-    # driver
+    ${CMAKE_CURRENT_LIST_DIR}
     ${NRFX_DIR}
     ${NRFX_DIR}/mdk
     ${NRFX_DIR}/hal
@@ -78,6 +83,8 @@ endif () # BOARD_TARGET
 # Functions
 #------------------------------------
 function(family_configure_target TARGET)
+  #family_add_default_example_warnings(${TARGET})
+
   # set output name to .elf
   set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf)
 
@@ -126,16 +133,23 @@ function(family_configure_target TARGET)
   #---------- Flash ----------
   # Flash using pyocd
   add_custom_target(${TARGET}-pyocd
+    DEPENDS ${TARGET}
     COMMAND pyocd flash -t ${PYOCD_TARGET} $<TARGET_FILE:${TARGET}>
     )
 
-  # Flash using NXP LinkServer (redlink)
-  # https://www.nxp.com/design/software/development-software/mcuxpresso-software-and-tools-/linkserver-for-microcontrollers:LINKERSERVER
-  # LinkServer has a bug that can only execute with full path otherwise it throws:
-  # realpath error: No such file or directory
-  execute_process(COMMAND which LinkServer OUTPUT_VARIABLE LINKSERVER_PATH OUTPUT_STRIP_TRAILING_WHITESPACE)
-  add_custom_target(${TARGET}-nxplink
-    COMMAND ${LINKSERVER_PATH} flash ${NXPLINK_DEVICE} load $<TARGET_FILE:${TARGET}>
+  # Flash using jlink
+  set(JLINKEXE JLinkExe)
+  file(GENERATE
+    OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}.jlink
+    CONTENT "halt
+loadfile $<TARGET_FILE:${TARGET}>
+r
+go
+exit"
+    )
+  add_custom_target(${TARGET}-jlink
+    DEPENDS ${TARGET}
+    COMMAND ${JLINKEXE} -device ${JLINK_DEVICE} -if swd -JTAGConf -1,-1 -speed auto -CommandFile ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}.jlink
     )
 
 endfunction()
diff --git a/hw/bsp/nrf/family.mk b/hw/bsp/nrf/family.mk
index 4102c8187..310578d02 100644
--- a/hw/bsp/nrf/family.mk
+++ b/hw/bsp/nrf/family.mk
@@ -14,7 +14,7 @@ CFLAGS += \
   -DCONFIG_GPIO_AS_PINRESET
 
 # suppress warning caused by vendor mcu driver
-CFLAGS += -Wno-error=undef -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=cast-qual
+CFLAGS += -Wno-error=undef -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=cast-qual -Wno-error=redundant-decls
 
 # All source paths should be relative to the top level.
 LD_FILE ?= hw/bsp/nrf/boards/$(BOARD)/nrf52840_s140_v6.ld
@@ -30,7 +30,6 @@ SRC_C += \
 INC += \
   $(TOP)/$(BOARD_PATH) \
   $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
-  $(TOP)/hw/mcu/nordic \
   $(TOP)/hw/mcu/nordic/nrfx \
   $(TOP)/hw/mcu/nordic/nrfx/mdk \
   $(TOP)/hw/mcu/nordic/nrfx/hal \
@@ -45,4 +44,4 @@ ASFLAGS += -D__HEAP_SIZE=0
 FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
 
 # For flash-jlink target
-JLINK_DEVICE = $(MCU_VARIANT)_xxaa
+JLINK_DEVICE ?= $(MCU_VARIANT)_xxaa
diff --git a/hw/bsp/nrf/nrfx_config.h b/hw/bsp/nrf/nrfx_config.h
new file mode 100644
index 000000000..696a3fb04
--- /dev/null
+++ b/hw/bsp/nrf/nrfx_config.h
@@ -0,0 +1,46 @@
+#ifndef NRFX_CONFIG_H__
+#define NRFX_CONFIG_H__
+
+#define NRFX_POWER_ENABLED   1
+#define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY  7
+
+#define NRFX_CLOCK_ENABLED   0
+
+#define NRFX_UARTE_ENABLED   1
+#define NRFX_UARTE0_ENABLED  1
+
+#define NRFX_UARTE1_ENABLED  0
+#define NRFX_UARTE2_ENABLED  0
+#define NRFX_UARTE3_ENABLED  0
+
+#define NRFX_PRS_ENABLED     0
+#define NRFX_USBREG_ENABLED  1
+
+#if defined(NRF51)
+#include <templates/nrfx_config_nrf51.h>
+#elif defined(NRF52805_XXAA)
+#include <templates/nrfx_config_nrf52805.h>
+#elif defined(NRF52810_XXAA)
+#include <templates/nrfx_config_nrf52810.h>
+#elif defined(NRF52811_XXAA)
+#include <templates/nrfx_config_nrf52811.h>
+#elif defined(NRF52820_XXAA)
+#include <templates/nrfx_config_nrf52820.h>
+#elif defined(NRF52832_XXAA) || defined (NRF52832_XXAB)
+#include <templates/nrfx_config_nrf52832.h>
+#elif defined(NRF52833_XXAA)
+#include <templates/nrfx_config_nrf52833.h>
+#elif defined(NRF52840_XXAA)
+#include <templates/nrfx_config_nrf52840.h>
+#elif defined(NRF5340_XXAA_APPLICATION)
+#include <templates/nrfx_config_nrf5340_application.h>
+#elif defined(NRF5340_XXAA_NETWORK)
+    #include <templates/nrfx_config_nrf5340_network.h>
+#elif defined(NRF9120_XXAA) || defined(NRF9160_XXAA)
+    #include <templates/nrfx_config_nrf91.h>
+#else
+    #error "Unknown device."
+#endif
+
+
+#endif // NRFX_CONFIG_H__
diff --git a/hw/mcu/nordic/nrfx_glue.h b/hw/bsp/nrf/nrfx_glue.h
similarity index 100%
rename from hw/mcu/nordic/nrfx_glue.h
rename to hw/bsp/nrf/nrfx_glue.h
diff --git a/hw/mcu/nordic/nrfx_log.h b/hw/bsp/nrf/nrfx_log.h
similarity index 100%
rename from hw/mcu/nordic/nrfx_log.h
rename to hw/bsp/nrf/nrfx_log.h
diff --git a/hw/mcu/nordic/nrfx_config.h b/hw/mcu/nordic/nrfx_config.h
deleted file mode 100644
index 6a974ba70..000000000
--- a/hw/mcu/nordic/nrfx_config.h
+++ /dev/null
@@ -1,18 +0,0 @@
-#ifndef NRFX_CONFIG_H__
-#define NRFX_CONFIG_H__
-
-#define NRFX_POWER_ENABLED   1
-#define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY  7
-
-#define NRFX_CLOCK_ENABLED   0
-
-#define NRFX_UARTE_ENABLED   1
-#define NRFX_UARTE0_ENABLED  1
-
-#define NRFX_UARTE1_ENABLED  0
-#define NRFX_UARTE2_ENABLED  0
-#define NRFX_UARTE3_ENABLED  0
-
-#define NRFX_PRS_ENABLED     0
-
-#endif // NRFX_CONFIG_H__

From 792cf95f2d20be2908f87f4960edadcf10c207dd Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 15 May 2023 23:35:29 +0700
Subject: [PATCH 323/691] revert ci gcc to 11.2, update nrfx to version 2.11

---
 .github/workflows/build_arm.yml | 2 +-
 tools/get_deps.py               | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 565fc3f27..f0b01b43d 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -58,7 +58,7 @@ jobs:
     - name: Install ARM GCC
       uses: carlosperate/arm-none-eabi-gcc-action@v1
       with:
-        release: '12.2.Rel1'
+        release: '11.2-2022.02'
 
     - name: Checkout TinyUSB
       uses: actions/checkout@v3
diff --git a/tools/get_deps.py b/tools/get_deps.py
index d8b044343..be5738dc1 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -21,7 +21,7 @@ deps_optional = {
     'hw/mcu/infineon/mtb-xmclib-cat3'          : ['daf5500d03cba23e68c2f241c30af79cd9d63880', 'https://github.com/Infineon/mtb-xmclib-cat3.git'               ],
     'hw/mcu/microchip'                         : ['9e8b37e307d8404033bb881623a113931e1edf27', 'https://github.com/hathach/microchip_driver.git'               ],
     'hw/mcu/mindmotion/mm32sdk'                : ['0b79559eb411149d36e073c1635c620e576308d4', 'https://github.com/hathach/mm32sdk.git'                        ],
-    'hw/mcu/nordic/nrfx'                       : ['281cc2e178fd9a470d844b3afdea9eb322a0b0e8', 'https://github.com/NordicSemiconductor/nrfx.git'               ],
+    'hw/mcu/nordic/nrfx'                       : ['2527e3c8449cfd38aee41598e8af8492f410ed15', 'https://github.com/NordicSemiconductor/nrfx.git'               ],
     'hw/mcu/nuvoton'                           : ['2204191ec76283371419fbcec207da02e1bc22fa', 'https://github.com/majbthrd/nuc_driver.git'                    ],
     'hw/mcu/nxp/lpcopen'                       : ['43c45c85405a5dd114fff0ea95cca62837740c13', 'https://github.com/hathach/nxp_lpcopen.git'                    ],
     'hw/mcu/nxp/mcux-sdk'                      : ['f357a1150f6cf6c6b844f53f2d426bfb3e649850', 'https://github.com/NXPmicro/mcux-sdk.git'                      ],

From 116a258858ef3c58639d00346e197bd07ad86952 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 16 May 2023 10:14:00 +0700
Subject: [PATCH 324/691] fix nrf build

---
 hw/bsp/nrf/boards/adafruit_clue/board.mk      |  3 ++
 .../arduino_nano33_ble/arduino_nano33_ble.ld  |  2 +-
 .../circuitplayground_bluefruit/board.mk      |  3 ++
 .../nrf52840_s140_v6.ld                       | 38 -------------------
 .../boards/feather_nrf52840_express/board.mk  |  3 ++
 .../nrf52840_s140_v6.ld                       | 38 -------------------
 .../boards/feather_nrf52840_sense/board.mk    |  3 ++
 .../nrf52840_s140_v6.ld                       | 38 -------------------
 hw/bsp/nrf/boards/itsybitsy_nrf52840/board.mk |  3 ++
 .../itsybitsy_nrf52840/nrf52840_s140_v6.ld    | 38 -------------------
 hw/bsp/nrf/family.mk                          |  3 --
 .../nrf52840_s140_v6.ld                       |  2 +-
 tools/build_family.py                         |  4 +-
 13 files changed, 19 insertions(+), 159 deletions(-)
 delete mode 100755 hw/bsp/nrf/boards/circuitplayground_bluefruit/nrf52840_s140_v6.ld
 delete mode 100644 hw/bsp/nrf/boards/feather_nrf52840_express/nrf52840_s140_v6.ld
 delete mode 100644 hw/bsp/nrf/boards/feather_nrf52840_sense/nrf52840_s140_v6.ld
 delete mode 100644 hw/bsp/nrf/boards/itsybitsy_nrf52840/nrf52840_s140_v6.ld
 rename hw/bsp/nrf/{boards/adafruit_clue => linker}/nrf52840_s140_v6.ld (96%)
 mode change 100755 => 100644

diff --git a/hw/bsp/nrf/boards/adafruit_clue/board.mk b/hw/bsp/nrf/boards/adafruit_clue/board.mk
index f31899eb7..b80807963 100644
--- a/hw/bsp/nrf/boards/adafruit_clue/board.mk
+++ b/hw/bsp/nrf/boards/adafruit_clue/board.mk
@@ -1,6 +1,9 @@
 MCU_VARIANT = nrf52840
 CFLAGS += -DNRF52840_XXAA
 
+# All source paths should be relative to the top level.
+LD_FILE = hw/bsp/nrf/linker/nrf52840_s140_v6.ld
+
 $(BUILD)/$(PROJECT).zip: $(BUILD)/$(PROJECT).hex
 	adafruit-nrfutil dfu genpkg --dev-type 0x0052 --sd-req 0xFFFE --application $^ $@
 
diff --git a/hw/bsp/nrf/boards/arduino_nano33_ble/arduino_nano33_ble.ld b/hw/bsp/nrf/boards/arduino_nano33_ble/arduino_nano33_ble.ld
index f609f743f..b7cac1019 100755
--- a/hw/bsp/nrf/boards/arduino_nano33_ble/arduino_nano33_ble.ld
+++ b/hw/bsp/nrf/boards/arduino_nano33_ble/arduino_nano33_ble.ld
@@ -29,4 +29,4 @@ SECTIONS
   } > RAM
 } INSERT AFTER .data;
 
-INCLUDE "nrf52_common.ld"
+INCLUDE "nrf_common.ld"
diff --git a/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.mk b/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.mk
index f31899eb7..b80807963 100644
--- a/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.mk
+++ b/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.mk
@@ -1,6 +1,9 @@
 MCU_VARIANT = nrf52840
 CFLAGS += -DNRF52840_XXAA
 
+# All source paths should be relative to the top level.
+LD_FILE = hw/bsp/nrf/linker/nrf52840_s140_v6.ld
+
 $(BUILD)/$(PROJECT).zip: $(BUILD)/$(PROJECT).hex
 	adafruit-nrfutil dfu genpkg --dev-type 0x0052 --sd-req 0xFFFE --application $^ $@
 
diff --git a/hw/bsp/nrf/boards/circuitplayground_bluefruit/nrf52840_s140_v6.ld b/hw/bsp/nrf/boards/circuitplayground_bluefruit/nrf52840_s140_v6.ld
deleted file mode 100755
index 71c55bb81..000000000
--- a/hw/bsp/nrf/boards/circuitplayground_bluefruit/nrf52840_s140_v6.ld
+++ /dev/null
@@ -1,38 +0,0 @@
-/* Linker script to configure memory regions. */
-
-SEARCH_DIR(.)
-GROUP(-lgcc -lc -lnosys)
-
-MEMORY
-{
-  FLASH (rx)     : ORIGIN = 0x26000, LENGTH = 0xED000 - 0x26000
-
-  /* SRAM required by S132 depend on
-   * - Attribute Table Size
-   * - Vendor UUID count
-   * - Max ATT MTU
-   * - Concurrent connection peripheral + central + secure links
-   * - Event Len, HVN queue, Write CMD queue
-   */
-  RAM (rwx) :  ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400
-}
-
-SECTIONS
-{
-  . = ALIGN(4);
-  .svc_data :
-  {
-    PROVIDE(__start_svc_data = .);
-    KEEP(*(.svc_data))
-    PROVIDE(__stop_svc_data = .);
-  } > RAM
-
-  .fs_data :
-  {
-    PROVIDE(__start_fs_data = .);
-    KEEP(*(.fs_data))
-    PROVIDE(__stop_fs_data = .);
-  } > RAM
-} INSERT AFTER .data;
-
-INCLUDE "nrf52_common.ld"
diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/board.mk b/hw/bsp/nrf/boards/feather_nrf52840_express/board.mk
index f31899eb7..b80807963 100644
--- a/hw/bsp/nrf/boards/feather_nrf52840_express/board.mk
+++ b/hw/bsp/nrf/boards/feather_nrf52840_express/board.mk
@@ -1,6 +1,9 @@
 MCU_VARIANT = nrf52840
 CFLAGS += -DNRF52840_XXAA
 
+# All source paths should be relative to the top level.
+LD_FILE = hw/bsp/nrf/linker/nrf52840_s140_v6.ld
+
 $(BUILD)/$(PROJECT).zip: $(BUILD)/$(PROJECT).hex
 	adafruit-nrfutil dfu genpkg --dev-type 0x0052 --sd-req 0xFFFE --application $^ $@
 
diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/nrf52840_s140_v6.ld b/hw/bsp/nrf/boards/feather_nrf52840_express/nrf52840_s140_v6.ld
deleted file mode 100644
index 71c55bb81..000000000
--- a/hw/bsp/nrf/boards/feather_nrf52840_express/nrf52840_s140_v6.ld
+++ /dev/null
@@ -1,38 +0,0 @@
-/* Linker script to configure memory regions. */
-
-SEARCH_DIR(.)
-GROUP(-lgcc -lc -lnosys)
-
-MEMORY
-{
-  FLASH (rx)     : ORIGIN = 0x26000, LENGTH = 0xED000 - 0x26000
-
-  /* SRAM required by S132 depend on
-   * - Attribute Table Size
-   * - Vendor UUID count
-   * - Max ATT MTU
-   * - Concurrent connection peripheral + central + secure links
-   * - Event Len, HVN queue, Write CMD queue
-   */
-  RAM (rwx) :  ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400
-}
-
-SECTIONS
-{
-  . = ALIGN(4);
-  .svc_data :
-  {
-    PROVIDE(__start_svc_data = .);
-    KEEP(*(.svc_data))
-    PROVIDE(__stop_svc_data = .);
-  } > RAM
-
-  .fs_data :
-  {
-    PROVIDE(__start_fs_data = .);
-    KEEP(*(.fs_data))
-    PROVIDE(__stop_fs_data = .);
-  } > RAM
-} INSERT AFTER .data;
-
-INCLUDE "nrf52_common.ld"
diff --git a/hw/bsp/nrf/boards/feather_nrf52840_sense/board.mk b/hw/bsp/nrf/boards/feather_nrf52840_sense/board.mk
index f31899eb7..b80807963 100644
--- a/hw/bsp/nrf/boards/feather_nrf52840_sense/board.mk
+++ b/hw/bsp/nrf/boards/feather_nrf52840_sense/board.mk
@@ -1,6 +1,9 @@
 MCU_VARIANT = nrf52840
 CFLAGS += -DNRF52840_XXAA
 
+# All source paths should be relative to the top level.
+LD_FILE = hw/bsp/nrf/linker/nrf52840_s140_v6.ld
+
 $(BUILD)/$(PROJECT).zip: $(BUILD)/$(PROJECT).hex
 	adafruit-nrfutil dfu genpkg --dev-type 0x0052 --sd-req 0xFFFE --application $^ $@
 
diff --git a/hw/bsp/nrf/boards/feather_nrf52840_sense/nrf52840_s140_v6.ld b/hw/bsp/nrf/boards/feather_nrf52840_sense/nrf52840_s140_v6.ld
deleted file mode 100644
index 71c55bb81..000000000
--- a/hw/bsp/nrf/boards/feather_nrf52840_sense/nrf52840_s140_v6.ld
+++ /dev/null
@@ -1,38 +0,0 @@
-/* Linker script to configure memory regions. */
-
-SEARCH_DIR(.)
-GROUP(-lgcc -lc -lnosys)
-
-MEMORY
-{
-  FLASH (rx)     : ORIGIN = 0x26000, LENGTH = 0xED000 - 0x26000
-
-  /* SRAM required by S132 depend on
-   * - Attribute Table Size
-   * - Vendor UUID count
-   * - Max ATT MTU
-   * - Concurrent connection peripheral + central + secure links
-   * - Event Len, HVN queue, Write CMD queue
-   */
-  RAM (rwx) :  ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400
-}
-
-SECTIONS
-{
-  . = ALIGN(4);
-  .svc_data :
-  {
-    PROVIDE(__start_svc_data = .);
-    KEEP(*(.svc_data))
-    PROVIDE(__stop_svc_data = .);
-  } > RAM
-
-  .fs_data :
-  {
-    PROVIDE(__start_fs_data = .);
-    KEEP(*(.fs_data))
-    PROVIDE(__stop_fs_data = .);
-  } > RAM
-} INSERT AFTER .data;
-
-INCLUDE "nrf52_common.ld"
diff --git a/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.mk b/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.mk
index f31899eb7..b80807963 100644
--- a/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.mk
+++ b/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.mk
@@ -1,6 +1,9 @@
 MCU_VARIANT = nrf52840
 CFLAGS += -DNRF52840_XXAA
 
+# All source paths should be relative to the top level.
+LD_FILE = hw/bsp/nrf/linker/nrf52840_s140_v6.ld
+
 $(BUILD)/$(PROJECT).zip: $(BUILD)/$(PROJECT).hex
 	adafruit-nrfutil dfu genpkg --dev-type 0x0052 --sd-req 0xFFFE --application $^ $@
 
diff --git a/hw/bsp/nrf/boards/itsybitsy_nrf52840/nrf52840_s140_v6.ld b/hw/bsp/nrf/boards/itsybitsy_nrf52840/nrf52840_s140_v6.ld
deleted file mode 100644
index 71c55bb81..000000000
--- a/hw/bsp/nrf/boards/itsybitsy_nrf52840/nrf52840_s140_v6.ld
+++ /dev/null
@@ -1,38 +0,0 @@
-/* Linker script to configure memory regions. */
-
-SEARCH_DIR(.)
-GROUP(-lgcc -lc -lnosys)
-
-MEMORY
-{
-  FLASH (rx)     : ORIGIN = 0x26000, LENGTH = 0xED000 - 0x26000
-
-  /* SRAM required by S132 depend on
-   * - Attribute Table Size
-   * - Vendor UUID count
-   * - Max ATT MTU
-   * - Concurrent connection peripheral + central + secure links
-   * - Event Len, HVN queue, Write CMD queue
-   */
-  RAM (rwx) :  ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400
-}
-
-SECTIONS
-{
-  . = ALIGN(4);
-  .svc_data :
-  {
-    PROVIDE(__start_svc_data = .);
-    KEEP(*(.svc_data))
-    PROVIDE(__stop_svc_data = .);
-  } > RAM
-
-  .fs_data :
-  {
-    PROVIDE(__start_fs_data = .);
-    KEEP(*(.fs_data))
-    PROVIDE(__stop_fs_data = .);
-  } > RAM
-} INSERT AFTER .data;
-
-INCLUDE "nrf52_common.ld"
diff --git a/hw/bsp/nrf/family.mk b/hw/bsp/nrf/family.mk
index 310578d02..d5042a160 100644
--- a/hw/bsp/nrf/family.mk
+++ b/hw/bsp/nrf/family.mk
@@ -16,9 +16,6 @@ CFLAGS += \
 # suppress warning caused by vendor mcu driver
 CFLAGS += -Wno-error=undef -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=cast-qual -Wno-error=redundant-decls
 
-# All source paths should be relative to the top level.
-LD_FILE ?= hw/bsp/nrf/boards/$(BOARD)/nrf52840_s140_v6.ld
-
 LDFLAGS += -L$(TOP)/hw/mcu/nordic/nrfx/mdk
 
 SRC_C += \
diff --git a/hw/bsp/nrf/boards/adafruit_clue/nrf52840_s140_v6.ld b/hw/bsp/nrf/linker/nrf52840_s140_v6.ld
old mode 100755
new mode 100644
similarity index 96%
rename from hw/bsp/nrf/boards/adafruit_clue/nrf52840_s140_v6.ld
rename to hw/bsp/nrf/linker/nrf52840_s140_v6.ld
index 71c55bb81..e27fa1c91
--- a/hw/bsp/nrf/boards/adafruit_clue/nrf52840_s140_v6.ld
+++ b/hw/bsp/nrf/linker/nrf52840_s140_v6.ld
@@ -35,4 +35,4 @@ SECTIONS
   } > RAM
 } INSERT AFTER .data;
 
-INCLUDE "nrf52_common.ld"
+INCLUDE "nrf_common.ld"
diff --git a/tools/build_family.py b/tools/build_family.py
index 1fc25907b..9b612b4cb 100644
--- a/tools/build_family.py
+++ b/tools/build_family.py
@@ -42,9 +42,9 @@ if __name__ == '__main__':
     # If examples are not specified in arguments, build all
     all_examples = []
     for d in os.scandir("examples"):
-        if d.is_dir() and 'cmake-build' not in d.name and 'cmake' not in d.name:
+        if d.is_dir() and 'cmake' not in d.name:
             for entry in os.scandir(d.path):
-                if entry.is_dir():
+                if entry.is_dir() and 'cmake' not in entry.name:
                     all_examples.append(d.name + '/' + entry.name)
     filter_with_input(all_examples)
     all_examples.sort()

From 206d63e038744b228cfa6051d701cab50b520fe6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 11 May 2023 14:26:12 +0700
Subject: [PATCH 325/691] correct EHCI reporting failed xfer (instead of
 stalled) when device is unplugged

---
 src/class/cdc/cdc_host.c  | 21 +++++++++++----------
 src/class/hid/hid_host.c  | 27 ++++++++++++++++-----------
 src/class/msc/msc_host.c  | 10 +++++++---
 src/common/tusb_debug.h   |  1 +
 src/device/usbd_control.c |  9 ++++++---
 src/host/hub.c            |  9 ++++++++-
 src/host/usbh.c           | 20 +++++++++++++-------
 src/portable/ehci/ehci.c  | 11 ++++++++---
 src/tusb.c                |  4 ++++
 9 files changed, 74 insertions(+), 38 deletions(-)

diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index fe3691bf4..9ff666ed4 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -35,8 +35,7 @@
 
 // Debug level, TUSB_CFG_DEBUG must be at least this level for debug message
 #define CDCH_DEBUG   2
-
-#define TU_LOG_CDCH(...)   TU_LOG(CDCH_DEBUG, __VA_ARGS__)
+#define TU_LOG_DRV(...)   TU_LOG(CDCH_DEBUG, __VA_ARGS__)
 
 //--------------------------------------------------------------------+
 // Host CDC Interface
@@ -537,6 +536,8 @@ void cdch_close(uint8_t daddr)
     cdch_interface_t* p_cdc = &cdch_data[idx];
     if (p_cdc->daddr == daddr)
     {
+      TU_LOG_DRV("  CDCh close addr = %u index = %u\r\n", daddr, idx);
+
       // Invoke application callback
       if (tuh_cdc_umount_cb) tuh_cdc_umount_cb(idx);
 
@@ -804,7 +805,7 @@ static void acm_process_config(tuh_xfer_t* xfer)
 
 static bool acm_set_control_line_state(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   TU_VERIFY(p_cdc->acm_capability.support_line_request);
-  TU_LOG_CDCH("CDC ACM Set Control Line State\r\n");
+  TU_LOG_DRV("CDC ACM Set Control Line State\r\n");
 
   tusb_control_request_t const request = {
     .bmRequestType_bit = {
@@ -834,7 +835,7 @@ static bool acm_set_control_line_state(cdch_interface_t* p_cdc, uint16_t line_st
 }
 
 static bool acm_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  TU_LOG_CDCH("CDC ACM Set Line Conding\r\n");
+  TU_LOG_DRV("CDC ACM Set Line Conding\r\n");
 
   tusb_control_request_t const request = {
     .bmRequestType_bit = {
@@ -894,7 +895,7 @@ static bool ftdi_open(uint8_t daddr, const tusb_desc_interface_t *itf_desc, uint
   cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
   TU_VERIFY(p_cdc);
 
-  TU_LOG_CDCH("FTDI opened\r\n");
+  TU_LOG_DRV("FTDI opened\r\n");
 
   p_cdc->serial_drid = SERIAL_DRIVER_FTDI;
 
@@ -938,7 +939,7 @@ static bool ftdi_sio_reset(cdch_interface_t* p_cdc, tuh_xfer_cb_t complete_cb, u
 
 static bool ftdi_sio_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
-  TU_LOG_CDCH("CDC FTDI Set Control Line State\r\n");
+  TU_LOG_DRV("CDC FTDI Set Control Line State\r\n");
   p_cdc->user_control_cb = complete_cb;
   TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_MODEM_CTRL, 0x0300 | line_state,
                                  complete_cb ? cdch_internal_control_complete : NULL, user_data));
@@ -974,7 +975,7 @@ static uint32_t ftdi_232bm_baud_to_divisor(uint32_t baud)
 static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
   uint16_t const divisor = (uint16_t) ftdi_232bm_baud_to_divisor(baudrate);
-  TU_LOG_CDCH("CDC FTDI Set BaudRate = %lu, divisor = 0x%04x\n", baudrate, divisor);
+  TU_LOG_DRV("CDC FTDI Set BaudRate = %lu, divisor = 0x%04x\n", baudrate, divisor);
 
   p_cdc->user_control_cb = complete_cb;
   _ftdi_requested_baud = baudrate;
@@ -1061,7 +1062,7 @@ static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, ui
   cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
   TU_VERIFY(p_cdc);
 
-  TU_LOG_CDCH("CP210x opened\r\n");
+  TU_LOG_DRV("CP210x opened\r\n");
   p_cdc->serial_drid = SERIAL_DRIVER_CP210X;
 
   // endpoint pair
@@ -1109,7 +1110,7 @@ static bool cp210x_ifc_enable(cdch_interface_t* p_cdc, uint16_t enabled, tuh_xfe
 }
 
 static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  TU_LOG_CDCH("CDC CP210x Set BaudRate = %lu\n", baudrate);
+  TU_LOG_DRV("CDC CP210x Set BaudRate = %lu\n", baudrate);
   uint32_t baud_le = tu_htole32(baudrate);
   p_cdc->user_control_cb = complete_cb;
   return cp210x_set_request(p_cdc, CP210X_SET_BAUDRATE, 0, (uint8_t *) &baud_le, 4,
@@ -1118,7 +1119,7 @@ static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_
 
 static bool cp210x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
-  TU_LOG_CDCH("CDC CP210x Set Control Line State\r\n");
+  TU_LOG_DRV("CDC CP210x Set Control Line State\r\n");
   p_cdc->user_control_cb = complete_cb;
   return cp210x_set_request(p_cdc, CP210X_SET_MHS, 0x0300 | line_state, NULL, 0,
                             complete_cb ? cdch_internal_control_complete : NULL, user_data);
diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c
index d95d3ef35..3a491937a 100644
--- a/src/class/hid/hid_host.c
+++ b/src/class/hid/hid_host.c
@@ -33,6 +33,10 @@
 
 #include "hid_host.h"
 
+// Debug level, TUSB_CFG_DEBUG must be at least this level for debug message
+#define HIDH_DEBUG   2
+#define TU_LOG_DRV(...)   TU_LOG(HIDH_DEBUG, __VA_ARGS__)
+
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
@@ -207,7 +211,7 @@ static void set_protocol_complete(tuh_xfer_t* xfer)
 
 static bool _hidh_set_protocol(uint8_t daddr, uint8_t itf_num, uint8_t protocol, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
-  TU_LOG2("HID Set Protocol = %d\r\n", protocol);
+  TU_LOG_DRV("HID Set Protocol = %d\r\n", protocol);
 
   tusb_control_request_t const request =
   {
@@ -246,7 +250,7 @@ bool tuh_hid_set_protocol(uint8_t daddr, uint8_t idx, uint8_t protocol)
 
 static void set_report_complete(tuh_xfer_t* xfer)
 {
-  TU_LOG2("HID Set Report complete\r\n");
+  TU_LOG_DRV("HID Set Report complete\r\n");
 
   if (tuh_hid_set_report_complete_cb)
   {
@@ -266,7 +270,7 @@ bool tuh_hid_set_report(uint8_t daddr, uint8_t idx, uint8_t report_id, uint8_t r
   hidh_interface_t* p_hid = get_hid_itf(daddr, idx);
   TU_VERIFY(p_hid);
 
-  TU_LOG2("HID Set Report: id = %u, type = %u, len = %u\r\n", report_id, report_type, len);
+  TU_LOG_DRV("HID Set Report: id = %u, type = %u, len = %u\r\n", report_id, report_type, len);
 
   tusb_control_request_t const request =
   {
@@ -298,7 +302,7 @@ bool tuh_hid_set_report(uint8_t daddr, uint8_t idx, uint8_t report_id, uint8_t r
 static bool _hidh_set_idle(uint8_t daddr, uint8_t itf_num, uint16_t idle_rate, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
   // SET IDLE request, device can stall if not support this request
-  TU_LOG2("HID Set Idle \r\n");
+  TU_LOG_DRV("HID Set Idle \r\n");
 
   tusb_control_request_t const request =
   {
@@ -367,7 +371,7 @@ bool tuh_hid_send_ready(uint8_t dev_addr, uint8_t idx)
 
 bool tuh_hid_send_report(uint8_t daddr, uint8_t idx, uint8_t report_id, const void* report, uint16_t len)
 {
-  TU_LOG2("HID Send Report %d\r\n", report_id);
+  TU_LOG_DRV("HID Send Report %d\r\n", report_id);
 
   hidh_interface_t* p_hid = get_hid_itf(daddr, idx);
   TU_VERIFY(p_hid);
@@ -430,7 +434,7 @@ bool hidh_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t result, uint32_t
 
   if ( dir == TUSB_DIR_IN )
   {
-    TU_LOG2("  Get Report callback (%u, %u)\r\n", daddr, idx);
+    TU_LOG_DRV("  Get Report callback (%u, %u)\r\n", daddr, idx);
     TU_LOG3_MEM(p_hid->epin_buf, xferred_bytes, 2);
     tuh_hid_report_received_cb(daddr, idx, p_hid->epin_buf, (uint16_t) xferred_bytes);
   }else
@@ -448,8 +452,9 @@ void hidh_close(uint8_t daddr)
     hidh_interface_t* p_hid = &_hidh_itf[i];
     if (p_hid->daddr == daddr)
     {
-       if(tuh_hid_umount_cb) tuh_hid_umount_cb(daddr, i);
-       p_hid->daddr = 0;
+      TU_LOG_DRV("  HIDh close addr = %u index = %u\r\n", daddr, i);
+      if(tuh_hid_umount_cb) tuh_hid_umount_cb(daddr, i);
+      p_hid->daddr = 0;
     }
   }
 }
@@ -465,7 +470,7 @@ bool hidh_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *desc_
 
   TU_VERIFY(TUSB_CLASS_HID == desc_itf->bInterfaceClass);
 
-  TU_LOG2("[%u] HID opening Interface %u\r\n", daddr, desc_itf->bInterfaceNumber);
+  TU_LOG_DRV("[%u] HID opening Interface %u\r\n", daddr, desc_itf->bInterfaceNumber);
 
   // len = interface + hid + n*endpoints
   uint16_t const drv_len = (uint16_t) (sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) +
@@ -592,7 +597,7 @@ static void process_set_config(tuh_xfer_t* xfer)
       // using usbh enumeration buffer since report descriptor can be very long
       if( p_hid->report_desc_len > CFG_TUH_ENUMERATION_BUFSIZE )
       {
-        TU_LOG2("HID Skip Report Descriptor since it is too large %u bytes\r\n", p_hid->report_desc_len);
+        TU_LOG_DRV("HID Skip Report Descriptor since it is too large %u bytes\r\n", p_hid->report_desc_len);
 
         // Driver is mounted without report descriptor
         config_driver_mount_complete(daddr, idx, NULL, 0);
@@ -763,7 +768,7 @@ uint8_t tuh_hid_parse_report_descriptor(tuh_hid_report_info_t* report_info_arr,
   for ( uint8_t i = 0; i < report_num; i++ )
   {
     info = report_info_arr+i;
-    TU_LOG2("%u: id = %u, usage_page = %u, usage = %u\r\n", i, info->report_id, info->usage_page, info->usage);
+    TU_LOG_DRV("%u: id = %u, usage_page = %u, usage = %u\r\n", i, info->report_id, info->usage_page, info->usage);
   }
 
   return report_num;
diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c
index 1b48813ec..138443de4 100644
--- a/src/class/msc/msc_host.c
+++ b/src/class/msc/msc_host.c
@@ -35,7 +35,6 @@
 
 // Debug level, TUSB_CFG_DEBUG must be at least this level for debug message
 #define MSCH_DEBUG   2
-
 #define TU_LOG_MSCH(...)   TU_LOG(MSCH_DEBUG, __VA_ARGS__)
 
 //--------------------------------------------------------------------+
@@ -82,6 +81,7 @@ CFG_TUH_MEM_SECTION static msch_interface_t _msch_itf[CFG_TUH_DEVICE_MAX];
 CFG_TUH_MEM_SECTION CFG_TUH_MEM_ALIGN
 static uint8_t _msch_buffer[sizeof(scsi_inquiry_resp_t)];
 
+// FIXME potential nul reference
 TU_ATTR_ALWAYS_INLINE
 static inline msch_interface_t* get_itf(uint8_t dev_addr)
 {
@@ -305,11 +305,15 @@ void msch_init(void)
 void msch_close(uint8_t dev_addr)
 {
   TU_VERIFY(dev_addr <= CFG_TUH_DEVICE_MAX, );
-
   msch_interface_t* p_msc = get_itf(dev_addr);
+  TU_VERIFY(p_msc->configured, );
+
+  TU_LOG_MSCH("  MSCh close addr = %d\r\n", dev_addr);
 
   // invoke Application Callback
-  if (p_msc->mounted && tuh_msc_umount_cb) tuh_msc_umount_cb(dev_addr);
+  if (p_msc->mounted) {
+    if(tuh_msc_umount_cb) tuh_msc_umount_cb(dev_addr);
+  }
 
   tu_memclr(p_msc, sizeof(msch_interface_t));
 }
diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h
index 82f682043..36507041f 100644
--- a/src/common/tusb_debug.h
+++ b/src/common/tusb_debug.h
@@ -46,6 +46,7 @@
 #if CFG_TUSB_DEBUG >= 2
 extern char const* const tu_str_speed[];
 extern char const* const tu_str_std_request[];
+extern char const* const tu_str_xfer_result[];
 #endif
 
 void tu_print_mem(void const *buf, uint32_t count, uint8_t indent);
diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c
index ea8eef285..2afe967b5 100644
--- a/src/device/usbd_control.c
+++ b/src/device/usbd_control.c
@@ -32,7 +32,10 @@
 #include "tusb.h"
 #include "device/usbd_pvt.h"
 
-#if CFG_TUSB_DEBUG >= 2
+// Debug level of USBD Control
+#define USBD_CONTROL_DEBUG   2
+
+#if CFG_TUSB_DEBUG >= USBD_CONTROL_DEBUG
 extern void usbd_driver_print_control_complete_name(usbd_control_xfer_cb_t callback);
 #endif
 
@@ -188,7 +191,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result
   {
     TU_VERIFY(_ctrl_xfer.buffer);
     memcpy(_ctrl_xfer.buffer, _usbd_ctrl_buf, xferred_bytes);
-    TU_LOG_MEM(2, _usbd_ctrl_buf, xferred_bytes, 2);
+    TU_LOG_MEM(USBD_CONTROL_DEBUG, _usbd_ctrl_buf, xferred_bytes, 2);
   }
 
   _ctrl_xfer.total_xferred += (uint16_t) xferred_bytes;
@@ -205,7 +208,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result
     // callback can still stall control in status phase e.g out data does not make sense
     if ( _ctrl_xfer.complete_cb )
     {
-      #if CFG_TUSB_DEBUG >= 2
+      #if CFG_TUSB_DEBUG >= USBD_CONTROL_DEBUG
       usbd_driver_print_control_complete_name(_ctrl_xfer.complete_cb);
       #endif
 
diff --git a/src/host/hub.c b/src/host/hub.c
index 386ad6aae..85bf22b3e 100644
--- a/src/host/hub.c
+++ b/src/host/hub.c
@@ -33,6 +33,10 @@
 #include "usbh_classdriver.h"
 #include "hub.h"
 
+// Debug level, TUSB_CFG_DEBUG must be at least this level for debug message
+#define HUB_DEBUG   2
+#define TU_LOG_DRV(...)   TU_LOG(HUB_DEBUG, __VA_ARGS__)
+
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
@@ -218,7 +222,10 @@ void hub_close(uint8_t dev_addr)
   TU_VERIFY(dev_addr > CFG_TUH_DEVICE_MAX, );
   hub_interface_t* p_hub = get_itf(dev_addr);
 
-  if (p_hub->ep_in) tu_memclr(p_hub, sizeof( hub_interface_t));
+  if (p_hub->ep_in) {
+    TU_LOG_DRV("  HUB close addr = %d\r\n", dev_addr);
+    tu_memclr(p_hub, sizeof( hub_interface_t));
+  }
 }
 
 bool hub_edpt_status_xfer(uint8_t dev_addr)
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 24ce47a7f..4cfc7c5c2 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -61,6 +61,8 @@ typedef struct
   uint8_t hub_addr;
   uint8_t hub_port;
   uint8_t speed;
+
+  // enumeration is in progress, done when all interfaces are configured
   volatile uint8_t enumerating;
 
 //  struct TU_ATTR_PACKED {
@@ -436,7 +438,8 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr)
         uint8_t const epnum   = tu_edpt_number(ep_addr);
         uint8_t const ep_dir  = tu_edpt_dir(ep_addr);
 
-        TU_LOG_USBH("on EP %02X with %u bytes\r\n", ep_addr, (unsigned int) event.xfer_complete.len);
+        TU_LOG_USBH("on EP %02X with %u bytes %s\r\n", ep_addr, (unsigned int) event.xfer_complete.len,
+                    tu_str_xfer_result[event.xfer_complete.result]);
 
         if (event.dev_addr == 0)
         {
@@ -866,6 +869,10 @@ TU_ATTR_FAST_FUNC void hcd_event_handler(hcd_event_t const* event, bool in_isr)
 {
   switch (event->event_id)
   {
+//    case HCD_EVENT_DEVICE_REMOVE:
+//
+//      break;
+
     default:
       osal_queue_send(_usbh_q, event, in_isr);
     break;
@@ -1128,30 +1135,28 @@ static void process_device_unplugged(uint8_t rhport, uint8_t hub_addr, uint8_t h
     usbh_device_t* dev = &_usbh_devices[dev_id];
     uint8_t const dev_addr = dev_id+1;
 
-    // TODO Hub multiple level
     if (dev->rhport == rhport   &&
         (hub_addr == 0 || dev->hub_addr == hub_addr) && // hub_addr = 0 means roothub
         (hub_port == 0 || dev->hub_port == hub_port) && // hub_port = 0 means all devices of downstream hub
         dev->connected)
     {
-      TU_LOG_USBH("  Address = %u\r\n", dev_addr);
+      TU_LOG_USBH("Device unplugged address = %u\r\n", dev_addr);
 
       if (is_hub_addr(dev_addr))
       {
-        TU_LOG(USBH_DEBUG, "HUB address = %u is unmounted\r\n", dev_addr);
+        TU_LOG(USBH_DEBUG, "  is a HUB device\r\n", dev_addr);
         // If the device itself is a usb hub, unplug downstream devices.
         // FIXME un-roll recursive calls to prevent potential stack overflow
         process_device_unplugged(rhport, dev_addr, 0);
       }else
       {
-        // Invoke callback before closing driver
+        // Invoke callback before closing driver (maybe call it later ?)
         if (tuh_umount_cb) tuh_umount_cb(dev_addr);
       }
 
       // Close class driver
       for (uint8_t drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++)
       {
-        TU_LOG_USBH("%s close\r\n", usbh_class_drivers[drv_id].name);
         usbh_class_drivers[drv_id].close(dev_addr);
       }
 
@@ -1449,6 +1454,7 @@ static uint8_t get_new_address(bool is_hub)
 {
   uint8_t start;
   uint8_t end;
+
   if ( is_hub )
   {
     start = CFG_TUH_DEVICE_MAX;
@@ -1459,7 +1465,7 @@ static uint8_t get_new_address(bool is_hub)
     end   = start + CFG_TUH_DEVICE_MAX;
   }
 
-  for ( uint8_t idx = start; idx < end; idx++)
+  for (uint8_t idx = start; idx < end; idx++)
   {
     if (!_usbh_devices[idx].connected) return (idx+1);
   }
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 494e2e50f..69e59ce65 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -142,8 +142,11 @@ static inline ehci_qhd_t* qhd_get_from_addr (uint8_t dev_addr, uint8_t ep_addr);
 // determine if a queue head has bus-related error
 static inline bool qhd_has_xact_error (ehci_qhd_t * p_qhd)
 {
-  return (p_qhd->qtd_overlay.buffer_err || p_qhd->qtd_overlay.babble_err || p_qhd->qtd_overlay.xact_err);
-  //p_qhd->qtd_overlay.non_hs_period_missed_uframe || p_qhd->qtd_overlay.pingstate_err TODO split transaction error
+  volatile ehci_qtd_t *qtd_overlay = &p_qhd->qtd_overlay;
+
+  // Error count = 0 often occurs when device disconnected
+  return (qtd_overlay->err_count == 0 || qtd_overlay->buffer_err || qtd_overlay->babble_err || qtd_overlay->xact_err);
+  //qtd_overlay->non_hs_period_missed_uframe || qtd_overlay->pingstate_err TODO split transaction error
 }
 
 static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);
@@ -630,7 +633,9 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd)
 
     p_qhd->total_xferred_bytes += p_qhd->p_qtd_list_head->expected_bytes - p_qhd->p_qtd_list_head->total_bytes;
 
-//    if ( XFER_RESULT_FAILED == error_event )    TU_BREAKPOINT(); // TODO skip unplugged device
+//    if ( XFER_RESULT_FAILED == error_event ) {
+//      TU_BREAKPOINT(); // TODO skip unplugged device
+//    }
 
     p_qhd->p_qtd_list_head->used = 0; // free QTD
     qtd_remove_1st_from_qhd(p_qhd);
diff --git a/src/tusb.c b/src/tusb.c
index 85fe5a3cc..7327db685 100644
--- a/src/tusb.c
+++ b/src/tusb.c
@@ -439,6 +439,10 @@ char const* const tu_str_std_request[] =
   "Synch Frame"
 };
 
+char const* const tu_str_xfer_result[] = {
+    "OK", "Failed", "Stalled", "Timeout"
+};
+
 #endif
 
 static void dump_str_line(uint8_t const* buf, uint16_t count)

From 1c4f22a54cf60e6221995f9b64e2e765fd0a5bfe Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 11 May 2023 22:18:40 +0700
Subject: [PATCH 326/691] EHCI: fix xfer failed with disconnected device as
 stalled

- change CFG_TUH_ENDPOINT_MAX to 16 (max endpoint pair per device) if
not defined
- change QHD_MAX for EHCI, should be user configurable and more
optimized in the future
---
 examples/host/cdc_msc_hid/src/hid_app.c |  2 +-
 hw/bsp/imxrt/family.c                   |  5 ++-
 src/class/hid/hid_host.c                |  2 +-
 src/host/hcd.h                          |  4 ++-
 src/portable/ehci/ehci.c                | 48 ++++++++++---------------
 5 files changed, 27 insertions(+), 34 deletions(-)

diff --git a/examples/host/cdc_msc_hid/src/hid_app.c b/examples/host/cdc_msc_hid/src/hid_app.c
index ed53c502d..87e110ab2 100644
--- a/examples/host/cdc_msc_hid/src/hid_app.c
+++ b/examples/host/cdc_msc_hid/src/hid_app.c
@@ -263,7 +263,7 @@ static void process_generic_report(uint8_t dev_addr, uint8_t instance, uint8_t c
 
   if (!rpt_info)
   {
-    printf("Couldn't find the report info for this report !\r\n");
+    printf("Couldn't find report info !\r\n");
     return;
   }
 
diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c
index 52d3bb91b..46adabf0a 100644
--- a/hw/bsp/imxrt/family.c
+++ b/hw/bsp/imxrt/family.c
@@ -131,7 +131,10 @@ void board_init(void)
     freq = CLOCK_GetOscFreq() / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
   }
 
-  LPUART_Init(UART_PORT, &uart_config, freq);
+  if ( kStatus_Success != LPUART_Init(UART_PORT, &uart_config, freq) ) {
+    // failed to init uart, probably baudrate is not supported
+    // TU_BREAKPOINT();
+  }
 
   //------------- USB -------------//
   // Note: RT105x RT106x and later have dual USB controllers.
diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c
index 3a491937a..6abe298e5 100644
--- a/src/class/hid/hid_host.c
+++ b/src/class/hid/hid_host.c
@@ -72,7 +72,7 @@ tu_static hidh_interface_t _hidh_itf[CFG_TUH_HID];
 TU_ATTR_ALWAYS_INLINE static inline
 hidh_interface_t* get_hid_itf(uint8_t daddr, uint8_t idx)
 {
-  TU_ASSERT(daddr && idx < CFG_TUH_HID, NULL);
+  TU_ASSERT(daddr > 0 && idx < CFG_TUH_HID, NULL);
   hidh_interface_t* p_hid = &_hidh_itf[idx];
   return (p_hid->daddr == daddr) ? p_hid : NULL;
 }
diff --git a/src/host/hcd.h b/src/host/hcd.h
index 623c12a12..f4e76f9ef 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -39,8 +39,10 @@
 // Configuration
 //--------------------------------------------------------------------+
 
+// Max number of endpoints per device
+// TODO optimize memory usage
 #ifndef CFG_TUH_ENDPOINT_MAX
-  #define CFG_TUH_ENDPOINT_MAX   (CFG_TUH_HUB + CFG_TUH_HID*2 + CFG_TUH_MSC*2 + CFG_TUH_CDC*3)
+  #define CFG_TUH_ENDPOINT_MAX   16
 //  #ifdef TUP_HCD_ENDPOINT_MAX
 //    #define CFG_TUH_ENDPPOINT_MAX   TUP_HCD_ENDPOINT_MAX
 //  #else
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 69e59ce65..080ee9bbc 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -58,7 +58,8 @@
 
 #define FRAMELIST_SIZE                  (1024 >> FRAMELIST_SIZE_BIT_VALUE)
 
-#define QHD_MAX      (CFG_TUH_DEVICE_MAX*CFG_TUH_ENDPOINT_MAX)
+// Total queue head pool. TODO should be user configurable and more optimize memory usage in the future
+#define QHD_MAX      (CFG_TUH_DEVICE_MAX*CFG_TUH_ENDPOINT_MAX + CFG_TUH_HUB)
 #define QTD_MAX      QHD_MAX
 
 typedef struct
@@ -138,17 +139,6 @@ static inline ehci_qtd_t* qtd_control(uint8_t dev_addr)
 static inline ehci_qhd_t* qhd_next (ehci_qhd_t const * p_qhd);
 static inline ehci_qhd_t* qhd_find_free (void);
 static inline ehci_qhd_t* qhd_get_from_addr (uint8_t dev_addr, uint8_t ep_addr);
-
-// determine if a queue head has bus-related error
-static inline bool qhd_has_xact_error (ehci_qhd_t * p_qhd)
-{
-  volatile ehci_qtd_t *qtd_overlay = &p_qhd->qtd_overlay;
-
-  // Error count = 0 often occurs when device disconnected
-  return (qtd_overlay->err_count == 0 || qtd_overlay->buffer_err || qtd_overlay->babble_err || qtd_overlay->xact_err);
-  //qtd_overlay->non_hs_period_missed_uframe || qtd_overlay->pingstate_err TODO split transaction error
-}
-
 static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);
 
 static inline ehci_qtd_t* qtd_find_free (void);
@@ -392,15 +382,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
   TU_ASSERT (ep_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS);
 
   //------------- Prepare Queue Head -------------//
-  ehci_qhd_t * p_qhd;
-
-  if ( ep_desc->bEndpointAddress == 0 )
-  {
-    p_qhd = qhd_control(dev_addr);
-  }else
-  {
-    p_qhd = qhd_find_free();
-  }
+  ehci_qhd_t *p_qhd = (ep_desc->bEndpointAddress == 0) ? qhd_control(dev_addr) : qhd_find_free();
   TU_ASSERT(p_qhd);
 
   qhd_init(p_qhd, dev_addr, ep_desc);
@@ -622,18 +604,23 @@ static void period_list_xfer_complete_isr(uint8_t hostid, uint32_t interval_ms)
 
 static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd)
 {
-  if ( (p_qhd->dev_addr != 0 && p_qhd->qtd_overlay.halted) || // addr0 cannot be protocol STALL
-        qhd_has_xact_error(p_qhd) )
-  {
-    // current qhd has error in transaction
-    xfer_result_t error_event;
+  volatile ehci_qtd_t *qtd_overlay = &p_qhd->qtd_overlay;
 
-    // no error bits are set, endpoint is halted due to STALL
-    error_event = qhd_has_xact_error(p_qhd) ? XFER_RESULT_FAILED : XFER_RESULT_STALLED;
+  // TD has error
+  if (qtd_overlay->halted) {
+    xfer_result_t xfer_result;
+
+    if (qtd_overlay->err_count == 0 || qtd_overlay->buffer_err || qtd_overlay->babble_err || qtd_overlay->xact_err) {
+      // Error count = 0 often occurs when device disconnected, or other bus-related error
+      xfer_result = XFER_RESULT_FAILED;
+    }else {
+      // no error bits are set, endpoint is halted due to STALL
+      xfer_result = XFER_RESULT_STALLED;
+    }
 
     p_qhd->total_xferred_bytes += p_qhd->p_qtd_list_head->expected_bytes - p_qhd->p_qtd_list_head->total_bytes;
 
-//    if ( XFER_RESULT_FAILED == error_event ) {
+//    if (XFER_RESULT_FAILED == xfer_result ) {
 //      TU_BREAKPOINT(); // TODO skip unplugged device
 //    }
 
@@ -655,7 +642,8 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd)
     }
 
     // call USBH callback
-    hcd_event_xfer_complete(p_qhd->dev_addr, tu_edpt_addr(p_qhd->ep_number, p_qhd->pid == EHCI_PID_IN ? 1 : 0), p_qhd->total_xferred_bytes, error_event, true);
+    uint8_t const ep_addr = tu_edpt_addr(p_qhd->ep_number, p_qhd->pid == EHCI_PID_IN ? 1 : 0);
+    hcd_event_xfer_complete(p_qhd->dev_addr, ep_addr, p_qhd->total_xferred_bytes, xfer_result, true);
 
     p_qhd->total_xferred_bytes = 0;
   }

From 2c48050993777c586210af503504e612f31228d8 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 11 May 2023 22:21:18 +0700
Subject: [PATCH 327/691] add various check for disconncted device, also fix
 #1511 un-roll recursive hub removal with usbh queue

---
 src/host/usbh.c | 124 ++++++++++++++++++++++++++++++++----------------
 1 file changed, 82 insertions(+), 42 deletions(-)

diff --git a/src/host/usbh.c b/src/host/usbh.c
index 4cfc7c5c2..c56ff9459 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -81,10 +81,12 @@ typedef struct {
 
   // Device State
   struct TU_ATTR_PACKED {
-    volatile uint8_t connected  : 1;
-    volatile uint8_t addressed  : 1;
-    volatile uint8_t configured : 1;
-    volatile uint8_t suspended  : 1;
+    volatile uint8_t connected  : 1; // After 1st transfer
+    volatile uint8_t addressed  : 1; // After SET_ADDR
+    volatile uint8_t configured : 1; // After SET_CONFIG and all drivers are configured
+    volatile uint8_t suspended  : 1; // Bus suspended
+
+    // volatile uint8_t removing : 1; // Physically disconnected, waiting to be processed by usbh
   };
 
   // Device Descriptor
@@ -248,7 +250,7 @@ static inline usbh_device_t* get_device(uint8_t dev_addr)
 }
 
 static bool enum_new_device(hcd_event_t* event);
-static void process_device_unplugged(uint8_t rhport, uint8_t hub_addr, uint8_t hub_port);
+static void process_removing_device(uint8_t rhport, uint8_t hub_addr, uint8_t hub_port);
 static bool usbh_edpt_control_open(uint8_t dev_addr, uint8_t max_packet_size);
 static bool usbh_control_xfer_cb (uint8_t daddr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
 
@@ -420,7 +422,7 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr)
 
       case HCD_EVENT_DEVICE_REMOVE:
         TU_LOG_USBH("[%u:%u:%u] USBH DEVICE REMOVED\r\n", event.rhport, event.connection.hub_addr, event.connection.hub_port);
-        process_device_unplugged(event.rhport, event.connection.hub_addr, event.connection.hub_port);
+        process_removing_device(event.rhport, event.connection.hub_addr, event.connection.hub_port);
 
         #if CFG_TUH_HUB
         // TODO remove
@@ -450,7 +452,7 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr)
         else
         {
           usbh_device_t* dev = get_device(event.dev_addr);
-          TU_ASSERT(dev, );
+          TU_VERIFY(dev && dev->connected, );
 
           dev->ep_status[epnum][ep_dir].busy    = 0;
           dev->ep_status[epnum][ep_dir].claimed = 0;
@@ -739,29 +741,33 @@ void usbh_int_set(bool enabled)
 // TODO has some duplication code with device, refactor later
 bool usbh_edpt_claim(uint8_t dev_addr, uint8_t ep_addr)
 {
+  // Note: addr0 only use tuh_control_xfer
   usbh_device_t* dev = get_device(dev_addr);
-
-  // addr0 only use tuh_control_xfer
-  TU_ASSERT(dev);
+  TU_ASSERT(dev && dev->connected);
 
   uint8_t const epnum = tu_edpt_number(ep_addr);
   uint8_t const dir   = tu_edpt_dir(ep_addr);
 
-  return tu_edpt_claim(&dev->ep_status[epnum][dir], _usbh_mutex);
+  TU_VERIFY(tu_edpt_claim(&dev->ep_status[epnum][dir], _usbh_mutex));
+  TU_LOG_USBH("[%u] Claimed EP 0x%02x\r\n", dev_addr, ep_addr);
+
+  return true;
 }
 
 // TODO has some duplication code with device, refactor later
 bool usbh_edpt_release(uint8_t dev_addr, uint8_t ep_addr)
 {
+  // Note: addr0 only use tuh_control_xfer
   usbh_device_t* dev = get_device(dev_addr);
-
-  // addr0 only use tuh_control_xfer
-  TU_ASSERT(dev);
+  TU_VERIFY(dev && dev->connected);
 
   uint8_t const epnum = tu_edpt_number(ep_addr);
   uint8_t const dir   = tu_edpt_dir(ep_addr);
 
-  return tu_edpt_release(&dev->ep_status[epnum][dir], _usbh_mutex);
+  TU_VERIFY(tu_edpt_release(&dev->ep_status[epnum][dir], _usbh_mutex));
+  TU_LOG_USBH("[%u] Released EP 0x%02x\r\n", dev_addr, ep_addr);
+
+  return true;
 }
 
 // TODO has some duplication code with device, refactor later
@@ -870,7 +876,7 @@ TU_ATTR_FAST_FUNC void hcd_event_handler(hcd_event_t const* event, bool in_isr)
   switch (event->event_id)
   {
 //    case HCD_EVENT_DEVICE_REMOVE:
-//
+//      // mark device as removing to prevent further xfer before the event is processed in usbh task
 //      break;
 
     default:
@@ -1116,7 +1122,7 @@ uint8_t tuh_descriptor_get_serial_string_sync(uint8_t daddr, uint16_t language_i
 }
 
 //--------------------------------------------------------------------+
-//
+// Detaching
 //--------------------------------------------------------------------+
 
 TU_ATTR_ALWAYS_INLINE
@@ -1125,45 +1131,79 @@ static inline bool is_hub_addr(uint8_t daddr)
   return (CFG_TUH_HUB > 0) && (daddr > CFG_TUH_DEVICE_MAX);
 }
 
+//static void mark_removing_device_isr(uint8_t rhport, uint8_t hub_addr, uint8_t hub_port) {
+//  for (uint8_t dev_id = 0; dev_id < TOTAL_DEVICES; dev_id++) {
+//    usbh_device_t *dev = &_usbh_devices[dev_id];
+//    uint8_t const daddr = dev_id + 1;
+//
+//    // hub_addr = 0 means roothub, hub_port = 0 means all devices of downstream hub
+//    if (dev->rhport == rhport && dev->connected &&
+//        (hub_addr == 0 || dev->hub_addr == hub_addr) &&
+//        (hub_port == 0 || dev->hub_port == hub_port)) {
+//      if (is_hub_addr(daddr)) {
+//        // If the device itself is a usb hub, mark all downstream devices.
+//        // FIXME recursive calls
+//        mark_removing_device_isr(rhport, daddr, 0);
+//      }
+//
+//      dev->removing = 1;
+//    }
+//  }
+//}
+
 // a device unplugged from rhport:hub_addr:hub_port
-static void process_device_unplugged(uint8_t rhport, uint8_t hub_addr, uint8_t hub_port)
+static void process_removing_device(uint8_t rhport, uint8_t hub_addr, uint8_t hub_port)
 {
   //------------- find the all devices (star-network) under port that is unplugged -------------//
   // TODO mark as disconnected in ISR, also handle dev0
-  for ( uint8_t dev_id = 0; dev_id < TU_ARRAY_SIZE(_usbh_devices); dev_id++ )
-  {
-    usbh_device_t* dev = &_usbh_devices[dev_id];
-    uint8_t const dev_addr = dev_id+1;
 
-    if (dev->rhport == rhport   &&
-        (hub_addr == 0 || dev->hub_addr == hub_addr) && // hub_addr = 0 means roothub
-        (hub_port == 0 || dev->hub_port == hub_port) && // hub_port = 0 means all devices of downstream hub
-        dev->connected)
-    {
-      TU_LOG_USBH("Device unplugged address = %u\r\n", dev_addr);
+#if 0
+  // index as hub addr, value is hub port (0xFF for invalid)
+  uint8_t removing_hubs[CFG_TUH_HUB];
+  memset(removing_hubs, TUSB_INDEX_INVALID_8, sizeof(removing_hubs));
 
-      if (is_hub_addr(dev_addr))
-      {
-        TU_LOG(USBH_DEBUG, "  is a HUB device\r\n", dev_addr);
-        // If the device itself is a usb hub, unplug downstream devices.
-        // FIXME un-roll recursive calls to prevent potential stack overflow
-        process_device_unplugged(rhport, dev_addr, 0);
-      }else
-      {
+  removing_hubs[hub_addr-CFG_TUH_DEVICE_MAX] = hub_port;
+
+  // consecutive non-removing hub
+  uint8_t nop_count = 0;
+#endif
+
+  for (uint8_t dev_id = 0; dev_id < TOTAL_DEVICES; dev_id++) {
+    usbh_device_t *dev = &_usbh_devices[dev_id];
+    uint8_t const daddr = dev_id + 1;
+
+    // hub_addr = 0 means roothub, hub_port = 0 means all devices of downstream hub
+    if (dev->rhport == rhport && dev->connected &&
+        (hub_addr == 0 || dev->hub_addr == hub_addr) &&
+        (hub_port == 0 || dev->hub_port == hub_port)) {
+      TU_LOG_USBH("Device unplugged address = %u\r\n", daddr);
+
+      if (is_hub_addr(daddr)) {
+        TU_LOG(USBH_DEBUG, "  is a HUB device\r\n", daddr);
+
+        // Submit removed event If the device itself is a hub (un-rolled recursive)
+        // TODO a better to unroll recursrive is using array of removing_hubs and mark it here
+        hcd_event_t event;
+        event.rhport = rhport;
+        event.event_id = HCD_EVENT_DEVICE_REMOVE;
+        event.connection.hub_addr = daddr;
+        event.connection.hub_port = 0;
+
+        hcd_event_handler(&event, false);
+      } else {
         // Invoke callback before closing driver (maybe call it later ?)
-        if (tuh_umount_cb) tuh_umount_cb(dev_addr);
+        if (tuh_umount_cb) tuh_umount_cb(daddr);
       }
 
       // Close class driver
-      for (uint8_t drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++)
-      {
-        usbh_class_drivers[drv_id].close(dev_addr);
+      for (uint8_t drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++) {
+        usbh_class_drivers[drv_id].close(daddr);
       }
 
-      hcd_device_close(rhport, dev_addr);
+      hcd_device_close(rhport, daddr);
       clear_device(dev);
       // abort on-going control xfer if any
-      if (_ctrl_xfer.daddr == dev_addr) _set_control_xfer_stage(CONTROL_STAGE_IDLE);
+      if (_ctrl_xfer.daddr == daddr) _set_control_xfer_stage(CONTROL_STAGE_IDLE);
     }
   }
 }

From 1e998ce3bd1ecdf535a8a9feb6823627f3cf7c14 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 12 May 2023 10:58:42 +0700
Subject: [PATCH 328/691] usbd: fix control transfer issue for chipidea hs when
 previous status and new setup complete in the same isr frame

change usbd edpt busy/stalled/claimed value to 0/1 instead of
(true/false) since they are 1-bit field.
---
 .idea/runConfigurations/rt1010.xml         | 10 ------
 .idea/runConfigurations/rt1010_nxplink.xml | 10 ++++++
 src/device/usbd.c                          | 39 +++++++++++-----------
 src/portable/chipidea/ci_hs/dcd_ci_hs.c    | 18 +++++-----
 4 files changed, 39 insertions(+), 38 deletions(-)
 delete mode 100644 .idea/runConfigurations/rt1010.xml
 create mode 100644 .idea/runConfigurations/rt1010_nxplink.xml

diff --git a/.idea/runConfigurations/rt1010.xml b/.idea/runConfigurations/rt1010.xml
deleted file mode 100644
index 700cb5732..000000000
--- a/.idea/runConfigurations/rt1010.xml
+++ /dev/null
@@ -1,10 +0,0 @@
-<component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rt1010" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="gdbserver -p 55503 -t mimxrt1010" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="rt1060 evk" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
-    <custom-gdb-server version="1" gdb-connect="tcp::55503" executable="$USER_HOME$/.local/bin/pyocd" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
-      <debugger kind="GDB" isBundled="true" />
-    </custom-gdb-server>
-    <method v="2">
-      <option name="CLION.COMPOUND.BUILD" enabled="true" />
-    </method>
-  </configuration>
-</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/rt1010_nxplink.xml b/.idea/runConfigurations/rt1010_nxplink.xml
new file mode 100644
index 000000000..cf3bf842f
--- /dev/null
+++ b/.idea/runConfigurations/rt1010_nxplink.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="rt1010 nxplink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="gdbserver --gdb-port 55503 --semihost-port -1 MIMXRT1011xxxxx:EVK-MIMXRT1010" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="host_hid_to_device_cdc" TARGET_NAME="host_hid_to_device_cdc" CONFIG_NAME="rt1060 evk" version="1" RUN_TARGET_PROJECT_NAME="host_hid_to_device_cdc" RUN_TARGET_NAME="host_hid_to_device_cdc">
+    <custom-gdb-server version="1" gdb-connect="tcp::55503" executable="/usr/local/LinkServer/LinkServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/src/device/usbd.c b/src/device/usbd.c
index cee56af60..409a5ec10 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -516,9 +516,9 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr)
         _usbd_dev.connected = 1;
 
         // mark both in & out control as free
-        _usbd_dev.ep_status[0][TUSB_DIR_OUT].busy = false;
+        _usbd_dev.ep_status[0][TUSB_DIR_OUT].busy = 0;
         _usbd_dev.ep_status[0][TUSB_DIR_OUT].claimed = 0;
-        _usbd_dev.ep_status[0][TUSB_DIR_IN ].busy = false;
+        _usbd_dev.ep_status[0][TUSB_DIR_IN ].busy = 0;
         _usbd_dev.ep_status[0][TUSB_DIR_IN ].claimed = 0;
 
         // Process control request
@@ -540,12 +540,13 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr)
 
         TU_LOG(USBD_DBG, "on EP %02X with %u bytes\r\n", ep_addr, (unsigned int) event.xfer_complete.len);
 
-        _usbd_dev.ep_status[epnum][ep_dir].busy = false;
+        _usbd_dev.ep_status[epnum][ep_dir].busy = 0;
         _usbd_dev.ep_status[epnum][ep_dir].claimed = 0;
 
         if ( 0 == epnum )
         {
-          usbd_control_xfer_cb(event.rhport, ep_addr, (xfer_result_t)event.xfer_complete.result, event.xfer_complete.len);
+          usbd_control_xfer_cb(event.rhport, ep_addr, (xfer_result_t) event.xfer_complete.result, event.xfer_complete
+          .len);
         }
         else
         {
@@ -553,7 +554,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr)
           TU_ASSERT(driver, );
 
           TU_LOG(USBD_DBG, "  %s xfer callback\r\n", driver->name);
-          driver->xfer_cb(event.rhport, ep_addr, (xfer_result_t)event.xfer_complete.result, event.xfer_complete.len);
+          driver->xfer_cb(event.rhport, ep_addr, (xfer_result_t) event.xfer_complete.result, event.xfer_complete.len);
         }
       }
       break;
@@ -1244,7 +1245,7 @@ bool usbd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
 
   // Set busy first since the actual transfer can be complete before dcd_edpt_xfer()
   // could return and USBD task can preempt and clear the busy
-  _usbd_dev.ep_status[epnum][dir].busy = true;
+  _usbd_dev.ep_status[epnum][dir].busy = 1;
 
   if ( dcd_edpt_xfer(rhport, ep_addr, buffer, total_bytes) )
   {
@@ -1252,7 +1253,7 @@ bool usbd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
   }else
   {
     // DCD error, mark endpoint as ready to allow next transfer
-    _usbd_dev.ep_status[epnum][dir].busy = false;
+    _usbd_dev.ep_status[epnum][dir].busy = 0;
     _usbd_dev.ep_status[epnum][dir].claimed = 0;
     TU_LOG(USBD_DBG, "FAILED\r\n");
     TU_BREAKPOINT();
@@ -1278,7 +1279,7 @@ bool usbd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16
 
   // Set busy first since the actual transfer can be complete before dcd_edpt_xfer() could return
   // and usbd task can preempt and clear the busy
-  _usbd_dev.ep_status[epnum][dir].busy = true;
+  _usbd_dev.ep_status[epnum][dir].busy = 1;
 
   if (dcd_edpt_xfer_fifo(rhport, ep_addr, ff, total_bytes))
   {
@@ -1287,7 +1288,7 @@ bool usbd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16
   }else
   {
     // DCD error, mark endpoint as ready to allow next transfer
-    _usbd_dev.ep_status[epnum][dir].busy = false;
+    _usbd_dev.ep_status[epnum][dir].busy = 0;
     _usbd_dev.ep_status[epnum][dir].claimed = 0;
     TU_LOG(USBD_DBG, "failed\r\n");
     TU_BREAKPOINT();
@@ -1317,8 +1318,8 @@ void usbd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
   {
     TU_LOG(USBD_DBG, "    Stall EP %02X\r\n", ep_addr);
     dcd_edpt_stall(rhport, ep_addr);
-    _usbd_dev.ep_status[epnum][dir].stalled = true;
-    _usbd_dev.ep_status[epnum][dir].busy = true;
+    _usbd_dev.ep_status[epnum][dir].stalled = 1;
+    _usbd_dev.ep_status[epnum][dir].busy = 1;
   }
 }
 
@@ -1334,8 +1335,8 @@ void usbd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
   {
     TU_LOG(USBD_DBG, "    Clear Stall EP %02X\r\n", ep_addr);
     dcd_edpt_clear_stall(rhport, ep_addr);
-    _usbd_dev.ep_status[epnum][dir].stalled = false;
-    _usbd_dev.ep_status[epnum][dir].busy = false;
+    _usbd_dev.ep_status[epnum][dir].stalled = 0;
+    _usbd_dev.ep_status[epnum][dir].busy = 0;
   }
 }
 
@@ -1366,9 +1367,9 @@ void usbd_edpt_close(uint8_t rhport, uint8_t ep_addr)
   uint8_t const dir   = tu_edpt_dir(ep_addr);
 
   dcd_edpt_close(rhport, ep_addr);
-  _usbd_dev.ep_status[epnum][dir].stalled = false;
-  _usbd_dev.ep_status[epnum][dir].busy = false;
-  _usbd_dev.ep_status[epnum][dir].claimed = false;
+  _usbd_dev.ep_status[epnum][dir].stalled = 0;
+  _usbd_dev.ep_status[epnum][dir].busy = 0;
+  _usbd_dev.ep_status[epnum][dir].claimed = 0;
 
   return;
 }
@@ -1403,9 +1404,9 @@ bool usbd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep
   TU_ASSERT(epnum < CFG_TUD_ENDPPOINT_MAX);
   TU_ASSERT(tu_edpt_validate(desc_ep, (tusb_speed_t) _usbd_dev.speed));
 
-  _usbd_dev.ep_status[epnum][dir].stalled = false;
-  _usbd_dev.ep_status[epnum][dir].busy = false;
-  _usbd_dev.ep_status[epnum][dir].claimed = false;
+  _usbd_dev.ep_status[epnum][dir].stalled = 0;
+  _usbd_dev.ep_status[epnum][dir].busy = 0;
+  _usbd_dev.ep_status[epnum][dir].claimed = 0;
   return dcd_edpt_iso_activate(rhport, desc_ep);
 }
 
diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
index bc6736cf2..9be79a2f1 100644
--- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
@@ -616,15 +616,6 @@ void dcd_int_handler(uint8_t rhport)
     uint32_t const edpt_complete = dcd_reg->ENDPTCOMPLETE;
     dcd_reg->ENDPTCOMPLETE = edpt_complete; // acknowledge
 
-    if (dcd_reg->ENDPTSETUPSTAT)
-    {
-      //------------- Set up Received -------------//
-      // 23.10.10.2 Operational model for setup transfers
-      dcd_reg->ENDPTSETUPSTAT = dcd_reg->ENDPTSETUPSTAT;
-
-      dcd_event_setup_received(rhport, (uint8_t*)(uintptr_t) &_dcd_data.qhd[0][0].setup_request, true);
-    }
-
     // 23.10.12.3 Failed QTD also get ENDPTCOMPLETE set
     // nothing to do, we will submit xfer as error to usbd
     // if (int_status & INTR_ERROR) { }
@@ -637,6 +628,15 @@ void dcd_int_handler(uint8_t rhport)
         if ( tu_bit_test(edpt_complete, epnum+16) ) process_edpt_complete_isr(rhport, epnum, TUSB_DIR_IN);
       }
     }
+
+    // Set up Received
+    // 23.10.10.2 Operational model for setup transfers
+    // Must be after normal transfer complete since it is possible to have both previous control status + new setup
+    // in the same frame and we should handle previous status first.
+    if (dcd_reg->ENDPTSETUPSTAT) {
+      dcd_reg->ENDPTSETUPSTAT = dcd_reg->ENDPTSETUPSTAT;
+      dcd_event_setup_received(rhport, (uint8_t *) (uintptr_t) &_dcd_data.qhd[0][0].setup_request, true);
+    }
   }
 
   if (int_status & INTR_SOF)

From a9aa0e3a1a9323df16c91d7705aad480033f962a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 13 May 2023 13:20:09 +0700
Subject: [PATCH 329/691] fix error on EHCI causes xfer error in non-queued qhd
 which cause memory fault

---
 .idea/cmake.xml                               |  2 +
 .../host_hid_to_device_cdc/src/tusb_config.h  |  6 +--
 src/portable/ehci/ehci.c                      | 44 ++++++++++++++-----
 src/portable/ehci/ehci.h                      |  2 +-
 4 files changed, 36 insertions(+), 18 deletions(-)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index bbef86164..7dacd0003 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -2,6 +2,7 @@
 <project version="4">
   <component name="CMakeSharedSettings">
     <configurations>
+      <configuration PROFILE_NAME="rt1060 evk" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1060_evk" />
       <configuration PROFILE_NAME="pca10095" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10095" BUILD_OPTIONS="-v" />
       <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10056" BUILD_OPTIONS="-v" />
       <configuration PROFILE_NAME="lpc55s69" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc55 -DBOARD=lpcxpresso55s69" />
@@ -27,6 +28,7 @@
       </configuration>
       <configuration PROFILE_NAME="rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=rp2040 -DBOARD=raspberry_pi_pico" />
       <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1010_evk" />
+      <configuration PROFILE_NAME="rt1064 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1064_evk" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/examples/dual/host_hid_to_device_cdc/src/tusb_config.h b/examples/dual/host_hid_to_device_cdc/src/tusb_config.h
index 2185cd1f1..8133ed418 100644
--- a/examples/dual/host_hid_to_device_cdc/src/tusb_config.h
+++ b/examples/dual/host_hid_to_device_cdc/src/tusb_config.h
@@ -84,10 +84,6 @@
 #define CFG_TUH_RPI_PIO_USB   1
 #endif
 
-
-// CFG_TUSB_DEBUG is defined by compiler in DEBUG build
-// #define CFG_TUSB_DEBUG           0
-
 /* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
  * Tinyusb use follows macros to declare transferring memory so that they can be put
  * into those specific section.
@@ -133,7 +129,7 @@
 #endif
 
 #ifndef CFG_TUH_MEM_ALIGN
-#define CFG_TUH_MEM_ALIGN        __attribute__ ((aligned(4)))
+#define CFG_TUH_MEM_ALIGN           __attribute__ ((aligned(4)))
 #endif
 
 #define CFG_TUH_HUB                 1
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 080ee9bbc..8203b0f06 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -93,16 +93,30 @@ CFG_TUH_MEM_SECTION TU_ATTR_ALIGNED(4096) static ehci_data_t ehci_data;
 // Debug
 //--------------------------------------------------------------------+
 #if CFG_TUSB_DEBUG >= EHCI_DBG
-static inline void print_portsc(ehci_registers_t* regs)
-{
+static inline void print_portsc(ehci_registers_t* regs) {
   TU_LOG_HEX(EHCI_DBG, regs->portsc);
-  TU_LOG(EHCI_DBG, "  Current Connect Status: %u\r\n", regs->portsc_bm.current_connect_status);
-  TU_LOG(EHCI_DBG, "  Connect Status Change : %u\r\n", regs->portsc_bm.connect_status_change);
-  TU_LOG(EHCI_DBG, "  Port Enabled          : %u\r\n", regs->portsc_bm.port_enabled);
-  TU_LOG(EHCI_DBG, "  Port Enabled Change   : %u\r\n", regs->portsc_bm.port_enable_change);
+  TU_LOG(EHCI_DBG, "  Connect Status : %u\r\n", regs->portsc_bm.current_connect_status);
+  TU_LOG(EHCI_DBG, "  Connect Change : %u\r\n", regs->portsc_bm.connect_status_change);
+  TU_LOG(EHCI_DBG, "  Enabled        : %u\r\n", regs->portsc_bm.port_enabled);
+  TU_LOG(EHCI_DBG, "  Enabled Change : %u\r\n", regs->portsc_bm.port_enable_change);
 
-  TU_LOG(EHCI_DBG, "  Port Reset            : %u\r\n", regs->portsc_bm.port_reset);
-  TU_LOG(EHCI_DBG, "  Port Power            : %u\r\n", regs->portsc_bm.port_power);
+  TU_LOG(EHCI_DBG, "  OverCurr Change: %u\r\n", regs->portsc_bm.over_current_change);
+  TU_LOG(EHCI_DBG, "  Force Resume   : %u\r\n", regs->portsc_bm.force_port_resume);
+  TU_LOG(EHCI_DBG, "  Suspend        : %u\r\n", regs->portsc_bm.suspend);
+  TU_LOG(EHCI_DBG, "  Reset          : %u\r\n", regs->portsc_bm.port_reset);
+  TU_LOG(EHCI_DBG, "  Power          : %u\r\n", regs->portsc_bm.port_power);
+}
+
+static inline void print_intr(uint32_t intr) {
+  TU_LOG_HEX(EHCI_DBG, intr);
+  TU_LOG(EHCI_DBG, "  USB Interrupt      : %u\r\n", (intr & EHCI_INT_MASK_USB) ? 1 : 0);
+  TU_LOG(EHCI_DBG, "  USB Error          : %u\r\n", (intr & EHCI_INT_MASK_ERROR) ? 1 : 0);
+  TU_LOG(EHCI_DBG, "  Port Change Detect : %u\r\n", (intr & EHCI_INT_MASK_PORT_CHANGE) ? 1 : 0);
+  TU_LOG(EHCI_DBG, "  Frame List Rollover: %u\r\n", (intr & EHCI_INT_MASK_FRAMELIST_ROLLOVER) ? 1 : 0);
+  TU_LOG(EHCI_DBG, "  Host System Error  : %u\r\n", (intr & EHCI_INT_MASK_PCI_HOST_SYSTEM_ERROR) ? 1 : 0);
+  TU_LOG(EHCI_DBG, "  Async Advance      : %u\r\n", (intr & EHCI_INT_MASK_ASYNC_ADVANCE) ? 1 : 0);
+//  TU_LOG(EHCI_DBG, "  Interrupt on Async: %u\r\n", (intr & EHCI_INT_MASK_NXP_ASYNC));
+//  TU_LOG(EHCI_DBG, "  Periodic Schedule : %u\r\n", (intr & EHCI_INT_MASK_NXP_PERIODIC));
 }
 
 #else
@@ -166,8 +180,8 @@ void hcd_port_reset(uint8_t rhport)
 
   ehci_registers_t* regs = ehci_data.regs;
 
-  // mask out all change bits since they are Write 1 to clear
-  uint32_t portsc = regs->portsc & ~EHCI_PORTSC_MASK_CHANGE_ALL;
+  // mask out Write-1-to-Clear bits
+  uint32_t portsc = regs->portsc & ~EHCI_PORTSC_MASK_W1C;
 
   // EHCI Table 2-16 PortSC
   // when software writes Port Reset bit to a one, it must also write a zero to the Port Enable bit.
@@ -347,7 +361,7 @@ bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
   // Power Control (PPC) field in the HCSPARAMS register.
   if (ehci_data.cap_regs->hcsparams_bm.port_power_control) {
     // mask out all change bits since they are Write 1 to clear
-    uint32_t portsc = (regs->portsc & ~EHCI_PORTSC_MASK_CHANGE_ALL);
+    uint32_t portsc = (regs->portsc & ~EHCI_PORTSC_MASK_W1C);
     portsc |= ECHI_PORTSC_MASK_PORT_POWER;
 
     regs->portsc = portsc;
@@ -621,9 +635,14 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd)
     p_qhd->total_xferred_bytes += p_qhd->p_qtd_list_head->expected_bytes - p_qhd->p_qtd_list_head->total_bytes;
 
 //    if (XFER_RESULT_FAILED == xfer_result ) {
+//      TU_LOG1("  QHD xfer err count: %d\n", qtd_overlay->err_count);
 //      TU_BREAKPOINT(); // TODO skip unplugged device
+//      while(1){}
 //    }
 
+    // No TD, probably an signal noise ?
+    TU_VERIFY(p_qhd->p_qtd_list_head, );
+
     p_qhd->p_qtd_list_head->used = 0; // free QTD
     qtd_remove_1st_from_qhd(p_qhd);
 
@@ -710,7 +729,8 @@ void hcd_int_handler(uint8_t rhport)
 
   if (int_status & EHCI_INT_MASK_PORT_CHANGE)
   {
-    uint32_t const port_status = regs->portsc & EHCI_PORTSC_MASK_CHANGE_ALL;
+    // Including: Force port resume, over-current change, enable/disable change and connect status change.
+    uint32_t const port_status = regs->portsc & EHCI_PORTSC_MASK_W1C;
     print_portsc(regs);
 
     if (regs->portsc_bm.connect_status_change)
diff --git a/src/portable/ehci/ehci.h b/src/portable/ehci/ehci.h
index dd090cb36..a73e43707 100644
--- a/src/portable/ehci/ehci.h
+++ b/src/portable/ehci/ehci.h
@@ -306,7 +306,7 @@ enum {
   EHCI_PORTSC_MASK_PORT_RESET             = TU_BIT(8),
   ECHI_PORTSC_MASK_PORT_POWER             = TU_BIT(12),
 
-  EHCI_PORTSC_MASK_CHANGE_ALL =
+  EHCI_PORTSC_MASK_W1C =
     EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE |
     EHCI_PORTSC_MASK_PORT_ENABLE_CHANGE |
     EHCI_PORTSC_MASK_OVER_CURRENT_CHANGE

From eb89df411540cb8cf5323991516a45590fa0b81d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 17 May 2023 16:14:35 +0700
Subject: [PATCH 330/691] adding hcd_dcache_clean/hcd_dcache_invalidate

---
 hw/bsp/imxrt/family.cmake               | 15 +++++++++++++++
 src/host/hcd.h                          | 10 ++++++++++
 src/portable/chipidea/ci_hs/hcd_ci_hs.c |  9 +++++++++
 src/portable/ehci/ehci.h                |  7 +++++++
 4 files changed, 41 insertions(+)

diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 77ac05c87..4628abc34 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -144,6 +144,21 @@ function(family_configure_target TARGET)
     COMMAND ${LINKSERVER_PATH} flash ${NXPLINK_DEVICE} load $<TARGET_FILE:${TARGET}>
     )
 
+  # Flash using jlink
+  set(JLINKEXE JLinkExe)
+  file(GENERATE
+    OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}.jlink
+    CONTENT "halt
+loadfile $<TARGET_FILE:${TARGET}>
+r
+go
+exit"
+    )
+  add_custom_target(${TARGET}-jlink
+    DEPENDS ${TARGET}
+    COMMAND ${JLINKEXE} -device ${JLINK_DEVICE} -if swd -JTAGConf -1,-1 -speed auto -CommandFile ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}.jlink
+    )
+
 endfunction()
 
 
diff --git a/src/host/hcd.h b/src/host/hcd.h
index f4e76f9ef..38c89a1d2 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -104,6 +104,16 @@ typedef struct
   uint8_t speed;
 } hcd_devtree_info_t;
 
+//--------------------------------------------------------------------+
+// Memory API
+//--------------------------------------------------------------------+
+
+// clean/flush data cache: write cache -> memory
+void hcd_dcache_clean(void* addr, uint32_t data_size) TU_ATTR_WEAK;
+
+// invalidate data cache: mark cache as invalid, next read will read from memory
+void hcd_dcache_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK;
+
 //--------------------------------------------------------------------+
 // Controller API
 //--------------------------------------------------------------------+
diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
index b06633f30..56ca01f85 100644
--- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
@@ -41,6 +41,15 @@
 
 #if CFG_TUSB_MCU == OPT_MCU_MIMXRT
   #include "ci_hs_imxrt.h"
+
+  void hcd_dcache_clean(void* addr, uint32_t data_size) {
+    SCB_CleanDCache_by_Addr((uint32_t*) addr, (int32_t) data_size);
+  }
+
+  void hcd_dcache_invalidate(void* addr, uint32_t data_size) {
+    SCB_InvalidateDCache_by_Addr(addr, (int32_t) data_size);
+  }
+
 #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
   #include "ci_hs_lpc18_43.h"
 #else
diff --git a/src/portable/ehci/ehci.h b/src/portable/ehci/ehci.h
index a73e43707..56befd306 100644
--- a/src/portable/ehci/ehci.h
+++ b/src/portable/ehci/ehci.h
@@ -268,6 +268,7 @@ TU_VERIFY_STATIC( sizeof(ehci_sitd_t) == 32, "size is not correct" );
 // EHCI Operational Register
 //--------------------------------------------------------------------+
 enum {
+  // Bit 0-5 has maskable in interrupt enabled register
   EHCI_INT_MASK_USB                   = TU_BIT(0),
   EHCI_INT_MASK_ERROR                 = TU_BIT(1),
   EHCI_INT_MASK_PORT_CHANGE           = TU_BIT(2),
@@ -276,6 +277,12 @@ enum {
   EHCI_INT_MASK_ASYNC_ADVANCE         = TU_BIT(5),
 
   EHCI_INT_MASK_NXP_SOF               = TU_BIT(7),
+
+  EHCI_INT_MASK_HC_HALTED             = TU_BIT(12),
+  EHCI_INT_MASK_RECLAIMATION          = TU_BIT(13),
+  EHCI_INT_MASK_PERIODIC_SCHED_STATUS = TU_BIT(14),
+  EHCI_INT_MASK_ASYNC_SCHED_STATUS    = TU_BIT(15),
+
   EHCI_INT_MASK_NXP_ASYNC             = TU_BIT(18),
   EHCI_INT_MASK_NXP_PERIODIC          = TU_BIT(19),
 

From 32f9f452afc4d431d51cb16a02f99d76c88f7fb9 Mon Sep 17 00:00:00 2001
From: Martino Facchin <m.facchin@arduino.cc>
Date: Wed, 17 May 2023 12:13:25 +0200
Subject: [PATCH 331/691] renesas: provide default for CFG_TUSB_RHPORT1_MODE

Should fix CI failure for Renesas RX family
---
 src/portable/renesas/rusb2/dcd_rusb2.c | 1 +
 src/portable/renesas/rusb2/hcd_rusb2.c | 1 +
 src/portable/renesas/rusb2/rusb2_ra.h  | 1 +
 3 files changed, 3 insertions(+)

diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index f509dcc56..2653d0da6 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -40,6 +40,7 @@
 #if !defined(CFG_TUSB_RHPORT0_MODE) && !defined(CFG_TUSB_RHPORT1_MODE)
 // fallback
 #define CFG_TUSB_RHPORT0_MODE   OPT_MODE_DEVICE
+#define CFG_TUSB_RHPORT1_MODE   0
 #endif
 
 #if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index 1ec25f1e2..1e26c931d 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -36,6 +36,7 @@
 #if !defined(CFG_TUSB_RHPORT0_MODE) && !defined(CFG_TUSB_RHPORT1_MODE)
 // fallback
 #define CFG_TUSB_RHPORT0_MODE   OPT_MODE_HOST
+#define CFG_TUSB_RHPORT1_MODE   0
 #endif
 
 #if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
diff --git a/src/portable/renesas/rusb2/rusb2_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h
index 874492304..a1c58abe5 100644
--- a/src/portable/renesas/rusb2/rusb2_ra.h
+++ b/src/portable/renesas/rusb2/rusb2_ra.h
@@ -40,6 +40,7 @@ extern IRQn_Type _usb_hs_irqn;
 #if !defined(CFG_TUSB_RHPORT0_MODE) && !defined(CFG_TUSB_RHPORT1_MODE)
 // fallback
 #define CFG_TUSB_RHPORT0_MODE   ( CFG_TUD_ENABLED ? OPT_MODE_DEVICE : OPT_MODE_HOST )
+#define CFG_TUSB_RHPORT1_MODE   0
 #endif
 
 TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_enable(uint8_t rhport)

From a3e017bfd2923dcb1ce86d395606a24e2285e54a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 18 May 2023 10:04:48 +0700
Subject: [PATCH 332/691] EHCI adding dcahe support, passing enumertaion

---
 src/host/hcd.h                          |  10 +-
 src/portable/chipidea/ci_hs/hcd_ci_hs.c |   4 +
 src/portable/ehci/ehci.c                | 167 +++++++++++++++---------
 src/portable/ehci/ehci.h                |   1 +
 4 files changed, 117 insertions(+), 65 deletions(-)

diff --git a/src/host/hcd.h b/src/host/hcd.h
index 38c89a1d2..c6fde2adc 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -108,12 +108,18 @@ typedef struct
 // Memory API
 //--------------------------------------------------------------------+
 
-// clean/flush data cache: write cache -> memory
+// clean/flush data cache: write cache -> memory.
+// Required before an DMA TX transfer to make sure data is in memory
 void hcd_dcache_clean(void* addr, uint32_t data_size) TU_ATTR_WEAK;
 
 // invalidate data cache: mark cache as invalid, next read will read from memory
+// Required BOTH before and after an DMA RX transfer
 void hcd_dcache_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK;
 
+// clean and invalidate data cache
+// Required before an DMA transfer where memory is both read/write by DMA
+void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK;
+
 //--------------------------------------------------------------------+
 // Controller API
 //--------------------------------------------------------------------+
@@ -194,6 +200,7 @@ void hcd_event_device_attach(uint8_t rhport, bool in_isr)
   event.event_id            = HCD_EVENT_DEVICE_ATTACH;
   event.connection.hub_addr = 0;
   event.connection.hub_port = 0;
+
   hcd_event_handler(&event, in_isr);
 }
 
@@ -224,7 +231,6 @@ void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, uint32_t xferred
   event.xfer_complete.result = result;
   event.xfer_complete.len = xferred_bytes;
 
-
   hcd_event_handler(&event, in_isr);
 }
 
diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
index 56ca01f85..ecb1a621c 100644
--- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
@@ -50,6 +50,10 @@
     SCB_InvalidateDCache_by_Addr(addr, (int32_t) data_size);
   }
 
+void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) {
+    SCB_CleanInvalidateDCache_by_Addr(addr, (int32_t) data_size);
+  }
+
 #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
   #include "ci_hs_lpc18_43.h"
 #else
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 8203b0f06..9023e4b35 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -92,7 +92,7 @@ CFG_TUH_MEM_SECTION TU_ATTR_ALIGNED(4096) static ehci_data_t ehci_data;
 //--------------------------------------------------------------------+
 // Debug
 //--------------------------------------------------------------------+
-#if CFG_TUSB_DEBUG >= EHCI_DBG
+#if CFG_TUSB_DEBUG >= (EHCI_DBG + 1)
 static inline void print_portsc(ehci_registers_t* regs) {
   TU_LOG_HEX(EHCI_DBG, regs->portsc);
   TU_LOG(EHCI_DBG, "  Connect Status : %u\r\n", regs->portsc_bm.current_connect_status);
@@ -159,7 +159,7 @@ static inline ehci_qtd_t* qtd_find_free (void);
 static inline ehci_qtd_t* qtd_next (ehci_qtd_t const * p_qtd);
 static inline void qtd_insert_to_qhd (ehci_qhd_t *p_qhd, ehci_qtd_t *p_qtd_new);
 static inline void qtd_remove_1st_from_qhd (ehci_qhd_t *p_qhd);
-static void qtd_init (ehci_qtd_t* p_qtd, void const* buffer, uint16_t total_bytes);
+static void qtd_init (ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes);
 
 static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type);
 static inline ehci_link_t* list_next (ehci_link_t *p_link_pointer);
@@ -325,28 +325,27 @@ bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
   // 3 --> period_head_arr[3] (8ms)
 
   // TODO EHCI_FRAMELIST_SIZE with other size than 8
-  for(uint32_t i=0; i<FRAMELIST_SIZE; i++)
-  {
+  for (uint32_t i = 0; i < FRAMELIST_SIZE; i++) {
     framelist[i].address = (uint32_t) period_1ms;
-    framelist[i].type    = EHCI_QTYPE_QHD;
+    framelist[i].type = EHCI_QTYPE_QHD;
   }
 
-  for(uint32_t i=0; i<FRAMELIST_SIZE; i+=2)
-  {
+  for (uint32_t i = 0; i < FRAMELIST_SIZE; i += 2) {
     list_insert(framelist + i, get_period_head(rhport, 2u), EHCI_QTYPE_QHD);
   }
 
-  for(uint32_t i=1; i<FRAMELIST_SIZE; i+=4)
-  {
+  for (uint32_t i = 1; i < FRAMELIST_SIZE; i += 4) {
     list_insert(framelist + i, get_period_head(rhport, 4u), EHCI_QTYPE_QHD);
   }
-
-  list_insert(framelist+3, get_period_head(rhport, 8u), EHCI_QTYPE_QHD);
-
+  list_insert(framelist + 3, get_period_head(rhport, 8u), EHCI_QTYPE_QHD);
   period_1ms->terminate    = 1;
 
   regs->periodic_list_base = (uint32_t) framelist;
 
+  if(hcd_dcache_clean) {
+    hcd_dcache_clean(&ehci_data, sizeof(ehci_data_t));
+  }
+
   //------------- TT Control (NXP only) -------------//
   regs->nxp_tt_control = 0;
 
@@ -430,6 +429,11 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
   // TODO might need to disable async/period list
   list_insert(list_head, (ehci_link_t*) p_qhd, EHCI_QTYPE_QHD);
 
+  if(hcd_dcache_clean) {
+    hcd_dcache_clean(p_qhd, sizeof(ehci_qhd_t));
+    hcd_dcache_clean(list_head, sizeof(ehci_link_t));
+  }
+
   return true;
 }
 
@@ -441,9 +445,12 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
   ehci_qtd_t* td  = &ehci_data.control[dev_addr].qtd;
 
   qtd_init(td, setup_packet, 8);
-  td->pid          = EHCI_PID_SETUP;
-  td->int_on_complete = 1;
-  td->next.terminate  = 1;
+  td->pid = EHCI_PID_SETUP;
+
+  if (hcd_dcache_clean && hcd_dcache_clean_invalidate) {
+    hcd_dcache_clean((void *) setup_packet, 8);
+    hcd_dcache_clean_invalidate(td, sizeof(ehci_qtd_t));
+  }
 
   // sw region
   qhd->p_qtd_list_head = td;
@@ -452,6 +459,10 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
   // attach TD
   qhd->qtd_overlay.next.address = (uint32_t) td;
 
+  if (hcd_dcache_clean_invalidate) {
+    hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
+  }
+
   return true;
 }
 
@@ -462,41 +473,48 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
   uint8_t const epnum = tu_edpt_number(ep_addr);
   uint8_t const dir   = tu_edpt_dir(ep_addr);
 
+  ehci_qhd_t* qhd;
+  ehci_qtd_t* qtd;
+
   if ( epnum == 0 )
   {
-    ehci_qhd_t* qhd = qhd_control(dev_addr);
-    ehci_qtd_t* qtd = qtd_control(dev_addr);
+    qhd = qhd_control(dev_addr);
+    qtd = qtd_control(dev_addr);
 
     qtd_init(qtd, buffer, buflen);
 
     // first first data toggle is always 1 (data & setup stage)
     qtd->data_toggle = 1;
     qtd->pid = dir ? EHCI_PID_IN : EHCI_PID_OUT;
-    qtd->int_on_complete = 1;
-    qtd->next.terminate  = 1;
-
-    // sw region
-    qhd->p_qtd_list_head = qtd;
-    qhd->p_qtd_list_tail = qtd;
-
-    // attach TD
-    qhd->qtd_overlay.next.address = (uint32_t) qtd;
   }else
   {
-    ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr);
-    ehci_qtd_t *p_qtd = qtd_find_free();
-    TU_ASSERT(p_qtd);
+    qhd = qhd_get_from_addr(dev_addr, ep_addr);
+    qtd = qtd_find_free();
+    TU_ASSERT(qtd);
 
-    qtd_init(p_qtd, buffer, buflen);
-    p_qtd->pid = p_qhd->pid;
+    qtd_init(qtd, buffer, buflen);
+    qtd->pid = qhd->pid;
+  }
 
-    // Insert TD to QH
-    qtd_insert_to_qhd(p_qhd, p_qtd);
+  if (hcd_dcache_clean && hcd_dcache_clean_invalidate) {
+    // IN transfer: invalidate buffer, OUT transfer: clean buffer
+    if (dir) {
+      hcd_dcache_invalidate(buffer, buflen);
+    }else {
+      hcd_dcache_clean(buffer, buflen);
+    }
+    hcd_dcache_clean_invalidate(qtd, sizeof(ehci_qtd_t));
+  }
 
-    p_qhd->p_qtd_list_tail->int_on_complete = 1;
+  // Software: assign TD to QHD
+  qhd->p_qtd_list_head = qtd;
+  qhd->p_qtd_list_tail = qtd;
 
-    // attach head QTD to QHD start transferring
-    p_qhd->qtd_overlay.next.address = (uint32_t) p_qhd->p_qtd_list_head;
+  // attach TD to QHD start transferring
+  qhd->qtd_overlay.next.address = (uint32_t) qtd;
+
+  if (hcd_dcache_clean_invalidate) {
+    hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
   }
 
   return true;
@@ -551,6 +569,11 @@ static void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd)
   while(p_qhd->p_qtd_list_head != NULL && !p_qhd->p_qtd_list_head->active)
   {
     ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) p_qhd->p_qtd_list_head;
+
+    if (hcd_dcache_invalidate) {
+      hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
+    }
+
     bool const is_ioc = (qtd->int_on_complete != 0);
     uint8_t const ep_addr = tu_edpt_addr(p_qhd->ep_number, qtd->pid == EHCI_PID_IN ? 1 : 0);
 
@@ -573,8 +596,12 @@ static void async_list_xfer_complete_isr(ehci_qhd_t * const async_head)
   ehci_qhd_t *p_qhd = async_head;
   do
   {
-    if ( !p_qhd->qtd_overlay.halted ) // halted or error is processed in error isr
-    {
+    if (hcd_dcache_invalidate) {
+      hcd_dcache_invalidate(p_qhd, sizeof(ehci_qhd_t));
+    }
+
+    // halted or error is processed in error isr
+    if ( !p_qhd->qtd_overlay.halted ) {
       qhd_xfer_complete_isr(p_qhd);
     }
     p_qhd = qhd_next(p_qhd);
@@ -640,8 +667,8 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd)
 //      while(1){}
 //    }
 
-    // No TD, probably an signal noise ?
-    TU_VERIFY(p_qhd->p_qtd_list_head, );
+    // No TD yet, it is probably the probably an signal noise ?
+    TU_ASSERT(p_qhd->p_qtd_list_head, );
 
     p_qhd->p_qtd_list_head->used = 0; // free QTD
     qtd_remove_1st_from_qhd(p_qhd);
@@ -714,17 +741,19 @@ static void xfer_error_isr(uint8_t hostid)
 void hcd_int_handler(uint8_t rhport)
 {
   ehci_registers_t* regs = ehci_data.regs;
+  uint32_t const int_status = regs->status;
 
-  uint32_t int_status = regs->status;
-  int_status &= regs->inten;
-
-  regs->status = int_status; // Acknowledge handled interrupt
-
-  if (int_status == 0) return;
+  if (int_status & EHCI_INT_MASK_HC_HALTED) {
+    // something seriously wrong, maybe forget to flush/invalidate cache
+    TU_BREAKPOINT();
+    TU_LOG1("  HC halted\n");
+    return;
+  }
 
   if (int_status & EHCI_INT_MASK_FRAMELIST_ROLLOVER)
   {
     ehci_data.uframe_number += (FRAMELIST_SIZE << 3);
+    regs->status = EHCI_INT_MASK_FRAMELIST_ROLLOVER; // Acknowledge
   }
 
   if (int_status & EHCI_INT_MASK_PORT_CHANGE)
@@ -739,31 +768,41 @@ void hcd_int_handler(uint8_t rhport)
     }
 
     regs->portsc |= port_status; // Acknowledge change bits in portsc
+    regs->status = EHCI_INT_MASK_PORT_CHANGE; // Acknowledge
   }
 
   if (int_status & EHCI_INT_MASK_ERROR)
   {
     xfer_error_isr(rhport);
+    regs->status = EHCI_INT_MASK_ERROR; // Acknowledge
   }
 
   //------------- some QTD/SITD/ITD with IOC set is completed -------------//
   if (int_status & EHCI_INT_MASK_NXP_ASYNC)
   {
-    async_list_xfer_complete_isr( qhd_async_head(rhport) );
+    async_list_xfer_complete_isr(qhd_async_head(rhport));
+    regs->status = EHCI_INT_MASK_NXP_ASYNC; // Acknowledge
   }
 
   if (int_status & EHCI_INT_MASK_NXP_PERIODIC)
   {
     for (uint32_t i=1; i <= FRAMELIST_SIZE; i *= 2)
     {
-      period_list_xfer_complete_isr( rhport, i );
+      period_list_xfer_complete_isr(rhport, i);
     }
+    regs->status = EHCI_INT_MASK_NXP_PERIODIC; // Acknowledge
+  }
+
+  if (int_status & EHCI_INT_MASK_USB) {
+    // TODO standard EHCI xfer complete
+    regs->status = EHCI_INT_MASK_USB; // Acknowledge
   }
 
   //------------- There is some removed async previously -------------//
-  if (int_status & EHCI_INT_MASK_ASYNC_ADVANCE) // need to place after EHCI_INT_MASK_NXP_ASYNC
-  {
+  // need to place after EHCI_INT_MASK_NXP_ASYNC
+  if (int_status & EHCI_INT_MASK_ASYNC_ADVANCE) {
     async_advance_isr(rhport);
+    regs->status = EHCI_INT_MASK_ASYNC_ADVANCE; // Acknowledge
   }
 }
 
@@ -918,28 +957,30 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c
   }
 }
 
-static void qtd_init(ehci_qtd_t* p_qtd, void const* buffer, uint16_t total_bytes)
+static void qtd_init(ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes)
 {
-  tu_memclr(p_qtd, sizeof(ehci_qtd_t));
+  tu_memclr(qtd, sizeof(ehci_qtd_t));
+  qtd->used                = 1;
 
-  p_qtd->used                = 1;
+  qtd->next.terminate      = 1; // init to null
+  qtd->alternate.terminate = 1; // not used, always set to terminated
+  qtd->active              = 1;
+  qtd->err_count           = 3; // TODO 3 consecutive errors tolerance
+  qtd->data_toggle         = 0;
+  qtd->int_on_complete     = 1;
+  qtd->total_bytes         = total_bytes;
+  qtd->expected_bytes      = total_bytes;
 
-  p_qtd->next.terminate      = 1; // init to null
-  p_qtd->alternate.terminate = 1; // not used, always set to terminated
-  p_qtd->active              = 1;
-  p_qtd->err_count           = 3; // TODO 3 consecutive errors tolerance
-  p_qtd->data_toggle         = 0;
-  p_qtd->total_bytes         = total_bytes;
-  p_qtd->expected_bytes      = total_bytes;
-
-  p_qtd->buffer[0] = (uint32_t) buffer;
+  qtd->buffer[0] = (uint32_t) buffer;
   for(uint8_t i=1; i<5; i++)
   {
-    p_qtd->buffer[i] |= tu_align4k( p_qtd->buffer[i-1] ) + 4096;
+    qtd->buffer[i] |= tu_align4k(qtd->buffer[i - 1] ) + 4096;
   }
 }
 
 //------------- List Managing Helper -------------//
+
+// insert at head
 static inline void list_insert(ehci_link_t *current, ehci_link_t *new, uint8_t new_type)
 {
   new->address = current->address;
diff --git a/src/portable/ehci/ehci.h b/src/portable/ehci/ehci.h
index 56befd306..e76a59401 100644
--- a/src/portable/ehci/ehci.h
+++ b/src/portable/ehci/ehci.h
@@ -165,6 +165,7 @@ typedef struct TU_ATTR_ALIGNED(32)
 	uint16_t total_xferred_bytes; // number of bytes xferred until a qtd with ioc bit set
 	uint8_t reserved2[2];
 
+  // TODO USBH will only queue 1 TD per QHD, thus we can remove the list
 	ehci_qtd_t * volatile p_qtd_list_head;	// head of the scheduled TD list
 	ehci_qtd_t * volatile p_qtd_list_tail;	// tail of the scheduled TD list
 } ehci_qhd_t;

From e4f4ad5bc3a24f619b9cf6c542aaa3ff8cb37ec4 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 18 May 2023 10:21:11 +0700
Subject: [PATCH 333/691] use weak local for dcache function to skip if()

---
 src/portable/ehci/ehci.c | 65 +++++++++++++++++++++-------------------
 1 file changed, 34 insertions(+), 31 deletions(-)

diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 9023e4b35..ac715aa60 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -164,6 +164,25 @@ static void qtd_init (ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes)
 static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type);
 static inline ehci_link_t* list_next (ehci_link_t *p_link_pointer);
 
+TU_ATTR_WEAK void hcd_dcache_clean(void* addr, uint32_t data_size) {
+  (void) addr;
+  (void) data_size;
+}
+
+// invalidate data cache: mark cache as invalid, next read will read from memory
+// Required BOTH before and after an DMA RX transfer
+TU_ATTR_WEAK void hcd_dcache_invalidate(void* addr, uint32_t data_size) {
+  (void) addr;
+  (void) data_size;
+}
+
+// clean and invalidate data cache
+// Required before an DMA transfer where memory is both read/write by DMA
+TU_ATTR_WEAK void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) {
+  (void) addr;
+  (void) data_size;
+}
+
 //--------------------------------------------------------------------+
 // HCD API
 //--------------------------------------------------------------------+
@@ -342,9 +361,7 @@ bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
 
   regs->periodic_list_base = (uint32_t) framelist;
 
-  if(hcd_dcache_clean) {
-    hcd_dcache_clean(&ehci_data, sizeof(ehci_data_t));
-  }
+  hcd_dcache_clean(&ehci_data, sizeof(ehci_data_t));
 
   //------------- TT Control (NXP only) -------------//
   regs->nxp_tt_control = 0;
@@ -429,10 +446,8 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
   // TODO might need to disable async/period list
   list_insert(list_head, (ehci_link_t*) p_qhd, EHCI_QTYPE_QHD);
 
-  if(hcd_dcache_clean) {
-    hcd_dcache_clean(p_qhd, sizeof(ehci_qhd_t));
-    hcd_dcache_clean(list_head, sizeof(ehci_link_t));
-  }
+  hcd_dcache_clean(p_qhd, sizeof(ehci_qhd_t));
+  hcd_dcache_clean(list_head, sizeof(ehci_link_t));
 
   return true;
 }
@@ -447,10 +462,8 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
   qtd_init(td, setup_packet, 8);
   td->pid = EHCI_PID_SETUP;
 
-  if (hcd_dcache_clean && hcd_dcache_clean_invalidate) {
-    hcd_dcache_clean((void *) setup_packet, 8);
-    hcd_dcache_clean_invalidate(td, sizeof(ehci_qtd_t));
-  }
+  hcd_dcache_clean((void *) setup_packet, 8);
+  hcd_dcache_clean_invalidate(td, sizeof(ehci_qtd_t));
 
   // sw region
   qhd->p_qtd_list_head = td;
@@ -459,9 +472,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
   // attach TD
   qhd->qtd_overlay.next.address = (uint32_t) td;
 
-  if (hcd_dcache_clean_invalidate) {
-    hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
-  }
+  hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
 
   return true;
 }
@@ -496,15 +507,13 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
     qtd->pid = qhd->pid;
   }
 
-  if (hcd_dcache_clean && hcd_dcache_clean_invalidate) {
-    // IN transfer: invalidate buffer, OUT transfer: clean buffer
-    if (dir) {
-      hcd_dcache_invalidate(buffer, buflen);
-    }else {
-      hcd_dcache_clean(buffer, buflen);
-    }
-    hcd_dcache_clean_invalidate(qtd, sizeof(ehci_qtd_t));
+  // IN transfer: invalidate buffer, OUT transfer: clean buffer
+  if (dir) {
+    hcd_dcache_invalidate(buffer, buflen);
+  }else {
+    hcd_dcache_clean(buffer, buflen);
   }
+  hcd_dcache_clean_invalidate(qtd, sizeof(ehci_qtd_t));
 
   // Software: assign TD to QHD
   qhd->p_qtd_list_head = qtd;
@@ -513,9 +522,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
   // attach TD to QHD start transferring
   qhd->qtd_overlay.next.address = (uint32_t) qtd;
 
-  if (hcd_dcache_clean_invalidate) {
-    hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
-  }
+  hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
 
   return true;
 }
@@ -570,9 +577,7 @@ static void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd)
   {
     ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) p_qhd->p_qtd_list_head;
 
-    if (hcd_dcache_invalidate) {
-      hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
-    }
+    hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
 
     bool const is_ioc = (qtd->int_on_complete != 0);
     uint8_t const ep_addr = tu_edpt_addr(p_qhd->ep_number, qtd->pid == EHCI_PID_IN ? 1 : 0);
@@ -596,9 +601,7 @@ static void async_list_xfer_complete_isr(ehci_qhd_t * const async_head)
   ehci_qhd_t *p_qhd = async_head;
   do
   {
-    if (hcd_dcache_invalidate) {
-      hcd_dcache_invalidate(p_qhd, sizeof(ehci_qhd_t));
-    }
+    hcd_dcache_invalidate(p_qhd, sizeof(ehci_qhd_t));
 
     // halted or error is processed in error isr
     if ( !p_qhd->qtd_overlay.halted ) {

From a0aea52a117246f246529459f9203ce36d2fcd81 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 18 May 2023 12:39:53 +0700
Subject: [PATCH 334/691] more cache, fix an similar issue with OHCI when
 removing an queue head

---
 src/portable/ehci/ehci.c | 50 ++++++++++++++++++++++------------------
 src/portable/ehci/ehci.h |  2 ++
 2 files changed, 29 insertions(+), 23 deletions(-)

diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index ac715aa60..0b4202788 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -162,7 +162,7 @@ static inline void qtd_remove_1st_from_qhd (ehci_qhd_t *p_qhd);
 static void qtd_init (ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes);
 
 static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type);
-static inline ehci_link_t* list_next (ehci_link_t *p_link_pointer);
+static inline ehci_link_t* list_next (ehci_link_t const *p_link);
 
 TU_ATTR_WEAK void hcd_dcache_clean(void* addr, uint32_t data_size) {
   (void) addr;
@@ -237,24 +237,22 @@ tusb_speed_t hcd_port_speed_get(uint8_t rhport)
   return (tusb_speed_t) ehci_data.regs->portsc_bm.nxp_port_speed; // NXP specific port speed
 }
 
-static void list_remove_qhd_by_addr(ehci_link_t* list_head, uint8_t dev_addr)
-{
-  for(ehci_link_t* prev = list_head;
-      !prev->terminate && (tu_align32(prev->address) != (uint32_t) list_head) && prev != NULL;
-      prev = list_next(prev) )
-  {
-    // TODO check type for ISO iTD and siTD
-    // TODO Suppress cast-align warning
-    #pragma GCC diagnostic push
-    #pragma GCC diagnostic ignored "-Wcast-align"
-    ehci_qhd_t* qhd = (ehci_qhd_t*) list_next(prev);
-    #pragma GCC diagnostic pop
-    if ( qhd->dev_addr == dev_addr )
-    {
+static void list_remove_qhd_by_daddr(ehci_link_t* list_head, uint8_t dev_addr) {
+  ehci_link_t* prev = list_head;
+
+  while (prev && !prev->terminate) {
+    ehci_qhd_t* qhd = (ehci_qhd_t*) (uintptr_t) list_next(prev);
+
+    // done if loop back to head
+    if ( (uintptr_t) qhd == (uintptr_t) list_head) {
+      break;
+    }
+
+    if ( qhd->dev_addr == dev_addr ) {
       // TODO deactivate all TD, wait for QHD to inactive before removal
       prev->address = qhd->next.address;
 
-      // EHCI 4.8.2 link the removed qhd to async head (which always reachable by Host Controller)
+      // EHCI 4.8.2 link the removed qhd's next to async head (which always reachable by Host Controller)
       qhd->next.address = ((uint32_t) list_head) | (EHCI_QTYPE_QHD << 1);
 
       if ( qhd->int_smask )
@@ -267,6 +265,11 @@ static void list_remove_qhd_by_addr(ehci_link_t* list_head, uint8_t dev_addr)
         // mark as removing, will completely re-usable when async advance isr occurs
         qhd->removing = 1;
       }
+
+      hcd_dcache_clean(qhd, sizeof(ehci_qhd_t));
+      hcd_dcache_clean(prev, sizeof(ehci_qhd_t));
+    }else {
+      prev = list_next(prev);
     }
   }
 }
@@ -275,15 +278,16 @@ static void list_remove_qhd_by_addr(ehci_link_t* list_head, uint8_t dev_addr)
 void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
 {
   // skip dev0
-  if (dev_addr == 0) return;
+  if (dev_addr == 0) {
+    return;
+  }
 
   // Remove from async list
-  list_remove_qhd_by_addr( (ehci_link_t*) qhd_async_head(rhport), dev_addr );
+  list_remove_qhd_by_daddr((ehci_link_t *) qhd_async_head(rhport), dev_addr);
 
   // Remove from all interval period list
-  for(uint8_t i = 0; i < TU_ARRAY_SIZE(ehci_data.period_head_arr); i++)
-  {
-    list_remove_qhd_by_addr( (ehci_link_t*) &ehci_data.period_head_arr[i], dev_addr);
+  for(uint8_t i = 0; i < TU_ARRAY_SIZE(ehci_data.period_head_arr); i++) {
+    list_remove_qhd_by_daddr((ehci_link_t *) &ehci_data.period_head_arr[i], dev_addr);
   }
 
   // Async doorbell (EHCI 4.8.2 for operational details)
@@ -990,9 +994,9 @@ static inline void list_insert(ehci_link_t *current, ehci_link_t *new, uint8_t n
   current->address = ((uint32_t) new) | (new_type << 1);
 }
 
-static inline ehci_link_t* list_next(ehci_link_t *p_link_pointer)
+static inline ehci_link_t* list_next(ehci_link_t const *p_link)
 {
-  return (ehci_link_t*) tu_align32(p_link_pointer->address);
+  return (ehci_link_t*) tu_align32(p_link->address);
 }
 
 #endif
diff --git a/src/portable/ehci/ehci.h b/src/portable/ehci/ehci.h
index e76a59401..d7d37d627 100644
--- a/src/portable/ehci/ehci.h
+++ b/src/portable/ehci/ehci.h
@@ -81,6 +81,8 @@ typedef union {
 	};
 }ehci_link_t;
 
+TU_VERIFY_STATIC( sizeof(ehci_link_t) == 4, "size is not correct" );
+
 /// Queue Element Transfer Descriptor
 /// Qtd is used to declare overlay in ehci_qhd_t -> cannot be declared with TU_ATTR_ALIGNED(32)
 typedef struct

From 49e2aabc819f761284dd490fd4f1c5d4ad5c3695 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 18 May 2023 13:45:38 +0700
Subject: [PATCH 335/691] EHCI more improvement

- more dcache clean/invalidate
- extract init_periodic_list()
- improve isr list handling
---
 src/host/hcd.h           |   2 +-
 src/portable/ehci/ehci.c | 204 +++++++++++++++++++++------------------
 2 files changed, 109 insertions(+), 97 deletions(-)

diff --git a/src/host/hcd.h b/src/host/hcd.h
index c6fde2adc..5a3b0a087 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -175,7 +175,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
 bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]);
 
 // clear stall, data toggle is also reset to DATA0
-bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr);
+bool hcd_edpt_clear_stall(uint8_t daddr, uint8_t ep_addr);
 
 //--------------------------------------------------------------------+
 // USBH implemented API
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 0b4202788..0b45d7b93 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -294,6 +294,40 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
   ehci_data.regs->command_bm.async_adv_doorbell = 1;
 }
 
+static void init_periodic_list(uint8_t rhport) {
+  // Build the polling interval tree with 1 ms, 2 ms, 4 ms and 8 ms (framesize) only
+  for ( uint32_t i = 0; i < TU_ARRAY_SIZE(ehci_data.period_head_arr); i++ ) {
+    ehci_data.period_head_arr[i].int_smask          = 1; // queue head in period list must have smask non-zero
+    ehci_data.period_head_arr[i].qtd_overlay.halted = 1; // dummy node, always inactive
+  }
+
+  ehci_link_t * const framelist  = ehci_data.period_framelist;
+  ehci_link_t * const period_1ms = get_period_head(rhport, 1u);
+
+  // all links --> period_head_arr[0] (1ms)
+  // 0, 2, 4, 6 etc --> period_head_arr[1] (2ms)
+  // 1, 5 --> period_head_arr[2] (4ms)
+  // 3 --> period_head_arr[3] (8ms)
+
+  // TODO EHCI_FRAMELIST_SIZE with other size than 8
+  for (uint32_t i = 0; i < FRAMELIST_SIZE; i++) {
+    framelist[i].address = (uint32_t) period_1ms;
+    framelist[i].type = EHCI_QTYPE_QHD;
+  }
+
+  for (uint32_t i = 0; i < FRAMELIST_SIZE; i += 2) {
+    list_insert(framelist + i, get_period_head(rhport, 2u), EHCI_QTYPE_QHD);
+  }
+
+  for (uint32_t i = 1; i < FRAMELIST_SIZE; i += 4) {
+    list_insert(framelist + i, get_period_head(rhport, 4u), EHCI_QTYPE_QHD);
+  }
+
+  list_insert(framelist + 3, get_period_head(rhport, 8u), EHCI_QTYPE_QHD);
+
+  period_1ms->terminate    = 1;
+}
+
 bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
 {
   tu_memclr(&ehci_data, sizeof(ehci_data_t));
@@ -332,38 +366,8 @@ bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
   regs->async_list_addr = (uint32_t) async_head;
 
   //------------- Periodic List -------------//
-  // Build the polling interval tree with 1 ms, 2 ms, 4 ms and 8 ms (framesize) only
-  for ( uint32_t i = 0; i < TU_ARRAY_SIZE(ehci_data.period_head_arr); i++ )
-  {
-    ehci_data.period_head_arr[i].int_smask          = 1; // queue head in period list must have smask non-zero
-    ehci_data.period_head_arr[i].qtd_overlay.halted = 1; // dummy node, always inactive
-  }
-
-  ehci_link_t * const framelist  = ehci_data.period_framelist;
-  ehci_link_t * const period_1ms = get_period_head(rhport, 1u);
-
-  // all links --> period_head_arr[0] (1ms)
-  // 0, 2, 4, 6 etc --> period_head_arr[1] (2ms)
-  // 1, 5 --> period_head_arr[2] (4ms)
-  // 3 --> period_head_arr[3] (8ms)
-
-  // TODO EHCI_FRAMELIST_SIZE with other size than 8
-  for (uint32_t i = 0; i < FRAMELIST_SIZE; i++) {
-    framelist[i].address = (uint32_t) period_1ms;
-    framelist[i].type = EHCI_QTYPE_QHD;
-  }
-
-  for (uint32_t i = 0; i < FRAMELIST_SIZE; i += 2) {
-    list_insert(framelist + i, get_period_head(rhport, 2u), EHCI_QTYPE_QHD);
-  }
-
-  for (uint32_t i = 1; i < FRAMELIST_SIZE; i += 4) {
-    list_insert(framelist + i, get_period_head(rhport, 4u), EHCI_QTYPE_QHD);
-  }
-  list_insert(framelist + 3, get_period_head(rhport, 8u), EHCI_QTYPE_QHD);
-  period_1ms->terminate    = 1;
-
-  regs->periodic_list_base = (uint32_t) framelist;
+  init_periodic_list(rhport);
+  regs->periodic_list_base = (uint32_t) ehci_data.period_framelist;
 
   hcd_dcache_clean(&ehci_data, sizeof(ehci_data_t));
 
@@ -491,8 +495,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
   ehci_qhd_t* qhd;
   ehci_qtd_t* qtd;
 
-  if ( epnum == 0 )
-  {
+  if (epnum == 0) {
     qhd = qhd_control(dev_addr);
     qtd = qtd_control(dev_addr);
 
@@ -501,8 +504,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
     // first first data toggle is always 1 (data & setup stage)
     qtd->data_toggle = 1;
     qtd->pid = dir ? EHCI_PID_IN : EHCI_PID_OUT;
-  }else
-  {
+  } else {
     qhd = qhd_get_from_addr(dev_addr, ep_addr);
     qtd = qtd_find_free();
     TU_ASSERT(qtd);
@@ -531,10 +533,11 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
   return true;
 }
 
-bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
+bool hcd_edpt_clear_stall(uint8_t daddr, uint8_t ep_addr)
 {
-  ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr);
-  p_qhd->qtd_overlay.halted = 0;
+  ehci_qhd_t *qhd = qhd_get_from_addr(daddr, ep_addr);
+  qhd->qtd_overlay.halted = 0;
+  hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
   // TODO reset data toggle ?
   return true;
 }
@@ -546,22 +549,22 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
 // async_advance is handshake between usb stack & ehci controller.
 // This isr mean it is safe to modify previously removed queue head from async list.
 // In tinyusb, queue head is only removed when device is unplugged.
-static void async_advance_isr(uint8_t rhport)
+TU_ATTR_ALWAYS_INLINE static inline
+void async_advance_isr(uint8_t rhport)
 {
   (void) rhport;
 
-  ehci_qhd_t* qhd_pool = ehci_data.qhd_pool;
-  for(uint32_t i = 0; i < QHD_MAX; i++)
-  {
-    if ( qhd_pool[i].removing )
-    {
+  ehci_qhd_t *qhd_pool = ehci_data.qhd_pool;
+  for (uint32_t i = 0; i < QHD_MAX; i++) {
+    if (qhd_pool[i].removing) {
       qhd_pool[i].removing = 0;
-      qhd_pool[i].used     = 0;
+      qhd_pool[i].used = 0;
     }
   }
 }
 
-static void port_connect_status_change_isr(uint8_t rhport)
+TU_ATTR_ALWAYS_INLINE static inline
+void port_connect_status_change_isr(uint8_t rhport)
 {
   // NOTE There is an sequence plug->unplug->…..-> plug if device is powering with pre-plugged device
   if (ehci_data.regs->portsc_bm.current_connect_status)
@@ -574,13 +577,13 @@ static void port_connect_status_change_isr(uint8_t rhport)
   }
 }
 
-static void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd)
+TU_ATTR_ALWAYS_INLINE static inline
+void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd)
 {
   // free all TDs from the head td to the first active TD
   while(p_qhd->p_qtd_list_head != NULL && !p_qhd->p_qtd_list_head->active)
   {
     ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) p_qhd->p_qtd_list_head;
-
     hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
 
     bool const is_ioc = (qtd->int_on_complete != 0);
@@ -600,7 +603,8 @@ static void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd)
   }
 }
 
-static void async_list_xfer_complete_isr(ehci_qhd_t * const async_head)
+TU_ATTR_ALWAYS_INLINE static inline
+void async_list_xfer_complete_isr(ehci_qhd_t * const async_head)
 {
   ehci_qhd_t *p_qhd = async_head;
   do
@@ -611,46 +615,55 @@ static void async_list_xfer_complete_isr(ehci_qhd_t * const async_head)
     if ( !p_qhd->qtd_overlay.halted ) {
       qhd_xfer_complete_isr(p_qhd);
     }
+
     p_qhd = qhd_next(p_qhd);
   }while(p_qhd != async_head); // async list traversal, stop if loop around
 }
 
-static void period_list_xfer_complete_isr(uint8_t hostid, uint32_t interval_ms)
+TU_ATTR_ALWAYS_INLINE static inline
+void period_list_xfer_complete_isr(uint8_t rhport, uint32_t interval_ms)
 {
-  uint16_t max_loop = 0;
-  uint32_t const period_1ms_addr = (uint32_t) get_period_head(hostid, 1u);
-  ehci_link_t next_item = * get_period_head(hostid, interval_ms);
+  uint32_t const period_1ms_addr = (uint32_t) get_period_head(rhport, 1u);
+  ehci_link_t next_link = * get_period_head(rhport, interval_ms);
 
-  // TODO abstract max loop guard for period
-  while( !next_item.terminate &&
-      !(interval_ms > 1 && period_1ms_addr == tu_align32(next_item.address)) &&
-      max_loop < (QHD_MAX + EHCI_MAX_ITD + EHCI_MAX_SITD)*CFG_TUH_DEVICE_MAX)
-  {
-    switch ( next_item.type )
-    {
-      case EHCI_QTYPE_QHD:
-      {
-        ehci_qhd_t *p_qhd_int = (ehci_qhd_t *) tu_align32(next_item.address);
-        if ( !p_qhd_int->qtd_overlay.halted )
-        {
-          qhd_xfer_complete_isr(p_qhd_int);
-        }
-      }
+  while (!next_link.terminate) {
+    if (interval_ms > 1 && period_1ms_addr == tu_align32(next_link.address)) {
+      // 1ms period list is end of list for all larger interval
       break;
-
-      case EHCI_QTYPE_ITD: // TODO support hs/fs ISO
-      case EHCI_QTYPE_SITD:
-      case EHCI_QTYPE_FSTN:
-
-      default: break;
     }
 
-    next_item = *list_next(&next_item);
-    max_loop++;
+    uintptr_t const entry_addr = tu_align32(next_link.address);
+
+    switch (next_link.type) {
+      case EHCI_QTYPE_QHD: {
+        ehci_qhd_t *qhd = (ehci_qhd_t *) entry_addr;
+        hcd_dcache_invalidate(qhd, sizeof(ehci_qhd_t));
+
+        if (!qhd->qtd_overlay.halted) {
+          qhd_xfer_complete_isr(qhd);
+        }
+      }
+        break;
+
+      case EHCI_QTYPE_ITD:
+        // TODO support hs ISO
+        break;
+
+      case EHCI_QTYPE_SITD:
+        // TODO support split ISO
+        break;
+
+      case EHCI_QTYPE_FSTN:
+      default:
+        break;
+    }
+
+    next_link = *list_next(&next_link);
   }
 }
 
-static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd)
+TU_ATTR_ALWAYS_INLINE static inline
+void qhd_xfer_error_isr(ehci_qhd_t * p_qhd)
 {
   volatile ehci_qtd_t *qtd_overlay = &p_qhd->qtd_overlay;
 
@@ -666,22 +679,22 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd)
       xfer_result = XFER_RESULT_STALLED;
     }
 
-    p_qhd->total_xferred_bytes += p_qhd->p_qtd_list_head->expected_bytes - p_qhd->p_qtd_list_head->total_bytes;
-
 //    if (XFER_RESULT_FAILED == xfer_result ) {
 //      TU_LOG1("  QHD xfer err count: %d\n", qtd_overlay->err_count);
 //      TU_BREAKPOINT(); // TODO skip unplugged device
 //      while(1){}
 //    }
 
-    // No TD yet, it is probably the probably an signal noise ?
-    TU_ASSERT(p_qhd->p_qtd_list_head, );
+    ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) p_qhd->p_qtd_list_head;
+    TU_ASSERT(qtd, ); // No TD yet, probably a race condition or cache issue !?
 
-    p_qhd->p_qtd_list_head->used = 0; // free QTD
+    hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
+    p_qhd->total_xferred_bytes += qtd->expected_bytes - qtd->total_bytes;
+
+    qtd->used = 0; // free QTD
     qtd_remove_1st_from_qhd(p_qhd);
 
-    if ( 0 == p_qhd->ep_number )
-    {
+    if ( 0 == p_qhd->ep_number ) {
       // control cannot be halted --> clear all qtd list
       p_qhd->p_qtd_list_head = NULL;
       p_qhd->p_qtd_list_tail = NULL;
@@ -702,13 +715,15 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd)
   }
 }
 
-static void xfer_error_isr(uint8_t hostid)
+TU_ATTR_ALWAYS_INLINE static inline
+void xfer_error_isr(uint8_t hostid)
 {
   //------------- async list -------------//
   ehci_qhd_t * const async_head = qhd_async_head(hostid);
   ehci_qhd_t *p_qhd = async_head;
   do
   {
+    hcd_dcache_invalidate(p_qhd, sizeof(ehci_qhd_t));
     qhd_xfer_error_isr( p_qhd );
     p_qhd = qhd_next(p_qhd);
   }while(p_qhd != async_head); // async list traversal, stop if loop around
@@ -728,6 +743,8 @@ static void xfer_error_isr(uint8_t hostid)
         case EHCI_QTYPE_QHD:
         {
           ehci_qhd_t *p_qhd_int = (ehci_qhd_t *) tu_align32(next_item.address);
+          hcd_dcache_invalidate(p_qhd_int, sizeof(ehci_qhd_t));
+
           qhd_xfer_error_isr(p_qhd_int);
         }
         break;
@@ -757,20 +774,17 @@ void hcd_int_handler(uint8_t rhport)
     return;
   }
 
-  if (int_status & EHCI_INT_MASK_FRAMELIST_ROLLOVER)
-  {
+  if (int_status & EHCI_INT_MASK_FRAMELIST_ROLLOVER) {
     ehci_data.uframe_number += (FRAMELIST_SIZE << 3);
     regs->status = EHCI_INT_MASK_FRAMELIST_ROLLOVER; // Acknowledge
   }
 
-  if (int_status & EHCI_INT_MASK_PORT_CHANGE)
-  {
+  if (int_status & EHCI_INT_MASK_PORT_CHANGE) {
     // Including: Force port resume, over-current change, enable/disable change and connect status change.
     uint32_t const port_status = regs->portsc & EHCI_PORTSC_MASK_W1C;
     print_portsc(regs);
 
-    if (regs->portsc_bm.connect_status_change)
-    {
+    if (regs->portsc_bm.connect_status_change) {
       port_connect_status_change_isr(rhport);
     }
 
@@ -778,15 +792,13 @@ void hcd_int_handler(uint8_t rhport)
     regs->status = EHCI_INT_MASK_PORT_CHANGE; // Acknowledge
   }
 
-  if (int_status & EHCI_INT_MASK_ERROR)
-  {
+  if (int_status & EHCI_INT_MASK_ERROR) {
     xfer_error_isr(rhport);
     regs->status = EHCI_INT_MASK_ERROR; // Acknowledge
   }
 
   //------------- some QTD/SITD/ITD with IOC set is completed -------------//
-  if (int_status & EHCI_INT_MASK_NXP_ASYNC)
-  {
+  if (int_status & EHCI_INT_MASK_NXP_ASYNC) {
     async_list_xfer_complete_isr(qhd_async_head(rhport));
     regs->status = EHCI_INT_MASK_NXP_ASYNC; // Acknowledge
   }

From 27acaa013bd8af8ac29e966d7dc145b33dd6bc73 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 18 May 2023 15:44:08 +0700
Subject: [PATCH 336/691] refactor ehci, since usbh only queue 1 TD per queue
 head

---
 src/portable/ehci/ehci.c | 117 ++++++++++++---------------------------
 src/portable/ehci/ehci.h |  16 +-----
 2 files changed, 39 insertions(+), 94 deletions(-)

diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 0b45d7b93..a08731667 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -156,9 +156,6 @@ static inline ehci_qhd_t* qhd_get_from_addr (uint8_t dev_addr, uint8_t ep_addr);
 static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);
 
 static inline ehci_qtd_t* qtd_find_free (void);
-static inline ehci_qtd_t* qtd_next (ehci_qtd_t const * p_qtd);
-static inline void qtd_insert_to_qhd (ehci_qhd_t *p_qhd, ehci_qtd_t *p_qtd_new);
-static inline void qtd_remove_1st_from_qhd (ehci_qhd_t *p_qhd);
 static void qtd_init (ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes);
 
 static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type);
@@ -473,11 +470,8 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
   hcd_dcache_clean((void *) setup_packet, 8);
   hcd_dcache_clean_invalidate(td, sizeof(ehci_qtd_t));
 
-  // sw region
-  qhd->p_qtd_list_head = td;
-  qhd->p_qtd_list_tail = td;
-
   // attach TD
+  qhd->p_attached_qtd = td; // software management
   qhd->qtd_overlay.next.address = (uint32_t) td;
 
   hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
@@ -501,7 +495,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
 
     qtd_init(qtd, buffer, buflen);
 
-    // first first data toggle is always 1 (data & setup stage)
+    // first data toggle is always 1 (data & setup stage)
     qtd->data_toggle = 1;
     qtd->pid = dir ? EHCI_PID_IN : EHCI_PID_OUT;
   } else {
@@ -521,11 +515,8 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
   }
   hcd_dcache_clean_invalidate(qtd, sizeof(ehci_qtd_t));
 
-  // Software: assign TD to QHD
-  qhd->p_qtd_list_head = qtd;
-  qhd->p_qtd_list_tail = qtd;
-
   // attach TD to QHD start transferring
+  qhd->p_attached_qtd = qtd; // software management
   qhd->qtd_overlay.next.address = (uint32_t) qtd;
 
   hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
@@ -580,27 +571,25 @@ void port_connect_status_change_isr(uint8_t rhport)
 TU_ATTR_ALWAYS_INLINE static inline
 void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd)
 {
-  // free all TDs from the head td to the first active TD
-  while(p_qhd->p_qtd_list_head != NULL && !p_qhd->p_qtd_list_head->active)
-  {
-    ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) p_qhd->p_qtd_list_head;
-    hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
+  // examine TD attached to queue head
+  ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) p_qhd->p_attached_qtd;
+  if (qtd == NULL) return; // no TD attached
+  hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
 
-    bool const is_ioc = (qtd->int_on_complete != 0);
-    uint8_t const ep_addr = tu_edpt_addr(p_qhd->ep_number, qtd->pid == EHCI_PID_IN ? 1 : 0);
-
-    p_qhd->total_xferred_bytes += qtd->expected_bytes - qtd->total_bytes;
-
-    // TD need to be freed and removed from qhd, before invoking callback
-    qtd->used = 0; // free QTD
-    qtd_remove_1st_from_qhd(p_qhd);
-
-    if (is_ioc)
-    {
-      hcd_event_xfer_complete(p_qhd->dev_addr, ep_addr, p_qhd->total_xferred_bytes, XFER_RESULT_SUCCESS, true);
-      p_qhd->total_xferred_bytes = 0;
-    }
+  // TD is still active, no need to process
+  if (qtd->active) {
+    return;
   }
+
+  uint32_t const xferred_bytes = qtd->expected_bytes - qtd->total_bytes;
+  uint8_t const ep_addr = tu_edpt_addr(p_qhd->ep_number, qtd->pid == EHCI_PID_IN ? 1 : 0);
+
+  // remove and free TD before invoking callback
+  p_qhd->p_attached_qtd = NULL;
+  qtd->used = 0; // free QTD
+
+  // IOC is always set
+  hcd_event_xfer_complete(p_qhd->dev_addr, ep_addr, xferred_bytes, XFER_RESULT_SUCCESS, true);
 }
 
 TU_ATTR_ALWAYS_INLINE static inline
@@ -685,20 +674,17 @@ void qhd_xfer_error_isr(ehci_qhd_t * p_qhd)
 //      while(1){}
 //    }
 
-    ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) p_qhd->p_qtd_list_head;
+    ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) p_qhd->p_attached_qtd;
     TU_ASSERT(qtd, ); // No TD yet, probably a race condition or cache issue !?
 
     hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
-    p_qhd->total_xferred_bytes += qtd->expected_bytes - qtd->total_bytes;
+    uint32_t const xferred_bytes = qtd->expected_bytes - qtd->total_bytes;
 
+    p_qhd->p_attached_qtd = NULL;
     qtd->used = 0; // free QTD
-    qtd_remove_1st_from_qhd(p_qhd);
 
     if ( 0 == p_qhd->ep_number ) {
-      // control cannot be halted --> clear all qtd list
-      p_qhd->p_qtd_list_head = NULL;
-      p_qhd->p_qtd_list_tail = NULL;
-
+      // control cannot be halted
       p_qhd->qtd_overlay.next.terminate      = 1;
       p_qhd->qtd_overlay.alternate.terminate = 1;
       p_qhd->qtd_overlay.halted              = 0;
@@ -707,19 +693,17 @@ void qhd_xfer_error_isr(ehci_qhd_t * p_qhd)
       p_setup->used = 0;
     }
 
-    // call USBH callback
+    // notify usbh
     uint8_t const ep_addr = tu_edpt_addr(p_qhd->ep_number, p_qhd->pid == EHCI_PID_IN ? 1 : 0);
-    hcd_event_xfer_complete(p_qhd->dev_addr, ep_addr, p_qhd->total_xferred_bytes, xfer_result, true);
-
-    p_qhd->total_xferred_bytes = 0;
+    hcd_event_xfer_complete(p_qhd->dev_addr, ep_addr, xferred_bytes, xfer_result, true);
   }
 }
 
 TU_ATTR_ALWAYS_INLINE static inline
-void xfer_error_isr(uint8_t hostid)
+void xfer_error_isr(uint8_t rhport)
 {
   //------------- async list -------------//
-  ehci_qhd_t * const async_head = qhd_async_head(hostid);
+  ehci_qhd_t * const async_head = qhd_async_head(rhport);
   ehci_qhd_t *p_qhd = async_head;
   do
   {
@@ -729,10 +713,10 @@ void xfer_error_isr(uint8_t hostid)
   }while(p_qhd != async_head); // async list traversal, stop if loop around
 
   //------------- TODO refractor period list -------------//
-  uint32_t const period_1ms_addr = (uint32_t) get_period_head(hostid, 1u);
+  uint32_t const period_1ms_addr = (uint32_t) get_period_head(rhport, 1u);
   for (uint32_t interval_ms=1; interval_ms <= FRAMELIST_SIZE; interval_ms *= 2)
   {
-    ehci_link_t next_item = * get_period_head(hostid, interval_ms);
+    ehci_link_t next_item = * get_period_head(rhport, interval_ms);
 
     // TODO abstract max loop guard for period
     while( !next_item.terminate &&
@@ -873,34 +857,6 @@ static inline ehci_qtd_t* qtd_find_free(void)
   return NULL;
 }
 
-static inline ehci_qtd_t* qtd_next(ehci_qtd_t const * p_qtd )
-{
-  return (ehci_qtd_t*) tu_align32(p_qtd->next.address);
-}
-
-static inline void qtd_remove_1st_from_qhd(ehci_qhd_t *p_qhd)
-{
-  if (p_qhd->p_qtd_list_head == p_qhd->p_qtd_list_tail) // last TD --> make it NULL
-  {
-    p_qhd->p_qtd_list_head = p_qhd->p_qtd_list_tail = NULL;
-  }else
-  {
-    p_qhd->p_qtd_list_head = qtd_next( p_qhd->p_qtd_list_head );
-  }
-}
-
-static inline void qtd_insert_to_qhd(ehci_qhd_t *p_qhd, ehci_qtd_t *p_qtd_new)
-{
-  if (p_qhd->p_qtd_list_head == NULL) // empty list
-  {
-    p_qhd->p_qtd_list_head               = p_qhd->p_qtd_list_tail = p_qtd_new;
-  }else
-  {
-    p_qhd->p_qtd_list_tail->next.address = (uint32_t) p_qtd_new;
-    p_qhd->p_qtd_list_tail               = p_qtd_new;
-  }
-}
-
 static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc)
 {
   // address 0 is used as async head, which always on the list --> cannot be cleared (ehci halted otherwise)
@@ -955,15 +911,14 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c
     p_qhd->int_smask = p_qhd->fl_int_cmask = 0;
   }
 
-  p_qhd->fl_hub_addr     = devtree_info.hub_addr;
-  p_qhd->fl_hub_port     = devtree_info.hub_port;
-  p_qhd->mult            = 1; // TODO not use high bandwidth/park mode yet
+  p_qhd->fl_hub_addr    = devtree_info.hub_addr;
+  p_qhd->fl_hub_port    = devtree_info.hub_port;
+  p_qhd->mult           = 1; // TODO not use high bandwidth/park mode yet
 
   //------------- HCD Management Data -------------//
-  p_qhd->used            = 1;
-  p_qhd->removing        = 0;
-  p_qhd->p_qtd_list_head = NULL;
-  p_qhd->p_qtd_list_tail = NULL;
+  p_qhd->used           = 1;
+  p_qhd->removing       = 0;
+  p_qhd->p_attached_qtd = NULL;
   p_qhd->pid = tu_edpt_dir(ep_desc->bEndpointAddress) ? EHCI_PID_IN : EHCI_PID_OUT; // PID for TD under this endpoint
 
   //------------- active, but no TD list -------------//
diff --git a/src/portable/ehci/ehci.h b/src/portable/ehci/ehci.h
index d7d37d627..b525131c6 100644
--- a/src/portable/ehci/ehci.h
+++ b/src/portable/ehci/ehci.h
@@ -164,12 +164,10 @@ typedef struct TU_ATTR_ALIGNED(32)
 	uint8_t pid;
 	uint8_t interval_ms; // polling interval in frames (or millisecond)
 
-	uint16_t total_xferred_bytes; // number of bytes xferred until a qtd with ioc bit set
-	uint8_t reserved2[2];
+	uint8_t TU_RESERVED[8];
 
-  // TODO USBH will only queue 1 TD per QHD, thus we can remove the list
-	ehci_qtd_t * volatile p_qtd_list_head;	// head of the scheduled TD list
-	ehci_qtd_t * volatile p_qtd_list_tail;	// tail of the scheduled TD list
+  // usbh will only queue 1 TD per QHD
+	ehci_qtd_t * volatile p_attached_qtd;
 } ehci_qhd_t;
 
 TU_VERIFY_STATIC( sizeof(ehci_qhd_t) == 64, "size is not correct" );
@@ -248,14 +246,6 @@ typedef struct TU_ATTR_ALIGNED(32)
 	/// Word 4-5: Buffer Pointer List
 	uint32_t buffer[2];		// buffer[1] TP: Transaction Position - T-Count: Transaction Count
 
-// 	union{
-// 		uint32_t BufferPointer1;
-// 		struct  {
-// 			volatile uint32_t TCount : 3;
-// 			volatile uint32_t TPosition : 2;
-// 		};
-// 	};
-
 	/*---------- Word 6 ----------*/
 	ehci_link_t back;
 

From ec4bd39a9209f37b02edac2f6a1ea2ef27f6b785 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 18 May 2023 16:41:06 +0700
Subject: [PATCH 337/691] refactor ehci: add attached_buffer for dcache
 invalidate for IN transfer

---
 src/portable/ehci/ehci.c | 116 ++++++++++++++++++++++-----------------
 src/portable/ehci/ehci.h |   8 ++-
 2 files changed, 72 insertions(+), 52 deletions(-)

diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index a08731667..cc825d549 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -154,6 +154,7 @@ static inline ehci_qhd_t* qhd_next (ehci_qhd_t const * p_qhd);
 static inline ehci_qhd_t* qhd_find_free (void);
 static inline ehci_qhd_t* qhd_get_from_addr (uint8_t dev_addr, uint8_t ep_addr);
 static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);
+static void qhd_attach_qtd(ehci_qhd_t *qhd, ehci_qtd_t *qtd);
 
 static inline ehci_qtd_t* qtd_find_free (void);
 static void qtd_init (ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes);
@@ -468,13 +469,9 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
   td->pid = EHCI_PID_SETUP;
 
   hcd_dcache_clean((void *) setup_packet, 8);
-  hcd_dcache_clean_invalidate(td, sizeof(ehci_qtd_t));
 
-  // attach TD
-  qhd->p_attached_qtd = td; // software management
-  qhd->qtd_overlay.next.address = (uint32_t) td;
-
-  hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
+  // attach TD to QHD -> start transferring
+  qhd_attach_qtd(qhd, td);
 
   return true;
 }
@@ -513,13 +510,9 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
   }else {
     hcd_dcache_clean(buffer, buflen);
   }
-  hcd_dcache_clean_invalidate(qtd, sizeof(ehci_qtd_t));
 
-  // attach TD to QHD start transferring
-  qhd->p_attached_qtd = qtd; // software management
-  qhd->qtd_overlay.next.address = (uint32_t) qtd;
-
-  hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
+  // attach TD to QHD -> start transferring
+  qhd_attach_qtd(qhd, qtd);
 
   return true;
 }
@@ -569,10 +562,9 @@ void port_connect_status_change_isr(uint8_t rhport)
 }
 
 TU_ATTR_ALWAYS_INLINE static inline
-void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd)
-{
+void qhd_xfer_complete_isr(ehci_qhd_t * qhd) {
   // examine TD attached to queue head
-  ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) p_qhd->p_attached_qtd;
+  ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) qhd->attached_qtd;
   if (qtd == NULL) return; // no TD attached
   hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
 
@@ -581,15 +573,22 @@ void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd)
     return;
   }
 
+  uint8_t dir = (qtd->pid == EHCI_PID_IN) ? 1 : 0;
   uint32_t const xferred_bytes = qtd->expected_bytes - qtd->total_bytes;
-  uint8_t const ep_addr = tu_edpt_addr(p_qhd->ep_number, qtd->pid == EHCI_PID_IN ? 1 : 0);
+
+  // invalidate dcache if IN transfer
+  if (dir == 1 && qhd->attached_buffer != 0) {
+    hcd_dcache_invalidate((void*) qhd->attached_buffer, xferred_bytes);
+  }
 
   // remove and free TD before invoking callback
-  p_qhd->p_attached_qtd = NULL;
+  qhd->attached_qtd = NULL;
+  qhd->attached_buffer = 0;
   qtd->used = 0; // free QTD
 
-  // IOC is always set
-  hcd_event_xfer_complete(p_qhd->dev_addr, ep_addr, xferred_bytes, XFER_RESULT_SUCCESS, true);
+  // notify usbh
+  uint8_t const ep_addr = tu_edpt_addr(qhd->ep_number, dir);
+  hcd_event_xfer_complete(qhd->dev_addr, ep_addr, xferred_bytes, XFER_RESULT_SUCCESS, true);
 }
 
 TU_ATTR_ALWAYS_INLINE static inline
@@ -651,10 +650,11 @@ void period_list_xfer_complete_isr(uint8_t rhport, uint32_t interval_ms)
   }
 }
 
+// TODO merge with qhd_xfer_complete_isr()
 TU_ATTR_ALWAYS_INLINE static inline
-void qhd_xfer_error_isr(ehci_qhd_t * p_qhd)
+void qhd_xfer_error_isr(ehci_qhd_t * qhd)
 {
-  volatile ehci_qtd_t *qtd_overlay = &p_qhd->qtd_overlay;
+  volatile ehci_qtd_t *qtd_overlay = &qhd->qtd_overlay;
 
   // TD has error
   if (qtd_overlay->halted) {
@@ -674,28 +674,37 @@ void qhd_xfer_error_isr(ehci_qhd_t * p_qhd)
 //      while(1){}
 //    }
 
-    ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) p_qhd->p_attached_qtd;
+    ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) qhd->attached_qtd;
     TU_ASSERT(qtd, ); // No TD yet, probably a race condition or cache issue !?
 
     hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
+
+    uint8_t dir = (qtd->pid == EHCI_PID_IN) ? 1 : 0;
     uint32_t const xferred_bytes = qtd->expected_bytes - qtd->total_bytes;
 
-    p_qhd->p_attached_qtd = NULL;
+    // invalidate dcache if IN transfer
+    if (dir == 1 && qhd->attached_buffer != 0) {
+      hcd_dcache_invalidate((void*) qhd->attached_buffer, xferred_bytes);
+    }
+
+    // remove and free TD before invoking callback
+    qhd->attached_qtd = NULL;
+    qhd->attached_buffer = 0;
     qtd->used = 0; // free QTD
 
-    if ( 0 == p_qhd->ep_number ) {
+    if (0 == qhd->ep_number ) {
       // control cannot be halted
-      p_qhd->qtd_overlay.next.terminate      = 1;
-      p_qhd->qtd_overlay.alternate.terminate = 1;
-      p_qhd->qtd_overlay.halted              = 0;
+      qhd->qtd_overlay.next.terminate      = 1;
+      qhd->qtd_overlay.alternate.terminate = 1;
+      qhd->qtd_overlay.halted              = 0;
 
-      ehci_qtd_t *p_setup = qtd_control(p_qhd->dev_addr);
+      ehci_qtd_t *p_setup = qtd_control(qhd->dev_addr);
       p_setup->used = 0;
     }
 
     // notify usbh
-    uint8_t const ep_addr = tu_edpt_addr(p_qhd->ep_number, p_qhd->pid == EHCI_PID_IN ? 1 : 0);
-    hcd_event_xfer_complete(p_qhd->dev_addr, ep_addr, xferred_bytes, xfer_result, true);
+    uint8_t const ep_addr = tu_edpt_addr(qhd->ep_number, dir);
+    hcd_event_xfer_complete(qhd->dev_addr, ep_addr, xferred_bytes, xfer_result, true);
   }
 }
 
@@ -846,22 +855,10 @@ static inline ehci_qhd_t* qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr)
   return NULL;
 }
 
-//------------- TD helper -------------//
-static inline ehci_qtd_t* qtd_find_free(void)
-{
-  for (uint32_t i=0; i<QTD_MAX; i++)
-  {
-    if ( !ehci_data.qtd_pool[i].used ) return &ehci_data.qtd_pool[i];
-  }
-
-  return NULL;
-}
-
 static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc)
 {
   // address 0 is used as async head, which always on the list --> cannot be cleared (ehci halted otherwise)
-  if (dev_addr != 0)
-  {
+  if (dev_addr != 0) {
     tu_memclr(p_qhd, sizeof(ehci_qhd_t));
   }
 
@@ -911,26 +908,47 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c
     p_qhd->int_smask = p_qhd->fl_int_cmask = 0;
   }
 
-  p_qhd->fl_hub_addr    = devtree_info.hub_addr;
-  p_qhd->fl_hub_port    = devtree_info.hub_port;
-  p_qhd->mult           = 1; // TODO not use high bandwidth/park mode yet
+  p_qhd->fl_hub_addr  = devtree_info.hub_addr;
+  p_qhd->fl_hub_port  = devtree_info.hub_port;
+  p_qhd->mult         = 1; // TODO not use high bandwidth/park mode yet
 
   //------------- HCD Management Data -------------//
-  p_qhd->used           = 1;
-  p_qhd->removing       = 0;
-  p_qhd->p_attached_qtd = NULL;
+  p_qhd->used         = 1;
+  p_qhd->removing     = 0;
+  p_qhd->attached_qtd = NULL;
   p_qhd->pid = tu_edpt_dir(ep_desc->bEndpointAddress) ? EHCI_PID_IN : EHCI_PID_OUT; // PID for TD under this endpoint
 
   //------------- active, but no TD list -------------//
   p_qhd->qtd_overlay.halted              = 0;
   p_qhd->qtd_overlay.next.terminate      = 1;
   p_qhd->qtd_overlay.alternate.terminate = 1;
+
   if (TUSB_XFER_BULK == xfer_type && p_qhd->ep_speed == TUSB_SPEED_HIGH && p_qhd->pid == EHCI_PID_OUT)
   {
     p_qhd->qtd_overlay.ping_err = 1; // do PING for Highspeed Bulk OUT, EHCI section 4.11
   }
 }
 
+static void qhd_attach_qtd(ehci_qhd_t *qhd, ehci_qtd_t *qtd) {
+  qhd->attached_qtd = qtd;
+  qhd->attached_buffer = qtd->buffer[0];
+
+  // clean and invalidate cache before physically write
+  hcd_dcache_clean_invalidate(qtd, sizeof(ehci_qtd_t));
+
+  qhd->qtd_overlay.next.address = (uint32_t) qtd;
+  hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
+}
+
+
+//------------- TD helper -------------//
+static inline ehci_qtd_t *qtd_find_free(void) {
+  for (uint32_t i = 0; i < QTD_MAX; i++) {
+    if (!ehci_data.qtd_pool[i].used) return &ehci_data.qtd_pool[i];
+  }
+  return NULL;
+}
+
 static void qtd_init(ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes)
 {
   tu_memclr(qtd, sizeof(ehci_qtd_t));
diff --git a/src/portable/ehci/ehci.h b/src/portable/ehci/ehci.h
index b525131c6..8338fb419 100644
--- a/src/portable/ehci/ehci.h
+++ b/src/portable/ehci/ehci.h
@@ -164,10 +164,12 @@ typedef struct TU_ATTR_ALIGNED(32)
 	uint8_t pid;
 	uint8_t interval_ms; // polling interval in frames (or millisecond)
 
-	uint8_t TU_RESERVED[8];
+	uint8_t TU_RESERVED[4];
 
-  // usbh will only queue 1 TD per QHD
-	ehci_qtd_t * volatile p_attached_qtd;
+  // Attached TD management, note usbh will only queue 1 TD per QHD.
+  // buffer for dcache invalidate since td's buffer is modified by HC and finding initial buffer address is not trivial
+  uint32_t attached_buffer;
+	ehci_qtd_t * volatile attached_qtd;
 } ehci_qhd_t;
 
 TU_VERIFY_STATIC( sizeof(ehci_qhd_t) == 64, "size is not correct" );

From f22d8ee3b93000769ac8d177cd29467c81143f5e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 18 May 2023 16:46:02 +0700
Subject: [PATCH 338/691] add rt1060 jlink config

---
 .idea/runConfigurations/rt1060_jlink.xml | 10 ++++++++++
 1 file changed, 10 insertions(+)
 create mode 100644 .idea/runConfigurations/rt1060_jlink.xml

diff --git a/.idea/runConfigurations/rt1060_jlink.xml b/.idea/runConfigurations/rt1060_jlink.xml
new file mode 100644
index 000000000..eabadaf59
--- /dev/null
+++ b/.idea/runConfigurations/rt1060_jlink.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="rt1060 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1062xxx5A&quot; -if swd -speed 8000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="host_hid_to_device_cdc" TARGET_NAME="host_hid_to_device_cdc" CONFIG_NAME="rt1060 evk" version="1" RUN_TARGET_PROJECT_NAME="host_hid_to_device_cdc" RUN_TARGET_NAME="host_hid_to_device_cdc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file

From f26a93908ef9dcde6818c9b271727ed6c77e87d8 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 19 May 2023 10:56:52 +0700
Subject: [PATCH 339/691] only clean/invalidate dcache on imxrt if memory is
 not in DTCM

---
 src/portable/chipidea/ci_hs/hcd_ci_hs.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
index ecb1a621c..ab6a42e11 100644
--- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
@@ -42,17 +42,28 @@
 #if CFG_TUSB_MCU == OPT_MCU_MIMXRT
   #include "ci_hs_imxrt.h"
 
+  // check if memory is cacheable i.e not in DTCM
+  TU_ATTR_ALWAYS_INLINE static inline bool is_cache_mem(uint32_t addr) {
+    return !(0x20000000 <= addr && addr < 0x20100000);
+  }
+
   void hcd_dcache_clean(void* addr, uint32_t data_size) {
-    SCB_CleanDCache_by_Addr((uint32_t*) addr, (int32_t) data_size);
+    if (is_cache_mem((uint32_t) addr)) {
+      SCB_CleanDCache_by_Addr((uint32_t *) addr, (int32_t) data_size);
+    }
   }
 
   void hcd_dcache_invalidate(void* addr, uint32_t data_size) {
-    SCB_InvalidateDCache_by_Addr(addr, (int32_t) data_size);
+    if (is_cache_mem((uint32_t) addr)) {
+      SCB_InvalidateDCache_by_Addr(addr, (int32_t) data_size);
+    }
   }
 
 void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) {
+  if (is_cache_mem((uint32_t) addr)) {
     SCB_CleanInvalidateDCache_by_Addr(addr, (int32_t) data_size);
   }
+}
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
   #include "ci_hs_lpc18_43.h"

From 5dae5e12928ba789cd7e248edd9fa91376902925 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 19 May 2023 13:32:49 +0700
Subject: [PATCH 340/691] ehci fix dcache clean when control endpoint failed

---
 hw/bsp/imxrt/family.cmake |  6 +++++-
 src/host/usbh.c           |  3 ++-
 src/portable/ehci/ehci.c  | 10 ++++------
 src/tusb.c                |  2 +-
 4 files changed, 12 insertions(+), 9 deletions(-)

diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 4628abc34..a475b4721 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -57,12 +57,16 @@ if (NOT TARGET ${BOARD_TARGET})
     )
   update_board(${BOARD_TARGET})
 
+  if (NOT DEFINED LD_FILE_${TOOLCHAIN})
+    set(LD_FILE_gcc ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld)
+  endif ()
+
   if (TOOLCHAIN STREQUAL "gcc")
     target_sources(${BOARD_TARGET} PUBLIC
       ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S
       )
     target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld"
+      "LINKER:--script=${LD_FILE_gcc}"
       "LINKER:-Map=$<IF:$<BOOL:$<TARGET_PROPERTY:OUTPUT_NAME>>,$<TARGET_PROPERTY:OUTPUT_NAME>,$<TARGET_PROPERTY:NAME>>${CMAKE_EXECUTABLE_SUFFIX}.map"
       # nanolib
       --specs=nosys.specs
diff --git a/src/host/usbh.c b/src/host/usbh.c
index c56ff9459..7b265c742 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -440,7 +440,7 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr)
         uint8_t const epnum   = tu_edpt_number(ep_addr);
         uint8_t const ep_dir  = tu_edpt_dir(ep_addr);
 
-        TU_LOG_USBH("on EP %02X with %u bytes %s\r\n", ep_addr, (unsigned int) event.xfer_complete.len,
+        TU_LOG_USBH("on EP %02X with %u bytes: %s\r\n", ep_addr, (unsigned int) event.xfer_complete.len,
                     tu_str_xfer_result[event.xfer_complete.result]);
 
         if (event.dev_addr == 0)
@@ -1255,6 +1255,7 @@ static void process_enumeration(tuh_xfer_t* xfer)
     {
       failed_count++;
       osal_task_delay(ATTEMPT_DELAY_MS); // delay a bit
+      TU_LOG1("Enumeration attempt %u\r\n", failed_count);
       TU_ASSERT(tuh_control_xfer(xfer), );
     }else
     {
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index cc825d549..10e2db7b5 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -577,7 +577,7 @@ void qhd_xfer_complete_isr(ehci_qhd_t * qhd) {
   uint32_t const xferred_bytes = qtd->expected_bytes - qtd->total_bytes;
 
   // invalidate dcache if IN transfer
-  if (dir == 1 && qhd->attached_buffer != 0) {
+  if (dir == 1 && qhd->attached_buffer != 0 && xferred_bytes > 0) {
     hcd_dcache_invalidate((void*) qhd->attached_buffer, xferred_bytes);
   }
 
@@ -660,7 +660,7 @@ void qhd_xfer_error_isr(ehci_qhd_t * qhd)
   if (qtd_overlay->halted) {
     xfer_result_t xfer_result;
 
-    if (qtd_overlay->err_count == 0 || qtd_overlay->buffer_err || qtd_overlay->babble_err || qtd_overlay->xact_err) {
+    if (qtd_overlay->xact_err || qtd_overlay->err_count == 0 || qtd_overlay->buffer_err || qtd_overlay->babble_err) {
       // Error count = 0 often occurs when device disconnected, or other bus-related error
       xfer_result = XFER_RESULT_FAILED;
     }else {
@@ -671,7 +671,6 @@ void qhd_xfer_error_isr(ehci_qhd_t * qhd)
 //    if (XFER_RESULT_FAILED == xfer_result ) {
 //      TU_LOG1("  QHD xfer err count: %d\n", qtd_overlay->err_count);
 //      TU_BREAKPOINT(); // TODO skip unplugged device
-//      while(1){}
 //    }
 
     ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) qhd->attached_qtd;
@@ -683,7 +682,7 @@ void qhd_xfer_error_isr(ehci_qhd_t * qhd)
     uint32_t const xferred_bytes = qtd->expected_bytes - qtd->total_bytes;
 
     // invalidate dcache if IN transfer
-    if (dir == 1 && qhd->attached_buffer != 0) {
+    if (dir == 1 && qhd->attached_buffer != 0 && xferred_bytes > 0) {
       hcd_dcache_invalidate((void*) qhd->attached_buffer, xferred_bytes);
     }
 
@@ -698,8 +697,7 @@ void qhd_xfer_error_isr(ehci_qhd_t * qhd)
       qhd->qtd_overlay.alternate.terminate = 1;
       qhd->qtd_overlay.halted              = 0;
 
-      ehci_qtd_t *p_setup = qtd_control(qhd->dev_addr);
-      p_setup->used = 0;
+      hcd_dcache_clean(qhd, sizeof(ehci_qhd_t));
     }
 
     // notify usbh
diff --git a/src/tusb.c b/src/tusb.c
index 7327db685..465b608b0 100644
--- a/src/tusb.c
+++ b/src/tusb.c
@@ -440,7 +440,7 @@ char const* const tu_str_std_request[] =
 };
 
 char const* const tu_str_xfer_result[] = {
-    "OK", "Failed", "Stalled", "Timeout"
+    "OK", "FAILED", "STALLED", "TIMEOUT"
 };
 
 #endif

From 7211dd18b46affdf027522e34ff3aa3b5d8d5df5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 19 May 2023 13:42:26 +0700
Subject: [PATCH 341/691] more dcache fix

---
 src/portable/ehci/ehci.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 10e2db7b5..852e7f4fe 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -273,19 +273,19 @@ static void list_remove_qhd_by_daddr(ehci_link_t* list_head, uint8_t dev_addr) {
 }
 
 // Close all opened endpoint belong to this device
-void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
+void hcd_device_close(uint8_t rhport, uint8_t daddr)
 {
   // skip dev0
-  if (dev_addr == 0) {
+  if (daddr == 0) {
     return;
   }
 
   // Remove from async list
-  list_remove_qhd_by_daddr((ehci_link_t *) qhd_async_head(rhport), dev_addr);
+  list_remove_qhd_by_daddr((ehci_link_t *) qhd_async_head(rhport), daddr);
 
   // Remove from all interval period list
   for(uint8_t i = 0; i < TU_ARRAY_SIZE(ehci_data.period_head_arr); i++) {
-    list_remove_qhd_by_daddr((ehci_link_t *) &ehci_data.period_head_arr[i], dev_addr);
+    list_remove_qhd_by_daddr((ehci_link_t *) &ehci_data.period_head_arr[i], daddr);
   }
 
   // Async doorbell (EHCI 4.8.2 for operational details)
@@ -453,7 +453,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
   list_insert(list_head, (ehci_link_t*) p_qhd, EHCI_QTYPE_QHD);
 
   hcd_dcache_clean(p_qhd, sizeof(ehci_qhd_t));
-  hcd_dcache_clean(list_head, sizeof(ehci_link_t));
+  hcd_dcache_clean(list_head, sizeof(ehci_qhd_t));
 
   return true;
 }

From e8dd200fed6adeebd98ebc7abf09d45285da7abf Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 19 May 2023 14:46:39 +0700
Subject: [PATCH 342/691] move cmake folder to tools/

---
 .idea/vcs.xml                                 | 61 -------------------
 hw/bsp/imxrt/family.cmake                     |  8 +--
 hw/bsp/lpc55/family.cmake                     | 13 ++--
 hw/bsp/nrf/family.cmake                       |  3 +-
 .../cmake/cpu/cortex-m33.cmake                |  0
 {examples => tools}/cmake/cpu/cortex-m4.cmake |  0
 {examples => tools}/cmake/cpu/cortex-m7.cmake |  0
 .../cmake/toolchain/arm_gcc.cmake             |  0
 .../cmake/toolchain/set_flags.cmake           |  0
 9 files changed, 12 insertions(+), 73 deletions(-)
 rename {examples => tools}/cmake/cpu/cortex-m33.cmake (100%)
 rename {examples => tools}/cmake/cpu/cortex-m4.cmake (100%)
 rename {examples => tools}/cmake/cpu/cortex-m7.cmake (100%)
 rename {examples => tools}/cmake/toolchain/arm_gcc.cmake (100%)
 rename {examples => tools}/cmake/toolchain/set_flags.cmake (100%)

diff --git a/.idea/vcs.xml b/.idea/vcs.xml
index 63371256f..94a25f7f4 100644
--- a/.idea/vcs.xml
+++ b/.idea/vcs.xml
@@ -1,67 +1,6 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <project version="4">
   <component name="VcsDirectoryMappings">
-    <mapping directory="$PROJECT_DIR$/../pico/pico-sdk" vcs="Git" />
     <mapping directory="$PROJECT_DIR$" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/allwinner" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/bridgetek/ft9xx/ft90x-sdk" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/broadcom" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/gd/nuclei-sdk" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/infineon/mtb-xmclib-cat3" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/microchip" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/mindmotion/mm32sdk" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/nordic/nrfx" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/nuvoton" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/nxp/lpcopen" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/nxp/mcux-sdk" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/nxp/nxp_sdk" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/Pico-PIO-USB" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/pico-sdk" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/pico-sdk/lib/btstack" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/pico-sdk/lib/cyw43-driver" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/pico-sdk/lib/lwip" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/pico-sdk/lib/mbedtls" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/raspberry_pi/pico-sdk/lib/tinyusb" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/renesas/fsp" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/renesas/rx" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/silabs/cmsis-dfp-efm32gg12b" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/sony/cxd56/spresense-exported-sdk" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_f0" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_f1" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_f2" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_f3" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_f4" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_f7" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_g0" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_g4" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_h7" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_l0" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_l1" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_l4" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_l5" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_u5" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/cmsis_device_wb" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32f0xx_hal_driver" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32f1xx_hal_driver" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32f2xx_hal_driver" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32f3xx_hal_driver" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32f4xx_hal_driver" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32f7xx_hal_driver" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32g0xx_hal_driver" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32g4xx_hal_driver" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32h7xx_hal_driver" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32l0xx_hal_driver" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32l1xx_hal_driver" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32l4xx_hal_driver" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32l5xx_hal_driver" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32u5xx_hal_driver" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/st/stm32wbxx_hal_driver" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/ti" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/hw/mcu/wch/ch32v307" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/lib/CMSIS_5" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/lib/FreeRTOS-Kernel" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/lib/lwip" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/lib/sct_neopixel" vcs="Git" />
-    <mapping directory="$PROJECT_DIR$/tools/uf2" vcs="Git" />
   </component>
 </project>
\ No newline at end of file
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index a475b4721..e9be7acc8 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -8,9 +8,12 @@ if (NOT BOARD)
   message(FATAL_ERROR "BOARD not specified")
 endif ()
 
+# TOP is path to root directory
+set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
+
 # toolchain set up
 set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
-set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_LIST_DIR}/../../../examples/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS MIMXRT CACHE INTERNAL "")
 
@@ -24,9 +27,6 @@ include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 # only need to be built ONCE for all examples
 set(BOARD_TARGET board_${BOARD})
 if (NOT TARGET ${BOARD_TARGET})
-  # TOP is path to root directory
-  set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
-
   set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
   set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
 
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index 0ac2b6ce3..439f54170 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -8,9 +8,14 @@ if (NOT BOARD)
   message(FATAL_ERROR "BOARD not specified")
 endif ()
 
+# TOP is path to root directory
+set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
+set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
+set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
+
 # toolchain set up
 set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
-set(CMAKE_TOOLCHAIN_FILE ${CMAKE_CURRENT_LIST_DIR}/../../../examples/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS LPC55XX CACHE INTERNAL "")
 
@@ -24,12 +29,6 @@ include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 # only need to be built ONCE for all examples
 set(BOARD_TARGET board_${BOARD})
 if (NOT TARGET ${BOARD_TARGET})
-  # TOP is path to root directory
-  set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
-
-  set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
-  set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
-
   add_library(${BOARD_TARGET} STATIC
     # external driver
     #lib/sct_neopixel/sct_neopixel.c
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index c8faa23cc..ca28c4f5d 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -25,10 +25,11 @@ else ()
   set(JLINK_DEVICE ${MCU_VARIANT}_xxaa)
 endif ()
 
-set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS NRF5X CACHE INTERNAL "")
 
+
 #------------------------------------
 # BOARD_TARGET
 #------------------------------------
diff --git a/examples/cmake/cpu/cortex-m33.cmake b/tools/cmake/cpu/cortex-m33.cmake
similarity index 100%
rename from examples/cmake/cpu/cortex-m33.cmake
rename to tools/cmake/cpu/cortex-m33.cmake
diff --git a/examples/cmake/cpu/cortex-m4.cmake b/tools/cmake/cpu/cortex-m4.cmake
similarity index 100%
rename from examples/cmake/cpu/cortex-m4.cmake
rename to tools/cmake/cpu/cortex-m4.cmake
diff --git a/examples/cmake/cpu/cortex-m7.cmake b/tools/cmake/cpu/cortex-m7.cmake
similarity index 100%
rename from examples/cmake/cpu/cortex-m7.cmake
rename to tools/cmake/cpu/cortex-m7.cmake
diff --git a/examples/cmake/toolchain/arm_gcc.cmake b/tools/cmake/toolchain/arm_gcc.cmake
similarity index 100%
rename from examples/cmake/toolchain/arm_gcc.cmake
rename to tools/cmake/toolchain/arm_gcc.cmake
diff --git a/examples/cmake/toolchain/set_flags.cmake b/tools/cmake/toolchain/set_flags.cmake
similarity index 100%
rename from examples/cmake/toolchain/set_flags.cmake
rename to tools/cmake/toolchain/set_flags.cmake

From 270136e84af4f01c394be17fc0688461cf3d1f1c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 19 May 2023 16:02:26 +0700
Subject: [PATCH 343/691] adding cpu core .mk for makefile

fix cortex m33 for nrf5340 dk
---
 examples/make.mk                    |  3 +++
 hw/bsp/nrf/boards/pca10095/board.mk |  1 +
 hw/bsp/nrf/family.mk                |  9 ++++-----
 tools/make/cpu/cortex-m33.mk        | 11 +++++++++++
 tools/make/cpu/cortex-m4.mk         | 11 +++++++++++
 tools/make/cpu/cortex-m7.mk         | 11 +++++++++++
 6 files changed, 41 insertions(+), 5 deletions(-)
 create mode 100644 tools/make/cpu/cortex-m33.mk
 create mode 100644 tools/make/cpu/cortex-m4.mk
 create mode 100644 tools/make/cpu/cortex-m7.mk

diff --git a/examples/make.mk b/examples/make.mk
index 2ce6fb398..28ebc62da 100644
--- a/examples/make.mk
+++ b/examples/make.mk
@@ -2,6 +2,8 @@
 # Common make definition for all examples
 # ---------------------------------------
 
+TOOLCHAIN ?= gcc
+
 #-------------- TOP and CURRENT_PATH ------------
 
 # Set TOP to be the path to get from the current directory (where make was
@@ -75,6 +77,7 @@ else
 endif
 
 #-------------- Cross Compiler  ------------
+
 # Can be set by board, default to ARM GCC
 CROSS_COMPILE ?= arm-none-eabi-
 
diff --git a/hw/bsp/nrf/boards/pca10095/board.mk b/hw/bsp/nrf/boards/pca10095/board.mk
index 5ad103d62..9c4edbafc 100644
--- a/hw/bsp/nrf/boards/pca10095/board.mk
+++ b/hw/bsp/nrf/boards/pca10095/board.mk
@@ -1,3 +1,4 @@
+CPU_CORE = cortex-m33
 MCU_VARIANT = nrf5340_application
 CFLAGS += -DNRF5340_XXAA -DNRF5340_XXAA_APPLICATION
 
diff --git a/hw/bsp/nrf/family.mk b/hw/bsp/nrf/family.mk
index d5042a160..13258c9e0 100644
--- a/hw/bsp/nrf/family.mk
+++ b/hw/bsp/nrf/family.mk
@@ -3,13 +3,12 @@ DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/nordic/nrfx
 
 include $(TOP)/$(BOARD_PATH)/board.mk
 
+CPU_CORE ?= cortex-m4
+
+include $(TOP)/tools/make/cpu/$(CPU_CORE).mk
+
 CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m4 \
-  -mfloat-abi=hard \
-  -mfpu=fpv4-sp-d16 \
   -DCFG_TUSB_MCU=OPT_MCU_NRF5X \
   -DCONFIG_GPIO_AS_PINRESET
 
diff --git a/tools/make/cpu/cortex-m33.mk b/tools/make/cpu/cortex-m33.mk
new file mode 100644
index 000000000..cae8c6e3a
--- /dev/null
+++ b/tools/make/cpu/cortex-m33.mk
@@ -0,0 +1,11 @@
+ifeq ($(TOOLCHAIN),gcc)
+  CFLAGS += \
+    -mthumb \
+    -mcpu=cortex-m33 \
+    -mfloat-abi=hard \
+    -mfpu=fpv5-d16 \
+
+  #set(FREERTOS_PORT GCC_ARM_CM33_NONSECURE CACHE INTERNAL "")
+else ifeq ($(TOOLCHAIN),iar)
+  # TODO support IAR
+endif
diff --git a/tools/make/cpu/cortex-m4.mk b/tools/make/cpu/cortex-m4.mk
new file mode 100644
index 000000000..7a3e204e2
--- /dev/null
+++ b/tools/make/cpu/cortex-m4.mk
@@ -0,0 +1,11 @@
+ifeq ($(TOOLCHAIN),gcc)
+  CFLAGS += \
+    -mthumb \
+    -mcpu=cortex-m4 \
+    -mfloat-abi=hard \
+    -mfpu=fpv4-sp-d16 \
+
+  #set(FREERTOS_PORT GCC_ARM_CM4F CACHE INTERNAL "")
+else ifeq ($(TOOLCHAIN),iar)
+  # TODO support IAR
+endif
diff --git a/tools/make/cpu/cortex-m7.mk b/tools/make/cpu/cortex-m7.mk
new file mode 100644
index 000000000..47de4e07d
--- /dev/null
+++ b/tools/make/cpu/cortex-m7.mk
@@ -0,0 +1,11 @@
+ifeq ($(TOOLCHAIN),gcc)
+  CFLAGS += \
+    -mthumb \
+    -mcpu=cortex-m7 \
+    -mfloat-abi=hard \
+    -mfpu=fpv5-d16 \
+
+  #set(FREERTOS_PORT GCC_ARM_CM7 CACHE INTERNAL "")
+else ifeq ($(TOOLCHAIN),iar)
+  # TODO support IAR
+endif

From 49d8d27770133ba4fe2f5d5798560e75df7824ce Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 19 May 2023 16:27:07 +0700
Subject: [PATCH 344/691] improve flash target

---
 examples/rules.mk           |  17 +-
 hw/bsp/family_support.cmake | 346 +++++++++++++++++++++---------------
 hw/bsp/imxrt/family.cmake   |  34 +---
 hw/bsp/lpc55/family.cmake   |  17 +-
 hw/bsp/nrf/family.cmake     |  21 +--
 5 files changed, 219 insertions(+), 216 deletions(-)

diff --git a/examples/rules.mk b/examples/rules.mk
index 426000128..f6422092a 100644
--- a/examples/rules.mk
+++ b/examples/rules.mk
@@ -227,14 +227,19 @@ endif
 # Jlink Interface
 JLINK_IF ?= swd
 
+# Jlink script
+define jlink_script
+halt
+loadfile $^
+r
+go
+exit
+endef
+export jlink_script
+
 # Flash using jlink
 flash-jlink: $(BUILD)/$(PROJECT).hex
-	@echo halt > $(BUILD)/$(BOARD).jlink
-	@echo r >> $(BUILD)/$(BOARD).jlink
-	@echo loadfile $^ >> $(BUILD)/$(BOARD).jlink
-	@echo r >> $(BUILD)/$(BOARD).jlink
-	@echo go >> $(BUILD)/$(BOARD).jlink
-	@echo exit >> $(BUILD)/$(BOARD).jlink
+	@echo "$$jlink_script" > $(BUILD)/$(BOARD).jlink
 	$(JLINKEXE) -device $(JLINK_DEVICE) -if $(JLINK_IF) -JTAGConf -1,-1 -speed auto -CommandFile $(BUILD)/$(BOARD).jlink
 
 # Flash STM32 MCU using stlink with STM32 Cube Programmer CLI
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 01e7bb018..442aba955 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -1,149 +1,205 @@
-if (NOT TARGET _family_support_marker)
-    add_library(_family_support_marker INTERFACE)
+if (TARGET _family_support_marker)
+    return()
+endif ()
 
-    include(CMakePrintHelpers)
+add_library(_family_support_marker INTERFACE)
 
-    # Default to gcc
-    if(NOT DEFINED TOOLCHAIN)
-        set(TOOLCHAIN gcc)
-    endif()
+include(CMakePrintHelpers)
 
-    if (NOT FAMILY)
-        message(FATAL_ERROR "You must set a FAMILY variable for the build (e.g. rp2040, eps32s2, esp32s3). You can do this via -DFAMILY=xxx on the cmake command line")
-    endif()
-
-    if (NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake)
-        message(FATAL_ERROR "Family '${FAMILY}' is not known/supported")
-    endif()
-
-    function(family_filter RESULT DIR)
-        get_filename_component(DIR ${DIR} ABSOLUTE BASE_DIR ${CMAKE_CURRENT_SOURCE_DIR})
-
-        if (EXISTS "${DIR}/only.txt")
-            file(READ "${DIR}/only.txt" ONLYS)
-            # Replace newlines with semicolon so that it is treated as a list by CMake
-            string(REPLACE "\n" ";" ONLYS_LINES ${ONLYS})
-            # For each mcu
-            foreach(MCU IN LISTS FAMILY_MCUS)
-                # For each line in only.txt
-                foreach(_line ${ONLYS_LINES})
-                    # If mcu:xxx exists for this mcu or board:xxx then include
-                    if (${_line} STREQUAL "mcu:${MCU}" OR ${_line} STREQUAL "board:${BOARD}")
-                        set(${RESULT} 1 PARENT_SCOPE)
-                        return()
-                    endif()
-                endforeach()
-            endforeach()
-
-            # Didn't find it in only file so don't build
-            set(${RESULT} 0 PARENT_SCOPE)
-
-        elseif (EXISTS "${DIR}/skip.txt")
-            file(READ "${DIR}/skip.txt" SKIPS)
-            # Replace newlines with semicolon so that it is treated as a list by CMake
-            string(REPLACE "\n" ";" SKIPS_LINES ${SKIPS})
-            # For each mcu
-            foreach(MCU IN LISTS FAMILY_MCUS)
-                # For each line in only.txt
-                foreach(_line ${SKIPS_LINES})
-                    # If mcu:xxx exists for this mcu then skip
-                    if (${_line} STREQUAL "mcu:${MCU}")
-                        set(${RESULT} 0 PARENT_SCOPE)
-                        return()
-                    endif()
-                endforeach()
-            endforeach()
-
-            # Didn't find in skip file so build
-            set(${RESULT} 1 PARENT_SCOPE)
-
-        else()
-
-            # Didn't find skip or only file so build
-            set(${RESULT} 1 PARENT_SCOPE)
-
-        endif()
-
-    endfunction()
-
-    function(family_add_subdirectory DIR)
-        family_filter(SHOULD_ADD "${DIR}")
-        if (SHOULD_ADD)
-            add_subdirectory(${DIR})
-        endif()
-    endfunction()
-
-    function(family_get_project_name OUTPUT_NAME DIR)
-        get_filename_component(SHORT_NAME ${DIR} NAME)
-        set(${OUTPUT_NAME} ${TINYUSB_FAMILY_PROJECT_NAME_PREFIX}${SHORT_NAME} PARENT_SCOPE)
-    endfunction()
-
-    function(family_initialize_project PROJECT DIR)
-        family_filter(ALLOWED "${DIR}")
-        if (NOT ALLOWED)
-            get_filename_component(SHORT_NAME ${DIR} NAME)
-            message(FATAL_ERROR "${SHORT_NAME} is not supported on FAMILY=${FAMILY}")
-        endif()
-    endfunction()
-
-    function(family_add_default_example_warnings TARGET)
-        target_compile_options(${TARGET} PUBLIC
-                -Wall
-                -Wextra
-                -Werror
-                -Wfatal-errors
-                -Wdouble-promotion
-                -Wfloat-equal
-                -Wshadow
-                -Wwrite-strings
-                -Wsign-compare
-                -Wmissing-format-attribute
-                -Wunreachable-code
-                -Wcast-align
-                -Wcast-qual
-                -Wnull-dereference
-                -Wuninitialized
-                -Wunused
-                -Wredundant-decls
-                #-Wstrict-prototypes
-                #-Werror-implicit-function-declaration
-                #-Wundef
-                )
-
-        if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-            # GCC 10
-            if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 10.0)
-                target_compile_options(${TARGET} PUBLIC -Wconversion)
-            endif()
-
-            # GCC 8
-            if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 8.0)
-                target_compile_options(${TARGET} PUBLIC -Wcast-function-type -Wstrict-overflow)
-            endif()
-
-            # GCC 6
-            if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 6.0)
-                target_compile_options(${TARGET} PUBLIC -Wno-strict-aliasing)
-            endif()
-        endif()
-    endfunction()
-
-    # configure an executable target to link to tinyusb in device mode, and add the board implementation
-    function(family_configure_device_example TARGET)
-        # default implementation is empty, the function should be redefined in the FAMILY/family.cmake
-    endfunction()
-
-    # configure an executable target to link to tinyusb in host mode, and add the board implementation
-    function(family_configure_host_example TARGET)
-        # default implementation is empty, the function should be redefined in the FAMILY/family.cmake
-    endfunction()
-
-    include(${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake)
-
-    if (NOT FAMILY_MCUS)
-        set(FAMILY_MCUS ${FAMILY})
-    endif()
-
-    # save it in case of re-inclusion
-    set(FAMILY_MCUS ${FAMILY_MCUS} CACHE INTERNAL "")
+# Default to gcc
+if(NOT DEFINED TOOLCHAIN)
+    set(TOOLCHAIN gcc)
 endif()
+
+if (NOT FAMILY)
+    message(FATAL_ERROR "You must set a FAMILY variable for the build (e.g. rp2040, eps32s2, esp32s3). You can do this via -DFAMILY=xxx on the cmake command line")
+endif()
+
+if (NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake)
+    message(FATAL_ERROR "Family '${FAMILY}' is not known/supported")
+endif()
+
+function(family_filter RESULT DIR)
+    get_filename_component(DIR ${DIR} ABSOLUTE BASE_DIR ${CMAKE_CURRENT_SOURCE_DIR})
+
+    if (EXISTS "${DIR}/only.txt")
+        file(READ "${DIR}/only.txt" ONLYS)
+        # Replace newlines with semicolon so that it is treated as a list by CMake
+        string(REPLACE "\n" ";" ONLYS_LINES ${ONLYS})
+        # For each mcu
+        foreach(MCU IN LISTS FAMILY_MCUS)
+            # For each line in only.txt
+            foreach(_line ${ONLYS_LINES})
+                # If mcu:xxx exists for this mcu or board:xxx then include
+                if (${_line} STREQUAL "mcu:${MCU}" OR ${_line} STREQUAL "board:${BOARD}")
+                    set(${RESULT} 1 PARENT_SCOPE)
+                    return()
+                endif()
+            endforeach()
+        endforeach()
+
+        # Didn't find it in only file so don't build
+        set(${RESULT} 0 PARENT_SCOPE)
+
+    elseif (EXISTS "${DIR}/skip.txt")
+        file(READ "${DIR}/skip.txt" SKIPS)
+        # Replace newlines with semicolon so that it is treated as a list by CMake
+        string(REPLACE "\n" ";" SKIPS_LINES ${SKIPS})
+        # For each mcu
+        foreach(MCU IN LISTS FAMILY_MCUS)
+            # For each line in only.txt
+            foreach(_line ${SKIPS_LINES})
+                # If mcu:xxx exists for this mcu then skip
+                if (${_line} STREQUAL "mcu:${MCU}")
+                    set(${RESULT} 0 PARENT_SCOPE)
+                    return()
+                endif()
+            endforeach()
+        endforeach()
+
+        # Didn't find in skip file so build
+        set(${RESULT} 1 PARENT_SCOPE)
+
+    else()
+
+        # Didn't find skip or only file so build
+        set(${RESULT} 1 PARENT_SCOPE)
+
+    endif()
+
+endfunction()
+
+function(family_add_subdirectory DIR)
+    family_filter(SHOULD_ADD "${DIR}")
+    if (SHOULD_ADD)
+        add_subdirectory(${DIR})
+    endif()
+endfunction()
+
+function(family_get_project_name OUTPUT_NAME DIR)
+    get_filename_component(SHORT_NAME ${DIR} NAME)
+    set(${OUTPUT_NAME} ${TINYUSB_FAMILY_PROJECT_NAME_PREFIX}${SHORT_NAME} PARENT_SCOPE)
+endfunction()
+
+function(family_initialize_project PROJECT DIR)
+    family_filter(ALLOWED "${DIR}")
+    if (NOT ALLOWED)
+        get_filename_component(SHORT_NAME ${DIR} NAME)
+        message(FATAL_ERROR "${SHORT_NAME} is not supported on FAMILY=${FAMILY}")
+    endif()
+endfunction()
+
+function(family_add_default_example_warnings TARGET)
+    target_compile_options(${TARGET} PUBLIC
+            -Wall
+            -Wextra
+            -Werror
+            -Wfatal-errors
+            -Wdouble-promotion
+            -Wfloat-equal
+            -Wshadow
+            -Wwrite-strings
+            -Wsign-compare
+            -Wmissing-format-attribute
+            -Wunreachable-code
+            -Wcast-align
+            -Wcast-qual
+            -Wnull-dereference
+            -Wuninitialized
+            -Wunused
+            -Wredundant-decls
+            #-Wstrict-prototypes
+            #-Werror-implicit-function-declaration
+            #-Wundef
+            )
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+        if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 12.0)
+            target_link_options(${TARGET} PUBLIC "LINKER:--no-warn-rwx-segments")
+        endif()
+
+        # GCC 10
+        if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 10.0)
+            target_compile_options(${TARGET} PUBLIC -Wconversion)
+        endif()
+
+        # GCC 8
+        if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 8.0)
+            target_compile_options(${TARGET} PUBLIC -Wcast-function-type -Wstrict-overflow)
+        endif()
+
+        # GCC 6
+        if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 6.0)
+            target_compile_options(${TARGET} PUBLIC -Wno-strict-aliasing)
+        endif()
+    endif()
+endfunction()
+
+# Add flash jlink target
+function(family_flash_jlink TARGET)
+    if (NOT DEFINED JLINKEXE)
+        set(JLINKEXE JLinkExe)
+    endif ()
+
+    file(GENERATE
+      OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}.jlink
+      CONTENT "halt
+loadfile $<TARGET_FILE:${TARGET}>
+r
+go
+exit"
+      )
+
+    add_custom_target(${TARGET}-jlink
+      DEPENDS ${TARGET}
+      COMMAND ${JLINKEXE} -device ${JLINK_DEVICE} -if swd -JTAGConf -1,-1 -speed auto -CommandFile ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}.jlink
+      )
+endfunction()
+
+# Add flash pycod target
+function(family_flash_pyocd TARGET)
+    if (NOT DEFINED PYOC)
+        set(PYOCD pyocd)
+    endif ()
+
+    add_custom_target(${TARGET}-pyocd
+      DEPENDS ${TARGET}
+      COMMAND ${PYOCD} flash -t ${PYOCD_TARGET} $<TARGET_FILE:${TARGET}>
+      )
+endfunction()
+
+# Add flash using NXP's LinkServer (redserver)
+# https://www.nxp.com/design/software/development-software/mcuxpresso-software-and-tools-/linkserver-for-microcontrollers:LINKERSERVER
+function(family_flash_nxplink TARGET)
+    if (NOT DEFINED LINKSERVER)
+        set(LINKSERVER LinkServer)
+    endif ()
+
+    # LinkServer has a bug that can only execute with full path otherwise it throws:
+    # realpath error: No such file or directory
+    execute_process(COMMAND which ${LINKSERVER} OUTPUT_VARIABLE LINKSERVER_PATH OUTPUT_STRIP_TRAILING_WHITESPACE)
+
+    add_custom_target(${TARGET}-nxplink
+      DEPENDS ${TARGET}
+      COMMAND ${LINKSERVER_PATH} flash ${NXPLINK_DEVICE} load $<TARGET_FILE:${TARGET}>
+      )
+endfunction()
+
+# configure an executable target to link to tinyusb in device mode, and add the board implementation
+function(family_configure_device_example TARGET)
+    # default implementation is empty, the function should be redefined in the FAMILY/family.cmake
+endfunction()
+
+# configure an executable target to link to tinyusb in host mode, and add the board implementation
+function(family_configure_host_example TARGET)
+    # default implementation is empty, the function should be redefined in the FAMILY/family.cmake
+endfunction()
+
+include(${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake)
+
+if (NOT FAMILY_MCUS)
+    set(FAMILY_MCUS ${FAMILY})
+endif()
+
+# save it in case of re-inclusion
+set(FAMILY_MCUS ${FAMILY_MCUS} CACHE INTERNAL "")
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index e9be7acc8..5261e5810 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -132,37 +132,9 @@ function(family_configure_target TARGET)
     )
 
   #---------- Flash ----------
-  # Flash using pyocd
-  add_custom_target(${TARGET}-pyocd
-    DEPENDS ${TARGET}
-    COMMAND pyocd flash -t ${PYOCD_TARGET} $<TARGET_FILE:${TARGET}>
-    )
-
-  # Flash using NXP LinkServer (redlink)
-  # https://www.nxp.com/design/software/development-software/mcuxpresso-software-and-tools-/linkserver-for-microcontrollers:LINKERSERVER
-  # LinkServer has a bug that can only execute with full path otherwise it throws:
-  # realpath error: No such file or directory
-  execute_process(COMMAND which LinkServer OUTPUT_VARIABLE LINKSERVER_PATH OUTPUT_STRIP_TRAILING_WHITESPACE)
-  add_custom_target(${TARGET}-nxplink
-    DEPENDS ${TARGET}
-    COMMAND ${LINKSERVER_PATH} flash ${NXPLINK_DEVICE} load $<TARGET_FILE:${TARGET}>
-    )
-
-  # Flash using jlink
-  set(JLINKEXE JLinkExe)
-  file(GENERATE
-    OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}.jlink
-    CONTENT "halt
-loadfile $<TARGET_FILE:${TARGET}>
-r
-go
-exit"
-    )
-  add_custom_target(${TARGET}-jlink
-    DEPENDS ${TARGET}
-    COMMAND ${JLINKEXE} -device ${JLINK_DEVICE} -if swd -JTAGConf -1,-1 -speed auto -CommandFile ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}.jlink
-    )
-
+  family_flash_jlink(${TARGET})
+  family_flash_nxplink(${TARGET})
+  family_flash_pyocd(${TARGET})
 endfunction()
 
 
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index 439f54170..611c88eb5 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -128,20 +128,9 @@ function(family_configure_target TARGET)
     )
 
   #---------- Flash ----------
-  # Flash using pyocd
-  add_custom_target(${TARGET}-pyocd
-    COMMAND pyocd flash -t ${PYOCD_TARGET} $<TARGET_FILE:${TARGET}>
-    )
-
-  # Flash using NXP LinkServer (redlink)
-  # https://www.nxp.com/design/software/development-software/mcuxpresso-software-and-tools-/linkserver-for-microcontrollers:LINKERSERVER
-  # LinkServer has a bug that can only execute with full path otherwise it throws:
-  # realpath error: No such file or directory
-  execute_process(COMMAND which LinkServer OUTPUT_VARIABLE LINKSERVER_PATH OUTPUT_STRIP_TRAILING_WHITESPACE)
-  add_custom_target(${TARGET}-nxplink
-    COMMAND ${LINKSERVER_PATH} flash ${NXPLINK_DEVICE} load $<TARGET_FILE:${TARGET}>
-    )
-
+  family_flash_jlink(${TARGET})
+  family_flash_nxplink(${TARGET})
+  family_flash_pyocd(${TARGET})
 endfunction()
 
 
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index ca28c4f5d..9c43478e8 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -132,26 +132,7 @@ function(family_configure_target TARGET)
     )
 
   #---------- Flash ----------
-  # Flash using pyocd
-  add_custom_target(${TARGET}-pyocd
-    DEPENDS ${TARGET}
-    COMMAND pyocd flash -t ${PYOCD_TARGET} $<TARGET_FILE:${TARGET}>
-    )
-
-  # Flash using jlink
-  set(JLINKEXE JLinkExe)
-  file(GENERATE
-    OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}.jlink
-    CONTENT "halt
-loadfile $<TARGET_FILE:${TARGET}>
-r
-go
-exit"
-    )
-  add_custom_target(${TARGET}-jlink
-    DEPENDS ${TARGET}
-    COMMAND ${JLINKEXE} -device ${JLINK_DEVICE} -if swd -JTAGConf -1,-1 -speed auto -CommandFile ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}.jlink
-    )
+  family_flash_jlink(${TARGET})
 
 endfunction()
 

From 9f0bae4c3fb687b8a3c1e6df84512ec48690369f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 19 May 2023 18:04:08 +0700
Subject: [PATCH 345/691] fix freertos build with nrf

---
 hw/bsp/nrf/family.mk         | 5 +----
 tools/make/cpu/cortex-m33.mk | 1 +
 tools/make/cpu/cortex-m4.mk  | 1 +
 tools/make/cpu/cortex-m7.mk  | 1 +
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/bsp/nrf/family.mk b/hw/bsp/nrf/family.mk
index 13258c9e0..6d067e1c2 100644
--- a/hw/bsp/nrf/family.mk
+++ b/hw/bsp/nrf/family.mk
@@ -3,8 +3,8 @@ DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/nordic/nrfx
 
 include $(TOP)/$(BOARD_PATH)/board.mk
 
+# nRF52 is cortex-m4, nRF53 is cortex-m33
 CPU_CORE ?= cortex-m4
-
 include $(TOP)/tools/make/cpu/$(CPU_CORE).mk
 
 CFLAGS += \
@@ -36,8 +36,5 @@ SRC_S += hw/mcu/nordic/nrfx/mdk/gcc_startup_$(MCU_VARIANT).S
 
 ASFLAGS += -D__HEAP_SIZE=0
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
-
 # For flash-jlink target
 JLINK_DEVICE ?= $(MCU_VARIANT)_xxaa
diff --git a/tools/make/cpu/cortex-m33.mk b/tools/make/cpu/cortex-m33.mk
index cae8c6e3a..2ea3a0753 100644
--- a/tools/make/cpu/cortex-m33.mk
+++ b/tools/make/cpu/cortex-m33.mk
@@ -6,6 +6,7 @@ ifeq ($(TOOLCHAIN),gcc)
     -mfpu=fpv5-d16 \
 
   #set(FREERTOS_PORT GCC_ARM_CM33_NONSECURE CACHE INTERNAL "")
+  FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure
 else ifeq ($(TOOLCHAIN),iar)
   # TODO support IAR
 endif
diff --git a/tools/make/cpu/cortex-m4.mk b/tools/make/cpu/cortex-m4.mk
index 7a3e204e2..890feefe3 100644
--- a/tools/make/cpu/cortex-m4.mk
+++ b/tools/make/cpu/cortex-m4.mk
@@ -6,6 +6,7 @@ ifeq ($(TOOLCHAIN),gcc)
     -mfpu=fpv4-sp-d16 \
 
   #set(FREERTOS_PORT GCC_ARM_CM4F CACHE INTERNAL "")
+  FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
 else ifeq ($(TOOLCHAIN),iar)
   # TODO support IAR
 endif
diff --git a/tools/make/cpu/cortex-m7.mk b/tools/make/cpu/cortex-m7.mk
index 47de4e07d..504ffd486 100644
--- a/tools/make/cpu/cortex-m7.mk
+++ b/tools/make/cpu/cortex-m7.mk
@@ -6,6 +6,7 @@ ifeq ($(TOOLCHAIN),gcc)
     -mfpu=fpv5-d16 \
 
   #set(FREERTOS_PORT GCC_ARM_CM7 CACHE INTERNAL "")
+  FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1
 else ifeq ($(TOOLCHAIN),iar)
   # TODO support IAR
 endif

From 1ef820ecfe569e181b8f20cb936f632e51d8257e Mon Sep 17 00:00:00 2001
From: Ha Thach <thach@tinyusb.org>
Date: Tue, 23 May 2023 21:45:00 +0700
Subject: [PATCH 346/691] Enhance chipidea (#2075)

* update chipidea dcd, remove manual ep_count and use DCCPARAMS to get number of endpoint instead
* add dcd dcache for chipidea
* add cmake for lpc18
* add makefile build for mcx
* use fork of mcu sdk
* fix ci build with nrf
* flash rp2040 with openocd
---
 .github/workflows/build_arm.yml               |   3 +-
 .github/workflows/cmake_arm.yml               |   1 +
 .idea/cmake.xml                               |   7 +-
 .idea/runConfigurations/rt1010_jlink.xml      |  10 +
 .idea/runConfigurations/rt1010_nxplink.xml    |  10 -
 .idea/runConfigurations/rt1060_nxplink.xml    |  10 -
 .pre-commit-config.yaml                       |  16 +-
 examples/device/CMakeLists.txt                |   2 +-
 hw/bsp/board_mcu.h                            |   2 +-
 hw/bsp/family_support.cmake                   |   7 +
 hw/bsp/imxrt/family.cmake                     |  11 +-
 .../lpc18/boards/lpcxpresso18s37/board.cmake  |  11 +
 hw/bsp/lpc18/boards/mcb1800/board.cmake       |  11 +
 hw/bsp/lpc18/family.cmake                     | 155 ++++++++
 hw/bsp/lpc55/family.cmake                     |   6 +-
 hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h    | 166 +++++++++
 hw/bsp/mcx/boards/mcxn947brk/board.cmake      |  18 +
 hw/bsp/mcx/boards/mcxn947brk/board.h          |  66 ++++
 hw/bsp/mcx/boards/mcxn947brk/board.mk         |  11 +
 hw/bsp/mcx/boards/mcxn947brk/clock_config.c   | 338 ++++++++++++++++++
 hw/bsp/mcx/boards/mcxn947brk/clock_config.h   | 177 +++++++++
 hw/bsp/mcx/boards/mcxn947brk/pin_mux.c        | 141 ++++++++
 hw/bsp/mcx/boards/mcxn947brk/pin_mux.h        |  51 +++
 hw/bsp/mcx/family.c                           | 262 ++++++++++++++
 hw/bsp/mcx/family.cmake                       | 179 ++++++++++
 hw/bsp/mcx/family.mk                          |  48 +++
 hw/bsp/nrf/family.cmake                       |  11 +-
 src/common/tusb_mcu.h                         |  26 +-
 src/device/dcd.h                              |  16 +
 src/portable/chipidea/ci_hs/ci_hs_imxrt.h     |  32 +-
 src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h  |   6 +-
 src/portable/chipidea/ci_hs/ci_hs_mcx.h       |  52 +++
 src/portable/chipidea/ci_hs/ci_hs_type.h      |  14 +-
 src/portable/chipidea/ci_hs/dcd_ci_hs.c       |  98 +++--
 src/portable/chipidea/ci_hs/hcd_ci_hs.c       |  21 +-
 src/portable/ehci/ehci.c                      |  13 +-
 src/tusb_option.h                             |   6 +-
 tools/cmake/cpu/cortex-m3.cmake               |  10 +
 tools/cmake/cpu/cortex-m33.cmake              |   5 +-
 tools/cmake/toolchain/arm_gcc.cmake           |   2 +
 tools/get_deps.py                             |   2 +-
 tools/make/cpu/cortex-m33.mk                  |   4 +-
 42 files changed, 1915 insertions(+), 122 deletions(-)
 create mode 100644 .idea/runConfigurations/rt1010_jlink.xml
 delete mode 100644 .idea/runConfigurations/rt1010_nxplink.xml
 delete mode 100644 .idea/runConfigurations/rt1060_nxplink.xml
 create mode 100644 hw/bsp/lpc18/boards/lpcxpresso18s37/board.cmake
 create mode 100644 hw/bsp/lpc18/boards/mcb1800/board.cmake
 create mode 100644 hw/bsp/lpc18/family.cmake
 create mode 100644 hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/mcx/boards/mcxn947brk/board.cmake
 create mode 100644 hw/bsp/mcx/boards/mcxn947brk/board.h
 create mode 100644 hw/bsp/mcx/boards/mcxn947brk/board.mk
 create mode 100644 hw/bsp/mcx/boards/mcxn947brk/clock_config.c
 create mode 100644 hw/bsp/mcx/boards/mcxn947brk/clock_config.h
 create mode 100644 hw/bsp/mcx/boards/mcxn947brk/pin_mux.c
 create mode 100644 hw/bsp/mcx/boards/mcxn947brk/pin_mux.h
 create mode 100644 hw/bsp/mcx/family.c
 create mode 100644 hw/bsp/mcx/family.cmake
 create mode 100644 hw/bsp/mcx/family.mk
 create mode 100644 src/portable/chipidea/ci_hs/ci_hs_mcx.h
 create mode 100644 tools/cmake/cpu/cortex-m3.cmake

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index f0b01b43d..917c83d74 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -142,8 +142,7 @@ jobs:
 
     - name: Create flash.sh
       run: |
-        #echo > flash.sh 'cmdout=$(openocd -f "interface/picoprobe.cfg" -f "target/rp2040.cfg" -c "program $1 reset exit")'
-        echo > flash.sh 'pyocd flash -t rp2040 $1'
+        echo > flash.sh 'cmdout=$(openocd -f "interface/cmsis-dap.cfg" -f "target/rp2040.cfg" -c "adapter speed 5000" -c "program $1 reset exit")'
         echo >> flash.sh 'if (( $? )) ; then echo $cmdout ; fi'
         chmod +x flash.sh
 
diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index 844a03443..12173fb63 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -32,6 +32,7 @@ jobs:
       matrix:
         family:
         # Alphabetical order
+        - 'mcx'
         - 'imxrt'
     steps:
     - name: Setup Python
diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 7dacd0003..a80ebed3c 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -2,8 +2,9 @@
 <project version="4">
   <component name="CMakeSharedSettings">
     <configurations>
-      <configuration PROFILE_NAME="rt1060 evk" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1060_evk" />
-      <configuration PROFILE_NAME="pca10095" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10095" BUILD_OPTIONS="-v" />
+      <configuration PROFILE_NAME="mcxn947" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=mcx -DBOARD=mcxn947brk" />
+      <configuration PROFILE_NAME="rt1060 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1060_evk" />
+      <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10095" />
       <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10056" BUILD_OPTIONS="-v" />
       <configuration PROFILE_NAME="lpc55s69" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc55 -DBOARD=lpcxpresso55s69" />
       <configuration PROFILE_NAME="esp32s3" ENABLED="false" GENERATION_OPTIONS="-DFAMILY=espressif -DBOARD=espressif_s3_devkitm -DIDF_TARGET=esp32s3">
@@ -29,6 +30,8 @@
       <configuration PROFILE_NAME="rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=rp2040 -DBOARD=raspberry_pi_pico" />
       <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1010_evk" />
       <configuration PROFILE_NAME="rt1064 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1064_evk" />
+      <configuration PROFILE_NAME="mcb1800" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc18 -DBOARD=mcb1800" />
+      <configuration PROFILE_NAME="lpcxpresso18s37" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc18 -DBOARD=lpcxpresso18s37" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/.idea/runConfigurations/rt1010_jlink.xml b/.idea/runConfigurations/rt1010_jlink.xml
new file mode 100644
index 000000000..70cfeea53
--- /dev/null
+++ b/.idea/runConfigurations/rt1010_jlink.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="rt1010 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1011xxx5A&quot; -if swd -speed 8000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcxn947" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/rt1010_nxplink.xml b/.idea/runConfigurations/rt1010_nxplink.xml
deleted file mode 100644
index cf3bf842f..000000000
--- a/.idea/runConfigurations/rt1010_nxplink.xml
+++ /dev/null
@@ -1,10 +0,0 @@
-<component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rt1010 nxplink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="gdbserver --gdb-port 55503 --semihost-port -1 MIMXRT1011xxxxx:EVK-MIMXRT1010" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="host_hid_to_device_cdc" TARGET_NAME="host_hid_to_device_cdc" CONFIG_NAME="rt1060 evk" version="1" RUN_TARGET_PROJECT_NAME="host_hid_to_device_cdc" RUN_TARGET_NAME="host_hid_to_device_cdc">
-    <custom-gdb-server version="1" gdb-connect="tcp::55503" executable="/usr/local/LinkServer/LinkServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
-      <debugger kind="GDB" isBundled="true" />
-    </custom-gdb-server>
-    <method v="2">
-      <option name="CLION.COMPOUND.BUILD" enabled="true" />
-    </method>
-  </configuration>
-</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/rt1060_nxplink.xml b/.idea/runConfigurations/rt1060_nxplink.xml
deleted file mode 100644
index d3303bdb6..000000000
--- a/.idea/runConfigurations/rt1060_nxplink.xml
+++ /dev/null
@@ -1,10 +0,0 @@
-<component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rt1060 nxplink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="gdbserver --gdb-port 55503 --semihost-port -1 MIMXRT1062xxxxA:EVK-MIMXRT1060" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc_hid" TARGET_NAME="cdc_msc_hid" CONFIG_NAME="rt1060 evk" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc_hid" RUN_TARGET_NAME="cdc_msc_hid">
-    <custom-gdb-server version="1" gdb-connect="tcp::55503" executable="/usr/local/LinkServer/LinkServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
-      <debugger kind="GDB" isBundled="true" />
-    </custom-gdb-server>
-    <method v="2">
-      <option name="CLION.COMPOUND.BUILD" enabled="true" />
-    </method>
-  </configuration>
-</component>
\ No newline at end of file
diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index 6fb98afb8..4071ec326 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -8,8 +8,16 @@ repos:
   hooks:
   - id: check-yaml
   - id: trailing-whitespace
+    exclude: |
+      (?x)^(
+        hw/bsp/mcx/sdk/
+      )
   - id: end-of-file-fixer
-    exclude: ^.idea/
+    exclude: |
+      (?x)^(
+        .idea/|
+        hw/bsp/mcx/sdk/
+      )
   - id: forbid-submodules
 
 - repo: https://github.com/codespell-project/codespell
@@ -17,7 +25,11 @@ repos:
   hooks:
   - id: codespell
     args: [-w]
-    exclude: ^lib/
+    exclude: |
+      (?x)^(
+        lib/|
+        hw/bsp/mcx/sdk/
+      )
 
 - repo: local
   hooks:
diff --git a/examples/device/CMakeLists.txt b/examples/device/CMakeLists.txt
index 10a1f4c26..89cfceeeb 100644
--- a/examples/device/CMakeLists.txt
+++ b/examples/device/CMakeLists.txt
@@ -24,7 +24,7 @@ family_add_subdirectory(midi_test)
 family_add_subdirectory(msc_dual_lun)
 
 # FIXME temp skip net_lwip_webserver for imxrt for now
-if (NOT ${FAMILY} STREQUAL "imxrt")
+if (NOT ${FAMILY} STREQUAL "imxrt" AND NOT ${FAMILY} STREQUAL "mcx")
   family_add_subdirectory(net_lwip_webserver)
 endif()
 
diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h
index cd195a19b..35210dbae 100644
--- a/hw/bsp/board_mcu.h
+++ b/hw/bsp/board_mcu.h
@@ -44,7 +44,7 @@
       TU_CHECK_MCU(OPT_MCU_LPC40XX, OPT_MCU_LPC43XX)
   #include "chip.h"
 
-#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX, OPT_MCU_LPC54XXX, OPT_MCU_LPC55XX)
+#elif TU_CHECK_MCU(OPT_MCU_LPC51UXX, OPT_MCU_LPC54XXX, OPT_MCU_LPC55XX, OPT_MCU_MCXN9)
   #include "fsl_device_registers.h"
 
 #elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32)
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 442aba955..d2d675332 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -135,6 +135,13 @@ function(family_add_default_example_warnings TARGET)
     endif()
 endfunction()
 
+
+#  add_custom_command(TARGET ${TARGET} POST_BUILD
+#    COMMAND ${CMAKE_OBJCOPY} -O ihex $<TARGET_FILE:${TARGET}> ${TARGET}.hex
+#    COMMAND ${CMAKE_OBJCOPY} -O binary $<TARGET_FILE:${TARGET}> ${TARGET}.bin
+#    COMMENT "Creating ${TARGET}.hex and ${TARGET}.bin"
+#    )
+
 # Add flash jlink target
 function(family_flash_jlink TARGET)
     if (NOT DEFINED JLINKEXE)
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 5261e5810..ade744aa5 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -1,8 +1,4 @@
-if (TARGET _imxrt_family_inclusion_marker)
-  return()
-endif ()
-
-add_library(_imxrt_family_inclusion_marker INTERFACE)
+include_guard()
 
 if (NOT BOARD)
   message(FATAL_ERROR "BOARD not specified")
@@ -87,6 +83,11 @@ function(family_configure_target TARGET)
   # set output name to .elf
   set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf)
 
+  # run size after build
+  add_custom_command(TARGET ${TARGET} POST_BUILD
+    COMMAND ${TOOLCHAIN_SIZE} $<TARGET_FILE:${TARGET}>
+    )
+
   # TOP is path to root directory
   set(TOP "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../..")
 
diff --git a/hw/bsp/lpc18/boards/lpcxpresso18s37/board.cmake b/hw/bsp/lpc18/boards/lpcxpresso18s37/board.cmake
new file mode 100644
index 000000000..b540012a4
--- /dev/null
+++ b/hw/bsp/lpc18/boards/lpcxpresso18s37/board.cmake
@@ -0,0 +1,11 @@
+set(MCU_VARIANT LPC18S37)
+
+set(JLINK_DEVICE LPC18S37)
+set(PYOCD_TARGET LPC18S37)
+set(NXPLINK_DEVICE LPC18S37:LPCXPRESSO18S37)
+
+set(LD_FILE_gcc ${CMAKE_CURRENT_LIST_DIR}/lpc1837.ld)
+
+function(update_board TARGET)
+  # nothing to do
+endfunction()
diff --git a/hw/bsp/lpc18/boards/mcb1800/board.cmake b/hw/bsp/lpc18/boards/mcb1800/board.cmake
new file mode 100644
index 000000000..1efeafd12
--- /dev/null
+++ b/hw/bsp/lpc18/boards/mcb1800/board.cmake
@@ -0,0 +1,11 @@
+set(MCU_VARIANT LPC1857)
+
+set(JLINK_DEVICE LPC1857)
+set(PYOCD_TARGET LPC1857)
+set(NXPLINK_DEVICE LPC1857:MCB1857)
+
+set(LD_FILE_gcc ${CMAKE_CURRENT_LIST_DIR}/lpc1857.ld)
+
+function(update_board TARGET)
+  # nothing to do
+endfunction()
diff --git a/hw/bsp/lpc18/family.cmake b/hw/bsp/lpc18/family.cmake
new file mode 100644
index 000000000..059408fe9
--- /dev/null
+++ b/hw/bsp/lpc18/family.cmake
@@ -0,0 +1,155 @@
+include_guard()
+
+if (NOT BOARD)
+  message(FATAL_ERROR "BOARD not specified")
+endif ()
+
+# TOP is path to root directory
+set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
+set(SDK_DIR ${TOP}/hw/mcu/nxp/lpcopen/lpc18xx/lpc_chip_18xx)
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m3 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS LPC18XX CACHE INTERNAL "")
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+set(BOARD_TARGET board_${BOARD})
+if (NOT TARGET ${BOARD_TARGET})
+  add_library(${BOARD_TARGET} STATIC
+    ${SDK_DIR}/../gcc/cr_startup_lpc18xx.c
+    ${SDK_DIR}/src/chip_18xx_43xx.c
+    ${SDK_DIR}/src/clock_18xx_43xx.c
+    ${SDK_DIR}/src/gpio_18xx_43xx.c
+    ${SDK_DIR}/src/sysinit_18xx_43xx.c
+    ${SDK_DIR}/src/uart_18xx_43xx.c
+    )
+  target_compile_options(${BOARD_TARGET} PUBLIC
+    -nostdlib
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    __USE_LPCOPEN
+    CORE_M3
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${SDK_DIR}/inc
+    ${SDK_DIR}/inc/config_18xx
+    )
+  update_board(${BOARD_TARGET})
+
+  if (NOT DEFINED LD_FILE_${TOOLCHAIN})
+    MESSAGE(FATAL_ERROR "LD_FILE_${TOOLCHAIN} not defined")
+  endif ()
+
+  if (TOOLCHAIN STREQUAL "gcc")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_gcc}"
+      "LINKER:-Map=$<IF:$<BOOL:$<TARGET_PROPERTY:OUTPUT_NAME>>,$<TARGET_PROPERTY:OUTPUT_NAME>,$<TARGET_PROPERTY:NAME>>${CMAKE_EXECUTABLE_SUFFIX}.map"
+      # nanolib
+      --specs=nosys.specs
+      --specs=nano.specs
+      )
+  else ()
+    # TODO support IAR
+  endif ()
+endif () # BOARD_TARGET
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_target TARGET)
+  # set output name to .elf
+  set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf)
+
+  # run size after build
+  add_custom_command(TARGET ${TARGET} POST_BUILD
+    COMMAND ${TOOLCHAIN_SIZE} $<TARGET_FILE:${TARGET}>
+    )
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # TinyUSB Port
+    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+    ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+    ${TOP}/src/portable/ehci/ehci.c
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  #---------- TinyUSB ----------
+  # tinyusb target is built for each example since it depends on example's tusb_config.h
+  set(TINYUSB_TARGET_PREFIX ${TARGET}-)
+  add_library(${TARGET}-tinyusb_config INTERFACE)
+
+  target_include_directories(${TARGET}-tinyusb_config INTERFACE
+    ${CMAKE_CURRENT_SOURCE_DIR}/src
+    )
+  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
+    CFG_TUSB_MCU=OPT_MCU_LPC18XX
+    )
+
+  # tinyusb's CMakeList.txt
+  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
+
+  # group target (not yet supported by clion)
+  set_target_properties(${TARGET}-tinyusb ${TARGET}-tinyusb_config
+    PROPERTIES FOLDER ${TARGET}_sub
+    )
+
+  #---------- Flash ----------
+  family_flash_jlink(${TARGET})
+endfunction()
+
+
+function(family_add_freertos TARGET)
+  # freertos_config
+  add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/FreeRTOSConfig ${CMAKE_CURRENT_BINARY_DIR}/freertos_config)
+
+  ## freertos
+  if (NOT TARGET freertos_kernel)
+    add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../../lib/FreeRTOS-Kernel ${CMAKE_CURRENT_BINARY_DIR}/freertos_kernel)
+  endif ()
+
+  # Add FreeRTOS option to tinyusb_config
+  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
+    CFG_TUSB_OS=OPT_OS_FREERTOS
+    )
+  # link tinyusb with freeRTOS kernel
+  target_link_libraries(${TARGET}-tinyusb PUBLIC
+    freertos_kernel
+    )
+  target_link_libraries(${TARGET} PUBLIC
+    freertos_kernel
+    )
+endfunction()
+
+function(family_configure_device_example TARGET)
+  family_configure_target(${TARGET})
+endfunction()
+
+function(family_configure_host_example TARGET)
+  family_configure_target(${TARGET})
+endfunction()
+
+function(family_configure_dual_usb_example TARGET)
+  family_configure_target(${TARGET})
+endfunction()
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index 611c88eb5..3aeda5b2d 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -1,8 +1,4 @@
-if (TARGET _lpc55_family_inclusion_marker)
-  return()
-endif ()
-
-add_library(_lpc55_family_inclusion_marker INTERFACE)
+include_guard()
 
 if (NOT BOARD)
   message(FATAL_ERROR "BOARD not specified")
diff --git a/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..4c6058d27
--- /dev/null
+++ b/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,166 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// IAR assembler have limited preprocessor support and it only need following macros:
+#ifndef __IASMARM__
+// FIXME cause redundant-decls warnings
+extern uint32_t SystemCoreClock;
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU								        0
+#define configENABLE_FPU								        1
+#define configENABLE_TRUSTZONE					        0
+#define configMINIMAL_SECURE_STACK_SIZE					( 1024 )
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               2
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       3
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/mcx/boards/mcxn947brk/board.cmake b/hw/bsp/mcx/boards/mcxn947brk/board.cmake
new file mode 100644
index 000000000..b9acf04d9
--- /dev/null
+++ b/hw/bsp/mcx/boards/mcxn947brk/board.cmake
@@ -0,0 +1,18 @@
+set(MCU_VARIANT MCXN947)
+set(MCU_CORE MCXN947_cm33_core0)
+
+set(JLINK_DEVICE MCXN947)
+set(PYOCD_TARGET MCXN947)
+set(NXPLINK_DEVICE MCXN947:MCXN947)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_MCXN947VDF_cm33_core0
+    # port 1 is highspeed
+    BOARD_TUD_RHPORT=1
+    )
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/pin_mux.c
+    )
+endfunction()
diff --git a/hw/bsp/mcx/boards/mcxn947brk/board.h b/hw/bsp/mcx/boards/mcxn947brk/board.h
new file mode 100644
index 000000000..eae98bfa7
--- /dev/null
+++ b/hw/bsp/mcx/boards/mcxn947brk/board.h
@@ -0,0 +1,66 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_GPIO              GPIO3
+#define LED_CLK               kCLOCK_Gpio3
+#define LED_PIN               4 // red
+#define LED_STATE_ON          0
+
+// WAKE button (Dummy, use unused pin
+#define BUTTON_GPIO           GPIO0
+#define BUTTON_CLK            kCLOCK_Gpio0
+#define BUTTON_PIN            6
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_DEV              LPUART4
+
+static inline void board_uart_init_clock(void) {
+  /* attach FRO 12M to FLEXCOMM4 */
+  CLOCK_SetClkDiv(kCLOCK_DivFlexcom4Clk, 1u);
+  CLOCK_AttachClk(kFRO12M_to_FLEXCOMM4);
+  RESET_ClearPeripheralReset(kFC4_RST_SHIFT_RSTn);
+}
+
+//#define UART_RX_PINMUX        0, 24, IOCON_PIO_DIG_FUNC1_EN
+//#define UART_TX_PINMUX        0, 25, IOCON_PIO_DIG_FUNC1_EN
+
+// XTAL
+#define XTAL0_CLK_HZ          (24 * 1000 * 1000U)
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/hw/bsp/mcx/boards/mcxn947brk/board.mk b/hw/bsp/mcx/boards/mcxn947brk/board.mk
new file mode 100644
index 000000000..69f47b8a8
--- /dev/null
+++ b/hw/bsp/mcx/boards/mcxn947brk/board.mk
@@ -0,0 +1,11 @@
+MCU_VARIANT = MCXN947
+MCU_CORE = MCXN947_cm33_core0
+PORT ?= 1
+
+CFLAGS += -DCPU_MCXN947VDF_cm33_core0
+
+JLINK_DEVICE = LPC55S69
+PYOCD_TARGET = LPC55S69
+
+# flash using pyocd
+flash: flash-pyocd
diff --git a/hw/bsp/mcx/boards/mcxn947brk/clock_config.c b/hw/bsp/mcx/boards/mcxn947brk/clock_config.c
new file mode 100644
index 000000000..37d2b4dfc
--- /dev/null
+++ b/hw/bsp/mcx/boards/mcxn947brk/clock_config.c
@@ -0,0 +1,338 @@
+/*
+ * Copyright 2022 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+/*
+ * How to setup clock using clock driver functions:
+ *
+ * 1. Setup clock sources.
+ *
+ * 2. Set up wait states of the flash.
+ *
+ * 3. Set up all dividers.
+ *
+ * 4. Set up all selectors to provide selected clocks.
+ *
+ */
+
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v10.0
+processor: MCXN947
+package_id: MCXN947VDF
+mcu_data: ksdk2_0
+processor_version: 0.12.3
+board: MCX-N9XX-EVK
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+#include "clock_config.h"
+#include "fsl_clock.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+/* System clock frequency. */
+// extern uint32_t SystemCoreClock;
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockPLL150M();
+}
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO12M **********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFRO12M
+outputs:
+- {id: CLK_144M_clock.outFreq, value: 144 MHz}
+- {id: CLK_48M_clock.outFreq, value: 48 MHz}
+- {id: FRO_12M_clock.outFreq, value: 12 MHz}
+- {id: MAIN_clock.outFreq, value: 12 MHz}
+- {id: Slow_clock.outFreq, value: 3 MHz}
+- {id: System_clock.outFreq, value: 12 MHz}
+- {id: gdet_clock.outFreq, value: 48 MHz}
+- {id: trng_clock.outFreq, value: 48 MHz}
+settings:
+- {id: SCGMode, value: SIRC}
+- {id: SCG.SCSSEL.sel, value: SCG.SIRC}
+- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled}
+- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a}
+- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+void BOARD_BootClockFRO12M(void)
+{
+    /*!< Enable SCG clock */
+    CLOCK_EnableClock(kCLOCK_Scg);
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to FRO12M */
+
+    /*!< Set up dividers */
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U);           /*!< Set AHBCLKDIV divider to value 1 */
+
+    /* Set SystemCoreClock variable */
+    SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
+}
+
+/*******************************************************************************
+ ******************* Configuration BOARD_BootClockFROHF48M *********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFROHF48M
+outputs:
+- {id: CLK_144M_clock.outFreq, value: 144 MHz}
+- {id: CLK_48M_clock.outFreq, value: 48 MHz}
+- {id: FRO_12M_clock.outFreq, value: 12 MHz}
+- {id: FRO_HF_clock.outFreq, value: 48 MHz}
+- {id: MAIN_clock.outFreq, value: 48 MHz}
+- {id: Slow_clock.outFreq, value: 12 MHz}
+- {id: System_clock.outFreq, value: 48 MHz}
+- {id: gdet_clock.outFreq, value: 48 MHz}
+- {id: trng_clock.outFreq, value: 48 MHz}
+settings:
+- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK}
+- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK}
+- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a}
+- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFROHF48M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFROHF48M configuration
+ ******************************************************************************/
+void BOARD_BootClockFROHF48M(void)
+{
+    /*!< Enable SCG clock */
+    CLOCK_EnableClock(kCLOCK_Scg);
+
+    CLOCK_SetupFROHFClocking(48000000U);                /*!< Enable FRO HF(48MHz) output */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to FRO_HF */
+
+    /*!< Set up dividers */
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U);           /*!< Set AHBCLKDIV divider to value 1 */
+
+    /* Set SystemCoreClock variable */
+    SystemCoreClock = BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK;
+}
+
+/*******************************************************************************
+ ******************* Configuration BOARD_BootClockFROHF144M ********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFROHF144M
+outputs:
+- {id: CLK_144M_clock.outFreq, value: 144 MHz}
+- {id: CLK_48M_clock.outFreq, value: 48 MHz}
+- {id: FRO_12M_clock.outFreq, value: 12 MHz}
+- {id: FRO_HF_clock.outFreq, value: 144 MHz}
+- {id: MAIN_clock.outFreq, value: 144 MHz}
+- {id: Slow_clock.outFreq, value: 18 MHz}
+- {id: System_clock.outFreq, value: 72 MHz}
+- {id: gdet_clock.outFreq, value: 48 MHz}
+- {id: trng_clock.outFreq, value: 48 MHz}
+settings:
+- {id: SYSCON.AHBCLKDIV.scale, value: '2', locked: true}
+- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK}
+- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK}
+- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a}
+- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a}
+sources:
+- {id: SCG.FIRC.outFreq, value: 144 MHz}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFROHF144M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFROHF144M configuration
+ ******************************************************************************/
+void BOARD_BootClockFROHF144M(void)
+{
+    /*!< Enable SCG clock */
+    CLOCK_EnableClock(kCLOCK_Scg);
+
+    CLOCK_SetupFROHFClocking(144000000U);               /*!< Enable FRO HF(144MHz) output */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to FRO_HF */
+
+    /*!< Set up dividers */
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 2U);           /*!< Set AHBCLKDIV divider to value 2 */
+
+    /* Set SystemCoreClock variable */
+    SystemCoreClock = BOARD_BOOTCLOCKFROHF144M_CORE_CLOCK;
+}
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockPLL150M *********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockPLL150M
+called_from_default_init: true
+outputs:
+- {id: CLK_144M_clock.outFreq, value: 144 MHz}
+- {id: CLK_48M_clock.outFreq, value: 48 MHz}
+- {id: FRO_12M_clock.outFreq, value: 12 MHz}
+- {id: FRO_HF_clock.outFreq, value: 48 MHz}
+- {id: MAIN_clock.outFreq, value: 150 MHz}
+- {id: PLL0_CLK_clock.outFreq, value: 150 MHz}
+- {id: Slow_clock.outFreq, value: 37.5 MHz}
+- {id: System_clock.outFreq, value: 150 MHz}
+- {id: gdet_clock.outFreq, value: 48 MHz}
+- {id: trng_clock.outFreq, value: 48 MHz}
+settings:
+- {id: PLL0_Mode, value: Normal}
+- {id: RunPowerMode, value: OD}
+- {id: SCGMode, value: PLL0}
+- {id: SCG.PLL0M_MULT.scale, value: '50', locked: true}
+- {id: SCG.PLL0SRCSEL.sel, value: SCG.FIRC_48M}
+- {id: SCG.PLL0_NDIV.scale, value: '8', locked: true}
+- {id: SCG.SCSSEL.sel, value: SCG.PLL0_CLK}
+- {id: SYSCON.FLEXCAN0CLKSEL.sel, value: NO_CLOCK}
+- {id: SYSCON.FLEXCAN1CLKSEL.sel, value: NO_CLOCK}
+- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a}
+- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockPLL150M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockPLL150M configuration
+ ******************************************************************************/
+void BOARD_BootClockPLL150M(void)
+{
+    /*!< Enable SCG clock */
+    CLOCK_EnableClock(kCLOCK_Scg);
+
+    CLOCK_SetupFROHFClocking(48000000U);                /*!< Enable FRO HF(48MHz) output */
+
+    /*!< Set up PLL0 */
+    const pll_setup_t pll0Setup = {
+        .pllctrl = SCG_APLLCTRL_SOURCE(1U) | SCG_APLLCTRL_SELI(27U) | SCG_APLLCTRL_SELP(13U),
+        .pllndiv = SCG_APLLNDIV_NDIV(8U),
+        .pllpdiv = SCG_APLLPDIV_PDIV(1U),
+        .pllmdiv = SCG_APLLMDIV_MDIV(50U),
+        .pllRate = 150000000U
+    };
+    CLOCK_SetPLL0Freq(&pll0Setup);                       /*!< Configure PLL0 to the desired values */
+    CLOCK_SetPll0MonitorMode(kSCG_Pll0MonitorDisable);    /* Pll0 Monitor is disabled */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kPLL0_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL0 */
+
+    /*!< Set up dividers */
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U);           /*!< Set AHBCLKDIV divider to value 1 */
+
+    /* Set SystemCoreClock variable */
+    SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK;
+}
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockPLL100M *********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockPLL100M
+outputs:
+- {id: CLK_144M_clock.outFreq, value: 144 MHz}
+- {id: CLK_48M_clock.outFreq, value: 48 MHz}
+- {id: CLK_IN_clock.outFreq, value: 24 MHz}
+- {id: FRO_12M_clock.outFreq, value: 12 MHz}
+- {id: MAIN_clock.outFreq, value: 100 MHz}
+- {id: PLL1_CLK_clock.outFreq, value: 100 MHz}
+- {id: Slow_clock.outFreq, value: 25 MHz}
+- {id: System_clock.outFreq, value: 100 MHz}
+- {id: gdet_clock.outFreq, value: 48 MHz}
+- {id: trng_clock.outFreq, value: 48 MHz}
+settings:
+- {id: PLL1_Mode, value: Normal}
+- {id: SCGMode, value: PLL1}
+- {id: SCG.PLL1M_MULT.scale, value: '100', locked: true}
+- {id: SCG.PLL1_NDIV.scale, value: '6', locked: true}
+- {id: SCG.PLL1_PDIV.scale, value: '4', locked: true}
+- {id: SCG.SCSSEL.sel, value: SCG.PLL1_CLK}
+- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled}
+- {id: SCG_SOSCCSR_SOSCEN_CFG, value: Enabled}
+- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a}
+- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a}
+sources:
+- {id: SCG.SOSC.outFreq, value: 24 MHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockPLL100M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockPLL100M configuration
+ ******************************************************************************/
+void BOARD_BootClockPLL100M(void)
+{
+    /*!< Enable SCG clock */
+    CLOCK_EnableClock(kCLOCK_Scg);
+
+    CLOCK_SetupExtClocking(24000000U);
+    CLOCK_SetSysOscMonitorMode(kSCG_SysOscMonitorDisable);    /* System OSC Clock Monitor is disabled */
+
+    /*!< Set up PLL1 */
+    const pll_setup_t pll1Setup = {
+        .pllctrl = SCG_SPLLCTRL_SOURCE(0U) | SCG_SPLLCTRL_SELI(53U) | SCG_SPLLCTRL_SELP(26U),
+        .pllndiv = SCG_SPLLNDIV_NDIV(6U),
+        .pllpdiv = SCG_SPLLPDIV_PDIV(2U),
+        .pllmdiv = SCG_SPLLMDIV_MDIV(100U),
+        .pllRate = 100000000U
+    };
+    CLOCK_SetPLL1Freq(&pll1Setup);                       /*!< Configure PLL1 to the desired values */
+    CLOCK_SetPll1MonitorMode(kSCG_Pll1MonitorDisable);    /* Pll1 Monitor is disabled */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kPLL1_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL1 */
+
+    /*!< Set up dividers */
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U);           /*!< Set AHBCLKDIV divider to value 1 */
+
+    /* Set SystemCoreClock variable */
+    SystemCoreClock = BOARD_BOOTCLOCKPLL100M_CORE_CLOCK;
+}
diff --git a/hw/bsp/mcx/boards/mcxn947brk/clock_config.h b/hw/bsp/mcx/boards/mcxn947brk/clock_config.h
new file mode 100644
index 000000000..c238a0423
--- /dev/null
+++ b/hw/bsp/mcx/boards/mcxn947brk/clock_config.h
@@ -0,0 +1,177 @@
+/*
+ * Copyright 2022 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define BOARD_XTAL0_CLK_HZ                         24000000U  /*!< Board xtal frequency in Hz */
+#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32K frequency in Hz */
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO12M **********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK           12000000U  /*!< Core clock frequency: 12000000Hz */
+#define BOARD_BOOTCLOCKFRO12M_ROSC_CLOCK                  0U  /*!< ROSC clock frequency: 0Hz */
+
+
+/*******************************************************************************
+ * API for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFRO12M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************* Configuration BOARD_BootClockFROHF48M *********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFROHF48M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK         48000000U  /*!< Core clock frequency: 48000000Hz */
+#define BOARD_BOOTCLOCKFROHF48M_ROSC_CLOCK                0U  /*!< ROSC clock frequency: 0Hz */
+
+
+/*******************************************************************************
+ * API for BOARD_BootClockFROHF48M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFROHF48M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************* Configuration BOARD_BootClockFROHF144M ********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFROHF144M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFROHF144M_CORE_CLOCK       144000000U  /*!< Core clock frequency: 144000000Hz */
+#define BOARD_BOOTCLOCKFROHF144M_ROSC_CLOCK               0U  /*!< ROSC clock frequency: 0Hz */
+
+
+/*******************************************************************************
+ * API for BOARD_BootClockFROHF144M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFROHF144M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockPLL150M *********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockPLL150M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK         150000000U  /*!< Core clock frequency: 150000000Hz */
+#define BOARD_BOOTCLOCKPLL150M_ROSC_CLOCK                 0U  /*!< ROSC clock frequency: 0Hz */
+
+
+/*******************************************************************************
+ * API for BOARD_BootClockPLL150M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockPLL150M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockPLL100M *********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockPLL100M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKPLL100M_CORE_CLOCK         100000000U  /*!< Core clock frequency: 100000000Hz */
+#define BOARD_BOOTCLOCKPLL100M_ROSC_CLOCK                 0U  /*!< ROSC clock frequency: 0Hz */
+
+
+/*******************************************************************************
+ * API for BOARD_BootClockPLL100M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockPLL100M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/mcx/boards/mcxn947brk/pin_mux.c b/hw/bsp/mcx/boards/mcxn947brk/pin_mux.c
new file mode 100644
index 000000000..acc2f3e45
--- /dev/null
+++ b/hw/bsp/mcx/boards/mcxn947brk/pin_mux.c
@@ -0,0 +1,141 @@
+/*
+ * Copyright 2022 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Pins v12.0
+processor: MCXN947
+package_id: MCXN947VDF
+mcu_data: ksdk2_0
+processor_version: 0.12.3
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+#include "fsl_common.h"
+#include "fsl_port.h"
+#include "pin_mux.h"
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitBootPins
+ * Description   : Calls initialization functions.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitBootPins(void)
+{
+    BOARD_InitPins();
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: A1, peripheral: LPFlexcomm4, signal: LPFLEXCOMM_P0, pin_signal: PIO1_8/WUU0_IN10/LPTMR1_ALT3/TRACE_DATA0/FC4_P0/FC5_P4/CT_INP8/SCT0_OUT2/FLEXIO0_D16/PLU_OUT0/ENET0_TXD2/I3C1_SDA/TSI0_CH17/ADC1_A8,
+    slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, pull_value: low, input_buffer: enable,
+    invert_input: normal}
+  - {pin_num: B1, peripheral: LPFlexcomm4, signal: LPFLEXCOMM_P1, pin_signal: PIO1_9/TRACE_DATA1/FC4_P1/FC5_P5/CT_INP9/SCT0_OUT3/FLEXIO0_D17/PLU_OUT1/ENET0_TXD3/I3C1_SCL/TSI0_CH18/ADC1_A9,
+    slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, input_buffer: enable, invert_input: normal}
+  - {pin_num: F14, peripheral: GPIO3, signal: 'GPIO, 4', pin_signal: PIO3_4/FC7_P2/CT_INP18/PWM0_X2/FLEXIO0_D12/SIM1_CLK, slew_rate: fast, open_drain: disable, drive_strength: low,
+    pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitPins(void)
+{
+    /* Enables the clock for PORT1: Enables clock */
+    CLOCK_EnableClock(kCLOCK_Port1);
+    /* Enables the clock for PORT3: Enables clock */
+    CLOCK_EnableClock(kCLOCK_Port3);
+
+    const port_pin_config_t port1_8_pinA1_config = {/* Internal pull-up/down resistor is disabled */
+                                                    kPORT_PullDisable,
+                                                    /* Low internal pull resistor value is selected. */
+                                                    kPORT_LowPullResistor,
+                                                    /* Fast slew rate is configured */
+                                                    kPORT_FastSlewRate,
+                                                    /* Passive input filter is disabled */
+                                                    kPORT_PassiveFilterDisable,
+                                                    /* Open drain output is disabled */
+                                                    kPORT_OpenDrainDisable,
+                                                    /* Low drive strength is configured */
+                                                    kPORT_LowDriveStrength,
+                                                    /* Pin is configured as FC4_P0 */
+                                                    kPORT_MuxAlt2,
+                                                    /* Digital input enabled */
+                                                    kPORT_InputBufferEnable,
+                                                    /* Digital input is not inverted */
+                                                    kPORT_InputNormal,
+                                                    /* Pin Control Register fields [15:0] are not locked */
+                                                    kPORT_UnlockRegister};
+    /* PORT1_8 (pin A1) is configured as FC4_P0 */
+    PORT_SetPinConfig(PORT1, 8U, &port1_8_pinA1_config);
+
+    const port_pin_config_t port1_9_pinB1_config = {/* Internal pull-up/down resistor is disabled */
+                                                    kPORT_PullDisable,
+                                                    /* Low internal pull resistor value is selected. */
+                                                    kPORT_LowPullResistor,
+                                                    /* Fast slew rate is configured */
+                                                    kPORT_FastSlewRate,
+                                                    /* Passive input filter is disabled */
+                                                    kPORT_PassiveFilterDisable,
+                                                    /* Open drain output is disabled */
+                                                    kPORT_OpenDrainDisable,
+                                                    /* Low drive strength is configured */
+                                                    kPORT_LowDriveStrength,
+                                                    /* Pin is configured as FC4_P1 */
+                                                    kPORT_MuxAlt2,
+                                                    /* Digital input enabled */
+                                                    kPORT_InputBufferEnable,
+                                                    /* Digital input is not inverted */
+                                                    kPORT_InputNormal,
+                                                    /* Pin Control Register fields [15:0] are not locked */
+                                                    kPORT_UnlockRegister};
+    /* PORT1_9 (pin B1) is configured as FC4_P1 */
+    PORT_SetPinConfig(PORT1, 9U, &port1_9_pinB1_config);
+
+    const port_pin_config_t port3_4_pinF14_config = {/* Internal pull-up/down resistor is disabled */
+                                                     kPORT_PullDisable,
+                                                     /* Low internal pull resistor value is selected. */
+                                                     kPORT_LowPullResistor,
+                                                     /* Fast slew rate is configured */
+                                                     kPORT_FastSlewRate,
+                                                     /* Passive input filter is disabled */
+                                                     kPORT_PassiveFilterDisable,
+                                                     /* Open drain output is disabled */
+                                                     kPORT_OpenDrainDisable,
+                                                     /* Low drive strength is configured */
+                                                     kPORT_LowDriveStrength,
+                                                     /* Pin is configured as PIO3_4 */
+                                                     kPORT_MuxAlt0,
+                                                     /* Digital input enabled */
+                                                     kPORT_InputBufferEnable,
+                                                     /* Digital input is not inverted */
+                                                     kPORT_InputNormal,
+                                                     /* Pin Control Register fields [15:0] are not locked */
+                                                     kPORT_UnlockRegister};
+    /* PORT3_4 (pin F14) is configured as PIO3_4 */
+    PORT_SetPinConfig(PORT3, 4U, &port3_4_pinF14_config);
+}
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/
diff --git a/hw/bsp/mcx/boards/mcxn947brk/pin_mux.h b/hw/bsp/mcx/boards/mcxn947brk/pin_mux.h
new file mode 100644
index 000000000..40968c275
--- /dev/null
+++ b/hw/bsp/mcx/boards/mcxn947brk/pin_mux.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright 2022 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _PIN_MUX_H_
+#define _PIN_MUX_H_
+
+/*!
+ * @addtogroup pin_mux
+ * @{
+ */
+
+/***********************************************************************************************************************
+ * API
+ **********************************************************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/*!
+ * @brief Calls initialization functions.
+ *
+ */
+void BOARD_InitBootPins(void);
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitPins(void);
+
+#if defined(__cplusplus)
+}
+#endif
+
+/*!
+ * @}
+ */
+#endif /* _PIN_MUX_H_ */
+
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/
diff --git a/hw/bsp/mcx/family.c b/hw/bsp/mcx/family.c
new file mode 100644
index 000000000..36d2f2d0a
--- /dev/null
+++ b/hw/bsp/mcx/family.c
@@ -0,0 +1,262 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018, hathach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "bsp/board.h"
+#include "fsl_device_registers.h"
+#include "fsl_gpio.h"
+#include "fsl_lpuart.h"
+#include "board.h"
+
+#include "pin_mux.h"
+#include "clock_config.h"
+
+#ifdef BOARD_TUD_RHPORT
+  #define PORT_SUPPORT_DEVICE(_n)  (BOARD_TUD_RHPORT == _n)
+#else
+  #define PORT_SUPPORT_DEVICE(_n)  0
+#endif
+
+#ifdef BOARD_TUH_RHPORT
+  #define PORT_SUPPORT_HOST(_n)    (BOARD_TUH_RHPORT == _n)
+#else
+  #define PORT_SUPPORT_HOST(_n)    0
+#endif
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM
+//--------------------------------------------------------------------+
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void USB0_FS_IRQHandler(void)
+{
+  tud_int_handler(0);
+}
+
+void USB1_HS_IRQHandler(void)
+{
+  tud_int_handler(1);
+}
+
+void board_init(void)
+{
+  BOARD_InitPins();
+  BOARD_InitBootClocks();
+
+  // 1ms tick timer
+  SysTick_Config(SystemCoreClock / 1000);
+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(USB1_HS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
+#endif
+
+  // LED
+  CLOCK_EnableClock(LED_CLK);
+  gpio_pin_config_t led_config = {
+      kGPIO_DigitalOutput,
+      0,
+  };
+  GPIO_PinInit(LED_GPIO,LED_PIN, &led_config);
+  board_led_write(0);
+
+#ifdef NEOPIXEL_PIN
+  // Neopixel
+  static uint32_t pixelData[NEOPIXEL_NUMBER];
+  IOCON_PinMuxSet(IOCON, NEOPIXEL_PORT, NEOPIXEL_PIN, IOCON_PIO_DIG_FUNC4_EN);
+
+  sctpix_init(NEOPIXEL_TYPE);
+  sctpix_addCh(NEOPIXEL_CH, pixelData, NEOPIXEL_NUMBER);
+  sctpix_setPixel(NEOPIXEL_CH, 0, 0x100010);
+  sctpix_setPixel(NEOPIXEL_CH, 1, 0x100010);
+  sctpix_show();
+#endif
+
+  // Button
+#ifdef BUTTON_GPIO
+  CLOCK_EnableClock(BUTTON_CLK);
+  gpio_pin_config_t const button_config = { kGPIO_DigitalInput, 0};
+  GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config);
+#endif
+
+#ifdef UART_DEV
+  // UART
+//  IOCON_PinMuxSet(IOCON, UART_RX_PINMUX);
+//  IOCON_PinMuxSet(IOCON, UART_TX_PINMUX);
+
+  // Enable UART when debug log is on
+  board_uart_init_clock();
+
+  lpuart_config_t uart_config;
+  LPUART_GetDefaultConfig(&uart_config);
+  uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE;
+  uart_config.enableTx     = true;
+  uart_config.enableRx     = true;
+  LPUART_Init(UART_DEV, &uart_config, 12000000u);
+#endif
+
+  // USB VBUS
+  /* PORT0 PIN22 configured as USB0_VBUS */
+
+  CLOCK_SetupExtClocking(XTAL0_CLK_HZ);
+
+#if PORT_SUPPORT_DEVICE(0)
+  // Port0 is Full Speed
+
+  /* Turn on USB0 Phy */
+  POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY);
+
+  /* reset the IP to make sure it's in reset state. */
+  RESET_PeripheralReset(kUSB0D_RST_SHIFT_RSTn);
+  RESET_PeripheralReset(kUSB0HSL_RST_SHIFT_RSTn);
+  RESET_PeripheralReset(kUSB0HMR_RST_SHIFT_RSTn);
+
+  // Enable USB Clock Adjustments to trim the FRO for the full speed controller
+  ANACTRL->FRO192M_CTRL |= ANACTRL_FRO192M_CTRL_USBCLKADJ_MASK;
+  CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 1, false);
+  CLOCK_AttachClk(kFRO_HF_to_USB0_CLK);
+
+  /*According to reference manual, device mode setting has to be set by access usb host register */
+  CLOCK_EnableClock(kCLOCK_Usbhsl0);  // enable usb0 host clock
+  USBFSH->PORTMODE |= USBFSH_PORTMODE_DEV_ENABLE_MASK;
+  CLOCK_DisableClock(kCLOCK_Usbhsl0); // disable usb0 host clock
+
+  /* enable USB Device clock */
+  CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbfsSrcFro, CLOCK_GetFreq(kCLOCK_FroHf));
+#endif
+
+#if PORT_SUPPORT_DEVICE(1)
+  // Port1 is High Speed
+
+  // Power
+  SPC0->ACTIVE_VDELAY = 0x0500;
+  /* Change the power DCDC to 1.8v (By default, DCDC is 1.8V), CORELDO to 1.1v (By default, CORELDO is 1.0V) */
+  SPC0->ACTIVE_CFG &= ~SPC_ACTIVE_CFG_CORELDO_VDD_DS_MASK;
+  SPC0->ACTIVE_CFG |= SPC_ACTIVE_CFG_DCDC_VDD_LVL(0x3) | SPC_ACTIVE_CFG_CORELDO_VDD_LVL(0x3) |
+                      SPC_ACTIVE_CFG_SYSLDO_VDD_DS_MASK | SPC_ACTIVE_CFG_DCDC_VDD_DS(0x2u);
+  /* Wait until it is done */
+  while (SPC0->SC & SPC_SC_BUSY_MASK) {}
+  if (0u == (SCG0->LDOCSR & SCG_LDOCSR_LDOEN_MASK)) {
+    SCG0->TRIM_LOCK = 0x5a5a0001U;
+    SCG0->LDOCSR |= SCG_LDOCSR_LDOEN_MASK;
+    /* wait LDO ready */
+    while (0U == (SCG0->LDOCSR & SCG_LDOCSR_VOUT_OK_MASK));
+  }
+  SYSCON->AHBCLKCTRLSET[2] |= SYSCON_AHBCLKCTRL2_USB_HS_MASK | SYSCON_AHBCLKCTRL2_USB_HS_PHY_MASK;
+  SCG0->SOSCCFG &= ~(SCG_SOSCCFG_RANGE_MASK | SCG_SOSCCFG_EREFS_MASK);
+  /* xtal = 20 ~ 30MHz */
+  SCG0->SOSCCFG = (1U << SCG_SOSCCFG_RANGE_SHIFT) | (1U << SCG_SOSCCFG_EREFS_SHIFT);
+  SCG0->SOSCCSR |= SCG_SOSCCSR_SOSCEN_MASK;
+  while (1) {
+    if (SCG0->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK) {
+      break;
+    }
+  }
+
+  // Clock
+  SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK | SYSCON_CLOCK_CTRL_CLKIN_ENA_FM_USBH_LPT_MASK;
+  CLOCK_EnableClock(kCLOCK_UsbHs);
+  CLOCK_EnableClock(kCLOCK_UsbHsPhy);
+  CLOCK_EnableUsbhsPhyPllClock(kCLOCK_Usbphy480M, 24000000U);
+  CLOCK_EnableUsbhsClock();
+
+  // USB PHY
+#if ((!(defined FSL_FEATURE_SOC_CCM_ANALOG_COUNT)) && (!(defined FSL_FEATURE_SOC_ANATOP_COUNT)))
+  USBPHY->TRIM_OVERRIDE_EN = 0x001fU; /* override IFR value */
+#endif
+
+  // Enable PHY support for Low speed device + LS via FS Hub
+  USBPHY->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK;
+
+  // Enable all power for normal operation
+  USBPHY->PWD = 0;
+
+  // TX Timing
+  uint32_t phytx = USBPHY->TX;
+  phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
+  phytx |= USBPHY_TX_D_CAL(0x04) | USBPHY_TX_TXCAL45DP(0x07) | USBPHY_TX_TXCAL45DM(0x07);
+  //phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
+  USBPHY->TX = phytx;
+#endif
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+  GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
+
+#ifdef NEOPIXEL_PIN
+  if (state) {
+    sctpix_setPixel(NEOPIXEL_CH, 0, 0x100000);
+    sctpix_setPixel(NEOPIXEL_CH, 1, 0x101010);
+  } else {
+    sctpix_setPixel(NEOPIXEL_CH, 0, 0x001000);
+    sctpix_setPixel(NEOPIXEL_CH, 1, 0x000010);
+  }
+  sctpix_show();
+#endif
+}
+
+uint32_t board_button_read(void)
+{
+#ifdef BUTTON_GPIO
+  return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN);
+#endif
+}
+
+int board_uart_read(uint8_t* buf, int len)
+{
+  (void) buf; (void) len;
+  return 0;
+}
+
+int board_uart_write(void const * buf, int len)
+{
+#ifdef UART_DEV
+  LPUART_WriteBlocking(UART_DEV, (uint8_t const *) buf, len);
+  return len;
+#else
+  (void) buf; (void) len;
+  return 0;
+#endif
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler(void)
+{
+  system_ticks++;
+}
+
+uint32_t board_millis(void)
+{
+  return system_ticks;
+}
+#endif
diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake
new file mode 100644
index 000000000..e4bc11be5
--- /dev/null
+++ b/hw/bsp/mcx/family.cmake
@@ -0,0 +1,179 @@
+include_guard()
+
+if (NOT BOARD)
+  message(FATAL_ERROR "BOARD not specified")
+endif ()
+
+# TOP is path to root directory
+set(TOP ${CMAKE_CURRENT_LIST_DIR}/../../..)
+set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
+set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS LPC55XX CACHE INTERNAL "")
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+set(BOARD_TARGET board_${BOARD})
+if (NOT TARGET ${BOARD_TARGET})
+  add_library(${BOARD_TARGET} STATIC
+    # external driver
+    #lib/sct_neopixel/sct_neopixel.c
+
+    # driver
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_gpio.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_common_arm.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpuart.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpflexcomm.c
+    # mcu
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
+    )
+#  target_compile_definitions(${BOARD_TARGET} PUBLIC
+#    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    # driver
+    # mcu
+    ${CMSIS_DIR}/CMSIS/Core/Include
+    ${SDK_DIR}/devices/${MCU_VARIANT}
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+    )
+  update_board(${BOARD_TARGET})
+
+  if (TOOLCHAIN STREQUAL "gcc")
+    target_sources(${BOARD_TARGET} PUBLIC
+      ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S
+      )
+    target_link_options(${BOARD_TARGET} PUBLIC
+      # linker file
+      "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld"
+      # link map
+      "LINKER:-Map=$<IF:$<BOOL:$<TARGET_PROPERTY:OUTPUT_NAME>>,$<TARGET_PROPERTY:OUTPUT_NAME>,$<TARGET_PROPERTY:NAME>>${CMAKE_EXECUTABLE_SUFFIX}.map"
+      # nanolib
+      --specs=nosys.specs
+      --specs=nano.specs
+      )
+  else ()
+    # TODO support IAR
+  endif ()
+endif () # BOARD_TARGET
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_target TARGET)
+  # set output name to .elf
+  set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf)
+
+  # run size after build
+  add_custom_command(TARGET ${TARGET} POST_BUILD
+    COMMAND ${TOOLCHAIN_SIZE} $<TARGET_FILE:${TARGET}>
+    )
+
+  # TOP is path to root directory
+  set(TOP "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../..")
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # TinyUSB Port
+    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  #---------- TinyUSB ----------
+  # tinyusb target is built for each example since it depends on example's tusb_config.h
+  set(TINYUSB_TARGET_PREFIX ${TARGET}-)
+  add_library(${TARGET}-tinyusb_config INTERFACE)
+
+  target_include_directories(${TARGET}-tinyusb_config INTERFACE
+    ${CMAKE_CURRENT_SOURCE_DIR}/src
+    )
+  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
+    CFG_TUSB_MCU=OPT_MCU_MCXN9
+    )
+
+  # tinyusb's CMakeList.txt
+  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
+
+  # group target (not yet supported by clion)
+  set_target_properties(${TARGET}-tinyusb ${TARGET}-tinyusb_config
+    PROPERTIES FOLDER ${TARGET}_sub
+    )
+
+  #---------- Flash ----------
+  # use MCUXpresso GUI Flash Tool to flash the elf
+
+#  set(REDLINK_EXE /usr/local/LinkServer/binaries/crt_emu_cm_redlink)
+#  add_custom_target(${TARGET}-redlink
+#    DEPENDS ${TARGET}
+#    COMMAND ${REDLINK_EXE} --flash-load-exec $<TARGET_FILE:${TARGET}> --vendor NXP -p MCXN947 --bootromstall
+#    0x50000040 -CoreIndex=0 --flash-driver= -x ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/flash --flash-dir
+#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/flash --flash-hashing
+#    )
+
+  #family_flash_jlink(${TARGET})
+  #family_flash_nxplink(${TARGET})
+  #family_flash_pyocd(${TARGET})
+endfunction()
+
+
+function(family_add_freertos TARGET)
+  # freertos_config
+  if (NOT TARGET freertos_config)
+    add_library(freertos_config INTERFACE)
+    target_include_directories(freertos_config SYSTEM INTERFACE
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/FreeRTOSConfig
+      )
+  endif()
+
+  ## freertos
+  if (NOT TARGET freertos_kernel)
+    add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../../lib/FreeRTOS-Kernel ${CMAKE_CURRENT_BINARY_DIR}/freertos_kernel)
+  endif ()
+
+  # Add FreeRTOS option to tinyusb_config
+  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
+    CFG_TUSB_OS=OPT_OS_FREERTOS
+    )
+  # link tinyusb with freeRTOS kernel
+  target_link_libraries(${TARGET}-tinyusb PUBLIC
+    freertos_kernel
+    )
+  target_link_libraries(${TARGET} PUBLIC
+    freertos_kernel
+    )
+endfunction()
+
+function(family_configure_device_example TARGET)
+  family_configure_target(${TARGET})
+endfunction()
+
+function(family_configure_host_example TARGET)
+  family_configure_target(${TARGET})
+endfunction()
+
+function(family_configure_dual_usb_example TARGET)
+  family_configure_target(${TARGET})
+endfunction()
diff --git a/hw/bsp/mcx/family.mk b/hw/bsp/mcx/family.mk
new file mode 100644
index 000000000..2cd4c2448
--- /dev/null
+++ b/hw/bsp/mcx/family.mk
@@ -0,0 +1,48 @@
+UF2_FAMILY_ID = 0x2abc77ec
+SDK_DIR = hw/mcu/nxp/mcux-sdk
+
+DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+CPU_CORE ?= cortex-m33
+include $(TOP)/tools/make/cpu/$(CPU_CORE).mk
+
+# Default to Highspeed PORT1
+PORT ?= 1
+
+CFLAGS += \
+  -flto \
+  -DCFG_TUSB_MCU=OPT_MCU_MCXN9 \
+  -DBOARD_TUD_RHPORT=$(PORT) \
+
+ifeq ($(PORT), 1)
+  $(info "PORT1 High Speed")
+  CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+else
+  $(info "PORT0 Full Speed")
+endif
+
+# mcu driver cause following warnings
+CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration
+
+# All source paths should be relative to the top level.
+LD_FILE ?= $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld
+
+SRC_C += \
+	src/portable/chipidea/ci_hs/dcd_ci_hs.c \
+	$(SDK_DIR)/devices/$(MCU_VARIANT)/system_$(MCU_CORE).c \
+	$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_clock.c \
+	$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_reset.c \
+	$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_gpio.c \
+	$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_common_arm.c \
+	$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_lpflexcomm.c \
+	$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_lpuart.c \
+
+INC += \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
+	$(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT) \
+	$(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers \
+
+SRC_S += $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/startup_$(MCU_CORE).S
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 9c43478e8..1156a171b 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -1,8 +1,4 @@
-if (TARGET _nrf_family_inclusion_marker)
-  return()
-endif ()
-
-add_library(_nrf_family_inclusion_marker INTERFACE)
+include_guard()
 
 if (NOT BOARD)
   message(FATAL_ERROR "BOARD not specified")
@@ -89,6 +85,11 @@ function(family_configure_target TARGET)
   # set output name to .elf
   set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf)
 
+  # run size after build
+  add_custom_command(TARGET ${TARGET} POST_BUILD
+    COMMAND ${TOOLCHAIN_SIZE} $<TARGET_FILE:${TARGET}>
+    )
+
   # TOP is path to root directory
   set(TOP "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../..")
 
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index ba8976a8c..9c2933983 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -59,14 +59,6 @@
   #define TUP_USBIP_OHCI
   #define TUP_OHCI_RHPORTS        2
 
-#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
-  // TODO USB0 has 6, USB1 has 4
-  #define TUP_USBIP_CHIPIDEA_HS
-  #define TUP_USBIP_EHCI
-
-  #define TUP_DCD_ENDPOINT_MAX    6
-  #define TUP_RHPORT_HIGHSPEED    1 // Port0 HS, Port1 FS
-
 #elif TU_CHECK_MCU(OPT_MCU_LPC51UXX)
    #define TUP_DCD_ENDPOINT_MAX   5
 
@@ -78,12 +70,28 @@
   // TODO USB0 has 5, USB1 has 6
   #define TUP_DCD_ENDPOINT_MAX    6
 
+#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
+  // USB0 has 6 with HS PHY, USB1 has 4 only FS
+  #define TUP_USBIP_CHIPIDEA_HS
+  #define TUP_USBIP_EHCI
+
+  #define TUP_DCD_ENDPOINT_MAX    6
+  #define TUP_RHPORT_HIGHSPEED    1
+
+#elif TU_CHECK_MCU(OPT_MCU_MCXN9)
+  // NOTE: MCXN943 port 1 use chipidea HS, port 0 use chipidea FS
+  #define TUP_USBIP_CHIPIDEA_HS
+  #define TUP_USBIP_EHCI
+
+  #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_RHPORT_HIGHSPEED    1
+
 #elif TU_CHECK_MCU(OPT_MCU_MIMXRT)
   #define TUP_USBIP_CHIPIDEA_HS
   #define TUP_USBIP_EHCI
 
   #define TUP_DCD_ENDPOINT_MAX    8
-  #define TUP_RHPORT_HIGHSPEED    1 // Port0 HS, Port1 HS
+  #define TUP_RHPORT_HIGHSPEED    1
 
 #elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32)
   #define TUP_USBIP_CHIPIDEA_FS
diff --git a/src/device/dcd.h b/src/device/dcd.h
index 00419ff05..f82b8633d 100644
--- a/src/device/dcd.h
+++ b/src/device/dcd.h
@@ -102,6 +102,22 @@ typedef struct TU_ATTR_ALIGNED(4)
 
 //TU_VERIFY_STATIC(sizeof(dcd_event_t) <= 12, "size is not correct");
 
+//--------------------------------------------------------------------+
+// Memory API
+//--------------------------------------------------------------------+
+
+// clean/flush data cache: write cache -> memory.
+// Required before an DMA TX transfer to make sure data is in memory
+void dcd_dcache_clean(void* addr, uint32_t data_size) TU_ATTR_WEAK;
+
+// invalidate data cache: mark cache as invalid, next read will read from memory
+// Required BOTH before and after an DMA RX transfer
+void dcd_dcache_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK;
+
+// clean and invalidate data cache
+// Required before an DMA transfer where memory is both read/write by DMA
+void dcd_dcache_clean_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK;
+
 //--------------------------------------------------------------------+
 // Controller API
 //--------------------------------------------------------------------+
diff --git a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h
index 607926a65..ceff893bd 100644
--- a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h
+++ b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h
@@ -46,18 +46,44 @@ static const ci_hs_controller_t _ci_controller[] =
 {
   // RT1010 and RT1020 only has 1 USB controller
   #if FSL_FEATURE_SOC_USBHS_COUNT == 1
-    { .reg_base = USB_BASE , .irqnum = USB_OTG1_IRQn, .ep_count = 8 }
+    { .reg_base = USB_BASE , .irqnum = USB_OTG1_IRQn }
   #else
-    { .reg_base = USB1_BASE, .irqnum = USB_OTG1_IRQn, .ep_count = 8 },
-    { .reg_base = USB2_BASE, .irqnum = USB_OTG2_IRQn, .ep_count = 8 }
+    { .reg_base = USB1_BASE, .irqnum = USB_OTG1_IRQn},
+    { .reg_base = USB2_BASE, .irqnum = USB_OTG2_IRQn}
   #endif
 };
 
+#define CI_HS_REG(_port)        ((ci_hs_regs_t*) _ci_controller[_port].reg_base)
+
+//------------- DCD -------------//
 #define CI_DCD_INT_ENABLE(_p)   NVIC_EnableIRQ (_ci_controller[_p].irqnum)
 #define CI_DCD_INT_DISABLE(_p)  NVIC_DisableIRQ(_ci_controller[_p].irqnum)
 
+//------------- HCD -------------//
 #define CI_HCD_INT_ENABLE(_p)   NVIC_EnableIRQ (_ci_controller[_p].irqnum)
 #define CI_HCD_INT_DISABLE(_p)  NVIC_DisableIRQ(_ci_controller[_p].irqnum)
 
+//------------- DCache -------------//
+TU_ATTR_ALWAYS_INLINE static inline bool imxrt_is_cache_mem(uint32_t addr) {
+  return !(0x20000000 <= addr && addr < 0x20100000);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean(void* addr, uint32_t data_size) {
+  if (imxrt_is_cache_mem((uint32_t) addr)) {
+    SCB_CleanDCache_by_Addr((uint32_t *) addr, (int32_t) data_size);
+  }
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_invalidate(void* addr, uint32_t data_size) {
+  if (imxrt_is_cache_mem((uint32_t) addr)) {
+    SCB_InvalidateDCache_by_Addr(addr, (int32_t) data_size);
+  }
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean_invalidate(void* addr, uint32_t data_size) {
+  if (imxrt_is_cache_mem((uint32_t) addr)) {
+    SCB_CleanInvalidateDCache_by_Addr(addr, (int32_t) data_size);
+  }
+}
 
 #endif
diff --git a/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h b/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h
index 8c2e7dfa6..2e84c93e7 100644
--- a/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h
+++ b/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h
@@ -32,10 +32,12 @@
 
 static const ci_hs_controller_t _ci_controller[] =
 {
-  { .reg_base = LPC_USB0_BASE, .irqnum = USB0_IRQn, .ep_count = 6 },
-  { .reg_base = LPC_USB1_BASE, .irqnum = USB1_IRQn, .ep_count = 4 }
+  { .reg_base = LPC_USB0_BASE, .irqnum = USB0_IRQn },
+  { .reg_base = LPC_USB1_BASE, .irqnum = USB1_IRQn }
 };
 
+#define CI_HS_REG(_port)        ((ci_hs_regs_t*) _ci_controller[_port].reg_base)
+
 #define CI_DCD_INT_ENABLE(_p)   NVIC_EnableIRQ (_ci_controller[_p].irqnum)
 #define CI_DCD_INT_DISABLE(_p)  NVIC_DisableIRQ(_ci_controller[_p].irqnum)
 
diff --git a/src/portable/chipidea/ci_hs/ci_hs_mcx.h b/src/portable/chipidea/ci_hs/ci_hs_mcx.h
new file mode 100644
index 000000000..f940f4a9d
--- /dev/null
+++ b/src/portable/chipidea/ci_hs/ci_hs_mcx.h
@@ -0,0 +1,52 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _CI_HS_MCX_H_
+#define _CI_HS_MCX_H_
+
+#include "fsl_device_registers.h"
+
+// NOTE: MCX N9 has 2 different USB Controller
+// - USB0 is KHCI FullSpeed
+// - USB1 is ChipIdea HighSpeed, therefore rhport = 1 is actually index 0
+
+static const ci_hs_controller_t _ci_controller[] = {
+    {.reg_base = USBHS1__USBC_BASE, .irqnum = USB1_HS_IRQn}
+};
+
+TU_ATTR_ALWAYS_INLINE static inline ci_hs_regs_t* CI_HS_REG(uint8_t port) {
+  (void) port;
+  return ((ci_hs_regs_t*) _ci_controller[0].reg_base);
+}
+
+#define CI_DCD_INT_ENABLE(_p)   do { (void) _p; NVIC_EnableIRQ (_ci_controller[0].irqnum); } while (0)
+#define CI_DCD_INT_DISABLE(_p)  do { (void) _p; NVIC_DisableIRQ(_ci_controller[0].irqnum); } while (0)
+
+#define CI_HCD_INT_ENABLE(_p)   NVIC_EnableIRQ (_ci_controller[_p].irqnum)
+#define CI_HCD_INT_DISABLE(_p)  NVIC_DisableIRQ(_ci_controller[_p].irqnum)
+
+
+#endif
diff --git a/src/portable/chipidea/ci_hs/ci_hs_type.h b/src/portable/chipidea/ci_hs/ci_hs_type.h
index 31b5a012d..2f3aa3694 100644
--- a/src/portable/chipidea/ci_hs/ci_hs_type.h
+++ b/src/portable/chipidea/ci_hs/ci_hs_type.h
@@ -31,13 +31,21 @@
  extern "C" {
 #endif
 
+// DCCPARAMS
+enum {
+  DCCPARAMS_DEN_MASK = 0x1Fu, ///< DEN bit 4:0
+};
+
 // USBCMD
 enum {
   USBCMD_RUN_STOP         = TU_BIT(0),
   USBCMD_RESET            = TU_BIT(1),
   USBCMD_SETUP_TRIPWIRE   = TU_BIT(13),
-  USBCMD_ADD_QTD_TRIPWIRE = TU_BIT(14)  ///< This bit is used as a semaphore to ensure the to proper addition of a new dTD to an active (primed) endpoint’s linked list. This bit is set and cleared by software during the process of adding a new dTD
-// Interrupt Threshold bit 23:16
+  USBCMD_ADD_QTD_TRIPWIRE = TU_BIT(14), // This bit is used as a semaphore to ensure the to proper addition of a
+                                        // new dTD to an active (primed) endpoint’s linked list. This bit is set and
+                                        // cleared by software during the process of adding a new dTD
+
+  USBCMD_INTR_THRESHOLD_MASK = 0x00FF0000u, // Interrupt Threshold bit 23:16
 };
 
 // PORTSC1
@@ -72,6 +80,7 @@ enum {
 
 // USBMode
 enum {
+  USBMOD_CM_MASK    = TU_BIT(0) | TU_BIT(1),
   USBMODE_CM_DEVICE = 2,
   USBMODE_CM_HOST   = 3,
 
@@ -134,7 +143,6 @@ typedef struct
 {
   uint32_t reg_base;
   uint32_t irqnum;
-  uint8_t  ep_count; // Max bi-directional Endpoints
 }ci_hs_controller_t;
 
 #ifdef __cplusplus
diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
index 9be79a2f1..850c82e43 100644
--- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
@@ -28,35 +28,53 @@
 
 #if CFG_TUD_ENABLED && defined(TUP_USBIP_CHIPIDEA_HS)
 
-//--------------------------------------------------------------------+
-// INCLUDE
-//--------------------------------------------------------------------+
 #include "device/dcd.h"
 #include "ci_hs_type.h"
 
 #if CFG_TUSB_MCU == OPT_MCU_MIMXRT
   #include "ci_hs_imxrt.h"
-#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
+
+  void dcd_dcache_clean(void* addr, uint32_t data_size) {
+    imxrt_dcache_clean(addr, data_size);
+  }
+
+  void dcd_dcache_invalidate(void* addr, uint32_t data_size) {
+    imxrt_dcache_invalidate(addr, data_size);
+  }
+
+  void dcd_dcache_clean_invalidate(void* addr, uint32_t data_size) {
+    imxrt_dcache_clean_invalidate(addr, data_size);
+  }
+
+#else
+
+#if TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
   #include "ci_hs_lpc18_43.h"
+
+#elif TU_CHECK_MCU(OPT_MCU_MCXN9)
+  // MCX N9 only port 1 use this controller
+  #include "ci_hs_mcx.h"
 #else
   #error "Unsupported MCUs"
 #endif
 
+  TU_ATTR_WEAK void dcd_dcache_clean(void* addr, uint32_t data_size) {
+    (void) addr; (void) data_size;
+  }
+
+  TU_ATTR_WEAK void dcd_dcache_invalidate(void* addr, uint32_t data_size) {
+    (void) addr; (void) data_size;
+  }
+
+  TU_ATTR_WEAK void dcd_dcache_clean_invalidate(void* addr, uint32_t data_size) {
+    (void) addr; (void) data_size;
+  }
+#endif
+
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
 
-#define CI_HS_REG(_port)      ((ci_hs_regs_t*) _ci_controller[_port].reg_base)
-
-// Clean means to push any cached changes to RAM and invalidate "removes" the
-// entry from the cache.
-#if defined(__CORTEX_M) && __CORTEX_M == 7 && __DCACHE_PRESENT == 1
-  #define CleanInvalidateDCache_by_Addr   SCB_CleanInvalidateDCache_by_Addr
-#else
-  #define CleanInvalidateDCache_by_Addr(_addr, _dsize)
-#endif
-
-
 // ENDPTCTRL
 enum {
   ENDPTCTRL_STALL          = TU_BIT(0),
@@ -160,6 +178,16 @@ typedef struct {
 CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(2048)
 static dcd_data_t _dcd_data;
 
+//--------------------------------------------------------------------+
+// Prototypes and Helper Functions
+//--------------------------------------------------------------------+
+
+TU_ATTR_ALWAYS_INLINE
+static inline uint8_t ci_ep_count(ci_hs_regs_t const* dcd_reg)
+{
+  return dcd_reg->DCCPARAMS & DCCPARAMS_DEN_MASK;
+}
+
 //--------------------------------------------------------------------+
 // Controller API
 //--------------------------------------------------------------------+
@@ -174,7 +202,8 @@ static void bus_reset(uint8_t rhport)
   // endpoint type of the unused direction must be changed from the control type to any other
   // type (e.g. bulk). Leaving an un-configured endpoint control will cause undefined behavior
   // for the data PID tracking on the active endpoint.
-  for( uint8_t i=1; i < _ci_controller[rhport].ep_count; i++)
+  uint8_t const ep_count = ci_ep_count(dcd_reg);
+  for( uint8_t i=1; i < ep_count; i++)
   {
     dcd_reg->ENDPTCTRL[i] = (TUSB_XFER_BULK << ENDPTCTRL_TYPE_POS) | (TUSB_XFER_BULK << (16+ENDPTCTRL_TYPE_POS));
   }
@@ -202,7 +231,7 @@ static void bus_reset(uint8_t rhport)
 
   _dcd_data.qhd[0][0].int_on_setup = 1; // OUT only
 
-  CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t));
+  dcd_dcache_clean_invalidate(&_dcd_data, sizeof(dcd_data_t));
 }
 
 void dcd_init(uint8_t rhport)
@@ -211,26 +240,34 @@ void dcd_init(uint8_t rhport)
 
   ci_hs_regs_t* dcd_reg = CI_HS_REG(rhport);
 
+  TU_ASSERT(ci_ep_count(dcd_reg) <= TUP_DCD_ENDPOINT_MAX, );
+
   // Reset controller
   dcd_reg->USBCMD |= USBCMD_RESET;
   while( dcd_reg->USBCMD & USBCMD_RESET ) {}
 
   // Set mode to device, must be set immediately after reset
-  dcd_reg->USBMODE = USBMODE_CM_DEVICE;
+  uint32_t usbmode = dcd_reg->USBMODE & ~USBMOD_CM_MASK;
+  usbmode |= USBMODE_CM_DEVICE;
+  dcd_reg->USBMODE = usbmode;
+
   dcd_reg->OTGSC = OTGSC_VBUS_DISCHARGE | OTGSC_OTG_TERMINATION;
 
 #if !TUD_OPT_HIGH_SPEED
   dcd_reg->PORTSC1 = PORTSC1_FORCE_FULL_SPEED;
 #endif
 
-  CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t));
+  dcd_dcache_clean_invalidate(&_dcd_data, sizeof(dcd_data_t));
 
   dcd_reg->ENDPTLISTADDR = (uint32_t) _dcd_data.qhd; // Endpoint List Address has to be 2K alignment
   dcd_reg->USBSTS  = dcd_reg->USBSTS;
   dcd_reg->USBINTR = INTR_USB | INTR_ERROR | INTR_PORT_CHANGE | INTR_SUSPEND;
 
-  dcd_reg->USBCMD &= ~0x00FF0000;     // Interrupt Threshold Interval = 0
-  dcd_reg->USBCMD |= USBCMD_RUN_STOP; // Connect
+  uint32_t usbcmd = dcd_reg->USBCMD;
+  usbcmd &= ~USBCMD_INTR_THRESHOLD_MASK; // Interrupt Threshold Interval = 0
+  usbcmd |= USBCMD_RUN_STOP; // run
+
+  dcd_reg->USBCMD = usbcmd;
 }
 
 void dcd_int_enable(uint8_t rhport)
@@ -286,7 +323,7 @@ static void qtd_init(dcd_qtd_t* p_qtd, void * data_ptr, uint16_t total_bytes)
 {
   // Force the CPU to flush the buffer. We increase the size by 31 because the call aligns the
   // address to 32-byte boundaries. Buffer must be word aligned
-  CleanInvalidateDCache_by_Addr((uint32_t*) tu_align((uint32_t) data_ptr, 4), total_bytes + 31);
+  dcd_dcache_clean_invalidate((uint32_t*) tu_align((uint32_t) data_ptr, 4), total_bytes + 31);
 
   tu_memclr(p_qtd, sizeof(dcd_qtd_t));
 
@@ -343,8 +380,10 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
   uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress);
   uint8_t const dir   = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
 
+  ci_hs_regs_t* dcd_reg = CI_HS_REG(rhport);
+
   // Must not exceed max endpoint number
-  TU_ASSERT( epnum < _ci_controller[rhport].ep_count );
+  TU_ASSERT(epnum < ci_ep_count(dcd_reg));
 
   //------------- Prepare Queue Head -------------//
   dcd_qhd_t * p_qhd = &_dcd_data.qhd[epnum][dir];
@@ -359,11 +398,9 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
 
   p_qhd->qtd_overlay.next        = QTD_NEXT_INVALID;
 
-  CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t));
+  dcd_dcache_clean_invalidate(&_dcd_data, sizeof(dcd_data_t));
 
   // Enable EP Control
-  ci_hs_regs_t* dcd_reg = CI_HS_REG(rhport);
-
   uint32_t const epctrl = (p_endpoint_desc->bmAttributes.xfer << ENDPTCTRL_TYPE_POS) | ENDPTCTRL_ENABLE | ENDPTCTRL_TOGGLE_RESET;
 
   if ( dir == TUSB_DIR_OUT )
@@ -382,7 +419,8 @@ void dcd_edpt_close_all (uint8_t rhport)
   ci_hs_regs_t* dcd_reg = CI_HS_REG(rhport);
 
   // Disable all non-control endpoints
-  for( uint8_t epnum=1; epnum < _ci_controller[rhport].ep_count; epnum++)
+  uint8_t const ep_count = ci_ep_count(dcd_reg);
+  for (uint8_t epnum = 1; epnum < ep_count; epnum++)
   {
     _dcd_data.qhd[epnum][TUSB_DIR_OUT].qtd_overlay.halted = 1;
     _dcd_data.qhd[epnum][TUSB_DIR_IN ].qtd_overlay.halted = 1;
@@ -420,7 +458,7 @@ static void qhd_start_xfer(uint8_t rhport, uint8_t epnum, uint8_t dir)
   p_qhd->qtd_overlay.next   = (uint32_t) p_qtd; // link qtd to qhd
 
   // flush cache
-  CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t));
+  dcd_dcache_clean_invalidate(&_dcd_data, sizeof(dcd_data_t));
 
   if ( epnum == 0 )
   {
@@ -498,7 +536,7 @@ bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16
         }
       }
 
-      CleanInvalidateDCache_by_Addr((uint32_t*) tu_align((uint32_t) fifo_info.ptr_wrap, 4), total_bytes - fifo_info.len_wrap + 31);
+      dcd_dcache_clean_invalidate((uint32_t*) tu_align((uint32_t) fifo_info.ptr_wrap, 4), total_bytes - fifo_info.len_wrap + 31);
     }
     else
     {
@@ -611,7 +649,7 @@ void dcd_int_handler(uint8_t rhport)
   if (int_status & INTR_USB)
   {
     // Make sure we read the latest version of _dcd_data.
-    CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t));
+    dcd_dcache_clean_invalidate(&_dcd_data, sizeof(dcd_data_t));
 
     uint32_t const edpt_complete = dcd_reg->ENDPTCOMPLETE;
     dcd_reg->ENDPTCOMPLETE = edpt_complete; // acknowledge
diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
index ab6a42e11..8c27abbf6 100644
--- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
@@ -42,28 +42,17 @@
 #if CFG_TUSB_MCU == OPT_MCU_MIMXRT
   #include "ci_hs_imxrt.h"
 
-  // check if memory is cacheable i.e not in DTCM
-  TU_ATTR_ALWAYS_INLINE static inline bool is_cache_mem(uint32_t addr) {
-    return !(0x20000000 <= addr && addr < 0x20100000);
-  }
-
   void hcd_dcache_clean(void* addr, uint32_t data_size) {
-    if (is_cache_mem((uint32_t) addr)) {
-      SCB_CleanDCache_by_Addr((uint32_t *) addr, (int32_t) data_size);
-    }
+    imxrt_dcache_clean(addr, data_size);
   }
 
   void hcd_dcache_invalidate(void* addr, uint32_t data_size) {
-    if (is_cache_mem((uint32_t) addr)) {
-      SCB_InvalidateDCache_by_Addr(addr, (int32_t) data_size);
-    }
+    imxrt_dcache_invalidate(addr, data_size);
   }
 
-void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) {
-  if (is_cache_mem((uint32_t) addr)) {
-    SCB_CleanInvalidateDCache_by_Addr(addr, (int32_t) data_size);
+  void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) {
+    imxrt_dcache_clean_invalidate(addr, data_size);
   }
-}
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
   #include "ci_hs_lpc18_43.h"
@@ -75,8 +64,6 @@ void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) {
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
 
-#define CI_HS_REG(_port)      ((ci_hs_regs_t*) _ci_controller[_port].reg_base)
-
 //--------------------------------------------------------------------+
 // Controller API
 //--------------------------------------------------------------------+
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 852e7f4fe..2b25eee9d 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -163,22 +163,15 @@ static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t
 static inline ehci_link_t* list_next (ehci_link_t const *p_link);
 
 TU_ATTR_WEAK void hcd_dcache_clean(void* addr, uint32_t data_size) {
-  (void) addr;
-  (void) data_size;
+  (void) addr; (void) data_size;
 }
 
-// invalidate data cache: mark cache as invalid, next read will read from memory
-// Required BOTH before and after an DMA RX transfer
 TU_ATTR_WEAK void hcd_dcache_invalidate(void* addr, uint32_t data_size) {
-  (void) addr;
-  (void) data_size;
+  (void) addr; (void) data_size;
 }
 
-// clean and invalidate data cache
-// Required before an DMA transfer where memory is both read/write by DMA
 TU_ATTR_WEAK void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) {
-  (void) addr;
-  (void) data_size;
+  (void) addr; (void) data_size;
 }
 
 //--------------------------------------------------------------------+
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 4f3f3a985..948c9edf3 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -166,6 +166,10 @@
 // WCH
 #define OPT_MCU_CH32V307         2200 ///< WCH CH32V307
 
+
+// NXP LPC MCX
+#define OPT_MCU_MCXN9            2300  ///< NXP MCX N9 Series
+
 // Helper to check if configured MCU is one of listed
 // Apply _TU_CHECK_MCU with || as separator to list of input
 #define _TU_CHECK_MCU(_m)   (CFG_TUSB_MCU == _m)
@@ -274,7 +278,7 @@
 // In case TUP_MCU_STRICT_ALIGN = 1 and TUP_ARCH_STRICT_ALIGN =0, we will not reply on compiler
 // to generate unaligned access code.
 // LPC_IP3511 Highspeed cannot access unaligned memory on USB_RAM
-#if TUD_OPT_HIGH_SPEED && (CFG_TUSB_MCU == OPT_MCU_LPC54XXX || CFG_TUSB_MCU == OPT_MCU_LPC55XX)
+#if TUD_OPT_HIGH_SPEED && TU_CHECK_MCU(OPT_MCU_LPC54XXX, OPT_MCU_LPC55XX)
   #define TUP_MCU_STRICT_ALIGN   1
 #else
   #define TUP_MCU_STRICT_ALIGN   0
diff --git a/tools/cmake/cpu/cortex-m3.cmake b/tools/cmake/cpu/cortex-m3.cmake
new file mode 100644
index 000000000..b740ee44c
--- /dev/null
+++ b/tools/cmake/cpu/cortex-m3.cmake
@@ -0,0 +1,10 @@
+if (TOOLCHAIN STREQUAL "gcc")
+  list(APPEND TOOLCHAIN_COMMON_FLAGS
+    -mthumb
+    -mcpu=cortex-m3
+    )
+
+  set(FREERTOS_PORT GCC_ARM_CM3 CACHE INTERNAL "")
+else ()
+  # TODO support IAR
+endif ()
diff --git a/tools/cmake/cpu/cortex-m33.cmake b/tools/cmake/cpu/cortex-m33.cmake
index fbd5027b1..26c91a64f 100644
--- a/tools/cmake/cpu/cortex-m33.cmake
+++ b/tools/cmake/cpu/cortex-m33.cmake
@@ -3,10 +3,11 @@ if (TOOLCHAIN STREQUAL "gcc")
     -mthumb
     -mcpu=cortex-m33
     -mfloat-abi=hard
-    -mfpu=fpv5-d16
+    #-mfpu=fpv5-d16
+    -mfpu=fpv5-sp-d16
     )
 
-  set(FREERTOS_PORT GCC_ARM_CM33_NONSECURE CACHE INTERNAL "")
+  set(FREERTOS_PORT GCC_ARM_CM33_NTZ_NONSECURE CACHE INTERNAL "")
 else ()
   # TODO support IAR
 endif ()
diff --git a/tools/cmake/toolchain/arm_gcc.cmake b/tools/cmake/toolchain/arm_gcc.cmake
index c7b6cff98..5f25d637b 100644
--- a/tools/cmake/toolchain/arm_gcc.cmake
+++ b/tools/cmake/toolchain/arm_gcc.cmake
@@ -3,6 +3,8 @@ set(CMAKE_SYSTEM_NAME Generic)
 set(CMAKE_ASM_COMPILER "arm-none-eabi-gcc")
 set(CMAKE_C_COMPILER "arm-none-eabi-gcc")
 set(CMAKE_CXX_COMPILER "arm-none-eabi-g++")
+
+set(TOOLCHAIN_SIZE "arm-none-eabi-size" CACHE INTERNAL "")
 set(GCC_ELF2BIN "arm-none-eabi-objcopy")
 set_property(GLOBAL PROPERTY ELF2BIN ${GCC_ELF2BIN})
 
diff --git a/tools/get_deps.py b/tools/get_deps.py
index be5738dc1..f499562cb 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -24,7 +24,7 @@ deps_optional = {
     'hw/mcu/nordic/nrfx'                       : ['2527e3c8449cfd38aee41598e8af8492f410ed15', 'https://github.com/NordicSemiconductor/nrfx.git'               ],
     'hw/mcu/nuvoton'                           : ['2204191ec76283371419fbcec207da02e1bc22fa', 'https://github.com/majbthrd/nuc_driver.git'                    ],
     'hw/mcu/nxp/lpcopen'                       : ['43c45c85405a5dd114fff0ea95cca62837740c13', 'https://github.com/hathach/nxp_lpcopen.git'                    ],
-    'hw/mcu/nxp/mcux-sdk'                      : ['f357a1150f6cf6c6b844f53f2d426bfb3e649850', 'https://github.com/NXPmicro/mcux-sdk.git'                      ],
+    'hw/mcu/nxp/mcux-sdk'                      : ['950819b7de9b32f92c3edf396bc5ffb8d66e7009', 'https://github.com/hathach/mcux-sdk.git'                       ],
     'hw/mcu/nxp/nxp_sdk'                       : ['845c8fc49b6fb660f06a5c45225494eacb06f00c', 'https://github.com/hathach/nxp_sdk.git'                        ],
     'hw/mcu/raspberry_pi/Pico-PIO-USB'         : ['c3715ce94b6f6391856de56081d4d9b3e98fa93d', 'https://github.com/sekigon-gonnoc/Pico-PIO-USB.git'            ],
     'hw/mcu/renesas/fsp'                       : ['8dc14709f2a6518b43f71efad70d900b7718d9f1', 'https://github.com/renesas/fsp.git'                            ],
diff --git a/tools/make/cpu/cortex-m33.mk b/tools/make/cpu/cortex-m33.mk
index 2ea3a0753..3d12b01fd 100644
--- a/tools/make/cpu/cortex-m33.mk
+++ b/tools/make/cpu/cortex-m33.mk
@@ -3,7 +3,9 @@ ifeq ($(TOOLCHAIN),gcc)
     -mthumb \
     -mcpu=cortex-m33 \
     -mfloat-abi=hard \
-    -mfpu=fpv5-d16 \
+    -mfpu=fpv5-sp-d16 \
+
+    #-mfpu=fpv5-d16 \
 
   #set(FREERTOS_PORT GCC_ARM_CM33_NONSECURE CACHE INTERNAL "")
   FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure

From 57d2eb603b412a6bfbfdad7fb0bac854302b4351 Mon Sep 17 00:00:00 2001
From: Aladdin Bakosh <aladdin.bakosh@emerson.com>
Date: Mon, 15 May 2023 18:27:45 +0200
Subject: [PATCH 347/691] fix(RA Host Portable): implement missing function
 __builtin_ctz(x) for IAR

---
 src/portable/renesas/rusb2/hcd_rusb2.c | 2 +-
 src/portable/renesas/rusb2/rusb2_ra.h  | 4 ++++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index e4743223e..0e6fa1618 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -407,7 +407,7 @@ static void process_pipe0_bemp(uint8_t rhport)
 static void process_pipe_nrdy(uint8_t rhport, unsigned num)
 {
   (void)rhport;
-  unsigned result;
+  xfer_result_t result;
   uint16_t volatile *ctr = get_pipectr(num);
   // TU_LOG1("NRDY %d %x\n", num, *ctr);
   switch (*ctr & RUSB2_PIPE_CTR_PID_Msk) {
diff --git a/src/portable/renesas/rusb2/rusb2_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h
index 5785850cc..5be9f11ce 100644
--- a/src/portable/renesas/rusb2/rusb2_ra.h
+++ b/src/portable/renesas/rusb2/rusb2_ra.h
@@ -36,6 +36,10 @@ extern "C" {
 
 #define RUSB2_REG_BASE (0x40090000)
 
+#if defined(__ICCARM__)
+  #define __builtin_ctz(x)             __iar_builtin_CLZ(__iar_builtin_RBIT(x))
+#endif
+
 TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_enable(uint8_t rhport)
 {
   (void) rhport;

From 5a0c2bd63892f8457a707c0046e2d01ddba4f1e1 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 25 May 2023 16:11:57 +0700
Subject: [PATCH 348/691] update get_deps.py to support geting family as
 argument

---
 .github/workflows/cmake_arm.yml |   2 +-
 tools/get_deps.py               | 245 ++++++++++++++++++++++++--------
 2 files changed, 185 insertions(+), 62 deletions(-)

diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index 12173fb63..d7eea512c 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -52,7 +52,7 @@ jobs:
       uses: actions/checkout@v3
 
     - name: Get Dependencies
-      run: python3 tools/get_family_deps.py ${{ matrix.family }}
+      run: python3 tools/get_deps.py ${{ matrix.family }}
 
     - name: Build
       run: python tools/build_cmake.py ${{ matrix.family }}
diff --git a/tools/get_deps.py b/tools/get_deps.py
index f499562cb..842fb9275 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -4,67 +4,176 @@ from pathlib import Path
 from multiprocessing import Pool
 
 # Mandatory Dependencies that is always fetched
-# path, url, commit (Alphabet sorted by path)
+# path, url, commit, family (Alphabet sorted by path)
 deps_mandatory = {
-    'lib/FreeRTOS-Kernel'                      : ['5f19e34f878af97810a7662a75eac59bd74d628b', 'https://github.com/FreeRTOS/FreeRTOS-Kernel.git'               ],
-    'lib/lwip'                                 : ['159e31b689577dbf69cf0683bbaffbd71fa5ee10', 'https://github.com/lwip-tcpip/lwip.git'                        ],
-    'tools/uf2'                                : ['19615407727073e36d81bf239c52108ba92e7660', 'https://github.com/microsoft/uf2.git'                          ],
+    'lib/FreeRTOS-Kernel': ['https://github.com/FreeRTOS/FreeRTOS-Kernel.git',
+                            '5f19e34f878af97810a7662a75eac59bd74d628b',
+                            'all'],
+    'lib/lwip': ['https://github.com/lwip-tcpip/lwip.git',
+                 '159e31b689577dbf69cf0683bbaffbd71fa5ee10',
+                 'all'],
+    'tools/uf2': ['https://github.com/microsoft/uf2.git',
+                  '19615407727073e36d81bf239c52108ba92e7660',
+                  'all'],
 }
 
 # Optional Dependencies per MCU
-# path, url, commit (Alphabet sorted by path)
+# path, url, commit, family (Alphabet sorted by path)
 deps_optional = {
-    'hw/mcu/allwinner'                         : ['8e5e89e8e132c0fd90e72d5422e5d3d68232b756', 'https://github.com/hathach/allwinner_driver.git'               ],
-    'hw/mcu/bridgetek/ft9xx/ft90x-sdk'         : ['91060164afe239fcb394122e8bf9eb24d3194eb1', 'https://github.com/BRTSG-FOSS/ft90x-sdk.git'                   ],
-    'hw/mcu/broadcom'                          : ['08370086080759ed54ac1136d62d2ad24c6fa267', 'https://github.com/adafruit/broadcom-peripherals.git'          ],
-    'hw/mcu/gd/nuclei-sdk'                     : ['7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7', 'https://github.com/Nuclei-Software/nuclei-sdk.git'             ],
-    'hw/mcu/infineon/mtb-xmclib-cat3'          : ['daf5500d03cba23e68c2f241c30af79cd9d63880', 'https://github.com/Infineon/mtb-xmclib-cat3.git'               ],
-    'hw/mcu/microchip'                         : ['9e8b37e307d8404033bb881623a113931e1edf27', 'https://github.com/hathach/microchip_driver.git'               ],
-    'hw/mcu/mindmotion/mm32sdk'                : ['0b79559eb411149d36e073c1635c620e576308d4', 'https://github.com/hathach/mm32sdk.git'                        ],
-    'hw/mcu/nordic/nrfx'                       : ['2527e3c8449cfd38aee41598e8af8492f410ed15', 'https://github.com/NordicSemiconductor/nrfx.git'               ],
-    'hw/mcu/nuvoton'                           : ['2204191ec76283371419fbcec207da02e1bc22fa', 'https://github.com/majbthrd/nuc_driver.git'                    ],
-    'hw/mcu/nxp/lpcopen'                       : ['43c45c85405a5dd114fff0ea95cca62837740c13', 'https://github.com/hathach/nxp_lpcopen.git'                    ],
-    'hw/mcu/nxp/mcux-sdk'                      : ['950819b7de9b32f92c3edf396bc5ffb8d66e7009', 'https://github.com/hathach/mcux-sdk.git'                       ],
-    'hw/mcu/nxp/nxp_sdk'                       : ['845c8fc49b6fb660f06a5c45225494eacb06f00c', 'https://github.com/hathach/nxp_sdk.git'                        ],
-    'hw/mcu/raspberry_pi/Pico-PIO-USB'         : ['c3715ce94b6f6391856de56081d4d9b3e98fa93d', 'https://github.com/sekigon-gonnoc/Pico-PIO-USB.git'            ],
-    'hw/mcu/renesas/fsp'                       : ['8dc14709f2a6518b43f71efad70d900b7718d9f1', 'https://github.com/renesas/fsp.git'                            ],
-    'hw/mcu/renesas/rx'                        : ['706b4e0cf485605c32351e2f90f5698267996023', 'https://github.com/kkitayam/rx_device.git'                     ],
-    'hw/mcu/silabs/cmsis-dfp-efm32gg12b'       : ['f1c31b7887669cb230b3ea63f9b56769078960bc', 'https://github.com/cmsis-packs/cmsis-dfp-efm32gg12b.git'       ],
-    'hw/mcu/sony/cxd56/spresense-exported-sdk' : ['2ec2a1538362696118dc3fdf56f33dacaf8f4067', 'https://github.com/sonydevworld/spresense-exported-sdk.git'    ],
-    'hw/mcu/st/cmsis_device_f0'                : ['2fc25ee22264bc27034358be0bd400b893ef837e', 'https://github.com/STMicroelectronics/cmsis_device_f0.git'     ],
-    'hw/mcu/st/cmsis_device_f1'                : ['6601104a6397299b7304fd5bcd9a491f56cb23a6', 'https://github.com/STMicroelectronics/cmsis_device_f1.git'     ],
-    'hw/mcu/st/cmsis_device_f2'                : ['182fcb3681ce116816feb41b7764f1b019ce796f', 'https://github.com/STMicroelectronics/cmsis_device_f2.git'     ],
-    'hw/mcu/st/cmsis_device_f3'                : ['5e4ee5ed7a7b6c85176bb70a9fd3c72d6eb99f1b', 'https://github.com/STMicroelectronics/cmsis_device_f3.git'     ],
-    'hw/mcu/st/cmsis_device_f4'                : ['2615e866fa48fe1ff1af9e31c348813f2b19e7ec', 'https://github.com/STMicroelectronics/cmsis_device_f4.git'     ],
-    'hw/mcu/st/cmsis_device_f7'                : ['fc676ef1ad177eb874eaa06444d3d75395fc51f4', 'https://github.com/STMicroelectronics/cmsis_device_f7.git'     ],
-    'hw/mcu/st/cmsis_device_g0'                : ['08258b28ee95f50cb9624d152a1cbf084be1f9a5', 'https://github.com/STMicroelectronics/cmsis_device_g0.git'     ],
-    'hw/mcu/st/cmsis_device_g4'                : ['ce822adb1dc552b3aedd13621edbc7fdae124878', 'https://github.com/STMicroelectronics/cmsis_device_g4.git'     ],
-    'hw/mcu/st/cmsis_device_h7'                : ['60dc2c913203dc8629dc233d4384dcc41c91e77f', 'https://github.com/STMicroelectronics/cmsis_device_h7.git'     ],
-    'hw/mcu/st/cmsis_device_l0'                : ['06748ca1f93827befdb8b794402320d94d02004f', 'https://github.com/STMicroelectronics/cmsis_device_l0.git'     ],
-    'hw/mcu/st/cmsis_device_l1'                : ['7f16ec0a1c4c063f84160b4cc6bf88ad554a823e', 'https://github.com/STMicroelectronics/cmsis_device_l1.git'     ],
-    'hw/mcu/st/cmsis_device_l4'                : ['6ca7312fa6a5a460b5a5a63d66da527fdd8359a6', 'https://github.com/STMicroelectronics/cmsis_device_l4.git'     ],
-    'hw/mcu/st/cmsis_device_l5'                : ['d922865fc0326a102c26211c44b8e42f52c1e53d', 'https://github.com/STMicroelectronics/cmsis_device_l5.git'     ],
-    'hw/mcu/st/cmsis_device_u5'                : ['bc00f3c9d8a4e25220f84c26d414902cc6bdf566', 'https://github.com/STMicroelectronics/cmsis_device_u5.git'     ],
-    'hw/mcu/st/cmsis_device_wb'                : ['9c5d1920dd9fabbe2548e10561d63db829bb744f', 'https://github.com/STMicroelectronics/cmsis_device_wb.git'     ],
-    'hw/mcu/st/stm32f0xx_hal_driver'           : ['0e95cd88657030f640a11e690a8a5186c7712ea5', 'https://github.com/STMicroelectronics/stm32f0xx_hal_driver.git'],
-    'hw/mcu/st/stm32f1xx_hal_driver'           : ['1dd9d3662fb7eb2a7f7d3bc0a4c1dc7537915a29', 'https://github.com/STMicroelectronics/stm32f1xx_hal_driver.git'],
-    'hw/mcu/st/stm32f2xx_hal_driver'           : ['c75ace9b908a9aca631193ebf2466963b8ea33d0', 'https://github.com/STMicroelectronics/stm32f2xx_hal_driver.git'],
-    'hw/mcu/st/stm32f3xx_hal_driver'           : ['1761b6207318ede021706e75aae78f452d72b6fa', 'https://github.com/STMicroelectronics/stm32f3xx_hal_driver.git'],
-    'hw/mcu/st/stm32f4xx_hal_driver'           : ['04e99fbdabd00ab8f370f377c66b0a4570365b58', 'https://github.com/STMicroelectronics/stm32f4xx_hal_driver.git'],
-    'hw/mcu/st/stm32f7xx_hal_driver'           : ['f7ffdf6bf72110e58b42c632b0a051df5997e4ee', 'https://github.com/STMicroelectronics/stm32f7xx_hal_driver.git'],
-    'hw/mcu/st/stm32g0xx_hal_driver'           : ['5b53e6cee664a82b16c86491aa0060e2110c00cb', 'https://github.com/STMicroelectronics/stm32g0xx_hal_driver.git'],
-    'hw/mcu/st/stm32g4xx_hal_driver'           : ['8b4518417706d42eef5c14e56a650005abf478a8', 'https://github.com/STMicroelectronics/stm32g4xx_hal_driver.git'],
-    'hw/mcu/st/stm32h7xx_hal_driver'           : ['d8461b980b59b1625207d8c4f2ce0a9c2a7a3b04', 'https://github.com/STMicroelectronics/stm32h7xx_hal_driver.git'],
-    'hw/mcu/st/stm32l0xx_hal_driver'           : ['fbdacaf6f8c82a4e1eb9bd74ba650b491e97e17b', 'https://github.com/STMicroelectronics/stm32l0xx_hal_driver.git'],
-    'hw/mcu/st/stm32l1xx_hal_driver'           : ['44efc446fa69ed8344e7fd966e68ed11043b35d9', 'https://github.com/STMicroelectronics/stm32l1xx_hal_driver.git'],
-    'hw/mcu/st/stm32l4xx_hal_driver'           : ['aee3d5bf283ae5df87532b781bdd01b7caf256fc', 'https://github.com/STMicroelectronics/stm32l4xx_hal_driver.git'],
-    'hw/mcu/st/stm32l5xx_hal_driver'           : ['675c32a75df37f39d50d61f51cb0dcf53f07e1cb', 'https://github.com/STMicroelectronics/stm32l5xx_hal_driver.git'],
-    'hw/mcu/st/stm32u5xx_hal_driver'           : ['2e1d4cdb386e33391cb261dfff4fefa92e4aa35a', 'https://github.com/STMicroelectronics/stm32u5xx_hal_driver.git'],
-    'hw/mcu/st/stm32wbxx_hal_driver'           : ['2c5f06638be516c1b772f768456ba637f077bac8', 'https://github.com/STMicroelectronics/stm32wbxx_hal_driver.git'],
-    'hw/mcu/ti'                                : ['143ed6cc20a7615d042b03b21e070197d473e6e5', 'https://github.com/hathach/ti_driver.git'                      ],
-    'hw/mcu/wch/ch32v307'                      : ['17761f5cf9dbbf2dcf665b7c04934188add20082', 'https://github.com/openwch/ch32v307.git'                       ],
-    'lib/CMSIS_5'                              : ['20285262657d1b482d132d20d755c8c330d55c1f', 'https://github.com/ARM-software/CMSIS_5.git'                   ],
-    'lib/sct_neopixel'                         : ['e73e04ca63495672d955f9268e003cffe168fcd8', 'https://github.com/gsteiert/sct_neopixel.git'                  ],
+    'hw/mcu/allwinner': ['https://github.com/hathach/allwinner_driver.git',
+                         '8e5e89e8e132c0fd90e72d5422e5d3d68232b756',
+                         'fc100s'],
+    'hw/mcu/bridgetek/ft9xx/ft90x-sdk': ['https://github.com/BRTSG-FOSS/ft90x-sdk.git',
+                                         '91060164afe239fcb394122e8bf9eb24d3194eb1',
+                                         'brtmm90x'],
+    'hw/mcu/broadcom': ['https://github.com/adafruit/broadcom-peripherals.git',
+                        '08370086080759ed54ac1136d62d2ad24c6fa267',
+                        'broadcom_32bit broadcom_64bit'],
+    'hw/mcu/gd/nuclei-sdk': ['https://github.com/Nuclei-Software/nuclei-sdk.git',
+                             '7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7',
+                             'gd32vf103'],
+    'hw/mcu/infineon/mtb-xmclib-cat3': ['https://github.com/Infineon/mtb-xmclib-cat3.git',
+                                        'daf5500d03cba23e68c2f241c30af79cd9d63880',
+                                        'xmc4000'],
+    'hw/mcu/microchip': ['https://github.com/hathach/microchip_driver.git',
+                         '9e8b37e307d8404033bb881623a113931e1edf27',
+                         'sam3x samd11 samd21 samd51 same5x same7x saml2x samg'],
+    'hw/mcu/mindmotion/mm32sdk': ['https://github.com/hathach/mm32sdk.git',
+                                  '0b79559eb411149d36e073c1635c620e576308d4',
+                                  'mm32'],
+    'hw/mcu/nordic/nrfx': ['https://github.com/NordicSemiconductor/nrfx.git',
+                           '2527e3c8449cfd38aee41598e8af8492f410ed15',
+                           'nrf'],
+    'hw/mcu/nuvoton': ['https://github.com/majbthrd/nuc_driver.git',
+                       '2204191ec76283371419fbcec207da02e1bc22fa',
+                       'nuc'],
+    'hw/mcu/nxp/lpcopen': ['https://github.com/hathach/nxp_lpcopen.git',
+                           '43c45c85405a5dd114fff0ea95cca62837740c13',
+                           'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43'],
+    'hw/mcu/nxp/mcux-sdk': ['https://github.com/hathach/mcux-sdk.git',
+                            '950819b7de9b32f92c3edf396bc5ffb8d66e7009',
+                            'kinetis_k32 lpc51 lpc54 lpc55 mcx imxrt'],
+    'hw/mcu/nxp/nxp_sdk': ['https://github.com/hathach/nxp_sdk.git',
+                           '845c8fc49b6fb660f06a5c45225494eacb06f00c',
+                           'kinetis_kl'],
+    'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git',
+                                         'c3715ce94b6f6391856de56081d4d9b3e98fa93d',
+                                         'rp2040'],
+    'hw/mcu/renesas/fsp': ['https://github.com/renesas/fsp.git',
+                           '8dc14709f2a6518b43f71efad70d900b7718d9f1',
+                           'ra'],
+    'hw/mcu/renesas/rx': ['https://github.com/kkitayam/rx_device.git',
+                          '706b4e0cf485605c32351e2f90f5698267996023',
+                          'rx'],
+    'hw/mcu/silabs/cmsis-dfp-efm32gg12b': ['https://github.com/cmsis-packs/cmsis-dfp-efm32gg12b.git',
+                                           'f1c31b7887669cb230b3ea63f9b56769078960bc',
+                                           'efm32'],
+    'hw/mcu/sony/cxd56/spresense-exported-sdk': ['https://github.com/sonydevworld/spresense-exported-sdk.git',
+                                                 '2ec2a1538362696118dc3fdf56f33dacaf8f4067',
+                                                 'spresense'],
+    'hw/mcu/st/cmsis_device_f0': ['https://github.com/STMicroelectronics/cmsis_device_f0.git',
+                                  '2fc25ee22264bc27034358be0bd400b893ef837e',
+                                  'stm32f0'],
+    'hw/mcu/st/cmsis_device_f1': ['https://github.com/STMicroelectronics/cmsis_device_f1.git',
+                                  '6601104a6397299b7304fd5bcd9a491f56cb23a6',
+                                  'stm32f1'],
+    'hw/mcu/st/cmsis_device_f2': ['https://github.com/STMicroelectronics/cmsis_device_f2.git',
+                                  '182fcb3681ce116816feb41b7764f1b019ce796f',
+                                  'stm32f2'],
+    'hw/mcu/st/cmsis_device_f3': ['https://github.com/STMicroelectronics/cmsis_device_f3.git',
+                                  '5e4ee5ed7a7b6c85176bb70a9fd3c72d6eb99f1b',
+                                  'stm32f3'],
+    'hw/mcu/st/cmsis_device_f4': ['https://github.com/STMicroelectronics/cmsis_device_f4.git',
+                                  '2615e866fa48fe1ff1af9e31c348813f2b19e7ec',
+                                  'stm32f4'],
+    'hw/mcu/st/cmsis_device_f7': ['https://github.com/STMicroelectronics/cmsis_device_f7.git',
+                                  'fc676ef1ad177eb874eaa06444d3d75395fc51f4',
+                                  'stm32f7'],
+    'hw/mcu/st/cmsis_device_g0': ['https://github.com/STMicroelectronics/cmsis_device_g0.git',
+                                  '08258b28ee95f50cb9624d152a1cbf084be1f9a5',
+                                  'stm32g0'],
+    'hw/mcu/st/cmsis_device_g4': ['https://github.com/STMicroelectronics/cmsis_device_g4.git',
+                                  'ce822adb1dc552b3aedd13621edbc7fdae124878',
+                                  'stm32g4'],
+    'hw/mcu/st/cmsis_device_h7': ['https://github.com/STMicroelectronics/cmsis_device_h7.git',
+                                  '60dc2c913203dc8629dc233d4384dcc41c91e77f',
+                                  'stm32h7'],
+    'hw/mcu/st/cmsis_device_l0': ['https://github.com/STMicroelectronics/cmsis_device_l0.git',
+                                  '06748ca1f93827befdb8b794402320d94d02004f',
+                                  'stm32l0'],
+    'hw/mcu/st/cmsis_device_l1': ['https://github.com/STMicroelectronics/cmsis_device_l1.git',
+                                  '7f16ec0a1c4c063f84160b4cc6bf88ad554a823e',
+                                  'stm32l1'],
+    'hw/mcu/st/cmsis_device_l4': ['https://github.com/STMicroelectronics/cmsis_device_l4.git',
+                                  '6ca7312fa6a5a460b5a5a63d66da527fdd8359a6',
+                                  'stm32l4'],
+    'hw/mcu/st/cmsis_device_l5': ['https://github.com/STMicroelectronics/cmsis_device_l5.git',
+                                  'd922865fc0326a102c26211c44b8e42f52c1e53d',
+                                  'stm32l5'],
+    'hw/mcu/st/cmsis_device_u5': ['https://github.com/STMicroelectronics/cmsis_device_u5.git',
+                                  'bc00f3c9d8a4e25220f84c26d414902cc6bdf566',
+                                  'stm32u5'],
+    'hw/mcu/st/cmsis_device_wb': ['https://github.com/STMicroelectronics/cmsis_device_wb.git',
+                                  '9c5d1920dd9fabbe2548e10561d63db829bb744f',
+                                  'stm32wb'],
+    'hw/mcu/st/stm32f0xx_hal_driver': ['https://github.com/STMicroelectronics/stm32f0xx_hal_driver.git',
+                                       '0e95cd88657030f640a11e690a8a5186c7712ea5',
+                                       'stm32f0'],
+    'hw/mcu/st/stm32f1xx_hal_driver': ['https://github.com/STMicroelectronics/stm32f1xx_hal_driver.git',
+                                       '1dd9d3662fb7eb2a7f7d3bc0a4c1dc7537915a29',
+                                       'stm32f1'],
+    'hw/mcu/st/stm32f2xx_hal_driver': ['https://github.com/STMicroelectronics/stm32f2xx_hal_driver.git',
+                                       'c75ace9b908a9aca631193ebf2466963b8ea33d0',
+                                       'stm32f2'],
+    'hw/mcu/st/stm32f3xx_hal_driver': ['https://github.com/STMicroelectronics/stm32f3xx_hal_driver.git',
+                                       '1761b6207318ede021706e75aae78f452d72b6fa',
+                                       'stm32f3'],
+    'hw/mcu/st/stm32f4xx_hal_driver': ['https://github.com/STMicroelectronics/stm32f4xx_hal_driver.git',
+                                       '04e99fbdabd00ab8f370f377c66b0a4570365b58',
+                                       'stm32f4'],
+    'hw/mcu/st/stm32f7xx_hal_driver': ['https://github.com/STMicroelectronics/stm32f7xx_hal_driver.git',
+                                       'f7ffdf6bf72110e58b42c632b0a051df5997e4ee',
+                                       'stm32f7'],
+    'hw/mcu/st/stm32g0xx_hal_driver': ['https://github.com/STMicroelectronics/stm32g0xx_hal_driver.git',
+                                       '5b53e6cee664a82b16c86491aa0060e2110c00cb',
+                                       'stm32g0'],
+    'hw/mcu/st/stm32g4xx_hal_driver': ['https://github.com/STMicroelectronics/stm32g4xx_hal_driver.git',
+                                       '8b4518417706d42eef5c14e56a650005abf478a8',
+                                       'stm32g4'],
+    'hw/mcu/st/stm32h7xx_hal_driver': ['https://github.com/STMicroelectronics/stm32h7xx_hal_driver.git',
+                                       'd8461b980b59b1625207d8c4f2ce0a9c2a7a3b04',
+                                       'stm32h7'],
+    'hw/mcu/st/stm32l0xx_hal_driver': ['https://github.com/STMicroelectronics/stm32l0xx_hal_driver.git',
+                                       'fbdacaf6f8c82a4e1eb9bd74ba650b491e97e17b',
+                                       'stm32l0'],
+    'hw/mcu/st/stm32l1xx_hal_driver': ['https://github.com/STMicroelectronics/stm32l1xx_hal_driver.git',
+                                       '44efc446fa69ed8344e7fd966e68ed11043b35d9',
+                                       'stm32l1'],
+    'hw/mcu/st/stm32l4xx_hal_driver': ['https://github.com/STMicroelectronics/stm32l4xx_hal_driver.git',
+                                       'aee3d5bf283ae5df87532b781bdd01b7caf256fc',
+                                       'stm32l4'],
+    'hw/mcu/st/stm32l5xx_hal_driver': ['https://github.com/STMicroelectronics/stm32l5xx_hal_driver.git',
+                                       '675c32a75df37f39d50d61f51cb0dcf53f07e1cb',
+                                       'stm32l5'],
+    'hw/mcu/st/stm32u5xx_hal_driver': ['https://github.com/STMicroelectronics/stm32u5xx_hal_driver.git',
+                                       '2e1d4cdb386e33391cb261dfff4fefa92e4aa35a',
+                                       'stm32u5'],
+    'hw/mcu/st/stm32wbxx_hal_driver': ['https://github.com/STMicroelectronics/stm32wbxx_hal_driver.git',
+                                       '2c5f06638be516c1b772f768456ba637f077bac8',
+                                       'stm32wb'],
+    'hw/mcu/ti': ['https://github.com/hathach/ti_driver.git',
+                  '143ed6cc20a7615d042b03b21e070197d473e6e5',
+                  'msp430 msp432e4 tm4c123'],
+    'hw/mcu/wch/ch32v307': ['https://github.com/openwch/ch32v307.git',
+                            '17761f5cf9dbbf2dcf665b7c04934188add20082',
+                            'ch32v307'],
+    'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git',
+                    '20285262657d1b482d132d20d755c8c330d55c1f',
+                    'stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h7 stm32l0 stm32l1 stm32l4 '
+                    'stm32l5 stm32u5 stm32wb'],
+    'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git',
+                         'e73e04ca63495672d955f9268e003cffe168fcd8',
+                         'lpc55'],
 }
 
 # combined 2 deps
@@ -78,8 +187,10 @@ def get_a_dep(d):
     if d not in deps_all.keys():
         print('{} is not found in dependency list')
         return 1
-    commit = deps_all[d][0]
-    url = deps_all[d][1]
+    url = deps_all[d][0]
+    commit = deps_all[d][1]
+    families = deps_all[d][2]
+
     print('cloning {} with {}'.format(d, url))
 
     p = Path(TOP / d)
@@ -103,14 +214,26 @@ def get_a_dep(d):
     return 0
 
 
+# Arguments can be
+# - family name
+# - specific deps path
+# - all
 if __name__ == "__main__":
     status = 0
     deps = list(deps_mandatory.keys())
-    # get all if executed with all as argument
+    # get all if  'all' is argument
     if len(sys.argv) == 2 and sys.argv[1] == 'all':
-        deps += deps_optional
+        deps += deps_optional.keys()
     else:
-        deps += sys.argv[1:]
+        for arg in sys.argv[1:]:
+            if arg in deps_all.keys():
+                # if arg is a dep, add it
+                deps.append(arg)
+            else:
+                # arg is a family name, add all deps of that family
+                for d in deps_optional:
+                    if arg in deps_optional[d][2]:
+                        deps.append(d)
 
     with Pool() as pool:
         status = sum(pool.map(get_a_dep, deps))

From 7a3d7a7c23da7a7e8122c879b047f80a1a131fcc Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 25 May 2023 16:17:41 +0700
Subject: [PATCH 349/691] cmsis_5 missing mcx and imxrt

---
 tools/get_deps.py | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/get_deps.py b/tools/get_deps.py
index 842fb9275..6db5224a4 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -169,8 +169,8 @@ deps_optional = {
                             'ch32v307'],
     'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git',
                     '20285262657d1b482d132d20d755c8c330d55c1f',
-                    'stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h7 stm32l0 stm32l1 stm32l4 '
-                    'stm32l5 stm32u5 stm32wb'],
+                    'imxrt mcx stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h7 stm32l0 stm32l1 '
+                    'stm32l4 stm32l5 stm32u5 stm32wb'],
     'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git',
                          'e73e04ca63495672d955f9268e003cffe168fcd8',
                          'lpc55'],

From 625c27ca58dc2782da77c210c5d5878ce4b1fc12 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 25 May 2023 16:20:58 +0700
Subject: [PATCH 350/691] add workflow_dispatch for manual trigger

---
 .github/workflows/cmake_arm.yml  | 1 +
 .github/workflows/pre-commit.yml | 1 +
 .github/workflows/trigger.yml    | 1 +
 3 files changed, 3 insertions(+)

diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index d7eea512c..e7991252d 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -1,6 +1,7 @@
 name: CMake ARM
 
 on:
+  workflow_dispatch:
   push:
     paths:
       - 'src/**'
diff --git a/.github/workflows/pre-commit.yml b/.github/workflows/pre-commit.yml
index ab416bc52..f984954d9 100644
--- a/.github/workflows/pre-commit.yml
+++ b/.github/workflows/pre-commit.yml
@@ -1,6 +1,7 @@
 name: pre-commit
 
 on:
+  workflow_dispatch:
   push:
   pull_request:
     branches: [ master ]
diff --git a/.github/workflows/trigger.yml b/.github/workflows/trigger.yml
index 86c699dac..33e3db859 100644
--- a/.github/workflows/trigger.yml
+++ b/.github/workflows/trigger.yml
@@ -1,6 +1,7 @@
 name: Trigger Repos
 
 on:
+  workflow_dispatch:
   push:
     branches: master
   release:

From 26d05d7fc922f3715799f6049556232d5ed5c8e3 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 25 May 2023 16:53:32 +0700
Subject: [PATCH 351/691] fix issue with ftdi host driver with status bytes

add workflow_dispatch to all ci workflow
---
 .github/workflows/build_aarch64.yml |  1 +
 .github/workflows/build_arm.yml     |  1 +
 .github/workflows/build_esp.yml     |  1 +
 .github/workflows/build_iar.yml     |  1 +
 .github/workflows/build_msp430.yml  |  1 +
 .github/workflows/build_renesas.yml |  1 +
 .github/workflows/build_riscv.yml   |  1 +
 .github/workflows/build_win_mac.yml |  1 +
 .github/workflows/cifuzz.yml        |  1 +
 src/class/cdc/cdc_host.c            | 36 ++++++++++++++---------------
 src/common/tusb_private.h           | 17 +++++++++-----
 11 files changed, 37 insertions(+), 25 deletions(-)

diff --git a/.github/workflows/build_aarch64.yml b/.github/workflows/build_aarch64.yml
index cc8ddb070..77d3778d7 100644
--- a/.github/workflows/build_aarch64.yml
+++ b/.github/workflows/build_aarch64.yml
@@ -1,6 +1,7 @@
 name: Build AArch64
 
 on:
+  workflow_dispatch:
   push:
     paths:
       - 'src/**'
diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 917c83d74..1db9586af 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -1,6 +1,7 @@
 name: Build ARM
 
 on:
+  workflow_dispatch:
   push:
     paths:
       - 'src/**'
diff --git a/.github/workflows/build_esp.yml b/.github/workflows/build_esp.yml
index 0a6815ea2..29585cb36 100644
--- a/.github/workflows/build_esp.yml
+++ b/.github/workflows/build_esp.yml
@@ -1,6 +1,7 @@
 name: Build ESP
 
 on:
+  workflow_dispatch:
   push:
     paths:
       - 'src/**'
diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml
index a5d24892f..8c3b57e10 100644
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@@ -1,6 +1,7 @@
 name: Build IAR
 
 on:
+  workflow_dispatch:
   push:
     paths:
       - 'src/**'
diff --git a/.github/workflows/build_msp430.yml b/.github/workflows/build_msp430.yml
index 7cb60dceb..5424a88d6 100644
--- a/.github/workflows/build_msp430.yml
+++ b/.github/workflows/build_msp430.yml
@@ -1,6 +1,7 @@
 name: Build MSP430
 
 on:
+  workflow_dispatch:
   push:
     paths:
       - 'src/**'
diff --git a/.github/workflows/build_renesas.yml b/.github/workflows/build_renesas.yml
index ffdeedb71..3f0a4b694 100644
--- a/.github/workflows/build_renesas.yml
+++ b/.github/workflows/build_renesas.yml
@@ -1,6 +1,7 @@
 name: Build Renesas
 
 on:
+  workflow_dispatch:
   push:
     paths:
       - 'src/**'
diff --git a/.github/workflows/build_riscv.yml b/.github/workflows/build_riscv.yml
index 87c7b522e..8682d655a 100644
--- a/.github/workflows/build_riscv.yml
+++ b/.github/workflows/build_riscv.yml
@@ -1,6 +1,7 @@
 name: Build RISC-V
 
 on:
+  workflow_dispatch:
   push:
     paths:
       - 'src/**'
diff --git a/.github/workflows/build_win_mac.yml b/.github/workflows/build_win_mac.yml
index 4b743a686..45fc62f78 100644
--- a/.github/workflows/build_win_mac.yml
+++ b/.github/workflows/build_win_mac.yml
@@ -1,6 +1,7 @@
 name: Build Windows/MacOS
 
 on:
+  workflow_dispatch:
   push:
     paths:
       - 'src/**'
diff --git a/.github/workflows/cifuzz.yml b/.github/workflows/cifuzz.yml
index 7314fd9e6..4c4b12a6b 100644
--- a/.github/workflows/cifuzz.yml
+++ b/.github/workflows/cifuzz.yml
@@ -1,5 +1,6 @@
 name: CIFuzz
 on:
+  workflow_dispatch:
   pull_request:
     branches:
       - master
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index 9ff666ed4..ce9f27c33 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -550,8 +550,7 @@ void cdch_close(uint8_t daddr)
   }
 }
 
-bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes)
-{
+bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes) {
   // TODO handle stall response, retry failed transfer ...
   TU_ASSERT(event == XFER_RESULT_SUCCESS);
 
@@ -559,41 +558,40 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t
   cdch_interface_t * p_cdc = get_itf(idx);
   TU_ASSERT(p_cdc);
 
-  if ( ep_addr == p_cdc->stream.tx.ep_addr )
-  {
+  if ( ep_addr == p_cdc->stream.tx.ep_addr ) {
     // invoke tx complete callback to possibly refill tx fifo
     if (tuh_cdc_tx_complete_cb) tuh_cdc_tx_complete_cb(idx);
 
-    if ( 0 == tu_edpt_stream_write_xfer(&p_cdc->stream.tx) )
-    {
+    if ( 0 == tu_edpt_stream_write_xfer(&p_cdc->stream.tx) ) {
       // If there is no data left, a ZLP should be sent if:
       // - xferred_bytes is multiple of EP Packet size and not zero
       tu_edpt_stream_write_zlp_if_needed(&p_cdc->stream.tx, xferred_bytes);
     }
   }
-  else if ( ep_addr == p_cdc->stream.rx.ep_addr )
-  {
-    tu_edpt_stream_read_xfer_complete(&p_cdc->stream.rx, xferred_bytes);
-
+  else if ( ep_addr == p_cdc->stream.rx.ep_addr ) {
     #if CFG_TUH_CDC_FTDI
-    // FTDI reserve 2 bytes for status
     if (p_cdc->serial_drid == SERIAL_DRIVER_FTDI) {
-      uint8_t status[2];
-      tu_edpt_stream_read(&p_cdc->stream.rx, status, 2);
-      (void) status; // TODO handle status
-    }
+      // FTDI reserve 2 bytes for status
+      // FTDI status
+//      uint8_t status[2] = {
+//        p_cdc->stream.rx.ep_buf[0],
+//        p_cdc->stream.rx.ep_buf[1]
+//      };
+      tu_edpt_stream_read_xfer_complete_offset(&p_cdc->stream.rx, xferred_bytes, 2);
+    }else
     #endif
+    {
+      tu_edpt_stream_read_xfer_complete(&p_cdc->stream.rx, xferred_bytes);
+    }
 
     // invoke receive callback
     if (tuh_cdc_rx_cb) tuh_cdc_rx_cb(idx);
 
     // prepare for next transfer if needed
     tu_edpt_stream_read_xfer(&p_cdc->stream.rx);
-  }else if ( ep_addr == p_cdc->ep_notif )
-  {
+  }else if ( ep_addr == p_cdc->ep_notif ) {
     // TODO handle notification endpoint
-  }else
-  {
+  }else {
     TU_ASSERT(false);
   }
 
diff --git a/src/common/tusb_private.h b/src/common/tusb_private.h
index d5541856c..db1ba974d 100644
--- a/src/common/tusb_private.h
+++ b/src/common/tusb_private.h
@@ -148,21 +148,26 @@ uint32_t tu_edpt_stream_read_xfer(tu_edpt_stream_t* s);
 
 // Must be called in the transfer complete callback
 TU_ATTR_ALWAYS_INLINE static inline
-void tu_edpt_stream_read_xfer_complete(tu_edpt_stream_t* s, uint32_t xferred_bytes)
-{
+void tu_edpt_stream_read_xfer_complete(tu_edpt_stream_t* s, uint32_t xferred_bytes) {
   tu_fifo_write_n(&s->ff, s->ep_buf, (uint16_t) xferred_bytes);
 }
 
+// Same as tu_edpt_stream_read_xfer_complete but skip the first n bytes
+TU_ATTR_ALWAYS_INLINE static inline
+void tu_edpt_stream_read_xfer_complete_offset(tu_edpt_stream_t* s, uint32_t xferred_bytes, uint32_t skip_offset) {
+  if (skip_offset < xferred_bytes) {
+    tu_fifo_write_n(&s->ff, s->ep_buf + skip_offset, (uint16_t) (xferred_bytes - skip_offset));
+  }
+}
+
 // Get the number of bytes available for reading
 TU_ATTR_ALWAYS_INLINE static inline
-uint32_t tu_edpt_stream_read_available(tu_edpt_stream_t* s)
-{
+uint32_t tu_edpt_stream_read_available(tu_edpt_stream_t* s) {
   return (uint32_t) tu_fifo_count(&s->ff);
 }
 
 TU_ATTR_ALWAYS_INLINE static inline
-bool tu_edpt_stream_peek(tu_edpt_stream_t* s, uint8_t* ch)
-{
+bool tu_edpt_stream_peek(tu_edpt_stream_t* s, uint8_t* ch) {
   return tu_fifo_peek(&s->ff, ch);
 }
 

From 5fea010406747a94f3a65a89e65e7956ff811b3c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 25 May 2023 17:27:05 +0700
Subject: [PATCH 352/691] add family_support_configure_common()

---
 hw/bsp/family_support.cmake | 16 ++++++++++++++++
 hw/bsp/imxrt/family.cmake   | 20 +++++---------------
 hw/bsp/lpc18/family.cmake   | 16 +++++-----------
 hw/bsp/lpc55/family.cmake   | 16 +++++-----------
 hw/bsp/mcx/family.cmake     | 22 ++++++----------------
 hw/bsp/nrf/family.cmake     | 23 +++++------------------
 6 files changed, 42 insertions(+), 71 deletions(-)

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index d2d675332..760f2fbbc 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -136,6 +136,22 @@ function(family_add_default_example_warnings TARGET)
 endfunction()
 
 
+function(family_support_configure_common TARGET)
+    # set output name to .elf
+    set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf)
+
+    # run size after build
+    add_custom_command(TARGET ${TARGET} POST_BUILD
+      COMMAND ${TOOLCHAIN_SIZE} $<TARGET_FILE:${TARGET}>
+      )
+
+    # Generate map file
+    target_link_options(${TARGET} PUBLIC
+      # link map
+      "LINKER:-Map=$<TARGET_FILE:${TARGET}>.map"
+      )
+endfunction()
+
 #  add_custom_command(TARGET ${TARGET} POST_BUILD
 #    COMMAND ${CMAKE_OBJCOPY} -O ihex $<TARGET_FILE:${TARGET}> ${TARGET}.hex
 #    COMMAND ${CMAKE_OBJCOPY} -O binary $<TARGET_FILE:${TARGET}> ${TARGET}.bin
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index ade744aa5..0e55b825d 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -63,7 +63,6 @@ if (NOT TARGET ${BOARD_TARGET})
       )
     target_link_options(${BOARD_TARGET} PUBLIC
       "LINKER:--script=${LD_FILE_gcc}"
-      "LINKER:-Map=$<IF:$<BOOL:$<TARGET_PROPERTY:OUTPUT_NAME>>,$<TARGET_PROPERTY:OUTPUT_NAME>,$<TARGET_PROPERTY:NAME>>${CMAKE_EXECUTABLE_SUFFIX}.map"
       # nanolib
       --specs=nosys.specs
       --specs=nano.specs
@@ -79,17 +78,8 @@ endif () # BOARD_TARGET
 #------------------------------------
 # Functions
 #------------------------------------
-function(family_configure_target TARGET)
-  # set output name to .elf
-  set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf)
-
-  # run size after build
-  add_custom_command(TARGET ${TARGET} POST_BUILD
-    COMMAND ${TOOLCHAIN_SIZE} $<TARGET_FILE:${TARGET}>
-    )
-
-  # TOP is path to root directory
-  set(TOP "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../..")
+function(family_configure_example TARGET)
+  family_support_configure_common(${TARGET})
 
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
@@ -162,13 +152,13 @@ function(family_add_freertos TARGET)
 endfunction()
 
 function(family_configure_device_example TARGET)
-  family_configure_target(${TARGET})
+  family_configure_example(${TARGET})
 endfunction()
 
 function(family_configure_host_example TARGET)
-  family_configure_target(${TARGET})
+  family_configure_example(${TARGET})
 endfunction()
 
 function(family_configure_dual_usb_example TARGET)
-  family_configure_target(${TARGET})
+  family_configure_example(${TARGET})
 endfunction()
diff --git a/hw/bsp/lpc18/family.cmake b/hw/bsp/lpc18/family.cmake
index 059408fe9..29fa73d34 100644
--- a/hw/bsp/lpc18/family.cmake
+++ b/hw/bsp/lpc18/family.cmake
@@ -65,14 +65,8 @@ endif () # BOARD_TARGET
 #------------------------------------
 # Functions
 #------------------------------------
-function(family_configure_target TARGET)
-  # set output name to .elf
-  set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf)
-
-  # run size after build
-  add_custom_command(TARGET ${TARGET} POST_BUILD
-    COMMAND ${TOOLCHAIN_SIZE} $<TARGET_FILE:${TARGET}>
-    )
+function(family_configure_example TARGET)
+  family_support_configure_common(${TARGET})
 
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
@@ -143,13 +137,13 @@ function(family_add_freertos TARGET)
 endfunction()
 
 function(family_configure_device_example TARGET)
-  family_configure_target(${TARGET})
+  family_configure_example(${TARGET})
 endfunction()
 
 function(family_configure_host_example TARGET)
-  family_configure_target(${TARGET})
+  family_configure_example(${TARGET})
 endfunction()
 
 function(family_configure_dual_usb_example TARGET)
-  family_configure_target(${TARGET})
+  family_configure_example(${TARGET})
 endfunction()
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index 3aeda5b2d..363b7a9cd 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -63,8 +63,6 @@ if (NOT TARGET ${BOARD_TARGET})
     target_link_options(${BOARD_TARGET} PUBLIC
       # linker file
       "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld"
-      # link map
-      "LINKER:-Map=$<IF:$<BOOL:$<TARGET_PROPERTY:OUTPUT_NAME>>,$<TARGET_PROPERTY:OUTPUT_NAME>,$<TARGET_PROPERTY:NAME>>${CMAKE_EXECUTABLE_SUFFIX}.map"
       # nanolib
       --specs=nosys.specs
       --specs=nano.specs
@@ -77,12 +75,8 @@ endif () # BOARD_TARGET
 #------------------------------------
 # Functions
 #------------------------------------
-function(family_configure_target TARGET)
-  # set output name to .elf
-  set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf)
-
-  # TOP is path to root directory
-  set(TOP "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../..")
+function(family_configure_example TARGET)
+  family_support_configure_common(${TARGET})
 
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
@@ -153,13 +147,13 @@ function(family_add_freertos TARGET)
 endfunction()
 
 function(family_configure_device_example TARGET)
-  family_configure_target(${TARGET})
+  family_configure_example(${TARGET})
 endfunction()
 
 function(family_configure_host_example TARGET)
-  family_configure_target(${TARGET})
+  family_configure_example(${TARGET})
 endfunction()
 
 function(family_configure_dual_usb_example TARGET)
-  family_configure_target(${TARGET})
+  family_configure_example(${TARGET})
 endfunction()
diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake
index e4bc11be5..bc0dfe875 100644
--- a/hw/bsp/mcx/family.cmake
+++ b/hw/bsp/mcx/family.cmake
@@ -54,11 +54,10 @@ if (NOT TARGET ${BOARD_TARGET})
     target_sources(${BOARD_TARGET} PUBLIC
       ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S
       )
+    cmake_print_variables(CMAKE_CURRENT_BINARY_DIR)
     target_link_options(${BOARD_TARGET} PUBLIC
       # linker file
       "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld"
-      # link map
-      "LINKER:-Map=$<IF:$<BOOL:$<TARGET_PROPERTY:OUTPUT_NAME>>,$<TARGET_PROPERTY:OUTPUT_NAME>,$<TARGET_PROPERTY:NAME>>${CMAKE_EXECUTABLE_SUFFIX}.map"
       # nanolib
       --specs=nosys.specs
       --specs=nano.specs
@@ -71,17 +70,8 @@ endif () # BOARD_TARGET
 #------------------------------------
 # Functions
 #------------------------------------
-function(family_configure_target TARGET)
-  # set output name to .elf
-  set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf)
-
-  # run size after build
-  add_custom_command(TARGET ${TARGET} POST_BUILD
-    COMMAND ${TOOLCHAIN_SIZE} $<TARGET_FILE:${TARGET}>
-    )
-
-  # TOP is path to root directory
-  set(TOP "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../..")
+function(family_configure_example TARGET)
+  family_support_configure_common(${TARGET})
 
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
@@ -167,13 +157,13 @@ function(family_add_freertos TARGET)
 endfunction()
 
 function(family_configure_device_example TARGET)
-  family_configure_target(${TARGET})
+  family_configure_example(${TARGET})
 endfunction()
 
 function(family_configure_host_example TARGET)
-  family_configure_target(${TARGET})
+  family_configure_example(${TARGET})
 endfunction()
 
 function(family_configure_dual_usb_example TARGET)
-  family_configure_target(${TARGET})
+  family_configure_example(${TARGET})
 endfunction()
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 1156a171b..9d958fee2 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -65,8 +65,6 @@ if (NOT TARGET ${BOARD_TARGET})
       # linker file
       "LINKER:--script=${LD_FILE_gcc}"
       -L${NRFX_DIR}/mdk
-      # link map
-      "LINKER:-Map=$<IF:$<BOOL:$<TARGET_PROPERTY:OUTPUT_NAME>>,$<TARGET_PROPERTY:OUTPUT_NAME>,$<TARGET_PROPERTY:NAME>>${CMAKE_EXECUTABLE_SUFFIX}.map"
       # nanolib
       --specs=nosys.specs
       --specs=nano.specs
@@ -79,19 +77,8 @@ endif () # BOARD_TARGET
 #------------------------------------
 # Functions
 #------------------------------------
-function(family_configure_target TARGET)
-  #family_add_default_example_warnings(${TARGET})
-
-  # set output name to .elf
-  set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf)
-
-  # run size after build
-  add_custom_command(TARGET ${TARGET} POST_BUILD
-    COMMAND ${TOOLCHAIN_SIZE} $<TARGET_FILE:${TARGET}>
-    )
-
-  # TOP is path to root directory
-  set(TOP "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../..")
+function(family_configure_example TARGET)
+  family_support_configure_common(${TARGET})
 
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
@@ -161,13 +148,13 @@ function(family_add_freertos TARGET)
 endfunction()
 
 function(family_configure_device_example TARGET)
-  family_configure_target(${TARGET})
+  family_configure_example(${TARGET})
 endfunction()
 
 function(family_configure_host_example TARGET)
-  family_configure_target(${TARGET})
+  family_configure_example(${TARGET})
 endfunction()
 
 function(family_configure_dual_usb_example TARGET)
-  family_configure_target(${TARGET})
+  family_configure_example(${TARGET})
 endfunction()

From 4c9605910f1f53b2517fff5f0cc02973260f0739 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 25 May 2023 21:27:26 +0700
Subject: [PATCH 353/691] update cmake with freertos

---
 hw/bsp/family_support.cmake                  |  85 ++++++----
 hw/bsp/imxrt/FreeRTOSConfig/CMakeLists.txt   |   8 -
 hw/bsp/imxrt/family.cmake                    |  23 +--
 hw/bsp/lpc18/family.cmake                    |  23 +--
 hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h | 166 +++++++++++++++++++
 hw/bsp/lpc55/family.cmake                    |  33 ++--
 hw/bsp/mcx/family.cmake                      |  28 +---
 hw/bsp/nrf/family.cmake                      |  24 +--
 hw/bsp/rp2040/family.cmake                   |   4 +
 9 files changed, 240 insertions(+), 154 deletions(-)
 delete mode 100644 hw/bsp/imxrt/FreeRTOSConfig/CMakeLists.txt
 create mode 100644 hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 760f2fbbc..5bd9a6d75 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -1,19 +1,15 @@
-if (TARGET _family_support_marker)
-    return()
-endif ()
-
-add_library(_family_support_marker INTERFACE)
+include_guard()
 
 include(CMakePrintHelpers)
 
 # Default to gcc
-if(NOT DEFINED TOOLCHAIN)
+if (NOT DEFINED TOOLCHAIN)
     set(TOOLCHAIN gcc)
-endif()
+endif ()
 
 if (NOT FAMILY)
     message(FATAL_ERROR "You must set a FAMILY variable for the build (e.g. rp2040, eps32s2, esp32s3). You can do this via -DFAMILY=xxx on the cmake command line")
-endif()
+endif ()
 
 if (NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake)
     message(FATAL_ERROR "Family '${FAMILY}' is not known/supported")
@@ -137,19 +133,19 @@ endfunction()
 
 
 function(family_support_configure_common TARGET)
-    # set output name to .elf
-    set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf)
+  # set output name to .elf
+  set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf)
 
-    # run size after build
-    add_custom_command(TARGET ${TARGET} POST_BUILD
-      COMMAND ${TOOLCHAIN_SIZE} $<TARGET_FILE:${TARGET}>
-      )
+  # run size after build
+  add_custom_command(TARGET ${TARGET} POST_BUILD
+    COMMAND ${TOOLCHAIN_SIZE} $<TARGET_FILE:${TARGET}>
+    )
 
-    # Generate map file
-    target_link_options(${TARGET} PUBLIC
-      # link map
-      "LINKER:-Map=$<TARGET_FILE:${TARGET}>.map"
-      )
+  # Generate map file
+  target_link_options(${TARGET} PUBLIC
+    # link map
+    "LINKER:-Map=$<TARGET_FILE:${TARGET}>.map"
+    )
 endfunction()
 
 #  add_custom_command(TARGET ${TARGET} POST_BUILD
@@ -160,23 +156,23 @@ endfunction()
 
 # Add flash jlink target
 function(family_flash_jlink TARGET)
-    if (NOT DEFINED JLINKEXE)
-        set(JLINKEXE JLinkExe)
-    endif ()
+  if (NOT DEFINED JLINKEXE)
+    set(JLINKEXE JLinkExe)
+  endif ()
 
-    file(GENERATE
-      OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}.jlink
-      CONTENT "halt
+  file(GENERATE
+    OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}.jlink
+    CONTENT "halt
 loadfile $<TARGET_FILE:${TARGET}>
 r
 go
 exit"
-      )
+    )
 
-    add_custom_target(${TARGET}-jlink
-      DEPENDS ${TARGET}
-      COMMAND ${JLINKEXE} -device ${JLINK_DEVICE} -if swd -JTAGConf -1,-1 -speed auto -CommandFile ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}.jlink
-      )
+  add_custom_target(${TARGET}-jlink
+    DEPENDS ${TARGET}
+    COMMAND ${JLINKEXE} -device ${JLINK_DEVICE} -if swd -JTAGConf -1,-1 -speed auto -CommandFile ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}.jlink
+    )
 endfunction()
 
 # Add flash pycod target
@@ -218,6 +214,35 @@ function(family_configure_host_example TARGET)
     # default implementation is empty, the function should be redefined in the FAMILY/family.cmake
 endfunction()
 
+# Add freeRTOS support to example, can be overridden by FAMILY/family.cmake
+function(family_add_freertos TARGET)
+    # freeros config
+    if (NOT TARGET freertos_config)
+        add_library(freertos_config INTERFACE)
+        target_include_directories(freertos_config SYSTEM INTERFACE
+          ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig
+          )
+    endif()
+
+    # freertos kernel should be generic as freertos_config however, CMAKE complains with missing variable
+    # such as CMAKE_C_COMPILE_OBJECT
+    if (NOT TARGET freertos_kernel)
+        add_subdirectory(${TOP}/lib/FreeRTOS-Kernel ${CMAKE_BINARY_DIR}/lib/freertos_kernel)
+    endif ()
+
+    # Add FreeRTOS option to tinyusb_config
+    target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
+      CFG_TUSB_OS=OPT_OS_FREERTOS
+      )
+    # link tinyusb with freeRTOS kernel
+    target_link_libraries(${TARGET}-tinyusb PUBLIC
+      freertos_kernel
+      )
+    target_link_libraries(${TARGET} PUBLIC
+      freertos_kernel
+      )
+endfunction()
+
 include(${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake)
 
 if (NOT FAMILY_MCUS)
diff --git a/hw/bsp/imxrt/FreeRTOSConfig/CMakeLists.txt b/hw/bsp/imxrt/FreeRTOSConfig/CMakeLists.txt
deleted file mode 100644
index 0bacaf824..000000000
--- a/hw/bsp/imxrt/FreeRTOSConfig/CMakeLists.txt
+++ /dev/null
@@ -1,8 +0,0 @@
-if (NOT TARGET freertos_config)
-  add_library(freertos_config INTERFACE)
-
-  # add path to FreeRTOSConfig.h
-  target_include_directories(freertos_config SYSTEM INTERFACE
-    ${CMAKE_CURRENT_LIST_DIR}
-    )
-endif()
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 0e55b825d..f9818cde6 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -75,6 +75,7 @@ if (NOT TARGET ${BOARD_TARGET})
   endif ()
 endif () # BOARD_TARGET
 
+
 #------------------------------------
 # Functions
 #------------------------------------
@@ -129,28 +130,6 @@ function(family_configure_example TARGET)
 endfunction()
 
 
-function(family_add_freertos TARGET)
-  # freertos_config
-  add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/FreeRTOSConfig ${CMAKE_CURRENT_BINARY_DIR}/freertos_config)
-
-  ## freertos
-  if (NOT TARGET freertos_kernel)
-    add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../../lib/FreeRTOS-Kernel ${CMAKE_CURRENT_BINARY_DIR}/freertos_kernel)
-  endif ()
-
-  # Add FreeRTOS option to tinyusb_config
-  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
-    CFG_TUSB_OS=OPT_OS_FREERTOS
-    )
-  # link tinyusb with freeRTOS kernel
-  target_link_libraries(${TARGET}-tinyusb PUBLIC
-    freertos_kernel
-    )
-  target_link_libraries(${TARGET} PUBLIC
-    freertos_kernel
-    )
-endfunction()
-
 function(family_configure_device_example TARGET)
   family_configure_example(${TARGET})
 endfunction()
diff --git a/hw/bsp/lpc18/family.cmake b/hw/bsp/lpc18/family.cmake
index 29fa73d34..c47839a5c 100644
--- a/hw/bsp/lpc18/family.cmake
+++ b/hw/bsp/lpc18/family.cmake
@@ -62,6 +62,7 @@ if (NOT TARGET ${BOARD_TARGET})
   endif ()
 endif () # BOARD_TARGET
 
+
 #------------------------------------
 # Functions
 #------------------------------------
@@ -114,28 +115,6 @@ function(family_configure_example TARGET)
 endfunction()
 
 
-function(family_add_freertos TARGET)
-  # freertos_config
-  add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/FreeRTOSConfig ${CMAKE_CURRENT_BINARY_DIR}/freertos_config)
-
-  ## freertos
-  if (NOT TARGET freertos_kernel)
-    add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../../lib/FreeRTOS-Kernel ${CMAKE_CURRENT_BINARY_DIR}/freertos_kernel)
-  endif ()
-
-  # Add FreeRTOS option to tinyusb_config
-  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
-    CFG_TUSB_OS=OPT_OS_FREERTOS
-    )
-  # link tinyusb with freeRTOS kernel
-  target_link_libraries(${TARGET}-tinyusb PUBLIC
-    freertos_kernel
-    )
-  target_link_libraries(${TARGET} PUBLIC
-    freertos_kernel
-    )
-endfunction()
-
 function(family_configure_device_example TARGET)
   family_configure_example(${TARGET})
 endfunction()
diff --git a/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..4c6058d27
--- /dev/null
+++ b/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,166 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// IAR assembler have limited preprocessor support and it only need following macros:
+#ifndef __IASMARM__
+// FIXME cause redundant-decls warnings
+extern uint32_t SystemCoreClock;
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU								        0
+#define configENABLE_FPU								        1
+#define configENABLE_TRUSTZONE					        0
+#define configMINIMAL_SECURE_STACK_SIZE					( 1024 )
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               2
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       3
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index 363b7a9cd..d6ce0b781 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -18,6 +18,16 @@ set(FAMILY_MCUS LPC55XX CACHE INTERNAL "")
 # include board specific
 include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 
+#------------------------------------
+# freertos
+#------------------------------------
+if (NOT TARGET freertos_config)
+  add_library(freertos_config INTERFACE)
+  target_include_directories(freertos_config SYSTEM INTERFACE
+    ${CMAKE_CURRENT_LIST_DIR}/FreeRTOSConfig
+    )
+endif()
+
 
 #------------------------------------
 # BOARD_TARGET
@@ -72,6 +82,7 @@ if (NOT TARGET ${BOARD_TARGET})
   endif ()
 endif () # BOARD_TARGET
 
+
 #------------------------------------
 # Functions
 #------------------------------------
@@ -124,28 +135,6 @@ function(family_configure_example TARGET)
 endfunction()
 
 
-function(family_add_freertos TARGET)
-  # freertos_config
-  add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/FreeRTOSConfig ${CMAKE_CURRENT_BINARY_DIR}/freertos_config)
-
-  ## freertos
-  if (NOT TARGET freertos_kernel)
-    add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../../lib/FreeRTOS-Kernel ${CMAKE_CURRENT_BINARY_DIR}/freertos_kernel)
-  endif ()
-
-  # Add FreeRTOS option to tinyusb_config
-  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
-    CFG_TUSB_OS=OPT_OS_FREERTOS
-    )
-  # link tinyusb with freeRTOS kernel
-  target_link_libraries(${TARGET}-tinyusb PUBLIC
-    freertos_kernel
-    )
-  target_link_libraries(${TARGET} PUBLIC
-    freertos_kernel
-    )
-endfunction()
-
 function(family_configure_device_example TARGET)
   family_configure_example(${TARGET})
 endfunction()
diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake
index bc0dfe875..abca7c90e 100644
--- a/hw/bsp/mcx/family.cmake
+++ b/hw/bsp/mcx/family.cmake
@@ -67,6 +67,7 @@ if (NOT TARGET ${BOARD_TARGET})
   endif ()
 endif () # BOARD_TARGET
 
+
 #------------------------------------
 # Functions
 #------------------------------------
@@ -129,33 +130,6 @@ function(family_configure_example TARGET)
 endfunction()
 
 
-function(family_add_freertos TARGET)
-  # freertos_config
-  if (NOT TARGET freertos_config)
-    add_library(freertos_config INTERFACE)
-    target_include_directories(freertos_config SYSTEM INTERFACE
-      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/FreeRTOSConfig
-      )
-  endif()
-
-  ## freertos
-  if (NOT TARGET freertos_kernel)
-    add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../../lib/FreeRTOS-Kernel ${CMAKE_CURRENT_BINARY_DIR}/freertos_kernel)
-  endif ()
-
-  # Add FreeRTOS option to tinyusb_config
-  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
-    CFG_TUSB_OS=OPT_OS_FREERTOS
-    )
-  # link tinyusb with freeRTOS kernel
-  target_link_libraries(${TARGET}-tinyusb PUBLIC
-    freertos_kernel
-    )
-  target_link_libraries(${TARGET} PUBLIC
-    freertos_kernel
-    )
-endfunction()
-
 function(family_configure_device_example TARGET)
   family_configure_example(${TARGET})
 endfunction()
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 9d958fee2..59d4a7947 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -74,6 +74,7 @@ if (NOT TARGET ${BOARD_TARGET})
   endif ()
 endif () # BOARD_TARGET
 
+
 #------------------------------------
 # Functions
 #------------------------------------
@@ -121,32 +122,9 @@ function(family_configure_example TARGET)
 
   #---------- Flash ----------
   family_flash_jlink(${TARGET})
-
 endfunction()
 
 
-function(family_add_freertos TARGET)
-  # freertos_config
-  add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/FreeRTOSConfig ${CMAKE_CURRENT_BINARY_DIR}/freertos_config)
-
-  ## freertos
-  if (NOT TARGET freertos_kernel)
-    add_subdirectory(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../../lib/FreeRTOS-Kernel ${CMAKE_CURRENT_BINARY_DIR}/freertos_kernel)
-  endif ()
-
-  # Add FreeRTOS option to tinyusb_config
-  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
-    CFG_TUSB_OS=OPT_OS_FREERTOS
-    )
-  # link tinyusb with freeRTOS kernel
-  target_link_libraries(${TARGET}-tinyusb PUBLIC
-    freertos_kernel
-    )
-  target_link_libraries(${TARGET} PUBLIC
-    freertos_kernel
-    )
-endfunction()
-
 function(family_configure_device_example TARGET)
   family_configure_example(${TARGET})
 endfunction()
diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index 5d80ab66e..17f206c77 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -330,4 +330,8 @@ if (NOT TARGET _rp2040_family_inclusion_marker)
 					COMPILE_FLAGS "-Wno-cast-qual")
 		endif()
 	endfunction()
+
+	# rp2040 does not support freeRTOS example yet
+	function(family_add_freertos TARGET)
+	endfunction()
 endif()

From c0ecf8b50fe68a56b28bed98ecbfc6b236a848ef Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 26 May 2023 14:56:22 +0700
Subject: [PATCH 354/691] move set TOP to family_support.cmake

---
 hw/bsp/family_support.cmake | 3 +++
 hw/bsp/imxrt/family.cmake   | 3 ---
 hw/bsp/lpc18/family.cmake   | 2 --
 hw/bsp/lpc55/family.cmake   | 2 --
 hw/bsp/mcx/family.cmake     | 2 --
 hw/bsp/nrf/family.cmake     | 2 --
 hw/bsp/rp2040/family.cmake  | 4 ++--
 7 files changed, 5 insertions(+), 13 deletions(-)

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 5bd9a6d75..68a21bc7d 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -2,6 +2,9 @@ include_guard()
 
 include(CMakePrintHelpers)
 
+# TOP is path to root directory
+set(TOP "${CMAKE_CURRENT_LIST_DIR}/../..")
+
 # Default to gcc
 if (NOT DEFINED TOOLCHAIN)
     set(TOOLCHAIN gcc)
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index f9818cde6..a681b0419 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -4,9 +4,6 @@ if (NOT BOARD)
   message(FATAL_ERROR "BOARD not specified")
 endif ()
 
-# TOP is path to root directory
-set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
-
 # toolchain set up
 set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
 set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
diff --git a/hw/bsp/lpc18/family.cmake b/hw/bsp/lpc18/family.cmake
index c47839a5c..698120077 100644
--- a/hw/bsp/lpc18/family.cmake
+++ b/hw/bsp/lpc18/family.cmake
@@ -4,8 +4,6 @@ if (NOT BOARD)
   message(FATAL_ERROR "BOARD not specified")
 endif ()
 
-# TOP is path to root directory
-set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
 set(SDK_DIR ${TOP}/hw/mcu/nxp/lpcopen/lpc18xx/lpc_chip_18xx)
 
 # toolchain set up
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index d6ce0b781..1b9c1a655 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -4,8 +4,6 @@ if (NOT BOARD)
   message(FATAL_ERROR "BOARD not specified")
 endif ()
 
-# TOP is path to root directory
-set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
 set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
 set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
 
diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake
index abca7c90e..1719320e6 100644
--- a/hw/bsp/mcx/family.cmake
+++ b/hw/bsp/mcx/family.cmake
@@ -4,8 +4,6 @@ if (NOT BOARD)
   message(FATAL_ERROR "BOARD not specified")
 endif ()
 
-# TOP is path to root directory
-set(TOP ${CMAKE_CURRENT_LIST_DIR}/../../..)
 set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
 set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
 
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 59d4a7947..68b19b33b 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -4,8 +4,6 @@ if (NOT BOARD)
   message(FATAL_ERROR "BOARD not specified")
 endif ()
 
-# TOP is path to root directory
-set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
 set(NRFX_DIR ${TOP}/hw/mcu/nordic/nrfx)
 set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
 
diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index 17f206c77..28637e3ee 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -16,8 +16,8 @@ if (NOT TARGET _rp2040_family_inclusion_marker)
 	include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 
 	# TOP is absolute path to root directory of TinyUSB git repo
-	set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
-	get_filename_component(TOP "${TOP}" REALPATH)
+	#set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
+	#get_filename_component(TOP "${TOP}" REALPATH)
 
 	if (NOT PICO_TINYUSB_PATH)
 		set(PICO_TINYUSB_PATH ${TOP})

From b262164a35e9e305b67cb8d0c2188353db405200 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 26 May 2023 15:16:18 +0700
Subject: [PATCH 355/691] fix build with net_lwip_webserver example

---
 examples/device/CMakeLists.txt                |   7 +-
 .../device/net_lwip_webserver/CMakeLists.txt  | 164 +++++++++---------
 src/CMakeLists.txt                            |   2 +
 3 files changed, 88 insertions(+), 85 deletions(-)

diff --git a/examples/device/CMakeLists.txt b/examples/device/CMakeLists.txt
index 89cfceeeb..5b077a5e1 100644
--- a/examples/device/CMakeLists.txt
+++ b/examples/device/CMakeLists.txt
@@ -22,12 +22,7 @@ family_add_subdirectory(hid_generic_inout)
 family_add_subdirectory(hid_multiple_interface)
 family_add_subdirectory(midi_test)
 family_add_subdirectory(msc_dual_lun)
-
-# FIXME temp skip net_lwip_webserver for imxrt for now
-if (NOT ${FAMILY} STREQUAL "imxrt" AND NOT ${FAMILY} STREQUAL "mcx")
-  family_add_subdirectory(net_lwip_webserver)
-endif()
-
+family_add_subdirectory(net_lwip_webserver)
 family_add_subdirectory(uac2_headset)
 family_add_subdirectory(usbtmc)
 family_add_subdirectory(video_capture)
diff --git a/examples/device/net_lwip_webserver/CMakeLists.txt b/examples/device/net_lwip_webserver/CMakeLists.txt
index e7338c809..5225f7c42 100644
--- a/examples/device/net_lwip_webserver/CMakeLists.txt
+++ b/examples/device/net_lwip_webserver/CMakeLists.txt
@@ -1,83 +1,89 @@
 cmake_minimum_required(VERSION 3.17)
 
-set(TOP "../../..")
-get_filename_component(TOP "${TOP}" REALPATH)
+include(${CMAKE_CURRENT_LIST_DIR}/../../../hw/bsp/family_support.cmake)
 
-if (EXISTS ${TOP}/lib/lwip/src)
-    include(${TOP}/hw/bsp/family_support.cmake)
-
-    # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-    family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-    project(${PROJECT} C CXX ASM)
-
-    # Checks this example is valid for the family and initializes the project
-    family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
-
-    add_executable(${PROJECT})
-
-    # Example source
-    target_sources(${PROJECT} PUBLIC
-            ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
-            ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
-            )
-
-    # Example include
-    target_include_directories(${PROJECT} PUBLIC
-            ${CMAKE_CURRENT_SOURCE_DIR}/src
-            ${TOP}/lib/lwip/src/include
-            ${TOP}/lib/lwip/src/include/ipv4
-            ${TOP}/lib/lwip/src/include/lwip/apps
-            ${TOP}/lib/networking
-            )
-
-    target_sources(${PROJECT} PUBLIC
-            ${TOP}/lib/lwip/src/core/altcp.c
-            ${TOP}/lib/lwip/src/core/altcp_alloc.c
-            ${TOP}/lib/lwip/src/core/altcp_tcp.c
-            ${TOP}/lib/lwip/src/core/def.c
-            ${TOP}/lib/lwip/src/core/dns.c
-            ${TOP}/lib/lwip/src/core/inet_chksum.c
-            ${TOP}/lib/lwip/src/core/init.c
-            ${TOP}/lib/lwip/src/core/ip.c
-            ${TOP}/lib/lwip/src/core/mem.c
-            ${TOP}/lib/lwip/src/core/memp.c
-            ${TOP}/lib/lwip/src/core/netif.c
-            ${TOP}/lib/lwip/src/core/pbuf.c
-            ${TOP}/lib/lwip/src/core/raw.c
-            ${TOP}/lib/lwip/src/core/stats.c
-            ${TOP}/lib/lwip/src/core/sys.c
-            ${TOP}/lib/lwip/src/core/tcp.c
-            ${TOP}/lib/lwip/src/core/tcp_in.c
-            ${TOP}/lib/lwip/src/core/tcp_out.c
-            ${TOP}/lib/lwip/src/core/timeouts.c
-            ${TOP}/lib/lwip/src/core/udp.c
-            ${TOP}/lib/lwip/src/core/ipv4/autoip.c
-            ${TOP}/lib/lwip/src/core/ipv4/dhcp.c
-            ${TOP}/lib/lwip/src/core/ipv4/etharp.c
-            ${TOP}/lib/lwip/src/core/ipv4/icmp.c
-            ${TOP}/lib/lwip/src/core/ipv4/igmp.c
-            ${TOP}/lib/lwip/src/core/ipv4/ip4.c
-            ${TOP}/lib/lwip/src/core/ipv4/ip4_addr.c
-            ${TOP}/lib/lwip/src/core/ipv4/ip4_frag.c
-            ${TOP}/lib/lwip/src/netif/ethernet.c
-            ${TOP}/lib/lwip/src/netif/slipif.c
-            ${TOP}/lib/lwip/src/apps/http/httpd.c
-            ${TOP}/lib/lwip/src/apps/http/fs.c
-            ${TOP}/lib/networking/dhserver.c
-            ${TOP}/lib/networking/dnserver.c
-            ${TOP}/lib/networking/rndis_reports.c
-            )
-
-    # due to warnings from other net source, we need to prevent error from some of the warnings options
-    target_compile_options(${PROJECT} PUBLIC
-        -Wno-error=null-dereference
-        -Wno-error=conversion
-        -Wno-error=sign-conversion
-        -Wno-error=sign-compare
-        )
-
-    # Configure compilation flags and libraries for the example... see the corresponding function
-    # in hw/bsp/FAMILY/family.cmake for details.
-    family_configure_device_example(${PROJECT})
+set(LWIP ${TOP}/lib/lwip)
+if (NOT EXISTS ${LWIP}/src)
+  MESSAGE(WARNING "lib/lwip submodule not found, please run 'python tools/get_deps.py lib/lwip' to fetch it")
+  return()
 endif()
+
+# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
+family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
+
+project(${PROJECT} C CXX ASM)
+
+# Checks this example is valid for the family and initializes the project
+family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+
+add_executable(${PROJECT})
+
+# Example source
+target_sources(${PROJECT} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/src/main.c
+  ${CMAKE_CURRENT_LIST_DIR}/src/usb_descriptors.c
+  )
+
+# Example include
+target_include_directories(${PROJECT} PUBLIC
+  ${CMAKE_CURRENT_LIST_DIR}/src
+  ${LWIP}/src/include
+  ${LWIP}/src/include/ipv4
+  ${LWIP}/src/include/lwip/apps
+  ${TOP}/lib/networking
+  )
+
+# lib/networking sources
+target_sources(${PROJECT} PUBLIC
+  ${TOP}/lib/networking/dhserver.c
+  ${TOP}/lib/networking/dnserver.c
+  ${TOP}/lib/networking/rndis_reports.c
+  )
+
+# lwip sources
+target_sources(${PROJECT} PUBLIC
+  ${LWIP}/src/core/altcp.c
+  ${LWIP}/src/core/altcp_alloc.c
+  ${LWIP}/src/core/altcp_tcp.c
+  ${LWIP}/src/core/def.c
+  ${LWIP}/src/core/dns.c
+  ${LWIP}/src/core/inet_chksum.c
+  ${LWIP}/src/core/init.c
+  ${LWIP}/src/core/ip.c
+  ${LWIP}/src/core/mem.c
+  ${LWIP}/src/core/memp.c
+  ${LWIP}/src/core/netif.c
+  ${LWIP}/src/core/pbuf.c
+  ${LWIP}/src/core/raw.c
+  ${LWIP}/src/core/stats.c
+  ${LWIP}/src/core/sys.c
+  ${LWIP}/src/core/tcp.c
+  ${LWIP}/src/core/tcp_in.c
+  ${LWIP}/src/core/tcp_out.c
+  ${LWIP}/src/core/timeouts.c
+  ${LWIP}/src/core/udp.c
+  ${LWIP}/src/core/ipv4/autoip.c
+  ${LWIP}/src/core/ipv4/dhcp.c
+  ${LWIP}/src/core/ipv4/etharp.c
+  ${LWIP}/src/core/ipv4/icmp.c
+  ${LWIP}/src/core/ipv4/igmp.c
+  ${LWIP}/src/core/ipv4/ip4.c
+  ${LWIP}/src/core/ipv4/ip4_addr.c
+  ${LWIP}/src/core/ipv4/ip4_frag.c
+  ${LWIP}/src/netif/ethernet.c
+  ${LWIP}/src/netif/slipif.c
+  ${LWIP}/src/apps/http/httpd.c
+  ${LWIP}/src/apps/http/fs.c
+  )
+
+# due to warnings from other net source, we need to prevent error from some of the warnings options
+target_compile_options(${PROJECT} PUBLIC
+  -Wno-error=null-dereference
+  -Wno-error=conversion
+  -Wno-error=sign-conversion
+  -Wno-error=sign-compare
+  )
+
+# Configure compilation flags and libraries for the example... see the corresponding function
+# in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT})
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 0b99d8919..0d2f0975b 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -34,6 +34,8 @@ function(add_tinyusb TARGET)
     )
   target_include_directories(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    # TODO for net driver, should be removed/changed
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../lib/networking
     )
   # enable all possible warnings
   target_compile_options(${TARGET} PUBLIC

From 1d857605b79156a10d14aeb837a9e82bbb81e87c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 26 May 2023 15:25:55 +0700
Subject: [PATCH 356/691] use get_deps.py

---
 .github/workflows/build_aarch64.yml | 2 +-
 .github/workflows/build_arm.yml     | 2 +-
 .github/workflows/build_iar.yml     | 2 +-
 .github/workflows/build_msp430.yml  | 2 +-
 .github/workflows/build_renesas.yml | 2 +-
 .github/workflows/build_riscv.yml   | 2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/.github/workflows/build_aarch64.yml b/.github/workflows/build_aarch64.yml
index 77d3778d7..6ac7ad015 100644
--- a/.github/workflows/build_aarch64.yml
+++ b/.github/workflows/build_aarch64.yml
@@ -70,7 +70,7 @@ jobs:
       run: echo >> $GITHUB_PATH `echo ~/cache/toolchain/*/bin`
 
     - name: Get Dependencies
-      run: python3 tools/get_family_deps.py ${{ matrix.family }}
+      run: python3 tools/get_deps.py ${{ matrix.family }}
 
     - name: Build
       run: python3 tools/build_family.py ${{ matrix.family }}
diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 1db9586af..e3b9a9686 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -77,7 +77,7 @@ jobs:
         echo >> $GITHUB_ENV PICO_SDK_PATH=~/pico-sdk
 
     - name: Get Dependencies
-      run: python3 tools/get_family_deps.py ${{ matrix.family }}
+      run: python3 tools/get_deps.py ${{ matrix.family }}
 
     - name: Build
       run: python3 tools/build_family.py ${{ matrix.family }}
diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml
index 8c3b57e10..3da5ed40f 100644
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@@ -44,7 +44,7 @@ jobs:
       uses: actions/checkout@v3
 
     - name: Get Dependencies
-      run: python3 tools/get_family_deps.py ${{ matrix.family }}
+      run: python3 tools/get_deps.py ${{ matrix.family }}
 
     - name: Build
       run: python3 tools/build_family.py ${{ matrix.family }} CC=iccarm
diff --git a/.github/workflows/build_msp430.yml b/.github/workflows/build_msp430.yml
index 5424a88d6..c62056940 100644
--- a/.github/workflows/build_msp430.yml
+++ b/.github/workflows/build_msp430.yml
@@ -68,7 +68,7 @@ jobs:
       run: echo >> $GITHUB_PATH `echo ~/cache/toolchain/*/bin`
 
     - name: Get Dependencies
-      run: python3 tools/get_family_deps.py ${{ matrix.family }}
+      run: python3 tools/get_deps.py ${{ matrix.family }}
 
     - name: Build
       run: python3 tools/build_family.py ${{ matrix.family }}
diff --git a/.github/workflows/build_renesas.yml b/.github/workflows/build_renesas.yml
index 3f0a4b694..66b98a71b 100644
--- a/.github/workflows/build_renesas.yml
+++ b/.github/workflows/build_renesas.yml
@@ -68,7 +68,7 @@ jobs:
       run: echo >> $GITHUB_PATH `echo ~/cache/toolchain/*/bin`
 
     - name: Get Dependencies
-      run: python3 tools/get_family_deps.py ${{ matrix.family }}
+      run: python3 tools/get_deps.py ${{ matrix.family }}
 
     - name: Build
       run: python3 tools/build_family.py ${{ matrix.family }}
diff --git a/.github/workflows/build_riscv.yml b/.github/workflows/build_riscv.yml
index 8682d655a..8ec549072 100644
--- a/.github/workflows/build_riscv.yml
+++ b/.github/workflows/build_riscv.yml
@@ -69,7 +69,7 @@ jobs:
       run: echo >> $GITHUB_PATH `echo ~/cache/toolchain/*/bin`
 
     - name: Get Dependencies
-      run: python3 tools/get_family_deps.py ${{ matrix.family }}
+      run: python3 tools/get_deps.py ${{ matrix.family }}
 
     - name: Build
       run: python3 tools/build_family.py ${{ matrix.family }}

From 05cc342dfa258a2c5e381788009b84445b6e9856 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 26 May 2023 15:45:55 +0700
Subject: [PATCH 357/691] update deps, rename kinetis_k32 to k32l

---
 .github/workflows/build_arm.yml                             | 2 +-
 .../boards/frdm_k32l2a4s/board.h                            | 0
 .../boards/frdm_k32l2a4s/board.mk                           | 0
 .../boards/frdm_k32l2a4s/frdm_k32l2a4s.c                    | 0
 .../boards/frdm_k32l2b/board.h                              | 0
 .../boards/frdm_k32l2b/board.mk                             | 0
 .../boards/frdm_k32l2b/frdm_k32l2b.c                        | 0
 .../boards/kuiic/K32L2B31xxxxA_flash.ld                     | 0
 hw/bsp/{kinetis_k32 => kinetis_k32l}/boards/kuiic/board.h   | 0
 hw/bsp/{kinetis_k32 => kinetis_k32l}/boards/kuiic/board.mk  | 0
 hw/bsp/{kinetis_k32 => kinetis_k32l}/boards/kuiic/kuiic.c   | 0
 hw/bsp/{kinetis_k32 => kinetis_k32l}/family.mk              | 0
 hw/bsp/saml2x/family.mk                                     | 6 +++---
 tools/get_deps.py                                           | 5 +++--
 14 files changed, 7 insertions(+), 6 deletions(-)
 rename hw/bsp/{kinetis_k32 => kinetis_k32l}/boards/frdm_k32l2a4s/board.h (100%)
 rename hw/bsp/{kinetis_k32 => kinetis_k32l}/boards/frdm_k32l2a4s/board.mk (100%)
 rename hw/bsp/{kinetis_k32 => kinetis_k32l}/boards/frdm_k32l2a4s/frdm_k32l2a4s.c (100%)
 rename hw/bsp/{kinetis_k32 => kinetis_k32l}/boards/frdm_k32l2b/board.h (100%)
 rename hw/bsp/{kinetis_k32 => kinetis_k32l}/boards/frdm_k32l2b/board.mk (100%)
 rename hw/bsp/{kinetis_k32 => kinetis_k32l}/boards/frdm_k32l2b/frdm_k32l2b.c (100%)
 rename hw/bsp/{kinetis_k32 => kinetis_k32l}/boards/kuiic/K32L2B31xxxxA_flash.ld (100%)
 rename hw/bsp/{kinetis_k32 => kinetis_k32l}/boards/kuiic/board.h (100%)
 rename hw/bsp/{kinetis_k32 => kinetis_k32l}/boards/kuiic/board.mk (100%)
 rename hw/bsp/{kinetis_k32 => kinetis_k32l}/boards/kuiic/kuiic.c (100%)
 rename hw/bsp/{kinetis_k32 => kinetis_k32l}/family.mk (100%)

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index e3b9a9686..8fbaba4c6 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -34,7 +34,7 @@ jobs:
         family:
         # Alphabetical order
         - 'broadcom_32bit'
-        - 'kinetis_k32 kinetis_kl'
+        - 'kinetis_k32l kinetis_kl'
         - 'lpc11 lpc13 lpc15 lpc17 lpc18'
         - 'lpc51 lpc54 lpc55'
         - 'mm32 msp432e4'
diff --git a/hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.h b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.h
similarity index 100%
rename from hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.h
rename to hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.h
diff --git a/hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.mk b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk
similarity index 100%
rename from hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/board.mk
rename to hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk
diff --git a/hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/frdm_k32l2a4s.c b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/frdm_k32l2a4s.c
similarity index 100%
rename from hw/bsp/kinetis_k32/boards/frdm_k32l2a4s/frdm_k32l2a4s.c
rename to hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/frdm_k32l2a4s.c
diff --git a/hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.h b/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.h
similarity index 100%
rename from hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.h
rename to hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.h
diff --git a/hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.mk b/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk
similarity index 100%
rename from hw/bsp/kinetis_k32/boards/frdm_k32l2b/board.mk
rename to hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk
diff --git a/hw/bsp/kinetis_k32/boards/frdm_k32l2b/frdm_k32l2b.c b/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/frdm_k32l2b.c
similarity index 100%
rename from hw/bsp/kinetis_k32/boards/frdm_k32l2b/frdm_k32l2b.c
rename to hw/bsp/kinetis_k32l/boards/frdm_k32l2b/frdm_k32l2b.c
diff --git a/hw/bsp/kinetis_k32/boards/kuiic/K32L2B31xxxxA_flash.ld b/hw/bsp/kinetis_k32l/boards/kuiic/K32L2B31xxxxA_flash.ld
similarity index 100%
rename from hw/bsp/kinetis_k32/boards/kuiic/K32L2B31xxxxA_flash.ld
rename to hw/bsp/kinetis_k32l/boards/kuiic/K32L2B31xxxxA_flash.ld
diff --git a/hw/bsp/kinetis_k32/boards/kuiic/board.h b/hw/bsp/kinetis_k32l/boards/kuiic/board.h
similarity index 100%
rename from hw/bsp/kinetis_k32/boards/kuiic/board.h
rename to hw/bsp/kinetis_k32l/boards/kuiic/board.h
diff --git a/hw/bsp/kinetis_k32/boards/kuiic/board.mk b/hw/bsp/kinetis_k32l/boards/kuiic/board.mk
similarity index 100%
rename from hw/bsp/kinetis_k32/boards/kuiic/board.mk
rename to hw/bsp/kinetis_k32l/boards/kuiic/board.mk
diff --git a/hw/bsp/kinetis_k32/boards/kuiic/kuiic.c b/hw/bsp/kinetis_k32l/boards/kuiic/kuiic.c
similarity index 100%
rename from hw/bsp/kinetis_k32/boards/kuiic/kuiic.c
rename to hw/bsp/kinetis_k32l/boards/kuiic/kuiic.c
diff --git a/hw/bsp/kinetis_k32/family.mk b/hw/bsp/kinetis_k32l/family.mk
similarity index 100%
rename from hw/bsp/kinetis_k32/family.mk
rename to hw/bsp/kinetis_k32l/family.mk
diff --git a/hw/bsp/saml2x/family.mk b/hw/bsp/saml2x/family.mk
index 91c2cfa61..98071737a 100644
--- a/hw/bsp/saml2x/family.mk
+++ b/hw/bsp/saml2x/family.mk
@@ -1,5 +1,5 @@
 UF2_FAMILY_ID = 0x68ed2b88
-DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/microchip
+DEPS_SUBMODULES += hw/mcu/microchip
 
 include $(TOP)/$(BOARD_PATH)/board.mk
 
@@ -32,14 +32,14 @@ SRC_C += \
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
-	$(TOP)/$(MCU_DIR)/ \
+	$(TOP)/$(MCU_DIR) \
+	$(TOP)/$(MCU_DIR)/CMSIS/Include \
 	$(TOP)/$(MCU_DIR)/config \
 	$(TOP)/$(MCU_DIR)/include \
 	$(TOP)/$(MCU_DIR)/hal/include \
 	$(TOP)/$(MCU_DIR)/hal/utils/include \
 	$(TOP)/$(MCU_DIR)/hpl/port \
 	$(TOP)/$(MCU_DIR)/hri \
-	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include
 
 # For freeRTOS port source
 FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 6db5224a4..4f8c0355c 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -169,8 +169,9 @@ deps_optional = {
                             'ch32v307'],
     'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git',
                     '20285262657d1b482d132d20d755c8c330d55c1f',
-                    'imxrt mcx stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h7 stm32l0 stm32l1 '
-                    'stm32l4 stm32l5 stm32u5 stm32wb'],
+                    'imxrt kinetis_k32l lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra '
+                    'stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 '
+                    'stm32h7 stm32l0 stm32l1 stm32l4 stm32l5 stm32u5 stm32wb'],
     'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git',
                          'e73e04ca63495672d955f9268e003cffe168fcd8',
                          'lpc55'],

From 7ac85d08c7aa59f35cbbf2657dd9be68d46e1fdc Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 26 May 2023 16:37:47 +0700
Subject: [PATCH 358/691] move lpc18 and rp2040 to cmake workflow since rp2040
 often failed randomly with make

---
 .github/workflows/build_arm.yml               |   3 +-
 .github/workflows/cmake_arm.yml               |  19 +-
 hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h  |   8 +-
 hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h  | 166 ++++++++++++++++++
 hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h  |   8 +-
 .../boards/double_m33_express/board.cmake     |  16 ++
 hw/bsp/lpc55/family.cmake                     |  14 +-
 hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h    |   8 +-
 hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h    | 166 ++++++++++++++++++
 hw/bsp/saml2x/family.mk                       |   4 +-
 src/CMakeLists.txt                            |  47 ++++-
 tools/get_deps.py                             |   4 +-
 12 files changed, 429 insertions(+), 34 deletions(-)
 create mode 100644 hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/lpc55/boards/double_m33_express/board.cmake
 create mode 100644 hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 8fbaba4c6..42c8eb7ce 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -35,12 +35,11 @@ jobs:
         # Alphabetical order
         - 'broadcom_32bit'
         - 'kinetis_k32l kinetis_kl'
-        - 'lpc11 lpc13 lpc15 lpc17 lpc18'
+        - 'lpc11 lpc13 lpc15 lpc17'
         - 'lpc51 lpc54 lpc55'
         - 'mm32 msp432e4'
         - 'nrf'
         - 'ra'
-        - 'rp2040'
         - 'samd11 samd21'
         - 'samd51 same5x'
         - 'saml2x'
diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index e7991252d..f3989f239 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -32,9 +32,11 @@ jobs:
       fail-fast: false
       matrix:
         family:
-        # Alphabetical order
-        - 'mcx'
-        - 'imxrt'
+          # Alphabetical order
+          - 'lpc18'
+          - 'mcx'
+          - 'imxrt'
+          - 'rp2040'
     steps:
     - name: Setup Python
       uses: actions/setup-python@v4
@@ -52,8 +54,19 @@ jobs:
     - name: Checkout TinyUSB
       uses: actions/checkout@v3
 
+    - name: Checkout pico-sdk for rp2040
+      if: matrix.family == 'rp2040'
+      uses: actions/checkout@v3
+      with:
+        repository: raspberrypi/pico-sdk
+        ref: develop
+        path: pico-sdk
+
     - name: Get Dependencies
       run: python3 tools/get_deps.py ${{ matrix.family }}
 
     - name: Build
       run: python tools/build_cmake.py ${{ matrix.family }}
+      env:
+        # for rp2040, there is no harm if defined for other families
+        PICO_SDK_PATH: ${{ github.workspace }}/pico-sdk
diff --git a/hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h
index c8d94f9ed..c1928fbcd 100644
--- a/hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h
@@ -49,10 +49,10 @@ extern uint32_t SystemCoreClock;
 #endif
 
 /* Cortex M23/M33 port configuration. */
-#define configENABLE_MPU								        0
-#define configENABLE_FPU								        1
-#define configENABLE_TRUSTZONE					        0
-#define configMINIMAL_SECURE_STACK_SIZE					( 1024 )
+#define configENABLE_MPU						0
+#define configENABLE_FPU						1
+#define configENABLE_TRUSTZONE					0
+#define configMINIMAL_SECURE_STACK_SIZE			(1024)
 
 #define configUSE_PREEMPTION                    1
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
diff --git a/hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..323c1a0a4
--- /dev/null
+++ b/hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,166 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// IAR assembler have limited preprocessor support and it only need following macros:
+#ifndef __IASMARM__
+// FIXME cause redundant-decls warnings
+extern uint32_t SystemCoreClock;
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU						0
+#define configENABLE_FPU						0
+#define configENABLE_TRUSTZONE					0
+#define configMINIMAL_SECURE_STACK_SIZE			(1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               2
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       3
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h
index 4c6058d27..421106f08 100644
--- a/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h
@@ -49,10 +49,10 @@ extern uint32_t SystemCoreClock;
 #endif
 
 /* Cortex M23/M33 port configuration. */
-#define configENABLE_MPU								        0
-#define configENABLE_FPU								        1
-#define configENABLE_TRUSTZONE					        0
-#define configMINIMAL_SECURE_STACK_SIZE					( 1024 )
+#define configENABLE_MPU						0
+#define configENABLE_FPU						1
+#define configENABLE_TRUSTZONE					0
+#define configMINIMAL_SECURE_STACK_SIZE			(1024)
 
 #define configUSE_PREEMPTION                    1
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
diff --git a/hw/bsp/lpc55/boards/double_m33_express/board.cmake b/hw/bsp/lpc55/boards/double_m33_express/board.cmake
new file mode 100644
index 000000000..7c46c075e
--- /dev/null
+++ b/hw/bsp/lpc55/boards/double_m33_express/board.cmake
@@ -0,0 +1,16 @@
+set(MCU_VARIANT LPC55S69)
+set(MCU_CORE LPC55S69_cm33_core0)
+
+set(JLINK_DEVICE LPC55S69)
+set(PYOCD_TARGET LPC55S69)
+set(NXPLINK_DEVICE LPC55S69:LPCXpresso55S69)
+
+set(LD_FILE_gcc ${CMAKE_CURRENT_LIST_DIR}/LPC55S69_cm33_core0_uf2.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_LPC55S69JBD100_cm33_core0
+    # port 1 is highspeed
+    BOARD_TUD_RHPORT=1
+    )
+endfunction()
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index 1b9c1a655..77a2b821e 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -34,8 +34,6 @@ endif()
 set(BOARD_TARGET board_${BOARD})
 if (NOT TARGET ${BOARD_TARGET})
   add_library(${BOARD_TARGET} STATIC
-    # external driver
-    #lib/sct_neopixel/sct_neopixel.c
     # driver
     ${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
     ${SDK_DIR}/drivers/common/fsl_common_arm.c
@@ -48,15 +46,17 @@ if (NOT TARGET ${BOARD_TARGET})
     ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
     )
   target_compile_definitions(${BOARD_TARGET} PUBLIC
-    CFG_TUSB_MCU=OPT_MCU_LPC55XX
+    CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\)
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
+    ${TOP}/lib/sct_neopixel
     # driver
     ${SDK_DIR}/drivers/common
     ${SDK_DIR}/drivers/flexcomm
     ${SDK_DIR}/drivers/lpc_iocon
     ${SDK_DIR}/drivers/lpc_gpio
     ${SDK_DIR}/drivers/lpuart
+    ${SDK_DIR}/drivers/sctimer
     # mcu
     ${CMSIS_DIR}/CMSIS/Core/Include
     ${SDK_DIR}/devices/${MCU_VARIANT}
@@ -64,13 +64,17 @@ if (NOT TARGET ${BOARD_TARGET})
     )
   update_board(${BOARD_TARGET})
 
+  if (NOT DEFINED LD_FILE_${TOOLCHAIN})
+    set(LD_FILE_gcc ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
+  endif ()
+
   if (TOOLCHAIN STREQUAL "gcc")
     target_sources(${BOARD_TARGET} PUBLIC
       ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S
       )
     target_link_options(${BOARD_TARGET} PUBLIC
       # linker file
-      "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld"
+      "LINKER:--script=${LD_FILE_gcc}"
       # nanolib
       --specs=nosys.specs
       --specs=nano.specs
@@ -95,6 +99,8 @@ function(family_configure_example TARGET)
     # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    # external driver
+    ${TOP}/lib/sct_neopixel/sct_neopixel.c
     )
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
diff --git a/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h
index 4c6058d27..421106f08 100644
--- a/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h
@@ -49,10 +49,10 @@ extern uint32_t SystemCoreClock;
 #endif
 
 /* Cortex M23/M33 port configuration. */
-#define configENABLE_MPU								        0
-#define configENABLE_FPU								        1
-#define configENABLE_TRUSTZONE					        0
-#define configMINIMAL_SECURE_STACK_SIZE					( 1024 )
+#define configENABLE_MPU						0
+#define configENABLE_FPU						1
+#define configENABLE_TRUSTZONE					0
+#define configMINIMAL_SECURE_STACK_SIZE			(1024)
 
 #define configUSE_PREEMPTION                    1
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
diff --git a/hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..421106f08
--- /dev/null
+++ b/hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,166 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// IAR assembler have limited preprocessor support and it only need following macros:
+#ifndef __IASMARM__
+// FIXME cause redundant-decls warnings
+extern uint32_t SystemCoreClock;
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU						0
+#define configENABLE_FPU						1
+#define configENABLE_TRUSTZONE					0
+#define configMINIMAL_SECURE_STACK_SIZE			(1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               2
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       3
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/saml2x/family.mk b/hw/bsp/saml2x/family.mk
index 98071737a..62e5f8f4a 100644
--- a/hw/bsp/saml2x/family.mk
+++ b/hw/bsp/saml2x/family.mk
@@ -1,5 +1,5 @@
 UF2_FAMILY_ID = 0x68ed2b88
-DEPS_SUBMODULES += hw/mcu/microchip
+DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/microchip
 
 include $(TOP)/$(BOARD_PATH)/board.mk
 
@@ -33,13 +33,13 @@ SRC_C += \
 INC += \
 	$(TOP)/$(BOARD_PATH) \
 	$(TOP)/$(MCU_DIR) \
-	$(TOP)/$(MCU_DIR)/CMSIS/Include \
 	$(TOP)/$(MCU_DIR)/config \
 	$(TOP)/$(MCU_DIR)/include \
 	$(TOP)/$(MCU_DIR)/hal/include \
 	$(TOP)/$(MCU_DIR)/hal/utils/include \
 	$(TOP)/$(MCU_DIR)/hpl/port \
 	$(TOP)/$(MCU_DIR)/hri \
+	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include
 
 # For freeRTOS port source
 FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 0d2f0975b..396737ed5 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -1,11 +1,12 @@
-# TODO make tinyusb as library that depends on 'tusb_config' interface that exposes the tusb_config.h file
-# This file is WIP and should not used yet
+# TODO more docs and example on how to use this file
+# Usage: requires target tinyusb_config which expose tusb_config.h file
+# TINYUSB_TARGET_PREFIX and TINYUSB_TARGET_SUFFIX can be used to change the name of the target
 
 cmake_minimum_required(VERSION 3.17)
 
-# Add tinyusb to a target
+# Add tinyusb to a target, if user don't want to compile tinyusb as a library
 function(add_tinyusb TARGET)
-  target_sources(${TARGET} PUBLIC
+  target_sources(${TARGET} PRIVATE
     # common
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/tusb.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/common/tusb_fifo.c
@@ -37,11 +38,39 @@ function(add_tinyusb TARGET)
     # TODO for net driver, should be removed/changed
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../lib/networking
     )
-  # enable all possible warnings
-  target_compile_options(${TARGET} PUBLIC
-    )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_compile_options(${TARGET} PRIVATE
+      -Wall
+      -Wextra
+      -Werror
+      -Wfatal-errors
+      -Wdouble-promotion
+      -Wstrict-prototypes
+      -Wstrict-overflow
+      -Werror-implicit-function-declaration
+      -Wfloat-equal
+      -Wundef
+      -Wshadow
+      -Wwrite-strings
+      -Wsign-compare
+      -Wmissing-format-attribute
+      -Wunreachable-code
+      -Wcast-align
+      -Wcast-function-type
+      -Wcast-qual
+      -Wnull-dereference
+      -Wuninitialized
+      -Wunused
+      -Wreturn-type
+      -Wredundant-decls
+      )
+  endif ()
 endfunction()
 
+#------------------------------------
+# TinyUSB as library target
+#------------------------------------
 set(TINYUSB_TARGET "tinyusb")
 set(TINYUSB_CONFIG_TARGET "tinyusb_config")
 
@@ -58,12 +87,12 @@ endif ()
 add_library(${TINYUSB_TARGET} STATIC)
 add_tinyusb(${TINYUSB_TARGET})
 
-# Link with tinyusb_config target
-
+# Check if tinyusb_config target is defined
 if (NOT TARGET ${TINYUSB_CONFIG_TARGET})
   message(FATAL_ERROR "${TINYUSB_CONFIG_TARGET} target is not defined")
 endif()
 
+# Link with tinyusb_config target
 target_link_libraries(${TINYUSB_TARGET} PUBLIC
   ${TINYUSB_CONFIG_TARGET}
   )
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 4f8c0355c..b16bf7005 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -52,7 +52,7 @@ deps_optional = {
                            'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43'],
     'hw/mcu/nxp/mcux-sdk': ['https://github.com/hathach/mcux-sdk.git',
                             '950819b7de9b32f92c3edf396bc5ffb8d66e7009',
-                            'kinetis_k32 lpc51 lpc54 lpc55 mcx imxrt'],
+                            'kinetis_k32l lpc51 lpc54 lpc55 mcx imxrt'],
     'hw/mcu/nxp/nxp_sdk': ['https://github.com/hathach/nxp_sdk.git',
                            '845c8fc49b6fb660f06a5c45225494eacb06f00c',
                            'kinetis_kl'],
@@ -169,7 +169,7 @@ deps_optional = {
                             'ch32v307'],
     'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git',
                     '20285262657d1b482d132d20d755c8c330d55c1f',
-                    'imxrt kinetis_k32l lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra '
+                    'imxrt kinetis_k32l lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x'
                     'stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 '
                     'stm32h7 stm32l0 stm32l1 stm32l4 stm32l5 stm32u5 stm32wb'],
     'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git',

From 7fb74a33a113a0acd44b89863435dd6df1ee3393 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 26 May 2023 16:44:29 +0700
Subject: [PATCH 359/691] forgot to move hw test

---
 .github/workflows/build_arm.yml | 75 +--------------------------------
 .github/workflows/cmake_arm.yml | 73 ++++++++++++++++++++++++++++++++
 2 files changed, 74 insertions(+), 74 deletions(-)

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 42c8eb7ce..3a2daab08 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -90,24 +90,11 @@ jobs:
           find ${ex} -name *.map -print -quit | xargs -I % sh -c 'echo "::group::%"; linkermap -v %; echo "::endgroup::"'
         done
 
-    # Upload binaries for rp2040/stm32l412nucleo hardware test with self-hosted
-
-    - name: Prepare rp2040 Artifacts
-      if: contains(matrix.family, 'rp2040') && github.repository_owner == 'hathach'
-      run: find examples/ -name "*.elf" -exec mv {} . \;
-
+    # Upload binaries for hardware test with self-hosted
     - name: Prepare stm32l412nucleo Artifacts
       if: contains(matrix.family, 'stm32l4')
       run: find examples/ -path "*stm32l412nucleo/*.elf" -exec mv {} . \;
 
-    - name: Upload Artifacts for rp2040
-      if: contains(matrix.family,'rp2040') && github.repository_owner == 'hathach'
-      uses: actions/upload-artifact@v3
-      with:
-        name: rp2040
-        path: |
-          *.elf
-
     - name: Upload Artifacts for stm32l412nucleo
       if: contains(matrix.family, 'stm32l4') && github.repository_owner == 'hathach'
       uses: actions/upload-artifact@v3
@@ -116,66 +103,6 @@ jobs:
         path: |
           *.elf
 
-  # ---------------------------------------
-  # Hardware in the loop (HIL)
-  # Current self-hosted instance is running on an RPI4 with
-  # - pico + pico-probe connected via USB
-  # - pico-probe is /dev/ttyACM0
-  # ---------------------------------------
-  hw-rp2040-test:
-    # run only with hathach's commit due to limited resource on RPI4
-    if: github.repository_owner == 'hathach'
-    needs: build-arm
-    runs-on: [self-hosted, Linux, ARM64, rp2040]
-
-    steps:
-    - name: Clean workspace
-      run: |
-        echo "Cleaning up previous run"
-        rm -rf "${{ github.workspace }}"
-        mkdir -p "${{ github.workspace }}"
-
-    - name: Download rp2040 Artifacts
-      uses: actions/download-artifact@v3
-      with:
-        name: rp2040
-
-    - name: Create flash.sh
-      run: |
-        echo > flash.sh 'cmdout=$(openocd -f "interface/cmsis-dap.cfg" -f "target/rp2040.cfg" -c "adapter speed 5000" -c "program $1 reset exit")'
-        echo >> flash.sh 'if (( $? )) ; then echo $cmdout ; fi'
-        chmod +x flash.sh
-
-    - name: Test cdc_dual_ports
-      run: |
-        ./flash.sh cdc_dual_ports.elf
-        while (! ([ -e /dev/ttyACM1 ] && [ -e /dev/ttyACM2 ])) && [ $SECONDS -le 10 ]; do :; done
-        test -e /dev/ttyACM1 && echo "ttyACM1 exists"
-        test -e /dev/ttyACM2 && echo "ttyACM2 exists"
-
-    - name: Test cdc_msc
-      run: |
-        ./flash.sh cdc_msc.elf
-        readme='/media/pi/TinyUSB MSC/README.TXT'
-        while (! ([ -e /dev/ttyACM1 ] && [ -f "$readme" ])) && [ $SECONDS -le 10 ]; do :; done
-        test -e /dev/ttyACM1 && echo "ttyACM1 exists"
-        test -f "$readme" && echo "$readme exists"
-        cat "$readme"
-
-    - name: Test dfu
-      run: |
-        ./flash.sh dfu.elf
-        while (! (dfu-util -l | grep "Found DFU")) && [ $SECONDS -le 10 ]; do :; done
-        dfu-util -d cafe -a 0 -U dfu0
-        dfu-util -d cafe -a 1 -U dfu1
-        grep "TinyUSB DFU! - Partition 0" dfu0
-        grep "TinyUSB DFU! - Partition 1" dfu1
-
-    - name: Test dfu_runtime
-      run: |
-        ./flash.sh dfu_runtime.elf
-        while (! (dfu-util -l | grep "Found Runtime")) && [ $SECONDS -le 10 ]; do :; done
-
   # ---------------------------------------
   # Hardware in the loop (HIL)
   # Current self-hosted instance is running on an EPYC 7232 server hosted by HiFiPhile user
diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index f3989f239..b3f1bd410 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -70,3 +70,76 @@ jobs:
       env:
         # for rp2040, there is no harm if defined for other families
         PICO_SDK_PATH: ${{ github.workspace }}/pico-sdk
+
+    # Upload binaries for hardware test with self-hosted
+    - name: Prepare rp2040 Artifacts
+      if: contains(matrix.family, 'rp2040') && github.repository_owner == 'hathach'
+      run: find examples/ -name "*.elf" -exec mv {} . \;
+
+    - name: Upload Artifacts for rp2040
+      if: contains(matrix.family,'rp2040') && github.repository_owner == 'hathach'
+      uses: actions/upload-artifact@v3
+      with:
+        name: rp2040
+        path: |
+          *.elf
+
+  # ---------------------------------------
+  # Hardware in the loop (HIL)
+  # Current self-hosted instance is running on an RPI4 with
+  # - pico + pico-probe connected via USB
+  # - pico-probe is /dev/ttyACM0
+  # ---------------------------------------
+  hw-rp2040-test:
+    # run only with hathach's commit due to limited resource on RPI4
+    if: github.repository_owner == 'hathach'
+    needs: build-arm
+    runs-on: [self-hosted, Linux, ARM64, rp2040]
+
+    steps:
+      - name: Clean workspace
+        run: |
+          echo "Cleaning up previous run"
+          rm -rf "${{ github.workspace }}"
+          mkdir -p "${{ github.workspace }}"
+
+      - name: Download rp2040 Artifacts
+        uses: actions/download-artifact@v3
+        with:
+          name: rp2040
+
+      - name: Create flash.sh
+        run: |
+          echo > flash.sh 'cmdout=$(openocd -f "interface/cmsis-dap.cfg" -f "target/rp2040.cfg" -c "adapter speed 5000" -c "program $1 reset exit")'
+          echo >> flash.sh 'if (( $? )) ; then echo $cmdout ; fi'
+          chmod +x flash.sh
+
+      - name: Test cdc_dual_ports
+        run: |
+          ./flash.sh cdc_dual_ports.elf
+          while (! ([ -e /dev/ttyACM1 ] && [ -e /dev/ttyACM2 ])) && [ $SECONDS -le 10 ]; do :; done
+          test -e /dev/ttyACM1 && echo "ttyACM1 exists"
+          test -e /dev/ttyACM2 && echo "ttyACM2 exists"
+
+      - name: Test cdc_msc
+        run: |
+          ./flash.sh cdc_msc.elf
+          readme='/media/pi/TinyUSB MSC/README.TXT'
+          while (! ([ -e /dev/ttyACM1 ] && [ -f "$readme" ])) && [ $SECONDS -le 10 ]; do :; done
+          test -e /dev/ttyACM1 && echo "ttyACM1 exists"
+          test -f "$readme" && echo "$readme exists"
+          cat "$readme"
+
+      - name: Test dfu
+        run: |
+          ./flash.sh dfu.elf
+          while (! (dfu-util -l | grep "Found DFU")) && [ $SECONDS -le 10 ]; do :; done
+          dfu-util -d cafe -a 0 -U dfu0
+          dfu-util -d cafe -a 1 -U dfu1
+          grep "TinyUSB DFU! - Partition 0" dfu0
+          grep "TinyUSB DFU! - Partition 1" dfu1
+
+      - name: Test dfu_runtime
+        run: |
+          ./flash.sh dfu_runtime.elf
+          while (! (dfu-util -l | grep "Found Runtime")) && [ $SECONDS -le 10 ]; do :; done

From c88e7481be0a6a55bf8af0a48950892aba05eaee Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 26 May 2023 17:15:54 +0700
Subject: [PATCH 360/691] retry hw test

---
 .github/workflows/cmake_arm.yml | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index b3f1bd410..2070c5061 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -74,7 +74,11 @@ jobs:
     # Upload binaries for hardware test with self-hosted
     - name: Prepare rp2040 Artifacts
       if: contains(matrix.family, 'rp2040') && github.repository_owner == 'hathach'
-      run: find examples/ -name "*.elf" -exec mv {} . \;
+      working-directory: ${{github.workspace}}/cmake-build-ci-raspberry_pi_pico
+      run: |
+        find device/ -name "*.elf" -exec mv {} . \;
+        # find host/ -name "*.elf" -exec mv {} . \;
+        # find dual/ -name "*.elf" -exec mv {} . \;
 
     - name: Upload Artifacts for rp2040
       if: contains(matrix.family,'rp2040') && github.repository_owner == 'hathach'

From 4bd02fb04d52dbd1c2e0f1fe8b18afbd299e46cd Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 26 May 2023 18:54:14 +0700
Subject: [PATCH 361/691] more test

---
 .github/workflows/cmake_arm.yml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index 2070c5061..ed00ee4dc 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -76,6 +76,8 @@ jobs:
       if: contains(matrix.family, 'rp2040') && github.repository_owner == 'hathach'
       working-directory: ${{github.workspace}}/cmake-build-ci-raspberry_pi_pico
       run: |
+        tree -L 3
+        find device/ -name "*.elf"
         find device/ -name "*.elf" -exec mv {} . \;
         # find host/ -name "*.elf" -exec mv {} . \;
         # find dual/ -name "*.elf" -exec mv {} . \;

From 59ad5c59dfe1d9dbef033a772d2d5c474c22c53e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 26 May 2023 18:58:21 +0700
Subject: [PATCH 362/691] fix artifacts location

---
 .github/workflows/cmake_arm.yml | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index ed00ee4dc..ccca0c9be 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -76,11 +76,9 @@ jobs:
       if: contains(matrix.family, 'rp2040') && github.repository_owner == 'hathach'
       working-directory: ${{github.workspace}}/cmake-build-ci-raspberry_pi_pico
       run: |
-        tree -L 3
-        find device/ -name "*.elf"
-        find device/ -name "*.elf" -exec mv {} . \;
-        # find host/ -name "*.elf" -exec mv {} . \;
-        # find dual/ -name "*.elf" -exec mv {} . \;
+        find device/ -name "*.elf" -exec mv {} ../ \;
+        # find host/ -name "*.elf" -exec mv {} ../ \;
+        # find dual/ -name "*.elf" -exec mv {} ../ \;
 
     - name: Upload Artifacts for rp2040
       if: contains(matrix.family,'rp2040') && github.repository_owner == 'hathach'

From acfaa4494faccd615475e4ae9d3df940ed13d7af Mon Sep 17 00:00:00 2001
From: gitlab <georgebochileanu@gmail.com>
Date: Sun, 28 May 2023 15:40:01 +0100
Subject: [PATCH 363/691] Fixes bug in tuh_msc_ready

---
 src/class/msc/msc_host.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c
index 138443de4..d32c0adb0 100644
--- a/src/class/msc/msc_host.c
+++ b/src/class/msc/msc_host.c
@@ -118,7 +118,7 @@ bool tuh_msc_mounted(uint8_t dev_addr)
 bool tuh_msc_ready(uint8_t dev_addr)
 {
   msch_interface_t* p_msc = get_itf(dev_addr);
-  return p_msc->mounted && !usbh_edpt_busy(dev_addr, p_msc->ep_in);
+  return p_msc->mounted && !usbh_edpt_busy(dev_addr, p_msc->ep_in) && !usbh_edpt_busy(dev_addr, p_msc->ep_out);
 }
 
 //--------------------------------------------------------------------+

From 8ad024e51bbc663678d8a357f91021bd39222246 Mon Sep 17 00:00:00 2001
From: Ivo Popov <popov.ivo@gmail.com>
Date: Sun, 9 Apr 2023 19:10:01 -0400
Subject: [PATCH 364/691] Even when we get an empty "status change" interrupt
 from the hub, schedule another interrupt poll.

During enumeration, when there are multiple devices attached to the
hub as it's plugged into the Pi Pico, enumeration hangs, because we
get a "status change" callback with value zero. With this patch, we
retry several times on "zero" status change callbacks, until
eventually we succeed.

This is the cheapo hub that exhibits this behavior, but I assume it's
not the only one: https://www.amazon.com/gp/product/B083RQMC7S.

While debugging this, I consulted the implementation in the Linux
kernel. There, hub setup explicitly checks each port individually,
before starting to depend on "status change" interrupts:
https://elixir.bootlin.com/linux/latest/source/drivers/usb/core/hub.c#L1133.
We probably should do something like that here, but it's a much bigger
change.
---
 src/host/hub.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/host/hub.c b/src/host/hub.c
index 85bf22b3e..5b2db547d 100644
--- a/src/host/hub.c
+++ b/src/host/hub.c
@@ -361,6 +361,13 @@ bool hub_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32
         break;
       }
     }
+
+    // The status change event was neither for the hub, nor for any of
+    // its ports. (For example `p_hub->status_change == 0`.) This
+    // shouldn't happen, but it does with some devices. Initiate the
+    // next interrupt poll here, because we've scheduled no other work
+    // whose completion can initiate it.
+    hub_edpt_status_xfer(dev_addr);
   }
 
   // NOTE: next status transfer is queued by usbh.c after handling this request

From 5c428d35a61f7d877cba19d9e094bd519ae91997 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 29 May 2023 13:27:20 +0700
Subject: [PATCH 365/691] check status_change is not zero first

---
 src/host/hub.c | 42 ++++++++++++++++++------------------------
 1 file changed, 18 insertions(+), 24 deletions(-)

diff --git a/src/host/hub.c b/src/host/hub.c
index 5b2db547d..0807c2023 100644
--- a/src/host/hub.c
+++ b/src/host/hub.c
@@ -327,51 +327,45 @@ static void connection_clear_conn_change_complete (tuh_xfer_t* xfer);
 static void connection_port_reset_complete (tuh_xfer_t* xfer);
 
 // callback as response of interrupt endpoint polling
-bool hub_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes)
-{
+bool hub_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes) {
   (void) xferred_bytes; // TODO can be more than 1 for hub with lots of ports
   (void) ep_addr;
   TU_ASSERT(result == XFER_RESULT_SUCCESS);
 
   hub_interface_t* p_hub = get_itf(dev_addr);
 
-  TU_LOG2("  Hub Status Change = 0x%02X\r\n", p_hub->status_change);
+  uint8_t const status_change = p_hub->status_change;
+  TU_LOG2("  Hub Status Change = 0x%02X\r\n", status_change);
 
-  // Hub bit 0 is for the hub device events
-  if (tu_bit_test(p_hub->status_change, 0))
-  {
-    if (hub_port_get_status(dev_addr, 0, &p_hub->hub_status, hub_get_status_complete, 0) == false)
-    {
+  if ( status_change == 0 ) {
+    // The status change event was neither for the hub, nor for any of its ports.
+    // This shouldn't happen, but it does with some devices.
+    // Initiate the next interrupt poll here.
+    hub_edpt_status_xfer(dev_addr);
+    return true;
+  }
+
+  if (tu_bit_test(status_change, 0)) {
+    // Hub bit 0 is for the hub device events
+    if (hub_port_get_status(dev_addr, 0, &p_hub->hub_status, hub_get_status_complete, 0) == false) {
       //Hub status control transfer failed, retry
       hub_edpt_status_xfer(dev_addr);
     }
   }
-  else
-  {
+  else {
     // Hub bits 1 to n are hub port events
-    for (uint8_t port=1; port <= p_hub->port_count; port++)
-    {
-      if ( tu_bit_test(p_hub->status_change, port) )
-      {
-        if (hub_port_get_status(dev_addr, port, &p_hub->port_status, hub_port_get_status_complete, 0) == false)
-        {
+    for (uint8_t port=1; port <= p_hub->port_count; port++) {
+      if ( tu_bit_test(status_change, port) ) {
+        if (hub_port_get_status(dev_addr, port, &p_hub->port_status, hub_port_get_status_complete, 0) == false) {
           //Hub status control transfer failed, retry
           hub_edpt_status_xfer(dev_addr);
         }
         break;
       }
     }
-
-    // The status change event was neither for the hub, nor for any of
-    // its ports. (For example `p_hub->status_change == 0`.) This
-    // shouldn't happen, but it does with some devices. Initiate the
-    // next interrupt poll here, because we've scheduled no other work
-    // whose completion can initiate it.
-    hub_edpt_status_xfer(dev_addr);
   }
 
   // NOTE: next status transfer is queued by usbh.c after handling this request
-
   return true;
 }
 

From 20ef6c4ef7f7fa7130352ae0c0984692a9719b35 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 29 May 2023 13:29:11 +0700
Subject: [PATCH 366/691] slightly clean up

---
 src/host/hub.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/host/hub.c b/src/host/hub.c
index 0807c2023..182bd6ce8 100644
--- a/src/host/hub.c
+++ b/src/host/hub.c
@@ -341,8 +341,7 @@ bool hub_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32
     // The status change event was neither for the hub, nor for any of its ports.
     // This shouldn't happen, but it does with some devices.
     // Initiate the next interrupt poll here.
-    hub_edpt_status_xfer(dev_addr);
-    return true;
+    return hub_edpt_status_xfer(dev_addr);
   }
 
   if (tu_bit_test(status_change, 0)) {

From 19a597bcae11077c3011d78f1a85dc2f1bfcd00f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 1 Jun 2023 12:36:08 +0700
Subject: [PATCH 367/691] add lto for cmake

---
 hw/bsp/family_support.cmake              | 310 ++++++++++++-----------
 hw/bsp/imxrt/family.cmake                |   5 +-
 hw/bsp/lpc18/family.cmake                |   5 +-
 hw/bsp/lpc55/family.cmake                |   2 +-
 hw/bsp/mcx/boards/mcxn947brk/board.cmake |   2 +-
 hw/bsp/mcx/family.cmake                  |  17 +-
 hw/bsp/nrf/family.cmake                  |   5 +-
 tools/cmake/cpu/cortex-m33.cmake         |   1 -
 tools/cmake/toolchain/arm_gcc.cmake      |   8 +-
 tools/cmake/toolchain/set_flags.cmake    |  28 +-
 10 files changed, 200 insertions(+), 183 deletions(-)

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 68a21bc7d..e3f2f45ff 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -7,141 +7,145 @@ set(TOP "${CMAKE_CURRENT_LIST_DIR}/../..")
 
 # Default to gcc
 if (NOT DEFINED TOOLCHAIN)
-    set(TOOLCHAIN gcc)
+  set(TOOLCHAIN gcc)
 endif ()
 
 if (NOT FAMILY)
-    message(FATAL_ERROR "You must set a FAMILY variable for the build (e.g. rp2040, eps32s2, esp32s3). You can do this via -DFAMILY=xxx on the cmake command line")
+  message(FATAL_ERROR "You must set a FAMILY variable for the build (e.g. rp2040, eps32s2, esp32s3). You can do this via -DFAMILY=xxx on the cmake command line")
 endif ()
 
 if (NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake)
-    message(FATAL_ERROR "Family '${FAMILY}' is not known/supported")
+  message(FATAL_ERROR "Family '${FAMILY}' is not known/supported")
 endif()
 
+
 function(family_filter RESULT DIR)
-    get_filename_component(DIR ${DIR} ABSOLUTE BASE_DIR ${CMAKE_CURRENT_SOURCE_DIR})
+  get_filename_component(DIR ${DIR} ABSOLUTE BASE_DIR ${CMAKE_CURRENT_SOURCE_DIR})
 
-    if (EXISTS "${DIR}/only.txt")
-        file(READ "${DIR}/only.txt" ONLYS)
-        # Replace newlines with semicolon so that it is treated as a list by CMake
-        string(REPLACE "\n" ";" ONLYS_LINES ${ONLYS})
-        # For each mcu
-        foreach(MCU IN LISTS FAMILY_MCUS)
-            # For each line in only.txt
-            foreach(_line ${ONLYS_LINES})
-                # If mcu:xxx exists for this mcu or board:xxx then include
-                if (${_line} STREQUAL "mcu:${MCU}" OR ${_line} STREQUAL "board:${BOARD}")
-                    set(${RESULT} 1 PARENT_SCOPE)
-                    return()
-                endif()
-            endforeach()
-        endforeach()
+  if (EXISTS "${DIR}/only.txt")
+    file(READ "${DIR}/only.txt" ONLYS)
+    # Replace newlines with semicolon so that it is treated as a list by CMake
+    string(REPLACE "\n" ";" ONLYS_LINES ${ONLYS})
 
-        # Didn't find it in only file so don't build
-        set(${RESULT} 0 PARENT_SCOPE)
+    # For each mcu
+    foreach(MCU IN LISTS FAMILY_MCUS)
+      # For each line in only.txt
+      foreach(_line ${ONLYS_LINES})
+        # If mcu:xxx exists for this mcu or board:xxx then include
+        if (${_line} STREQUAL "mcu:${MCU}" OR ${_line} STREQUAL "board:${BOARD}")
+          set(${RESULT} 1 PARENT_SCOPE)
+          return()
+        endif()
+      endforeach()
+    endforeach()
 
-    elseif (EXISTS "${DIR}/skip.txt")
-        file(READ "${DIR}/skip.txt" SKIPS)
-        # Replace newlines with semicolon so that it is treated as a list by CMake
-        string(REPLACE "\n" ";" SKIPS_LINES ${SKIPS})
-        # For each mcu
-        foreach(MCU IN LISTS FAMILY_MCUS)
-            # For each line in only.txt
-            foreach(_line ${SKIPS_LINES})
-                # If mcu:xxx exists for this mcu then skip
-                if (${_line} STREQUAL "mcu:${MCU}")
-                    set(${RESULT} 0 PARENT_SCOPE)
-                    return()
-                endif()
-            endforeach()
-        endforeach()
+    # Didn't find it in only file so don't build
+    set(${RESULT} 0 PARENT_SCOPE)
 
-        # Didn't find in skip file so build
-        set(${RESULT} 1 PARENT_SCOPE)
+  elseif (EXISTS "${DIR}/skip.txt")
+    file(READ "${DIR}/skip.txt" SKIPS)
+    # Replace newlines with semicolon so that it is treated as a list by CMake
+    string(REPLACE "\n" ";" SKIPS_LINES ${SKIPS})
 
-    else()
+    # For each mcu
+    foreach(MCU IN LISTS FAMILY_MCUS)
+      # For each line in only.txt
+      foreach(_line ${SKIPS_LINES})
+        # If mcu:xxx exists for this mcu then skip
+        if (${_line} STREQUAL "mcu:${MCU}")
+          set(${RESULT} 0 PARENT_SCOPE)
+          return()
+        endif()
+      endforeach()
+    endforeach()
 
-        # Didn't find skip or only file so build
-        set(${RESULT} 1 PARENT_SCOPE)
-
-    endif()
+    # Didn't find in skip file so build
+    set(${RESULT} 1 PARENT_SCOPE)
+  else()
 
+    # Didn't find skip or only file so build
+    set(${RESULT} 1 PARENT_SCOPE)
+  endif()
 endfunction()
 
+
 function(family_add_subdirectory DIR)
-    family_filter(SHOULD_ADD "${DIR}")
-    if (SHOULD_ADD)
-        add_subdirectory(${DIR})
-    endif()
+  family_filter(SHOULD_ADD "${DIR}")
+  if (SHOULD_ADD)
+    add_subdirectory(${DIR})
+  endif()
 endfunction()
 
+
 function(family_get_project_name OUTPUT_NAME DIR)
-    get_filename_component(SHORT_NAME ${DIR} NAME)
-    set(${OUTPUT_NAME} ${TINYUSB_FAMILY_PROJECT_NAME_PREFIX}${SHORT_NAME} PARENT_SCOPE)
+  get_filename_component(SHORT_NAME ${DIR} NAME)
+  set(${OUTPUT_NAME} ${TINYUSB_FAMILY_PROJECT_NAME_PREFIX}${SHORT_NAME} PARENT_SCOPE)
 endfunction()
 
+
 function(family_initialize_project PROJECT DIR)
-    family_filter(ALLOWED "${DIR}")
-    if (NOT ALLOWED)
-        get_filename_component(SHORT_NAME ${DIR} NAME)
-        message(FATAL_ERROR "${SHORT_NAME} is not supported on FAMILY=${FAMILY}")
-    endif()
+  # set output suffix to .elf
+  set(CMAKE_EXECUTABLE_SUFFIX .elf PARENT_SCOPE)
+
+  family_filter(ALLOWED "${DIR}")
+  if (NOT ALLOWED)
+    get_filename_component(SHORT_NAME ${DIR} NAME)
+    message(FATAL_ERROR "${SHORT_NAME} is not supported on FAMILY=${FAMILY}")
+  endif()
 endfunction()
 
+
 function(family_add_default_example_warnings TARGET)
-    target_compile_options(${TARGET} PUBLIC
-            -Wall
-            -Wextra
-            -Werror
-            -Wfatal-errors
-            -Wdouble-promotion
-            -Wfloat-equal
-            -Wshadow
-            -Wwrite-strings
-            -Wsign-compare
-            -Wmissing-format-attribute
-            -Wunreachable-code
-            -Wcast-align
-            -Wcast-qual
-            -Wnull-dereference
-            -Wuninitialized
-            -Wunused
-            -Wredundant-decls
-            #-Wstrict-prototypes
-            #-Werror-implicit-function-declaration
-            #-Wundef
-            )
+  target_compile_options(${TARGET} PUBLIC
+    -Wall
+    -Wextra
+    -Werror
+    -Wfatal-errors
+    -Wdouble-promotion
+    -Wfloat-equal
+    -Wshadow
+    -Wwrite-strings
+    -Wsign-compare
+    -Wmissing-format-attribute
+    -Wunreachable-code
+    -Wcast-align
+    -Wcast-qual
+    -Wnull-dereference
+    -Wuninitialized
+    -Wunused
+    -Wredundant-decls
+    #-Wstrict-prototypes
+    #-Werror-implicit-function-declaration
+    #-Wundef
+    )
 
-    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-        if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 12.0)
-            target_link_options(${TARGET} PUBLIC "LINKER:--no-warn-rwx-segments")
-        endif()
-
-        # GCC 10
-        if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 10.0)
-            target_compile_options(${TARGET} PUBLIC -Wconversion)
-        endif()
-
-        # GCC 8
-        if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 8.0)
-            target_compile_options(${TARGET} PUBLIC -Wcast-function-type -Wstrict-overflow)
-        endif()
-
-        # GCC 6
-        if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 6.0)
-            target_compile_options(${TARGET} PUBLIC -Wno-strict-aliasing)
-        endif()
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 12.0)
+      target_link_options(${TARGET} PUBLIC "LINKER:--no-warn-rwx-segments")
     endif()
+
+    # GCC 10
+    if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 10.0)
+      target_compile_options(${TARGET} PUBLIC -Wconversion)
+    endif()
+
+    # GCC 8
+    if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 8.0)
+      target_compile_options(${TARGET} PUBLIC -Wcast-function-type -Wstrict-overflow)
+    endif()
+
+    # GCC 6
+    if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 6.0)
+      target_compile_options(${TARGET} PUBLIC -Wno-strict-aliasing)
+    endif()
+  endif()
 endfunction()
 
 
-function(family_support_configure_common TARGET)
-  # set output name to .elf
-  set_target_properties(${TARGET} PROPERTIES OUTPUT_NAME ${TARGET}.elf)
-
+function(family_configure_common TARGET)
   # run size after build
   add_custom_command(TARGET ${TARGET} POST_BUILD
-    COMMAND ${TOOLCHAIN_SIZE} $<TARGET_FILE:${TARGET}>
+    COMMAND ${CMAKE_SIZE} $<TARGET_FILE:${TARGET}>
     )
 
   # Generate map file
@@ -151,11 +155,15 @@ function(family_support_configure_common TARGET)
     )
 endfunction()
 
-#  add_custom_command(TARGET ${TARGET} POST_BUILD
-#    COMMAND ${CMAKE_OBJCOPY} -O ihex $<TARGET_FILE:${TARGET}> ${TARGET}.hex
-#    COMMAND ${CMAKE_OBJCOPY} -O binary $<TARGET_FILE:${TARGET}> ${TARGET}.bin
-#    COMMENT "Creating ${TARGET}.hex and ${TARGET}.bin"
-#    )
+
+# Add bin/hex output
+function(family_add_bin_hex TARGET)
+  add_custom_command(TARGET ${TARGET} POST_BUILD
+    COMMAND ${CMAKE_OBJCOPY} -Obinary $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin
+    COMMAND ${CMAKE_OBJCOPY} -Oihex $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.hex
+    VERBATIM)
+endfunction()
+
 
 # Add flash jlink target
 function(family_flash_jlink TARGET)
@@ -178,78 +186,84 @@ exit"
     )
 endfunction()
 
+
 # Add flash pycod target
 function(family_flash_pyocd TARGET)
-    if (NOT DEFINED PYOC)
-        set(PYOCD pyocd)
-    endif ()
+  if (NOT DEFINED PYOC)
+    set(PYOCD pyocd)
+  endif ()
 
-    add_custom_target(${TARGET}-pyocd
-      DEPENDS ${TARGET}
-      COMMAND ${PYOCD} flash -t ${PYOCD_TARGET} $<TARGET_FILE:${TARGET}>
-      )
+  add_custom_target(${TARGET}-pyocd
+    DEPENDS ${TARGET}
+    COMMAND ${PYOCD} flash -t ${PYOCD_TARGET} $<TARGET_FILE:${TARGET}>
+    )
 endfunction()
 
+
 # Add flash using NXP's LinkServer (redserver)
 # https://www.nxp.com/design/software/development-software/mcuxpresso-software-and-tools-/linkserver-for-microcontrollers:LINKERSERVER
 function(family_flash_nxplink TARGET)
-    if (NOT DEFINED LINKSERVER)
-        set(LINKSERVER LinkServer)
-    endif ()
+  if (NOT DEFINED LINKSERVER)
+    set(LINKSERVER LinkServer)
+  endif ()
 
-    # LinkServer has a bug that can only execute with full path otherwise it throws:
-    # realpath error: No such file or directory
-    execute_process(COMMAND which ${LINKSERVER} OUTPUT_VARIABLE LINKSERVER_PATH OUTPUT_STRIP_TRAILING_WHITESPACE)
+  # LinkServer has a bug that can only execute with full path otherwise it throws:
+  # realpath error: No such file or directory
+  execute_process(COMMAND which ${LINKSERVER} OUTPUT_VARIABLE LINKSERVER_PATH OUTPUT_STRIP_TRAILING_WHITESPACE)
 
-    add_custom_target(${TARGET}-nxplink
-      DEPENDS ${TARGET}
-      COMMAND ${LINKSERVER_PATH} flash ${NXPLINK_DEVICE} load $<TARGET_FILE:${TARGET}>
-      )
+  add_custom_target(${TARGET}-nxplink
+    DEPENDS ${TARGET}
+    COMMAND ${LINKSERVER_PATH} flash ${NXPLINK_DEVICE} load $<TARGET_FILE:${TARGET}>
+    )
 endfunction()
 
+
 # configure an executable target to link to tinyusb in device mode, and add the board implementation
 function(family_configure_device_example TARGET)
-    # default implementation is empty, the function should be redefined in the FAMILY/family.cmake
+  # default implementation is empty, the function should be redefined in the FAMILY/family.cmake
 endfunction()
 
+
 # configure an executable target to link to tinyusb in host mode, and add the board implementation
 function(family_configure_host_example TARGET)
-    # default implementation is empty, the function should be redefined in the FAMILY/family.cmake
+  # default implementation is empty, the function should be redefined in the FAMILY/family.cmake
 endfunction()
 
+
 # Add freeRTOS support to example, can be overridden by FAMILY/family.cmake
 function(family_add_freertos TARGET)
-    # freeros config
-    if (NOT TARGET freertos_config)
-        add_library(freertos_config INTERFACE)
-        target_include_directories(freertos_config SYSTEM INTERFACE
-          ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig
-          )
-    endif()
+  # freeros config
+  if (NOT TARGET freertos_config)
+    add_library(freertos_config INTERFACE)
+    target_include_directories(freertos_config SYSTEM INTERFACE
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig
+      )
+  endif()
 
-    # freertos kernel should be generic as freertos_config however, CMAKE complains with missing variable
-    # such as CMAKE_C_COMPILE_OBJECT
-    if (NOT TARGET freertos_kernel)
-        add_subdirectory(${TOP}/lib/FreeRTOS-Kernel ${CMAKE_BINARY_DIR}/lib/freertos_kernel)
-    endif ()
+  # freertos kernel should be generic as freertos_config however, CMAKE complains with missing variable
+  # such as CMAKE_C_COMPILE_OBJECT
+  if (NOT TARGET freertos_kernel)
+    add_subdirectory(${TOP}/lib/FreeRTOS-Kernel ${CMAKE_BINARY_DIR}/lib/freertos_kernel)
+  endif ()
 
-    # Add FreeRTOS option to tinyusb_config
-    target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
-      CFG_TUSB_OS=OPT_OS_FREERTOS
-      )
-    # link tinyusb with freeRTOS kernel
-    target_link_libraries(${TARGET}-tinyusb PUBLIC
-      freertos_kernel
-      )
-    target_link_libraries(${TARGET} PUBLIC
-      freertos_kernel
-      )
+  # Add FreeRTOS option to tinyusb_config
+  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
+    CFG_TUSB_OS=OPT_OS_FREERTOS
+    )
+  # link tinyusb with freeRTOS kernel
+  target_link_libraries(${TARGET}-tinyusb PUBLIC
+    freertos_kernel
+    )
+  target_link_libraries(${TARGET} PUBLIC
+    freertos_kernel
+    )
 endfunction()
 
+
 include(${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake)
 
 if (NOT FAMILY_MCUS)
-    set(FAMILY_MCUS ${FAMILY})
+  set(FAMILY_MCUS ${FAMILY})
 endif()
 
 # save it in case of re-inclusion
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index a681b0419..49a4a9281 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -4,6 +4,9 @@ if (NOT BOARD)
   message(FATAL_ERROR "BOARD not specified")
 endif ()
 
+# enable LTO
+set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+
 # toolchain set up
 set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
 set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
@@ -77,7 +80,7 @@ endif () # BOARD_TARGET
 # Functions
 #------------------------------------
 function(family_configure_example TARGET)
-  family_support_configure_common(${TARGET})
+  family_configure_common(${TARGET})
 
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
diff --git a/hw/bsp/lpc18/family.cmake b/hw/bsp/lpc18/family.cmake
index 698120077..1bfc63d21 100644
--- a/hw/bsp/lpc18/family.cmake
+++ b/hw/bsp/lpc18/family.cmake
@@ -6,6 +6,9 @@ endif ()
 
 set(SDK_DIR ${TOP}/hw/mcu/nxp/lpcopen/lpc18xx/lpc_chip_18xx)
 
+# enable LTO
+set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+
 # toolchain set up
 set(CMAKE_SYSTEM_PROCESSOR cortex-m3 CACHE INTERNAL "System Processor")
 set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
@@ -65,7 +68,7 @@ endif () # BOARD_TARGET
 # Functions
 #------------------------------------
 function(family_configure_example TARGET)
-  family_support_configure_common(${TARGET})
+  family_configure_common(${TARGET})
 
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index 77a2b821e..eb163bde7 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -89,7 +89,7 @@ endif () # BOARD_TARGET
 # Functions
 #------------------------------------
 function(family_configure_example TARGET)
-  family_support_configure_common(${TARGET})
+  family_configure_common(${TARGET})
 
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
diff --git a/hw/bsp/mcx/boards/mcxn947brk/board.cmake b/hw/bsp/mcx/boards/mcxn947brk/board.cmake
index b9acf04d9..7a210628f 100644
--- a/hw/bsp/mcx/boards/mcxn947brk/board.cmake
+++ b/hw/bsp/mcx/boards/mcxn947brk/board.cmake
@@ -1,7 +1,7 @@
 set(MCU_VARIANT MCXN947)
 set(MCU_CORE MCXN947_cm33_core0)
 
-set(JLINK_DEVICE MCXN947)
+set(JLINK_DEVICE MCXN947_M33_0)
 set(PYOCD_TARGET MCXN947)
 set(NXPLINK_DEVICE MCXN947:MCXN947)
 
diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake
index 1719320e6..d5a17f584 100644
--- a/hw/bsp/mcx/family.cmake
+++ b/hw/bsp/mcx/family.cmake
@@ -7,6 +7,9 @@ endif ()
 set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
 set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
 
+# enable LTO
+set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+
 # toolchain set up
 set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
 set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
@@ -70,7 +73,7 @@ endif () # BOARD_TARGET
 # Functions
 #------------------------------------
 function(family_configure_example TARGET)
-  family_support_configure_common(${TARGET})
+  family_configure_common(${TARGET})
 
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
@@ -112,17 +115,7 @@ function(family_configure_example TARGET)
     )
 
   #---------- Flash ----------
-  # use MCUXpresso GUI Flash Tool to flash the elf
-
-#  set(REDLINK_EXE /usr/local/LinkServer/binaries/crt_emu_cm_redlink)
-#  add_custom_target(${TARGET}-redlink
-#    DEPENDS ${TARGET}
-#    COMMAND ${REDLINK_EXE} --flash-load-exec $<TARGET_FILE:${TARGET}> --vendor NXP -p MCXN947 --bootromstall
-#    0x50000040 -CoreIndex=0 --flash-driver= -x ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/flash --flash-dir
-#    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/flash --flash-hashing
-#    )
-
-  #family_flash_jlink(${TARGET})
+  family_flash_jlink(${TARGET})
   #family_flash_nxplink(${TARGET})
   #family_flash_pyocd(${TARGET})
 endfunction()
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 68b19b33b..71067c8ae 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -10,6 +10,9 @@ set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
 # include board specific
 include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 
+# enable LTO
+set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+
 # toolchain set up
 if (MCU_VARIANT STREQUAL "nrf5340_application")
   set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
@@ -77,7 +80,7 @@ endif () # BOARD_TARGET
 # Functions
 #------------------------------------
 function(family_configure_example TARGET)
-  family_support_configure_common(${TARGET})
+  family_configure_common(${TARGET})
 
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
diff --git a/tools/cmake/cpu/cortex-m33.cmake b/tools/cmake/cpu/cortex-m33.cmake
index 26c91a64f..fda277010 100644
--- a/tools/cmake/cpu/cortex-m33.cmake
+++ b/tools/cmake/cpu/cortex-m33.cmake
@@ -3,7 +3,6 @@ if (TOOLCHAIN STREQUAL "gcc")
     -mthumb
     -mcpu=cortex-m33
     -mfloat-abi=hard
-    #-mfpu=fpv5-d16
     -mfpu=fpv5-sp-d16
     )
 
diff --git a/tools/cmake/toolchain/arm_gcc.cmake b/tools/cmake/toolchain/arm_gcc.cmake
index 5f25d637b..c7f12f43a 100644
--- a/tools/cmake/toolchain/arm_gcc.cmake
+++ b/tools/cmake/toolchain/arm_gcc.cmake
@@ -4,9 +4,11 @@ set(CMAKE_ASM_COMPILER "arm-none-eabi-gcc")
 set(CMAKE_C_COMPILER "arm-none-eabi-gcc")
 set(CMAKE_CXX_COMPILER "arm-none-eabi-g++")
 
-set(TOOLCHAIN_SIZE "arm-none-eabi-size" CACHE INTERNAL "")
-set(GCC_ELF2BIN "arm-none-eabi-objcopy")
-set_property(GLOBAL PROPERTY ELF2BIN ${GCC_ELF2BIN})
+set(CMAKE_SIZE "arm-none-eabi-size" CACHE FILEPATH "")
+set(CMAKE_OBJCOPY "arm-none-eabi-objcopy" CACHE FILEPATH "")
+set(CMAKE_OBJDUMP "arm-none-eabi-objdump" CACHE FILEPATH "")
+
+set_property(GLOBAL PROPERTY TARGET_SUPPORTS_SHARED_LIBS FALSE)
 
 # Look for includes and libraries only in the target system prefix.
 set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
diff --git a/tools/cmake/toolchain/set_flags.cmake b/tools/cmake/toolchain/set_flags.cmake
index 3f109b59e..6f74fe673 100644
--- a/tools/cmake/toolchain/set_flags.cmake
+++ b/tools/cmake/toolchain/set_flags.cmake
@@ -1,16 +1,16 @@
 include(CMakePrintHelpers)
-foreach(LANG IN ITEMS C CXX ASM)
-    # join the toolchain flags into a single string
-    list(APPEND TOOLCHAIN_${LANG}_FLAGS ${TOOLCHAIN_COMMON_FLAGS})
-    list(JOIN TOOLCHAIN_${LANG}_FLAGS " " TOOLCHAIN_${LANG}_FLAGS)
-    set(CMAKE_${LANG}_FLAGS_INIT "${TOOLCHAIN_${LANG}_FLAGS}")
+foreach (LANG IN ITEMS C CXX ASM)
+  # join the toolchain flags into a single string
+  list(APPEND TOOLCHAIN_${LANG}_FLAGS ${TOOLCHAIN_COMMON_FLAGS})
+  list(JOIN TOOLCHAIN_${LANG}_FLAGS " " TOOLCHAIN_${LANG}_FLAGS)
+  set(CMAKE_${LANG}_FLAGS_INIT "${TOOLCHAIN_${LANG}_FLAGS}")
 
-    #cmake_print_variables(CMAKE_${LANG}_FLAGS_INIT)
+  #cmake_print_variables(CMAKE_${LANG}_FLAGS_INIT)
 
-    # optimization flags
-    set(CMAKE_${LANG}_FLAGS_RELEASE_INIT "-Os")
-    set(CMAKE_${LANG}_FLAGS_DEBUG_INIT "-O0")
-endforeach()
+  # optimization flags for LOG, LOGGER ?
+  #set(CMAKE_${LANG}_FLAGS_RELEASE_INIT "-Os")
+  #set(CMAKE_${LANG}_FLAGS_DEBUG_INIT "-O0")
+endforeach ()
 
 # Linker
 list(JOIN TOOLCHAIN_EXE_LINKER_FLAGS " " CMAKE_EXE_LINKER_FLAGS_INIT)
@@ -18,7 +18,7 @@ list(JOIN TOOLCHAIN_EXE_LINKER_FLAGS " " CMAKE_EXE_LINKER_FLAGS_INIT)
 # try_compile is cmake test compiling its own example,
 # pass -nostdlib to skip stdlib linking
 get_property(IS_IN_TRY_COMPILE GLOBAL PROPERTY IN_TRY_COMPILE)
-if(IS_IN_TRY_COMPILE)
-    set(CMAKE_C_LINK_FLAGS "${CMAKE_C_LINK_FLAGS} -nostdlib")
-    set(CMAKE_CXX_LINK_FLAGS "${CMAKE_CXX_LINK_FLAGS} -nostdlib")
-endif()
+if (IS_IN_TRY_COMPILE)
+  set(CMAKE_C_LINK_FLAGS "${CMAKE_C_LINK_FLAGS} -nostdlib")
+  set(CMAKE_CXX_LINK_FLAGS "${CMAKE_CXX_LINK_FLAGS} -nostdlib")
+endif ()

From 62b2d05d34b3ecca08e531709b4a7f809c108047 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 1 Jun 2023 12:50:32 +0700
Subject: [PATCH 368/691] skip set CMAKE_EXECUTABLE_SUFFIX for espressif port

---
 hw/bsp/family_support.cmake | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index e3f2f45ff..69290ceec 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -84,8 +84,10 @@ endfunction()
 
 
 function(family_initialize_project PROJECT DIR)
-  # set output suffix to .elf
-  set(CMAKE_EXECUTABLE_SUFFIX .elf PARENT_SCOPE)
+  # set output suffix to .elf (skip espressif)
+  if(NOT FAMILY STREQUAL "espressif")
+    set(CMAKE_EXECUTABLE_SUFFIX .elf PARENT_SCOPE)
+  endif()
 
   family_filter(ALLOWED "${DIR}")
   if (NOT ALLOWED)

From 6b44d8fb55345e19fd82a6169258fbf357a15f81 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 1 Jun 2023 15:58:02 +0700
Subject: [PATCH 369/691] add cmake support for g0, exlicitly call HAL_Init()
 and also HAL_IncTick() in systick irq, fix button active state.

---
 hw/bsp/lpc18/family.cmake                     |   5 -
 .../boards/stm32g0b1nucleo/board.cmake        |  15 ++
 hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h |  15 +-
 hw/bsp/stm32g0/family.c                       |   2 +
 hw/bsp/stm32g0/family.cmake                   | 137 ++++++++++++++++++
 tools/cmake/cpu/cortex-m0plus.cmake           |  11 ++
 6 files changed, 169 insertions(+), 16 deletions(-)
 create mode 100644 hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake
 create mode 100644 hw/bsp/stm32g0/family.cmake
 create mode 100644 tools/cmake/cpu/cortex-m0plus.cmake

diff --git a/hw/bsp/lpc18/family.cmake b/hw/bsp/lpc18/family.cmake
index 1bfc63d21..515348e10 100644
--- a/hw/bsp/lpc18/family.cmake
+++ b/hw/bsp/lpc18/family.cmake
@@ -46,14 +46,9 @@ if (NOT TARGET ${BOARD_TARGET})
     )
   update_board(${BOARD_TARGET})
 
-  if (NOT DEFINED LD_FILE_${TOOLCHAIN})
-    MESSAGE(FATAL_ERROR "LD_FILE_${TOOLCHAIN} not defined")
-  endif ()
-
   if (TOOLCHAIN STREQUAL "gcc")
     target_link_options(${BOARD_TARGET} PUBLIC
       "LINKER:--script=${LD_FILE_gcc}"
-      "LINKER:-Map=$<IF:$<BOOL:$<TARGET_PROPERTY:OUTPUT_NAME>>,$<TARGET_PROPERTY:OUTPUT_NAME>,$<TARGET_PROPERTY:NAME>>${CMAKE_EXECUTABLE_SUFFIX}.map"
       # nanolib
       --specs=nosys.specs
       --specs=nano.specs
diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake
new file mode 100644
index 000000000..c9f2a9c8e
--- /dev/null
+++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake
@@ -0,0 +1,15 @@
+#set(MCU_VARIANT MIMXRT1011)
+set(JLINK_DEVICE STM32G0B1RE)
+
+set(LD_FILE_gcc ${CMAKE_CURRENT_LIST_DIR}/STM32G0B1RETx_FLASH.ld)
+set(LD_FILE_iar ${ST_CMSIS}/Source/Templates/iar/linker/stm32g0b1xx_flash.icf)
+
+set(STARTUP_FILE_gcc ${ST_CMSIS}/Source/Templates/gcc/startup_stm32g0b1xx.s)
+set(STARTUP_FILE_iar ${ST_CMSIS}/Source/Templates/iar/startup_stm32g0b1xx.s)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32G0B1xx
+    #HSE_VALUE=8000000U
+    )
+endfunction()
diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
index 0d651ea4e..e622c71c2 100644
--- a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
+++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
@@ -44,7 +44,7 @@
 // Button
 #define BUTTON_PORT           GPIOC
 #define BUTTON_PIN            GPIO_PIN_13
-#define BUTTON_STATE_ACTIVE   1
+#define BUTTON_STATE_ACTIVE   0
 
 // UART Enable for STLink VCOM
 #define UART_DEV              USART2
@@ -64,17 +64,11 @@ static inline void board_clock_init(void)
   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
   RCC_PeriphCLKInitTypeDef  PeriphClkInitStruct = { 0 };
 
-  /** Tick priority is used in HAL_RCC_OscConfig, so we need to enable it now
-  */
-  HAL_InitTick(0);
-
-  /** Configure the main internal regulator output voltage
-  */
+  /** Configure the main internal regulator output voltage */
   HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
 
   /** Initializes the RCC Oscillators according to the specified parameters
-  * in the RCC_OscInitTypeDef structure.
-  */
+  * in the RCC_OscInitTypeDef structure. */
   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
   RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
@@ -91,8 +85,7 @@ static inline void board_clock_init(void)
   PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
   HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
 
-  /** Initializes the CPU, AHB and APB buses clocks
-  */
+  /** Initializes the CPU, AHB and APB buses clocks */
   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
                               |RCC_CLOCKTYPE_PCLK1;
   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
diff --git a/hw/bsp/stm32g0/family.c b/hw/bsp/stm32g0/family.c
index 10023b7e2..1a975915f 100644
--- a/hw/bsp/stm32g0/family.c
+++ b/hw/bsp/stm32g0/family.c
@@ -44,6 +44,7 @@ UART_HandleTypeDef UartHandle;
 
 void board_init(void)
 {
+  HAL_Init(); // required for HAL_RCC_Osc TODO check with freeRTOS
   board_clock_init();
 
   // Enable All GPIOs clocks
@@ -162,6 +163,7 @@ volatile uint32_t system_ticks = 0;
 void SysTick_Handler (void)
 {
   system_ticks++;
+  HAL_IncTick();
 }
 
 uint32_t board_millis(void)
diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake
new file mode 100644
index 000000000..5fc9387e5
--- /dev/null
+++ b/hw/bsp/stm32g0/family.cmake
@@ -0,0 +1,137 @@
+include_guard()
+
+if (NOT BOARD)
+  message(FATAL_ERROR "BOARD not specified")
+endif ()
+
+set(ST_FAMILY g0)
+set(ST_PREFIX stm32${ST_FAMILY}xx)
+
+set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver)
+set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY})
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# enable LTO
+#set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m0plus CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS STM32G0 CACHE INTERNAL "")
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+set(BOARD_TARGET board_${BOARD})
+if (NOT TARGET ${BOARD_TARGET})
+  add_library(${BOARD_TARGET} STATIC
+    ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMAKE_CURRENT_LIST_DIR}
+    ${CMSIS_5}/CMSIS/Core/Include
+    ${ST_CMSIS}/Include
+    ${ST_HAL_DRIVER}/Inc
+    )
+  target_compile_options(${BOARD_TARGET} PUBLIC
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    )
+  update_board(${BOARD_TARGET})
+
+  target_sources(${BOARD_TARGET} PUBLIC
+    ${STARTUP_FILE_${TOOLCHAIN}}
+    )
+
+  if (TOOLCHAIN STREQUAL "gcc")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_gcc}"
+      -nostartfiles
+      # nanolib
+      --specs=nosys.specs
+      --specs=nano.specs
+      )
+  else ()
+    # TODO support IAR
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_iar}"
+      )
+  endif ()
+endif () # BOARD_TARGET
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET)
+  family_configure_common(${TARGET})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # TinyUSB Port
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  #---------- TinyUSB ----------
+  # tinyusb target is built for each example since it depends on example's tusb_config.h
+  set(TINYUSB_TARGET_PREFIX ${TARGET}-)
+  add_library(${TARGET}-tinyusb_config INTERFACE)
+
+  target_include_directories(${TARGET}-tinyusb_config INTERFACE
+    ${CMAKE_CURRENT_SOURCE_DIR}/src
+    )
+  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
+    CFG_TUSB_MCU=OPT_MCU_STM32G0
+    )
+
+  # tinyusb's CMakeList.txt
+  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
+
+  # group target (not yet supported by clion)
+  set_target_properties(${TARGET}-tinyusb ${TARGET}-tinyusb_config
+    PROPERTIES FOLDER ${TARGET}_sub
+    )
+
+  #---------- Flash ----------
+  family_flash_jlink(${TARGET})
+endfunction()
+
+
+function(family_configure_device_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
+
+function(family_configure_host_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
+
+function(family_configure_dual_usb_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
diff --git a/tools/cmake/cpu/cortex-m0plus.cmake b/tools/cmake/cpu/cortex-m0plus.cmake
new file mode 100644
index 000000000..1e316ccfc
--- /dev/null
+++ b/tools/cmake/cpu/cortex-m0plus.cmake
@@ -0,0 +1,11 @@
+if (TOOLCHAIN STREQUAL "gcc")
+  list(APPEND TOOLCHAIN_COMMON_FLAGS
+    -mthumb
+    -mcpu=cortex-m0plus
+    -mfloat-abi=soft
+    )
+
+  set(FREERTOS_PORT GCC_ARM_CM0 CACHE INTERNAL "")
+else ()
+  # TODO support IAR
+endif ()

From 6280cba6e8fb62492d8d07288c914b822b934cd5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 1 Jun 2023 16:52:58 +0700
Subject: [PATCH 370/691] tested with g0b1 nucleo

---
 hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h | 58 ++++++++++++++++++-
 1 file changed, 57 insertions(+), 1 deletion(-)

diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
index e622c71c2..44c69934d 100644
--- a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
+++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
@@ -58,6 +58,62 @@
 //--------------------------------------------------------------------+
 // RCC Clock
 //--------------------------------------------------------------------+
+#if 1
+static inline void board_clock_init(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure. */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
+  RCC_OscInitStruct.PLL.PLLN = 8;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+  /** Initializes the CPU, AHB and APB buses clocks */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
+
+  // Configure CRS clock source
+  __HAL_RCC_CRS_CLK_ENABLE();
+  RCC_CRSInitTypeDef RCC_CRSInitStruct = {0};
+  RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
+  RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
+  RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
+  RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000,1000);
+  RCC_CRSInitStruct.ErrorLimitValue = 34;
+  RCC_CRSInitStruct.HSI48CalibrationValue = 32;
+
+  HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
+
+  /* Select HSI48 as USB clock source */
+  RCC_PeriphCLKInitTypeDef usb_clk = {0 };
+  usb_clk.PeriphClockSelection = RCC_PERIPHCLK_USB;
+  usb_clk.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
+  HAL_RCCEx_PeriphCLKConfig(&usb_clk);
+
+  // Enable HSI48
+  RCC_OscInitTypeDef osc_hsi48 = {0};
+  osc_hsi48.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
+  osc_hsi48.HSI48State = RCC_HSI48_ON;
+  HAL_RCC_OscConfig(&osc_hsi48);
+}
+#else
 static inline void board_clock_init(void)
 {
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
@@ -93,8 +149,8 @@ static inline void board_clock_init(void)
   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
 
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
-
 }
+#endif
 
 #ifdef __cplusplus
  }

From c750030f7a9b3076b3722172014604ff5190df91 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 1 Jun 2023 17:03:04 +0700
Subject: [PATCH 371/691] add freertosconfig for g0, add cmake stlink, add g0
 to cmake ci

---
 .github/workflows/cmake_arm.yml               |   1 +
 hw/bsp/family_support.cmake                   |  13 ++
 .../stm32g0/FreeRTOSConfig/FreeRTOSConfig.h   | 166 ++++++++++++++++++
 hw/bsp/stm32g0/family.cmake                   |   1 +
 4 files changed, 181 insertions(+)
 create mode 100644 hw/bsp/stm32g0/FreeRTOSConfig/FreeRTOSConfig.h

diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index ccca0c9be..2e74c304c 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -37,6 +37,7 @@ jobs:
           - 'mcx'
           - 'imxrt'
           - 'rp2040'
+          - 'stm32g0'
     steps:
     - name: Setup Python
       uses: actions/setup-python@v4
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 69290ceec..d9b8bbbe9 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -189,6 +189,19 @@ exit"
 endfunction()
 
 
+# Add flash stlink target
+function(family_flash_stlink TARGET)
+  if (NOT DEFINED STM32_PROGRAMMER_CLI)
+    set(STM32_PROGRAMMER_CLI STM32_Programmer_CLI)
+  endif ()
+
+  add_custom_target(${TARGET}-stlink
+    DEPENDS ${TARGET}
+    COMMAND ${STM32_PROGRAMMER_CLI} --connect port=swd --write $<TARGET_FILE:${TARGET}> --go
+    )
+endfunction()
+
+
 # Add flash pycod target
 function(family_flash_pyocd TARGET)
   if (NOT DEFINED PYOC)
diff --git a/hw/bsp/stm32g0/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32g0/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..1758efcf2
--- /dev/null
+++ b/hw/bsp/stm32g0/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,166 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// IAR assembler have limited preprocessor support and it only need following macros:
+#ifndef __IASMARM__
+// FIXME cause redundant-decls warnings
+extern uint32_t SystemCoreClock;
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU						0
+#define configENABLE_FPU						0
+#define configENABLE_TRUSTZONE					0
+#define configMINIMAL_SECURE_STACK_SIZE			(1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               2
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       2
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake
index 5fc9387e5..ddd39bc3b 100644
--- a/hw/bsp/stm32g0/family.cmake
+++ b/hw/bsp/stm32g0/family.cmake
@@ -120,6 +120,7 @@ function(family_configure_example TARGET)
     )
 
   #---------- Flash ----------
+  family_flash_stlink(${TARGET})
   family_flash_jlink(${TARGET})
 endfunction()
 

From dc3afdbf3b0520caa4a8147c08219486672a6832 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 1 Jun 2023 20:52:48 +0700
Subject: [PATCH 372/691] add note for B0 clock variant

---
 hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h | 4 ++++
 hw/bsp/stm32g0/family.cmake                   | 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
index 44c69934d..ae0820529 100644
--- a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
+++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
@@ -59,6 +59,7 @@
 // RCC Clock
 //--------------------------------------------------------------------+
 #if 1
+// Clock configure for STM32G0B1RE Nucleo
 static inline void board_clock_init(void)
 {
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
@@ -114,6 +115,9 @@ static inline void board_clock_init(void)
   HAL_RCC_OscConfig(&osc_hsi48);
 }
 #else
+
+// Clock configure for STM32G0 nucleo with B0 mcu variant for someone that is skilled enough
+// to rework and solder the B0 chip. Note: SB17 may need to be soldered as well (check user manual)
 static inline void board_clock_init(void)
 {
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake
index ddd39bc3b..9674bc759 100644
--- a/hw/bsp/stm32g0/family.cmake
+++ b/hw/bsp/stm32g0/family.cmake
@@ -121,7 +121,7 @@ function(family_configure_example TARGET)
 
   #---------- Flash ----------
   family_flash_stlink(${TARGET})
-  family_flash_jlink(${TARGET})
+  #family_flash_jlink(${TARGET})
 endfunction()
 
 

From 70a92291fe84eb57844a331749ceecb6d2f1f544 Mon Sep 17 00:00:00 2001
From: Dave Nadler <drn@nadler.com>
Date: Thu, 1 Jun 2023 10:58:03 -0400
Subject: [PATCH 373/691] Fix diagnostic format string (missing %u)

---
 src/host/usbh.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/host/usbh.c b/src/host/usbh.c
index 7b265c742..6159044ab 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -1179,7 +1179,7 @@ static void process_removing_device(uint8_t rhport, uint8_t hub_addr, uint8_t hu
       TU_LOG_USBH("Device unplugged address = %u\r\n", daddr);
 
       if (is_hub_addr(daddr)) {
-        TU_LOG(USBH_DEBUG, "  is a HUB device\r\n", daddr);
+        TU_LOG(USBH_DEBUG, "  is a HUB device %u\r\n", daddr);
 
         // Submit removed event If the device itself is a hub (un-rolled recursive)
         // TODO a better to unroll recursrive is using array of removing_hubs and mark it here

From c3bde520cc0b93098fbf3a5d85b9343a2cfa6c3d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 1 Jun 2023 22:03:54 +0700
Subject: [PATCH 374/691] add new b_g474e_dpow1 board

---
 .idea/cmake.xml                               |   5 +-
 .idea/runConfigurations/rp2040.xml            |   2 +-
 .../b_g474e_dpow1/STM32G474RETx_FLASH.ld      | 200 ++++++++++++++++++
 .../stm32g4/boards/b_g474e_dpow1/board.cmake  |  14 ++
 hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h   | 134 ++++++++++++
 hw/bsp/stm32g4/boards/b_g474e_dpow1/board.mk  |  13 ++
 .../stm32g474nucleo/STM32G474RETx_FLASH.ld    |  68 +++---
 .../boards/stm32g474nucleo/board.cmake        |  15 ++
 hw/bsp/stm32g4/family.c                       |   1 +
 hw/bsp/stm32g4/family.cmake                   | 138 ++++++++++++
 10 files changed, 560 insertions(+), 30 deletions(-)
 create mode 100644 hw/bsp/stm32g4/boards/b_g474e_dpow1/STM32G474RETx_FLASH.ld
 create mode 100644 hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake
 create mode 100644 hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
 create mode 100644 hw/bsp/stm32g4/boards/b_g474e_dpow1/board.mk
 create mode 100644 hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake
 create mode 100644 hw/bsp/stm32g4/family.cmake

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index a80ebed3c..871968dfb 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -2,7 +2,7 @@
 <project version="4">
   <component name="CMakeSharedSettings">
     <configurations>
-      <configuration PROFILE_NAME="mcxn947" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=mcx -DBOARD=mcxn947brk" />
+      <configuration PROFILE_NAME="mcxn947" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=mcx -DBOARD=mcxn947brk" />
       <configuration PROFILE_NAME="rt1060 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1060_evk" />
       <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10095" />
       <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10056" BUILD_OPTIONS="-v" />
@@ -32,6 +32,9 @@
       <configuration PROFILE_NAME="rt1064 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1064_evk" />
       <configuration PROFILE_NAME="mcb1800" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc18 -DBOARD=mcb1800" />
       <configuration PROFILE_NAME="lpcxpresso18s37" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc18 -DBOARD=lpcxpresso18s37" />
+      <configuration PROFILE_NAME="stm32g0b1nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g0 -DBOARD=stm32g0b1nucleo" />
+      <configuration PROFILE_NAME="stm32g474nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g4 -DBOARD=stm32g474nucleo" />
+      <configuration PROFILE_NAME="b_g474e_dpow1" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g4 -DBOARD=b_g474e_dpow1" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/.idea/runConfigurations/rp2040.xml b/.idea/runConfigurations/rp2040.xml
index 227a5e2bc..0d1484b25 100644
--- a/.idea/runConfigurations/rp2040.xml
+++ b/.idea/runConfigurations/rp2040.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rp2040" type="com.jetbrains.cidr.embedded.openocd.conf.type" factoryName="com.jetbrains.cidr.embedded.openocd.conf.factory" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc_hid" TARGET_NAME="cdc_msc_hid" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc_hid" RUN_TARGET_NAME="cdc_msc_hid">
+  <configuration default="false" name="rp2040" type="com.jetbrains.cidr.embedded.openocd.conf.type" factoryName="com.jetbrains.cidr.embedded.openocd.conf.factory" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_device_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="b_g474e_dpow1" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_device_examples" RUN_TARGET_NAME="cdc_msc">
     <openocd version="1" gdb-port="3333" telnet-port="4444" board-config="$PROJECT_DIR$/hw/bsp/rp2040/rp2040-openocd.cfg" reset-type="INIT" download-type="UPDATED_ONLY">
       <debugger kind="GDB" isBundled="true" />
     </openocd>
diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/STM32G474RETx_FLASH.ld b/hw/bsp/stm32g4/boards/b_g474e_dpow1/STM32G474RETx_FLASH.ld
new file mode 100644
index 000000000..8ba23a5b8
--- /dev/null
+++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/STM32G474RETx_FLASH.ld
@@ -0,0 +1,200 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author		: Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32G474RETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x1000 ;	/* required amount of heap  */
+_Min_Stack_Size = 0x1000 ;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab   : {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM : {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array     :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  .init_array :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  .fini_array :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake
new file mode 100644
index 000000000..4e8f3f059
--- /dev/null
+++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake
@@ -0,0 +1,14 @@
+set(MCU_VARIANT stm32g474xx)
+set(JLINK_DEVICE stm32g474re)
+
+set(LD_FILE_gcc ${CMAKE_CURRENT_LIST_DIR}/STM32G474RETx_FLASH.ld)
+set(LD_FILE_iar ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+
+set(STARTUP_FILE_gcc ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_iar ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32G474xx
+    )
+endfunction()
diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
new file mode 100644
index 000000000..dcbc0163e
--- /dev/null
+++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
@@ -0,0 +1,134 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// G474RE Nucleo does not has usb connection. We need to manually connect
+// - PA12 for D+, CN10.12
+// - PA11 for D-, CN10.14
+
+// LED
+#define LED_PORT              GPIOB
+#define LED_PIN               GPIO_PIN_5
+#define LED_STATE_ON          0
+
+// Button
+#define BUTTON_PORT           GPIOC
+#define BUTTON_PIN            GPIO_PIN_13
+#define BUTTON_STATE_ACTIVE   0
+
+// UART Enable for STLink VCOM
+#define UART_DEV              USART3
+#define UART_CLK_EN           __HAL_RCC_USART3_CLK_ENABLE
+#define UART_GPIO_PORT        GPIOC
+#define UART_GPIO_AF          GPIO_AF7_USART3
+#define UART_TX_PIN           GPIO_PIN_10
+#define UART_RX_PIN           GPIO_PIN_11
+
+
+//--------------------------------------------------------------------+
+// RCC Clock
+//--------------------------------------------------------------------+
+static inline void board_clock_init(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+
+  // Configure the main internal regulator output voltage
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+  // Initializes the CPU, AHB and APB buses clocks
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState       = RCC_HSE_ON;
+  RCC_OscInitStruct.HSI48State     = RCC_HSI48_ON;
+  RCC_OscInitStruct.PLL.PLLState   = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource  = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM       = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN       = 50;
+  RCC_OscInitStruct.PLL.PLLP       = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ       = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR       = RCC_PLLR_DIV2;
+  HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+  // Initializes the CPU, AHB and APB buses clocks
+  RCC_ClkInitStruct.ClockType      = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_8);
+
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
+  PeriphClkInit.UsbClockSelection    = RCC_USBCLKSOURCE_HSI48;
+  HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) ;
+
+#if 0 // TODO need to check if USB clock is enabled
+  /* Enable HSI48 */
+  memset(&RCC_OscInitStruct, 0, sizeof(RCC_OscInitStruct));
+
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
+  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+  HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+  /*Enable CRS Clock*/
+  RCC_CRSInitTypeDef RCC_CRSInitStruct= {0};
+  __HAL_RCC_CRS_CLK_ENABLE();
+
+  /* Default Synchro Signal division factor (not divided) */
+  RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
+
+  /* Set the SYNCSRC[1:0] bits according to CRS_Source value */
+  RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
+
+  /* HSI48 is synchronized with USB SOF at 1KHz rate */
+  RCC_CRSInitStruct.ReloadValue =  __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000);
+  RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT;
+
+  /* Set the TRIM[5:0] to the default value */
+  RCC_CRSInitStruct.HSI48CalibrationValue = RCC_CRS_HSI48CALIBRATION_DEFAULT;
+
+  /* Start automatic synchronization */
+  HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
+#endif
+}
+
+static inline void board_vbus_sense_init(void)
+{
+  // Enable VBUS sense (B device) via pin PA9
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.mk b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.mk
new file mode 100644
index 000000000..75cd9d8f5
--- /dev/null
+++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.mk
@@ -0,0 +1,13 @@
+CFLAGS += \
+	-DSTM32G474xx \
+
+# GCC
+GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32g474xx.s
+GCC_LD_FILE = $(BOARD_PATH)/STM32G474RETx_FLASH.ld
+
+# IAR
+IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32g474xx.s
+IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32g474xx_flash.icf
+
+# For flash-jlink target
+JLINK_DEVICE = stm32g474re
diff --git a/hw/bsp/stm32g4/boards/stm32g474nucleo/STM32G474RETx_FLASH.ld b/hw/bsp/stm32g4/boards/stm32g474nucleo/STM32G474RETx_FLASH.ld
index c43829994..8ba23a5b8 100644
--- a/hw/bsp/stm32g4/boards/stm32g474nucleo/STM32G474RETx_FLASH.ld
+++ b/hw/bsp/stm32g4/boards/stm32g474nucleo/STM32G474RETx_FLASH.ld
@@ -1,13 +1,13 @@
 /*
 ******************************************************************************
 **
-
 **  File        : LinkerScript.ld
 **
-**  Author		: Auto-generated by Ac6 System Workbench
+**  Author		: Auto-generated by STM32CubeIDE
 **
-**  Abstract    : Linker script for STM32G474RETx series
-**                512Kbytes FLASH and 160Kbytes RAM
+**  Abstract    : Linker script for STM32G474RETx Device from stm32g4 series
+**                      512Kbytes FLASH
+**                      128Kbytes RAM
 **
 **                Set heap size, stack size and stack location according
 **                to application requirements.
@@ -16,13 +16,13 @@
 **
 **  Target      : STMicroelectronics STM32
 **
-**  Distribution: The file is distributed �as is,� without any warranty
+**  Distribution: The file is distributed as is without any warranty
 **                of any kind.
 **
 *****************************************************************************
 ** @attention
 **
-** <h2><center>&copy; COPYRIGHT(c) 2014 Ac6</center></h2>
+** <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
 **
 ** Redistribution and use in source and binary forms, with or without modification,
 ** are permitted provided that the following conditions are met:
@@ -31,7 +31,7 @@
 **   2. Redistributions in binary form must reproduce the above copyright notice,
 **      this list of conditions and the following disclaimer in the documentation
 **      and/or other materials provided with the distribution.
-**   3. Neither the name of Ac6 nor the names of its contributors
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
 **      may be used to endorse or promote products derived from this software
 **      without specific prior written permission.
 **
@@ -53,23 +53,22 @@
 ENTRY(Reset_Handler)
 
 /* Highest address of the user mode stack */
-_estack = 0x20020000;    /* end of RAM */
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200;      /* required amount of heap  */
-_Min_Stack_Size = 0x400; /* required amount of stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
 
-/* Specify the memory areas */
+_Min_Heap_Size = 0x1000 ;	/* required amount of heap  */
+_Min_Stack_Size = 0x1000 ;	/* required amount of stack */
+
+/* Memories definition */
 MEMORY
 {
-FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 512K
-RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 128K
-CCMSRAM (xrw)      : ORIGIN = 0x10000000, LENGTH = 32K
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
 }
 
-/* Define output sections */
+/* Sections */
 SECTIONS
 {
-  /* The startup code goes first into FLASH */
+  /* The startup code into "FLASH" Rom type memory */
   .isr_vector :
   {
     . = ALIGN(4);
@@ -77,7 +76,7 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  /* The program code and other data goes into FLASH */
+  /* The program code and other data into "FLASH" Rom type memory */
   .text :
   {
     . = ALIGN(4);
@@ -94,7 +93,7 @@ SECTIONS
     _etext = .;        /* define a global symbols at end of code */
   } >FLASH
 
-  /* Constant data goes into FLASH */
+  /* Constant data into "FLASH" Rom type memory */
   .rodata :
   {
     . = ALIGN(4);
@@ -103,38 +102,53 @@ SECTIONS
     . = ALIGN(4);
   } >FLASH
 
-  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+  .ARM.extab   : {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+
   .ARM : {
+    . = ALIGN(4);
     __exidx_start = .;
     *(.ARM.exidx*)
     __exidx_end = .;
+    . = ALIGN(4);
   } >FLASH
 
   .preinit_array     :
   {
+    . = ALIGN(4);
     PROVIDE_HIDDEN (__preinit_array_start = .);
     KEEP (*(.preinit_array*))
     PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
   } >FLASH
+
   .init_array :
   {
+    . = ALIGN(4);
     PROVIDE_HIDDEN (__init_array_start = .);
     KEEP (*(SORT(.init_array.*)))
     KEEP (*(.init_array*))
     PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
   } >FLASH
+
   .fini_array :
   {
+    . = ALIGN(4);
     PROVIDE_HIDDEN (__fini_array_start = .);
     KEEP (*(SORT(.fini_array.*)))
     KEEP (*(.fini_array*))
     PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
   } >FLASH
 
-  /* used by the startup to initialize data */
+  /* Used by the startup to initialize data */
   _sidata = LOADADDR(.data);
 
-  /* Initialized data sections goes into RAM, load LMA copy after code */
+  /* Initialized data sections into "RAM" Ram type memory */
   .data :
   {
     . = ALIGN(4);
@@ -144,10 +158,10 @@ SECTIONS
 
     . = ALIGN(4);
     _edata = .;        /* define a global symbol at data end */
+
   } >RAM AT> FLASH
 
-
-  /* Uninitialized data section */
+  /* Uninitialized data section into "RAM" Ram type memory */
   . = ALIGN(4);
   .bss :
   {
@@ -163,7 +177,7 @@ SECTIONS
     __bss_end__ = _ebss;
   } >RAM
 
-  /* User_heap_stack section, used to check that there is enough RAM left */
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
   ._user_heap_stack :
   {
     . = ALIGN(8);
@@ -174,9 +188,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-
-
-  /* Remove information from the standard libraries */
+  /* Remove information from the compiler libraries */
   /DISCARD/ :
   {
     libc.a ( * )
diff --git a/hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake b/hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake
new file mode 100644
index 000000000..8cc633449
--- /dev/null
+++ b/hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake
@@ -0,0 +1,15 @@
+set(MCU_VARIANT stm32g474xx)
+set(JLINK_DEVICE stm32g474re)
+
+set(LD_FILE_gcc ${CMAKE_CURRENT_LIST_DIR}/STM32G474RETx_FLASH.ld)
+set(LD_FILE_iar ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+
+set(STARTUP_FILE_gcc ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_iar ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32G474xx
+    HSE_VALUE=24000000
+    )
+endfunction()
diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c
index f5177fd10..3b490e9b3 100644
--- a/hw/bsp/stm32g4/family.c
+++ b/hw/bsp/stm32g4/family.c
@@ -53,6 +53,7 @@ UART_HandleTypeDef UartHandle;
 
 void board_init(void)
 {
+  HAL_Init();
   board_clock_init();
 
   // Enable All GPIOs clocks
diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake
new file mode 100644
index 000000000..1de6fd674
--- /dev/null
+++ b/hw/bsp/stm32g4/family.cmake
@@ -0,0 +1,138 @@
+include_guard()
+
+if (NOT BOARD)
+  message(FATAL_ERROR "BOARD not specified")
+endif ()
+
+set(ST_FAMILY g4)
+set(ST_PREFIX stm32${ST_FAMILY}xx)
+
+set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver)
+set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY})
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# enable LTO
+#set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS STM32G4 CACHE INTERNAL "")
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+set(BOARD_TARGET board_${BOARD})
+if (NOT TARGET ${BOARD_TARGET})
+  add_library(${BOARD_TARGET} STATIC
+    ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMAKE_CURRENT_LIST_DIR}
+    ${CMSIS_5}/CMSIS/Core/Include
+    ${ST_CMSIS}/Include
+    ${ST_HAL_DRIVER}/Inc
+    )
+  target_compile_options(${BOARD_TARGET} PUBLIC
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    )
+  update_board(${BOARD_TARGET})
+
+  target_sources(${BOARD_TARGET} PUBLIC
+    ${STARTUP_FILE_${TOOLCHAIN}}
+    )
+
+  if (TOOLCHAIN STREQUAL "gcc")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_gcc}"
+      -nostartfiles
+      # nanolib
+      --specs=nosys.specs
+      --specs=nano.specs
+      )
+  else ()
+    # TODO support IAR
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_iar}"
+      )
+  endif ()
+endif () # BOARD_TARGET
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET)
+  family_configure_common(${TARGET})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # TinyUSB Port
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  #---------- TinyUSB ----------
+  # tinyusb target is built for each example since it depends on example's tusb_config.h
+  set(TINYUSB_TARGET_PREFIX ${TARGET}-)
+  add_library(${TARGET}-tinyusb_config INTERFACE)
+
+  target_include_directories(${TARGET}-tinyusb_config INTERFACE
+    ${CMAKE_CURRENT_SOURCE_DIR}/src
+    )
+  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
+    CFG_TUSB_MCU=OPT_MCU_STM32G4
+    )
+
+  # tinyusb's CMakeList.txt
+  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
+
+  # group target (not yet supported by clion)
+  set_target_properties(${TARGET}-tinyusb ${TARGET}-tinyusb_config
+    PROPERTIES FOLDER ${TARGET}_sub
+    )
+
+  #---------- Flash ----------
+  family_flash_stlink(${TARGET})
+  #family_flash_jlink(${TARGET})
+endfunction()
+
+
+function(family_configure_device_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
+
+function(family_configure_host_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
+
+function(family_configure_dual_usb_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()

From e8b7f21af6e5e994ece7c989202767732f23809e Mon Sep 17 00:00:00 2001
From: Dave Nadler <drn@nadler.com>
Date: Thu, 1 Jun 2023 12:57:44 -0400
Subject: [PATCH 375/691] For FreeRTOS kernel-aware debugging, when queue
 registry is enabled, label tinyUSB queue

---
 src/osal/osal_freertos.h | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h
index 477f64892..0b1b11589 100644
--- a/src/osal/osal_freertos.h
+++ b/src/osal/osal_freertos.h
@@ -169,11 +169,16 @@ TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hd
 
 TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef)
 {
-#if configSUPPORT_STATIC_ALLOCATION
-	return xQueueCreateStatic(qdef->depth, qdef->item_sz, (uint8_t*) qdef->buf, &qdef->sq);
-#else
-  return xQueueCreate(qdef->depth, qdef->item_sz);
-#endif
+  osal_queue_t q;
+  #if configSUPPORT_STATIC_ALLOCATION
+    q = xQueueCreateStatic(qdef->depth, qdef->item_sz, (uint8_t*) qdef->buf, &qdef->sq);
+  #else
+    q = xQueueCreate(qdef->depth, qdef->item_sz);
+  #endif
+  #if defined(configQUEUE_REGISTRY_SIZE) && (configQUEUE_REGISTRY_SIZE>0)
+    vQueueAddToRegistry(q, "tinyUSB");
+  #endif
+  return q;
 }
 
 TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, void* data, uint32_t msec)

From ba3d71b615df1ba8dd5f8e4858a182620ef1472b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 2 Jun 2023 10:19:46 +0700
Subject: [PATCH 376/691] fix usb clock for dpow1

---
 hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h | 50 ++++++++++-----------
 1 file changed, 24 insertions(+), 26 deletions(-)

diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
index dcbc0163e..5d936d009 100644
--- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
+++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
@@ -61,44 +61,38 @@ static inline void board_clock_init(void)
 {
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 
   // Configure the main internal regulator output voltage
   HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
 
-  // Initializes the CPU, AHB and APB buses clocks
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE;
-  RCC_OscInitStruct.HSEState       = RCC_HSE_ON;
-  RCC_OscInitStruct.HSI48State     = RCC_HSI48_ON;
-  RCC_OscInitStruct.PLL.PLLState   = RCC_PLL_ON;
-  RCC_OscInitStruct.PLL.PLLSource  = RCC_PLLSOURCE_HSE;
-  RCC_OscInitStruct.PLL.PLLM       = RCC_PLLM_DIV4;
-  RCC_OscInitStruct.PLL.PLLN       = 50;
-  RCC_OscInitStruct.PLL.PLLP       = RCC_PLLP_DIV2;
-  RCC_OscInitStruct.PLL.PLLQ       = RCC_PLLQ_DIV2;
-  RCC_OscInitStruct.PLL.PLLR       = RCC_PLLR_DIV2;
+  /* Activate PLL with HSI as source */
+  RCC_OscInitStruct.OscillatorType      = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.HSIState            = RCC_HSI_ON;
+  RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM            = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN            = 85;
+  RCC_OscInitStruct.PLL.PLLP            = RCC_PLLP_DIV10;
+  RCC_OscInitStruct.PLL.PLLQ            = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR            = RCC_PLLR_DIV2;
   HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
   // Initializes the CPU, AHB and APB buses clocks
-  RCC_ClkInitStruct.ClockType      = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.ClockType      = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK |
+                                     RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
   RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK;
   RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;
   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_8);
 
-  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
-  PeriphClkInit.UsbClockSelection    = RCC_USBCLKSOURCE_HSI48;
-  HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) ;
-
-#if 0 // TODO need to check if USB clock is enabled
-  /* Enable HSI48 */
-  memset(&RCC_OscInitStruct, 0, sizeof(RCC_OscInitStruct));
-
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
-  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
-  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
-  HAL_RCC_OscConfig(&RCC_OscInitStruct);
+  //------------- HSI48 and CRS for USB -------------//
+  RCC_OscInitTypeDef osc_hsi48 = {0};
+  osc_hsi48.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
+  osc_hsi48.HSI48State = RCC_HSI48_ON;
+  osc_hsi48.PLL.PLLState = RCC_PLL_NONE;
+  HAL_RCC_OscConfig(&osc_hsi48);
 
   /*Enable CRS Clock*/
   RCC_CRSInitTypeDef RCC_CRSInitStruct= {0};
@@ -119,7 +113,11 @@ static inline void board_clock_init(void)
 
   /* Start automatic synchronization */
   HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
-#endif
+
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
+  PeriphClkInit.UsbClockSelection    = RCC_USBCLKSOURCE_HSI48;
+  HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
 }
 
 static inline void board_vbus_sense_init(void)

From e7090c75148820ff3a4ad60c718684c46c954c18 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 2 Jun 2023 11:42:17 +0700
Subject: [PATCH 377/691] cmake refactor

---
 .github/workflows/build_arm.yml |   2 +-
 .github/workflows/cmake_arm.yml |   9 +--
 hw/bsp/family_support.cmake     | 116 ++++++++++++++++++++------------
 hw/bsp/imxrt/family.cmake       |  26 ++-----
 hw/bsp/lpc18/family.cmake       |  23 +------
 hw/bsp/lpc55/family.cmake       |  25 ++-----
 hw/bsp/mcx/family.cmake         |  23 +------
 hw/bsp/nrf/family.cmake         |  23 +------
 hw/bsp/stm32g0/family.cmake     |  23 +------
 hw/bsp/stm32g4/family.cmake     |  25 ++-----
 src/CMakeLists.txt              |   4 ++
 tools/build_cmake.py            |  10 +--
 12 files changed, 112 insertions(+), 197 deletions(-)

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 3a2daab08..a7c7fd1e1 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -46,7 +46,7 @@ jobs:
         - 'stm32f0 stm32f1 stm32f2 stm32f3'
         - 'stm32f4'
         - 'stm32f7'
-        - 'stm32g4 stm32h7'
+        - 'stm32h7'
         - 'stm32l0 stm32l4 stm32u5 stm32wb'
         - 'tm4c123 xmc4000'
     steps:
diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index 2e74c304c..2ca8e32f5 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -38,6 +38,7 @@ jobs:
           - 'imxrt'
           - 'rp2040'
           - 'stm32g0'
+          - 'stm32g4'
     steps:
     - name: Setup Python
       uses: actions/setup-python@v4
@@ -75,11 +76,11 @@ jobs:
     # Upload binaries for hardware test with self-hosted
     - name: Prepare rp2040 Artifacts
       if: contains(matrix.family, 'rp2040') && github.repository_owner == 'hathach'
-      working-directory: ${{github.workspace}}/cmake-build-ci-raspberry_pi_pico
+      working-directory: ${{github.workspace}}/cmake-build/cmake-build-raspberry_pi_pico
       run: |
-        find device/ -name "*.elf" -exec mv {} ../ \;
-        # find host/ -name "*.elf" -exec mv {} ../ \;
-        # find dual/ -name "*.elf" -exec mv {} ../ \;
+        find device/ -name "*.elf" -exec mv {} ../../ \;
+        # find host/ -name "*.elf" -exec mv {} ../../ \;
+        # find dual/ -name "*.elf" -exec mv {} ../../ \;
 
     - name: Upload Artifacts for rp2040
       if: contains(matrix.family,'rp2040') && github.repository_owner == 'hathach'
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index d9b8bbbe9..fdc9580ae 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -84,8 +84,8 @@ endfunction()
 
 
 function(family_initialize_project PROJECT DIR)
-  # set output suffix to .elf (skip espressif)
-  if(NOT FAMILY STREQUAL "espressif")
+  # set output suffix to .elf (skip espressif and rp2040)
+  if(NOT FAMILY STREQUAL "espressif" AND NOT FAMILY STREQUAL "rp2040")
     set(CMAKE_EXECUTABLE_SUFFIX .elf PARENT_SCOPE)
   endif()
 
@@ -144,6 +144,11 @@ function(family_add_default_example_warnings TARGET)
 endfunction()
 
 
+#------------------------------------
+# Main target configure
+#------------------------------------
+
+# Add common configuration to example
 function(family_configure_common TARGET)
   # run size after build
   add_custom_command(TARGET ${TARGET} POST_BUILD
@@ -158,6 +163,66 @@ function(family_configure_common TARGET)
 endfunction()
 
 
+# configure an executable target to link to tinyusb in device mode, and add the board implementation
+function(family_configure_device_example TARGET)
+  # default implementation is empty, the function should be redefined in the FAMILY/family.cmake
+endfunction()
+
+
+# configure an executable target to link to tinyusb in host mode, and add the board implementation
+function(family_configure_host_example TARGET)
+  # default implementation is empty, the function should be redefined in the FAMILY/family.cmake
+endfunction()
+
+
+# Add tinyusb to example
+function(family_add_tinyusb TARGET OPT_MCU)
+  # tinyusb target is built for each example since it depends on example's tusb_config.h
+  set(TINYUSB_TARGET_PREFIX ${TARGET}-)
+  add_library(${TARGET}-tinyusb_config INTERFACE)
+
+  target_include_directories(${TARGET}-tinyusb_config INTERFACE
+    ${CMAKE_CURRENT_SOURCE_DIR}/src
+    )
+  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
+    CFG_TUSB_MCU=${OPT_MCU}
+    )
+
+  # tinyusb's CMakeList.txt
+  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+endfunction()
+
+
+# Add freeRTOS support to example
+function(family_add_freertos TARGET)
+  # freeros config
+  if (NOT TARGET freertos_config)
+    add_library(freertos_config INTERFACE)
+    target_include_directories(freertos_config SYSTEM INTERFACE
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig
+      )
+  endif()
+
+  # freertos kernel should be generic as freertos_config however, CMAKE complains with missing variable
+  # such as CMAKE_C_COMPILE_OBJECT
+  if (NOT TARGET freertos_kernel)
+    add_subdirectory(${TOP}/lib/FreeRTOS-Kernel ${CMAKE_BINARY_DIR}/lib/freertos_kernel)
+  endif ()
+
+  # Add FreeRTOS option to tinyusb_config
+  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
+    CFG_TUSB_OS=OPT_OS_FREERTOS
+    )
+  # link tinyusb with freeRTOS kernel
+  target_link_libraries(${TARGET}-tinyusb PUBLIC
+    freertos_kernel
+    )
+  target_link_libraries(${TARGET} PUBLIC
+    freertos_kernel
+    )
+endfunction()
+
+
 # Add bin/hex output
 function(family_add_bin_hex TARGET)
   add_custom_command(TARGET ${TARGET} POST_BUILD
@@ -167,6 +232,10 @@ function(family_add_bin_hex TARGET)
 endfunction()
 
 
+#----------------------------------
+# Flashing target
+#----------------------------------
+
 # Add flash jlink target
 function(family_flash_jlink TARGET)
   if (NOT DEFINED JLINKEXE)
@@ -233,48 +302,7 @@ function(family_flash_nxplink TARGET)
 endfunction()
 
 
-# configure an executable target to link to tinyusb in device mode, and add the board implementation
-function(family_configure_device_example TARGET)
-  # default implementation is empty, the function should be redefined in the FAMILY/family.cmake
-endfunction()
-
-
-# configure an executable target to link to tinyusb in host mode, and add the board implementation
-function(family_configure_host_example TARGET)
-  # default implementation is empty, the function should be redefined in the FAMILY/family.cmake
-endfunction()
-
-
-# Add freeRTOS support to example, can be overridden by FAMILY/family.cmake
-function(family_add_freertos TARGET)
-  # freeros config
-  if (NOT TARGET freertos_config)
-    add_library(freertos_config INTERFACE)
-    target_include_directories(freertos_config SYSTEM INTERFACE
-      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig
-      )
-  endif()
-
-  # freertos kernel should be generic as freertos_config however, CMAKE complains with missing variable
-  # such as CMAKE_C_COMPILE_OBJECT
-  if (NOT TARGET freertos_kernel)
-    add_subdirectory(${TOP}/lib/FreeRTOS-Kernel ${CMAKE_BINARY_DIR}/lib/freertos_kernel)
-  endif ()
-
-  # Add FreeRTOS option to tinyusb_config
-  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
-    CFG_TUSB_OS=OPT_OS_FREERTOS
-    )
-  # link tinyusb with freeRTOS kernel
-  target_link_libraries(${TARGET}-tinyusb PUBLIC
-    freertos_kernel
-    )
-  target_link_libraries(${TARGET} PUBLIC
-    freertos_kernel
-    )
-endfunction()
-
-
+# family specific: can override above functions
 include(${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake)
 
 if (NOT FAMILY_MCUS)
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 49a4a9281..3c156285c 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -36,7 +36,6 @@ if (NOT TARGET ${BOARD_TARGET})
     ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
     )
   target_compile_definitions(${BOARD_TARGET} PUBLIC
-    CFG_TUSB_MCU=OPT_MCU_MIMXRT
     __ARMVFP__=0
     __ARMFPV5__=0
     XIP_EXTERNAL_FLASH=1
@@ -100,33 +99,16 @@ function(family_configure_example TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  #---------- TinyUSB ----------
-  # tinyusb target is built for each example since it depends on example's tusb_config.h
-  set(TINYUSB_TARGET_PREFIX ${TARGET}-)
-  add_library(${TARGET}-tinyusb_config INTERFACE)
-
-  target_include_directories(${TARGET}-tinyusb_config INTERFACE
-    ${CMAKE_CURRENT_SOURCE_DIR}/src
-    )
-  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
-    CFG_TUSB_MCU=OPT_MCU_MIMXRT
-    )
-
-  # tinyusb's CMakeList.txt
-  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+  # Add TinyUSB
+  family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT)
 
   # Link dependencies
   target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
 
-  # group target (not yet supported by clion)
-  set_target_properties(${TARGET}-tinyusb ${TARGET}-tinyusb_config
-    PROPERTIES FOLDER ${TARGET}_sub
-    )
-
-  #---------- Flash ----------
+  # Flashing
   family_flash_jlink(${TARGET})
   family_flash_nxplink(${TARGET})
-  family_flash_pyocd(${TARGET})
+  #family_flash_pyocd(${TARGET})
 endfunction()
 
 
diff --git a/hw/bsp/lpc18/family.cmake b/hw/bsp/lpc18/family.cmake
index 515348e10..a133e7217 100644
--- a/hw/bsp/lpc18/family.cmake
+++ b/hw/bsp/lpc18/family.cmake
@@ -83,30 +83,13 @@ function(family_configure_example TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  #---------- TinyUSB ----------
-  # tinyusb target is built for each example since it depends on example's tusb_config.h
-  set(TINYUSB_TARGET_PREFIX ${TARGET}-)
-  add_library(${TARGET}-tinyusb_config INTERFACE)
-
-  target_include_directories(${TARGET}-tinyusb_config INTERFACE
-    ${CMAKE_CURRENT_SOURCE_DIR}/src
-    )
-  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
-    CFG_TUSB_MCU=OPT_MCU_LPC18XX
-    )
-
-  # tinyusb's CMakeList.txt
-  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+  # Add TinyUSB
+  family_add_tinyusb(${TARGET} OPT_MCU_LPC18XX)
 
   # Link dependencies
   target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
 
-  # group target (not yet supported by clion)
-  set_target_properties(${TARGET}-tinyusb ${TARGET}-tinyusb_config
-    PROPERTIES FOLDER ${TARGET}_sub
-    )
-
-  #---------- Flash ----------
+  # Flashing
   family_flash_jlink(${TARGET})
 endfunction()
 
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index eb163bde7..25eed48de 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -109,33 +109,16 @@ function(family_configure_example TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  #---------- TinyUSB ----------
-  # tinyusb target is built for each example since it depends on example's tusb_config.h
-  set(TINYUSB_TARGET_PREFIX ${TARGET}-)
-  add_library(${TARGET}-tinyusb_config INTERFACE)
-
-  target_include_directories(${TARGET}-tinyusb_config INTERFACE
-    ${CMAKE_CURRENT_SOURCE_DIR}/src
-    )
-  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
-    CFG_TUSB_MCU=OPT_MCU_LPC55XX
-    )
-
-  # tinyusb's CMakeList.txt
-  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+  # Add TinyUSB
+  family_add_tinyusb(${TARGET} OPT_MCU_LPC55XX)
 
   # Link dependencies
   target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
 
-  # group target (not yet supported by clion)
-  set_target_properties(${TARGET}-tinyusb ${TARGET}-tinyusb_config
-    PROPERTIES FOLDER ${TARGET}_sub
-    )
-
-  #---------- Flash ----------
+  # Flashing
   family_flash_jlink(${TARGET})
   family_flash_nxplink(${TARGET})
-  family_flash_pyocd(${TARGET})
+  #family_flash_pyocd(${TARGET})
 endfunction()
 
 
diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake
index d5a17f584..17f54a53b 100644
--- a/hw/bsp/mcx/family.cmake
+++ b/hw/bsp/mcx/family.cmake
@@ -91,30 +91,13 @@ function(family_configure_example TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  #---------- TinyUSB ----------
-  # tinyusb target is built for each example since it depends on example's tusb_config.h
-  set(TINYUSB_TARGET_PREFIX ${TARGET}-)
-  add_library(${TARGET}-tinyusb_config INTERFACE)
-
-  target_include_directories(${TARGET}-tinyusb_config INTERFACE
-    ${CMAKE_CURRENT_SOURCE_DIR}/src
-    )
-  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
-    CFG_TUSB_MCU=OPT_MCU_MCXN9
-    )
-
-  # tinyusb's CMakeList.txt
-  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+  # Add TinyUSB
+  family_add_tinyusb(${TARGET} OPT_MCU_MCXN9)
 
   # Link dependencies
   target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
 
-  # group target (not yet supported by clion)
-  set_target_properties(${TARGET}-tinyusb ${TARGET}-tinyusb_config
-    PROPERTIES FOLDER ${TARGET}_sub
-    )
-
-  #---------- Flash ----------
+  # Flashing
   family_flash_jlink(${TARGET})
   #family_flash_nxplink(${TARGET})
   #family_flash_pyocd(${TARGET})
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 71067c8ae..2c5d7a431 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -98,30 +98,13 @@ function(family_configure_example TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  #---------- TinyUSB ----------
-  # tinyusb target is built for each example since it depends on example's tusb_config.h
-  set(TINYUSB_TARGET_PREFIX ${TARGET}-)
-  add_library(${TARGET}-tinyusb_config INTERFACE)
-
-  target_include_directories(${TARGET}-tinyusb_config INTERFACE
-    ${CMAKE_CURRENT_SOURCE_DIR}/src
-    )
-  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
-    CFG_TUSB_MCU=OPT_MCU_NRF5X
-    )
-
-  # tinyusb's CMakeList.txt
-  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+  # Add TinyUSB
+  family_add_tinyusb(${TARGET} OPT_MCU_NRF5X)
 
   # Link dependencies
   target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
 
-  # group target (not yet supported by clion)
-  set_target_properties(${TARGET}-tinyusb ${TARGET}-tinyusb_config
-    PROPERTIES FOLDER ${TARGET}_sub
-    )
-
-  #---------- Flash ----------
+  # Flashing
   family_flash_jlink(${TARGET})
 endfunction()
 
diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake
index 9674bc759..184dc6062 100644
--- a/hw/bsp/stm32g0/family.cmake
+++ b/hw/bsp/stm32g0/family.cmake
@@ -96,30 +96,13 @@ function(family_configure_example TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  #---------- TinyUSB ----------
-  # tinyusb target is built for each example since it depends on example's tusb_config.h
-  set(TINYUSB_TARGET_PREFIX ${TARGET}-)
-  add_library(${TARGET}-tinyusb_config INTERFACE)
-
-  target_include_directories(${TARGET}-tinyusb_config INTERFACE
-    ${CMAKE_CURRENT_SOURCE_DIR}/src
-    )
-  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
-    CFG_TUSB_MCU=OPT_MCU_STM32G0
-    )
-
-  # tinyusb's CMakeList.txt
-  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+  # Add TinyUSB
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32G0)
 
   # Link dependencies
   target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
 
-  # group target (not yet supported by clion)
-  set_target_properties(${TARGET}-tinyusb ${TARGET}-tinyusb_config
-    PROPERTIES FOLDER ${TARGET}_sub
-    )
-
-  #---------- Flash ----------
+  # Flashing
   family_flash_stlink(${TARGET})
   #family_flash_jlink(${TARGET})
 endfunction()
diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake
index 1de6fd674..5578a9b6c 100644
--- a/hw/bsp/stm32g4/family.cmake
+++ b/hw/bsp/stm32g4/family.cmake
@@ -12,7 +12,7 @@ set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY})
 set(CMSIS_5 ${TOP}/lib/CMSIS_5)
 
 # enable LTO
-#set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
 
 # toolchain set up
 set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
@@ -96,30 +96,13 @@ function(family_configure_example TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  #---------- TinyUSB ----------
-  # tinyusb target is built for each example since it depends on example's tusb_config.h
-  set(TINYUSB_TARGET_PREFIX ${TARGET}-)
-  add_library(${TARGET}-tinyusb_config INTERFACE)
-
-  target_include_directories(${TARGET}-tinyusb_config INTERFACE
-    ${CMAKE_CURRENT_SOURCE_DIR}/src
-    )
-  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
-    CFG_TUSB_MCU=OPT_MCU_STM32G4
-    )
-
-  # tinyusb's CMakeList.txt
-  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+  # Add TinyUSB
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32G4)
 
   # Link dependencies
   target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
 
-  # group target (not yet supported by clion)
-  set_target_properties(${TARGET}-tinyusb ${TARGET}-tinyusb_config
-    PROPERTIES FOLDER ${TARGET}_sub
-    )
-
-  #---------- Flash ----------
+  # Flashing
   family_flash_stlink(${TARGET})
   #family_flash_jlink(${TARGET})
 endfunction()
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 396737ed5..ad9fbc7c0 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -96,3 +96,7 @@ endif()
 target_link_libraries(${TINYUSB_TARGET} PUBLIC
   ${TINYUSB_CONFIG_TARGET}
   )
+
+# export target name
+# set(TINYUSB_TARGET ${TINYUSB_TARGET} PARENT_SCOPE)
+# set(TINYUSB_CONFIG_TARGET ${TINYUSB_CONFIG_TARGET} PARENT_SCOPE)
diff --git a/tools/build_cmake.py b/tools/build_cmake.py
index 88d27dfb8..d85726213 100644
--- a/tools/build_cmake.py
+++ b/tools/build_cmake.py
@@ -34,13 +34,15 @@ def build_family(family, make_option):
     for board in all_boards:
         start_time = time.monotonic()
 
+        build_dir = f"cmake-build/cmake-build-{board}"
+
         # Generate build
-        r = subprocess.run(f"cmake examples -B cmake-build-ci-{board} -G \"Ninja\" -DFAMILY={family} -DBOARD"
+        r = subprocess.run(f"cmake examples -B {build_dir} -G \"Ninja\" -DFAMILY={family} -DBOARD"
                            f"={board}", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
 
         # Build
         if r.returncode == 0:
-            r = subprocess.run(f"cmake --build cmake-build-ci-{board}", shell=True, stdout=subprocess.PIPE,
+            r = subprocess.run(f"cmake --build {build_dir}", shell=True, stdout=subprocess.PIPE,
                                stderr=subprocess.STDOUT)
 
         duration = time.monotonic() - start_time
@@ -71,10 +73,10 @@ if __name__ == '__main__':
     if make_iar_option not in sys.argv:
         make_iar_option = ''
 
-    # If family are not specified in arguments, build all
+    # If family are not specified in arguments, build all supported
     all_families = []
     for entry in os.scandir("hw/bsp"):
-        if entry.is_dir() and os.path.isdir(entry.path + "/boards") and entry.name != 'espressif':
+        if entry.is_dir() and entry.name != 'espressif' and os.path.isfile(entry.path + "/family.cmake"):
             all_families.append(entry.name)
     filter_with_input(all_families)
     all_families.sort()

From fcf77914546496d88d5915223095d93bb63c67fe Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 2 Jun 2023 13:27:18 +0700
Subject: [PATCH 378/691] add IAR support for G0 with cmake

---
 .../device/net_lwip_webserver/CMakeLists.txt  |  16 +-
 hw/bsp/family_support.cmake                   | 160 +++++++++---------
 hw/bsp/imxrt/family.cmake                     |   4 +-
 .../lpc18/boards/lpcxpresso18s37/board.cmake  |   2 +-
 hw/bsp/lpc18/boards/mcb1800/board.cmake       |   2 +-
 hw/bsp/lpc18/family.cmake                     |   2 +-
 .../boards/double_m33_express/board.cmake     |   2 +-
 hw/bsp/lpc55/family.cmake                     |   4 +-
 hw/bsp/nrf/boards/pca10056/board.cmake        |   2 +-
 hw/bsp/nrf/boards/pca10095/board.cmake        |   2 +-
 hw/bsp/nrf/family.cmake                       |   4 +-
 .../boards/stm32g0b1nucleo/board.cmake        |   8 +-
 hw/bsp/stm32g0/family.cmake                   |  86 +++++-----
 .../stm32g4/boards/b_g474e_dpow1/board.cmake  |   8 +-
 .../boards/stm32g474nucleo/board.cmake        |   8 +-
 hw/bsp/stm32g4/family.cmake                   |   4 +-
 src/CMakeLists.txt                            |   2 +
 tools/cmake/cpu/cortex-m0plus.cmake           |  12 +-
 tools/cmake/toolchain/arm_gcc.cmake           |  14 +-
 tools/cmake/toolchain/arm_iar.cmake           |  34 ++++
 tools/cmake/toolchain/set_flags.cmake         |  17 +-
 21 files changed, 222 insertions(+), 171 deletions(-)
 create mode 100644 tools/cmake/toolchain/arm_iar.cmake

diff --git a/examples/device/net_lwip_webserver/CMakeLists.txt b/examples/device/net_lwip_webserver/CMakeLists.txt
index 5225f7c42..2c21aa52b 100644
--- a/examples/device/net_lwip_webserver/CMakeLists.txt
+++ b/examples/device/net_lwip_webserver/CMakeLists.txt
@@ -77,12 +77,16 @@ target_sources(${PROJECT} PUBLIC
   )
 
 # due to warnings from other net source, we need to prevent error from some of the warnings options
-target_compile_options(${PROJECT} PUBLIC
-  -Wno-error=null-dereference
-  -Wno-error=conversion
-  -Wno-error=sign-conversion
-  -Wno-error=sign-compare
-  )
+if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+  target_compile_options(${PROJECT} PUBLIC
+    -Wno-error=null-dereference
+    -Wno-error=conversion
+    -Wno-error=sign-conversion
+    -Wno-error=sign-compare
+    )
+elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+
+endif ()
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index fdc9580ae..e801f0116 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -97,6 +97,87 @@ function(family_initialize_project PROJECT DIR)
 endfunction()
 
 
+#------------------------------------
+# Main target configure
+#------------------------------------
+
+# Add common configuration to example
+function(family_configure_common TARGET)
+  # run size after build
+  add_custom_command(TARGET ${TARGET} POST_BUILD
+    COMMAND ${CMAKE_SIZE} $<TARGET_FILE:${TARGET}>
+    )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GCC")
+    # Generate map file
+    target_link_options(${TARGET} PUBLIC
+      # link map
+      "LINKER:-Map=$<TARGET_FILE:${TARGET}>.map"
+      )
+  endif()
+endfunction()
+
+
+# configure an executable target to link to tinyusb in device mode, and add the board implementation
+function(family_configure_device_example TARGET)
+  # default implementation is empty, the function should be redefined in the FAMILY/family.cmake
+endfunction()
+
+
+# configure an executable target to link to tinyusb in host mode, and add the board implementation
+function(family_configure_host_example TARGET)
+  # default implementation is empty, the function should be redefined in the FAMILY/family.cmake
+endfunction()
+
+
+# Add tinyusb to example
+function(family_add_tinyusb TARGET OPT_MCU)
+  # tinyusb target is built for each example since it depends on example's tusb_config.h
+  set(TINYUSB_TARGET_PREFIX ${TARGET}-)
+  add_library(${TARGET}-tinyusb_config INTERFACE)
+
+  target_include_directories(${TARGET}-tinyusb_config INTERFACE
+    ${CMAKE_CURRENT_SOURCE_DIR}/src
+    )
+  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
+    CFG_TUSB_MCU=${OPT_MCU}
+    )
+
+  # tinyusb's CMakeList.txt
+  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+endfunction()
+
+
+# Add freeRTOS support to example
+function(family_add_freertos TARGET)
+  # freeros config
+  if (NOT TARGET freertos_config)
+    add_library(freertos_config INTERFACE)
+    target_include_directories(freertos_config INTERFACE
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig
+      )
+  endif()
+
+  # freertos kernel should be generic as freertos_config however, CMAKE complains with missing variable
+  # such as CMAKE_C_COMPILE_OBJECT
+  if (NOT TARGET freertos_kernel)
+    add_subdirectory(${TOP}/lib/FreeRTOS-Kernel ${CMAKE_BINARY_DIR}/lib/freertos_kernel)
+  endif ()
+
+  # Add FreeRTOS option to tinyusb_config
+  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
+    CFG_TUSB_OS=OPT_OS_FREERTOS
+    )
+  # link tinyusb with freeRTOS kernel
+  target_link_libraries(${TARGET}-tinyusb PUBLIC
+    freertos_kernel
+    )
+  target_link_libraries(${TARGET} PUBLIC
+    freertos_kernel
+    )
+endfunction()
+
+
 function(family_add_default_example_warnings TARGET)
   target_compile_options(${TARGET} PUBLIC
     -Wall
@@ -144,85 +225,6 @@ function(family_add_default_example_warnings TARGET)
 endfunction()
 
 
-#------------------------------------
-# Main target configure
-#------------------------------------
-
-# Add common configuration to example
-function(family_configure_common TARGET)
-  # run size after build
-  add_custom_command(TARGET ${TARGET} POST_BUILD
-    COMMAND ${CMAKE_SIZE} $<TARGET_FILE:${TARGET}>
-    )
-
-  # Generate map file
-  target_link_options(${TARGET} PUBLIC
-    # link map
-    "LINKER:-Map=$<TARGET_FILE:${TARGET}>.map"
-    )
-endfunction()
-
-
-# configure an executable target to link to tinyusb in device mode, and add the board implementation
-function(family_configure_device_example TARGET)
-  # default implementation is empty, the function should be redefined in the FAMILY/family.cmake
-endfunction()
-
-
-# configure an executable target to link to tinyusb in host mode, and add the board implementation
-function(family_configure_host_example TARGET)
-  # default implementation is empty, the function should be redefined in the FAMILY/family.cmake
-endfunction()
-
-
-# Add tinyusb to example
-function(family_add_tinyusb TARGET OPT_MCU)
-  # tinyusb target is built for each example since it depends on example's tusb_config.h
-  set(TINYUSB_TARGET_PREFIX ${TARGET}-)
-  add_library(${TARGET}-tinyusb_config INTERFACE)
-
-  target_include_directories(${TARGET}-tinyusb_config INTERFACE
-    ${CMAKE_CURRENT_SOURCE_DIR}/src
-    )
-  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
-    CFG_TUSB_MCU=${OPT_MCU}
-    )
-
-  # tinyusb's CMakeList.txt
-  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
-endfunction()
-
-
-# Add freeRTOS support to example
-function(family_add_freertos TARGET)
-  # freeros config
-  if (NOT TARGET freertos_config)
-    add_library(freertos_config INTERFACE)
-    target_include_directories(freertos_config SYSTEM INTERFACE
-      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig
-      )
-  endif()
-
-  # freertos kernel should be generic as freertos_config however, CMAKE complains with missing variable
-  # such as CMAKE_C_COMPILE_OBJECT
-  if (NOT TARGET freertos_kernel)
-    add_subdirectory(${TOP}/lib/FreeRTOS-Kernel ${CMAKE_BINARY_DIR}/lib/freertos_kernel)
-  endif ()
-
-  # Add FreeRTOS option to tinyusb_config
-  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
-    CFG_TUSB_OS=OPT_OS_FREERTOS
-    )
-  # link tinyusb with freeRTOS kernel
-  target_link_libraries(${TARGET}-tinyusb PUBLIC
-    freertos_kernel
-    )
-  target_link_libraries(${TARGET} PUBLIC
-    freertos_kernel
-    )
-endfunction()
-
-
 # Add bin/hex output
 function(family_add_bin_hex TARGET)
   add_custom_command(TARGET ${TARGET} POST_BUILD
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 3c156285c..b5d47614e 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -53,7 +53,7 @@ if (NOT TARGET ${BOARD_TARGET})
   update_board(${BOARD_TARGET})
 
   if (NOT DEFINED LD_FILE_${TOOLCHAIN})
-    set(LD_FILE_gcc ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld)
+    set(LD_FILE_GCC ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld)
   endif ()
 
   if (TOOLCHAIN STREQUAL "gcc")
@@ -61,7 +61,7 @@ if (NOT TARGET ${BOARD_TARGET})
       ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S
       )
     target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_gcc}"
+      "LINKER:--script=${LD_FILE_GCC}"
       # nanolib
       --specs=nosys.specs
       --specs=nano.specs
diff --git a/hw/bsp/lpc18/boards/lpcxpresso18s37/board.cmake b/hw/bsp/lpc18/boards/lpcxpresso18s37/board.cmake
index b540012a4..00686ca01 100644
--- a/hw/bsp/lpc18/boards/lpcxpresso18s37/board.cmake
+++ b/hw/bsp/lpc18/boards/lpcxpresso18s37/board.cmake
@@ -4,7 +4,7 @@ set(JLINK_DEVICE LPC18S37)
 set(PYOCD_TARGET LPC18S37)
 set(NXPLINK_DEVICE LPC18S37:LPCXPRESSO18S37)
 
-set(LD_FILE_gcc ${CMAKE_CURRENT_LIST_DIR}/lpc1837.ld)
+set(LD_FILE_GCC ${CMAKE_CURRENT_LIST_DIR}/lpc1837.ld)
 
 function(update_board TARGET)
   # nothing to do
diff --git a/hw/bsp/lpc18/boards/mcb1800/board.cmake b/hw/bsp/lpc18/boards/mcb1800/board.cmake
index 1efeafd12..cfc2739e3 100644
--- a/hw/bsp/lpc18/boards/mcb1800/board.cmake
+++ b/hw/bsp/lpc18/boards/mcb1800/board.cmake
@@ -4,7 +4,7 @@ set(JLINK_DEVICE LPC1857)
 set(PYOCD_TARGET LPC1857)
 set(NXPLINK_DEVICE LPC1857:MCB1857)
 
-set(LD_FILE_gcc ${CMAKE_CURRENT_LIST_DIR}/lpc1857.ld)
+set(LD_FILE_GCC ${CMAKE_CURRENT_LIST_DIR}/lpc1857.ld)
 
 function(update_board TARGET)
   # nothing to do
diff --git a/hw/bsp/lpc18/family.cmake b/hw/bsp/lpc18/family.cmake
index a133e7217..38b0f61fc 100644
--- a/hw/bsp/lpc18/family.cmake
+++ b/hw/bsp/lpc18/family.cmake
@@ -48,7 +48,7 @@ if (NOT TARGET ${BOARD_TARGET})
 
   if (TOOLCHAIN STREQUAL "gcc")
     target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_gcc}"
+      "LINKER:--script=${LD_FILE_GCC}"
       # nanolib
       --specs=nosys.specs
       --specs=nano.specs
diff --git a/hw/bsp/lpc55/boards/double_m33_express/board.cmake b/hw/bsp/lpc55/boards/double_m33_express/board.cmake
index 7c46c075e..62b0993dc 100644
--- a/hw/bsp/lpc55/boards/double_m33_express/board.cmake
+++ b/hw/bsp/lpc55/boards/double_m33_express/board.cmake
@@ -5,7 +5,7 @@ set(JLINK_DEVICE LPC55S69)
 set(PYOCD_TARGET LPC55S69)
 set(NXPLINK_DEVICE LPC55S69:LPCXpresso55S69)
 
-set(LD_FILE_gcc ${CMAKE_CURRENT_LIST_DIR}/LPC55S69_cm33_core0_uf2.ld)
+set(LD_FILE_GCC ${CMAKE_CURRENT_LIST_DIR}/LPC55S69_cm33_core0_uf2.ld)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index 25eed48de..967ed3fa6 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -65,7 +65,7 @@ if (NOT TARGET ${BOARD_TARGET})
   update_board(${BOARD_TARGET})
 
   if (NOT DEFINED LD_FILE_${TOOLCHAIN})
-    set(LD_FILE_gcc ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
+    set(LD_FILE_GCC ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
   endif ()
 
   if (TOOLCHAIN STREQUAL "gcc")
@@ -74,7 +74,7 @@ if (NOT TARGET ${BOARD_TARGET})
       )
     target_link_options(${BOARD_TARGET} PUBLIC
       # linker file
-      "LINKER:--script=${LD_FILE_gcc}"
+      "LINKER:--script=${LD_FILE_GCC}"
       # nanolib
       --specs=nosys.specs
       --specs=nano.specs
diff --git a/hw/bsp/nrf/boards/pca10056/board.cmake b/hw/bsp/nrf/boards/pca10056/board.cmake
index cc8ef2fcb..3137c4fcd 100644
--- a/hw/bsp/nrf/boards/pca10056/board.cmake
+++ b/hw/bsp/nrf/boards/pca10056/board.cmake
@@ -1,5 +1,5 @@
 set(MCU_VARIANT nrf52840)
-set(LD_FILE_gcc ${NRFX_DIR}/mdk/nrf52840_xxaa.ld)
+set(LD_FILE_GCC ${NRFX_DIR}/mdk/nrf52840_xxaa.ld)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/nrf/boards/pca10095/board.cmake b/hw/bsp/nrf/boards/pca10095/board.cmake
index e90d76e91..a0562c738 100644
--- a/hw/bsp/nrf/boards/pca10095/board.cmake
+++ b/hw/bsp/nrf/boards/pca10095/board.cmake
@@ -1,5 +1,5 @@
 set(MCU_VARIANT nrf5340_application)
-set(LD_FILE_gcc ${NRFX_DIR}/mdk/nrf5340_xxaa_application.ld)
+set(LD_FILE_GCC ${NRFX_DIR}/mdk/nrf5340_xxaa_application.ld)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 2c5d7a431..e94aeb9bd 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -55,7 +55,7 @@ if (NOT TARGET ${BOARD_TARGET})
   update_board(${BOARD_TARGET})
 
   if (NOT DEFINED LD_FILE_${TOOLCHAIN})
-    set(LD_FILE_gcc ${NRFX_DIR}/mdk/${MCU_VARIANT}_xxaa.ld)
+    set(LD_FILE_GCC ${NRFX_DIR}/mdk/${MCU_VARIANT}_xxaa.ld)
   endif ()
 
   if (TOOLCHAIN STREQUAL "gcc")
@@ -64,7 +64,7 @@ if (NOT TARGET ${BOARD_TARGET})
       )
     target_link_options(${BOARD_TARGET} PUBLIC
       # linker file
-      "LINKER:--script=${LD_FILE_gcc}"
+      "LINKER:--script=${LD_FILE_GCC}"
       -L${NRFX_DIR}/mdk
       # nanolib
       --specs=nosys.specs
diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake
index c9f2a9c8e..145490921 100644
--- a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake
+++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake
@@ -1,11 +1,11 @@
 #set(MCU_VARIANT MIMXRT1011)
 set(JLINK_DEVICE STM32G0B1RE)
 
-set(LD_FILE_gcc ${CMAKE_CURRENT_LIST_DIR}/STM32G0B1RETx_FLASH.ld)
-set(LD_FILE_iar ${ST_CMSIS}/Source/Templates/iar/linker/stm32g0b1xx_flash.icf)
+set(LD_FILE_GCC ${CMAKE_CURRENT_LIST_DIR}/STM32G0B1RETx_FLASH.ld)
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/stm32g0b1xx_flash.icf)
 
-set(STARTUP_FILE_gcc ${ST_CMSIS}/Source/Templates/gcc/startup_stm32g0b1xx.s)
-set(STARTUP_FILE_iar ${ST_CMSIS}/Source/Templates/iar/startup_stm32g0b1xx.s)
+set(STARTUP_FILE_GCC ${ST_CMSIS}/Source/Templates/gcc/startup_stm32g0b1xx.s)
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_stm32g0b1xx.s)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake
index 184dc6062..d77b3c102 100644
--- a/hw/bsp/stm32g0/family.cmake
+++ b/hw/bsp/stm32g0/family.cmake
@@ -28,50 +28,49 @@ include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 # BOARD_TARGET
 #------------------------------------
 # only need to be built ONCE for all examples
-set(BOARD_TARGET board_${BOARD})
-if (NOT TARGET ${BOARD_TARGET})
-  add_library(${BOARD_TARGET} STATIC
-    ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
-    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
-    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
-    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
-    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
-    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
-    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
-    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
-    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
-    )
-  target_include_directories(${BOARD_TARGET} PUBLIC
-    ${CMAKE_CURRENT_LIST_DIR}
-    ${CMSIS_5}/CMSIS/Core/Include
-    ${ST_CMSIS}/Include
-    ${ST_HAL_DRIVER}/Inc
-    )
-  target_compile_options(${BOARD_TARGET} PUBLIC
-    )
-  target_compile_definitions(${BOARD_TARGET} PUBLIC
-    )
-  update_board(${BOARD_TARGET})
-
-  target_sources(${BOARD_TARGET} PUBLIC
-    ${STARTUP_FILE_${TOOLCHAIN}}
-    )
-
-  if (TOOLCHAIN STREQUAL "gcc")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_gcc}"
-      -nostartfiles
-      # nanolib
-      --specs=nosys.specs
-      --specs=nano.specs
+function(add_board_target TARGET)
+  if (NOT TARGET ${TARGET})
+    add_library(${TARGET} STATIC
+      ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
+      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
       )
-  else ()
-    # TODO support IAR
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_iar}"
+    target_include_directories(${TARGET} PUBLIC
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+      ${CMSIS_5}/CMSIS/Core/Include
+      ${ST_CMSIS}/Include
+      ${ST_HAL_DRIVER}/Inc
       )
+    target_compile_options(${TARGET} PUBLIC
+      )
+    target_compile_definitions(${TARGET} PUBLIC
+      )
+
+    update_board(${TARGET})
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GCC")
+      target_link_options(${TARGET} PUBLIC
+        "LINKER:--script=${LD_FILE_GCC}"
+        -nostartfiles
+        # nanolib
+        --specs=nosys.specs
+        --specs=nano.specs
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      # TODO support IAR
+      target_link_options(${TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
   endif ()
-endif () # BOARD_TARGET
+endfunction()
 
 
 #------------------------------------
@@ -80,6 +79,9 @@ endif () # BOARD_TARGET
 function(family_configure_example TARGET)
   family_configure_common(${TARGET})
 
+  # Board target
+  add_board_target(board_${BOARD})
+
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
@@ -100,7 +102,7 @@ function(family_configure_example TARGET)
   family_add_tinyusb(${TARGET} OPT_MCU_STM32G0)
 
   # Link dependencies
-  target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
 
   # Flashing
   family_flash_stlink(${TARGET})
diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake
index 4e8f3f059..3a4849ef6 100644
--- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake
+++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake
@@ -1,11 +1,11 @@
 set(MCU_VARIANT stm32g474xx)
 set(JLINK_DEVICE stm32g474re)
 
-set(LD_FILE_gcc ${CMAKE_CURRENT_LIST_DIR}/STM32G474RETx_FLASH.ld)
-set(LD_FILE_iar ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+set(LD_FILE_GCC ${CMAKE_CURRENT_LIST_DIR}/STM32G474RETx_FLASH.ld)
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
 
-set(STARTUP_FILE_gcc ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-set(STARTUP_FILE_iar ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_GCC ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake b/hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake
index 8cc633449..f13f1fc28 100644
--- a/hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake
+++ b/hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake
@@ -1,11 +1,11 @@
 set(MCU_VARIANT stm32g474xx)
 set(JLINK_DEVICE stm32g474re)
 
-set(LD_FILE_gcc ${CMAKE_CURRENT_LIST_DIR}/STM32G474RETx_FLASH.ld)
-set(LD_FILE_iar ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+set(LD_FILE_GCC ${CMAKE_CURRENT_LIST_DIR}/STM32G474RETx_FLASH.ld)
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
 
-set(STARTUP_FILE_gcc ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-set(STARTUP_FILE_iar ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_GCC ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake
index 5578a9b6c..c87486677 100644
--- a/hw/bsp/stm32g4/family.cmake
+++ b/hw/bsp/stm32g4/family.cmake
@@ -59,7 +59,7 @@ if (NOT TARGET ${BOARD_TARGET})
 
   if (TOOLCHAIN STREQUAL "gcc")
     target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_gcc}"
+      "LINKER:--script=${LD_FILE_GCC}"
       -nostartfiles
       # nanolib
       --specs=nosys.specs
@@ -68,7 +68,7 @@ if (NOT TARGET ${BOARD_TARGET})
   else ()
     # TODO support IAR
     target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_iar}"
+      "LINKER:--config=${LD_FILE_IAR}"
       )
   endif ()
 endif () # BOARD_TARGET
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index ad9fbc7c0..09f41c9ab 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -65,6 +65,8 @@ function(add_tinyusb TARGET)
       -Wreturn-type
       -Wredundant-decls
       )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+
   endif ()
 endfunction()
 
diff --git a/tools/cmake/cpu/cortex-m0plus.cmake b/tools/cmake/cpu/cortex-m0plus.cmake
index 1e316ccfc..bc2257048 100644
--- a/tools/cmake/cpu/cortex-m0plus.cmake
+++ b/tools/cmake/cpu/cortex-m0plus.cmake
@@ -1,11 +1,17 @@
 if (TOOLCHAIN STREQUAL "gcc")
-  list(APPEND TOOLCHAIN_COMMON_FLAGS
+  set(TOOLCHAIN_COMMON_FLAGS
     -mthumb
     -mcpu=cortex-m0plus
     -mfloat-abi=soft
     )
 
   set(FREERTOS_PORT GCC_ARM_CM0 CACHE INTERNAL "")
-else ()
-  # TODO support IAR
+
+elseif (TOOLCHAIN STREQUAL "iar")
+  set(TOOLCHAIN_COMMON_FLAGS
+    --cpu cortex-m0
+    )
+
+  set(FREERTOS_PORT IAR_ARM_CM0 CACHE INTERNAL "")
+
 endif ()
diff --git a/tools/cmake/toolchain/arm_gcc.cmake b/tools/cmake/toolchain/arm_gcc.cmake
index c7f12f43a..6dd1e7002 100644
--- a/tools/cmake/toolchain/arm_gcc.cmake
+++ b/tools/cmake/toolchain/arm_gcc.cmake
@@ -1,8 +1,8 @@
 set(CMAKE_SYSTEM_NAME Generic)
 
-set(CMAKE_ASM_COMPILER "arm-none-eabi-gcc")
 set(CMAKE_C_COMPILER "arm-none-eabi-gcc")
 set(CMAKE_CXX_COMPILER "arm-none-eabi-g++")
+set(CMAKE_ASM_COMPILER "arm-none-eabi-gcc")
 
 set(CMAKE_SIZE "arm-none-eabi-size" CACHE FILEPATH "")
 set(CMAKE_OBJCOPY "arm-none-eabi-objcopy" CACHE FILEPATH "")
@@ -29,13 +29,13 @@ list(APPEND TOOLCHAIN_COMMON_FLAGS
   -fno-strict-aliasing
   )
 
-list(APPEND TOOLCHAIN_EXE_LINKER_FLAGS
+set(TOOLCHAIN_EXE_LINKER_FLAGS
   -Wl,--print-memory-usage
   -Wl,--gc-sections
   -Wl,--cref
   )
 
-list(APPEND TOOLCHAIN_WARNING_FLAGS
+set(TOOLCHAIN_WARNING_FLAGS
   -Wall
   -Wextra
   -Werror
@@ -62,3 +62,11 @@ list(APPEND TOOLCHAIN_WARNING_FLAGS
   )
 
 include(${CMAKE_CURRENT_LIST_DIR}/set_flags.cmake)
+
+# try_compile is cmake test compiling its own example,
+# pass -nostdlib to skip stdlib linking
+get_property(IS_IN_TRY_COMPILE GLOBAL PROPERTY IN_TRY_COMPILE)
+if (IS_IN_TRY_COMPILE)
+  set(CMAKE_C_LINK_FLAGS "${CMAKE_C_LINK_FLAGS} -nostdlib")
+  set(CMAKE_CXX_LINK_FLAGS "${CMAKE_CXX_LINK_FLAGS} -nostdlib")
+endif ()
diff --git a/tools/cmake/toolchain/arm_iar.cmake b/tools/cmake/toolchain/arm_iar.cmake
new file mode 100644
index 000000000..dfbe55e0d
--- /dev/null
+++ b/tools/cmake/toolchain/arm_iar.cmake
@@ -0,0 +1,34 @@
+set(CMAKE_SYSTEM_NAME Generic)
+
+set(CMAKE_C_COMPILER "iccarm")
+set(CMAKE_CXX_COMPILER "iccarm")
+set(CMAKE_ASM_COMPILER "iasmarm")
+
+set(CMAKE_SIZE "size" CACHE FILEPATH "")
+set(CMAKE_OBJCOPY "ielftool" CACHE FILEPATH "")
+set(CMAKE_OBJDUMP "iefdumparm" CACHE FILEPATH "")
+
+set_property(GLOBAL PROPERTY TARGET_SUPPORTS_SHARED_LIBS FALSE)
+
+# Look for includes and libraries only in the target system prefix.
+set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
+set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
+set(CMAKE_FIND_ROOT_PATH_MODE_PACKAGE ONLY)
+set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
+
+# pass TOOLCHAIN_CPU to
+set(CMAKE_TRY_COMPILE_PLATFORM_VARIABLES CMAKE_SYSTEM_PROCESSOR)
+
+include(${CMAKE_CURRENT_LIST_DIR}/../cpu/${CMAKE_SYSTEM_PROCESSOR}.cmake)
+
+# enable all possible warnings for building examples
+list(APPEND TOOLCHAIN_COMMON_FLAGS
+  )
+
+list(APPEND TOOLCHAIN_EXE_LINKER_FLAGS
+  )
+
+list(APPEND TOOLCHAIN_WARNING_FLAGS
+  )
+
+include(${CMAKE_CURRENT_LIST_DIR}/set_flags.cmake)
diff --git a/tools/cmake/toolchain/set_flags.cmake b/tools/cmake/toolchain/set_flags.cmake
index 6f74fe673..44930ef4d 100644
--- a/tools/cmake/toolchain/set_flags.cmake
+++ b/tools/cmake/toolchain/set_flags.cmake
@@ -1,9 +1,10 @@
 include(CMakePrintHelpers)
+
+# join the toolchain flags into a single string
+list(JOIN TOOLCHAIN_COMMON_FLAGS " " TOOLCHAIN_COMMON_FLAGS)
+
 foreach (LANG IN ITEMS C CXX ASM)
-  # join the toolchain flags into a single string
-  list(APPEND TOOLCHAIN_${LANG}_FLAGS ${TOOLCHAIN_COMMON_FLAGS})
-  list(JOIN TOOLCHAIN_${LANG}_FLAGS " " TOOLCHAIN_${LANG}_FLAGS)
-  set(CMAKE_${LANG}_FLAGS_INIT "${TOOLCHAIN_${LANG}_FLAGS}")
+  set(CMAKE_${LANG}_FLAGS_INIT ${TOOLCHAIN_COMMON_FLAGS})
 
   #cmake_print_variables(CMAKE_${LANG}_FLAGS_INIT)
 
@@ -14,11 +15,3 @@ endforeach ()
 
 # Linker
 list(JOIN TOOLCHAIN_EXE_LINKER_FLAGS " " CMAKE_EXE_LINKER_FLAGS_INIT)
-
-# try_compile is cmake test compiling its own example,
-# pass -nostdlib to skip stdlib linking
-get_property(IS_IN_TRY_COMPILE GLOBAL PROPERTY IN_TRY_COMPILE)
-if (IS_IN_TRY_COMPILE)
-  set(CMAKE_C_LINK_FLAGS "${CMAKE_C_LINK_FLAGS} -nostdlib")
-  set(CMAKE_CXX_LINK_FLAGS "${CMAKE_CXX_LINK_FLAGS} -nostdlib")
-endif ()

From bb795e6a5eededff57f18336c11b84f5470d4e4e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 2 Jun 2023 15:26:16 +0700
Subject: [PATCH 379/691] update cmake to build with IAR for g0 and g4

---
 hw/bsp/family_support.cmake                   |   2 +-
 hw/bsp/imxrt/family.cmake                     | 124 ++++++++++--------
 .../lpc18/boards/lpcxpresso18s37/board.cmake  |   2 +-
 hw/bsp/lpc18/boards/mcb1800/board.cmake       |   2 +-
 hw/bsp/lpc18/family.cmake                     |  86 ++++++------
 .../boards/double_m33_express/board.cmake     |   2 +-
 hw/bsp/lpc55/family.cmake                     | 108 ++++++++-------
 hw/bsp/mcx/family.cmake                       | 100 +++++++-------
 hw/bsp/nrf/boards/pca10056/board.cmake        |   2 +-
 hw/bsp/nrf/boards/pca10095/board.cmake        |   2 +-
 hw/bsp/nrf/family.cmake                       |  99 ++++++++------
 .../boards/stm32g0b1nucleo/board.cmake        |   4 +-
 hw/bsp/stm32g0/family.cmake                   |  37 +++---
 .../stm32g4/boards/b_g474e_dpow1/board.cmake  |   4 +-
 .../boards/stm32g474nucleo/board.cmake        |   4 +-
 hw/bsp/stm32g4/family.cmake                   |  97 +++++++-------
 tools/cmake/cpu/cortex-m3.cmake               |  12 +-
 tools/cmake/cpu/cortex-m33.cmake              |  13 +-
 tools/cmake/cpu/cortex-m4.cmake               |  13 +-
 tools/cmake/cpu/cortex-m7.cmake               |  13 +-
 20 files changed, 415 insertions(+), 311 deletions(-)

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index e801f0116..fdcd9a983 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -108,7 +108,7 @@ function(family_configure_common TARGET)
     COMMAND ${CMAKE_SIZE} $<TARGET_FILE:${TARGET}>
     )
 
-  if (CMAKE_C_COMPILER_ID STREQUAL "GCC")
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
     # Generate map file
     target_link_options(${TARGET} PUBLIC
       # link map
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index b5d47614e..f687fe833 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -4,8 +4,11 @@ if (NOT BOARD)
   message(FATAL_ERROR "BOARD not specified")
 endif ()
 
-# enable LTO
-set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
+set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 
 # toolchain set up
 set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
@@ -13,66 +16,79 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS MIMXRT CACHE INTERNAL "")
 
-# include board specific
-include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+# enable LTO if supported
+include(CheckIPOSupported)
+check_ipo_supported(RESULT IPO_SUPPORTED)
+if (IPO_SUPPORTED)
+  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+endif ()
 
 
 #------------------------------------
 # BOARD_TARGET
 #------------------------------------
 # only need to be built ONCE for all examples
-set(BOARD_TARGET board_${BOARD})
-if (NOT TARGET ${BOARD_TARGET})
-  set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
-  set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    add_library(${BOARD_TARGET} STATIC
+      ${SDK_DIR}/drivers/common/fsl_common.c
+      ${SDK_DIR}/drivers/igpio/fsl_gpio.c
+      ${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
+      ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
+      ${SDK_DIR}/devices/${MCU_VARIANT}/xip/fsl_flexspi_nor_boot.c
+      ${SDK_DIR}/devices/${MCU_VARIANT}/project_template/clock_config.c
+      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
+      )
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      __ARMVFP__=0
+      __ARMFPV5__=0
+      XIP_EXTERNAL_FLASH=1
+      XIP_BOOT_HEADER_ENABLE=1
+      )
+    target_include_directories(${BOARD_TARGET} PUBLIC
+      ${CMSIS_DIR}/CMSIS/Core/Include
+      ${SDK_DIR}/devices/${MCU_VARIANT}
+      ${SDK_DIR}/devices/${MCU_VARIANT}/project_template
+      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+      ${SDK_DIR}/drivers/common
+      ${SDK_DIR}/drivers/igpio
+      ${SDK_DIR}/drivers/lpuart
+      )
 
-  add_library(${BOARD_TARGET} STATIC
-    ${SDK_DIR}/drivers/common/fsl_common.c
-    ${SDK_DIR}/drivers/igpio/fsl_gpio.c
-    ${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/xip/fsl_flexspi_nor_boot.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/project_template/clock_config.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
-    )
-  target_compile_definitions(${BOARD_TARGET} PUBLIC
-    __ARMVFP__=0
-    __ARMFPV5__=0
-    XIP_EXTERNAL_FLASH=1
-    XIP_BOOT_HEADER_ENABLE=1
-    )
-  target_include_directories(${BOARD_TARGET} PUBLIC
-    ${CMSIS_DIR}/CMSIS/Core/Include
-    ${SDK_DIR}/devices/${MCU_VARIANT}
-    ${SDK_DIR}/devices/${MCU_VARIANT}/project_template
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
-    ${SDK_DIR}/drivers/common
-    ${SDK_DIR}/drivers/igpio
-    ${SDK_DIR}/drivers/lpuart
-    )
-  update_board(${BOARD_TARGET})
+    update_board(${BOARD_TARGET})
 
-  if (NOT DEFINED LD_FILE_${TOOLCHAIN})
-    set(LD_FILE_GCC ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld)
-  endif ()
+    # LD_FILE and STARTUP_FILE can be defined in board.cmake
+    if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+      set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld)
+      #set(LD_FILE_IAR ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld)
+    endif ()
+
+    if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
+      set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
+      #set(STARTUP_FILE_IAR ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
+    endif ()
 
-  if (TOOLCHAIN STREQUAL "gcc")
     target_sources(${BOARD_TARGET} PUBLIC
-      ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S
+      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
       )
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GCC}"
-      # nanolib
-      --specs=nosys.specs
-      --specs=nano.specs
-      # force linker to look for these symbols
-      -Wl,-uimage_vector_table
-      -Wl,-ug_boot_data
-      )
-  else ()
-    # TODO support IAR
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--script=${LD_FILE_GNU}"
+        # nanolib
+        --specs=nosys.specs
+        --specs=nano.specs
+        # force linker to look for these symbols
+        -Wl,-uimage_vector_table
+        -Wl,-ug_boot_data
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
   endif ()
-endif () # BOARD_TARGET
+endfunction()
 
 
 #------------------------------------
@@ -81,6 +97,9 @@ endif () # BOARD_TARGET
 function(family_configure_example TARGET)
   family_configure_common(${TARGET})
 
+  # Board target
+  add_board_target(board_${BOARD})
+
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
@@ -103,12 +122,11 @@ function(family_configure_example TARGET)
   family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT)
 
   # Link dependencies
-  target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
 
   # Flashing
   family_flash_jlink(${TARGET})
-  family_flash_nxplink(${TARGET})
-  #family_flash_pyocd(${TARGET})
+  #family_flash_nxplink(${TARGET})
 endfunction()
 
 
diff --git a/hw/bsp/lpc18/boards/lpcxpresso18s37/board.cmake b/hw/bsp/lpc18/boards/lpcxpresso18s37/board.cmake
index 00686ca01..3abe6f3bb 100644
--- a/hw/bsp/lpc18/boards/lpcxpresso18s37/board.cmake
+++ b/hw/bsp/lpc18/boards/lpcxpresso18s37/board.cmake
@@ -4,7 +4,7 @@ set(JLINK_DEVICE LPC18S37)
 set(PYOCD_TARGET LPC18S37)
 set(NXPLINK_DEVICE LPC18S37:LPCXPRESSO18S37)
 
-set(LD_FILE_GCC ${CMAKE_CURRENT_LIST_DIR}/lpc1837.ld)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/lpc1837.ld)
 
 function(update_board TARGET)
   # nothing to do
diff --git a/hw/bsp/lpc18/boards/mcb1800/board.cmake b/hw/bsp/lpc18/boards/mcb1800/board.cmake
index cfc2739e3..f6fae89d7 100644
--- a/hw/bsp/lpc18/boards/mcb1800/board.cmake
+++ b/hw/bsp/lpc18/boards/mcb1800/board.cmake
@@ -4,7 +4,7 @@ set(JLINK_DEVICE LPC1857)
 set(PYOCD_TARGET LPC1857)
 set(NXPLINK_DEVICE LPC1857:MCB1857)
 
-set(LD_FILE_GCC ${CMAKE_CURRENT_LIST_DIR}/lpc1857.ld)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/lpc1857.ld)
 
 function(update_board TARGET)
   # nothing to do
diff --git a/hw/bsp/lpc18/family.cmake b/hw/bsp/lpc18/family.cmake
index 38b0f61fc..bcdec9c01 100644
--- a/hw/bsp/lpc18/family.cmake
+++ b/hw/bsp/lpc18/family.cmake
@@ -6,8 +6,8 @@ endif ()
 
 set(SDK_DIR ${TOP}/hw/mcu/nxp/lpcopen/lpc18xx/lpc_chip_18xx)
 
-# enable LTO
-set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 
 # toolchain set up
 set(CMAKE_SYSTEM_PROCESSOR cortex-m3 CACHE INTERNAL "System Processor")
@@ -15,48 +15,56 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS LPC18XX CACHE INTERNAL "")
 
-# include board specific
-include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+# enable LTO if supported
+include(CheckIPOSupported)
+check_ipo_supported(RESULT IPO_SUPPORTED)
+if (IPO_SUPPORTED)
+  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+endif ()
 
 
 #------------------------------------
 # BOARD_TARGET
 #------------------------------------
 # only need to be built ONCE for all examples
-set(BOARD_TARGET board_${BOARD})
-if (NOT TARGET ${BOARD_TARGET})
-  add_library(${BOARD_TARGET} STATIC
-    ${SDK_DIR}/../gcc/cr_startup_lpc18xx.c
-    ${SDK_DIR}/src/chip_18xx_43xx.c
-    ${SDK_DIR}/src/clock_18xx_43xx.c
-    ${SDK_DIR}/src/gpio_18xx_43xx.c
-    ${SDK_DIR}/src/sysinit_18xx_43xx.c
-    ${SDK_DIR}/src/uart_18xx_43xx.c
-    )
-  target_compile_options(${BOARD_TARGET} PUBLIC
-    -nostdlib
-    )
-  target_compile_definitions(${BOARD_TARGET} PUBLIC
-    __USE_LPCOPEN
-    CORE_M3
-    )
-  target_include_directories(${BOARD_TARGET} PUBLIC
-    ${SDK_DIR}/inc
-    ${SDK_DIR}/inc/config_18xx
-    )
-  update_board(${BOARD_TARGET})
-
-  if (TOOLCHAIN STREQUAL "gcc")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GCC}"
-      # nanolib
-      --specs=nosys.specs
-      --specs=nano.specs
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    add_library(${BOARD_TARGET} STATIC
+      ${SDK_DIR}/../gcc/cr_startup_lpc18xx.c
+      ${SDK_DIR}/src/chip_18xx_43xx.c
+      ${SDK_DIR}/src/clock_18xx_43xx.c
+      ${SDK_DIR}/src/gpio_18xx_43xx.c
+      ${SDK_DIR}/src/sysinit_18xx_43xx.c
+      ${SDK_DIR}/src/uart_18xx_43xx.c
       )
-  else ()
-    # TODO support IAR
+    target_compile_options(${BOARD_TARGET} PUBLIC
+      -nostdlib
+      )
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      __USE_LPCOPEN
+      CORE_M3
+      )
+    target_include_directories(${BOARD_TARGET} PUBLIC
+      ${SDK_DIR}/inc
+      ${SDK_DIR}/inc/config_18xx
+      )
+
+    update_board(${BOARD_TARGET})
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--script=${LD_FILE_GNU}"
+        # nanolib
+        --specs=nosys.specs
+        --specs=nano.specs
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
   endif ()
-endif () # BOARD_TARGET
+endfunction()
 
 
 #------------------------------------
@@ -65,6 +73,9 @@ endif () # BOARD_TARGET
 function(family_configure_example TARGET)
   family_configure_common(${TARGET})
 
+  # Board target
+  add_board_target(board_${BOARD})
+
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
@@ -87,10 +98,11 @@ function(family_configure_example TARGET)
   family_add_tinyusb(${TARGET} OPT_MCU_LPC18XX)
 
   # Link dependencies
-  target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
 
   # Flashing
   family_flash_jlink(${TARGET})
+  #family_flash_nxplink(${TARGET})
 endfunction()
 
 
diff --git a/hw/bsp/lpc55/boards/double_m33_express/board.cmake b/hw/bsp/lpc55/boards/double_m33_express/board.cmake
index 62b0993dc..f84e629c7 100644
--- a/hw/bsp/lpc55/boards/double_m33_express/board.cmake
+++ b/hw/bsp/lpc55/boards/double_m33_express/board.cmake
@@ -5,7 +5,7 @@ set(JLINK_DEVICE LPC55S69)
 set(PYOCD_TARGET LPC55S69)
 set(NXPLINK_DEVICE LPC55S69:LPCXpresso55S69)
 
-set(LD_FILE_GCC ${CMAKE_CURRENT_LIST_DIR}/LPC55S69_cm33_core0_uf2.ld)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/LPC55S69_cm33_core0_uf2.ld)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index 967ed3fa6..22a09ce10 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -31,58 +31,67 @@ endif()
 # BOARD_TARGET
 #------------------------------------
 # only need to be built ONCE for all examples
-set(BOARD_TARGET board_${BOARD})
-if (NOT TARGET ${BOARD_TARGET})
-  add_library(${BOARD_TARGET} STATIC
-    # driver
-    ${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
-    ${SDK_DIR}/drivers/common/fsl_common_arm.c
-    ${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
-    ${SDK_DIR}/drivers/flexcomm/fsl_usart.c
-    # mcu
-    ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_power.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
-    )
-  target_compile_definitions(${BOARD_TARGET} PUBLIC
-    CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\)
-    )
-  target_include_directories(${BOARD_TARGET} PUBLIC
-    ${TOP}/lib/sct_neopixel
-    # driver
-    ${SDK_DIR}/drivers/common
-    ${SDK_DIR}/drivers/flexcomm
-    ${SDK_DIR}/drivers/lpc_iocon
-    ${SDK_DIR}/drivers/lpc_gpio
-    ${SDK_DIR}/drivers/lpuart
-    ${SDK_DIR}/drivers/sctimer
-    # mcu
-    ${CMSIS_DIR}/CMSIS/Core/Include
-    ${SDK_DIR}/devices/${MCU_VARIANT}
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
-    )
-  update_board(${BOARD_TARGET})
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    add_library(${BOARD_TARGET} STATIC
+      # driver
+      ${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
+      ${SDK_DIR}/drivers/common/fsl_common_arm.c
+      ${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
+      ${SDK_DIR}/drivers/flexcomm/fsl_usart.c
+      # mcu
+      ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
+      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
+      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_power.c
+      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
+      )
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\)
+      )
+    target_include_directories(${BOARD_TARGET} PUBLIC
+      ${TOP}/lib/sct_neopixel
+      # driver
+      ${SDK_DIR}/drivers/common
+      ${SDK_DIR}/drivers/flexcomm
+      ${SDK_DIR}/drivers/lpc_iocon
+      ${SDK_DIR}/drivers/lpc_gpio
+      ${SDK_DIR}/drivers/lpuart
+      ${SDK_DIR}/drivers/sctimer
+      # mcu
+      ${CMSIS_DIR}/CMSIS/Core/Include
+      ${SDK_DIR}/devices/${MCU_VARIANT}
+      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+      )
 
-  if (NOT DEFINED LD_FILE_${TOOLCHAIN})
-    set(LD_FILE_GCC ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
-  endif ()
+    update_board(${BOARD_TARGET})
+
+    if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+      set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
+    endif ()
+
+    if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
+      set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
+    endif ()
 
-  if (TOOLCHAIN STREQUAL "gcc")
     target_sources(${BOARD_TARGET} PUBLIC
-      ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S
+      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
       )
-    target_link_options(${BOARD_TARGET} PUBLIC
-      # linker file
-      "LINKER:--script=${LD_FILE_GCC}"
-      # nanolib
-      --specs=nosys.specs
-      --specs=nano.specs
-      )
-  else ()
-    # TODO support IAR
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        # linker file
+        "LINKER:--script=${LD_FILE_GNU}"
+        # nanolib
+        --specs=nosys.specs
+        --specs=nano.specs
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
   endif ()
-endif () # BOARD_TARGET
+endfunction()
 
 
 #------------------------------------
@@ -91,6 +100,9 @@ endif () # BOARD_TARGET
 function(family_configure_example TARGET)
   family_configure_common(${TARGET})
 
+  # Board target
+  add_board_target(board_${BOARD})
+
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
@@ -113,7 +125,7 @@ function(family_configure_example TARGET)
   family_add_tinyusb(${TARGET} OPT_MCU_LPC55XX)
 
   # Link dependencies
-  target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
 
   # Flashing
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake
index 17f54a53b..1dbf6f8f7 100644
--- a/hw/bsp/mcx/family.cmake
+++ b/hw/bsp/mcx/family.cmake
@@ -7,8 +7,8 @@ endif ()
 set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
 set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
 
-# enable LTO
-set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 
 # toolchain set up
 set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
@@ -16,57 +16,64 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS LPC55XX CACHE INTERNAL "")
 
-# include board specific
-include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+# enable LTO if supported
+include(CheckIPOSupported)
+check_ipo_supported(RESULT IPO_SUPPORTED)
+if (IPO_SUPPORTED)
+  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+endif ()
 
 
 #------------------------------------
 # BOARD_TARGET
 #------------------------------------
 # only need to be built ONCE for all examples
-set(BOARD_TARGET board_${BOARD})
-if (NOT TARGET ${BOARD_TARGET})
-  add_library(${BOARD_TARGET} STATIC
-    # external driver
-    #lib/sct_neopixel/sct_neopixel.c
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    add_library(${BOARD_TARGET} STATIC
+      # external driver
+      #lib/sct_neopixel/sct_neopixel.c
 
-    # driver
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_gpio.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_common_arm.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpuart.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpflexcomm.c
-    # mcu
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
-    )
-#  target_compile_definitions(${BOARD_TARGET} PUBLIC
-#    )
-  target_include_directories(${BOARD_TARGET} PUBLIC
-    # driver
-    # mcu
-    ${CMSIS_DIR}/CMSIS/Core/Include
-    ${SDK_DIR}/devices/${MCU_VARIANT}
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
-    )
-  update_board(${BOARD_TARGET})
+      # driver
+      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_gpio.c
+      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_common_arm.c
+      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpuart.c
+      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpflexcomm.c
+      # mcu
+      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
+      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
+      ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
+      )
+    #  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    #    )
+    target_include_directories(${BOARD_TARGET} PUBLIC
+      # driver
+      # mcu
+      ${CMSIS_DIR}/CMSIS/Core/Include
+      ${SDK_DIR}/devices/${MCU_VARIANT}
+      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+      )
 
-  if (TOOLCHAIN STREQUAL "gcc")
-    target_sources(${BOARD_TARGET} PUBLIC
-      ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S
-      )
-    cmake_print_variables(CMAKE_CURRENT_BINARY_DIR)
-    target_link_options(${BOARD_TARGET} PUBLIC
-      # linker file
-      "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld"
-      # nanolib
-      --specs=nosys.specs
-      --specs=nano.specs
-      )
-  else ()
-    # TODO support IAR
+    update_board(${BOARD_TARGET})
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_sources(${BOARD_TARGET} PUBLIC
+        ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S
+        )
+      target_link_options(${BOARD_TARGET} PUBLIC
+        # linker file
+        "LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld"
+        # nanolib
+        --specs=nosys.specs
+        --specs=nano.specs
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
   endif ()
-endif () # BOARD_TARGET
+endfunction()
 
 
 #------------------------------------
@@ -75,6 +82,9 @@ endif () # BOARD_TARGET
 function(family_configure_example TARGET)
   family_configure_common(${TARGET})
 
+  # Board target
+  add_board_target(board_${BOARD})
+
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
@@ -95,7 +105,7 @@ function(family_configure_example TARGET)
   family_add_tinyusb(${TARGET} OPT_MCU_MCXN9)
 
   # Link dependencies
-  target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
 
   # Flashing
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/nrf/boards/pca10056/board.cmake b/hw/bsp/nrf/boards/pca10056/board.cmake
index 3137c4fcd..b4fe39fc0 100644
--- a/hw/bsp/nrf/boards/pca10056/board.cmake
+++ b/hw/bsp/nrf/boards/pca10056/board.cmake
@@ -1,5 +1,5 @@
 set(MCU_VARIANT nrf52840)
-set(LD_FILE_GCC ${NRFX_DIR}/mdk/nrf52840_xxaa.ld)
+set(LD_FILE_GNU ${NRFX_DIR}/mdk/nrf52840_xxaa.ld)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/nrf/boards/pca10095/board.cmake b/hw/bsp/nrf/boards/pca10095/board.cmake
index a0562c738..1eb8ad4f1 100644
--- a/hw/bsp/nrf/boards/pca10095/board.cmake
+++ b/hw/bsp/nrf/boards/pca10095/board.cmake
@@ -1,5 +1,5 @@
 set(MCU_VARIANT nrf5340_application)
-set(LD_FILE_GCC ${NRFX_DIR}/mdk/nrf5340_xxaa_application.ld)
+set(LD_FILE_GNU ${NRFX_DIR}/mdk/nrf5340_xxaa_application.ld)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index e94aeb9bd..7faeaf6cb 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -10,9 +10,6 @@ set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
 # include board specific
 include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 
-# enable LTO
-set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
-
 # toolchain set up
 if (MCU_VARIANT STREQUAL "nrf5340_application")
   set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
@@ -26,54 +23,69 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS NRF5X CACHE INTERNAL "")
 
+# enable LTO if supported
+include(CheckIPOSupported)
+check_ipo_supported(RESULT IPO_SUPPORTED)
+if (IPO_SUPPORTED)
+  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+endif ()
 
 #------------------------------------
 # BOARD_TARGET
 #------------------------------------
 # only need to be built ONCE for all examples
-set(BOARD_TARGET board_${BOARD})
-if (NOT TARGET ${BOARD_TARGET})
-  add_library(${BOARD_TARGET} STATIC
-    # driver
-    ${NRFX_DIR}/drivers/src/nrfx_power.c
-    ${NRFX_DIR}/drivers/src/nrfx_uarte.c
-    # mcu
-    ${NRFX_DIR}/mdk/system_${MCU_VARIANT}.c
-    )
-  target_compile_definitions(${BOARD_TARGET} PUBLIC
-    CONFIG_GPIO_AS_PINRESET
-    )
-  target_include_directories(${BOARD_TARGET} PUBLIC
-    ${CMAKE_CURRENT_LIST_DIR}
-    ${NRFX_DIR}
-    ${NRFX_DIR}/mdk
-    ${NRFX_DIR}/hal
-    ${NRFX_DIR}/drivers/include
-    ${NRFX_DIR}/drivers/src
-    ${CMSIS_DIR}/CMSIS/Core/Include
-    )
-  update_board(${BOARD_TARGET})
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    add_library(${BOARD_TARGET} STATIC
+      # driver
+      ${NRFX_DIR}/drivers/src/nrfx_power.c
+      ${NRFX_DIR}/drivers/src/nrfx_uarte.c
+      # mcu
+      ${NRFX_DIR}/mdk/system_${MCU_VARIANT}.c
+      )
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      CONFIG_GPIO_AS_PINRESET
+      )
+    target_include_directories(${BOARD_TARGET} PUBLIC
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+      ${NRFX_DIR}
+      ${NRFX_DIR}/mdk
+      ${NRFX_DIR}/hal
+      ${NRFX_DIR}/drivers/include
+      ${NRFX_DIR}/drivers/src
+      ${CMSIS_DIR}/CMSIS/Core/Include
+      )
 
-  if (NOT DEFINED LD_FILE_${TOOLCHAIN})
-    set(LD_FILE_GCC ${NRFX_DIR}/mdk/${MCU_VARIANT}_xxaa.ld)
-  endif ()
+    update_board(${BOARD_TARGET})
+
+    if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+      set(LD_FILE_GNU ${NRFX_DIR}/mdk/${MCU_VARIANT}_xxaa.ld)
+    endif ()
+
+    if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
+      set(STARTUP_FILE_GNU ${NRFX_DIR}/mdk/gcc_startup_${MCU_VARIANT}.S)
+    endif ()
 
-  if (TOOLCHAIN STREQUAL "gcc")
     target_sources(${BOARD_TARGET} PUBLIC
-      ${NRFX_DIR}/mdk/gcc_startup_${MCU_VARIANT}.S
+      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
       )
-    target_link_options(${BOARD_TARGET} PUBLIC
-      # linker file
-      "LINKER:--script=${LD_FILE_GCC}"
-      -L${NRFX_DIR}/mdk
-      # nanolib
-      --specs=nosys.specs
-      --specs=nano.specs
-      )
-  else ()
-    # TODO support IAR
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        # linker file
+        "LINKER:--script=${LD_FILE_GNU}"
+        -L${NRFX_DIR}/mdk
+        # nanolib
+        --specs=nosys.specs
+        --specs=nano.specs
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
   endif ()
-endif () # BOARD_TARGET
+endfunction()
 
 
 #------------------------------------
@@ -82,6 +94,9 @@ endif () # BOARD_TARGET
 function(family_configure_example TARGET)
   family_configure_common(${TARGET})
 
+  # Board target
+  add_board_target(board_${BOARD})
+
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
@@ -102,7 +117,7 @@ function(family_configure_example TARGET)
   family_add_tinyusb(${TARGET} OPT_MCU_NRF5X)
 
   # Link dependencies
-  target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
 
   # Flashing
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake
index 145490921..1ebf8a700 100644
--- a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake
+++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake
@@ -1,10 +1,10 @@
 #set(MCU_VARIANT MIMXRT1011)
 set(JLINK_DEVICE STM32G0B1RE)
 
-set(LD_FILE_GCC ${CMAKE_CURRENT_LIST_DIR}/STM32G0B1RETx_FLASH.ld)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32G0B1RETx_FLASH.ld)
 set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/stm32g0b1xx_flash.icf)
 
-set(STARTUP_FILE_GCC ${ST_CMSIS}/Source/Templates/gcc/startup_stm32g0b1xx.s)
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_stm32g0b1xx.s)
 set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_stm32g0b1xx.s)
 
 function(update_board TARGET)
diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake
index d77b3c102..988033070 100644
--- a/hw/bsp/stm32g0/family.cmake
+++ b/hw/bsp/stm32g0/family.cmake
@@ -11,8 +11,8 @@ set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver)
 set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY})
 set(CMSIS_5 ${TOP}/lib/CMSIS_5)
 
-# enable LTO
-#set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 
 # toolchain set up
 set(CMAKE_SYSTEM_PROCESSOR cortex-m0plus CACHE INTERNAL "System Processor")
@@ -20,17 +20,21 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS STM32G0 CACHE INTERNAL "")
 
-# include board specific
-include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+# enable LTO if supported
+include(CheckIPOSupported)
+check_ipo_supported(RESULT IPO_SUPPORTED)
+if (IPO_SUPPORTED)
+  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+endif ()
 
 
 #------------------------------------
 # BOARD_TARGET
 #------------------------------------
 # only need to be built ONCE for all examples
-function(add_board_target TARGET)
-  if (NOT TARGET ${TARGET})
-    add_library(${TARGET} STATIC
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    add_library(${BOARD_TARGET} STATIC
       ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
@@ -42,30 +46,31 @@ function(add_board_target TARGET)
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
       ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
       )
-    target_include_directories(${TARGET} PUBLIC
+    target_include_directories(${BOARD_TARGET} PUBLIC
       ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
       ${CMSIS_5}/CMSIS/Core/Include
       ${ST_CMSIS}/Include
       ${ST_HAL_DRIVER}/Inc
       )
-    target_compile_options(${TARGET} PUBLIC
+    target_compile_options(${BOARD_TARGET} PUBLIC
       )
-    target_compile_definitions(${TARGET} PUBLIC
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
       )
 
-    update_board(${TARGET})
+    update_board(${BOARD_TARGET})
 
-    if (CMAKE_C_COMPILER_ID STREQUAL "GCC")
-      target_link_options(${TARGET} PUBLIC
-        "LINKER:--script=${LD_FILE_GCC}"
+    cmake_print_variables(CMAKE_C_COMPILER_ID)
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--script=${LD_FILE_GNU}"
         -nostartfiles
         # nanolib
         --specs=nosys.specs
         --specs=nano.specs
         )
     elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-      # TODO support IAR
-      target_link_options(${TARGET} PUBLIC
+      target_link_options(${BOARD_TARGET} PUBLIC
         "LINKER:--config=${LD_FILE_IAR}"
         )
     endif ()
diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake
index 3a4849ef6..9b72672ea 100644
--- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake
+++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake
@@ -1,10 +1,10 @@
 set(MCU_VARIANT stm32g474xx)
 set(JLINK_DEVICE stm32g474re)
 
-set(LD_FILE_GCC ${CMAKE_CURRENT_LIST_DIR}/STM32G474RETx_FLASH.ld)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32G474RETx_FLASH.ld)
 set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
 
-set(STARTUP_FILE_GCC ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
 set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
 
 function(update_board TARGET)
diff --git a/hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake b/hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake
index f13f1fc28..88cd616b3 100644
--- a/hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake
+++ b/hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake
@@ -1,10 +1,10 @@
 set(MCU_VARIANT stm32g474xx)
 set(JLINK_DEVICE stm32g474re)
 
-set(LD_FILE_GCC ${CMAKE_CURRENT_LIST_DIR}/STM32G474RETx_FLASH.ld)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32G474RETx_FLASH.ld)
 set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
 
-set(STARTUP_FILE_GCC ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
 set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
 
 function(update_board TARGET)
diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake
index c87486677..ab17c0980 100644
--- a/hw/bsp/stm32g4/family.cmake
+++ b/hw/bsp/stm32g4/family.cmake
@@ -11,8 +11,8 @@ set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver)
 set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY})
 set(CMSIS_5 ${TOP}/lib/CMSIS_5)
 
-# enable LTO
-set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 
 # toolchain set up
 set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
@@ -20,58 +20,60 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS STM32G4 CACHE INTERNAL "")
 
-# include board specific
-include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+# enable LTO if supported
+include(CheckIPOSupported)
+check_ipo_supported(RESULT IPO_SUPPORTED)
+if (IPO_SUPPORTED)
+  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+endif ()
 
 
 #------------------------------------
 # BOARD_TARGET
 #------------------------------------
 # only need to be built ONCE for all examples
-set(BOARD_TARGET board_${BOARD})
-if (NOT TARGET ${BOARD_TARGET})
-  add_library(${BOARD_TARGET} STATIC
-    ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
-    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
-    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
-    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
-    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
-    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
-    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
-    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
-    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
-    )
-  target_include_directories(${BOARD_TARGET} PUBLIC
-    ${CMAKE_CURRENT_LIST_DIR}
-    ${CMSIS_5}/CMSIS/Core/Include
-    ${ST_CMSIS}/Include
-    ${ST_HAL_DRIVER}/Inc
-    )
-  target_compile_options(${BOARD_TARGET} PUBLIC
-    )
-  target_compile_definitions(${BOARD_TARGET} PUBLIC
-    )
-  update_board(${BOARD_TARGET})
-
-  target_sources(${BOARD_TARGET} PUBLIC
-    ${STARTUP_FILE_${TOOLCHAIN}}
-    )
-
-  if (TOOLCHAIN STREQUAL "gcc")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GCC}"
-      -nostartfiles
-      # nanolib
-      --specs=nosys.specs
-      --specs=nano.specs
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    add_library(${BOARD_TARGET} STATIC
+      ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
+      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
       )
-  else ()
-    # TODO support IAR
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
+    target_include_directories(${BOARD_TARGET} PUBLIC
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+      ${CMSIS_5}/CMSIS/Core/Include
+      ${ST_CMSIS}/Include
+      ${ST_HAL_DRIVER}/Inc
       )
+    target_compile_options(${BOARD_TARGET} PUBLIC
+      )
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      )
+
+    update_board(${BOARD_TARGET})
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--script=${LD_FILE_GNU}"
+        -nostartfiles
+        # nanolib
+        --specs=nosys.specs
+        --specs=nano.specs
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
   endif ()
-endif () # BOARD_TARGET
+endfunction()
 
 
 #------------------------------------
@@ -80,6 +82,9 @@ endif () # BOARD_TARGET
 function(family_configure_example TARGET)
   family_configure_common(${TARGET})
 
+  # Board target
+  add_board_target(board_${BOARD})
+
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
@@ -100,7 +105,7 @@ function(family_configure_example TARGET)
   family_add_tinyusb(${TARGET} OPT_MCU_STM32G4)
 
   # Link dependencies
-  target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET} ${TARGET}-tinyusb)
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
 
   # Flashing
   family_flash_stlink(${TARGET})
diff --git a/tools/cmake/cpu/cortex-m3.cmake b/tools/cmake/cpu/cortex-m3.cmake
index b740ee44c..f6f5a62f8 100644
--- a/tools/cmake/cpu/cortex-m3.cmake
+++ b/tools/cmake/cpu/cortex-m3.cmake
@@ -1,10 +1,16 @@
 if (TOOLCHAIN STREQUAL "gcc")
-  list(APPEND TOOLCHAIN_COMMON_FLAGS
+  set(TOOLCHAIN_COMMON_FLAGS
     -mthumb
     -mcpu=cortex-m3
     )
 
   set(FREERTOS_PORT GCC_ARM_CM3 CACHE INTERNAL "")
-else ()
-  # TODO support IAR
+
+elseif (TOOLCHAIN STREQUAL "iar")
+  set(TOOLCHAIN_COMMON_FLAGS
+    --cpu cortex-m3
+    )
+
+  set(FREERTOS_PORT IAR_ARM_CM3 CACHE INTERNAL "")
+
 endif ()
diff --git a/tools/cmake/cpu/cortex-m33.cmake b/tools/cmake/cpu/cortex-m33.cmake
index fda277010..7ebaf1748 100644
--- a/tools/cmake/cpu/cortex-m33.cmake
+++ b/tools/cmake/cpu/cortex-m33.cmake
@@ -1,5 +1,5 @@
 if (TOOLCHAIN STREQUAL "gcc")
-  list(APPEND TOOLCHAIN_COMMON_FLAGS
+  set(TOOLCHAIN_COMMON_FLAGS
     -mthumb
     -mcpu=cortex-m33
     -mfloat-abi=hard
@@ -7,6 +7,13 @@ if (TOOLCHAIN STREQUAL "gcc")
     )
 
   set(FREERTOS_PORT GCC_ARM_CM33_NTZ_NONSECURE CACHE INTERNAL "")
-else ()
-  # TODO support IAR
+
+elseif (TOOLCHAIN STREQUAL "iar")
+  set(TOOLCHAIN_COMMON_FLAGS
+    --cpu cortex-m33
+    --fpu VFPv5-SP
+    )
+
+  set(FREERTOS_PORT IAR_ARM_CM4F CACHE INTERNAL "")
+
 endif ()
diff --git a/tools/cmake/cpu/cortex-m4.cmake b/tools/cmake/cpu/cortex-m4.cmake
index 5a2d16c05..a0cf3498f 100644
--- a/tools/cmake/cpu/cortex-m4.cmake
+++ b/tools/cmake/cpu/cortex-m4.cmake
@@ -1,5 +1,5 @@
 if (TOOLCHAIN STREQUAL "gcc")
-  list(APPEND TOOLCHAIN_COMMON_FLAGS
+  set(TOOLCHAIN_COMMON_FLAGS
     -mthumb
     -mcpu=cortex-m4
     -mfloat-abi=hard
@@ -7,6 +7,13 @@ if (TOOLCHAIN STREQUAL "gcc")
     )
 
   set(FREERTOS_PORT GCC_ARM_CM4F CACHE INTERNAL "")
-else ()
-  # TODO support IAR
+
+elseif (TOOLCHAIN STREQUAL "iar")
+  set(TOOLCHAIN_COMMON_FLAGS
+    --cpu cortex-m4
+    --fpu VFPv4
+    )
+
+  set(FREERTOS_PORT IAR_ARM_CM4F CACHE INTERNAL "")
+
 endif ()
diff --git a/tools/cmake/cpu/cortex-m7.cmake b/tools/cmake/cpu/cortex-m7.cmake
index 481c86bc5..3e5f7f44b 100644
--- a/tools/cmake/cpu/cortex-m7.cmake
+++ b/tools/cmake/cpu/cortex-m7.cmake
@@ -1,5 +1,5 @@
 if (TOOLCHAIN STREQUAL "gcc")
-  list(APPEND TOOLCHAIN_COMMON_FLAGS
+  set(TOOLCHAIN_COMMON_FLAGS
     -mthumb
     -mcpu=cortex-m7
     -mfloat-abi=hard
@@ -7,6 +7,13 @@ if (TOOLCHAIN STREQUAL "gcc")
     )
 
   set(FREERTOS_PORT GCC_ARM_CM7 CACHE INTERNAL "")
-else ()
-  # TODO support IAR
+
+elseif (TOOLCHAIN STREQUAL "iar")
+  set(TOOLCHAIN_COMMON_FLAGS
+    --cpu cortex-m7
+    --fpu VFPv5_D16
+    )
+
+  set(FREERTOS_PORT IAR_ARM_CM7 CACHE INTERNAL "")
+
 endif ()

From c2bc363f06b81e1758122167d58c40817c4d2e27 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 2 Jun 2023 16:11:00 +0700
Subject: [PATCH 380/691] build g0 g4 iar cmake

---
 .github/workflows/build_iar.yml               |  28 ++-
 .../stm32g4/FreeRTOSConfig/FreeRTOSConfig.h   | 166 ++++++++++++++++++
 tools/build_cmake.py                          |  25 +--
 3 files changed, 208 insertions(+), 11 deletions(-)
 create mode 100644 hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h

diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml
index 3da5ed40f..da741bbcf 100644
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@@ -23,7 +23,7 @@ concurrency:
   cancel-in-progress: true
 
 jobs:
-  build-arm:
+  makefile:
     runs-on: [self-hosted, Linux, X64, hifiphile]
     strategy:
       fail-fast: false
@@ -48,3 +48,29 @@ jobs:
 
     - name: Build
       run: python3 tools/build_family.py ${{ matrix.family }} CC=iccarm
+
+  cmake:
+    runs-on: [self-hosted, Linux, X64, hifiphile]
+    strategy:
+      fail-fast: false
+      matrix:
+        family:
+          # Alphabetical order
+          # Note: bundle multiple families into a matrix since there is only one self-hosted instance can
+          # run IAR build. Too many matrix can hurt due to setup/teardown overhead.
+          - 'stm32g0 stm32g4'
+    steps:
+      - name: Clean workspace
+        run: |
+          echo "Cleaning up previous run"
+          rm -rf "${{ github.workspace }}"
+          mkdir -p "${{ github.workspace }}"
+
+      - name: Checkout TinyUSB
+        uses: actions/checkout@v3
+
+      - name: Get Dependencies
+        run: python3 tools/get_deps.py ${{ matrix.family }}
+
+      - name: Build
+        run: python3 tools/build_family.py ${{ matrix.family }} -DTOOLCHAIN=iccarm
diff --git a/hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..7974434d3
--- /dev/null
+++ b/hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,166 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// IAR assembler have limited preprocessor support and it only need following macros:
+#ifndef __IASMARM__
+// FIXME cause redundant-decls warnings
+extern uint32_t SystemCoreClock;
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU						0
+#define configENABLE_FPU						0
+#define configENABLE_TRUSTZONE					0
+#define configMINIMAL_SECURE_STACK_SIZE			(1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               2
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       4
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/tools/build_cmake.py b/tools/build_cmake.py
index d85726213..140105620 100644
--- a/tools/build_cmake.py
+++ b/tools/build_cmake.py
@@ -13,7 +13,7 @@ SKIPPED = "\033[33mskipped\033[0m"
 
 build_separator = '-' * 106
 
-make_iar_option = 'CC=iccarm'
+toolchain_iar = '-DTOOLCHAIN=iar'
 
 def filter_with_input(mylist):
     if len(sys.argv) > 1:
@@ -22,7 +22,7 @@ def filter_with_input(mylist):
             mylist[:] = input_args
 
 
-def build_family(family, make_option):
+def build_family(family, toolchain_option):
     all_boards = []
     for entry in os.scandir("hw/bsp/{}/boards".format(family)):
         if entry.is_dir() and entry.name != 'pico_sdk':
@@ -38,7 +38,7 @@ def build_family(family, make_option):
 
         # Generate build
         r = subprocess.run(f"cmake examples -B {build_dir} -G \"Ninja\" -DFAMILY={family} -DBOARD"
-                           f"={board}", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+                           f"={board} {toolchain_option}", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
 
         # Build
         if r.returncode == 0:
@@ -57,21 +57,26 @@ def build_family(family, make_option):
         flash_size = "-"
         sram_size = "-"
         example = 'all'
-        print(build_utils.build_format.format(example, board, status, "{:.2f}s".format(duration), flash_size, sram_size))
+        title = build_utils.build_format.format(example, board, status, "{:.2f}s".format(duration), flash_size, sram_size)
 
-        if r.returncode != 0:
-            # group output in CI
-            print(f"::group::{board} build error")
+        if os.getenv('CI'):
+            # always print build output if in CI
+            print(f"::group::{title} build error")
             print(r.stdout.decode("utf-8"))
             print(f"::endgroup::")
+        else:
+            # print build output if failed
+            print(title)
+            if r.returncode != 0:
+                print(r.stdout.decode("utf-8"))
 
     return ret
 
 
 if __name__ == '__main__':
     # IAR CC
-    if make_iar_option not in sys.argv:
-        make_iar_option = ''
+    if toolchain_iar not in sys.argv:
+        toolchain_iar = ''
 
     # If family are not specified in arguments, build all supported
     all_families = []
@@ -88,7 +93,7 @@ if __name__ == '__main__':
     # succeeded, failed, skipped
     total_result = [0, 0, 0]
     for family in all_families:
-        fret = build_family(family, make_iar_option)
+        fret = build_family(family, toolchain_iar)
         if len(fret) == len(total_result):
             total_result = [total_result[i] + fret[i] for i in range(len(fret))]
 

From 11fb837b51417ec41b8244ebbbab828b9f3fce37 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 2 Jun 2023 16:15:26 +0700
Subject: [PATCH 381/691] fix ci

---
 .github/workflows/build_iar.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml
index da741bbcf..83e81164a 100644
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@@ -73,4 +73,4 @@ jobs:
         run: python3 tools/get_deps.py ${{ matrix.family }}
 
       - name: Build
-        run: python3 tools/build_family.py ${{ matrix.family }} -DTOOLCHAIN=iccarm
+        run: python3 tools/build_cmake.py ${{ matrix.family }} -DTOOLCHAIN=iccarm

From 2016ad72f3dad74ee752943ab29c687a82687255 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 2 Jun 2023 16:21:49 +0700
Subject: [PATCH 382/691] fix iar ci

---
 tools/build_cmake.py | 2 +-
 tools/build_utils.py | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/tools/build_cmake.py b/tools/build_cmake.py
index 140105620..eb7375ae2 100644
--- a/tools/build_cmake.py
+++ b/tools/build_cmake.py
@@ -61,7 +61,7 @@ def build_family(family, toolchain_option):
 
         if os.getenv('CI'):
             # always print build output if in CI
-            print(f"::group::{title} build error")
+            print(f"::group::{title}")
             print(r.stdout.decode("utf-8"))
             print(f"::endgroup::")
         else:
diff --git a/tools/build_utils.py b/tools/build_utils.py
index ec850e732..6f907729b 100644
--- a/tools/build_utils.py
+++ b/tools/build_utils.py
@@ -47,6 +47,7 @@ def skip_example(example, board):
 
         mk_contents = board_mk.read_text()
 
+    mcu = "NONE"
     for token in mk_contents.split():
         if "CFG_TUSB_MCU=OPT_MCU_" in token:
             # Strip " because cmake files has them.

From 268ab5863a3437c804d6db0ea5dc9f90560e9ffc Mon Sep 17 00:00:00 2001
From: Aladdin Bakosh <aladdin.bakosh@emerson.com>
Date: Wed, 24 May 2023 14:08:42 +0200
Subject: [PATCH 383/691] fix(RA Host Portable): git rid of the IAR warnings
 for packed

---
 src/portable/renesas/rusb2/rusb2_type.h | 146 ++++++++++++------------
 1 file changed, 73 insertions(+), 73 deletions(-)

diff --git a/src/portable/renesas/rusb2/rusb2_type.h b/src/portable/renesas/rusb2/rusb2_type.h
index 7a2898366..d80ecc62e 100644
--- a/src/portable/renesas/rusb2/rusb2_type.h
+++ b/src/portable/renesas/rusb2/rusb2_type.h
@@ -41,11 +41,11 @@ extern "C" {
 TU_ATTR_PACKED_BEGIN
 TU_ATTR_BIT_FIELD_ORDER_BEGIN
 
-typedef struct TU_ATTR_PACKED {
+typedef struct {
   union {
     volatile uint16_t E; /* (@ 0x00000000) Pipe Transaction Counter Enable Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       uint16_t : 8;
       volatile uint16_t TRCLR : 1; /* [8..8] Transaction Counter Clear */
       volatile uint16_t TRENB : 1; /* [9..9] Transaction Counter Enable */
@@ -56,18 +56,18 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t N; /* (@ 0x00000002) Pipe Transaction Counter Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t TRNCNT : 16; /* [15..0] Transaction Counter */
     } N_b;
   };
 } RUSB2_PIPE_TR_t; /* Size = 4 (0x4) */
 
 /* LINK_REG Structure */
-typedef struct TU_ATTR_PACKED {
+typedef struct {
   union {
     volatile uint16_t SYSCFG; /* (@ 0x00000000) System Configuration Control Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t USBE  : 1; /* [0..0] USB Operation Enable */
       uint16_t                : 2;
       volatile uint16_t DMRPU : 1; /* [3..3] D- Line Resistor Control */
@@ -85,7 +85,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t BUSWAIT; /* (@ 0x00000002) CPU Bus Wait Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t BWAIT : 4; /* [3..0] CPU Bus Access Wait Specification BWAIT waits (BWAIT+2 access cycles) */
       uint16_t : 12;
     } BUSWAIT_b;
@@ -94,7 +94,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile const uint16_t SYSSTS0; /* (@ 0x00000004) System Configuration Status Register 0 */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile const uint16_t LNST   : 2; /* [1..0] USB Data Line Status Monitor */
       volatile const uint16_t IDMON  : 1; /* [2..2] External ID0 Input Pin Monitor */
       uint16_t                       : 2;
@@ -109,7 +109,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile const uint16_t PLLSTA; /* (@ 0x00000006) PLL Status Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile const uint16_t PLLLOCK : 1; /* [0..0] PLL Lock Flag */
       uint16_t : 15;
     } PLLSTA_b;
@@ -118,7 +118,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t DVSTCTR0; /* (@ 0x00000008) Device State Control Register 0 */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile const uint16_t RHST : 3; /* [2..0] USB Bus Reset Status */
       uint16_t                     : 1;
       volatile uint16_t UACT       : 1; /* [4..4] USB Bus Enable */
@@ -137,7 +137,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t TESTMODE; /* (@ 0x0000000C) USB Test Mode Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t UTST : 4; /* [3..0] Test Mode */
       uint16_t : 12;
     } TESTMODE_b;
@@ -148,7 +148,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint32_t CFIFO; /* (@ 0x00000014) CFIFO Port Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       union {
         volatile uint16_t CFIFOL; /* (@ 0x00000014) CFIFO Port Register L */
         volatile uint8_t CFIFOLL; /* (@ 0x00000014) CFIFO Port Register LL */
@@ -157,7 +157,7 @@ typedef struct TU_ATTR_PACKED {
       union {
         volatile uint16_t CFIFOH; /* (@ 0x00000016) CFIFO Port Register H */
 
-        struct {
+        struct TU_ATTR_PACKED {
           volatile const uint8_t RESERVED3;
           volatile uint8_t CFIFOHH; /* (@ 0x00000017) CFIFO Port Register HH */
         };
@@ -168,7 +168,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint32_t D0FIFO; /* (@ 0x00000018) D0FIFO Port Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       union {
         volatile uint16_t D0FIFOL; /* (@ 0x00000018) D0FIFO Port Register L */
         volatile uint8_t D0FIFOLL; /* (@ 0x00000018) D0FIFO Port Register LL */
@@ -177,7 +177,7 @@ typedef struct TU_ATTR_PACKED {
       union {
         volatile uint16_t D0FIFOH; /* (@ 0x0000001A) D0FIFO Port Register H */
 
-        struct {
+        struct TU_ATTR_PACKED {
           volatile const uint8_t RESERVED4;
           volatile uint8_t D0FIFOHH; /* (@ 0x0000001B) D0FIFO Port Register HH */
         };
@@ -188,7 +188,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint32_t D1FIFO; /* (@ 0x0000001C) D1FIFO Port Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       union {
         volatile uint16_t D1FIFOL; /* (@ 0x0000001C) D1FIFO Port Register L */
         volatile uint8_t D1FIFOLL; /* (@ 0x0000001C) D1FIFO Port Register LL */
@@ -197,7 +197,7 @@ typedef struct TU_ATTR_PACKED {
       union {
         volatile uint16_t D1FIFOH; /* (@ 0x0000001E) D1FIFO Port Register H */
 
-        struct {
+        struct TU_ATTR_PACKED {
           volatile const uint8_t RESERVED5;
           volatile uint8_t D1FIFOHH; /* (@ 0x0000001F) D1FIFO Port Register HH */
         };
@@ -208,7 +208,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t CFIFOSEL; /* (@ 0x00000020) CFIFO Port Select Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t CURPIPE : 4; /* [3..0] CFIFO Port Access Pipe Specification */
       uint16_t                  : 1;
       volatile uint16_t ISEL    : 1; /* [5..5] CFIFO Port Access Direction When DCP is Selected */
@@ -225,12 +225,12 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t CFIFOCTR; /* (@ 0x00000022) CFIFO Port Control Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile const uint16_t DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */
       uint16_t                     : 1;
       volatile const uint16_t FRDY : 1;  /* [13..13] FIFO Port Ready */
-      volatile uint16_t BCLR       : 1;	 /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */
-      volatile uint16_t BVAL       : 1;	 /* [15..15] Buffer Memory Valid Flag */
+      volatile uint16_t BCLR       : 1;  /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */
+      volatile uint16_t BVAL       : 1;  /* [15..15] Buffer Memory Valid Flag */
     } CFIFOCTR_b;
   };
   volatile const uint32_t RESERVED6;
@@ -238,7 +238,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t D0FIFOSEL; /* (@ 0x00000028) D0FIFO Port Select Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t CURPIPE : 4; /* [3..0] FIFO Port Access Pipe Specification */
       uint16_t                  : 4;
       volatile uint16_t BIGEND  : 1; /* [8..8] FIFO Port Endian Control */
@@ -254,19 +254,19 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t D0FIFOCTR; /* (@ 0x0000002A) D0FIFO Port Control Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile const uint16_t DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */
       uint16_t                     : 1;
       volatile const uint16_t FRDY : 1;  /* [13..13] FIFO Port Ready */
-      volatile uint16_t BCLR       : 1;	 /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */
-      volatile uint16_t BVAL       : 1;	 /* [15..15] Buffer Memory Valid Flag */
+      volatile uint16_t BCLR       : 1;  /* [14..14] CPU Buffer ClearNote: Only 0 can be read. */
+      volatile uint16_t BVAL       : 1;  /* [15..15] Buffer Memory Valid Flag */
     } D0FIFOCTR_b;
   };
 
   union {
     volatile uint16_t D1FIFOSEL; /* (@ 0x0000002C) D1FIFO Port Select Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t CURPIPE : 4; /* [3..0] FIFO Port Access Pipe Specification */
       uint16_t                  : 4;
       volatile uint16_t BIGEND  : 1; /* [8..8] FIFO Port Endian Control */
@@ -282,7 +282,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t D1FIFOCTR; /* (@ 0x0000002E) D1FIFO Port Control Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile const uint16_t DTLN : 12; /* [11..0] Receive Data LengthIndicates the length of the receive data. */
       uint16_t                     : 1;
       volatile const uint16_t FRDY : 1;  /* [13..13] FIFO Port Ready */
@@ -294,7 +294,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t INTENB0; /* (@ 0x00000030) Interrupt Enable Register 0 */
 
-    struct {
+    struct TU_ATTR_PACKED {
       uint16_t : 8;
       volatile uint16_t BRDYE : 1; /* [8..8] Buffer Ready Interrupt Enable */
       volatile uint16_t NRDYE : 1; /* [9..9] Buffer Not Ready Response Interrupt Enable */
@@ -310,7 +310,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t INTENB1; /* (@ 0x00000032) Interrupt Enable Register 1 */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t PDDETINTE0 : 1; /* [0..0] PDDETINT0 Detection Interrupt Enable */
       uint16_t                     : 3;
       volatile uint16_t SACKE      : 1; /* [4..4] Setup Transaction Normal Response Interrupt Enable */
@@ -329,7 +329,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t BRDYENB; /* (@ 0x00000036) BRDY Interrupt Enable Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t PIPE0BRDYE : 1; /* [0..0] BRDY Interrupt Enable for PIPE */
       volatile uint16_t PIPE1BRDYE : 1; /* [1..1] BRDY Interrupt Enable for PIPE */
       volatile uint16_t PIPE2BRDYE : 1; /* [2..2] BRDY Interrupt Enable for PIPE */
@@ -347,7 +347,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t NRDYENB; /* (@ 0x00000038) NRDY Interrupt Enable Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t PIPE0NRDYE : 1; /* [0..0] NRDY Interrupt Enable for PIPE */
       volatile uint16_t PIPE1NRDYE : 1; /* [1..1] NRDY Interrupt Enable for PIPE */
       volatile uint16_t PIPE2NRDYE : 1; /* [2..2] NRDY Interrupt Enable for PIPE */
@@ -365,7 +365,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t BEMPENB; /* (@ 0x0000003A) BEMP Interrupt Enable Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t PIPE0BEMPE : 1; /* [0..0] BEMP Interrupt Enable for PIPE */
       volatile uint16_t PIPE1BEMPE : 1; /* [1..1] BEMP Interrupt Enable for PIPE */
       volatile uint16_t PIPE2BEMPE : 1; /* [2..2] BEMP Interrupt Enable for PIPE */
@@ -383,7 +383,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t SOFCFG; /* (@ 0x0000003C) SOF Output Configuration Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       uint16_t                        : 4;
       volatile const uint16_t EDGESTS : 1; /* [4..4] Edge Interrupt Output Status Monitor */
       volatile uint16_t INTL          : 1; /* [5..5] Interrupt Output Sense Select */
@@ -397,7 +397,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t PHYSET; /* (@ 0x0000003E) PHY Setting Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t DIRPD    : 1; /* [0..0] Power-Down Control */
       volatile uint16_t PLLRESET : 1; /* [1..1] PLL Reset Control */
       uint16_t                   : 1;
@@ -415,7 +415,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t INTSTS0; /* (@ 0x00000040) Interrupt Status Register 0 */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile const uint16_t CTSQ  : 3; /* [2..0] Control Transfer Stage */
       volatile uint16_t VALID       : 1; /* [3..3] USB Request Reception */
       volatile const uint16_t DVSQ  : 3; /* [6..4] Device State */
@@ -434,7 +434,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t INTSTS1; /* (@ 0x00000042) Interrupt Status Register 1 */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t PDDETINT0 : 1; /* [0..0] PDDET0 Detection Interrupt Status */
       uint16_t                    : 3;
       volatile uint16_t SACK      : 1; /* [4..4] Setup Transaction Normal Response Interrupt Status */
@@ -456,7 +456,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t BRDYSTS; /* (@ 0x00000046) BRDY Interrupt Status Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t PIPE0BRDY : 1; /* [0..0] BRDY Interrupt Status for PIPE */
       volatile uint16_t PIPE1BRDY : 1; /* [1..1] BRDY Interrupt Status for PIPE */
       volatile uint16_t PIPE2BRDY : 1; /* [2..2] BRDY Interrupt Status for PIPE */
@@ -474,7 +474,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t NRDYSTS; /* (@ 0x00000048) NRDY Interrupt Status Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t PIPE0NRDY : 1; /* [0..0] NRDY Interrupt Status for PIPE */
       volatile uint16_t PIPE1NRDY : 1; /* [1..1] NRDY Interrupt Status for PIPE */
       volatile uint16_t PIPE2NRDY : 1; /* [2..2] NRDY Interrupt Status for PIPE */
@@ -492,7 +492,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t BEMPSTS; /* (@ 0x0000004A) BEMP Interrupt Status Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t PIPE0BEMP : 1; /* [0..0] BEMP Interrupt Status for PIPE */
       volatile uint16_t PIPE1BEMP : 1; /* [1..1] BEMP Interrupt Status for PIPE */
       volatile uint16_t PIPE2BEMP : 1; /* [2..2] BEMP Interrupt Status for PIPE */
@@ -510,7 +510,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t FRMNUM; /* (@ 0x0000004C) Frame Number Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile const uint16_t FRNM : 11; /* [10..0] Frame NumberLatest frame number */
       uint16_t                     : 3;
       volatile uint16_t CRCE       : 1; /* [14..14] Receive Data Error */
@@ -521,7 +521,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t UFRMNUM; /* (@ 0x0000004E) uFrame Number Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile const uint16_t UFRNM : 3; /* [2..0] MicroframeIndicate the microframe number. */
       uint16_t                      : 12;
       volatile uint16_t DVCHG       : 1; /* [15..15] Device State Change */
@@ -531,7 +531,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t USBADDR; /* (@ 0x00000050) USB Address Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile const uint16_t USBADDR : 7; /* [6..0] USB Address In device controller mode */
       uint16_t                        : 1;
       volatile uint16_t STSRECOV0     : 3; /* [10..8] Status Recovery */
@@ -543,7 +543,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t USBREQ; /* (@ 0x00000054) USB Request Type Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t BMREQUESTTYPE : 8; /* [7..0] Request TypeThese bits store the USB request bmRequestType value. */
       volatile uint16_t BREQUEST      : 8; /* [15..8] RequestThese bits store the USB request bRequest value. */
     } USBREQ_b;
@@ -552,7 +552,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t USBVAL; /* (@ 0x00000056) USB Request Value Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t WVALUE : 16; /* [15..0] ValueThese bits store the USB request Value value. */
     } USBVAL_b;
   };
@@ -560,7 +560,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t USBINDX; /* (@ 0x00000058) USB Request Index Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t WINDEX : 16; /* [15..0] IndexThese bits store the USB request wIndex value. */
     } USBINDX_b;
   };
@@ -568,7 +568,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t USBLENG; /* (@ 0x0000005A) USB Request Length Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t WLENGTH : 16; /* [15..0] LengthThese bits store the USB request wLength value. */
     } USBLENG_b;
   };
@@ -576,7 +576,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t DCPCFG; /* (@ 0x0000005C) DCP Configuration Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       uint16_t                 : 4;
       volatile uint16_t DIR    : 1; /* [4..4] Transfer Direction */
       uint16_t                 : 2;
@@ -589,7 +589,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t DCPMAXP; /* (@ 0x0000005E) DCP Maximum Packet Size Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t MXPS   : 7; /* [6..0] Maximum Packet Size */
       uint16_t                 : 5;
       volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */
@@ -599,7 +599,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t DCPCTR; /* (@ 0x00000060) DCP Control Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t PID         : 2; /* [1..0] Response PID */
       volatile uint16_t CCPL        : 1; /* [2..2] Control Transfer End Enable */
       uint16_t                      : 2;
@@ -619,7 +619,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t PIPESEL; /* (@ 0x00000064) Pipe Window Select Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t PIPESEL : 4; /* [3..0] Pipe Window Select */
       uint16_t : 12;
     } PIPESEL_b;
@@ -629,7 +629,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t PIPECFG;      /* (@ 0x00000068) Pipe Configuration Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t EPNUM  : 4; /* [3..0] Endpoint Number */
       volatile uint16_t DIR    : 1; /* [4..4] Transfer Direction */
       uint16_t                 : 2;
@@ -646,7 +646,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t PIPEMAXP; /* (@ 0x0000006C) Pipe Maximum Packet Size Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t MXPS   : 9; /* [8..0] Maximum Packet Size */
       uint16_t                 : 3;
       volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */
@@ -656,7 +656,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t PIPEPERI; /* (@ 0x0000006E) Pipe Cycle Control Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t IITV : 3; /* [2..0] Interval Error Detection Interval */
       uint16_t               : 9;
       volatile uint16_t IFIS : 1; /* [12..12] Isochronous IN Buffer Flush */
@@ -667,7 +667,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t PIPE_CTR[9];        /* (@ 0x00000070) Pipe [0..8] Control Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t PID          : 2; /* [1..0] Response PID */
       uint16_t                       : 3;
       volatile const uint16_t PBUSY  : 1; /* [5..5] Pipe Busy */
@@ -691,7 +691,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t USBBCCTRL0;             /* (@ 0x000000B0) BC Control Register 0 */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t RPDME0           : 1; /* [0..0] D- Pin Pull-Down Control */
       volatile uint16_t IDPSRCE0         : 1; /* [1..1] D+ Pin IDPSRC Output Control */
       volatile uint16_t
@@ -713,7 +713,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t UCKSEL; /* (@ 0x000000C4) USB Clock Selection Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t UCKSELC : 1; /* [0..0] USB Clock Selection */
       uint16_t : 15;
     } UCKSEL_b;
@@ -724,7 +724,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t USBMC; /* (@ 0x000000CC) USB Module Control Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t VDDUSBE : 1; /* [0..0] USB Reference Power Supply Circuit On/Off Control */
       uint16_t                  : 6;
       volatile uint16_t VDCEN   : 1; /* [7..7] USB Regulator On/Off Control */
@@ -736,7 +736,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t DEVADD[10]; /* (@ 0x000000D0) Device Address Configuration Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       uint16_t : 6;
       volatile uint16_t USBSPD  : 2; /* [7..6] Transfer Speed of Communication Target Device */
       volatile uint16_t HUBPORT : 3; /* [10..8] Communication Target Connecting Hub Port */
@@ -749,7 +749,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint32_t PHYSLEW; /* (@ 0x000000F0) PHY Cross Point Adjustment Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint32_t SLEWR00 : 1; /* [0..0] Receiver Cross Point Adjustment 00 */
       volatile uint32_t SLEWR01 : 1; /* [1..1] Receiver Cross Point Adjustment 01 */
       volatile uint32_t SLEWF00 : 1; /* [2..2] Receiver Cross Point Adjustment 00 */
@@ -762,7 +762,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t LPCTRL; /* (@ 0x00000100) Low Power Control Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       uint16_t : 7;
       volatile uint16_t HWUPM : 1; /* [7..7] Resume Return Mode Setting */
       uint16_t : 8;
@@ -772,7 +772,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t LPSTS; /* (@ 0x00000102) Low Power Status Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       uint16_t : 14;
       volatile uint16_t SUSPENDM : 1; /* [14..14] UTMI SuspendM Control */
       uint16_t : 1;
@@ -783,7 +783,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t BCCTRL; /* (@ 0x00000140) Battery Charging Control Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t IDPSRCE         : 1; /* [0..0] IDPSRC Control */
       volatile uint16_t IDMSINKE        : 1; /* [1..1] IDMSINK Control */
       volatile uint16_t VDPSRCE         : 1; /* [2..2] VDPSRC Control */
@@ -801,7 +801,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t PL1CTRL1; /* (@ 0x00000144) Function L1 Control Register 1 */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t L1RESPEN   : 1; /* [0..0] L1 Response Enable */
       volatile uint16_t L1RESPMD   : 2; /* [2..1] L1 Response Mode */
       volatile uint16_t L1NEGOMD   : 1; /* [3..3] L1 Response Negotiation Control. */
@@ -816,7 +816,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t PL1CTRL2; /* (@ 0x00000146) Function L1 Control Register 2 */
 
-    struct {
+    struct TU_ATTR_PACKED {
       uint16_t : 8;
       volatile uint16_t HIRDMON : 4; /* [11..8] HIRD Value Monitor */
       volatile uint16_t RWEMON  : 1;  /* [12..12] RWE Value Monitor */
@@ -827,8 +827,8 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t HL1CTRL1; /* (@ 0x00000148) Host L1 Control Register 1 */
 
-    struct {
-      volatile uint16_t L1REQ          : 1;	      /* [0..0] L1 Transition Request */
+    struct TU_ATTR_PACKED {
+      volatile uint16_t L1REQ          : 1;       /* [0..0] L1 Transition Request */
       volatile const uint16_t L1STATUS : 2; /* [2..1] L1 Request Completion Status */
       uint16_t : 13;
     } HL1CTRL1_b;
@@ -837,7 +837,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t HL1CTRL2; /* (@ 0x0000014A) Host L1 Control Register 2 */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint16_t L1ADDR : 4; /* [3..0] LPM Token DeviceAddress */
       uint16_t                 : 4;
       volatile uint16_t HIRD   : 4; /* [11..8] LPM Token HIRD */
@@ -851,7 +851,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile const uint32_t DPUSR0R; /* (@ 0x00000160) Deep Standby USB Transceiver Control/Pin Monitor Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       uint32_t : 20;
       volatile const uint32_t DOVCAHM  : 1; /* [20..20] OVRCURA InputIndicates OVRCURA input signal on the HS side of USB port. */
       volatile const uint32_t DOVCBHM  : 1; /* [21..21] OVRCURB InputIndicates OVRCURB input signal on the HS side of USB port. */
@@ -864,7 +864,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint32_t DPUSR1R; /* (@ 0x00000164) Deep Standby USB Suspend/Resume Interrupt Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       uint32_t : 4;
       volatile uint32_t DOVCAHE       : 1; /* [4..4] OVRCURA Interrupt Enable Clear */
       volatile uint32_t DOVCBHE       : 1; /* [5..5] OVRCURB Interrupt Enable Clear */
@@ -882,7 +882,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t DPUSR2R; /* (@ 0x00000168) Deep Standby USB Suspend/Resume Interrupt Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile const uint16_t DPINT : 1; /* [0..0] Indication of Return from DP Interrupt Source */
       volatile const uint16_t DMINT : 1; /* [1..1] Indication of Return from DM Interrupt Source */
       uint16_t                      : 2;
@@ -898,8 +898,8 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint16_t DPUSRCR; /* (@ 0x0000016A) Deep Standby USB Suspend/Resume Command Register */
 
-    struct {
-      volatile uint16_t FIXPHY   : 1;	/* [0..0] USB Transceiver Control Fix */
+    struct TU_ATTR_PACKED {
+      volatile uint16_t FIXPHY   : 1; /* [0..0] USB Transceiver Control Fix */
       volatile uint16_t FIXPHYPD : 1; /* [1..1] USB Transceiver Control Fix for PLL */
       uint16_t : 14;
     } DPUSRCR_b;
@@ -910,7 +910,7 @@ typedef struct TU_ATTR_PACKED {
     volatile uint32_t
       DPUSR0R_FS; /* (@ 0x00000400) Deep Software Standby USB Transceiver Control/Pin Monitor Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint32_t SRPC0         : 1; /* [0..0] USB Single End Receiver Control */
       volatile uint32_t RPUE0         : 1; /* [1..1] DP Pull-Up Resistor Control */
       uint32_t                        : 1;
@@ -931,7 +931,7 @@ typedef struct TU_ATTR_PACKED {
   union {
     volatile uint32_t DPUSR1R_FS; /* (@ 0x00000404) Deep Software Standby USB Suspend/Resume Interrupt Register */
 
-    struct {
+    struct TU_ATTR_PACKED {
       volatile uint32_t DPINTE0        : 1; /* [0..0] USB DP Interrupt Enable/Clear */
       volatile uint32_t DMINTE0        : 1; /* [1..1] USB DM Interrupt Enable/Clear */
       uint32_t                         : 2;

From cdae66c8371e1c73d28279462fa8598a9daae5a7 Mon Sep 17 00:00:00 2001
From: Martino Facchin <m.facchin@arduino.cc>
Date: Mon, 5 Jun 2023 09:04:52 +0200
Subject: [PATCH 384/691] renesas_rx: fix compilation on latest GCC

__CCRX__ only applyes to version 4 of RX family compiler http://tool-support.renesas.com/autoupdate/support/onlinehelp/csp/V4.01.00/CS+.chm/Compiler-CCRX.chm/Output/ccrx04c0201y.html

__RX__ is one of the macros exported by latest gcc (gcc_8.3.0.202305_rx_elf)
---
 src/portable/renesas/rusb2/dcd_rusb2.c | 2 ++
 src/portable/renesas/rusb2/hcd_rusb2.c | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 2653d0da6..e9ac46517 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -67,6 +67,8 @@
 /* LINK core registers */
 #if defined(__CCRX__)
   #define RUSB2 ((RUSB2_REG_t __evenaccess*) RUSB2_REG_BASE)
+#elif defined(__RX__)
+  #define RUSB2 ((RUSB2_REG_t*) RUSB2_REG_BASE)
 #elif (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
   #define RUSB2 ((R_USB_HS0_Type*)R_USB_HS0_BASE)
 #else
diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index 1e26c931d..b97ffd7e9 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -54,6 +54,8 @@
 /* LINK core registers */
 #if defined(__CCRX__)
   #define RUSB2 ((RUSB2_REG_t __evenaccess*) RUSB2_REG_BASE)
+#elif defined(__RX__)
+  #define RUSB2 ((RUSB2_REG_t*) RUSB2_REG_BASE)
 #elif (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST)
   #define RUSB2 ((R_USB_HS0_Type*) R_USB_HS0_BASE)
 #else

From 2b735ee8f5476168d6b5ed1dc32edc52f4d3648a Mon Sep 17 00:00:00 2001
From: Martino Facchin <m.facchin@arduino.cc>
Date: Mon, 5 Jun 2023 09:31:58 +0200
Subject: [PATCH 385/691] renesas_ra: fix wrong ifdef

Since CFG_TUSB_RHPORT1_MODE is always defined now for backwards compatibility
---
 src/portable/renesas/rusb2/rusb2_ra.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/portable/renesas/rusb2/rusb2_ra.c b/src/portable/renesas/rusb2/rusb2_ra.c
index 2b6ce7b2f..ff2191b1f 100644
--- a/src/portable/renesas/rusb2/rusb2_ra.c
+++ b/src/portable/renesas/rusb2/rusb2_ra.c
@@ -1,16 +1,16 @@
 #include "tusb_option.h"
 #include "rusb2_ra.h"
 
-#ifdef CFG_TUSB_RHPORT0_MODE
+#if (CFG_TUSB_RHPORT0_MODE != 0)
 IRQn_Type _usb_fs_irqn = USBFS_INT_IRQn;
 void tud_set_irq_usbfs(IRQn_Type q) {
   _usb_fs_irqn = q;
 }
 #endif
 
-#ifdef CFG_TUSB_RHPORT1_MODE
+#if (CFG_TUSB_RHPORT1_MODE != 0)
 IRQn_Type _usb_hs_irqn = USBHS_USB_INT_RESUME_IRQn;
 void tud_set_irq_usbhs(IRQn_Type q) {
   _usb_hs_irqn = q;
 }
-#endif
\ No newline at end of file
+#endif

From f6a45a7aab42264fc9c270150549cd4c4a54292e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 5 Jun 2023 15:41:35 +0700
Subject: [PATCH 386/691] clean up

---
 .idea/runConfigurations/stm32g474_jlink.xml | 10 +++++
 hw/bsp/board.c                              | 11 ++---
 hw/bsp/family_support.cmake                 | 17 ++++---
 hw/bsp/stm32g4/family.c                     | 50 ++++++++++++---------
 src/CMakeLists.txt                          |  4 --
 5 files changed, 55 insertions(+), 37 deletions(-)
 create mode 100644 .idea/runConfigurations/stm32g474_jlink.xml

diff --git a/.idea/runConfigurations/stm32g474_jlink.xml b/.idea/runConfigurations/stm32g474_jlink.xml
new file mode 100644
index 000000000..45a755da4
--- /dev/null
+++ b/.idea/runConfigurations/stm32g474_jlink.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="stm32g474 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;stm32g474re&quot; -if swd -speed 100000 -port 25321 -swoport 25322 -TelnetPort 25323 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="b_g474e_dpow1" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/hw/bsp/board.c b/hw/bsp/board.c
index 66ffcb199..3f62547a0 100644
--- a/hw/bsp/board.c
+++ b/hw/bsp/board.c
@@ -39,7 +39,7 @@
   #define sys_read    _read
 #endif
 
-#if defined(LOGGER_RTT)
+#if defined(LOGGER_RTT) || defined(LOGGER_rtt)
 // Logging with RTT
 
 // If using SES IDE, use the Syscalls/SEGGER_RTT_Syscalls_SES.c instead
@@ -62,7 +62,7 @@ TU_ATTR_USED int sys_read (int fhdl, char *buf, size_t count)
 
 #endif
 
-#elif defined(LOGGER_SWO)
+#elif defined(LOGGER_SWO) || defined(LOGGER_swo)
 // Logging with SWO for ARM Cortex
 
 #include "board_mcu.h"
@@ -71,11 +71,12 @@ TU_ATTR_USED int sys_write (int fhdl, const void *buf, size_t count)
 {
   (void) fhdl;
   uint8_t const* buf8 = (uint8_t const*) buf;
-  for(size_t i=0; i<count; i++)
-  {
+
+  for(size_t i=0; i<count; i++) {
     ITM_SendChar(buf8[i]);
   }
-  return count;
+
+  return (int) count;
 }
 
 TU_ATTR_USED int sys_read (int fhdl, char *buf, size_t count)
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index fdcd9a983..2c0ee95d6 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -115,6 +115,12 @@ function(family_configure_common TARGET)
       "LINKER:-Map=$<TARGET_FILE:${TARGET}>.map"
       )
   endif()
+
+  # LOGGER
+  if (DEFINED LOGGER)
+    target_compile_definitions(${TARGET} PUBLIC LOGGER_${LOGGER})
+  endif ()
+
 endfunction()
 
 
@@ -136,12 +142,11 @@ function(family_add_tinyusb TARGET OPT_MCU)
   set(TINYUSB_TARGET_PREFIX ${TARGET}-)
   add_library(${TARGET}-tinyusb_config INTERFACE)
 
-  target_include_directories(${TARGET}-tinyusb_config INTERFACE
-    ${CMAKE_CURRENT_SOURCE_DIR}/src
-    )
-  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
-    CFG_TUSB_MCU=${OPT_MCU}
-    )
+  target_include_directories(${TARGET}-tinyusb_config INTERFACE ${CMAKE_CURRENT_SOURCE_DIR}/src)
+  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE CFG_TUSB_MCU=${OPT_MCU})
+  if (DEFINED LOG)
+    target_compile_definitions(${TARGET}-tinyusb_config INTERFACE CFG_TUSB_DEBUG=${LOG})
+  endif()
 
   # tinyusb's CMakeList.txt
   add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c
index 3b490e9b3..19ba415bc 100644
--- a/hw/bsp/stm32g4/family.c
+++ b/hw/bsp/stm32g4/family.c
@@ -79,32 +79,35 @@ void board_init(void)
   NVIC_SetPriority(USBWakeUp_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
 #endif
 
-  GPIO_InitTypeDef  GPIO_InitStruct;
+  GPIO_InitTypeDef gpio_init;
 
   // LED
-  GPIO_InitStruct.Pin = LED_PIN;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_PULLUP;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
-  HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
+  memset(&gpio_init, 0, sizeof(gpio_init));
+  gpio_init.Pin = LED_PIN;
+  gpio_init.Mode = GPIO_MODE_OUTPUT_PP;
+  gpio_init.Pull = GPIO_PULLUP;
+  gpio_init.Speed = GPIO_SPEED_FREQ_HIGH;
+  HAL_GPIO_Init(LED_PORT, &gpio_init);
 
   board_led_write(false);
 
   // Button
-  GPIO_InitStruct.Pin = BUTTON_PIN;
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-  GPIO_InitStruct.Pull = BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN : GPIO_PULLUP;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
-  HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
+  memset(&gpio_init, 0, sizeof(gpio_init));
+  gpio_init.Pin = BUTTON_PIN;
+  gpio_init.Mode = GPIO_MODE_INPUT;
+  gpio_init.Pull = BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN : GPIO_PULLUP;
+  gpio_init.Speed = GPIO_SPEED_FREQ_HIGH;
+  HAL_GPIO_Init(BUTTON_PORT, &gpio_init);
 
 #ifdef UART_DEV
   // UART
-  GPIO_InitStruct.Pin       = UART_TX_PIN | UART_RX_PIN;
-  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
-  GPIO_InitStruct.Pull      = GPIO_PULLUP;
-  GPIO_InitStruct.Speed     = GPIO_SPEED_FREQ_HIGH;
-  GPIO_InitStruct.Alternate = UART_GPIO_AF;
-  HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
+  memset(&gpio_init, 0, sizeof(gpio_init));
+  gpio_init.Pin       = UART_TX_PIN | UART_RX_PIN;
+  gpio_init.Mode      = GPIO_MODE_AF_PP;
+  gpio_init.Pull      = GPIO_PULLUP;
+  gpio_init.Speed     = GPIO_SPEED_FREQ_HIGH;
+  gpio_init.Alternate = UART_GPIO_AF;
+  HAL_GPIO_Init(UART_GPIO_PORT, &gpio_init);
 
   UartHandle = (UART_HandleTypeDef){
     .Instance        = UART_DEV,
@@ -121,15 +124,18 @@ void board_init(void)
 
   // USB Pins TODO double check USB clock and pin setup
   // Configure USB DM and DP pins. This is optional, and maintained only for user guidance.
-  GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
-  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+  memset(&gpio_init, 0, sizeof(gpio_init));
+  gpio_init.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
+  gpio_init.Mode = GPIO_MODE_INPUT;
+  gpio_init.Pull = GPIO_NOPULL;
+  gpio_init.Speed = GPIO_SPEED_FREQ_HIGH;
+  HAL_GPIO_Init(GPIOA, &gpio_init);
 
   __HAL_RCC_USB_CLK_ENABLE();
 
   board_vbus_sense_init();
+
+  // USB PD
 }
 
 //--------------------------------------------------------------------+
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 09f41c9ab..3dbd72d61 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -98,7 +98,3 @@ endif()
 target_link_libraries(${TINYUSB_TARGET} PUBLIC
   ${TINYUSB_CONFIG_TARGET}
   )
-
-# export target name
-# set(TINYUSB_TARGET ${TINYUSB_TARGET} PARENT_SCOPE)
-# set(TINYUSB_CONFIG_TARGET ${TINYUSB_CONFIG_TARGET} PARENT_SCOPE)

From a70978e05790cf744e777fd3e50f271fc3fffd1f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 5 Jun 2023 19:53:40 +0700
Subject: [PATCH 387/691] clean up

---
 hw/bsp/board.c                              | 4 ++--
 hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h | 2 ++
 hw/bsp/stm32g4/family.c                     | 1 +
 hw/bsp/stm32g4/family.cmake                 | 2 +-
 4 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/hw/bsp/board.c b/hw/bsp/board.c
index 3f62547a0..7804a18e0 100644
--- a/hw/bsp/board.c
+++ b/hw/bsp/board.c
@@ -39,7 +39,7 @@
   #define sys_read    _read
 #endif
 
-#if defined(LOGGER_RTT) || defined(LOGGER_rtt)
+#if defined(LOGGER_RTT)
 // Logging with RTT
 
 // If using SES IDE, use the Syscalls/SEGGER_RTT_Syscalls_SES.c instead
@@ -62,7 +62,7 @@ TU_ATTR_USED int sys_read (int fhdl, char *buf, size_t count)
 
 #endif
 
-#elif defined(LOGGER_SWO) || defined(LOGGER_swo)
+#elif defined(LOGGER_SWO)
 // Logging with SWO for ARM Cortex
 
 #include "board_mcu.h"
diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
index 5d936d009..21d4e459b 100644
--- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
+++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
@@ -57,6 +57,8 @@
 //--------------------------------------------------------------------+
 // RCC Clock
 //--------------------------------------------------------------------+
+
+// CPU Frequency (Core Clock) is 170MHz
 static inline void board_clock_init(void)
 {
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c
index 19ba415bc..030abe0d0 100644
--- a/hw/bsp/stm32g4/family.c
+++ b/hw/bsp/stm32g4/family.c
@@ -136,6 +136,7 @@ void board_init(void)
   board_vbus_sense_init();
 
   // USB PD
+
 }
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake
index ab17c0980..2c10a9769 100644
--- a/hw/bsp/stm32g4/family.cmake
+++ b/hw/bsp/stm32g4/family.cmake
@@ -109,7 +109,7 @@ function(family_configure_example TARGET)
 
   # Flashing
   family_flash_stlink(${TARGET})
-  #family_flash_jlink(${TARGET})
+  family_flash_jlink(${TARGET})
 endfunction()
 
 

From b3fda4a35433a4102743ea9719e2323e4076ff34 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 6 Jun 2023 23:55:33 +0700
Subject: [PATCH 388/691] able to get usbpd irq handler

- handle cc1, cc2 voltage changes
- get order set, rx message end interrupt
- add  segger rtt support for cmake
---
 hw/bsp/family_support.cmake                 |  15 ++
 hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h |  22 +--
 hw/bsp/stm32g4/family.c                     | 183 +++++++++++++++++---
 src/common/tusb_types.h                     |  13 ++
 4 files changed, 196 insertions(+), 37 deletions(-)

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 2c0ee95d6..e9b4f2fdb 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -97,6 +97,18 @@ function(family_initialize_project PROJECT DIR)
 endfunction()
 
 
+# Add segger rtt to example
+function(family_add_segger_rtt TARGET)
+  if (NOT TARGET segger_rtt)
+    add_library(segger_rtt STATIC
+      ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c
+      )
+    target_include_directories(segger_rtt PUBLIC ${TOP}/lib/SEGGER_RTT/RTT)
+  endif()
+
+  target_link_libraries(${TARGET} PUBLIC segger_rtt)
+endfunction()
+
 #------------------------------------
 # Main target configure
 #------------------------------------
@@ -119,6 +131,9 @@ function(family_configure_common TARGET)
   # LOGGER
   if (DEFINED LOGGER)
     target_compile_definitions(${TARGET} PUBLIC LOGGER_${LOGGER})
+    if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt")
+      family_add_segger_rtt(${TARGET})
+    endif ()
   endif ()
 
 endfunction()
diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
index 21d4e459b..b1a98ba97 100644
--- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
+++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
@@ -58,7 +58,7 @@
 // RCC Clock
 //--------------------------------------------------------------------+
 
-// CPU Frequency (Core Clock) is 170MHz
+// CPU Frequency (Core Clock) is 150MHz
 static inline void board_clock_init(void)
 {
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
@@ -68,16 +68,16 @@ static inline void board_clock_init(void)
   HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
 
   /* Activate PLL with HSI as source */
-  RCC_OscInitStruct.OscillatorType      = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
   RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
-  RCC_OscInitStruct.HSIState            = RCC_HSI_ON;
-  RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
-  RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSI;
-  RCC_OscInitStruct.PLL.PLLM            = RCC_PLLM_DIV4;
-  RCC_OscInitStruct.PLL.PLLN            = 85;
-  RCC_OscInitStruct.PLL.PLLP            = RCC_PLLP_DIV10;
-  RCC_OscInitStruct.PLL.PLLQ            = RCC_PLLQ_DIV2;
-  RCC_OscInitStruct.PLL.PLLR            = RCC_PLLR_DIV2;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 75;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
   HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
   // Initializes the CPU, AHB and APB buses clocks
@@ -87,7 +87,7 @@ static inline void board_clock_init(void)
   RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;
   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
-  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_8);
+  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
 
   //------------- HSI48 and CRS for USB -------------//
   RCC_OscInitTypeDef osc_hsi48 = {0};
diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c
index 030abe0d0..8b17c0643 100644
--- a/hw/bsp/stm32g4/family.c
+++ b/hw/bsp/stm32g4/family.c
@@ -25,9 +25,127 @@
  */
 
 #include "stm32g4xx_hal.h"
+#include "stm32g4xx_ll_bus.h"
+
 #include "bsp/board.h"
 #include "board.h"
 
+
+//--------------------------------------------------------------------+
+// USB PD
+//--------------------------------------------------------------------+
+
+void usbpd_init(uint8_t port_num, tusb_typec_port_type_t port_type) {
+  (void) port_num;
+
+  // Initialization phase: CFG1
+  UCPD1->CFG1 = (0x0d << UCPD_CFG1_HBITCLKDIV_Pos) | (0x10 << UCPD_CFG1_IFRGAP_Pos) | (0x07 << UCPD_CFG1_TRANSWIN_Pos) |
+      (0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos) |
+      ( 0 << UCPD_CFG1_TXDMAEN_Pos) | (0 << UCPD_CFG1_RXDMAEN_Pos);
+  UCPD1->CFG1 |= UCPD_CFG1_UCPDEN;
+
+  // General programming sequence (with UCPD configured then enabled)
+  if (port_type == TUSB_TYPEC_PORT_SNK) {
+    // Enable both CC Phy
+    UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (0x03 << UCPD_CR_CCENABLE_Pos);
+
+    // Read Voltage State on CC1 & CC2 fore initial state
+    uint32_t vstate_cc[2];
+    vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
+    vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
+
+    TU_LOG1_INT(vstate_cc[0]);
+    TU_LOG1_INT(vstate_cc[1]);
+
+    // Enable CC1 & CC2 Interrupt
+    UCPD1->IMR = UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE;
+  }
+
+  // Enable interrupt
+  //NVIC_SetPriority(UCPD1_IRQn, 0);
+//  NVIC_EnableIRQ(UCPD1_IRQn);
+}
+
+uint8_t pd_rx_buf[262];
+uint32_t pd_rx_count = 0;
+
+void UCPD1_IRQHandler(void) {
+  uint32_t sr = UCPD1->SR;
+  sr &= UCPD1->IMR;
+
+  TU_LOG1("UCPD1_IRQHandler: sr = 0x%08X\n", sr);
+
+  if (sr & (UCPD_SR_TYPECEVT1 | UCPD_SR_TYPECEVT2)) {
+    uint32_t vstate_cc[2];
+    vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
+    vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
+
+    TU_LOG1("VState CC1 = %u, CC2 = %u\n", vstate_cc[0], vstate_cc[1]);
+
+    uint32_t cr = UCPD1->CR;
+
+    if ((sr & UCPD_SR_TYPECEVT1) && (vstate_cc[0] == 3)) {
+      TU_LOG1("Attach CC1\n");
+      cr &= ~UCPD_CR_PHYCCSEL;
+      cr |= UCPD_CR_PHYRXEN;
+    } else if ((sr & UCPD_SR_TYPECEVT2) && (vstate_cc[1] == 3)) {
+      TU_LOG1("Attach CC2\n");
+      cr |= UCPD_CR_PHYCCSEL;
+      cr |= UCPD_CR_PHYRXEN;
+    } else {
+      TU_LOG1("Detach\n");
+      cr &= ~UCPD_CR_PHYRXEN;
+    }
+
+    // Enable Interrupt
+    UCPD1->IMR |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE |
+        /*UCPD_IMR_RXNEIE |*/ UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE |
+        UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE;
+
+    // Enable PD RX
+    UCPD1->CR = cr;
+
+    // ack
+    UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF;
+  }
+
+  if (sr & UCPD_SR_RXORDDET) {
+    // SOP: Start of Packet
+    // TODO DMA later
+    uint8_t order_set = UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk;
+    TU_LOG1_HEX(order_set);
+
+    // ack
+    UCPD1->ICR = UCPD_ICR_RXORDDETCF;
+  }
+
+  if ( sr & UCPD_SR_RXMSGEND) {
+    // End of message
+//    uint32_t payload_size = UCPD1->RX_PAYSZ;
+//    TU_LOG1_HEX(payload_size);
+//
+//    for(uint32_t i=0; i<payload_size; i++) {
+//      pd_rx_buf[i] = UCPD1->RXDR;
+//
+//      TU_LOG1("0x%02X ", pd_rx_buf[i]);
+//    }
+//    TU_LOG1("\n");
+
+    // ack
+    UCPD1->ICR = UCPD_ICR_RXMSGENDCF;
+  }
+
+//  if (sr & UCPD_SR_RXNE) {
+//    uint8_t data = UCPD1->RXDR;
+//    pd_rx_buf[pd_rx_count++] = data;
+//    TU_LOG1_HEX(data);
+//  }
+
+//  else {
+//    TU_LOG_LOCATION();
+//  }
+}
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
@@ -79,35 +197,35 @@ void board_init(void)
   NVIC_SetPriority(USBWakeUp_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
 #endif
 
-  GPIO_InitTypeDef gpio_init;
+  GPIO_InitTypeDef GPIO_InitStruct;
 
   // LED
-  memset(&gpio_init, 0, sizeof(gpio_init));
-  gpio_init.Pin = LED_PIN;
-  gpio_init.Mode = GPIO_MODE_OUTPUT_PP;
-  gpio_init.Pull = GPIO_PULLUP;
-  gpio_init.Speed = GPIO_SPEED_FREQ_HIGH;
-  HAL_GPIO_Init(LED_PORT, &gpio_init);
+  memset(&GPIO_InitStruct, 0, sizeof(GPIO_InitStruct));
+  GPIO_InitStruct.Pin = LED_PIN;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_PULLUP;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+  HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
 
   board_led_write(false);
 
   // Button
-  memset(&gpio_init, 0, sizeof(gpio_init));
-  gpio_init.Pin = BUTTON_PIN;
-  gpio_init.Mode = GPIO_MODE_INPUT;
-  gpio_init.Pull = BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN : GPIO_PULLUP;
-  gpio_init.Speed = GPIO_SPEED_FREQ_HIGH;
-  HAL_GPIO_Init(BUTTON_PORT, &gpio_init);
+  memset(&GPIO_InitStruct, 0, sizeof(GPIO_InitStruct));
+  GPIO_InitStruct.Pin = BUTTON_PIN;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN : GPIO_PULLUP;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+  HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
 
 #ifdef UART_DEV
   // UART
-  memset(&gpio_init, 0, sizeof(gpio_init));
-  gpio_init.Pin       = UART_TX_PIN | UART_RX_PIN;
-  gpio_init.Mode      = GPIO_MODE_AF_PP;
-  gpio_init.Pull      = GPIO_PULLUP;
-  gpio_init.Speed     = GPIO_SPEED_FREQ_HIGH;
-  gpio_init.Alternate = UART_GPIO_AF;
-  HAL_GPIO_Init(UART_GPIO_PORT, &gpio_init);
+  memset(&GPIO_InitStruct, 0, sizeof(GPIO_InitStruct));
+  GPIO_InitStruct.Pin       = UART_TX_PIN | UART_RX_PIN;
+  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull      = GPIO_PULLUP;
+  GPIO_InitStruct.Speed     = GPIO_SPEED_FREQ_HIGH;
+  GPIO_InitStruct.Alternate = UART_GPIO_AF;
+  HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
 
   UartHandle = (UART_HandleTypeDef){
     .Instance        = UART_DEV,
@@ -124,18 +242,31 @@ void board_init(void)
 
   // USB Pins TODO double check USB clock and pin setup
   // Configure USB DM and DP pins. This is optional, and maintained only for user guidance.
-  memset(&gpio_init, 0, sizeof(gpio_init));
-  gpio_init.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
-  gpio_init.Mode = GPIO_MODE_INPUT;
-  gpio_init.Pull = GPIO_NOPULL;
-  gpio_init.Speed = GPIO_SPEED_FREQ_HIGH;
-  HAL_GPIO_Init(GPIOA, &gpio_init);
+  memset(&GPIO_InitStruct, 0, sizeof(GPIO_InitStruct));
+  GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
   __HAL_RCC_USB_CLK_ENABLE();
 
   board_vbus_sense_init();
 
+#if 0
   // USB PD
+  /* PWR register access (for disabling dead battery feature) */
+  LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
+  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_CRC);
+
+  __HAL_RCC_UCPD1_CLK_ENABLE();
+
+  // Default CC1/CC2 is PB4/PB6
+  // PB4   ------> UCPD1_CC2
+  // PB6   ------> UCPD1_CC1
+
+  usbpd_init(0, TUSB_TYPEC_PORT_SNK);
+#endif
 
 }
 
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index 39a2d4564..7b82c51d9 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -232,6 +232,19 @@ enum {
 
 #define TUSB_DESC_CONFIG_POWER_MA(x)  ((x)/2)
 
+//--------------------------------------------------------------------+
+// TYPE-C
+//--------------------------------------------------------------------+
+
+typedef enum {
+  TUSB_TYPEC_PORT_SRC,
+  TUSB_TYPEC_PORT_SNK,
+  TUSB_TYPEC_PORT_DRP
+} tusb_typec_port_type_t;
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
 typedef enum
 {
   XFER_RESULT_SUCCESS = 0,

From 23f7130ae47b6cbb11e1fffcb3d5e75a5417ef78 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 7 Jun 2023 00:07:58 +0700
Subject: [PATCH 389/691] update rtt to rev 25842

---
 .../{RTT => Config}/SEGGER_RTT_Conf.h         | 140 +++--
 lib/SEGGER_RTT/LICENSE.md                     |  36 ++
 lib/SEGGER_RTT/License.txt                    |  34 --
 lib/SEGGER_RTT/README.md                      |  24 +
 lib/SEGGER_RTT/README.txt                     |  20 -
 lib/SEGGER_RTT/RTT/SEGGER_RTT.c               | 427 +++++++++------
 lib/SEGGER_RTT/RTT/SEGGER_RTT.h               | 231 ++++++--
 lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S    |   7 +
 lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c        | 500 ------------------
 .../Syscalls/SEGGER_RTT_Syscalls_GCC.c        | 120 -----
 .../Syscalls/SEGGER_RTT_Syscalls_IAR.c        | 115 ----
 .../Syscalls/SEGGER_RTT_Syscalls_KEIL.c       | 386 --------------
 .../Syscalls/SEGGER_RTT_Syscalls_SES.c        | 247 ---------
 13 files changed, 617 insertions(+), 1670 deletions(-)
 rename lib/SEGGER_RTT/{RTT => Config}/SEGGER_RTT_Conf.h (69%)
 create mode 100644 lib/SEGGER_RTT/LICENSE.md
 delete mode 100644 lib/SEGGER_RTT/License.txt
 create mode 100644 lib/SEGGER_RTT/README.md
 delete mode 100644 lib/SEGGER_RTT/README.txt
 delete mode 100644 lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c
 delete mode 100644 lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c
 delete mode 100644 lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_IAR.c
 delete mode 100644 lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c
 delete mode 100644 lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_SES.c

diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h b/lib/SEGGER_RTT/Config/SEGGER_RTT_Conf.h
similarity index 69%
rename from lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h
rename to lib/SEGGER_RTT/Config/SEGGER_RTT_Conf.h
index fda5a5f51..3ac38dcf1 100644
--- a/lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h
+++ b/lib/SEGGER_RTT/Config/SEGGER_RTT_Conf.h
@@ -3,7 +3,7 @@
 *                        The Embedded Experts                        *
 **********************************************************************
 *                                                                    *
-*            (c) 1995 - 2019 SEGGER Microcontroller GmbH             *
+*            (c) 1995 - 2020 SEGGER Microcontroller GmbH             *
 *                                                                    *
 *       www.segger.com     Support: support@segger.com               *
 *                                                                    *
@@ -46,7 +46,7 @@ File    : SEGGER_RTT_Conf.h
 Purpose : Implementation of SEGGER real-time transfer (RTT) which
           allows real-time communication on targets which support
           debugger memory accesses while the CPU is running.
-Revision: $Rev: 18601 $
+Revision: $Rev: 24316 $
 
 */
 
@@ -63,10 +63,25 @@ Revision: $Rev: 18601 $
 *
 **********************************************************************
 */
+
+//
+// Take in and set to correct values for Cortex-A systems with CPU cache
+//
+//#define SEGGER_RTT_CPU_CACHE_LINE_SIZE            (32)          // Largest cache line size (in bytes) in the current system
+//#define SEGGER_RTT_UNCACHED_OFF                   (0xFB000000)  // Address alias where RTT CB and buffers can be accessed uncached
+//
+// Most common case:
+// Up-channel 0: RTT
+// Up-channel 1: SystemView
+//
 #ifndef   SEGGER_RTT_MAX_NUM_UP_BUFFERS
   #define SEGGER_RTT_MAX_NUM_UP_BUFFERS             (3)     // Max. number of up-buffers (T->H) available on this target    (Default: 3)
 #endif
-
+//
+// Most common case:
+// Down-channel 0: RTT
+// Down-channel 1: SystemView
+//
 #ifndef   SEGGER_RTT_MAX_NUM_DOWN_BUFFERS
   #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS           (3)     // Max. number of down-buffers (H->T) available on this target  (Default: 3)
 #endif
@@ -135,18 +150,18 @@ Revision: $Rev: 18601 $
 #if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32))
   #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__))
     #define SEGGER_RTT_LOCK()   {                                                                   \
-                                    unsigned int LockState;                                         \
+                                    unsigned int _SEGGER_RTT__LockState;                                         \
                                   __asm volatile ("mrs   %0, primask  \n\t"                         \
-                                                  "movs  r1, $1       \n\t"                         \
+                                                  "movs  r1, #1       \n\t"                         \
                                                   "msr   primask, r1  \n\t"                         \
-                                                  : "=r" (LockState)                                \
+                                                  : "=r" (_SEGGER_RTT__LockState)                                \
                                                   :                                                 \
-                                                  : "r1"                                            \
+                                                  : "r1", "cc"                                      \
                                                   );
 
     #define SEGGER_RTT_UNLOCK()   __asm volatile ("msr   primask, %0  \n\t"                         \
                                                   :                                                 \
-                                                  : "r" (LockState)                                 \
+                                                  : "r" (_SEGGER_RTT__LockState)                                 \
                                                   :                                                 \
                                                   );                                                \
                                 }
@@ -155,32 +170,32 @@ Revision: $Rev: 18601 $
       #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY   (0x20)
     #endif
     #define SEGGER_RTT_LOCK()   {                                                                   \
-                                    unsigned int LockState;                                         \
+                                    unsigned int _SEGGER_RTT__LockState;                                         \
                                   __asm volatile ("mrs   %0, basepri  \n\t"                         \
                                                   "mov   r1, %1       \n\t"                         \
                                                   "msr   basepri, r1  \n\t"                         \
-                                                  : "=r" (LockState)                                \
+                                                  : "=r" (_SEGGER_RTT__LockState)                                \
                                                   : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY)          \
-                                                  : "r1"                                            \
+                                                  : "r1", "cc"                                      \
                                                   );
 
     #define SEGGER_RTT_UNLOCK()   __asm volatile ("msr   basepri, %0  \n\t"                         \
                                                   :                                                 \
-                                                  : "r" (LockState)                                 \
+                                                  : "r" (_SEGGER_RTT__LockState)                                 \
                                                   :                                                 \
                                                   );                                                \
                                 }
 
-  #elif defined(__ARM_ARCH_7A__)
+  #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__))
     #define SEGGER_RTT_LOCK() {                                                \
-                                 unsigned int LockState;                       \
+                                 unsigned int _SEGGER_RTT__LockState;                       \
                                  __asm volatile ("mrs r1, CPSR \n\t"           \
                                                  "mov %0, r1 \n\t"             \
                                                  "orr r1, r1, #0xC0 \n\t"      \
                                                  "msr CPSR_c, r1 \n\t"         \
-                                                 : "=r" (LockState)            \
+                                                 : "=r" (_SEGGER_RTT__LockState)            \
                                                  :                             \
-                                                 : "r1"                        \
+                                                 : "r1", "cc"                  \
                                                  );
 
     #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t"              \
@@ -190,17 +205,17 @@ Revision: $Rev: 18601 $
                                                 "orr r1, r1, r0 \n\t"          \
                                                 "msr CPSR_c, r1 \n\t"          \
                                                 :                              \
-                                                : "r" (LockState)              \
-                                                : "r0", "r1"                   \
+                                                : "r" (_SEGGER_RTT__LockState)              \
+                                                : "r0", "r1", "cc"             \
                                                 );                             \
                             }
   #elif defined(__riscv) || defined(__riscv_xlen)
     #define SEGGER_RTT_LOCK()  {                                               \
-                                 unsigned int LockState;                       \
+                                 unsigned int _SEGGER_RTT__LockState;                       \
                                  __asm volatile ("csrr  %0, mstatus  \n\t"     \
                                                  "csrci mstatus, 8   \n\t"     \
                                                  "andi  %0, %0,  8   \n\t"     \
-                                                 : "=r" (LockState)            \
+                                                 : "=r" (_SEGGER_RTT__LockState)            \
                                                  :                             \
                                                  :                             \
                                                 );
@@ -209,7 +224,7 @@ Revision: $Rev: 18601 $
                                                  "or    %0, %0, a1   \n\t"     \
                                                  "csrs  mstatus, %0  \n\t"     \
                                                  :                             \
-                                                 : "r"  (LockState)            \
+                                                 : "r"  (_SEGGER_RTT__LockState)            \
                                                  : "a1"                        \
                                                 );                             \
                                }
@@ -227,11 +242,11 @@ Revision: $Rev: 18601 $
   #if (defined (__ARM6M__)          && (__CORE__ == __ARM6M__))             ||                      \
       (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__))
     #define SEGGER_RTT_LOCK()   {                                                                   \
-                                  unsigned int LockState;                                           \
-                                  LockState = __get_PRIMASK();                                      \
+                                  unsigned int _SEGGER_RTT__LockState;                                           \
+                                  _SEGGER_RTT__LockState = __get_PRIMASK();                                      \
                                   __set_PRIMASK(1);
 
-    #define SEGGER_RTT_UNLOCK()   __set_PRIMASK(LockState);                                         \
+    #define SEGGER_RTT_UNLOCK()   __set_PRIMASK(_SEGGER_RTT__LockState);                                         \
                                 }
   #elif (defined (__ARM7EM__)         && (__CORE__ == __ARM7EM__))          ||                      \
         (defined (__ARM7M__)          && (__CORE__ == __ARM7M__))           ||                      \
@@ -241,12 +256,36 @@ Revision: $Rev: 18601 $
       #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY   (0x20)
     #endif
     #define SEGGER_RTT_LOCK()   {                                                                   \
-                                  unsigned int LockState;                                           \
-                                  LockState = __get_BASEPRI();                                      \
+                                  unsigned int _SEGGER_RTT__LockState;                                           \
+                                  _SEGGER_RTT__LockState = __get_BASEPRI();                                      \
                                   __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
 
-    #define SEGGER_RTT_UNLOCK()   __set_BASEPRI(LockState);                                         \
+    #define SEGGER_RTT_UNLOCK()   __set_BASEPRI(_SEGGER_RTT__LockState);                                         \
                                 }
+  #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__))                    ||                      \
+        (defined (__ARM7R__) && (__CORE__ == __ARM7R__))
+    #define SEGGER_RTT_LOCK() {                                                                     \
+                                 unsigned int _SEGGER_RTT__LockState;                                            \
+                                 __asm volatile ("mrs r1, CPSR \n\t"                                \
+                                                 "mov %0, r1 \n\t"                                  \
+                                                 "orr r1, r1, #0xC0 \n\t"                           \
+                                                 "msr CPSR_c, r1 \n\t"                              \
+                                                 : "=r" (_SEGGER_RTT__LockState)                                 \
+                                                 :                                                  \
+                                                 : "r1", "cc"                                       \
+                                                 );
+
+    #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t"                                   \
+                                                "mrs r1, CPSR \n\t"                                 \
+                                                "bic r1, r1, #0xC0 \n\t"                            \
+                                                "and r0, r0, #0xC0 \n\t"                            \
+                                                "orr r1, r1, r0 \n\t"                               \
+                                                "msr CPSR_c, r1 \n\t"                               \
+                                                :                                                   \
+                                                : "r" (_SEGGER_RTT__LockState)                                   \
+                                                : "r0", "r1", "cc"                                  \
+                                                );                                                  \
+                            }
   #endif
 #endif
 
@@ -256,11 +295,11 @@ Revision: $Rev: 18601 $
 */
 #ifdef __ICCRX__
   #define SEGGER_RTT_LOCK()   {                                                                     \
-                                unsigned long LockState;                                            \
-                                LockState = __get_interrupt_state();                                \
+                                unsigned long _SEGGER_RTT__LockState;                                            \
+                                _SEGGER_RTT__LockState = __get_interrupt_state();                                \
                                 __disable_interrupt();
 
-  #define SEGGER_RTT_UNLOCK()   __set_interrupt_state(LockState);                                   \
+  #define SEGGER_RTT_UNLOCK()   __set_interrupt_state(_SEGGER_RTT__LockState);                                   \
                               }
 #endif
 
@@ -270,11 +309,11 @@ Revision: $Rev: 18601 $
 */
 #ifdef __ICCRL78__
   #define SEGGER_RTT_LOCK()   {                                                                     \
-                                __istate_t LockState;                                               \
-                                LockState = __get_interrupt_state();                                \
+                                __istate_t _SEGGER_RTT__LockState;                                               \
+                                _SEGGER_RTT__LockState = __get_interrupt_state();                                \
                                 __disable_interrupt();
 
-  #define SEGGER_RTT_UNLOCK()   __set_interrupt_state(LockState);                                   \
+  #define SEGGER_RTT_UNLOCK()   __set_interrupt_state(_SEGGER_RTT__LockState);                                   \
                               }
 #endif
 
@@ -285,13 +324,13 @@ Revision: $Rev: 18601 $
 #ifdef __CC_ARM
   #if (defined __TARGET_ARCH_6S_M)
     #define SEGGER_RTT_LOCK()   {                                                                   \
-                                  unsigned int LockState;                                           \
-                                  register unsigned char PRIMASK __asm( "primask");                 \
-                                  LockState = PRIMASK;                                              \
-                                  PRIMASK = 1u;                                                     \
+                                  unsigned int _SEGGER_RTT__LockState;                                           \
+                                  register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask");                 \
+                                  _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK;                                              \
+                                  _SEGGER_RTT__PRIMASK = 1u;                                                     \
                                   __schedule_barrier();
 
-    #define SEGGER_RTT_UNLOCK()   PRIMASK = LockState;                                              \
+    #define SEGGER_RTT_UNLOCK()   _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState;                                              \
                                   __schedule_barrier();                                             \
                                 }
   #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M))
@@ -299,13 +338,13 @@ Revision: $Rev: 18601 $
       #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY   (0x20)
     #endif
     #define SEGGER_RTT_LOCK()   {                                                                   \
-                                  unsigned int LockState;                                           \
+                                  unsigned int _SEGGER_RTT__LockState;                                           \
                                   register unsigned char BASEPRI __asm( "basepri");                 \
-                                  LockState = BASEPRI;                                              \
+                                  _SEGGER_RTT__LockState = BASEPRI;                                              \
                                   BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY;                      \
                                   __schedule_barrier();
 
-    #define SEGGER_RTT_UNLOCK()   BASEPRI = LockState;                                              \
+    #define SEGGER_RTT_UNLOCK()   BASEPRI = _SEGGER_RTT__LockState;                                              \
                                   __schedule_barrier();                                             \
                                 }
   #endif
@@ -318,21 +357,21 @@ Revision: $Rev: 18601 $
 #ifdef __TI_ARM__
   #if defined (__TI_ARM_V6M0__)
     #define SEGGER_RTT_LOCK()   {                                                                   \
-                                  unsigned int LockState;                                           \
-                                  LockState = __get_PRIMASK();                                      \
+                                  unsigned int _SEGGER_RTT__LockState;                                           \
+                                  _SEGGER_RTT__LockState = __get_PRIMASK();                                      \
                                   __set_PRIMASK(1);
 
-    #define SEGGER_RTT_UNLOCK()   __set_PRIMASK(LockState);                                         \
+    #define SEGGER_RTT_UNLOCK()   __set_PRIMASK(_SEGGER_RTT__LockState);                                         \
                                 }
   #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__))
     #ifndef   SEGGER_RTT_MAX_INTERRUPT_PRIORITY
       #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY   (0x20)
     #endif
     #define SEGGER_RTT_LOCK()   {                                                                   \
-                                  unsigned int LockState;                                           \
-                                  LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
+                                  unsigned int _SEGGER_RTT__LockState;                                           \
+                                  _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
 
-    #define SEGGER_RTT_UNLOCK()   _set_interrupt_priority(LockState);                               \
+    #define SEGGER_RTT_UNLOCK()   _set_interrupt_priority(_SEGGER_RTT__LockState);                               \
                                 }
   #endif
 #endif
@@ -342,12 +381,13 @@ Revision: $Rev: 18601 $
 *       RTT lock configuration for CCRX
 */
 #ifdef __RX
+  #include <machine.h>
   #define SEGGER_RTT_LOCK()   {                                                                     \
-                                unsigned long LockState;                                            \
-                                LockState = get_psw() & 0x010000;                                   \
+                                unsigned long _SEGGER_RTT__LockState;                                            \
+                                _SEGGER_RTT__LockState = get_psw() & 0x010000;                                   \
                                 clrpsw_i();
 
-  #define SEGGER_RTT_UNLOCK()   set_psw(get_psw() | LockState);                                     \
+  #define SEGGER_RTT_UNLOCK()   set_psw(get_psw() | _SEGGER_RTT__LockState);                                     \
                               }
 #endif
 
diff --git a/lib/SEGGER_RTT/LICENSE.md b/lib/SEGGER_RTT/LICENSE.md
new file mode 100644
index 000000000..14881c29b
--- /dev/null
+++ b/lib/SEGGER_RTT/LICENSE.md
@@ -0,0 +1,36 @@
+
+                    SEGGER Microcontroller GmbH
+                       The Embedded Experts
+
+           (c) 1995 - 2021 SEGGER Microcontroller GmbH
+          www.segger.com     Support: support@segger.com
+
+        SEGGER RTT  Real Time Transfer for embedded targets
+
+
+    All rights reserved.
+
+    SEGGER strongly recommends to not make any changes
+    to or modify the source code of this software in order to stay
+    compatible with the RTT protocol and J-Link.
+
+    Redistribution and use in source and binary forms, with or
+    without modification, are permitted provided that the following
+    condition is met:
+
+    - Redistributions of source code must retain the above copyright
+     notice, this condition and the following disclaimer.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+    CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+    INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+    MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+    DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR
+    ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+    CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+    OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+    OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+    LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+    (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+    USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+    DAMAGE.
diff --git a/lib/SEGGER_RTT/License.txt b/lib/SEGGER_RTT/License.txt
deleted file mode 100644
index e1f5f89ff..000000000
--- a/lib/SEGGER_RTT/License.txt
+++ /dev/null
@@ -1,34 +0,0 @@
-Important - Read carefully:
-
-SEGGER RTT - Real Time Transfer for embedded targets
-
-All rights reserved.
-
-SEGGER strongly recommends to not make any changes
-to or modify the source code of this software in order to stay
-compatible with the RTT protocol and J-Link.
-
-Redistribution and use in source and binary forms, with or
-without modification, are permitted provided that the following
-condition is met:
-
-o Redistributions of source code must retain the above copyright
-  notice, this condition and the following disclaimer.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
-CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
-INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
-MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR
-ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
-OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
-OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
-USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
-DAMAGE.
-
-
-(c) 2014 - 2016  SEGGER Microcontroller GmbH
-www.segger.com
diff --git a/lib/SEGGER_RTT/README.md b/lib/SEGGER_RTT/README.md
new file mode 100644
index 000000000..06349d248
--- /dev/null
+++ b/lib/SEGGER_RTT/README.md
@@ -0,0 +1,24 @@
+RTT
+===
+
+SEGGER RTT Sources
+
+https://www.segger.com/products/debug-probes/j-link/technology/about-real-time-transfer
+https://wiki.segger.com/RTT
+
+## Included files
+
+  * `RTT/`
+    * `SEGGER_RTT.c`               - Main module for RTT.
+    * `SEGGER_RTT.h`               - Main header for RTT.
+    * `SEGGER_RTT_ASM_ARMv7M.S`    - Assembly-optimized implementation of RTT functions for ARMv7M processors.
+    * `SEGGER_RTT_Printf.c`        - Simple implementation of printf (`SEGGER_RTT_Printf()`) to write formatted strings via RTT.
+  * `Syscalls/`
+    * `SEGGER_RTT_Syscalls_*.c`    - Low-level syscalls to retarget `printf()` to RTT with different toolchains.
+  * `Config/`
+    * `SEGGER_RTT_Conf.h`          - RTT configuration file.
+  * `Examples/`
+    * `Main_RTT_InputEchoApp.c`    - Example application which echoes input on Channel 0.
+    * `Main_RTT_MenuApp.c`         - Example application to demonstrate RTT bi-directional functionality.
+    * `Main_RTT_PrintfTest.c`      - Example application to test RTT's simple printf implementation.
+    * `Main_RTT_SpeedTestApp.c`    - Example application to measure RTT performance. (Requires embOS)
diff --git a/lib/SEGGER_RTT/README.txt b/lib/SEGGER_RTT/README.txt
deleted file mode 100644
index 49ec655c4..000000000
--- a/lib/SEGGER_RTT/README.txt
+++ /dev/null
@@ -1,20 +0,0 @@
-README.txt for the SEGGER RTT Implementation Pack.
-
-Included files:
-===============
-Root Directory
-  - Examples
-    - Main_RTT_InputEchoApp.c    - Sample application which echoes input on Channel 0.
-    - Main_RTT_MenuApp.c         - Sample application to demonstrate RTT bi-directional functionality.
-    - Main_RTT_PrintfTest.c      - Sample application to test RTT small printf implementation.
-    - Main_RTT_SpeedTestApp.c    - Sample application for measuring RTT performance. embOS needed.
-  - RTT
-    - SEGGER_RTT.c                - The RTT implementation.
-    - SEGGER_RTT.h                - Header for RTT implementation.
-    - SEGGER_RTT_Conf.h           - Pre-processor configuration for the RTT implementation.
-    - SEGGER_RTT_Printf.c         - Simple implementation of printf to write formatted strings via RTT.
-  - Syscalls
-    - RTT_Syscalls_GCC.c          - Low-level syscalls to retarget printf() to RTT with GCC / Newlib.
-    - RTT_Syscalls_IAR.c          - Low-level syscalls to retarget printf() to RTT with IAR compiler.
-    - RTT_Syscalls_KEIL.c         - Low-level syscalls to retarget printf() to RTT with KEIL/uVision compiler.
-    - RTT_Syscalls_SES.c          - Low-level syscalls to retarget printf() to RTT with SEGGER Embedded Studio.
diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT.c b/lib/SEGGER_RTT/RTT/SEGGER_RTT.c
index c8de8e0f3..895085ba2 100644
--- a/lib/SEGGER_RTT/RTT/SEGGER_RTT.c
+++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT.c
@@ -46,7 +46,7 @@ File    : SEGGER_RTT.c
 Purpose : Implementation of SEGGER real-time transfer (RTT) which
           allows real-time communication on targets which support
           debugger memory accesses while the CPU is running.
-Revision: $Rev: 17697 $
+Revision: $Rev: 29668 $
 
 Additional information:
           Type "int" is assumed to be 32-bits in size
@@ -80,6 +80,27 @@ Additional information:
 **********************************************************************
 */
 
+#if SEGGER_RTT_CPU_CACHE_LINE_SIZE
+  #ifdef SEGGER_RTT_CB_ALIGN
+    #error "Custom SEGGER_RTT_CB_ALIGN() is not supported for SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0"
+  #endif
+  #ifdef SEGGER_RTT_BUFFER_ALIGN
+    #error "Custom SEGGER_RTT_BUFFER_ALIGN() is not supported for SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0"
+  #endif
+  #ifdef SEGGER_RTT_PUT_CB_SECTION
+    #error "Custom SEGGER_RTT_PUT_CB_SECTION() is not supported for SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0"
+  #endif
+  #ifdef SEGGER_RTT_PUT_BUFFER_SECTION
+    #error "Custom SEGGER_RTT_PUT_BUFFER_SECTION() is not supported for SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0"
+  #endif
+  #ifdef SEGGER_RTT_BUFFER_ALIGNMENT
+    #error "Custom SEGGER_RTT_BUFFER_ALIGNMENT is not supported for SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0"
+  #endif
+  #ifdef SEGGER_RTT_ALIGNMENT
+    #error "Custom SEGGER_RTT_ALIGNMENT is not supported for SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0"
+  #endif
+#endif
+
 #ifndef   BUFFER_SIZE_UP
   #define BUFFER_SIZE_UP                                  1024  // Size of the buffer for terminal output of target, up to host
 #endif
@@ -103,11 +124,11 @@ Additional information:
 #endif
 
 #ifndef   SEGGER_RTT_ALIGNMENT
-  #define SEGGER_RTT_ALIGNMENT                            0
+  #define SEGGER_RTT_ALIGNMENT                            SEGGER_RTT_CPU_CACHE_LINE_SIZE
 #endif
 
 #ifndef   SEGGER_RTT_BUFFER_ALIGNMENT
-  #define SEGGER_RTT_BUFFER_ALIGNMENT                     0
+  #define SEGGER_RTT_BUFFER_ALIGNMENT                     SEGGER_RTT_CPU_CACHE_LINE_SIZE
 #endif
 
 #ifndef   SEGGER_RTT_MODE_DEFAULT
@@ -127,7 +148,7 @@ Additional information:
 #endif
 
 #ifndef   STRCPY
-  #define STRCPY(pDest, pSrc, NumBytes)                   strcpy((pDest), (pSrc))
+  #define STRCPY(pDest, pSrc)                             strcpy((pDest), (pSrc))
 #endif
 
 #ifndef   SEGGER_RTT_MEMCPY_USE_BYTELOOP
@@ -143,17 +164,17 @@ Additional information:
 #endif
 
 #ifndef   MIN
-  #define MIN(a, b)         (((a) < (b)) ? (a) : (b))
+  #define MIN(a, b)                                       (((a) < (b)) ? (a) : (b))
 #endif
 
 #ifndef   MAX
-  #define MAX(a, b)         (((a) > (b)) ? (a) : (b))
+  #define MAX(a, b)                                       (((a) > (b)) ? (a) : (b))
 #endif
 //
 // For some environments, NULL may not be defined until certain headers are included
 //
 #ifndef NULL
-  #define NULL 0
+  #define NULL                                            0
 #endif
 
 /*********************************************************************
@@ -167,7 +188,7 @@ Additional information:
 #endif
 
 #if SEGGER_RTT_ALIGNMENT || SEGGER_RTT_BUFFER_ALIGNMENT
-  #if (defined __GNUC__)
+  #if ((defined __GNUC__) || (defined __clang__))
     #define SEGGER_RTT_ALIGN(Var, Alignment) Var __attribute__ ((aligned (Alignment)))
   #elif (defined __ICCARM__) || (defined __ICCRX__)
     #define PRAGMA(A) _Pragma(#A)
@@ -183,7 +204,7 @@ Additional information:
 #endif
 
 #if defined(SEGGER_RTT_SECTION) || defined (SEGGER_RTT_BUFFER_SECTION)
-  #if (defined __GNUC__)
+  #if ((defined __GNUC__) || (defined __clang__))
     #define SEGGER_RTT_PUT_SECTION(Var, Section) __attribute__ ((section (Section))) Var
   #elif (defined __ICCARM__) || (defined __ICCRX__)
 #define SEGGER_RTT_PUT_SECTION(Var, Section) RTT_PRAGMA(location=Section) \
@@ -197,7 +218,6 @@ Additional information:
   #define SEGGER_RTT_PUT_SECTION(Var, Section) Var
 #endif
 
-
 #if SEGGER_RTT_ALIGNMENT
   #define SEGGER_RTT_CB_ALIGN(Var)  SEGGER_RTT_ALIGN(Var, SEGGER_RTT_ALIGNMENT)
 #else
@@ -230,7 +250,7 @@ Additional information:
 **********************************************************************
 */
 
-static unsigned char _aTerminalId[16] = { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F' };
+static const unsigned char _aTerminalId[16] = { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F' };
 
 /*********************************************************************
 *
@@ -238,13 +258,30 @@ static unsigned char _aTerminalId[16] = { '0', '1', '2', '3', '4', '5', '6', '7'
 *
 **********************************************************************
 */
+
 //
 // RTT Control Block and allocate buffers for channel 0
 //
-SEGGER_RTT_PUT_CB_SECTION(SEGGER_RTT_CB_ALIGN(SEGGER_RTT_CB _SEGGER_RTT));
-
-SEGGER_RTT_PUT_BUFFER_SECTION(SEGGER_RTT_BUFFER_ALIGN(static char _acUpBuffer  [BUFFER_SIZE_UP]));
-SEGGER_RTT_PUT_BUFFER_SECTION(SEGGER_RTT_BUFFER_ALIGN(static char _acDownBuffer[BUFFER_SIZE_DOWN]));
+#if SEGGER_RTT_CPU_CACHE_LINE_SIZE
+  #if ((defined __GNUC__) || (defined __clang__))
+    SEGGER_RTT_CB _SEGGER_RTT                                                             __attribute__ ((aligned (SEGGER_RTT_CPU_CACHE_LINE_SIZE)));
+    static char   _acUpBuffer  [SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(BUFFER_SIZE_UP)]   __attribute__ ((aligned (SEGGER_RTT_CPU_CACHE_LINE_SIZE)));
+    static char   _acDownBuffer[SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(BUFFER_SIZE_DOWN)] __attribute__ ((aligned (SEGGER_RTT_CPU_CACHE_LINE_SIZE)));
+  #elif (defined __ICCARM__)
+    #pragma data_alignment=SEGGER_RTT_CPU_CACHE_LINE_SIZE
+    SEGGER_RTT_CB _SEGGER_RTT;
+    #pragma data_alignment=SEGGER_RTT_CPU_CACHE_LINE_SIZE
+    static char   _acUpBuffer  [SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(BUFFER_SIZE_UP)];
+    #pragma data_alignment=SEGGER_RTT_CPU_CACHE_LINE_SIZE
+    static char   _acDownBuffer[SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(BUFFER_SIZE_DOWN)];
+  #else
+    #error "Don't know how to place _SEGGER_RTT, _acUpBuffer, _acDownBuffer cache-line aligned"
+  #endif
+#else
+  SEGGER_RTT_PUT_CB_SECTION(SEGGER_RTT_CB_ALIGN(SEGGER_RTT_CB _SEGGER_RTT));
+  SEGGER_RTT_PUT_BUFFER_SECTION(SEGGER_RTT_BUFFER_ALIGN(static char _acUpBuffer  [BUFFER_SIZE_UP]));
+  SEGGER_RTT_PUT_BUFFER_SECTION(SEGGER_RTT_BUFFER_ALIGN(static char _acDownBuffer[BUFFER_SIZE_DOWN]));
+#endif
 
 static unsigned char _ActiveTerminal;
 
@@ -261,18 +298,29 @@ static unsigned char _ActiveTerminal;
 *
 *  Function description
 *    Initializes the control block an buffers.
-*    May only be called via INIT() to avoid overriding settings.
 *
+*  Notes
+*    (1) May only be called via INIT() to avoid overriding settings.
+*        The only exception is SEGGER_RTT_Init(), to make an intentional override possible.
 */
-#define INIT()  do {                                            \
-                  if (_SEGGER_RTT.acID[0] == '\0') { _DoInit(); }  \
-                } while (0)
+  #define INIT()                                                                             \
+    do {                                                                                     \
+      volatile SEGGER_RTT_CB* pRTTCBInit;                                                    \
+      pRTTCBInit = (volatile SEGGER_RTT_CB*)((char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); \
+      if (pRTTCBInit->acID[0] != 'S') {                                                      \
+        _DoInit();                                                                           \
+      }                                                                                      \
+    } while (0)
+
 static void _DoInit(void) {
-  SEGGER_RTT_CB* p;
+  volatile SEGGER_RTT_CB* p;   // Volatile to make sure that compiler cannot change the order of accesses to the control block
+  static const char _aInitStr[] = "\0\0\0\0\0\0TTR REGGES";  // Init complete ID string to make sure that things also work if RTT is linked to a no-init memory area
+  unsigned i;
   //
   // Initialize control block
   //
-  p = &_SEGGER_RTT;
+  p                     = (volatile SEGGER_RTT_CB*)((char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access control block uncached so that nothing in the cache ever becomes dirty and all changes are visible in HW directly
+  memset((SEGGER_RTT_CB*)p, 0, sizeof(_SEGGER_RTT));         // Make sure that the RTT CB is always zero initialized.
   p->MaxNumUpBuffers    = SEGGER_RTT_MAX_NUM_UP_BUFFERS;
   p->MaxNumDownBuffers  = SEGGER_RTT_MAX_NUM_DOWN_BUFFERS;
   //
@@ -280,7 +328,7 @@ static void _DoInit(void) {
   //
   p->aUp[0].sName         = "Terminal";
   p->aUp[0].pBuffer       = _acUpBuffer;
-  p->aUp[0].SizeOfBuffer  = sizeof(_acUpBuffer);
+  p->aUp[0].SizeOfBuffer  = BUFFER_SIZE_UP;
   p->aUp[0].RdOff         = 0u;
   p->aUp[0].WrOff         = 0u;
   p->aUp[0].Flags         = SEGGER_RTT_MODE_DEFAULT;
@@ -289,18 +337,20 @@ static void _DoInit(void) {
   //
   p->aDown[0].sName         = "Terminal";
   p->aDown[0].pBuffer       = _acDownBuffer;
-  p->aDown[0].SizeOfBuffer  = sizeof(_acDownBuffer);
+  p->aDown[0].SizeOfBuffer  = BUFFER_SIZE_DOWN;
   p->aDown[0].RdOff         = 0u;
   p->aDown[0].WrOff         = 0u;
   p->aDown[0].Flags         = SEGGER_RTT_MODE_DEFAULT;
   //
   // Finish initialization of the control block.
-  // Copy Id string in three steps to make sure "SEGGER RTT" is not found
-  // in initializer memory (usually flash) by J-Link
+  // Copy Id string backwards to make sure that "SEGGER RTT" is not found in initializer memory (usually flash),
+  // as this would cause J-Link to "find" the control block at a wrong address.
   //
-  STRCPY(&p->acID[7], "RTT", 9);
-  STRCPY(&p->acID[0], "SEGGER", 7);
-  p->acID[6] = ' ';
+  RTT__DMB();                       // Force order of memory accesses for cores that may perform out-of-order memory accesses
+  for (i = 0; i < sizeof(_aInitStr) - 1; ++i) {
+    p->acID[i] = _aInitStr[sizeof(_aInitStr) - 2 - i];  // Skip terminating \0 at the end of the array
+  }
+  RTT__DMB();                       // Force order of memory accesses for cores that may perform out-of-order memory accesses
 }
 
 /*********************************************************************
@@ -327,9 +377,7 @@ static unsigned _WriteBlocking(SEGGER_RTT_BUFFER_UP* pRing, const char* pBuffer,
   unsigned NumBytesWritten;
   unsigned RdOff;
   unsigned WrOff;
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
-  char*    pDst;
-#endif
+  volatile char* pDst;
   //
   // Write data to buffer and handle wrap-around if necessary
   //
@@ -344,8 +392,8 @@ static unsigned _WriteBlocking(SEGGER_RTT_BUFFER_UP* pRing, const char* pBuffer,
     }
     NumBytesToWrite = MIN(NumBytesToWrite, (pRing->SizeOfBuffer - WrOff));      // Number of bytes that can be written until buffer wrap-around
     NumBytesToWrite = MIN(NumBytesToWrite, NumBytes);
+    pDst = (pRing->pBuffer + WrOff) + SEGGER_RTT_UNCACHED_OFF;
 #if SEGGER_RTT_MEMCPY_USE_BYTELOOP
-    pDst = pRing->pBuffer + WrOff;
     NumBytesWritten += NumBytesToWrite;
     NumBytes        -= NumBytesToWrite;
     WrOff           += NumBytesToWrite;
@@ -353,7 +401,7 @@ static unsigned _WriteBlocking(SEGGER_RTT_BUFFER_UP* pRing, const char* pBuffer,
       *pDst++ = *pBuffer++;
     };
 #else
-    SEGGER_RTT_MEMCPY(pRing->pBuffer + WrOff, pBuffer, NumBytesToWrite);
+    SEGGER_RTT_MEMCPY((void*)pDst, pBuffer, NumBytesToWrite);
     NumBytesWritten += NumBytesToWrite;
     pBuffer         += NumBytesToWrite;
     NumBytes        -= NumBytesToWrite;
@@ -362,9 +410,9 @@ static unsigned _WriteBlocking(SEGGER_RTT_BUFFER_UP* pRing, const char* pBuffer,
     if (WrOff == pRing->SizeOfBuffer) {
       WrOff = 0u;
     }
+    RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
     pRing->WrOff = WrOff;
   } while (NumBytes);
-  //
   return NumBytesWritten;
 }
 
@@ -390,9 +438,7 @@ static void _WriteNoCheck(SEGGER_RTT_BUFFER_UP* pRing, const char* pData, unsign
   unsigned NumBytesAtOnce;
   unsigned WrOff;
   unsigned Rem;
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
-  char*    pDst;
-#endif
+  volatile char* pDst;
 
   WrOff = pRing->WrOff;
   Rem = pRing->SizeOfBuffer - WrOff;
@@ -400,15 +446,17 @@ static void _WriteNoCheck(SEGGER_RTT_BUFFER_UP* pRing, const char* pData, unsign
     //
     // All data fits before wrap around
     //
+    pDst = (pRing->pBuffer + WrOff) + SEGGER_RTT_UNCACHED_OFF;
 #if SEGGER_RTT_MEMCPY_USE_BYTELOOP
-    pDst = pRing->pBuffer + WrOff;
     WrOff += NumBytes;
     while (NumBytes--) {
       *pDst++ = *pData++;
     };
+    RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
     pRing->WrOff = WrOff;
 #else
-    SEGGER_RTT_MEMCPY(pRing->pBuffer + WrOff, pData, NumBytes);
+    SEGGER_RTT_MEMCPY((void*)pDst, pData, NumBytes);
+    RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
     pRing->WrOff = WrOff + NumBytes;
 #endif
   } else {
@@ -416,22 +464,26 @@ static void _WriteNoCheck(SEGGER_RTT_BUFFER_UP* pRing, const char* pData, unsign
     // We reach the end of the buffer, so need to wrap around
     //
 #if SEGGER_RTT_MEMCPY_USE_BYTELOOP
-    pDst = pRing->pBuffer + WrOff;
+    pDst = (pRing->pBuffer + WrOff) + SEGGER_RTT_UNCACHED_OFF;
     NumBytesAtOnce = Rem;
     while (NumBytesAtOnce--) {
       *pDst++ = *pData++;
     };
-    pDst = pRing->pBuffer;
+    pDst = pRing->pBuffer + SEGGER_RTT_UNCACHED_OFF;
     NumBytesAtOnce = NumBytes - Rem;
     while (NumBytesAtOnce--) {
       *pDst++ = *pData++;
     };
+    RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
     pRing->WrOff = NumBytes - Rem;
 #else
     NumBytesAtOnce = Rem;
-    SEGGER_RTT_MEMCPY(pRing->pBuffer + WrOff, pData, NumBytesAtOnce);
+    pDst = (pRing->pBuffer + WrOff) + SEGGER_RTT_UNCACHED_OFF;
+    SEGGER_RTT_MEMCPY((void*)pDst, pData, NumBytesAtOnce);
     NumBytesAtOnce = NumBytes - Rem;
-    SEGGER_RTT_MEMCPY(pRing->pBuffer, pData + Rem, NumBytesAtOnce);
+    pDst = pRing->pBuffer + SEGGER_RTT_UNCACHED_OFF;
+    SEGGER_RTT_MEMCPY((void*)pDst, pData + Rem, NumBytesAtOnce);
+    RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
     pRing->WrOff = NumBytesAtOnce;
 #endif
   }
@@ -496,6 +548,7 @@ static unsigned _GetAvailWriteSpace(SEGGER_RTT_BUFFER_UP* pRing) {
 *
 **********************************************************************
 */
+
 /*********************************************************************
 *
 *       SEGGER_RTT_ReadUpBufferNoLock()
@@ -525,12 +578,10 @@ unsigned SEGGER_RTT_ReadUpBufferNoLock(unsigned BufferIndex, void* pData, unsign
   unsigned                WrOff;
   unsigned char*          pBuffer;
   SEGGER_RTT_BUFFER_UP*   pRing;
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
-  const char*             pSrc;
-#endif
-  //
+  volatile char*          pSrc;
+
   INIT();
-  pRing = &_SEGGER_RTT.aUp[BufferIndex];
+  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   pBuffer = (unsigned char*)pData;
   RdOff = pRing->RdOff;
   WrOff = pRing->WrOff;
@@ -541,8 +592,8 @@ unsigned SEGGER_RTT_ReadUpBufferNoLock(unsigned BufferIndex, void* pData, unsign
   if (RdOff > WrOff) {
     NumBytesRem = pRing->SizeOfBuffer - RdOff;
     NumBytesRem = MIN(NumBytesRem, BufferSize);
+    pSrc = (pRing->pBuffer + RdOff) + SEGGER_RTT_UNCACHED_OFF;
 #if SEGGER_RTT_MEMCPY_USE_BYTELOOP
-    pSrc = pRing->pBuffer + RdOff;
     NumBytesRead += NumBytesRem;
     BufferSize   -= NumBytesRem;
     RdOff        += NumBytesRem;
@@ -550,7 +601,7 @@ unsigned SEGGER_RTT_ReadUpBufferNoLock(unsigned BufferIndex, void* pData, unsign
       *pBuffer++ = *pSrc++;
     };
 #else
-    SEGGER_RTT_MEMCPY(pBuffer, pRing->pBuffer + RdOff, NumBytesRem);
+    SEGGER_RTT_MEMCPY(pBuffer, (void*)pSrc, NumBytesRem);
     NumBytesRead += NumBytesRem;
     pBuffer      += NumBytesRem;
     BufferSize   -= NumBytesRem;
@@ -569,8 +620,8 @@ unsigned SEGGER_RTT_ReadUpBufferNoLock(unsigned BufferIndex, void* pData, unsign
   NumBytesRem = WrOff - RdOff;
   NumBytesRem = MIN(NumBytesRem, BufferSize);
   if (NumBytesRem > 0u) {
+    pSrc = (pRing->pBuffer + RdOff) + SEGGER_RTT_UNCACHED_OFF;
 #if SEGGER_RTT_MEMCPY_USE_BYTELOOP
-    pSrc = pRing->pBuffer + RdOff;
     NumBytesRead += NumBytesRem;
     BufferSize   -= NumBytesRem;
     RdOff        += NumBytesRem;
@@ -578,7 +629,7 @@ unsigned SEGGER_RTT_ReadUpBufferNoLock(unsigned BufferIndex, void* pData, unsign
       *pBuffer++ = *pSrc++;
     };
 #else
-    SEGGER_RTT_MEMCPY(pBuffer, pRing->pBuffer + RdOff, NumBytesRem);
+    SEGGER_RTT_MEMCPY(pBuffer, (void*)pSrc, NumBytesRem);
     NumBytesRead += NumBytesRem;
     pBuffer      += NumBytesRem;
     BufferSize   -= NumBytesRem;
@@ -619,12 +670,10 @@ unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned Buffe
   unsigned                WrOff;
   unsigned char*          pBuffer;
   SEGGER_RTT_BUFFER_DOWN* pRing;
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
-  const char*             pSrc;
-#endif
+  volatile char*          pSrc;
   //
   INIT();
-  pRing = &_SEGGER_RTT.aDown[BufferIndex];
+  pRing = (SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   pBuffer = (unsigned char*)pData;
   RdOff = pRing->RdOff;
   WrOff = pRing->WrOff;
@@ -635,8 +684,8 @@ unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned Buffe
   if (RdOff > WrOff) {
     NumBytesRem = pRing->SizeOfBuffer - RdOff;
     NumBytesRem = MIN(NumBytesRem, BufferSize);
+    pSrc = (pRing->pBuffer + RdOff) + SEGGER_RTT_UNCACHED_OFF;
 #if SEGGER_RTT_MEMCPY_USE_BYTELOOP
-    pSrc = pRing->pBuffer + RdOff;
     NumBytesRead += NumBytesRem;
     BufferSize   -= NumBytesRem;
     RdOff        += NumBytesRem;
@@ -644,7 +693,7 @@ unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned Buffe
       *pBuffer++ = *pSrc++;
     };
 #else
-    SEGGER_RTT_MEMCPY(pBuffer, pRing->pBuffer + RdOff, NumBytesRem);
+    SEGGER_RTT_MEMCPY(pBuffer, (void*)pSrc, NumBytesRem);
     NumBytesRead += NumBytesRem;
     pBuffer      += NumBytesRem;
     BufferSize   -= NumBytesRem;
@@ -663,8 +712,8 @@ unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned Buffe
   NumBytesRem = WrOff - RdOff;
   NumBytesRem = MIN(NumBytesRem, BufferSize);
   if (NumBytesRem > 0u) {
+    pSrc = (pRing->pBuffer + RdOff) + SEGGER_RTT_UNCACHED_OFF;
 #if SEGGER_RTT_MEMCPY_USE_BYTELOOP
-    pSrc = pRing->pBuffer + RdOff;
     NumBytesRead += NumBytesRem;
     BufferSize   -= NumBytesRem;
     RdOff        += NumBytesRem;
@@ -672,7 +721,7 @@ unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned Buffe
       *pBuffer++ = *pSrc++;
     };
 #else
-    SEGGER_RTT_MEMCPY(pBuffer, pRing->pBuffer + RdOff, NumBytesRem);
+    SEGGER_RTT_MEMCPY(pBuffer, (void*)pSrc, NumBytesRem);
     NumBytesRead += NumBytesRem;
     pBuffer      += NumBytesRem;
     BufferSize   -= NumBytesRem;
@@ -713,7 +762,7 @@ unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned Buffe
 */
 unsigned SEGGER_RTT_ReadUpBuffer(unsigned BufferIndex, void* pBuffer, unsigned BufferSize) {
   unsigned NumBytesRead;
-  //
+
   SEGGER_RTT_LOCK();
   //
   // Call the non-locking read function
@@ -745,7 +794,7 @@ unsigned SEGGER_RTT_ReadUpBuffer(unsigned BufferIndex, void* pBuffer, unsigned B
 */
 unsigned SEGGER_RTT_Read(unsigned BufferIndex, void* pBuffer, unsigned BufferSize) {
   unsigned NumBytesRead;
-  //
+
   SEGGER_RTT_LOCK();
   //
   // Call the non-locking read function
@@ -786,15 +835,12 @@ void SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuff
   const char*           pData;
   SEGGER_RTT_BUFFER_UP* pRing;
   unsigned              Avail;
-#if SEGGER_RTT_MEMCPY_USE_BYTELOOP
-  char*                 pDst;
-#endif
-
-  pData = (const char *)pBuffer;
+  volatile char*        pDst;
   //
   // Get "to-host" ring buffer and copy some elements into local variables.
   //
-  pRing = &_SEGGER_RTT.aUp[BufferIndex];
+  pData = (const char *)pBuffer;
+  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   //
   // Check if we will overwrite data and need to adjust the RdOff.
   //
@@ -820,15 +866,17 @@ void SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuff
       //
       // Last round
       //
+      pDst = (pRing->pBuffer + pRing->WrOff) + SEGGER_RTT_UNCACHED_OFF;
 #if SEGGER_RTT_MEMCPY_USE_BYTELOOP
-      pDst = pRing->pBuffer + pRing->WrOff;
       Avail = NumBytes;
       while (NumBytes--) {
         *pDst++ = *pData++;
       };
+      RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
       pRing->WrOff += Avail;
 #else
-      SEGGER_RTT_MEMCPY(pRing->pBuffer + pRing->WrOff, pData, NumBytes);
+      SEGGER_RTT_MEMCPY((void*)pDst, pData, NumBytes);
+      RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
       pRing->WrOff += NumBytes;
 #endif
       break;
@@ -836,16 +884,18 @@ void SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuff
       //
       //  Wrap-around necessary, write until wrap-around and reset WrOff
       //
+      pDst = (pRing->pBuffer + pRing->WrOff) + SEGGER_RTT_UNCACHED_OFF;
 #if SEGGER_RTT_MEMCPY_USE_BYTELOOP
-      pDst = pRing->pBuffer + pRing->WrOff;
       NumBytes -= Avail;
       while (Avail--) {
         *pDst++ = *pData++;
       };
+      RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
       pRing->WrOff = 0;
 #else
-      SEGGER_RTT_MEMCPY(pRing->pBuffer + pRing->WrOff, pData, Avail);
+      SEGGER_RTT_MEMCPY((void*)pDst, pData, Avail);
       pData += Avail;
+      RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
       pRing->WrOff = 0;
       NumBytes -= Avail;
 #endif
@@ -889,6 +939,7 @@ unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void* pBuffer, u
   unsigned              RdOff;
   unsigned              WrOff;
   unsigned              Rem;
+  volatile char*        pDst;
   //
   // Cases:
   //   1) RdOff <= WrOff => Space until wrap-around is sufficient
@@ -900,21 +951,22 @@ unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void* pBuffer, u
   // 1) is the most common case for large buffers and assuming that J-Link reads the data fast enough
   //
   pData = (const char *)pBuffer;
-  pRing = &_SEGGER_RTT.aUp[BufferIndex];
+  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   RdOff = pRing->RdOff;
   WrOff = pRing->WrOff;
+  pDst = (pRing->pBuffer + WrOff) + SEGGER_RTT_UNCACHED_OFF;
   if (RdOff <= WrOff) {                                 // Case 1), 2) or 3)
     Avail = pRing->SizeOfBuffer - WrOff - 1u;           // Space until wrap-around (assume 1 byte not usable for case that RdOff == 0)
     if (Avail >= NumBytes) {                            // Case 1)?
-CopyStraight:
-      memcpy(pRing->pBuffer + WrOff, pData, NumBytes);
+      memcpy((void*)pDst, pData, NumBytes);
+      RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
       pRing->WrOff = WrOff + NumBytes;
       return 1;
     }
     Avail += RdOff;                                     // Space incl. wrap-around
     if (Avail >= NumBytes) {                            // Case 2? => If not, we have case 3) (does not fit)
       Rem = pRing->SizeOfBuffer - WrOff;                // Space until end of buffer
-      memcpy(pRing->pBuffer + WrOff, pData, Rem);       // Copy 1st chunk
+      memcpy((void*)pDst, pData, Rem);                  // Copy 1st chunk
       NumBytes -= Rem;
       //
       // Special case: First check that assumed RdOff == 0 calculated that last element before wrap-around could not be used
@@ -923,15 +975,20 @@ CopyStraight:
       // Therefore, check if 2nd memcpy is necessary at all
       //
       if (NumBytes) {
-        memcpy(pRing->pBuffer, pData + Rem, NumBytes);
+        pDst = pRing->pBuffer + SEGGER_RTT_UNCACHED_OFF;
+        memcpy((void*)pDst, pData + Rem, NumBytes);
       }
+      RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
       pRing->WrOff = NumBytes;
       return 1;
     }
   } else {                                             // Potential case 4)
     Avail = RdOff - WrOff - 1u;
     if (Avail >= NumBytes) {                           // Case 4)? => If not, we have case 5) (does not fit)
-      goto CopyStraight;
+      memcpy((void*)pDst, pData, NumBytes);
+      RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
+      pRing->WrOff = WrOff + NumBytes;
+      return 1;
     }
   }
   return 0;     // No space in buffer
@@ -971,13 +1028,12 @@ unsigned SEGGER_RTT_WriteDownBufferNoLock(unsigned BufferIndex, const void* pBuf
   unsigned                Avail;
   const char*             pData;
   SEGGER_RTT_BUFFER_UP*   pRing;
-
-  pData = (const char *)pBuffer;
   //
   // Get "to-target" ring buffer.
   // It is save to cast that to a "to-host" buffer. Up and Down buffer differ in volatility of offsets that might be modified by J-Link.
   //
-  pRing = (SEGGER_RTT_BUFFER_UP*)&_SEGGER_RTT.aDown[BufferIndex];
+  pData = (const char *)pBuffer;
+  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aDown[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   //
   // How we output depends upon the mode...
   //
@@ -1047,12 +1103,11 @@ unsigned SEGGER_RTT_WriteNoLock(unsigned BufferIndex, const void* pBuffer, unsig
   unsigned              Avail;
   const char*           pData;
   SEGGER_RTT_BUFFER_UP* pRing;
-
-  pData = (const char *)pBuffer;
   //
   // Get "to-host" ring buffer.
   //
-  pRing = &_SEGGER_RTT.aUp[BufferIndex];
+  pData = (const char *)pBuffer;
+  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   //
   // How we output depends upon the mode...
   //
@@ -1121,18 +1176,11 @@ unsigned SEGGER_RTT_WriteNoLock(unsigned BufferIndex, const void* pBuffer, unsig
 */
 unsigned SEGGER_RTT_WriteDownBuffer(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
   unsigned Status;
-  //
+
   INIT();
   SEGGER_RTT_LOCK();
-  //
-  // Call the non-locking write function
-  //
-  Status = SEGGER_RTT_WriteDownBufferNoLock(BufferIndex, pBuffer, NumBytes);
-  //
-  // Finish up.
-  //
+  Status = SEGGER_RTT_WriteDownBufferNoLock(BufferIndex, pBuffer, NumBytes);  // Call the non-locking write function
   SEGGER_RTT_UNLOCK();
-  //
   return Status;
 }
 
@@ -1157,18 +1205,11 @@ unsigned SEGGER_RTT_WriteDownBuffer(unsigned BufferIndex, const void* pBuffer, u
 */
 unsigned SEGGER_RTT_Write(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes) {
   unsigned Status;
-  //
+
   INIT();
   SEGGER_RTT_LOCK();
-  //
-  // Call the non-locking write function
-  //
-  Status = SEGGER_RTT_WriteNoLock(BufferIndex, pBuffer, NumBytes);
-  //
-  // Finish up.
-  //
+  Status = SEGGER_RTT_WriteNoLock(BufferIndex, pBuffer, NumBytes);  // Call the non-locking write function
   SEGGER_RTT_UNLOCK();
-  //
   return Status;
 }
 
@@ -1226,10 +1267,11 @@ unsigned SEGGER_RTT_PutCharSkipNoLock(unsigned BufferIndex, char c) {
   SEGGER_RTT_BUFFER_UP* pRing;
   unsigned              WrOff;
   unsigned              Status;
+  volatile char*        pDst;
   //
   // Get "to-host" ring buffer.
   //
-  pRing = &_SEGGER_RTT.aUp[BufferIndex];
+  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   //
   // Get write position and handle wrap-around if necessary
   //
@@ -1241,7 +1283,9 @@ unsigned SEGGER_RTT_PutCharSkipNoLock(unsigned BufferIndex, char c) {
   // Output byte if free space is available
   //
   if (WrOff != pRing->RdOff) {
-    pRing->pBuffer[pRing->WrOff] = c;
+    pDst = (pRing->pBuffer + pRing->WrOff) + SEGGER_RTT_UNCACHED_OFF;
+    *pDst = c;
+    RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
     pRing->WrOff = WrOff;
     Status = 1;
   } else {
@@ -1273,6 +1317,7 @@ unsigned SEGGER_RTT_PutCharSkip(unsigned BufferIndex, char c) {
   SEGGER_RTT_BUFFER_UP* pRing;
   unsigned              WrOff;
   unsigned              Status;
+  volatile char*        pDst;
   //
   // Prepare
   //
@@ -1281,7 +1326,7 @@ unsigned SEGGER_RTT_PutCharSkip(unsigned BufferIndex, char c) {
   //
   // Get "to-host" ring buffer.
   //
-  pRing = &_SEGGER_RTT.aUp[BufferIndex];
+  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   //
   // Get write position and handle wrap-around if necessary
   //
@@ -1293,7 +1338,9 @@ unsigned SEGGER_RTT_PutCharSkip(unsigned BufferIndex, char c) {
   // Output byte if free space is available
   //
   if (WrOff != pRing->RdOff) {
-    pRing->pBuffer[pRing->WrOff] = c;
+    pDst  = (pRing->pBuffer + pRing->WrOff) + SEGGER_RTT_UNCACHED_OFF;
+    *pDst = c;
+    RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
     pRing->WrOff = WrOff;
     Status = 1;
   } else {
@@ -1329,6 +1376,7 @@ unsigned SEGGER_RTT_PutChar(unsigned BufferIndex, char c) {
   SEGGER_RTT_BUFFER_UP* pRing;
   unsigned              WrOff;
   unsigned              Status;
+  volatile char*        pDst;
   //
   // Prepare
   //
@@ -1337,7 +1385,7 @@ unsigned SEGGER_RTT_PutChar(unsigned BufferIndex, char c) {
   //
   // Get "to-host" ring buffer.
   //
-  pRing = &_SEGGER_RTT.aUp[BufferIndex];
+  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   //
   // Get write position and handle wrap-around if necessary
   //
@@ -1357,7 +1405,9 @@ unsigned SEGGER_RTT_PutChar(unsigned BufferIndex, char c) {
   // Output byte if free space is available
   //
   if (WrOff != pRing->RdOff) {
-    pRing->pBuffer[pRing->WrOff] = c;
+    pDst  = (pRing->pBuffer + pRing->WrOff) + SEGGER_RTT_UNCACHED_OFF;
+    *pDst = c;
+    RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
     pRing->WrOff = WrOff;
     Status = 1;
   } else {
@@ -1367,7 +1417,6 @@ unsigned SEGGER_RTT_PutChar(unsigned BufferIndex, char c) {
   // Finish up.
   //
   SEGGER_RTT_UNLOCK();
-  //
   return Status;
 }
 
@@ -1404,7 +1453,7 @@ int SEGGER_RTT_GetKey(void) {
 *       SEGGER_RTT_WaitKey
 *
 *  Function description
-*    Waits until at least one character is available in the SEGGER RTT buffer.
+*    Waits until at least one character is avaible in the SEGGER RTT buffer.
 *    Once a character is available, it is read and this function returns.
 *
 *  Return value
@@ -1438,12 +1487,14 @@ int SEGGER_RTT_WaitKey(void) {
 *    (1) This function is only specified for accesses to RTT buffer 0
 */
 int SEGGER_RTT_HasKey(void) {
+  SEGGER_RTT_BUFFER_DOWN* pRing;
   unsigned RdOff;
   int r;
 
   INIT();
-  RdOff = _SEGGER_RTT.aDown[0].RdOff;
-  if (RdOff != _SEGGER_RTT.aDown[0].WrOff) {
+  pRing = (SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[0] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  RdOff = pRing->RdOff;
+  if (RdOff != pRing->WrOff) {
     r = 1;
   } else {
     r = 0;
@@ -1467,7 +1518,7 @@ unsigned SEGGER_RTT_HasData(unsigned BufferIndex) {
   SEGGER_RTT_BUFFER_DOWN* pRing;
   unsigned                v;
 
-  pRing = &_SEGGER_RTT.aDown[BufferIndex];
+  pRing = (SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   v = pRing->WrOff;
   return v - pRing->RdOff;
 }
@@ -1488,7 +1539,7 @@ unsigned SEGGER_RTT_HasDataUp(unsigned BufferIndex) {
   SEGGER_RTT_BUFFER_UP* pRing;
   unsigned                v;
 
-  pRing = &_SEGGER_RTT.aUp[BufferIndex];
+  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   v = pRing->RdOff;
   return pRing->WrOff - v;
 }
@@ -1507,6 +1558,7 @@ unsigned SEGGER_RTT_HasDataUp(unsigned BufferIndex) {
 *    pBuffer      Pointer to a buffer to be used.
 *    BufferSize   Size of the buffer.
 *    Flags        Operating modes. Define behavior if buffer is full (not enough space for entire message).
+*                 Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode.
 *
 *  Return value
 *    >= 0 - O.K. Buffer Index
@@ -1514,23 +1566,26 @@ unsigned SEGGER_RTT_HasDataUp(unsigned BufferIndex) {
 */
 int SEGGER_RTT_AllocDownBuffer(const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags) {
   int BufferIndex;
+  volatile SEGGER_RTT_CB* pRTTCB;
 
   INIT();
   SEGGER_RTT_LOCK();
+  pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   BufferIndex = 0;
   do {
-    if (_SEGGER_RTT.aDown[BufferIndex].pBuffer == NULL) {
+    if (pRTTCB->aDown[BufferIndex].pBuffer == NULL) {
       break;
     }
     BufferIndex++;
-  } while (BufferIndex < _SEGGER_RTT.MaxNumDownBuffers);
-  if (BufferIndex < _SEGGER_RTT.MaxNumDownBuffers) {
-    _SEGGER_RTT.aDown[BufferIndex].sName        = sName;
-    _SEGGER_RTT.aDown[BufferIndex].pBuffer      = (char*)pBuffer;
-    _SEGGER_RTT.aDown[BufferIndex].SizeOfBuffer = BufferSize;
-    _SEGGER_RTT.aDown[BufferIndex].RdOff        = 0u;
-    _SEGGER_RTT.aDown[BufferIndex].WrOff        = 0u;
-    _SEGGER_RTT.aDown[BufferIndex].Flags        = Flags;
+  } while (BufferIndex < pRTTCB->MaxNumDownBuffers);
+  if (BufferIndex < pRTTCB->MaxNumDownBuffers) {
+    pRTTCB->aDown[BufferIndex].sName        = sName;
+    pRTTCB->aDown[BufferIndex].pBuffer      = (char*)pBuffer;
+    pRTTCB->aDown[BufferIndex].SizeOfBuffer = BufferSize;
+    pRTTCB->aDown[BufferIndex].RdOff        = 0u;
+    pRTTCB->aDown[BufferIndex].WrOff        = 0u;
+    pRTTCB->aDown[BufferIndex].Flags        = Flags;
+    RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
   } else {
     BufferIndex = -1;
   }
@@ -1552,6 +1607,7 @@ int SEGGER_RTT_AllocDownBuffer(const char* sName, void* pBuffer, unsigned Buffer
 *    pBuffer      Pointer to a buffer to be used.
 *    BufferSize   Size of the buffer.
 *    Flags        Operating modes. Define behavior if buffer is full (not enough space for entire message).
+*                 Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode.
 *
 *  Return value
 *    >= 0 - O.K. Buffer Index
@@ -1559,23 +1615,26 @@ int SEGGER_RTT_AllocDownBuffer(const char* sName, void* pBuffer, unsigned Buffer
 */
 int SEGGER_RTT_AllocUpBuffer(const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags) {
   int BufferIndex;
+  volatile SEGGER_RTT_CB* pRTTCB;
 
   INIT();
   SEGGER_RTT_LOCK();
+  pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   BufferIndex = 0;
   do {
-    if (_SEGGER_RTT.aUp[BufferIndex].pBuffer == NULL) {
+    if (pRTTCB->aUp[BufferIndex].pBuffer == NULL) {
       break;
     }
     BufferIndex++;
-  } while (BufferIndex < _SEGGER_RTT.MaxNumUpBuffers);
-  if (BufferIndex < _SEGGER_RTT.MaxNumUpBuffers) {
-    _SEGGER_RTT.aUp[BufferIndex].sName        = sName;
-    _SEGGER_RTT.aUp[BufferIndex].pBuffer      = (char*)pBuffer;
-    _SEGGER_RTT.aUp[BufferIndex].SizeOfBuffer = BufferSize;
-    _SEGGER_RTT.aUp[BufferIndex].RdOff        = 0u;
-    _SEGGER_RTT.aUp[BufferIndex].WrOff        = 0u;
-    _SEGGER_RTT.aUp[BufferIndex].Flags        = Flags;
+  } while (BufferIndex < pRTTCB->MaxNumUpBuffers);
+  if (BufferIndex < pRTTCB->MaxNumUpBuffers) {
+    pRTTCB->aUp[BufferIndex].sName        = sName;
+    pRTTCB->aUp[BufferIndex].pBuffer      = (char*)pBuffer;
+    pRTTCB->aUp[BufferIndex].SizeOfBuffer = BufferSize;
+    pRTTCB->aUp[BufferIndex].RdOff        = 0u;
+    pRTTCB->aUp[BufferIndex].WrOff        = 0u;
+    pRTTCB->aUp[BufferIndex].Flags        = Flags;
+    RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
   } else {
     BufferIndex = -1;
   }
@@ -1598,6 +1657,7 @@ int SEGGER_RTT_AllocUpBuffer(const char* sName, void* pBuffer, unsigned BufferSi
 *    pBuffer      Pointer to a buffer to be used.
 *    BufferSize   Size of the buffer.
 *    Flags        Operating modes. Define behavior if buffer is full (not enough space for entire message).
+*                 Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode.
 *
 *  Return value
 *    >= 0 - O.K.
@@ -1610,18 +1670,22 @@ int SEGGER_RTT_AllocUpBuffer(const char* sName, void* pBuffer, unsigned BufferSi
 */
 int SEGGER_RTT_ConfigUpBuffer(unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags) {
   int r;
+  volatile SEGGER_RTT_CB* pRTTCB;
+  volatile SEGGER_RTT_BUFFER_UP* pUp;
 
   INIT();
-  if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumUpBuffers) {
+  pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  if (BufferIndex < SEGGER_RTT_MAX_NUM_UP_BUFFERS) {
     SEGGER_RTT_LOCK();
-    if (BufferIndex > 0u) {
-      _SEGGER_RTT.aUp[BufferIndex].sName        = sName;
-      _SEGGER_RTT.aUp[BufferIndex].pBuffer      = (char*)pBuffer;
-      _SEGGER_RTT.aUp[BufferIndex].SizeOfBuffer = BufferSize;
-      _SEGGER_RTT.aUp[BufferIndex].RdOff        = 0u;
-      _SEGGER_RTT.aUp[BufferIndex].WrOff        = 0u;
+    pUp = &pRTTCB->aUp[BufferIndex];
+    if (BufferIndex) {
+      pUp->sName        = sName;
+      pUp->pBuffer      = (char*)pBuffer;
+      pUp->SizeOfBuffer = BufferSize;
+      pUp->RdOff        = 0u;
+      pUp->WrOff        = 0u;
     }
-    _SEGGER_RTT.aUp[BufferIndex].Flags          = Flags;
+    pUp->Flags          = Flags;
     SEGGER_RTT_UNLOCK();
     r =  0;
   } else {
@@ -1645,6 +1709,7 @@ int SEGGER_RTT_ConfigUpBuffer(unsigned BufferIndex, const char* sName, void* pBu
 *    pBuffer      Pointer to a buffer to be used.
 *    BufferSize   Size of the buffer.
 *    Flags        Operating modes. Define behavior if buffer is full (not enough space for entire message).
+*                 Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode.
 *
 *  Return value
 *    >= 0  O.K.
@@ -1657,18 +1722,23 @@ int SEGGER_RTT_ConfigUpBuffer(unsigned BufferIndex, const char* sName, void* pBu
 */
 int SEGGER_RTT_ConfigDownBuffer(unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags) {
   int r;
+  volatile SEGGER_RTT_CB* pRTTCB;
+  volatile SEGGER_RTT_BUFFER_DOWN* pDown;
 
   INIT();
-  if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumDownBuffers) {
+  pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  if (BufferIndex < SEGGER_RTT_MAX_NUM_DOWN_BUFFERS) {
     SEGGER_RTT_LOCK();
-    if (BufferIndex > 0u) {
-      _SEGGER_RTT.aDown[BufferIndex].sName        = sName;
-      _SEGGER_RTT.aDown[BufferIndex].pBuffer      = (char*)pBuffer;
-      _SEGGER_RTT.aDown[BufferIndex].SizeOfBuffer = BufferSize;
-      _SEGGER_RTT.aDown[BufferIndex].RdOff        = 0u;
-      _SEGGER_RTT.aDown[BufferIndex].WrOff        = 0u;
+    pDown = &pRTTCB->aDown[BufferIndex];
+    if (BufferIndex) {
+      pDown->sName        = sName;
+      pDown->pBuffer      = (char*)pBuffer;
+      pDown->SizeOfBuffer = BufferSize;
+      pDown->RdOff        = 0u;
+      pDown->WrOff        = 0u;
     }
-    _SEGGER_RTT.aDown[BufferIndex].Flags          = Flags;
+    pDown->Flags          = Flags;
+    RTT__DMB();                     // Force data write to be complete before writing the <WrOff>, in case CPU is allowed to change the order of memory accesses
     SEGGER_RTT_UNLOCK();
     r =  0;
   } else {
@@ -1695,11 +1765,15 @@ int SEGGER_RTT_ConfigDownBuffer(unsigned BufferIndex, const char* sName, void* p
 */
 int SEGGER_RTT_SetNameUpBuffer(unsigned BufferIndex, const char* sName) {
   int r;
+  volatile SEGGER_RTT_CB* pRTTCB;
+  volatile SEGGER_RTT_BUFFER_UP* pUp;
 
   INIT();
-  if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumUpBuffers) {
+  pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  if (BufferIndex < SEGGER_RTT_MAX_NUM_UP_BUFFERS) {
     SEGGER_RTT_LOCK();
-    _SEGGER_RTT.aUp[BufferIndex].sName = sName;
+    pUp = &pRTTCB->aUp[BufferIndex];
+    pUp->sName = sName;
     SEGGER_RTT_UNLOCK();
     r =  0;
   } else {
@@ -1726,11 +1800,15 @@ int SEGGER_RTT_SetNameUpBuffer(unsigned BufferIndex, const char* sName) {
 */
 int SEGGER_RTT_SetNameDownBuffer(unsigned BufferIndex, const char* sName) {
   int r;
+  volatile SEGGER_RTT_CB* pRTTCB;
+  volatile SEGGER_RTT_BUFFER_DOWN* pDown;
 
   INIT();
-  if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumDownBuffers) {
+  pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  if (BufferIndex < SEGGER_RTT_MAX_NUM_DOWN_BUFFERS) {
     SEGGER_RTT_LOCK();
-    _SEGGER_RTT.aDown[BufferIndex].sName = sName;
+    pDown = &pRTTCB->aDown[BufferIndex];
+    pDown->sName = sName;
     SEGGER_RTT_UNLOCK();
     r =  0;
   } else {
@@ -1750,6 +1828,7 @@ int SEGGER_RTT_SetNameDownBuffer(unsigned BufferIndex, const char* sName) {
 *  Parameters
 *    BufferIndex  Index of the buffer.
 *    Flags        Flags to set for the buffer.
+*                 Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode.
 *
 *  Return value
 *    >= 0  O.K.
@@ -1757,11 +1836,15 @@ int SEGGER_RTT_SetNameDownBuffer(unsigned BufferIndex, const char* sName) {
 */
 int SEGGER_RTT_SetFlagsUpBuffer(unsigned BufferIndex, unsigned Flags) {
   int r;
+  volatile SEGGER_RTT_CB* pRTTCB;
+  volatile SEGGER_RTT_BUFFER_UP* pUp;
 
   INIT();
-  if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumUpBuffers) {
+  pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  if (BufferIndex < SEGGER_RTT_MAX_NUM_UP_BUFFERS) {
     SEGGER_RTT_LOCK();
-    _SEGGER_RTT.aUp[BufferIndex].Flags = Flags;
+    pUp = &pRTTCB->aUp[BufferIndex];
+    pUp->Flags = Flags;
     SEGGER_RTT_UNLOCK();
     r =  0;
   } else {
@@ -1781,6 +1864,7 @@ int SEGGER_RTT_SetFlagsUpBuffer(unsigned BufferIndex, unsigned Flags) {
 *  Parameters
 *    BufferIndex  Index of the buffer to renamed.
 *    Flags        Flags to set for the buffer.
+*                 Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode.
 *
 *  Return value
 *    >= 0  O.K.
@@ -1788,11 +1872,15 @@ int SEGGER_RTT_SetFlagsUpBuffer(unsigned BufferIndex, unsigned Flags) {
 */
 int SEGGER_RTT_SetFlagsDownBuffer(unsigned BufferIndex, unsigned Flags) {
   int r;
+  volatile SEGGER_RTT_CB* pRTTCB;
+  volatile SEGGER_RTT_BUFFER_DOWN* pDown;
 
   INIT();
-  if (BufferIndex < (unsigned)_SEGGER_RTT.MaxNumDownBuffers) {
+  pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  if (BufferIndex < SEGGER_RTT_MAX_NUM_DOWN_BUFFERS) {
     SEGGER_RTT_LOCK();
-    _SEGGER_RTT.aDown[BufferIndex].Flags = Flags;
+    pDown = &pRTTCB->aDown[BufferIndex];
+    pDown->Flags = Flags;
     SEGGER_RTT_UNLOCK();
     r =  0;
   } else {
@@ -1827,21 +1915,23 @@ void SEGGER_RTT_Init (void) {
 *  Return value
 *    >= 0  O.K.
 *     < 0  Error (e.g. if RTT is configured for non-blocking mode and there was no space in the buffer to set the new terminal Id)
+*
+*  Notes
+*    (1) Buffer 0 is always reserved for terminal I/O, so we can use index 0 here, fixed
 */
 int SEGGER_RTT_SetTerminal (unsigned char TerminalId) {
   unsigned char         ac[2];
   SEGGER_RTT_BUFFER_UP* pRing;
   unsigned Avail;
   int r;
-  //
+
   INIT();
-  //
   r = 0;
   ac[0] = 0xFFu;
   if (TerminalId < sizeof(_aTerminalId)) { // We only support a certain number of channels
     ac[1] = _aTerminalId[TerminalId];
-    pRing = &_SEGGER_RTT.aUp[0];    // Buffer 0 is always reserved for terminal I/O, so we can use index 0 here, fixed
-    SEGGER_RTT_LOCK();    // Lock to make sure that no other task is writing into buffer, while we are and number of free bytes in buffer does not change downwards after checking and before writing
+    pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[0] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+    SEGGER_RTT_LOCK();                     // Lock to make sure that no other task is writing into buffer, while we are and number of free bytes in buffer does not change downwards after checking and before writing
     if ((pRing->Flags & SEGGER_RTT_MODE_MASK) == SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL) {
       _ActiveTerminal = TerminalId;
       _WriteBlocking(pRing, (const char*)ac, 2u);
@@ -1892,7 +1982,7 @@ int SEGGER_RTT_TerminalOut (unsigned char TerminalId, const char* s) {
     //
     // Get "to-host" ring buffer.
     //
-    pRing = &_SEGGER_RTT.aUp[0];
+    pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[0] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
     //
     // Need to be able to change terminal, write data, change back.
     // Compute the fixed and variable sizes.
@@ -1966,8 +2056,11 @@ int SEGGER_RTT_TerminalOut (unsigned char TerminalId, const char* s) {
 *  Return value
 *    Number of bytes that are free in the selected up buffer.
 */
-unsigned SEGGER_RTT_GetAvailWriteSpace (unsigned BufferIndex){
-  return _GetAvailWriteSpace(&_SEGGER_RTT.aUp[BufferIndex]);
+unsigned SEGGER_RTT_GetAvailWriteSpace (unsigned BufferIndex) {
+  SEGGER_RTT_BUFFER_UP* pRing;
+
+  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  return _GetAvailWriteSpace(pRing);
 }
 
 
@@ -1988,16 +2081,18 @@ unsigned SEGGER_RTT_GetBytesInBuffer(unsigned BufferIndex) {
   unsigned RdOff;
   unsigned WrOff;
   unsigned r;
+  volatile SEGGER_RTT_CB* pRTTCB;
   //
   // Avoid warnings regarding volatile access order.  It's not a problem
   // in this case, but dampen compiler enthusiasm.
   //
-  RdOff = _SEGGER_RTT.aUp[BufferIndex].RdOff;
-  WrOff = _SEGGER_RTT.aUp[BufferIndex].WrOff;
+  pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  RdOff = pRTTCB->aUp[BufferIndex].RdOff;
+  WrOff = pRTTCB->aUp[BufferIndex].WrOff;
   if (RdOff <= WrOff) {
     r = WrOff - RdOff;
   } else {
-    r = _SEGGER_RTT.aUp[BufferIndex].SizeOfBuffer - (WrOff - RdOff);
+    r = pRTTCB->aUp[BufferIndex].SizeOfBuffer - (WrOff - RdOff);
   }
   return r;
 }
diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT.h b/lib/SEGGER_RTT/RTT/SEGGER_RTT.h
index 07eb4f39e..a3161f694 100644
--- a/lib/SEGGER_RTT/RTT/SEGGER_RTT.h
+++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT.h
@@ -46,16 +46,14 @@ File    : SEGGER_RTT.h
 Purpose : Implementation of SEGGER real-time transfer which allows
           real-time communication on targets which support debugger
           memory accesses while the CPU is running.
-Revision: $Rev: 17697 $
+Revision: $Rev: 25842 $
 ----------------------------------------------------------------------
 */
 
 #ifndef SEGGER_RTT_H
 #define SEGGER_RTT_H
 
-#include "SEGGER_RTT_Conf.h"
-
-
+#include "../Config/SEGGER_RTT_Conf.h"
 
 /*********************************************************************
 *
@@ -63,46 +61,168 @@ Revision: $Rev: 17697 $
 *
 **********************************************************************
 */
+
 #ifndef RTT_USE_ASM
-  #if (defined __SES_ARM)                       // SEGGER Embedded Studio
+  //
+  // Some cores support out-of-order memory accesses (reordering of memory accesses in the core)
+  // For such cores, we need to define a memory barrier to guarantee the order of certain accesses to the RTT ring buffers.
+  // Needed for:
+  //   Cortex-M7 (ARMv7-M)
+  //   Cortex-M23 (ARM-v8M)
+  //   Cortex-M33 (ARM-v8M)
+  //   Cortex-A/R (ARM-v7A/R)
+  //
+  // We do not explicitly check for "Embedded Studio" as the compiler in use determines what we support.
+  // You can use an external toolchain like IAR inside ES. So there is no point in checking for "Embedded Studio"
+  //
+  #if (defined __CROSSWORKS_ARM)                  // Rowley Crossworks
     #define _CC_HAS_RTT_ASM_SUPPORT 1
-  #elif (defined __CROSSWORKS_ARM)              // Rowley Crossworks
-    #define _CC_HAS_RTT_ASM_SUPPORT 1
-  #elif (defined __GNUC__)                      // GCC
-    #define _CC_HAS_RTT_ASM_SUPPORT 1
-  #elif (defined __clang__)                     // Clang compiler
-    #define _CC_HAS_RTT_ASM_SUPPORT 1
-  #elif (defined __IASMARM__)                   // IAR assembler
-    #define _CC_HAS_RTT_ASM_SUPPORT 1
-  #elif (defined __ICCARM__)                    // IAR compiler
-    #define _CC_HAS_RTT_ASM_SUPPORT 1
-  #else
-    #define _CC_HAS_RTT_ASM_SUPPORT 0
-  #endif
-  #if (defined __ARM_ARCH_7M__)                 // Cortex-M3/4
-    #define _CORE_HAS_RTT_ASM_SUPPORT 1
-  #elif (defined __ARM_ARCH_7EM__)              // Cortex-M7
-    #define _CORE_HAS_RTT_ASM_SUPPORT 1
-  #elif (defined __ARM_ARCH_8M_MAIN__)          // Cortex-M33
-    #define _CORE_HAS_RTT_ASM_SUPPORT 1
-  #elif (defined __ARM7M__)                     // IAR Cortex-M3/4
-    #if (__CORE__ == __ARM7M__)
+    #if (defined __ARM_ARCH_7M__)                 // Cortex-M3
       #define _CORE_HAS_RTT_ASM_SUPPORT 1
+    #elif (defined __ARM_ARCH_7EM__)              // Cortex-M4/M7
+      #define _CORE_HAS_RTT_ASM_SUPPORT 1
+      #define _CORE_NEEDS_DMB           1
+      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
+    #elif (defined __ARM_ARCH_8M_BASE__)          // Cortex-M23
+      #define _CORE_HAS_RTT_ASM_SUPPORT 0
+      #define _CORE_NEEDS_DMB           1
+      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
+    #elif (defined __ARM_ARCH_8M_MAIN__)          // Cortex-M33
+      #define _CORE_HAS_RTT_ASM_SUPPORT 1
+      #define _CORE_NEEDS_DMB           1
+      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
     #else
       #define _CORE_HAS_RTT_ASM_SUPPORT 0
     #endif
-  #elif (defined __ARM7EM__)                    // IAR Cortex-M7
-    #if (__CORE__ == __ARM7EM__)
+  #elif (defined __ARMCC_VERSION)
+    //
+    // ARM compiler
+    // ARM compiler V6.0 and later is clang based.
+    // Our ASM part is compatible to clang.
+    //
+    #if (__ARMCC_VERSION >= 6000000)
+      #define _CC_HAS_RTT_ASM_SUPPORT 1
+    #else
+      #define _CC_HAS_RTT_ASM_SUPPORT 0
+    #endif
+    #if (defined __ARM_ARCH_6M__)                 // Cortex-M0 / M1
+      #define _CORE_HAS_RTT_ASM_SUPPORT 0         // No ASM support for this architecture
+    #elif (defined __ARM_ARCH_7M__)               // Cortex-M3
       #define _CORE_HAS_RTT_ASM_SUPPORT 1
+    #elif (defined __ARM_ARCH_7EM__)              // Cortex-M4/M7
+      #define _CORE_HAS_RTT_ASM_SUPPORT 1
+      #define _CORE_NEEDS_DMB           1
+      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
+    #elif (defined __ARM_ARCH_8M_BASE__)          // Cortex-M23
+      #define _CORE_HAS_RTT_ASM_SUPPORT 0
+      #define _CORE_NEEDS_DMB           1
+      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
+    #elif (defined __ARM_ARCH_8M_MAIN__)          // Cortex-M33
+      #define _CORE_HAS_RTT_ASM_SUPPORT 1
+      #define _CORE_NEEDS_DMB           1
+      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
+    #elif ((defined __ARM_ARCH_7A__) || (defined __ARM_ARCH_7R__))  // Cortex-A/R 32-bit ARMv7-A/R
+      #define _CORE_NEEDS_DMB           1
+      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
     #else
       #define _CORE_HAS_RTT_ASM_SUPPORT 0
     #endif
+  #elif ((defined __GNUC__) || (defined __clang__))
+    //
+    // GCC / Clang
+    //
+    #define _CC_HAS_RTT_ASM_SUPPORT 1
+    // ARM 7/9: __ARM_ARCH_5__ / __ARM_ARCH_5E__ / __ARM_ARCH_5T__ / __ARM_ARCH_5T__ / __ARM_ARCH_5TE__
+    #if (defined __ARM_ARCH_7M__)                 // Cortex-M3
+      #define _CORE_HAS_RTT_ASM_SUPPORT 1
+    #elif (defined __ARM_ARCH_7EM__)              // Cortex-M4/M7
+      #define _CORE_HAS_RTT_ASM_SUPPORT 1
+      #define _CORE_NEEDS_DMB           1         // Only Cortex-M7 needs a DMB but we cannot distinguish M4 and M7 here...
+      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
+    #elif (defined __ARM_ARCH_8M_BASE__)          // Cortex-M23
+      #define _CORE_HAS_RTT_ASM_SUPPORT 0
+      #define _CORE_NEEDS_DMB           1
+      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
+    #elif (defined __ARM_ARCH_8M_MAIN__)          // Cortex-M33
+      #define _CORE_HAS_RTT_ASM_SUPPORT 1
+      #define _CORE_NEEDS_DMB           1
+      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
+    #elif ((defined __ARM_ARCH_7A__) || (defined __ARM_ARCH_7R__))  // Cortex-A/R 32-bit ARMv7-A/R
+      #define _CORE_NEEDS_DMB           1
+      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
+    #else
+      #define _CORE_HAS_RTT_ASM_SUPPORT 0
+    #endif
+  #elif ((defined __IASMARM__) || (defined __ICCARM__))
+    //
+    // IAR assembler/compiler
+    //
+    #define _CC_HAS_RTT_ASM_SUPPORT 1
+    #if (__VER__ < 6300000)
+      #define VOLATILE
+    #else
+      #define VOLATILE volatile
+    #endif
+    #if (defined __ARM7M__)                            // Needed for old versions that do not know the define yet
+      #if (__CORE__ == __ARM7M__)                      // Cortex-M3
+        #define _CORE_HAS_RTT_ASM_SUPPORT 1
+      #endif
+    #endif
+    #if (defined __ARM7EM__)
+      #if (__CORE__ == __ARM7EM__)                     // Cortex-M4/M7
+        #define _CORE_HAS_RTT_ASM_SUPPORT 1
+        #define _CORE_NEEDS_DMB 1
+        #define RTT__DMB() asm VOLATILE ("DMB");
+      #endif
+    #endif
+    #if (defined __ARM8M_BASELINE__)
+      #if (__CORE__ == __ARM8M_BASELINE__)             // Cortex-M23
+        #define _CORE_HAS_RTT_ASM_SUPPORT 0
+        #define _CORE_NEEDS_DMB 1
+        #define RTT__DMB() asm VOLATILE ("DMB");
+      #endif
+    #endif
+    #if (defined __ARM8M_MAINLINE__)
+      #if (__CORE__ == __ARM8M_MAINLINE__)             // Cortex-M33
+        #define _CORE_HAS_RTT_ASM_SUPPORT 1
+        #define _CORE_NEEDS_DMB 1
+        #define RTT__DMB() asm VOLATILE ("DMB");
+      #endif
+    #endif
+    #if (defined __ARM8EM_MAINLINE__)
+      #if (__CORE__ == __ARM8EM_MAINLINE__)            // Cortex-???
+        #define _CORE_HAS_RTT_ASM_SUPPORT 1
+        #define _CORE_NEEDS_DMB 1
+        #define RTT__DMB() asm VOLATILE ("DMB");
+      #endif
+    #endif
+    #if (defined __ARM7A__)
+      #if (__CORE__ == __ARM7A__)                      // Cortex-A 32-bit ARMv7-A
+        #define _CORE_NEEDS_DMB 1
+        #define RTT__DMB() asm VOLATILE ("DMB");
+      #endif
+    #endif
+    #if (defined __ARM7R__)
+      #if (__CORE__ == __ARM7R__)                      // Cortex-R 32-bit ARMv7-R
+        #define _CORE_NEEDS_DMB 1
+        #define RTT__DMB() asm VOLATILE ("DMB");
+      #endif
+    #endif
+// TBD: __ARM8A__ => Cortex-A 64-bit ARMv8-A
+// TBD: __ARM8R__ => Cortex-R 64-bit ARMv8-R
   #else
+    //
+    // Other compilers
+    //
+    #define _CC_HAS_RTT_ASM_SUPPORT   0
     #define _CORE_HAS_RTT_ASM_SUPPORT 0
   #endif
   //
   // If IDE and core support the ASM version, enable ASM version by default
   //
+  #ifndef _CORE_HAS_RTT_ASM_SUPPORT
+    #define _CORE_HAS_RTT_ASM_SUPPORT 0              // Default for unknown cores
+  #endif
   #if (_CC_HAS_RTT_ASM_SUPPORT && _CORE_HAS_RTT_ASM_SUPPORT)
     #define RTT_USE_ASM                           (1)
   #else
@@ -110,6 +230,35 @@ Revision: $Rev: 17697 $
   #endif
 #endif
 
+#ifndef _CORE_NEEDS_DMB
+  #define _CORE_NEEDS_DMB 0
+#endif
+
+#ifndef RTT__DMB
+  #if _CORE_NEEDS_DMB
+    #error "Don't know how to place inline assembly for DMB"
+  #else
+    #define RTT__DMB()
+  #endif
+#endif
+
+#ifndef SEGGER_RTT_CPU_CACHE_LINE_SIZE
+  #define SEGGER_RTT_CPU_CACHE_LINE_SIZE (0)   // On most target systems where RTT is used, we do not have a CPU cache, therefore 0 is a good default here
+#endif
+
+#ifndef SEGGER_RTT_UNCACHED_OFF
+  #if SEGGER_RTT_CPU_CACHE_LINE_SIZE
+    #error "SEGGER_RTT_UNCACHED_OFF must be defined when setting SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0"
+  #else
+    #define SEGGER_RTT_UNCACHED_OFF (0)
+  #endif
+#endif
+#if RTT_USE_ASM
+  #if SEGGER_RTT_CPU_CACHE_LINE_SIZE
+    #error "RTT_USE_ASM is not available if SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0"
+  #endif
+#endif
+
 #ifndef SEGGER_RTT_ASM  // defined when SEGGER_RTT.h is included from assembly file
 #include <stdlib.h>
 #include <stdarg.h>
@@ -121,6 +270,21 @@ Revision: $Rev: 17697 $
 **********************************************************************
 */
 
+//
+// Determine how much we must pad the control block to make it a multiple of a cache line in size
+// Assuming: U8 = 1B
+//           U16 = 2B
+//           U32 = 4B
+//           U8/U16/U32* = 4B
+//
+#if SEGGER_RTT_CPU_CACHE_LINE_SIZE    // Avoid division by zero in case we do not have any cache
+  #define SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(NumBytes) (((NumBytes + SEGGER_RTT_CPU_CACHE_LINE_SIZE - 1) / SEGGER_RTT_CPU_CACHE_LINE_SIZE) * SEGGER_RTT_CPU_CACHE_LINE_SIZE)
+#else
+  #define SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(NumBytes) (NumBytes)
+#endif
+#define SEGGER_RTT__CB_SIZE                              (16 + 4 + 4 + (SEGGER_RTT_MAX_NUM_UP_BUFFERS * 24) + (SEGGER_RTT_MAX_NUM_DOWN_BUFFERS * 24))
+#define SEGGER_RTT__CB_PADDING                           (SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(SEGGER_RTT__CB_SIZE) - SEGGER_RTT__CB_SIZE)
+
 /*********************************************************************
 *
 *       Types
@@ -138,7 +302,7 @@ typedef struct {
             unsigned SizeOfBuffer;  // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty.
             unsigned WrOff;         // Position of next item to be written by either target.
   volatile  unsigned RdOff;         // Position of next item to be read by host. Must be volatile since it may be modified by host.
-            unsigned Flags;         // Contains configuration flags
+            unsigned Flags;         // Contains configuration flags. Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode.
 } SEGGER_RTT_BUFFER_UP;
 
 //
@@ -151,7 +315,7 @@ typedef struct {
             unsigned SizeOfBuffer;  // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty.
   volatile  unsigned WrOff;         // Position of next item to be written by host. Must be volatile since it may be modified by host.
             unsigned RdOff;         // Position of next item to be read by target (down-buffer).
-            unsigned Flags;         // Contains configuration flags
+            unsigned Flags;         // Contains configuration flags. Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode.
 } SEGGER_RTT_BUFFER_DOWN;
 
 //
@@ -165,6 +329,9 @@ typedef struct {
   int                     MaxNumDownBuffers;                        // Initialized to SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (type. 2)
   SEGGER_RTT_BUFFER_UP    aUp[SEGGER_RTT_MAX_NUM_UP_BUFFERS];       // Up buffers, transferring information up from target via debug probe to host
   SEGGER_RTT_BUFFER_DOWN  aDown[SEGGER_RTT_MAX_NUM_DOWN_BUFFERS];   // Down buffers, transferring information down from host via debug probe to target
+#if SEGGER_RTT__CB_PADDING
+  unsigned char           aDummy[SEGGER_RTT__CB_PADDING];
+#endif
 } SEGGER_RTT_CB;
 
 /*********************************************************************
@@ -214,7 +381,7 @@ unsigned     SEGGER_RTT_GetBytesInBuffer        (unsigned BufferIndex);
 //
 // Function macro for performance optimization
 //
-#define      SEGGER_RTT_HASDATA(n)       (_SEGGER_RTT.aDown[n].WrOff - _SEGGER_RTT.aDown[n].RdOff)
+#define      SEGGER_RTT_HASDATA(n)       (((SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff)
 
 #if RTT_USE_ASM
   #define SEGGER_RTT_WriteSkipNoLock  SEGGER_RTT_ASM_WriteSkipNoLock
@@ -231,7 +398,7 @@ unsigned     SEGGER_RTT_ReadUpBufferNoLock      (unsigned BufferIndex, void* pDa
 unsigned     SEGGER_RTT_WriteDownBuffer         (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
 unsigned     SEGGER_RTT_WriteDownBufferNoLock   (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
 
-#define      SEGGER_RTT_HASDATA_UP(n)    (_SEGGER_RTT.aUp[n].WrOff - _SEGGER_RTT.aUp[n].RdOff)
+#define      SEGGER_RTT_HASDATA_UP(n)    (((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff)   // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
 
 /*********************************************************************
 *
diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S b/lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S
index aec372eec..85c79899e 100644
--- a/lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S
+++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT_ASM_ARMv7M.S
@@ -23,6 +23,7 @@ Additional information:
 *
 **********************************************************************
 */
+
 #define _CCIAR   0
 #define _CCCLANG 1
 
@@ -182,6 +183,9 @@ _LoopCopyStraight:                               // memcpy(pRing->pBuffer + WrOf
         SUBS     R2,R2,#+1
         BNE      _LoopCopyStraight
 _CSDone:
+#if _CORE_NEEDS_DMB                              // Do not slow down cores that do not need a DMB instruction here
+        DMB                                      // Cortex-M7 may delay memory writes and also change the order in which the writes happen. Therefore, make sure that all buffer writes are finished, before updating the <WrOff> in the struct
+#endif
         STR      R0,[R6, #+12]                   // pRing->WrOff = WrOff + NumBytes;
         MOVS     R0,#+1
         POP      {R4-R7}
@@ -214,6 +218,9 @@ _LoopCopyAfterWrapAround:                        // memcpy(pRing->pBuffer, pData
         SUBS     R2,R2,#+1
         BNE      _LoopCopyAfterWrapAround
 _No2ChunkNeeded:
+#if _CORE_NEEDS_DMB                              // Do not slow down cores that do not need a DMB instruction here
+        DMB                                      // Cortex-M7 may delay memory writes and also change the order in which the writes happen. Therefore, make sure that all buffer writes are finished, before updating the <WrOff> in the struct
+#endif
         STR      R4,[R6, #+12]                   // pRing->WrOff = NumBytes; => Must be written after copying data because J-Link may read control block asynchronously while writing into buffer
         MOVS     R0,#+1
         POP      {R4-R7}
diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c b/lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c
deleted file mode 100644
index 4c996b408..000000000
--- a/lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c
+++ /dev/null
@@ -1,500 +0,0 @@
-/*********************************************************************
-*                    SEGGER Microcontroller GmbH                     *
-*                        The Embedded Experts                        *
-**********************************************************************
-*                                                                    *
-*            (c) 1995 - 2019 SEGGER Microcontroller GmbH             *
-*                                                                    *
-*       www.segger.com     Support: support@segger.com               *
-*                                                                    *
-**********************************************************************
-*                                                                    *
-*       SEGGER RTT * Real Time Transfer for embedded targets         *
-*                                                                    *
-**********************************************************************
-*                                                                    *
-* All rights reserved.                                               *
-*                                                                    *
-* SEGGER strongly recommends to not make any changes                 *
-* to or modify the source code of this software in order to stay     *
-* compatible with the RTT protocol and J-Link.                       *
-*                                                                    *
-* Redistribution and use in source and binary forms, with or         *
-* without modification, are permitted provided that the following    *
-* condition is met:                                                  *
-*                                                                    *
-* o Redistributions of source code must retain the above copyright   *
-*   notice, this condition and the following disclaimer.             *
-*                                                                    *
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
-* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
-* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
-* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
-* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
-* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
-* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
-* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
-* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
-* DAMAGE.                                                            *
-*                                                                    *
-**********************************************************************
----------------------------END-OF-HEADER------------------------------
-File    : SEGGER_RTT_printf.c
-Purpose : Replacement for printf to write formatted data via RTT
-Revision: $Rev: 17697 $
-----------------------------------------------------------------------
-*/
-#include "SEGGER_RTT.h"
-#include "SEGGER_RTT_Conf.h"
-
-/*********************************************************************
-*
-*       Defines, configurable
-*
-**********************************************************************
-*/
-
-#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE
-  #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64)
-#endif
-
-#include <stdlib.h>
-#include <stdarg.h>
-
-
-#define FORMAT_FLAG_LEFT_JUSTIFY   (1u << 0)
-#define FORMAT_FLAG_PAD_ZERO       (1u << 1)
-#define FORMAT_FLAG_PRINT_SIGN     (1u << 2)
-#define FORMAT_FLAG_ALTERNATE      (1u << 3)
-
-/*********************************************************************
-*
-*       Types
-*
-**********************************************************************
-*/
-
-typedef struct {
-  char*     pBuffer;
-  unsigned  BufferSize;
-  unsigned  Cnt;
-
-  int   ReturnValue;
-
-  unsigned RTTBufferIndex;
-} SEGGER_RTT_PRINTF_DESC;
-
-/*********************************************************************
-*
-*       Function prototypes
-*
-**********************************************************************
-*/
-
-/*********************************************************************
-*
-*       Static code
-*
-**********************************************************************
-*/
-/*********************************************************************
-*
-*       _StoreChar
-*/
-static void _StoreChar(SEGGER_RTT_PRINTF_DESC * p, char c) {
-  unsigned Cnt;
-
-  Cnt = p->Cnt;
-  if ((Cnt + 1u) <= p->BufferSize) {
-    *(p->pBuffer + Cnt) = c;
-    p->Cnt = Cnt + 1u;
-    p->ReturnValue++;
-  }
-  //
-  // Write part of string, when the buffer is full
-  //
-  if (p->Cnt == p->BufferSize) {
-    if (SEGGER_RTT_Write(p->RTTBufferIndex, p->pBuffer, p->Cnt) != p->Cnt) {
-      p->ReturnValue = -1;
-    } else {
-      p->Cnt = 0u;
-    }
-  }
-}
-
-/*********************************************************************
-*
-*       _PrintUnsigned
-*/
-static void _PrintUnsigned(SEGGER_RTT_PRINTF_DESC * pBufferDesc, unsigned v, unsigned Base, unsigned NumDigits, unsigned FieldWidth, unsigned FormatFlags) {
-  static const char _aV2C[16] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F' };
-  unsigned Div;
-  unsigned Digit;
-  unsigned Number;
-  unsigned Width;
-  char c;
-
-  Number = v;
-  Digit = 1u;
-  //
-  // Get actual field width
-  //
-  Width = 1u;
-  while (Number >= Base) {
-    Number = (Number / Base);
-    Width++;
-  }
-  if (NumDigits > Width) {
-    Width = NumDigits;
-  }
-  //
-  // Print leading chars if necessary
-  //
-  if ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u) {
-    if (FieldWidth != 0u) {
-      if (((FormatFlags & FORMAT_FLAG_PAD_ZERO) == FORMAT_FLAG_PAD_ZERO) && (NumDigits == 0u)) {
-        c = '0';
-      } else {
-        c = ' ';
-      }
-      while ((FieldWidth != 0u) && (Width < FieldWidth)) {
-        FieldWidth--;
-        _StoreChar(pBufferDesc, c);
-        if (pBufferDesc->ReturnValue < 0) {
-          break;
-        }
-      }
-    }
-  }
-  if (pBufferDesc->ReturnValue >= 0) {
-    //
-    // Compute Digit.
-    // Loop until Digit has the value of the highest digit required.
-    // Example: If the output is 345 (Base 10), loop 2 times until Digit is 100.
-    //
-    while (1) {
-      if (NumDigits > 1u) {       // User specified a min number of digits to print? => Make sure we loop at least that often, before checking anything else (> 1 check avoids problems with NumDigits being signed / unsigned)
-        NumDigits--;
-      } else {
-        Div = v / Digit;
-        if (Div < Base) {        // Is our divider big enough to extract the highest digit from value? => Done
-          break;
-        }
-      }
-      Digit *= Base;
-    }
-    //
-    // Output digits
-    //
-    do {
-      Div = v / Digit;
-      v -= Div * Digit;
-      _StoreChar(pBufferDesc, _aV2C[Div]);
-      if (pBufferDesc->ReturnValue < 0) {
-        break;
-      }
-      Digit /= Base;
-    } while (Digit);
-    //
-    // Print trailing spaces if necessary
-    //
-    if ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == FORMAT_FLAG_LEFT_JUSTIFY) {
-      if (FieldWidth != 0u) {
-        while ((FieldWidth != 0u) && (Width < FieldWidth)) {
-          FieldWidth--;
-          _StoreChar(pBufferDesc, ' ');
-          if (pBufferDesc->ReturnValue < 0) {
-            break;
-          }
-        }
-      }
-    }
-  }
-}
-
-/*********************************************************************
-*
-*       _PrintInt
-*/
-static void _PrintInt(SEGGER_RTT_PRINTF_DESC * pBufferDesc, int v, unsigned Base, unsigned NumDigits, unsigned FieldWidth, unsigned FormatFlags) {
-  unsigned Width;
-  int Number;
-
-  Number = (v < 0) ? -v : v;
-
-  //
-  // Get actual field width
-  //
-  Width = 1u;
-  while (Number >= (int)Base) {
-    Number = (Number / (int)Base);
-    Width++;
-  }
-  if (NumDigits > Width) {
-    Width = NumDigits;
-  }
-  if ((FieldWidth > 0u) && ((v < 0) || ((FormatFlags & FORMAT_FLAG_PRINT_SIGN) == FORMAT_FLAG_PRINT_SIGN))) {
-    FieldWidth--;
-  }
-
-  //
-  // Print leading spaces if necessary
-  //
-  if ((((FormatFlags & FORMAT_FLAG_PAD_ZERO) == 0u) || (NumDigits != 0u)) && ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u)) {
-    if (FieldWidth != 0u) {
-      while ((FieldWidth != 0u) && (Width < FieldWidth)) {
-        FieldWidth--;
-        _StoreChar(pBufferDesc, ' ');
-        if (pBufferDesc->ReturnValue < 0) {
-          break;
-        }
-      }
-    }
-  }
-  //
-  // Print sign if necessary
-  //
-  if (pBufferDesc->ReturnValue >= 0) {
-    if (v < 0) {
-      v = -v;
-      _StoreChar(pBufferDesc, '-');
-    } else if ((FormatFlags & FORMAT_FLAG_PRINT_SIGN) == FORMAT_FLAG_PRINT_SIGN) {
-      _StoreChar(pBufferDesc, '+');
-    } else {
-
-    }
-    if (pBufferDesc->ReturnValue >= 0) {
-      //
-      // Print leading zeros if necessary
-      //
-      if (((FormatFlags & FORMAT_FLAG_PAD_ZERO) == FORMAT_FLAG_PAD_ZERO) && ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u) && (NumDigits == 0u)) {
-        if (FieldWidth != 0u) {
-          while ((FieldWidth != 0u) && (Width < FieldWidth)) {
-            FieldWidth--;
-            _StoreChar(pBufferDesc, '0');
-            if (pBufferDesc->ReturnValue < 0) {
-              break;
-            }
-          }
-        }
-      }
-      if (pBufferDesc->ReturnValue >= 0) {
-        //
-        // Print number without sign
-        //
-        _PrintUnsigned(pBufferDesc, (unsigned)v, Base, NumDigits, FieldWidth, FormatFlags);
-      }
-    }
-  }
-}
-
-/*********************************************************************
-*
-*       Public code
-*
-**********************************************************************
-*/
-/*********************************************************************
-*
-*       SEGGER_RTT_vprintf
-*
-*  Function description
-*    Stores a formatted string in SEGGER RTT control block.
-*    This data is read by the host.
-*
-*  Parameters
-*    BufferIndex  Index of "Up"-buffer to be used. (e.g. 0 for "Terminal")
-*    sFormat      Pointer to format string
-*    pParamList   Pointer to the list of arguments for the format string
-*
-*  Return values
-*    >= 0:  Number of bytes which have been stored in the "Up"-buffer.
-*     < 0:  Error
-*/
-int SEGGER_RTT_vprintf(unsigned BufferIndex, const char * sFormat, va_list * pParamList) {
-  char c;
-  SEGGER_RTT_PRINTF_DESC BufferDesc;
-  int v;
-  unsigned NumDigits;
-  unsigned FormatFlags;
-  unsigned FieldWidth;
-  char acBuffer[SEGGER_RTT_PRINTF_BUFFER_SIZE];
-
-  BufferDesc.pBuffer        = acBuffer;
-  BufferDesc.BufferSize     = SEGGER_RTT_PRINTF_BUFFER_SIZE;
-  BufferDesc.Cnt            = 0u;
-  BufferDesc.RTTBufferIndex = BufferIndex;
-  BufferDesc.ReturnValue    = 0;
-
-  do {
-    c = *sFormat;
-    sFormat++;
-    if (c == 0u) {
-      break;
-    }
-    if (c == '%') {
-      //
-      // Filter out flags
-      //
-      FormatFlags = 0u;
-      v = 1;
-      do {
-        c = *sFormat;
-        switch (c) {
-        case '-': FormatFlags |= FORMAT_FLAG_LEFT_JUSTIFY; sFormat++; break;
-        case '0': FormatFlags |= FORMAT_FLAG_PAD_ZERO;     sFormat++; break;
-        case '+': FormatFlags |= FORMAT_FLAG_PRINT_SIGN;   sFormat++; break;
-        case '#': FormatFlags |= FORMAT_FLAG_ALTERNATE;    sFormat++; break;
-        default:  v = 0; break;
-        }
-      } while (v);
-      //
-      // filter out field with
-      //
-      FieldWidth = 0u;
-      do {
-        c = *sFormat;
-        if ((c < '0') || (c > '9')) {
-          break;
-        }
-        sFormat++;
-        FieldWidth = (FieldWidth * 10u) + ((unsigned)c - '0');
-      } while (1);
-
-      //
-      // Filter out precision (number of digits to display)
-      //
-      NumDigits = 0u;
-      c = *sFormat;
-      if (c == '.') {
-        sFormat++;
-        do {
-          c = *sFormat;
-          if ((c < '0') || (c > '9')) {
-            break;
-          }
-          sFormat++;
-          NumDigits = NumDigits * 10u + ((unsigned)c - '0');
-        } while (1);
-      }
-      //
-      // Filter out length modifier
-      //
-      c = *sFormat;
-      do {
-        if ((c == 'l') || (c == 'h')) {
-          sFormat++;
-          c = *sFormat;
-        } else {
-          break;
-        }
-      } while (1);
-      //
-      // Handle specifiers
-      //
-      switch (c) {
-      case 'c': {
-        char c0;
-        v = va_arg(*pParamList, int);
-        c0 = (char)v;
-        _StoreChar(&BufferDesc, c0);
-        break;
-      }
-      case 'd':
-        v = va_arg(*pParamList, int);
-        _PrintInt(&BufferDesc, v, 10u, NumDigits, FieldWidth, FormatFlags);
-        break;
-      case 'u':
-        v = va_arg(*pParamList, int);
-        _PrintUnsigned(&BufferDesc, (unsigned)v, 10u, NumDigits, FieldWidth, FormatFlags);
-        break;
-      case 'x':
-      case 'X':
-        v = va_arg(*pParamList, int);
-        _PrintUnsigned(&BufferDesc, (unsigned)v, 16u, NumDigits, FieldWidth, FormatFlags);
-        break;
-      case 's':
-        {
-          const char * s = va_arg(*pParamList, const char *);
-          do {
-            c = *s;
-            s++;
-            if (c == '\0') {
-              break;
-            }
-           _StoreChar(&BufferDesc, c);
-          } while (BufferDesc.ReturnValue >= 0);
-        }
-        break;
-      case 'p':
-        v = va_arg(*pParamList, int);
-        _PrintUnsigned(&BufferDesc, (unsigned)v, 16u, 8u, 8u, 0u);
-        break;
-      case '%':
-        _StoreChar(&BufferDesc, '%');
-        break;
-      default:
-        break;
-      }
-      sFormat++;
-    } else {
-      _StoreChar(&BufferDesc, c);
-    }
-  } while (BufferDesc.ReturnValue >= 0);
-
-  if (BufferDesc.ReturnValue > 0) {
-    //
-    // Write remaining data, if any
-    //
-    if (BufferDesc.Cnt != 0u) {
-      SEGGER_RTT_Write(BufferIndex, acBuffer, BufferDesc.Cnt);
-    }
-    BufferDesc.ReturnValue += (int)BufferDesc.Cnt;
-  }
-  return BufferDesc.ReturnValue;
-}
-
-/*********************************************************************
-*
-*       SEGGER_RTT_printf
-*
-*  Function description
-*    Stores a formatted string in SEGGER RTT control block.
-*    This data is read by the host.
-*
-*  Parameters
-*    BufferIndex  Index of "Up"-buffer to be used. (e.g. 0 for "Terminal")
-*    sFormat      Pointer to format string, followed by the arguments for conversion
-*
-*  Return values
-*    >= 0:  Number of bytes which have been stored in the "Up"-buffer.
-*     < 0:  Error
-*
-*  Notes
-*    (1) Conversion specifications have following syntax:
-*          %[flags][FieldWidth][.Precision]ConversionSpecifier
-*    (2) Supported flags:
-*          -: Left justify within the field width
-*          +: Always print sign extension for signed conversions
-*          0: Pad with 0 instead of spaces. Ignored when using '-'-flag or precision
-*        Supported conversion specifiers:
-*          c: Print the argument as one char
-*          d: Print the argument as a signed integer
-*          u: Print the argument as an unsigned integer
-*          x: Print the argument as an hexadecimal integer
-*          s: Print the string pointed to by the argument
-*          p: Print the argument as an 8-digit hexadecimal integer. (Argument shall be a pointer to void.)
-*/
-int SEGGER_RTT_printf(unsigned BufferIndex, const char * sFormat, ...) {
-  int r;
-  va_list ParamList;
-
-  va_start(ParamList, sFormat);
-  r = SEGGER_RTT_vprintf(BufferIndex, sFormat, &ParamList);
-  va_end(ParamList);
-  return r;
-}
-/*************************** End of file ****************************/
diff --git a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c b/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c
deleted file mode 100644
index 6bf670a02..000000000
--- a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_GCC.c
+++ /dev/null
@@ -1,120 +0,0 @@
-/*********************************************************************
-*                    SEGGER Microcontroller GmbH                     *
-*                        The Embedded Experts                        *
-**********************************************************************
-*                                                                    *
-*            (c) 1995 - 2019 SEGGER Microcontroller GmbH             *
-*                                                                    *
-*       www.segger.com     Support: support@segger.com               *
-*                                                                    *
-**********************************************************************
-*                                                                    *
-*       SEGGER RTT * Real Time Transfer for embedded targets         *
-*                                                                    *
-**********************************************************************
-*                                                                    *
-* All rights reserved.                                               *
-*                                                                    *
-* SEGGER strongly recommends to not make any changes                 *
-* to or modify the source code of this software in order to stay     *
-* compatible with the RTT protocol and J-Link.                       *
-*                                                                    *
-* Redistribution and use in source and binary forms, with or         *
-* without modification, are permitted provided that the following    *
-* condition is met:                                                  *
-*                                                                    *
-* o Redistributions of source code must retain the above copyright   *
-*   notice, this condition and the following disclaimer.             *
-*                                                                    *
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
-* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
-* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
-* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
-* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
-* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
-* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
-* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
-* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
-* DAMAGE.                                                            *
-*                                                                    *
-**********************************************************************
----------------------------END-OF-HEADER------------------------------
-File    : SEGGER_RTT_Syscalls_GCC.c
-Purpose : Low-level functions for using printf() via RTT in GCC.
-          To use RTT for printf output, include this file in your
-          application.
-Revision: $Rev: 17697 $
-----------------------------------------------------------------------
-*/
-#if (defined __GNUC__) && !(defined __SES_ARM) && !(defined __CROSSWORKS_ARM)
-
-#include <reent.h>  // required for _write_r
-#include "SEGGER_RTT.h"
-
-
-/*********************************************************************
-*
-*       Types
-*
-**********************************************************************
-*/
-//
-// If necessary define the _reent struct
-// to match the one passed by the used standard library.
-//
-struct _reent;
-
-/*********************************************************************
-*
-*       Function prototypes
-*
-**********************************************************************
-*/
-int _write(int file, char *ptr, int len);
-int _write_r(struct _reent *r, int file, const void *ptr, int len);
-
-/*********************************************************************
-*
-*       Global functions
-*
-**********************************************************************
-*/
-
-/*********************************************************************
-*
-*       _write()
-*
-* Function description
-*   Low-level write function.
-*   libc subroutines will use this system routine for output to all files,
-*   including stdout.
-*   Write data via RTT.
-*/
-int _write(int file, char *ptr, int len) {
-  (void) file;  /* Not used, avoid warning */
-  SEGGER_RTT_Write(0, ptr, len);
-  return len;
-}
-
-/*********************************************************************
-*
-*       _write_r()
-*
-* Function description
-*   Low-level reentrant write function.
-*   libc subroutines will use this system routine for output to all files,
-*   including stdout.
-*   Write data via RTT.
-*/
-int _write_r(struct _reent *r, int file, const void *ptr, int len) {
-  (void) file;  /* Not used, avoid warning */
-  (void) r;     /* Not used, avoid warning */
-  SEGGER_RTT_Write(0, ptr, len);
-  return len;
-}
-
-#endif
-/****** End Of File *************************************************/
diff --git a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_IAR.c b/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_IAR.c
deleted file mode 100644
index 4c76752b3..000000000
--- a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_IAR.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*********************************************************************
-*                    SEGGER Microcontroller GmbH                     *
-*                        The Embedded Experts                        *
-**********************************************************************
-*                                                                    *
-*            (c) 1995 - 2019 SEGGER Microcontroller GmbH             *
-*                                                                    *
-*       www.segger.com     Support: support@segger.com               *
-*                                                                    *
-**********************************************************************
-*                                                                    *
-*       SEGGER RTT * Real Time Transfer for embedded targets         *
-*                                                                    *
-**********************************************************************
-*                                                                    *
-* All rights reserved.                                               *
-*                                                                    *
-* SEGGER strongly recommends to not make any changes                 *
-* to or modify the source code of this software in order to stay     *
-* compatible with the RTT protocol and J-Link.                       *
-*                                                                    *
-* Redistribution and use in source and binary forms, with or         *
-* without modification, are permitted provided that the following    *
-* condition is met:                                                  *
-*                                                                    *
-* o Redistributions of source code must retain the above copyright   *
-*   notice, this condition and the following disclaimer.             *
-*                                                                    *
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
-* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
-* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
-* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
-* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
-* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
-* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
-* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
-* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
-* DAMAGE.                                                            *
-*                                                                    *
-**********************************************************************
----------------------------END-OF-HEADER------------------------------
-File    : SEGGER_RTT_Syscalls_IAR.c
-Purpose : Low-level functions for using printf() via RTT in IAR.
-          To use RTT for printf output, include this file in your
-          application and set the Library Configuration to Normal.
-Revision: $Rev: 17697 $
-----------------------------------------------------------------------
-*/
-#ifdef __IAR_SYSTEMS_ICC__
-
-//
-// Since IAR EWARM V8 and EWRX V4, yfuns.h is considered as deprecated and LowLevelIOInterface.h
-// shall be used instead. To not break any compatibility with older compiler versions, we have a
-// version check in here.
-//
-#if ((defined __ICCARM__) && (__VER__ >= 8000000)) || ((defined __ICCRX__)  && (__VER__ >= 400))
-  #include <LowLevelIOInterface.h>
-#else
-  #include <yfuns.h>
-#endif
-
-#include "SEGGER_RTT.h"
-#pragma module_name = "?__write"
-
-/*********************************************************************
-*
-*       Function prototypes
-*
-**********************************************************************
-*/
-size_t __write(int handle, const unsigned char * buffer, size_t size);
-
-/*********************************************************************
-*
-*       Global functions
-*
-**********************************************************************
-*/
-/*********************************************************************
-*
-*       __write()
-*
-* Function description
-*   Low-level write function.
-*   Standard library subroutines will use this system routine
-*   for output to all files, including stdout.
-*   Write data via RTT.
-*/
-size_t __write(int handle, const unsigned char * buffer, size_t size) {
-  (void) handle;  /* Not used, avoid warning */
-  SEGGER_RTT_Write(0, (const char*)buffer, size);
-  return size;
-}
-
-/*********************************************************************
-*
-*       __write_buffered()
-*
-* Function description
-*   Low-level write function.
-*   Standard library subroutines will use this system routine
-*   for output to all files, including stdout.
-*   Write data via RTT.
-*/
-size_t __write_buffered(int handle, const unsigned char * buffer, size_t size) {
-  (void) handle;  /* Not used, avoid warning */
-  SEGGER_RTT_Write(0, (const char*)buffer, size);
-  return size;
-}
-
-#endif
-/****** End Of File *************************************************/
diff --git a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c b/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c
deleted file mode 100644
index ba9772d3e..000000000
--- a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_KEIL.c
+++ /dev/null
@@ -1,386 +0,0 @@
-/*********************************************************************
-*                    SEGGER Microcontroller GmbH                     *
-*                        The Embedded Experts                        *
-**********************************************************************
-*                                                                    *
-*            (c) 1995 - 2019 SEGGER Microcontroller GmbH             *
-*                                                                    *
-*       www.segger.com     Support: support@segger.com               *
-*                                                                    *
-**********************************************************************
-*                                                                    *
-*       SEGGER RTT * Real Time Transfer for embedded targets         *
-*                                                                    *
-**********************************************************************
-*                                                                    *
-* All rights reserved.                                               *
-*                                                                    *
-* SEGGER strongly recommends to not make any changes                 *
-* to or modify the source code of this software in order to stay     *
-* compatible with the RTT protocol and J-Link.                       *
-*                                                                    *
-* Redistribution and use in source and binary forms, with or         *
-* without modification, are permitted provided that the following    *
-* condition is met:                                                  *
-*                                                                    *
-* o Redistributions of source code must retain the above copyright   *
-*   notice, this condition and the following disclaimer.             *
-*                                                                    *
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
-* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
-* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
-* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
-* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
-* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
-* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
-* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
-* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
-* DAMAGE.                                                            *
-*                                                                    *
-**********************************************************************
----------------------------END-OF-HEADER------------------------------
-File    : RTT_Syscalls_KEIL.c
-Purpose : Retargeting module for KEIL MDK-CM3.
-          Low-level functions for using printf() via RTT
-Revision: $Rev: 17697 $
-----------------------------------------------------------------------
-*/
-#ifdef __CC_ARM
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <rt_sys.h>
-#include <rt_misc.h>
-
-#include "SEGGER_RTT.h"
-/*********************************************************************
-*
-*       #pragmas
-*
-**********************************************************************
-*/
-#pragma import(__use_no_semihosting)
-
-#ifdef _MICROLIB
-  #pragma import(__use_full_stdio)
-#endif
-
-/*********************************************************************
-*
-*       Defines non-configurable
-*
-**********************************************************************
-*/
-
-/* Standard IO device handles - arbitrary, but any real file system handles must be
-   less than 0x8000. */
-#define STDIN             0x8001    // Standard Input Stream
-#define STDOUT            0x8002    // Standard Output Stream
-#define STDERR            0x8003    // Standard Error Stream
-
-/*********************************************************************
-*
-*       Public const
-*
-**********************************************************************
-*/
-#if __ARMCC_VERSION < 5000000
-//const char __stdin_name[]  = "STDIN";
-const char __stdout_name[] = "STDOUT";
-const char __stderr_name[] = "STDERR";
-#endif
-
-/*********************************************************************
-*
-*       Public code
-*
-**********************************************************************
-*/
-
-/*********************************************************************
-*
-*       _ttywrch
-*
-*  Function description:
-*    Outputs a character to the console
-*
-*  Parameters:
-*    c    - character to output
-*
-*/
-void _ttywrch(int c) {
-  fputc(c, stdout); // stdout
-  fflush(stdout);
-}
-
-/*********************************************************************
-*
-*       _sys_open
-*
-*  Function description:
-*    Opens the device/file in order to do read/write operations
-*
-*  Parameters:
-*    sName        - sName of the device/file to open
-*    OpenMode    - This parameter is currently ignored
-*
-*  Return value:
-*    != 0     - Handle to the object to open, otherwise
-*    == 0     -"device" is not handled by this module
-*
-*/
-FILEHANDLE _sys_open(const char * sName, int OpenMode) {
-  (void)OpenMode;
-  // Register standard Input Output devices.
-  if (strcmp(sName, __stdout_name) == 0) {
-    return (STDOUT);
-  } else if (strcmp(sName, __stderr_name) == 0) {
-    return (STDERR);
-  } else
-  return (0);  // Not implemented
-}
-
-/*********************************************************************
-*
-*       _sys_close
-*
-*  Function description:
-*    Closes the handle to the open device/file
-*
-*  Parameters:
-*    hFile    - Handle to a file opened via _sys_open
-*
-*  Return value:
-*    0     - device/file closed
-*
-*/
-int _sys_close(FILEHANDLE hFile) {
-  (void)hFile;
-  return 0;  // Not implemented
-}
-
-/*********************************************************************
-*
-*       _sys_write
-*
-*  Function description:
-*    Writes the data to an open handle.
-*    Currently this function only outputs data to the console
-*
-*  Parameters:
-*    hFile    - Handle to a file opened via _sys_open
-*    pBuffer  - Pointer to the data that shall be written
-*    NumBytes      - Number of bytes to write
-*    Mode     - The Mode that shall be used
-*
-*  Return value:
-*    Number of bytes *not* written to the file/device
-*
-*/
-int _sys_write(FILEHANDLE hFile, const unsigned char * pBuffer, unsigned NumBytes, int Mode) {
-  int r = 0;
-
-  (void)Mode;
-  if (hFile == STDOUT) {
-    SEGGER_RTT_Write(0, (const char*)pBuffer, NumBytes);
-		return 0;
-  }
-  return r;
-}
-
-/*********************************************************************
-*
-*       _sys_read
-*
-*  Function description:
-*    Reads data from an open handle.
-*    Currently this modules does nothing.
-*
-*  Parameters:
-*    hFile    - Handle to a file opened via _sys_open
-*    pBuffer  - Pointer to buffer to store the read data
-*    NumBytes      - Number of bytes to read
-*    Mode     - The Mode that shall be used
-*
-*  Return value:
-*    Number of bytes read from the file/device
-*
-*/
-int _sys_read(FILEHANDLE hFile, unsigned char * pBuffer, unsigned NumBytes, int Mode) {
-  (void)hFile;
-  (void)pBuffer;
-  (void)NumBytes;
-  (void)Mode;
-  return (0);  // Not implemented
-}
-
-/*********************************************************************
-*
-*       _sys_istty
-*
-*  Function description:
-*    This function shall return whether the opened file
-*    is a console device or not.
-*
-*  Parameters:
-*    hFile    - Handle to a file opened via _sys_open
-*
-*  Return value:
-*    1       - Device is     a console
-*    0       - Device is not a console
-*
-*/
-int _sys_istty(FILEHANDLE hFile) {
-  if (hFile > 0x8000) {
-    return (1);
-  }
-  return (0);  // Not implemented
-}
-
-/*********************************************************************
-*
-*       _sys_seek
-*
-*  Function description:
-*    Seeks via the file to a specific position
-*
-*  Parameters:
-*    hFile  - Handle to a file opened via _sys_open
-*    Pos    -
-*
-*  Return value:
-*    int       -
-*
-*/
-int _sys_seek(FILEHANDLE hFile, long Pos) {
-  (void)hFile;
-  (void)Pos;
-  return (0);  // Not implemented
-}
-
-/*********************************************************************
-*
-*       _sys_ensure
-*
-*  Function description:
-*
-*
-*  Parameters:
-*    hFile    - Handle to a file opened via _sys_open
-*
-*  Return value:
-*    int       -
-*
-*/
-int _sys_ensure(FILEHANDLE hFile) {
-  (void)hFile;
-  return (-1);  // Not implemented
-}
-
-/*********************************************************************
-*
-*       _sys_flen
-*
-*  Function description:
-*    Returns the length of the opened file handle
-*
-*  Parameters:
-*    hFile    - Handle to a file opened via _sys_open
-*
-*  Return value:
-*    Length of the file
-*
-*/
-long _sys_flen(FILEHANDLE hFile) {
-  (void)hFile;
-  return (0);  // Not implemented
-}
-
-/*********************************************************************
-*
-*       _sys_tmpnam
-*
-*  Function description:
-*    This function converts the file number fileno for a temporary
-*    file to a unique filename, for example, tmp0001.
-*
-*  Parameters:
-*    pBuffer    - Pointer to a buffer to store the name
-*    FileNum    - file number to convert
-*    MaxLen     - Size of the buffer
-*
-*  Return value:
-*     1 - Error
-*     0 - Success
-*
-*/
-int _sys_tmpnam(char * pBuffer, int FileNum, unsigned MaxLen) {
-  (void)pBuffer;
-  (void)FileNum;
-  (void)MaxLen;
-  return (1);  // Not implemented
-}
-
-/*********************************************************************
-*
-*       _sys_command_string
-*
-*  Function description:
-*    This function shall execute a system command.
-*
-*  Parameters:
-*    cmd    - Pointer to the command string
-*    len    - Length of the string
-*
-*  Return value:
-*    == NULL - Command was not successfully executed
-*    == sCmd - Command was passed successfully
-*
-*/
-char * _sys_command_string(char * cmd, int len) {
-  (void)len;
-  return cmd;  // Not implemented
-}
-
-/*********************************************************************
-*
-*       _sys_exit
-*
-*  Function description:
-*    This function is called when the application returns from main
-*
-*  Parameters:
-*    ReturnCode    - Return code from the main function
-*
-*
-*/
-void _sys_exit(int ReturnCode) {
-  (void)ReturnCode;
-  while (1);  // Not implemented
-}
-
-#if __ARMCC_VERSION >= 5000000
-/*********************************************************************
-*
-*       stdout_putchar
-*
-*  Function description:
-*    Put a character to the stdout
-*
-*  Parameters:
-*    ch    - Character to output
-*
-*
-*/
-int stdout_putchar(int ch) {
-  (void)ch;
-  return ch;  // Not implemented
-}
-#endif
-
-#endif
-/*************************** End of file ****************************/
diff --git a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_SES.c b/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_SES.c
deleted file mode 100644
index 5ce8457e1..000000000
--- a/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_SES.c
+++ /dev/null
@@ -1,247 +0,0 @@
-/*********************************************************************
-*                    SEGGER Microcontroller GmbH                     *
-*                        The Embedded Experts                        *
-**********************************************************************
-*                                                                    *
-*            (c) 1995 - 2019 SEGGER Microcontroller GmbH             *
-*                                                                    *
-*       www.segger.com     Support: support@segger.com               *
-*                                                                    *
-**********************************************************************
-*                                                                    *
-*       SEGGER RTT * Real Time Transfer for embedded targets         *
-*                                                                    *
-**********************************************************************
-*                                                                    *
-* All rights reserved.                                               *
-*                                                                    *
-* SEGGER strongly recommends to not make any changes                 *
-* to or modify the source code of this software in order to stay     *
-* compatible with the RTT protocol and J-Link.                       *
-*                                                                    *
-* Redistribution and use in source and binary forms, with or         *
-* without modification, are permitted provided that the following    *
-* condition is met:                                                  *
-*                                                                    *
-* o Redistributions of source code must retain the above copyright   *
-*   notice, this condition and the following disclaimer.             *
-*                                                                    *
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
-* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
-* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
-* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
-* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
-* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
-* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
-* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
-* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
-* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
-* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
-* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
-* DAMAGE.                                                            *
-*                                                                    *
-**********************************************************************
----------------------------END-OF-HEADER------------------------------
-File    : SEGGER_RTT_Syscalls_SES.c
-Purpose : Reimplementation of printf, puts and __getchar using RTT
-          in SEGGER Embedded Studio.
-          To use RTT for printf output, include this file in your
-          application.
-Revision: $Rev: 18539 $
-----------------------------------------------------------------------
-*/
-#if (defined __SES_ARM) || (defined __SES_RISCV) || (defined __CROSSWORKS_ARM)
-
-#include "SEGGER_RTT.h"
-#include <stdarg.h>
-#include <stdio.h>
-#include "limits.h"
-#include "__libc.h"
-#include "__vfprintf.h"
-
-/*********************************************************************
-*
-*       Defines, configurable
-*
-**********************************************************************
-*/
-//
-// Select string formatting implementation.
-//
-// RTT printf formatting
-//  - Configurable stack usage. (SEGGER_RTT_PRINTF_BUFFER_SIZE in SEGGER_RTT_Conf.h)
-//  - No maximum string length.
-//  - Limited conversion specifiers and flags. (See SEGGER_RTT_printf.c)
-// Standard library printf formatting
-//  - Configurable formatting capabilities.
-//  - Full conversion specifier and flag support.
-//  - Maximum string length has to be known or (slightly) slower character-wise output.
-//
-// #define PRINTF_USE_SEGGER_RTT_FORMATTING    0 // Use standard library formatting
-// #define PRINTF_USE_SEGGER_RTT_FORMATTING    1 // Use RTT formatting
-//
-#ifndef   PRINTF_USE_SEGGER_RTT_FORMATTING
-  #define PRINTF_USE_SEGGER_RTT_FORMATTING    0
-#endif
-//
-// If using standard library formatting,
-// select maximum output string buffer size or character-wise output.
-//
-// #define PRINTF_BUFFER_SIZE                  0 // Use character-wise output
-// #define PRINTF_BUFFER_SIZE                128 // Default maximum string length
-//
-#ifndef   PRINTF_BUFFER_SIZE
-  #define PRINTF_BUFFER_SIZE                128
-#endif
-
-#if PRINTF_USE_SEGGER_RTT_FORMATTING  // Use SEGGER RTT formatting implementation
-/*********************************************************************
-*
-*       Function prototypes
-*
-**********************************************************************
-*/
-int SEGGER_RTT_vprintf(unsigned BufferIndex, const char * sFormat, va_list * pParamList);
-
-/*********************************************************************
-*
-*       Global functions, printf
-*
-**********************************************************************
-*/
-/*********************************************************************
-*
-*       printf()
-*
-*  Function description
-*    print a formatted string using RTT and SEGGER RTT formatting.
-*/
-int printf(const char *fmt,...) {
-  int     n;
-  va_list args;
-
-  va_start (args, fmt);
-  n = SEGGER_RTT_vprintf(0, fmt, &args);
-  va_end(args);
-  return n;
-}
-
-#elif PRINTF_BUFFER_SIZE == 0 // Use standard library formatting with character-wise output
-
-/*********************************************************************
-*
-*       Static functions
-*
-**********************************************************************
-*/
-static int _putchar(int x, __printf_tag_ptr ctx) {
-  (void)ctx;
-  SEGGER_RTT_Write(0, (char *)&x, 1);
-  return x;
-}
-
-/*********************************************************************
-*
-*       Global functions, printf
-*
-**********************************************************************
-*/
-/*********************************************************************
-*
-*       printf()
-*
-*  Function description
-*    print a formatted string character-wise, using RTT and standard
-*    library formatting.
-*/
-int printf(const char *fmt, ...) {
-  int         n;
-  va_list     args;
-  __printf_t  iod;
-
-  va_start(args, fmt);
-  iod.string    = 0;
-  iod.maxchars  = INT_MAX;
-  iod.output_fn = _putchar;
-  SEGGER_RTT_LOCK();
-  n = __vfprintf(&iod, fmt, args);
-  SEGGER_RTT_UNLOCK();
-  va_end(args);
-  return n;
-}
-
-#else // Use standard library formatting with static buffer
-
-/*********************************************************************
-*
-*       Global functions, printf
-*
-**********************************************************************
-*/
-/*********************************************************************
-*
-*       printf()
-*
-*  Function description
-*    print a formatted string using RTT and standard library formatting.
-*/
-int printf(const char *fmt,...) {
-  int     n;
-  char    aBuffer[PRINTF_BUFFER_SIZE];
-  va_list args;
-
-  va_start (args, fmt);
-  n = vsnprintf(aBuffer, sizeof(aBuffer), fmt, args);
-  if (n > (int)sizeof(aBuffer)) {
-    SEGGER_RTT_Write(0, aBuffer, sizeof(aBuffer));
-  } else if (n > 0) {
-    SEGGER_RTT_Write(0, aBuffer, n);
-  }
-  va_end(args);
-  return n;
-}
-#endif
-
-/*********************************************************************
-*
-*       Global functions
-*
-**********************************************************************
-*/
-/*********************************************************************
-*
-*       puts()
-*
-*  Function description
-*    print a string using RTT.
-*/
-int puts(const char *s) {
-  return SEGGER_RTT_WriteString(0, s);
-}
-
-/*********************************************************************
-*
-*       __putchar()
-*
-*  Function description
-*    Write one character via RTT.
-*/
-int __putchar(int x, __printf_tag_ptr ctx) {
-  (void)ctx;
-  SEGGER_RTT_Write(0, (char *)&x, 1);
-  return x;
-}
-
-/*********************************************************************
-*
-*       __getchar()
-*
-*  Function description
-*    Wait for and get a character via RTT.
-*/
-int __getchar() {
-  return SEGGER_RTT_WaitKey();
-}
-
-#endif
-/****** End Of File *************************************************/

From e02eee74777446a5eb5445bef6e047284932e164 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 7 Jun 2023 00:14:22 +0700
Subject: [PATCH 390/691] revert board flash latency to 8

---
 hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h | 2 +-
 hw/bsp/stm32g4/family.c                     | 5 ++---
 2 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
index b1a98ba97..6b00efc8f 100644
--- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
+++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
@@ -87,7 +87,7 @@ static inline void board_clock_init(void)
   RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;
   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
-  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
+  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_8);
 
   //------------- HSI48 and CRS for USB -------------//
   RCC_OscInitTypeDef osc_hsi48 = {0};
diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c
index 8b17c0643..5883b74b8 100644
--- a/hw/bsp/stm32g4/family.c
+++ b/hw/bsp/stm32g4/family.c
@@ -62,8 +62,7 @@ void usbpd_init(uint8_t port_num, tusb_typec_port_type_t port_type) {
   }
 
   // Enable interrupt
-  //NVIC_SetPriority(UCPD1_IRQn, 0);
-//  NVIC_EnableIRQ(UCPD1_IRQn);
+  NVIC_EnableIRQ(UCPD1_IRQn);
 }
 
 uint8_t pd_rx_buf[262];
@@ -253,7 +252,7 @@ void board_init(void)
 
   board_vbus_sense_init();
 
-#if 0
+#if 1
   // USB PD
   /* PWR register access (for disabling dead battery feature) */
   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);

From 914e82b25dea1a7ec63ea4160a2e6ebb5e59a5db Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 7 Jun 2023 09:36:37 +0700
Subject: [PATCH 391/691] able to receive first PD message

---
 hw/bsp/stm32g4/family.c | 49 +++++++++++++++++++++++++----------------
 1 file changed, 30 insertions(+), 19 deletions(-)

diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c
index 5883b74b8..6c870ac7a 100644
--- a/hw/bsp/stm32g4/family.c
+++ b/hw/bsp/stm32g4/family.c
@@ -72,7 +72,7 @@ void UCPD1_IRQHandler(void) {
   uint32_t sr = UCPD1->SR;
   sr &= UCPD1->IMR;
 
-  TU_LOG1("UCPD1_IRQHandler: sr = 0x%08X\n", sr);
+//  TU_LOG1("UCPD1_IRQHandler: sr = 0x%08X\n", sr);
 
   if (sr & (UCPD_SR_TYPECEVT1 | UCPD_SR_TYPECEVT2)) {
     uint32_t vstate_cc[2];
@@ -83,6 +83,7 @@ void UCPD1_IRQHandler(void) {
 
     uint32_t cr = UCPD1->CR;
 
+    // TODO only support SNK for now, required highest voltage for now
     if ((sr & UCPD_SR_TYPECEVT1) && (vstate_cc[0] == 3)) {
       TU_LOG1("Attach CC1\n");
       cr &= ~UCPD_CR_PHYCCSEL;
@@ -96,10 +97,12 @@ void UCPD1_IRQHandler(void) {
       cr &= ~UCPD_CR_PHYRXEN;
     }
 
-    // Enable Interrupt
-    UCPD1->IMR |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE |
-        /*UCPD_IMR_RXNEIE |*/ UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE |
-        UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE;
+    if (cr & UCPD_CR_PHYRXEN) {
+      // Enable Interrupt
+      UCPD1->IMR |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE |
+                    UCPD_IMR_RXNEIE | UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE |
+                    UCPD_IMR_RXMSGENDIE | UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE;
+    }
 
     // Enable PD RX
     UCPD1->CR = cr;
@@ -108,32 +111,40 @@ void UCPD1_IRQHandler(void) {
     UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF;
   }
 
+  //------------- Receive -------------//
   if (sr & UCPD_SR_RXORDDET) {
-    // SOP: Start of Packet
-    // TODO DMA later
-    uint8_t order_set = UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk;
-    TU_LOG1_HEX(order_set);
+    // SOP: Start of Packet.
+    // uint8_t order_set = UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk;
+
+    // reset count when received SOP
+    pd_rx_count = 0;
 
     // ack
     UCPD1->ICR = UCPD_ICR_RXORDDETCF;
   }
 
-  if ( sr & UCPD_SR_RXMSGEND) {
+  if (sr & UCPD_SR_RXNE) {
+    // TODO DMA later
+    do {
+      pd_rx_buf[pd_rx_count++] = UCPD1->RXDR;
+    } while (UCPD1->SR & UCPD_SR_RXNE);
+  }
+
+  if (sr & UCPD_SR_RXMSGEND) {
     // End of message
-//    uint32_t payload_size = UCPD1->RX_PAYSZ;
-//    TU_LOG1_HEX(payload_size);
-//
-//    for(uint32_t i=0; i<payload_size; i++) {
-//      pd_rx_buf[i] = UCPD1->RXDR;
-//
-//      TU_LOG1("0x%02X ", pd_rx_buf[i]);
-//    }
-//    TU_LOG1("\n");
+    uint32_t payload_size = UCPD1->RX_PAYSZ;
 
     // ack
     UCPD1->ICR = UCPD_ICR_RXMSGENDCF;
   }
 
+  if (sr & UCPD_SR_RXOVR) {
+    TU_LOG1("RXOVR\n");
+    TU_LOG1_HEX(pd_rx_count);
+    // ack
+    UCPD1->ICR = UCPD_ICR_RXOVRCF;
+  }
+
 //  if (sr & UCPD_SR_RXNE) {
 //    uint8_t data = UCPD1->RXDR;
 //    pd_rx_buf[pd_rx_count++] = data;

From b893f1d5417adf8cf874d6b2e7946582ca37982a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 7 Jun 2023 15:10:40 +0700
Subject: [PATCH 392/691] inital support for usb typec and pd example

---
 examples/typec/power_delivery/CMakeLists.txt  |  32 ++++
 examples/typec/power_delivery/Makefile        |  11 ++
 examples/typec/power_delivery/only.txt        |   1 +
 examples/typec/power_delivery/src/main.c      |  90 +++++++++
 .../typec/power_delivery/src/tusb_config.h    |  79 ++++++++
 hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h   |   8 +-
 hw/bsp/stm32g4/family.c                       | 133 +------------
 hw/bsp/stm32g4/family.cmake                   |   1 +
 src/CMakeLists.txt                            |   2 +
 src/common/tusb_mcu.h                         |   2 +
 src/common/tusb_types.h                       |  91 +++++++--
 src/portable/st/typec/typec_stm32.c           | 181 ++++++++++++++++++
 src/tusb.h                                    |   5 +
 src/typec/tcd.h                               |  58 ++++++
 src/typec/utcd.c                              |  48 +++++
 src/typec/utcd.h                              |  54 ++++++
 16 files changed, 651 insertions(+), 145 deletions(-)
 create mode 100644 examples/typec/power_delivery/CMakeLists.txt
 create mode 100644 examples/typec/power_delivery/Makefile
 create mode 100644 examples/typec/power_delivery/only.txt
 create mode 100644 examples/typec/power_delivery/src/main.c
 create mode 100644 examples/typec/power_delivery/src/tusb_config.h
 create mode 100644 src/portable/st/typec/typec_stm32.c
 create mode 100644 src/typec/tcd.h
 create mode 100644 src/typec/utcd.c
 create mode 100644 src/typec/utcd.h

diff --git a/examples/typec/power_delivery/CMakeLists.txt b/examples/typec/power_delivery/CMakeLists.txt
new file mode 100644
index 000000000..4ab8d5a65
--- /dev/null
+++ b/examples/typec/power_delivery/CMakeLists.txt
@@ -0,0 +1,32 @@
+cmake_minimum_required(VERSION 3.17)
+
+include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
+
+# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
+family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
+
+project(${PROJECT} C CXX ASM)
+
+# Checks this example is valid for the family and initializes the project
+family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
+add_executable(${PROJECT})
+
+# Example source
+target_sources(${PROJECT} PUBLIC
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
+  )
+
+# Example include
+target_include_directories(${PROJECT} PUBLIC
+  ${CMAKE_CURRENT_SOURCE_DIR}/src
+  )
+
+# Configure compilation flags and libraries for the example... see the corresponding function
+# in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT})
diff --git a/examples/typec/power_delivery/Makefile b/examples/typec/power_delivery/Makefile
new file mode 100644
index 000000000..2a3d854fb
--- /dev/null
+++ b/examples/typec/power_delivery/Makefile
@@ -0,0 +1,11 @@
+include ../../make.mk
+
+INC += \
+  src \
+  $(TOP)/hw \
+
+# Example source
+EXAMPLE_SOURCE += $(wildcard src/*.c)
+SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+
+include ../../rules.mk
diff --git a/examples/typec/power_delivery/only.txt b/examples/typec/power_delivery/only.txt
new file mode 100644
index 000000000..657aeaac5
--- /dev/null
+++ b/examples/typec/power_delivery/only.txt
@@ -0,0 +1 @@
+mcu:STM32G4
diff --git a/examples/typec/power_delivery/src/main.c b/examples/typec/power_delivery/src/main.c
new file mode 100644
index 000000000..9d032b6bb
--- /dev/null
+++ b/examples/typec/power_delivery/src/main.c
@@ -0,0 +1,90 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+
+#include "bsp/board.h"
+#include "tusb.h"
+
+//--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF PROTOTYPES
+//--------------------------------------------------------------------+
+
+/* Blink pattern
+ * - 250 ms  : button is not pressed
+ * - 1000 ms : button is pressed (and hold)
+ */
+enum  {
+  BLINK_PRESSED = 250,
+  BLINK_UNPRESSED = 1000
+};
+
+static uint32_t blink_interval_ms = BLINK_UNPRESSED;
+
+void led_blinking_task(void);
+
+#define HELLO_STR   "Hello from TinyUSB\r\n"
+
+int main(void)
+{
+  board_init();
+  board_led_write(true);
+
+  tuc_init(0, TYPEC_PORT_SNK);
+
+  uint32_t start_ms = 0;
+  bool led_state = false;
+
+  while (1) {
+    led_blinking_task();
+
+//    tuc_task();
+  }
+}
+
+#if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3
+void app_main(void)
+{
+  main();
+}
+#endif
+
+//--------------------------------------------------------------------+
+// BLINKING TASK
+//--------------------------------------------------------------------+
+void led_blinking_task(void)
+{
+  static uint32_t start_ms = 0;
+  static bool led_state = false;
+
+  // Blink every interval ms
+  if ( board_millis() - start_ms < blink_interval_ms) return; // not enough time
+  start_ms += blink_interval_ms;
+
+  board_led_write(led_state);
+  led_state = 1 - led_state; // toggle
+}
diff --git a/examples/typec/power_delivery/src/tusb_config.h b/examples/typec/power_delivery/src/tusb_config.h
new file mode 100644
index 000000000..deddcbfa4
--- /dev/null
+++ b/examples/typec/power_delivery/src/tusb_config.h
@@ -0,0 +1,79 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#ifndef _TUSB_CONFIG_H_
+#define _TUSB_CONFIG_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// special example that doesn't enable device or host stack
+// This can cause some TinyUSB API missing, this define hack to allow us to fill those API
+// to pass the compilation process
+#define tud_int_handler(x)
+
+//--------------------------------------------------------------------
+// COMMON CONFIGURATION
+//--------------------------------------------------------------------
+
+// defined by compiler flags for flexibility
+#ifndef CFG_TUSB_MCU
+  #error CFG_TUSB_MCU must be defined
+#endif
+
+#ifndef CFG_TUSB_OS
+  #define CFG_TUSB_OS               OPT_OS_NONE
+#endif
+
+#define CFG_TUD_ENABLED   0
+#define CFG_TUH_ENABLED   0
+
+// Enable TYPEC stack
+#define CFG_TUC_ENABLED   1
+
+// CFG_TUSB_DEBUG is defined by compiler in DEBUG build
+// #define CFG_TUSB_DEBUG           0
+
+/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
+ * Tinyusb use follows macros to declare transferring memory so that they can be put
+ * into those specific section.
+ * e.g
+ * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") ))
+ * - CFG_TUSB_MEM_ALIGN   : __attribute__ ((aligned(4)))
+ */
+#ifndef CFG_TUSB_MEM_SECTION
+#define CFG_TUSB_MEM_SECTION
+#endif
+
+#ifndef CFG_TUSB_MEM_ALIGN
+#define CFG_TUSB_MEM_ALIGN          __attribute__ ((aligned(4)))
+#endif
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_CONFIG_H_ */
diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
index 6b00efc8f..e61b13170 100644
--- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
+++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
@@ -58,7 +58,7 @@
 // RCC Clock
 //--------------------------------------------------------------------+
 
-// CPU Frequency (Core Clock) is 150MHz
+// CPU Frequency (Core Clock) is 170 MHz
 static inline void board_clock_init(void)
 {
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
@@ -74,9 +74,9 @@ static inline void board_clock_init(void)
   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
   RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
-  RCC_OscInitStruct.PLL.PLLN = 75;
-  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
-  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
+  RCC_OscInitStruct.PLL.PLLN = 85;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV10;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
   RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
   HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c
index 6c870ac7a..d0601b385 100644
--- a/hw/bsp/stm32g4/family.c
+++ b/hw/bsp/stm32g4/family.c
@@ -30,132 +30,6 @@
 #include "bsp/board.h"
 #include "board.h"
 
-
-//--------------------------------------------------------------------+
-// USB PD
-//--------------------------------------------------------------------+
-
-void usbpd_init(uint8_t port_num, tusb_typec_port_type_t port_type) {
-  (void) port_num;
-
-  // Initialization phase: CFG1
-  UCPD1->CFG1 = (0x0d << UCPD_CFG1_HBITCLKDIV_Pos) | (0x10 << UCPD_CFG1_IFRGAP_Pos) | (0x07 << UCPD_CFG1_TRANSWIN_Pos) |
-      (0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos) |
-      ( 0 << UCPD_CFG1_TXDMAEN_Pos) | (0 << UCPD_CFG1_RXDMAEN_Pos);
-  UCPD1->CFG1 |= UCPD_CFG1_UCPDEN;
-
-  // General programming sequence (with UCPD configured then enabled)
-  if (port_type == TUSB_TYPEC_PORT_SNK) {
-    // Enable both CC Phy
-    UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (0x03 << UCPD_CR_CCENABLE_Pos);
-
-    // Read Voltage State on CC1 & CC2 fore initial state
-    uint32_t vstate_cc[2];
-    vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
-    vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
-
-    TU_LOG1_INT(vstate_cc[0]);
-    TU_LOG1_INT(vstate_cc[1]);
-
-    // Enable CC1 & CC2 Interrupt
-    UCPD1->IMR = UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE;
-  }
-
-  // Enable interrupt
-  NVIC_EnableIRQ(UCPD1_IRQn);
-}
-
-uint8_t pd_rx_buf[262];
-uint32_t pd_rx_count = 0;
-
-void UCPD1_IRQHandler(void) {
-  uint32_t sr = UCPD1->SR;
-  sr &= UCPD1->IMR;
-
-//  TU_LOG1("UCPD1_IRQHandler: sr = 0x%08X\n", sr);
-
-  if (sr & (UCPD_SR_TYPECEVT1 | UCPD_SR_TYPECEVT2)) {
-    uint32_t vstate_cc[2];
-    vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
-    vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
-
-    TU_LOG1("VState CC1 = %u, CC2 = %u\n", vstate_cc[0], vstate_cc[1]);
-
-    uint32_t cr = UCPD1->CR;
-
-    // TODO only support SNK for now, required highest voltage for now
-    if ((sr & UCPD_SR_TYPECEVT1) && (vstate_cc[0] == 3)) {
-      TU_LOG1("Attach CC1\n");
-      cr &= ~UCPD_CR_PHYCCSEL;
-      cr |= UCPD_CR_PHYRXEN;
-    } else if ((sr & UCPD_SR_TYPECEVT2) && (vstate_cc[1] == 3)) {
-      TU_LOG1("Attach CC2\n");
-      cr |= UCPD_CR_PHYCCSEL;
-      cr |= UCPD_CR_PHYRXEN;
-    } else {
-      TU_LOG1("Detach\n");
-      cr &= ~UCPD_CR_PHYRXEN;
-    }
-
-    if (cr & UCPD_CR_PHYRXEN) {
-      // Enable Interrupt
-      UCPD1->IMR |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE |
-                    UCPD_IMR_RXNEIE | UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE |
-                    UCPD_IMR_RXMSGENDIE | UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE;
-    }
-
-    // Enable PD RX
-    UCPD1->CR = cr;
-
-    // ack
-    UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF;
-  }
-
-  //------------- Receive -------------//
-  if (sr & UCPD_SR_RXORDDET) {
-    // SOP: Start of Packet.
-    // uint8_t order_set = UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk;
-
-    // reset count when received SOP
-    pd_rx_count = 0;
-
-    // ack
-    UCPD1->ICR = UCPD_ICR_RXORDDETCF;
-  }
-
-  if (sr & UCPD_SR_RXNE) {
-    // TODO DMA later
-    do {
-      pd_rx_buf[pd_rx_count++] = UCPD1->RXDR;
-    } while (UCPD1->SR & UCPD_SR_RXNE);
-  }
-
-  if (sr & UCPD_SR_RXMSGEND) {
-    // End of message
-    uint32_t payload_size = UCPD1->RX_PAYSZ;
-
-    // ack
-    UCPD1->ICR = UCPD_ICR_RXMSGENDCF;
-  }
-
-  if (sr & UCPD_SR_RXOVR) {
-    TU_LOG1("RXOVR\n");
-    TU_LOG1_HEX(pd_rx_count);
-    // ack
-    UCPD1->ICR = UCPD_ICR_RXOVRCF;
-  }
-
-//  if (sr & UCPD_SR_RXNE) {
-//    uint8_t data = UCPD1->RXDR;
-//    pd_rx_buf[pd_rx_count++] = data;
-//    TU_LOG1_HEX(data);
-//  }
-
-//  else {
-//    TU_LOG_LOCATION();
-//  }
-}
-
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
@@ -174,6 +48,11 @@ void USBWakeUp_IRQHandler(void)
   tud_int_handler(0);
 }
 
+// USB PD
+void UCPD1_IRQHandler(void) {
+  tuc_int_handler(0);
+}
+
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
@@ -274,8 +153,6 @@ void board_init(void)
   // Default CC1/CC2 is PB4/PB6
   // PB4   ------> UCPD1_CC2
   // PB6   ------> UCPD1_CC1
-
-  usbpd_init(0, TUSB_TYPEC_PORT_SNK);
 #endif
 
 }
diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake
index 2c10a9769..618563f66 100644
--- a/hw/bsp/stm32g4/family.cmake
+++ b/hw/bsp/stm32g4/family.cmake
@@ -90,6 +90,7 @@ function(family_configure_example TARGET)
   target_sources(${TARGET} PUBLIC
     # TinyUSB Port
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/typec/typec_stm32.c
     # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 3dbd72d61..ce4486ecd 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -32,6 +32,8 @@ function(add_tinyusb TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/hid/hid_host.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/msc/msc_host.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/vendor/vendor_host.c
+    # typec
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/typec/utcd.c
     )
   target_include_directories(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 48f765674..bb4483f7d 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -199,6 +199,8 @@
 #elif TU_CHECK_MCU(OPT_MCU_STM32G4)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
+  #define TUP_USBIP_TYPEC_STM32
+
   #define TUP_DCD_ENDPOINT_MAX    8
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32G0)
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index 7b82c51d9..e6b350a40 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -232,16 +232,6 @@ enum {
 
 #define TUSB_DESC_CONFIG_POWER_MA(x)  ((x)/2)
 
-//--------------------------------------------------------------------+
-// TYPE-C
-//--------------------------------------------------------------------+
-
-typedef enum {
-  TUSB_TYPEC_PORT_SRC,
-  TUSB_TYPEC_PORT_SNK,
-  TUSB_TYPEC_PORT_DRP
-} tusb_typec_port_type_t;
-
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
@@ -487,9 +477,9 @@ typedef struct TU_ATTR_PACKED
   uint16_t bcdDFUVersion;
 } tusb_desc_dfu_functional_t;
 
-/*------------------------------------------------------------------*/
-/* Types
- *------------------------------------------------------------------*/
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
 typedef struct TU_ATTR_PACKED{
   union {
     struct TU_ATTR_PACKED {
@@ -509,6 +499,81 @@ typedef struct TU_ATTR_PACKED{
 
 TU_VERIFY_STATIC( sizeof(tusb_control_request_t) == 8, "size is not correct");
 
+//--------------------------------------------------------------------+
+// TYPE-C
+//--------------------------------------------------------------------+
+
+typedef enum {
+  TYPEC_PORT_SRC,
+  TYPEC_PORT_SNK,
+  TYPEC_PORT_DRP
+} typec_port_type_t;
+
+typedef enum {
+  TYPEC_MSG_CTRL_RESERVED = 0,            // 0b00000: 0
+  TYPEC_MSG_CTRL_GOOD_CRC,                // 0b00001: 1
+  TYPEC_MSG_CTRL_GO_TO_MIN,               // 0b00010: 2
+  TYPEC_MSG_CTRL_ACCEPT,                  // 0b00011: 3
+  TYPEC_MSG_CTRL_REJECT,                  // 0b00100: 4
+  TYPEC_MSG_CTRL_PING,                    // 0b00101: 5
+  TYPEC_MSG_CTRL_PS_RDY,                  // 0b00110: 6
+  TYPEC_MSG_CTRL_GET_SOURCE_CAP,          // 0b00111: 7
+  TYPEC_MSG_CTRL_GET_SINK_CAP,            // 0b01000: 8
+  TYPEC_MSG_CTRL_DR_SWAP,                 // 0b01001: 9
+  TYPEC_MSG_CTRL_PR_SWAP,                 // 0b01010: 10
+  TYPEC_MSG_CTRL_VCONN_SWAP,              // 0b01011: 11
+  TYPEC_MSG_CTRL_WAIT,                    // 0b01100: 12
+  TYPEC_MSG_CTRL_SOFT_RESET,              // 0b01101: 13
+  TYPEC_MSG_CTRL_DATA_RESET,              // 0b01110: 14
+  TYPEC_MSG_CTRL_DATA_RESET_COMPLETE,     // 0b01111: 15
+  TYPEC_MSG_CTRL_NOT_SUPPORTED,           // 0b10000: 16
+  TYPEC_MSG_CTRL_GET_SOURCE_CAP_EXTENDED, // 0b10001: 17
+  TYPEC_MSG_CTRL_GET_STATUS,              // 0b10010: 18
+  TYPEC_MSG_CTRL_FR_SWAP,                 // 0b10011: 19
+  TYPEC_MSG_CTRL_GET_PPS_STATUS,          // 0b10100: 20
+  TYPEC_MSG_CTRL_GET_COUNTRY_CODES,       // 0b10101: 21
+  TYPEC_MSG_CTRL_GET_SINK_CAP_EXTENDED,   // 0b10110: 22
+  TYPEC_MSG_CTRL_GET_SOURCE_INFO,         // 0b10111: 23
+  TYPEC_MSG_CTRL_REVISION,                // 0b11000: 24
+} typec_msg_ctrl_type_t;
+
+typedef enum {
+  TYPEC_MSG_DATA_RESERVED = 0,     // 0b00000: 0
+  TYPEC_MSG_DATA_SOURCE_CAP,       // 0b00001: 1
+  TYPEC_MSG_DATA_REQUEST,          // 0b00010: 2
+  TYPEC_MSG_DATA_BIST,             // 0b00011: 3
+  TYPEC_MSG_DATA_SINK_CAP,         // 0b00100: 4
+  TYPEC_MSG_DATA_BATTERY_STATUS,   // 0b00101: 5
+  TYPEC_MSG_DATA_ALERT,            // 0b00110: 6
+  TYPEC_MSG_DATA_GET_COUNTRY_INFO, // 0b00111: 7
+  TYPEC_MSG_DATA_ENTER_USB,        // 0b01000: 8
+  TYPEC_MSG_DATA_EPR_REQUEST,      // 0b01001: 9
+  TYPEC_MSG_DATA_EPR_MODE,         // 0b01010: 10
+  TYPEC_MSG_DATA_SRC_INFO,         // 0b01011: 11
+  TYPEC_MSG_DATA_REVISION,         // 0b01100: 12
+  TYPEC_MSG_DATA_RESERVED_13,      // 0b01101: 13
+  TYPEC_MSG_DATA_RESERVED_14,      // 0b01110: 14
+  TYPEC_MSG_DATA_VENDOR_DEFINED,   // 0b01111: 15
+} typec_msg_data_type_t;
+
+typedef struct TU_ATTR_PACKED {
+  uint16_t msg_type   : 5; // [0:4]
+  uint16_t data_role  : 1; // [5] SOP only
+  uint16_t specs_rev  : 2; // [6:7]
+  uint16_t power_role : 1; // [8] SOP only
+  uint16_t msg_id     : 3; // [9:11]
+  uint16_t n_data_obj : 3; // [12:14]
+  uint16_t extended   : 1; // [15]
+} tusb_typec_message_header_t;
+
+typedef struct TU_ATTR_PACKED {
+  uint16_t data_size     : 9; // [0:8]
+  uint16_t reserved      : 1; // [9]
+  uint16_t request_chunk : 1; // [10]
+  uint16_t chunk_number  : 4; // [11:14]
+  uint16_t chunked       : 1; // [15]
+} tusb_typec_message_header_extended_t;
+
 
 TU_ATTR_PACKED_END  // End of all packed definitions
 TU_ATTR_BIT_FIELD_ORDER_END
diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c
new file mode 100644
index 000000000..fd029473d
--- /dev/null
+++ b/src/portable/st/typec/typec_stm32.c
@@ -0,0 +1,181 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "tusb_option.h"
+#include "typec/tcd.h"
+
+#if CFG_TUC_ENABLED && defined(TUP_USBIP_TYPEC_STM32)
+
+#include "common/tusb_common.h"
+
+#include "stm32g4xx.h"
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+uint8_t pd_rx_buf[262];
+uint32_t pd_rx_count = 0;
+uint8_t pd_rx_order_set;
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+bool tcd_init(uint8_t rhport, typec_port_type_t port_type) {
+  (void) rhport;
+
+  // Initialization phase: CFG1
+  UCPD1->CFG1 = (0x0d << UCPD_CFG1_HBITCLKDIV_Pos) | (0x10 << UCPD_CFG1_IFRGAP_Pos) | (0x07 << UCPD_CFG1_TRANSWIN_Pos) |
+                (0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos) |
+                (0 << UCPD_CFG1_TXDMAEN_Pos) | (0 << UCPD_CFG1_RXDMAEN_Pos);
+  UCPD1->CFG1 |= UCPD_CFG1_UCPDEN;
+
+  // General programming sequence (with UCPD configured then enabled)
+  if (port_type == TYPEC_PORT_SNK) {
+    // Enable both CC Phy
+    UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (0x03 << UCPD_CR_CCENABLE_Pos);
+
+    // Read Voltage State on CC1 & CC2 fore initial state
+    uint32_t vstate_cc[2];
+    vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
+    vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
+
+    TU_LOG1_INT(vstate_cc[0]);
+    TU_LOG1_INT(vstate_cc[1]);
+
+    // Enable CC1 & CC2 Interrupt
+    UCPD1->IMR = UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE;
+  }
+
+  return true;
+}
+
+// Enable interrupt
+void tcd_int_enable (uint8_t rhport) {
+  (void) rhport;
+  NVIC_EnableIRQ(UCPD1_IRQn);
+}
+
+// Disable interrupt
+void tcd_int_disable(uint8_t rhport) {
+  (void) rhport;
+  NVIC_DisableIRQ(UCPD1_IRQn);
+}
+
+void tcd_int_handler(uint8_t rhport) {
+  (void) rhport;
+
+  uint32_t sr = UCPD1->SR;
+  sr &= UCPD1->IMR;
+
+//  TU_LOG1("UCPD1_IRQHandler: sr = 0x%08X\n", sr);
+
+  if (sr & (UCPD_SR_TYPECEVT1 | UCPD_SR_TYPECEVT2)) {
+    uint32_t vstate_cc[2];
+    vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
+    vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
+
+    TU_LOG1("VState CC1 = %u, CC2 = %u\n", vstate_cc[0], vstate_cc[1]);
+
+    uint32_t cr = UCPD1->CR;
+
+    // TODO only support SNK for now, required highest voltage for now
+    if ((sr & UCPD_SR_TYPECEVT1) && (vstate_cc[0] == 3)) {
+      TU_LOG1("Attach CC1\n");
+      cr &= ~UCPD_CR_PHYCCSEL;
+      cr |= UCPD_CR_PHYRXEN;
+    } else if ((sr & UCPD_SR_TYPECEVT2) && (vstate_cc[1] == 3)) {
+      TU_LOG1("Attach CC2\n");
+      cr |= UCPD_CR_PHYCCSEL;
+      cr |= UCPD_CR_PHYRXEN;
+    } else {
+      TU_LOG1("Detach\n");
+      cr &= ~UCPD_CR_PHYRXEN;
+    }
+
+    if (cr & UCPD_CR_PHYRXEN) {
+      // Enable Interrupt
+      UCPD1->IMR |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE |
+                    UCPD_IMR_RXNEIE | UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE |
+                    UCPD_IMR_RXMSGENDIE | UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE;
+    }
+
+    // Enable PD RX
+    UCPD1->CR = cr;
+
+    // ack
+    UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF;
+  }
+
+  //------------- Receive -------------//
+  if (sr & UCPD_SR_RXORDDET) {
+    // SOP: Start of Packet.
+    pd_rx_order_set = UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk;
+
+    // reset count when received SOP
+    pd_rx_count = 0;
+
+    // ack
+    UCPD1->ICR = UCPD_ICR_RXORDDETCF;
+  }
+
+  if (sr & UCPD_SR_RXNE) {
+    // TODO DMA later
+    do {
+      pd_rx_buf[pd_rx_count++] = UCPD1->RXDR;
+    } while (UCPD1->SR & UCPD_SR_RXNE);
+  }
+
+  if (sr & UCPD_SR_RXMSGEND) {
+    // End of message
+
+    // Skip if CRC failed
+    if (!(sr & UCPD_SR_RXERR)) {
+      uint32_t payload_size = UCPD1->RX_PAYSZ;
+      TU_LOG1("RXMSGEND: payload_size = %u, rx count = %u\n", payload_size, pd_rx_count);
+    }
+
+    // ack
+    UCPD1->ICR = UCPD_ICR_RXMSGENDCF;
+  }
+
+  if (sr & UCPD_SR_RXOVR) {
+    TU_LOG1("RXOVR\n");
+    TU_LOG1_HEX(pd_rx_count);
+    // ack
+    UCPD1->ICR = UCPD_ICR_RXOVRCF;
+  }
+
+//  if (sr & UCPD_SR_RXNE) {
+//    uint8_t data = UCPD1->RXDR;
+//    pd_rx_buf[pd_rx_count++] = data;
+//    TU_LOG1_HEX(data);
+//  }
+
+//  else {
+//    TU_LOG_LOCATION();
+//  }
+}
+
+#endif
diff --git a/src/tusb.h b/src/tusb.h
index b776d7d01..0b87b1969 100644
--- a/src/tusb.h
+++ b/src/tusb.h
@@ -40,6 +40,11 @@
 
 #include "class/hid/hid.h"
 
+//------------- TypeC -------------//
+#if CFG_TUC_ENABLED
+  #include "typec/utcd.h"
+#endif
+
 //------------- HOST -------------//
 #if CFG_TUH_ENABLED
   #include "host/usbh.h"
diff --git a/src/typec/tcd.h b/src/typec/tcd.h
new file mode 100644
index 000000000..397c0ac83
--- /dev/null
+++ b/src/typec/tcd.h
@@ -0,0 +1,58 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (thach@tinyusb.org) for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_TCD_H_
+#define _TUSB_TCD_H_
+
+#include "common/tusb_common.h"
+#include "osal/osal.h"
+#include "common/tusb_fifo.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+// Initialize controller
+bool tcd_init(uint8_t rhport, typec_port_type_t port_type);
+
+// Enable interrupt
+void tcd_int_enable (uint8_t rhport);
+
+// Disable interrupt
+void tcd_int_disable(uint8_t rhport);
+
+// Interrupt Handler
+void tcd_int_handler(uint8_t rhport);
+
+#endif
diff --git a/src/typec/utcd.c b/src/typec/utcd.c
new file mode 100644
index 000000000..baa95fbe5
--- /dev/null
+++ b/src/typec/utcd.c
@@ -0,0 +1,48 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (thach@tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "tusb_option.h"
+
+#if CFG_TUC_ENABLED
+
+#include "tcd.h"
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+bool tuc_init(uint8_t rhport, typec_port_type_t port_type) {
+  TU_ASSERT(tcd_init(rhport, port_type));
+  tcd_int_enable(rhport);
+  return true;
+}
+
+#endif
diff --git a/src/typec/utcd.h b/src/typec/utcd.h
new file mode 100644
index 000000000..2f9b84fb7
--- /dev/null
+++ b/src/typec/utcd.h
@@ -0,0 +1,54 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_UTCD_H_
+#define _TUSB_UTCD_H_
+
+#include "common/tusb_common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Application API
+//--------------------------------------------------------------------+
+
+// init typec stack
+bool tuc_init(uint8_t rhport, typec_port_type_t port_type);
+
+#ifndef _TUSB_TCD_H_
+extern void tcd_int_handler(uint8_t rhport);
+#endif
+
+// Interrupt handler, name alias to TCD
+#define tuc_int_handler tcd_int_handler
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+#endif

From 8bb012e50b39d9ed05c80509e69f9e26d463367c Mon Sep 17 00:00:00 2001
From: Aladdin Bakosh <aladdin.bakosh@emerson.com>
Date: Wed, 7 Jun 2023 12:01:59 +0200
Subject: [PATCH 393/691] fix(RA): static assert RUSB2 register

---
 src/portable/renesas/rusb2/rusb2_type.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/portable/renesas/rusb2/rusb2_type.h b/src/portable/renesas/rusb2/rusb2_type.h
index d80ecc62e..90ba4f012 100644
--- a/src/portable/renesas/rusb2/rusb2_type.h
+++ b/src/portable/renesas/rusb2/rusb2_type.h
@@ -1599,6 +1599,7 @@ TU_ATTR_BIT_FIELD_ORDER_END
 //--------------------------------------------------------------------+
 
 TU_VERIFY_STATIC(sizeof(RUSB2_PIPE_TR_t) == 4, "incorrect size");
+TU_VERIFY_STATIC(sizeof(RUSB2_REG_t) == 1032, "incorrect size");
 
 TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, SYSCFG     ) == 0x00000000, "incorrect offset");
 TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, BUSWAIT    ) == 0x00000002, "incorrect offset");

From 9b7dee563e83a548f0d0fb68dd991a868a6427c9 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 7 Jun 2023 18:57:48 +0700
Subject: [PATCH 394/691] able to response with good crc

---
 examples/typec/power_delivery/src/main.c |   2 +-
 src/common/tusb_mcu.h                    |   5 +
 src/common/tusb_types.h                  | 112 ++++++++++++----------
 src/device/usbd.c                        |  10 ++
 src/host/usbh.c                          |   2 +-
 src/portable/st/typec/typec_stm32.c      | 113 +++++++++++++++++++----
 src/typec/tcd.h                          |  15 ++-
 src/typec/utcd.c                         |  57 +++++++++++-
 src/typec/utcd.h                         |  16 +++-
 9 files changed, 257 insertions(+), 75 deletions(-)

diff --git a/examples/typec/power_delivery/src/main.c b/examples/typec/power_delivery/src/main.c
index 9d032b6bb..648345a55 100644
--- a/examples/typec/power_delivery/src/main.c
+++ b/examples/typec/power_delivery/src/main.c
@@ -54,7 +54,7 @@ int main(void)
   board_init();
   board_led_write(true);
 
-  tuc_init(0, TYPEC_PORT_SNK);
+  tuc_init(0, TUSB_TYPEC_PORT_SNK);
 
   uint32_t start_ms = 0;
   bool led_state = false;
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index bb4483f7d..f89467e75 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -197,12 +197,17 @@
   #define TUP_DCD_ENDPOINT_MAX    9
 
 #elif TU_CHECK_MCU(OPT_MCU_STM32G4)
+  // Device controller
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
+
+  // TypeC controller
   #define TUP_USBIP_TYPEC_STM32
 
   #define TUP_DCD_ENDPOINT_MAX    8
 
+  #define TUP_TYPEC_RHPORTS_NUM 1
+
 #elif TU_CHECK_MCU(OPT_MCU_STM32G0)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index e6b350a40..c92320e5c 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -504,67 +504,75 @@ TU_VERIFY_STATIC( sizeof(tusb_control_request_t) == 8, "size is not correct");
 //--------------------------------------------------------------------+
 
 typedef enum {
-  TYPEC_PORT_SRC,
-  TYPEC_PORT_SNK,
-  TYPEC_PORT_DRP
-} typec_port_type_t;
+  TUSB_TYPEC_PORT_SRC,
+  TUSB_TYPEC_PORT_SNK,
+  TUSB_TYPEC_PORT_DRP
+} tusb_typec_port_type_t;
 
 typedef enum {
-  TYPEC_MSG_CTRL_RESERVED = 0,            // 0b00000: 0
-  TYPEC_MSG_CTRL_GOOD_CRC,                // 0b00001: 1
-  TYPEC_MSG_CTRL_GO_TO_MIN,               // 0b00010: 2
-  TYPEC_MSG_CTRL_ACCEPT,                  // 0b00011: 3
-  TYPEC_MSG_CTRL_REJECT,                  // 0b00100: 4
-  TYPEC_MSG_CTRL_PING,                    // 0b00101: 5
-  TYPEC_MSG_CTRL_PS_RDY,                  // 0b00110: 6
-  TYPEC_MSG_CTRL_GET_SOURCE_CAP,          // 0b00111: 7
-  TYPEC_MSG_CTRL_GET_SINK_CAP,            // 0b01000: 8
-  TYPEC_MSG_CTRL_DR_SWAP,                 // 0b01001: 9
-  TYPEC_MSG_CTRL_PR_SWAP,                 // 0b01010: 10
-  TYPEC_MSG_CTRL_VCONN_SWAP,              // 0b01011: 11
-  TYPEC_MSG_CTRL_WAIT,                    // 0b01100: 12
-  TYPEC_MSG_CTRL_SOFT_RESET,              // 0b01101: 13
-  TYPEC_MSG_CTRL_DATA_RESET,              // 0b01110: 14
-  TYPEC_MSG_CTRL_DATA_RESET_COMPLETE,     // 0b01111: 15
-  TYPEC_MSG_CTRL_NOT_SUPPORTED,           // 0b10000: 16
-  TYPEC_MSG_CTRL_GET_SOURCE_CAP_EXTENDED, // 0b10001: 17
-  TYPEC_MSG_CTRL_GET_STATUS,              // 0b10010: 18
-  TYPEC_MSG_CTRL_FR_SWAP,                 // 0b10011: 19
-  TYPEC_MSG_CTRL_GET_PPS_STATUS,          // 0b10100: 20
-  TYPEC_MSG_CTRL_GET_COUNTRY_CODES,       // 0b10101: 21
-  TYPEC_MSG_CTRL_GET_SINK_CAP_EXTENDED,   // 0b10110: 22
-  TYPEC_MSG_CTRL_GET_SOURCE_INFO,         // 0b10111: 23
-  TYPEC_MSG_CTRL_REVISION,                // 0b11000: 24
-} typec_msg_ctrl_type_t;
+  TUSB_PD_CTRL_RESERVED = 0,            // 0b00000: 0
+  TUSB_PD_CTRL_GOOD_CRC,                // 0b00001: 1
+  TUSB_PD_CTRL_GO_TO_MIN,               // 0b00010: 2
+  TUSB_PD_CTRL_ACCEPT,                  // 0b00011: 3
+  TUSB_PD_CTRL_REJECT,                  // 0b00100: 4
+  TUSB_PD_CTRL_PING,                    // 0b00101: 5
+  TUSB_PD_CTRL_PS_RDY,                  // 0b00110: 6
+  TUSB_PD_CTRL_GET_SOURCE_CAP,          // 0b00111: 7
+  TUSB_PD_CTRL_GET_SINK_CAP,            // 0b01000: 8
+  TUSB_PD_CTRL_DR_SWAP,                 // 0b01001: 9
+  TUSB_PD_CTRL_PR_SWAP,                 // 0b01010: 10
+  TUSB_PD_CTRL_VCONN_SWAP,              // 0b01011: 11
+  TUSB_PD_CTRL_WAIT,                    // 0b01100: 12
+  TUSB_PD_CTRL_SOFT_RESET,              // 0b01101: 13
+  TUSB_PD_CTRL_DATA_RESET,              // 0b01110: 14
+  TUSB_PD_CTRL_DATA_RESET_COMPLETE,     // 0b01111: 15
+  TUSB_PD_CTRL_NOT_SUPPORTED,           // 0b10000: 16
+  TUSB_PD_CTRL_GET_SOURCE_CAP_EXTENDED, // 0b10001: 17
+  TUSB_PD_CTRL_GET_STATUS,              // 0b10010: 18
+  TUSB_PD_CTRL_FR_SWAP,                 // 0b10011: 19
+  TUSB_PD_CTRL_GET_PPS_STATUS,          // 0b10100: 20
+  TUSB_PD_CTRL_GET_COUNTRY_CODES,       // 0b10101: 21
+  TUSB_PD_CTRL_GET_SINK_CAP_EXTENDED,   // 0b10110: 22
+  TUSB_PD_CTRL_GET_SOURCE_INFO,         // 0b10111: 23
+  TUSB_PD_CTRL_REVISION,                // 0b11000: 24
+} tusb_pd_ctrl_type_t;
 
 typedef enum {
-  TYPEC_MSG_DATA_RESERVED = 0,     // 0b00000: 0
-  TYPEC_MSG_DATA_SOURCE_CAP,       // 0b00001: 1
-  TYPEC_MSG_DATA_REQUEST,          // 0b00010: 2
-  TYPEC_MSG_DATA_BIST,             // 0b00011: 3
-  TYPEC_MSG_DATA_SINK_CAP,         // 0b00100: 4
-  TYPEC_MSG_DATA_BATTERY_STATUS,   // 0b00101: 5
-  TYPEC_MSG_DATA_ALERT,            // 0b00110: 6
-  TYPEC_MSG_DATA_GET_COUNTRY_INFO, // 0b00111: 7
-  TYPEC_MSG_DATA_ENTER_USB,        // 0b01000: 8
-  TYPEC_MSG_DATA_EPR_REQUEST,      // 0b01001: 9
-  TYPEC_MSG_DATA_EPR_MODE,         // 0b01010: 10
-  TYPEC_MSG_DATA_SRC_INFO,         // 0b01011: 11
-  TYPEC_MSG_DATA_REVISION,         // 0b01100: 12
-  TYPEC_MSG_DATA_RESERVED_13,      // 0b01101: 13
-  TYPEC_MSG_DATA_RESERVED_14,      // 0b01110: 14
-  TYPEC_MSG_DATA_VENDOR_DEFINED,   // 0b01111: 15
-} typec_msg_data_type_t;
+  TUSB_PD_DATA_RESERVED = 0,     // 0b00000: 0
+  TUSB_PD_DATA_SOURCE_CAP,       // 0b00001: 1
+  TUSB_PD_DATA_REQUEST,          // 0b00010: 2
+  TUSB_PD_DATA_BIST,             // 0b00011: 3
+  TUSB_PD_DATA_SINK_CAP,         // 0b00100: 4
+  TUSB_PD_DATA_BATTERY_STATUS,   // 0b00101: 5
+  TUSB_PD_DATA_ALERT,            // 0b00110: 6
+  TUSB_PD_DATA_GET_COUNTRY_INFO, // 0b00111: 7
+  TUSB_PD_DATA_ENTER_USB,        // 0b01000: 8
+  TUSB_PD_DATA_EPR_REQUEST,      // 0b01001: 9
+  TUSB_PD_DATA_EPR_MODE,         // 0b01010: 10
+  TUSB_PD_DATA_SRC_INFO,         // 0b01011: 11
+  TUSB_PD_DATA_REVISION,         // 0b01100: 12
+  TUSB_PD_DATA_RESERVED_13,      // 0b01101: 13
+  TUSB_PD_DATA_RESERVED_14,      // 0b01110: 14
+  TUSB_PD_DATA_VENDOR_DEFINED,   // 0b01111: 15
+} tusb_pd_data_type_t;
+
+enum {
+  TUSB_PD_REV10	= 0x0,
+  TUSB_PD_REV20	= 0x1,
+  TUSB_PD_REV30	= 0x2,
+};
 
 typedef struct TU_ATTR_PACKED {
   uint16_t msg_type   : 5; // [0:4]
-  uint16_t data_role  : 1; // [5] SOP only
+  uint16_t data_role  : 1; // [5] SOP only: 0 UFP, 1 DFP
   uint16_t specs_rev  : 2; // [6:7]
-  uint16_t power_role : 1; // [8] SOP only
+  uint16_t power_role : 1; // [8] SOP only: 0 Sink, 1 Source
   uint16_t msg_id     : 3; // [9:11]
   uint16_t n_data_obj : 3; // [12:14]
   uint16_t extended   : 1; // [15]
-} tusb_typec_message_header_t;
+} tusb_pd_header_t;
+
+TU_VERIFY_STATIC( sizeof(tusb_pd_header_t) == 2, "size is not correct");
 
 typedef struct TU_ATTR_PACKED {
   uint16_t data_size     : 9; // [0:8]
@@ -572,7 +580,9 @@ typedef struct TU_ATTR_PACKED {
   uint16_t request_chunk : 1; // [10]
   uint16_t chunk_number  : 4; // [11:14]
   uint16_t chunked       : 1; // [15]
-} tusb_typec_message_header_extended_t;
+} tusb_pd_header_extended_t;
+
+TU_VERIFY_STATIC( sizeof(tusb_pd_header_extended_t) == 2, "size is not correct");
 
 
 TU_ATTR_PACKED_END  // End of all packed definitions
diff --git a/src/device/usbd.c b/src/device/usbd.c
index 409a5ec10..44c2530ce 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -252,9 +252,19 @@ static inline usbd_class_driver_t const * get_driver(uint8_t drvid)
     drvid -= _app_driver_count;
   }
 
+  // when there is no built-in drivers BUILTIN_DRIVER_COUNT = 0 will cause -Wtype-limits warning
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wtype-limits"
+#endif
+
   // Built-in drivers
   if (drvid < BUILTIN_DRIVER_COUNT) return &_usbd_driver[drvid];
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
   return NULL;
 }
 
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 6159044ab..98e959a12 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -724,7 +724,7 @@ uint8_t* usbh_get_enum_buf(void)
 
 void usbh_int_set(bool enabled)
 {
-  // TODO all host controller if multiple is used
+  // TODO all host controller if multiple are used since they shared the same event queue
   if (enabled)
   {
     hcd_int_enable(_usbh_controller);
diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c
index fd029473d..79f37b729 100644
--- a/src/portable/st/typec/typec_stm32.c
+++ b/src/portable/st/typec/typec_stm32.c
@@ -29,20 +29,43 @@
 
 #include "common/tusb_common.h"
 
-#include "stm32g4xx.h"
-
-//--------------------------------------------------------------------+
-//
-//--------------------------------------------------------------------+
-uint8_t pd_rx_buf[262];
-uint32_t pd_rx_count = 0;
-uint8_t pd_rx_order_set;
+#if CFG_TUSB_MCU == OPT_MCU_STM32G4
+  #include "stm32g4xx.h"
+#else
+  #error "Unsupported STM32 family"
+#endif
 
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
 
-bool tcd_init(uint8_t rhport, typec_port_type_t port_type) {
+#define PHY_SYNC1 0x18u
+#define PHY_SYNC2 0x11u
+#define PHY_SYNC3 0x06u
+#define PHY_RST1  0x07u
+#define PHY_RST2  0x19u
+#define PHY_EOP   0x0Du
+
+#define PHY_ORDERED_SET_SOP          (PHY_SYNC1 | (PHY_SYNC1<<5u) | (PHY_SYNC1<<10u) | (PHY_SYNC2<<15u)) // SOP Ordered set coding
+#define PHY_ORDERED_SET_SOP_P        (PHY_SYNC1 | (PHY_SYNC1<<5u) | (PHY_SYNC3<<10u) | (PHY_SYNC3<<15u)) // SOP' Ordered set coding
+#define PHY_ORDERED_SET_SOP_PP       (PHY_SYNC1 | (PHY_SYNC3<<5u) | (PHY_SYNC1<<10u) | (PHY_SYNC3<<15u)) // SOP'' Ordered set coding
+#define PHY_ORDERED_SET_HARD_RESET   (PHY_RST1  | (PHY_RST1<<5u)  | (PHY_RST1<<10u)  | (PHY_RST2<<15u )) // Hard Reset Ordered set coding
+#define PHY_ORDERED_SET_CABLE_RESET  (PHY_RST1  | (PHY_SYNC1<<5u) | (PHY_RST1<<10u)  | (PHY_SYNC3<<15u)) // Cable Reset Ordered set coding
+#define PHY_ORDERED_SET_SOP_P_DEBUG  (PHY_SYNC1 | (PHY_RST2<<5u)  | (PHY_RST2<<10u)  | (PHY_SYNC3<<15u)) // SOP' Debug Ordered set coding
+#define PHY_ORDERED_SET_SOP_PP_DEBUG (PHY_SYNC1 | (PHY_RST2<<5u)  | (PHY_SYNC3<<10u) | (PHY_SYNC2<<15u)) // SOP'' Debug Ordered set coding
+
+
+static uint8_t rx_buf[262] TU_ATTR_ALIGNED(4);
+static uint32_t rx_count = 0;
+
+static uint8_t tx_buf[262] TU_ATTR_ALIGNED(4);
+static uint32_t tx_count;
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type) {
   (void) rhport;
 
   // Initialization phase: CFG1
@@ -52,7 +75,7 @@ bool tcd_init(uint8_t rhport, typec_port_type_t port_type) {
   UCPD1->CFG1 |= UCPD_CFG1_UCPDEN;
 
   // General programming sequence (with UCPD configured then enabled)
-  if (port_type == TYPEC_PORT_SNK) {
+  if (port_type == TUSB_TYPEC_PORT_SNK) {
     // Enable both CC Phy
     UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (0x03 << UCPD_CR_CCENABLE_Pos);
 
@@ -83,6 +106,19 @@ void tcd_int_disable(uint8_t rhport) {
   NVIC_DisableIRQ(UCPD1_IRQn);
 }
 
+bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes) {
+  (void) rhport;
+
+  return true;
+}
+
+bool tcd_tx_start(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes) {
+  (void) rhport;
+  (void) buffer;
+  (void) total_bytes;
+  return false;
+}
+
 void tcd_int_handler(uint8_t rhport) {
   (void) rhport;
 
@@ -116,7 +152,7 @@ void tcd_int_handler(uint8_t rhport) {
 
     if (cr & UCPD_CR_PHYRXEN) {
       // Enable Interrupt
-      UCPD1->IMR |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE |
+      UCPD1->IMR |= UCPD_IMR_TXISIE | UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE |
                     UCPD_IMR_RXNEIE | UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE |
                     UCPD_IMR_RXMSGENDIE | UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE;
     }
@@ -128,13 +164,13 @@ void tcd_int_handler(uint8_t rhport) {
     UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF;
   }
 
-  //------------- Receive -------------//
+  //------------- RX -------------//
   if (sr & UCPD_SR_RXORDDET) {
     // SOP: Start of Packet.
-    pd_rx_order_set = UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk;
+    // UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk;
 
     // reset count when received SOP
-    pd_rx_count = 0;
+    rx_count = 0;
 
     // ack
     UCPD1->ICR = UCPD_ICR_RXORDDETCF;
@@ -143,17 +179,38 @@ void tcd_int_handler(uint8_t rhport) {
   if (sr & UCPD_SR_RXNE) {
     // TODO DMA later
     do {
-      pd_rx_buf[pd_rx_count++] = UCPD1->RXDR;
+      rx_buf[rx_count++] = UCPD1->RXDR;
     } while (UCPD1->SR & UCPD_SR_RXNE);
+
+    // no ack needed
   }
 
+  // End of message
   if (sr & UCPD_SR_RXMSGEND) {
-    // End of message
 
     // Skip if CRC failed
     if (!(sr & UCPD_SR_RXERR)) {
       uint32_t payload_size = UCPD1->RX_PAYSZ;
-      TU_LOG1("RXMSGEND: payload_size = %u, rx count = %u\n", payload_size, pd_rx_count);
+      // TU_LOG1("RXMSGEND: payload_size = %u, rx count = %u\n", payload_size, pd_rx_count);
+
+      tusb_pd_header_t const* rx_header = (tusb_pd_header_t const*) rx_buf;
+      (*(tusb_pd_header_t*) tx_buf) = (tusb_pd_header_t) {
+          .msg_type = TUSB_PD_CTRL_GOOD_CRC,
+          .data_role = 0, // UFP
+          .specs_rev = TUSB_PD_REV30,
+          .power_role = 0, // Sink
+          .msg_id = rx_header->msg_id,
+          .n_data_obj = 0,
+          .extended = 0
+      };
+      tx_count = 0;
+
+      // response with good crc
+      UCPD1->TX_ORDSET = PHY_ORDERED_SET_SOP;
+      UCPD1->TX_PAYSZ = 2;
+      UCPD1->CR |= UCPD_CR_TXSEND; // will trigger TXIS interrupt
+
+      // notify stack after good crc ?
     }
 
     // ack
@@ -162,11 +219,31 @@ void tcd_int_handler(uint8_t rhport) {
 
   if (sr & UCPD_SR_RXOVR) {
     TU_LOG1("RXOVR\n");
-    TU_LOG1_HEX(pd_rx_count);
+    TU_LOG1_HEX(rx_count);
     // ack
     UCPD1->ICR = UCPD_ICR_RXOVRCF;
   }
 
+  //------------- TX -------------//
+  if (sr & UCPD_SR_TXIS) {
+    // TU_LOG1("TXIS\n");
+
+    // TODO DMA later
+    do {
+      UCPD1->TXDR = tx_buf[tx_count++];
+    } while (UCPD1->SR & UCPD_SR_TXIS);
+
+    // no ack needed
+  }
+
+  if (sr & UCPD_SR_TXMSGSENT) {
+    // all byte sent
+    TU_LOG1("TXMSGSENT\n");
+
+    // ack
+    UCPD1->ICR = UCPD_ICR_TXMSGSENTCF;
+  }
+
 //  if (sr & UCPD_SR_RXNE) {
 //    uint8_t data = UCPD1->RXDR;
 //    pd_rx_buf[pd_rx_count++] = data;
diff --git a/src/typec/tcd.h b/src/typec/tcd.h
index 397c0ac83..e823bf8d7 100644
--- a/src/typec/tcd.h
+++ b/src/typec/tcd.h
@@ -38,13 +38,19 @@ extern "C" {
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
+typedef struct {
+  uint8_t rhport;
+  uint8_t event_id;
+
+
+} tcd_event_t;;
 
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
 
 // Initialize controller
-bool tcd_init(uint8_t rhport, typec_port_type_t port_type);
+bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type);
 
 // Enable interrupt
 void tcd_int_enable (uint8_t rhport);
@@ -55,4 +61,11 @@ void tcd_int_disable(uint8_t rhport);
 // Interrupt Handler
 void tcd_int_handler(uint8_t rhport);
 
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes);
+bool tcd_tx_start(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes);
+
 #endif
diff --git a/src/typec/utcd.c b/src/typec/utcd.c
index baa95fbe5..b5f9965fe 100644
--- a/src/typec/utcd.c
+++ b/src/typec/utcd.c
@@ -29,20 +29,75 @@
 #if CFG_TUC_ENABLED
 
 #include "tcd.h"
+#include "utcd.h"
 
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
 
+// Debug level of USBD
+#define UTCD_DEBUG   2
+#define TU_LOG_UTCD(...)   TU_LOG(UTCD_DEBUG, __VA_ARGS__)
+
+// Event queue
+// utcd_int_set() is used as mutex in OS NONE config
+void utcd_int_set(bool enabled);
+OSAL_QUEUE_DEF(utcd_int_set, utcd_qdef, CFG_TUC_TASK_QUEUE_SZ, tcd_event_t);
+tu_static osal_queue_t utcd_q;
+
+// if stack is initialized
+static bool utcd_inited = false;
+
+// if port is initialized
+static bool port_inited[TUP_TYPEC_RHPORTS_NUM];
 
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
+bool tuc_inited(uint8_t rhport) {
+  return utcd_inited && port_inited[rhport];
+}
+
+bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type) {
+  // Initialize stack
+  if (!utcd_inited) {
+    tu_memclr(port_inited, sizeof(port_inited));
+
+    utcd_q = osal_queue_create(&utcd_qdef);
+    TU_ASSERT(utcd_q != NULL);
+
+    utcd_inited = true;
+  }
+
+  // skip if port already initialized
+  if ( port_inited[rhport] ) {
+    return true;
+  }
+
+  TU_LOG_UTCD("UTCD init on port %u\r\n", rhport);
 
-bool tuc_init(uint8_t rhport, typec_port_type_t port_type) {
   TU_ASSERT(tcd_init(rhport, port_type));
   tcd_int_enable(rhport);
+
+  port_inited[rhport] = true;
   return true;
 }
 
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+void utcd_int_set(bool enabled) {
+  // Disable all controllers since they shared the same event queue
+  for (uint8_t p = 0; p < TUP_TYPEC_RHPORTS_NUM; p++) {
+    if ( port_inited[p] ) {
+      if (enabled) {
+        tcd_int_enable(p);
+      }else {
+        tcd_int_disable(p);
+      }
+    }
+  }
+}
+
 #endif
diff --git a/src/typec/utcd.h b/src/typec/utcd.h
index 2f9b84fb7..06a62ef23 100644
--- a/src/typec/utcd.h
+++ b/src/typec/utcd.h
@@ -33,12 +33,24 @@
 extern "C" {
 #endif
 
+//--------------------------------------------------------------------+
+// TypeC Configuration
+//--------------------------------------------------------------------+
+
+#ifndef CFG_TUC_TASK_QUEUE_SZ
+#define CFG_TUC_TASK_QUEUE_SZ   16
+#endif
+
+
 //--------------------------------------------------------------------+
 // Application API
 //--------------------------------------------------------------------+
 
-// init typec stack
-bool tuc_init(uint8_t rhport, typec_port_type_t port_type);
+// Init typec stack on a port
+bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type);
+
+// Check if typec port is initialized
+bool tuc_inited(uint8_t rhport);
 
 #ifndef _TUSB_TCD_H_
 extern void tcd_int_handler(uint8_t rhport);

From 0493983a8ff7d068bd1ef94bcea92846cbe4157e Mon Sep 17 00:00:00 2001
From: graham sanderson <graham.sanderson@raspberrypi.com>
Date: Wed, 7 Jun 2023 14:46:14 -0500
Subject: [PATCH 395/691] movement of TOP in c0ecf8b5 broke RP2040 SDK build

---
 hw/bsp/family_support.cmake | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index fdcd9a983..d80b54ef8 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -4,6 +4,7 @@ include(CMakePrintHelpers)
 
 # TOP is path to root directory
 set(TOP "${CMAKE_CURRENT_LIST_DIR}/../..")
+get_filename_component(TOP ${TOP} ABSOLUTE)
 
 # Default to gcc
 if (NOT DEFINED TOOLCHAIN)

From 7fd0a17bc3eb1e992865c851c3d24484131fa284 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 8 Jun 2023 09:11:29 +0700
Subject: [PATCH 396/691] default CFG_TUC_ENABLED to 0

---
 src/tusb_option.h | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src/tusb_option.h b/src/tusb_option.h
index 948c9edf3..427d19719 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -483,6 +483,14 @@
 #endif
 
 
+//--------------------------------------------------------------------+
+// TypeC Options (Default)
+//--------------------------------------------------------------------+
+
+#ifndef CFG_TUC_ENABLED
+#define CFG_TUC_ENABLED 0
+#endif
+
 //------------------------------------------------------------------
 // Configuration Validation
 //------------------------------------------------------------------

From fc761953b323b7565c42254fcfbb248520d83e0e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 8 Jun 2023 09:34:15 +0700
Subject: [PATCH 397/691] define tuc_int_handler() to empty if TUC not enabled

---
 src/tusb_option.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/tusb_option.h b/src/tusb_option.h
index 427d19719..bb669e693 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -489,6 +489,8 @@
 
 #ifndef CFG_TUC_ENABLED
 #define CFG_TUC_ENABLED 0
+
+#define tuc_int_handler(_p)
 #endif
 
 //------------------------------------------------------------------

From 9c2a8490afadd47d5847793a806e2dce51565868 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 8 Jun 2023 13:37:37 +0700
Subject: [PATCH 398/691] dma rx works well

---
 .../boards/b_g474e_dpow1/cubemx/board.ioc     | 194 ++++++++++++++++++
 hw/bsp/stm32g4/family.c                       |   7 +-
 src/portable/st/typec/typec_stm32.c           |  80 +++++++-
 3 files changed, 267 insertions(+), 14 deletions(-)
 create mode 100644 hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/board.ioc

diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/board.ioc b/hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/board.ioc
new file mode 100644
index 000000000..6ce126f84
--- /dev/null
+++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/board.ioc
@@ -0,0 +1,194 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+Dma.Request0=UCPD1_RX
+Dma.Request1=UCPD1_TX
+Dma.RequestsNb=2
+Dma.UCPD1_RX.0.Direction=DMA_PERIPH_TO_MEMORY
+Dma.UCPD1_RX.0.EventEnable=DISABLE
+Dma.UCPD1_RX.0.Instance=DMA1_Channel1
+Dma.UCPD1_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.UCPD1_RX.0.MemInc=DMA_MINC_ENABLE
+Dma.UCPD1_RX.0.Mode=DMA_NORMAL
+Dma.UCPD1_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.UCPD1_RX.0.PeriphInc=DMA_PINC_DISABLE
+Dma.UCPD1_RX.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.UCPD1_RX.0.Priority=DMA_PRIORITY_HIGH
+Dma.UCPD1_RX.0.RequestNumber=1
+Dma.UCPD1_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.UCPD1_RX.0.SignalID=NONE
+Dma.UCPD1_RX.0.SyncEnable=DISABLE
+Dma.UCPD1_RX.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.UCPD1_RX.0.SyncRequestNumber=1
+Dma.UCPD1_RX.0.SyncSignalID=NONE
+Dma.UCPD1_TX.1.Direction=DMA_MEMORY_TO_PERIPH
+Dma.UCPD1_TX.1.EventEnable=DISABLE
+Dma.UCPD1_TX.1.Instance=DMA1_Channel2
+Dma.UCPD1_TX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.UCPD1_TX.1.MemInc=DMA_MINC_ENABLE
+Dma.UCPD1_TX.1.Mode=DMA_NORMAL
+Dma.UCPD1_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.UCPD1_TX.1.PeriphInc=DMA_PINC_DISABLE
+Dma.UCPD1_TX.1.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.UCPD1_TX.1.Priority=DMA_PRIORITY_HIGH
+Dma.UCPD1_TX.1.RequestNumber=1
+Dma.UCPD1_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.UCPD1_TX.1.SignalID=NONE
+Dma.UCPD1_TX.1.SyncEnable=DISABLE
+Dma.UCPD1_TX.1.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.UCPD1_TX.1.SyncRequestNumber=1
+Dma.UCPD1_TX.1.SyncSignalID=NONE
+File.Version=6
+GPIO.groupedBy=Group By Peripherals
+KeepUserPlacement=true
+Mcu.CPN=STM32G474RET3
+Mcu.Family=STM32G4
+Mcu.IP0=DMA
+Mcu.IP1=NVIC
+Mcu.IP2=RCC
+Mcu.IP3=SYS
+Mcu.IP4=UCPD1
+Mcu.IP5=USART3
+Mcu.IPNb=6
+Mcu.Name=STM32G474R(B-C-E)Tx
+Mcu.Package=LQFP64
+Mcu.Pin0=PC10
+Mcu.Pin1=PC11
+Mcu.Pin2=PB4
+Mcu.Pin3=PB6
+Mcu.Pin4=VP_SYS_VS_Systick
+Mcu.Pin5=VP_SYS_VS_DBSignals
+Mcu.PinsNb=6
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32G474RETx
+MxCube.Version=6.8.1
+MxDb.Version=DB.6.0.81
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.DMA1_Channel2_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:false\:true\:false\:false
+PB4.Mode=Sink_AllSignals
+PB4.Signal=UCPD1_CC2
+PB6.Mode=Sink_AllSignals
+PB6.Signal=UCPD1_CC1
+PC10.GPIOParameters=GPIO_PuPd
+PC10.GPIO_PuPd=GPIO_PULLUP
+PC10.Mode=Asynchronous
+PC10.Signal=USART3_TX
+PC11.GPIOParameters=GPIO_PuPd
+PC11.GPIO_PuPd=GPIO_PULLUP
+PC11.Mode=Asynchronous
+PC11.Signal=USART3_RX
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.CustomerFirmwarePackage=
+ProjectManager.DefaultFWLocation=true
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32G474RETx
+ProjectManager.FirmwarePackage=STM32Cube FW_G4 V1.5.1
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=board.ioc
+ProjectManager.ProjectName=board
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=Makefile
+ProjectManager.ToolChainLocation=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_USART3_UART_Init-USART3-false-HAL-true,5-MX_UCPD1_Init-UCPD1-false-LL-true
+RCC.ADC12Freq_Value=150000000
+RCC.ADC345Freq_Value=150000000
+RCC.AHBFreq_Value=150000000
+RCC.APB1Freq_Value=150000000
+RCC.APB1TimFreq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB2TimFreq_Value=150000000
+RCC.CRSFreq_Value=48000000
+RCC.CortexFreq_Value=150000000
+RCC.EXTERNAL_CLOCK_VALUE=12288000
+RCC.FCLKCortexFreq_Value=150000000
+RCC.FDCANFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=150000000
+RCC.HRTIM1Freq_Value=150000000
+RCC.HSE_VALUE=24000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=150000000
+RCC.I2C2Freq_Value=150000000
+RCC.I2C3Freq_Value=150000000
+RCC.I2C4Freq_Value=150000000
+RCC.I2SFreq_Value=150000000
+RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQ,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSE_VALUE=32768
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=16000000
+RCC.PLLM=RCC_PLLM_DIV4
+RCC.PLLN=75
+RCC.PLLPoutputFreq_Value=150000000
+RCC.PLLQ=RCC_PLLQ_DIV4
+RCC.PLLQoutputFreq_Value=75000000
+RCC.PLLRCLKFreq_Value=150000000
+RCC.PWRFreq_Value=150000000
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=75000000
+RCC.SAI1Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.UART4Freq_Value=150000000
+RCC.UART5Freq_Value=150000000
+RCC.USART1Freq_Value=150000000
+RCC.USART2Freq_Value=150000000
+RCC.USART3Freq_Value=150000000
+RCC.USBFreq_Value=75000000
+RCC.VCOInputFreq_Value=4000000
+RCC.VCOOutputFreq_Value=300000000
+USART3.AutoBaudRateEnableParam=UART_ADVFEATURE_AUTOBAUDRATE_DISABLE
+USART3.BaudRate=115200
+USART3.DMADisableonRxErrorParam=ADVFEATURE_DMA_ENABLEONRXERROR
+USART3.DataInvertParam=ADVFEATURE_DATAINV_DISABLE
+USART3.IPParameters=BaudRate,WordLength,Parity,StopBits,Mode,OverSampling,OneBitSampling,AutoBaudRateEnableParam,TxPinLevelInvertParam,RxPinLevelInvertParam,DataInvertParam,SwapParam,OverrunDisableParam,DMADisableonRxErrorParam,MSBFirstParam,VirtualMode-Asynchronous
+USART3.MSBFirstParam=ADVFEATURE_MSBFIRST_DISABLE
+USART3.Mode=MODE_TX_RX
+USART3.OneBitSampling=UART_ONE_BIT_SAMPLE_DISABLE
+USART3.OverSampling=UART_OVERSAMPLING_16
+USART3.OverrunDisableParam=ADVFEATURE_OVERRUN_ENABLE
+USART3.Parity=PARITY_ODD
+USART3.RxPinLevelInvertParam=ADVFEATURE_RXINV_DISABLE
+USART3.StopBits=STOPBITS_1
+USART3.SwapParam=ADVFEATURE_SWAP_DISABLE
+USART3.TxPinLevelInvertParam=ADVFEATURE_TXINV_DISABLE
+USART3.VirtualMode-Asynchronous=VM_ASYNC
+USART3.WordLength=WORDLENGTH_8B
+VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
+VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=custom
diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c
index d0601b385..5fa6e3dbb 100644
--- a/hw/bsp/stm32g4/family.c
+++ b/hw/bsp/stm32g4/family.c
@@ -144,15 +144,16 @@ void board_init(void)
 
 #if 1
   // USB PD
+  // Default CC1/CC2 is PB4/PB6
   /* PWR register access (for disabling dead battery feature) */
   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
   LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_CRC);
 
   __HAL_RCC_UCPD1_CLK_ENABLE();
 
-  // Default CC1/CC2 is PB4/PB6
-  // PB4   ------> UCPD1_CC2
-  // PB6   ------> UCPD1_CC1
+  // Enable DMA clock
+  __HAL_RCC_DMAMUX1_CLK_ENABLE();
+  __HAL_RCC_DMA1_CLK_ENABLE();
 #endif
 
 }
diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c
index 79f37b729..c96dd0902 100644
--- a/src/portable/st/typec/typec_stm32.c
+++ b/src/portable/st/typec/typec_stm32.c
@@ -31,6 +31,7 @@
 
 #if CFG_TUSB_MCU == OPT_MCU_STM32G4
   #include "stm32g4xx.h"
+  #include "stm32g4xx_hal_dma.h"
 #else
   #error "Unsupported STM32 family"
 #endif
@@ -61,13 +62,46 @@ static uint32_t rx_count = 0;
 static uint8_t tx_buf[262] TU_ATTR_ALIGNED(4);
 static uint32_t tx_count;
 
+#define CFG_TUC_STM32_DMA_RX { DMA1_Channel1 }
+//#define CFG_TUC_STM32_DMA_TX { DMA1_Channel2 }
+
+#ifdef CFG_TUC_STM32_DMA_RX
+static DMA_Channel_TypeDef* dma_rx_arr[TUP_TYPEC_RHPORTS_NUM] = CFG_TUC_STM32_DMA_RX;
+
+TU_ATTR_ALWAYS_INLINE static inline
+void dma_rx_start(uint8_t rhport)
+{
+  DMA_Channel_TypeDef* dma_rx_ch = dma_rx_arr[rhport];
+
+  dma_rx_ch->CMAR = (uint32_t) rx_buf;
+  dma_rx_ch->CNDTR = sizeof(rx_buf);
+  dma_rx_ch->CCR |= DMA_CCR_EN;
+}
+#endif
+
+#ifdef CFG_TUC_STM32_DMA_TX
+static DMA_Channel_TypeDef* dma_tx_arr[TUP_TYPEC_RHPORTS_NUM] = CFG_TUC_STM32_DMA_TX;
+#endif
+
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
+#include "stm32g4xx_ll_dma.h"
 
 bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type) {
   (void) rhport;
 
+#ifdef CFG_TUC_STM32_DMA_RX
+  // Init DMA
+  DMA_Channel_TypeDef* dma_rx_ch = dma_rx_arr[rhport];
+
+  // Peripheral -> Memory, Memory inc, 8-bit, High priority
+  dma_rx_ch->CCR = DMA_CCR_MINC | DMA_CCR_PL_1;
+  dma_rx_ch->CPAR = (uint32_t) &UCPD1->RXDR;
+
+  LL_DMA_SetPeriphRequest(DMA1, LL_DMA_CHANNEL_1, LL_DMAMUX_REQ_UCPD1_RX);
+#endif
+
   // Initialization phase: CFG1
   UCPD1->CFG1 = (0x0d << UCPD_CFG1_HBITCLKDIV_Pos) | (0x10 << UCPD_CFG1_IFRGAP_Pos) | (0x07 << UCPD_CFG1_TRANSWIN_Pos) |
                 (0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos) |
@@ -77,7 +111,7 @@ bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type) {
   // General programming sequence (with UCPD configured then enabled)
   if (port_type == TUSB_TYPEC_PORT_SNK) {
     // Enable both CC Phy
-    UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (0x03 << UCPD_CR_CCENABLE_Pos);
+    UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | UCPD_CR_CCENABLE_0 | UCPD_CR_CCENABLE_1;
 
     // Read Voltage State on CC1 & CC2 fore initial state
     uint32_t vstate_cc[2];
@@ -135,30 +169,48 @@ void tcd_int_handler(uint8_t rhport) {
     TU_LOG1("VState CC1 = %u, CC2 = %u\n", vstate_cc[0], vstate_cc[1]);
 
     uint32_t cr = UCPD1->CR;
+    uint32_t cfg1 = UCPD1->CFG1;
 
     // TODO only support SNK for now, required highest voltage for now
+    // Enable PHY on correct CC and disable Rd on other CC
     if ((sr & UCPD_SR_TYPECEVT1) && (vstate_cc[0] == 3)) {
       TU_LOG1("Attach CC1\n");
-      cr &= ~UCPD_CR_PHYCCSEL;
-      cr |= UCPD_CR_PHYRXEN;
+
+      cr &= ~(UCPD_CR_PHYCCSEL | UCPD_CR_CCENABLE);
+      cr |= UCPD_CR_PHYRXEN | UCPD_CR_CCENABLE_0;
     } else if ((sr & UCPD_SR_TYPECEVT2) && (vstate_cc[1] == 3)) {
       TU_LOG1("Attach CC2\n");
-      cr |= UCPD_CR_PHYCCSEL;
-      cr |= UCPD_CR_PHYRXEN;
+      cr &= ~UCPD_CR_CCENABLE;
+      cr |= (UCPD_CR_PHYCCSEL | UCPD_CR_PHYRXEN | UCPD_CR_CCENABLE_1);
     } else {
       TU_LOG1("Detach\n");
       cr &= ~UCPD_CR_PHYRXEN;
+      cr |= UCPD_CR_CCENABLE_0 | UCPD_CR_CCENABLE_1;
     }
 
     if (cr & UCPD_CR_PHYRXEN) {
       // Enable Interrupt
-      UCPD1->IMR |= UCPD_IMR_TXISIE | UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE |
-                    UCPD_IMR_RXNEIE | UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE |
-                    UCPD_IMR_RXMSGENDIE | UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE;
+      uint32_t imr = UCPD1->IMR;
+      imr |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE |
+          UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE | UCPD_IMR_RXORDDETIE |
+          UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE | UCPD_IMR_FRSEVTIE;
+
+      #ifdef CFG_TUC_STM32_DMA_RX
+      cfg1 |= UCPD_CFG1_RXDMAEN;
+      dma_rx_start(rhport);
+      #else
+      imr |= UCPD_IMR_RXNEIE | UCPD_IMR_RXORDDETIE;
+      #endif
+
+      #ifndef CFG_TUC_STM32_DMA_TX
+      imr |= UCPD_IMR_TXISIE;
+      #endif
+
+      UCPD1->IMR = imr;
     }
 
-    // Enable PD RX
     UCPD1->CR = cr;
+    UCPD1->CFG1 = cfg1;
 
     // ack
     UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF;
@@ -176,6 +228,7 @@ void tcd_int_handler(uint8_t rhport) {
     UCPD1->ICR = UCPD_ICR_RXORDDETCF;
   }
 
+#ifndef CFG_TUC_STM32_DMA_RX
   if (sr & UCPD_SR_RXNE) {
     // TODO DMA later
     do {
@@ -184,8 +237,9 @@ void tcd_int_handler(uint8_t rhport) {
 
     // no ack needed
   }
+#endif
 
-  // End of message
+  // Received full message
   if (sr & UCPD_SR_RXMSGEND) {
 
     // Skip if CRC failed
@@ -213,13 +267,17 @@ void tcd_int_handler(uint8_t rhport) {
       // notify stack after good crc ?
     }
 
+    #ifdef CFG_TUC_STM32_DMA_RX
+    // prepare next receive
+    dma_rx_start(rhport);
+    #endif
+
     // ack
     UCPD1->ICR = UCPD_ICR_RXMSGENDCF;
   }
 
   if (sr & UCPD_SR_RXOVR) {
     TU_LOG1("RXOVR\n");
-    TU_LOG1_HEX(rx_count);
     // ack
     UCPD1->ICR = UCPD_ICR_RXOVRCF;
   }

From 8181d470e5bbb01f873d8fa11e8e1293cb76703f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 8 Jun 2023 18:55:54 +0700
Subject: [PATCH 399/691] enable DMA for both pd rx, tx

---
 src/portable/st/typec/typec_stm32.c | 205 +++++++++++++++-------------
 1 file changed, 107 insertions(+), 98 deletions(-)

diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c
index c96dd0902..a898cda47 100644
--- a/src/portable/st/typec/typec_stm32.c
+++ b/src/portable/st/typec/typec_stm32.c
@@ -31,7 +31,7 @@
 
 #if CFG_TUSB_MCU == OPT_MCU_STM32G4
   #include "stm32g4xx.h"
-  #include "stm32g4xx_hal_dma.h"
+  #include "stm32g4xx_ll_dma.h" // for UCLP REQID
 #else
   #error "Unsupported STM32 family"
 #endif
@@ -40,6 +40,12 @@
 //
 //--------------------------------------------------------------------+
 
+enum {
+  IMR_ATTACHED = UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE |
+                 UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE | UCPD_IMR_RXORDDETIE |
+                 UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE | UCPD_IMR_FRSEVTIE
+};
+
 #define PHY_SYNC1 0x18u
 #define PHY_SYNC2 0x11u
 #define PHY_SYNC3 0x06u
@@ -57,55 +63,101 @@
 
 
 static uint8_t rx_buf[262] TU_ATTR_ALIGNED(4);
-static uint32_t rx_count = 0;
-
 static uint8_t tx_buf[262] TU_ATTR_ALIGNED(4);
-static uint32_t tx_count;
+static uint32_t tx_index;
 
-#define CFG_TUC_STM32_DMA_RX { DMA1_Channel1 }
-//#define CFG_TUC_STM32_DMA_TX { DMA1_Channel2 }
+// address of DMA channel rx, tx for each port
+#define CFG_TUC_STM32_DMA  { { DMA1_Channel1_BASE, DMA1_Channel2_BASE } }
 
-#ifdef CFG_TUC_STM32_DMA_RX
-static DMA_Channel_TypeDef* dma_rx_arr[TUP_TYPEC_RHPORTS_NUM] = CFG_TUC_STM32_DMA_RX;
+//--------------------------------------------------------------------+
+// DMA
+//--------------------------------------------------------------------+
 
-TU_ATTR_ALWAYS_INLINE static inline
-void dma_rx_start(uint8_t rhport)
-{
-  DMA_Channel_TypeDef* dma_rx_ch = dma_rx_arr[rhport];
+static const uint32_t dma_addr_arr[TUP_TYPEC_RHPORTS_NUM][2] = CFG_TUC_STM32_DMA;
 
-  dma_rx_ch->CMAR = (uint32_t) rx_buf;
-  dma_rx_ch->CNDTR = sizeof(rx_buf);
-  dma_rx_ch->CCR |= DMA_CCR_EN;
+TU_ATTR_ALWAYS_INLINE static inline uint32_t dma_get_addr(uint8_t rhport, bool is_rx) {
+  return dma_addr_arr[rhport][is_rx ? 0 : 1];
 }
-#endif
 
-#ifdef CFG_TUC_STM32_DMA_TX
-static DMA_Channel_TypeDef* dma_tx_arr[TUP_TYPEC_RHPORTS_NUM] = CFG_TUC_STM32_DMA_TX;
-#endif
+static void dma_init(uint8_t rhport, bool is_rx) {
+  uint32_t dma_addr = dma_get_addr(rhport, is_rx);
+  DMA_Channel_TypeDef* dma_ch = (DMA_Channel_TypeDef*) dma_addr;
+  uint32_t req_id;
+
+  if (is_rx) {
+    // Peripheral -> Memory, Memory inc, 8-bit, High priority
+    dma_ch->CCR = DMA_CCR_MINC | DMA_CCR_PL_1;
+    dma_ch->CPAR = (uint32_t) &UCPD1->RXDR;
+
+    req_id = LL_DMAMUX_REQ_UCPD1_RX;
+  } else {
+    // Memory -> Peripheral, Memory inc, 8-bit, High priority
+    dma_ch->CCR = DMA_CCR_MINC | DMA_CCR_PL_1 | DMA_CCR_DIR;
+    dma_ch->CPAR = (uint32_t) &UCPD1->TXDR;
+
+    req_id = LL_DMAMUX_REQ_UCPD1_TX;
+  }
+
+  // find and set up mux channel TODO support mcu with multiple DMAMUXs
+  enum {
+    CH_DIFF = DMA1_Channel2_BASE - DMA1_Channel1_BASE
+  };
+  uint32_t mux_ch_num;
+
+  #ifdef DMA2_BASE
+  if (dma_addr > DMA2_BASE) {
+    mux_ch_num = 8 * ((dma_addr - DMA2_Channel1_BASE) / CH_DIFF);
+  } else
+  #endif
+  {
+    mux_ch_num = (dma_addr - DMA1_Channel1_BASE) / CH_DIFF;
+  }
+
+  DMAMUX_Channel_TypeDef* mux_ch = DMAMUX1_Channel0 + mux_ch_num;
+
+  uint32_t mux_ccr = mux_ch->CCR & ~(DMAMUX_CxCR_DMAREQ_ID);
+  mux_ccr |= req_id;
+  mux_ch->CCR = mux_ccr;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void dma_start(uint8_t rhport, bool is_rx, void const* buf, uint16_t len) {
+  DMA_Channel_TypeDef* dma_ch = (DMA_Channel_TypeDef*) dma_get_addr(rhport, is_rx);
+
+  dma_ch->CMAR = (uint32_t) buf;
+  dma_ch->CNDTR = len;
+  dma_ch->CCR |= DMA_CCR_EN;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void dma_stop(uint8_t rhport, bool is_rx) {
+  DMA_Channel_TypeDef* dma_ch = (DMA_Channel_TypeDef*) dma_get_addr(rhport, is_rx);
+  dma_ch->CCR &= ~DMA_CCR_EN;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void dma_rx_start(uint8_t rhport) {
+  dma_start(rhport, true, rx_buf, sizeof(rx_buf));
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void dma_tx_start(uint8_t rhport, void const* buf, uint16_t len) {
+  UCPD1->TX_ORDSET = PHY_ORDERED_SET_SOP;
+  UCPD1->TX_PAYSZ = len;
+  dma_start(rhport, false, buf, len);
+}
 
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
-#include "stm32g4xx_ll_dma.h"
+
 
 bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type) {
   (void) rhport;
 
-#ifdef CFG_TUC_STM32_DMA_RX
-  // Init DMA
-  DMA_Channel_TypeDef* dma_rx_ch = dma_rx_arr[rhport];
-
-  // Peripheral -> Memory, Memory inc, 8-bit, High priority
-  dma_rx_ch->CCR = DMA_CCR_MINC | DMA_CCR_PL_1;
-  dma_rx_ch->CPAR = (uint32_t) &UCPD1->RXDR;
-
-  LL_DMA_SetPeriphRequest(DMA1, LL_DMA_CHANNEL_1, LL_DMAMUX_REQ_UCPD1_RX);
-#endif
+  // Init DMA for RX, TX
+  dma_init(rhport, true);
+  dma_init(rhport, false);
 
   // Initialization phase: CFG1
   UCPD1->CFG1 = (0x0d << UCPD_CFG1_HBITCLKDIV_Pos) | (0x10 << UCPD_CFG1_IFRGAP_Pos) | (0x07 << UCPD_CFG1_TRANSWIN_Pos) |
-                (0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos) |
-                (0 << UCPD_CFG1_TXDMAEN_Pos) | (0 << UCPD_CFG1_RXDMAEN_Pos);
+                (0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos);
   UCPD1->CFG1 |= UCPD_CFG1_UCPDEN;
 
   // General programming sequence (with UCPD configured then enabled)
@@ -118,8 +170,7 @@ bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type) {
     vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
     vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
 
-    TU_LOG1_INT(vstate_cc[0]);
-    TU_LOG1_INT(vstate_cc[1]);
+    TU_LOG1("Initial VState CC1 = %u, CC2 = %u\r\n", vstate_cc[0], vstate_cc[1]);
 
     // Enable CC1 & CC2 Interrupt
     UCPD1->IMR = UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE;
@@ -142,7 +193,8 @@ void tcd_int_disable(uint8_t rhport) {
 
 bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes) {
   (void) rhport;
-
+  (void) buffer;
+  (void) total_bytes;
   return true;
 }
 
@@ -159,8 +211,6 @@ void tcd_int_handler(uint8_t rhport) {
   uint32_t sr = UCPD1->SR;
   sr &= UCPD1->IMR;
 
-//  TU_LOG1("UCPD1_IRQHandler: sr = 0x%08X\n", sr);
-
   if (sr & (UCPD_SR_TYPECEVT1 | UCPD_SR_TYPECEVT2)) {
     uint32_t vstate_cc[2];
     vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
@@ -169,7 +219,6 @@ void tcd_int_handler(uint8_t rhport) {
     TU_LOG1("VState CC1 = %u, CC2 = %u\n", vstate_cc[0], vstate_cc[1]);
 
     uint32_t cr = UCPD1->CR;
-    uint32_t cfg1 = UCPD1->CFG1;
 
     // TODO only support SNK for now, required highest voltage for now
     // Enable PHY on correct CC and disable Rd on other CC
@@ -189,28 +238,18 @@ void tcd_int_handler(uint8_t rhport) {
     }
 
     if (cr & UCPD_CR_PHYRXEN) {
-      // Enable Interrupt
-      uint32_t imr = UCPD1->IMR;
-      imr |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE |
-          UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE | UCPD_IMR_RXORDDETIE |
-          UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE | UCPD_IMR_FRSEVTIE;
+      // Attached
+      UCPD1->IMR |= IMR_ATTACHED;
+      UCPD1->CFG1 |= UCPD_CFG1_RXDMAEN | UCPD_CFG1_TXDMAEN;
 
-      #ifdef CFG_TUC_STM32_DMA_RX
-      cfg1 |= UCPD_CFG1_RXDMAEN;
       dma_rx_start(rhport);
-      #else
-      imr |= UCPD_IMR_RXNEIE | UCPD_IMR_RXORDDETIE;
-      #endif
-
-      #ifndef CFG_TUC_STM32_DMA_TX
-      imr |= UCPD_IMR_TXISIE;
-      #endif
-
-      UCPD1->IMR = imr;
+    }else {
+      // Detached
+      UCPD1->CFG1 &= ~(UCPD_CFG1_RXDMAEN | UCPD_CFG1_TXDMAEN);
+      UCPD1->IMR &= ~IMR_ATTACHED;
     }
 
     UCPD1->CR = cr;
-    UCPD1->CFG1 = cfg1;
 
     // ack
     UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF;
@@ -221,27 +260,15 @@ void tcd_int_handler(uint8_t rhport) {
     // SOP: Start of Packet.
     // UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk;
 
-    // reset count when received SOP
-    rx_count = 0;
-
     // ack
     UCPD1->ICR = UCPD_ICR_RXORDDETCF;
   }
 
-#ifndef CFG_TUC_STM32_DMA_RX
-  if (sr & UCPD_SR_RXNE) {
-    // TODO DMA later
-    do {
-      rx_buf[rx_count++] = UCPD1->RXDR;
-    } while (UCPD1->SR & UCPD_SR_RXNE);
-
-    // no ack needed
-  }
-#endif
-
   // Received full message
   if (sr & UCPD_SR_RXMSGEND) {
 
+    dma_stop(rhport, true);
+
     // Skip if CRC failed
     if (!(sr & UCPD_SR_RXERR)) {
       uint32_t payload_size = UCPD1->RX_PAYSZ;
@@ -251,26 +278,23 @@ void tcd_int_handler(uint8_t rhport) {
       (*(tusb_pd_header_t*) tx_buf) = (tusb_pd_header_t) {
           .msg_type = TUSB_PD_CTRL_GOOD_CRC,
           .data_role = 0, // UFP
-          .specs_rev = TUSB_PD_REV30,
+          .specs_rev = TUSB_PD_REV20,
           .power_role = 0, // Sink
           .msg_id = rx_header->msg_id,
           .n_data_obj = 0,
           .extended = 0
       };
-      tx_count = 0;
 
       // response with good crc
-      UCPD1->TX_ORDSET = PHY_ORDERED_SET_SOP;
-      UCPD1->TX_PAYSZ = 2;
-      UCPD1->CR |= UCPD_CR_TXSEND; // will trigger TXIS interrupt
+      dma_tx_start(rhport, tx_buf, 2);
 
-      // notify stack after good crc ?
+      UCPD1->CR |= UCPD_CR_TXSEND;
+
+      // notify stack
     }
 
-    #ifdef CFG_TUC_STM32_DMA_RX
     // prepare next receive
     dma_rx_start(rhport);
-    #endif
 
     // ack
     UCPD1->ICR = UCPD_ICR_RXMSGENDCF;
@@ -283,34 +307,19 @@ void tcd_int_handler(uint8_t rhport) {
   }
 
   //------------- TX -------------//
-  if (sr & UCPD_SR_TXIS) {
-    // TU_LOG1("TXIS\n");
-
-    // TODO DMA later
-    do {
-      UCPD1->TXDR = tx_buf[tx_count++];
-    } while (UCPD1->SR & UCPD_SR_TXIS);
-
-    // no ack needed
-  }
-
   if (sr & UCPD_SR_TXMSGSENT) {
     // all byte sent
-    TU_LOG1("TXMSGSENT\n");
+    dma_stop(rhport, false);
 
     // ack
     UCPD1->ICR = UCPD_ICR_TXMSGSENTCF;
   }
 
-//  if (sr & UCPD_SR_RXNE) {
-//    uint8_t data = UCPD1->RXDR;
-//    pd_rx_buf[pd_rx_count++] = data;
-//    TU_LOG1_HEX(data);
-//  }
-
-//  else {
-//    TU_LOG_LOCATION();
-//  }
+  if (sr & (UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND)) {
+    TU_LOG1("TX Error\n");
+    dma_stop(rhport, false);
+    UCPD1->ICR = UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND;
+  }
 }
 
 #endif

From 08338069805a4e1b5bdf6d3bac0b694d6b10f20e Mon Sep 17 00:00:00 2001
From: Eugene Kliuchnikov <eustas.ru@gmail.com>
Date: Thu, 8 Jun 2023 15:38:30 +0200
Subject: [PATCH 400/691] Fix typos

---
 .../device/audio_test_multi_rate/src/usb_descriptors.h |  2 +-
 examples/device/uac2_headset/src/usb_descriptors.h     |  4 ++--
 src/class/video/video.h                                |  4 ++--
 src/device/usbd.h                                      | 10 +++++-----
 4 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/examples/device/audio_test_multi_rate/src/usb_descriptors.h b/examples/device/audio_test_multi_rate/src/usb_descriptors.h
index 8d8a03e49..8381e31f5 100644
--- a/examples/device/audio_test_multi_rate/src/usb_descriptors.h
+++ b/examples/device/audio_test_multi_rate/src/usb_descriptors.h
@@ -60,7 +60,7 @@
 
 #define TUD_AUDIO_MIC_ONE_CH_2_FORMAT_DESCRIPTOR(_itfnum, _stridx, _epin) \
   /* Standard Interface Association Descriptor (IAD) */\
-  TUD_AUDIO_DESC_IAD(/*_firstitfs*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\
+  TUD_AUDIO_DESC_IAD(/*_firstitf*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\
   /* Standard AC Interface Descriptor(4.7.1) */\
   TUD_AUDIO_DESC_STD_AC(/*_itfnum*/ _itfnum, /*_nEPs*/ 0x00, /*_stridx*/ _stridx),\
   /* Class-Specific AC Interface Header Descriptor(4.7.2) */\
diff --git a/examples/device/uac2_headset/src/usb_descriptors.h b/examples/device/uac2_headset/src/usb_descriptors.h
index 457e69882..d7e170162 100644
--- a/examples/device/uac2_headset/src/usb_descriptors.h
+++ b/examples/device/uac2_headset/src/usb_descriptors.h
@@ -57,7 +57,7 @@ enum
     + TUD_AUDIO_DESC_OUTPUT_TERM_LEN\
     /* Interface 1, Alternate 0 */\
     + TUD_AUDIO_DESC_STD_AS_INT_LEN\
-    /* Interface 1, Alternate 0 */\
+    /* Interface 1, Alternate 1 */\
     + TUD_AUDIO_DESC_STD_AS_INT_LEN\
     + TUD_AUDIO_DESC_CS_AS_INT_LEN\
     + TUD_AUDIO_DESC_TYPE_I_FORMAT_LEN\
@@ -86,7 +86,7 @@ enum
 
 #define TUD_AUDIO_HEADSET_STEREO_DESCRIPTOR(_stridx, _epout, _epin) \
     /* Standard Interface Association Descriptor (IAD) */\
-    TUD_AUDIO_DESC_IAD(/*_firstitfs*/ ITF_NUM_AUDIO_CONTROL, /*_nitfs*/ 3, /*_stridx*/ 0x00),\
+    TUD_AUDIO_DESC_IAD(/*_firstitf*/ ITF_NUM_AUDIO_CONTROL, /*_nitfs*/ ITF_NUM_TOTAL, /*_stridx*/ 0x00),\
     /* Standard AC Interface Descriptor(4.7.1) */\
     TUD_AUDIO_DESC_STD_AC(/*_itfnum*/ ITF_NUM_AUDIO_CONTROL, /*_nEPs*/ 0x00, /*_stridx*/ _stridx),\
     /* Class-Specific AC Interface Header Descriptor(4.7.2) */\
diff --git a/src/class/video/video.h b/src/class/video/video.h
index c0088c4f6..d9880c291 100644
--- a/src/class/video/video.h
+++ b/src/class/video/video.h
@@ -448,9 +448,9 @@ TU_VERIFY_STATIC( sizeof(video_probe_and_commit_control_t) == 48, "size is not c
 #define TUD_VIDEO_GUID_M420   0x4D,0x34,0x32,0x30,0x00,0x00,0x10,0x00,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71
 #define TUD_VIDEO_GUID_I420   0x49,0x34,0x32,0x30,0x00,0x00,0x10,0x00,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71
 
-#define TUD_VIDEO_DESC_IAD(_firstitfs, _nitfs, _stridx) \
+#define TUD_VIDEO_DESC_IAD(_firstitf, _nitfs, _stridx) \
   TUD_VIDEO_DESC_IAD_LEN, TUSB_DESC_INTERFACE_ASSOCIATION, \
-  _firstitfs, _nitfs, TUSB_CLASS_VIDEO, VIDEO_SUBCLASS_INTERFACE_COLLECTION, \
+  _firstitf, _nitfs, TUSB_CLASS_VIDEO, VIDEO_SUBCLASS_INTERFACE_COLLECTION, \
   VIDEO_ITF_PROTOCOL_UNDEFINED, _stridx
 
 #define TUD_VIDEO_DESC_STD_VC(_itfnum, _nEPs, _stridx) \
diff --git a/src/device/usbd.h b/src/device/usbd.h
index 255e5a844..b11c1a09d 100644
--- a/src/device/usbd.h
+++ b/src/device/usbd.h
@@ -347,8 +347,8 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
 
 /* Standard Interface Association Descriptor (IAD) */
 #define TUD_AUDIO_DESC_IAD_LEN 8
-#define TUD_AUDIO_DESC_IAD(_firstitfs, _nitfs, _stridx) \
-  TUD_AUDIO_DESC_IAD_LEN, TUSB_DESC_INTERFACE_ASSOCIATION, _firstitfs, _nitfs, TUSB_CLASS_AUDIO, AUDIO_FUNCTION_SUBCLASS_UNDEFINED, AUDIO_FUNC_PROTOCOL_CODE_V2, _stridx
+#define TUD_AUDIO_DESC_IAD(_firstitf, _nitfs, _stridx) \
+  TUD_AUDIO_DESC_IAD_LEN, TUSB_DESC_INTERFACE_ASSOCIATION, _firstitf, _nitfs, TUSB_CLASS_AUDIO, AUDIO_FUNCTION_SUBCLASS_UNDEFINED, AUDIO_FUNC_PROTOCOL_CODE_V2, _stridx
 
 /* Standard AC Interface Descriptor(4.7.1) */
 #define TUD_AUDIO_DESC_STD_AC_LEN 9
@@ -443,7 +443,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
 
 #define TUD_AUDIO_MIC_ONE_CH_DESCRIPTOR(_itfnum, _stridx, _nBytesPerSample, _nBitsUsedPerSample, _epin, _epsize) \
   /* Standard Interface Association Descriptor (IAD) */\
-  TUD_AUDIO_DESC_IAD(/*_firstitfs*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\
+  TUD_AUDIO_DESC_IAD(/*_firstitf*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\
   /* Standard AC Interface Descriptor(4.7.1) */\
   TUD_AUDIO_DESC_STD_AC(/*_itfnum*/ _itfnum, /*_nEPs*/ 0x00, /*_stridx*/ _stridx),\
   /* Class-Specific AC Interface Header Descriptor(4.7.2) */\
@@ -492,7 +492,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
 
 #define TUD_AUDIO_MIC_FOUR_CH_DESCRIPTOR(_itfnum, _stridx, _nBytesPerSample, _nBitsUsedPerSample, _epin, _epsize) \
   /* Standard Interface Association Descriptor (IAD) */\
-  TUD_AUDIO_DESC_IAD(/*_firstitfs*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\
+  TUD_AUDIO_DESC_IAD(/*_firstitf*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\
   /* Standard AC Interface Descriptor(4.7.1) */\
   TUD_AUDIO_DESC_STD_AC(/*_itfnum*/ _itfnum, /*_nEPs*/ 0x00, /*_stridx*/ _stridx),\
   /* Class-Specific AC Interface Header Descriptor(4.7.2) */\
@@ -540,7 +540,7 @@ TU_ATTR_WEAK bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb
 
 #define TUD_AUDIO_SPEAKER_MONO_FB_DESCRIPTOR(_itfnum, _stridx, _nBytesPerSample, _nBitsUsedPerSample, _epout, _epsize, _epfb) \
   /* Standard Interface Association Descriptor (IAD) */\
-  TUD_AUDIO_DESC_IAD(/*_firstitfs*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\
+  TUD_AUDIO_DESC_IAD(/*_firstitf*/ _itfnum, /*_nitfs*/ 0x02, /*_stridx*/ 0x00),\
   /* Standard AC Interface Descriptor(4.7.1) */\
   TUD_AUDIO_DESC_STD_AC(/*_itfnum*/ _itfnum, /*_nEPs*/ 0x00, /*_stridx*/ _stridx),\
   /* Class-Specific AC Interface Header Descriptor(4.7.2) */\

From 912802456b568e4b666a9205c3799da79f87ef69 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 9 Jun 2023 18:15:28 +0700
Subject: [PATCH 401/691] move protocol message to stack, disable battery in
 PWR's CR3

there is still issue with CC1/CC2 pull down resistor and vstate is not
correct.
---
 hw/bsp/stm32g4/family.c             |   8 +-
 src/device/dcd.h                    |   1 +
 src/portable/st/typec/typec_stm32.c | 113 ++++++++++++++--------------
 src/typec/tcd.h                     |  52 +++++++++++++
 src/typec/utcd.c                    |  61 +++++++++++----
 src/typec/utcd.h                    |   2 +-
 6 files changed, 162 insertions(+), 75 deletions(-)

diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c
index 5fa6e3dbb..d77183357 100644
--- a/hw/bsp/stm32g4/family.c
+++ b/hw/bsp/stm32g4/family.c
@@ -145,13 +145,13 @@ void board_init(void)
 #if 1
   // USB PD
   // Default CC1/CC2 is PB4/PB6
-  /* PWR register access (for disabling dead battery feature) */
-  LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
-  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_CRC);
 
+  // Enable pwr for disabling dead battery feature in Power's CR3
+  __HAL_RCC_PWR_CLK_ENABLE();
+  __HAL_RCC_CRC_CLK_ENABLE();
   __HAL_RCC_UCPD1_CLK_ENABLE();
 
-  // Enable DMA clock
+  // Enable DMA for USB PD
   __HAL_RCC_DMAMUX1_CLK_ENABLE();
   __HAL_RCC_DMA1_CLK_ENABLE();
 #endif
diff --git a/src/device/dcd.h b/src/device/dcd.h
index f82b8633d..4e9cfd5d5 100644
--- a/src/device/dcd.h
+++ b/src/device/dcd.h
@@ -189,6 +189,7 @@ TU_ATTR_WEAK bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t l
 
 // Configure and enable an ISO endpoint according to descriptor
 TU_ATTR_WEAK bool dcd_edpt_iso_activate(uint8_t rhport,  tusb_desc_endpoint_t const * p_endpoint_desc);
+
 //--------------------------------------------------------------------+
 // Event API (implemented by stack)
 //--------------------------------------------------------------------+
diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c
index a898cda47..1dba54492 100644
--- a/src/portable/st/typec/typec_stm32.c
+++ b/src/portable/st/typec/typec_stm32.c
@@ -31,7 +31,7 @@
 
 #if CFG_TUSB_MCU == OPT_MCU_STM32G4
   #include "stm32g4xx.h"
-  #include "stm32g4xx_ll_dma.h" // for UCLP REQID
+  #include "stm32g4xx_ll_dma.h" // for UCPD REQID
 #else
   #error "Unsupported STM32 family"
 #endif
@@ -62,9 +62,17 @@ enum {
 #define PHY_ORDERED_SET_SOP_PP_DEBUG (PHY_SYNC1 | (PHY_RST2<<5u)  | (PHY_SYNC3<<10u) | (PHY_SYNC2<<15u)) // SOP'' Debug Ordered set coding
 
 
-static uint8_t rx_buf[262] TU_ATTR_ALIGNED(4);
-static uint8_t tx_buf[262] TU_ATTR_ALIGNED(4);
-static uint32_t tx_index;
+static uint8_t const* _rx_buf;
+
+static tusb_pd_header_t _good_crc = {
+    .msg_type   = TUSB_PD_CTRL_GOOD_CRC,
+    .data_role  = 0, // UFP
+    .specs_rev  = TUSB_PD_REV20,
+    .power_role = 0, // Sink
+    .msg_id     = 0,
+    .n_data_obj = 0,
+    .extended   = 0
+};
 
 // address of DMA channel rx, tx for each port
 #define CFG_TUC_STM32_DMA  { { DMA1_Channel1_BASE, DMA1_Channel2_BASE } }
@@ -73,10 +81,10 @@ static uint32_t tx_index;
 // DMA
 //--------------------------------------------------------------------+
 
-static const uint32_t dma_addr_arr[TUP_TYPEC_RHPORTS_NUM][2] = CFG_TUC_STM32_DMA;
+static const uint32_t _dma_addr_arr[TUP_TYPEC_RHPORTS_NUM][2] = CFG_TUC_STM32_DMA;
 
 TU_ATTR_ALWAYS_INLINE static inline uint32_t dma_get_addr(uint8_t rhport, bool is_rx) {
-  return dma_addr_arr[rhport][is_rx ? 0 : 1];
+  return _dma_addr_arr[rhport][is_rx ? 0 : 1];
 }
 
 static void dma_init(uint8_t rhport, bool is_rx) {
@@ -133,10 +141,6 @@ TU_ATTR_ALWAYS_INLINE static inline void dma_stop(uint8_t rhport, bool is_rx) {
   dma_ch->CCR &= ~DMA_CCR_EN;
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void dma_rx_start(uint8_t rhport) {
-  dma_start(rhport, true, rx_buf, sizeof(rx_buf));
-}
-
 TU_ATTR_ALWAYS_INLINE static inline void dma_tx_start(uint8_t rhport, void const* buf, uint16_t len) {
   UCPD1->TX_ORDSET = PHY_ORDERED_SET_SOP;
   UCPD1->TX_PAYSZ = len;
@@ -147,7 +151,6 @@ TU_ATTR_ALWAYS_INLINE static inline void dma_tx_start(uint8_t rhport, void const
 //
 //--------------------------------------------------------------------+
 
-
 bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type) {
   (void) rhport;
 
@@ -155,27 +158,30 @@ bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type) {
   dma_init(rhport, true);
   dma_init(rhport, false);
 
-  // Initialization phase: CFG1
+  // Initialization phase: CFG1, detect all SOPs
   UCPD1->CFG1 = (0x0d << UCPD_CFG1_HBITCLKDIV_Pos) | (0x10 << UCPD_CFG1_IFRGAP_Pos) | (0x07 << UCPD_CFG1_TRANSWIN_Pos) |
                 (0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos);
   UCPD1->CFG1 |= UCPD_CFG1_UCPDEN;
 
   // General programming sequence (with UCPD configured then enabled)
   if (port_type == TUSB_TYPEC_PORT_SNK) {
-    // Enable both CC Phy
-    UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | UCPD_CR_CCENABLE_0 | UCPD_CR_CCENABLE_1;
+    // Set analog mode enable both CC Phy
+    UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (UCPD_CR_CCENABLE_0 | UCPD_CR_CCENABLE_1);
 
     // Read Voltage State on CC1 & CC2 fore initial state
-    uint32_t vstate_cc[2];
-    vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
-    vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
+    uint32_t v_cc[2];
+    v_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
+    v_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
 
-    TU_LOG1("Initial VState CC1 = %u, CC2 = %u\r\n", vstate_cc[0], vstate_cc[1]);
+    TU_LOG1("Initial VState CC1 = %u, CC2 = %u\r\n", v_cc[0], v_cc[1]);
 
     // Enable CC1 & CC2 Interrupt
     UCPD1->IMR = UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE;
   }
 
+  // Disable dead battery in PWR's CR3
+  PWR->CR3 |= PWR_CR3_UCPD_DBDIS;
+
   return true;
 }
 
@@ -192,9 +198,8 @@ void tcd_int_disable(uint8_t rhport) {
 }
 
 bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes) {
-  (void) rhport;
-  (void) buffer;
-  (void) total_bytes;
+  _rx_buf = buffer;
+  dma_start(rhport, true, buffer, total_bytes);
   return true;
 }
 
@@ -212,27 +217,28 @@ void tcd_int_handler(uint8_t rhport) {
   sr &= UCPD1->IMR;
 
   if (sr & (UCPD_SR_TYPECEVT1 | UCPD_SR_TYPECEVT2)) {
-    uint32_t vstate_cc[2];
-    vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
-    vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
+    uint32_t v_cc[2];
+    v_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
+    v_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
 
-    TU_LOG1("VState CC1 = %u, CC2 = %u\n", vstate_cc[0], vstate_cc[1]);
+    TU_LOG3("VState CC1 = %u, CC2 = %u\n", v_cc[0], v_cc[1]);
 
     uint32_t cr = UCPD1->CR;
 
     // TODO only support SNK for now, required highest voltage for now
-    // Enable PHY on correct CC and disable Rd on other CC
-    if ((sr & UCPD_SR_TYPECEVT1) && (vstate_cc[0] == 3)) {
-      TU_LOG1("Attach CC1\n");
-
+    // Enable PHY on active CC and disable Rd on other CC
+    // FIXME somehow CC2 is vstate is not correct, always 1 even not attached.
+    // on DPOW1 board, it is connected to PA10 (USBPD_DBCC2), we probably miss something.
+    if ((sr & UCPD_SR_TYPECEVT1) && (v_cc[0] == 3)) {
+      TU_LOG3("Attach CC1\n");
       cr &= ~(UCPD_CR_PHYCCSEL | UCPD_CR_CCENABLE);
       cr |= UCPD_CR_PHYRXEN | UCPD_CR_CCENABLE_0;
-    } else if ((sr & UCPD_SR_TYPECEVT2) && (vstate_cc[1] == 3)) {
-      TU_LOG1("Attach CC2\n");
+    } else if ((sr & UCPD_SR_TYPECEVT2) && (v_cc[1] == 3)) {
+      TU_LOG3("Attach CC2\n");
       cr &= ~UCPD_CR_CCENABLE;
       cr |= (UCPD_CR_PHYCCSEL | UCPD_CR_PHYRXEN | UCPD_CR_CCENABLE_1);
     } else {
-      TU_LOG1("Detach\n");
+      TU_LOG3("Detach\n");
       cr &= ~UCPD_CR_PHYRXEN;
       cr |= UCPD_CR_CCENABLE_0 | UCPD_CR_CCENABLE_1;
     }
@@ -241,14 +247,15 @@ void tcd_int_handler(uint8_t rhport) {
       // Attached
       UCPD1->IMR |= IMR_ATTACHED;
       UCPD1->CFG1 |= UCPD_CFG1_RXDMAEN | UCPD_CFG1_TXDMAEN;
-
-      dma_rx_start(rhport);
     }else {
       // Detached
       UCPD1->CFG1 &= ~(UCPD_CFG1_RXDMAEN | UCPD_CFG1_TXDMAEN);
       UCPD1->IMR &= ~IMR_ATTACHED;
     }
 
+    // notify stack
+    tcd_event_cc_changed(rhport, v_cc[0], v_cc[1], true);
+
     UCPD1->CR = cr;
 
     // ack
@@ -258,6 +265,7 @@ void tcd_int_handler(uint8_t rhport) {
   //------------- RX -------------//
   if (sr & UCPD_SR_RXORDDET) {
     // SOP: Start of Packet.
+    TU_LOG3("SOP\n");
     // UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk;
 
     // ack
@@ -266,48 +274,39 @@ void tcd_int_handler(uint8_t rhport) {
 
   // Received full message
   if (sr & UCPD_SR_RXMSGEND) {
-
+    TU_LOG3("RX MSG END\n");
     dma_stop(rhport, true);
 
-    // Skip if CRC failed
+    uint8_t result;
+
     if (!(sr & UCPD_SR_RXERR)) {
-      uint32_t payload_size = UCPD1->RX_PAYSZ;
-      // TU_LOG1("RXMSGEND: payload_size = %u, rx count = %u\n", payload_size, pd_rx_count);
-
-      tusb_pd_header_t const* rx_header = (tusb_pd_header_t const*) rx_buf;
-      (*(tusb_pd_header_t*) tx_buf) = (tusb_pd_header_t) {
-          .msg_type = TUSB_PD_CTRL_GOOD_CRC,
-          .data_role = 0, // UFP
-          .specs_rev = TUSB_PD_REV20,
-          .power_role = 0, // Sink
-          .msg_id = rx_header->msg_id,
-          .n_data_obj = 0,
-          .extended = 0
-      };
-
       // response with good crc
-      dma_tx_start(rhport, tx_buf, 2);
-
+      _good_crc.msg_id = ((tusb_pd_header_t const*) _rx_buf)->msg_id;
+      dma_tx_start(rhport, &_good_crc, 2);
       UCPD1->CR |= UCPD_CR_TXSEND;
 
-      // notify stack
+      result = XFER_RESULT_SUCCESS;
+    }else {
+      // CRC failed
+      result = XFER_RESULT_FAILED;
     }
 
-    // prepare next receive
-    dma_rx_start(rhport);
+    // notify stack
+    tcd_event_rx_complete(rhport, UCPD1->RX_PAYSZ, result, true);
 
     // ack
     UCPD1->ICR = UCPD_ICR_RXMSGENDCF;
   }
 
   if (sr & UCPD_SR_RXOVR) {
-    TU_LOG1("RXOVR\n");
+    TU_LOG3("RXOVR\n");
     // ack
     UCPD1->ICR = UCPD_ICR_RXOVRCF;
   }
 
   //------------- TX -------------//
   if (sr & UCPD_SR_TXMSGSENT) {
+    TU_LOG3("TX MSG SENT\n");
     // all byte sent
     dma_stop(rhport, false);
 
@@ -316,7 +315,7 @@ void tcd_int_handler(uint8_t rhport) {
   }
 
   if (sr & (UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND)) {
-    TU_LOG1("TX Error\n");
+    TU_LOG3("TX Error\n");
     dma_stop(rhport, false);
     UCPD1->ICR = UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND;
   }
diff --git a/src/typec/tcd.h b/src/typec/tcd.h
index e823bf8d7..41dceaa74 100644
--- a/src/typec/tcd.h
+++ b/src/typec/tcd.h
@@ -38,10 +38,28 @@ extern "C" {
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
+
+enum {
+  TCD_EVENT_INVALID = 0,
+  TCD_EVENT_CC_CHANGED,
+  TCD_EVENT_RX_COMPLETE,
+};
+
+
 typedef struct {
   uint8_t rhport;
   uint8_t event_id;
 
+  union {
+    struct {
+      uint8_t cc_state[2];
+    } cc_changed;
+
+    struct {
+      uint16_t xferred_bytes;
+      uint8_t result;
+    } rx_complete;
+  };
 
 } tcd_event_t;;
 
@@ -68,4 +86,38 @@ void tcd_int_handler(uint8_t rhport);
 bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes);
 bool tcd_tx_start(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes);
 
+//--------------------------------------------------------------------+
+// Event API (implemented by stack)
+// Called by TCD to notify stack
+//--------------------------------------------------------------------+
+
+extern void tcd_event_handler(tcd_event_t const * event, bool in_isr);
+
+TU_ATTR_ALWAYS_INLINE static inline
+void tcd_event_cc_changed(uint8_t rhport, uint8_t cc1, uint8_t cc2, bool in_isr) {
+  tcd_event_t event = {
+    .rhport   = rhport,
+    .event_id = TCD_EVENT_CC_CHANGED,
+    .cc_changed = {
+        .cc_state = {cc1, cc2 }
+    }
+  };
+
+  tcd_event_handler(&event, in_isr);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline
+void tcd_event_rx_complete(uint8_t rhport, uint16_t xferred_bytes, uint8_t result, bool in_isr) {
+  tcd_event_t event = {
+    .rhport   = rhport,
+    .event_id = TCD_EVENT_RX_COMPLETE,
+    .rx_complete = {
+        .xferred_bytes = xferred_bytes,
+        .result        = result
+    }
+  };
+
+  tcd_event_handler(&event, in_isr);
+}
+
 #endif
diff --git a/src/typec/utcd.c b/src/typec/utcd.c
index b5f9965fe..fb69b01e8 100644
--- a/src/typec/utcd.c
+++ b/src/typec/utcd.c
@@ -42,35 +42,38 @@
 // Event queue
 // utcd_int_set() is used as mutex in OS NONE config
 void utcd_int_set(bool enabled);
-OSAL_QUEUE_DEF(utcd_int_set, utcd_qdef, CFG_TUC_TASK_QUEUE_SZ, tcd_event_t);
-tu_static osal_queue_t utcd_q;
+OSAL_QUEUE_DEF(utcd_int_set, _utcd_qdef, CFG_TUC_TASK_QUEUE_SZ, tcd_event_t);
+tu_static osal_queue_t _utcd_q;
 
 // if stack is initialized
-static bool utcd_inited = false;
+static bool _utcd_inited = false;
 
 // if port is initialized
-static bool port_inited[TUP_TYPEC_RHPORTS_NUM];
+static bool _port_inited[TUP_TYPEC_RHPORTS_NUM];
+
+// Max possible PD size is 262 bytes
+static uint8_t _rx_buf[262] TU_ATTR_ALIGNED(4);
 
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
 bool tuc_inited(uint8_t rhport) {
-  return utcd_inited && port_inited[rhport];
+  return _utcd_inited && _port_inited[rhport];
 }
 
 bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type) {
   // Initialize stack
-  if (!utcd_inited) {
-    tu_memclr(port_inited, sizeof(port_inited));
+  if (!_utcd_inited) {
+    tu_memclr(_port_inited, sizeof(_port_inited));
 
-    utcd_q = osal_queue_create(&utcd_qdef);
-    TU_ASSERT(utcd_q != NULL);
+    _utcd_q = osal_queue_create(&_utcd_qdef);
+    TU_ASSERT(_utcd_q != NULL);
 
-    utcd_inited = true;
+    _utcd_inited = true;
   }
 
   // skip if port already initialized
-  if ( port_inited[rhport] ) {
+  if ( _port_inited[rhport] ) {
     return true;
   }
 
@@ -79,10 +82,42 @@ bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type) {
   TU_ASSERT(tcd_init(rhport, port_type));
   tcd_int_enable(rhport);
 
-  port_inited[rhport] = true;
+  _port_inited[rhport] = true;
   return true;
 }
 
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+//bool parse_message(uint8_t const * data, uint16_t len, pd_msg_t * msg) {
+//  // TODO
+//  (void) data;
+//  (void) len;
+//  (void) msg;
+//  return false;
+//}
+
+void tcd_event_handler(tcd_event_t const * event, bool in_isr) {
+  (void) in_isr;
+  switch(event->event_id) {
+    case TCD_EVENT_CC_CHANGED:
+      if (event->cc_changed.cc_state[0] || event->cc_changed.cc_state[1]) {
+        // Attach
+        tcd_rx_start(event->rhport, _rx_buf, sizeof(_rx_buf));
+      }else {
+        // Detach
+      }
+      break;
+
+    case TCD_EVENT_RX_COMPLETE:
+      // TODO process message here in ISR, move to thread later
+
+      // start new rx
+      tcd_rx_start(event->rhport, _rx_buf, sizeof(_rx_buf));
+      break;
+  }
+}
 
 //--------------------------------------------------------------------+
 //
@@ -90,7 +125,7 @@ bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type) {
 void utcd_int_set(bool enabled) {
   // Disable all controllers since they shared the same event queue
   for (uint8_t p = 0; p < TUP_TYPEC_RHPORTS_NUM; p++) {
-    if ( port_inited[p] ) {
+    if ( _port_inited[p] ) {
       if (enabled) {
         tcd_int_enable(p);
       }else {
diff --git a/src/typec/utcd.h b/src/typec/utcd.h
index 06a62ef23..75ff6f1db 100644
--- a/src/typec/utcd.h
+++ b/src/typec/utcd.h
@@ -38,7 +38,7 @@ extern "C" {
 //--------------------------------------------------------------------+
 
 #ifndef CFG_TUC_TASK_QUEUE_SZ
-#define CFG_TUC_TASK_QUEUE_SZ   16
+#define CFG_TUC_TASK_QUEUE_SZ   8
 #endif
 
 

From bb4fb0543bab21e68748b359ec7d59e74cac1445 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 9 Jun 2023 19:38:50 +0700
Subject: [PATCH 402/691] able to parse SOURCE_CAP message from dfp

---
 src/typec/utcd.c | 56 ++++++++++++++++++++++++++++++++++++++------
 src/typec/utcd.h | 60 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 109 insertions(+), 7 deletions(-)

diff --git a/src/typec/utcd.c b/src/typec/utcd.c
index fb69b01e8..abbe8b43e 100644
--- a/src/typec/utcd.c
+++ b/src/typec/utcd.c
@@ -90,13 +90,50 @@ bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type) {
 //
 //--------------------------------------------------------------------+
 
-//bool parse_message(uint8_t const * data, uint16_t len, pd_msg_t * msg) {
-//  // TODO
-//  (void) data;
-//  (void) len;
-//  (void) msg;
-//  return false;
-//}
+bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) {
+  (void) rhport;
+  uint8_t const* p_end = buf + len;
+  tusb_pd_header_t const* header = (tusb_pd_header_t const*) buf;
+  uint8_t const * ptr = buf + sizeof(tusb_pd_header_t);
+
+  if (header->n_data_obj == 0) {
+    // control message
+  } else {
+    // data message
+    switch (header->msg_type) {
+      case TUSB_PD_DATA_SOURCE_CAP: {
+        for(size_t i=0; i<header->n_data_obj; i++) {
+          TU_VERIFY(ptr < p_end);
+          uint32_t const pdo = tu_le32toh(tu_unaligned_read32(ptr));
+
+          switch ((pdo >> 30) & 0x03ul) {
+            case PD_PDO_TYPE_FIXED: {
+              pd_pdo_fixed_t const* fixed = (pd_pdo_fixed_t const*) &pdo;
+              TU_LOG3("[Fixed] %u mV %u mA\r\n", fixed->voltage_50mv*50, fixed->current_max_10ma*10);
+              break;
+            }
+
+            case PD_PDO_TYPE_BATTERY:
+              break;
+
+            case PD_PDO_TYPE_VARIABLE:
+              break;
+
+            case PD_PDO_TYPE_APDO:
+              break;
+          }
+
+          ptr += 4;
+        }
+        break;
+      }
+
+      default: break;
+    }
+  }
+
+  return true;
+}
 
 void tcd_event_handler(tcd_event_t const * event, bool in_isr) {
   (void) in_isr;
@@ -112,10 +149,15 @@ void tcd_event_handler(tcd_event_t const * event, bool in_isr) {
 
     case TCD_EVENT_RX_COMPLETE:
       // TODO process message here in ISR, move to thread later
+      if (event->rx_complete.result == XFER_RESULT_SUCCESS) {
+        parse_message(event->rhport, _rx_buf, event->rx_complete.xferred_bytes);
+      }
 
       // start new rx
       tcd_rx_start(event->rhport, _rx_buf, sizeof(_rx_buf));
       break;
+
+    default: break;
   }
 }
 
diff --git a/src/typec/utcd.h b/src/typec/utcd.h
index 75ff6f1db..dbc909592 100644
--- a/src/typec/utcd.h
+++ b/src/typec/utcd.h
@@ -41,6 +41,66 @@ extern "C" {
 #define CFG_TUC_TASK_QUEUE_SZ   8
 #endif
 
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+// All table references are from USBPD Specification rev3.1 version 1.8
+enum {
+  PD_PDO_TYPE_FIXED = 0, // Vmin = Vmax
+  PD_PDO_TYPE_BATTERY,
+  PD_PDO_TYPE_VARIABLE, // non-battery
+  PD_PDO_TYPE_APDO, // Augmented Power Data Object
+};
+
+// Fixed Power Data Object (PDO) table 6-9
+typedef struct TU_ATTR_PACKED {
+  uint32_t current_max_10ma          : 10; // [9..0] Max current in 10mA unit
+  uint32_t voltage_50mv              : 10; // [19..10] Voltage in 50mV unit
+  uint32_t current_peak              :  2; // [21..20] Peak current
+  uint32_t reserved                  :  1; // [22] Reserved
+  uint32_t epr_mode_capable          :  1; // [23] epr_mode_capable
+  uint32_t unchunked_ext_msg_support :  1; // [24] UnChunked Extended Message Supported
+  uint32_t dual_role_data            :  1; // [25] Dual Role Data
+  uint32_t usb_comm_capable          :  1; // [26] USB Communications Capable
+  uint32_t unconstrained_power       :  1; // [27] Unconstrained Power
+  uint32_t usb_suspend_supported     :  1; // [28] USB Suspend Supported
+  uint32_t dual_role_power           :  1; // [29] Dual Role Power
+  uint32_t type                      :  2; // [30] Fixed Supply type = PD_PDO_TYPE_FIXED
+} pd_pdo_fixed_t;
+TU_VERIFY_STATIC(sizeof(pd_pdo_fixed_t) == 4, "Invalid size");
+
+// Battery Power Data Object (PDO) table 6-12
+typedef struct TU_ATTR_PACKED {
+  uint32_t power_max_250mw   : 10; // [9..0] Max allowable power in 250mW unit
+  uint32_t voltage_min_50mv  : 10; // [19..10] Minimum voltage in 50mV unit
+  uint32_t voltage_max_50mv  : 10; // [29..20] Maximum voltage in 50mV unit
+  uint32_t type              :  2; // [31..30] Battery type = PD_PDO_TYPE_BATTERY
+} pd_pdo_battery_t;
+TU_VERIFY_STATIC(sizeof(pd_pdo_battery_t) == 4, "Invalid size");
+
+// Variable Power Data Object (PDO) table 6-11
+typedef struct TU_ATTR_PACKED {
+  uint32_t current_max_10ma  : 10; // [9..0] Max current in 10mA unit
+  uint32_t voltage_min_50mv  : 10; // [19..10] Minimum voltage in 50mV unit
+  uint32_t voltage_max_50mv  : 10; // [29..20] Maximum voltage in 50mV unit
+  uint32_t type              :  2; // [31..30] Variable Supply type = PD_PDO_TYPE_VARIABLE
+} pd_pdo_variable_t;
+TU_VERIFY_STATIC(sizeof(pd_pdo_variable_t) == 4, "Invalid size");
+
+// Augmented Power Data Object (PDO) table 6-13
+typedef struct TU_ATTR_PACKED {
+  uint32_t current_max_50ma  :  7; // [6..0] Max current in 50mA unit
+  uint32_t reserved1         :  1; // [7] Reserved
+  uint32_t voltage_min_100mv :  8; // [15..8] Minimum Voltage in 100mV unit
+  uint32_t reserved2         :  1; // [16] Reserved
+  uint32_t voltage_max_100mv :  8; // [24..17] Maximum Voltage in 100mV unit
+  uint32_t reserved3         :  2; // [26..25] Reserved
+  uint32_t pps_power_limited :  1; // [27] PPS Power Limited
+  uint32_t spr_programmable  :  2; // [29..28] SPR Programmable Power Supply
+  uint32_t type              :  2; // [31..30] Augmented Power Data Object = PD_PDO_TYPE_APDO
+} pd_pdo_apdo_t;
+TU_VERIFY_STATIC(sizeof(pd_pdo_apdo_t) == 4, "Invalid size");
 
 //--------------------------------------------------------------------+
 // Application API

From debde4cc97cb7c6c13d62d0e3bbe195c80bfec9f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 12 Jun 2023 12:14:55 +0700
Subject: [PATCH 403/691] response with request safe5v, get passed PS_READY

---
 src/common/tusb_types.h             | 10 ++++
 src/portable/st/typec/typec_stm32.c | 78 +++++++++++++++++++++++------
 src/typec/tcd.h                     | 17 ++++++-
 src/typec/utcd.c                    | 59 ++++++++++++++++++++++
 src/typec/utcd.h                    | 34 ++++++++++++-
 5 files changed, 180 insertions(+), 18 deletions(-)

diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index c92320e5c..cad633ee4 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -562,6 +562,16 @@ enum {
   TUSB_PD_REV30	= 0x2,
 };
 
+enum {
+  TUSB_PD_DATA_ROLE_UFP	= 0x0,
+  TUSB_PD_DATA_ROLE_DFP	= 0x1,
+};
+
+enum {
+  TUSB_PD_POWER_ROLE_SINK	= 0x0,
+  TUSB_PD_POWER_ROLE_SOURCE	= 0x1,
+};
+
 typedef struct TU_ATTR_PACKED {
   uint16_t msg_type   : 5; // [0:4]
   uint16_t data_role  : 1; // [5] SOP only: 0 UFP, 1 DFP
diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c
index 1dba54492..9b3b21707 100644
--- a/src/portable/st/typec/typec_stm32.c
+++ b/src/portable/st/typec/typec_stm32.c
@@ -63,6 +63,9 @@ enum {
 
 
 static uint8_t const* _rx_buf;
+static uint8_t const* _tx_pending_buf;
+static uint16_t _tx_pending_bytes;
+static uint16_t _tx_xferring_bytes;
 
 static tusb_pd_header_t _good_crc = {
     .msg_type   = TUSB_PD_CTRL_GOOD_CRC,
@@ -141,10 +144,21 @@ TU_ATTR_ALWAYS_INLINE static inline void dma_stop(uint8_t rhport, bool is_rx) {
   dma_ch->CCR &= ~DMA_CCR_EN;
 }
 
+TU_ATTR_ALWAYS_INLINE static inline bool dma_enabled(uint8_t rhport, bool is_rx) {
+  DMA_Channel_TypeDef* dma_ch = (DMA_Channel_TypeDef*) dma_get_addr(rhport, is_rx);
+  return dma_ch->CCR & DMA_CCR_EN;
+}
+
+
 TU_ATTR_ALWAYS_INLINE static inline void dma_tx_start(uint8_t rhport, void const* buf, uint16_t len) {
   UCPD1->TX_ORDSET = PHY_ORDERED_SET_SOP;
   UCPD1->TX_PAYSZ = len;
   dma_start(rhport, false, buf, len);
+  UCPD1->CR |= UCPD_CR_TXSEND;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void dma_tx_stop(uint8_t rhport) {
+  dma_stop(rhport, false);
 }
 
 //--------------------------------------------------------------------+
@@ -203,11 +217,23 @@ bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes) {
   return true;
 }
 
-bool tcd_tx_start(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes) {
+bool tcd_msg_send(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes) {
   (void) rhport;
-  (void) buffer;
-  (void) total_bytes;
-  return false;
+
+  if (dma_enabled(rhport, false)) {
+    // DMA is busy, probably sending GoodCRC, save as pending TX
+    _tx_pending_buf = buffer;
+    _tx_pending_bytes = total_bytes;
+  }else {
+    // DMA is free, start sending
+    _tx_pending_buf = NULL;
+    _tx_pending_bytes = 0;
+
+    _tx_xferring_bytes = total_bytes;
+    dma_tx_start(rhport, buffer, total_bytes);
+  }
+
+  return true;
 }
 
 void tcd_int_handler(uint8_t rhport) {
@@ -275,6 +301,8 @@ void tcd_int_handler(uint8_t rhport) {
   // Received full message
   if (sr & UCPD_SR_RXMSGEND) {
     TU_LOG3("RX MSG END\n");
+
+    // stop TX
     dma_stop(rhport, true);
 
     uint8_t result;
@@ -283,7 +311,6 @@ void tcd_int_handler(uint8_t rhport) {
       // response with good crc
       _good_crc.msg_id = ((tusb_pd_header_t const*) _rx_buf)->msg_id;
       dma_tx_start(rhport, &_good_crc, 2);
-      UCPD1->CR |= UCPD_CR_TXSEND;
 
       result = XFER_RESULT_SUCCESS;
     }else {
@@ -305,19 +332,38 @@ void tcd_int_handler(uint8_t rhport) {
   }
 
   //------------- TX -------------//
-  if (sr & UCPD_SR_TXMSGSENT) {
-    TU_LOG3("TX MSG SENT\n");
-    // all byte sent
-    dma_stop(rhport, false);
+  // All tx events: complete and error
+  if (sr & (UCPD_SR_TXMSGSENT | (UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND))) {
+    // force TX stop
+    dma_tx_stop(rhport);
 
-    // ack
-    UCPD1->ICR = UCPD_ICR_TXMSGSENTCF;
-  }
+    uint16_t const xferred_bytes = _tx_xferring_bytes - UCPD1->TX_PAYSZ;
+    uint8_t result;
 
-  if (sr & (UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND)) {
-    TU_LOG3("TX Error\n");
-    dma_stop(rhport, false);
-    UCPD1->ICR = UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND;
+    if ( sr & UCPD_SR_TXMSGSENT ) {
+      TU_LOG3("TX MSG SENT\n");
+      result = XFER_RESULT_SUCCESS;
+      // ack
+      UCPD1->ICR = UCPD_ICR_TXMSGSENTCF;
+    }else {
+      TU_LOG3("TX Error\n");
+      result = XFER_RESULT_FAILED;
+      // ack
+      UCPD1->ICR = UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND;
+    }
+
+    // start pending TX if any
+    if (_tx_pending_buf && _tx_pending_bytes ) {
+      // Start the pending TX
+      dma_tx_start(rhport, _tx_pending_buf, _tx_pending_bytes);
+
+      // clear pending
+      _tx_pending_buf = NULL;
+      _tx_pending_bytes = 0;
+    }
+
+    // notify stack
+    tcd_event_tx_complete(rhport, xferred_bytes, result, true);
   }
 }
 
diff --git a/src/typec/tcd.h b/src/typec/tcd.h
index 41dceaa74..b131d6ba9 100644
--- a/src/typec/tcd.h
+++ b/src/typec/tcd.h
@@ -43,6 +43,7 @@ enum {
   TCD_EVENT_INVALID = 0,
   TCD_EVENT_CC_CHANGED,
   TCD_EVENT_RX_COMPLETE,
+  TCD_EVENT_TX_COMPLETE,
 };
 
 
@@ -84,7 +85,7 @@ void tcd_int_handler(uint8_t rhport);
 //--------------------------------------------------------------------+
 
 bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes);
-bool tcd_tx_start(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes);
+bool tcd_msg_send(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes);
 
 //--------------------------------------------------------------------+
 // Event API (implemented by stack)
@@ -120,4 +121,18 @@ void tcd_event_rx_complete(uint8_t rhport, uint16_t xferred_bytes, uint8_t resul
   tcd_event_handler(&event, in_isr);
 }
 
+TU_ATTR_ALWAYS_INLINE static inline
+void tcd_event_tx_complete(uint8_t rhport, uint16_t xferred_bytes, uint8_t result, bool in_isr) {
+  tcd_event_t event = {
+      .rhport   = rhport,
+      .event_id = TCD_EVENT_TX_COMPLETE,
+      .rx_complete = {
+          .xferred_bytes = xferred_bytes,
+          .result        = result
+      }
+  };
+
+  tcd_event_handler(&event, in_isr);
+}
+
 #endif
diff --git a/src/typec/utcd.c b/src/typec/utcd.c
index abbe8b43e..09031e5c9 100644
--- a/src/typec/utcd.c
+++ b/src/typec/utcd.c
@@ -53,6 +53,7 @@ static bool _port_inited[TUP_TYPEC_RHPORTS_NUM];
 
 // Max possible PD size is 262 bytes
 static uint8_t _rx_buf[262] TU_ATTR_ALIGNED(4);
+static uint8_t _tx_buf[100] TU_ATTR_ALIGNED(4);
 
 //--------------------------------------------------------------------+
 //
@@ -90,6 +91,19 @@ bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type) {
 //
 //--------------------------------------------------------------------+
 
+bool utcd_msg_send(uint8_t rhport, tusb_pd_header_t const* header, void const* data) {
+  // copy header
+  memcpy(_tx_buf, header, sizeof(tusb_pd_header_t));
+
+  // copy data objcet if available
+  uint16_t const n_data_obj = header->n_data_obj;
+  if (n_data_obj > 0) {
+    memcpy(_tx_buf + sizeof(tusb_pd_header_t), data, n_data_obj * 4);
+  }
+
+  return tcd_msg_send(rhport, _tx_buf, sizeof(tusb_pd_header_t) + n_data_obj * 4);
+}
+
 bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) {
   (void) rhport;
   uint8_t const* p_end = buf + len;
@@ -98,10 +112,28 @@ bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) {
 
   if (header->n_data_obj == 0) {
     // control message
+    switch (header->msg_type) {
+      case TUSB_PD_CTRL_GOOD_CRC:
+        break;
+
+      case TUSB_PD_CTRL_ACCEPT:
+        break;
+
+      case TUSB_PD_CTRL_REJECT:
+        break;
+
+      case TUSB_PD_CTRL_PS_RDY:
+        break;
+
+      default: break;
+    }
   } else {
     // data message
     switch (header->msg_type) {
       case TUSB_PD_DATA_SOURCE_CAP: {
+        // Examine source capability and select a suitable PDO (starting from 1 with safe5v)
+        uint8_t obj_pos = 1;
+
         for(size_t i=0; i<header->n_data_obj; i++) {
           TU_VERIFY(ptr < p_end);
           uint32_t const pdo = tu_le32toh(tu_unaligned_read32(ptr));
@@ -125,6 +157,33 @@ bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) {
 
           ptr += 4;
         }
+
+        // Send request with selected PDO position as response to Source Cap
+        pd_rdo_fixed_variable_t rdo = {
+            .current_extremum_10ma = 50, // max 500mA
+            .current_operate_10ma = 30, // 300mA
+            .reserved = 0,
+            .epr_mode_capable = 0,
+            .unchunked_ext_msg_support = 0,
+            .no_usb_suspend = 0,
+            .usb_comm_capable = 1,
+            .capability_mismatch = 0,
+            .give_back_flag = 0, // exteremum is max
+            .object_position = obj_pos,
+        };
+
+        tusb_pd_header_t const req_header = {
+            .msg_type = TUSB_PD_DATA_REQUEST,
+            .data_role = TUSB_PD_DATA_ROLE_UFP,
+            .specs_rev = TUSB_PD_REV20,
+            .power_role = TUSB_PD_POWER_ROLE_SINK,
+            .msg_id = 0,
+            .n_data_obj = 1,
+            .extended = 0,
+        };
+
+        utcd_msg_send(rhport, &req_header, &rdo);
+
         break;
       }
 
diff --git a/src/typec/utcd.h b/src/typec/utcd.h
index dbc909592..bb1523253 100644
--- a/src/typec/utcd.h
+++ b/src/typec/utcd.h
@@ -42,7 +42,7 @@ extern "C" {
 #endif
 
 //--------------------------------------------------------------------+
-//
+// Source Capability
 //--------------------------------------------------------------------+
 
 // All table references are from USBPD Specification rev3.1 version 1.8
@@ -102,6 +102,38 @@ typedef struct TU_ATTR_PACKED {
 } pd_pdo_apdo_t;
 TU_VERIFY_STATIC(sizeof(pd_pdo_apdo_t) == 4, "Invalid size");
 
+//--------------------------------------------------------------------+
+// Request
+//--------------------------------------------------------------------+
+
+typedef struct TU_ATTR_PACKED {
+  uint32_t current_extremum_10ma     : 10; // [9..0] Max (give back = 0) or Min (give back = 1) current in 10mA unit
+  uint32_t current_operate_10ma      : 10; // [19..10] Operating current in 10mA unit
+  uint32_t reserved                  :  2; // [21..20] Reserved
+  uint32_t epr_mode_capable          :  1; // [22] EPR mode capable
+  uint32_t unchunked_ext_msg_support :  1; // [23] UnChunked Extended Message Supported
+  uint32_t no_usb_suspend            :  1; // [24] No USB Suspend
+  uint32_t usb_comm_capable          :  1; // [25] USB Communications Capable
+  uint32_t capability_mismatch       :  1; // [26] Capability Mismatch
+  uint32_t give_back_flag            :  1; // [27] GiveBack Flag: 0 = Max, 1 = Min
+  uint32_t object_position           :  4; // [31..28] Object Position
+} pd_rdo_fixed_variable_t;
+TU_VERIFY_STATIC(sizeof(pd_rdo_fixed_variable_t) == 4, "Invalid size");
+
+typedef struct TU_ATTR_PACKED {
+  uint32_t power_extremum_250mw      : 10; // [9..0] Max (give back = 0) or Min (give back = 1) operating power in 250mW unit
+  uint32_t power_operate_250mw       : 10; // [19..10] Operating power in 250mW unit
+  uint32_t reserved                  :  2; // [21..20] Reserved
+  uint32_t epr_mode_capable          :  1; // [22] EPR mode capable
+  uint32_t unchunked_ext_msg_support :  1; // [23] UnChunked Extended Message Supported
+  uint32_t no_usb_suspend            :  1; // [24] No USB Suspend
+  uint32_t usb_comm_capable          :  1; // [25] USB Communications Capable
+  uint32_t capability_mismatch       :  1; // [26] Capability Mismatch
+  uint32_t give_back_flag            :  1; // [27] GiveBack Flag: 0 = Max, 1 = Min
+  uint32_t object_position           :  4; // [31..28] Object Position
+} pd_rdo_battery_t;
+TU_VERIFY_STATIC(sizeof(pd_rdo_battery_t) == 4, "Invalid size");
+
 //--------------------------------------------------------------------+
 // Application API
 //--------------------------------------------------------------------+

From c28503060c0c3cb09d8e2ce63d1b0009affbdf72 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 12 Jun 2023 14:57:50 +0700
Subject: [PATCH 404/691] ad pd_types.h

---
 src/common/tusb_types.h             |  96 +----------
 src/portable/st/typec/typec_stm32.c |  13 +-
 src/typec/pd_types.h                | 237 ++++++++++++++++++++++++++++
 src/typec/tcd.h                     |  10 +-
 src/typec/utcd.c                    |  38 ++---
 src/typec/utcd.h                    | 101 +-----------
 6 files changed, 278 insertions(+), 217 deletions(-)
 create mode 100644 src/typec/pd_types.h

diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index cad633ee4..fab680989 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -480,6 +480,7 @@ typedef struct TU_ATTR_PACKED
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
+
 typedef struct TU_ATTR_PACKED{
   union {
     struct TU_ATTR_PACKED {
@@ -499,101 +500,6 @@ typedef struct TU_ATTR_PACKED{
 
 TU_VERIFY_STATIC( sizeof(tusb_control_request_t) == 8, "size is not correct");
 
-//--------------------------------------------------------------------+
-// TYPE-C
-//--------------------------------------------------------------------+
-
-typedef enum {
-  TUSB_TYPEC_PORT_SRC,
-  TUSB_TYPEC_PORT_SNK,
-  TUSB_TYPEC_PORT_DRP
-} tusb_typec_port_type_t;
-
-typedef enum {
-  TUSB_PD_CTRL_RESERVED = 0,            // 0b00000: 0
-  TUSB_PD_CTRL_GOOD_CRC,                // 0b00001: 1
-  TUSB_PD_CTRL_GO_TO_MIN,               // 0b00010: 2
-  TUSB_PD_CTRL_ACCEPT,                  // 0b00011: 3
-  TUSB_PD_CTRL_REJECT,                  // 0b00100: 4
-  TUSB_PD_CTRL_PING,                    // 0b00101: 5
-  TUSB_PD_CTRL_PS_RDY,                  // 0b00110: 6
-  TUSB_PD_CTRL_GET_SOURCE_CAP,          // 0b00111: 7
-  TUSB_PD_CTRL_GET_SINK_CAP,            // 0b01000: 8
-  TUSB_PD_CTRL_DR_SWAP,                 // 0b01001: 9
-  TUSB_PD_CTRL_PR_SWAP,                 // 0b01010: 10
-  TUSB_PD_CTRL_VCONN_SWAP,              // 0b01011: 11
-  TUSB_PD_CTRL_WAIT,                    // 0b01100: 12
-  TUSB_PD_CTRL_SOFT_RESET,              // 0b01101: 13
-  TUSB_PD_CTRL_DATA_RESET,              // 0b01110: 14
-  TUSB_PD_CTRL_DATA_RESET_COMPLETE,     // 0b01111: 15
-  TUSB_PD_CTRL_NOT_SUPPORTED,           // 0b10000: 16
-  TUSB_PD_CTRL_GET_SOURCE_CAP_EXTENDED, // 0b10001: 17
-  TUSB_PD_CTRL_GET_STATUS,              // 0b10010: 18
-  TUSB_PD_CTRL_FR_SWAP,                 // 0b10011: 19
-  TUSB_PD_CTRL_GET_PPS_STATUS,          // 0b10100: 20
-  TUSB_PD_CTRL_GET_COUNTRY_CODES,       // 0b10101: 21
-  TUSB_PD_CTRL_GET_SINK_CAP_EXTENDED,   // 0b10110: 22
-  TUSB_PD_CTRL_GET_SOURCE_INFO,         // 0b10111: 23
-  TUSB_PD_CTRL_REVISION,                // 0b11000: 24
-} tusb_pd_ctrl_type_t;
-
-typedef enum {
-  TUSB_PD_DATA_RESERVED = 0,     // 0b00000: 0
-  TUSB_PD_DATA_SOURCE_CAP,       // 0b00001: 1
-  TUSB_PD_DATA_REQUEST,          // 0b00010: 2
-  TUSB_PD_DATA_BIST,             // 0b00011: 3
-  TUSB_PD_DATA_SINK_CAP,         // 0b00100: 4
-  TUSB_PD_DATA_BATTERY_STATUS,   // 0b00101: 5
-  TUSB_PD_DATA_ALERT,            // 0b00110: 6
-  TUSB_PD_DATA_GET_COUNTRY_INFO, // 0b00111: 7
-  TUSB_PD_DATA_ENTER_USB,        // 0b01000: 8
-  TUSB_PD_DATA_EPR_REQUEST,      // 0b01001: 9
-  TUSB_PD_DATA_EPR_MODE,         // 0b01010: 10
-  TUSB_PD_DATA_SRC_INFO,         // 0b01011: 11
-  TUSB_PD_DATA_REVISION,         // 0b01100: 12
-  TUSB_PD_DATA_RESERVED_13,      // 0b01101: 13
-  TUSB_PD_DATA_RESERVED_14,      // 0b01110: 14
-  TUSB_PD_DATA_VENDOR_DEFINED,   // 0b01111: 15
-} tusb_pd_data_type_t;
-
-enum {
-  TUSB_PD_REV10	= 0x0,
-  TUSB_PD_REV20	= 0x1,
-  TUSB_PD_REV30	= 0x2,
-};
-
-enum {
-  TUSB_PD_DATA_ROLE_UFP	= 0x0,
-  TUSB_PD_DATA_ROLE_DFP	= 0x1,
-};
-
-enum {
-  TUSB_PD_POWER_ROLE_SINK	= 0x0,
-  TUSB_PD_POWER_ROLE_SOURCE	= 0x1,
-};
-
-typedef struct TU_ATTR_PACKED {
-  uint16_t msg_type   : 5; // [0:4]
-  uint16_t data_role  : 1; // [5] SOP only: 0 UFP, 1 DFP
-  uint16_t specs_rev  : 2; // [6:7]
-  uint16_t power_role : 1; // [8] SOP only: 0 Sink, 1 Source
-  uint16_t msg_id     : 3; // [9:11]
-  uint16_t n_data_obj : 3; // [12:14]
-  uint16_t extended   : 1; // [15]
-} tusb_pd_header_t;
-
-TU_VERIFY_STATIC( sizeof(tusb_pd_header_t) == 2, "size is not correct");
-
-typedef struct TU_ATTR_PACKED {
-  uint16_t data_size     : 9; // [0:8]
-  uint16_t reserved      : 1; // [9]
-  uint16_t request_chunk : 1; // [10]
-  uint16_t chunk_number  : 4; // [11:14]
-  uint16_t chunked       : 1; // [15]
-} tusb_pd_header_extended_t;
-
-TU_VERIFY_STATIC( sizeof(tusb_pd_header_extended_t) == 2, "size is not correct");
-
 
 TU_ATTR_PACKED_END  // End of all packed definitions
 TU_ATTR_BIT_FIELD_ORDER_END
diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c
index 9b3b21707..b09dc5bae 100644
--- a/src/portable/st/typec/typec_stm32.c
+++ b/src/portable/st/typec/typec_stm32.c
@@ -67,10 +67,10 @@ static uint8_t const* _tx_pending_buf;
 static uint16_t _tx_pending_bytes;
 static uint16_t _tx_xferring_bytes;
 
-static tusb_pd_header_t _good_crc = {
-    .msg_type   = TUSB_PD_CTRL_GOOD_CRC,
+static pd_header_t _good_crc = {
+    .msg_type   = PD_CTRL_GOOD_CRC,
     .data_role  = 0, // UFP
-    .specs_rev  = TUSB_PD_REV20,
+    .specs_rev  = PD_REV_20,
     .power_role = 0, // Sink
     .msg_id     = 0,
     .n_data_obj = 0,
@@ -149,7 +149,6 @@ TU_ATTR_ALWAYS_INLINE static inline bool dma_enabled(uint8_t rhport, bool is_rx)
   return dma_ch->CCR & DMA_CCR_EN;
 }
 
-
 TU_ATTR_ALWAYS_INLINE static inline void dma_tx_start(uint8_t rhport, void const* buf, uint16_t len) {
   UCPD1->TX_ORDSET = PHY_ORDERED_SET_SOP;
   UCPD1->TX_PAYSZ = len;
@@ -165,7 +164,7 @@ TU_ATTR_ALWAYS_INLINE static inline void dma_tx_stop(uint8_t rhport) {
 //
 //--------------------------------------------------------------------+
 
-bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type) {
+bool tcd_init(uint8_t rhport, uint32_t port_type) {
   (void) rhport;
 
   // Init DMA for RX, TX
@@ -211,7 +210,7 @@ void tcd_int_disable(uint8_t rhport) {
   NVIC_DisableIRQ(UCPD1_IRQn);
 }
 
-bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes) {
+bool tcd_msg_receive(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes) {
   _rx_buf = buffer;
   dma_start(rhport, true, buffer, total_bytes);
   return true;
@@ -309,7 +308,7 @@ void tcd_int_handler(uint8_t rhport) {
 
     if (!(sr & UCPD_SR_RXERR)) {
       // response with good crc
-      _good_crc.msg_id = ((tusb_pd_header_t const*) _rx_buf)->msg_id;
+      _good_crc.msg_id = ((pd_header_t const*) _rx_buf)->msg_id;
       dma_tx_start(rhport, &_good_crc, 2);
 
       result = XFER_RESULT_SUCCESS;
diff --git a/src/typec/pd_types.h b/src/typec/pd_types.h
new file mode 100644
index 000000000..1b2968f65
--- /dev/null
+++ b/src/typec/pd_types.h
@@ -0,0 +1,237 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _TUSB_PD_TYPES_H_
+#define _TUSB_PD_TYPES_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "common/tusb_compiler.h"
+
+// Start of all packed definitions for compiler without per-type packed
+TU_ATTR_PACKED_BEGIN
+TU_ATTR_BIT_FIELD_ORDER_BEGIN
+
+//--------------------------------------------------------------------+
+// TYPE-C
+//--------------------------------------------------------------------+
+
+typedef enum {
+  TUSB_TYPEC_PORT_SRC,
+  TUSB_TYPEC_PORT_SNK,
+  TUSB_TYPEC_PORT_DRP
+} tusb_typec_port_type_t;
+
+enum {
+  PD_CTRL_RESERVED = 0,            // 0b00000: 0
+  PD_CTRL_GOOD_CRC,                // 0b00001: 1
+  PD_CTRL_GO_TO_MIN,               // 0b00010: 2
+  PD_CTRL_ACCEPT,                  // 0b00011: 3
+  PD_CTRL_REJECT,                  // 0b00100: 4
+  PD_CTRL_PING,                    // 0b00101: 5
+  PD_CTRL_PS_READY,                // 0b00110: 6
+  PD_CTRL_GET_SOURCE_CAP,          // 0b00111: 7
+  PD_CTRL_GET_SINK_CAP,            // 0b01000: 8
+  PD_CTRL_DR_SWAP,                 // 0b01001: 9
+  PD_CTRL_PR_SWAP,                 // 0b01010: 10
+  PD_CTRL_VCONN_SWAP,              // 0b01011: 11
+  PD_CTRL_WAIT,                    // 0b01100: 12
+  PD_CTRL_SOFT_RESET,              // 0b01101: 13
+  PD_CTRL_DATA_RESET,              // 0b01110: 14
+  PD_CTRL_DATA_RESET_COMPLETE,     // 0b01111: 15
+  PD_CTRL_NOT_SUPPORTED,           // 0b10000: 16
+  PD_CTRL_GET_SOURCE_CAP_EXTENDED, // 0b10001: 17
+  PD_CTRL_GET_STATUS,              // 0b10010: 18
+  PD_CTRL_FR_SWAP,                 // 0b10011: 19
+  PD_CTRL_GET_PPS_STATUS,          // 0b10100: 20
+  PD_CTRL_GET_COUNTRY_CODES,       // 0b10101: 21
+  PD_CTRL_GET_SINK_CAP_EXTENDED,   // 0b10110: 22
+  PD_CTRL_GET_SOURCE_INFO,         // 0b10111: 23
+  PD_CTRL_REVISION,                // 0b11000: 24
+};
+
+enum {
+  PD_DATA_RESERVED = 0,     // 0b00000: 0
+  PD_DATA_SOURCE_CAP,       // 0b00001: 1
+  PD_DATA_REQUEST,          // 0b00010: 2
+  PD_DATA_BIST,             // 0b00011: 3
+  PD_DATA_SINK_CAP,         // 0b00100: 4
+  PD_DATA_BATTERY_STATUS,   // 0b00101: 5
+  PD_DATA_ALERT,            // 0b00110: 6
+  PD_DATA_GET_COUNTRY_INFO, // 0b00111: 7
+  PD_DATA_ENTER_USB,        // 0b01000: 8
+  PD_DATA_EPR_REQUEST,      // 0b01001: 9
+  PD_DATA_EPR_MODE,         // 0b01010: 10
+  PD_DATA_SRC_INFO,         // 0b01011: 11
+  PD_DATA_REVISION,         // 0b01100: 12
+  PD_DATA_RESERVED_13,      // 0b01101: 13
+  PD_DATA_RESERVED_14,      // 0b01110: 14
+  PD_DATA_VENDOR_DEFINED,   // 0b01111: 15
+};
+
+enum {
+  PD_REV_10	= 0x0,
+  PD_REV_20	= 0x1,
+  PD_REV_30	= 0x2,
+};
+
+enum {
+  PD_DATA_ROLE_UFP	= 0x0,
+  PD_DATA_ROLE_DFP	= 0x1,
+};
+
+enum {
+  PD_POWER_ROLE_SINK	= 0x0,
+  PD_POWER_ROLE_SOURCE	= 0x1,
+};
+
+typedef struct TU_ATTR_PACKED {
+  uint16_t msg_type   : 5; // [0:4]
+  uint16_t data_role  : 1; // [5] SOP only: 0 UFP, 1 DFP
+  uint16_t specs_rev  : 2; // [6:7]
+  uint16_t power_role : 1; // [8] SOP only: 0 Sink, 1 Source
+  uint16_t msg_id     : 3; // [9:11]
+  uint16_t n_data_obj : 3; // [12:14]
+  uint16_t extended   : 1; // [15]
+} pd_header_t;
+TU_VERIFY_STATIC(sizeof(pd_header_t) == 2, "size is not correct");
+
+typedef struct TU_ATTR_PACKED {
+  uint16_t data_size     : 9; // [0:8]
+  uint16_t reserved      : 1; // [9]
+  uint16_t request_chunk : 1; // [10]
+  uint16_t chunk_number  : 4; // [11:14]
+  uint16_t chunked       : 1; // [15]
+} pd_header_extended_t;
+TU_VERIFY_STATIC(sizeof(pd_header_extended_t) == 2, "size is not correct");
+
+//--------------------------------------------------------------------+
+// Source Capability
+//--------------------------------------------------------------------+
+
+// All table references are from USBPD Specification rev3.1 version 1.8
+enum {
+  PD_PDO_TYPE_FIXED = 0, // Vmin = Vmax
+  PD_PDO_TYPE_BATTERY,
+  PD_PDO_TYPE_VARIABLE, // non-battery
+  PD_PDO_TYPE_APDO, // Augmented Power Data Object
+};
+
+// Fixed Power Data Object (PDO) table 6-9
+typedef struct TU_ATTR_PACKED {
+  uint32_t current_max_10ma          : 10; // [9..0] Max current in 10mA unit
+  uint32_t voltage_50mv              : 10; // [19..10] Voltage in 50mV unit
+  uint32_t current_peak              :  2; // [21..20] Peak current
+  uint32_t reserved                  :  1; // [22] Reserved
+  uint32_t epr_mode_capable          :  1; // [23] epr_mode_capable
+  uint32_t unchunked_ext_msg_support :  1; // [24] UnChunked Extended Message Supported
+  uint32_t dual_role_data            :  1; // [25] Dual Role Data
+  uint32_t usb_comm_capable          :  1; // [26] USB Communications Capable
+  uint32_t unconstrained_power       :  1; // [27] Unconstrained Power
+  uint32_t usb_suspend_supported     :  1; // [28] USB Suspend Supported
+  uint32_t dual_role_power           :  1; // [29] Dual Role Power
+  uint32_t type                      :  2; // [30] Fixed Supply type = PD_PDO_TYPE_FIXED
+} pd_pdo_fixed_t;
+TU_VERIFY_STATIC(sizeof(pd_pdo_fixed_t) == 4, "Invalid size");
+
+// Battery Power Data Object (PDO) table 6-12
+typedef struct TU_ATTR_PACKED {
+  uint32_t power_max_250mw   : 10; // [9..0] Max allowable power in 250mW unit
+  uint32_t voltage_min_50mv  : 10; // [19..10] Minimum voltage in 50mV unit
+  uint32_t voltage_max_50mv  : 10; // [29..20] Maximum voltage in 50mV unit
+  uint32_t type              :  2; // [31..30] Battery type = PD_PDO_TYPE_BATTERY
+} pd_pdo_battery_t;
+TU_VERIFY_STATIC(sizeof(pd_pdo_battery_t) == 4, "Invalid size");
+
+// Variable Power Data Object (PDO) table 6-11
+typedef struct TU_ATTR_PACKED {
+  uint32_t current_max_10ma  : 10; // [9..0] Max current in 10mA unit
+  uint32_t voltage_min_50mv  : 10; // [19..10] Minimum voltage in 50mV unit
+  uint32_t voltage_max_50mv  : 10; // [29..20] Maximum voltage in 50mV unit
+  uint32_t type              :  2; // [31..30] Variable Supply type = PD_PDO_TYPE_VARIABLE
+} pd_pdo_variable_t;
+TU_VERIFY_STATIC(sizeof(pd_pdo_variable_t) == 4, "Invalid size");
+
+// Augmented Power Data Object (PDO) table 6-13
+typedef struct TU_ATTR_PACKED {
+  uint32_t current_max_50ma  :  7; // [6..0] Max current in 50mA unit
+  uint32_t reserved1         :  1; // [7] Reserved
+  uint32_t voltage_min_100mv :  8; // [15..8] Minimum Voltage in 100mV unit
+  uint32_t reserved2         :  1; // [16] Reserved
+  uint32_t voltage_max_100mv :  8; // [24..17] Maximum Voltage in 100mV unit
+  uint32_t reserved3         :  2; // [26..25] Reserved
+  uint32_t pps_power_limited :  1; // [27] PPS Power Limited
+  uint32_t spr_programmable  :  2; // [29..28] SPR Programmable Power Supply
+  uint32_t type              :  2; // [31..30] Augmented Power Data Object = PD_PDO_TYPE_APDO
+} pd_pdo_apdo_t;
+TU_VERIFY_STATIC(sizeof(pd_pdo_apdo_t) == 4, "Invalid size");
+
+//--------------------------------------------------------------------+
+// Request
+//--------------------------------------------------------------------+
+
+typedef struct TU_ATTR_PACKED {
+  uint32_t current_extremum_10ma     : 10; // [9..0] Max (give back = 0) or Min (give back = 1) current in 10mA unit
+  uint32_t current_operate_10ma      : 10; // [19..10] Operating current in 10mA unit
+  uint32_t reserved                  :  2; // [21..20] Reserved
+  uint32_t epr_mode_capable          :  1; // [22] EPR mode capable
+  uint32_t unchunked_ext_msg_support :  1; // [23] UnChunked Extended Message Supported
+  uint32_t no_usb_suspend            :  1; // [24] No USB Suspend
+  uint32_t usb_comm_capable          :  1; // [25] USB Communications Capable
+  uint32_t capability_mismatch       :  1; // [26] Capability Mismatch
+  uint32_t give_back_flag            :  1; // [27] GiveBack Flag: 0 = Max, 1 = Min
+  uint32_t object_position           :  4; // [31..28] Object Position
+} pd_rdo_fixed_variable_t;
+TU_VERIFY_STATIC(sizeof(pd_rdo_fixed_variable_t) == 4, "Invalid size");
+
+typedef struct TU_ATTR_PACKED {
+  uint32_t power_extremum_250mw      : 10; // [9..0] Max (give back = 0) or Min (give back = 1) operating power in 250mW unit
+  uint32_t power_operate_250mw       : 10; // [19..10] Operating power in 250mW unit
+  uint32_t reserved                  :  2; // [21..20] Reserved
+  uint32_t epr_mode_capable          :  1; // [22] EPR mode capable
+  uint32_t unchunked_ext_msg_support :  1; // [23] UnChunked Extended Message Supported
+  uint32_t no_usb_suspend            :  1; // [24] No USB Suspend
+  uint32_t usb_comm_capable          :  1; // [25] USB Communications Capable
+  uint32_t capability_mismatch       :  1; // [26] Capability Mismatch
+  uint32_t give_back_flag            :  1; // [27] GiveBack Flag: 0 = Max, 1 = Min
+  uint32_t object_position           :  4; // [31..28] Object Position
+} pd_rdo_battery_t;
+TU_VERIFY_STATIC(sizeof(pd_rdo_battery_t) == 4, "Invalid size");
+
+
+TU_ATTR_PACKED_END  // End of all packed definitions
+TU_ATTR_BIT_FIELD_ORDER_END
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/typec/tcd.h b/src/typec/tcd.h
index b131d6ba9..ee73943bd 100644
--- a/src/typec/tcd.h
+++ b/src/typec/tcd.h
@@ -28,6 +28,8 @@
 #define _TUSB_TCD_H_
 
 #include "common/tusb_common.h"
+#include "pd_types.h"
+
 #include "osal/osal.h"
 #include "common/tusb_fifo.h"
 
@@ -69,7 +71,7 @@ typedef struct {
 //--------------------------------------------------------------------+
 
 // Initialize controller
-bool tcd_init(uint8_t rhport, tusb_typec_port_type_t port_type);
+bool tcd_init(uint8_t rhport, uint32_t port_type);
 
 // Enable interrupt
 void tcd_int_enable (uint8_t rhport);
@@ -84,7 +86,7 @@ void tcd_int_handler(uint8_t rhport);
 //
 //--------------------------------------------------------------------+
 
-bool tcd_rx_start(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes);
+bool tcd_msg_receive(uint8_t rhport, uint8_t* buffer, uint16_t total_bytes);
 bool tcd_msg_send(uint8_t rhport, uint8_t const* buffer, uint16_t total_bytes);
 
 //--------------------------------------------------------------------+
@@ -135,4 +137,8 @@ void tcd_event_tx_complete(uint8_t rhport, uint16_t xferred_bytes, uint8_t resul
   tcd_event_handler(&event, in_isr);
 }
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif
diff --git a/src/typec/utcd.c b/src/typec/utcd.c
index 09031e5c9..439fe89b9 100644
--- a/src/typec/utcd.c
+++ b/src/typec/utcd.c
@@ -62,7 +62,7 @@ bool tuc_inited(uint8_t rhport) {
   return _utcd_inited && _port_inited[rhport];
 }
 
-bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type) {
+bool tuc_init(uint8_t rhport, uint32_t port_type) {
   // Initialize stack
   if (!_utcd_inited) {
     tu_memclr(_port_inited, sizeof(_port_inited));
@@ -91,38 +91,38 @@ bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type) {
 //
 //--------------------------------------------------------------------+
 
-bool utcd_msg_send(uint8_t rhport, tusb_pd_header_t const* header, void const* data) {
+bool utcd_msg_send(uint8_t rhport, pd_header_t const* header, void const* data) {
   // copy header
-  memcpy(_tx_buf, header, sizeof(tusb_pd_header_t));
+  memcpy(_tx_buf, header, sizeof(pd_header_t));
 
   // copy data objcet if available
   uint16_t const n_data_obj = header->n_data_obj;
   if (n_data_obj > 0) {
-    memcpy(_tx_buf + sizeof(tusb_pd_header_t), data, n_data_obj * 4);
+    memcpy(_tx_buf + sizeof(pd_header_t), data, n_data_obj * 4);
   }
 
-  return tcd_msg_send(rhport, _tx_buf, sizeof(tusb_pd_header_t) + n_data_obj * 4);
+  return tcd_msg_send(rhport, _tx_buf, sizeof(pd_header_t) + n_data_obj * 4);
 }
 
 bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) {
   (void) rhport;
   uint8_t const* p_end = buf + len;
-  tusb_pd_header_t const* header = (tusb_pd_header_t const*) buf;
-  uint8_t const * ptr = buf + sizeof(tusb_pd_header_t);
+  pd_header_t const* header = (pd_header_t const*) buf;
+  uint8_t const * ptr = buf + sizeof(pd_header_t);
 
   if (header->n_data_obj == 0) {
     // control message
     switch (header->msg_type) {
-      case TUSB_PD_CTRL_GOOD_CRC:
+      case PD_CTRL_GOOD_CRC:
         break;
 
-      case TUSB_PD_CTRL_ACCEPT:
+      case PD_CTRL_ACCEPT:
         break;
 
-      case TUSB_PD_CTRL_REJECT:
+      case PD_CTRL_REJECT:
         break;
 
-      case TUSB_PD_CTRL_PS_RDY:
+      case PD_CTRL_PS_READY:
         break;
 
       default: break;
@@ -130,7 +130,7 @@ bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) {
   } else {
     // data message
     switch (header->msg_type) {
-      case TUSB_PD_DATA_SOURCE_CAP: {
+      case PD_DATA_SOURCE_CAP: {
         // Examine source capability and select a suitable PDO (starting from 1 with safe5v)
         uint8_t obj_pos = 1;
 
@@ -172,11 +172,11 @@ bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) {
             .object_position = obj_pos,
         };
 
-        tusb_pd_header_t const req_header = {
-            .msg_type = TUSB_PD_DATA_REQUEST,
-            .data_role = TUSB_PD_DATA_ROLE_UFP,
-            .specs_rev = TUSB_PD_REV20,
-            .power_role = TUSB_PD_POWER_ROLE_SINK,
+        pd_header_t const req_header = {
+            .msg_type = PD_DATA_REQUEST,
+            .data_role = PD_DATA_ROLE_UFP,
+            .specs_rev = PD_REV_20,
+            .power_role = PD_POWER_ROLE_SINK,
             .msg_id = 0,
             .n_data_obj = 1,
             .extended = 0,
@@ -200,7 +200,7 @@ void tcd_event_handler(tcd_event_t const * event, bool in_isr) {
     case TCD_EVENT_CC_CHANGED:
       if (event->cc_changed.cc_state[0] || event->cc_changed.cc_state[1]) {
         // Attach
-        tcd_rx_start(event->rhport, _rx_buf, sizeof(_rx_buf));
+        tcd_msg_receive(event->rhport, _rx_buf, sizeof(_rx_buf));
       }else {
         // Detach
       }
@@ -213,7 +213,7 @@ void tcd_event_handler(tcd_event_t const * event, bool in_isr) {
       }
 
       // start new rx
-      tcd_rx_start(event->rhport, _rx_buf, sizeof(_rx_buf));
+      tcd_msg_receive(event->rhport, _rx_buf, sizeof(_rx_buf));
       break;
 
     default: break;
diff --git a/src/typec/utcd.h b/src/typec/utcd.h
index bb1523253..740e477ac 100644
--- a/src/typec/utcd.h
+++ b/src/typec/utcd.h
@@ -28,6 +28,7 @@
 #define _TUSB_UTCD_H_
 
 #include "common/tusb_common.h"
+#include "pd_types.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -41,105 +42,12 @@ extern "C" {
 #define CFG_TUC_TASK_QUEUE_SZ   8
 #endif
 
-//--------------------------------------------------------------------+
-// Source Capability
-//--------------------------------------------------------------------+
-
-// All table references are from USBPD Specification rev3.1 version 1.8
-enum {
-  PD_PDO_TYPE_FIXED = 0, // Vmin = Vmax
-  PD_PDO_TYPE_BATTERY,
-  PD_PDO_TYPE_VARIABLE, // non-battery
-  PD_PDO_TYPE_APDO, // Augmented Power Data Object
-};
-
-// Fixed Power Data Object (PDO) table 6-9
-typedef struct TU_ATTR_PACKED {
-  uint32_t current_max_10ma          : 10; // [9..0] Max current in 10mA unit
-  uint32_t voltage_50mv              : 10; // [19..10] Voltage in 50mV unit
-  uint32_t current_peak              :  2; // [21..20] Peak current
-  uint32_t reserved                  :  1; // [22] Reserved
-  uint32_t epr_mode_capable          :  1; // [23] epr_mode_capable
-  uint32_t unchunked_ext_msg_support :  1; // [24] UnChunked Extended Message Supported
-  uint32_t dual_role_data            :  1; // [25] Dual Role Data
-  uint32_t usb_comm_capable          :  1; // [26] USB Communications Capable
-  uint32_t unconstrained_power       :  1; // [27] Unconstrained Power
-  uint32_t usb_suspend_supported     :  1; // [28] USB Suspend Supported
-  uint32_t dual_role_power           :  1; // [29] Dual Role Power
-  uint32_t type                      :  2; // [30] Fixed Supply type = PD_PDO_TYPE_FIXED
-} pd_pdo_fixed_t;
-TU_VERIFY_STATIC(sizeof(pd_pdo_fixed_t) == 4, "Invalid size");
-
-// Battery Power Data Object (PDO) table 6-12
-typedef struct TU_ATTR_PACKED {
-  uint32_t power_max_250mw   : 10; // [9..0] Max allowable power in 250mW unit
-  uint32_t voltage_min_50mv  : 10; // [19..10] Minimum voltage in 50mV unit
-  uint32_t voltage_max_50mv  : 10; // [29..20] Maximum voltage in 50mV unit
-  uint32_t type              :  2; // [31..30] Battery type = PD_PDO_TYPE_BATTERY
-} pd_pdo_battery_t;
-TU_VERIFY_STATIC(sizeof(pd_pdo_battery_t) == 4, "Invalid size");
-
-// Variable Power Data Object (PDO) table 6-11
-typedef struct TU_ATTR_PACKED {
-  uint32_t current_max_10ma  : 10; // [9..0] Max current in 10mA unit
-  uint32_t voltage_min_50mv  : 10; // [19..10] Minimum voltage in 50mV unit
-  uint32_t voltage_max_50mv  : 10; // [29..20] Maximum voltage in 50mV unit
-  uint32_t type              :  2; // [31..30] Variable Supply type = PD_PDO_TYPE_VARIABLE
-} pd_pdo_variable_t;
-TU_VERIFY_STATIC(sizeof(pd_pdo_variable_t) == 4, "Invalid size");
-
-// Augmented Power Data Object (PDO) table 6-13
-typedef struct TU_ATTR_PACKED {
-  uint32_t current_max_50ma  :  7; // [6..0] Max current in 50mA unit
-  uint32_t reserved1         :  1; // [7] Reserved
-  uint32_t voltage_min_100mv :  8; // [15..8] Minimum Voltage in 100mV unit
-  uint32_t reserved2         :  1; // [16] Reserved
-  uint32_t voltage_max_100mv :  8; // [24..17] Maximum Voltage in 100mV unit
-  uint32_t reserved3         :  2; // [26..25] Reserved
-  uint32_t pps_power_limited :  1; // [27] PPS Power Limited
-  uint32_t spr_programmable  :  2; // [29..28] SPR Programmable Power Supply
-  uint32_t type              :  2; // [31..30] Augmented Power Data Object = PD_PDO_TYPE_APDO
-} pd_pdo_apdo_t;
-TU_VERIFY_STATIC(sizeof(pd_pdo_apdo_t) == 4, "Invalid size");
-
-//--------------------------------------------------------------------+
-// Request
-//--------------------------------------------------------------------+
-
-typedef struct TU_ATTR_PACKED {
-  uint32_t current_extremum_10ma     : 10; // [9..0] Max (give back = 0) or Min (give back = 1) current in 10mA unit
-  uint32_t current_operate_10ma      : 10; // [19..10] Operating current in 10mA unit
-  uint32_t reserved                  :  2; // [21..20] Reserved
-  uint32_t epr_mode_capable          :  1; // [22] EPR mode capable
-  uint32_t unchunked_ext_msg_support :  1; // [23] UnChunked Extended Message Supported
-  uint32_t no_usb_suspend            :  1; // [24] No USB Suspend
-  uint32_t usb_comm_capable          :  1; // [25] USB Communications Capable
-  uint32_t capability_mismatch       :  1; // [26] Capability Mismatch
-  uint32_t give_back_flag            :  1; // [27] GiveBack Flag: 0 = Max, 1 = Min
-  uint32_t object_position           :  4; // [31..28] Object Position
-} pd_rdo_fixed_variable_t;
-TU_VERIFY_STATIC(sizeof(pd_rdo_fixed_variable_t) == 4, "Invalid size");
-
-typedef struct TU_ATTR_PACKED {
-  uint32_t power_extremum_250mw      : 10; // [9..0] Max (give back = 0) or Min (give back = 1) operating power in 250mW unit
-  uint32_t power_operate_250mw       : 10; // [19..10] Operating power in 250mW unit
-  uint32_t reserved                  :  2; // [21..20] Reserved
-  uint32_t epr_mode_capable          :  1; // [22] EPR mode capable
-  uint32_t unchunked_ext_msg_support :  1; // [23] UnChunked Extended Message Supported
-  uint32_t no_usb_suspend            :  1; // [24] No USB Suspend
-  uint32_t usb_comm_capable          :  1; // [25] USB Communications Capable
-  uint32_t capability_mismatch       :  1; // [26] Capability Mismatch
-  uint32_t give_back_flag            :  1; // [27] GiveBack Flag: 0 = Max, 1 = Min
-  uint32_t object_position           :  4; // [31..28] Object Position
-} pd_rdo_battery_t;
-TU_VERIFY_STATIC(sizeof(pd_rdo_battery_t) == 4, "Invalid size");
-
 //--------------------------------------------------------------------+
 // Application API
 //--------------------------------------------------------------------+
 
 // Init typec stack on a port
-bool tuc_init(uint8_t rhport, tusb_typec_port_type_t port_type);
+bool tuc_init(uint8_t rhport, uint32_t port_type);
 
 // Check if typec port is initialized
 bool tuc_inited(uint8_t rhport);
@@ -155,4 +63,9 @@ extern void tcd_int_handler(uint8_t rhport);
 //
 //--------------------------------------------------------------------+
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif

From 6941a5af81b53cd0df52632d403cccdb7d22cf30 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 12 Jun 2023 16:42:27 +0700
Subject: [PATCH 405/691] wrap up initial PD support for G4

---
 examples/typec/power_delivery/src/main.c |  90 +++++++++++-
 src/typec/tcd.h                          |  15 +-
 src/typec/utcd.c                         | 180 ++++++++++-------------
 src/typec/utcd.h                         |  20 +++
 4 files changed, 196 insertions(+), 109 deletions(-)

diff --git a/examples/typec/power_delivery/src/main.c b/examples/typec/power_delivery/src/main.c
index 648345a55..42665ed1b 100644
--- a/examples/typec/power_delivery/src/main.c
+++ b/examples/typec/power_delivery/src/main.c
@@ -62,7 +62,8 @@ int main(void)
   while (1) {
     led_blinking_task();
 
-//    tuc_task();
+    // tinyusb typec task
+    tuc_task();
   }
 }
 
@@ -73,6 +74,93 @@ void app_main(void)
 }
 #endif
 
+//--------------------------------------------------------------------+
+// TypeC PD callbacks
+//--------------------------------------------------------------------+
+
+bool tuc_pd_data_received_cb(uint8_t rhport, pd_header_t const* header, uint8_t const* dobj, uint8_t const* p_end) {
+  switch (header->msg_type) {
+    case PD_DATA_SOURCE_CAP: {
+      printf("PD Source Capabilities\r\n");
+      // Examine source capability and select a suitable PDO (starting from 1 with safe5v)
+      uint8_t obj_pos = 1;
+
+      for(size_t i=0; i<header->n_data_obj; i++) {
+        TU_VERIFY(dobj < p_end);
+        uint32_t const pdo = tu_le32toh(tu_unaligned_read32(dobj));
+
+        switch ((pdo >> 30) & 0x03ul) {
+          case PD_PDO_TYPE_FIXED: {
+            pd_pdo_fixed_t const* fixed = (pd_pdo_fixed_t const*) &pdo;
+            printf("[Fixed] %u mV %u mA\r\n", fixed->voltage_50mv*50, fixed->current_max_10ma*10);
+            break;
+          }
+
+          case PD_PDO_TYPE_BATTERY:
+            break;
+
+          case PD_PDO_TYPE_VARIABLE:
+            break;
+
+          case PD_PDO_TYPE_APDO:
+            break;
+        }
+
+        dobj += 4;
+      }
+
+      //------------- Response with selected PDO -------------//
+      // Be careful and make sure your board can withstand the selected PDO voltage other than safe5v e.g 12v or 20v
+
+      // Send request with selected PDO position as response to Source Cap
+      pd_rdo_fixed_variable_t rdo = {
+          .current_extremum_10ma = 50, // max 500mA
+          .current_operate_10ma = 30, // 300mA
+          .reserved = 0,
+          .epr_mode_capable = 0,
+          .unchunked_ext_msg_support = 0,
+          .no_usb_suspend = 0,
+          .usb_comm_capable = 1,
+          .capability_mismatch = 0,
+          .give_back_flag = 0, // exteremum is max
+          .object_position = obj_pos,
+      };
+
+      tuc_msg_request(rhport, &rdo);
+
+      break;
+    }
+
+    default: break;
+  }
+
+  return true;
+}
+
+bool tuc_pd_control_received_cb(uint8_t rhport, pd_header_t const* header) {
+  switch (header->msg_type) {
+    case PD_CTRL_ACCEPT:
+      printf("PD Request Accepted\r\n");
+      // preparing for power transition
+      break;
+
+    case PD_CTRL_REJECT:
+      printf("PD Request Rejected\r\n");
+      // try to negotiate further power
+      break;
+
+    case PD_CTRL_PS_READY:
+      printf("PD Power Ready\r\n");
+      // Source is ready to supply power
+      break;
+
+    default:
+      break;
+  }
+
+  return true;
+}
+
 //--------------------------------------------------------------------+
 // BLINKING TASK
 //--------------------------------------------------------------------+
diff --git a/src/typec/tcd.h b/src/typec/tcd.h
index ee73943bd..86499c951 100644
--- a/src/typec/tcd.h
+++ b/src/typec/tcd.h
@@ -48,8 +48,7 @@ enum {
   TCD_EVENT_TX_COMPLETE,
 };
 
-
-typedef struct {
+typedef struct TU_ATTR_PACKED {
   uint8_t rhport;
   uint8_t event_id;
 
@@ -58,10 +57,10 @@ typedef struct {
       uint8_t cc_state[2];
     } cc_changed;
 
-    struct {
-      uint16_t xferred_bytes;
-      uint8_t result;
-    } rx_complete;
+    struct TU_ATTR_PACKED {
+      uint16_t result : 2;
+      uint16_t xferred_bytes : 14;
+    } xfer_complete;
   };
 
 } tcd_event_t;;
@@ -114,7 +113,7 @@ void tcd_event_rx_complete(uint8_t rhport, uint16_t xferred_bytes, uint8_t resul
   tcd_event_t event = {
     .rhport   = rhport,
     .event_id = TCD_EVENT_RX_COMPLETE,
-    .rx_complete = {
+    .xfer_complete = {
         .xferred_bytes = xferred_bytes,
         .result        = result
     }
@@ -128,7 +127,7 @@ void tcd_event_tx_complete(uint8_t rhport, uint16_t xferred_bytes, uint8_t resul
   tcd_event_t event = {
       .rhport   = rhport,
       .event_id = TCD_EVENT_TX_COMPLETE,
-      .rx_complete = {
+      .xfer_complete = {
           .xferred_bytes = xferred_bytes,
           .result        = result
       }
diff --git a/src/typec/utcd.c b/src/typec/utcd.c
index 439fe89b9..831df1fe8 100644
--- a/src/typec/utcd.c
+++ b/src/typec/utcd.c
@@ -52,8 +52,12 @@ static bool _utcd_inited = false;
 static bool _port_inited[TUP_TYPEC_RHPORTS_NUM];
 
 // Max possible PD size is 262 bytes
-static uint8_t _rx_buf[262] TU_ATTR_ALIGNED(4);
-static uint8_t _tx_buf[100] TU_ATTR_ALIGNED(4);
+static uint8_t _rx_buf[64] TU_ATTR_ALIGNED(4);
+static uint8_t _tx_buf[64] TU_ATTR_ALIGNED(4);
+
+bool utcd_msg_send(uint8_t rhport, pd_header_t const* header, void const* data);
+bool parse_msg_data(uint8_t rhport, pd_header_t const* header, uint8_t const* dobj, uint8_t const* p_end);
+bool parse_msg_control(uint8_t rhport, pd_header_t const* header);
 
 //--------------------------------------------------------------------+
 //
@@ -79,6 +83,7 @@ bool tuc_init(uint8_t rhport, uint32_t port_type) {
   }
 
   TU_LOG_UTCD("UTCD init on port %u\r\n", rhport);
+  TU_LOG_INT(UTCD_DEBUG, sizeof(tcd_event_t));
 
   TU_ASSERT(tcd_init(rhport, port_type));
   tcd_int_enable(rhport);
@@ -87,6 +92,65 @@ bool tuc_init(uint8_t rhport, uint32_t port_type) {
   return true;
 }
 
+void tuc_task_ext(uint32_t timeout_ms, bool in_isr) {
+  (void) in_isr; // not implemented yet
+
+  // Skip if stack is not initialized
+  if (!_utcd_inited) return;
+
+  // Loop until there is no more events in the queue
+  while (1) {
+    tcd_event_t event;
+    if (!osal_queue_receive(_utcd_q, &event, timeout_ms)) return;
+
+    switch (event.event_id) {
+      case TCD_EVENT_CC_CHANGED:
+        break;
+
+      case TCD_EVENT_RX_COMPLETE:
+        // TODO process message here in ISR, move to thread later
+        if (event.xfer_complete.result == XFER_RESULT_SUCCESS) {
+          pd_header_t const* header = (pd_header_t const*) _rx_buf;
+
+          if (header->n_data_obj == 0) {
+            parse_msg_control(event.rhport, header);
+
+          }else {
+            uint8_t const* p_end = _rx_buf + event.xfer_complete.xferred_bytes;
+            uint8_t const * dobj = _rx_buf + sizeof(pd_header_t);
+
+            parse_msg_data(event.rhport, header, dobj, p_end);
+          }
+        }
+
+        // prepare for next message
+        tcd_msg_receive(event.rhport, _rx_buf, sizeof(_rx_buf));
+        break;
+
+      case TCD_EVENT_TX_COMPLETE:
+        break;
+
+      default: break;
+    }
+  }
+}
+
+bool parse_msg_data(uint8_t rhport, pd_header_t const* header, uint8_t const* dobj, uint8_t const* p_end) {
+  if (tuc_pd_data_received_cb) {
+    tuc_pd_data_received_cb(rhport, header, dobj, p_end);
+  }
+
+  return true;
+}
+
+bool parse_msg_control(uint8_t rhport, pd_header_t const* header) {
+  if (tuc_pd_control_received_cb) {
+    tuc_pd_control_received_cb(rhport, header);
+  }
+
+  return true;
+}
+
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
@@ -104,94 +168,18 @@ bool utcd_msg_send(uint8_t rhport, pd_header_t const* header, void const* data)
   return tcd_msg_send(rhport, _tx_buf, sizeof(pd_header_t) + n_data_obj * 4);
 }
 
-bool parse_message(uint8_t rhport, uint8_t const* buf, uint16_t len) {
-  (void) rhport;
-  uint8_t const* p_end = buf + len;
-  pd_header_t const* header = (pd_header_t const*) buf;
-  uint8_t const * ptr = buf + sizeof(pd_header_t);
+bool tuc_msg_request(uint8_t rhport, void const* rdo) {
+  pd_header_t const header = {
+      .msg_type = PD_DATA_REQUEST,
+      .data_role = PD_DATA_ROLE_UFP,
+      .specs_rev = PD_REV_30,
+      .power_role = PD_POWER_ROLE_SINK,
+      .msg_id = 0,
+      .n_data_obj = 1,
+      .extended = 0,
+  };
 
-  if (header->n_data_obj == 0) {
-    // control message
-    switch (header->msg_type) {
-      case PD_CTRL_GOOD_CRC:
-        break;
-
-      case PD_CTRL_ACCEPT:
-        break;
-
-      case PD_CTRL_REJECT:
-        break;
-
-      case PD_CTRL_PS_READY:
-        break;
-
-      default: break;
-    }
-  } else {
-    // data message
-    switch (header->msg_type) {
-      case PD_DATA_SOURCE_CAP: {
-        // Examine source capability and select a suitable PDO (starting from 1 with safe5v)
-        uint8_t obj_pos = 1;
-
-        for(size_t i=0; i<header->n_data_obj; i++) {
-          TU_VERIFY(ptr < p_end);
-          uint32_t const pdo = tu_le32toh(tu_unaligned_read32(ptr));
-
-          switch ((pdo >> 30) & 0x03ul) {
-            case PD_PDO_TYPE_FIXED: {
-              pd_pdo_fixed_t const* fixed = (pd_pdo_fixed_t const*) &pdo;
-              TU_LOG3("[Fixed] %u mV %u mA\r\n", fixed->voltage_50mv*50, fixed->current_max_10ma*10);
-              break;
-            }
-
-            case PD_PDO_TYPE_BATTERY:
-              break;
-
-            case PD_PDO_TYPE_VARIABLE:
-              break;
-
-            case PD_PDO_TYPE_APDO:
-              break;
-          }
-
-          ptr += 4;
-        }
-
-        // Send request with selected PDO position as response to Source Cap
-        pd_rdo_fixed_variable_t rdo = {
-            .current_extremum_10ma = 50, // max 500mA
-            .current_operate_10ma = 30, // 300mA
-            .reserved = 0,
-            .epr_mode_capable = 0,
-            .unchunked_ext_msg_support = 0,
-            .no_usb_suspend = 0,
-            .usb_comm_capable = 1,
-            .capability_mismatch = 0,
-            .give_back_flag = 0, // exteremum is max
-            .object_position = obj_pos,
-        };
-
-        pd_header_t const req_header = {
-            .msg_type = PD_DATA_REQUEST,
-            .data_role = PD_DATA_ROLE_UFP,
-            .specs_rev = PD_REV_20,
-            .power_role = PD_POWER_ROLE_SINK,
-            .msg_id = 0,
-            .n_data_obj = 1,
-            .extended = 0,
-        };
-
-        utcd_msg_send(rhport, &req_header, &rdo);
-
-        break;
-      }
-
-      default: break;
-    }
-  }
-
-  return true;
+  return utcd_msg_send(rhport, &header, rdo);
 }
 
 void tcd_event_handler(tcd_event_t const * event, bool in_isr) {
@@ -199,25 +187,17 @@ void tcd_event_handler(tcd_event_t const * event, bool in_isr) {
   switch(event->event_id) {
     case TCD_EVENT_CC_CHANGED:
       if (event->cc_changed.cc_state[0] || event->cc_changed.cc_state[1]) {
-        // Attach
+        // Attach, start receiving
         tcd_msg_receive(event->rhport, _rx_buf, sizeof(_rx_buf));
       }else {
         // Detach
       }
       break;
 
-    case TCD_EVENT_RX_COMPLETE:
-      // TODO process message here in ISR, move to thread later
-      if (event->rx_complete.result == XFER_RESULT_SUCCESS) {
-        parse_message(event->rhport, _rx_buf, event->rx_complete.xferred_bytes);
-      }
-
-      // start new rx
-      tcd_msg_receive(event->rhport, _rx_buf, sizeof(_rx_buf));
-      break;
-
     default: break;
   }
+
+  osal_queue_send(_utcd_q, event, in_isr);
 }
 
 //--------------------------------------------------------------------+
diff --git a/src/typec/utcd.h b/src/typec/utcd.h
index 740e477ac..9fbff9bc6 100644
--- a/src/typec/utcd.h
+++ b/src/typec/utcd.h
@@ -52,6 +52,17 @@ bool tuc_init(uint8_t rhport, uint32_t port_type);
 // Check if typec port is initialized
 bool tuc_inited(uint8_t rhport);
 
+// Task function should be called in main/rtos loop, extended version of tud_task()
+// - timeout_ms: millisecond to wait, zero = no wait, 0xFFFFFFFF = wait forever
+// - in_isr: if function is called in ISR
+void tuc_task_ext(uint32_t timeout_ms, bool in_isr);
+
+// Task function should be called in main/rtos loop
+TU_ATTR_ALWAYS_INLINE static inline
+void tuc_task (void) {
+  tuc_task_ext(UINT32_MAX, false);
+}
+
 #ifndef _TUSB_TCD_H_
 extern void tcd_int_handler(uint8_t rhport);
 #endif
@@ -59,10 +70,19 @@ extern void tcd_int_handler(uint8_t rhport);
 // Interrupt handler, name alias to TCD
 #define tuc_int_handler tcd_int_handler
 
+//--------------------------------------------------------------------+
+// Callbacks
+//--------------------------------------------------------------------+
+
+TU_ATTR_WEAK bool tuc_pd_data_received_cb(uint8_t rhport, pd_header_t const* header, uint8_t const* dobj, uint8_t const* p_end);
+TU_ATTR_WEAK bool tuc_pd_control_received_cb(uint8_t rhport, pd_header_t const* header);
+
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
 
+bool tuc_msg_request(uint8_t rhport, void const* rdo);
+
 
 #ifdef __cplusplus
 }

From 7a1179a4e1dbf238e8cce203aa92c38c0cb055b7 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 12 Jun 2023 17:01:54 +0700
Subject: [PATCH 406/691] tested with 9V request

---
 examples/typec/power_delivery/src/main.c | 27 +++++++++++++++++++-----
 1 file changed, 22 insertions(+), 5 deletions(-)

diff --git a/examples/typec/power_delivery/src/main.c b/examples/typec/power_delivery/src/main.c
index 42665ed1b..342a2235f 100644
--- a/examples/typec/power_delivery/src/main.c
+++ b/examples/typec/power_delivery/src/main.c
@@ -34,6 +34,13 @@
 // MACRO CONSTANT TYPEDEF PROTOTYPES
 //--------------------------------------------------------------------+
 
+// Voltage and current for selecting PDO
+// DANGEROUS: Please make sure your board can withstand the voltage and current
+// defined here. Otherwise, you may damage your board, smoke can come out
+#define VOLTAGE_MAX_MV       5000 // maximum voltage in mV
+#define CURRENT_MAX_MA       500  // maximum current in mA
+#define CURRENT_OPERATING_MA 100  // operating current in mA
+
 /* Blink pattern
  * - 250 ms  : button is not pressed
  * - 1000 ms : button is pressed (and hold)
@@ -83,7 +90,7 @@ bool tuc_pd_data_received_cb(uint8_t rhport, pd_header_t const* header, uint8_t
     case PD_DATA_SOURCE_CAP: {
       printf("PD Source Capabilities\r\n");
       // Examine source capability and select a suitable PDO (starting from 1 with safe5v)
-      uint8_t obj_pos = 1;
+      uint8_t selected_pos = 1;
 
       for(size_t i=0; i<header->n_data_obj; i++) {
         TU_VERIFY(dobj < p_end);
@@ -92,7 +99,15 @@ bool tuc_pd_data_received_cb(uint8_t rhport, pd_header_t const* header, uint8_t
         switch ((pdo >> 30) & 0x03ul) {
           case PD_PDO_TYPE_FIXED: {
             pd_pdo_fixed_t const* fixed = (pd_pdo_fixed_t const*) &pdo;
-            printf("[Fixed] %u mV %u mA\r\n", fixed->voltage_50mv*50, fixed->current_max_10ma*10);
+            uint32_t const voltage_mv = fixed->voltage_50mv*50;
+            uint32_t const current_ma = fixed->current_max_10ma*10;
+            printf("[Fixed] %lu mV %lu mA\r\n", voltage_mv, current_ma);
+
+            if (voltage_mv <= VOLTAGE_MAX_MV && current_ma >= CURRENT_MAX_MA) {
+              // Found a suitable PDO
+              selected_pos = i+1;
+            }
+
             break;
           }
 
@@ -110,7 +125,10 @@ bool tuc_pd_data_received_cb(uint8_t rhport, pd_header_t const* header, uint8_t
       }
 
       //------------- Response with selected PDO -------------//
-      // Be careful and make sure your board can withstand the selected PDO voltage other than safe5v e.g 12v or 20v
+      // Be careful and make sure your board can withstand the selected PDO
+      // voltage other than safe5v e.g 12v or 20v
+
+      printf("Selected PDO %u\r\n", selected_pos);
 
       // Send request with selected PDO position as response to Source Cap
       pd_rdo_fixed_variable_t rdo = {
@@ -123,9 +141,8 @@ bool tuc_pd_data_received_cb(uint8_t rhport, pd_header_t const* header, uint8_t
           .usb_comm_capable = 1,
           .capability_mismatch = 0,
           .give_back_flag = 0, // exteremum is max
-          .object_position = obj_pos,
+          .object_position = selected_pos,
       };
-
       tuc_msg_request(rhport, &rdo);
 
       break;

From d2d486dced7f92e8cab65f87be79b7e60d211ad2 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 12 Jun 2023 17:06:04 +0700
Subject: [PATCH 407/691] update docs

---
 README.rst | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/README.rst b/README.rst
index 425cfa0e3..2c9119fef 100644
--- a/README.rst
+++ b/README.rst
@@ -20,8 +20,8 @@ Please take a look at the online `documentation <https://docs.tinyusb.org/>`__.
 	├── docs            # Documentation
 	├── examples        # Sample with Makefile build support
 	├── hw
-	│   ├── bsp         # Supported boards source files
-	│   └── mcu         # Low level mcu core & peripheral drivers
+	│   ├── bsp         # Supported boards source files
+	│   └── mcu         # Low level mcu core & peripheral drivers
 	├── lib             # Sources from 3rd party such as freeRTOS, fatfs ...
 	├── src             # All sources files for TinyUSB stack itself.
 	├── test            # Unit tests for the stack
@@ -89,6 +89,13 @@ Host Stack
 - Mass Storage Class (MSC)
 - Hub with multiple-level support
 
+TypeC PD Stack
+==============
+
+- Power Delivery 3.0 (PD3.0) with USB Type-C support (WIP)
+- Super early stage, only for testing purpose
+- Only support STM32 G4
+
 OS Abstraction layer
 ====================
 

From 41801c2a6bd146033f5ff00e54983de46ab414b9 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 12 Jun 2023 17:12:25 +0700
Subject: [PATCH 408/691] add typec example to cmake

---
 examples/CMakeLists.txt       | 1 +
 examples/typec/CMakeLists.txt | 9 +++++++++
 2 files changed, 10 insertions(+)
 create mode 100644 examples/typec/CMakeLists.txt

diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt
index 91c9fb098..c603d0c22 100644
--- a/examples/CMakeLists.txt
+++ b/examples/CMakeLists.txt
@@ -8,3 +8,4 @@ project(tinyusb_examples C CXX ASM)
 add_subdirectory(device)
 add_subdirectory(dual)
 add_subdirectory(host)
+add_subdirectory(typec)
diff --git a/examples/typec/CMakeLists.txt b/examples/typec/CMakeLists.txt
new file mode 100644
index 000000000..c7641494e
--- /dev/null
+++ b/examples/typec/CMakeLists.txt
@@ -0,0 +1,9 @@
+cmake_minimum_required(VERSION 3.17)
+
+include(${CMAKE_CURRENT_SOURCE_DIR}/../../hw/bsp/family_support.cmake)
+
+project(tinyusb_host_examples C CXX ASM)
+family_initialize_project(tinyusb_host_examples ${CMAKE_CURRENT_LIST_DIR})
+
+# family_add_subdirectory will filter what to actually add based on selected FAMILY
+family_add_subdirectory(power_delivery)

From 9593ab7acc528814faf86c652b2a22209938128d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 13 Jun 2023 16:40:29 +0700
Subject: [PATCH 409/691] fix usbh issue when device genreate multiple
 attach/detach/attach when plugging in

---
 src/host/usbh.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/src/host/usbh.c b/src/host/usbh.c
index 98e959a12..f3e9d3858 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -411,7 +411,14 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr)
         if ( _dev0.enumerating )
         {
           TU_LOG_USBH("[%u:] USBH Defer Attach until current enumeration complete\r\n", event.rhport);
+
+          bool is_empty = osal_queue_empty(_usbh_q);
           osal_queue_send(_usbh_q, &event, in_isr);
+
+          if (is_empty) {
+            // Exit if this is the only event in the queue, otherwise we may loop forever
+            return;
+          }
         }else
         {
           TU_LOG_USBH("[%u:] USBH DEVICE ATTACH\r\n", event.rhport);
@@ -1461,7 +1468,10 @@ static bool enum_new_device(hcd_event_t* event)
     hcd_port_reset_end( _dev0.rhport);
 
     // device unplugged while delaying
-    if ( !hcd_port_connect_status(_dev0.rhport) ) return true;
+    if ( !hcd_port_connect_status(_dev0.rhport) ) {
+      enum_full_complete();
+      return true;
+    }
 
     _dev0.speed = hcd_port_speed_get(_dev0.rhport );
     TU_LOG_USBH("%s Speed\r\n", tu_str_speed[_dev0.speed]);

From a88d7c7c7472b07f641772bff45e7804584f9ccd Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 13 Jun 2023 17:47:28 +0700
Subject: [PATCH 410/691] ide setting

---
 .idea/cmake.xml                             | 14 ++++++++------
 .idea/runConfigurations/rp2040.xml          |  2 +-
 .idea/runConfigurations/rt1010_jlink.xml    |  2 +-
 .idea/runConfigurations/rt1060_jlink.xml    |  2 +-
 .idea/runConfigurations/stm32g474_jlink.xml |  2 +-
 5 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 871968dfb..3c016ccff 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -3,11 +3,9 @@
   <component name="CMakeSharedSettings">
     <configurations>
       <configuration PROFILE_NAME="mcxn947" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=mcx -DBOARD=mcxn947brk" />
-      <configuration PROFILE_NAME="rt1060 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1060_evk" />
+      <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10056" />
       <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10095" />
-      <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10056" BUILD_OPTIONS="-v" />
-      <configuration PROFILE_NAME="lpc55s69" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc55 -DBOARD=lpcxpresso55s69" />
-      <configuration PROFILE_NAME="esp32s3" ENABLED="false" GENERATION_OPTIONS="-DFAMILY=espressif -DBOARD=espressif_s3_devkitm -DIDF_TARGET=esp32s3">
+      <configuration PROFILE_NAME="esp32s2" ENABLED="false" GENERATION_OPTIONS="-DFAMILY=espressif -DBOARD=espressif_saola_1 -DIDF_TARGET=esp32s2">
         <ADDITIONAL_GENERATION_ENVIRONMENT>
           <envs>
             <env name="ESPBAUD" value="1500000" />
@@ -17,7 +15,7 @@
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
-      <configuration PROFILE_NAME="esp32s2" ENABLED="false" GENERATION_OPTIONS="-DFAMILY=espressif -DBOARD=espressif_saola_1 -DIDF_TARGET=esp32s2">
+      <configuration PROFILE_NAME="esp32s3" ENABLED="false" GENERATION_OPTIONS="-DFAMILY=espressif -DBOARD=espressif_s3_devkitm -DIDF_TARGET=esp32s3">
         <ADDITIONAL_GENERATION_ENVIRONMENT>
           <envs>
             <env name="ESPBAUD" value="1500000" />
@@ -29,12 +27,16 @@
       </configuration>
       <configuration PROFILE_NAME="rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=rp2040 -DBOARD=raspberry_pi_pico" />
       <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1010_evk" />
+      <configuration PROFILE_NAME="rt1060 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1060_evk" />
       <configuration PROFILE_NAME="rt1064 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1064_evk" />
       <configuration PROFILE_NAME="mcb1800" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc18 -DBOARD=mcb1800" />
       <configuration PROFILE_NAME="lpcxpresso18s37" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc18 -DBOARD=lpcxpresso18s37" />
+      <configuration PROFILE_NAME="lpc55s69" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc55 -DBOARD=lpcxpresso55s69" />
       <configuration PROFILE_NAME="stm32g0b1nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g0 -DBOARD=stm32g0b1nucleo" />
+      <configuration PROFILE_NAME="stm32g0b1nucleo iar" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g0 -DBOARD=stm32g0b1nucleo -DTOOLCHAIN=iar" />
       <configuration PROFILE_NAME="stm32g474nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g4 -DBOARD=stm32g474nucleo" />
-      <configuration PROFILE_NAME="b_g474e_dpow1" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g4 -DBOARD=b_g474e_dpow1" />
+      <configuration PROFILE_NAME="b_g474e_dpow1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g4 -DBOARD=b_g474e_dpow1 -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="b_g474e_dpow1 iar" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g4 -DBOARD=b_g474e_dpow1 -DTOOLCHAIN=iar" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/.idea/runConfigurations/rp2040.xml b/.idea/runConfigurations/rp2040.xml
index 0d1484b25..9b6111900 100644
--- a/.idea/runConfigurations/rp2040.xml
+++ b/.idea/runConfigurations/rp2040.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rp2040" type="com.jetbrains.cidr.embedded.openocd.conf.type" factoryName="com.jetbrains.cidr.embedded.openocd.conf.factory" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_device_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="b_g474e_dpow1" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_device_examples" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="rp2040" type="com.jetbrains.cidr.embedded.openocd.conf.type" factoryName="com.jetbrains.cidr.embedded.openocd.conf.factory" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_device_examples" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_device_examples" RUN_TARGET_NAME="cdc_msc">
     <openocd version="1" gdb-port="3333" telnet-port="4444" board-config="$PROJECT_DIR$/hw/bsp/rp2040/rp2040-openocd.cfg" reset-type="INIT" download-type="UPDATED_ONLY">
       <debugger kind="GDB" isBundled="true" />
     </openocd>
diff --git a/.idea/runConfigurations/rt1010_jlink.xml b/.idea/runConfigurations/rt1010_jlink.xml
index 70cfeea53..e660a46ae 100644
--- a/.idea/runConfigurations/rt1010_jlink.xml
+++ b/.idea/runConfigurations/rt1010_jlink.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rt1010 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1011xxx5A&quot; -if swd -speed 8000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcxn947" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="rt1010 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1011xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="b_g474e_dpow1" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/rt1060_jlink.xml b/.idea/runConfigurations/rt1060_jlink.xml
index eabadaf59..b9a47a2ce 100644
--- a/.idea/runConfigurations/rt1060_jlink.xml
+++ b/.idea/runConfigurations/rt1060_jlink.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rt1060 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1062xxx5A&quot; -if swd -speed 8000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="host_hid_to_device_cdc" TARGET_NAME="host_hid_to_device_cdc" CONFIG_NAME="rt1060 evk" version="1" RUN_TARGET_PROJECT_NAME="host_hid_to_device_cdc" RUN_TARGET_NAME="host_hid_to_device_cdc">
+  <configuration default="false" name="rt1060 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1062xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="b_g474e_dpow1" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/stm32g474_jlink.xml b/.idea/runConfigurations/stm32g474_jlink.xml
index 45a755da4..c33829833 100644
--- a/.idea/runConfigurations/stm32g474_jlink.xml
+++ b/.idea/runConfigurations/stm32g474_jlink.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="stm32g474 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;stm32g474re&quot; -if swd -speed 100000 -port 25321 -swoport 25322 -TelnetPort 25323 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="b_g474e_dpow1" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="stm32g474 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;stm32g474re&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="b_g474e_dpow1" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>

From 05969d2a58d426e5948df5dc0479e2ad8dfd02a9 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 14 Jun 2023 11:07:58 +0700
Subject: [PATCH 411/691] rename typec driver

---
 src/CMakeLists.txt           |  2 +-
 src/tusb.h                   |  2 +-
 src/typec/{utcd.c => usbc.c} | 44 ++++++++++++++++++------------------
 src/typec/{utcd.h => usbc.h} |  0
 4 files changed, 24 insertions(+), 24 deletions(-)
 rename src/typec/{utcd.c => usbc.c} (85%)
 rename src/typec/{utcd.h => usbc.h} (100%)

diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index ce4486ecd..b99c7be6e 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -33,7 +33,7 @@ function(add_tinyusb TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/msc/msc_host.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/vendor/vendor_host.c
     # typec
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/typec/utcd.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/typec/usbc.c
     )
   target_include_directories(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/src/tusb.h b/src/tusb.h
index 0b87b1969..37a521fa8 100644
--- a/src/tusb.h
+++ b/src/tusb.h
@@ -42,7 +42,7 @@
 
 //------------- TypeC -------------//
 #if CFG_TUC_ENABLED
-  #include "typec/utcd.h"
+  #include "typec/usbc.h"
 #endif
 
 //------------- HOST -------------//
diff --git a/src/typec/utcd.c b/src/typec/usbc.c
similarity index 85%
rename from src/typec/utcd.c
rename to src/typec/usbc.c
index 831df1fe8..fdf2a0cd6 100644
--- a/src/typec/utcd.c
+++ b/src/typec/usbc.c
@@ -29,24 +29,24 @@
 #if CFG_TUC_ENABLED
 
 #include "tcd.h"
-#include "utcd.h"
+#include "usbc.h"
 
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
 
 // Debug level of USBD
-#define UTCD_DEBUG   2
-#define TU_LOG_UTCD(...)   TU_LOG(UTCD_DEBUG, __VA_ARGS__)
+#define USBC_DEBUG   2
+#define TU_LOG_USBC(...)   TU_LOG(USBC_DEBUG, __VA_ARGS__)
 
 // Event queue
-// utcd_int_set() is used as mutex in OS NONE config
-void utcd_int_set(bool enabled);
-OSAL_QUEUE_DEF(utcd_int_set, _utcd_qdef, CFG_TUC_TASK_QUEUE_SZ, tcd_event_t);
-tu_static osal_queue_t _utcd_q;
+// usbc_int_set() is used as mutex in OS NONE config
+void usbc_int_set(bool enabled);
+OSAL_QUEUE_DEF(usbc_int_set, _usbc_qdef, CFG_TUC_TASK_QUEUE_SZ, tcd_event_t);
+tu_static osal_queue_t _usbc_q;
 
 // if stack is initialized
-static bool _utcd_inited = false;
+static bool _usbc_inited = false;
 
 // if port is initialized
 static bool _port_inited[TUP_TYPEC_RHPORTS_NUM];
@@ -55,7 +55,7 @@ static bool _port_inited[TUP_TYPEC_RHPORTS_NUM];
 static uint8_t _rx_buf[64] TU_ATTR_ALIGNED(4);
 static uint8_t _tx_buf[64] TU_ATTR_ALIGNED(4);
 
-bool utcd_msg_send(uint8_t rhport, pd_header_t const* header, void const* data);
+bool usbc_msg_send(uint8_t rhport, pd_header_t const* header, void const* data);
 bool parse_msg_data(uint8_t rhport, pd_header_t const* header, uint8_t const* dobj, uint8_t const* p_end);
 bool parse_msg_control(uint8_t rhport, pd_header_t const* header);
 
@@ -63,18 +63,18 @@ bool parse_msg_control(uint8_t rhport, pd_header_t const* header);
 //
 //--------------------------------------------------------------------+
 bool tuc_inited(uint8_t rhport) {
-  return _utcd_inited && _port_inited[rhport];
+  return _usbc_inited && _port_inited[rhport];
 }
 
 bool tuc_init(uint8_t rhport, uint32_t port_type) {
   // Initialize stack
-  if (!_utcd_inited) {
+  if (!_usbc_inited) {
     tu_memclr(_port_inited, sizeof(_port_inited));
 
-    _utcd_q = osal_queue_create(&_utcd_qdef);
-    TU_ASSERT(_utcd_q != NULL);
+    _usbc_q = osal_queue_create(&_usbc_qdef);
+    TU_ASSERT(_usbc_q != NULL);
 
-    _utcd_inited = true;
+    _usbc_inited = true;
   }
 
   // skip if port already initialized
@@ -82,8 +82,8 @@ bool tuc_init(uint8_t rhport, uint32_t port_type) {
     return true;
   }
 
-  TU_LOG_UTCD("UTCD init on port %u\r\n", rhport);
-  TU_LOG_INT(UTCD_DEBUG, sizeof(tcd_event_t));
+  TU_LOG_USBC("USBC init on port %u\r\n", rhport);
+  TU_LOG_INT(USBC_DEBUG, sizeof(tcd_event_t));
 
   TU_ASSERT(tcd_init(rhport, port_type));
   tcd_int_enable(rhport);
@@ -96,12 +96,12 @@ void tuc_task_ext(uint32_t timeout_ms, bool in_isr) {
   (void) in_isr; // not implemented yet
 
   // Skip if stack is not initialized
-  if (!_utcd_inited) return;
+  if (!_usbc_inited) return;
 
   // Loop until there is no more events in the queue
   while (1) {
     tcd_event_t event;
-    if (!osal_queue_receive(_utcd_q, &event, timeout_ms)) return;
+    if (!osal_queue_receive(_usbc_q, &event, timeout_ms)) return;
 
     switch (event.event_id) {
       case TCD_EVENT_CC_CHANGED:
@@ -155,7 +155,7 @@ bool parse_msg_control(uint8_t rhport, pd_header_t const* header) {
 //
 //--------------------------------------------------------------------+
 
-bool utcd_msg_send(uint8_t rhport, pd_header_t const* header, void const* data) {
+bool usbc_msg_send(uint8_t rhport, pd_header_t const* header, void const* data) {
   // copy header
   memcpy(_tx_buf, header, sizeof(pd_header_t));
 
@@ -179,7 +179,7 @@ bool tuc_msg_request(uint8_t rhport, void const* rdo) {
       .extended = 0,
   };
 
-  return utcd_msg_send(rhport, &header, rdo);
+  return usbc_msg_send(rhport, &header, rdo);
 }
 
 void tcd_event_handler(tcd_event_t const * event, bool in_isr) {
@@ -197,13 +197,13 @@ void tcd_event_handler(tcd_event_t const * event, bool in_isr) {
     default: break;
   }
 
-  osal_queue_send(_utcd_q, event, in_isr);
+  osal_queue_send(_usbc_q, event, in_isr);
 }
 
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
-void utcd_int_set(bool enabled) {
+void usbc_int_set(bool enabled) {
   // Disable all controllers since they shared the same event queue
   for (uint8_t p = 0; p < TUP_TYPEC_RHPORTS_NUM; p++) {
     if ( _port_inited[p] ) {
diff --git a/src/typec/utcd.h b/src/typec/usbc.h
similarity index 100%
rename from src/typec/utcd.h
rename to src/typec/usbc.h

From 8b8b9690ad8c546a8310c942ea926f654562f97c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 14 Jun 2023 12:01:21 +0700
Subject: [PATCH 412/691] update segger rtt to fix cast align

---
 hw/bsp/mcx/boards/mcxn947brk/board.cmake |   1 +
 hw/bsp/mcx/boards/mcxn947brk/board.mk    |   6 +-
 hw/bsp/mcx/family.cmake                  |   2 +-
 lib/SEGGER_RTT/RTT/SEGGER_RTT.c          |  50 +--
 lib/SEGGER_RTT/RTT/SEGGER_RTT.h          |  17 +-
 lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c   | 500 +++++++++++++++++++++++
 6 files changed, 545 insertions(+), 31 deletions(-)
 create mode 100644 lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c

diff --git a/hw/bsp/mcx/boards/mcxn947brk/board.cmake b/hw/bsp/mcx/boards/mcxn947brk/board.cmake
index 7a210628f..650f10967 100644
--- a/hw/bsp/mcx/boards/mcxn947brk/board.cmake
+++ b/hw/bsp/mcx/boards/mcxn947brk/board.cmake
@@ -10,6 +10,7 @@ function(update_board TARGET)
     CPU_MCXN947VDF_cm33_core0
     # port 1 is highspeed
     BOARD_TUD_RHPORT=1
+    BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
     )
   target_sources(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
diff --git a/hw/bsp/mcx/boards/mcxn947brk/board.mk b/hw/bsp/mcx/boards/mcxn947brk/board.mk
index 69f47b8a8..aaad5e73e 100644
--- a/hw/bsp/mcx/boards/mcxn947brk/board.mk
+++ b/hw/bsp/mcx/boards/mcxn947brk/board.mk
@@ -4,8 +4,8 @@ PORT ?= 1
 
 CFLAGS += -DCPU_MCXN947VDF_cm33_core0
 
-JLINK_DEVICE = LPC55S69
-PYOCD_TARGET = LPC55S69
+JLINK_DEVICE = MCXN947_M33_0
+PYOCD_TARGET = MCXN947
 
 # flash using pyocd
-flash: flash-pyocd
+flash: flash-jlink
diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake
index 1dbf6f8f7..1c85b51f8 100644
--- a/hw/bsp/mcx/family.cmake
+++ b/hw/bsp/mcx/family.cmake
@@ -14,7 +14,7 @@ include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
 set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
-set(FAMILY_MCUS LPC55XX CACHE INTERNAL "")
+set(FAMILY_MCUS MCXN9 CACHE INTERNAL "")
 
 # enable LTO if supported
 include(CheckIPOSupported)
diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT.c b/lib/SEGGER_RTT/RTT/SEGGER_RTT.c
index 895085ba2..730a5cfb3 100644
--- a/lib/SEGGER_RTT/RTT/SEGGER_RTT.c
+++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT.c
@@ -306,7 +306,7 @@ static unsigned char _ActiveTerminal;
   #define INIT()                                                                             \
     do {                                                                                     \
       volatile SEGGER_RTT_CB* pRTTCBInit;                                                    \
-      pRTTCBInit = (volatile SEGGER_RTT_CB*)((char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); \
+      pRTTCBInit = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF); \
       if (pRTTCBInit->acID[0] != 'S') {                                                      \
         _DoInit();                                                                           \
       }                                                                                      \
@@ -319,7 +319,7 @@ static void _DoInit(void) {
   //
   // Initialize control block
   //
-  p                     = (volatile SEGGER_RTT_CB*)((char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access control block uncached so that nothing in the cache ever becomes dirty and all changes are visible in HW directly
+  p                     = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access control block uncached so that nothing in the cache ever becomes dirty and all changes are visible in HW directly
   memset((SEGGER_RTT_CB*)p, 0, sizeof(_SEGGER_RTT));         // Make sure that the RTT CB is always zero initialized.
   p->MaxNumUpBuffers    = SEGGER_RTT_MAX_NUM_UP_BUFFERS;
   p->MaxNumDownBuffers  = SEGGER_RTT_MAX_NUM_DOWN_BUFFERS;
@@ -581,7 +581,7 @@ unsigned SEGGER_RTT_ReadUpBufferNoLock(unsigned BufferIndex, void* pData, unsign
   volatile char*          pSrc;
 
   INIT();
-  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   pBuffer = (unsigned char*)pData;
   RdOff = pRing->RdOff;
   WrOff = pRing->WrOff;
@@ -673,7 +673,7 @@ unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void* pData, unsigned Buffe
   volatile char*          pSrc;
   //
   INIT();
-  pRing = (SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRing = (SEGGER_RTT_BUFFER_DOWN*)((uintptr_t)&_SEGGER_RTT.aDown[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   pBuffer = (unsigned char*)pData;
   RdOff = pRing->RdOff;
   WrOff = pRing->WrOff;
@@ -840,7 +840,7 @@ void SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuff
   // Get "to-host" ring buffer and copy some elements into local variables.
   //
   pData = (const char *)pBuffer;
-  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   //
   // Check if we will overwrite data and need to adjust the RdOff.
   //
@@ -1033,7 +1033,7 @@ unsigned SEGGER_RTT_WriteDownBufferNoLock(unsigned BufferIndex, const void* pBuf
   // It is save to cast that to a "to-host" buffer. Up and Down buffer differ in volatility of offsets that might be modified by J-Link.
   //
   pData = (const char *)pBuffer;
-  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aDown[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aDown[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   //
   // How we output depends upon the mode...
   //
@@ -1107,7 +1107,7 @@ unsigned SEGGER_RTT_WriteNoLock(unsigned BufferIndex, const void* pBuffer, unsig
   // Get "to-host" ring buffer.
   //
   pData = (const char *)pBuffer;
-  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   //
   // How we output depends upon the mode...
   //
@@ -1271,7 +1271,7 @@ unsigned SEGGER_RTT_PutCharSkipNoLock(unsigned BufferIndex, char c) {
   //
   // Get "to-host" ring buffer.
   //
-  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   //
   // Get write position and handle wrap-around if necessary
   //
@@ -1326,7 +1326,7 @@ unsigned SEGGER_RTT_PutCharSkip(unsigned BufferIndex, char c) {
   //
   // Get "to-host" ring buffer.
   //
-  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   //
   // Get write position and handle wrap-around if necessary
   //
@@ -1385,7 +1385,7 @@ unsigned SEGGER_RTT_PutChar(unsigned BufferIndex, char c) {
   //
   // Get "to-host" ring buffer.
   //
-  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   //
   // Get write position and handle wrap-around if necessary
   //
@@ -1492,7 +1492,7 @@ int SEGGER_RTT_HasKey(void) {
   int r;
 
   INIT();
-  pRing = (SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[0] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRing = (SEGGER_RTT_BUFFER_DOWN*)((uintptr_t)&_SEGGER_RTT.aDown[0] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   RdOff = pRing->RdOff;
   if (RdOff != pRing->WrOff) {
     r = 1;
@@ -1518,7 +1518,7 @@ unsigned SEGGER_RTT_HasData(unsigned BufferIndex) {
   SEGGER_RTT_BUFFER_DOWN* pRing;
   unsigned                v;
 
-  pRing = (SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRing = (SEGGER_RTT_BUFFER_DOWN*)((uintptr_t)&_SEGGER_RTT.aDown[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   v = pRing->WrOff;
   return v - pRing->RdOff;
 }
@@ -1539,7 +1539,7 @@ unsigned SEGGER_RTT_HasDataUp(unsigned BufferIndex) {
   SEGGER_RTT_BUFFER_UP* pRing;
   unsigned                v;
 
-  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   v = pRing->RdOff;
   return pRing->WrOff - v;
 }
@@ -1570,7 +1570,7 @@ int SEGGER_RTT_AllocDownBuffer(const char* sName, void* pBuffer, unsigned Buffer
 
   INIT();
   SEGGER_RTT_LOCK();
-  pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRTTCB = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   BufferIndex = 0;
   do {
     if (pRTTCB->aDown[BufferIndex].pBuffer == NULL) {
@@ -1619,7 +1619,7 @@ int SEGGER_RTT_AllocUpBuffer(const char* sName, void* pBuffer, unsigned BufferSi
 
   INIT();
   SEGGER_RTT_LOCK();
-  pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRTTCB = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   BufferIndex = 0;
   do {
     if (pRTTCB->aUp[BufferIndex].pBuffer == NULL) {
@@ -1674,7 +1674,7 @@ int SEGGER_RTT_ConfigUpBuffer(unsigned BufferIndex, const char* sName, void* pBu
   volatile SEGGER_RTT_BUFFER_UP* pUp;
 
   INIT();
-  pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRTTCB = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   if (BufferIndex < SEGGER_RTT_MAX_NUM_UP_BUFFERS) {
     SEGGER_RTT_LOCK();
     pUp = &pRTTCB->aUp[BufferIndex];
@@ -1726,7 +1726,7 @@ int SEGGER_RTT_ConfigDownBuffer(unsigned BufferIndex, const char* sName, void* p
   volatile SEGGER_RTT_BUFFER_DOWN* pDown;
 
   INIT();
-  pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRTTCB = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   if (BufferIndex < SEGGER_RTT_MAX_NUM_DOWN_BUFFERS) {
     SEGGER_RTT_LOCK();
     pDown = &pRTTCB->aDown[BufferIndex];
@@ -1769,7 +1769,7 @@ int SEGGER_RTT_SetNameUpBuffer(unsigned BufferIndex, const char* sName) {
   volatile SEGGER_RTT_BUFFER_UP* pUp;
 
   INIT();
-  pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRTTCB = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   if (BufferIndex < SEGGER_RTT_MAX_NUM_UP_BUFFERS) {
     SEGGER_RTT_LOCK();
     pUp = &pRTTCB->aUp[BufferIndex];
@@ -1804,7 +1804,7 @@ int SEGGER_RTT_SetNameDownBuffer(unsigned BufferIndex, const char* sName) {
   volatile SEGGER_RTT_BUFFER_DOWN* pDown;
 
   INIT();
-  pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRTTCB = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   if (BufferIndex < SEGGER_RTT_MAX_NUM_DOWN_BUFFERS) {
     SEGGER_RTT_LOCK();
     pDown = &pRTTCB->aDown[BufferIndex];
@@ -1840,7 +1840,7 @@ int SEGGER_RTT_SetFlagsUpBuffer(unsigned BufferIndex, unsigned Flags) {
   volatile SEGGER_RTT_BUFFER_UP* pUp;
 
   INIT();
-  pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRTTCB = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   if (BufferIndex < SEGGER_RTT_MAX_NUM_UP_BUFFERS) {
     SEGGER_RTT_LOCK();
     pUp = &pRTTCB->aUp[BufferIndex];
@@ -1876,7 +1876,7 @@ int SEGGER_RTT_SetFlagsDownBuffer(unsigned BufferIndex, unsigned Flags) {
   volatile SEGGER_RTT_BUFFER_DOWN* pDown;
 
   INIT();
-  pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRTTCB = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   if (BufferIndex < SEGGER_RTT_MAX_NUM_DOWN_BUFFERS) {
     SEGGER_RTT_LOCK();
     pDown = &pRTTCB->aDown[BufferIndex];
@@ -1930,7 +1930,7 @@ int SEGGER_RTT_SetTerminal (unsigned char TerminalId) {
   ac[0] = 0xFFu;
   if (TerminalId < sizeof(_aTerminalId)) { // We only support a certain number of channels
     ac[1] = _aTerminalId[TerminalId];
-    pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[0] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+    pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[0] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
     SEGGER_RTT_LOCK();                     // Lock to make sure that no other task is writing into buffer, while we are and number of free bytes in buffer does not change downwards after checking and before writing
     if ((pRing->Flags & SEGGER_RTT_MODE_MASK) == SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL) {
       _ActiveTerminal = TerminalId;
@@ -1982,7 +1982,7 @@ int SEGGER_RTT_TerminalOut (unsigned char TerminalId, const char* s) {
     //
     // Get "to-host" ring buffer.
     //
-    pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[0] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+    pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[0] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
     //
     // Need to be able to change terminal, write data, change back.
     // Compute the fixed and variable sizes.
@@ -2059,7 +2059,7 @@ int SEGGER_RTT_TerminalOut (unsigned char TerminalId, const char* s) {
 unsigned SEGGER_RTT_GetAvailWriteSpace (unsigned BufferIndex) {
   SEGGER_RTT_BUFFER_UP* pRing;
 
-  pRing = (SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRing = (SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[BufferIndex] + SEGGER_RTT_UNCACHED_OFF);  // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   return _GetAvailWriteSpace(pRing);
 }
 
@@ -2086,7 +2086,7 @@ unsigned SEGGER_RTT_GetBytesInBuffer(unsigned BufferIndex) {
   // Avoid warnings regarding volatile access order.  It's not a problem
   // in this case, but dampen compiler enthusiasm.
   //
-  pRTTCB = (volatile SEGGER_RTT_CB*)((unsigned char*)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+  pRTTCB = (volatile SEGGER_RTT_CB*)((uintptr_t)&_SEGGER_RTT + SEGGER_RTT_UNCACHED_OFF);  // Access RTTCB uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
   RdOff = pRTTCB->aUp[BufferIndex].RdOff;
   WrOff = pRTTCB->aUp[BufferIndex].WrOff;
   if (RdOff <= WrOff) {
diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT.h b/lib/SEGGER_RTT/RTT/SEGGER_RTT.h
index a3161f694..87f2841a5 100644
--- a/lib/SEGGER_RTT/RTT/SEGGER_RTT.h
+++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT.h
@@ -91,6 +91,10 @@ Revision: $Rev: 25842 $
       #define _CORE_HAS_RTT_ASM_SUPPORT 1
       #define _CORE_NEEDS_DMB           1
       #define RTT__DMB() __asm volatile ("dmb\n" : : :);
+    #elif (defined(__ARM_ARCH_8_1M_MAIN__))       // Cortex-M85
+      #define _CORE_HAS_RTT_ASM_SUPPORT 1
+      #define _CORE_NEEDS_DMB           1
+      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
     #else
       #define _CORE_HAS_RTT_ASM_SUPPORT 0
     #endif
@@ -121,6 +125,10 @@ Revision: $Rev: 25842 $
       #define _CORE_HAS_RTT_ASM_SUPPORT 1
       #define _CORE_NEEDS_DMB           1
       #define RTT__DMB() __asm volatile ("dmb\n" : : :);
+    #elif (defined __ARM_ARCH_8_1M_MAIN__)        // Cortex-M85
+      #define _CORE_HAS_RTT_ASM_SUPPORT 1
+      #define _CORE_NEEDS_DMB           1
+      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
     #elif ((defined __ARM_ARCH_7A__) || (defined __ARM_ARCH_7R__))  // Cortex-A/R 32-bit ARMv7-A/R
       #define _CORE_NEEDS_DMB           1
       #define RTT__DMB() __asm volatile ("dmb\n" : : :);
@@ -147,6 +155,10 @@ Revision: $Rev: 25842 $
       #define _CORE_HAS_RTT_ASM_SUPPORT 1
       #define _CORE_NEEDS_DMB           1
       #define RTT__DMB() __asm volatile ("dmb\n" : : :);
+    #elif (defined __ARM_ARCH_8_1M_MAIN__)        // Cortex-M85
+      #define _CORE_HAS_RTT_ASM_SUPPORT 1
+      #define _CORE_NEEDS_DMB           1
+      #define RTT__DMB() __asm volatile ("dmb\n" : : :);
     #elif ((defined __ARM_ARCH_7A__) || (defined __ARM_ARCH_7R__))  // Cortex-A/R 32-bit ARMv7-A/R
       #define _CORE_NEEDS_DMB           1
       #define RTT__DMB() __asm volatile ("dmb\n" : : :);
@@ -262,6 +274,7 @@ Revision: $Rev: 25842 $
 #ifndef SEGGER_RTT_ASM  // defined when SEGGER_RTT.h is included from assembly file
 #include <stdlib.h>
 #include <stdarg.h>
+#include <stdint.h>
 
 /*********************************************************************
 *
@@ -381,7 +394,7 @@ unsigned     SEGGER_RTT_GetBytesInBuffer        (unsigned BufferIndex);
 //
 // Function macro for performance optimization
 //
-#define      SEGGER_RTT_HASDATA(n)       (((SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff)
+#define      SEGGER_RTT_HASDATA(n)       (((SEGGER_RTT_BUFFER_DOWN*)((uintptr_t)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff)
 
 #if RTT_USE_ASM
   #define SEGGER_RTT_WriteSkipNoLock  SEGGER_RTT_ASM_WriteSkipNoLock
@@ -398,7 +411,7 @@ unsigned     SEGGER_RTT_ReadUpBufferNoLock      (unsigned BufferIndex, void* pDa
 unsigned     SEGGER_RTT_WriteDownBuffer         (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
 unsigned     SEGGER_RTT_WriteDownBufferNoLock   (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes);
 
-#define      SEGGER_RTT_HASDATA_UP(n)    (((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff)   // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
+#define      SEGGER_RTT_HASDATA_UP(n)    (((SEGGER_RTT_BUFFER_UP*)((uintptr_t)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff)   // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly
 
 /*********************************************************************
 *
diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c b/lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c
new file mode 100644
index 000000000..4c996b408
--- /dev/null
+++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c
@@ -0,0 +1,500 @@
+/*********************************************************************
+*                    SEGGER Microcontroller GmbH                     *
+*                        The Embedded Experts                        *
+**********************************************************************
+*                                                                    *
+*            (c) 1995 - 2019 SEGGER Microcontroller GmbH             *
+*                                                                    *
+*       www.segger.com     Support: support@segger.com               *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+*       SEGGER RTT * Real Time Transfer for embedded targets         *
+*                                                                    *
+**********************************************************************
+*                                                                    *
+* All rights reserved.                                               *
+*                                                                    *
+* SEGGER strongly recommends to not make any changes                 *
+* to or modify the source code of this software in order to stay     *
+* compatible with the RTT protocol and J-Link.                       *
+*                                                                    *
+* Redistribution and use in source and binary forms, with or         *
+* without modification, are permitted provided that the following    *
+* condition is met:                                                  *
+*                                                                    *
+* o Redistributions of source code must retain the above copyright   *
+*   notice, this condition and the following disclaimer.             *
+*                                                                    *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND             *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,        *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF           *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE           *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR           *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT  *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;    *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF      *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT          *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE  *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH   *
+* DAMAGE.                                                            *
+*                                                                    *
+**********************************************************************
+---------------------------END-OF-HEADER------------------------------
+File    : SEGGER_RTT_printf.c
+Purpose : Replacement for printf to write formatted data via RTT
+Revision: $Rev: 17697 $
+----------------------------------------------------------------------
+*/
+#include "SEGGER_RTT.h"
+#include "SEGGER_RTT_Conf.h"
+
+/*********************************************************************
+*
+*       Defines, configurable
+*
+**********************************************************************
+*/
+
+#ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE
+  #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64)
+#endif
+
+#include <stdlib.h>
+#include <stdarg.h>
+
+
+#define FORMAT_FLAG_LEFT_JUSTIFY   (1u << 0)
+#define FORMAT_FLAG_PAD_ZERO       (1u << 1)
+#define FORMAT_FLAG_PRINT_SIGN     (1u << 2)
+#define FORMAT_FLAG_ALTERNATE      (1u << 3)
+
+/*********************************************************************
+*
+*       Types
+*
+**********************************************************************
+*/
+
+typedef struct {
+  char*     pBuffer;
+  unsigned  BufferSize;
+  unsigned  Cnt;
+
+  int   ReturnValue;
+
+  unsigned RTTBufferIndex;
+} SEGGER_RTT_PRINTF_DESC;
+
+/*********************************************************************
+*
+*       Function prototypes
+*
+**********************************************************************
+*/
+
+/*********************************************************************
+*
+*       Static code
+*
+**********************************************************************
+*/
+/*********************************************************************
+*
+*       _StoreChar
+*/
+static void _StoreChar(SEGGER_RTT_PRINTF_DESC * p, char c) {
+  unsigned Cnt;
+
+  Cnt = p->Cnt;
+  if ((Cnt + 1u) <= p->BufferSize) {
+    *(p->pBuffer + Cnt) = c;
+    p->Cnt = Cnt + 1u;
+    p->ReturnValue++;
+  }
+  //
+  // Write part of string, when the buffer is full
+  //
+  if (p->Cnt == p->BufferSize) {
+    if (SEGGER_RTT_Write(p->RTTBufferIndex, p->pBuffer, p->Cnt) != p->Cnt) {
+      p->ReturnValue = -1;
+    } else {
+      p->Cnt = 0u;
+    }
+  }
+}
+
+/*********************************************************************
+*
+*       _PrintUnsigned
+*/
+static void _PrintUnsigned(SEGGER_RTT_PRINTF_DESC * pBufferDesc, unsigned v, unsigned Base, unsigned NumDigits, unsigned FieldWidth, unsigned FormatFlags) {
+  static const char _aV2C[16] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C', 'D', 'E', 'F' };
+  unsigned Div;
+  unsigned Digit;
+  unsigned Number;
+  unsigned Width;
+  char c;
+
+  Number = v;
+  Digit = 1u;
+  //
+  // Get actual field width
+  //
+  Width = 1u;
+  while (Number >= Base) {
+    Number = (Number / Base);
+    Width++;
+  }
+  if (NumDigits > Width) {
+    Width = NumDigits;
+  }
+  //
+  // Print leading chars if necessary
+  //
+  if ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u) {
+    if (FieldWidth != 0u) {
+      if (((FormatFlags & FORMAT_FLAG_PAD_ZERO) == FORMAT_FLAG_PAD_ZERO) && (NumDigits == 0u)) {
+        c = '0';
+      } else {
+        c = ' ';
+      }
+      while ((FieldWidth != 0u) && (Width < FieldWidth)) {
+        FieldWidth--;
+        _StoreChar(pBufferDesc, c);
+        if (pBufferDesc->ReturnValue < 0) {
+          break;
+        }
+      }
+    }
+  }
+  if (pBufferDesc->ReturnValue >= 0) {
+    //
+    // Compute Digit.
+    // Loop until Digit has the value of the highest digit required.
+    // Example: If the output is 345 (Base 10), loop 2 times until Digit is 100.
+    //
+    while (1) {
+      if (NumDigits > 1u) {       // User specified a min number of digits to print? => Make sure we loop at least that often, before checking anything else (> 1 check avoids problems with NumDigits being signed / unsigned)
+        NumDigits--;
+      } else {
+        Div = v / Digit;
+        if (Div < Base) {        // Is our divider big enough to extract the highest digit from value? => Done
+          break;
+        }
+      }
+      Digit *= Base;
+    }
+    //
+    // Output digits
+    //
+    do {
+      Div = v / Digit;
+      v -= Div * Digit;
+      _StoreChar(pBufferDesc, _aV2C[Div]);
+      if (pBufferDesc->ReturnValue < 0) {
+        break;
+      }
+      Digit /= Base;
+    } while (Digit);
+    //
+    // Print trailing spaces if necessary
+    //
+    if ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == FORMAT_FLAG_LEFT_JUSTIFY) {
+      if (FieldWidth != 0u) {
+        while ((FieldWidth != 0u) && (Width < FieldWidth)) {
+          FieldWidth--;
+          _StoreChar(pBufferDesc, ' ');
+          if (pBufferDesc->ReturnValue < 0) {
+            break;
+          }
+        }
+      }
+    }
+  }
+}
+
+/*********************************************************************
+*
+*       _PrintInt
+*/
+static void _PrintInt(SEGGER_RTT_PRINTF_DESC * pBufferDesc, int v, unsigned Base, unsigned NumDigits, unsigned FieldWidth, unsigned FormatFlags) {
+  unsigned Width;
+  int Number;
+
+  Number = (v < 0) ? -v : v;
+
+  //
+  // Get actual field width
+  //
+  Width = 1u;
+  while (Number >= (int)Base) {
+    Number = (Number / (int)Base);
+    Width++;
+  }
+  if (NumDigits > Width) {
+    Width = NumDigits;
+  }
+  if ((FieldWidth > 0u) && ((v < 0) || ((FormatFlags & FORMAT_FLAG_PRINT_SIGN) == FORMAT_FLAG_PRINT_SIGN))) {
+    FieldWidth--;
+  }
+
+  //
+  // Print leading spaces if necessary
+  //
+  if ((((FormatFlags & FORMAT_FLAG_PAD_ZERO) == 0u) || (NumDigits != 0u)) && ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u)) {
+    if (FieldWidth != 0u) {
+      while ((FieldWidth != 0u) && (Width < FieldWidth)) {
+        FieldWidth--;
+        _StoreChar(pBufferDesc, ' ');
+        if (pBufferDesc->ReturnValue < 0) {
+          break;
+        }
+      }
+    }
+  }
+  //
+  // Print sign if necessary
+  //
+  if (pBufferDesc->ReturnValue >= 0) {
+    if (v < 0) {
+      v = -v;
+      _StoreChar(pBufferDesc, '-');
+    } else if ((FormatFlags & FORMAT_FLAG_PRINT_SIGN) == FORMAT_FLAG_PRINT_SIGN) {
+      _StoreChar(pBufferDesc, '+');
+    } else {
+
+    }
+    if (pBufferDesc->ReturnValue >= 0) {
+      //
+      // Print leading zeros if necessary
+      //
+      if (((FormatFlags & FORMAT_FLAG_PAD_ZERO) == FORMAT_FLAG_PAD_ZERO) && ((FormatFlags & FORMAT_FLAG_LEFT_JUSTIFY) == 0u) && (NumDigits == 0u)) {
+        if (FieldWidth != 0u) {
+          while ((FieldWidth != 0u) && (Width < FieldWidth)) {
+            FieldWidth--;
+            _StoreChar(pBufferDesc, '0');
+            if (pBufferDesc->ReturnValue < 0) {
+              break;
+            }
+          }
+        }
+      }
+      if (pBufferDesc->ReturnValue >= 0) {
+        //
+        // Print number without sign
+        //
+        _PrintUnsigned(pBufferDesc, (unsigned)v, Base, NumDigits, FieldWidth, FormatFlags);
+      }
+    }
+  }
+}
+
+/*********************************************************************
+*
+*       Public code
+*
+**********************************************************************
+*/
+/*********************************************************************
+*
+*       SEGGER_RTT_vprintf
+*
+*  Function description
+*    Stores a formatted string in SEGGER RTT control block.
+*    This data is read by the host.
+*
+*  Parameters
+*    BufferIndex  Index of "Up"-buffer to be used. (e.g. 0 for "Terminal")
+*    sFormat      Pointer to format string
+*    pParamList   Pointer to the list of arguments for the format string
+*
+*  Return values
+*    >= 0:  Number of bytes which have been stored in the "Up"-buffer.
+*     < 0:  Error
+*/
+int SEGGER_RTT_vprintf(unsigned BufferIndex, const char * sFormat, va_list * pParamList) {
+  char c;
+  SEGGER_RTT_PRINTF_DESC BufferDesc;
+  int v;
+  unsigned NumDigits;
+  unsigned FormatFlags;
+  unsigned FieldWidth;
+  char acBuffer[SEGGER_RTT_PRINTF_BUFFER_SIZE];
+
+  BufferDesc.pBuffer        = acBuffer;
+  BufferDesc.BufferSize     = SEGGER_RTT_PRINTF_BUFFER_SIZE;
+  BufferDesc.Cnt            = 0u;
+  BufferDesc.RTTBufferIndex = BufferIndex;
+  BufferDesc.ReturnValue    = 0;
+
+  do {
+    c = *sFormat;
+    sFormat++;
+    if (c == 0u) {
+      break;
+    }
+    if (c == '%') {
+      //
+      // Filter out flags
+      //
+      FormatFlags = 0u;
+      v = 1;
+      do {
+        c = *sFormat;
+        switch (c) {
+        case '-': FormatFlags |= FORMAT_FLAG_LEFT_JUSTIFY; sFormat++; break;
+        case '0': FormatFlags |= FORMAT_FLAG_PAD_ZERO;     sFormat++; break;
+        case '+': FormatFlags |= FORMAT_FLAG_PRINT_SIGN;   sFormat++; break;
+        case '#': FormatFlags |= FORMAT_FLAG_ALTERNATE;    sFormat++; break;
+        default:  v = 0; break;
+        }
+      } while (v);
+      //
+      // filter out field with
+      //
+      FieldWidth = 0u;
+      do {
+        c = *sFormat;
+        if ((c < '0') || (c > '9')) {
+          break;
+        }
+        sFormat++;
+        FieldWidth = (FieldWidth * 10u) + ((unsigned)c - '0');
+      } while (1);
+
+      //
+      // Filter out precision (number of digits to display)
+      //
+      NumDigits = 0u;
+      c = *sFormat;
+      if (c == '.') {
+        sFormat++;
+        do {
+          c = *sFormat;
+          if ((c < '0') || (c > '9')) {
+            break;
+          }
+          sFormat++;
+          NumDigits = NumDigits * 10u + ((unsigned)c - '0');
+        } while (1);
+      }
+      //
+      // Filter out length modifier
+      //
+      c = *sFormat;
+      do {
+        if ((c == 'l') || (c == 'h')) {
+          sFormat++;
+          c = *sFormat;
+        } else {
+          break;
+        }
+      } while (1);
+      //
+      // Handle specifiers
+      //
+      switch (c) {
+      case 'c': {
+        char c0;
+        v = va_arg(*pParamList, int);
+        c0 = (char)v;
+        _StoreChar(&BufferDesc, c0);
+        break;
+      }
+      case 'd':
+        v = va_arg(*pParamList, int);
+        _PrintInt(&BufferDesc, v, 10u, NumDigits, FieldWidth, FormatFlags);
+        break;
+      case 'u':
+        v = va_arg(*pParamList, int);
+        _PrintUnsigned(&BufferDesc, (unsigned)v, 10u, NumDigits, FieldWidth, FormatFlags);
+        break;
+      case 'x':
+      case 'X':
+        v = va_arg(*pParamList, int);
+        _PrintUnsigned(&BufferDesc, (unsigned)v, 16u, NumDigits, FieldWidth, FormatFlags);
+        break;
+      case 's':
+        {
+          const char * s = va_arg(*pParamList, const char *);
+          do {
+            c = *s;
+            s++;
+            if (c == '\0') {
+              break;
+            }
+           _StoreChar(&BufferDesc, c);
+          } while (BufferDesc.ReturnValue >= 0);
+        }
+        break;
+      case 'p':
+        v = va_arg(*pParamList, int);
+        _PrintUnsigned(&BufferDesc, (unsigned)v, 16u, 8u, 8u, 0u);
+        break;
+      case '%':
+        _StoreChar(&BufferDesc, '%');
+        break;
+      default:
+        break;
+      }
+      sFormat++;
+    } else {
+      _StoreChar(&BufferDesc, c);
+    }
+  } while (BufferDesc.ReturnValue >= 0);
+
+  if (BufferDesc.ReturnValue > 0) {
+    //
+    // Write remaining data, if any
+    //
+    if (BufferDesc.Cnt != 0u) {
+      SEGGER_RTT_Write(BufferIndex, acBuffer, BufferDesc.Cnt);
+    }
+    BufferDesc.ReturnValue += (int)BufferDesc.Cnt;
+  }
+  return BufferDesc.ReturnValue;
+}
+
+/*********************************************************************
+*
+*       SEGGER_RTT_printf
+*
+*  Function description
+*    Stores a formatted string in SEGGER RTT control block.
+*    This data is read by the host.
+*
+*  Parameters
+*    BufferIndex  Index of "Up"-buffer to be used. (e.g. 0 for "Terminal")
+*    sFormat      Pointer to format string, followed by the arguments for conversion
+*
+*  Return values
+*    >= 0:  Number of bytes which have been stored in the "Up"-buffer.
+*     < 0:  Error
+*
+*  Notes
+*    (1) Conversion specifications have following syntax:
+*          %[flags][FieldWidth][.Precision]ConversionSpecifier
+*    (2) Supported flags:
+*          -: Left justify within the field width
+*          +: Always print sign extension for signed conversions
+*          0: Pad with 0 instead of spaces. Ignored when using '-'-flag or precision
+*        Supported conversion specifiers:
+*          c: Print the argument as one char
+*          d: Print the argument as a signed integer
+*          u: Print the argument as an unsigned integer
+*          x: Print the argument as an hexadecimal integer
+*          s: Print the string pointed to by the argument
+*          p: Print the argument as an 8-digit hexadecimal integer. (Argument shall be a pointer to void.)
+*/
+int SEGGER_RTT_printf(unsigned BufferIndex, const char * sFormat, ...) {
+  int r;
+  va_list ParamList;
+
+  va_start(ParamList, sFormat);
+  r = SEGGER_RTT_vprintf(BufferIndex, sFormat, &ParamList);
+  va_end(ParamList);
+  return r;
+}
+/*************************** End of file ****************************/

From 31a66eb5bcd09ee62d3a28069ae6a5e7d6e2ec08 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 14 Jun 2023 15:33:57 +0700
Subject: [PATCH 413/691] mcx neeed helps to locate rtt control block

---
 .idea/runConfigurations/mcx947_jlink.xml | 10 ++++++++++
 hw/bsp/mcx/mcx.jlinkscript               |  5 +++++
 2 files changed, 15 insertions(+)
 create mode 100644 .idea/runConfigurations/mcx947_jlink.xml
 create mode 100644 hw/bsp/mcx/mcx.jlinkscript

diff --git a/.idea/runConfigurations/mcx947_jlink.xml b/.idea/runConfigurations/mcx947_jlink.xml
new file mode 100644
index 000000000..71616ab70
--- /dev/null
+++ b/.idea/runConfigurations/mcx947_jlink.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="mcx947 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MCXN947_M33_0&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/mcx/mcx.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcxn947" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/hw/bsp/mcx/mcx.jlinkscript b/hw/bsp/mcx/mcx.jlinkscript
new file mode 100644
index 000000000..fd8bcffef
--- /dev/null
+++ b/hw/bsp/mcx/mcx.jlinkscript
@@ -0,0 +1,5 @@
+int SetupTarget(void) {
+  JLINK_ExecCommand("SetRTTSearchRanges 0x20000000 0x40000");
+
+  return 0;
+}

From bce282186e811a7eefcee52c4a4fb3ca107001e4 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 14 Jun 2023 22:36:44 +0700
Subject: [PATCH 414/691] update kinetis kl to use mcx-sdk, also add cmake
 support

note: cdc_msc_freertos built but does not seems to work with kl
---
 .../FreeRTOSConfig/FreeRTOSConfig.h           | 166 ++++++++
 .../kinetis_kl/boards/frdm_kl25z/board.cmake  |  18 +
 hw/bsp/kinetis_kl/boards/frdm_kl25z/board.h   |  58 +++
 hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk  |   7 +-
 .../boards/frdm_kl25z/clock_config.c          | 307 ++++++++++++++
 .../boards/frdm_kl25z/clock_config.h          | 130 ++++++
 .../frdm_kl25z/frdm_kl25z.c => family.c}      |  41 +-
 hw/bsp/kinetis_kl/family.cmake                | 126 ++++++
 hw/bsp/kinetis_kl/family.mk                   |  24 +-
 hw/bsp/kinetis_kl/gcc/MKL25Z128xxx4_flash.ld  | 253 ++++++++++++
 hw/bsp/kinetis_kl/gcc/startup_MKL25Z4.S       | 383 ++++++++++++++++++
 tools/get_deps.py                             |   3 -
 tools/get_family_deps.py                      |  21 -
 13 files changed, 1464 insertions(+), 73 deletions(-)
 create mode 100644 hw/bsp/kinetis_kl/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/kinetis_kl/boards/frdm_kl25z/board.cmake
 create mode 100644 hw/bsp/kinetis_kl/boards/frdm_kl25z/board.h
 create mode 100644 hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.c
 create mode 100644 hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.h
 rename hw/bsp/kinetis_kl/{boards/frdm_kl25z/frdm_kl25z.c => family.c} (74%)
 create mode 100644 hw/bsp/kinetis_kl/family.cmake
 create mode 100644 hw/bsp/kinetis_kl/gcc/MKL25Z128xxx4_flash.ld
 create mode 100644 hw/bsp/kinetis_kl/gcc/startup_MKL25Z4.S
 delete mode 100644 tools/get_family_deps.py

diff --git a/hw/bsp/kinetis_kl/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/kinetis_kl/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..960bb23e1
--- /dev/null
+++ b/hw/bsp/kinetis_kl/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,166 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+// FIXME cause redundant-decls warnings
+extern uint32_t SystemCoreClock;
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU						0
+#define configENABLE_FPU						1
+#define configENABLE_TRUSTZONE					0
+#define configMINIMAL_SECURE_STACK_SIZE			(1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               2
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       2
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif /* __FREERTOS_CONFIG__H */
diff --git a/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.cmake b/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.cmake
new file mode 100644
index 000000000..d34a56840
--- /dev/null
+++ b/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.cmake
@@ -0,0 +1,18 @@
+set(MCU_VARIANT MKL25Z4)
+
+set(JLINK_DEVICE MKL25Z128xxx4)
+set(PYOCD_TARGET mkl25zl128)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../gcc/MKL25Z128xxx4_flash.ld)
+set(STARTUP_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../gcc/startup_MKL25Z4.S)
+
+function(update_board TARGET)
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
+    )
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_MKL25Z128VLK4
+    CFG_EXAMPLE_MSC_READONLY
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.h b/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.h
new file mode 100644
index 000000000..23f144666
--- /dev/null
+++ b/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.h
@@ -0,0 +1,58 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef BOARD_H
+#define BOARD_H
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM DECLARATION
+//--------------------------------------------------------------------+
+// LED
+#define LED_PINMUX            IOMUXC_GPIO_AD_B0_09_GPIO1_IO09
+#define LED_PORT              GPIOB
+#define LED_PIN_CLOCK         kCLOCK_PortB
+#define LED_PIN_PORT          PORTB
+#define LED_PIN               19U
+#define LED_PIN_FUNCTION      kPORT_MuxAsGpio
+#define LED_STATE_ON          0
+
+// Button
+#define BUTTON_PORT           GPIOC
+#define BUTTON_PIN_CLOCK      kCLOCK_PortC
+#define BUTTON_PIN_PORT       PORTC
+#define BUTTON_PIN            9U
+#define BUTTON_PIN_FUNCTION   kPORT_MuxAsGpio
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_PORT             UART0
+#define UART_PIN_CLOCK        kCLOCK_PortA
+#define UART_PIN_PORT         PORTA
+#define UART_PIN_RX           1u
+#define UART_PIN_TX           2u
+#define UART_PIN_FUNCTION     kPORT_MuxAlt2
+#define SOPT5_UART0RXSRC_UART_RX      0x00u   /*!< UART0 receive data source select: UART0_RX pin */
+#define SOPT5_UART0TXSRC_UART_TX      0x00u   /*!< UART0 transmit data source select: UART0_TX pin */
+
+#endif
diff --git a/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk b/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk
index 0d0bceaa4..efd922c5e 100644
--- a/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk
+++ b/hw/bsp/kinetis_kl/boards/frdm_kl25z/board.mk
@@ -8,8 +8,13 @@ CFLAGS += \
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter -Wno-error=format -Wno-error=redundant-decls
 
+SRC_C += \
+	$(BOARD_PATH)/clock_config.c \
+
 # All source paths should be relative to the top level.
-LD_FILE = $(MCU_DIR)/gcc/MKL25Z128xxx4_flash.ld
+LD_FILE = $(FAMILY_PATH)/gcc/MKL25Z128xxx4_flash.ld
+
+SRC_S += $(FAMILY_PATH)/gcc/startup_$(MCU).S
 
 # For flash-jlink target
 JLINK_DEVICE = MKL25Z128xxx4
diff --git a/hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.c b/hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.c
new file mode 100644
index 000000000..1ba35e0dc
--- /dev/null
+++ b/hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.c
@@ -0,0 +1,307 @@
+/*
+ * Copyright (c) 2015, Freescale Semiconductor, Inc.
+ * Copyright 2016-2017 NXP
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of the copyright holder nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * How to setup clock using clock driver functions:
+ *
+ * 1. CLOCK_SetSimSafeDivs, to make sure core clock, bus clock, flexbus clock
+ *    and flash clock are in allowed range during clock mode switch.
+ *
+ * 2. Call CLOCK_Osc0Init to setup OSC clock, if it is used in target mode.
+ *
+ * 3. Set MCG configuration, MCG includes three parts: FLL clock, PLL clock and
+ *    internal reference clock(MCGIRCLK). Follow the steps to setup:
+ *
+ *    1). Call CLOCK_BootToXxxMode to set MCG to target mode.
+ *
+ *    2). If target mode is FBI/BLPI/PBI mode, the MCGIRCLK has been configured
+ *        correctly. For other modes, need to call CLOCK_SetInternalRefClkConfig
+ *        explicitly to setup MCGIRCLK.
+ *
+ *    3). Don't need to configure FLL explicitly, because if target mode is FLL
+ *        mode, then FLL has been configured by the function CLOCK_BootToXxxMode,
+ *        if the target mode is not FLL mode, the FLL is disabled.
+ *
+ *    4). If target mode is PEE/PBE/PEI/PBI mode, then the related PLL has been
+ *        setup by CLOCK_BootToXxxMode. In FBE/FBI/FEE/FBE mode, the PLL could
+ *        be enabled independently, call CLOCK_EnablePll0 explicitly in this case.
+ *
+ * 4. Call CLOCK_SetSimConfig to set the clock configuration in SIM.
+ */
+
+/* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL *****************************
+!!ClocksProfile
+product: Clocks v1.0
+processor: MKL25Z128xxx4
+package_id: MKL25Z128VLK4
+mcu_data: ksdk2_0
+processor_version: 1.1.0
+board: FRDM-KL25Z
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/
+
+#include "fsl_smc.h"
+#include "clock_config.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define MCG_PLL_DISABLE                                   0U  /*!< MCGPLLCLK disabled */
+#define OSC_CAP0P                                         0U  /*!< Oscillator 0pF capacitor load */
+#define OSC_ER_CLK_DISABLE                                0U  /*!< Disable external reference clock */
+#define SIM_OSC32KSEL_LPO_CLK                             3U  /*!< OSC32KSEL select: LPO clock */
+#define SIM_PLLFLLSEL_MCGFLLCLK_CLK                       0U  /*!< PLLFLL select: MCGFLLCLK clock */
+#define SIM_PLLFLLSEL_MCGPLLCLK_CLK                       1U  /*!< PLLFLL select: MCGPLLCLK clock */
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+/* System clock frequency. */
+extern uint32_t SystemCoreClock;
+
+/*******************************************************************************
+ * Code
+******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockRUN();
+}
+
+/*FUNCTION**********************************************************************
+ *
+ * Function Name : CLOCK_CONFIG_SetFllExtRefDiv
+ * Description   : Configure FLL external reference divider (FRDIV).
+ * Param frdiv   : The value to set FRDIV.
+ *
+ *END**************************************************************************/
+static void CLOCK_CONFIG_SetFllExtRefDiv(uint8_t frdiv)
+{
+    MCG->C1 = ((MCG->C1 & ~MCG_C1_FRDIV_MASK) | MCG_C1_FRDIV(frdiv));
+}
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL *****************************
+!!Configuration
+name: BOARD_BootClockRUN
+outputs:
+- {id: Bus_clock.outFreq, value: 24 MHz}
+- {id: Core_clock.outFreq, value: 48 MHz, locked: true, accuracy: '0.001'}
+- {id: ERCLK32K.outFreq, value: 1 kHz}
+- {id: Flash_clock.outFreq, value: 24 MHz}
+- {id: LPO_clock.outFreq, value: 1 kHz}
+- {id: MCGIRCLK.outFreq, value: 32.768 kHz}
+- {id: OSCERCLK.outFreq, value: 8 MHz}
+- {id: PLLFLLCLK.outFreq, value: 48 MHz}
+- {id: System_clock.outFreq, value: 48 MHz}
+settings:
+- {id: MCGMode, value: PEE}
+- {id: MCG.FCRDIV.scale, value: '1', locked: true}
+- {id: MCG.FRDIV.scale, value: '32'}
+- {id: MCG.IREFS.sel, value: MCG.FRDIV}
+- {id: MCG.PLLS.sel, value: MCG.PLL}
+- {id: MCG.PRDIV.scale, value: '2', locked: true}
+- {id: MCG.VDIV.scale, value: '24', locked: true}
+- {id: MCG_C1_IRCLKEN_CFG, value: Enabled}
+- {id: MCG_C2_OSC_MODE_CFG, value: ModeOscLowPower}
+- {id: MCG_C2_RANGE0_CFG, value: High}
+- {id: MCG_C2_RANGE0_FRDIV_CFG, value: High}
+- {id: OSC0_CR_ERCLKEN_CFG, value: Enabled}
+- {id: OSC_CR_ERCLKEN_CFG, value: Enabled}
+- {id: SIM.CLKOUTSEL.sel, value: SIM.OUTDIV4}
+- {id: SIM.OSC32KSEL.sel, value: PMC.LPOCLK}
+- {id: SIM.OUTDIV1.scale, value: '2'}
+- {id: SIM.PLLFLLSEL.sel, value: SIM.MCGPLLCLK_DIV2}
+- {id: SIM.TPMSRCSEL.sel, value: SIM.PLLFLLSEL}
+- {id: SIM.UART0SRCSEL.sel, value: SIM.PLLFLLSEL}
+- {id: SIM.USBSRCSEL.sel, value: SIM.PLLFLLSEL}
+sources:
+- {id: OSC.OSC.outFreq, value: 8 MHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+const mcg_config_t mcgConfig_BOARD_BootClockRUN =
+    {
+        .mcgMode = kMCG_ModePEE,                  /* PEE - PLL Engaged External */
+        .irclkEnableMode = kMCG_IrclkEnable,      /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
+        .ircs = kMCG_IrcSlow,                     /* Slow internal reference clock selected */
+        .fcrdiv = 0x0U,                           /* Fast IRC divider: divided by 1 */
+        .frdiv = 0x0U,                            /* FLL reference clock divider: divided by 32 */
+        .drs = kMCG_DrsLow,                       /* Low frequency range */
+        .dmx32 = kMCG_Dmx32Default,               /* DCO has a default range of 25% */
+        .pll0Config =
+            {
+                .enableMode = MCG_PLL_DISABLE,    /* MCGPLLCLK disabled */
+                .prdiv = 0x1U,                    /* PLL Reference divider: divided by 2 */
+                .vdiv = 0x0U,                     /* VCO divider: multiplied by 24 */
+            },
+    };
+const sim_clock_config_t simConfig_BOARD_BootClockRUN =
+    {
+        .pllFllSel = SIM_PLLFLLSEL_MCGPLLCLK_CLK, /* PLLFLL select: MCGPLLCLK clock */
+        .er32kSrc = SIM_OSC32KSEL_LPO_CLK,        /* OSC32KSEL select: LPO clock */
+        .clkdiv1 = 0x10010000U,                   /* SIM_CLKDIV1 - OUTDIV1: /2, OUTDIV4: /2 */
+    };
+const osc_config_t oscConfig_BOARD_BootClockRUN =
+    {
+        .freq = 8000000U,                         /* Oscillator frequency: 8000000Hz */
+        .capLoad = (OSC_CAP0P),                   /* Oscillator capacity load: 0pF */
+        .workMode = kOSC_ModeOscLowPower,         /* Oscillator low power */
+        .oscerConfig =
+            {
+                .enableMode = kOSC_ErClkEnable,   /* Enable external reference clock, disable external reference clock in STOP mode */
+            }
+    };
+
+/*******************************************************************************
+ * Code for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+void BOARD_BootClockRUN(void)
+{
+    /* Set the system clock dividers in SIM to safe value. */
+    CLOCK_SetSimSafeDivs();
+    /* Initializes OSC0 according to board configuration. */
+    CLOCK_InitOsc0(&oscConfig_BOARD_BootClockRUN);
+    CLOCK_SetXtal0Freq(oscConfig_BOARD_BootClockRUN.freq);
+    /* Configure FLL external reference divider (FRDIV). */
+    CLOCK_CONFIG_SetFllExtRefDiv(mcgConfig_BOARD_BootClockRUN.frdiv);
+    /* Set MCG to PEE mode. */
+    CLOCK_BootToPeeMode(kMCG_OscselOsc,
+                        kMCG_PllClkSelPll0,
+                        &mcgConfig_BOARD_BootClockRUN.pll0Config);
+    /* Configure the Internal Reference clock (MCGIRCLK). */
+    CLOCK_SetInternalRefClkConfig(mcgConfig_BOARD_BootClockRUN.irclkEnableMode,
+                                  mcgConfig_BOARD_BootClockRUN.ircs,
+                                  mcgConfig_BOARD_BootClockRUN.fcrdiv);
+    /* Set the clock configuration in SIM module. */
+    CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN);
+    /* Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
+}
+
+/*******************************************************************************
+ ********************* Configuration BOARD_BootClockVLPR ***********************
+ ******************************************************************************/
+/* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL *****************************
+!!Configuration
+name: BOARD_BootClockVLPR
+outputs:
+- {id: Bus_clock.outFreq, value: 800 kHz}
+- {id: Core_clock.outFreq, value: 4 MHz}
+- {id: ERCLK32K.outFreq, value: 1 kHz}
+- {id: Flash_clock.outFreq, value: 800 kHz}
+- {id: LPO_clock.outFreq, value: 1 kHz}
+- {id: MCGIRCLK.outFreq, value: 4 MHz}
+- {id: System_clock.outFreq, value: 4 MHz}
+settings:
+- {id: MCGMode, value: BLPI}
+- {id: powerMode, value: VLPR}
+- {id: MCG.CLKS.sel, value: MCG.IRCS}
+- {id: MCG.FCRDIV.scale, value: '1', locked: true}
+- {id: MCG.FRDIV.scale, value: '32'}
+- {id: MCG.IRCS.sel, value: MCG.FCRDIV}
+- {id: MCG_C1_IRCLKEN_CFG, value: Enabled}
+- {id: MCG_C2_OSC_MODE_CFG, value: ModeOscLowPower}
+- {id: MCG_C2_RANGE0_CFG, value: High}
+- {id: MCG_C2_RANGE0_FRDIV_CFG, value: High}
+- {id: SIM.OSC32KSEL.sel, value: PMC.LPOCLK}
+- {id: SIM.OUTDIV4.scale, value: '5'}
+sources:
+- {id: OSC.OSC.outFreq, value: 8 MHz}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockVLPR configuration
+ ******************************************************************************/
+const mcg_config_t mcgConfig_BOARD_BootClockVLPR =
+    {
+        .mcgMode = kMCG_ModeBLPI,                 /* BLPI - Bypassed Low Power Internal */
+        .irclkEnableMode = kMCG_IrclkEnable,      /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
+        .ircs = kMCG_IrcFast,                     /* Fast internal reference clock selected */
+        .fcrdiv = 0x0U,                           /* Fast IRC divider: divided by 1 */
+        .frdiv = 0x0U,                            /* FLL reference clock divider: divided by 32 */
+        .drs = kMCG_DrsLow,                       /* Low frequency range */
+        .dmx32 = kMCG_Dmx32Default,               /* DCO has a default range of 25% */
+        .pll0Config =
+            {
+                .enableMode = MCG_PLL_DISABLE,    /* MCGPLLCLK disabled */
+                .prdiv = 0x0U,                    /* PLL Reference divider: divided by 1 */
+                .vdiv = 0x0U,                     /* VCO divider: multiplied by 24 */
+            },
+    };
+const sim_clock_config_t simConfig_BOARD_BootClockVLPR =
+    {
+        .pllFllSel = SIM_PLLFLLSEL_MCGFLLCLK_CLK, /* PLLFLL select: MCGFLLCLK clock */
+        .er32kSrc = SIM_OSC32KSEL_LPO_CLK,        /* OSC32KSEL select: LPO clock */
+        .clkdiv1 = 0x40000U,                      /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /5 */
+    };
+const osc_config_t oscConfig_BOARD_BootClockVLPR =
+    {
+        .freq = 0U,                               /* Oscillator frequency: 0Hz */
+        .capLoad = (OSC_CAP0P),                   /* Oscillator capacity load: 0pF */
+        .workMode = kOSC_ModeOscLowPower,         /* Oscillator low power */
+        .oscerConfig =
+            {
+                .enableMode = OSC_ER_CLK_DISABLE, /* Disable external reference clock */
+            }
+    };
+
+/*******************************************************************************
+ * Code for BOARD_BootClockVLPR configuration
+ ******************************************************************************/
+void BOARD_BootClockVLPR(void)
+{
+    /* Set the system clock dividers in SIM to safe value. */
+    CLOCK_SetSimSafeDivs();
+    /* Set MCG to BLPI mode. */
+    CLOCK_BootToBlpiMode(mcgConfig_BOARD_BootClockVLPR.fcrdiv,
+                         mcgConfig_BOARD_BootClockVLPR.ircs,
+                         mcgConfig_BOARD_BootClockVLPR.irclkEnableMode);
+    /* Set the clock configuration in SIM module. */
+    CLOCK_SetSimConfig(&simConfig_BOARD_BootClockVLPR);
+    /* Set VLPR power mode. */
+    SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll);
+#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
+    SMC_SetPowerModeVlpr(SMC, false);
+#else
+    SMC_SetPowerModeVlpr(SMC);
+#endif
+    while (SMC_GetPowerModeState(SMC) != kSMC_PowerStateVlpr)
+    {
+    }
+    /* Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKVLPR_CORE_CLOCK;
+}
diff --git a/hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.h b/hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.h
new file mode 100644
index 000000000..1033d4e55
--- /dev/null
+++ b/hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.h
@@ -0,0 +1,130 @@
+/*
+ * Copyright (c) 2015, Freescale Semiconductor, Inc.
+ * Copyright 2016-2017 NXP
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * o Redistributions of source code must retain the above copyright notice, this list
+ *   of conditions and the following disclaimer.
+ *
+ * o Redistributions in binary form must reproduce the above copyright notice, this
+ *   list of conditions and the following disclaimer in the documentation and/or
+ *   other materials provided with the distribution.
+ *
+ * o Neither the name of the copyright holder nor the names of its
+ *   contributors may be used to endorse or promote products derived from this
+ *   software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#define BOARD_XTAL0_CLK_HZ                          8000000U  /*!< Board xtal0 frequency in Hz */
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKRUN_CORE_CLOCK              48000000U  /*!< Core clock frequency: 48000000Hz */
+
+/*! @brief MCG set for BOARD_BootClockRUN configuration.
+ */
+extern const mcg_config_t mcgConfig_BOARD_BootClockRUN;
+/*! @brief SIM module set for BOARD_BootClockRUN configuration.
+ */
+extern const sim_clock_config_t simConfig_BOARD_BootClockRUN;
+/*! @brief OSC set for BOARD_BootClockRUN configuration.
+ */
+extern const osc_config_t oscConfig_BOARD_BootClockRUN;
+
+/*******************************************************************************
+ * API for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockRUN(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ********************* Configuration BOARD_BootClockVLPR ***********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockVLPR configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKVLPR_CORE_CLOCK              4000000U  /*!< Core clock frequency: 4000000Hz */
+
+/*! @brief MCG set for BOARD_BootClockVLPR configuration.
+ */
+extern const mcg_config_t mcgConfig_BOARD_BootClockVLPR;
+/*! @brief SIM module set for BOARD_BootClockVLPR configuration.
+ */
+extern const sim_clock_config_t simConfig_BOARD_BootClockVLPR;
+/*! @brief OSC set for BOARD_BootClockVLPR configuration.
+ */
+extern const osc_config_t oscConfig_BOARD_BootClockVLPR;
+
+/*******************************************************************************
+ * API for BOARD_BootClockVLPR configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockVLPR(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/kinetis_kl/boards/frdm_kl25z/frdm_kl25z.c b/hw/bsp/kinetis_kl/family.c
similarity index 74%
rename from hw/bsp/kinetis_kl/boards/frdm_kl25z/frdm_kl25z.c
rename to hw/bsp/kinetis_kl/family.c
index 46f85f6a5..8914078d5 100644
--- a/hw/bsp/kinetis_kl/boards/frdm_kl25z/frdm_kl25z.c
+++ b/hw/bsp/kinetis_kl/family.c
@@ -21,11 +21,10 @@
  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
  */
 
-#include "../board.h"
+#include "bsp/board.h"
+#include "board.h"
 #include "fsl_device_registers.h"
 #include "fsl_gpio.h"
 #include "fsl_port.h"
@@ -47,38 +46,6 @@ void USB0_IRQHandler(void)
 #endif
 }
 
-//--------------------------------------------------------------------+
-// MACRO TYPEDEF CONSTANT ENUM DECLARATION
-//--------------------------------------------------------------------+
-// LED
-#define LED_PINMUX            IOMUXC_GPIO_AD_B0_09_GPIO1_IO09
-#define LED_PORT              GPIOB
-#define LED_PIN_CLOCK         kCLOCK_PortB
-#define LED_PIN_PORT          PORTB
-#define LED_PIN               19U
-#define LED_PIN_FUNCTION      kPORT_MuxAsGpio
-#define LED_STATE_ON          0
-
-// Button
-#define BUTTON_PORT           GPIOC
-#define BUTTON_PIN_CLOCK      kCLOCK_PortC
-#define BUTTON_PIN_PORT       PORTC
-#define BUTTON_PIN            9U
-#define BUTTON_PIN_FUNCTION   kPORT_MuxAsGpio
-#define BUTTON_STATE_ACTIVE   0
-
-// UART
-#define UART_PORT             UART0
-#define UART_PIN_CLOCK        kCLOCK_PortA
-#define UART_PIN_PORT         PORTA
-#define UART_PIN_RX           1u
-#define UART_PIN_TX           2u
-#define UART_PIN_FUNCTION     kPORT_MuxAlt2
-#define SOPT5_UART0RXSRC_UART_RX      0x00u   /*!< UART0 receive data source select: UART0_RX pin */
-#define SOPT5_UART0TXSRC_UART_TX      0x00u   /*!< UART0 transmit data source select: UART0_TX pin */
-
-const uint8_t dcd_data[] = { 0x00 };
-
 void board_init(void)
 {
   BOARD_BootClockRUN();
@@ -139,13 +106,13 @@ void board_init(void)
 
 void board_led_write(bool state)
 {
-  GPIO_WritePinOutput(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
+  GPIO_PinWrite(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
 }
 
 uint32_t board_button_read(void)
 {
 #if defined(BUTTON_PORT) && defined(BUTTON_PIN)
-  return BUTTON_STATE_ACTIVE == GPIO_ReadPinInput(BUTTON_PORT, BUTTON_PIN);
+  return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_PORT, BUTTON_PIN);
 #endif
   return 0;
 }
diff --git a/hw/bsp/kinetis_kl/family.cmake b/hw/bsp/kinetis_kl/family.cmake
new file mode 100644
index 000000000..77b932b8e
--- /dev/null
+++ b/hw/bsp/kinetis_kl/family.cmake
@@ -0,0 +1,126 @@
+include_guard()
+
+if (NOT BOARD)
+  message(FATAL_ERROR "BOARD not specified")
+endif ()
+
+set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
+set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m0plus CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS KINETIS_KL CACHE INTERNAL "")
+
+# enable LTO if supported
+include(CheckIPOSupported)
+check_ipo_supported(RESULT IPO_SUPPORTED)
+if (IPO_SUPPORTED)
+  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+endif ()
+
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    add_library(${BOARD_TARGET} STATIC
+      ${SDK_DIR}/drivers/gpio/fsl_gpio.c
+      ${SDK_DIR}/drivers/lpsci/fsl_lpsci.c
+      ${SDK_DIR}/drivers/uart/fsl_uart.c
+      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
+      ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
+      )
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      )
+    target_include_directories(${BOARD_TARGET} PUBLIC
+      ${CMSIS_DIR}/CMSIS/Core/Include
+      ${SDK_DIR}/devices/${MCU_VARIANT}
+      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+      ${SDK_DIR}/drivers/common
+      ${SDK_DIR}/drivers/gpio
+      ${SDK_DIR}/drivers/lpsci
+      ${SDK_DIR}/drivers/port
+      ${SDK_DIR}/drivers/smc
+      ${SDK_DIR}/drivers/uart
+      )
+
+    update_board(${BOARD_TARGET})
+
+    # LD_FILE and STARTUP_FILE can be defined in board.cmake
+
+    target_sources(${BOARD_TARGET} PUBLIC
+      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+      )
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--script=${LD_FILE_GNU}"
+        # nanolib
+        --specs=nosys.specs
+        --specs=nano.specs
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET)
+  family_configure_common(${TARGET})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # TinyUSB Port
+    ${TOP}/src/portable/nxp/khci/dcd_khci.c
+    ${TOP}/src/portable/nxp/khci/hcd_khci.c
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB
+  family_add_tinyusb(${TARGET} OPT_MCU_KINETIS_KL)
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_flash_jlink(${TARGET})
+  #family_flash_nxplink(${TARGET})
+endfunction()
+
+
+function(family_configure_device_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
+
+function(family_configure_host_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
+
+function(family_configure_dual_usb_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
diff --git a/hw/bsp/kinetis_kl/family.mk b/hw/bsp/kinetis_kl/family.mk
index e805d6dae..2bed6b486 100644
--- a/hw/bsp/kinetis_kl/family.mk
+++ b/hw/bsp/kinetis_kl/family.mk
@@ -1,5 +1,5 @@
-SDK_DIR = hw/mcu/nxp/nxp_sdk
-DEPS_SUBMODULES += $(SDK_DIR)
+SDK_DIR = hw/mcu/nxp/mcux-sdk
+DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
 
 MCU_DIR = $(SDK_DIR)/devices/$(MCU)
 include $(TOP)/$(BOARD_PATH)/board.mk
@@ -18,20 +18,22 @@ SRC_C += \
 	src/portable/nxp/khci/dcd_khci.c \
 	src/portable/nxp/khci/hcd_khci.c \
 	$(MCU_DIR)/system_$(MCU).c \
-	$(MCU_DIR)/project_template/clock_config.c \
 	$(MCU_DIR)/drivers/fsl_clock.c \
-	$(MCU_DIR)/drivers/fsl_gpio.c \
-	$(MCU_DIR)/drivers/fsl_lpsci.c \
-	$(MCU_DIR)/drivers/fsl_uart.c
+	$(SDK_DIR)/drivers/gpio/fsl_gpio.c \
+	$(SDK_DIR)/drivers/lpsci/fsl_lpsci.c \
+	$(SDK_DIR)/drivers/uart/fsl_uart.c \
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
-	$(TOP)/$(SDK_DIR)/CMSIS/Include \
+	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
 	$(TOP)/$(MCU_DIR) \
-	$(TOP)/$(MCU_DIR)/project_template \
-	$(TOP)/$(MCU_DIR)/drivers
-
-SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S
+	$(TOP)/$(MCU_DIR)/drivers \
+	$(TOP)/$(SDK_DIR)/drivers/common \
+	$(TOP)/$(SDK_DIR)/drivers/gpio \
+	$(TOP)/$(SDK_DIR)/drivers/lpsci \
+	$(TOP)/$(SDK_DIR)/drivers/port \
+	$(TOP)/$(SDK_DIR)/drivers/smc \
+	$(TOP)/$(SDK_DIR)/drivers/uart \
 
 # For freeRTOS port source
 FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
diff --git a/hw/bsp/kinetis_kl/gcc/MKL25Z128xxx4_flash.ld b/hw/bsp/kinetis_kl/gcc/MKL25Z128xxx4_flash.ld
new file mode 100644
index 000000000..b38aa827c
--- /dev/null
+++ b/hw/bsp/kinetis_kl/gcc/MKL25Z128xxx4_flash.ld
@@ -0,0 +1,253 @@
+/*
+** ###################################################################
+**     Processors:          MKL25Z128VFM4
+**                          MKL25Z128VFT4
+**                          MKL25Z128VLH4
+**                          MKL25Z128VLK4
+**
+**     Compiler:            GNU C Compiler
+**     Reference manual:    KL25P80M48SF0RM, Rev.3, Sep 2012
+**     Version:             rev. 2.5, 2015-02-19
+**     Build:               b170214
+**
+**     Abstract:
+**         Linker file for the GNU C Compiler
+**
+**     Copyright 2016 Freescale Semiconductor, Inc.
+**     Copyright 2016-2017 NXP
+**     Redistribution and use in source and binary forms, with or without modification,
+**     are permitted provided that the following conditions are met:
+**
+**     o Redistributions of source code must retain the above copyright notice, this list
+**       of conditions and the following disclaimer.
+**
+**     o Redistributions in binary form must reproduce the above copyright notice, this
+**       list of conditions and the following disclaimer in the documentation and/or
+**       other materials provided with the distribution.
+**
+**     o Neither the name of the copyright holder nor the names of its
+**       contributors may be used to endorse or promote products derived from this
+**       software without specific prior written permission.
+**
+**     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+**     ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+**     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+**     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+**     ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+**     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+**     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+**     ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+**     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+**     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+**     http:                 www.nxp.com
+**     mail:                 support@nxp.com
+**
+** ###################################################################
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x0400;
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
+M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0200 : 0x0;
+
+/* Specify the memory areas */
+MEMORY
+{
+  m_interrupts          (RX)  : ORIGIN = 0x00000000, LENGTH = 0x00000200
+  m_flash_config        (RX)  : ORIGIN = 0x00000400, LENGTH = 0x00000010
+  m_text                (RX)  : ORIGIN = 0x00000410, LENGTH = 0x0001FBF0
+  m_data                (RW)  : ORIGIN = 0x1FFFF000, LENGTH = 0x00004000
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into internal flash */
+  .interrupts :
+  {
+    __VECTOR_TABLE = .;
+    . = ALIGN(4);
+    KEEP(*(.isr_vector))     /* Startup code */
+    . = ALIGN(4);
+  } > m_interrupts
+
+  .flash_config :
+  {
+    . = ALIGN(4);
+    KEEP(*(.FlashConfig))    /* Flash Configuration Field (FCF) */
+    . = ALIGN(4);
+  } > m_flash_config
+
+  /* The program code and other data goes into internal flash */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)                 /* .text sections (code) */
+    *(.text*)                /* .text* sections (code) */
+    *(.rodata)               /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)              /* .rodata* sections (constants, strings, etc.) */
+    *(.glue_7)               /* glue arm to thumb code */
+    *(.glue_7t)              /* glue thumb to arm code */
+    *(.eh_frame)
+    KEEP (*(.init))
+    KEEP (*(.fini))
+    . = ALIGN(4);
+  } > m_text
+
+  .ARM.extab :
+  {
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+  } > m_text
+
+  .ARM :
+  {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } > m_text
+
+ .ctors :
+  {
+    __CTOR_LIST__ = .;
+    /* gcc uses crtbegin.o to find the start of
+       the constructors, so we make sure it is
+       first.  Because this is a wildcard, it
+       doesn't matter if the user does not
+       actually link against crtbegin.o; the
+       linker won't look for a file to match a
+       wildcard.  The wildcard also means that it
+       doesn't matter which directory crtbegin.o
+       is in.  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*crtbegin?.o(.ctors))
+    /* We don't want to include the .ctor section from
+       from the crtend.o file until after the sorted ctors.
+       The .ctor section from the crtend file contains the
+       end of ctors marker and it must be last */
+    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    __CTOR_END__ = .;
+  } > m_text
+
+  .dtors :
+  {
+    __DTOR_LIST__ = .;
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*crtbegin?.o(.dtors))
+    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    __DTOR_END__ = .;
+  } > m_text
+
+  .preinit_array :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } > m_text
+
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } > m_text
+
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } > m_text
+
+  __etext = .;    /* define a global symbol at end of code */
+  __DATA_ROM = .; /* Symbol is used by startup for data initialization */
+
+  /* reserve MTB memory at the beginning of m_data */
+  .mtb : /* MTB buffer address as defined by the hardware */
+  {
+    . = ALIGN(8);
+    _mtb_start = .;
+    KEEP(*(.mtb_buf)) /* need to KEEP Micro Trace Buffer as not referenced by application */
+    . = ALIGN(8);
+    _mtb_end = .;
+  } > m_data
+
+  .interrupts_ram :
+  {
+    . = ALIGN(4);
+    __VECTOR_RAM__ = .;
+    __interrupts_ram_start__ = .; /* Create a global symbol at data start */
+    *(.m_interrupts_ram)     /* This is a user defined section */
+    . += M_VECTOR_RAM_SIZE;
+    . = ALIGN(4);
+    __interrupts_ram_end__ = .; /* Define a global symbol at data end */
+  } > m_data
+
+  __VECTOR_RAM = DEFINED(__ram_vector_table__) ? __VECTOR_RAM__ : ORIGIN(m_interrupts);
+  __RAM_VECTOR_TABLE_SIZE_BYTES = DEFINED(__ram_vector_table__) ? (__interrupts_ram_end__ - __interrupts_ram_start__) : 0x0;
+
+  .data : AT(__DATA_ROM)
+  {
+    . = ALIGN(4);
+    __DATA_RAM = .;
+    __data_start__ = .;      /* create a global symbol at data start */
+    *(.data)                 /* .data sections */
+    *(.data*)                /* .data* sections */
+    KEEP(*(.jcr*))
+    . = ALIGN(4);
+    __data_end__ = .;        /* define a global symbol at data end */
+  } > m_data
+
+  __DATA_END = __DATA_ROM + (__data_end__ - __data_start__);
+  text_end = ORIGIN(m_text) + LENGTH(m_text);
+  ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
+
+  /* Uninitialized data section */
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    . = ALIGN(4);
+    __START_BSS = .;
+    __bss_start__ = .;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+    . = ALIGN(4);
+    __bss_end__ = .;
+    __END_BSS = .;
+  } > m_data
+
+  .heap :
+  {
+    . = ALIGN(8);
+    __end__ = .;
+    PROVIDE(end = .);
+    __HeapBase = .;
+    . += HEAP_SIZE;
+    __HeapLimit = .;
+    __heap_limit = .; /* Add for _sbrk */
+  } > m_data
+
+  .stack :
+  {
+    . = ALIGN(8);
+    . += STACK_SIZE;
+  } > m_data
+
+  /* Initializes stack on the end of block */
+  __StackTop   = ORIGIN(m_data) + LENGTH(m_data);
+  __StackLimit = __StackTop - STACK_SIZE;
+  PROVIDE(__stack = __StackTop);
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+
+  ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
+}
diff --git a/hw/bsp/kinetis_kl/gcc/startup_MKL25Z4.S b/hw/bsp/kinetis_kl/gcc/startup_MKL25Z4.S
new file mode 100644
index 000000000..dc1438f3a
--- /dev/null
+++ b/hw/bsp/kinetis_kl/gcc/startup_MKL25Z4.S
@@ -0,0 +1,383 @@
+/* ---------------------------------------------------------------------------------------*/
+/*  @file:    startup_MKL25Z4.s                                                           */
+/*  @purpose: CMSIS Cortex-M0P Core Device Startup File                                   */
+/*            MKL25Z4                                                                     */
+/*  @version: 2.5                                                                         */
+/*  @date:    2015-2-19                                                                   */
+/*  @build:   b170112                                                                     */
+/* ---------------------------------------------------------------------------------------*/
+/*                                                                                        */
+/* Copyright (c) 1997 - 2016, Freescale Semiconductor, Inc.                               */
+/* Copyright 2016 - 2017 NXP                                                              */
+/* Redistribution and use in source and binary forms, with or without modification,       */
+/* are permitted provided that the following conditions are met:                          */
+/*                                                                                        */
+/* o Redistributions of source code must retain the above copyright notice, this list     */
+/*   of conditions and the following disclaimer.                                          */
+/*                                                                                        */
+/* o Redistributions in binary form must reproduce the above copyright notice, this       */
+/*   list of conditions and the following disclaimer in the documentation and/or          */
+/*   other materials provided with the distribution.                                      */
+/*                                                                                        */
+/* o Neither the name of the copyright holder nor the names of its                        */
+/*   contributors may be used to endorse or promote products derived from this            */
+/*   software without specific prior written permission.                                  */
+/*                                                                                        */
+/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND        */
+/* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED          */
+/* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE                 */
+/* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR       */
+/* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES         */
+/* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;           */
+/* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON         */
+/* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT                */
+/* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS          */
+/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                           */
+/*****************************************************************************/
+/* Version: GCC for ARM Embedded Processors                                  */
+/*****************************************************************************/
+    .syntax unified
+    .arch armv6-m
+
+    .section .isr_vector, "a"
+    .align 2
+    .globl __isr_vector
+__isr_vector:
+    .long   __StackTop                                      /* Top of Stack */
+    .long   Reset_Handler                                   /* Reset Handler */
+    .long   NMI_Handler                                     /* NMI Handler*/
+    .long   HardFault_Handler                               /* Hard Fault Handler*/
+    .long   0                                               /* Reserved*/
+    .long   0                                               /* Reserved*/
+    .long   0                                               /* Reserved*/
+    .long   0                                               /* Reserved*/
+    .long   0                                               /* Reserved*/
+    .long   0                                               /* Reserved*/
+    .long   0                                               /* Reserved*/
+    .long   SVC_Handler                                     /* SVCall Handler*/
+    .long   0                                               /* Reserved*/
+    .long   0                                               /* Reserved*/
+    .long   PendSV_Handler                                  /* PendSV Handler*/
+    .long   SysTick_Handler                                 /* SysTick Handler*/
+
+                                                            /* External Interrupts*/
+    .long   DMA0_IRQHandler                                 /* DMA channel 0 transfer complete*/
+    .long   DMA1_IRQHandler                                 /* DMA channel 1 transfer complete*/
+    .long   DMA2_IRQHandler                                 /* DMA channel 2 transfer complete*/
+    .long   DMA3_IRQHandler                                 /* DMA channel 3 transfer complete*/
+    .long   Reserved20_IRQHandler                           /* Reserved interrupt*/
+    .long   FTFA_IRQHandler                                 /* Command complete and read collision*/
+    .long   LVD_LVW_IRQHandler                              /* Low-voltage detect, low-voltage warning*/
+    .long   LLWU_IRQHandler                                 /* Low leakage wakeup Unit*/
+    .long   I2C0_IRQHandler                                 /* I2C0 interrupt*/
+    .long   I2C1_IRQHandler                                 /* I2C1 interrupt*/
+    .long   SPI0_IRQHandler                                 /* SPI0 single interrupt vector for all sources*/
+    .long   SPI1_IRQHandler                                 /* SPI1 single interrupt vector for all sources*/
+    .long   UART0_IRQHandler                                /* UART0 status and error*/
+    .long   UART1_IRQHandler                                /* UART1 status and error*/
+    .long   UART2_IRQHandler                                /* UART2 status and error*/
+    .long   ADC0_IRQHandler                                 /* ADC0 interrupt*/
+    .long   CMP0_IRQHandler                                 /* CMP0 interrupt*/
+    .long   TPM0_IRQHandler                                 /* TPM0 single interrupt vector for all sources*/
+    .long   TPM1_IRQHandler                                 /* TPM1 single interrupt vector for all sources*/
+    .long   TPM2_IRQHandler                                 /* TPM2 single interrupt vector for all sources*/
+    .long   RTC_IRQHandler                                  /* RTC alarm*/
+    .long   RTC_Seconds_IRQHandler                          /* RTC seconds*/
+    .long   PIT_IRQHandler                                  /* PIT interrupt*/
+    .long   Reserved39_IRQHandler                           /* Reserved interrupt*/
+    .long   USB0_IRQHandler                                 /* USB0 interrupt*/
+    .long   DAC0_IRQHandler                                 /* DAC0 interrupt*/
+    .long   TSI0_IRQHandler                                 /* TSI0 interrupt*/
+    .long   MCG_IRQHandler                                  /* MCG interrupt*/
+    .long   LPTMR0_IRQHandler                               /* LPTMR0 interrupt*/
+    .long   Reserved45_IRQHandler                           /* Reserved interrupt*/
+    .long   PORTA_IRQHandler                                /* PORTA Pin detect*/
+    .long   PORTD_IRQHandler                                /* PORTD Pin detect*/
+
+    .size    __isr_vector, . - __isr_vector
+
+/* Flash Configuration */
+    .section .FlashConfig, "a"
+    .long 0xFFFFFFFF
+    .long 0xFFFFFFFF
+    .long 0xFFFFFFFF
+    .long 0xFFFFFFFE
+
+    .text
+    .thumb
+
+/* Reset Handler */
+
+    .thumb_func
+    .align 2
+    .globl   Reset_Handler
+    .weak    Reset_Handler
+    .type    Reset_Handler, %function
+Reset_Handler:
+    cpsid   i               /* Mask interrupts */
+    .equ    VTOR, 0xE000ED08
+    ldr     r0, =VTOR
+    ldr     r1, =__isr_vector
+    str     r1, [r0]
+    ldr     r2, [r1]
+    msr     msp, r2
+#ifndef __NO_SYSTEM_INIT
+    ldr   r0,=SystemInit
+    blx   r0
+#endif
+/*     Loop to copy data from read only memory to RAM. The ranges
+ *      of copy from/to are specified by following symbols evaluated in
+ *      linker script.
+ *      __etext: End of code section, i.e., begin of data sections to copy from.
+ *      __data_start__/__data_end__: RAM address range that data should be
+ *      copied to. Both must be aligned to 4 bytes boundary.  */
+
+    ldr    r1, =__etext
+    ldr    r2, =__data_start__
+    ldr    r3, =__data_end__
+
+    subs    r3, r2
+    ble     .LC0
+
+.LC1:
+    subs    r3, 4
+    ldr    r0, [r1,r3]
+    str    r0, [r2,r3]
+    bgt    .LC1
+.LC0:
+
+#ifdef __STARTUP_CLEAR_BSS
+/*     This part of work usually is done in C library startup code. Otherwise,
+ *     define this macro to enable it in this startup.
+ *
+ *     Loop to zero out BSS section, which uses following symbols
+ *     in linker script:
+ *      __bss_start__: start of BSS section. Must align to 4
+ *      __bss_end__: end of BSS section. Must align to 4
+ */
+    ldr r1, =__bss_start__
+    ldr r2, =__bss_end__
+
+    subs    r2, r1
+    ble .LC3
+
+    movs    r0, 0
+.LC2:
+    str r0, [r1, r2]
+    subs    r2, 4
+    bge .LC2
+.LC3:
+#endif
+    cpsie   i               /* Unmask interrupts */
+#ifndef __START
+#define __START _start
+#endif
+#ifndef __ATOLLIC__
+    ldr   r0,=__START
+    blx   r0
+#else
+    ldr   r0,=__libc_init_array
+    blx   r0
+    ldr   r0,=main
+    bx    r0
+#endif
+    .pool
+    .size Reset_Handler, . - Reset_Handler
+
+    .align  1
+    .thumb_func
+    .weak DefaultISR
+    .type DefaultISR, %function
+DefaultISR:
+    ldr r0, =DefaultISR
+    bx r0
+    .size DefaultISR, . - DefaultISR
+
+    .align 1
+    .thumb_func
+    .weak NMI_Handler
+    .type NMI_Handler, %function
+NMI_Handler:
+    ldr   r0,=NMI_Handler
+    bx    r0
+    .size NMI_Handler, . - NMI_Handler
+
+    .align 1
+    .thumb_func
+    .weak HardFault_Handler
+    .type HardFault_Handler, %function
+HardFault_Handler:
+    ldr   r0,=HardFault_Handler
+    bx    r0
+    .size HardFault_Handler, . - HardFault_Handler
+
+    .align 1
+    .thumb_func
+    .weak SVC_Handler
+    .type SVC_Handler, %function
+SVC_Handler:
+    ldr   r0,=SVC_Handler
+    bx    r0
+    .size SVC_Handler, . - SVC_Handler
+
+    .align 1
+    .thumb_func
+    .weak PendSV_Handler
+    .type PendSV_Handler, %function
+PendSV_Handler:
+    ldr   r0,=PendSV_Handler
+    bx    r0
+    .size PendSV_Handler, . - PendSV_Handler
+
+    .align 1
+    .thumb_func
+    .weak SysTick_Handler
+    .type SysTick_Handler, %function
+SysTick_Handler:
+    ldr   r0,=SysTick_Handler
+    bx    r0
+    .size SysTick_Handler, . - SysTick_Handler
+
+    .align 1
+    .thumb_func
+    .weak DMA0_IRQHandler
+    .type DMA0_IRQHandler, %function
+DMA0_IRQHandler:
+    ldr   r0,=DMA0_DriverIRQHandler
+    bx    r0
+    .size DMA0_IRQHandler, . - DMA0_IRQHandler
+
+    .align 1
+    .thumb_func
+    .weak DMA1_IRQHandler
+    .type DMA1_IRQHandler, %function
+DMA1_IRQHandler:
+    ldr   r0,=DMA1_DriverIRQHandler
+    bx    r0
+    .size DMA1_IRQHandler, . - DMA1_IRQHandler
+
+    .align 1
+    .thumb_func
+    .weak DMA2_IRQHandler
+    .type DMA2_IRQHandler, %function
+DMA2_IRQHandler:
+    ldr   r0,=DMA2_DriverIRQHandler
+    bx    r0
+    .size DMA2_IRQHandler, . - DMA2_IRQHandler
+
+    .align 1
+    .thumb_func
+    .weak DMA3_IRQHandler
+    .type DMA3_IRQHandler, %function
+DMA3_IRQHandler:
+    ldr   r0,=DMA3_DriverIRQHandler
+    bx    r0
+    .size DMA3_IRQHandler, . - DMA3_IRQHandler
+
+    .align 1
+    .thumb_func
+    .weak I2C0_IRQHandler
+    .type I2C0_IRQHandler, %function
+I2C0_IRQHandler:
+    ldr   r0,=I2C0_DriverIRQHandler
+    bx    r0
+    .size I2C0_IRQHandler, . - I2C0_IRQHandler
+
+    .align 1
+    .thumb_func
+    .weak I2C1_IRQHandler
+    .type I2C1_IRQHandler, %function
+I2C1_IRQHandler:
+    ldr   r0,=I2C1_DriverIRQHandler
+    bx    r0
+    .size I2C1_IRQHandler, . - I2C1_IRQHandler
+
+    .align 1
+    .thumb_func
+    .weak SPI0_IRQHandler
+    .type SPI0_IRQHandler, %function
+SPI0_IRQHandler:
+    ldr   r0,=SPI0_DriverIRQHandler
+    bx    r0
+    .size SPI0_IRQHandler, . - SPI0_IRQHandler
+
+    .align 1
+    .thumb_func
+    .weak SPI1_IRQHandler
+    .type SPI1_IRQHandler, %function
+SPI1_IRQHandler:
+    ldr   r0,=SPI1_DriverIRQHandler
+    bx    r0
+    .size SPI1_IRQHandler, . - SPI1_IRQHandler
+
+    .align 1
+    .thumb_func
+    .weak UART0_IRQHandler
+    .type UART0_IRQHandler, %function
+UART0_IRQHandler:
+    ldr   r0,=UART0_DriverIRQHandler
+    bx    r0
+    .size UART0_IRQHandler, . - UART0_IRQHandler
+
+    .align 1
+    .thumb_func
+    .weak UART1_IRQHandler
+    .type UART1_IRQHandler, %function
+UART1_IRQHandler:
+    ldr   r0,=UART1_DriverIRQHandler
+    bx    r0
+    .size UART1_IRQHandler, . - UART1_IRQHandler
+
+    .align 1
+    .thumb_func
+    .weak UART2_IRQHandler
+    .type UART2_IRQHandler, %function
+UART2_IRQHandler:
+    ldr   r0,=UART2_DriverIRQHandler
+    bx    r0
+    .size UART2_IRQHandler, . - UART2_IRQHandler
+
+
+/*    Macro to define default handlers. Default handler
+ *    will be weak symbol and just dead loops. They can be
+ *    overwritten by other handlers */
+    .macro def_irq_handler  handler_name
+    .weak \handler_name
+    .set  \handler_name, DefaultISR
+    .endm
+
+/* Exception Handlers */
+    def_irq_handler    DMA0_DriverIRQHandler
+    def_irq_handler    DMA1_DriverIRQHandler
+    def_irq_handler    DMA2_DriverIRQHandler
+    def_irq_handler    DMA3_DriverIRQHandler
+    def_irq_handler    Reserved20_IRQHandler
+    def_irq_handler    FTFA_IRQHandler
+    def_irq_handler    LVD_LVW_IRQHandler
+    def_irq_handler    LLWU_IRQHandler
+    def_irq_handler    I2C0_DriverIRQHandler
+    def_irq_handler    I2C1_DriverIRQHandler
+    def_irq_handler    SPI0_DriverIRQHandler
+    def_irq_handler    SPI1_DriverIRQHandler
+    def_irq_handler    UART0_DriverIRQHandler
+    def_irq_handler    UART1_DriverIRQHandler
+    def_irq_handler    UART2_DriverIRQHandler
+    def_irq_handler    ADC0_IRQHandler
+    def_irq_handler    CMP0_IRQHandler
+    def_irq_handler    TPM0_IRQHandler
+    def_irq_handler    TPM1_IRQHandler
+    def_irq_handler    TPM2_IRQHandler
+    def_irq_handler    RTC_IRQHandler
+    def_irq_handler    RTC_Seconds_IRQHandler
+    def_irq_handler    PIT_IRQHandler
+    def_irq_handler    Reserved39_IRQHandler
+    def_irq_handler    USB0_IRQHandler
+    def_irq_handler    DAC0_IRQHandler
+    def_irq_handler    TSI0_IRQHandler
+    def_irq_handler    MCG_IRQHandler
+    def_irq_handler    LPTMR0_IRQHandler
+    def_irq_handler    Reserved45_IRQHandler
+    def_irq_handler    PORTA_IRQHandler
+    def_irq_handler    PORTD_IRQHandler
+
+    .end
diff --git a/tools/get_deps.py b/tools/get_deps.py
index b4739e940..7e798cf9e 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -53,9 +53,6 @@ deps_optional = {
     'hw/mcu/nxp/mcux-sdk': ['https://github.com/hathach/mcux-sdk.git',
                             '950819b7de9b32f92c3edf396bc5ffb8d66e7009',
                             'kinetis_k32l lpc51 lpc54 lpc55 mcx imxrt'],
-    'hw/mcu/nxp/nxp_sdk': ['https://github.com/hathach/nxp_sdk.git',
-                           '845c8fc49b6fb660f06a5c45225494eacb06f00c',
-                           'kinetis_kl'],
     'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git',
                                          'c3715ce94b6f6391856de56081d4d9b3e98fa93d',
                                          'rp2040'],
diff --git a/tools/get_family_deps.py b/tools/get_family_deps.py
deleted file mode 100644
index 071d7b756..000000000
--- a/tools/get_family_deps.py
+++ /dev/null
@@ -1,21 +0,0 @@
-import sys
-import subprocess
-import os
-
-# TOP is tinyusb root dir
-TOP = os.path.dirname(os.path.dirname(os.path.abspath(__file__)))
-
-def get_family_dep(family):
-    for entry in os.scandir("{}/hw/bsp/{}/boards".format(TOP, family)):
-        if entry.is_dir():
-            result = subprocess.run("make -C {}/examples/device/board_test BOARD={} get-deps".format(TOP, entry.name),
-                                    shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
-            print(result.stdout.decode("utf-8"))
-            return result.returncode
-
-
-status = 0
-for d in sys.argv[1:]:
-    status += get_family_dep(d)
-
-sys.exit(status)

From d70403f1f496f5853251f83392ffe80130255489 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 15 Jun 2023 13:06:27 +0700
Subject: [PATCH 415/691] refactor khci to chipidea fs driver for device (host
 is not yet)

---
 .idea/cmake.xml                             |   3 +-
 .idea/runConfigurations/mcx947_jlink.xml    |   2 +-
 .idea/runConfigurations/rt1010_jlink.xml    |   2 +-
 .idea/runConfigurations/rt1060_jlink.xml    |   2 +-
 hw/bsp/kinetis_kl/family.cmake              |   2 +-
 hw/bsp/mcx/boards/mcxn947brk/board.cmake    |   8 +-
 hw/bsp/mcx/family.c                         |  27 +-
 hw/bsp/mcx/family.cmake                     |   4 +-
 hw/bsp/mcx/family.mk                        |  19 +-
 src/common/tusb_mcu.h                       |   6 +-
 src/portable/chipidea/ci_fs/ci_fs_kinetis.h |  51 ++
 src/portable/chipidea/ci_fs/ci_fs_mcx.h     |  47 ++
 src/portable/chipidea/ci_fs/ci_fs_type.h    | 118 +++++
 src/portable/chipidea/ci_fs/dcd_ci_fs.c     | 555 ++++++++++++++++++++
 14 files changed, 805 insertions(+), 41 deletions(-)
 create mode 100644 src/portable/chipidea/ci_fs/ci_fs_kinetis.h
 create mode 100644 src/portable/chipidea/ci_fs/ci_fs_mcx.h
 create mode 100644 src/portable/chipidea/ci_fs/ci_fs_type.h
 create mode 100644 src/portable/chipidea/ci_fs/dcd_ci_fs.c

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 3c016ccff..c9024715c 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -2,7 +2,7 @@
 <project version="4">
   <component name="CMakeSharedSettings">
     <configurations>
-      <configuration PROFILE_NAME="mcxn947" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=mcx -DBOARD=mcxn947brk" />
+      <configuration PROFILE_NAME="mcxn947" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=mcx -DBOARD=mcxn947brk -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10056" />
       <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10095" />
       <configuration PROFILE_NAME="esp32s2" ENABLED="false" GENERATION_OPTIONS="-DFAMILY=espressif -DBOARD=espressif_saola_1 -DIDF_TARGET=esp32s2">
@@ -37,6 +37,7 @@
       <configuration PROFILE_NAME="stm32g474nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g4 -DBOARD=stm32g474nucleo" />
       <configuration PROFILE_NAME="b_g474e_dpow1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g4 -DBOARD=b_g474e_dpow1 -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="b_g474e_dpow1 iar" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g4 -DBOARD=b_g474e_dpow1 -DTOOLCHAIN=iar" />
+      <configuration PROFILE_NAME="frdm_kl25z" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=kinetis_kl -DBOARD=frdm_kl25z -DLOG=3 -DLOGGER=RTT" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/.idea/runConfigurations/mcx947_jlink.xml b/.idea/runConfigurations/mcx947_jlink.xml
index 71616ab70..27661bec5 100644
--- a/.idea/runConfigurations/mcx947_jlink.xml
+++ b/.idea/runConfigurations/mcx947_jlink.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="mcx947 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MCXN947_M33_0&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/mcx/mcx.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcxn947" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="mcx947 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MCXN947_M33_0&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/mcx/mcx.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/rt1010_jlink.xml b/.idea/runConfigurations/rt1010_jlink.xml
index e660a46ae..68ebb8885 100644
--- a/.idea/runConfigurations/rt1010_jlink.xml
+++ b/.idea/runConfigurations/rt1010_jlink.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rt1010 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1011xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="b_g474e_dpow1" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="rt1010 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1011xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="frdm_kl25z" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/rt1060_jlink.xml b/.idea/runConfigurations/rt1060_jlink.xml
index b9a47a2ce..014a4d1b1 100644
--- a/.idea/runConfigurations/rt1060_jlink.xml
+++ b/.idea/runConfigurations/rt1060_jlink.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rt1060 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1062xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="b_g474e_dpow1" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="rt1060 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1062xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/hw/bsp/kinetis_kl/family.cmake b/hw/bsp/kinetis_kl/family.cmake
index 77b932b8e..f491b3dee 100644
--- a/hw/bsp/kinetis_kl/family.cmake
+++ b/hw/bsp/kinetis_kl/family.cmake
@@ -88,7 +88,7 @@ function(family_configure_example TARGET)
   # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
     # TinyUSB Port
-    ${TOP}/src/portable/nxp/khci/dcd_khci.c
+    ${TOP}/src/portable/chipidea/ci_fs/dcd_ci_fs.c
     ${TOP}/src/portable/nxp/khci/hcd_khci.c
     # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
diff --git a/hw/bsp/mcx/boards/mcxn947brk/board.cmake b/hw/bsp/mcx/boards/mcxn947brk/board.cmake
index 650f10967..8c3280743 100644
--- a/hw/bsp/mcx/boards/mcxn947brk/board.cmake
+++ b/hw/bsp/mcx/boards/mcxn947brk/board.cmake
@@ -5,12 +5,14 @@ set(JLINK_DEVICE MCXN947_M33_0)
 set(PYOCD_TARGET MCXN947)
 set(NXPLINK_DEVICE MCXN947:MCXN947)
 
+set(PORT 1)
+
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     CPU_MCXN947VDF_cm33_core0
-    # port 1 is highspeed
-    BOARD_TUD_RHPORT=1
-    BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+    BOARD_TUD_RHPORT=${PORT}
+    # port 0 is fullspeed, port 1 is highspeed
+    BOARD_TUD_MAX_SPEED=$<IF:${PORT},OPT_MODE_HIGH_SPEED,OPT_MODE_FULL_SPEED>
     )
   target_sources(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
diff --git a/hw/bsp/mcx/family.c b/hw/bsp/mcx/family.c
index 36d2f2d0a..4344ffc4e 100644
--- a/hw/bsp/mcx/family.c
+++ b/hw/bsp/mcx/family.c
@@ -66,6 +66,7 @@ void board_init(void)
 {
   BOARD_InitPins();
   BOARD_InitBootClocks();
+  CLOCK_SetupExtClocking(XTAL0_CLK_HZ);
 
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
@@ -122,31 +123,13 @@ void board_init(void)
   // USB VBUS
   /* PORT0 PIN22 configured as USB0_VBUS */
 
-  CLOCK_SetupExtClocking(XTAL0_CLK_HZ);
-
 #if PORT_SUPPORT_DEVICE(0)
   // Port0 is Full Speed
 
-  /* Turn on USB0 Phy */
-  POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY);
-
-  /* reset the IP to make sure it's in reset state. */
-  RESET_PeripheralReset(kUSB0D_RST_SHIFT_RSTn);
-  RESET_PeripheralReset(kUSB0HSL_RST_SHIFT_RSTn);
-  RESET_PeripheralReset(kUSB0HMR_RST_SHIFT_RSTn);
-
-  // Enable USB Clock Adjustments to trim the FRO for the full speed controller
-  ANACTRL->FRO192M_CTRL |= ANACTRL_FRO192M_CTRL_USBCLKADJ_MASK;
-  CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 1, false);
-  CLOCK_AttachClk(kFRO_HF_to_USB0_CLK);
-
-  /*According to reference manual, device mode setting has to be set by access usb host register */
-  CLOCK_EnableClock(kCLOCK_Usbhsl0);  // enable usb0 host clock
-  USBFSH->PORTMODE |= USBFSH_PORTMODE_DEV_ENABLE_MASK;
-  CLOCK_DisableClock(kCLOCK_Usbhsl0); // disable usb0 host clock
-
-  /* enable USB Device clock */
-  CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbfsSrcFro, CLOCK_GetFreq(kCLOCK_FroHf));
+  CLOCK_AttachClk(kCLK_48M_to_USB0);
+  CLOCK_EnableClock(kCLOCK_Usb0Ram);
+  CLOCK_EnableClock(kCLOCK_Usb0Fs);
+  CLOCK_EnableUsbfsClock();
 #endif
 
 #if PORT_SUPPORT_DEVICE(1)
diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake
index 1c85b51f8..7c5feaecf 100644
--- a/hw/bsp/mcx/family.cmake
+++ b/hw/bsp/mcx/family.cmake
@@ -88,8 +88,8 @@ function(family_configure_example TARGET)
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # TinyUSB Port
-    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+    # TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS
+    ${TOP}/src/portable/chipidea/$<IF:${PORT},ci_hs/dcd_ci_hs.c,ci_fs/dcd_ci_fs.c>
     # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
diff --git a/hw/bsp/mcx/family.mk b/hw/bsp/mcx/family.mk
index 2cd4c2448..2722c2038 100644
--- a/hw/bsp/mcx/family.mk
+++ b/hw/bsp/mcx/family.mk
@@ -16,21 +16,24 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_MCXN9 \
   -DBOARD_TUD_RHPORT=$(PORT) \
 
-ifeq ($(PORT), 1)
-  $(info "PORT1 High Speed")
-  CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
-else
-  $(info "PORT0 Full Speed")
-endif
-
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration
 
 # All source paths should be relative to the top level.
 LD_FILE ?= $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld
 
+# TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS
+ifeq ($(PORT), 1)
+  $(info "PORT1 High Speed")
+  CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+	SRC_C += src/portable/chipidea/ci_hs/dcd_ci_hs.c
+else
+  $(info "PORT0 Full Speed")
+  CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
+  SRC_C += src/portable/chipidea/ci_fs/dcd_ci_fs.c
+endif
+
 SRC_C += \
-	src/portable/chipidea/ci_hs/dcd_ci_hs.c \
 	$(SDK_DIR)/devices/$(MCU_VARIANT)/system_$(MCU_CORE).c \
 	$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_clock.c \
 	$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_reset.c \
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index f89467e75..485d6168d 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -79,7 +79,11 @@
   #define TUP_RHPORT_HIGHSPEED    1
 
 #elif TU_CHECK_MCU(OPT_MCU_MCXN9)
-  // NOTE: MCXN943 port 1 use chipidea HS, port 0 use chipidea FS
+  // USB0 is chipidea FS
+  #define TUP_USBIP_CHIPIDEA_FS
+  #define TUP_USBIP_CHIPIDEA_FS_MCX
+
+  // USB1 is chipidea HS
   #define TUP_USBIP_CHIPIDEA_HS
   #define TUP_USBIP_EHCI
 
diff --git a/src/portable/chipidea/ci_fs/ci_fs_kinetis.h b/src/portable/chipidea/ci_fs/ci_fs_kinetis.h
new file mode 100644
index 000000000..cd21af1c7
--- /dev/null
+++ b/src/portable/chipidea/ci_fs/ci_fs_kinetis.h
@@ -0,0 +1,51 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _CI_FS_KINETIS_H
+#define _CI_FS_KINETIS_H
+
+#include "fsl_device_registers.h"
+
+//static const ci_fs_controller_t _ci_controller[] = {
+//    {.reg_base = USB0_BASE, .irqnum = USB0_IRQn}
+//};
+
+#define CI_FS_REG(_port)        ((ci_fs_regs_t*) USB0_BASE)
+#define CI_REG                  CI_FS_REG(0)
+
+void dcd_int_enable(uint8_t rhport)
+{
+  (void) rhport;
+  NVIC_EnableIRQ(USB0_IRQn);
+}
+
+void dcd_int_disable(uint8_t rhport)
+{
+  (void) rhport;
+  NVIC_DisableIRQ(USB0_IRQn);
+}
+
+#endif
diff --git a/src/portable/chipidea/ci_fs/ci_fs_mcx.h b/src/portable/chipidea/ci_fs/ci_fs_mcx.h
new file mode 100644
index 000000000..3bfcd398e
--- /dev/null
+++ b/src/portable/chipidea/ci_fs/ci_fs_mcx.h
@@ -0,0 +1,47 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _CI_FS_MCX_H
+#define _CI_FS_MCX_H
+
+#include "fsl_device_registers.h"
+
+#define CI_FS_REG(_port)        ((ci_fs_regs_t*) USBFS0_BASE)
+#define CI_REG                  CI_FS_REG(0)
+
+void dcd_int_enable(uint8_t rhport)
+{
+  (void) rhport;
+  NVIC_EnableIRQ(USB0_FS_IRQn);
+}
+
+void dcd_int_disable(uint8_t rhport)
+{
+  (void) rhport;
+  NVIC_DisableIRQ(USB0_FS_IRQn);
+}
+
+#endif
diff --git a/src/portable/chipidea/ci_fs/ci_fs_type.h b/src/portable/chipidea/ci_fs/ci_fs_type.h
new file mode 100644
index 000000000..5a5e53fb0
--- /dev/null
+++ b/src/portable/chipidea/ci_fs/ci_fs_type.h
@@ -0,0 +1,118 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _CI_FS_TYPE_H
+#define _CI_FS_TYPE_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+// Note: some MCUs can only access these registers in 8-bit mode
+// align 4 is used to get rid of reserved fields
+#define _va32     volatile TU_ATTR_ALIGNED(4)
+
+typedef struct {
+  _va32 uint8_t PER_ID;                 // [00] Peripheral ID register
+  _va32 uint8_t ID_COMP;                // [04] Peripheral ID complement register
+  _va32 uint8_t REV;                    // [08] Peripheral revision register
+  _va32 uint8_t ADD_INFO;               // [0C] Peripheral additional info register
+  _va32 uint8_t OTG_ISTAT;              // [10] OTG Interrupt Status Register
+  _va32 uint8_t OTG_ICTRL;              // [14] OTG Interrupt Control Register
+  _va32 uint8_t OTG_STAT;               // [18] OTG Status Register
+  _va32 uint8_t OTG_CTRL;               // [1C] OTG Control register
+  uint32_t reserved_20[24];             // [20]
+  _va32 uint8_t INT_STAT;               // [80] Interrupt status register
+  _va32 uint8_t INT_EN;                 // [84] Interrupt enable register
+  _va32 uint8_t ERR_STAT;               // [88] Error interrupt status register
+  _va32 uint8_t ERR_ENB;                // [8C] Error interrupt enable register
+  _va32 uint8_t STAT;                   // [90] Status register
+  _va32 uint8_t CTL;                    // [94] Control register
+  _va32 uint8_t ADDR;                   // [98] Address register
+  _va32 uint8_t BDT_PAGE1;              // [9C] BDT page register 1
+  _va32 uint8_t FRM_NUML;               // [A0] Frame number register
+  _va32 uint8_t FRM_NUMH;               // [A4] Frame number register
+  _va32 uint8_t TOKEN;                  // [A8] Token register
+  _va32 uint8_t SOF_THLD;               // [AC] SOF threshold register
+  _va32 uint8_t BDT_PAGE2;              // [B0] BDT page register 2
+  _va32 uint8_t BDT_PAGE3;              // [B4] BDT page register 3
+
+  uint32_t reserved_b8;                 // [B8]
+  uint32_t reserved_bc;                 // [BC]
+
+  struct {
+    _va32 uint8_t CTL;
+  }EP[16];                              // [C0] Endpoint control register
+
+  //----- Following is only found available in NXP Kinetis
+  _va32 uint8_t USBCTRL;                // [100] USB Control register,
+  _va32 uint8_t OBSERVE;                // [104] USB OTG Observe register,
+  _va32 uint8_t CONTROL;                // [108] USB OTG Control register,
+  _va32 uint8_t USBTRC0;                // [10C] USB Transceiver Control Register 0,
+  uint32_t reserved_110;                // [110]
+  _va32 uint8_t USBFRMADJUST;           // [114] Frame Adjust Register,
+
+  //----- Following is only found available in NXP MCX
+  uint32_t reserved_118[3];             // [118]
+  _va32 uint8_t KEEP_ALIVE_CTRL;        // [124] Keep Alive Mode Control,
+  _va32 uint8_t KEEP_ALIVE_WKCTRL;      // [128] Keep Alive Mode Wakeup Control,
+  _va32 uint8_t MISCCTRL;               // [12C] Miscellaneous Control,
+  _va32 uint8_t STALL_IL_DIS;           // [130] Peripheral Mode Stall Disable for Endpoints[ 7..0] IN
+  _va32 uint8_t STALL_IH_DIS;           // [134] Peripheral Mode Stall Disable for Endpoints[15..8] IN
+  _va32 uint8_t STALL_OL_DIS;           // [138] Peripheral Mode Stall Disable for Endpoints[ 7..0] OUT
+  _va32 uint8_t STALL_OH_DIS;           // [13C] Peripheral Mode Stall Disable for Endpoints[15..8] OUT
+  _va32 uint8_t CLK_RECOVER_CTRL;       // [140] USB Clock Recovery Control,
+  _va32 uint8_t CLK_RECOVER_IRC_EN;     // [144] FIRC Oscillator Enable,
+  uint32_t reserved_148[3];             // [148]
+  _va32 uint8_t CLK_RECOVER_INT_EN;     // [154] Clock Recovery Combined Interrupt Enable,
+  uint32_t reserved_158;                // [158]
+  _va32 uint8_t CLK_RECOVER_INT_STATUS; // [15C] Clock Recovery Separated Interrupt Status,
+} ci_fs_regs_t;
+
+TU_VERIFY_STATIC(sizeof(ci_fs_regs_t) == 0x160, "Size is not correct");
+
+typedef struct
+{
+  uint32_t reg_base;
+  uint32_t irqnum;
+} ci_fs_controller_t;
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/src/portable/chipidea/ci_fs/dcd_ci_fs.c b/src/portable/chipidea/ci_fs/dcd_ci_fs.c
new file mode 100644
index 000000000..37265df8b
--- /dev/null
+++ b/src/portable/chipidea/ci_fs/dcd_ci_fs.c
@@ -0,0 +1,555 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Koji Kitayama
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "tusb_option.h"
+
+#if CFG_TUD_ENABLED && defined(TUP_USBIP_CHIPIDEA_FS)
+
+#include "device/dcd.h"
+#include "ci_fs_type.h"
+
+#if defined(TUP_USBIP_CHIPIDEA_FS_KINETIS)
+  #include "ci_fs_kinetis.h"
+#elif defined(TUP_USBIP_CHIPIDEA_FS_MCX)
+  #include "ci_fs_mcx.h"
+#else
+  #error "MCU is not supported"
+#endif
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM DECLARATION
+//--------------------------------------------------------------------+
+
+enum {
+  TOK_PID_OUT   = 0x1u,
+  TOK_PID_IN    = 0x9u,
+  TOK_PID_SETUP = 0xDu,
+};
+
+typedef struct TU_ATTR_PACKED
+{
+  union {
+    uint32_t head;
+    struct {
+      union {
+        struct {
+               uint16_t           :  2;
+          __IO uint16_t tok_pid   :  4;
+               uint16_t data      :  1;
+          __IO uint16_t own       :  1;
+               uint16_t           :  8;
+        };
+        struct {
+               uint16_t           :  2;
+               uint16_t bdt_stall :  1;
+               uint16_t dts       :  1;
+               uint16_t ninc      :  1;
+               uint16_t keep      :  1;
+               uint16_t           : 10;
+        };
+      };
+      __IO uint16_t bc : 10;
+           uint16_t    :  6;
+    };
+  };
+  uint8_t *addr;
+}buffer_descriptor_t;
+
+TU_VERIFY_STATIC( sizeof(buffer_descriptor_t) == 8, "size is not correct" );
+
+typedef struct TU_ATTR_PACKED
+{
+  union {
+    uint32_t state;
+    struct {
+      uint32_t max_packet_size :11;
+      uint32_t                 : 5;
+      uint32_t odd             : 1;
+      uint32_t                 :15;
+    };
+  };
+  uint16_t length;
+  uint16_t remaining;
+}endpoint_state_t;
+
+TU_VERIFY_STATIC( sizeof(endpoint_state_t) == 8, "size is not correct" );
+
+typedef struct
+{
+  union {
+    /* [#EP][OUT,IN][EVEN,ODD] */
+    buffer_descriptor_t bdt[16][2][2];
+    uint16_t            bda[512];
+  };
+  TU_ATTR_ALIGNED(4) union {
+    endpoint_state_t endpoint[16][2];
+    endpoint_state_t endpoint_unified[16 * 2];
+  };
+  uint8_t setup_packet[8];
+  uint8_t addr;
+}dcd_data_t;
+
+//--------------------------------------------------------------------+
+// INTERNAL OBJECT & FUNCTION DECLARATION
+//--------------------------------------------------------------------+
+// BDT(Buffer Descriptor Table) must be 256-byte aligned
+CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(512) static dcd_data_t _dcd;
+
+TU_VERIFY_STATIC( sizeof(_dcd.bdt) == 512, "size is not correct" );
+
+static void prepare_next_setup_packet(uint8_t rhport)
+{
+  const unsigned out_odd = _dcd.endpoint[0][0].odd;
+  const unsigned in_odd  = _dcd.endpoint[0][1].odd;
+  TU_ASSERT(0 == _dcd.bdt[0][0][out_odd].own, );
+
+  _dcd.bdt[0][0][out_odd].data     = 0;
+  _dcd.bdt[0][0][out_odd ^ 1].data = 1;
+  _dcd.bdt[0][1][in_odd].data      = 1;
+  _dcd.bdt[0][1][in_odd ^ 1].data  = 0;
+  dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_OUT),
+                _dcd.setup_packet, sizeof(_dcd.setup_packet));
+}
+
+static void process_stall(uint8_t rhport)
+{
+  for (int i = 0; i < 16; ++i) {
+    uint32_t const ep_ctl = CI_REG->EP[i].CTL;
+
+    if (ep_ctl & USB_ENDPT_EPSTALL_MASK) {
+      // prepare next setup if endpoint0
+      if ( i == 0 ) prepare_next_setup_packet(rhport);
+
+      // clear stall bit
+      CI_REG->EP[i].CTL = ep_ctl & ~USB_ENDPT_EPSTALL_MASK;
+    }
+  }
+}
+
+static void process_tokdne(uint8_t rhport)
+{
+  const unsigned s = CI_REG->STAT;
+  CI_REG->INT_STAT = USB_ISTAT_TOKDNE_MASK; /* fetch the next token if received */
+
+  uint8_t const epnum = (s >> USB_STAT_ENDP_SHIFT);
+  uint8_t const dir   = (s & USB_STAT_TX_MASK) >> USB_STAT_TX_SHIFT;
+  unsigned const odd  = (s & USB_STAT_ODD_MASK) ? 1 : 0;
+
+  buffer_descriptor_t *bd = (buffer_descriptor_t *)&_dcd.bda[s];
+  endpoint_state_t    *ep = &_dcd.endpoint_unified[s >> 3];
+
+  /* fetch pid before discarded by the next steps */
+  const unsigned pid = bd->tok_pid;
+
+  /* reset values for a next transfer */
+  bd->bdt_stall = 0;
+  bd->dts       = 1;
+  bd->ninc      = 0;
+  bd->keep      = 0;
+  /* update the odd variable to prepare for the next transfer */
+  ep->odd       = odd ^ 1;
+  if (pid == TOK_PID_SETUP) {
+    dcd_event_setup_received(rhport, bd->addr, true);
+    CI_REG->CTL &= ~USB_CTL_TXSUSPENDTOKENBUSY_MASK;
+    return;
+  }
+
+  const unsigned bc = bd->bc;
+  const unsigned remaining = ep->remaining - bc;
+  if (remaining && bc == ep->max_packet_size) {
+    /* continue the transferring consecutive data */
+    ep->remaining = remaining;
+    const int next_remaining = remaining - ep->max_packet_size;
+    if (next_remaining > 0) {
+      /* prepare to the after next transfer */
+      bd->addr += ep->max_packet_size * 2;
+      bd->bc    = next_remaining > ep->max_packet_size ? ep->max_packet_size: next_remaining;
+      __DSB();
+      bd->own   = 1; /* the own bit must set after addr */
+    }
+    return;
+  }
+  const unsigned length = ep->length;
+  dcd_event_xfer_complete(rhport,
+                          tu_edpt_addr(epnum, dir),
+                          length - remaining, XFER_RESULT_SUCCESS, true);
+  if (0 == epnum && 0 == length) {
+    /* After completion a ZLP of control transfer,
+     * it prepares for the next steup transfer. */
+    if (_dcd.addr) {
+      /* When the transfer was the SetAddress,
+       * the device address should be updated here. */
+      CI_REG->ADDR = _dcd.addr;
+      _dcd.addr  = 0;
+    }
+    prepare_next_setup_packet(rhport);
+  }
+}
+
+static void process_bus_reset(uint8_t rhport)
+{
+  CI_REG->USBCTRL &= ~USB_USBCTRL_SUSP_MASK;
+  CI_REG->CTL     |= USB_CTL_ODDRST_MASK;
+  CI_REG->ADDR     = 0;
+  CI_REG->INT_EN   = USB_INTEN_USBRSTEN_MASK | USB_INTEN_TOKDNEEN_MASK | USB_INTEN_SLEEPEN_MASK |
+                     USB_INTEN_ERROREN_MASK | USB_INTEN_STALLEN_MASK;
+
+  CI_REG->EP[0].CTL = USB_ENDPT_EPHSHK_MASK | USB_ENDPT_EPRXEN_MASK | USB_ENDPT_EPTXEN_MASK;
+  for (unsigned i = 1; i < 16; ++i) {
+    CI_REG->EP[i].CTL = 0;
+  }
+  buffer_descriptor_t *bd = _dcd.bdt[0][0];
+  for (unsigned i = 0; i < sizeof(_dcd.bdt)/sizeof(*bd); ++i, ++bd) {
+    bd->head = 0;
+  }
+  const endpoint_state_t ep0 = {
+    .max_packet_size = CFG_TUD_ENDPOINT0_SIZE,
+    .odd             = 0,
+    .length          = 0,
+    .remaining       = 0,
+  };
+  _dcd.endpoint[0][0] = ep0;
+  _dcd.endpoint[0][1] = ep0;
+  tu_memclr(_dcd.endpoint[1], sizeof(_dcd.endpoint) - sizeof(_dcd.endpoint[0]));
+  _dcd.addr = 0;
+  prepare_next_setup_packet(rhport);
+  CI_REG->CTL &= ~USB_CTL_ODDRST_MASK;
+  dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true);
+}
+
+static void process_bus_sleep(uint8_t rhport)
+{
+  // Enable resume & disable suspend interrupt
+  const unsigned inten = CI_REG->INT_EN;
+
+  CI_REG->INT_EN   = (inten & ~USB_INTEN_SLEEPEN_MASK) | USB_INTEN_RESUMEEN_MASK;
+  CI_REG->USBTRC0 |= USB_USBTRC0_USBRESMEN_MASK;
+  CI_REG->USBCTRL |= USB_USBCTRL_SUSP_MASK;
+
+  dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true);
+}
+
+static void process_bus_resume(uint8_t rhport)
+{
+  // Enable suspend & disable resume interrupt
+  const unsigned inten = CI_REG->INT_EN;
+
+  CI_REG->USBCTRL &= ~USB_USBCTRL_SUSP_MASK; // will also clear USB_USBTRC0_USB_RESUME_INT_MASK
+  CI_REG->USBTRC0 &= ~USB_USBTRC0_USBRESMEN_MASK;
+  CI_REG->INT_EN   = (inten & ~USB_INTEN_RESUMEEN_MASK) | USB_INTEN_SLEEPEN_MASK;
+
+  dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true);
+}
+
+/*------------------------------------------------------------------*/
+/* Device API
+ *------------------------------------------------------------------*/
+void dcd_init(uint8_t rhport)
+{
+  (void) rhport;
+
+  CI_REG->USBTRC0 |= USB_USBTRC0_USBRESET_MASK;
+  while (CI_REG->USBTRC0 & USB_USBTRC0_USBRESET_MASK);
+
+  tu_memclr(&_dcd, sizeof(_dcd));
+  CI_REG->USBTRC0 |= TU_BIT(6); /* software must set this bit to 1 */
+  CI_REG->BDT_PAGE1 = (uint8_t)((uintptr_t)_dcd.bdt >> 8);
+  CI_REG->BDT_PAGE2 = (uint8_t)((uintptr_t)_dcd.bdt >> 16);
+  CI_REG->BDT_PAGE3 = (uint8_t)((uintptr_t)_dcd.bdt >> 24);
+
+  CI_REG->INT_EN = USB_INTEN_USBRSTEN_MASK;
+
+  dcd_connect(rhport);
+  // NVIC_ClearPendingIRQ(USB0_IRQn);
+}
+
+void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
+{
+  _dcd.addr = dev_addr & 0x7F;
+  /* Response with status first before changing device address */
+  dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0);
+}
+
+void dcd_remote_wakeup(uint8_t rhport)
+{
+  (void) rhport;
+
+  CI_REG->CTL |= USB_CTL_RESUME_MASK;
+
+  unsigned cnt = SystemCoreClock / 1000;
+  while (cnt--) __NOP();
+
+  CI_REG->CTL &= ~USB_CTL_RESUME_MASK;
+}
+
+void dcd_connect(uint8_t rhport)
+{
+  (void) rhport;
+  CI_REG->USBCTRL  = 0;
+  CI_REG->CONTROL |= USB_CONTROL_DPPULLUPNONOTG_MASK;
+  CI_REG->CTL     |= USB_CTL_USBENSOFEN_MASK;
+}
+
+void dcd_disconnect(uint8_t rhport)
+{
+  (void) rhport;
+  CI_REG->CTL      = 0;
+  CI_REG->CONTROL &= ~USB_CONTROL_DPPULLUPNONOTG_MASK;
+}
+
+void dcd_sof_enable(uint8_t rhport, bool en)
+{
+  (void) rhport;
+  (void) en;
+
+  // TODO implement later
+}
+
+//--------------------------------------------------------------------+
+// Endpoint API
+//--------------------------------------------------------------------+
+bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
+{
+  (void) rhport;
+
+  const unsigned ep_addr  = ep_desc->bEndpointAddress;
+  const unsigned epn      = tu_edpt_number(ep_addr);
+  const unsigned dir      = tu_edpt_dir(ep_addr);
+  const unsigned xfer     = ep_desc->bmAttributes.xfer;
+  endpoint_state_t *ep    = &_dcd.endpoint[epn][dir];
+  const unsigned odd      = ep->odd;
+  buffer_descriptor_t *bd = _dcd.bdt[epn][dir];
+
+  /* No support for control transfer */
+  TU_ASSERT(epn && (xfer != TUSB_XFER_CONTROL));
+
+  ep->max_packet_size = tu_edpt_packet_size(ep_desc);
+  unsigned val = USB_ENDPT_EPCTLDIS_MASK;
+  val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? USB_ENDPT_EPHSHK_MASK: 0;
+  val |= dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK;
+  CI_REG->EP[epn].CTL |= val;
+
+  if (xfer != TUSB_XFER_ISOCHRONOUS) {
+    bd[odd].dts      = 1;
+    bd[odd].data     = 0;
+    bd[odd ^ 1].dts  = 1;
+    bd[odd ^ 1].data = 1;
+  }
+
+  return true;
+}
+
+void dcd_edpt_close_all(uint8_t rhport)
+{
+  dcd_int_disable(rhport);
+
+  for (unsigned i = 1; i < 16; ++i) {
+    CI_REG->EP[i].CTL = 0;
+  }
+
+  dcd_int_enable(rhport);
+
+  buffer_descriptor_t *bd = _dcd.bdt[1][0];
+  for (unsigned i = 2; i < sizeof(_dcd.bdt)/sizeof(*bd); ++i, ++bd) {
+    bd->head = 0;
+  }
+
+  endpoint_state_t *ep = &_dcd.endpoint[1][0];
+  for (unsigned i = 2; i < sizeof(_dcd.endpoint)/sizeof(*ep); ++i, ++ep) {
+    /* Clear except the odd */
+    ep->max_packet_size = 0;
+    ep->length          = 0;
+    ep->remaining       = 0;
+  }
+}
+
+void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
+{
+  const unsigned epn      = tu_edpt_number(ep_addr);
+  const unsigned dir      = tu_edpt_dir(ep_addr);
+  endpoint_state_t *ep    = &_dcd.endpoint[epn][dir];
+  buffer_descriptor_t *bd = _dcd.bdt[epn][dir];
+  const unsigned msk      = dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK;
+
+  dcd_int_disable(rhport);
+
+  CI_REG->EP[epn].CTL &= ~msk;
+  ep->max_packet_size = 0;
+  ep->length          = 0;
+  ep->remaining       = 0;
+  bd[0].head          = 0;
+  bd[1].head          = 0;
+
+  dcd_int_enable(rhport);
+}
+
+bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes)
+{
+  const unsigned epn      = tu_edpt_number(ep_addr);
+  const unsigned dir      = tu_edpt_dir(ep_addr);
+  endpoint_state_t    *ep = &_dcd.endpoint[epn][dir];
+  buffer_descriptor_t *bd = &_dcd.bdt[epn][dir][ep->odd];
+  TU_ASSERT(0 == bd->own);
+
+  dcd_int_disable(rhport);
+
+  ep->length    = total_bytes;
+  ep->remaining = total_bytes;
+
+  const unsigned mps = ep->max_packet_size;
+  if (total_bytes > mps) {
+    buffer_descriptor_t *next = ep->odd ? bd - 1: bd + 1;
+    /* When total_bytes is greater than the max packet size,
+     * it prepares to the next transfer to avoid NAK in advance. */
+    next->bc   = total_bytes >= 2 * mps ? mps: total_bytes - mps;
+    next->addr = buffer + mps;
+    next->own  = 1;
+  }
+  bd->bc   = total_bytes >= mps ? mps: total_bytes;
+  bd->addr = buffer;
+  __DSB();
+  bd->own  = 1; /* This bit must be set last */
+
+  dcd_int_enable(rhport);
+
+  return true;
+}
+
+void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
+{
+  (void) rhport;
+  const unsigned epn = tu_edpt_number(ep_addr);
+
+  if (0 == epn) {
+    CI_REG->EP[epn].CTL |=  USB_ENDPT_EPSTALL_MASK;
+  } else {
+    const unsigned dir      = tu_edpt_dir(ep_addr);
+    const unsigned odd      = _dcd.endpoint[epn][dir].odd;
+    buffer_descriptor_t *bd = &_dcd.bdt[epn][dir][odd];
+    TU_ASSERT(0 == bd->own,);
+
+    dcd_int_disable(rhport);
+
+    bd->bdt_stall = 1;
+    __DSB();
+    bd->own       = 1; /* This bit must be set last */
+
+    dcd_int_enable(rhport);
+  }
+}
+
+void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
+{
+  const unsigned epn      = tu_edpt_number(ep_addr);
+  TU_VERIFY(epn,);
+  const unsigned dir      = tu_edpt_dir(ep_addr);
+  const unsigned odd      = _dcd.endpoint[epn][dir].odd;
+  buffer_descriptor_t *bd = _dcd.bdt[epn][dir];
+  TU_VERIFY(bd[odd].own,);
+
+  dcd_int_disable(rhport);
+
+  bd[odd].own = 0;
+  __DSB();
+
+  // clear stall
+  bd[odd].bdt_stall  = 0;
+
+  // Reset data toggle
+  bd[odd    ].data = 0;
+  bd[odd ^ 1].data = 1;
+
+  // We already cleared this in ISR, but just clear it here to be safe
+  const uint32_t ep_ctl = CI_REG->EP[epn].CTL;
+  if (ep_ctl & USB_ENDPT_EPSTALL_MASK) {
+    CI_REG->EP[epn].CTL = ep_ctl & ~USB_ENDPT_EPSTALL_MASK;
+  }
+
+  dcd_int_enable(rhport);
+}
+
+//--------------------------------------------------------------------+
+// ISR
+//--------------------------------------------------------------------+
+void dcd_int_handler(uint8_t rhport)
+{
+  uint32_t is  = CI_REG->INT_STAT;
+  uint32_t msk = CI_REG->INT_EN;
+
+  // clear non-enabled interrupts
+  CI_REG->INT_STAT = is & ~msk;
+  is &= msk;
+
+  if (is & USB_ISTAT_ERROR_MASK) {
+    /* TODO: */
+    uint32_t es = CI_REG->ERR_STAT;
+    CI_REG->ERR_STAT = es;
+    CI_REG->INT_STAT = is; /* discard any pending events */
+  }
+
+  if (is & USB_ISTAT_USBRST_MASK) {
+    CI_REG->INT_STAT = is; /* discard any pending events */
+    process_bus_reset(rhport);
+  }
+
+  if (is & USB_ISTAT_SLEEP_MASK) {
+    // TU_LOG2("Suspend: "); TU_LOG2_HEX(is);
+
+    // Note Host usually has extra delay after bus reset (without SOF), which could falsely
+    // detected as Sleep event. Though usbd has debouncing logic so we are good
+    CI_REG->INT_STAT = USB_ISTAT_SLEEP_MASK;
+    process_bus_sleep(rhport);
+  }
+
+#if 0 // ISTAT_RESUME never trigger, probably for host mode ?
+  if (is & USB_ISTAT_RESUME_MASK) {
+    // TU_LOG2("ISTAT Resume: "); TU_LOG2_HEX(is);
+    KHCI->ISTAT = USB_ISTAT_RESUME_MASK;
+    process_bus_resume(rhport);
+  }
+#endif
+
+  if (CI_REG->USBTRC0 & USB_USBTRC0_USB_RESUME_INT_MASK) {
+     // TU_LOG2("USBTRC0 Resume: "); TU_LOG2_HEX(is); TU_LOG2_HEX(KHCI->USBTRC0);
+    process_bus_resume(rhport);
+  }
+
+  if (is & USB_ISTAT_SOFTOK_MASK) {
+    CI_REG->INT_STAT = USB_ISTAT_SOFTOK_MASK;
+    dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true);
+  }
+
+  if (is & USB_ISTAT_STALL_MASK) {
+    CI_REG->INT_STAT = USB_ISTAT_STALL_MASK;
+    process_stall(rhport);
+  }
+
+  if (is & USB_ISTAT_TOKDNE_MASK) {
+    process_tokdne(rhport);
+  }
+}
+
+#endif

From 1a37777f59936cba0523bb4790ef657bbf17b870 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 15 Jun 2023 13:11:21 +0700
Subject: [PATCH 416/691] fix ci with win/mac

---
 .github/workflows/build_win_mac.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/build_win_mac.yml b/.github/workflows/build_win_mac.yml
index 45fc62f78..cb879a705 100644
--- a/.github/workflows/build_win_mac.yml
+++ b/.github/workflows/build_win_mac.yml
@@ -48,7 +48,7 @@ jobs:
       uses: actions/checkout@v3
 
     - name: Get Dependencies
-      run: python3 tools/get_family_deps.py stm32f4
+      run: python3 tools/get_deps.py stm32f4
 
     - name: Build
       run: python3 tools/build_family.py stm32f4 stm32f411disco

From 96f7cd09dc2c8cd62afc5bb4b325ade45332e0ba Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 16 Jun 2023 10:45:59 +0700
Subject: [PATCH 417/691] remove legacy transdimension driver

---
 .../transdimension/common_transdimension.h    | 136 ----
 .../nxp/transdimension/dcd_transdimension.c   | 672 ------------------
 .../nxp/transdimension/hcd_transdimension.c   | 119 ----
 3 files changed, 927 deletions(-)
 delete mode 100644 src/portable/nxp/transdimension/common_transdimension.h
 delete mode 100644 src/portable/nxp/transdimension/dcd_transdimension.c
 delete mode 100644 src/portable/nxp/transdimension/hcd_transdimension.c

diff --git a/src/portable/nxp/transdimension/common_transdimension.h b/src/portable/nxp/transdimension/common_transdimension.h
deleted file mode 100644
index 95ae1903e..000000000
--- a/src/portable/nxp/transdimension/common_transdimension.h
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2021, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#ifndef COMMON_TRANSDIMENSION_H_
-#define COMMON_TRANSDIMENSION_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-// USBCMD
-enum {
-  USBCMD_RUN_STOP         = TU_BIT(0),
-  USBCMD_RESET            = TU_BIT(1),
-  USBCMD_SETUP_TRIPWIRE   = TU_BIT(13),
-  USBCMD_ADD_QTD_TRIPWIRE = TU_BIT(14)  ///< This bit is used as a semaphore to ensure the to proper addition of a new dTD to an active (primed) endpoint’s linked list. This bit is set and cleared by software during the process of adding a new dTD
-// Interrupt Threshold bit 23:16
-};
-
-// PORTSC1
-#define PORTSC1_PORT_SPEED_POS    26
-
-enum {
-  PORTSC1_CURRENT_CONNECT_STATUS = TU_BIT(0),
-  PORTSC1_FORCE_PORT_RESUME      = TU_BIT(6),
-  PORTSC1_SUSPEND                = TU_BIT(7),
-  PORTSC1_FORCE_FULL_SPEED       = TU_BIT(24),
-  PORTSC1_PORT_SPEED             = TU_BIT(26) | TU_BIT(27)
-};
-
-// OTGSC
-enum {
-  OTGSC_VBUS_DISCHARGE          = TU_BIT(0),
-  OTGSC_VBUS_CHARGE             = TU_BIT(1),
-//  OTGSC_HWASSIST_AUTORESET    = TU_BIT(2),
-  OTGSC_OTG_TERMINATION         = TU_BIT(3), ///< Must set to 1 when OTG go to device mode
-  OTGSC_DATA_PULSING            = TU_BIT(4),
-  OTGSC_ID_PULLUP               = TU_BIT(5),
-//  OTGSC_HWASSIT_DATA_PULSE    = TU_BIT(6),
-//  OTGSC_HWASSIT_BDIS_ACONN    = TU_BIT(7),
-  OTGSC_ID                      = TU_BIT(8), ///< 0 = A device, 1 = B Device
-  OTGSC_A_VBUS_VALID            = TU_BIT(9),
-  OTGSC_A_SESSION_VALID         = TU_BIT(10),
-  OTGSC_B_SESSION_VALID         = TU_BIT(11),
-  OTGSC_B_SESSION_END           = TU_BIT(12),
-  OTGSC_1MS_TOGGLE              = TU_BIT(13),
-  OTGSC_DATA_BUS_PULSING_STATUS = TU_BIT(14),
-};
-
-// USBMode
-enum {
-  USBMODE_CM_DEVICE = 2,
-  USBMODE_CM_HOST   = 3,
-
-  USBMODE_SLOM = TU_BIT(3),
-  USBMODE_SDIS = TU_BIT(4),
-
-  USBMODE_VBUS_POWER_SELECT = TU_BIT(5), // Need to be enabled for LPC18XX/43XX in host mode
-};
-
-// Device Registers
-typedef struct
-{
-  //------------- ID + HW Parameter Registers-------------//
-  __I  uint32_t TU_RESERVED[64]; ///< For iMX RT10xx, but not used by LPC18XX/LPC43XX
-
-  //------------- Capability Registers-------------//
-  __I  uint8_t  CAPLENGTH;       ///< Capability Registers Length
-  __I  uint8_t  TU_RESERVED[1];
-  __I  uint16_t HCIVERSION;      ///< Host Controller Interface Version
-
-  __I  uint32_t HCSPARAMS;       ///< Host Controller Structural Parameters
-  __I  uint32_t HCCPARAMS;       ///< Host Controller Capability Parameters
-  __I  uint32_t TU_RESERVED[5];
-
-  __I  uint16_t DCIVERSION;      ///< Device Controller Interface Version
-  __I  uint8_t  TU_RESERVED[2];
-
-  __I  uint32_t DCCPARAMS;       ///< Device Controller Capability Parameters
-  __I  uint32_t TU_RESERVED[6];
-
-  //------------- Operational Registers -------------//
-  __IO uint32_t USBCMD;          ///< USB Command Register
-  __IO uint32_t USBSTS;          ///< USB Status Register
-  __IO uint32_t USBINTR;         ///< Interrupt Enable Register
-  __IO uint32_t FRINDEX;         ///< USB Frame Index
-  __I  uint32_t TU_RESERVED;
-  __IO uint32_t DEVICEADDR;      ///< Device Address
-  __IO uint32_t ENDPTLISTADDR;   ///< Endpoint List Address
-  __I  uint32_t TU_RESERVED;
-  __IO uint32_t BURSTSIZE;       ///< Programmable Burst Size
-  __IO uint32_t TXFILLTUNING;    ///< TX FIFO Fill Tuning
-       uint32_t TU_RESERVED[4];
-  __IO uint32_t ENDPTNAK;        ///< Endpoint NAK
-  __IO uint32_t ENDPTNAKEN;      ///< Endpoint NAK Enable
-  __I  uint32_t TU_RESERVED;
-  __IO uint32_t PORTSC1;         ///< Port Status & Control
-  __I  uint32_t TU_RESERVED[7];
-  __IO uint32_t OTGSC;           ///< On-The-Go Status & control
-  __IO uint32_t USBMODE;         ///< USB Device Mode
-  __IO uint32_t ENDPTSETUPSTAT;  ///< Endpoint Setup Status
-  __IO uint32_t ENDPTPRIME;      ///< Endpoint Prime
-  __IO uint32_t ENDPTFLUSH;      ///< Endpoint Flush
-  __I  uint32_t ENDPTSTAT;       ///< Endpoint Status
-  __IO uint32_t ENDPTCOMPLETE;   ///< Endpoint Complete
-  __IO uint32_t ENDPTCTRL[8];    ///< Endpoint Control 0 - 7
-} dcd_registers_t, hcd_registers_t;
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* COMMON_TRANSDIMENSION_H_ */
diff --git a/src/portable/nxp/transdimension/dcd_transdimension.c b/src/portable/nxp/transdimension/dcd_transdimension.c
deleted file mode 100644
index 983d7cfcf..000000000
--- a/src/portable/nxp/transdimension/dcd_transdimension.c
+++ /dev/null
@@ -1,672 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2019 Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "tusb_option.h"
-
-#if CFG_TUD_ENABLED && \
-    (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT)
-
-#warning "transdimenion is renamed to chipidea (portable/chipidea/ci_hs) to match other opensource naming convention such as linux. This file will be removed in the future, please update your makefile accordingly"
-
-//--------------------------------------------------------------------+
-// INCLUDE
-//--------------------------------------------------------------------+
-#if CFG_TUSB_MCU == OPT_MCU_MIMXRT
-  #include "fsl_device_registers.h"
-  #define INCLUDE_FSL_DEVICE_REGISTERS
-#else
-  // LPCOpen for 18xx & 43xx
-  #include "chip.h"
-#endif
-
-#include "common/tusb_common.h"
-#include "device/dcd.h"
-#include "common_transdimension.h"
-
-#if defined(__CORTEX_M) && __CORTEX_M == 7 && __DCACHE_PRESENT == 1
-  #define CleanInvalidateDCache_by_Addr   SCB_CleanInvalidateDCache_by_Addr
-#else
-  #define CleanInvalidateDCache_by_Addr(_addr, _dsize)
-#endif
-
-//--------------------------------------------------------------------+
-// MACRO CONSTANT TYPEDEF
-//--------------------------------------------------------------------+
-
-// ENDPTCTRL
-enum {
-  ENDPTCTRL_STALL          = TU_BIT(0),
-  ENDPTCTRL_TOGGLE_INHIBIT = TU_BIT(5), // used for test only
-  ENDPTCTRL_TOGGLE_RESET   = TU_BIT(6),
-  ENDPTCTRL_ENABLE         = TU_BIT(7)
-};
-
-enum {
-  ENDPTCTRL_TYPE_POS  = 2, // Endpoint type is 2-bit field
-};
-
-// USBSTS, USBINTR
-enum {
-  INTR_USB         = TU_BIT(0),
-  INTR_ERROR       = TU_BIT(1),
-  INTR_PORT_CHANGE = TU_BIT(2),
-  INTR_RESET       = TU_BIT(6),
-  INTR_SOF         = TU_BIT(7),
-  INTR_SUSPEND     = TU_BIT(8),
-  INTR_NAK         = TU_BIT(16)
-};
-
-// Queue Transfer Descriptor
-typedef struct
-{
-  // Word 0: Next QTD Pointer
-  uint32_t next; ///< Next link pointer This field contains the physical memory address of the next dTD to be processed
-
-  // Word 1: qTQ Token
-  uint32_t                      : 3  ;
-  volatile uint32_t xact_err    : 1  ;
-  uint32_t                      : 1  ;
-  volatile uint32_t buffer_err  : 1  ;
-  volatile uint32_t halted      : 1  ;
-  volatile uint32_t active      : 1  ;
-  uint32_t                      : 2  ;
-  uint32_t iso_mult_override    : 2  ; ///< This field can be used for transmit ISOs to override the MULT field in the dQH. This field must be zero for all packet types that are not transmit-ISO.
-  uint32_t                      : 3  ;
-  uint32_t int_on_complete      : 1  ;
-  volatile uint32_t total_bytes : 15 ;
-  uint32_t                      : 1  ;
-
-  // Word 2-6: Buffer Page Pointer List, Each element in the list is a 4K page aligned, physical memory address. The lower 12 bits in each pointer are reserved (except for the first one) as each memory pointer must reference the start of a 4K page
-  uint32_t buffer[5]; ///< buffer1 has frame_n for TODO Isochronous
-
-  //--------------------------------------------------------------------+
-  // TD is 32 bytes aligned but occupies only 28 bytes
-  // Therefore there are 4 bytes padding that we can use.
-  //--------------------------------------------------------------------+
-  uint16_t expected_bytes;
-  uint8_t reserved[2];
-} dcd_qtd_t;
-
-TU_VERIFY_STATIC( sizeof(dcd_qtd_t) == 32, "size is not correct");
-
-// Queue Head
-typedef struct
-{
-  // Word 0: Capabilities and Characteristics
-  uint32_t                         : 15 ; ///< Number of packets executed per transaction descriptor 00 - Execute N transactions as demonstrated by the USB variable length protocol where N is computed using Max_packet_length and the Total_bytes field in the dTD. 01 - Execute one transaction 10 - Execute two transactions 11 - Execute three transactions Remark: Non-isochronous endpoints must set MULT = 00. Remark: Isochronous endpoints must set MULT = 01, 10, or 11 as needed.
-  uint32_t int_on_setup            : 1  ; ///< Interrupt on setup This bit is used on control type endpoints to indicate if USBINT is set in response to a setup being received.
-  uint32_t max_packet_size         : 11 ; ///< Endpoint's wMaxPacketSize
-  uint32_t                         : 2  ;
-  uint32_t zero_length_termination : 1  ; ///< This bit is used for non-isochronous endpoints to indicate when a zero-length packet is received to terminate transfers in case the total transfer length is “multiple”. 0 - Enable zero-length packet to terminate transfers equal to a multiple of Max_packet_length (default). 1 - Disable zero-length packet on transfers that are equal in length to a multiple Max_packet_length.
-  uint32_t iso_mult                : 2  ; ///<
-
-  // Word 1: Current qTD Pointer
-  volatile uint32_t qtd_addr;
-
-  // Word 2-9: Transfer Overlay
-  volatile dcd_qtd_t qtd_overlay;
-
-  // Word 10-11: Setup request (control OUT only)
-  volatile tusb_control_request_t setup_request;
-
-  //--------------------------------------------------------------------+
-  // QHD is 64 bytes aligned but occupies only 48 bytes
-  // Therefore there are 16 bytes padding that we can use.
-  //--------------------------------------------------------------------+
-  tu_fifo_t * ff;
-  uint8_t reserved[12];
-} dcd_qhd_t;
-
-TU_VERIFY_STATIC( sizeof(dcd_qhd_t) == 64, "size is not correct");
-
-//--------------------------------------------------------------------+
-// Variables
-//--------------------------------------------------------------------+
-
-typedef struct
-{
-  dcd_registers_t* regs;  // registers
-  const IRQn_Type irqnum; // IRQ number
-  const uint8_t ep_count; // Max bi-directional Endpoints
-}dcd_controller_t;
-
-#if CFG_TUSB_MCU == OPT_MCU_MIMXRT
-  static const dcd_controller_t _dcd_controller[] =
-  {
-    // RT1010 and RT1020 only has 1 USB controller
-    #if FSL_FEATURE_SOC_USBHS_COUNT == 1
-      { .regs = (dcd_registers_t*) USB_BASE , .irqnum = USB_OTG1_IRQn, .ep_count = 8 }
-    #else
-      { .regs = (dcd_registers_t*) USB1_BASE, .irqnum = USB_OTG1_IRQn, .ep_count = 8 },
-      { .regs = (dcd_registers_t*) USB2_BASE, .irqnum = USB_OTG2_IRQn, .ep_count = 8 }
-    #endif
-  };
-
-#else
-  static const dcd_controller_t _dcd_controller[] =
-  {
-    { .regs = (dcd_registers_t*) LPC_USB0_BASE, .irqnum = USB0_IRQn, .ep_count = 6 },
-    { .regs = (dcd_registers_t*) LPC_USB1_BASE, .irqnum = USB1_IRQn, .ep_count = 4 }
-  };
-#endif
-
-#define QTD_NEXT_INVALID 0x01
-
-typedef struct {
-  // Must be at 2K alignment
-  // Each endpoint with direction (IN/OUT) occupies a queue head
-  // for portability, TinyUSB only queue 1 TD for each Qhd
-  dcd_qhd_t qhd[TUP_DCD_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(64);
-  dcd_qtd_t qtd[TUP_DCD_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(32);
-}dcd_data_t;
-
-CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(2048)
-static dcd_data_t _dcd_data;
-
-//--------------------------------------------------------------------+
-// Controller API
-//--------------------------------------------------------------------+
-
-/// follows LPC43xx User Manual 23.10.3
-static void bus_reset(uint8_t rhport)
-{
-  dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
-
-  // The reset value for all endpoint types is the control endpoint. If one endpoint
-  // direction is enabled and the paired endpoint of opposite direction is disabled, then the
-  // endpoint type of the unused direction must be changed from the control type to any other
-  // type (e.g. bulk). Leaving an un-configured endpoint control will cause undefined behavior
-  // for the data PID tracking on the active endpoint.
-  for( uint8_t i=1; i < _dcd_controller[rhport].ep_count; i++)
-  {
-    dcd_reg->ENDPTCTRL[i] = (TUSB_XFER_BULK << ENDPTCTRL_TYPE_POS) | (TUSB_XFER_BULK << (16+ENDPTCTRL_TYPE_POS));
-  }
-
-  //------------- Clear All Registers -------------//
-  dcd_reg->ENDPTNAK       = dcd_reg->ENDPTNAK;
-  dcd_reg->ENDPTNAKEN     = 0;
-  dcd_reg->USBSTS         = dcd_reg->USBSTS;
-  dcd_reg->ENDPTSETUPSTAT = dcd_reg->ENDPTSETUPSTAT;
-  dcd_reg->ENDPTCOMPLETE  = dcd_reg->ENDPTCOMPLETE;
-
-  while (dcd_reg->ENDPTPRIME) {}
-  dcd_reg->ENDPTFLUSH = 0xFFFFFFFF;
-  while (dcd_reg->ENDPTFLUSH) {}
-
-  // read reset bit in portsc
-
-  //------------- Queue Head & Queue TD -------------//
-  tu_memclr(&_dcd_data, sizeof(dcd_data_t));
-
-  //------------- Set up Control Endpoints (0 OUT, 1 IN) -------------//
-  _dcd_data.qhd[0][0].zero_length_termination = _dcd_data.qhd[0][1].zero_length_termination = 1;
-  _dcd_data.qhd[0][0].max_packet_size  = _dcd_data.qhd[0][1].max_packet_size  = CFG_TUD_ENDPOINT0_SIZE;
-  _dcd_data.qhd[0][0].qtd_overlay.next = _dcd_data.qhd[0][1].qtd_overlay.next = QTD_NEXT_INVALID;
-
-  _dcd_data.qhd[0][0].int_on_setup = 1; // OUT only
-}
-
-void dcd_init(uint8_t rhport)
-{
-  tu_memclr(&_dcd_data, sizeof(dcd_data_t));
-
-  dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
-
-  // Reset controller
-  dcd_reg->USBCMD |= USBCMD_RESET;
-  while( dcd_reg->USBCMD & USBCMD_RESET ) {}
-
-  // Set mode to device, must be set immediately after reset
-  dcd_reg->USBMODE = USBMODE_CM_DEVICE;
-  dcd_reg->OTGSC = OTGSC_VBUS_DISCHARGE | OTGSC_OTG_TERMINATION;
-
-#if !TUD_OPT_HIGH_SPEED
-  dcd_reg->PORTSC1 = PORTSC1_FORCE_FULL_SPEED;
-#endif
-
-  CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t));
-
-  dcd_reg->ENDPTLISTADDR = (uint32_t) _dcd_data.qhd; // Endpoint List Address has to be 2K alignment
-  dcd_reg->USBSTS  = dcd_reg->USBSTS;
-  dcd_reg->USBINTR = INTR_USB | INTR_ERROR | INTR_PORT_CHANGE | INTR_SUSPEND;
-
-  dcd_reg->USBCMD &= ~0x00FF0000;     // Interrupt Threshold Interval = 0
-  dcd_reg->USBCMD |= USBCMD_RUN_STOP; // Connect
-}
-
-void dcd_int_enable(uint8_t rhport)
-{
-  NVIC_EnableIRQ(_dcd_controller[rhport].irqnum);
-}
-
-void dcd_int_disable(uint8_t rhport)
-{
-  NVIC_DisableIRQ(_dcd_controller[rhport].irqnum);
-}
-
-void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
-{
-  // Response with status first before changing device address
-  dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0);
-
-  dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
-  dcd_reg->DEVICEADDR = (dev_addr << 25) | TU_BIT(24);
-}
-
-void dcd_remote_wakeup(uint8_t rhport)
-{
-  dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
-  dcd_reg->PORTSC1 |= PORTSC1_FORCE_PORT_RESUME;
-}
-
-void dcd_connect(uint8_t rhport)
-{
-  dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
-  dcd_reg->USBCMD |= USBCMD_RUN_STOP;
-}
-
-void dcd_disconnect(uint8_t rhport)
-{
-  dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
-  dcd_reg->USBCMD &= ~USBCMD_RUN_STOP;
-}
-
-void dcd_sof_enable(uint8_t rhport, bool en)
-{
-  (void) rhport;
-  (void) en;
-
-  // TODO implement later
-}
-
-//--------------------------------------------------------------------+
-// HELPER
-//--------------------------------------------------------------------+
-
-static void qtd_init(dcd_qtd_t* p_qtd, void * data_ptr, uint16_t total_bytes)
-{
-  // Force the CPU to flush the buffer. We increase the size by 31 because the call aligns the
-  // address to 32-byte boundaries. Buffer must be word aligned
-  CleanInvalidateDCache_by_Addr((uint32_t*) tu_align((uint32_t) data_ptr, 4), total_bytes + 31);
-
-  tu_memclr(p_qtd, sizeof(dcd_qtd_t));
-
-  p_qtd->next            = QTD_NEXT_INVALID;
-  p_qtd->active          = 1;
-  p_qtd->total_bytes     = p_qtd->expected_bytes = total_bytes;
-  p_qtd->int_on_complete = true;
-
-  if (data_ptr != NULL)
-  {
-    p_qtd->buffer[0] = (uint32_t) data_ptr;
-
-    uint32_t const bufend = p_qtd->buffer[0] + total_bytes;
-    for(uint8_t i=1; i<5; i++)
-    {
-      uint32_t const next_page = tu_align4k( p_qtd->buffer[i-1] ) + 4096;
-      if ( bufend <= next_page ) break;
-
-      p_qtd->buffer[i] = next_page;
-
-      // TODO page[1] FRAME_N for ISO transfer
-    }
-  }
-}
-
-//--------------------------------------------------------------------+
-// DCD Endpoint Port
-//--------------------------------------------------------------------+
-void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
-{
-  uint8_t const epnum  = tu_edpt_number(ep_addr);
-  uint8_t const dir    = tu_edpt_dir(ep_addr);
-
-  dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
-  dcd_reg->ENDPTCTRL[epnum] |= ENDPTCTRL_STALL << (dir ? 16 : 0);
-
-  // flush to abort any primed buffer
-  dcd_reg->ENDPTFLUSH = TU_BIT(epnum + (dir ? 16 : 0));
-}
-
-void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
-{
-  uint8_t const epnum = tu_edpt_number(ep_addr);
-  uint8_t const dir   = tu_edpt_dir(ep_addr);
-
-  // data toggle also need to be reset
-  dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
-  dcd_reg->ENDPTCTRL[epnum] |= ENDPTCTRL_TOGGLE_RESET << ( dir ? 16 : 0 );
-  dcd_reg->ENDPTCTRL[epnum] &= ~(ENDPTCTRL_STALL << ( dir  ? 16 : 0));
-}
-
-bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
-{
-  uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress);
-  uint8_t const dir   = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
-
-  // Must not exceed max endpoint number
-  TU_ASSERT( epnum < _dcd_controller[rhport].ep_count );
-
-  //------------- Prepare Queue Head -------------//
-  dcd_qhd_t * p_qhd = &_dcd_data.qhd[epnum][dir];
-  tu_memclr(p_qhd, sizeof(dcd_qhd_t));
-
-  p_qhd->zero_length_termination = 1;
-  p_qhd->max_packet_size         = tu_edpt_packet_size(p_endpoint_desc);
-  if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS)
-  {
-    p_qhd->iso_mult = 1;
-  }
-
-  p_qhd->qtd_overlay.next        = QTD_NEXT_INVALID;
-
-  CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t));
-
-  // Enable EP Control
-  dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
-
-  uint32_t const epctrl = (p_endpoint_desc->bmAttributes.xfer << ENDPTCTRL_TYPE_POS) | ENDPTCTRL_ENABLE | ENDPTCTRL_TOGGLE_RESET;
-
-  if ( dir == TUSB_DIR_OUT )
-  {
-    dcd_reg->ENDPTCTRL[epnum] = (dcd_reg->ENDPTCTRL[epnum] & 0xFFFF0000u) | epctrl;
-  }else
-  {
-    dcd_reg->ENDPTCTRL[epnum] = (dcd_reg->ENDPTCTRL[epnum] & 0x0000FFFFu) | (epctrl << 16);
-  }
-
-  return true;
-}
-
-void dcd_edpt_close_all (uint8_t rhport)
-{
-  dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
-
-  // Disable all non-control endpoints
-  for( uint8_t epnum=1; epnum < _dcd_controller[rhport].ep_count; epnum++)
-  {
-    _dcd_data.qhd[epnum][TUSB_DIR_OUT].qtd_overlay.halted = 1;
-    _dcd_data.qhd[epnum][TUSB_DIR_IN ].qtd_overlay.halted = 1;
-
-    dcd_reg->ENDPTFLUSH = TU_BIT(epnum) |  TU_BIT(epnum+16);
-    dcd_reg->ENDPTCTRL[epnum] = (TUSB_XFER_BULK << ENDPTCTRL_TYPE_POS) | (TUSB_XFER_BULK << (16+ENDPTCTRL_TYPE_POS));
-  }
-}
-
-void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
-{
-  uint8_t const epnum  = tu_edpt_number(ep_addr);
-  uint8_t const dir    = tu_edpt_dir(ep_addr);
-
-  dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
-
-  _dcd_data.qhd[epnum][dir].qtd_overlay.halted = 1;
-
-  // Flush EP
-  uint32_t const flush_mask = TU_BIT(epnum + (dir ? 16 : 0));
-  dcd_reg->ENDPTFLUSH = flush_mask;
-  while(dcd_reg->ENDPTFLUSH & flush_mask);
-
-  // Clear EP enable
-  dcd_reg->ENDPTCTRL[epnum] &=~(ENDPTCTRL_ENABLE << (dir ? 16 : 0));
-}
-
-static void qhd_start_xfer(uint8_t rhport, uint8_t epnum, uint8_t dir)
-{
-  dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
-  dcd_qhd_t* p_qhd = &_dcd_data.qhd[epnum][dir];
-  dcd_qtd_t* p_qtd = &_dcd_data.qtd[epnum][dir];
-
-  p_qhd->qtd_overlay.halted = false;            // clear any previous error
-  p_qhd->qtd_overlay.next   = (uint32_t) p_qtd; // link qtd to qhd
-
-  // flush cache
-  CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t));
-
-  if ( epnum == 0 )
-  {
-    // follows UM 24.10.8.1.1 Setup packet handling using setup lockout mechanism
-    // wait until ENDPTSETUPSTAT before priming data/status in response TODO add time out
-    while(dcd_reg->ENDPTSETUPSTAT & TU_BIT(0)) {}
-  }
-
-  // start transfer
-  dcd_reg->ENDPTPRIME = TU_BIT(epnum + (dir ? 16 : 0));
-}
-
-bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
-{
-  uint8_t const epnum = tu_edpt_number(ep_addr);
-  uint8_t const dir   = tu_edpt_dir(ep_addr);
-
-  dcd_qhd_t* p_qhd = &_dcd_data.qhd[epnum][dir];
-  dcd_qtd_t* p_qtd = &_dcd_data.qtd[epnum][dir];
-
-  // Prepare qtd
-  qtd_init(p_qtd, buffer, total_bytes);
-
-  // Start qhd transfer
-  p_qhd->ff = NULL;
-  qhd_start_xfer(rhport, epnum, dir);
-
-  return true;
-}
-
-// fifo has to be aligned to 4k boundary
-bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes)
-{
-  uint8_t const epnum = tu_edpt_number(ep_addr);
-  uint8_t const dir   = tu_edpt_dir(ep_addr);
-
-  dcd_qhd_t * p_qhd = &_dcd_data.qhd[epnum][dir];
-  dcd_qtd_t * p_qtd = &_dcd_data.qtd[epnum][dir];
-
-  tu_fifo_buffer_info_t fifo_info;
-
-  if (dir)
-  {
-    tu_fifo_get_read_info(ff, &fifo_info);
-  } else
-  {
-    tu_fifo_get_write_info(ff, &fifo_info);
-  }
-
-  if ( fifo_info.len_lin >= total_bytes )
-  {
-    // Linear length is enough for this transfer
-    qtd_init(p_qtd, fifo_info.ptr_lin, total_bytes);
-  }
-  else
-  {
-    // linear part is not enough
-
-    // prepare TD up to linear length
-    qtd_init(p_qtd, fifo_info.ptr_lin, fifo_info.len_lin);
-
-    if ( !tu_offset4k((uint32_t) fifo_info.ptr_wrap) && !tu_offset4k(tu_fifo_depth(ff)) )
-    {
-      // If buffer is aligned to 4K & buffer size is multiple of 4K
-      // We can make use of buffer page array to also combine the linear + wrapped length
-      p_qtd->total_bytes = p_qtd->expected_bytes = total_bytes;
-
-      for(uint8_t i = 1, page = 0; i < 5; i++)
-      {
-        // pick up buffer array where linear ends
-        if (p_qtd->buffer[i] == 0)
-        {
-          p_qtd->buffer[i] = (uint32_t) fifo_info.ptr_wrap + 4096 * page;
-          page++;
-        }
-      }
-
-      CleanInvalidateDCache_by_Addr((uint32_t*) tu_align((uint32_t) fifo_info.ptr_wrap, 4), total_bytes - fifo_info.len_wrap + 31);
-    }
-    else
-    {
-      // TODO we may need to carry the wrapped length after the linear part complete
-      // for now only transfer up to linear part
-    }
-  }
-
-  // Start qhd transfer
-  p_qhd->ff = ff;
-  qhd_start_xfer(rhport, epnum, dir);
-
-  return true;
-}
-
-//--------------------------------------------------------------------+
-// ISR
-//--------------------------------------------------------------------+
-
-static void process_edpt_complete_isr(uint8_t rhport, uint8_t epnum, uint8_t dir)
-{
-  dcd_qhd_t * p_qhd = &_dcd_data.qhd[epnum][dir];
-  dcd_qtd_t * p_qtd = &_dcd_data.qtd[epnum][dir];
-
-  uint8_t result = p_qtd->halted ? XFER_RESULT_STALLED :
-      ( p_qtd->xact_err || p_qtd->buffer_err ) ? XFER_RESULT_FAILED : XFER_RESULT_SUCCESS;
-
-  if ( result != XFER_RESULT_SUCCESS )
-  {
-    dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
-    // flush to abort error buffer
-    dcd_reg->ENDPTFLUSH = TU_BIT(epnum + (dir ? 16 : 0));
-  }
-
-  uint16_t const xferred_bytes = p_qtd->expected_bytes - p_qtd->total_bytes;
-
-  if (p_qhd->ff)
-  {
-    if (dir == TUSB_DIR_IN)
-    {
-      tu_fifo_advance_read_pointer(p_qhd->ff, xferred_bytes);
-    } else
-    {
-      tu_fifo_advance_write_pointer(p_qhd->ff, xferred_bytes);
-    }
-  }
-
-  // only number of bytes in the IOC qtd
-  dcd_event_xfer_complete(rhport, tu_edpt_addr(epnum, dir), xferred_bytes, result, true);
-}
-
-void dcd_int_handler(uint8_t rhport)
-{
-  dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
-
-  uint32_t const int_enable = dcd_reg->USBINTR;
-  uint32_t const int_status = dcd_reg->USBSTS & int_enable;
-  dcd_reg->USBSTS = int_status; // Acknowledge handled interrupt
-
-  // disabled interrupt sources
-  if (int_status == 0) return;
-
-  // Set if the port controller enters the full or high-speed operational state.
-  // either from Bus Reset or Suspended state
-	if (int_status & INTR_PORT_CHANGE)
-	{
-	  // TU_LOG2("PortChange %08lx\r\n", dcd_reg->PORTSC1);
-
-	  // Reset interrupt is not enabled, we manually check if Port Change is due
-	  // to connection / disconnection
-	  if ( dcd_reg->USBSTS & INTR_RESET )
-	  {
-	    dcd_reg->USBSTS = INTR_RESET;
-
-	    if (dcd_reg->PORTSC1 & PORTSC1_CURRENT_CONNECT_STATUS)
-	    {
-	      uint32_t const speed = (dcd_reg->PORTSC1 & PORTSC1_PORT_SPEED) >> PORTSC1_PORT_SPEED_POS;
-	      bus_reset(rhport);
-	      dcd_event_bus_reset(rhport, (tusb_speed_t) speed, true);
-	    }else
-	    {
-	      dcd_event_bus_signal(rhport, DCD_EVENT_UNPLUGGED, true);
-	    }
-	  }
-	  else
-	  {
-	    // Triggered by resuming from suspended state
-	    if ( !(dcd_reg->PORTSC1 & PORTSC1_SUSPEND) )
-	    {
-	      dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true);
-	    }
-	  }
-	}
-
-  if (int_status & INTR_SUSPEND)
-  {
-    // TU_LOG2("Suspend %08lx\r\n", dcd_reg->PORTSC1);
-
-    if (dcd_reg->PORTSC1 & PORTSC1_SUSPEND)
-    {
-      // Note: Host may delay more than 3 ms before and/or after bus reset before doing enumeration.
-      // Skip suspend event if we are not addressed
-      if ((dcd_reg->DEVICEADDR >> 25) & 0x0f)
-      {
-        dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true);
-      }
-    }
-  }
-
-  if (int_status & INTR_USB)
-  {
-    // Make sure we read the latest version of _dcd_data.
-    CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t));
-
-    uint32_t const edpt_complete = dcd_reg->ENDPTCOMPLETE;
-    dcd_reg->ENDPTCOMPLETE = edpt_complete; // acknowledge
-
-    if (dcd_reg->ENDPTSETUPSTAT)
-    {
-      //------------- Set up Received -------------//
-      // 23.10.10.2 Operational model for setup transfers
-      dcd_reg->ENDPTSETUPSTAT = dcd_reg->ENDPTSETUPSTAT;
-
-      dcd_event_setup_received(rhport, (uint8_t*)(uintptr_t) &_dcd_data.qhd[0][0].setup_request, true);
-    }
-
-    // 23.10.12.3 Failed QTD also get ENDPTCOMPLETE set
-    // nothing to do, we will submit xfer as error to usbd
-    // if (int_status & INTR_ERROR) { }
-
-    if ( edpt_complete )
-    {
-      for(uint8_t epnum = 0; epnum < TUP_DCD_ENDPOINT_MAX; epnum++)
-      {
-        if ( tu_bit_test(edpt_complete, epnum)    ) process_edpt_complete_isr(rhport, epnum, TUSB_DIR_OUT);
-        if ( tu_bit_test(edpt_complete, epnum+16) ) process_edpt_complete_isr(rhport, epnum, TUSB_DIR_IN);
-      }
-    }
-  }
-
-  if (int_status & INTR_SOF)
-  {
-    dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true);
-  }
-}
-
-#endif
diff --git a/src/portable/nxp/transdimension/hcd_transdimension.c b/src/portable/nxp/transdimension/hcd_transdimension.c
deleted file mode 100644
index 0b3e9e4ef..000000000
--- a/src/portable/nxp/transdimension/hcd_transdimension.c
+++ /dev/null
@@ -1,119 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2019 Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "tusb_option.h"
-
-// NXP Trans-Dimension USB IP implement EHCI for host functionality
-
-#if CFG_TUH_ENABLED && \
-    (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT)
-
-#warning "transdimenion is renamed to chipidea (portable/chipidea/ci_hs) to match other opensource naming convention such as linux. This file will be removed in the future, please update your makefile accordingly"
-
-//--------------------------------------------------------------------+
-// INCLUDE
-//--------------------------------------------------------------------+
-#if CFG_TUSB_MCU == OPT_MCU_MIMXRT
-  #include "fsl_device_registers.h"
-#else
-  // LPCOpen for 18xx & 43xx
-  #include "chip.h"
-#endif
-
-#include "common/tusb_common.h"
-#include "common_transdimension.h"
-#include "portable/ehci/ehci_api.h"
-
-//--------------------------------------------------------------------+
-// MACRO CONSTANT TYPEDEF
-//--------------------------------------------------------------------+
-
-// TODO can be merged with dcd_controller_t
-typedef struct
-{
-  uint32_t regs_base;     // registers base
-  const IRQn_Type irqnum; // IRQ number
-}hcd_controller_t;
-
-#if CFG_TUSB_MCU == OPT_MCU_MIMXRT
-  static const hcd_controller_t _hcd_controller[] =
-  {
-    // RT1010 and RT1020 only has 1 USB controller
-    #if FSL_FEATURE_SOC_USBHS_COUNT == 1
-      { .regs_base = USB_BASE , .irqnum = USB_OTG1_IRQn }
-    #else
-      { .regs_base = USB1_BASE, .irqnum = USB_OTG1_IRQn },
-      { .regs_base = USB2_BASE, .irqnum = USB_OTG2_IRQn }
-    #endif
-  };
-
-#else
-  static const hcd_controller_t _hcd_controller[] =
-  {
-    { .regs_base = LPC_USB0_BASE, .irqnum = USB0_IRQn },
-    { .regs_base = LPC_USB1_BASE, .irqnum = USB1_IRQn }
-  };
-#endif
-
-//--------------------------------------------------------------------+
-// Controller API
-//--------------------------------------------------------------------+
-
-bool hcd_init(uint8_t rhport)
-{
-  hcd_registers_t* hcd_reg = (hcd_registers_t*) _hcd_controller[rhport].regs_base;
-
-  // Reset controller
-  hcd_reg->USBCMD |= USBCMD_RESET;
-  while( hcd_reg->USBCMD & USBCMD_RESET ) {}
-
-  // Set mode to device, must be set immediately after reset
-#if CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX
-  // LPC18XX/43XX need to set VBUS Power Select to HIGH
-  // RHPORT1 is fullspeed only (need external PHY for Highspeed)
-  hcd_reg->USBMODE = USBMODE_CM_HOST | USBMODE_VBUS_POWER_SELECT;
-  if (rhport == 1) hcd_reg->PORTSC1 |= PORTSC1_FORCE_FULL_SPEED;
-#else
-  hcd_reg->USBMODE = USBMODE_CM_HOST;
-#endif
-
-  // FIXME force full speed, still have issue with Highspeed enumeration
-  hcd_reg->PORTSC1 |= PORTSC1_FORCE_FULL_SPEED;
-
-  return ehci_init(rhport, (uint32_t) &hcd_reg->CAPLENGTH, (uint32_t) &hcd_reg->USBCMD);
-}
-
-void hcd_int_enable(uint8_t rhport)
-{
-  NVIC_EnableIRQ(_hcd_controller[rhport].irqnum);
-}
-
-void hcd_int_disable(uint8_t rhport)
-{
-  NVIC_DisableIRQ(_hcd_controller[rhport].irqnum);
-}
-
-#endif

From 8af8869d3bcb1504835ead4ba472cd922d997e8d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 16 Jun 2023 11:26:38 +0700
Subject: [PATCH 418/691] renam OPT_MCU_MIMXRT to OPT_MCU_MIMXRT1XXX

fix build util with makefile
---
 examples/host/bare_api/only.txt          | 2 +-
 examples/host/cdc_msc_hid/only.txt       | 2 +-
 examples/host/hid_controller/only.txt    | 2 +-
 examples/host/msc_file_explorer/only.txt | 2 +-
 hw/bsp/board_mcu.h                       | 2 +-
 hw/bsp/f1c100s/README.md                 | 2 +-
 hw/bsp/imxrt/family.cmake                | 4 ++--
 hw/bsp/imxrt/family.mk                   | 2 +-
 src/class/audio/audio_device.c           | 4 ++--
 src/common/tusb_mcu.h                    | 2 +-
 src/portable/chipidea/ci_hs/dcd_ci_hs.c  | 2 +-
 src/portable/chipidea/ci_hs/hcd_ci_hs.c  | 5 ++---
 src/tusb_option.h                        | 6 +++---
 tools/build_utils.py                     | 7 +------
 14 files changed, 19 insertions(+), 25 deletions(-)

diff --git a/examples/host/bare_api/only.txt b/examples/host/bare_api/only.txt
index fa9c14857..45da6c3f2 100644
--- a/examples/host/bare_api/only.txt
+++ b/examples/host/bare_api/only.txt
@@ -3,7 +3,7 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
-mcu:MIMXRT
+mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
 mcu:RP2040
diff --git a/examples/host/cdc_msc_hid/only.txt b/examples/host/cdc_msc_hid/only.txt
index fa9c14857..45da6c3f2 100644
--- a/examples/host/cdc_msc_hid/only.txt
+++ b/examples/host/cdc_msc_hid/only.txt
@@ -3,7 +3,7 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
-mcu:MIMXRT
+mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
 mcu:RP2040
diff --git a/examples/host/hid_controller/only.txt b/examples/host/hid_controller/only.txt
index fa9c14857..45da6c3f2 100644
--- a/examples/host/hid_controller/only.txt
+++ b/examples/host/hid_controller/only.txt
@@ -3,7 +3,7 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
-mcu:MIMXRT
+mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
 mcu:RP2040
diff --git a/examples/host/msc_file_explorer/only.txt b/examples/host/msc_file_explorer/only.txt
index fa9c14857..45da6c3f2 100644
--- a/examples/host/msc_file_explorer/only.txt
+++ b/examples/host/msc_file_explorer/only.txt
@@ -3,7 +3,7 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
-mcu:MIMXRT
+mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
 mcu:RP2040
diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h
index edae4c645..ce2f919bf 100644
--- a/hw/bsp/board_mcu.h
+++ b/hw/bsp/board_mcu.h
@@ -116,7 +116,7 @@
 #elif CFG_TUSB_MCU == OPT_MCU_VALENTYUSB_EPTRI
   // no header needed
 
-#elif CFG_TUSB_MCU == OPT_MCU_MIMXRT
+#elif CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX
   #include "fsl_device_registers.h"
 
 #elif CFG_TUSB_MCU == OPT_MCU_NUC120
diff --git a/hw/bsp/f1c100s/README.md b/hw/bsp/f1c100s/README.md
index f7a863c34..86d454f8e 100644
--- a/hw/bsp/f1c100s/README.md
+++ b/hw/bsp/f1c100s/README.md
@@ -17,4 +17,4 @@ Flash: `make BOARD=f1c100s flash` will write the image to SPI flash, and then re
 
 ## TODO
 
-* Add F1C100s to `#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT` high speed MCU check in examples (maybe we should extract the logic?)
+* Add F1C100s to `#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX` high speed MCU check in examples (maybe we should extract the logic?)
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index f687fe833..c2c067141 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -14,7 +14,7 @@ include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
 set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
-set(FAMILY_MCUS MIMXRT CACHE INTERNAL "")
+set(FAMILY_MCUS MIMXRT1XXX CACHE INTERNAL "")
 
 # enable LTO if supported
 include(CheckIPOSupported)
@@ -119,7 +119,7 @@ function(family_configure_example TARGET)
     )
 
   # Add TinyUSB
-  family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT)
+  family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT1XXX)
 
   # Link dependencies
   target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk
index 0c297f060..c3a69e7c5 100644
--- a/hw/bsp/imxrt/family.mk
+++ b/hw/bsp/imxrt/family.mk
@@ -13,7 +13,7 @@ CFLAGS += \
   -D__ARMVFP__=0 -D__ARMFPV5__=0\
   -DXIP_EXTERNAL_FLASH=1 \
   -DXIP_BOOT_HEADER_ENABLE=1 \
-  -DCFG_TUSB_MCU=OPT_MCU_MIMXRT
+  -DCFG_TUSB_MCU=OPT_MCU_MIMXRT1XXX
 
 ifdef BOARD_TUD_RHPORT
 CFLAGS += -DBOARD_TUD_RHPORT=$(BOARD_TUD_RHPORT)
diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index f487fe60e..e5dbe988a 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -66,7 +66,7 @@
 
 // Use ring buffer if it's available, some MCUs need extra RAM requirements
 #ifndef TUD_AUDIO_PREFER_RING_BUFFER
-  #if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT
+  #if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX
     #define TUD_AUDIO_PREFER_RING_BUFFER 0
   #else
     #define TUD_AUDIO_PREFER_RING_BUFFER 1
@@ -85,7 +85,7 @@
     CFG_TUSB_MCU == OPT_MCU_RX72N     || \
     CFG_TUSB_MCU == OPT_MCU_LPC18XX   || \
     CFG_TUSB_MCU == OPT_MCU_LPC43XX   || \
-    CFG_TUSB_MCU == OPT_MCU_MIMXRT    || \
+    CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX    || \
     CFG_TUSB_MCU == OPT_MCU_MSP432E4
   #if TUD_AUDIO_PREFER_RING_BUFFER
     #define  USE_LINEAR_BUFFER     0
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 485d6168d..56525725e 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -90,7 +90,7 @@
   #define TUP_DCD_ENDPOINT_MAX    8
   #define TUP_RHPORT_HIGHSPEED    1
 
-#elif TU_CHECK_MCU(OPT_MCU_MIMXRT)
+#elif TU_CHECK_MCU(OPT_MCU_MIMXRT1XXX)
   #define TUP_USBIP_CHIPIDEA_HS
   #define TUP_USBIP_EHCI
 
diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
index 850c82e43..588e761a9 100644
--- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
@@ -31,7 +31,7 @@
 #include "device/dcd.h"
 #include "ci_hs_type.h"
 
-#if CFG_TUSB_MCU == OPT_MCU_MIMXRT
+#if CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX
   #include "ci_hs_imxrt.h"
 
   void dcd_dcache_clean(void* addr, uint32_t data_size) {
diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
index 8c27abbf6..0f095147d 100644
--- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
@@ -28,8 +28,7 @@
 
 // Chipidea Highspeed USB IP implement EHCI for host functionality
 
-#if CFG_TUH_ENABLED && \
-    (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT)
+#if CFG_TUH_ENABLED && defined(TUP_USBIP_EHCI)
 
 //--------------------------------------------------------------------+
 // INCLUDE
@@ -39,7 +38,7 @@
 #include "portable/ehci/ehci_api.h"
 #include "ci_hs_type.h"
 
-#if CFG_TUSB_MCU == OPT_MCU_MIMXRT
+#if CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX
   #include "ci_hs_imxrt.h"
 
   void hcd_dcache_clean(void* addr, uint32_t data_size) {
diff --git a/src/tusb_option.h b/src/tusb_option.h
index bb669e693..43e67cf64 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -97,9 +97,9 @@
 #define OPT_MCU_VALENTYUSB_EPTRI  600 ///< Fomu eptri config
 
 // NXP iMX RT
-#define OPT_MCU_MIMXRT            700             ///< NXP iMX RT Series
-#define OPT_MCU_MIMXRT10XX        OPT_MCU_MIMXRT  ///< RT10xx
-#define OPT_MCU_MIMXRT11XX        OPT_MCU_MIMXRT  ///< RT11xx
+#define OPT_MCU_MIMXRT1XXX        700                 ///< NXP iMX RT1xxx Series
+#define OPT_MCU_MIMXRT10XX        OPT_MCU_MIMXRT1XXX  ///< RT10xx
+#define OPT_MCU_MIMXRT11XX        OPT_MCU_MIMXRT1XXX  ///< RT11xx
 
 // Nuvoton
 #define OPT_MCU_NUC121            800
diff --git a/tools/build_utils.py b/tools/build_utils.py
index 6f907729b..5d735bc17 100644
--- a/tools/build_utils.py
+++ b/tools/build_utils.py
@@ -30,13 +30,8 @@ def skip_example(example, board):
         family_dir = board_dir.parent.parent
         family = family_dir.name
 
-        # family CMake
-        family_mk = family_dir / "family.cmake"
-
         # family.mk
-        if not family_mk.exists():
-            family_mk = family_dir / "family.mk"
-
+        family_mk = family_dir / "family.mk"
         mk_contents = family_mk.read_text()
 
     # Find the mcu, first in family mk then board mk

From 65d6acdbfaea84c3274e359acd5e5474f04e8851 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 16 Jun 2023 12:02:42 +0700
Subject: [PATCH 419/691] fix build warnings

---
 hw/bsp/family_support.cmake                  |  2 ++
 hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h | 11 +++++-----
 hw/bsp/imxrt/family.cmake                    | 12 ++++++----
 src/device/dcd.h                             |  6 ++---
 src/host/hcd.h                               |  6 ++---
 src/portable/chipidea/ci_hs/ci_hs_imxrt.h    | 23 +++++++++++---------
 src/portable/chipidea/ci_hs/dcd_ci_hs.c      | 12 +++++-----
 src/portable/chipidea/ci_hs/hcd_ci_hs.c      |  6 ++---
 src/portable/ehci/ehci.c                     |  8 +++----
 9 files changed, 47 insertions(+), 39 deletions(-)

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index dfc2095e5..02040c4ed 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -177,6 +177,8 @@ function(family_add_freertos TARGET)
     target_include_directories(freertos_config INTERFACE
       ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig
       )
+    # add board definition to freertos_config mostly for SystemCoreClock
+    target_link_libraries(freertos_config INTERFACE board_${BOARD})
   endif()
 
   # freertos kernel should be generic as freertos_config however, CMAKE complains with missing variable
diff --git a/hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h
index c1928fbcd..f95927069 100644
--- a/hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h
@@ -44,15 +44,14 @@
 
 // skip if included from IAR assembler
 #ifndef __IASMARM__
-// FIXME cause redundant-decls warnings
-extern uint32_t SystemCoreClock;
+  #include "fsl_device_registers.h"
 #endif
 
 /* Cortex M23/M33 port configuration. */
-#define configENABLE_MPU						0
-#define configENABLE_FPU						1
-#define configENABLE_TRUSTZONE					0
-#define configMINIMAL_SECURE_STACK_SIZE			(1024)
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
 
 #define configUSE_PREEMPTION                    1
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index c2c067141..fc90b7e80 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -103,10 +103,6 @@ function(family_configure_example TARGET)
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # TinyUSB Port
-    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
-    ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
-    ${TOP}/src/portable/ehci/ehci.c
     # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
@@ -121,6 +117,14 @@ function(family_configure_example TARGET)
   # Add TinyUSB
   family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT1XXX)
 
+  # Add TinyUSB Port source
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+    ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+    ${TOP}/src/portable/ehci/ehci.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+
   # Link dependencies
   target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
 
diff --git a/src/device/dcd.h b/src/device/dcd.h
index 4e9cfd5d5..18a708347 100644
--- a/src/device/dcd.h
+++ b/src/device/dcd.h
@@ -108,15 +108,15 @@ typedef struct TU_ATTR_ALIGNED(4)
 
 // clean/flush data cache: write cache -> memory.
 // Required before an DMA TX transfer to make sure data is in memory
-void dcd_dcache_clean(void* addr, uint32_t data_size) TU_ATTR_WEAK;
+void dcd_dcache_clean(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
 
 // invalidate data cache: mark cache as invalid, next read will read from memory
 // Required BOTH before and after an DMA RX transfer
-void dcd_dcache_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK;
+void dcd_dcache_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
 
 // clean and invalidate data cache
 // Required before an DMA transfer where memory is both read/write by DMA
-void dcd_dcache_clean_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK;
+void dcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
 
 //--------------------------------------------------------------------+
 // Controller API
diff --git a/src/host/hcd.h b/src/host/hcd.h
index 5a3b0a087..3355c18b2 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -110,15 +110,15 @@ typedef struct
 
 // clean/flush data cache: write cache -> memory.
 // Required before an DMA TX transfer to make sure data is in memory
-void hcd_dcache_clean(void* addr, uint32_t data_size) TU_ATTR_WEAK;
+void hcd_dcache_clean(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
 
 // invalidate data cache: mark cache as invalid, next read will read from memory
 // Required BOTH before and after an DMA RX transfer
-void hcd_dcache_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK;
+void hcd_dcache_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
 
 // clean and invalidate data cache
 // Required before an DMA transfer where memory is both read/write by DMA
-void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) TU_ATTR_WEAK;
+void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
 
 //--------------------------------------------------------------------+
 // Controller API
diff --git a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h
index ceff893bd..c14f00431 100644
--- a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h
+++ b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h
@@ -64,25 +64,28 @@ static const ci_hs_controller_t _ci_controller[] =
 #define CI_HCD_INT_DISABLE(_p)  NVIC_DisableIRQ(_ci_controller[_p].irqnum)
 
 //------------- DCache -------------//
-TU_ATTR_ALWAYS_INLINE static inline bool imxrt_is_cache_mem(uint32_t addr) {
+TU_ATTR_ALWAYS_INLINE static inline bool imxrt_is_cache_mem(uintptr_t addr) {
   return !(0x20000000 <= addr && addr < 0x20100000);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean(void* addr, uint32_t data_size) {
-  if (imxrt_is_cache_mem((uint32_t) addr)) {
-    SCB_CleanDCache_by_Addr((uint32_t *) addr, (int32_t) data_size);
+TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean(void const* addr, uint32_t data_size) {
+  const uintptr_t addr32 = (uintptr_t) addr;
+  if (imxrt_is_cache_mem(addr32)) {
+    SCB_CleanDCache_by_Addr((uint32_t *) addr32, (int32_t) data_size);
   }
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_invalidate(void* addr, uint32_t data_size) {
-  if (imxrt_is_cache_mem((uint32_t) addr)) {
-    SCB_InvalidateDCache_by_Addr(addr, (int32_t) data_size);
+TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_invalidate(void const* addr, uint32_t data_size) {
+  const uintptr_t addr32 = (uintptr_t) addr;
+  if (imxrt_is_cache_mem(addr32)) {
+    SCB_InvalidateDCache_by_Addr((void*) addr32, (int32_t) data_size);
   }
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean_invalidate(void* addr, uint32_t data_size) {
-  if (imxrt_is_cache_mem((uint32_t) addr)) {
-    SCB_CleanInvalidateDCache_by_Addr(addr, (int32_t) data_size);
+TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
+  const uintptr_t addr32 = (uintptr_t) addr;
+  if (imxrt_is_cache_mem(addr32)) {
+    SCB_CleanInvalidateDCache_by_Addr((uint32_t *) addr32, (int32_t) data_size);
   }
 }
 
diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
index 588e761a9..f50550d33 100644
--- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
@@ -34,15 +34,15 @@
 #if CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX
   #include "ci_hs_imxrt.h"
 
-  void dcd_dcache_clean(void* addr, uint32_t data_size) {
+  void dcd_dcache_clean(void const* addr, uint32_t data_size) {
     imxrt_dcache_clean(addr, data_size);
   }
 
-  void dcd_dcache_invalidate(void* addr, uint32_t data_size) {
+  void dcd_dcache_invalidate(void const* addr, uint32_t data_size) {
     imxrt_dcache_invalidate(addr, data_size);
   }
 
-  void dcd_dcache_clean_invalidate(void* addr, uint32_t data_size) {
+  void dcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
     imxrt_dcache_clean_invalidate(addr, data_size);
   }
 
@@ -58,15 +58,15 @@
   #error "Unsupported MCUs"
 #endif
 
-  TU_ATTR_WEAK void dcd_dcache_clean(void* addr, uint32_t data_size) {
+  TU_ATTR_WEAK void dcd_dcache_clean(void const* addr, uint32_t data_size) {
     (void) addr; (void) data_size;
   }
 
-  TU_ATTR_WEAK void dcd_dcache_invalidate(void* addr, uint32_t data_size) {
+  TU_ATTR_WEAK void dcd_dcache_invalidate(void const* addr, uint32_t data_size) {
     (void) addr; (void) data_size;
   }
 
-  TU_ATTR_WEAK void dcd_dcache_clean_invalidate(void* addr, uint32_t data_size) {
+  TU_ATTR_WEAK void dcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
     (void) addr; (void) data_size;
   }
 #endif
diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
index 0f095147d..56167b8f6 100644
--- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
@@ -41,15 +41,15 @@
 #if CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX
   #include "ci_hs_imxrt.h"
 
-  void hcd_dcache_clean(void* addr, uint32_t data_size) {
+  void hcd_dcache_clean(void const* addr, uint32_t data_size) {
     imxrt_dcache_clean(addr, data_size);
   }
 
-  void hcd_dcache_invalidate(void* addr, uint32_t data_size) {
+  void hcd_dcache_invalidate(void const* addr, uint32_t data_size) {
     imxrt_dcache_invalidate(addr, data_size);
   }
 
-  void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) {
+  void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
     imxrt_dcache_clean_invalidate(addr, data_size);
   }
 
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 2b25eee9d..38711e382 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -162,15 +162,15 @@ static void qtd_init (ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes)
 static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type);
 static inline ehci_link_t* list_next (ehci_link_t const *p_link);
 
-TU_ATTR_WEAK void hcd_dcache_clean(void* addr, uint32_t data_size) {
+TU_ATTR_WEAK void hcd_dcache_clean(void const* addr, uint32_t data_size) {
   (void) addr; (void) data_size;
 }
 
-TU_ATTR_WEAK void hcd_dcache_invalidate(void* addr, uint32_t data_size) {
+TU_ATTR_WEAK void hcd_dcache_invalidate(void const* addr, uint32_t data_size) {
   (void) addr; (void) data_size;
 }
 
-TU_ATTR_WEAK void hcd_dcache_clean_invalidate(void* addr, uint32_t data_size) {
+TU_ATTR_WEAK void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
   (void) addr; (void) data_size;
 }
 
@@ -461,7 +461,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
   qtd_init(td, setup_packet, 8);
   td->pid = EHCI_PID_SETUP;
 
-  hcd_dcache_clean((void *) setup_packet, 8);
+  hcd_dcache_clean(setup_packet, 8);
 
   // attach TD to QHD -> start transferring
   qhd_attach_qtd(qhd, td);

From a7f330fa94b7a39858f6d770737451b51f061c25 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 16 Jun 2023 14:17:25 +0700
Subject: [PATCH 420/691] fix build, update freertos config for cmake

---
 examples/device/net_lwip_webserver/skip.txt   |  2 +-
 hw/bsp/family_support.cmake                   |  8 ++------
 hw/bsp/imxrt/family.cmake                     |  4 +---
 .../FreeRTOSConfig/FreeRTOSConfig.h           | 11 +++++-----
 .../boards/frdm_kl25z/clock_config.c          |  2 +-
 hw/bsp/kinetis_kl/family.cmake                | 10 ++++++----
 hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h  | 13 ++++++------
 hw/bsp/lpc18/family.cmake                     | 12 ++++++-----
 hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h  | 13 ++++++------
 hw/bsp/lpc55/family.cmake                     | 20 ++++++-------------
 hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h    | 13 ++++++------
 hw/bsp/mcx/family.cmake                       |  9 ++++++---
 hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h    | 13 ++++++------
 hw/bsp/nrf/boards/pca10095/board.cmake        |  2 +-
 hw/bsp/nrf/family.cmake                       | 10 +++++++---
 .../stm32g0/FreeRTOSConfig/FreeRTOSConfig.h   | 13 ++++++------
 hw/bsp/stm32g0/family.cmake                   | 11 +++++-----
 .../stm32g4/FreeRTOSConfig/FreeRTOSConfig.h   | 13 ++++++------
 hw/bsp/stm32g4/family.cmake                   | 10 ++++++----
 src/portable/nordic/nrf5x/dcd_nrf5x.c         | 14 +++++++++++++
 src/portable/st/typec/typec_stm32.c           |  4 ++--
 21 files changed, 107 insertions(+), 100 deletions(-)

diff --git a/examples/device/net_lwip_webserver/skip.txt b/examples/device/net_lwip_webserver/skip.txt
index 77c7ec63a..e3a726a2b 100644
--- a/examples/device/net_lwip_webserver/skip.txt
+++ b/examples/device/net_lwip_webserver/skip.txt
@@ -4,7 +4,7 @@ mcu:MSP430x5xx
 mcu:NUC121
 mcu:SAMD11
 mcu:STM32L0
-mcu:MKL25ZXX
+mcu:KINETIS_KL
 family:broadcom_64bit
 family:broadcom_32bit
 board:curiosity_nano
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 02040c4ed..0132ef629 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -192,12 +192,8 @@ function(family_add_freertos TARGET)
     CFG_TUSB_OS=OPT_OS_FREERTOS
     )
   # link tinyusb with freeRTOS kernel
-  target_link_libraries(${TARGET}-tinyusb PUBLIC
-    freertos_kernel
-    )
-  target_link_libraries(${TARGET} PUBLIC
-    freertos_kernel
-    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC freertos_kernel)
+  target_link_libraries(${TARGET} PUBLIC freertos_kernel)
 endfunction()
 
 
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index fc90b7e80..4a9842cf9 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -114,10 +114,8 @@ function(family_configure_example TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB
+  # Add TinyUSB target and port source
   family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT1XXX)
-
-  # Add TinyUSB Port source
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
     ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
diff --git a/hw/bsp/kinetis_kl/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/kinetis_kl/FreeRTOSConfig/FreeRTOSConfig.h
index 960bb23e1..a46af1759 100644
--- a/hw/bsp/kinetis_kl/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/kinetis_kl/FreeRTOSConfig/FreeRTOSConfig.h
@@ -44,15 +44,14 @@
 
 // skip if included from IAR assembler
 #ifndef __IASMARM__
-// FIXME cause redundant-decls warnings
-extern uint32_t SystemCoreClock;
+  #include "fsl_device_registers.h"
 #endif
 
 /* Cortex M23/M33 port configuration. */
-#define configENABLE_MPU						0
-#define configENABLE_FPU						1
-#define configENABLE_TRUSTZONE					0
-#define configMINIMAL_SECURE_STACK_SIZE			(1024)
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
 
 #define configUSE_PREEMPTION                    1
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
diff --git a/hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.c b/hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.c
index 1ba35e0dc..deabe25aa 100644
--- a/hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.c
+++ b/hw/bsp/kinetis_kl/boards/frdm_kl25z/clock_config.c
@@ -83,7 +83,7 @@ board: FRDM-KL25Z
  * Variables
  ******************************************************************************/
 /* System clock frequency. */
-extern uint32_t SystemCoreClock;
+//extern uint32_t SystemCoreClock;
 
 /*******************************************************************************
  * Code
diff --git a/hw/bsp/kinetis_kl/family.cmake b/hw/bsp/kinetis_kl/family.cmake
index f491b3dee..5d4165185 100644
--- a/hw/bsp/kinetis_kl/family.cmake
+++ b/hw/bsp/kinetis_kl/family.cmake
@@ -87,9 +87,6 @@ function(family_configure_example TARGET)
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # TinyUSB Port
-    ${TOP}/src/portable/chipidea/ci_fs/dcd_ci_fs.c
-    ${TOP}/src/portable/nxp/khci/hcd_khci.c
     # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
@@ -101,8 +98,13 @@ function(family_configure_example TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB
+  # Add TinyUSB target and port source
   family_add_tinyusb(${TARGET} OPT_MCU_KINETIS_KL)
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/chipidea/ci_fs/dcd_ci_fs.c
+    ${TOP}/src/portable/nxp/khci/hcd_khci.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 
   # Link dependencies
   target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
diff --git a/hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h
index 323c1a0a4..1b3c64e0b 100644
--- a/hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h
@@ -42,17 +42,16 @@
  * See http://www.freertos.org/a00110.html.
  *----------------------------------------------------------*/
 
-// IAR assembler have limited preprocessor support and it only need following macros:
+// skip if included from IAR assembler
 #ifndef __IASMARM__
-// FIXME cause redundant-decls warnings
-extern uint32_t SystemCoreClock;
+  #include "chip.h"
 #endif
 
 /* Cortex M23/M33 port configuration. */
-#define configENABLE_MPU						0
-#define configENABLE_FPU						0
-#define configENABLE_TRUSTZONE					0
-#define configMINIMAL_SECURE_STACK_SIZE			(1024)
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
 
 #define configUSE_PREEMPTION                    1
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
diff --git a/hw/bsp/lpc18/family.cmake b/hw/bsp/lpc18/family.cmake
index bcdec9c01..4e6e2b56d 100644
--- a/hw/bsp/lpc18/family.cmake
+++ b/hw/bsp/lpc18/family.cmake
@@ -79,10 +79,6 @@ function(family_configure_example TARGET)
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # TinyUSB Port
-    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
-    ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
-    ${TOP}/src/portable/ehci/ehci.c
     # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
@@ -94,8 +90,14 @@ function(family_configure_example TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB
+  # Add TinyUSB target and port source
   family_add_tinyusb(${TARGET} OPT_MCU_LPC18XX)
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+    ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+    ${TOP}/src/portable/ehci/ehci.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 
   # Link dependencies
   target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
diff --git a/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h
index 421106f08..b1cef793e 100644
--- a/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h
@@ -42,17 +42,16 @@
  * See http://www.freertos.org/a00110.html.
  *----------------------------------------------------------*/
 
-// IAR assembler have limited preprocessor support and it only need following macros:
+// skip if included from IAR assembler
 #ifndef __IASMARM__
-// FIXME cause redundant-decls warnings
-extern uint32_t SystemCoreClock;
+  #include "fsl_device_registers.h"
 #endif
 
 /* Cortex M23/M33 port configuration. */
-#define configENABLE_MPU						0
-#define configENABLE_FPU						1
-#define configENABLE_TRUSTZONE					0
-#define configMINIMAL_SECURE_STACK_SIZE			(1024)
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
 
 #define configUSE_PREEMPTION                    1
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index 22a09ce10..43fbe8638 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -16,16 +16,6 @@ set(FAMILY_MCUS LPC55XX CACHE INTERNAL "")
 # include board specific
 include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 
-#------------------------------------
-# freertos
-#------------------------------------
-if (NOT TARGET freertos_config)
-  add_library(freertos_config INTERFACE)
-  target_include_directories(freertos_config SYSTEM INTERFACE
-    ${CMAKE_CURRENT_LIST_DIR}/FreeRTOSConfig
-    )
-endif()
-
 
 #------------------------------------
 # BOARD_TARGET
@@ -106,8 +96,6 @@ function(family_configure_example TARGET)
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # TinyUSB Port
-    ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
     # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
@@ -121,15 +109,19 @@ function(family_configure_example TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB
+  # Add TinyUSB target and port source
   family_add_tinyusb(${TARGET} OPT_MCU_LPC55XX)
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 
   # Link dependencies
   target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
 
   # Flashing
   family_flash_jlink(${TARGET})
-  family_flash_nxplink(${TARGET})
+  #family_flash_nxplink(${TARGET})
   #family_flash_pyocd(${TARGET})
 endfunction()
 
diff --git a/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h
index 421106f08..b1cef793e 100644
--- a/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h
@@ -42,17 +42,16 @@
  * See http://www.freertos.org/a00110.html.
  *----------------------------------------------------------*/
 
-// IAR assembler have limited preprocessor support and it only need following macros:
+// skip if included from IAR assembler
 #ifndef __IASMARM__
-// FIXME cause redundant-decls warnings
-extern uint32_t SystemCoreClock;
+  #include "fsl_device_registers.h"
 #endif
 
 /* Cortex M23/M33 port configuration. */
-#define configENABLE_MPU						0
-#define configENABLE_FPU						1
-#define configENABLE_TRUSTZONE					0
-#define configMINIMAL_SECURE_STACK_SIZE			(1024)
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
 
 #define configUSE_PREEMPTION                    1
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake
index 7c5feaecf..83f44222b 100644
--- a/hw/bsp/mcx/family.cmake
+++ b/hw/bsp/mcx/family.cmake
@@ -88,8 +88,6 @@ function(family_configure_example TARGET)
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS
-    ${TOP}/src/portable/chipidea/$<IF:${PORT},ci_hs/dcd_ci_hs.c,ci_fs/dcd_ci_fs.c>
     # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
@@ -101,8 +99,13 @@ function(family_configure_example TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB
+  # Add TinyUSB target and port source
   family_add_tinyusb(${TARGET} OPT_MCU_MCXN9)
+  target_sources(${TARGET}-tinyusb PUBLIC
+    # TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS
+    ${TOP}/src/portable/chipidea/$<IF:${PORT},ci_hs/dcd_ci_hs.c,ci_fs/dcd_ci_fs.c>
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 
   # Link dependencies
   target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
diff --git a/hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h
index 421106f08..a56f243ea 100644
--- a/hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h
@@ -42,17 +42,16 @@
  * See http://www.freertos.org/a00110.html.
  *----------------------------------------------------------*/
 
-// IAR assembler have limited preprocessor support and it only need following macros:
+// skip if included from IAR assembler
 #ifndef __IASMARM__
-// FIXME cause redundant-decls warnings
-extern uint32_t SystemCoreClock;
+  #include "nrf.h"
 #endif
 
 /* Cortex M23/M33 port configuration. */
-#define configENABLE_MPU						0
-#define configENABLE_FPU						1
-#define configENABLE_TRUSTZONE					0
-#define configMINIMAL_SECURE_STACK_SIZE			(1024)
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
 
 #define configUSE_PREEMPTION                    1
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
diff --git a/hw/bsp/nrf/boards/pca10095/board.cmake b/hw/bsp/nrf/boards/pca10095/board.cmake
index 1eb8ad4f1..1e72243c9 100644
--- a/hw/bsp/nrf/boards/pca10095/board.cmake
+++ b/hw/bsp/nrf/boards/pca10095/board.cmake
@@ -6,7 +6,7 @@ function(update_board TARGET)
     NRF5340_XXAA
     NRF5340_XXAA_APPLICATION
     )
-  target_sources(${TARGET} PUBLIC
+  target_sources(${TARGET} PRIVATE
     ${NRFX_DIR}/drivers/src/nrfx_usbreg.c
     )
 endfunction()
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 7faeaf6cb..88670b50b 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -100,8 +100,6 @@ function(family_configure_example TARGET)
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # TinyUSB Port
-    ${TOP}/src/portable/nordic/nrf5x/dcd_nrf5x.c
     # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
@@ -113,8 +111,14 @@ function(family_configure_example TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB
+  # Add TinyUSB target and port source
   family_add_tinyusb(${TARGET} OPT_MCU_NRF5X)
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/nordic/nrf5x/dcd_nrf5x.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+
+
 
   # Link dependencies
   target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
diff --git a/hw/bsp/stm32g0/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32g0/FreeRTOSConfig/FreeRTOSConfig.h
index 1758efcf2..c8736f6d1 100644
--- a/hw/bsp/stm32g0/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/stm32g0/FreeRTOSConfig/FreeRTOSConfig.h
@@ -42,17 +42,16 @@
  * See http://www.freertos.org/a00110.html.
  *----------------------------------------------------------*/
 
-// IAR assembler have limited preprocessor support and it only need following macros:
+// skip if included from IAR assembler
 #ifndef __IASMARM__
-// FIXME cause redundant-decls warnings
-extern uint32_t SystemCoreClock;
+  #include "stm32g0xx.h"
 #endif
 
 /* Cortex M23/M33 port configuration. */
-#define configENABLE_MPU						0
-#define configENABLE_FPU						0
-#define configENABLE_TRUSTZONE					0
-#define configMINIMAL_SECURE_STACK_SIZE			(1024)
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
 
 #define configUSE_PREEMPTION                    1
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake
index 988033070..1381eaa5f 100644
--- a/hw/bsp/stm32g0/family.cmake
+++ b/hw/bsp/stm32g0/family.cmake
@@ -59,8 +59,6 @@ function(add_board_target BOARD_TARGET)
 
     update_board(${BOARD_TARGET})
 
-    cmake_print_variables(CMAKE_C_COMPILER_ID)
-
     if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
       target_link_options(${BOARD_TARGET} PUBLIC
         "LINKER:--script=${LD_FILE_GNU}"
@@ -90,8 +88,6 @@ function(family_configure_example TARGET)
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # TinyUSB Port
-    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
     # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
@@ -103,8 +99,13 @@ function(family_configure_example TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB
+  # Add TinyUSB target and port source
   family_add_tinyusb(${TARGET} OPT_MCU_STM32G0)
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/typec/typec_stm32.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 
   # Link dependencies
   target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
diff --git a/hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h
index 7974434d3..95fcbb08a 100644
--- a/hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h
@@ -42,17 +42,16 @@
  * See http://www.freertos.org/a00110.html.
  *----------------------------------------------------------*/
 
-// IAR assembler have limited preprocessor support and it only need following macros:
+// skip if included from IAR assembler
 #ifndef __IASMARM__
-// FIXME cause redundant-decls warnings
-extern uint32_t SystemCoreClock;
+  #include "stm32g4xx.h"
 #endif
 
 /* Cortex M23/M33 port configuration. */
-#define configENABLE_MPU						0
-#define configENABLE_FPU						0
-#define configENABLE_TRUSTZONE					0
-#define configMINIMAL_SECURE_STACK_SIZE			(1024)
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
 
 #define configUSE_PREEMPTION                    1
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake
index 618563f66..45525c744 100644
--- a/hw/bsp/stm32g4/family.cmake
+++ b/hw/bsp/stm32g4/family.cmake
@@ -88,9 +88,6 @@ function(family_configure_example TARGET)
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # TinyUSB Port
-    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
-    ${TOP}/src/portable/st/typec/typec_stm32.c
     # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
@@ -102,8 +99,13 @@ function(family_configure_example TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB
+  # Add TinyUSB target and port source
   family_add_tinyusb(${TARGET} OPT_MCU_STM32G4)
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/typec/typec_stm32.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 
   # Link dependencies
   target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c
index eee5686f4..acc967bb3 100644
--- a/src/portable/nordic/nrf5x/dcd_nrf5x.c
+++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c
@@ -29,10 +29,24 @@
 #if CFG_TUD_ENABLED && CFG_TUSB_MCU == OPT_MCU_NRF5X
 
 #include <stdatomic.h>
+
+// Suppress warning caused by nrfx driver
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wcast-qual"
+#pragma GCC diagnostic ignored "-Wcast-align"
+#pragma GCC diagnostic ignored "-Wunused-parameter"
+#endif
+
 #include "nrf.h"
 #include "nrf_clock.h"
 #include "nrf_power.h"
 #include "nrfx_usbd_errata.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 #include "device/dcd.h"
 
 // TODO remove later
diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c
index b09dc5bae..231da5450 100644
--- a/src/portable/st/typec/typec_stm32.c
+++ b/src/portable/st/typec/typec_stm32.c
@@ -186,7 +186,7 @@ bool tcd_init(uint8_t rhport, uint32_t port_type) {
     v_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
     v_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
 
-    TU_LOG1("Initial VState CC1 = %u, CC2 = %u\r\n", v_cc[0], v_cc[1]);
+    TU_LOG1("Initial VState CC1 = %lu, CC2 = %lu\r\n", v_cc[0], v_cc[1]);
 
     // Enable CC1 & CC2 Interrupt
     UCPD1->IMR = UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE;
@@ -246,7 +246,7 @@ void tcd_int_handler(uint8_t rhport) {
     v_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
     v_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
 
-    TU_LOG3("VState CC1 = %u, CC2 = %u\n", v_cc[0], v_cc[1]);
+    TU_LOG3("VState CC1 = %lu, CC2 = %lu\n", v_cc[0], v_cc[1]);
 
     uint32_t cr = UCPD1->CR;
 

From e754795d3adec4bc3a66a4131d0662d87acb4893 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 16 Jun 2023 15:29:34 +0700
Subject: [PATCH 421/691] fix build warnings

---
 .github/workflows/build_iar.yml               |  2 +-
 .../device/audio_test_multi_rate/src/main.c   |  2 +-
 .../host/msc_file_explorer/CMakeLists.txt     |  7 +++++
 examples/rules.mk                             |  1 +
 examples/typec/power_delivery/src/main.c      |  4 +--
 hw/bsp/family_support.cmake                   | 29 +++++++++++++++++++
 hw/bsp/imxrt/family.c                         | 11 +++++++
 hw/bsp/lpc55/family.cmake                     |  1 +
 hw/bsp/nrf/family.c                           | 14 +++++++++
 hw/bsp/stm32g4/family.mk                      |  1 +
 src/portable/st/typec/typec_stm32.c           |  9 ++++--
 tools/cmake/toolchain/arm_gcc.cmake           | 26 -----------------
 tools/cmake/toolchain/arm_iar.cmake           |  3 --
 13 files changed, 73 insertions(+), 37 deletions(-)

diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml
index 83e81164a..7e42a66f8 100644
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@@ -32,7 +32,7 @@ jobs:
         # Alphabetical order
         # Note: bundle multiple families into a matrix since there is only one self-hosted instance can
         # run IAR build. Too many matrix can hurt due to setup/teardown overhead.
-        - 'stm32f0 stm32f1 stm32f4 stm32f7 stm32g4 stm32h7 stm32l4'
+        - 'stm32f0 stm32f1 stm32f7 stm32h7 stm32l4'
     steps:
     - name: Clean workspace
       run: |
diff --git a/examples/device/audio_test_multi_rate/src/main.c b/examples/device/audio_test_multi_rate/src/main.c
index 4dd53dd34..078e783eb 100644
--- a/examples/device/audio_test_multi_rate/src/main.c
+++ b/examples/device/audio_test_multi_rate/src/main.c
@@ -268,7 +268,7 @@ bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const *
 
         sampFreq = (uint32_t)((audio_control_cur_4_t *)pBuff)->bCur;
 
-        TU_LOG2("Clock set current freq: %d\r\n", sampFreq);
+        TU_LOG2("Clock set current freq: %lu\r\n", sampFreq);
 
         return true;
       break;
diff --git a/examples/host/msc_file_explorer/CMakeLists.txt b/examples/host/msc_file_explorer/CMakeLists.txt
index 2d5600059..327d1218a 100644
--- a/examples/host/msc_file_explorer/CMakeLists.txt
+++ b/examples/host/msc_file_explorer/CMakeLists.txt
@@ -21,6 +21,13 @@ target_sources(${PROJECT} PUBLIC
   ${TOP}/lib/fatfs/source/ffunicode.c
   )
 
+# Suppress warnings on fatfs
+set_source_files_properties(
+  ${TOP}/lib/fatfs/source/ff.c
+  PROPERTIES
+  COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual"
+)
+
 # Example include
 target_include_directories(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
diff --git a/examples/rules.mk b/examples/rules.mk
index f6422092a..5727ab7e3 100644
--- a/examples/rules.mk
+++ b/examples/rules.mk
@@ -28,6 +28,7 @@ SRC_C += \
 	src/common/tusb_fifo.c \
 	src/device/usbd.c \
 	src/device/usbd_control.c \
+	src/typec/usbc.c \
 	src/class/audio/audio_device.c \
 	src/class/cdc/cdc_device.c \
 	src/class/dfu/dfu_device.c \
diff --git a/examples/typec/power_delivery/src/main.c b/examples/typec/power_delivery/src/main.c
index 342a2235f..08590aa74 100644
--- a/examples/typec/power_delivery/src/main.c
+++ b/examples/typec/power_delivery/src/main.c
@@ -63,9 +63,6 @@ int main(void)
 
   tuc_init(0, TUSB_TYPEC_PORT_SNK);
 
-  uint32_t start_ms = 0;
-  bool led_state = false;
-
   while (1) {
     led_blinking_task();
 
@@ -155,6 +152,7 @@ bool tuc_pd_data_received_cb(uint8_t rhport, pd_header_t const* header, uint8_t
 }
 
 bool tuc_pd_control_received_cb(uint8_t rhport, pd_header_t const* header) {
+  (void) rhport;
   switch (header->msg_type) {
     case PD_CTRL_ACCEPT:
       printf("PD Request Accepted\r\n");
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 0132ef629..ec36df5c8 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -19,6 +19,33 @@ if (NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake)
   message(FATAL_ERROR "Family '${FAMILY}' is not known/supported")
 endif()
 
+set(WARNING_FLAGS_GNU
+  -Wall
+  -Wextra
+  -Werror
+  -Wfatal-errors
+  -Wdouble-promotion
+  -Wstrict-prototypes
+  -Wstrict-overflow
+  -Werror-implicit-function-declaration
+  -Wfloat-equal
+  -Wundef
+  -Wshadow
+  -Wwrite-strings
+  -Wsign-compare
+  -Wmissing-format-attribute
+  -Wunreachable-code
+  -Wcast-align
+  -Wcast-function-type
+  -Wcast-qual
+  -Wnull-dereference
+  -Wuninitialized
+  -Wunused
+  -Wreturn-type
+  -Wredundant-decls
+  )
+
+set(WARNINGS_FLAGS_IAR "")
 
 function(family_filter RESULT DIR)
   get_filename_component(DIR ${DIR} ABSOLUTE BASE_DIR ${CMAKE_CURRENT_SOURCE_DIR})
@@ -121,6 +148,8 @@ function(family_configure_common TARGET)
     COMMAND ${CMAKE_SIZE} $<TARGET_FILE:${TARGET}>
     )
 
+  target_compile_options(${TARGET} PUBLIC ${WARNING_FLAGS_${CMAKE_C_COMPILER_ID}})
+
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
     # Generate map file
     target_link_options(${TARGET} PUBLIC
diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c
index 46adabf0a..735fbdb9b 100644
--- a/hw/bsp/imxrt/family.c
+++ b/hw/bsp/imxrt/family.c
@@ -26,12 +26,23 @@
 
 #include "bsp/board.h"
 #include "board.h"
+
+// Suppress warning caused by mcu driver
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wunused-parameter"
+#endif
+
 #include "fsl_device_registers.h"
 #include "fsl_gpio.h"
 #include "fsl_iomuxc.h"
 #include "fsl_clock.h"
 #include "fsl_lpuart.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 #include "clock_config.h"
 
 #if defined(BOARD_TUD_RHPORT) && CFG_TUD_ENABLED
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index 43fbe8638..9f6b1f63d 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -102,6 +102,7 @@ function(family_configure_example TARGET)
     # external driver
     ${TOP}/lib/sct_neopixel/sct_neopixel.c
     )
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 157b2bf21..6a559ada6 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -27,6 +27,15 @@
 #include "bsp/board.h"
 #include "board.h"
 
+// Suppress warning caused by mcu driver
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wcast-qual"
+#pragma GCC diagnostic ignored "-Wcast-align"
+#pragma GCC diagnostic ignored "-Wunused-parameter"
+#pragma GCC diagnostic ignored "-Wundef"
+#endif
+
 #include "nrfx.h"
 #include "hal/nrf_gpio.h"
 #include "drivers/include/nrfx_power.h"
@@ -37,6 +46,11 @@
 #include "nrf_soc.h"
 #endif
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/stm32g4/family.mk b/hw/bsp/stm32g4/family.mk
index 5ed84422d..a4b644245 100644
--- a/hw/bsp/stm32g4/family.mk
+++ b/hw/bsp/stm32g4/family.mk
@@ -36,6 +36,7 @@ IAR_ASFLAGS += --cpu cortex-m4 --fpu VFPv4
 
 SRC_C += \
 	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+	src/portable/st/typec/typec_stm32.c \
 	$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c
index 231da5450..bf8b660f0 100644
--- a/src/portable/st/typec/typec_stm32.c
+++ b/src/portable/st/typec/typec_stm32.c
@@ -183,9 +183,9 @@ bool tcd_init(uint8_t rhport, uint32_t port_type) {
 
     // Read Voltage State on CC1 & CC2 fore initial state
     uint32_t v_cc[2];
+    (void) v_cc;
     v_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
     v_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
-
     TU_LOG1("Initial VState CC1 = %lu, CC2 = %lu\r\n", v_cc[0], v_cc[1]);
 
     // Enable CC1 & CC2 Interrupt
@@ -308,8 +308,11 @@ void tcd_int_handler(uint8_t rhport) {
 
     if (!(sr & UCPD_SR_RXERR)) {
       // response with good crc
-      _good_crc.msg_id = ((pd_header_t const*) _rx_buf)->msg_id;
-      dma_tx_start(rhport, &_good_crc, 2);
+      // TODO move this to usbc stack
+      if (_rx_buf) {
+        _good_crc.msg_id = ((pd_header_t const *) _rx_buf)->msg_id;
+        dma_tx_start(rhport, &_good_crc, 2);
+      }
 
       result = XFER_RESULT_SUCCESS;
     }else {
diff --git a/tools/cmake/toolchain/arm_gcc.cmake b/tools/cmake/toolchain/arm_gcc.cmake
index 6dd1e7002..cefa9d2ce 100644
--- a/tools/cmake/toolchain/arm_gcc.cmake
+++ b/tools/cmake/toolchain/arm_gcc.cmake
@@ -35,32 +35,6 @@ set(TOOLCHAIN_EXE_LINKER_FLAGS
   -Wl,--cref
   )
 
-set(TOOLCHAIN_WARNING_FLAGS
-  -Wall
-  -Wextra
-  -Werror
-  -Wfatal-errors
-  -Wdouble-promotion
-  -Wstrict-prototypes
-  -Wstrict-overflow
-  -Werror-implicit-function-declaration
-  -Wfloat-equal
-  -Wundef
-  -Wshadow
-  -Wwrite-strings
-  -Wsign-compare
-  -Wmissing-format-attribute
-  -Wunreachable-code
-  -Wcast-align
-  -Wcast-function-type
-  -Wcast-qual
-  -Wnull-dereference
-  -Wuninitialized
-  -Wunused
-  -Wreturn-type
-  -Wredundant-decls
-  )
-
 include(${CMAKE_CURRENT_LIST_DIR}/set_flags.cmake)
 
 # try_compile is cmake test compiling its own example,
diff --git a/tools/cmake/toolchain/arm_iar.cmake b/tools/cmake/toolchain/arm_iar.cmake
index dfbe55e0d..a487e5b9f 100644
--- a/tools/cmake/toolchain/arm_iar.cmake
+++ b/tools/cmake/toolchain/arm_iar.cmake
@@ -28,7 +28,4 @@ list(APPEND TOOLCHAIN_COMMON_FLAGS
 list(APPEND TOOLCHAIN_EXE_LINKER_FLAGS
   )
 
-list(APPEND TOOLCHAIN_WARNING_FLAGS
-  )
-
 include(${CMAKE_CURRENT_LIST_DIR}/set_flags.cmake)

From 1419091923e7b524b920afb2dabdf323c3b6a44d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 16 Jun 2023 16:47:32 +0700
Subject: [PATCH 422/691] update h7 to cmake, and move iar build to cmake

---
 .github/workflows/build_iar.yml               |   4 +-
 hw/bsp/imxrt/family.mk                        |  14 +-
 .../stm32h7/FreeRTOSConfig/FreeRTOSConfig.h   | 165 +++++++++++++++++
 hw/bsp/stm32h7/boards/daisyseed/board.cmake   |  19 ++
 .../boards/stm32h723nucleo/board.cmake        |  18 ++
 .../stm32h7/boards/stm32h723nucleo/board.mk   |   2 +-
 .../stm32h7/boards/stm32h743eval/board.cmake  |  18 ++
 hw/bsp/stm32h7/boards/stm32h743eval/board.mk  |   2 +-
 .../boards/stm32h743nucleo/board.cmake        |  18 ++
 .../stm32h7/boards/stm32h743nucleo/board.mk   |   2 +-
 .../stm32h743nucleo/stm32h743xx_flash.ld      | 171 -----------------
 .../stm32h7/boards/stm32h745disco/board.cmake |  19 ++
 .../STM32H743IITX_FLASH.ld                    | 173 ------------------
 .../boards/waveshare_openh743i/board.cmake    |  23 +++
 .../boards/waveshare_openh743i/board.mk       |   2 +-
 hw/bsp/stm32h7/family.cmake                   | 130 +++++++++++++
 hw/bsp/stm32h7/family.mk                      |   6 +-
 .../stm32h723xx_flash.ld                      |   0
 .../stm32h743xx_flash.ld                      |   0
 19 files changed, 424 insertions(+), 362 deletions(-)
 create mode 100644 hw/bsp/stm32h7/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/stm32h7/boards/daisyseed/board.cmake
 create mode 100644 hw/bsp/stm32h7/boards/stm32h723nucleo/board.cmake
 create mode 100644 hw/bsp/stm32h7/boards/stm32h743eval/board.cmake
 create mode 100644 hw/bsp/stm32h7/boards/stm32h743nucleo/board.cmake
 delete mode 100644 hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld
 create mode 100644 hw/bsp/stm32h7/boards/stm32h745disco/board.cmake
 delete mode 100644 hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld
 create mode 100644 hw/bsp/stm32h7/boards/waveshare_openh743i/board.cmake
 create mode 100644 hw/bsp/stm32h7/family.cmake
 rename hw/bsp/stm32h7/{boards/stm32h723nucleo => linker}/stm32h723xx_flash.ld (100%)
 rename hw/bsp/stm32h7/{boards/stm32h743eval => linker}/stm32h743xx_flash.ld (100%)

diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml
index 7e42a66f8..08149e201 100644
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@@ -32,7 +32,7 @@ jobs:
         # Alphabetical order
         # Note: bundle multiple families into a matrix since there is only one self-hosted instance can
         # run IAR build. Too many matrix can hurt due to setup/teardown overhead.
-        - 'stm32f0 stm32f1 stm32f7 stm32h7 stm32l4'
+        - 'stm32f0 stm32f1 stm32f7 stm32l4'
     steps:
     - name: Clean workspace
       run: |
@@ -58,7 +58,7 @@ jobs:
           # Alphabetical order
           # Note: bundle multiple families into a matrix since there is only one self-hosted instance can
           # run IAR build. Too many matrix can hurt due to setup/teardown overhead.
-          - 'stm32g0 stm32g4'
+          - 'stm32g0 stm32g4 stm32h7'
     steps:
       - name: Clean workspace
         run: |
diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk
index c3a69e7c5..d0bb5be17 100644
--- a/hw/bsp/imxrt/family.mk
+++ b/hw/bsp/imxrt/family.mk
@@ -4,13 +4,12 @@ DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
 
 include $(TOP)/$(BOARD_PATH)/board.mk
 
+CPU_CORE ?= cortex-m7
+include $(TOP)/tools/make/cpu/$(CPU_CORE).mk
+
 CFLAGS += \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m7 \
-  -mfloat-abi=hard \
-  -mfpu=fpv5-d16 \
-  -D__ARMVFP__=0 -D__ARMFPV5__=0\
+  -D__ARMVFP__=0 \
+  -D__ARMFPV5__=0 \
   -DXIP_EXTERNAL_FLASH=1 \
   -DXIP_BOOT_HEADER_ENABLE=1 \
   -DCFG_TUSB_MCU=OPT_MCU_MIMXRT1XXX
@@ -58,9 +57,6 @@ INC += \
 
 SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_VARIANT).S
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1
-
 # UF2 generation, iMXRT need to strip to text only before conversion
 APPLICATION_ADDR = 0x6000C000
 $(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).elf
diff --git a/hw/bsp/stm32h7/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32h7/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..6881385a8
--- /dev/null
+++ b/hw/bsp/stm32h7/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,165 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "stm32h7xx.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               2
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       4
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/stm32h7/boards/daisyseed/board.cmake b/hw/bsp/stm32h7/boards/daisyseed/board.cmake
new file mode 100644
index 000000000..9fac51128
--- /dev/null
+++ b/hw/bsp/stm32h7/boards/daisyseed/board.cmake
@@ -0,0 +1,19 @@
+set(MCU_VARIANT stm32h750xx)
+set(JLINK_DEVICE stm32h750ibk6_m7)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/stm32h750ibkx_flash.ld)
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32H750xx
+    HSE_VALUE=16000000
+    CORE_CM7
+    # default to PORT 0
+    BOARD_TUD_RHPORT=0
+    BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
+    )
+endfunction()
diff --git a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.cmake b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.cmake
new file mode 100644
index 000000000..ac1acd346
--- /dev/null
+++ b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.cmake
@@ -0,0 +1,18 @@
+set(MCU_VARIANT stm32h723xx)
+set(JLINK_DEVICE stm32h723zg)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/${MCU_VARIANT}_flash.ld)
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32H723xx
+    HSE_VALUE=8000000
+    # default to PORT 0
+    BOARD_TUD_RHPORT=0
+    BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
+    )
+endfunction()
diff --git a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk
index 57dfb7e64..9cf241df8 100644
--- a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk
+++ b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk
@@ -5,7 +5,7 @@ PORT ?= 0
 
 # GCC
 GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h723xx.s
-GCC_LD_FILE = $(BOARD_PATH)/stm32h723xx_flash.ld
+GCC_LD_FILE =  $(FAMILY_PATH)/linker/stm32h723xx_flash.ld
 
 # IAR
 IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h723xx.s
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.cmake b/hw/bsp/stm32h7/boards/stm32h743eval/board.cmake
new file mode 100644
index 000000000..2cd2a4bac
--- /dev/null
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.cmake
@@ -0,0 +1,18 @@
+set(MCU_VARIANT stm32h743xx)
+set(JLINK_DEVICE stm32h743xi)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/${MCU_VARIANT}_flash.ld)
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32H743xx
+    HSE_VALUE=25000000
+    # default to PORT 1 High Speed
+    BOARD_TUD_RHPORT=1
+    BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+    )
+endfunction()
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.mk b/hw/bsp/stm32h7/boards/stm32h743eval/board.mk
index 78ff47c09..558e943b4 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/board.mk
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.mk
@@ -6,7 +6,7 @@ SPEED ?= high
 
 # GCC
 GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s
-GCC_LD_FILE = $(BOARD_PATH)/stm32h743xx_flash.ld
+GCC_LD_FILE = $(FAMILY_PATH)/linker/stm32h743xx_flash.ld
 
 # IAR
 IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h743xx.s
diff --git a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.cmake b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.cmake
new file mode 100644
index 000000000..9d5f09be4
--- /dev/null
+++ b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.cmake
@@ -0,0 +1,18 @@
+set(MCU_VARIANT stm32h743xx)
+set(JLINK_DEVICE stm32h743xi)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/${MCU_VARIANT}_flash.ld)
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32H743xx
+    HSE_VALUE=8000000
+    # default to PORT 0
+    BOARD_TUD_RHPORT=0
+    BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
+    )
+endfunction()
diff --git a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk
index 4bdd5b6a8..0bff0940e 100644
--- a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk
+++ b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk
@@ -5,7 +5,7 @@ PORT ?= 0
 
 # GCC
 GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s
-GCC_LD_FILE = $(BOARD_PATH)/stm32h743xx_flash.ld
+GCC_LD_FILE = $(FAMILY_PATH)/linker/stm32h743xx_flash.ld
 
 # IAR
 IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h743xx.s
diff --git a/hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld b/hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld
deleted file mode 100644
index 336afc01f..000000000
--- a/hw/bsp/stm32h7/boards/stm32h743nucleo/stm32h743xx_flash.ld
+++ /dev/null
@@ -1,171 +0,0 @@
-/*
-*****************************************************************************
-**
-
-**  File        : LinkerScript.ld
-**
-**  Abstract    : Linker script for STM32H743XIHx Device with
-**                2048KByte FLASH, 128KByte RAM
-**
-**                Set heap size, stack size and stack location according
-**                to application requirements.
-**
-**                Set memory bank area and size if external memory is used.
-**
-**  Target      : STMicroelectronics STM32
-**
-**
-**  Distribution: The file is distributed as is, without any warranty
-**                of any kind.
-**
-**  (c)Copyright Ac6.
-**  You may use this file as-is or modify it according to the needs of your
-**  project. Distribution of this file (unmodified or modified) is not
-**  permitted. Ac6 permit registered System Workbench for MCU users the
-**  rights to distribute the assembled, compiled & linked contents of this
-**  file as part of an application binary file, provided that it is built
-**  using the System Workbench for MCU toolchain.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = 0x20020000;    /* end of RAM */
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200;      /* required amount of heap  */
-_Min_Stack_Size = 0x400; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-DTCMRAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 128K
-RAM_D1 (xrw)      : ORIGIN = 0x24000000, LENGTH = 512K
-RAM_D2 (xrw)      : ORIGIN = 0x30000000, LENGTH = 288K
-RAM_D3 (xrw)      : ORIGIN = 0x38000000, LENGTH = 64K
-ITCMRAM (xrw)      : ORIGIN = 0x00000000, LENGTH = 64K
-FLASH (rx)      : ORIGIN = 0x8000000, LENGTH = 2048K
-}
-
-/* Define output sections */
-SECTIONS
-{
-  /* The startup code goes first into FLASH */
-  .isr_vector :
-  {
-    . = ALIGN(4);
-    KEEP(*(.isr_vector)) /* Startup code */
-    . = ALIGN(4);
-  } >FLASH
-
-  /* The program code and other data goes into FLASH */
-  .text :
-  {
-    . = ALIGN(4);
-    *(.text)           /* .text sections (code) */
-    *(.text*)          /* .text* sections (code) */
-    *(.glue_7)         /* glue arm to thumb code */
-    *(.glue_7t)        /* glue thumb to arm code */
-    *(.eh_frame)
-
-    KEEP (*(.init))
-    KEEP (*(.fini))
-
-    . = ALIGN(4);
-    _etext = .;        /* define a global symbols at end of code */
-  } >FLASH
-
-  /* Constant data goes into FLASH */
-  .rodata :
-  {
-    . = ALIGN(4);
-    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
-    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
-    . = ALIGN(4);
-  } >FLASH
-
-  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
-  .ARM : {
-    __exidx_start = .;
-    *(.ARM.exidx*)
-    __exidx_end = .;
-  } >FLASH
-
-  .preinit_array     :
-  {
-    PROVIDE_HIDDEN (__preinit_array_start = .);
-    KEEP (*(.preinit_array*))
-    PROVIDE_HIDDEN (__preinit_array_end = .);
-  } >FLASH
-  .init_array :
-  {
-    PROVIDE_HIDDEN (__init_array_start = .);
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array*))
-    PROVIDE_HIDDEN (__init_array_end = .);
-  } >FLASH
-  .fini_array :
-  {
-    PROVIDE_HIDDEN (__fini_array_start = .);
-    KEEP (*(SORT(.fini_array.*)))
-    KEEP (*(.fini_array*))
-    PROVIDE_HIDDEN (__fini_array_end = .);
-  } >FLASH
-
-  /* used by the startup to initialize data */
-  _sidata = LOADADDR(.data);
-
-  /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data :
-  {
-    . = ALIGN(4);
-    _sdata = .;        /* create a global symbol at data start */
-    *(.data)           /* .data sections */
-    *(.data*)          /* .data* sections */
-
-    . = ALIGN(4);
-    _edata = .;        /* define a global symbol at data end */
-  } >DTCMRAM AT> FLASH
-
-
-  /* Uninitialized data section */
-  . = ALIGN(4);
-  .bss :
-  {
-    /* This is used by the startup in order to initialize the .bss section */
-    _sbss = .;         /* define a global symbol at bss start */
-    __bss_start__ = _sbss;
-    *(.bss)
-    *(.bss*)
-    *(COMMON)
-
-    . = ALIGN(4);
-    _ebss = .;         /* define a global symbol at bss end */
-    __bss_end__ = _ebss;
-  } >DTCMRAM
-
-  /* User_heap_stack section, used to check that there is enough RAM left */
-  ._user_heap_stack :
-  {
-    . = ALIGN(8);
-    PROVIDE ( end = . );
-    PROVIDE ( _end = . );
-    . = . + _Min_Heap_Size;
-    . = . + _Min_Stack_Size;
-    . = ALIGN(8);
-  } >DTCMRAM
-
-
-
-  /* Remove information from the standard libraries */
-  /DISCARD/ :
-  {
-    libc.a ( * )
-    libm.a ( * )
-    libgcc.a ( * )
-  }
-
-  .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake b/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake
new file mode 100644
index 000000000..46744df49
--- /dev/null
+++ b/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake
@@ -0,0 +1,19 @@
+set(MCU_VARIANT stm32h745xx)
+set(JLINK_DEVICE stm32h745xi_m7)
+
+set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_flash_CM7.ld)
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash_CM7.icf)
+
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32H745xx
+    HSE_VALUE=25000000
+    CORE_CM7
+    # default to PORT 0
+    BOARD_TUD_RHPORT=0
+    BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
+    )
+endfunction()
diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld b/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld
deleted file mode 100644
index 697a1a1df..000000000
--- a/hw/bsp/stm32h7/boards/waveshare_openh743i/STM32H743IITX_FLASH.ld
+++ /dev/null
@@ -1,173 +0,0 @@
-/*
-******************************************************************************
-**
-**  File        : LinkerScript.ld
-**
-**  Author      : STM32CubeIDE
-**
-**  Abstract    : Linker script for STM32H7 series
-**                2048Kbytes FLASH and 192Kbytes RAM
-**
-**                Set heap size, stack size and stack location according
-**                to application requirements.
-**
-**                Set memory bank area and size if external memory is used.
-**
-**  Target      : STMicroelectronics STM32
-**
-**  Distribution: The file is distributed as is, without any warranty
-**                of any kind.
-**
-*****************************************************************************
-** @attention
-**
-** Copyright (c) 2019 STMicroelectronics.
-** All rights reserved.
-**
-** This software component is licensed by ST under BSD 3-Clause license,
-** the "License"; You may not use this file except in compliance with the
-** License. You may obtain a copy of the License at:
-**                        opensource.org/licenses/BSD-3-Clause
-**
-****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = 0x20020000;    /* end of RAM */
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x2000 ;  /* required amount of heap  */
-_Min_Stack_Size = 0x2000 ; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-  FLASH (rx)     : ORIGIN = 0x08000000, LENGTH = 2048K
-  RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 128K
-  RAM_D1 (xrw)   : ORIGIN = 0x24000000, LENGTH = 512K
-  RAM_D2 (xrw)   : ORIGIN = 0x30000000, LENGTH = 288K
-  RAM_D3 (xrw)   : ORIGIN = 0x38000000, LENGTH = 64K
-  ITCMRAM (xrw)  : ORIGIN = 0x00000000, LENGTH = 64K
-}
-
-/* Define output sections */
-SECTIONS
-{
-  /* The startup code goes first into FLASH */
-  .isr_vector :
-  {
-    . = ALIGN(4);
-    KEEP(*(.isr_vector)) /* Startup code */
-    . = ALIGN(4);
-  } >FLASH
-
-  /* The program code and other data goes into FLASH */
-  .text :
-  {
-    . = ALIGN(4);
-    *(.text)           /* .text sections (code) */
-    *(.text*)          /* .text* sections (code) */
-    *(.glue_7)         /* glue arm to thumb code */
-    *(.glue_7t)        /* glue thumb to arm code */
-    *(.eh_frame)
-
-    KEEP (*(.init))
-    KEEP (*(.fini))
-
-    . = ALIGN(4);
-    _etext = .;        /* define a global symbols at end of code */
-  } >FLASH
-
-  /* Constant data goes into FLASH */
-  .rodata :
-  {
-    . = ALIGN(4);
-    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
-    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
-    . = ALIGN(4);
-  } >FLASH
-
-  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
-  .ARM : {
-    __exidx_start = .;
-    *(.ARM.exidx*)
-    __exidx_end = .;
-  } >FLASH
-
-  .preinit_array     :
-  {
-    PROVIDE_HIDDEN (__preinit_array_start = .);
-    KEEP (*(.preinit_array*))
-    PROVIDE_HIDDEN (__preinit_array_end = .);
-  } >FLASH
-  .init_array :
-  {
-    PROVIDE_HIDDEN (__init_array_start = .);
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array*))
-    PROVIDE_HIDDEN (__init_array_end = .);
-  } >FLASH
-  .fini_array :
-  {
-    PROVIDE_HIDDEN (__fini_array_start = .);
-    KEEP (*(SORT(.fini_array.*)))
-    KEEP (*(.fini_array*))
-    PROVIDE_HIDDEN (__fini_array_end = .);
-  } >FLASH
-
-  /* used by the startup to initialize data */
-  _sidata = LOADADDR(.data);
-
-  /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data :
-  {
-    . = ALIGN(4);
-    _sdata = .;        /* create a global symbol at data start */
-    *(.data)           /* .data sections */
-    *(.data*)          /* .data* sections */
-    *(.RamFunc)        /* .RamFunc sections */
-    *(.RamFunc*)       /* .RamFunc* sections */
-
-    . = ALIGN(4);
-    _edata = .;        /* define a global symbol at data end */
-  } >RAM AT> FLASH
-
-  /* Uninitialized data section */
-  . = ALIGN(4);
-  .bss :
-  {
-    /* This is used by the startup in order to initialize the .bss section */
-    _sbss = .;         /* define a global symbol at bss start */
-    __bss_start__ = _sbss;
-    *(.bss)
-    *(.bss*)
-    *(COMMON)
-
-    . = ALIGN(4);
-    _ebss = .;         /* define a global symbol at bss end */
-    __bss_end__ = _ebss;
-  } >RAM
-
-  /* User_heap_stack section, used to check that there is enough RAM left */
-  ._user_heap_stack :
-  {
-    . = ALIGN(8);
-    PROVIDE ( end = . );
-    PROVIDE ( _end = . );
-    . = . + _Min_Heap_Size;
-    . = . + _Min_Stack_Size;
-    . = ALIGN(8);
-  } >RAM
-
-  /* Remove information from the standard libraries */
-  /DISCARD/ :
-  {
-    libc.a ( * )
-    libm.a ( * )
-    libgcc.a ( * )
-  }
-
-  .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.cmake b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.cmake
new file mode 100644
index 000000000..033d3a9f2
--- /dev/null
+++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.cmake
@@ -0,0 +1,23 @@
+set(MCU_VARIANT stm32h743xx)
+set(JLINK_DEVICE stm32h743xi)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/${MCU_VARIANT}_flash.ld)
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32H743xx
+    HSE_VALUE=8000000
+    HAL_TIM_MODULE_ENABLED
+    # default to PORT 1 High Speed
+    BOARD_TUD_RHPORT=1
+    BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+    )
+  target_sources(${TARGET} PUBLIC
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_tim.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_tim_ex.c
+    )
+endfunction()
diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk
index e8202d9fc..9997faff9 100644
--- a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk
+++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk
@@ -11,7 +11,7 @@ SRC_C += \
 
 # GCC
 GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32H743IITX_FLASH.ld
+GCC_LD_FILE = $(FAMILY_PATH)/linker/stm32h743xx_flash.ld
 
 # IAR
 IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h743xx.s
diff --git a/hw/bsp/stm32h7/family.cmake b/hw/bsp/stm32h7/family.cmake
new file mode 100644
index 000000000..f04a768a5
--- /dev/null
+++ b/hw/bsp/stm32h7/family.cmake
@@ -0,0 +1,130 @@
+include_guard()
+
+if (NOT BOARD)
+  message(FATAL_ERROR "BOARD not specified")
+endif ()
+
+set(ST_FAMILY h7)
+set(ST_PREFIX stm32${ST_FAMILY}xx)
+
+set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver)
+set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY})
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS STM32H7 CACHE INTERNAL "")
+
+# enable LTO if supported
+include(CheckIPOSupported)
+check_ipo_supported(RESULT IPO_SUPPORTED)
+if (IPO_SUPPORTED)
+  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+endif ()
+
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    add_library(${BOARD_TARGET} STATIC
+      ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
+      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+      )
+    target_include_directories(${BOARD_TARGET} PUBLIC
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+      ${CMSIS_5}/CMSIS/Core/Include
+      ${ST_CMSIS}/Include
+      ${ST_HAL_DRIVER}/Inc
+      )
+    target_compile_options(${BOARD_TARGET} PUBLIC
+      )
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      )
+
+    update_board(${BOARD_TARGET})
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--script=${LD_FILE_GNU}"
+        -nostartfiles
+        # nanolib
+        --specs=nosys.specs
+        --specs=nano.specs
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET)
+  family_configure_common(${TARGET})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32H7)
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_flash_stlink(${TARGET})
+  family_flash_jlink(${TARGET})
+endfunction()
+
+
+function(family_configure_device_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
+
+function(family_configure_host_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
+
+function(family_configure_dual_usb_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
diff --git a/hw/bsp/stm32h7/family.mk b/hw/bsp/stm32h7/family.mk
index 8042248a8..c11240207 100644
--- a/hw/bsp/stm32h7/family.mk
+++ b/hw/bsp/stm32h7/family.mk
@@ -53,13 +53,13 @@ SRC_C += \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_dma.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
-	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart_ex.c \
-	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr.c \
-	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
diff --git a/hw/bsp/stm32h7/boards/stm32h723nucleo/stm32h723xx_flash.ld b/hw/bsp/stm32h7/linker/stm32h723xx_flash.ld
similarity index 100%
rename from hw/bsp/stm32h7/boards/stm32h723nucleo/stm32h723xx_flash.ld
rename to hw/bsp/stm32h7/linker/stm32h723xx_flash.ld
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/stm32h743xx_flash.ld b/hw/bsp/stm32h7/linker/stm32h743xx_flash.ld
similarity index 100%
rename from hw/bsp/stm32h7/boards/stm32h743eval/stm32h743xx_flash.ld
rename to hw/bsp/stm32h7/linker/stm32h743xx_flash.ld

From 268ce0287f25eb73c2f0dbe5180981e09d84ec47 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 16 Jun 2023 19:39:03 +0700
Subject: [PATCH 423/691] correct cmake iar build

---
 .github/workflows/build_iar.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml
index 08149e201..48d66240e 100644
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@@ -73,4 +73,4 @@ jobs:
         run: python3 tools/get_deps.py ${{ matrix.family }}
 
       - name: Build
-        run: python3 tools/build_cmake.py ${{ matrix.family }} -DTOOLCHAIN=iccarm
+        run: python3 tools/build_cmake.py ${{ matrix.family }} -DTOOLCHAIN=iar

From 5e78f08a24a1f53d66be9bc2df82051fc70cdf90 Mon Sep 17 00:00:00 2001
From: dsugisawa-mixi <daisuke.sugisawa.ts@mixi.co.jp>
Date: Sat, 17 Jun 2023 19:04:17 +0900
Subject: [PATCH 424/691] fix example of bare_api, check empty string

---
 examples/host/bare_api/src/main.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/examples/host/bare_api/src/main.c b/examples/host/bare_api/src/main.c
index bb7fa850e..d1ee5e9ac 100644
--- a/examples/host/bare_api/src/main.c
+++ b/examples/host/bare_api/src/main.c
@@ -410,6 +410,7 @@ static int _count_utf8_bytes(const uint16_t *buf, size_t len) {
 }
 
 static void print_utf16(uint16_t *temp_buf, size_t buf_len) {
+    if ((temp_buf[0] & 0xff) == 0) return;  // empty
     size_t utf16_len = ((temp_buf[0] & 0xff) - 2) / sizeof(uint16_t);
     size_t utf8_len = (size_t) _count_utf8_bytes(temp_buf + 1, utf16_len);
     _convert_utf16le_to_utf8(temp_buf + 1, utf16_len, (uint8_t *) temp_buf, sizeof(uint16_t) * buf_len);

From 7dc6829519afd3aa30523950efaa2438b6b6dbe9 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 19 Jun 2023 16:33:47 +0700
Subject: [PATCH 425/691] enable etm trace support for h743 eval

---
 hw/bsp/family_support.cmake                   |    5 +
 hw/bsp/stm32h7/boards/stm32h743eval/board.h   |   57 +-
 .../stm32h743eval/cubemx/stm32h743eval.ioc    | 1125 +++++++++++++++++
 .../stm32h743eval/ozone/h743eval.jdebug       |  249 ++++
 hw/bsp/stm32h7/family.c                       |   26 +
 5 files changed, 1443 insertions(+), 19 deletions(-)
 create mode 100644 hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc
 create mode 100644 hw/bsp/stm32h7/boards/stm32h743eval/ozone/h743eval.jdebug

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index ec36df5c8..73e674c18 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -166,6 +166,11 @@ function(family_configure_common TARGET)
     endif ()
   endif ()
 
+  # ETM Trace
+  if (TRACE_ETM STREQUAL "1")
+    target_compile_definitions(${TARGET} PUBLIC TRACE_ETM)
+  endif ()
+
 endfunction()
 
 
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.h b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
index 666bec9a1..7e3c015c8 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
@@ -85,41 +85,60 @@ static inline void board_stm32h7_clock_init(void)
   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 
-  /* PLL1 for System Clock */
+  // PLL1 for System Clock
+#ifdef TRACE_ETM
+  // From H743 eval board manual
+  // - ETM can only work at 50 MHz clock by default because ETM signals are shared with other peripherals. If better
+  //   performance of ETM is required (84 MHz/98 MHz), R217, R230, R231, R234, R236, SB2, SB5, SB8, SB11,
+  //   SB42, SB57 must be removed to reduce the stub on ETM signals. In this configuration SAI and PDM are not
+  //   functional and NOR Flash and the address of SRAM are limited on A18.
+  // - ETM trace function would be abnormal as SAI_SDB share the same pins with TRACE_D0, and TRACE_D0
+  //   would be forced high by SAI_SDB. When using ETM trace it is necessary to set ADCDAT1 pin (SAI_SDB signal
+  //   of the STM32) of audio codec WM8994ECS/R (U22) by software to be tri-state.
+
+  // Since Trace CLK = PLL1 / 3 --> max PLL1 clock is 150Mhz
+  RCC_OscInitStruct.PLL.PLLM = 2;
+  RCC_OscInitStruct.PLL.PLLN = 24;
+  RCC_OscInitStruct.PLL.PLLP = 2;
+  RCC_OscInitStruct.PLL.PLLQ = 4;
+  RCC_OscInitStruct.PLL.PLLR = 2;
+  RCC_OscInitStruct.PLL.PLLFRACN = 0;
+#else
+  // Set PLL1 to 400Mhz
   RCC_OscInitStruct.PLL.PLLM = 5;
   RCC_OscInitStruct.PLL.PLLN = 160;
-  RCC_OscInitStruct.PLL.PLLFRACN = 0;
   RCC_OscInitStruct.PLL.PLLP = 2;
   RCC_OscInitStruct.PLL.PLLR = 2;
   RCC_OscInitStruct.PLL.PLLQ = 4;
-
+#endif
   RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOMEDIUM;
   RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
   HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
-  /* PLL3 for USB Clock */
-  PeriphClkInitStruct.PLL3.PLL3M = 25;
-  PeriphClkInitStruct.PLL3.PLL3N = 336;
-  PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
-  PeriphClkInitStruct.PLL3.PLL3P = 2;
-  PeriphClkInitStruct.PLL3.PLL3R = 2;
-  PeriphClkInitStruct.PLL3.PLL3Q = 7;
 
-  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
-  PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3;
-  HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
-
-  /* Select PLL as system clock source and configure  bus clocks dividers */
-  RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 | \
-  RCC_CLOCKTYPE_PCLK2  | RCC_CLOCKTYPE_D3PCLK1);
+  /* Select PLL as system clock source and configure bus clocks dividers */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 |
+      RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_D3PCLK1;
 
   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
   RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
   RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
   RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
   RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
-  RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV1;
-  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
+  RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
+  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
+
+  /* PLL3 for USB Clock */
+  PeriphClkInitStruct.PLL3.PLL3M = 25;
+  PeriphClkInitStruct.PLL3.PLL3N = 336;
+  PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
+  PeriphClkInitStruct.PLL3.PLL3P = 2;
+  PeriphClkInitStruct.PLL3.PLL3Q = 7;
+  PeriphClkInitStruct.PLL3.PLL3R = 2;
+
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
+  PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3;
+  HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
 
   /*activate CSI clock mondatory for I/O Compensation Cell*/
   __HAL_RCC_CSI_ENABLE() ;
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc b/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc
new file mode 100644
index 000000000..1cc2cc8fa
--- /dev/null
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc
@@ -0,0 +1,1125 @@
+#MicroXplorer Configuration settings - do not modify
+CAD.formats=[]
+CAD.pinconfig=Project naming
+CAD.provider=
+File.Version=6
+GPIO.groupedBy=Group By Peripherals
+KeepUserPlacement=false
+Mcu.CPN=STM32H743XIH6
+Mcu.Family=STM32H7
+Mcu.IP0=CORTEX_M7
+Mcu.IP1=DEBUG
+Mcu.IP2=NVIC
+Mcu.IP3=RCC
+Mcu.IP4=SYS
+Mcu.IP5=USB_OTG_FS
+Mcu.IP6=USB_OTG_HS
+Mcu.IPNb=7
+Mcu.Name=STM32H743XIHx
+Mcu.Package=TFBGA240
+Mcu.Pin0=PI6
+Mcu.Pin1=PI5
+Mcu.Pin10=PA15 (JTDI)
+Mcu.Pin100=PC1
+Mcu.Pin101=PC2
+Mcu.Pin102=PC3
+Mcu.Pin103=PJ9
+Mcu.Pin104=PH2
+Mcu.Pin105=PA2
+Mcu.Pin106=PA1
+Mcu.Pin107=PJ0
+Mcu.Pin108=PE10
+Mcu.Pin109=PJ8
+Mcu.Pin11=PI1
+Mcu.Pin110=PJ7
+Mcu.Pin111=PJ6
+Mcu.Pin112=PH3
+Mcu.Pin113=PH4
+Mcu.Pin114=PH5
+Mcu.Pin115=PI15
+Mcu.Pin116=PJ1
+Mcu.Pin117=PF13
+Mcu.Pin118=PF14
+Mcu.Pin119=PE9
+Mcu.Pin12=PI0
+Mcu.Pin120=PE11
+Mcu.Pin121=PB10
+Mcu.Pin122=PB11
+Mcu.Pin123=PH10
+Mcu.Pin124=PH11
+Mcu.Pin125=PD15
+Mcu.Pin126=PD14
+Mcu.Pin127=PA6
+Mcu.Pin128=PA7
+Mcu.Pin129=PB2
+Mcu.Pin13=PI7
+Mcu.Pin130=PF12
+Mcu.Pin131=PF15
+Mcu.Pin132=PE12
+Mcu.Pin133=PE15
+Mcu.Pin134=PJ5
+Mcu.Pin135=PH9
+Mcu.Pin136=PH12
+Mcu.Pin137=PD11
+Mcu.Pin138=PD12
+Mcu.Pin139=PD13
+Mcu.Pin14=PE1
+Mcu.Pin140=PA0_C
+Mcu.Pin141=PA5
+Mcu.Pin142=PC4
+Mcu.Pin143=PB1
+Mcu.Pin144=PJ2
+Mcu.Pin145=PF11
+Mcu.Pin146=PG0
+Mcu.Pin147=PE8
+Mcu.Pin148=PE13
+Mcu.Pin149=PH6
+Mcu.Pin15=PB6
+Mcu.Pin150=PH8
+Mcu.Pin151=PB12
+Mcu.Pin152=PB15
+Mcu.Pin153=PD10
+Mcu.Pin154=PD9
+Mcu.Pin155=PA3
+Mcu.Pin156=PA4
+Mcu.Pin157=PC5
+Mcu.Pin158=PB0
+Mcu.Pin159=PJ3
+Mcu.Pin16=PB4 (NJTRST)
+Mcu.Pin160=PJ4
+Mcu.Pin161=PG1
+Mcu.Pin162=PE7
+Mcu.Pin163=PE14
+Mcu.Pin164=PH7
+Mcu.Pin165=PB13
+Mcu.Pin166=PB14
+Mcu.Pin167=PD8
+Mcu.Pin168=VP_SYS_VS_Systick
+Mcu.Pin17=PK4
+Mcu.Pin18=PG11
+Mcu.Pin19=PJ15
+Mcu.Pin2=PI4
+Mcu.Pin20=PD6
+Mcu.Pin21=PD3
+Mcu.Pin22=PC11
+Mcu.Pin23=PA14 (JTCK/SWCLK)
+Mcu.Pin24=PI2
+Mcu.Pin25=PH15
+Mcu.Pin26=PH14
+Mcu.Pin27=PC15-OSC32_OUT (OSC32_OUT)
+Mcu.Pin28=PC14-OSC32_IN (OSC32_IN)
+Mcu.Pin29=PE2
+Mcu.Pin3=PB5
+Mcu.Pin30=PE0
+Mcu.Pin31=PB7
+Mcu.Pin32=PB3 (JTDO/TRACESWO)
+Mcu.Pin33=PK6
+Mcu.Pin34=PK3
+Mcu.Pin35=PG12
+Mcu.Pin36=PD7
+Mcu.Pin37=PC12
+Mcu.Pin38=PI3
+Mcu.Pin39=PA13 (JTMS/SWDIO)
+Mcu.Pin4=PK5
+Mcu.Pin40=PE5
+Mcu.Pin41=PE4
+Mcu.Pin42=PE3
+Mcu.Pin43=PB9
+Mcu.Pin44=PB8
+Mcu.Pin45=PG15
+Mcu.Pin46=PK7
+Mcu.Pin47=PG14
+Mcu.Pin48=PG13
+Mcu.Pin49=PJ14
+Mcu.Pin5=PG10
+Mcu.Pin50=PJ12
+Mcu.Pin51=PD2
+Mcu.Pin52=PD0
+Mcu.Pin53=PA10
+Mcu.Pin54=PA9
+Mcu.Pin55=PH13
+Mcu.Pin56=PI9
+Mcu.Pin57=PC13
+Mcu.Pin58=PI8
+Mcu.Pin59=PE6
+Mcu.Pin6=PG9
+Mcu.Pin60=PJ13
+Mcu.Pin61=PD1
+Mcu.Pin62=PC8
+Mcu.Pin63=PC9
+Mcu.Pin64=PA8
+Mcu.Pin65=PA12
+Mcu.Pin66=PA11
+Mcu.Pin67=PI10
+Mcu.Pin68=PI11
+Mcu.Pin69=PC7
+Mcu.Pin7=PD5
+Mcu.Pin70=PC6
+Mcu.Pin71=PG8
+Mcu.Pin72=PG7
+Mcu.Pin73=PF2
+Mcu.Pin74=PF1
+Mcu.Pin75=PF0
+Mcu.Pin76=PG5
+Mcu.Pin77=PG6
+Mcu.Pin78=PI12
+Mcu.Pin79=PI13
+Mcu.Pin8=PD4
+Mcu.Pin80=PI14
+Mcu.Pin81=PF3
+Mcu.Pin82=PG4
+Mcu.Pin83=PG3
+Mcu.Pin84=PG2
+Mcu.Pin85=PK2
+Mcu.Pin86=PH1-OSC_OUT (PH1)
+Mcu.Pin87=PH0-OSC_IN (PH0)
+Mcu.Pin88=PF5
+Mcu.Pin89=PF4
+Mcu.Pin9=PC10
+Mcu.Pin90=PK0
+Mcu.Pin91=PK1
+Mcu.Pin92=PF6
+Mcu.Pin93=PF7
+Mcu.Pin94=PF8
+Mcu.Pin95=PJ11
+Mcu.Pin96=PC0
+Mcu.Pin97=PF10
+Mcu.Pin98=PF9
+Mcu.Pin99=PJ10
+Mcu.PinsNb=169
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32H743XIHx
+MxCube.Version=6.8.1
+MxDb.Version=DB.6.0.81
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:false
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
+PA0_C.GPIOParameters=GPIO_Label
+PA0_C.GPIO_Label=Potentiometer
+PA0_C.Locked=true
+PA0_C.Signal=ADCx_INN1
+PA1.GPIOParameters=GPIO_Label
+PA1.GPIO_Label=RMII_REF_CLK [LAN8742A_REFCLK0]
+PA1.Locked=true
+PA1.Signal=ETH_REF_CLK
+PA10.GPIOParameters=GPIO_Label
+PA10.GPIO_Label=USB_FS1_ID
+PA10.Locked=true
+PA10.Signal=USB_OTG_FS_ID
+PA11.GPIOParameters=GPIO_Label
+PA11.GPIO_Label=USB_FS1_DM
+PA11.Locked=true
+PA11.Mode=Device_Only
+PA11.Signal=USB_OTG_FS_DM
+PA12.GPIOParameters=GPIO_Label
+PA12.GPIO_Label=USB_FS1_DP
+PA12.Locked=true
+PA12.Mode=Device_Only
+PA12.Signal=USB_OTG_FS_DP
+PA13\ (JTMS/SWDIO).Locked=true
+PA13\ (JTMS/SWDIO).Mode=Trace_Synchro_4bits_SW
+PA13\ (JTMS/SWDIO).Signal=DEBUG_JTMS-SWDIO
+PA14\ (JTCK/SWCLK).Locked=true
+PA14\ (JTCK/SWCLK).Mode=Trace_Synchro_4bits_SW
+PA14\ (JTCK/SWCLK).Signal=DEBUG_JTCK-SWCLK
+PA15\ (JTDI).GPIOParameters=GPIO_Label
+PA15\ (JTDI).GPIO_Label=TDI
+PA15\ (JTDI).Locked=true
+PA15\ (JTDI).Signal=DEBUG_JTDI
+PA2.GPIOParameters=GPIO_Label
+PA2.GPIO_Label=ETH_MDIO [LAN8742A_MDIO]
+PA2.Locked=true
+PA2.Signal=ETH_MDIO
+PA3.GPIOParameters=GPIO_Label
+PA3.GPIO_Label=ULPI_D0 [USB3320C_D0]
+PA3.Locked=true
+PA3.Mode=Device_HS
+PA3.Signal=USB_OTG_HS_ULPI_D0
+PA4.GPIOParameters=GPIO_Label
+PA4.GPIO_Label=LED3_RGB [LD3_Red]
+PA4.Locked=true
+PA4.Signal=GPIO_Output
+PA5.GPIOParameters=GPIO_Label
+PA5.GPIO_Label=ULPI_CK  [USB3320C_CLKOUT]
+PA5.Locked=true
+PA5.Mode=Device_HS
+PA5.Signal=USB_OTG_HS_ULPI_CK
+PA6.GPIOParameters=GPIO_Label
+PA6.GPIO_Label=LCD_BL_CTRL
+PA6.Locked=true
+PA6.Signal=GPIO_Output
+PA7.GPIOParameters=GPIO_Label
+PA7.GPIO_Label=RMII_CRS_DV [LAN8742A_CRS_DV]
+PA7.Locked=true
+PA7.Signal=ETH_CRS_DV
+PA8.GPIOParameters=GPIO_Label
+PA8.GPIO_Label=MCO
+PA8.Locked=true
+PA8.Signal=RCC_MCO_1
+PA9.GPIOParameters=GPIO_Label
+PA9.GPIO_Label=VBUS_FS1
+PA9.Locked=true
+PA9.Signal=USB_OTG_FS_VBUS
+PB0.GPIOParameters=GPIO_Label
+PB0.GPIO_Label=ULPI_D1 [USB3320C_D1]
+PB0.Locked=true
+PB0.Mode=Device_HS
+PB0.Signal=USB_OTG_HS_ULPI_D1
+PB1.GPIOParameters=GPIO_Label
+PB1.GPIO_Label=ULPI_D2 [USB3320C_D2]
+PB1.Locked=true
+PB1.Mode=Device_HS
+PB1.Signal=USB_OTG_HS_ULPI_D2
+PB10.GPIOParameters=GPIO_Label
+PB10.GPIO_Label=ULPI_D3 [USB3320C_D3]
+PB10.Locked=true
+PB10.Mode=Device_HS
+PB10.Signal=USB_OTG_HS_ULPI_D3
+PB11.GPIOParameters=GPIO_Label
+PB11.GPIO_Label=ULPI_D4 [USB3320C_D4]
+PB11.Locked=true
+PB11.Mode=Device_HS
+PB11.Signal=USB_OTG_HS_ULPI_D4
+PB12.GPIOParameters=GPIO_Label
+PB12.GPIO_Label=ULPI_D5 [USB3320C_D5]
+PB12.Locked=true
+PB12.Mode=Device_HS
+PB12.Signal=USB_OTG_HS_ULPI_D5
+PB13.GPIOParameters=GPIO_Label
+PB13.GPIO_Label=ULPI_D6 [USB3320C_D6]
+PB13.Locked=true
+PB13.Mode=Device_HS
+PB13.Signal=USB_OTG_HS_ULPI_D6
+PB14.GPIOParameters=GPIO_Label
+PB14.GPIO_Label=RS232_TX [ST3241EBPR_T2IN]
+PB14.Locked=true
+PB14.Signal=USART1_TX
+PB15.GPIOParameters=GPIO_Label
+PB15.GPIO_Label=RS_232RX [ST3241EBPR_R3OUT]
+PB15.Locked=true
+PB15.Signal=USART1_RX
+PB2.GPIOParameters=GPIO_Label
+PB2.GPIO_Label=QSPI_CLK [MT25TL01GHBA8ESF_CLK_1]
+PB2.Locked=true
+PB2.Signal=QUADSPI_CLK
+PB3\ (JTDO/TRACESWO).Locked=true
+PB3\ (JTDO/TRACESWO).Signal=DEBUG_JTDO-SWO
+PB4\ (NJTRST).GPIOParameters=GPIO_Label
+PB4\ (NJTRST).GPIO_Label=TRST
+PB4\ (NJTRST).Locked=true
+PB4\ (NJTRST).Signal=DEBUG_JTRST
+PB5.GPIOParameters=GPIO_Label
+PB5.GPIO_Label=ULPI_D7 [USB3320C_D7]
+PB5.Locked=true
+PB5.Mode=Device_HS
+PB5.Signal=USB_OTG_HS_ULPI_D7
+PB6.GPIOParameters=GPIO_Label
+PB6.GPIO_Label=I2C1_SCL [STM32L152CCT6_I2C_SCL]
+PB6.Locked=true
+PB6.Signal=I2C1_SCL
+PB7.GPIOParameters=GPIO_Label
+PB7.GPIO_Label=I2C1_SDA [STM32L152CCT6_I2C_SDA]
+PB7.Locked=true
+PB7.Signal=I2C1_SDA
+PB8.GPIOParameters=GPIO_Label
+PB8.GPIO_Label=SDIO1_CKIN
+PB8.Locked=true
+PB8.Signal=SDMMC1_CKIN
+PB9.GPIOParameters=GPIO_Label
+PB9.GPIO_Label=SDIO1_CDIR
+PB9.Locked=true
+PB9.Signal=SDMMC1_CDIR
+PC0.GPIOParameters=GPIO_Label
+PC0.GPIO_Label=ULPI_STP [USB3320C_STP]
+PC0.Locked=true
+PC0.Mode=Device_HS
+PC0.Signal=USB_OTG_HS_ULPI_STP
+PC1.GPIOParameters=GPIO_Label
+PC1.GPIO_Label=RMII_MDC [LAN8742A_MDC]
+PC1.Locked=true
+PC1.Signal=ETH_MDC
+PC10.GPIOParameters=GPIO_Label
+PC10.GPIO_Label=SDIO1_D2
+PC10.Locked=true
+PC10.Signal=SDMMC1_D2
+PC11.GPIOParameters=GPIO_Label
+PC11.GPIO_Label=SDIO1_D3
+PC11.Locked=true
+PC11.Signal=SDMMC1_D3
+PC12.GPIOParameters=GPIO_Label
+PC12.GPIO_Label=SDIO1_CLK
+PC12.Locked=true
+PC12.Signal=SDMMC1_CK
+PC13.GPIOParameters=GPIO_Label
+PC13.GPIO_Label=TAMPER_KEY [B1]
+PC13.Locked=true
+PC13.Signal=RTC_TAMP1
+PC14-OSC32_IN\ (OSC32_IN).Locked=true
+PC14-OSC32_IN\ (OSC32_IN).Signal=RCC_OSC32_IN
+PC15-OSC32_OUT\ (OSC32_OUT).Locked=true
+PC15-OSC32_OUT\ (OSC32_OUT).Signal=RCC_OSC32_OUT
+PC2.GPIOParameters=GPIO_Label
+PC2.GPIO_Label=DFSDM_CLK
+PC2.Locked=true
+PC2.Signal=S_CKOUTDFSDM1
+PC3.GPIOParameters=GPIO_Label
+PC3.GPIO_Label=DFSM_DAT1
+PC3.Locked=true
+PC3.Signal=S_DATAIN1DFSDM1
+PC4.GPIOParameters=GPIO_Label
+PC4.GPIO_Label=RMII_RXD0 [LAN8742A_RXD0]
+PC4.Locked=true
+PC4.Signal=ETH_RXD0
+PC5.GPIOParameters=GPIO_Label
+PC5.GPIO_Label=RMII_RXD1 [LAN8742A_RXD1]
+PC5.Locked=true
+PC5.Signal=ETH_RXD1
+PC6.GPIOParameters=GPIO_Label
+PC6.GPIO_Label=SDIO1_D0DIR
+PC6.Locked=true
+PC6.Signal=SDMMC1_D0DIR
+PC7.Locked=true
+PC7.Signal=DEBUG_TRGIO
+PC8.GPIOParameters=GPIO_Label
+PC8.GPIO_Label=SDIO1_D0
+PC8.Locked=true
+PC8.Signal=SDMMC1_D0
+PC9.GPIOParameters=GPIO_Label
+PC9.GPIO_Label=SDIO1_D1
+PC9.Locked=true
+PC9.Signal=SDMMC1_D1
+PD0.GPIOParameters=GPIO_Label
+PD0.GPIO_Label=D2 [IS42S32800G_DQ2]
+PD0.Locked=true
+PD0.Signal=FMC_D2_DA2
+PD1.GPIOParameters=GPIO_Label
+PD1.GPIO_Label=D3 [IS42S32800G_DQ3]
+PD1.Locked=true
+PD1.Signal=FMC_D3_DA3
+PD10.GPIOParameters=GPIO_Label
+PD10.GPIO_Label=D15 [IS42S32800G_DQ15]
+PD10.Locked=true
+PD10.Signal=FMC_D15_DA15
+PD11.GPIOParameters=GPIO_Label
+PD11.GPIO_Label=A16 [PC28F128M29EWLA_A16]
+PD11.Locked=true
+PD11.Signal=FMC_A16_CLE
+PD12.GPIOParameters=GPIO_Label
+PD12.GPIO_Label=A17 [PC28F128M29EWLA_A17]
+PD12.Locked=true
+PD12.Signal=FMC_A17_ALE
+PD13.GPIOParameters=GPIO_Label
+PD13.GPIO_Label=A18 [PC28F128M29EWLA_A18]
+PD13.Locked=true
+PD13.Signal=FMC_A18
+PD14.GPIOParameters=GPIO_Label
+PD14.GPIO_Label=D0 [IS42S32800G_DQ0]
+PD14.Locked=true
+PD14.Signal=FMC_D0_DA0
+PD15.GPIOParameters=GPIO_Label
+PD15.GPIO_Label=D1 [IS42S32800G_DQ1]
+PD15.Locked=true
+PD15.Signal=FMC_D1_DA1
+PD2.GPIOParameters=GPIO_Label
+PD2.GPIO_Label=SDIO1_CMD
+PD2.Locked=true
+PD2.Signal=SDMMC1_CMD
+PD3.GPIOParameters=GPIO_Label
+PD3.GPIO_Label=FDCAN1_STBY [MCP2562FD_STBY]
+PD3.Locked=true
+PD3.Signal=GPIO_Output
+PD4.GPIOParameters=GPIO_Label
+PD4.GPIO_Label=FMC_NOE [IS61WV102416BLL_OE]
+PD4.Locked=true
+PD4.Signal=FMC_NOE
+PD5.GPIOParameters=GPIO_Label
+PD5.GPIO_Label=FMC_NWE [IS61WV102416BLL_WE]
+PD5.Locked=true
+PD5.Signal=FMC_NWE
+PD6.GPIOParameters=GPIO_Label
+PD6.GPIO_Label=FMC_NWAIT [PC28F128M29EWLA_RB]
+PD6.Locked=true
+PD6.Signal=FMC_NWAIT
+PD7.GPIOParameters=GPIO_Label
+PD7.GPIO_Label=FMC_NE1 [PC28F128M29EWLA_E]
+PD7.Locked=true
+PD7.Signal=FMC_NE1
+PD8.GPIOParameters=GPIO_Label
+PD8.GPIO_Label=D13 [IS42S32800G_DQ13]
+PD8.Locked=true
+PD8.Signal=FMC_D13_DA13
+PD9.GPIOParameters=GPIO_Label
+PD9.GPIO_Label=D14 [IS42S32800G_DQ14]
+PD9.Locked=true
+PD9.Signal=FMC_D14_DA14
+PE0.GPIOParameters=GPIO_Label
+PE0.GPIO_Label=FMC_NBL0 [IS42S32800G_DQM0]
+PE0.Locked=true
+PE0.Signal=FMC_NBL0
+PE1.GPIOParameters=GPIO_Label
+PE1.GPIO_Label=FMC_NBL1 [IS42S32800G_DQM1]
+PE1.Locked=true
+PE1.Signal=FMC_NBL1
+PE10.GPIOParameters=GPIO_Label
+PE10.GPIO_Label=D7 [IS42S32800G_DQ7]
+PE10.Locked=true
+PE10.Signal=FMC_D7_DA7
+PE11.GPIOParameters=GPIO_Label
+PE11.GPIO_Label=D8 [IS42S32800G_DQ8]
+PE11.Locked=true
+PE11.Signal=FMC_D8_DA8
+PE12.GPIOParameters=GPIO_Label
+PE12.GPIO_Label=D9 [IS42S32800G_DQ9]
+PE12.Locked=true
+PE12.Signal=FMC_D9_DA9
+PE13.GPIOParameters=GPIO_Label
+PE13.GPIO_Label=D10 [IS42S32800G_DQ10]
+PE13.Locked=true
+PE13.Signal=FMC_D10_DA10
+PE14.GPIOParameters=GPIO_Label
+PE14.GPIO_Label=D11 [IS42S32800G_DQ11]
+PE14.Locked=true
+PE14.Signal=FMC_D11_DA11
+PE15.GPIOParameters=GPIO_Label
+PE15.GPIO_Label=D12 [IS42S32800G_DQ12]
+PE15.Locked=true
+PE15.Signal=FMC_D12_DA12
+PE2.Locked=true
+PE2.Mode=Trace_Synchro_4bits_SW
+PE2.Signal=DEBUG_TRACECLK
+PE3.Locked=true
+PE3.Mode=Trace_Synchro_4bits_SW
+PE3.Signal=DEBUG_TRACED0
+PE4.Locked=true
+PE4.Mode=Trace_Synchro_4bits_SW
+PE4.Signal=DEBUG_TRACED1
+PE5.Locked=true
+PE5.Mode=Trace_Synchro_4bits_SW
+PE5.Signal=DEBUG_TRACED2
+PE6.Locked=true
+PE6.Mode=Trace_Synchro_4bits_SW
+PE6.Signal=DEBUG_TRACED3
+PE7.GPIOParameters=GPIO_Label
+PE7.GPIO_Label=D4 [IS42S32800G_DQ4]
+PE7.Locked=true
+PE7.Signal=FMC_D4_DA4
+PE8.GPIOParameters=GPIO_Label
+PE8.GPIO_Label=D5 [IS42S32800G_DQ5]
+PE8.Locked=true
+PE8.Signal=FMC_D5_DA5
+PE9.GPIOParameters=GPIO_Label
+PE9.GPIO_Label=D6 [IS42S32800G_DQ6]
+PE9.Locked=true
+PE9.Signal=FMC_D6_DA6
+PF0.GPIOParameters=GPIO_Label
+PF0.GPIO_Label=A0 [PC28F128M29EWLA_A0]
+PF0.Locked=true
+PF0.Signal=FMC_A0
+PF1.GPIOParameters=GPIO_Label
+PF1.GPIO_Label=A1 [PC28F128M29EWLA_A1]
+PF1.Locked=true
+PF1.Signal=FMC_A1
+PF10.GPIOParameters=GPIO_Label
+PF10.GPIO_Label=LED1_RGB [LD1_Green]
+PF10.Locked=true
+PF10.Signal=GPIO_Output
+PF11.GPIOParameters=GPIO_Label
+PF11.GPIO_Label=SNDRAS [IS42S32800G_RAS]
+PF11.Locked=true
+PF11.Signal=FMC_SDNRAS
+PF12.GPIOParameters=GPIO_Label
+PF12.GPIO_Label=A6 [PC28F128M29EWLA_A6]
+PF12.Locked=true
+PF12.Signal=FMC_A6
+PF13.GPIOParameters=GPIO_Label
+PF13.GPIO_Label=A7 [PC28F128M29EWLA_A7]
+PF13.Locked=true
+PF13.Signal=FMC_A7
+PF14.GPIOParameters=GPIO_Label
+PF14.GPIO_Label=A8 [PC28F128M29EWLA_A8]
+PF14.Locked=true
+PF14.Signal=FMC_A8
+PF15.GPIOParameters=GPIO_Label
+PF15.GPIO_Label=A9 [PC28F128M29EWLA_A9]
+PF15.Locked=true
+PF15.Signal=FMC_A9
+PF2.GPIOParameters=GPIO_Label
+PF2.GPIO_Label=A2 [PC28F128M29EWLA_A2]
+PF2.Locked=true
+PF2.Signal=FMC_A2
+PF3.GPIOParameters=GPIO_Label
+PF3.GPIO_Label=A3 [PC28F128M29EWLA_A3]
+PF3.Locked=true
+PF3.Signal=FMC_A3
+PF4.GPIOParameters=GPIO_Label
+PF4.GPIO_Label=A4 [PC28F128M29EWLA_A4]
+PF4.Locked=true
+PF4.Signal=FMC_A4
+PF5.GPIOParameters=GPIO_Label
+PF5.GPIO_Label=A5 [PC28F128M29EWLA_A5]
+PF5.Locked=true
+PF5.Signal=FMC_A5
+PF6.GPIOParameters=GPIO_Label
+PF6.GPIO_Label=QSPI_BK1_IO3 [MT25TL01GHBA8ESF_DQ3]
+PF6.Locked=true
+PF6.Signal=QUADSPI_BK1_IO3
+PF7.GPIOParameters=GPIO_Label
+PF7.GPIO_Label=QSPI_BK1_IO2 [MT25TL01GHBA8ESF_DQ2]
+PF7.Locked=true
+PF7.Signal=QUADSPI_BK1_IO2
+PF8.GPIOParameters=GPIO_Label
+PF8.GPIO_Label=QSPI_BK1_IO0 [MT25TL01GHBA8ESF_DQ0]
+PF8.Locked=true
+PF8.Signal=QUADSPI_BK1_IO0
+PF9.GPIOParameters=GPIO_Label
+PF9.GPIO_Label=QSPI_BK1_IO1 [MT25TL01GHBA8ESF_DQ1]
+PF9.Locked=true
+PF9.Signal=QUADSPI_BK1_IO1
+PG0.GPIOParameters=GPIO_Label
+PG0.GPIO_Label=A10 [PC28F128M29EWLA_A10]
+PG0.Locked=true
+PG0.Signal=FMC_A10
+PG1.GPIOParameters=GPIO_Label
+PG1.GPIO_Label=A11 [PC28F128M29EWLA_A11]
+PG1.Locked=true
+PG1.Signal=FMC_A11
+PG10.GPIOParameters=GPIO_Label
+PG10.GPIO_Label=FMC_NE3 [IS61WV102416BLL_CE]
+PG10.Locked=true
+PG10.Signal=FMC_NE3
+PG11.GPIOParameters=GPIO_Label
+PG11.GPIO_Label=RMII_TX_EN [LAN8742A_TXEN]
+PG11.Locked=true
+PG11.Signal=ETH_TX_EN
+PG12.GPIOParameters=GPIO_Label
+PG12.GPIO_Label=RMII_TXD1 [LAN8742A_TXD1]
+PG12.Locked=true
+PG12.Signal=ETH_TXD1
+PG13.GPIOParameters=GPIO_Label
+PG13.GPIO_Label=RMII_TXD0 [LAN8742A_TXD0]
+PG13.Locked=true
+PG13.Signal=ETH_TXD0
+PG14.GPIOParameters=GPIO_Label
+PG14.GPIO_Label=QSPI_BK2_IO3 [MT25TL01GHBA8ESF_DQ7]
+PG14.Locked=true
+PG14.Signal=QUADSPI_BK2_IO3
+PG15.GPIOParameters=GPIO_Label
+PG15.GPIO_Label=SDNCAS [IS42S32800G_CAS]
+PG15.Locked=true
+PG15.Signal=FMC_SDNCAS
+PG2.GPIOParameters=GPIO_Label
+PG2.GPIO_Label=A12 [PC28F128M29EWLA_A12]
+PG2.Locked=true
+PG2.Signal=FMC_A12
+PG3.GPIOParameters=GPIO_Label
+PG3.GPIO_Label=A13 [PC28F128M29EWLA_A13]
+PG3.Locked=true
+PG3.Signal=FMC_A13
+PG4.Locked=true
+PG4.Signal=FMC_A14_BA0
+PG5.Locked=true
+PG5.Signal=FMC_A15_BA1
+PG6.GPIOParameters=GPIO_Label
+PG6.GPIO_Label=QSPI_BK1_NCS [MT25TL01GHBA8ESF_CS]
+PG6.Locked=true
+PG6.Signal=QUADSPI_BK1_NCS
+PG7.GPIOParameters=GPIO_Label
+PG7.GPIO_Label=SAI1_MCLKA [WM8994ECS_MCLK1]
+PG7.Locked=true
+PG7.Signal=SAI1_MCLK_A
+PG8.GPIOParameters=GPIO_Label
+PG8.GPIO_Label=SDCLK [IS42S32800G_CLK]
+PG8.Locked=true
+PG8.Signal=FMC_SDCLK
+PG9.GPIOParameters=GPIO_Label
+PG9.GPIO_Label=QSPI_BK2_IO2 [MT25TL01GHBA8ESF_DQ6]
+PG9.Locked=true
+PG9.Signal=QUADSPI_BK2_IO2
+PH0-OSC_IN\ (PH0).Locked=true
+PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator
+PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN
+PH1-OSC_OUT\ (PH1).Locked=true
+PH1-OSC_OUT\ (PH1).Mode=HSE-External-Oscillator
+PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT
+PH10.GPIOParameters=GPIO_Label
+PH10.GPIO_Label=D18 [IS42S32800G_DQ18]
+PH10.Locked=true
+PH10.Signal=FMC_D18
+PH11.GPIOParameters=GPIO_Label
+PH11.GPIO_Label=D19 [IS42S32800G_DQ19]
+PH11.Locked=true
+PH11.Signal=FMC_D19
+PH12.GPIOParameters=GPIO_Label
+PH12.GPIO_Label=D20 [IS42S32800G_DQ20]
+PH12.Locked=true
+PH12.Signal=FMC_D20
+PH13.GPIOParameters=GPIO_Label
+PH13.GPIO_Label=D21 [IS42S32800G_DQ21]
+PH13.Locked=true
+PH13.Signal=FMC_D21
+PH14.GPIOParameters=GPIO_Label
+PH14.GPIO_Label=D22 [IS42S32800G_DQ22]
+PH14.Locked=true
+PH14.Signal=FMC_D22
+PH15.GPIOParameters=GPIO_Label
+PH15.GPIO_Label=D23 [IS42S32800G_DQ23]
+PH15.Locked=true
+PH15.Signal=FMC_D23
+PH2.GPIOParameters=GPIO_Label
+PH2.GPIO_Label=QSPI_BK2_IO0 [MT25TL01GHBA8ESF_DQ4]
+PH2.Locked=true
+PH2.Signal=QUADSPI_BK2_IO0
+PH3.GPIOParameters=GPIO_Label
+PH3.GPIO_Label=QSPI_BK2_IO1 [MT25TL01GHBA8ESF_DQ5]
+PH3.Locked=true
+PH3.Signal=QUADSPI_BK2_IO1
+PH4.GPIOParameters=GPIO_Label
+PH4.GPIO_Label=ULPI_NXT [USB3320C_NXT]
+PH4.Locked=true
+PH4.Mode=Device_HS
+PH4.Signal=USB_OTG_HS_ULPI_NXT
+PH5.GPIOParameters=GPIO_Label
+PH5.GPIO_Label=SDNWE [IS42S32800G_WE]
+PH5.Locked=true
+PH5.Signal=FMC_SDNWE
+PH6.GPIOParameters=GPIO_Label
+PH6.GPIO_Label=SDNE1 [IS42S32800G_CS]
+PH6.Locked=true
+PH6.Signal=FMC_SDNE1
+PH7.GPIOParameters=GPIO_Label
+PH7.GPIO_Label=SDCKE1 [IS42S32800G_CKE]
+PH7.Locked=true
+PH7.Signal=FMC_SDCKE1
+PH8.GPIOParameters=GPIO_Label
+PH8.GPIO_Label=D16 [IS42S32800G_DQ16]
+PH8.Locked=true
+PH8.Signal=FMC_D16
+PH9.GPIOParameters=GPIO_Label
+PH9.GPIO_Label=D17 [IS42S32800G_DQ17]
+PH9.Locked=true
+PH9.Signal=FMC_D17
+PI0.GPIOParameters=GPIO_Label
+PI0.GPIO_Label=D24 [IS42S32800G_DQ24]
+PI0.Locked=true
+PI0.Signal=FMC_D24
+PI1.GPIOParameters=GPIO_Label
+PI1.GPIO_Label=D25 [IS42S32800G_DQ25]
+PI1.Locked=true
+PI1.Signal=FMC_D25
+PI10.GPIOParameters=GPIO_Label
+PI10.GPIO_Label=D31 [IS42S32800G_DQ31]
+PI10.Locked=true
+PI10.Signal=FMC_D31
+PI11.GPIOParameters=GPIO_Label
+PI11.GPIO_Label=ULPI_DIR [USB3320C_DIR]
+PI11.Locked=true
+PI11.Mode=Device_HS
+PI11.Signal=USB_OTG_HS_ULPI_DIR
+PI12.GPIOParameters=GPIO_Label
+PI12.GPIO_Label=LCD_HSYNC
+PI12.Locked=true
+PI12.Signal=LTDC_HSYNC
+PI13.GPIOParameters=GPIO_Label
+PI13.GPIO_Label=LCD_VSYNC
+PI13.Locked=true
+PI13.Signal=LTDC_VSYNC
+PI14.GPIOParameters=GPIO_Label
+PI14.GPIO_Label=LCD_CLK
+PI14.Locked=true
+PI14.Signal=LTDC_CLK
+PI15.GPIOParameters=GPIO_Label
+PI15.GPIO_Label=LCD_R0
+PI15.Locked=true
+PI15.Signal=LTDC_R0
+PI2.GPIOParameters=GPIO_Label
+PI2.GPIO_Label=D26 [IS42S32800G_DQ26]
+PI2.Locked=true
+PI2.Signal=FMC_D26
+PI3.GPIOParameters=GPIO_Label
+PI3.GPIO_Label=D27 [IS42S32800G_DQ27
+PI3.Locked=true
+PI3.Signal=FMC_D27
+PI4.GPIOParameters=GPIO_Label
+PI4.GPIO_Label=FMC_NBL2 [IS42S32800G_DQM2]
+PI4.Locked=true
+PI4.Signal=FMC_NBL2
+PI5.GPIOParameters=GPIO_Label
+PI5.GPIO_Label=FMC_NBL3 [IS42S32800G_DQM3]
+PI5.Locked=true
+PI5.Signal=FMC_NBL3
+PI6.GPIOParameters=GPIO_Label
+PI6.GPIO_Label=D28 [IS42S32800G_DQ28]
+PI6.Locked=true
+PI6.Signal=FMC_D28
+PI7.GPIOParameters=GPIO_Label
+PI7.GPIO_Label=D29 [IS42S32800G_DQ29]
+PI7.Locked=true
+PI7.Signal=FMC_D29
+PI8.GPIOParameters=GPIO_Label
+PI8.GPIO_Label=MFX_IRQOUT [MFX_V3_IRQOUT]
+PI8.Locked=true
+PI8.Signal=GPXTI8
+PI9.GPIOParameters=GPIO_Label
+PI9.GPIO_Label=D30 [IS42S32800G_DQ30]
+PI9.Locked=true
+PI9.Signal=FMC_D30
+PJ0.GPIOParameters=GPIO_Label
+PJ0.GPIO_Label=LCD_R1
+PJ0.Locked=true
+PJ0.Signal=LTDC_R1
+PJ1.GPIOParameters=GPIO_Label
+PJ1.GPIO_Label=LCD_R2
+PJ1.Locked=true
+PJ1.Signal=LTDC_R2
+PJ10.GPIOParameters=GPIO_Label
+PJ10.GPIO_Label=LCd_G3
+PJ10.Locked=true
+PJ10.Signal=LTDC_G3
+PJ11.GPIOParameters=GPIO_Label
+PJ11.GPIO_Label=LCD_G4
+PJ11.Locked=true
+PJ11.Signal=LTDC_G4
+PJ12.Locked=true
+PJ12.Signal=DEBUG_TRGOUT
+PJ13.GPIOParameters=GPIO_Label
+PJ13.GPIO_Label=LCD_B1
+PJ13.Locked=true
+PJ13.Signal=LTDC_B1
+PJ14.GPIOParameters=GPIO_Label
+PJ14.GPIO_Label=LCD_B2
+PJ14.Locked=true
+PJ14.Signal=LTDC_B2
+PJ15.GPIOParameters=GPIO_Label
+PJ15.GPIO_Label=LCD_B3
+PJ15.Locked=true
+PJ15.Signal=LTDC_B3
+PJ2.GPIOParameters=GPIO_Label
+PJ2.GPIO_Label=LCD_R3
+PJ2.Locked=true
+PJ2.Signal=LTDC_R3
+PJ3.GPIOParameters=GPIO_Label
+PJ3.GPIO_Label=LCD_R4
+PJ3.Locked=true
+PJ3.Signal=LTDC_R4
+PJ4.GPIOParameters=GPIO_Label
+PJ4.GPIO_Label=LCD_R5
+PJ4.Locked=true
+PJ4.Signal=LTDC_R5
+PJ5.GPIOParameters=GPIO_Label
+PJ5.GPIO_Label=LCD_R6
+PJ5.Locked=true
+PJ5.Signal=LTDC_R6
+PJ6.GPIOParameters=GPIO_Label
+PJ6.GPIO_Label=LCD_R7
+PJ6.Locked=true
+PJ6.Signal=LTDC_R7
+PJ7.Locked=true
+PJ7.Signal=DEBUG_TRGIN
+PJ8.GPIOParameters=GPIO_Label
+PJ8.GPIO_Label=LCD_G1
+PJ8.Locked=true
+PJ8.Signal=LTDC_G1
+PJ9.GPIOParameters=GPIO_Label
+PJ9.GPIO_Label=LCD_G2
+PJ9.Locked=true
+PJ9.Signal=LTDC_G2
+PK0.GPIOParameters=GPIO_Label
+PK0.GPIO_Label=LCD_G5
+PK0.Locked=true
+PK0.Signal=LTDC_G5
+PK1.GPIOParameters=GPIO_Label
+PK1.GPIO_Label=LCD_G6
+PK1.Locked=true
+PK1.Signal=LTDC_G6
+PK2.GPIOParameters=GPIO_Label
+PK2.GPIO_Label=LCD_G7
+PK2.Locked=true
+PK2.Signal=LTDC_G7
+PK3.GPIOParameters=GPIO_Label
+PK3.GPIO_Label=LCD_B4
+PK3.Locked=true
+PK3.Signal=LTDC_B4
+PK4.GPIOParameters=GPIO_Label
+PK4.GPIO_Label=LCD_B5
+PK4.Locked=true
+PK4.Signal=LTDC_B5
+PK5.GPIOParameters=GPIO_Label
+PK5.GPIO_Label=LCD_B6
+PK5.Locked=true
+PK5.Signal=LTDC_B6
+PK6.GPIOParameters=GPIO_Label
+PK6.GPIO_Label=LCD_B7
+PK6.Locked=true
+PK6.Signal=LTDC_B7
+PK7.GPIOParameters=GPIO_Label
+PK7.GPIO_Label=LCD_DE
+PK7.Locked=true
+PK7.Signal=LTDC_DE
+PinOutPanel.CurrentBGAView=Top
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.CustomerFirmwarePackage=
+ProjectManager.DefaultFWLocation=true
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32H743XIHx
+ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.11.0
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=0
+ProjectManager.MainLocation=Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=stm32h743eval.ioc
+ProjectManager.ProjectName=stm32h743eval
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=Makefile
+ProjectManager.ToolChainLocation=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,4-MX_USB_OTG_HS_PCD_Init-USB_OTG_HS-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
+RCC.ADCFreq_Value=50390625
+RCC.AHB12Freq_Value=150000000
+RCC.AHB4Freq_Value=150000000
+RCC.APB1Freq_Value=75000000
+RCC.APB2Freq_Value=75000000
+RCC.APB3Freq_Value=75000000
+RCC.APB4Freq_Value=75000000
+RCC.AXIClockFreq_Value=150000000
+RCC.CECFreq_Value=32000
+RCC.CKPERFreq_Value=64000000
+RCC.CortexFreq_Value=150000000
+RCC.CpuClockFreq_Value=150000000
+RCC.D1CPREFreq_Value=150000000
+RCC.D1PPRE=RCC_APB3_DIV2
+RCC.D2PPRE1=RCC_APB1_DIV2
+RCC.D2PPRE2=RCC_APB2_DIV2
+RCC.D3PPRE=RCC_APB4_DIV2
+RCC.DFSDMACLkFreq_Value=75000000
+RCC.DFSDMFreq_Value=75000000
+RCC.DIVM1=2
+RCC.DIVM3=25
+RCC.DIVN1=24
+RCC.DIVN3=336
+RCC.DIVP1Freq_Value=150000000
+RCC.DIVP2Freq_Value=50390625
+RCC.DIVP3Freq_Value=168000000
+RCC.DIVQ1=4
+RCC.DIVQ1Freq_Value=75000000
+RCC.DIVQ2Freq_Value=50390625
+RCC.DIVQ3=7
+RCC.DIVQ3Freq_Value=48000000
+RCC.DIVR1Freq_Value=150000000
+RCC.DIVR2Freq_Value=50390625
+RCC.DIVR3Freq_Value=168000000
+RCC.EnbaleCSS=true
+RCC.FDCANFreq_Value=75000000
+RCC.FMCFreq_Value=150000000
+RCC.FamilyName=M
+RCC.HCLK3ClockFreq_Value=150000000
+RCC.HCLKFreq_Value=150000000
+RCC.HPREFreq_Value=64000000
+RCC.HRTIMFreq_Value=150000000
+RCC.HSICalibrationValue=32
+RCC.I2C123Freq_Value=75000000
+RCC.I2C4Freq_Value=75000000
+RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVM3,DIVN1,DIVN3,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,EnbaleCSS,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPREFreq_Value,HRTIMFreq_Value,HSICalibrationValue,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLL2FRACN,PLL3FRACN,PLLFRACN,PLLSourceVirtual,PWR_Regulator_Voltage_Scale,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBCLockSelection,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
+RCC.LPTIM1Freq_Value=75000000
+RCC.LPTIM2Freq_Value=75000000
+RCC.LPTIM345Freq_Value=75000000
+RCC.LPUART1Freq_Value=75000000
+RCC.LTDCFreq_Value=168000000
+RCC.MCO1PinFreq_Value=64000000
+RCC.MCO2PinFreq_Value=150000000
+RCC.PLL2FRACN=0
+RCC.PLL3FRACN=0
+RCC.PLLFRACN=0
+RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
+RCC.PWR_Regulator_Voltage_Scale=PWR_REGULATOR_VOLTAGE_SCALE1
+RCC.QSPIFreq_Value=150000000
+RCC.RNGFreq_Value=48000000
+RCC.RTCFreq_Value=32000
+RCC.SAI1Freq_Value=75000000
+RCC.SAI23Freq_Value=75000000
+RCC.SAI4AFreq_Value=75000000
+RCC.SAI4BFreq_Value=75000000
+RCC.SDMMCFreq_Value=75000000
+RCC.SPDIFRXFreq_Value=75000000
+RCC.SPI123Freq_Value=75000000
+RCC.SPI45Freq_Value=75000000
+RCC.SPI6Freq_Value=75000000
+RCC.SWPMI1Freq_Value=75000000
+RCC.SYSCLKFreq_VALUE=150000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.Tim1OutputFreq_Value=150000000
+RCC.Tim2OutputFreq_Value=150000000
+RCC.TraceFreq_Value=150000000
+RCC.USART16Freq_Value=75000000
+RCC.USART234578Freq_Value=75000000
+RCC.USBCLockSelection=RCC_USBCLKSOURCE_PLL3
+RCC.USBFreq_Value=48000000
+RCC.VCO1OutputFreq_Value=300000000
+RCC.VCO2OutputFreq_Value=100781250
+RCC.VCO3OutputFreq_Value=336000000
+RCC.VCOInput1Freq_Value=12500000
+RCC.VCOInput2Freq_Value=781250
+RCC.VCOInput3Freq_Value=1000000
+SH.ADCx_INN1.0=ADC1_INN1
+SH.ADCx_INN1.ConfNb=1
+SH.FMC_A0.0=FMC_A0
+SH.FMC_A0.ConfNb=1
+SH.FMC_A1.0=FMC_A1
+SH.FMC_A1.ConfNb=1
+SH.FMC_A10.0=FMC_A10
+SH.FMC_A10.ConfNb=1
+SH.FMC_A11.0=FMC_A11
+SH.FMC_A11.ConfNb=1
+SH.FMC_A12.0=FMC_A12
+SH.FMC_A12.ConfNb=1
+SH.FMC_A13.0=FMC_A13
+SH.FMC_A13.ConfNb=1
+SH.FMC_A14_BA0.0=FMC_BA0
+SH.FMC_A14_BA0.1=FMC_A14
+SH.FMC_A14_BA0.ConfNb=2
+SH.FMC_A15_BA1.0=FMC_BA1
+SH.FMC_A15_BA1.1=FMC_A15
+SH.FMC_A15_BA1.ConfNb=2
+SH.FMC_A16_CLE.0=FMC_A16
+SH.FMC_A16_CLE.ConfNb=1
+SH.FMC_A17_ALE.0=FMC_A17
+SH.FMC_A17_ALE.ConfNb=1
+SH.FMC_A18.0=FMC_A18
+SH.FMC_A18.ConfNb=1
+SH.FMC_A2.0=FMC_A2
+SH.FMC_A2.ConfNb=1
+SH.FMC_A3.0=FMC_A3
+SH.FMC_A3.ConfNb=1
+SH.FMC_A4.0=FMC_A4
+SH.FMC_A4.ConfNb=1
+SH.FMC_A5.0=FMC_A5
+SH.FMC_A5.ConfNb=1
+SH.FMC_A6.0=FMC_A6
+SH.FMC_A6.ConfNb=1
+SH.FMC_A7.0=FMC_A7
+SH.FMC_A7.ConfNb=1
+SH.FMC_A8.0=FMC_A8
+SH.FMC_A8.ConfNb=1
+SH.FMC_A9.0=FMC_A9
+SH.FMC_A9.ConfNb=1
+SH.FMC_D0_DA0.0=FMC_D0
+SH.FMC_D0_DA0.ConfNb=1
+SH.FMC_D10_DA10.0=FMC_D10
+SH.FMC_D10_DA10.ConfNb=1
+SH.FMC_D11_DA11.0=FMC_D11
+SH.FMC_D11_DA11.ConfNb=1
+SH.FMC_D12_DA12.0=FMC_D12
+SH.FMC_D12_DA12.ConfNb=1
+SH.FMC_D13_DA13.0=FMC_D13
+SH.FMC_D13_DA13.ConfNb=1
+SH.FMC_D14_DA14.0=FMC_D14
+SH.FMC_D14_DA14.ConfNb=1
+SH.FMC_D15_DA15.0=FMC_D15
+SH.FMC_D15_DA15.ConfNb=1
+SH.FMC_D16.0=FMC_D16
+SH.FMC_D16.ConfNb=1
+SH.FMC_D17.0=FMC_D17
+SH.FMC_D17.ConfNb=1
+SH.FMC_D18.0=FMC_D18
+SH.FMC_D18.ConfNb=1
+SH.FMC_D19.0=FMC_D19
+SH.FMC_D19.ConfNb=1
+SH.FMC_D1_DA1.0=FMC_D1
+SH.FMC_D1_DA1.ConfNb=1
+SH.FMC_D20.0=FMC_D20
+SH.FMC_D20.ConfNb=1
+SH.FMC_D21.0=FMC_D21
+SH.FMC_D21.ConfNb=1
+SH.FMC_D22.0=FMC_D22
+SH.FMC_D22.ConfNb=1
+SH.FMC_D23.0=FMC_D23
+SH.FMC_D23.ConfNb=1
+SH.FMC_D24.0=FMC_D24
+SH.FMC_D24.ConfNb=1
+SH.FMC_D25.0=FMC_D25
+SH.FMC_D25.ConfNb=1
+SH.FMC_D26.0=FMC_D26
+SH.FMC_D26.ConfNb=1
+SH.FMC_D27.0=FMC_D27
+SH.FMC_D27.ConfNb=1
+SH.FMC_D28.0=FMC_D28
+SH.FMC_D28.ConfNb=1
+SH.FMC_D29.0=FMC_D29
+SH.FMC_D29.ConfNb=1
+SH.FMC_D2_DA2.0=FMC_D2
+SH.FMC_D2_DA2.ConfNb=1
+SH.FMC_D30.0=FMC_D30
+SH.FMC_D30.ConfNb=1
+SH.FMC_D31.0=FMC_D31
+SH.FMC_D31.ConfNb=1
+SH.FMC_D3_DA3.0=FMC_D3
+SH.FMC_D3_DA3.ConfNb=1
+SH.FMC_D4_DA4.0=FMC_D4
+SH.FMC_D4_DA4.ConfNb=1
+SH.FMC_D5_DA5.0=FMC_D5
+SH.FMC_D5_DA5.ConfNb=1
+SH.FMC_D6_DA6.0=FMC_D6
+SH.FMC_D6_DA6.ConfNb=1
+SH.FMC_D7_DA7.0=FMC_D7
+SH.FMC_D7_DA7.ConfNb=1
+SH.FMC_D8_DA8.0=FMC_D8
+SH.FMC_D8_DA8.ConfNb=1
+SH.FMC_D9_DA9.0=FMC_D9
+SH.FMC_D9_DA9.ConfNb=1
+SH.FMC_NBL0.0=FMC_NBL0
+SH.FMC_NBL0.ConfNb=1
+SH.FMC_NBL1.0=FMC_NBL1
+SH.FMC_NBL1.ConfNb=1
+SH.FMC_NBL2.0=FMC_NBL2
+SH.FMC_NBL2.ConfNb=1
+SH.FMC_NBL3.0=FMC_NBL3
+SH.FMC_NBL3.ConfNb=1
+SH.FMC_NOE.0=FMC_NOE
+SH.FMC_NOE.ConfNb=1
+SH.FMC_NWAIT.0=FMC_NWAIT
+SH.FMC_NWAIT.ConfNb=1
+SH.FMC_NWE.0=FMC_NWE
+SH.FMC_NWE.ConfNb=1
+SH.FMC_SDCLK.0=FMC_SDCLK
+SH.FMC_SDCLK.ConfNb=1
+SH.FMC_SDNCAS.0=FMC_SDNCAS
+SH.FMC_SDNCAS.ConfNb=1
+SH.FMC_SDNRAS.0=FMC_SDNRAS
+SH.FMC_SDNRAS.ConfNb=1
+SH.FMC_SDNWE.0=FMC_SDNWE
+SH.FMC_SDNWE.ConfNb=1
+SH.GPXTI8.0=GPIO_EXTI8
+SH.GPXTI8.ConfNb=1
+SH.S_CKOUTDFSDM1.0=DFSDM1_CKOUT
+SH.S_CKOUTDFSDM1.ConfNb=1
+SH.S_DATAIN1DFSDM1.0=DFSDM1_DATIN1
+SH.S_DATAIN1DFSDM1.ConfNb=1
+USB_OTG_FS.IPParameters=VirtualMode
+USB_OTG_FS.VirtualMode=Device_Only
+USB_OTG_HS.IPParameters=VirtualMode-Device_HS
+USB_OTG_HS.VirtualMode-Device_HS=Device_HS
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=STM32H743I-EVAL2
+boardIOC=true
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/ozone/h743eval.jdebug b/hw/bsp/stm32h7/boards/stm32h743eval/ozone/h743eval.jdebug
new file mode 100644
index 000000000..093951765
--- /dev/null
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/ozone/h743eval.jdebug
@@ -0,0 +1,249 @@
+
+/*********************************************************************
+*
+*       OnProjectLoad
+*
+* Function description
+*   Project load routine. Required.
+*
+**********************************************************************
+*/
+void OnProjectLoad (void) {
+  //
+  // Dialog-generated settings
+  //
+  Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-M7F.svd");
+  Project.AddSvdFile ("$(InstallDir)/Config/Peripherals/ARMv7M.svd");
+  Project.AddSvdFile ("./STM32H743.svd");
+
+  Project.SetDevice ("STM32H743XI");
+  Project.SetHostIF ("USB", "");
+  Project.SetTargetIF ("SWD");
+  Project.SetTIFSpeed ("50 MHz");
+
+  //
+  // User settings
+  //
+  Project.SetTraceSource ("Trace Pins");
+  Project.SetTraceTiming (100, 100, 100, 100);
+  Edit.SysVar (VAR_TRACE_CORE_CLOCK, 150000000);
+  File.Open ("/home/hathach/code/tinyusb/examples/device/cdc_msc/cmake-build-h743eval/cdc_msc.elf");
+}
+
+/*********************************************************************
+*
+*      TargetReset
+*
+* Function description
+*   Replaces the default target device reset routine. Optional.
+*
+* Notes
+*   This example demonstrates the usage when
+*   debugging a RAM program on a Cortex-M target device
+*
+**********************************************************************
+*/
+//void TargetReset (void) {
+//
+//  unsigned int SP;
+//  unsigned int PC;
+//  unsigned int VectorTableAddr;
+//
+//  Exec.Reset();
+//
+//  VectorTableAddr = Elf.GetBaseAddr();
+//
+//  if (VectorTableAddr != 0xFFFFFFFF) {
+//
+//    Util.Log("Resetting Program.");
+//
+//    SP = Target.ReadU32(VectorTableAddr);
+//    Target.SetReg("SP", SP);
+//
+//    PC = Target.ReadU32(VectorTableAddr + 4);
+//    Target.SetReg("PC", PC);
+//  }
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetReset
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetReset (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetReset
+*
+* Function description
+*   Event handler routine.
+*    - Sets the PC register to program reset value.
+*    - Sets the SP register to program reset value on Cortex-M.
+*
+**********************************************************************
+*/
+void AfterTargetReset (void) {
+  unsigned int SP;
+  unsigned int PC;
+  unsigned int VectorTableAddr;
+
+  VectorTableAddr = Elf.GetBaseAddr();
+
+  if (VectorTableAddr == 0xFFFFFFFF) {
+    Util.Log("Project file error: failed to get program base");
+  } else {
+    SP = Target.ReadU32(VectorTableAddr);
+    Target.SetReg("SP", SP);
+
+    PC = Target.ReadU32(VectorTableAddr + 4);
+    Target.SetReg("PC", PC);
+  }
+}
+
+/*********************************************************************
+*
+*       DebugStart
+*
+* Function description
+*   Replaces the default debug session startup routine. Optional.
+*
+**********************************************************************
+*/
+//void DebugStart (void) {
+//}
+
+/*********************************************************************
+*
+*       TargetConnect
+*
+* Function description
+*   Replaces the default target IF connection routine. Optional.
+*
+**********************************************************************
+*/
+//void TargetConnect (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetConnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+
+void BeforeTargetConnect (void) {
+  //
+  // Trace pin init is done by J-Link script file as J-Link script files are IDE independent
+  //
+  //Project.SetJLinkScript("./ST_STM32H743_Traceconfig.pex");
+}
+
+/*********************************************************************
+*
+*       AfterTargetConnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetConnect (void) {
+//}
+
+/*********************************************************************
+*
+*       TargetDownload
+*
+* Function description
+*   Replaces the default program download routine. Optional.
+*
+**********************************************************************
+*/
+//void TargetDownload (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetDownload
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetDownload (void) {
+//}
+
+/*********************************************************************
+*
+*      AfterTargetDownload
+*
+* Function description
+*   Event handler routine.
+*    - Sets the PC register to program reset value.
+*    - Sets the SP register to program reset value on Cortex-M.
+*
+**********************************************************************
+*/
+void AfterTargetDownload (void) {
+  unsigned int SP;
+  unsigned int PC;
+  unsigned int VectorTableAddr;
+
+  VectorTableAddr = Elf.GetBaseAddr();
+  Util.Log("___");
+  if (VectorTableAddr == 0xFFFFFFFF) {
+    Util.Log("Project file error: failed to get program base");
+  } else {
+    SP = Target.ReadU32(VectorTableAddr);
+    Target.SetReg("SP", SP);
+
+    PC = Target.ReadU32(VectorTableAddr + 4);
+    Target.SetReg("PC", PC);
+  }
+}
+
+/*********************************************************************
+*
+*       BeforeTargetDisconnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetDisconnect (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetDisconnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetDisconnect (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetHalt
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetHalt (void) {
+//}
diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c
index 35b2cd55b..7e0469bd8 100644
--- a/hw/bsp/stm32h7/family.c
+++ b/hw/bsp/stm32h7/family.c
@@ -56,6 +56,30 @@ void OTG_HS_IRQHandler(void)
 
 UART_HandleTypeDef UartHandle;
 
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+#ifdef TRACE_ETM
+void trace_etm_init(void) {
+  // H7 trace pin is PE2 to PE6
+  // __HAL_RCC_GPIOE_CLK_ENABLE();
+
+  GPIO_InitTypeDef  gpio_init;
+  gpio_init.Pin       = GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6;
+  gpio_init.Mode      = GPIO_MODE_AF_PP;
+  gpio_init.Pull      = GPIO_PULLUP;
+  gpio_init.Speed     = GPIO_SPEED_FREQ_VERY_HIGH;
+  gpio_init.Alternate = GPIO_AF0_TRACE;
+  HAL_GPIO_Init(GPIOE, &gpio_init);
+
+  // Enable trace clk, also in D1 and D3 domain
+  DBGMCU->CR |= DBGMCU_CR_DBG_TRACECKEN | DBGMCU_CR_DBG_CKD1EN | DBGMCU_CR_DBG_CKD3EN;
+}
+#else
+  #define etm_trace_init()
+#endif
+
 void board_init(void)
 {
   board_stm32h7_clock_init();
@@ -74,6 +98,8 @@ void board_init(void)
 #endif
   __HAL_RCC_GPIOJ_CLK_ENABLE();
 
+  trace_etm_init();
+
   // Enable UART Clock
   UART_CLK_EN();
 

From 3d685fe7f2f383b10a2ed86d33d4b97781843f0d Mon Sep 17 00:00:00 2001
From: Angel Molina <angelmolinu@gmail.com>
Date: Fri, 21 Oct 2022 19:35:15 +0200
Subject: [PATCH 426/691] Add CDC+UAC2 composite device example for Pico

Signed-off-by: Dhiru Kholia <dhiru.kholia@gmail.com>
---
 examples/device/cdc_uac2/CMakeLists.txt       |  38 +++
 examples/device/cdc_uac2/README.md            |  52 +++
 examples/device/cdc_uac2/skip.txt             |  52 +++
 examples/device/cdc_uac2/src/common.h         |  34 ++
 examples/device/cdc_uac2/src/main.c           |  99 ++++++
 examples/device/cdc_uac2/src/tusb_cdc.c       |  72 ++++
 examples/device/cdc_uac2/src/tusb_config.h    | 174 ++++++++++
 examples/device/cdc_uac2/src/tusb_uac2.c      | 316 ++++++++++++++++++
 .../device/cdc_uac2/src/usb_descriptors.c     | 190 +++++++++++
 .../device/cdc_uac2/src/usb_descriptors.h     | 158 +++++++++
 10 files changed, 1185 insertions(+)
 create mode 100644 examples/device/cdc_uac2/CMakeLists.txt
 create mode 100644 examples/device/cdc_uac2/README.md
 create mode 100644 examples/device/cdc_uac2/skip.txt
 create mode 100644 examples/device/cdc_uac2/src/common.h
 create mode 100644 examples/device/cdc_uac2/src/main.c
 create mode 100644 examples/device/cdc_uac2/src/tusb_cdc.c
 create mode 100644 examples/device/cdc_uac2/src/tusb_config.h
 create mode 100644 examples/device/cdc_uac2/src/tusb_uac2.c
 create mode 100644 examples/device/cdc_uac2/src/usb_descriptors.c
 create mode 100644 examples/device/cdc_uac2/src/usb_descriptors.h

diff --git a/examples/device/cdc_uac2/CMakeLists.txt b/examples/device/cdc_uac2/CMakeLists.txt
new file mode 100644
index 000000000..efe8c74ba
--- /dev/null
+++ b/examples/device/cdc_uac2/CMakeLists.txt
@@ -0,0 +1,38 @@
+cmake_minimum_required(VERSION 3.17)
+
+include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
+
+# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
+family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
+
+project(${PROJECT} C CXX ASM)
+
+# Checks this example is valid for the family and initializes the project
+family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
+add_executable(${PROJECT})
+
+# Example source
+target_sources(${PROJECT} PUBLIC
+        ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
+        ${CMAKE_CURRENT_SOURCE_DIR}/src/tusb_cdc.c
+        ${CMAKE_CURRENT_SOURCE_DIR}/src/tusb_uac2.c
+        ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
+        )
+
+# Example include
+target_include_directories(${PROJECT} PUBLIC
+        ${CMAKE_CURRENT_SOURCE_DIR}/src
+        )
+
+# Configure compilation flags and libraries for the example... see the corresponding function
+# in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT})
+
+# Uncomment me to enable UART based debugging
+# pico_enable_stdio_uart(${PROJECT} 1)
diff --git a/examples/device/cdc_uac2/README.md b/examples/device/cdc_uac2/README.md
new file mode 100644
index 000000000..5d120be7d
--- /dev/null
+++ b/examples/device/cdc_uac2/README.md
@@ -0,0 +1,52 @@
+#### Composite CDC + UAC2 on Pico
+
+This example provides a composite CDC + UAC2 device on top of a Raspberry Pi
+Pico board.
+
+
+#### Use Cases
+
+- The CDC + UAC2 composite device happens to be important, especially in the
+  amateur radio community.
+
+  Modern radios (`rigs`) like Icom IC-7300 + IC-705 expose a sound card and a
+  serial device (`composite device`) to the computer over a single USB cable.
+  This allows for Audio I/O and CAT control over a single USB cable which is
+  very convenient.
+
+  By including and maintaining this example in TinyUSB repository, we enable
+  the amateur radio community to build (`homebrew`) radios with similar
+  functionality as the (expensive) commercial rigs.
+
+  This PR is important in bridging this specific gap between the commercial
+  rigs and homebrew equipment.
+
+- https://digirig.net/digirig-mobile-rev-1-9/ is a digital interface for
+  interfacing radios (that lack an inbuilt digital interface) with computers.
+  Digirig Mobile works brilliantly (is OSS!) and is a big improvement over
+  traditional digital interfaces (like the SignaLink USB Interface). By using a
+  Raspberry Pi Pico powered CDC + UAC2 composite device, we can simplify the
+  Digirig Mobile schematic, drastically reduce the manufacturing cost, and
+  (again) enable the homebrewers community to homebrew a modern digital interface
+  with ease themselves.
+
+
+#### Build Steps
+
+```
+cd examples/device/cdc_uac2
+
+export PICO_SDK_PATH=$HOME/pico-sdk
+
+cmake -DFAMILY=rp2040 pico .
+
+cmake -DFAMILY=rp2040 -DCMAKE_BUILD_TYPE=Debug # use this for debugging
+
+make BOARD=raspberry_pi_pico all
+```
+
+
+#### Development Notes
+
+Please try to keep this code synchronized with the `uac2_headset` example
+included in this repository.
diff --git a/examples/device/cdc_uac2/skip.txt b/examples/device/cdc_uac2/skip.txt
new file mode 100644
index 000000000..8e70a5278
--- /dev/null
+++ b/examples/device/cdc_uac2/skip.txt
@@ -0,0 +1,52 @@
+board:curiosity_nano
+board:frdm_kl25z
+board:stm32l052dap52
+family:broadcom_32bit
+family:broadcom_64bit
+family:ch32v307
+family:fomu
+family:gd32vf103
+family:kinetis_k32l
+family:kinetis_kl
+family:lpc11
+family:lpc13
+family:lpc15
+family:lpc17
+family:lpc51
+family:lpc54
+family:lpc55
+family:mm32
+family:msp430
+family:msp432e
+family:msp432e4
+family:nrf
+family:ra
+family:rx
+family:samd11
+family:samd21
+family:samd51
+family:same5x
+family:saml2x
+family:stm32f0
+family:stm32f1
+family:stm32f2
+family:stm32f3
+family:stm32f4
+family:stm32f7
+family:stm32g4
+family:stm32h7
+family:stm32l0
+family:stm32l4
+family:stm32u5
+family:stm32wb
+family:tm4c123
+family:xmc4000
+mcu:LPC11UXX
+mcu:LPC13XX
+mcu:MKL25ZXX
+mcu:MSP430x5xx
+mcu:NUC121
+mcu:SAMD11
+mcu:SAME5X
+mcu:SAMG
+mcu:STM32L0
diff --git a/examples/device/cdc_uac2/src/common.h b/examples/device/cdc_uac2/src/common.h
new file mode 100644
index 000000000..f281024c7
--- /dev/null
+++ b/examples/device/cdc_uac2/src/common.h
@@ -0,0 +1,34 @@
+#ifndef __COMMON_H__
+#define __COMMON_H__
+
+/* Blink pattern
+ * - 25 ms   : streaming data
+ * - 250 ms  : device not mounted
+ * - 1000 ms : device mounted
+ * - 2500 ms : device is suspended
+ */
+enum
+{
+  BLINK_STREAMING = 25,
+  BLINK_NOT_MOUNTED = 250,
+  BLINK_MOUNTED = 1000,
+  BLINK_SUSPENDED = 2500,
+};
+
+enum
+{
+  VOLUME_CTRL_0_DB = 0,
+  VOLUME_CTRL_10_DB = 2560,
+  VOLUME_CTRL_20_DB = 5120,
+  VOLUME_CTRL_30_DB = 7680,
+  VOLUME_CTRL_40_DB = 10240,
+  VOLUME_CTRL_50_DB = 12800,
+  VOLUME_CTRL_60_DB = 15360,
+  VOLUME_CTRL_70_DB = 17920,
+  VOLUME_CTRL_80_DB = 20480,
+  VOLUME_CTRL_90_DB = 23040,
+  VOLUME_CTRL_100_DB = 25600,
+  VOLUME_CTRL_SILENCE = 0x8000,
+};
+
+#endif
diff --git a/examples/device/cdc_uac2/src/main.c b/examples/device/cdc_uac2/src/main.c
new file mode 100644
index 000000000..68352338e
--- /dev/null
+++ b/examples/device/cdc_uac2/src/main.c
@@ -0,0 +1,99 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jerzy Kasenberg
+ * Copyright (c) 2022 Angel Molina <angelmolinu@gmail.com>
+ * Copyright (c) 2023 Dhiru Kholia <dhiru.kholia@gmail.com>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#include <stdio.h>
+#include <string.h>
+
+#include "bsp/board.h"
+#include "tusb.h"
+#include "common.h"
+
+extern uint32_t blink_interval_ms;
+
+#if (CFG_TUSB_MCU == OPT_MCU_RP2040)
+#include "pico/stdlib.h"
+#endif
+
+void led_blinking_task(void);
+
+/*------------- MAIN -------------*/
+int main(void)
+{
+  board_init();
+
+  // init device stack on configured roothub port
+  tud_init(BOARD_TUD_RHPORT);
+
+#if (CFG_TUSB_MCU == OPT_MCU_RP2040)
+  stdio_init_all();
+#endif
+
+  TU_LOG1("CDC UAC2 example running\r\n");
+
+  while (1)
+  {
+    tud_task(); // TinyUSB device task
+    led_blinking_task();
+
+#if (CFG_TUSB_MCU == OPT_MCU_RP2040)
+    // printf("Hello, world!\n");
+#endif
+  }
+
+  return 0;
+}
+
+//--------------------------------------------------------------------+
+// Device callbacks
+//--------------------------------------------------------------------+
+
+// Invoked when device is mounted
+void tud_mount_cb(void)
+{
+  blink_interval_ms = BLINK_MOUNTED;
+}
+
+// Invoked when device is unmounted
+void tud_umount_cb(void)
+{
+  blink_interval_ms = BLINK_NOT_MOUNTED;
+}
+
+// Invoked when usb bus is suspended
+// remote_wakeup_en : if host allow us  to perform remote wakeup
+// Within 7ms, device must draw an average of current less than 2.5 mA from bus
+void tud_suspend_cb(bool remote_wakeup_en)
+{
+  (void)remote_wakeup_en;
+  blink_interval_ms = BLINK_SUSPENDED;
+}
+
+// Invoked when usb bus is resumed
+void tud_resume_cb(void)
+{
+  blink_interval_ms = BLINK_MOUNTED;
+}
diff --git a/examples/device/cdc_uac2/src/tusb_cdc.c b/examples/device/cdc_uac2/src/tusb_cdc.c
new file mode 100644
index 000000000..a95f638d9
--- /dev/null
+++ b/examples/device/cdc_uac2/src/tusb_cdc.c
@@ -0,0 +1,72 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ * Copyright (c) 2022 Angel Molina (angelmolinu@gmail.com)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#include "bsp/board.h"
+#include "tusb.h"
+#include "common.h"
+
+// Invoked when cdc when line state changed e.g connected/disconnected
+void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts)
+{
+  (void) itf;
+  (void) rts;
+
+  if (dtr)
+  {
+    // Terminal connected
+  }
+  else
+  {
+    // Terminal disconnected
+  }
+}
+
+// Invoked when CDC interface received data from host
+void tud_cdc_rx_cb(uint8_t itf)
+{
+  uint8_t buf[64];
+  uint32_t count;
+
+  // connected() check for DTR bit
+  // Most but not all terminal client set this when making connection
+  if (tud_cdc_connected())
+  {
+    if (tud_cdc_available()) // data is available
+    {
+      count = tud_cdc_n_read(itf, buf, sizeof(buf));
+      (void) count;
+
+      tud_cdc_n_write(itf, buf, count);
+      tud_cdc_n_write_flush(itf);
+      // dummy code to check that cdc serial is responding
+      board_led_write(0);
+      board_delay(50);
+      board_led_write(1);
+      board_delay(50);
+      board_led_write(0);
+    }
+  }
+}
diff --git a/examples/device/cdc_uac2/src/tusb_config.h b/examples/device/cdc_uac2/src/tusb_config.h
new file mode 100644
index 000000000..373f0b01f
--- /dev/null
+++ b/examples/device/cdc_uac2/src/tusb_config.h
@@ -0,0 +1,174 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Ha Thach (tinyusb.org)
+ * Copyright (c) 2020 Jerzy Kasenberg
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#ifndef _TUSB_CONFIG_H_
+#define _TUSB_CONFIG_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "usb_descriptors.h"
+
+//--------------------------------------------------------------------+
+// Board Specific Configuration
+//--------------------------------------------------------------------+
+
+// RHPort number used for device can be defined by board.mk, default to port 0
+#ifndef BOARD_TUD_RHPORT
+#define BOARD_TUD_RHPORT      0
+#endif
+
+// RHPort max operational speed can defined by board.mk
+#ifndef BOARD_TUD_MAX_SPEED
+#define BOARD_TUD_MAX_SPEED   OPT_MODE_DEFAULT_SPEED
+#endif
+
+//--------------------------------------------------------------------
+// Common Configuration
+//--------------------------------------------------------------------
+
+// defined by compiler flags for flexibility
+#ifndef CFG_TUSB_MCU
+#error CFG_TUSB_MCU must be defined
+#endif
+
+#ifndef CFG_TUSB_OS
+#define CFG_TUSB_OS           OPT_OS_NONE
+#endif
+
+#ifndef CFG_TUSB_DEBUG
+#define CFG_TUSB_DEBUG        0
+#endif
+
+// Enable Device stack
+#define CFG_TUD_ENABLED       1
+
+// Default is max speed that hardware controller could support with on-chip PHY
+#define CFG_TUD_MAX_SPEED     BOARD_TUD_MAX_SPEED
+
+/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
+ * Tinyusb use follows macros to declare transferring memory so that they can be put
+ * into those specific section.
+ * e.g
+ * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") ))
+ * - CFG_TUSB_MEM_ALIGN   : __attribute__ ((aligned(4)))
+ */
+#ifndef CFG_TUSB_MEM_SECTION
+#define CFG_TUSB_MEM_SECTION
+#endif
+
+#ifndef CFG_TUSB_MEM_ALIGN
+#define CFG_TUSB_MEM_ALIGN        __attribute__ ((aligned(4)))
+#endif
+
+//--------------------------------------------------------------------
+// DEVICE CONFIGURATION
+//--------------------------------------------------------------------
+
+#ifndef CFG_TUD_ENDPOINT0_SIZE
+#define CFG_TUD_ENDPOINT0_SIZE    64
+#endif
+
+//------------- CLASS -------------//
+#define CFG_TUD_CDC               1
+#define CFG_TUD_MSC               0
+#define CFG_TUD_HID               0
+#define CFG_TUD_MIDI              0
+#define CFG_TUD_AUDIO             1
+#define CFG_TUD_VENDOR            0
+
+//--------------------------------------------------------------------
+// AUDIO CLASS DRIVER CONFIGURATION
+//--------------------------------------------------------------------
+
+#define CFG_TUD_AUDIO_FUNC_1_DESC_LEN                                TUD_AUDIO_HEADSET_STEREO_DESC_LEN
+
+// How many formats are used, need to adjust USB descriptor if changed
+#define CFG_TUD_AUDIO_FUNC_1_N_FORMATS                               2
+
+// Audio format type I specifications
+#if defined(__RX__)
+#define CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE                         48000     // 16bit/48kHz is the best quality for Renesas RX
+#else
+#define CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE                         96000     // 24bit/96kHz is the best quality for full-speed, high-speed is needed beyond this
+#endif
+#define CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX                           1
+#define CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX                           1         // Changed
+
+// 16bit in 16bit slots
+#define CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX          2
+#define CFG_TUD_AUDIO_FUNC_1_FORMAT_1_RESOLUTION_TX                  16
+#define CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_RX          2
+#define CFG_TUD_AUDIO_FUNC_1_FORMAT_1_RESOLUTION_RX                  16
+
+#if defined(__RX__)
+// 8bit in 8bit slots
+#define CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX          1
+#define CFG_TUD_AUDIO_FUNC_1_FORMAT_2_RESOLUTION_TX                  8
+#define CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_RX          1
+#define CFG_TUD_AUDIO_FUNC_1_FORMAT_2_RESOLUTION_RX                  8
+#else
+// 24bit in 32bit slots
+#define CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX          4
+#define CFG_TUD_AUDIO_FUNC_1_FORMAT_2_RESOLUTION_TX                  24
+#define CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_RX          4
+#define CFG_TUD_AUDIO_FUNC_1_FORMAT_2_RESOLUTION_RX                  24
+#endif
+
+// EP and buffer size - for isochronous EP´s, the buffer and EP size are equal (different sizes would not make sense)
+#define CFG_TUD_AUDIO_ENABLE_EP_IN                1
+
+#define CFG_TUD_AUDIO_FUNC_1_FORMAT_1_EP_SZ_IN    TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX)
+#define CFG_TUD_AUDIO_FUNC_1_FORMAT_2_EP_SZ_IN    TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX)
+
+#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ      TU_MAX(CFG_TUD_AUDIO_FUNC_1_FORMAT_1_EP_SZ_IN, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_EP_SZ_IN)
+#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX         TU_MAX(CFG_TUD_AUDIO_FUNC_1_FORMAT_1_EP_SZ_IN, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_EP_SZ_IN) // Maximum EP IN size for all AS alternate settings used
+
+// EP and buffer size - for isochronous EP´s, the buffer and EP size are equal (different sizes would not make sense)
+#define CFG_TUD_AUDIO_ENABLE_EP_OUT               1
+
+#define CFG_TUD_AUDIO_UNC_1_FORMAT_1_EP_SZ_OUT    TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX)
+#define CFG_TUD_AUDIO_UNC_1_FORMAT_2_EP_SZ_OUT    TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX)
+
+#define CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ     TU_MAX(CFG_TUD_AUDIO_UNC_1_FORMAT_1_EP_SZ_OUT, CFG_TUD_AUDIO_UNC_1_FORMAT_1_EP_SZ_OUT)
+#define CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX        TU_MAX(CFG_TUD_AUDIO_UNC_1_FORMAT_1_EP_SZ_OUT, CFG_TUD_AUDIO_UNC_1_FORMAT_1_EP_SZ_OUT) // Maximum EP IN size for all AS alternate settings used
+
+// Number of Standard AS Interface Descriptors (4.9.1) defined per audio function - this is required to be able to remember the current alternate settings of these interfaces - We restrict us here to have a constant number for all audio functions (which means this has to be the maximum number of AS interfaces an audio function has and a second audio function with less AS interfaces just wastes a few bytes)
+#define CFG_TUD_AUDIO_FUNC_1_N_AS_INT 	          2
+
+// Size of control request buffer
+#define CFG_TUD_AUDIO_FUNC_1_CTRL_BUF_SZ          64
+
+// CDC FIFO size of TX and RX
+#define CFG_TUD_CDC_RX_BUFSIZE                    64
+#define CFG_TUD_CDC_TX_BUFSIZE                    64
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _TUSB_CONFIG_H_ */
diff --git a/examples/device/cdc_uac2/src/tusb_uac2.c b/examples/device/cdc_uac2/src/tusb_uac2.c
new file mode 100644
index 000000000..33dc33122
--- /dev/null
+++ b/examples/device/cdc_uac2/src/tusb_uac2.c
@@ -0,0 +1,316 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jerzy Kasenberg
+ * Copyright (c) 2022 Angel Molina (angelmolinu@gmail.com)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#include <stdio.h>
+#include <string.h>
+
+#include "bsp/board.h"
+#include "tusb.h"
+#include "usb_descriptors.h"
+#include "common.h"
+
+//--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF PROTOTYPES
+//--------------------------------------------------------------------+
+
+// List of supported sample rates
+const uint32_t sample_rates[] = {44100, 48000};
+uint32_t current_sample_rate  = 44100;
+
+#define N_SAMPLE_RATES  TU_ARRAY_SIZE(sample_rates)
+
+uint32_t blink_interval_ms = BLINK_NOT_MOUNTED;
+
+// Audio controls
+// Current states
+int8_t mute[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX + 1];       // +1 for master channel 0
+int16_t volume[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX + 1];    // +1 for master channel 0
+
+// Buffer for microphone data
+int32_t mic_buf[CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ / 4];
+// Buffer for speaker data
+int32_t spk_buf[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ / 4];
+// Speaker data size received in the last frame
+int spk_data_size;
+// Resolution per format
+const uint8_t resolutions_per_format[CFG_TUD_AUDIO_FUNC_1_N_FORMATS] = {CFG_TUD_AUDIO_FUNC_1_FORMAT_1_RESOLUTION_RX};
+// Current resolution, update on format change
+uint8_t current_resolution;
+
+// Helper for clock get requests
+static bool tud_audio_clock_get_request(uint8_t rhport, audio_control_request_t const *request)
+{
+  TU_ASSERT(request->bEntityID == UAC2_ENTITY_CLOCK);
+
+  if (request->bControlSelector == AUDIO_CS_CTRL_SAM_FREQ)
+  {
+    if (request->bRequest == AUDIO_CS_REQ_CUR)
+    {
+      TU_LOG1("Clock get current freq %lu\r\n", current_sample_rate);
+
+      audio_control_cur_4_t curf = { (int32_t) tu_htole32(current_sample_rate) };
+      return tud_audio_buffer_and_schedule_control_xfer(rhport, (tusb_control_request_t const *)request, &curf, sizeof(curf));
+    }
+    else if (request->bRequest == AUDIO_CS_REQ_RANGE)
+    {
+      audio_control_range_4_n_t(N_SAMPLE_RATES) rangef =
+      {
+        .wNumSubRanges = tu_htole16(N_SAMPLE_RATES)
+      };
+      TU_LOG1("Clock get %d freq ranges\r\n", N_SAMPLE_RATES);
+      for(uint8_t i = 0; i < N_SAMPLE_RATES; i++)
+      {
+        rangef.subrange[i].bMin = (int32_t) sample_rates[i];
+        rangef.subrange[i].bMax = (int32_t) sample_rates[i];
+        rangef.subrange[i].bRes = 0;
+        TU_LOG1("Range %d (%d, %d, %d)\r\n", i, (int)rangef.subrange[i].bMin, (int)rangef.subrange[i].bMax, (int)rangef.subrange[i].bRes);
+      }
+
+      return tud_audio_buffer_and_schedule_control_xfer(rhport, (tusb_control_request_t const *)request, &rangef, sizeof(rangef));
+    }
+  }
+  else if (request->bControlSelector == AUDIO_CS_CTRL_CLK_VALID &&
+           request->bRequest == AUDIO_CS_REQ_CUR)
+  {
+    audio_control_cur_1_t cur_valid = { .bCur = 1 };
+    TU_LOG1("Clock get is valid %u\r\n", cur_valid.bCur);
+    return tud_audio_buffer_and_schedule_control_xfer(rhport, (tusb_control_request_t const *)request, &cur_valid, sizeof(cur_valid));
+  }
+  TU_LOG1("Clock get request not supported, entity = %u, selector = %u, request = %u\r\n",
+          request->bEntityID, request->bControlSelector, request->bRequest);
+  return false;
+}
+
+// Helper for clock set requests
+static bool tud_audio_clock_set_request(uint8_t rhport, audio_control_request_t const *request, uint8_t const *buf)
+{
+  (void)rhport;
+
+  TU_ASSERT(request->bEntityID == UAC2_ENTITY_CLOCK);
+  TU_VERIFY(request->bRequest == AUDIO_CS_REQ_CUR);
+
+  if (request->bControlSelector == AUDIO_CS_CTRL_SAM_FREQ)
+  {
+    TU_VERIFY(request->wLength == sizeof(audio_control_cur_4_t));
+
+    current_sample_rate = (uint32_t) ((audio_control_cur_4_t const *)buf)->bCur;
+
+    TU_LOG1("Clock set current freq: %ld\r\n", current_sample_rate);
+
+    return true;
+  }
+  else
+  {
+    TU_LOG1("Clock set request not supported, entity = %u, selector = %u, request = %u\r\n",
+            request->bEntityID, request->bControlSelector, request->bRequest);
+    return false;
+  }
+}
+
+// Helper for feature unit get requests
+static bool tud_audio_feature_unit_get_request(uint8_t rhport, audio_control_request_t const *request)
+{
+  TU_ASSERT(request->bEntityID == UAC2_ENTITY_SPK_FEATURE_UNIT);
+
+  if (request->bControlSelector == AUDIO_FU_CTRL_MUTE && request->bRequest == AUDIO_CS_REQ_CUR)
+  {
+    audio_control_cur_1_t mute1 = { .bCur = mute[request->bChannelNumber] };
+    TU_LOG1("Get channel %u mute %d\r\n", request->bChannelNumber, mute1.bCur);
+    return tud_audio_buffer_and_schedule_control_xfer(rhport, (tusb_control_request_t const *)request, &mute1, sizeof(mute1));
+  }
+  else if (UAC2_ENTITY_SPK_FEATURE_UNIT && request->bControlSelector == AUDIO_FU_CTRL_VOLUME)
+  {
+    if (request->bRequest == AUDIO_CS_REQ_RANGE)
+    {
+      audio_control_range_2_n_t(1) range_vol = {
+        .wNumSubRanges = tu_htole16(1),
+        .subrange[0] = { .bMin = tu_htole16(-VOLUME_CTRL_50_DB), tu_htole16(VOLUME_CTRL_0_DB), tu_htole16(256) }
+      };
+      TU_LOG1("Get channel %u volume range (%d, %d, %u) dB\r\n", request->bChannelNumber,
+              range_vol.subrange[0].bMin / 256, range_vol.subrange[0].bMax / 256, range_vol.subrange[0].bRes / 256);
+      return tud_audio_buffer_and_schedule_control_xfer(rhport, (tusb_control_request_t const *)request, &range_vol, sizeof(range_vol));
+    }
+    else if (request->bRequest == AUDIO_CS_REQ_CUR)
+    {
+      audio_control_cur_2_t cur_vol = { .bCur = tu_htole16(volume[request->bChannelNumber]) };
+      TU_LOG1("Get channel %u volume %d dB\r\n", request->bChannelNumber, cur_vol.bCur / 256);
+      return tud_audio_buffer_and_schedule_control_xfer(rhport, (tusb_control_request_t const *)request, &cur_vol, sizeof(cur_vol));
+    }
+  }
+  TU_LOG1("Feature unit get request not supported, entity = %u, selector = %u, request = %u\r\n",
+          request->bEntityID, request->bControlSelector, request->bRequest);
+
+  return false;
+}
+
+// Helper for feature unit set requests
+static bool tud_audio_feature_unit_set_request(uint8_t rhport, audio_control_request_t const *request, uint8_t const *buf)
+{
+  (void)rhport;
+
+  TU_ASSERT(request->bEntityID == UAC2_ENTITY_SPK_FEATURE_UNIT);
+  TU_VERIFY(request->bRequest == AUDIO_CS_REQ_CUR);
+
+  if (request->bControlSelector == AUDIO_FU_CTRL_MUTE)
+  {
+    TU_VERIFY(request->wLength == sizeof(audio_control_cur_1_t));
+
+    mute[request->bChannelNumber] = ((audio_control_cur_1_t const *)buf)->bCur;
+
+    TU_LOG1("Set channel %d Mute: %d\r\n", request->bChannelNumber, mute[request->bChannelNumber]);
+
+    return true;
+  }
+  else if (request->bControlSelector == AUDIO_FU_CTRL_VOLUME)
+  {
+    TU_VERIFY(request->wLength == sizeof(audio_control_cur_2_t));
+
+    volume[request->bChannelNumber] = ((audio_control_cur_2_t const *)buf)->bCur;
+
+    TU_LOG1("Set channel %d volume: %d dB\r\n", request->bChannelNumber, volume[request->bChannelNumber] / 256);
+
+    return true;
+  }
+  else
+  {
+    TU_LOG1("Feature unit set request not supported, entity = %u, selector = %u, request = %u\r\n",
+            request->bEntityID, request->bControlSelector, request->bRequest);
+    return false;
+  }
+}
+
+//--------------------------------------------------------------------+
+// Application Callback API Implementations
+//--------------------------------------------------------------------+
+
+// Invoked when audio class specific get request received for an entity
+bool tud_audio_get_req_entity_cb(uint8_t rhport, tusb_control_request_t const *p_request)
+{
+  audio_control_request_t const *request = (audio_control_request_t const *)p_request;
+
+  if (request->bEntityID == UAC2_ENTITY_CLOCK)
+    return tud_audio_clock_get_request(rhport, request);
+  if (request->bEntityID == UAC2_ENTITY_SPK_FEATURE_UNIT)
+    return tud_audio_feature_unit_get_request(rhport, request);
+  else
+  {
+    TU_LOG1("Get request not handled, entity = %d, selector = %d, request = %d\r\n",
+            request->bEntityID, request->bControlSelector, request->bRequest);
+  }
+  return false;
+}
+
+// Invoked when audio class specific set request received for an entity
+bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const *p_request, uint8_t *buf)
+{
+  audio_control_request_t const *request = (audio_control_request_t const *)p_request;
+
+  if (request->bEntityID == UAC2_ENTITY_SPK_FEATURE_UNIT)
+    return tud_audio_feature_unit_set_request(rhport, request, buf);
+  if (request->bEntityID == UAC2_ENTITY_CLOCK)
+    return tud_audio_clock_set_request(rhport, request, buf);
+  TU_LOG1("Set request not handled, entity = %d, selector = %d, request = %d\r\n",
+          request->bEntityID, request->bControlSelector, request->bRequest);
+
+  return false;
+}
+
+bool tud_audio_set_itf_close_EP_cb(uint8_t rhport, tusb_control_request_t const * p_request)
+{
+  (void)rhport;
+
+  uint8_t const itf = tu_u16_low(tu_le16toh(p_request->wIndex));
+  uint8_t const alt = tu_u16_low(tu_le16toh(p_request->wValue));
+
+  if (ITF_NUM_AUDIO_STREAMING_SPK == itf && alt == 0) {
+    // Audio streaming stop
+    blink_interval_ms = BLINK_MOUNTED;
+  }
+
+  return true;
+}
+
+bool tud_audio_set_itf_cb(uint8_t rhport, tusb_control_request_t const * p_request)
+{
+  (void)rhport;
+  uint8_t const itf = tu_u16_low(tu_le16toh(p_request->wIndex));
+  uint8_t const alt = tu_u16_low(tu_le16toh(p_request->wValue));
+
+  TU_LOG2("Set interface %d alt %d\r\n", itf, alt);
+  if (ITF_NUM_AUDIO_STREAMING_SPK == itf && alt != 0) {
+    // Audio streaming start
+    blink_interval_ms = BLINK_STREAMING;
+  }
+
+  // Clear buffer when streaming format is changed
+  spk_data_size = 0;
+  if(alt != 0)
+  {
+    current_resolution = resolutions_per_format[alt-1];
+  }
+
+  return true;
+}
+
+bool tud_audio_rx_done_pre_read_cb(uint8_t rhport, uint16_t n_bytes_received, uint8_t func_id, uint8_t ep_out, uint8_t cur_alt_setting)
+{
+  (void)rhport;
+  (void)func_id;
+  (void)ep_out;
+  (void)cur_alt_setting;
+
+  spk_data_size = tud_audio_read(spk_buf, n_bytes_received);
+  tud_audio_write(spk_buf, n_bytes_received);
+
+  return true;
+}
+
+bool tud_audio_tx_done_pre_load_cb(uint8_t rhport, uint8_t itf, uint8_t ep_in, uint8_t cur_alt_setting)
+{
+  (void)rhport;
+  (void)itf;
+  (void)ep_in;
+  (void)cur_alt_setting;
+
+  // This callback could be used to fill microphone data separately
+  return true;
+}
+
+//--------------------------------------------------------------------+
+// BLINKING TASK
+//--------------------------------------------------------------------+
+void led_blinking_task(void)
+{
+  static uint32_t start_ms = 0;
+  static bool led_state = false;
+
+  // Blink every interval ms
+  if (board_millis() - start_ms < blink_interval_ms) return;
+  start_ms += blink_interval_ms;
+
+  board_led_write(led_state);
+  led_state = 1 - led_state;
+}
diff --git a/examples/device/cdc_uac2/src/usb_descriptors.c b/examples/device/cdc_uac2/src/usb_descriptors.c
new file mode 100644
index 000000000..1b2766829
--- /dev/null
+++ b/examples/device/cdc_uac2/src/usb_descriptors.c
@@ -0,0 +1,190 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Ha Thach (tinyusb.org)
+ * Copyright (c) 2020 Jerzy Kasenberg
+ * Copyright (c) 2022 Angel Molina (angelmolinu@gmail.com)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#include "tusb.h"
+#include "usb_descriptors.h"
+
+/* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
+ * Same VID/PID with different interface e.g MSC (first), then CDC (later) will possibly cause system error on PC.
+ *
+ * Auto ProductID layout's Bitmap:
+ *   [MSB]     AUDIO | MIDI | HID | MSC | CDC          [LSB]
+ */
+#define _PID_MAP(itf, n)  ( (CFG_TUD_##itf) << (n) )
+#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
+    _PID_MAP(MIDI, 3) | _PID_MAP(AUDIO, 4) | _PID_MAP(VENDOR, 5) )
+
+//--------------------------------------------------------------------+
+// Device Descriptors
+//--------------------------------------------------------------------+
+tusb_desc_device_t const desc_device =
+{
+    .bLength            = sizeof(tusb_desc_device_t),
+    .bDescriptorType    = TUSB_DESC_DEVICE,
+    .bcdUSB             = 0x0200,
+
+    // Use Interface Association Descriptor (IAD)
+    // As required by USB Specs IAD's subclass must be common class (2) and protocol must be IAD (1)
+    .bDeviceClass       = TUSB_CLASS_MISC,
+    .bDeviceSubClass    = MISC_SUBCLASS_COMMON,
+    .bDeviceProtocol    = MISC_PROTOCOL_IAD,
+    .bMaxPacketSize0    = CFG_TUD_ENDPOINT0_SIZE,
+
+    .idVendor           = 0xCafe,
+    .idProduct          = USB_PID,
+    .bcdDevice          = 0x0100,
+
+    .iManufacturer      = 0x01,
+    .iProduct           = 0x02,
+    .iSerialNumber      = 0x03,
+
+    .bNumConfigurations = 0x01
+};
+
+// Invoked when received GET DEVICE DESCRIPTOR
+// Application return pointer to descriptor
+uint8_t const * tud_descriptor_device_cb(void)
+{
+  return (uint8_t const *)&desc_device;
+}
+
+//--------------------------------------------------------------------+
+// Configuration Descriptor
+//--------------------------------------------------------------------+
+#define CONFIG_TOTAL_LEN    	(TUD_CONFIG_DESC_LEN + CFG_TUD_AUDIO * TUD_AUDIO_HEADSET_STEREO_DESC_LEN + CFG_TUD_CDC * TUD_CDC_DESC_LEN)
+
+#if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX
+  // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number
+  // 0 control, 1 In, 2 Bulk, 3 Iso, 4 In etc ...
+  #define EPNUM_AUDIO_IN    0x03
+  #define EPNUM_AUDIO_OUT   0x03
+
+  #define EPNUM_CDC_NOTIF   0x84
+  #define EPNUM_CDC_OUT     0x05
+  #define EPNUM_CDC_IN      0x85
+
+#elif CFG_TUSB_MCU == OPT_MCU_NRF5X
+  // ISO endpoints for NRF5x are fixed to 0x08 (0x88)
+  #define EPNUM_AUDIO_IN    0x08
+  #define EPNUM_AUDIO_OUT   0x08
+
+#elif CFG_TUSB_MCU == OPT_MCU_SAMG  || CFG_TUSB_MCU ==  OPT_MCU_SAMX7X
+  // SAMG & SAME70 don't support a same endpoint number with different direction IN and OUT
+  //    e.g EP1 OUT & EP1 IN cannot exist together
+  #define EPNUM_AUDIO_IN    0x01
+  #define EPNUM_AUDIO_OUT   0x02
+
+#elif CFG_TUSB_MCU == OPT_MCU_FT90X || CFG_TUSB_MCU == OPT_MCU_FT93X
+  // FT9XX doesn't support a same endpoint number with different direction IN and OUT
+  //    e.g EP1 OUT & EP1 IN cannot exist together
+  #define EPNUM_AUDIO_IN    0x01
+  #define EPNUM_AUDIO_OUT   0x02
+
+#else
+  #define EPNUM_AUDIO_IN    0x01
+  #define EPNUM_AUDIO_OUT   0x01
+
+  #define EPNUM_CDC_NOTIF   0x83
+  #define EPNUM_CDC_OUT     0x04
+  #define EPNUM_CDC_IN      0x84
+#endif
+
+uint8_t const desc_configuration[] =
+{
+    // Config number, interface count, string index, total length, attribute, power in mA
+    TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
+
+    // Interface number, string index, EP Out & EP In address, EP size
+    TUD_AUDIO_HEADSET_STEREO_DESCRIPTOR(2, EPNUM_AUDIO_OUT, EPNUM_AUDIO_IN | 0x80),
+
+    // CDC: Interface number, string index, EP notification address and size, EP data address (out, in) and size.
+    TUD_CDC_DESCRIPTOR(ITF_NUM_CDC, 6, EPNUM_CDC_NOTIF, 8, EPNUM_CDC_OUT, EPNUM_CDC_IN, 64)
+};
+
+// Invoked when received GET CONFIGURATION DESCRIPTOR
+// Application return pointer to descriptor
+// Descriptor contents must exist long enough for transfer to complete
+uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
+{
+  (void)index; // for multiple configurations
+  return desc_configuration;
+}
+
+//--------------------------------------------------------------------+
+// String Descriptors
+//--------------------------------------------------------------------+
+
+// array of pointer to string descriptors
+char const* string_desc_arr [] =
+{
+  (const char[]) { 0x09, 0x04 },  // 0: is supported language is English (0x0409)
+  "TinyUSB",                      // 1: Manufacturer
+  "TinyUSB headset",              // 2: Product
+  "000001",                       // 3: Serials, should use chip ID
+  "TinyUSB Speakers",             // 4: Audio Interface
+  "TinyUSB Microphone",           // 5: Audio Interface
+  "TinyUSB CDC",                  // 6: Audio Interface
+};
+
+static uint16_t _desc_str[32];
+
+// Invoked when received GET STRING DESCRIPTOR request
+// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
+uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
+{
+  (void)langid;
+
+  uint8_t chr_count;
+
+  if (index == 0)
+  {
+    memcpy(&_desc_str[1], string_desc_arr[0], 2);
+    chr_count = 1;
+  }
+  else
+  {
+    // Convert ASCII string into UTF-16
+
+    if (!(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0]))) return NULL;
+
+    const char* str = string_desc_arr[index];
+
+    // Cap at max char
+    chr_count = (uint8_t) strlen(str);
+    if (chr_count > 31) chr_count = 31;
+
+    for (uint8_t i = 0; i < chr_count; i++)
+    {
+      _desc_str[1 + i] = str[i];
+    }
+  }
+
+  // first byte is length (including header), second byte is string type
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+
+  return _desc_str;
+}
diff --git a/examples/device/cdc_uac2/src/usb_descriptors.h b/examples/device/cdc_uac2/src/usb_descriptors.h
new file mode 100644
index 000000000..736feeefe
--- /dev/null
+++ b/examples/device/cdc_uac2/src/usb_descriptors.h
@@ -0,0 +1,158 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jerzy Kasenbreg
+ * Copyright (c) 2022 Angel Molina (angelmolinu@gmail.com)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#ifndef _USB_DESCRIPTORS_H_
+#define _USB_DESCRIPTORS_H_
+
+// #include "tusb.h"
+
+// Unit numbers are arbitrary selected
+#define UAC2_ENTITY_CLOCK               0x04
+// Speaker path
+#define UAC2_ENTITY_SPK_INPUT_TERMINAL  0x01
+#define UAC2_ENTITY_SPK_FEATURE_UNIT    0x02
+#define UAC2_ENTITY_SPK_OUTPUT_TERMINAL 0x03
+// Microphone path
+#define UAC2_ENTITY_MIC_INPUT_TERMINAL  0x11
+#define UAC2_ENTITY_MIC_OUTPUT_TERMINAL 0x13
+
+enum
+{
+  ITF_NUM_AUDIO_CONTROL = 0,
+  ITF_NUM_AUDIO_STREAMING_SPK,
+  ITF_NUM_AUDIO_STREAMING_MIC,
+  ITF_NUM_CDC,
+  ITF_NUM_CDC_DATA,
+  ITF_NUM_TOTAL
+};
+
+#define TUD_AUDIO_HEADSET_STEREO_DESC_LEN (TUD_AUDIO_DESC_IAD_LEN\
+    + TUD_AUDIO_DESC_STD_AC_LEN\
+    + TUD_AUDIO_DESC_CS_AC_LEN\
+    + TUD_AUDIO_DESC_CLK_SRC_LEN\
+    + TUD_AUDIO_DESC_INPUT_TERM_LEN\
+    + TUD_AUDIO_DESC_FEATURE_UNIT_TWO_CHANNEL_LEN\
+    + TUD_AUDIO_DESC_OUTPUT_TERM_LEN\
+    + TUD_AUDIO_DESC_INPUT_TERM_LEN\
+    + TUD_AUDIO_DESC_OUTPUT_TERM_LEN\
+    /* Interface 1, Alternate 0 */\
+    + TUD_AUDIO_DESC_STD_AS_INT_LEN\
+    /* Interface 1, Alternate 0 */\
+    + TUD_AUDIO_DESC_STD_AS_INT_LEN\
+    + TUD_AUDIO_DESC_CS_AS_INT_LEN\
+    + TUD_AUDIO_DESC_TYPE_I_FORMAT_LEN\
+    + TUD_AUDIO_DESC_STD_AS_ISO_EP_LEN\
+    + TUD_AUDIO_DESC_CS_AS_ISO_EP_LEN\
+    /* Interface 1, Alternate 2 */\
+    + TUD_AUDIO_DESC_STD_AS_INT_LEN\
+    + TUD_AUDIO_DESC_CS_AS_INT_LEN\
+    + TUD_AUDIO_DESC_TYPE_I_FORMAT_LEN\
+    + TUD_AUDIO_DESC_STD_AS_ISO_EP_LEN\
+    + TUD_AUDIO_DESC_CS_AS_ISO_EP_LEN\
+    /* Interface 2, Alternate 0 */\
+    + TUD_AUDIO_DESC_STD_AS_INT_LEN\
+    /* Interface 2, Alternate 1 */\
+    + TUD_AUDIO_DESC_STD_AS_INT_LEN\
+    + TUD_AUDIO_DESC_CS_AS_INT_LEN\
+    + TUD_AUDIO_DESC_TYPE_I_FORMAT_LEN\
+    + TUD_AUDIO_DESC_STD_AS_ISO_EP_LEN\
+    + TUD_AUDIO_DESC_CS_AS_ISO_EP_LEN\
+    /* Interface 2, Alternate 2 */\
+    + TUD_AUDIO_DESC_STD_AS_INT_LEN\
+    + TUD_AUDIO_DESC_CS_AS_INT_LEN\
+    + TUD_AUDIO_DESC_TYPE_I_FORMAT_LEN\
+    + TUD_AUDIO_DESC_STD_AS_ISO_EP_LEN\
+    + TUD_AUDIO_DESC_CS_AS_ISO_EP_LEN)
+
+#define TUD_AUDIO_HEADSET_STEREO_DESCRIPTOR(_stridx, _epout, _epin) \
+    /* Standard Interface Association Descriptor (IAD) */\
+    TUD_AUDIO_DESC_IAD(/*_firstitfs*/ ITF_NUM_AUDIO_CONTROL, /*_nitfs*/ 3, /*_stridx*/ 0x00),\
+    /* Standard AC Interface Descriptor(4.7.1) */\
+    TUD_AUDIO_DESC_STD_AC(/*_itfnum*/ ITF_NUM_AUDIO_CONTROL, /*_nEPs*/ 0x00, /*_stridx*/ _stridx),\
+    /* Class-Specific AC Interface Header Descriptor(4.7.2) */\
+    TUD_AUDIO_DESC_CS_AC(/*_bcdADC*/ 0x0200, /*_category*/ AUDIO_FUNC_HEADSET, /*_totallen*/ TUD_AUDIO_DESC_CLK_SRC_LEN+TUD_AUDIO_DESC_FEATURE_UNIT_TWO_CHANNEL_LEN+TUD_AUDIO_DESC_INPUT_TERM_LEN+TUD_AUDIO_DESC_OUTPUT_TERM_LEN+TUD_AUDIO_DESC_INPUT_TERM_LEN+TUD_AUDIO_DESC_OUTPUT_TERM_LEN, /*_ctrl*/ AUDIO_CS_AS_INTERFACE_CTRL_LATENCY_POS),\
+    /* Clock Source Descriptor(4.7.2.1) */\
+    TUD_AUDIO_DESC_CLK_SRC(/*_clkid*/ UAC2_ENTITY_CLOCK, /*_attr*/ 3, /*_ctrl*/ 7, /*_assocTerm*/ 0x00,  /*_stridx*/ 0x00),    \
+    /* Input Terminal Descriptor(4.7.2.4) */\
+    TUD_AUDIO_DESC_INPUT_TERM(/*_termid*/ UAC2_ENTITY_SPK_INPUT_TERMINAL, /*_termtype*/ AUDIO_TERM_TYPE_USB_STREAMING, /*_assocTerm*/ 0x00, /*_clkid*/ UAC2_ENTITY_CLOCK, /*_nchannelslogical*/ 0x02, /*_channelcfg*/ AUDIO_CHANNEL_CONFIG_NON_PREDEFINED, /*_idxchannelnames*/ 0x00, /*_ctrl*/ 0 * (AUDIO_CTRL_R << AUDIO_IN_TERM_CTRL_CONNECTOR_POS), /*_stridx*/ 0x00),\
+    /* Feature Unit Descriptor(4.7.2.8) */\
+    TUD_AUDIO_DESC_FEATURE_UNIT_TWO_CHANNEL(/*_unitid*/ UAC2_ENTITY_SPK_FEATURE_UNIT, /*_srcid*/ UAC2_ENTITY_SPK_INPUT_TERMINAL, /*_ctrlch0master*/ (AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS), /*_ctrlch1*/ (AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS), /*_ctrlch2*/ (AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_MUTE_POS | AUDIO_CTRL_RW << AUDIO_FEATURE_UNIT_CTRL_VOLUME_POS), /*_stridx*/ 0x00),\
+    /* Output Terminal Descriptor(4.7.2.5) */\
+    TUD_AUDIO_DESC_OUTPUT_TERM(/*_termid*/ UAC2_ENTITY_SPK_OUTPUT_TERMINAL, /*_termtype*/ AUDIO_TERM_TYPE_OUT_HEADPHONES, /*_assocTerm*/ 0x00, /*_srcid*/ UAC2_ENTITY_SPK_FEATURE_UNIT, /*_clkid*/ UAC2_ENTITY_CLOCK, /*_ctrl*/ 0x0000, /*_stridx*/ 0x00),\
+    /* Input Terminal Descriptor(4.7.2.4) */\
+    TUD_AUDIO_DESC_INPUT_TERM(/*_termid*/ UAC2_ENTITY_MIC_INPUT_TERMINAL, /*_termtype*/ AUDIO_TERM_TYPE_IN_GENERIC_MIC, /*_assocTerm*/ 0x00, /*_clkid*/ UAC2_ENTITY_CLOCK, /*_nchannelslogical*/ 0x01, /*_channelcfg*/ AUDIO_CHANNEL_CONFIG_NON_PREDEFINED, /*_idxchannelnames*/ 0x00, /*_ctrl*/ 0 * (AUDIO_CTRL_R << AUDIO_IN_TERM_CTRL_CONNECTOR_POS), /*_stridx*/ 0x00),\
+    /* Output Terminal Descriptor(4.7.2.5) */\
+    TUD_AUDIO_DESC_OUTPUT_TERM(/*_termid*/ UAC2_ENTITY_MIC_OUTPUT_TERMINAL, /*_termtype*/ AUDIO_TERM_TYPE_USB_STREAMING, /*_assocTerm*/ 0x00, /*_srcid*/ UAC2_ENTITY_MIC_INPUT_TERMINAL, /*_clkid*/ UAC2_ENTITY_CLOCK, /*_ctrl*/ 0x0000, /*_stridx*/ 0x00),\
+    /* Standard AS Interface Descriptor(4.9.1) */\
+    /* Interface 1, Alternate 0 - default alternate setting with 0 bandwidth */\
+    TUD_AUDIO_DESC_STD_AS_INT(/*_itfnum*/ (uint8_t)(ITF_NUM_AUDIO_STREAMING_SPK), /*_altset*/ 0x00, /*_nEPs*/ 0x00, /*_stridx*/ 0x05),\
+    /* Standard AS Interface Descriptor(4.9.1) */\
+    /* Interface 1, Alternate 1 - alternate interface for data streaming */\
+    TUD_AUDIO_DESC_STD_AS_INT(/*_itfnum*/ (uint8_t)(ITF_NUM_AUDIO_STREAMING_SPK), /*_altset*/ 0x01, /*_nEPs*/ 0x01, /*_stridx*/ 0x05),\
+    /* Class-Specific AS Interface Descriptor(4.9.2) */\
+    TUD_AUDIO_DESC_CS_AS_INT(/*_termid*/ UAC2_ENTITY_SPK_INPUT_TERMINAL, /*_ctrl*/ AUDIO_CTRL_NONE, /*_formattype*/ AUDIO_FORMAT_TYPE_I, /*_formats*/ AUDIO_DATA_FORMAT_TYPE_I_PCM, /*_nchannelsphysical*/ CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX, /*_channelcfg*/ AUDIO_CHANNEL_CONFIG_NON_PREDEFINED, /*_stridx*/ 0x00),\
+    /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
+    TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_RESOLUTION_RX),\
+    /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
+    TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\
+    /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
+    TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_MILLISEC, /*_lockdelay*/ 0x0001),\
+    /* Interface 1, Alternate 2 - alternate interface for data streaming */\
+    TUD_AUDIO_DESC_STD_AS_INT(/*_itfnum*/ (uint8_t)(ITF_NUM_AUDIO_STREAMING_SPK), /*_altset*/ 0x02, /*_nEPs*/ 0x01, /*_stridx*/ 0x05),\
+    /* Class-Specific AS Interface Descriptor(4.9.2) */\
+    TUD_AUDIO_DESC_CS_AS_INT(/*_termid*/ UAC2_ENTITY_SPK_INPUT_TERMINAL, /*_ctrl*/ AUDIO_CTRL_NONE, /*_formattype*/ AUDIO_FORMAT_TYPE_I, /*_formats*/ AUDIO_DATA_FORMAT_TYPE_I_PCM, /*_nchannelsphysical*/ CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX, /*_channelcfg*/ AUDIO_CHANNEL_CONFIG_NON_PREDEFINED, /*_stridx*/ 0x00),\
+    /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
+    TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_RESOLUTION_RX),\
+    /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
+    TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epout, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ADAPTIVE | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_RX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_RX), /*_interval*/ 0x01),\
+    /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
+    TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_MILLISEC, /*_lockdelay*/ 0x0001),\
+    /* Standard AS Interface Descriptor(4.9.1) */\
+    /* Interface 2, Alternate 0 - default alternate setting with 0 bandwidth */\
+    TUD_AUDIO_DESC_STD_AS_INT(/*_itfnum*/ (uint8_t)(ITF_NUM_AUDIO_STREAMING_MIC), /*_altset*/ 0x00, /*_nEPs*/ 0x00, /*_stridx*/ 0x04),\
+    /* Standard AS Interface Descriptor(4.9.1) */\
+    /* Interface 2, Alternate 1 - alternate interface for data streaming */\
+    TUD_AUDIO_DESC_STD_AS_INT(/*_itfnum*/ (uint8_t)(ITF_NUM_AUDIO_STREAMING_MIC), /*_altset*/ 0x01, /*_nEPs*/ 0x01, /*_stridx*/ 0x04),\
+    /* Class-Specific AS Interface Descriptor(4.9.2) */\
+    TUD_AUDIO_DESC_CS_AS_INT(/*_termid*/ UAC2_ENTITY_MIC_OUTPUT_TERMINAL, /*_ctrl*/ AUDIO_CTRL_NONE, /*_formattype*/ AUDIO_FORMAT_TYPE_I, /*_formats*/ AUDIO_DATA_FORMAT_TYPE_I_PCM, /*_nchannelsphysical*/ CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX, /*_channelcfg*/ AUDIO_CHANNEL_CONFIG_NON_PREDEFINED, /*_stridx*/ 0x00),\
+    /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
+    TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_RESOLUTION_TX),\
+    /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
+    TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\
+    /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
+    TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000),\
+    /* Interface 2, Alternate 2 - alternate interface for data streaming */\
+    TUD_AUDIO_DESC_STD_AS_INT(/*_itfnum*/ (uint8_t)(ITF_NUM_AUDIO_STREAMING_MIC), /*_altset*/ 0x02, /*_nEPs*/ 0x01, /*_stridx*/ 0x04),\
+    /* Class-Specific AS Interface Descriptor(4.9.2) */\
+    TUD_AUDIO_DESC_CS_AS_INT(/*_termid*/ UAC2_ENTITY_MIC_OUTPUT_TERMINAL, /*_ctrl*/ AUDIO_CTRL_NONE, /*_formattype*/ AUDIO_FORMAT_TYPE_I, /*_formats*/ AUDIO_DATA_FORMAT_TYPE_I_PCM, /*_nchannelsphysical*/ CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX, /*_channelcfg*/ AUDIO_CHANNEL_CONFIG_NON_PREDEFINED, /*_stridx*/ 0x00),\
+    /* Type I Format Type Descriptor(2.3.1.6 - Audio Formats) */\
+    TUD_AUDIO_DESC_TYPE_I_FORMAT(CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_RESOLUTION_TX),\
+    /* Standard AS Isochronous Audio Data Endpoint Descriptor(4.10.1.1) */\
+    TUD_AUDIO_DESC_STD_AS_ISO_EP(/*_ep*/ _epin, /*_attr*/ (uint8_t) (TUSB_XFER_ISOCHRONOUS | TUSB_ISO_EP_ATT_ASYNCHRONOUS | TUSB_ISO_EP_ATT_DATA), /*_maxEPsize*/ TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_MAX_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_FORMAT_2_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX), /*_interval*/ 0x01),\
+    /* Class-Specific AS Isochronous Audio Data Endpoint Descriptor(4.10.1.2) */\
+    TUD_AUDIO_DESC_CS_AS_ISO_EP(/*_attr*/ AUDIO_CS_AS_ISO_DATA_EP_ATT_NON_MAX_PACKETS_OK, /*_ctrl*/ AUDIO_CTRL_NONE, /*_lockdelayunit*/ AUDIO_CS_AS_ISO_DATA_EP_LOCK_DELAY_UNIT_UNDEFINED, /*_lockdelay*/ 0x0000)
+
+#endif

From 1b658ae109a9d2aa1ac2fc14393cb9d8a64ccd8a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 20 Jun 2023 12:11:01 +0700
Subject: [PATCH 427/691] add etm trace for mcb1800

clean up other ide setting
---
 .gitignore                                    |  2 ++
 .idea/runConfigurations/kl25.xml              | 10 ++++++
 .idea/runConfigurations/lpc1857.xml           | 10 ++++++
 .idea/runConfigurations/mcx947.xml            | 10 ++++++
 .idea/runConfigurations/mcx947_jlink.xml      | 10 ------
 .idea/runConfigurations/rt1010.xml            | 10 ++++++
 .idea/runConfigurations/rt1010_jlink.xml      | 10 ------
 .idea/runConfigurations/rt1060.xml            | 10 ++++++
 .idea/runConfigurations/rt1060_jlink.xml      | 10 ------
 .idea/runConfigurations/stlink.xml            | 10 ++++++
 .idea/runConfigurations/stm32g474.xml         | 10 ++++++
 .idea/runConfigurations/stm32g474_jlink.xml   | 10 ------
 .idea/runConfigurations/stm32h743.xml         | 10 ++++++
 hw/bsp/lpc18/boards/mcb1800/board.h           | 21 ++++++-----
 .../lpc18/boards/mcb1800/ozone/lpc1857.jdebug | 36 +++++++++++++++++++
 hw/bsp/lpc18/family.c                         | 11 ++++--
 .../cubemx/{board.ioc => b_g474e_dpow1.ioc}   |  6 ++--
 .../stm32h743eval/cubemx/stm32h743eval.ioc    |  4 +--
 .../{h743eval.jdebug => stm32h743.jdebug}     | 14 +++-----
 19 files changed, 150 insertions(+), 64 deletions(-)
 create mode 100644 .idea/runConfigurations/kl25.xml
 create mode 100644 .idea/runConfigurations/lpc1857.xml
 create mode 100644 .idea/runConfigurations/mcx947.xml
 delete mode 100644 .idea/runConfigurations/mcx947_jlink.xml
 create mode 100644 .idea/runConfigurations/rt1010.xml
 delete mode 100644 .idea/runConfigurations/rt1010_jlink.xml
 create mode 100644 .idea/runConfigurations/rt1060.xml
 delete mode 100644 .idea/runConfigurations/rt1060_jlink.xml
 create mode 100644 .idea/runConfigurations/stlink.xml
 create mode 100644 .idea/runConfigurations/stm32g474.xml
 delete mode 100644 .idea/runConfigurations/stm32g474_jlink.xml
 create mode 100644 .idea/runConfigurations/stm32h743.xml
 create mode 100644 hw/bsp/lpc18/boards/mcb1800/ozone/lpc1857.jdebug
 rename hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/{board.ioc => b_g474e_dpow1.ioc} (98%)
 rename hw/bsp/stm32h7/boards/stm32h743eval/ozone/{h743eval.jdebug => stm32h743.jdebug} (96%)

diff --git a/.gitignore b/.gitignore
index 8f5bb6efd..c665d6c73 100644
--- a/.gitignore
+++ b/.gitignore
@@ -21,6 +21,8 @@ _build
 /examples/*/*/ses
 /examples/*/*/ozone
 /examples/obsolete
+hw/bsp/**/cubemx/*/
+.mxproject
 # coverity intermediate files
 cov-int
 # cppcheck build directories
diff --git a/.idea/runConfigurations/kl25.xml b/.idea/runConfigurations/kl25.xml
new file mode 100644
index 000000000..8b0cd9e75
--- /dev/null
+++ b/.idea/runConfigurations/kl25.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="kl25" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MKL25Z128xxx4&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcb1800" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/lpc1857.xml b/.idea/runConfigurations/lpc1857.xml
new file mode 100644
index 000000000..ed7d17ca6
--- /dev/null
+++ b/.idea/runConfigurations/lpc1857.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="lpc1857" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;lpc1857&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcb1800" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/mcx947.xml b/.idea/runConfigurations/mcx947.xml
new file mode 100644
index 000000000..ddd568bcb
--- /dev/null
+++ b/.idea/runConfigurations/mcx947.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="mcx947" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MCXN947_M33_0&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/mcx/mcx.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcb1800" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/mcx947_jlink.xml b/.idea/runConfigurations/mcx947_jlink.xml
deleted file mode 100644
index 27661bec5..000000000
--- a/.idea/runConfigurations/mcx947_jlink.xml
+++ /dev/null
@@ -1,10 +0,0 @@
-<component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="mcx947 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MCXN947_M33_0&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/mcx/mcx.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
-    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
-      <debugger kind="GDB" isBundled="true" />
-    </custom-gdb-server>
-    <method v="2">
-      <option name="CLION.COMPOUND.BUILD" enabled="true" />
-    </method>
-  </configuration>
-</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/rt1010.xml b/.idea/runConfigurations/rt1010.xml
new file mode 100644
index 000000000..98dea28a4
--- /dev/null
+++ b/.idea/runConfigurations/rt1010.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="rt1010" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1011xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcb1800" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/rt1010_jlink.xml b/.idea/runConfigurations/rt1010_jlink.xml
deleted file mode 100644
index 68ebb8885..000000000
--- a/.idea/runConfigurations/rt1010_jlink.xml
+++ /dev/null
@@ -1,10 +0,0 @@
-<component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rt1010 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1011xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="frdm_kl25z" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
-    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
-      <debugger kind="GDB" isBundled="true" />
-    </custom-gdb-server>
-    <method v="2">
-      <option name="CLION.COMPOUND.BUILD" enabled="true" />
-    </method>
-  </configuration>
-</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/rt1060.xml b/.idea/runConfigurations/rt1060.xml
new file mode 100644
index 000000000..ff6ee8d84
--- /dev/null
+++ b/.idea/runConfigurations/rt1060.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="rt1060" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1062xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcb1800" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/rt1060_jlink.xml b/.idea/runConfigurations/rt1060_jlink.xml
deleted file mode 100644
index 014a4d1b1..000000000
--- a/.idea/runConfigurations/rt1060_jlink.xml
+++ /dev/null
@@ -1,10 +0,0 @@
-<component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rt1060 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1062xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
-    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
-      <debugger kind="GDB" isBundled="true" />
-    </custom-gdb-server>
-    <method v="2">
-      <option name="CLION.COMPOUND.BUILD" enabled="true" />
-    </method>
-  </configuration>
-</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/stlink.xml b/.idea/runConfigurations/stlink.xml
new file mode 100644
index 000000000..b3f6d15f0
--- /dev/null
+++ b/.idea/runConfigurations/stlink.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="stlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-p 62847 -cp &quot;/opt/st/stm32cubeide_1.12.1/plugins/com.st.stm32cube.ide.mcu.externaltools.cubeprogrammer.linux64_2.0.600.202301161003/tools/bin&quot; --frequency 24000 --swd" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcb1800" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::62847" executable="/opt/st/stm32cubeide_1.12.1/plugins/com.st.stm32cube.ide.mcu.externaltools.stlink-gdb-server.linux64_2.0.500.202301161003/tools/bin/ST-LINK_gdbserver" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/stm32g474.xml b/.idea/runConfigurations/stm32g474.xml
new file mode 100644
index 000000000..d461cd60e
--- /dev/null
+++ b/.idea/runConfigurations/stm32g474.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="stm32g474" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;stm32g474re&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcb1800" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/stm32g474_jlink.xml b/.idea/runConfigurations/stm32g474_jlink.xml
deleted file mode 100644
index c33829833..000000000
--- a/.idea/runConfigurations/stm32g474_jlink.xml
+++ /dev/null
@@ -1,10 +0,0 @@
-<component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="stm32g474 jlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;stm32g474re&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="b_g474e_dpow1" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
-    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
-      <debugger kind="GDB" isBundled="true" />
-    </custom-gdb-server>
-    <method v="2">
-      <option name="CLION.COMPOUND.BUILD" enabled="true" />
-    </method>
-  </configuration>
-</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/stm32h743.xml b/.idea/runConfigurations/stm32h743.xml
new file mode 100644
index 000000000..c438422ce
--- /dev/null
+++ b/.idea/runConfigurations/stm32h743.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="stm32h743" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;stm32h743xi&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcb1800" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/hw/bsp/lpc18/boards/mcb1800/board.h b/hw/bsp/lpc18/boards/mcb1800/board.h
index 6111da975..f10500d79 100644
--- a/hw/bsp/lpc18/boards/mcb1800/board.h
+++ b/hw/bsp/lpc18/boards/mcb1800/board.h
@@ -41,10 +41,8 @@
 
 #define UART_DEV      LPC_USART3
 
-static inline void board_lpc18_pinmux(void)
-{
-  const PINMUX_GRP_T pinmuxing[] =
-  {
+static inline void board_lpc18_pinmux(void) {
+  const PINMUX_GRP_T pinmuxing[] = {
     // LEDs
     { 0xD, 10, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC4) },
     { 0xD, 11, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC4 | SCU_MODE_PULLDOWN) },
@@ -67,13 +65,21 @@ static inline void board_lpc18_pinmux(void)
 
     { 0x9, 5, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC2 },			              // P9_5 USB1_VBUS_EN, USB1 VBus function
     { 0x2, 5, SCU_MODE_INACT  | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC2 }, // P2_5 USB1_VBUS, MUST CONFIGURE THIS SIGNAL FOR USB1 NORMAL OPERATION
+
+    // ETM Trace
+    #ifdef TRACE_ETM
+    { 0xF, 4, SCU_MODE_FUNC2 | SCU_MODE_HIGHSPEEDSLEW_EN },
+    { 0xF, 5, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN },
+    { 0xF, 6, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN },
+    { 0xF, 7, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN },
+    { 0xF, 8, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN },
+    #endif
   };
 
   Chip_SCU_SetPinMuxing(pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T));
 
   /* Pin clock mux values, re-used structure, value in first index is meaningless */
-  const PINMUX_GRP_T pinclockmuxing[] =
-  {
+  const PINMUX_GRP_T pinclockmuxing[] = {
     { 0, 0,  (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0)},
     { 0, 1,  (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0)},
     { 0, 2,  (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0)},
@@ -81,8 +87,7 @@ static inline void board_lpc18_pinmux(void)
   };
 
   /* Clock pins only, group field not used */
-  for (uint32_t i = 0; i < (sizeof(pinclockmuxing) / sizeof(pinclockmuxing[0])); i++)
-  {
+  for (uint32_t i = 0; i < (sizeof(pinclockmuxing) / sizeof(pinclockmuxing[0])); i++) {
     Chip_SCU_ClockPinMuxSet(pinclockmuxing[i].pinnum, pinclockmuxing[i].modefunc);
   }
 }
diff --git a/hw/bsp/lpc18/boards/mcb1800/ozone/lpc1857.jdebug b/hw/bsp/lpc18/boards/mcb1800/ozone/lpc1857.jdebug
new file mode 100644
index 000000000..6e298c62d
--- /dev/null
+++ b/hw/bsp/lpc18/boards/mcb1800/ozone/lpc1857.jdebug
@@ -0,0 +1,36 @@
+
+/*********************************************************************
+*
+*       OnProjectLoad
+*
+* Function description
+*   Project load routine. Required.
+*
+**********************************************************************
+*/
+void OnProjectLoad (void) {
+  Project.AddSvdFile ("Cortex-M3.svd");
+  Project.AddSvdFile ("./LPC18xx.svd");
+
+  Project.SetDevice ("LPC1857");
+  Project.SetHostIF ("USB", "");
+  Project.SetTargetIF ("SWD");
+  Project.SetTIFSpeed ("50 MHz");
+
+  Project.SetTraceSource ("Trace Pins");
+  Project.SetTracePortWidth (4);
+
+  File.Open ("../../../../../../examples/device/cdc_msc/cmake-build-mcb1800/cdc_msc.elf");
+}
+/*********************************************************************
+*
+*       BeforeTargetConnect
+*
+**********************************************************************
+*/
+void BeforeTargetConnect (void) {
+  //
+  // Trace pin init is done by J-Link script file as J-Link script files are IDE independent
+  //
+  // Project.SetJLinkScript("./NXP_LPC1857JET256_TraceExample.pex");
+}
diff --git a/hw/bsp/lpc18/family.c b/hw/bsp/lpc18/family.c
index 57f9d55da..2fd69c84b 100644
--- a/hw/bsp/lpc18/family.c
+++ b/hw/bsp/lpc18/family.c
@@ -69,7 +69,6 @@ void USB1_IRQHandler(void)
 // MACRO TYPEDEF CONSTANT ENUM DECLARATION
 //--------------------------------------------------------------------+
 
-
 /* System configuration variables used by chip driver */
 const uint32_t OscRateIn = 12000000;
 const uint32_t ExtRateIn = 0;
@@ -84,7 +83,15 @@ void SystemInit(void)
 #endif
 
   board_lpc18_pinmux();
-  Chip_SetupXtalClocking();
+
+  #ifdef TRACE_ETM
+  // Trace clock is limited to 60MHz, limit CPU clock to 120MHz
+  Chip_SetupCoreClock(CLKIN_CRYSTAL, 120000000UL, true);
+  #else
+  // CPU clock max to 180 Mhz
+  Chip_SetupCoreClock(CLKIN_CRYSTAL, MAX_CLOCK_FREQ, true);
+  #endif
+
 }
 
 void board_init(void)
diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/board.ioc b/hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/b_g474e_dpow1.ioc
similarity index 98%
rename from hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/board.ioc
rename to hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/b_g474e_dpow1.ioc
index 6ce126f84..c15011896 100644
--- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/board.ioc
+++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/cubemx/b_g474e_dpow1.ioc
@@ -111,13 +111,13 @@ ProjectManager.MainLocation=Src
 ProjectManager.NoMain=false
 ProjectManager.PreviousToolchain=
 ProjectManager.ProjectBuild=false
-ProjectManager.ProjectFileName=board.ioc
-ProjectManager.ProjectName=board
+ProjectManager.ProjectFileName=b_g474e_dpow1.ioc
+ProjectManager.ProjectName=b_g474e_dpow1
 ProjectManager.ProjectStructure=
 ProjectManager.RegisterCallBack=
 ProjectManager.StackSize=0x400
 ProjectManager.TargetToolchain=Makefile
-ProjectManager.ToolChainLocation=
+ProjectManager.ToolChainLocation=Src
 ProjectManager.UnderRoot=false
 ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_USART3_UART_Init-USART3-false-HAL-true,5-MX_UCPD1_Init-UCPD1-false-LL-true
 RCC.ADC12Freq_Value=150000000
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc b/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc
index 1cc2cc8fa..331080c17 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc
@@ -881,7 +881,7 @@ ProjectManager.HalAssertFull=false
 ProjectManager.HeapSize=0x200
 ProjectManager.KeepUserCode=true
 ProjectManager.LastFirmware=true
-ProjectManager.LibraryCopy=0
+ProjectManager.LibraryCopy=2
 ProjectManager.MainLocation=Src
 ProjectManager.NoMain=false
 ProjectManager.PreviousToolchain=
@@ -892,7 +892,7 @@ ProjectManager.ProjectStructure=
 ProjectManager.RegisterCallBack=
 ProjectManager.StackSize=0x400
 ProjectManager.TargetToolchain=Makefile
-ProjectManager.ToolChainLocation=
+ProjectManager.ToolChainLocation=Src
 ProjectManager.UnderRoot=false
 ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,4-MX_USB_OTG_HS_PCD_Init-USB_OTG_HS-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
 RCC.ADCFreq_Value=50390625
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/ozone/h743eval.jdebug b/hw/bsp/stm32h7/boards/stm32h743eval/ozone/stm32h743.jdebug
similarity index 96%
rename from hw/bsp/stm32h7/boards/stm32h743eval/ozone/h743eval.jdebug
rename to hw/bsp/stm32h7/boards/stm32h743eval/ozone/stm32h743.jdebug
index 093951765..0ab078319 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/ozone/h743eval.jdebug
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/ozone/stm32h743.jdebug
@@ -9,9 +9,6 @@
 **********************************************************************
 */
 void OnProjectLoad (void) {
-  //
-  // Dialog-generated settings
-  //
   Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-M7F.svd");
   Project.AddSvdFile ("$(InstallDir)/Config/Peripherals/ARMv7M.svd");
   Project.AddSvdFile ("./STM32H743.svd");
@@ -21,17 +18,16 @@ void OnProjectLoad (void) {
   Project.SetTargetIF ("SWD");
   Project.SetTIFSpeed ("50 MHz");
 
-  //
-  // User settings
-  //
   Project.SetTraceSource ("Trace Pins");
+  Project.SetTracePortWidth (4);
+  // timing delay for trace pins in pico seconds, default is 2 nano seconds
   Project.SetTraceTiming (100, 100, 100, 100);
-  Edit.SysVar (VAR_TRACE_CORE_CLOCK, 150000000);
-  File.Open ("/home/hathach/code/tinyusb/examples/device/cdc_msc/cmake-build-h743eval/cdc_msc.elf");
+
+  File.Open ("../../../../../../examples/device/cdc_msc/cmake-build-stm32h743eval/cdc_msc.elf");
 }
 
 /*********************************************************************
-*
+*0
 *      TargetReset
 *
 * Function description

From 19c99d3b42276f25a84b184816a9980ee93beb8f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 20 Jun 2023 13:19:08 +0700
Subject: [PATCH 428/691] etm trace for nrf52840

---
 hw/bsp/lpc18/boards/mcb1800/board.h           |  18 +-
 hw/bsp/nrf/boards/pca10056/board.h            |   2 +-
 .../nrf/boards/pca10056/ozone/nrf52840.jdebug | 242 ++++++++++++++++++
 hw/bsp/nrf/family.c                           |  25 ++
 hw/bsp/stm32h7/family.c                       |   2 +-
 5 files changed, 278 insertions(+), 11 deletions(-)
 create mode 100644 hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug

diff --git a/hw/bsp/lpc18/boards/mcb1800/board.h b/hw/bsp/lpc18/boards/mcb1800/board.h
index f10500d79..5bfaa37cd 100644
--- a/hw/bsp/lpc18/boards/mcb1800/board.h
+++ b/hw/bsp/lpc18/boards/mcb1800/board.h
@@ -43,6 +43,15 @@
 
 static inline void board_lpc18_pinmux(void) {
   const PINMUX_GRP_T pinmuxing[] = {
+    // ETM Trace
+    #ifdef TRACE_ETM
+    { 0xF, 4, SCU_MODE_FUNC2 | SCU_MODE_HIGHSPEEDSLEW_EN },
+    { 0xF, 5, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN },
+    { 0xF, 6, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN },
+    { 0xF, 7, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN },
+    { 0xF, 8, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN },
+    #endif
+
     // LEDs
     { 0xD, 10, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC4) },
     { 0xD, 11, (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC4 | SCU_MODE_PULLDOWN) },
@@ -65,15 +74,6 @@ static inline void board_lpc18_pinmux(void) {
 
     { 0x9, 5, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC2 },			              // P9_5 USB1_VBUS_EN, USB1 VBus function
     { 0x2, 5, SCU_MODE_INACT  | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC2 }, // P2_5 USB1_VBUS, MUST CONFIGURE THIS SIGNAL FOR USB1 NORMAL OPERATION
-
-    // ETM Trace
-    #ifdef TRACE_ETM
-    { 0xF, 4, SCU_MODE_FUNC2 | SCU_MODE_HIGHSPEEDSLEW_EN },
-    { 0xF, 5, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN },
-    { 0xF, 6, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN },
-    { 0xF, 7, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN },
-    { 0xF, 8, SCU_MODE_FUNC3 | SCU_MODE_HIGHSPEEDSLEW_EN },
-    #endif
   };
 
   Chip_SCU_SetPinMuxing(pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T));
diff --git a/hw/bsp/nrf/boards/pca10056/board.h b/hw/bsp/nrf/boards/pca10056/board.h
index 50d3067b3..f4368f830 100644
--- a/hw/bsp/nrf/boards/pca10056/board.h
+++ b/hw/bsp/nrf/boards/pca10056/board.h
@@ -36,7 +36,7 @@
 #define LED_STATE_ON          0
 
 // Button
-#define BUTTON_PIN            11
+#define BUTTON_PIN            25 // button 4
 #define BUTTON_STATE_ACTIVE   0
 
 // UART
diff --git a/hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug b/hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug
new file mode 100644
index 000000000..5b918f429
--- /dev/null
+++ b/hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug
@@ -0,0 +1,242 @@
+
+/*********************************************************************
+*
+*       OnProjectLoad
+*
+* Function description
+*   Project load routine. Required.
+*
+**********************************************************************
+*/
+void OnProjectLoad (void) {
+  // Dialog-generated settings
+  Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-M4F.svd");
+  Project.AddSvdFile ("$(InstallDir)/Config/Peripherals/ARMv7M.svd");
+
+  Project.SetDevice ("nRF52840_xxAA");
+  Project.SetHostIF ("USB", "");
+  Project.SetTargetIF ("SWD");
+  Project.SetTIFSpeed ("8 MHz");
+  Project.SetTraceSource ("Trace Pins");
+  Project.SetTracePortWidth (4);
+
+  // User settings
+  File.Open ("../../../../../../examples/device/cdc_msc/cmake-build-pca10056/cdc_msc.elf");
+}
+
+/*********************************************************************
+*
+*      TargetReset
+*
+* Function description
+*   Replaces the default target device reset routine. Optional.
+*
+* Notes
+*   This example demonstrates the usage when
+*   debugging a RAM program on a Cortex-M target device
+*
+**********************************************************************
+*/
+//void TargetReset (void) {
+//
+//  unsigned int SP;
+//  unsigned int PC;
+//  unsigned int VectorTableAddr;
+//
+//  Exec.Reset();
+//
+//  VectorTableAddr = Elf.GetBaseAddr();
+//
+//  if (VectorTableAddr != 0xFFFFFFFF) {
+//
+//    Util.Log("Resetting Program.");
+//
+//    SP = Target.ReadU32(VectorTableAddr);
+//    Target.SetReg("SP", SP);
+//
+//    PC = Target.ReadU32(VectorTableAddr + 4);
+//    Target.SetReg("PC", PC);
+//  }
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetReset
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetReset (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetReset
+*
+* Function description
+*   Event handler routine.
+*    - Sets the PC register to program reset value.
+*    - Sets the SP register to program reset value on Cortex-M.
+*
+**********************************************************************
+*/
+void AfterTargetReset (void) {
+  unsigned int SP;
+  unsigned int PC;
+  unsigned int VectorTableAddr;
+
+  VectorTableAddr = Elf.GetBaseAddr();
+
+  if (VectorTableAddr == 0xFFFFFFFF) {
+    Util.Log("Project file error: failed to get program base");
+  } else {
+    SP = Target.ReadU32(VectorTableAddr);
+    Target.SetReg("SP", SP);
+
+    PC = Target.ReadU32(VectorTableAddr + 4);
+    Target.SetReg("PC", PC);
+  }
+}
+
+/*********************************************************************
+*
+*       DebugStart
+*
+* Function description
+*   Replaces the default debug session startup routine. Optional.
+*
+**********************************************************************
+*/
+//void DebugStart (void) {
+//}
+
+/*********************************************************************
+*
+*       TargetConnect
+*
+* Function description
+*   Replaces the default target IF connection routine. Optional.
+*
+**********************************************************************
+*/
+//void TargetConnect (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetConnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+void BeforeTargetConnect (void) {
+  //
+  // Trace pin init is done by J-Link script file as J-Link script files are IDE independent
+  //
+  Project.SetJLinkScript("./Nordic_nRF52840_TraceExample.pex");
+}
+
+/*********************************************************************
+*
+*       AfterTargetConnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetConnect (void) {
+//}
+
+/*********************************************************************
+*
+*       TargetDownload
+*
+* Function description
+*   Replaces the default program download routine. Optional.
+*
+**********************************************************************
+*/
+//void TargetDownload (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetDownload
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetDownload (void) {
+//}
+
+/*********************************************************************
+*
+*      AfterTargetDownload
+*
+* Function description
+*   Event handler routine.
+*    - Sets the PC register to program reset value.
+*    - Sets the SP register to program reset value on Cortex-M.
+*
+**********************************************************************
+*/
+void AfterTargetDownload (void) {
+  unsigned int SP;
+  unsigned int PC;
+  unsigned int VectorTableAddr;
+
+  VectorTableAddr = Elf.GetBaseAddr();
+
+  if (VectorTableAddr == 0xFFFFFFFF) {
+    Util.Log("Project file error: failed to get program base");
+  } else {
+    SP = Target.ReadU32(VectorTableAddr);
+    Target.SetReg("SP", SP);
+
+    PC = Target.ReadU32(VectorTableAddr + 4);
+    Target.SetReg("PC", PC);
+  }
+}
+
+/*********************************************************************
+*
+*       BeforeTargetDisconnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetDisconnect (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetDisconnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetDisconnect (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetHalt
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetHalt (void) {
+//}
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 6a559ada6..5a4730f09 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -93,8 +93,33 @@ TU_ATTR_UNUSED static void power_event_handler(nrfx_power_usb_evt_t event)
   tusb_hal_nrf_power_event((uint32_t) event);
 }
 
+#ifdef TRACE_ETM
+void trace_etm_init(void) {
+  #ifdef NRF52840_XXAA
+  // Trace clk: P0.7, Trace D0..D3: P1.0, P0.11, P0.12, P1.09
+  // Setting drive strength to H0H1
+  uint32_t const pin_cnf = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) |
+                           (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos);
+  NRF_P0->PIN_CNF[ 7] = pin_cnf; // CLK
+  NRF_P1->PIN_CNF[ 0] = pin_cnf; // D0
+  NRF_P0->PIN_CNF[11] = pin_cnf; // D1
+  NRF_P0->PIN_CNF[12] = pin_cnf; // D2
+  NRF_P1->PIN_CNF[ 9] = pin_cnf; // D3
+
+  // trace clock = 16 Mhz, Trace mux = parallel
+  NRF_CLOCK->TRACECONFIG = (CLOCK_TRACECONFIG_TRACEPORTSPEED_32MHz << CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos) |
+                           (CLOCK_TRACECONFIG_TRACEMUX_Parallel << CLOCK_TRACECONFIG_TRACEMUX_Pos);
+  #endif
+}
+#else
+
+#define trace_etm_init()
+#endif
+
 void board_init(void)
 {
+  trace_etm_init();
+
   // stop LF clock just in case we jump from application without reset
   NRF_CLOCK->TASKS_LFCLKSTOP = 1UL;
 
diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c
index 7e0469bd8..eb4ac841e 100644
--- a/hw/bsp/stm32h7/family.c
+++ b/hw/bsp/stm32h7/family.c
@@ -77,7 +77,7 @@ void trace_etm_init(void) {
   DBGMCU->CR |= DBGMCU_CR_DBG_TRACECKEN | DBGMCU_CR_DBG_CKD1EN | DBGMCU_CR_DBG_CKD3EN;
 }
 #else
-  #define etm_trace_init()
+  #define trace_etm_init()
 #endif
 
 void board_init(void)

From c789cfe518168c7e6e02cd6d4111de9a52b0a8e4 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 20 Jun 2023 16:13:10 +0700
Subject: [PATCH 429/691] use system_nrf5x.c built-in support for ETM with
 ENABLE_ETM

---
 .../nrf/boards/pca10056/ozone/nrf52840.jdebug |   4 -
 .../nrf/boards/pca10095/ozone/nrf5340.jdebug  | 335 ++++++++++++++++++
 hw/bsp/nrf/family.c                           |  25 --
 hw/bsp/nrf/family.cmake                       |   6 +
 4 files changed, 341 insertions(+), 29 deletions(-)
 create mode 100644 hw/bsp/nrf/boards/pca10095/ozone/nrf5340.jdebug

diff --git a/hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug b/hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug
index 5b918f429..fa7ab9e23 100644
--- a/hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug
+++ b/hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug
@@ -134,10 +134,6 @@ void AfterTargetReset (void) {
 **********************************************************************
 */
 void BeforeTargetConnect (void) {
-  //
-  // Trace pin init is done by J-Link script file as J-Link script files are IDE independent
-  //
-  Project.SetJLinkScript("./Nordic_nRF52840_TraceExample.pex");
 }
 
 /*********************************************************************
diff --git a/hw/bsp/nrf/boards/pca10095/ozone/nrf5340.jdebug b/hw/bsp/nrf/boards/pca10095/ozone/nrf5340.jdebug
new file mode 100644
index 000000000..4ad0376a4
--- /dev/null
+++ b/hw/bsp/nrf/boards/pca10095/ozone/nrf5340.jdebug
@@ -0,0 +1,335 @@
+/*********************************************************************
+*                 (c) SEGGER Microcontroller GmbH                    *
+*                      The Embedded Experts                          *
+*                         www.segger.com                             *
+**********************************************************************
+
+File          :
+Created       : 30 Jun 2021 13:37
+Ozone Version : V3.24a
+*/
+
+/*********************************************************************
+*
+*       OnProjectLoad
+*
+* Function description
+*   Project load routine. Required.
+*
+**********************************************************************
+*/
+void OnProjectLoad (void) {
+  // Dialog-generated settings
+  Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-M33F.svd");
+  Project.AddSvdFile ("./nrf5340_application.svd");
+  Project.SetDevice ("nRF5340_xxAA_APP");
+  Project.SetHostIF ("USB", "");
+  Project.SetTargetIF ("SWD");
+  Project.SetTIFSpeed ("16 MHz");
+
+  Project.SetTraceSource ("Trace Pins");
+  Project.SetTracePortWidth (4);
+
+  // User settings
+  File.Open ("../../../../../../examples/device/cdc_msc/cmake-build-pca10095/cdc_msc.elf");
+}
+
+/*********************************************************************
+*
+*       OnStartupComplete
+*
+* Function description
+*   Called when program execution has reached/passed
+*   the startup completion point. Optional.
+*
+**********************************************************************
+*/
+//void OnStartupComplete (void) {
+//}
+
+/*********************************************************************
+*
+*      TargetReset
+*
+* Function description
+*   Replaces the default target device reset routine. Optional.
+*
+* Notes
+*   This example demonstrates the usage when
+*   debugging an application in RAM on a Cortex-M target device.
+*
+**********************************************************************
+*/
+//void TargetReset (void) {
+//
+//  unsigned int SP;
+//  unsigned int PC;
+//  unsigned int VectorTableAddr;
+//
+//  VectorTableAddr = Elf.GetBaseAddr();
+//  //
+//  // Set up initial stack pointer
+//  //
+//  if (VectorTableAddr != 0xFFFFFFFF) {
+//    SP = Target.ReadU32(VectorTableAddr);
+//    Target.SetReg("SP", SP);
+//  }
+//  //
+//  // Set up entry point PC
+//  //
+//  PC = Elf.GetEntryPointPC();
+//
+//  if (PC != 0xFFFFFFFF) {
+//    Target.SetReg("PC", PC);
+//  } else if (VectorTableAddr != 0xFFFFFFFF) {
+//    PC = Target.ReadU32(VectorTableAddr + 4);
+//    Target.SetReg("PC", PC);
+//  } else {
+//    Util.Error("Project file error: failed to set entry point PC", 1);
+//  }
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetReset
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetReset (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetReset
+*
+* Function description
+*   Event handler routine. Optional.
+*   The default implementation initializes SP and PC to reset values.
+**
+**********************************************************************
+*/
+void AfterTargetReset (void) {
+  _SetupTarget();
+}
+
+/*********************************************************************
+*
+*       DebugStart
+*
+* Function description
+*   Replaces the default debug session startup routine. Optional.
+*
+**********************************************************************
+*/
+//void DebugStart (void) {
+//}
+
+/*********************************************************************
+*
+*       TargetConnect
+*
+* Function description
+*   Replaces the default target IF connection routine. Optional.
+*
+**********************************************************************
+*/
+//void TargetConnect (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetConnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+void BeforeTargetConnect (void) {
+}
+
+/*********************************************************************
+*
+*       AfterTargetConnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetConnect (void) {
+//}
+
+/*********************************************************************
+*
+*       TargetDownload
+*
+* Function description
+*   Replaces the default program download routine. Optional.
+*
+**********************************************************************
+*/
+//void TargetDownload (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetDownload
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetDownload (void) {
+//}
+
+/*********************************************************************
+*
+*      AfterTargetDownload
+*
+* Function description
+*   Event handler routine. Optional.
+*   The default implementation initializes SP and PC to reset values.
+*
+**********************************************************************
+*/
+void AfterTargetDownload (void) {
+  _SetupTarget();
+}
+
+/*********************************************************************
+*
+*       BeforeTargetDisconnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetDisconnect (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetDisconnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetDisconnect (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetHalt
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetHalt (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetResume
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetResume (void) {
+//}
+
+/*********************************************************************
+*
+*       OnSnapshotLoad
+*
+* Function description
+*   Called upon loading a snapshot. Optional.
+*
+* Additional information
+*   This function is used to restore the target state in cases
+*   where values cannot simply be written to the target.
+*   Typical use: GPIO clock needs to be enabled, before
+*   GPIO is configured.
+*
+**********************************************************************
+*/
+//void OnSnapshotLoad (void) {
+//}
+
+/*********************************************************************
+*
+*       OnSnapshotSave
+*
+* Function description
+*   Called upon saving a snapshot. Optional.
+*
+* Additional information
+*   This function is usually used to save values of the target
+*   state which can either not be trivially read,
+*   or need to be restored in a specific way or order.
+*   Typically use: Memory Mapped Registers,
+*   such as PLL and GPIO configuration.
+*
+**********************************************************************
+*/
+//void OnSnapshotSave (void) {
+//}
+
+/*********************************************************************
+*
+*       OnError
+*
+* Function description
+*   Called when an error occurred. Optional.
+*
+**********************************************************************
+*/
+//void OnError (void) {
+//}
+
+/*********************************************************************
+*
+*       _SetupTarget
+*
+* Function description
+*   Setup the target.
+*   Called by AfterTargetReset() and AfterTargetDownload().
+*
+*   Auto-generated function. May be overridden by Ozone.
+*
+**********************************************************************
+*/
+void _SetupTarget(void) {
+  unsigned int SP;
+  unsigned int PC;
+  unsigned int VectorTableAddr;
+
+  VectorTableAddr = Elf.GetBaseAddr();
+  //
+  // Set up initial stack pointer
+  //
+  SP = Target.ReadU32(VectorTableAddr);
+  if (SP != 0xFFFFFFFF) {
+    Target.SetReg("SP", SP);
+  }
+  //
+  // Set up entry point PC
+  //
+  PC = Elf.GetEntryPointPC();
+  if (PC != 0xFFFFFFFF) {
+    Target.SetReg("PC", PC);
+  } else {
+    Util.Error("Project script error: failed to set up entry point PC", 1);
+  }
+}
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 5a4730f09..6a559ada6 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -93,33 +93,8 @@ TU_ATTR_UNUSED static void power_event_handler(nrfx_power_usb_evt_t event)
   tusb_hal_nrf_power_event((uint32_t) event);
 }
 
-#ifdef TRACE_ETM
-void trace_etm_init(void) {
-  #ifdef NRF52840_XXAA
-  // Trace clk: P0.7, Trace D0..D3: P1.0, P0.11, P0.12, P1.09
-  // Setting drive strength to H0H1
-  uint32_t const pin_cnf = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) |
-                           (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos);
-  NRF_P0->PIN_CNF[ 7] = pin_cnf; // CLK
-  NRF_P1->PIN_CNF[ 0] = pin_cnf; // D0
-  NRF_P0->PIN_CNF[11] = pin_cnf; // D1
-  NRF_P0->PIN_CNF[12] = pin_cnf; // D2
-  NRF_P1->PIN_CNF[ 9] = pin_cnf; // D3
-
-  // trace clock = 16 Mhz, Trace mux = parallel
-  NRF_CLOCK->TRACECONFIG = (CLOCK_TRACECONFIG_TRACEPORTSPEED_32MHz << CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos) |
-                           (CLOCK_TRACECONFIG_TRACEMUX_Parallel << CLOCK_TRACECONFIG_TRACEMUX_Pos);
-  #endif
-}
-#else
-
-#define trace_etm_init()
-#endif
-
 void board_init(void)
 {
-  trace_etm_init();
-
   // stop LF clock just in case we jump from application without reset
   NRF_CLOCK->TASKS_LFCLKSTOP = 1UL;
 
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 88670b50b..825380d0b 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -46,6 +46,12 @@ function(add_board_target BOARD_TARGET)
     target_compile_definitions(${BOARD_TARGET} PUBLIC
       CONFIG_GPIO_AS_PINRESET
       )
+
+    if (TRACE_ETM STREQUAL "1")
+      # ENABLE_TRACE will cause system_nrf5x.c to set up ETM trace
+      target_compile_definitions(${BOARD_TARGET} PUBLIC ENABLE_TRACE)
+    endif ()
+
     target_include_directories(${BOARD_TARGET} PUBLIC
       ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
       ${NRFX_DIR}

From 77e01448e2047ede1f2b2c8a52609a0ee48a6b13 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 20 Jun 2023 16:41:51 +0700
Subject: [PATCH 430/691] ide settings

---
 .idea/cmake.xml                       |  9 +++++----
 .idea/runConfigurations/kl25.xml      |  2 +-
 .idea/runConfigurations/lpc1857.xml   |  2 +-
 .idea/runConfigurations/mcx947.xml    |  2 +-
 .idea/runConfigurations/nrf52840.xml  | 10 ++++++++++
 .idea/runConfigurations/nrf5340.xml   | 10 ++++++++++
 .idea/runConfigurations/rt1010.xml    |  2 +-
 .idea/runConfigurations/rt1060.xml    |  2 +-
 .idea/runConfigurations/stlink.xml    |  2 +-
 .idea/runConfigurations/stm32g474.xml |  2 +-
 .idea/runConfigurations/stm32h743.xml |  4 ++--
 11 files changed, 34 insertions(+), 13 deletions(-)
 create mode 100644 .idea/runConfigurations/nrf52840.xml
 create mode 100644 .idea/runConfigurations/nrf5340.xml

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index c9024715c..0f7649efc 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -2,9 +2,9 @@
 <project version="4">
   <component name="CMakeSharedSettings">
     <configurations>
-      <configuration PROFILE_NAME="mcxn947" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=mcx -DBOARD=mcxn947brk -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10056" />
-      <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10095" />
+      <configuration PROFILE_NAME="mcxn947" ENABLED="false" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DFAMILY=mcx -DBOARD=mcxn947brk -DLOG=0 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10056 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10095 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="esp32s2" ENABLED="false" GENERATION_OPTIONS="-DFAMILY=espressif -DBOARD=espressif_saola_1 -DIDF_TARGET=esp32s2">
         <ADDITIONAL_GENERATION_ENVIRONMENT>
           <envs>
@@ -29,7 +29,7 @@
       <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1010_evk" />
       <configuration PROFILE_NAME="rt1060 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1060_evk" />
       <configuration PROFILE_NAME="rt1064 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1064_evk" />
-      <configuration PROFILE_NAME="mcb1800" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc18 -DBOARD=mcb1800" />
+      <configuration PROFILE_NAME="mcb1800" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc18 -DBOARD=mcb1800 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="lpcxpresso18s37" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc18 -DBOARD=lpcxpresso18s37" />
       <configuration PROFILE_NAME="lpc55s69" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc55 -DBOARD=lpcxpresso55s69" />
       <configuration PROFILE_NAME="stm32g0b1nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g0 -DBOARD=stm32g0b1nucleo" />
@@ -38,6 +38,7 @@
       <configuration PROFILE_NAME="b_g474e_dpow1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g4 -DBOARD=b_g474e_dpow1 -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="b_g474e_dpow1 iar" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g4 -DBOARD=b_g474e_dpow1 -DTOOLCHAIN=iar" />
       <configuration PROFILE_NAME="frdm_kl25z" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=kinetis_kl -DBOARD=frdm_kl25z -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="stm32h743eval" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32h7 -DBOARD=stm32h743eval -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/.idea/runConfigurations/kl25.xml b/.idea/runConfigurations/kl25.xml
index 8b0cd9e75..add9a0d6b 100644
--- a/.idea/runConfigurations/kl25.xml
+++ b/.idea/runConfigurations/kl25.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="kl25" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MKL25Z128xxx4&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcb1800" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="kl25" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MKL25Z128xxx4&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="pca10056" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/lpc1857.xml b/.idea/runConfigurations/lpc1857.xml
index ed7d17ca6..f377d86f2 100644
--- a/.idea/runConfigurations/lpc1857.xml
+++ b/.idea/runConfigurations/lpc1857.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="lpc1857" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;lpc1857&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcb1800" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="lpc1857" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;lpc1857&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="pca10056" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/mcx947.xml b/.idea/runConfigurations/mcx947.xml
index ddd568bcb..038c87421 100644
--- a/.idea/runConfigurations/mcx947.xml
+++ b/.idea/runConfigurations/mcx947.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="mcx947" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MCXN947_M33_0&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/mcx/mcx.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcb1800" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="mcx947" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MCXN947_M33_0&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/mcx/mcx.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="pca10056" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/nrf52840.xml b/.idea/runConfigurations/nrf52840.xml
new file mode 100644
index 000000000..66473cc0e
--- /dev/null
+++ b/.idea/runConfigurations/nrf52840.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="nrf52840" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;nrf52840_xxaa&quot; -if swd -speed 8000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="pca10056" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/nrf5340.xml b/.idea/runConfigurations/nrf5340.xml
new file mode 100644
index 000000000..403095d70
--- /dev/null
+++ b/.idea/runConfigurations/nrf5340.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="nrf5340" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;nrf5340_xxaa_app&quot; -if swd -speed 16000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/rt1010.xml b/.idea/runConfigurations/rt1010.xml
index 98dea28a4..6fabd8561 100644
--- a/.idea/runConfigurations/rt1010.xml
+++ b/.idea/runConfigurations/rt1010.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rt1010" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1011xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcb1800" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="rt1010" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1011xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="pca10056" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/rt1060.xml b/.idea/runConfigurations/rt1060.xml
index ff6ee8d84..218c2dfbc 100644
--- a/.idea/runConfigurations/rt1060.xml
+++ b/.idea/runConfigurations/rt1060.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rt1060" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1062xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcb1800" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="rt1060" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1062xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="pca10056" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/stlink.xml b/.idea/runConfigurations/stlink.xml
index b3f6d15f0..c27392ca5 100644
--- a/.idea/runConfigurations/stlink.xml
+++ b/.idea/runConfigurations/stlink.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="stlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-p 62847 -cp &quot;/opt/st/stm32cubeide_1.12.1/plugins/com.st.stm32cube.ide.mcu.externaltools.cubeprogrammer.linux64_2.0.600.202301161003/tools/bin&quot; --frequency 24000 --swd" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcb1800" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="stlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-p 62847 -cp &quot;/opt/st/stm32cubeide_1.12.1/plugins/com.st.stm32cube.ide.mcu.externaltools.cubeprogrammer.linux64_2.0.600.202301161003/tools/bin&quot; --frequency 24000 --swd" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::62847" executable="/opt/st/stm32cubeide_1.12.1/plugins/com.st.stm32cube.ide.mcu.externaltools.stlink-gdb-server.linux64_2.0.500.202301161003/tools/bin/ST-LINK_gdbserver" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/stm32g474.xml b/.idea/runConfigurations/stm32g474.xml
index d461cd60e..bbab2a5c5 100644
--- a/.idea/runConfigurations/stm32g474.xml
+++ b/.idea/runConfigurations/stm32g474.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="stm32g474" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;stm32g474re&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcb1800" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="stm32g474" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;stm32g474re&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="pca10056" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/stm32h743.xml b/.idea/runConfigurations/stm32h743.xml
index c438422ce..7581ddf9b 100644
--- a/.idea/runConfigurations/stm32h743.xml
+++ b/.idea/runConfigurations/stm32h743.xml
@@ -1,6 +1,6 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="stm32h743" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;stm32h743xi&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="mcb1800" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
-    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+  <configuration default="false" name="stm32h743" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;stm32h743xi&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
     <method v="2">

From 3a5f43528e6f678cd44b0e4691152a4f6bbb1e38 Mon Sep 17 00:00:00 2001
From: Andrew Hooper <ahooper@kos.net>
Date: Fri, 23 Jun 2023 11:51:58 -0400
Subject: [PATCH 431/691] Board support for STM32F407VETx

---
 .../stm32f407blackvet/STM32F407VETX_FLASH.ld  | 177 +++++++
 .../boards/stm32f407blackvet/board.cmake      |  18 +
 .../stm32f4/boards/stm32f407blackvet/board.h  | 107 ++++
 .../stm32f4/boards/stm32f407blackvet/board.mk |  16 +
 .../stm32f407blackvet/stm32f4xx_hal_conf.h    | 493 ++++++++++++++++++
 hw/bsp/stm32f4/family.cmake                   | 134 +++++
 hw/bsp/stm32f4/stm32f4xx_hal_conf.h           | 493 ++++++++++++++++++
 7 files changed, 1438 insertions(+)
 create mode 100644 hw/bsp/stm32f4/boards/stm32f407blackvet/STM32F407VETX_FLASH.ld
 create mode 100644 hw/bsp/stm32f4/boards/stm32f407blackvet/board.cmake
 create mode 100644 hw/bsp/stm32f4/boards/stm32f407blackvet/board.h
 create mode 100644 hw/bsp/stm32f4/boards/stm32f407blackvet/board.mk
 create mode 100644 hw/bsp/stm32f4/boards/stm32f407blackvet/stm32f4xx_hal_conf.h
 create mode 100644 hw/bsp/stm32f4/family.cmake
 create mode 100644 hw/bsp/stm32f4/stm32f4xx_hal_conf.h

diff --git a/hw/bsp/stm32f4/boards/stm32f407blackvet/STM32F407VETX_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f407blackvet/STM32F407VETX_FLASH.ld
new file mode 100644
index 000000000..6dec5543a
--- /dev/null
+++ b/hw/bsp/stm32f4/boards/stm32f407blackvet/STM32F407VETX_FLASH.ld
@@ -0,0 +1,177 @@
+/**
+ ******************************************************************************
+ * @file      LinkerScript.ld
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     Linker script for STM32F407VETx Device from STM32F4 series
+ *                      512Kbytes FLASH
+ *                      64Kbytes CCMRAM
+ *                      128Kbytes RAM
+ *
+ *            Set heap size, stack size and stack location according
+ *            to application requirements.
+ *
+ *            Set memory bank area and size if external memory is used
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200 ;	/* required amount of heap  */
+_Min_Stack_Size = 0x400 ;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  CCMRAM    (xrw)    : ORIGIN = 0x10000000,   LENGTH = 64K
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 512K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab   : {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM : {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array     :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  .init_array :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  .fini_array :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/hw/bsp/stm32f4/boards/stm32f407blackvet/board.cmake b/hw/bsp/stm32f4/boards/stm32f407blackvet/board.cmake
new file mode 100644
index 000000000..52cf95700
--- /dev/null
+++ b/hw/bsp/stm32f4/boards/stm32f407blackvet/board.cmake
@@ -0,0 +1,18 @@
+set(MCU_VARIANT stm32f407xx)
+set(JLINK_DEVICE stm32f407ve)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F407VETx_FLASH.ld)
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F407xx
+    HSE_VALUE=8000000
+    CORE_CM4
+          BOARD_TUD_RHPORT=0
+          BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
+    )
+endfunction()
diff --git a/hw/bsp/stm32f4/boards/stm32f407blackvet/board.h b/hw/bsp/stm32f4/boards/stm32f407blackvet/board.h
new file mode 100644
index 000000000..b7a6d96c2
--- /dev/null
+++ b/hw/bsp/stm32f4/boards/stm32f407blackvet/board.h
@@ -0,0 +1,107 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_PORT              GPIOA
+#define LED_PIN               GPIO_PIN_6
+#define LED_STATE_ON          1
+
+// Button
+#define BUTTON_PORT           GPIOE
+#define BUTTON_PIN            GPIO_PIN_4
+#define BUTTON_STATE_ACTIVE   0
+
+// Enable PA2 as the debug log UART
+// It is not routed to the ST/Link on the Discovery board.
+#define UART_DEV              USART2
+#define UART_GPIO_PORT        GPIOA
+#define UART_GPIO_AF          GPIO_AF7_USART2
+#define UART_TX_PIN           GPIO_PIN_2
+#define UART_RX_PIN           GPIO_PIN_3
+
+//--------------------------------------------------------------------+
+// RCC Clock
+//--------------------------------------------------------------------+
+static inline void board_clock_init(void)
+{
+  RCC_ClkInitTypeDef RCC_ClkInitStruct;
+  RCC_OscInitTypeDef RCC_OscInitStruct;
+
+  /* Enable Power Control clock */
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* The voltage scaling allows optimizing the power consumption when the device is
+     clocked below the maximum system frequency, to update the voltage scaling value
+     regarding system frequency refer to product datasheet.  */
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /* Enable HSE Oscillator and activate PLL with HSE as source */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/2000000;
+  RCC_OscInitStruct.PLL.PLLN = 168;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 7;
+  HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
+     clocks dividers */
+  RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
+
+  // Enable clocks for LED, Button, Uart
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+  __HAL_RCC_GPIOH_CLK_ENABLE();
+  __HAL_RCC_USART2_CLK_ENABLE();
+}
+
+static inline void board_vbus_sense_init(void)
+{
+    // Black F407VET6 doesn't use VBUS sense (B device) explicitly disable it
+    USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS;
+    USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN;
+    USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN;
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/stm32f4/boards/stm32f407blackvet/board.mk b/hw/bsp/stm32f4/boards/stm32f407blackvet/board.mk
new file mode 100644
index 000000000..a184804d3
--- /dev/null
+++ b/hw/bsp/stm32f4/boards/stm32f407blackvet/board.mk
@@ -0,0 +1,16 @@
+CFLAGS += -DSTM32F407xx
+
+# GCC
+GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f407xx.s
+GCC_LD_FILE = $(BOARD_PATH)/STM32F407VGTx_FLASH.ld
+
+# IAR
+IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f407xx.s
+IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f407xx_flash.icf
+
+
+# For flash-jlink target
+JLINK_DEVICE = stm32f407vg
+
+# flash target using on-board stlink
+flash: flash-stlink
diff --git a/hw/bsp/stm32f4/boards/stm32f407blackvet/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f407blackvet/stm32f4xx_hal_conf.h
new file mode 100644
index 000000000..e24e782ea
--- /dev/null
+++ b/hw/bsp/stm32f4/boards/stm32f407blackvet/stm32f4xx_hal_conf.h
@@ -0,0 +1,493 @@
+/**
+  ******************************************************************************
+  * @file    stm32f4xx_hal_conf_template.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F4xx_HAL_CONF_H
+#define __STM32F4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+#define HAL_MODULE_ENABLED
+/* #define HAL_ADC_MODULE_ENABLED      */
+/* #define HAL_CAN_MODULE_ENABLED      */
+/* #define HAL_CAN_LEGACY_MODULE_ENABLED      */
+/* #define HAL_CRC_MODULE_ENABLED      */
+/* #define HAL_CEC_MODULE_ENABLED      */
+/* #define HAL_CRYP_MODULE_ENABLED     */
+/* #define HAL_DAC_MODULE_ENABLED      */
+/* #define HAL_DCMI_MODULE_ENABLED     */
+#define HAL_DMA_MODULE_ENABLED
+/* #define HAL_DMA2D_MODULE_ENABLED    */
+/* #define HAL_ETH_MODULE_ENABLED      */
+#define HAL_FLASH_MODULE_ENABLED
+/* #define HAL_NAND_MODULE_ENABLED     */
+/* #define HAL_NOR_MODULE_ENABLED      */
+/* #define HAL_PCCARD_MODULE_ENABLED   */
+/* #define HAL_SRAM_MODULE_ENABLED     */
+/* #define HAL_SDRAM_MODULE_ENABLED    */
+/* #define HAL_HASH_MODULE_ENABLED     */
+#define HAL_GPIO_MODULE_ENABLED
+/* #define HAL_EXTI_MODULE_ENABLED     */
+/* #define HAL_I2C_MODULE_ENABLED      */
+/* #define HAL_SMBUS_MODULE_ENABLED    */
+/* #define HAL_I2S_MODULE_ENABLED      */
+/* #define HAL_IWDG_MODULE_ENABLED     */
+/* #define HAL_LTDC_MODULE_ENABLED     */
+/* #define HAL_DSI_MODULE_ENABLED      */
+#define HAL_PWR_MODULE_ENABLED
+/* #define HAL_QSPI_MODULE_ENABLED     */
+#define HAL_RCC_MODULE_ENABLED
+/* #define HAL_RNG_MODULE_ENABLED      */
+/* #define HAL_RTC_MODULE_ENABLED      */
+/* #define HAL_SAI_MODULE_ENABLED      */
+/* #define HAL_SD_MODULE_ENABLED       */
+// #define HAL_SPI_MODULE_ENABLED
+/* #define HAL_TIM_MODULE_ENABLED      */
+#define HAL_UART_MODULE_ENABLED
+/* #define HAL_USART_MODULE_ENABLED    */
+/* #define HAL_IRDA_MODULE_ENABLED     */
+/* #define HAL_SMARTCARD_MODULE_ENABLED */
+/* #define HAL_WWDG_MODULE_ENABLED     */
+#define HAL_CORTEX_MODULE_ENABLED
+/* #define HAL_PCD_MODULE_ENABLED      */
+/* #define HAL_HCD_MODULE_ENABLED      */
+/* #define HAL_FMPI2C_MODULE_ENABLED   */
+/* #define HAL_SPDIFRX_MODULE_ENABLED  */
+/* #define HAL_DFSDM_MODULE_ENABLED    */
+/* #define HAL_LPTIM_MODULE_ENABLED    */
+/* #define HAL_MMC_MODULE_ENABLED      */
+
+/* ########################## HSE/HSI Values adaptation ##################### */
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (8000000U) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100U)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+ #define LSI_VALUE  (32000U)
+#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
+                                             The real value may vary depending on the variations
+                                             in voltage and temperature.  */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  */
+#if !defined  (LSE_VALUE)
+ #define LSE_VALUE  (32768U)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+  #define LSE_STARTUP_TIMEOUT    (5000U)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S peripheral
+  *        This value is used by the I2S HAL module to compute the I2S clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+  #define EXTERNAL_CLOCK_VALUE    (12288000U) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+#define  VDD_VALUE                    (3300U) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              1U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
+#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
+#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
+#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
+#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
+#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
+#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
+#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
+#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
+#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
+#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
+#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
+#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
+#define  USE_HAL_FMPI2C_REGISTER_CALLBACKS      0U /* FMPI2C register callback disabled    */
+#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
+#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
+#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
+#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
+#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
+#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
+#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
+#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
+#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
+#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
+#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
+#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
+#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
+#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
+#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
+#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
+#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
+#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
+#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
+#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
+#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
+#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
+#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
+#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## Ethernet peripheral configuration ##################### */
+
+/* Section 1 : Ethernet peripheral configuration */
+
+/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
+#define MAC_ADDR0   2U
+#define MAC_ADDR1   0U
+#define MAC_ADDR2   0U
+#define MAC_ADDR3   0U
+#define MAC_ADDR4   0U
+#define MAC_ADDR5   0U
+
+/* Definition of the Ethernet driver buffers size and count */
+#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
+#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
+#define ETH_RXBUFNB                    4U                  /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
+#define ETH_TXBUFNB                    4U                  /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
+
+/* Section 2: PHY configuration section */
+
+/* DP83848 PHY Address*/
+#define DP83848_PHY_ADDRESS             0x01U
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
+#define PHY_RESET_DELAY                 0x000000FFU
+/* PHY Configuration delay */
+#define PHY_CONFIG_DELAY                0x00000FFFU
+
+#define PHY_READ_TO                     0x0000FFFFU
+#define PHY_WRITE_TO                    0x0000FFFFU
+
+/* Section 3: Common PHY Registers */
+
+#define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
+#define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
+
+#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
+#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
+#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
+#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
+#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
+#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
+#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
+#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
+#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
+#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
+
+#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
+#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
+#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
+
+/* Section 4: Extended PHY Registers */
+
+#define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
+#define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
+#define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
+
+#define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
+#define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
+#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
+
+#define PHY_MICR_INT_EN                 ((uint16_t)0x0002)  /*!< PHY Enable interrupts                           */
+#define PHY_MICR_INT_OE                 ((uint16_t)0x0001)  /*!< PHY Enable output interrupt events              */
+
+#define PHY_MISR_LINK_INT_EN            ((uint16_t)0x0020)  /*!< Enable Interrupt on change of link status       */
+#define PHY_LINK_INTERRUPT              ((uint16_t)0x2000)  /*!< PHY link status interrupt mask                  */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+
+#define USE_SPI_CRC                     1U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32f4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32f4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+  #include "stm32f4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32f4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32f4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32f4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CAN_MODULE_ENABLED
+  #include "stm32f4xx_hal_can.h"
+#endif /* HAL_CAN_MODULE_ENABLED */
+
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
+  #include "stm32f4xx_hal_can_legacy.h"
+#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32f4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32f4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+  #include "stm32f4xx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+  #include "stm32f4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+  #include "stm32f4xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+  #include "stm32f4xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32f4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32f4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+  #include "stm32f4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+  #include "stm32f4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_PCCARD_MODULE_ENABLED
+  #include "stm32f4xx_hal_pccard.h"
+#endif /* HAL_PCCARD_MODULE_ENABLED */
+
+#ifdef HAL_SDRAM_MODULE_ENABLED
+  #include "stm32f4xx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+ #include "stm32f4xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32f4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+ #include "stm32f4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32f4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32f4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+ #include "stm32f4xx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32f4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32f4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32f4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32f4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+ #include "stm32f4xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32f4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32f4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32f4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32f4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32f4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32f4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32f4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32f4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+ #include "stm32f4xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_DSI_MODULE_ENABLED
+ #include "stm32f4xx_hal_dsi.h"
+#endif /* HAL_DSI_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+ #include "stm32f4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+ #include "stm32f4xx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_FMPI2C_MODULE_ENABLED
+ #include "stm32f4xx_hal_fmpi2c.h"
+#endif /* HAL_FMPI2C_MODULE_ENABLED */
+
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
+ #include "stm32f4xx_hal_spdifrx.h"
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
+
+#ifdef HAL_DFSDM_MODULE_ENABLED
+ #include "stm32f4xx_hal_dfsdm.h"
+#endif /* HAL_DFSDM_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+ #include "stm32f4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+ #include "stm32f4xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t* file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F4xx_HAL_CONF_H */
+
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32f4/family.cmake b/hw/bsp/stm32f4/family.cmake
new file mode 100644
index 000000000..7d9bbf331
--- /dev/null
+++ b/hw/bsp/stm32f4/family.cmake
@@ -0,0 +1,134 @@
+include_guard()
+
+if (NOT BOARD)
+  message(FATAL_ERROR "BOARD not specified")
+endif ()
+
+set(ST_FAMILY f4)
+set(ST_PREFIX stm32${ST_FAMILY}xx)
+
+set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver)
+set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY})
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS STM32F4 CACHE INTERNAL "")
+
+# enable LTO if supported
+include(CheckIPOSupported)
+check_ipo_supported(RESULT IPO_SUPPORTED)
+if (IPO_SUPPORTED)
+  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+endif ()
+
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    add_library(${BOARD_TARGET} STATIC
+      ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
+      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+      )
+    target_include_directories(${BOARD_TARGET} PUBLIC
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+      ${CMSIS_5}/CMSIS/Core/Include
+      ${ST_CMSIS}/Include
+      ${ST_HAL_DRIVER}/Inc
+      )
+    target_compile_options(${BOARD_TARGET} PUBLIC
+      )
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      )
+
+    update_board(${BOARD_TARGET})
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--script=${LD_FILE_GNU}"
+        -nostartfiles
+        # nanolib
+        --specs=nosys.specs
+        --specs=nano.specs
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET)
+  family_configure_common(${TARGET})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32F4)
+  if (MCU_VARIANT STREQUAL "stm32f407xx")
+    target_sources(${TARGET}-tinyusb PUBLIC
+            ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+            )
+  else()
+    target_sources(${TARGET}-tinyusb PUBLIC
+            ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+            )
+  endif()
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_flash_stlink(${TARGET})
+  family_flash_jlink(${TARGET})
+endfunction()
+
+
+function(family_configure_device_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
+
+function(family_configure_host_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
+
+function(family_configure_dual_usb_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
diff --git a/hw/bsp/stm32f4/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/stm32f4xx_hal_conf.h
new file mode 100644
index 000000000..e24e782ea
--- /dev/null
+++ b/hw/bsp/stm32f4/stm32f4xx_hal_conf.h
@@ -0,0 +1,493 @@
+/**
+  ******************************************************************************
+  * @file    stm32f4xx_hal_conf_template.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F4xx_HAL_CONF_H
+#define __STM32F4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+#define HAL_MODULE_ENABLED
+/* #define HAL_ADC_MODULE_ENABLED      */
+/* #define HAL_CAN_MODULE_ENABLED      */
+/* #define HAL_CAN_LEGACY_MODULE_ENABLED      */
+/* #define HAL_CRC_MODULE_ENABLED      */
+/* #define HAL_CEC_MODULE_ENABLED      */
+/* #define HAL_CRYP_MODULE_ENABLED     */
+/* #define HAL_DAC_MODULE_ENABLED      */
+/* #define HAL_DCMI_MODULE_ENABLED     */
+#define HAL_DMA_MODULE_ENABLED
+/* #define HAL_DMA2D_MODULE_ENABLED    */
+/* #define HAL_ETH_MODULE_ENABLED      */
+#define HAL_FLASH_MODULE_ENABLED
+/* #define HAL_NAND_MODULE_ENABLED     */
+/* #define HAL_NOR_MODULE_ENABLED      */
+/* #define HAL_PCCARD_MODULE_ENABLED   */
+/* #define HAL_SRAM_MODULE_ENABLED     */
+/* #define HAL_SDRAM_MODULE_ENABLED    */
+/* #define HAL_HASH_MODULE_ENABLED     */
+#define HAL_GPIO_MODULE_ENABLED
+/* #define HAL_EXTI_MODULE_ENABLED     */
+/* #define HAL_I2C_MODULE_ENABLED      */
+/* #define HAL_SMBUS_MODULE_ENABLED    */
+/* #define HAL_I2S_MODULE_ENABLED      */
+/* #define HAL_IWDG_MODULE_ENABLED     */
+/* #define HAL_LTDC_MODULE_ENABLED     */
+/* #define HAL_DSI_MODULE_ENABLED      */
+#define HAL_PWR_MODULE_ENABLED
+/* #define HAL_QSPI_MODULE_ENABLED     */
+#define HAL_RCC_MODULE_ENABLED
+/* #define HAL_RNG_MODULE_ENABLED      */
+/* #define HAL_RTC_MODULE_ENABLED      */
+/* #define HAL_SAI_MODULE_ENABLED      */
+/* #define HAL_SD_MODULE_ENABLED       */
+// #define HAL_SPI_MODULE_ENABLED
+/* #define HAL_TIM_MODULE_ENABLED      */
+#define HAL_UART_MODULE_ENABLED
+/* #define HAL_USART_MODULE_ENABLED    */
+/* #define HAL_IRDA_MODULE_ENABLED     */
+/* #define HAL_SMARTCARD_MODULE_ENABLED */
+/* #define HAL_WWDG_MODULE_ENABLED     */
+#define HAL_CORTEX_MODULE_ENABLED
+/* #define HAL_PCD_MODULE_ENABLED      */
+/* #define HAL_HCD_MODULE_ENABLED      */
+/* #define HAL_FMPI2C_MODULE_ENABLED   */
+/* #define HAL_SPDIFRX_MODULE_ENABLED  */
+/* #define HAL_DFSDM_MODULE_ENABLED    */
+/* #define HAL_LPTIM_MODULE_ENABLED    */
+/* #define HAL_MMC_MODULE_ENABLED      */
+
+/* ########################## HSE/HSI Values adaptation ##################### */
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    (8000000U) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100U)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+ #define LSI_VALUE  (32000U)
+#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
+                                             The real value may vary depending on the variations
+                                             in voltage and temperature.  */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  */
+#if !defined  (LSE_VALUE)
+ #define LSE_VALUE  (32768U)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+  #define LSE_STARTUP_TIMEOUT    (5000U)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S peripheral
+  *        This value is used by the I2S HAL module to compute the I2S clock source
+  *        frequency, this source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+  #define EXTERNAL_CLOCK_VALUE    (12288000U) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+#define  VDD_VALUE                    (3300U) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              1U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
+#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
+#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
+#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
+#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
+#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
+#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
+#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
+#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
+#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
+#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
+#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
+#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
+#define  USE_HAL_FMPI2C_REGISTER_CALLBACKS      0U /* FMPI2C register callback disabled    */
+#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
+#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
+#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
+#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
+#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
+#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
+#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
+#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
+#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
+#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
+#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
+#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
+#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
+#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
+#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
+#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
+#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
+#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
+#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
+#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
+#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
+#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
+#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
+#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## Ethernet peripheral configuration ##################### */
+
+/* Section 1 : Ethernet peripheral configuration */
+
+/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
+#define MAC_ADDR0   2U
+#define MAC_ADDR1   0U
+#define MAC_ADDR2   0U
+#define MAC_ADDR3   0U
+#define MAC_ADDR4   0U
+#define MAC_ADDR5   0U
+
+/* Definition of the Ethernet driver buffers size and count */
+#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
+#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
+#define ETH_RXBUFNB                    4U                  /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
+#define ETH_TXBUFNB                    4U                  /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
+
+/* Section 2: PHY configuration section */
+
+/* DP83848 PHY Address*/
+#define DP83848_PHY_ADDRESS             0x01U
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
+#define PHY_RESET_DELAY                 0x000000FFU
+/* PHY Configuration delay */
+#define PHY_CONFIG_DELAY                0x00000FFFU
+
+#define PHY_READ_TO                     0x0000FFFFU
+#define PHY_WRITE_TO                    0x0000FFFFU
+
+/* Section 3: Common PHY Registers */
+
+#define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
+#define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
+
+#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
+#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
+#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
+#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
+#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
+#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
+#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
+#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
+#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
+#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
+
+#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
+#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
+#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
+
+/* Section 4: Extended PHY Registers */
+
+#define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
+#define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
+#define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
+
+#define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
+#define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
+#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
+
+#define PHY_MICR_INT_EN                 ((uint16_t)0x0002)  /*!< PHY Enable interrupts                           */
+#define PHY_MICR_INT_OE                 ((uint16_t)0x0001)  /*!< PHY Enable output interrupt events              */
+
+#define PHY_MISR_LINK_INT_EN            ((uint16_t)0x0020)  /*!< Enable Interrupt on change of link status       */
+#define PHY_LINK_INTERRUPT              ((uint16_t)0x2000)  /*!< PHY link status interrupt mask                  */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+
+#define USE_SPI_CRC                     1U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32f4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32f4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+  #include "stm32f4xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32f4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32f4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32f4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CAN_MODULE_ENABLED
+  #include "stm32f4xx_hal_can.h"
+#endif /* HAL_CAN_MODULE_ENABLED */
+
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
+  #include "stm32f4xx_hal_can_legacy.h"
+#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32f4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32f4xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+  #include "stm32f4xx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+  #include "stm32f4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+  #include "stm32f4xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+  #include "stm32f4xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32f4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32f4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+  #include "stm32f4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+  #include "stm32f4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_PCCARD_MODULE_ENABLED
+  #include "stm32f4xx_hal_pccard.h"
+#endif /* HAL_PCCARD_MODULE_ENABLED */
+
+#ifdef HAL_SDRAM_MODULE_ENABLED
+  #include "stm32f4xx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+ #include "stm32f4xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32f4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+ #include "stm32f4xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32f4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32f4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+ #include "stm32f4xx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32f4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32f4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32f4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32f4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+ #include "stm32f4xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32f4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32f4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32f4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32f4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32f4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32f4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32f4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32f4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+ #include "stm32f4xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_DSI_MODULE_ENABLED
+ #include "stm32f4xx_hal_dsi.h"
+#endif /* HAL_DSI_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+ #include "stm32f4xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+ #include "stm32f4xx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_FMPI2C_MODULE_ENABLED
+ #include "stm32f4xx_hal_fmpi2c.h"
+#endif /* HAL_FMPI2C_MODULE_ENABLED */
+
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
+ #include "stm32f4xx_hal_spdifrx.h"
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
+
+#ifdef HAL_DFSDM_MODULE_ENABLED
+ #include "stm32f4xx_hal_dfsdm.h"
+#endif /* HAL_DFSDM_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+ #include "stm32f4xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+ #include "stm32f4xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t* file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F4xx_HAL_CONF_H */
+
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

From edbf06aaab9ac7cf098f1170a7a9861f5cf3572e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 24 Jun 2023 17:35:37 +0700
Subject: [PATCH 432/691] separate iar and gcc build for clean make, also add
 cpu specific make

---
 examples/device/cdc_msc/Makefile      |   6 +-
 examples/make.mk                      |  89 ++++------------
 examples/rules.mk                     | 144 ++------------------------
 hw/bsp/stm32h7/family.mk              |  13 +--
 src/tinyusb.mk                        |  19 ++++
 tools/make/cpu/cortex-m7.mk           |  13 ++-
 tools/make/toolchain/arm_gcc.mk       |  77 ++++++++++++++
 tools/make/toolchain/arm_gcc_rules.mk |  78 ++++++++++++++
 tools/make/toolchain/arm_iar.mk       |  13 +++
 tools/make/toolchain/arm_iar_rules.mk |  44 ++++++++
 10 files changed, 275 insertions(+), 221 deletions(-)
 create mode 100644 src/tinyusb.mk
 create mode 100644 tools/make/toolchain/arm_gcc.mk
 create mode 100644 tools/make/toolchain/arm_gcc_rules.mk
 create mode 100644 tools/make/toolchain/arm_iar.mk
 create mode 100644 tools/make/toolchain/arm_iar_rules.mk

diff --git a/examples/device/cdc_msc/Makefile b/examples/device/cdc_msc/Makefile
index da088ea6b..429959e70 100644
--- a/examples/device/cdc_msc/Makefile
+++ b/examples/device/cdc_msc/Makefile
@@ -5,7 +5,11 @@ INC += \
 	$(TOP)/hw \
 
 # Example source
-EXAMPLE_SOURCE += $(wildcard src/*.c)
+EXAMPLE_SOURCE += \
+  src/main.c \
+  src/msc_disk.c \
+  src/usb_descriptors.c \
+
 SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
 
 include ../../rules.mk
diff --git a/examples/make.mk b/examples/make.mk
index 28ebc62da..4fcde83c8 100644
--- a/examples/make.mk
+++ b/examples/make.mk
@@ -2,6 +2,7 @@
 # Common make definition for all examples
 # ---------------------------------------
 
+# Supported toolchain: gcc, iar
 TOOLCHAIN ?= gcc
 
 #-------------- TOP and CURRENT_PATH ------------
@@ -32,13 +33,6 @@ CMDEXE := 1
 SHELL := cmd.exe
 endif
 
-
-# Build directory
-BUILD := _build/$(BOARD)
-
-PROJECT := $(notdir $(CURDIR))
-BIN := $(TOP)/_bin/$(BOARD)/$(notdir $(CURDIR))
-
 # Handy check parameter function
 check_defined = \
     $(strip $(foreach 1,$1, \
@@ -47,6 +41,13 @@ __check_defined = \
     $(if $(value $1),, \
     $(error Undefined make flag: $1$(if $2, ($2))))
 
+
+# Build directory
+BUILD := _build/$(BOARD)
+
+PROJECT := $(notdir $(CURDIR))
+BIN := $(TOP)/_bin/$(BOARD)/$(notdir $(CURDIR))
+
 #-------------- Select the board to build for. ------------
 
 # Board without family
@@ -81,25 +82,12 @@ endif
 # Can be set by board, default to ARM GCC
 CROSS_COMPILE ?= arm-none-eabi-
 
-ifeq ($(CC),iccarm)
-USE_IAR = 1
+ifeq ($(TOOLCHAIN),iar)
+CC := iccarm
 endif
 
-ifdef USE_IAR
-  AS = iasmarm
-  LD = ilinkarm
-  OBJCOPY = ielftool
-  SIZE = size
-
-else
-  CC = $(CROSS_COMPILE)gcc
-  CXX = $(CROSS_COMPILE)g++
-  AS = $(CC) -x assembler-with-cpp
-  LD = $(CC)
-
-  GDB = $(CROSS_COMPILE)gdb
-  OBJCOPY = $(CROSS_COMPILE)objcopy
-  SIZE = $(CROSS_COMPILE)size
+ifeq ($(CC),iccarm)
+USE_IAR = 1
 endif
 
 ifeq ($(CMDEXE),1)
@@ -115,57 +103,19 @@ else
 endif
 
 #-------------- Source files and compiler flags --------------
+# tinyusb makefile
+include $(TOP)/src/tinyusb.mk
 
 # Include all source C in family & board folder
 SRC_C += hw/bsp/board.c
 SRC_C += $(subst $(TOP)/,,$(wildcard $(TOP)/$(BOARD_PATH)/*.c))
 
-INC   += $(TOP)/$(FAMILY_PATH)
+SRC_C += $(TINYUSB_SRC_C)
 
-# Allow for -Os to be changed by board makefiles in case -Os is not allowed
-CFLAGS_OPTIMIZED ?= -Os
+INC += \
+  $(TOP)/$(FAMILY_PATH) \
+  $(TOP)/src \
 
-# GCC Compiler Flags
-GCC_CFLAGS += \
-  -ggdb \
-  -fdata-sections \
-  -ffunction-sections \
-  -fsingle-precision-constant \
-  -fno-strict-aliasing \
-  -Wall \
-  -Wextra \
-  -Werror \
-  -Wfatal-errors \
-  -Wdouble-promotion \
-  -Wstrict-prototypes \
-  -Wstrict-overflow \
-  -Werror-implicit-function-declaration \
-  -Wfloat-equal \
-  -Wundef \
-  -Wshadow \
-  -Wwrite-strings \
-  -Wsign-compare \
-  -Wmissing-format-attribute \
-  -Wunreachable-code \
-  -Wcast-align \
-  -Wcast-function-type \
-  -Wcast-qual \
-  -Wnull-dereference \
-  -Wuninitialized \
-  -Wunused \
-  -Wreturn-type \
-  -Wredundant-decls
-
-# conversion is too strict for most mcu driver, may be disable sign/int/arith-conversion
-#  -Wconversion
-
-# Debugging/Optimization
-ifeq ($(DEBUG), 1)
-  GCC_CFLAGS += -O0
-  NO_LTO = 1
-else
-  GCC_CFLAGS += $(CFLAGS_OPTIMIZED)
-endif
 
 # Log level is mapped to TUSB DEBUG option
 ifneq ($(LOG),)
@@ -186,3 +136,6 @@ ifeq ($(LOGGER),rtt)
 else ifeq ($(LOGGER),swo)
   CFLAGS += -DLOGGER_SWO
 endif
+
+# toolchain specific
+include $(TOP)/tools/make/toolchain/arm_$(TOOLCHAIN).mk
diff --git a/examples/rules.mk b/examples/rules.mk
index 5727ab7e3..e50c0ec7d 100644
--- a/examples/rules.mk
+++ b/examples/rules.mk
@@ -13,87 +13,8 @@ ifeq (,$(findstring $(FAMILY),espressif rp2040))
 # Compiler Flags
 # ---------------------------------------
 
-LIBS_GCC ?= -lgcc -lm -lnosys
-
-# libc
-LIBS += $(LIBS_GCC)
-
-ifneq ($(BOARD), spresense)
-LIBS += -lc
-endif
-
-# TinyUSB Stack source
-SRC_C += \
-	src/tusb.c \
-	src/common/tusb_fifo.c \
-	src/device/usbd.c \
-	src/device/usbd_control.c \
-	src/typec/usbc.c \
-	src/class/audio/audio_device.c \
-	src/class/cdc/cdc_device.c \
-	src/class/dfu/dfu_device.c \
-	src/class/dfu/dfu_rt_device.c \
-	src/class/hid/hid_device.c \
-	src/class/midi/midi_device.c \
-	src/class/msc/msc_device.c \
-	src/class/net/ecm_rndis_device.c \
-	src/class/net/ncm_device.c \
-	src/class/usbtmc/usbtmc_device.c \
-	src/class/video/video_device.c \
-	src/class/vendor/vendor_device.c
-
-# TinyUSB stack include
-INC += $(TOP)/src
-
 CFLAGS += $(addprefix -I,$(INC))
 
-ifdef USE_IAR
-
-SRC_S += $(IAR_SRC_S)
-
-ASFLAGS := $(CFLAGS) $(IAR_ASFLAGS) $(ASFLAGS) -S
-IAR_LDFLAGS += --config $(TOP)/$(IAR_LD_FILE)
-CFLAGS += $(IAR_CFLAGS) -e --debug --silent
-
-else
-
-SRC_S += $(GCC_SRC_S)
-
-CFLAGS += $(GCC_CFLAGS) -MD
-
-# LTO makes it difficult to analyze map file for optimizing size purpose
-# We will run this option in ci
-ifeq ($(NO_LTO),1)
-CFLAGS := $(filter-out -flto,$(CFLAGS))
-endif
-
-ifneq ($(CFLAGS_SKIP),)
-CFLAGS := $(filter-out $(CFLAGS_SKIP),$(CFLAGS))
-endif
-
-LDFLAGS += $(CFLAGS) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections
-
-# Some toolchain such as renesas rx does not support --print-memory-usage flags
-ifneq ($(FAMILY),rx)
-LDFLAGS += -Wl,--print-memory-usage
-endif
-
-ifdef LD_FILE
-LDFLAGS += -Wl,-T,$(TOP)/$(LD_FILE)
-endif
-
-ifdef GCC_LD_FILE
-LDFLAGS += -Wl,-T,$(TOP)/$(GCC_LD_FILE)
-endif
-
-ifneq ($(SKIP_NANOLIB), 1)
-LDFLAGS += --specs=nosys.specs --specs=nano.specs
-endif
-
-ASFLAGS += $(CFLAGS)
-
-endif # USE_IAR
-
 # Verbose mode
 ifeq ("$(V)","1")
 $(info CFLAGS  $(CFLAGS) ) $(info )
@@ -101,15 +22,6 @@ $(info LDFLAGS $(LDFLAGS)) $(info )
 $(info ASFLAGS $(ASFLAGS)) $(info )
 endif
 
-# Assembly files can be name with upper case .S, convert it to .s
-SRC_S := $(SRC_S:.S=.s)
-
-# Due to GCC LTO bug https://bugs.launchpad.net/gcc-arm-embedded/+bug/1747966
-# assembly file should be placed first in linking order
-# '_asm' suffix is added to object of assembly file
-OBJ += $(addprefix $(BUILD)/obj/, $(SRC_S:.s=_asm.o))
-OBJ += $(addprefix $(BUILD)/obj/, $(SRC_C:.c=.o))
-
 # ---------------------------------------
 # Rules
 # ---------------------------------------
@@ -118,15 +30,6 @@ all: $(BUILD)/$(PROJECT).bin $(BUILD)/$(PROJECT).hex size
 
 uf2: $(BUILD)/$(PROJECT).uf2
 
-OBJ_DIRS = $(sort $(dir $(OBJ)))
-$(OBJ): | $(OBJ_DIRS)
-$(OBJ_DIRS):
-ifeq ($(CMDEXE),1)
-	-@$(MKDIR) $(subst /,\,$@)
-else
-	@$(MKDIR) -p $@
-endif
-
 # We set vpath to point to the top of the tree so that the source files
 # can be located. By following this scheme, it allows a single build rule
 # to be used to compile all .c files.
@@ -134,49 +37,16 @@ vpath %.c . $(TOP)
 vpath %.s . $(TOP)
 vpath %.S . $(TOP)
 
-# Compile .c file
-$(BUILD)/obj/%.o: %.c
-	@echo CC $(notdir $@)
-	@$(CC) $(CFLAGS) -c -o $@ $<
+include $(TOP)/tools/make/toolchain/arm_$(TOOLCHAIN)_rules.mk
 
-# ASM sources lower case .s
-$(BUILD)/obj/%_asm.o: %.s
-	@echo AS $(notdir $@)
-	@$(AS) $(ASFLAGS) -c -o $@ $<
-
-# ASM sources upper case .S
-$(BUILD)/obj/%_asm.o: %.S
-	@echo AS $(notdir $@)
-	@$(AS) $(ASFLAGS) -c -o $@ $<
-
-ifdef USE_IAR
-# IAR Compiler
-$(BUILD)/$(PROJECT).bin: $(BUILD)/$(PROJECT).elf
-	@echo CREATE $@
-	@$(OBJCOPY) --silent --bin $^ $@
-
-$(BUILD)/$(PROJECT).hex: $(BUILD)/$(PROJECT).elf
-	@echo CREATE $@
-	@$(OBJCOPY) --silent --ihex $^ $@
-
-$(BUILD)/$(PROJECT).elf: $(OBJ)
-	@echo LINK $@
-	@$(LD) -o $@ $(IAR_LDFLAGS) $^
 
+OBJ_DIRS = $(sort $(dir $(OBJ)))
+$(OBJ): | $(OBJ_DIRS)
+$(OBJ_DIRS):
+ifeq ($(CMDEXE),1)
+	-@$(MKDIR) $(subst /,\,$@)
 else
-# GCC based compiler
-$(BUILD)/$(PROJECT).bin: $(BUILD)/$(PROJECT).elf
-	@echo CREATE $@
-	@$(OBJCOPY) -O binary $^ $@
-
-$(BUILD)/$(PROJECT).hex: $(BUILD)/$(PROJECT).elf
-	@echo CREATE $@
-	@$(OBJCOPY) -O ihex $^ $@
-
-$(BUILD)/$(PROJECT).elf: $(OBJ)
-	@echo LINK $@
-	@$(LD) -o $@ $(LDFLAGS) $^ -Wl,--start-group $(LIBS) -Wl,--end-group
-
+	@$(MKDIR) -p $@
 endif
 
 # UF2 generation, iMXRT need to strip to text only before conversion
diff --git a/hw/bsp/stm32h7/family.mk b/hw/bsp/stm32h7/family.mk
index c11240207..48730bbb4 100644
--- a/hw/bsp/stm32h7/family.mk
+++ b/hw/bsp/stm32h7/family.mk
@@ -6,6 +6,7 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
 ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m7
 
 # --------------
 # Compiler Flags
@@ -29,20 +30,11 @@ endif
 # GCC Flags
 GCC_CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m7 \
-  -mfloat-abi=hard \
-  -mfpu=fpv5-d16 \
   -nostdlib -nostartfiles
 
 # suppress warning caused by vendor mcu driver
 GCC_CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align -Wno-error=unused-parameter
 
-# IAR Flags
-IAR_CFLAGS += --cpu cortex-m7 --fpu VFPv5_D16
-IAR_ASFLAGS += --cpu cortex-m7 --fpu VFPv5_D16
-
 # -----------------
 # Sources & Include
 # -----------------
@@ -66,6 +58,3 @@ INC += \
 	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
 	$(TOP)/$(ST_CMSIS)/Include \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1
diff --git a/src/tinyusb.mk b/src/tinyusb.mk
new file mode 100644
index 000000000..85052f90f
--- /dev/null
+++ b/src/tinyusb.mk
@@ -0,0 +1,19 @@
+# C source files
+TINYUSB_SRC_C += \
+	src/tusb.c \
+	src/common/tusb_fifo.c \
+	src/device/usbd.c \
+	src/device/usbd_control.c \
+	src/typec/usbc.c \
+	src/class/audio/audio_device.c \
+	src/class/cdc/cdc_device.c \
+	src/class/dfu/dfu_device.c \
+	src/class/dfu/dfu_rt_device.c \
+	src/class/hid/hid_device.c \
+	src/class/midi/midi_device.c \
+	src/class/msc/msc_device.c \
+	src/class/net/ecm_rndis_device.c \
+	src/class/net/ncm_device.c \
+	src/class/usbtmc/usbtmc_device.c \
+	src/class/video/video_device.c \
+	src/class/vendor/vendor_device.c \
diff --git a/tools/make/cpu/cortex-m7.mk b/tools/make/cpu/cortex-m7.mk
index 504ffd486..0e53cbe9c 100644
--- a/tools/make/cpu/cortex-m7.mk
+++ b/tools/make/cpu/cortex-m7.mk
@@ -5,8 +5,15 @@ ifeq ($(TOOLCHAIN),gcc)
     -mfloat-abi=hard \
     -mfpu=fpv5-d16 \
 
-  #set(FREERTOS_PORT GCC_ARM_CM7 CACHE INTERNAL "")
-  FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1
 else ifeq ($(TOOLCHAIN),iar)
-  # TODO support IAR
+  CFLAGS += \
+  	--cpu cortex-m7 \
+  	--fpu VFPv5_D16 \
+
+  ASFLAGS += \
+		--cpu cortex-m7 \
+		--fpu VFPv5_D16 \
+
 endif
+
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1
diff --git a/tools/make/toolchain/arm_gcc.mk b/tools/make/toolchain/arm_gcc.mk
new file mode 100644
index 000000000..d5ee98def
--- /dev/null
+++ b/tools/make/toolchain/arm_gcc.mk
@@ -0,0 +1,77 @@
+# makefile for arm gcc toolchain
+
+CC = $(CROSS_COMPILE)gcc
+CXX = $(CROSS_COMPILE)g++
+AS = $(CC) -x assembler-with-cpp
+LD = $(CC)
+
+GDB = $(CROSS_COMPILE)gdb
+OBJCOPY = $(CROSS_COMPILE)objcopy
+SIZE = $(CROSS_COMPILE)size
+
+# CPU specific flags
+include $(TOP)/tools/make/cpu/$(CPU_CORE).mk
+
+# ---------------------------------------
+# Compiler Flags
+# ---------------------------------------
+CFLAGS += \
+  -MD \
+  -ggdb \
+  -fdata-sections \
+  -ffunction-sections \
+  -fsingle-precision-constant \
+  -fno-strict-aliasing \
+  -Wall \
+  -Wextra \
+  -Werror \
+  -Wfatal-errors \
+  -Wdouble-promotion \
+  -Wstrict-prototypes \
+  -Wstrict-overflow \
+  -Werror-implicit-function-declaration \
+  -Wfloat-equal \
+  -Wundef \
+  -Wshadow \
+  -Wwrite-strings \
+  -Wsign-compare \
+  -Wmissing-format-attribute \
+  -Wunreachable-code \
+  -Wcast-align \
+  -Wcast-function-type \
+  -Wcast-qual \
+  -Wnull-dereference \
+  -Wuninitialized \
+  -Wunused \
+  -Wreturn-type \
+  -Wredundant-decls \
+
+# conversion is too strict for most mcu driver, may be disable sign/int/arith-conversion
+#  -Wconversion
+
+# Size Optimization as default
+CFLAGS_OPTIMIZED ?= -Os
+
+# Debugging/Optimization
+ifeq ($(DEBUG), 1)
+  CFLAGS += -O0
+  NO_LTO = 1
+else
+  CFLAGS += $(CFLAGS_OPTIMIZED)
+endif
+
+# ---------------------------------------
+# Linker Flags
+# ---------------------------------------
+LDFLAGS += \
+  -Wl,-Map=$@.map \
+  -Wl,-cref \
+  -Wl,-gc-sections \
+
+# Some toolchain such as renesas rx does not support --print-memory-usage flags
+ifneq ($(FAMILY),rx)
+LDFLAGS += -Wl,--print-memory-usage
+endif
+
+LDFLAGS += \
+  -Wl,--print-memory-usage \
diff --git a/tools/make/toolchain/arm_gcc_rules.mk b/tools/make/toolchain/arm_gcc_rules.mk
new file mode 100644
index 000000000..a39caf351
--- /dev/null
+++ b/tools/make/toolchain/arm_gcc_rules.mk
@@ -0,0 +1,78 @@
+SRC_S += $(GCC_SRC_S)
+
+# Assembly files can be name with upper case .S, convert it to .s
+SRC_S := $(SRC_S:.S=.s)
+
+# Due to GCC LTO bug https://bugs.launchpad.net/gcc-arm-embedded/+bug/1747966
+# assembly file should be placed first in linking order
+# '_asm' suffix is added to object of assembly file
+OBJ += $(addprefix $(BUILD)/obj/, $(SRC_S:.s=_asm.o))
+OBJ += $(addprefix $(BUILD)/obj/, $(SRC_C:.c=.o))
+
+CFLAGS += $(GCC_CFLAGS) -MD
+
+# LTO makes it difficult to analyze map file for optimizing size purpose
+# We will run this option in ci
+ifeq ($(NO_LTO),1)
+CFLAGS := $(filter-out -flto,$(CFLAGS))
+endif
+
+ifneq ($(CFLAGS_SKIP),)
+CFLAGS := $(filter-out $(CFLAGS_SKIP),$(CFLAGS))
+endif
+
+LDFLAGS += $(CFLAGS)
+
+ifdef LD_FILE
+LDFLAGS += -Wl,-T,$(TOP)/$(LD_FILE)
+endif
+
+ifdef GCC_LD_FILE
+LDFLAGS += -Wl,-T,$(TOP)/$(GCC_LD_FILE)
+endif
+
+ifneq ($(SKIP_NANOLIB), 1)
+LDFLAGS += --specs=nosys.specs --specs=nano.specs
+endif
+
+ASFLAGS += $(CFLAGS)
+
+LIBS_GCC ?= -lgcc -lm -lnosys
+
+# libc
+LIBS += $(LIBS_GCC)
+
+ifneq ($(BOARD), spresense)
+LIBS += -lc
+endif
+
+# ---------------------------------------
+# Rules
+# ---------------------------------------
+
+# Compile .c file
+$(BUILD)/obj/%.o: %.c
+	@echo CC $(notdir $@)
+	@$(CC) $(CFLAGS) -c -o $@ $<
+
+# ASM sources lower case .s
+$(BUILD)/obj/%_asm.o: %.s
+	@echo AS $(notdir $@)
+	@$(AS) $(ASFLAGS) -c -o $@ $<
+
+# ASM sources upper case .S
+$(BUILD)/obj/%_asm.o: %.S
+	@echo AS $(notdir $@)
+	@$(AS) $(ASFLAGS) -c -o $@ $<
+
+$(BUILD)/$(PROJECT).bin: $(BUILD)/$(PROJECT).elf
+	@echo CREATE $@
+	@$(OBJCOPY) -O binary $^ $@
+
+$(BUILD)/$(PROJECT).hex: $(BUILD)/$(PROJECT).elf
+	@echo CREATE $@
+	@$(OBJCOPY) -O ihex $^ $@
+
+$(BUILD)/$(PROJECT).elf: $(OBJ)
+	@echo LINK $@
+	@$(LD) -o $@ $(LDFLAGS) $^ -Wl,--start-group $(LIBS) -Wl,--end-group
diff --git a/tools/make/toolchain/arm_iar.mk b/tools/make/toolchain/arm_iar.mk
new file mode 100644
index 000000000..42b31cfd3
--- /dev/null
+++ b/tools/make/toolchain/arm_iar.mk
@@ -0,0 +1,13 @@
+# makefile for arm iar toolchain
+AS = iasmarm
+LD = ilinkarm
+OBJCOPY = ielftool --silent
+SIZE = size
+
+include $(TOP)/tools/make/cpu/$(CPU_CORE).mk
+
+# Enable extension mode (gcc compatible)
+CFLAGS += -e --debug --silent
+
+# silent mode
+ASFLAGS += -S
diff --git a/tools/make/toolchain/arm_iar_rules.mk b/tools/make/toolchain/arm_iar_rules.mk
new file mode 100644
index 000000000..4b5cc90e3
--- /dev/null
+++ b/tools/make/toolchain/arm_iar_rules.mk
@@ -0,0 +1,44 @@
+SRC_S += $(IAR_SRC_S)
+
+# Assembly files can be name with upper case .S, convert it to .s
+SRC_S := $(SRC_S:.S=.s)
+
+# Due to GCC LTO bug https://bugs.launchpad.net/gcc-arm-embedded/+bug/1747966
+# assembly file should be placed first in linking order
+# '_asm' suffix is added to object of assembly file
+OBJ += $(addprefix $(BUILD)/obj/, $(SRC_S:.s=_asm.o))
+OBJ += $(addprefix $(BUILD)/obj/, $(SRC_C:.c=.o))
+
+# Linker script
+LDFLAGS += --config $(TOP)/$(IAR_LD_FILE)
+
+# ---------------------------------------
+# Rules
+# ---------------------------------------
+
+# Compile .c file
+$(BUILD)/obj/%.o: %.c
+	@echo CC $(notdir $@)
+	@$(CC) $(CFLAGS) -c -o $@ $<
+
+# ASM sources lower case .s
+$(BUILD)/obj/%_asm.o: %.s
+	@echo AS $(notdir $@)
+	@$(AS) $(ASFLAGS) -c -o $@ $<
+
+# ASM sources upper case .S
+$(BUILD)/obj/%_asm.o: %.S
+	@echo AS $(notdir $@)
+	@$(AS) $(ASFLAGS) -c -o $@ $<
+
+$(BUILD)/$(PROJECT).bin: $(BUILD)/$(PROJECT).elf
+	@echo CREATE $@
+	@$(OBJCOPY) --bin $^ $@
+
+$(BUILD)/$(PROJECT).hex: $(BUILD)/$(PROJECT).elf
+	@echo CREATE $@
+	@$(OBJCOPY) --ihex $^ $@
+
+$(BUILD)/$(PROJECT).elf: $(OBJ)
+	@echo LINK $@
+	@$(LD) -o $@ $(LDFLAGS) $^

From dbf7534cd4bcc3a11c1159a42f252d4166bf3afb Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 24 Jun 2023 18:09:05 +0700
Subject: [PATCH 433/691] update all stm32 to use new enhance make

---
 hw/bsp/stm32f0/family.mk                        | 12 +-----------
 hw/bsp/stm32f1/family.mk                        | 15 +--------------
 .../boards/stm32f207nucleo/stm32f207nucleo.c    |  2 +-
 hw/bsp/stm32f2/family.mk                        | 14 +++++---------
 hw/bsp/stm32f3/family.mk                        |  9 +--------
 hw/bsp/stm32f4/family.mk                        | 13 +------------
 hw/bsp/stm32f7/family.mk                        | 13 +------------
 hw/bsp/stm32g0/family.mk                        | 12 +-----------
 hw/bsp/stm32g4/family.mk                        | 13 +------------
 hw/bsp/stm32l0/family.mk                        |  8 +-------
 hw/bsp/stm32l4/family.mk                        | 13 +------------
 hw/bsp/stm32u5/family.mk                        | 10 +---------
 hw/bsp/stm32wb/family.mk                        |  9 +--------
 tools/make/cpu/cortex-m0.mk                     | 14 ++++++++++++++
 tools/make/cpu/cortex-m0plus.mk                 | 14 ++++++++++++++
 tools/make/cpu/cortex-m3.mk                     | 17 +++++++++++++++++
 tools/make/cpu/cortex-m33.mk                    | 14 +++++++++-----
 tools/make/cpu/cortex-m4.mk                     |  7 ++++---
 18 files changed, 75 insertions(+), 134 deletions(-)
 create mode 100644 tools/make/cpu/cortex-m0.mk
 create mode 100644 tools/make/cpu/cortex-m0plus.mk
 create mode 100644 tools/make/cpu/cortex-m3.mk

diff --git a/hw/bsp/stm32f0/family.mk b/hw/bsp/stm32f0/family.mk
index 08e349a81..200c4f757 100644
--- a/hw/bsp/stm32f0/family.mk
+++ b/hw/bsp/stm32f0/family.mk
@@ -6,6 +6,7 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
 ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m0
 
 # --------------
 # Compiler Flags
@@ -17,19 +18,11 @@ CFLAGS += \
 # GCC Flags
 GCC_CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m0 \
-  -mfloat-abi=soft \
   -nostdlib -nostartfiles \
 
 # suppress warning caused by vendor mcu driver
 GCC_CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align
 
-# IAR Flags
-IAR_CFLAGS += --cpu cortex-m0
-IAR_ASFLAGS += --cpu cortex-m0
-
 # ------------------------
 # All source paths should be relative to the top level.
 # ------------------------
@@ -51,6 +44,3 @@ INC += \
   $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
   $(TOP)/$(ST_CMSIS)/Include \
   $(TOP)/$(ST_HAL_DRIVER)/Inc
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
diff --git a/hw/bsp/stm32f1/family.mk b/hw/bsp/stm32f1/family.mk
index cd1d587f1..4813fba2b 100644
--- a/hw/bsp/stm32f1/family.mk
+++ b/hw/bsp/stm32f1/family.mk
@@ -5,6 +5,7 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
 ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m3
 
 # --------------
 # Compiler Flags
@@ -15,16 +16,8 @@ CFLAGS += \
 # GCC Flags
 GCC_CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m3 \
-  -mfloat-abi=soft \
   -nostdlib -nostartfiles \
 
-# IAR Flags
-IAR_CFLAGS += --cpu cortex-m3
-IAR_ASFLAGS += --cpu cortex-m3
-
 # ------------------------
 # All source paths should be relative to the top level.
 # ------------------------
@@ -43,12 +36,6 @@ INC += \
   $(TOP)/$(ST_CMSIS)/Include \
   $(TOP)/$(ST_HAL_DRIVER)/Inc
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
-
-# For flash-jlink target
-JLINK_DEVICE = stm32f103c8
-
 # flash target ROM bootloader
 flash-dfu-util: $(BUILD)/$(PROJECT).bin
 	dfu-util -R -a 0 --dfuse-address 0x08000000 -D $<
diff --git a/hw/bsp/stm32f2/boards/stm32f207nucleo/stm32f207nucleo.c b/hw/bsp/stm32f2/boards/stm32f207nucleo/stm32f207nucleo.c
index 48203b787..020f21cb1 100644
--- a/hw/bsp/stm32f2/boards/stm32f207nucleo/stm32f207nucleo.c
+++ b/hw/bsp/stm32f2/boards/stm32f207nucleo/stm32f207nucleo.c
@@ -203,7 +203,7 @@ uint32_t board_millis(void)
 
 void HardFault_Handler (void)
 {
-  asm("bkpt");
+  __asm("BKPT #0\n");
 }
 
 // Required by __libc_init_array in startup code if we are compiling using
diff --git a/hw/bsp/stm32f2/family.mk b/hw/bsp/stm32f2/family.mk
index 7ca378548..fd27c0e68 100644
--- a/hw/bsp/stm32f2/family.mk
+++ b/hw/bsp/stm32f2/family.mk
@@ -9,18 +9,17 @@ DEPS_SUBMODULES += \
 	$(ST_HAL_DRIVER)
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m3
 
 CFLAGS += \
+	-DCFG_TUSB_MCU=OPT_MCU_STM32F2
+
+GCC_CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m3 \
-  -mfloat-abi=soft \
   -nostdlib -nostartfiles \
-  -DCFG_TUSB_MCU=OPT_MCU_STM32F2
 
 # mcu driver cause following warnings
-CFLAGS += -Wno-error=sign-compare
+GCC_CFLAGS += -Wno-error=sign-compare
 
 SRC_C += \
   src/portable/synopsys/dwc2/dcd_dwc2.c \
@@ -36,6 +35,3 @@ INC += \
   $(TOP)/$(ST_CMSIS)/Include \
   $(TOP)/$(ST_HAL_DRIVER)/Inc \
   $(TOP)/$(BOARD_PATH)
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
diff --git a/hw/bsp/stm32f3/family.mk b/hw/bsp/stm32f3/family.mk
index f3b21d530..a740e9012 100644
--- a/hw/bsp/stm32f3/family.mk
+++ b/hw/bsp/stm32f3/family.mk
@@ -9,14 +9,10 @@ DEPS_SUBMODULES += \
 	$(ST_HAL_DRIVER)
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m4
 
 CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m4 \
-  -mfloat-abi=hard \
-  -mfpu=fpv4-sp-d16 \
   -nostdlib -nostartfiles \
   -DCFG_TUSB_MCU=OPT_MCU_STM32F3
 
@@ -37,6 +33,3 @@ INC += \
   $(TOP)/$(ST_CMSIS)/Include \
   $(TOP)/$(ST_HAL_DRIVER)/Inc \
   $(TOP)/$(BOARD_PATH)
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
diff --git a/hw/bsp/stm32f4/family.mk b/hw/bsp/stm32f4/family.mk
index 394c4a72f..9c132fd21 100644
--- a/hw/bsp/stm32f4/family.mk
+++ b/hw/bsp/stm32f4/family.mk
@@ -6,6 +6,7 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
 ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m4
 
 # --------------
 # Compiler Flags
@@ -16,20 +17,11 @@ CFLAGS += \
 # GCC Flags
 GCC_CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m4 \
-  -mfloat-abi=hard \
-  -mfpu=fpv4-sp-d16 \
   -nostdlib -nostartfiles
 
 # suppress warning caused by vendor mcu driver
 GCC_CFLAGS += -Wno-error=cast-align
 
-# IAR Flags
-IAR_CFLAGS += --cpu cortex-m4 --fpu VFPv4
-IAR_ASFLAGS += --cpu cortex-m4 --fpu VFPv4
-
 # -----------------
 # Sources & Include
 # -----------------
@@ -51,8 +43,5 @@ INC += \
 	$(TOP)/$(ST_CMSIS)/Include \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
-
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32f7/family.mk b/hw/bsp/stm32f7/family.mk
index b44381586..0b3b641d8 100644
--- a/hw/bsp/stm32f7/family.mk
+++ b/hw/bsp/stm32f7/family.mk
@@ -6,6 +6,7 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
 ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m7
 
 # --------------
 # Compiler Flags
@@ -29,20 +30,11 @@ endif
 # GCC Flags
 GCC_CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m7 \
-  -mfloat-abi=hard \
-  -mfpu=fpv5-d16 \
   -nostdlib -nostartfiles
 
 # mcu driver cause following warnings
 GCC_CFLAGS += -Wno-error=shadow -Wno-error=cast-align
 
-# IAR Flags
-IAR_CFLAGS += --cpu cortex-m7 --fpu VFPv5_D16
-IAR_ASFLAGS += --cpu cortex-m7 --fpu VFPv5_D16
-
 # -----------------
 # Sources & Include
 # -----------------
@@ -64,6 +56,3 @@ INC += \
 	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
 	$(TOP)/$(ST_CMSIS)/Include \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1
diff --git a/hw/bsp/stm32g0/family.mk b/hw/bsp/stm32g0/family.mk
index 76f59fc34..76f1524e5 100644
--- a/hw/bsp/stm32g0/family.mk
+++ b/hw/bsp/stm32g0/family.mk
@@ -5,6 +5,7 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
 ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m0plus
 
 # --------------
 # Compiler Flags
@@ -15,19 +16,11 @@ CFLAGS += \
 # GCC Flags
 GCC_CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m0plus \
-  -mfloat-abi=soft \
   -nostdlib -nostartfiles
 
 # suppress warning caused by vendor mcu driver
 GCC_CFLAGS += -Wno-error=cast-align
 
-# IAR Flags
-IAR_CFLAGS += --cpu cortex-m0
-IAR_ASFLAGS += --cpu cortex-m0
-
 # -----------------
 # Sources & Include
 # -----------------
@@ -50,8 +43,5 @@ INC += \
 	$(TOP)/$(ST_CMSIS)/Include \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
-
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32g4/family.mk b/hw/bsp/stm32g4/family.mk
index a4b644245..8ee453aed 100644
--- a/hw/bsp/stm32g4/family.mk
+++ b/hw/bsp/stm32g4/family.mk
@@ -6,6 +6,7 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
 ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m4
 
 # --------------
 # Compiler Flags
@@ -16,20 +17,11 @@ CFLAGS += \
 # GCC Flags
 GCC_CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m4 \
-  -mfloat-abi=hard \
-  -mfpu=fpv4-sp-d16 \
   -nostdlib -nostartfiles \
 
 # suppress warning caused by vendor mcu driver
 GCC_CFLAGS += -Wno-error=cast-align
 
-# IAR Flags
-IAR_CFLAGS += --cpu cortex-m4 --fpu VFPv4
-IAR_ASFLAGS += --cpu cortex-m4 --fpu VFPv4
-
 # -----------------
 # Sources & Include
 # -----------------
@@ -53,8 +45,5 @@ INC += \
 	$(TOP)/$(ST_CMSIS)/Include \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
-
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32l0/family.mk b/hw/bsp/stm32l0/family.mk
index f069ae8f0..43f567b50 100644
--- a/hw/bsp/stm32l0/family.mk
+++ b/hw/bsp/stm32l0/family.mk
@@ -8,13 +8,10 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
 ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m0plus
 
 CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m0plus \
-  -mfloat-abi=soft \
   -nostdlib -nostartfiles \
   -DCFG_EXAMPLE_MSC_READONLY \
   -DCFG_EXAMPLE_VIDEO_READONLY \
@@ -42,6 +39,3 @@ INC += \
   $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
   $(TOP)/$(ST_CMSIS)/Include \
   $(TOP)/$(ST_HAL_DRIVER)/Inc
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
diff --git a/hw/bsp/stm32l4/family.mk b/hw/bsp/stm32l4/family.mk
index 0e84d1af0..4392c6766 100644
--- a/hw/bsp/stm32l4/family.mk
+++ b/hw/bsp/stm32l4/family.mk
@@ -5,6 +5,7 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
 ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m4
 
 # --------------
 # Compiler Flags
@@ -15,20 +16,11 @@ CFLAGS += \
 # GCC Flags
 GCC_CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m4 \
-  -mfloat-abi=hard \
-  -mfpu=fpv4-sp-d16 \
   -nostdlib -nostartfiles
 
 # suppress warning caused by vendor mcu driver
 GCC_CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align
 
-# IAR Flags
-IAR_CFLAGS += --cpu cortex-m4 --fpu VFPv4
-IAR_ASFLAGS += --cpu cortex-m4 --fpu VFPv4
-
 # -----------------
 # Sources & Include
 # -----------------
@@ -54,8 +46,5 @@ INC += \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc \
 	$(TOP)/$(BOARD_PATH)
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
-
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32u5/family.mk b/hw/bsp/stm32u5/family.mk
index e1c496dee..9174fe96a 100644
--- a/hw/bsp/stm32u5/family.mk
+++ b/hw/bsp/stm32u5/family.mk
@@ -5,21 +5,16 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
 ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m33
 
 CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m33 \
-  -mfloat-abi=hard \
-  -mfpu=fpv5-sp-d16 \
   -nostdlib -nostartfiles \
   -DCFG_TUSB_MCU=OPT_MCU_STM32U5
 
 # suppress warning caused by vendor mcu driver
 CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align -Wno-error=undef -Wno-error=unused-parameter
 
-#src/portable/st/synopsys/dcd_synopsys.c
 SRC_C += \
 	src/portable/synopsys/dwc2/dcd_dwc2.c \
 	$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
@@ -38,8 +33,5 @@ INC += \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc \
 	$(TOP)/$(BOARD_PATH)
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure
-
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32wb/family.mk b/hw/bsp/stm32wb/family.mk
index 97210889c..bc3afcaff 100644
--- a/hw/bsp/stm32wb/family.mk
+++ b/hw/bsp/stm32wb/family.mk
@@ -6,14 +6,10 @@ ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
 ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m4
 
 CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m4 \
-  -mfloat-abi=hard \
-  -mfpu=fpv4-sp-d16 \
   -nostdlib -nostartfiles \
   -DCFG_TUSB_MCU=OPT_MCU_STM32WB
 
@@ -37,8 +33,5 @@ INC += \
 	$(TOP)/$(ST_CMSIS)/Include \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
-
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/tools/make/cpu/cortex-m0.mk b/tools/make/cpu/cortex-m0.mk
new file mode 100644
index 000000000..c264802c8
--- /dev/null
+++ b/tools/make/cpu/cortex-m0.mk
@@ -0,0 +1,14 @@
+ifeq ($(TOOLCHAIN),gcc)
+  CFLAGS += \
+    -mthumb \
+    -mcpu=cortex-m0 \
+    -mfloat-abi=soft \
+
+else ifeq ($(TOOLCHAIN),iar)
+  # IAR Flags
+  CFLAGS += --cpu cortex-m0
+  ASFLAGS += --cpu cortex-m0
+endif
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
diff --git a/tools/make/cpu/cortex-m0plus.mk b/tools/make/cpu/cortex-m0plus.mk
new file mode 100644
index 000000000..626f7156e
--- /dev/null
+++ b/tools/make/cpu/cortex-m0plus.mk
@@ -0,0 +1,14 @@
+ifeq ($(TOOLCHAIN),gcc)
+  CFLAGS += \
+    -mthumb \
+    -mcpu=cortex-m0plus \
+    -mfloat-abi=soft \
+
+else ifeq ($(TOOLCHAIN),iar)
+  # IAR Flags
+  CFLAGS += --cpu cortex-m0+
+  ASFLAGS += --cpu cortex-m0+
+endif
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
diff --git a/tools/make/cpu/cortex-m3.mk b/tools/make/cpu/cortex-m3.mk
new file mode 100644
index 000000000..c81cbace6
--- /dev/null
+++ b/tools/make/cpu/cortex-m3.mk
@@ -0,0 +1,17 @@
+ifeq ($(TOOLCHAIN),gcc)
+  CFLAGS += \
+    -mthumb \
+    -mcpu=cortex-m3 \
+    -mfloat-abi=soft \
+
+else ifeq ($(TOOLCHAIN),iar)
+  # IAR Flags
+  CFLAGS += \
+    --cpu cortex-m3 \
+
+  ASFLAGS += \
+     --cpu cortex-m3
+endif
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
diff --git a/tools/make/cpu/cortex-m33.mk b/tools/make/cpu/cortex-m33.mk
index 3d12b01fd..240ed0d49 100644
--- a/tools/make/cpu/cortex-m33.mk
+++ b/tools/make/cpu/cortex-m33.mk
@@ -5,10 +5,14 @@ ifeq ($(TOOLCHAIN),gcc)
     -mfloat-abi=hard \
     -mfpu=fpv5-sp-d16 \
 
-    #-mfpu=fpv5-d16 \
-
-  #set(FREERTOS_PORT GCC_ARM_CM33_NONSECURE CACHE INTERNAL "")
-  FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure
 else ifeq ($(TOOLCHAIN),iar)
-  # TODO support IAR
+	CFLAGS += \
+		--cpu cortex-m33 \
+		--fpu VFPv5-SP \
+
+	ASFLAGS += \
+		--cpu cortex-m33 \
+		--fpu VFPv5-SP \
 endif
+
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure
diff --git a/tools/make/cpu/cortex-m4.mk b/tools/make/cpu/cortex-m4.mk
index 890feefe3..fabe05632 100644
--- a/tools/make/cpu/cortex-m4.mk
+++ b/tools/make/cpu/cortex-m4.mk
@@ -5,8 +5,9 @@ ifeq ($(TOOLCHAIN),gcc)
     -mfloat-abi=hard \
     -mfpu=fpv4-sp-d16 \
 
-  #set(FREERTOS_PORT GCC_ARM_CM4F CACHE INTERNAL "")
-  FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
 else ifeq ($(TOOLCHAIN),iar)
-  # TODO support IAR
+  CFLAGS += --cpu cortex-m4 --fpu VFPv4
+  ASFLAGS += --cpu cortex-m4 --fpu VFPv4
 endif
+
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F

From b59b65d2ed0f6fa14b18b7bc233309d9b9710898 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 24 Jun 2023 18:26:51 +0700
Subject: [PATCH 434/691] rename to kinetis_k32l2, rename OPT_MCU_KINETIS_K32
 to OPT_MCU_KINETIS_K32L

---
 .github/workflows/build_arm.yml                        |  2 +-
 hw/bsp/board_mcu.h                                     |  2 +-
 hw/bsp/imxrt/family.mk                                 |  2 +-
 .../boards/frdm_k32l2a4s/board.h                       |  0
 .../boards/frdm_k32l2a4s/board.mk                      |  7 +------
 .../boards/frdm_k32l2a4s/frdm_k32l2a4s.c               |  0
 .../boards/frdm_k32l2b/board.h                         |  0
 .../boards/frdm_k32l2b/board.mk                        |  7 +------
 .../boards/frdm_k32l2b/frdm_k32l2b.c                   |  0
 .../boards/kuiic/K32L2B31xxxxA_flash.ld                |  0
 .../boards/kuiic/board.h                               |  0
 .../boards/kuiic/board.mk                              | 10 +---------
 .../boards/kuiic/kuiic.c                               |  0
 hw/bsp/{kinetis_k32l => kinetis_k32l2}/family.mk       |  8 ++++----
 src/common/tusb_mcu.h                                  |  2 +-
 src/tusb_option.h                                      |  3 ++-
 tools/get_deps.py                                      |  4 ++--
 17 files changed, 15 insertions(+), 32 deletions(-)
 rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/boards/frdm_k32l2a4s/board.h (100%)
 rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/boards/frdm_k32l2a4s/board.mk (75%)
 rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/boards/frdm_k32l2a4s/frdm_k32l2a4s.c (100%)
 rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/boards/frdm_k32l2b/board.h (100%)
 rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/boards/frdm_k32l2b/board.mk (74%)
 rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/boards/frdm_k32l2b/frdm_k32l2b.c (100%)
 rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/boards/kuiic/K32L2B31xxxxA_flash.ld (100%)
 rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/boards/kuiic/board.h (100%)
 rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/boards/kuiic/board.mk (63%)
 rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/boards/kuiic/kuiic.c (100%)
 rename hw/bsp/{kinetis_k32l => kinetis_k32l2}/family.mk (89%)

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index a7c7fd1e1..620aec193 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -34,7 +34,7 @@ jobs:
         family:
         # Alphabetical order
         - 'broadcom_32bit'
-        - 'kinetis_k32l kinetis_kl'
+        - 'kinetis_k32l2 kinetis_kl'
         - 'lpc11 lpc13 lpc15 lpc17'
         - 'lpc51 lpc54 lpc55'
         - 'mm32 msp432e4'
diff --git a/hw/bsp/board_mcu.h b/hw/bsp/board_mcu.h
index ce2f919bf..e5d2bb608 100644
--- a/hw/bsp/board_mcu.h
+++ b/hw/bsp/board_mcu.h
@@ -47,7 +47,7 @@
 #elif TU_CHECK_MCU(OPT_MCU_LPC51UXX, OPT_MCU_LPC54XXX, OPT_MCU_LPC55XX, OPT_MCU_MCXN9)
   #include "fsl_device_registers.h"
 
-#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32)
+#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L)
   #include "fsl_device_registers.h"
 
 #elif CFG_TUSB_MCU == OPT_MCU_NRF5X
diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk
index d0bb5be17..9eb541473 100644
--- a/hw/bsp/imxrt/family.mk
+++ b/hw/bsp/imxrt/family.mk
@@ -5,7 +5,6 @@ DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
 include $(TOP)/$(BOARD_PATH)/board.mk
 
 CPU_CORE ?= cortex-m7
-include $(TOP)/tools/make/cpu/$(CPU_CORE).mk
 
 CFLAGS += \
   -D__ARMVFP__=0 \
@@ -17,6 +16,7 @@ CFLAGS += \
 ifdef BOARD_TUD_RHPORT
 CFLAGS += -DBOARD_TUD_RHPORT=$(BOARD_TUD_RHPORT)
 endif
+
 ifdef BOARD_TUH_RHPORT
 CFLAGS += -DBOARD_TUH_RHPORT=$(BOARD_TUH_RHPORT)
 endif
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.h b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.h
similarity index 100%
rename from hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.h
rename to hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.h
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk
similarity index 75%
rename from hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk
rename to hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk
index d96ab58b8..f69700139 100644
--- a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk
+++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk
@@ -1,8 +1,6 @@
 MCU = K32L2A41A
 
-CFLAGS += \
-  -mcpu=cortex-m0plus \
-  -DCPU_K32L2A41VLH1A \
+CFLAGS += -DCPU_K32L2A41VLH1A
 
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual
@@ -13,9 +11,6 @@ LD_FILE = $(MCU_DIR)/gcc/K32L2A41xxxxA_flash.ld
 SRC_C += \
 	$(MCU_DIR)/project_template/clock_config.c \
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
-
 # For flash-jlink target
 JLINK_DEVICE = K32L2A41xxxxA
 
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/frdm_k32l2a4s.c b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/frdm_k32l2a4s.c
similarity index 100%
rename from hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/frdm_k32l2a4s.c
rename to hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/frdm_k32l2a4s.c
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.h b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.h
similarity index 100%
rename from hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.h
rename to hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.h
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk
similarity index 74%
rename from hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk
rename to hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk
index 5f8ecbfe4..82456b721 100644
--- a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk
+++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk
@@ -1,8 +1,6 @@
 MCU = K32L2B31A
 
-CFLAGS += \
-  -mcpu=cortex-m0plus \
-  -DCPU_K32L2B31VLH0A \
+CFLAGS += -DCPU_K32L2B31VLH0A
 
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls
@@ -13,9 +11,6 @@ LD_FILE = $(MCU_DIR)/gcc/K32L2B31xxxxA_flash.ld
 SRC_C += \
 	$(MCU_DIR)/project_template/clock_config.c \
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
-
 # For flash-jlink target
 JLINK_DEVICE = K32L2B31xxxxA
 
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/frdm_k32l2b.c b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/frdm_k32l2b.c
similarity index 100%
rename from hw/bsp/kinetis_k32l/boards/frdm_k32l2b/frdm_k32l2b.c
rename to hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/frdm_k32l2b.c
diff --git a/hw/bsp/kinetis_k32l/boards/kuiic/K32L2B31xxxxA_flash.ld b/hw/bsp/kinetis_k32l2/boards/kuiic/K32L2B31xxxxA_flash.ld
similarity index 100%
rename from hw/bsp/kinetis_k32l/boards/kuiic/K32L2B31xxxxA_flash.ld
rename to hw/bsp/kinetis_k32l2/boards/kuiic/K32L2B31xxxxA_flash.ld
diff --git a/hw/bsp/kinetis_k32l/boards/kuiic/board.h b/hw/bsp/kinetis_k32l2/boards/kuiic/board.h
similarity index 100%
rename from hw/bsp/kinetis_k32l/boards/kuiic/board.h
rename to hw/bsp/kinetis_k32l2/boards/kuiic/board.h
diff --git a/hw/bsp/kinetis_k32l/boards/kuiic/board.mk b/hw/bsp/kinetis_k32l2/boards/kuiic/board.mk
similarity index 63%
rename from hw/bsp/kinetis_k32l/boards/kuiic/board.mk
rename to hw/bsp/kinetis_k32l2/boards/kuiic/board.mk
index 29a12e982..fc5bdeec8 100644
--- a/hw/bsp/kinetis_k32l/boards/kuiic/board.mk
+++ b/hw/bsp/kinetis_k32l2/boards/kuiic/board.mk
@@ -1,11 +1,6 @@
 MCU = K32L2B31A
 
-# This board uses TinyUF2 for updates
-UF2_FAMILY_ID = 0x7f83e793
-
-CFLAGS += \
-  -mcpu=cortex-m0plus \
-  -DCPU_K32L2B31VLH0A \
+CFLAGS += -DCPU_K32L2B31VLH0A
 
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls
@@ -13,9 +8,6 @@ CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls
 # All source paths should be relative to the top level.
 LD_FILE = $(BOARD_PATH)/K32L2B31xxxxA_flash.ld
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
-
 # For flash-jlink target
 JLINK_DEVICE = K32L2B31xxxxA
 
diff --git a/hw/bsp/kinetis_k32l/boards/kuiic/kuiic.c b/hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.c
similarity index 100%
rename from hw/bsp/kinetis_k32l/boards/kuiic/kuiic.c
rename to hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.c
diff --git a/hw/bsp/kinetis_k32l/family.mk b/hw/bsp/kinetis_k32l2/family.mk
similarity index 89%
rename from hw/bsp/kinetis_k32l/family.mk
rename to hw/bsp/kinetis_k32l2/family.mk
index 41f22e250..357485762 100644
--- a/hw/bsp/kinetis_k32l/family.mk
+++ b/hw/bsp/kinetis_k32l2/family.mk
@@ -1,13 +1,13 @@
+UF2_FAMILY_ID = 0x7f83e793
 SDK_DIR = hw/mcu/nxp/mcux-sdk
 DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
-
 MCU_DIR = $(SDK_DIR)/devices/$(MCU)
+
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m0plus
 
 CFLAGS += \
-  -mthumb \
-  -mabi=aapcs \
-	-DCFG_TUSB_MCU=OPT_MCU_KINETIS_K32
+	-DCFG_TUSB_MCU=OPT_MCU_KINETIS_K32L
 
 SRC_C += \
 	src/portable/nxp/khci/dcd_khci.c \
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 56525725e..9f3be78fd 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -97,7 +97,7 @@
   #define TUP_DCD_ENDPOINT_MAX    8
   #define TUP_RHPORT_HIGHSPEED    1
 
-#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32)
+#elif TU_CHECK_MCU(OPT_MCU_KINETIS_KL, OPT_MCU_KINETIS_K32L)
   #define TUP_USBIP_CHIPIDEA_FS
   #define TUP_USBIP_CHIPIDEA_FS_KINETIS
   #define TUP_DCD_ENDPOINT_MAX    16
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 43e67cf64..f16d8a5d0 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -119,7 +119,8 @@
 
 // NXP Kinetis
 #define OPT_MCU_KINETIS_KL       1200 ///< NXP KL series
-#define OPT_MCU_KINETIS_K32      1201 ///< NXP K32 series
+#define OPT_MCU_KINETIS_K32L     1201 ///< NXP K32L series
+#define OPT_MCU_KINETIS_K32      1201 ///< Alias to K32L
 
 #define OPT_MCU_MKL25ZXX         1200 ///< Alias to KL (obsolete)
 #define OPT_MCU_K32L2BXX         1201 ///< Alias to K32 (obsolete)
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 7e798cf9e..b81dabae0 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -52,7 +52,7 @@ deps_optional = {
                            'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43'],
     'hw/mcu/nxp/mcux-sdk': ['https://github.com/hathach/mcux-sdk.git',
                             '950819b7de9b32f92c3edf396bc5ffb8d66e7009',
-                            'kinetis_k32l lpc51 lpc54 lpc55 mcx imxrt'],
+                            'kinetis_k32l2 lpc51 lpc54 lpc55 mcx imxrt'],
     'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git',
                                          'c3715ce94b6f6391856de56081d4d9b3e98fa93d',
                                          'rp2040'],
@@ -166,7 +166,7 @@ deps_optional = {
                             'ch32v307'],
     'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git',
                     '20285262657d1b482d132d20d755c8c330d55c1f',
-                    'imxrt kinetis_k32l lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x'
+                    'imxrt kinetis_k32l2 lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x'
                     'stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 '
                     'stm32h7 stm32l0 stm32l1 stm32l4 stm32l5 stm32u5 stm32wb'],
     'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git',

From eb7fcf1b7474fd75f43b2501586c8b6b03354d41 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 24 Jun 2023 18:38:41 +0700
Subject: [PATCH 435/691] add CPU_CORE for all family

---
 hw/bsp/lpc11/family.mk             |  7 +------
 hw/bsp/lpc13/family.mk             |  7 +------
 hw/bsp/lpc15/family.mk             |  7 +------
 hw/bsp/lpc17/family.mk             |  7 +------
 hw/bsp/lpc18/family.mk             |  7 +------
 hw/bsp/lpc51/family.mk             |  7 +------
 hw/bsp/lpc54/family.mk             |  9 +--------
 hw/bsp/lpc55/family.mk             |  9 +--------
 hw/bsp/mcx/family.mk               |  2 --
 hw/bsp/mm32/family.mk              |  8 +-------
 hw/bsp/msp432e4/family.mk          | 11 +++--------
 hw/bsp/nrf/family.mk               |  1 -
 hw/bsp/ra/boards/ra4m1_ek/board.mk |  6 +-----
 hw/bsp/ra/boards/ra4m3_ek/board.mk |  6 +-----
 hw/bsp/ra/family.mk                |  4 +---
 hw/bsp/samd11/family.mk            |  6 +-----
 hw/bsp/samd21/family.mk            |  7 +------
 hw/bsp/samd51/family.mk            |  9 +--------
 hw/bsp/same5x/family.mk            |  8 +-------
 hw/bsp/saml2x/family.mk            | 12 +++---------
 hw/bsp/tm4c123/family.mk           |  9 +--------
 hw/bsp/xmc4000/family.mk           | 10 +---------
 22 files changed, 24 insertions(+), 135 deletions(-)

diff --git a/hw/bsp/lpc11/family.mk b/hw/bsp/lpc11/family.mk
index eb427c09d..dee85da90 100644
--- a/hw/bsp/lpc11/family.mk
+++ b/hw/bsp/lpc11/family.mk
@@ -2,12 +2,10 @@ DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
 
 MCU_DIR = hw/mcu/nxp/lpcopen/lpc$(MCU)/lpc_chip_$(MCU)
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m0plus
 
 CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m0plus \
   -nostdlib \
   -D__USE_LPCOPEN \
   -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
@@ -36,8 +34,5 @@ endif
 INC += \
 	$(TOP)/$(MCU_DIR)/inc
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
-
 # For flash-jlink target
 JLINK_DEVICE = LPC11U68
diff --git a/hw/bsp/lpc13/family.mk b/hw/bsp/lpc13/family.mk
index 28f98e4ca..10cf4969d 100644
--- a/hw/bsp/lpc13/family.mk
+++ b/hw/bsp/lpc13/family.mk
@@ -2,12 +2,10 @@ DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
 
 MCU_DIR = hw/mcu/nxp/lpcopen/lpc13xx/lpc_chip_13xx
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m3
 
 CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m3 \
   -nostdlib \
   -DCORE_M3 \
   -D__USE_LPCOPEN \
@@ -34,6 +32,3 @@ SRC_C += \
 
 INC += \
 	$(TOP)/$(MCU_DIR)/inc
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
diff --git a/hw/bsp/lpc15/family.mk b/hw/bsp/lpc15/family.mk
index 0ad1220d6..9f489832f 100644
--- a/hw/bsp/lpc15/family.mk
+++ b/hw/bsp/lpc15/family.mk
@@ -1,12 +1,10 @@
 DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m3
 
 CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m3 \
   -nostdlib \
   -DCORE_M3 \
   -D__USE_LPCOPEN \
@@ -34,6 +32,3 @@ SRC_C += \
 INC += \
 	$(TOP)/$(BOARD_PATH) \
 	$(TOP)/$(MCU_DIR)/inc
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
diff --git a/hw/bsp/lpc17/family.mk b/hw/bsp/lpc17/family.mk
index af01b55a8..abf6abe13 100644
--- a/hw/bsp/lpc17/family.mk
+++ b/hw/bsp/lpc17/family.mk
@@ -2,12 +2,10 @@ DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
 
 MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m3
 
 CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m3 \
   -nostdlib \
   -DCORE_M3 \
   -D__USE_LPCOPEN \
@@ -35,6 +33,3 @@ SRC_C += \
 
 INC += \
 	$(TOP)/$(MCU_DIR)/inc
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
diff --git a/hw/bsp/lpc18/family.mk b/hw/bsp/lpc18/family.mk
index fbe6ad834..9d0f85c20 100644
--- a/hw/bsp/lpc18/family.mk
+++ b/hw/bsp/lpc18/family.mk
@@ -1,12 +1,10 @@
 DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m3
 
 CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m3 \
   -nostdlib \
   -DCORE_M3 \
   -D__USE_LPCOPEN \
@@ -32,6 +30,3 @@ INC += \
 	$(TOP)/$(BOARD_PATH) \
 	$(TOP)/$(MCU_DIR)/inc \
 	$(TOP)/$(MCU_DIR)/inc/config_18xx
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
diff --git a/hw/bsp/lpc51/family.mk b/hw/bsp/lpc51/family.mk
index bfca2f6b1..df5a9958e 100644
--- a/hw/bsp/lpc51/family.mk
+++ b/hw/bsp/lpc51/family.mk
@@ -3,12 +3,10 @@ DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
 
 MCU_DIR = $(SDK_DIR)/devices/$(MCU)
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m0plus
 
 CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m0plus \
   -DCFG_TUSB_MCU=OPT_MCU_LPC51UXX \
   -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
 
@@ -40,6 +38,3 @@ INC += \
 SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S
 
 LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower.a
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
diff --git a/hw/bsp/lpc54/family.mk b/hw/bsp/lpc54/family.mk
index f52b9b5eb..7d8bb86cd 100644
--- a/hw/bsp/lpc54/family.mk
+++ b/hw/bsp/lpc54/family.mk
@@ -2,14 +2,10 @@ SDK_DIR = hw/mcu/nxp/mcux-sdk
 DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m4
 
 CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m4 \
-  -mfloat-abi=hard \
-  -mfpu=fpv4-sp-d16 \
   -DCFG_TUSB_MCU=OPT_MCU_LPC54XXX \
   -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
 
@@ -49,6 +45,3 @@ INC += \
 	$(TOP)/$(SDK_DIR)/drivers/lpc_gpio
 
 SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_CORE).S
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
diff --git a/hw/bsp/lpc55/family.mk b/hw/bsp/lpc55/family.mk
index f9dabcfa3..a87fa5acf 100644
--- a/hw/bsp/lpc55/family.mk
+++ b/hw/bsp/lpc55/family.mk
@@ -3,17 +3,13 @@ SDK_DIR = hw/mcu/nxp/mcux-sdk
 DEPS_SUBMODULES += lib/CMSIS_5 lib/sct_neopixel $(SDK_DIR)
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m33
 
 # Default to Highspeed PORT1
 PORT ?= 1
 
 CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m33 \
-  -mfloat-abi=hard \
-  -mfpu=fpv5-sp-d16 \
   -DCFG_TUSB_MCU=OPT_MCU_LPC55XX \
   -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' \
   -DBOARD_TUD_RHPORT=$(PORT)
@@ -63,6 +59,3 @@ INC += \
 SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_CORE).S
 
 LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower_hardabi.a
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure
diff --git a/hw/bsp/mcx/family.mk b/hw/bsp/mcx/family.mk
index 2722c2038..e384aa8eb 100644
--- a/hw/bsp/mcx/family.mk
+++ b/hw/bsp/mcx/family.mk
@@ -4,9 +4,7 @@ SDK_DIR = hw/mcu/nxp/mcux-sdk
 DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
 
 include $(TOP)/$(BOARD_PATH)/board.mk
-
 CPU_CORE ?= cortex-m33
-include $(TOP)/tools/make/cpu/$(CPU_CORE).mk
 
 # Default to Highspeed PORT1
 PORT ?= 1
diff --git a/hw/bsp/mm32/family.mk b/hw/bsp/mm32/family.mk
index 81af0d166..d5b6e315a 100644
--- a/hw/bsp/mm32/family.mk
+++ b/hw/bsp/mm32/family.mk
@@ -3,13 +3,10 @@ SDK_DIR = hw/mcu/mindmotion/mm32sdk
 DEPS_SUBMODULES += lib/CMSIS_5 $(SDK_DIR)
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m3
 
 CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m3 \
-  -mfloat-abi=soft \
   -nostdlib -nostartfiles \
   -DCFG_TUSB_MCU=OPT_MCU_MM32F327X
 
@@ -29,8 +26,5 @@ INC += \
 	$(TOP)/$(SDK_DIR)/mm32f327x/MM32F327x/Include \
 	$(TOP)/$(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Inc
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
-
 # flash target using on-board
 flash: flash-jlink
diff --git a/hw/bsp/msp432e4/family.mk b/hw/bsp/msp432e4/family.mk
index 2383bc604..b5ade6a52 100644
--- a/hw/bsp/msp432e4/family.mk
+++ b/hw/bsp/msp432e4/family.mk
@@ -1,13 +1,11 @@
 DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/ti
 
+#include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m4
+
 CFLAGS += \
 	-flto \
-	-mthumb \
 	-mslow-flash-data \
-	-mabi=aapcs \
-	-mcpu=cortex-m4 \
-	-mfloat-abi=hard \
-	-mfpu=fpv4-sp-d16 \
 	-D__MSP432E401Y__ \
 	-DCFG_TUSB_MCU=OPT_MCU_MSP432E4
 
@@ -33,9 +31,6 @@ INC += \
 
 SRC_S += $(MCU_DIR)/Source/startup_msp432e411y_gcc.S
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
-
 # For flash-jlink target
 JLINK_DEVICE = MSP432E401Y
 JLINK_IF     = SWD
diff --git a/hw/bsp/nrf/family.mk b/hw/bsp/nrf/family.mk
index 6d067e1c2..cdcfe39bd 100644
--- a/hw/bsp/nrf/family.mk
+++ b/hw/bsp/nrf/family.mk
@@ -5,7 +5,6 @@ include $(TOP)/$(BOARD_PATH)/board.mk
 
 # nRF52 is cortex-m4, nRF53 is cortex-m33
 CPU_CORE ?= cortex-m4
-include $(TOP)/tools/make/cpu/$(CPU_CORE).mk
 
 CFLAGS += \
   -flto \
diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.mk b/hw/bsp/ra/boards/ra4m1_ek/board.mk
index 6a661c0b8..5c193513d 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/board.mk
+++ b/hw/bsp/ra/boards/ra4m1_ek/board.mk
@@ -1,8 +1,4 @@
-CFLAGS += \
-	-mcpu=cortex-m4 \
-	-mfloat-abi=hard \
-	-mfpu=fpv4-sp-d16 \
-	-DCFG_TUSB_MCU=OPT_MCU_RAXXX
+CPU_CORE = cortex-m4
 
 FSP_MCU_DIR = hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/ra4m1
 FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m1_ek
diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.mk b/hw/bsp/ra/boards/ra4m3_ek/board.mk
index d668db0ea..264f29c1a 100644
--- a/hw/bsp/ra/boards/ra4m3_ek/board.mk
+++ b/hw/bsp/ra/boards/ra4m3_ek/board.mk
@@ -1,8 +1,4 @@
-CFLAGS += \
-	-mcpu=cortex-m33 \
-	-mfloat-abi=hard \
-	-mfpu=fpv5-sp-d16 \
-	-DCFG_TUSB_MCU=OPT_MCU_RAXXX
+CPU_CORE = cortex-m33
 
 FSP_MCU_DIR = hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/ra4m3
 FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m3_ek
diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk
index d48272e61..b65c95191 100644
--- a/hw/bsp/ra/family.mk
+++ b/hw/bsp/ra/family.mk
@@ -1,11 +1,9 @@
 DEPS_SUBMODULES += hw/mcu/renesas/fsp lib/CMSIS_5
 
-# Cross Compiler for RA
-CROSS_COMPILE = arm-none-eabi-
-
 include $(TOP)/$(BOARD_PATH)/board.mk
 
 CFLAGS += \
+  -DCFG_TUSB_MCU=OPT_MCU_RAXXX \
 	-Wno-error=undef \
 	-Wno-error=strict-prototypes \
 	-Wno-error=cast-align \
diff --git a/hw/bsp/samd11/family.mk b/hw/bsp/samd11/family.mk
index a2a5268aa..43a60a122 100644
--- a/hw/bsp/samd11/family.mk
+++ b/hw/bsp/samd11/family.mk
@@ -1,11 +1,10 @@
 DEPS_SUBMODULES += hw/mcu/microchip
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m0plus
 
 CFLAGS += \
   -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m0plus \
   -nostdlib -nostartfiles \
   -DCONF_DFLL_OVERWRITE_CALIBRATION=0 \
   -DOSC32K_OVERWRITE_CALIBRATION=0 \
@@ -40,6 +39,3 @@ INC += \
 	$(TOP)/hw/mcu/microchip/samd11/hri \
 	$(TOP)/hw/mcu/microchip/samd11/CMSIS/Include \
 	$(TOP)/hw/mcu/microchip/samd11/CMSIS/Core/Include
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
diff --git a/hw/bsp/samd21/family.mk b/hw/bsp/samd21/family.mk
index 30eccacb2..49a1a781a 100644
--- a/hw/bsp/samd21/family.mk
+++ b/hw/bsp/samd21/family.mk
@@ -2,12 +2,10 @@ UF2_FAMILY_ID = 0x68ed2b88
 DEPS_SUBMODULES += hw/mcu/microchip
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m0plus
 
 CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m0plus \
   -nostdlib -nostartfiles \
   -DCONF_DFLL_OVERWRITE_CALIBRATION=0 \
   -DCFG_TUSB_MCU=OPT_MCU_SAMD21
@@ -39,9 +37,6 @@ INC += \
 	$(TOP)/hw/mcu/microchip/samd21/hri \
 	$(TOP)/hw/mcu/microchip/samd21/CMSIS/Include
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
-
 # flash using bossac at least version 1.8
 # can be found in arduino15/packages/arduino/tools/bossac/
 # Add it to your PATH or change BOSSAC variable to match your installation
diff --git a/hw/bsp/samd51/family.mk b/hw/bsp/samd51/family.mk
index 657e33438..9a6c67e1a 100644
--- a/hw/bsp/samd51/family.mk
+++ b/hw/bsp/samd51/family.mk
@@ -2,14 +2,10 @@ UF2_FAMILY_ID = 0x55114460
 DEPS_SUBMODULES += hw/mcu/microchip
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m4
 
 CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m4 \
-  -mfloat-abi=hard \
-  -mfpu=fpv4-sp-d16 \
   -nostdlib -nostartfiles \
   -DCFG_TUSB_MCU=OPT_MCU_SAMD51
 
@@ -37,9 +33,6 @@ INC += \
 	$(TOP)/hw/mcu/microchip/samd51/hri \
 	$(TOP)/hw/mcu/microchip/samd51/CMSIS/Include
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
-
 # flash using bossac at least version 1.8
 # can be found in arduino15/packages/arduino/tools/bossac/
 # Add it to your PATH or change BOSSAC variable to match your installation
diff --git a/hw/bsp/same5x/family.mk b/hw/bsp/same5x/family.mk
index df1af4a9d..691863f11 100644
--- a/hw/bsp/same5x/family.mk
+++ b/hw/bsp/same5x/family.mk
@@ -2,14 +2,11 @@ DEPS_SUBMODULES += hw/mcu/microchip
 
 SDK_DIR = hw/mcu/microchip/$(MCU)
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m4
 
 CFLAGS += \
   -mthumb \
-  -mabi=aapcs \
   -mlong-calls \
-  -mcpu=cortex-m4 \
-  -mfloat-abi=hard \
-  -mfpu=fpv4-sp-d16 \
   -nostdlib -nostartfiles \
   -DCFG_TUSB_MCU=OPT_MCU_SAME5X
 
@@ -32,9 +29,6 @@ INC += \
 	$(TOP)/$(SDK_DIR)/hri \
 	$(TOP)/$(SDK_DIR)/CMSIS/Include
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
-
 # flash using edbg from https://github.com/ataradov/edbg
 flash-edbg: $(BUILD)/$(PROJECT).bin
 	edbg --verbose -t $(MCU) -pv -f $<
diff --git a/hw/bsp/saml2x/family.mk b/hw/bsp/saml2x/family.mk
index 62e5f8f4a..0acb0ed14 100644
--- a/hw/bsp/saml2x/family.mk
+++ b/hw/bsp/saml2x/family.mk
@@ -1,14 +1,11 @@
 UF2_FAMILY_ID = 0x68ed2b88
 DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/microchip
-
-include $(TOP)/$(BOARD_PATH)/board.mk
-
 MCU_DIR = hw/mcu/microchip/$(SAML_VARIANT)
 
+include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m0plus
+
 CFLAGS += \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m0plus \
   -nostdlib -nostartfiles \
   -DCONF_OSC32K_CALIB_ENABLE=0 \
   -DCFG_TUSB_MCU=OPT_MCU_SAML22
@@ -41,9 +38,6 @@ INC += \
 	$(TOP)/$(MCU_DIR)/hri \
 	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
-
 # flash using bossac at least version 1.8
 # can be found in arduino15/packages/arduino/tools/bossac/
 # Add it to your PATH or change BOSSAC variable to match your installation
diff --git a/hw/bsp/tm4c123/family.mk b/hw/bsp/tm4c123/family.mk
index 021b47fd3..608c530bb 100644
--- a/hw/bsp/tm4c123/family.mk
+++ b/hw/bsp/tm4c123/family.mk
@@ -1,14 +1,10 @@
 DEPS_SUBMODULES += hw/mcu/ti
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m4
 
 CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m4 \
-  -mfloat-abi=hard \
-  -mfpu=fpv4-sp-d16 \
   -DCFG_TUSB_MCU=OPT_MCU_TM4C123 \
   -uvectors \
   -DTM4C123GH6PM
@@ -31,6 +27,3 @@ SRC_C += \
 	src/portable/mentor/musb/hcd_musb.c \
 	$(MCU_DIR)/Source/system_TM4C123.c \
 	$(MCU_DIR)/Source/GCC/tm4c123_startup.c
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
diff --git a/hw/bsp/xmc4000/family.mk b/hw/bsp/xmc4000/family.mk
index 1094f3b72..35c3a58b7 100644
--- a/hw/bsp/xmc4000/family.mk
+++ b/hw/bsp/xmc4000/family.mk
@@ -4,14 +4,10 @@ MCU_DIR = hw/mcu/infineon/mtb-xmclib-cat3
 DEPS_SUBMODULES += $(MCU_DIR)
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m4
 
 CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m4 \
-  -mfloat-abi=hard \
-  -mfpu=fpv4-sp-d16 \
   -nostdlib -nostartfiles \
   -DCFG_TUSB_MCU=OPT_MCU_XMC4000
 
@@ -27,7 +23,6 @@ SRC_C += \
 	$(MCU_DIR)/XMCLib/src/xmc4_gpio.c \
 	$(MCU_DIR)/XMCLib/src/xmc4_scu.c
 
-
 SRC_S += $(MCU_DIR)/CMSIS/Infineon/COMPONENT_$(MCU_VARIANT)/Source/TOOLCHAIN_GCC_ARM/startup_$(MCU_VARIANT).S
 
 INC += \
@@ -35,6 +30,3 @@ INC += \
 	$(TOP)/$(MCU_DIR)/CMSIS/Core/Include \
 	$(TOP)/$(MCU_DIR)/CMSIS/Infineon/COMPONENT_$(MCU_VARIANT)/Include \
 	$(TOP)/$(MCU_DIR)/XMCLib/inc
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F

From 086c1d4090bc3bfdcde56aed5036e3efc6d5ea9f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 24 Jun 2023 18:54:14 +0700
Subject: [PATCH 436/691] more CPU_CORE

---
 .../boards/raspberrypi_zero_w/board.mk               |  4 ++--
 .../broadcom_64bit/boards/raspberrypi_cm4/board.mk   |  4 ++--
 .../boards/raspberrypi_zero2w/board.mk               |  4 ++--
 hw/bsp/kinetis_kl/family.mk                          |  7 +------
 tools/make/cpu/arm1176.mk                            |  9 +++++++++
 tools/make/cpu/cortex-a53.mk                         | 12 ++++++++++++
 tools/make/cpu/cortex-a72.mk                         | 12 ++++++++++++
 tools/make/cpu/cortex-m33.mk                         |  1 +
 8 files changed, 41 insertions(+), 12 deletions(-)
 create mode 100644 tools/make/cpu/arm1176.mk
 create mode 100644 tools/make/cpu/cortex-a53.mk
 create mode 100644 tools/make/cpu/cortex-a72.mk

diff --git a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk
index 77811d18d..052033230 100644
--- a/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk
+++ b/hw/bsp/broadcom_32bit/boards/raspberrypi_zero_w/board.mk
@@ -1,5 +1,5 @@
-CFLAGS += -mcpu=arm1176jzf-s \
-          -DBCM_VERSION=2835 \
+CPU_CORE = arm1176
+CFLAGS += -DBCM_VERSION=2835 \
           -DCFG_TUSB_MCU=OPT_MCU_BCM2835
 
 SUFFIX =
diff --git a/hw/bsp/broadcom_64bit/boards/raspberrypi_cm4/board.mk b/hw/bsp/broadcom_64bit/boards/raspberrypi_cm4/board.mk
index 5706b8318..702f10137 100644
--- a/hw/bsp/broadcom_64bit/boards/raspberrypi_cm4/board.mk
+++ b/hw/bsp/broadcom_64bit/boards/raspberrypi_cm4/board.mk
@@ -1,3 +1,3 @@
-CFLAGS += -mcpu=cortex-a72 \
-          -DBCM_VERSION=2711 \
+CPU_CORE = cortex-a72
+CFLAGS += -DBCM_VERSION=2711 \
           -DCFG_TUSB_MCU=OPT_MCU_BCM2711
diff --git a/hw/bsp/broadcom_64bit/boards/raspberrypi_zero2w/board.mk b/hw/bsp/broadcom_64bit/boards/raspberrypi_zero2w/board.mk
index 3060b0571..da3fe17bc 100644
--- a/hw/bsp/broadcom_64bit/boards/raspberrypi_zero2w/board.mk
+++ b/hw/bsp/broadcom_64bit/boards/raspberrypi_zero2w/board.mk
@@ -1,3 +1,3 @@
-CFLAGS += -mcpu=cortex-a53 \
-          -DBCM_VERSION=2837 \
+CPU_CORE = cortex-a53
+CFLAGS += -DBCM_VERSION=2837 \
           -DCFG_TUSB_MCU=OPT_MCU_BCM2837
diff --git a/hw/bsp/kinetis_kl/family.mk b/hw/bsp/kinetis_kl/family.mk
index 2bed6b486..edb2f3366 100644
--- a/hw/bsp/kinetis_kl/family.mk
+++ b/hw/bsp/kinetis_kl/family.mk
@@ -3,11 +3,9 @@ DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
 
 MCU_DIR = $(SDK_DIR)/devices/$(MCU)
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m0plus
 
 CFLAGS += \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m0plus \
   -DCFG_TUSB_MCU=OPT_MCU_KINETIS_KL \
 
 LDFLAGS += \
@@ -34,6 +32,3 @@ INC += \
 	$(TOP)/$(SDK_DIR)/drivers/port \
 	$(TOP)/$(SDK_DIR)/drivers/smc \
 	$(TOP)/$(SDK_DIR)/drivers/uart \
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
diff --git a/tools/make/cpu/arm1176.mk b/tools/make/cpu/arm1176.mk
new file mode 100644
index 000000000..022ccf7ad
--- /dev/null
+++ b/tools/make/cpu/arm1176.mk
@@ -0,0 +1,9 @@
+ifeq ($(TOOLCHAIN),gcc)
+  CFLAGS += \
+    -mcpu=arm1176jzf-s \
+
+else ifeq ($(TOOLCHAIN),iar)
+	#CFLAGS += --cpu cortex-a53
+	#ASFLAGS += --cpu cortex-a53
+
+endif
diff --git a/tools/make/cpu/cortex-a53.mk b/tools/make/cpu/cortex-a53.mk
new file mode 100644
index 000000000..42e522ecf
--- /dev/null
+++ b/tools/make/cpu/cortex-a53.mk
@@ -0,0 +1,12 @@
+ifeq ($(TOOLCHAIN),gcc)
+  CFLAGS += \
+    -mcpu=cortex-a53 \
+
+else ifeq ($(TOOLCHAIN),iar)
+	CFLAGS += \
+		--cpu cortex-a53 \
+
+	ASFLAGS += \
+		--cpu cortex-a53 \
+
+endif
diff --git a/tools/make/cpu/cortex-a72.mk b/tools/make/cpu/cortex-a72.mk
new file mode 100644
index 000000000..1b3d8da4a
--- /dev/null
+++ b/tools/make/cpu/cortex-a72.mk
@@ -0,0 +1,12 @@
+ifeq ($(TOOLCHAIN),gcc)
+  CFLAGS += \
+    -mcpu=cortex-a72 \
+
+else ifeq ($(TOOLCHAIN),iar)
+	CFLAGS += \
+		--cpu cortex-a72 \
+
+	ASFLAGS += \
+		--cpu cortex-a72 \
+
+endif
diff --git a/tools/make/cpu/cortex-m33.mk b/tools/make/cpu/cortex-m33.mk
index 240ed0d49..e53f5c2b1 100644
--- a/tools/make/cpu/cortex-m33.mk
+++ b/tools/make/cpu/cortex-m33.mk
@@ -13,6 +13,7 @@ else ifeq ($(TOOLCHAIN),iar)
 	ASFLAGS += \
 		--cpu cortex-m33 \
 		--fpu VFPv5-SP \
+
 endif
 
 FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure

From 7d0ce5605ace2acba928f444f3dd7eb6de0b29ec Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 24 Jun 2023 19:08:37 +0700
Subject: [PATCH 437/691] allow to skip CPU_CORE

---
 .github/workflows/build_iar.yml | 2 +-
 examples/make.mk                | 5 +++++
 tools/build_family.py           | 2 +-
 tools/make/toolchain/arm_gcc.mk | 3 ---
 tools/make/toolchain/arm_iar.mk | 2 --
 5 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml
index 48d66240e..8c9a500d7 100644
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@@ -47,7 +47,7 @@ jobs:
       run: python3 tools/get_deps.py ${{ matrix.family }}
 
     - name: Build
-      run: python3 tools/build_family.py ${{ matrix.family }} CC=iccarm
+      run: python3 tools/build_family.py ${{ matrix.family }} TOOLCHAIN=iar
 
   cmake:
     runs-on: [self-hosted, Linux, X64, hifiphile]
diff --git a/examples/make.mk b/examples/make.mk
index 4fcde83c8..3c3a920cc 100644
--- a/examples/make.mk
+++ b/examples/make.mk
@@ -137,5 +137,10 @@ else ifeq ($(LOGGER),swo)
   CFLAGS += -DLOGGER_SWO
 endif
 
+# CPU specific flags
+ifdef CPU_CORE
+include $(TOP)/tools/make/cpu/$(CPU_CORE).mk
+endif
+
 # toolchain specific
 include $(TOP)/tools/make/toolchain/arm_$(TOOLCHAIN).mk
diff --git a/tools/build_family.py b/tools/build_family.py
index 9b612b4cb..fb90e0edb 100644
--- a/tools/build_family.py
+++ b/tools/build_family.py
@@ -11,7 +11,7 @@ SKIPPED = "\033[33mskipped\033[0m"
 
 build_separator = '-' * 106
 
-make_iar_option = 'CC=iccarm'
+make_iar_option = 'TOOLCHAIN=iar'
 
 def filter_with_input(mylist):
     if len(sys.argv) > 1:
diff --git a/tools/make/toolchain/arm_gcc.mk b/tools/make/toolchain/arm_gcc.mk
index d5ee98def..693fda0b3 100644
--- a/tools/make/toolchain/arm_gcc.mk
+++ b/tools/make/toolchain/arm_gcc.mk
@@ -9,9 +9,6 @@ GDB = $(CROSS_COMPILE)gdb
 OBJCOPY = $(CROSS_COMPILE)objcopy
 SIZE = $(CROSS_COMPILE)size
 
-# CPU specific flags
-include $(TOP)/tools/make/cpu/$(CPU_CORE).mk
-
 # ---------------------------------------
 # Compiler Flags
 # ---------------------------------------
diff --git a/tools/make/toolchain/arm_iar.mk b/tools/make/toolchain/arm_iar.mk
index 42b31cfd3..f1850add7 100644
--- a/tools/make/toolchain/arm_iar.mk
+++ b/tools/make/toolchain/arm_iar.mk
@@ -4,8 +4,6 @@ LD = ilinkarm
 OBJCOPY = ielftool --silent
 SIZE = size
 
-include $(TOP)/tools/make/cpu/$(CPU_CORE).mk
-
 # Enable extension mode (gcc compatible)
 CFLAGS += -e --debug --silent
 

From 2216704db8801b359659bf191ae955e4c626f031 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 24 Jun 2023 19:31:33 +0700
Subject: [PATCH 438/691] rename GCC_CFLAGS to CFLAGS_GCC, GCC_SRC_S to
 SRC_S_GCC etc ..

---
 hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk   |  9 ++-------
 hw/bsp/stm32f0/boards/stm32f072disco/board.mk      |  9 ++++-----
 hw/bsp/stm32f0/boards/stm32f072eval/board.mk       |  8 ++++----
 hw/bsp/stm32f0/family.mk                           | 11 +++++++++--
 hw/bsp/stm32f1/boards/stm32f103_bluepill/board.mk  | 12 +++++-------
 hw/bsp/stm32f1/boards/stm32f103_mini_2/board.mk    | 12 +++++-------
 hw/bsp/stm32f1/family.mk                           |  6 +++++-
 hw/bsp/stm32f2/family.mk                           |  4 ++--
 hw/bsp/stm32f4/boards/feather_stm32f405/board.mk   |  8 ++++----
 hw/bsp/stm32f4/boards/pyboardv11/board.mk          |  8 ++++----
 hw/bsp/stm32f4/boards/stm32f401blackpill/board.mk  |  8 ++++----
 hw/bsp/stm32f4/boards/stm32f407disco/board.mk      |  8 ++++----
 hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk  |  8 ++++----
 hw/bsp/stm32f4/boards/stm32f411disco/board.mk      |  8 ++++----
 hw/bsp/stm32f4/boards/stm32f412disco/board.mk      |  8 ++++----
 hw/bsp/stm32f4/boards/stm32f412nucleo/board.mk     |  8 ++++----
 hw/bsp/stm32f4/boards/stm32f439nucleo/board.mk     |  8 ++++----
 hw/bsp/stm32f4/family.mk                           |  4 ++--
 hw/bsp/stm32f7/boards/stlinkv3mini/board.mk        |  8 ++++----
 hw/bsp/stm32f7/boards/stm32f723disco/board.mk      |  8 ++++----
 hw/bsp/stm32f7/boards/stm32f746disco/board.mk      |  8 ++++----
 hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk     |  8 ++++----
 hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk     |  8 ++++----
 hw/bsp/stm32f7/boards/stm32f769disco/board.mk      |  8 ++++----
 hw/bsp/stm32f7/family.mk                           |  4 ++--
 hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.mk     |  8 ++++----
 hw/bsp/stm32g0/family.mk                           |  4 ++--
 hw/bsp/stm32g4/boards/b_g474e_dpow1/board.mk       | 11 ++++-------
 hw/bsp/stm32g4/boards/stm32g474nucleo/board.mk     | 11 ++++-------
 hw/bsp/stm32g4/family.mk                           | 11 +++++++++--
 hw/bsp/stm32h7/boards/daisyseed/board.mk           |  8 ++++----
 hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk     |  8 ++++----
 hw/bsp/stm32h7/boards/stm32h743eval/board.mk       |  8 ++++----
 hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk     |  8 ++++----
 hw/bsp/stm32h7/boards/stm32h745disco/board.mk      |  8 ++++----
 hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk |  8 ++++----
 hw/bsp/stm32h7/family.mk                           |  4 ++--
 hw/bsp/stm32l4/boards/stm32l412nucleo/board.mk     |  8 ++++----
 hw/bsp/stm32l4/boards/stm32l476disco/board.mk      |  8 ++++----
 hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.mk     |  8 ++++----
 hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.mk     |  8 ++++----
 hw/bsp/stm32l4/family.mk                           |  4 ++--
 tools/make/toolchain/arm_gcc.mk                    |  3 ---
 tools/make/toolchain/arm_gcc_rules.mk              |  8 ++++----
 tools/make/toolchain/arm_iar_rules.mk              |  4 ++--
 45 files changed, 173 insertions(+), 174 deletions(-)

diff --git a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk
index 1cc443352..f8f0952e8 100644
--- a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk
+++ b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk
@@ -1,12 +1,7 @@
 CFLAGS += -DSTM32F070xB -DCFG_EXAMPLE_VIDEO_READONLY
 
-# GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f070xb.s
-GCC_LD_FILE = $(BOARD_PATH)/stm32F070rbtx_flash.ld
-
-# IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f070xb.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f070xb_flash.icf
+# Linker
+LD_FILE_GCC = $(BOARD_PATH)/stm32F070rbtx_flash.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f070rb
diff --git a/hw/bsp/stm32f0/boards/stm32f072disco/board.mk b/hw/bsp/stm32f0/boards/stm32f072disco/board.mk
index 4216ba186..57c658629 100644
--- a/hw/bsp/stm32f0/boards/stm32f072disco/board.mk
+++ b/hw/bsp/stm32f0/boards/stm32f072disco/board.mk
@@ -1,10 +1,9 @@
+MCU_VARIANT = stm32f072xb
+
 CFLAGS += -DSTM32F072xB -DCFG_EXAMPLE_VIDEO_READONLY
 
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f072xb.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32F072RBTx_FLASH.ld
-
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f072xb.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f072xb_flash.icf
+# Linker
+LD_FILE_GCC = $(BOARD_PATH)/STM32F072RBTx_FLASH.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f072rb
diff --git a/hw/bsp/stm32f0/boards/stm32f072eval/board.mk b/hw/bsp/stm32f0/boards/stm32f072eval/board.mk
index bb9cba22a..c368bd8af 100644
--- a/hw/bsp/stm32f0/boards/stm32f072eval/board.mk
+++ b/hw/bsp/stm32f0/boards/stm32f072eval/board.mk
@@ -1,10 +1,10 @@
 CFLAGS += -DSTM32F072xB -DLSI_VALUE=40000 -DCFG_EXAMPLE_VIDEO_READONLY
 
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f072xb.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32F072VBTx_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f072xb.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32F072VBTx_FLASH.ld
 
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f072xb.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f072xb_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f072xb.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f072xb_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f072vb
diff --git a/hw/bsp/stm32f0/family.mk b/hw/bsp/stm32f0/family.mk
index 200c4f757..129a3b73a 100644
--- a/hw/bsp/stm32f0/family.mk
+++ b/hw/bsp/stm32f0/family.mk
@@ -16,12 +16,12 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32F0
 
 # GCC Flags
-GCC_CFLAGS += \
+CFLAGS_GCC += \
   -flto \
   -nostdlib -nostartfiles \
 
 # suppress warning caused by vendor mcu driver
-GCC_CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align
+CFLAGS_GCC += -Wno-error=unused-parameter -Wno-error=cast-align
 
 # ------------------------
 # All source paths should be relative to the top level.
@@ -44,3 +44,10 @@ INC += \
   $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
   $(TOP)/$(ST_CMSIS)/Include \
   $(TOP)/$(ST_HAL_DRIVER)/Inc
+
+# Startup
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
+
+# Linker
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf
diff --git a/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.mk b/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.mk
index 159b3ecb6..6c5f34501 100644
--- a/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.mk
+++ b/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.mk
@@ -1,12 +1,10 @@
+MCU_VARIANT = stm32f103xb
+
 CFLAGS += -DSTM32F103xB -DHSE_VALUE=8000000U -DCFG_EXAMPLE_VIDEO_READONLY
 
-# GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f103xb.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32F103X8_FLASH.ld
-
-# IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f103xb.s
-IAR_LD_FILE = $(BOARD_PATH)/stm32f103x8_flash.icf
+# Linker
+LD_FILE_GCC = $(BOARD_PATH)/STM32F103X8_FLASH.ld
+LD_FILE_IAR = $(BOARD_PATH)/stm32f103x8_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f103c8
diff --git a/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.mk b/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.mk
index efea75be7..7e95c1fe1 100644
--- a/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.mk
+++ b/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.mk
@@ -1,12 +1,10 @@
+MCU_VARIANT = stm32f103xb
+
 CFLAGS += -DSTM32F103xB -DHSE_VALUE=8000000U
 
-# GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f103xb.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32F103XC_FLASH.ld
-
-# IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f103xb.s
-IAR_LD_FILE = $(BOARD_PATH)/stm32f103xc_flash.icf
+# Linker
+LD_FILE_GCC = $(BOARD_PATH)/STM32F103XC_FLASH.ld
+LD_FILE_IAR = $(BOARD_PATH)/stm32f103xc_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f103rc
diff --git a/hw/bsp/stm32f1/family.mk b/hw/bsp/stm32f1/family.mk
index 4813fba2b..c9321c3cb 100644
--- a/hw/bsp/stm32f1/family.mk
+++ b/hw/bsp/stm32f1/family.mk
@@ -14,7 +14,7 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32F1
 
 # GCC Flags
-GCC_CFLAGS += \
+CFLAGS_GCC += \
   -flto \
   -nostdlib -nostartfiles \
 
@@ -36,6 +36,10 @@ INC += \
   $(TOP)/$(ST_CMSIS)/Include \
   $(TOP)/$(ST_HAL_DRIVER)/Inc
 
+# Startup
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
+
 # flash target ROM bootloader
 flash-dfu-util: $(BUILD)/$(PROJECT).bin
 	dfu-util -R -a 0 --dfuse-address 0x08000000 -D $<
diff --git a/hw/bsp/stm32f2/family.mk b/hw/bsp/stm32f2/family.mk
index fd27c0e68..ce50b16ad 100644
--- a/hw/bsp/stm32f2/family.mk
+++ b/hw/bsp/stm32f2/family.mk
@@ -14,12 +14,12 @@ CPU_CORE ?= cortex-m3
 CFLAGS += \
 	-DCFG_TUSB_MCU=OPT_MCU_STM32F2
 
-GCC_CFLAGS += \
+CFLAGS_GCC += \
   -flto \
   -nostdlib -nostartfiles \
 
 # mcu driver cause following warnings
-GCC_CFLAGS += -Wno-error=sign-compare
+CFLAGS_GCC += -Wno-error=sign-compare
 
 SRC_C += \
   src/portable/synopsys/dwc2/dcd_dwc2.c \
diff --git a/hw/bsp/stm32f4/boards/feather_stm32f405/board.mk b/hw/bsp/stm32f4/boards/feather_stm32f405/board.mk
index 1962dd9d8..cfd1d8b3b 100644
--- a/hw/bsp/stm32f4/boards/feather_stm32f405/board.mk
+++ b/hw/bsp/stm32f4/boards/feather_stm32f405/board.mk
@@ -1,12 +1,12 @@
 CFLAGS += -DSTM32F405xx
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f405xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f405xx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f405xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f405xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f405rg
diff --git a/hw/bsp/stm32f4/boards/pyboardv11/board.mk b/hw/bsp/stm32f4/boards/pyboardv11/board.mk
index 0a9100e1e..4c52e004a 100644
--- a/hw/bsp/stm32f4/boards/pyboardv11/board.mk
+++ b/hw/bsp/stm32f4/boards/pyboardv11/board.mk
@@ -1,12 +1,12 @@
 CFLAGS += -DSTM32F405xx
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f405xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f405xx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f405xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f405xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f405rg
diff --git a/hw/bsp/stm32f4/boards/stm32f401blackpill/board.mk b/hw/bsp/stm32f4/boards/stm32f401blackpill/board.mk
index 11f9b81aa..3285bd232 100644
--- a/hw/bsp/stm32f4/boards/stm32f401blackpill/board.mk
+++ b/hw/bsp/stm32f4/boards/stm32f401blackpill/board.mk
@@ -1,12 +1,12 @@
 CFLAGS += -DSTM32F401xC
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f401xc.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32F401VCTx_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f401xc.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32F401VCTx_FLASH.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f401xc.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f401xc_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f401xc.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f401xc_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f401cc
diff --git a/hw/bsp/stm32f4/boards/stm32f407disco/board.mk b/hw/bsp/stm32f4/boards/stm32f407disco/board.mk
index a184804d3..4de656b0c 100644
--- a/hw/bsp/stm32f4/boards/stm32f407disco/board.mk
+++ b/hw/bsp/stm32f4/boards/stm32f407disco/board.mk
@@ -1,12 +1,12 @@
 CFLAGS += -DSTM32F407xx
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f407xx.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32F407VGTx_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f407xx.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32F407VGTx_FLASH.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f407xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f407xx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f407xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f407xx_flash.icf
 
 
 # For flash-jlink target
diff --git a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk
index ac15eaa5d..7af7ca47c 100644
--- a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk
+++ b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk
@@ -1,12 +1,12 @@
 CFLAGS += -DSTM32F411xE
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32F411CEUx_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32F411CEUx_FLASH.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f411xe.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f411xe_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f411xe.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f411xe_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f411ce
diff --git a/hw/bsp/stm32f4/boards/stm32f411disco/board.mk b/hw/bsp/stm32f4/boards/stm32f411disco/board.mk
index c5736050c..09fa50bd3 100644
--- a/hw/bsp/stm32f4/boards/stm32f411disco/board.mk
+++ b/hw/bsp/stm32f4/boards/stm32f411disco/board.mk
@@ -1,12 +1,12 @@
 CFLAGS += -DSTM32F411xE
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32F411VETx_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32F411VETx_FLASH.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f411xe.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f411xe_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f411xe.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f411xe_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f411ve
diff --git a/hw/bsp/stm32f4/boards/stm32f412disco/board.mk b/hw/bsp/stm32f4/boards/stm32f412disco/board.mk
index 7dc3699e0..f767ac6c4 100644
--- a/hw/bsp/stm32f4/boards/stm32f412disco/board.mk
+++ b/hw/bsp/stm32f4/boards/stm32f412disco/board.mk
@@ -1,12 +1,12 @@
 CFLAGS += -DSTM32F412Zx
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f412zx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f412zx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f412zx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f412zx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f412zg
diff --git a/hw/bsp/stm32f4/boards/stm32f412nucleo/board.mk b/hw/bsp/stm32f4/boards/stm32f412nucleo/board.mk
index 7dc3699e0..f767ac6c4 100644
--- a/hw/bsp/stm32f4/boards/stm32f412nucleo/board.mk
+++ b/hw/bsp/stm32f4/boards/stm32f412nucleo/board.mk
@@ -1,12 +1,12 @@
 CFLAGS += -DSTM32F412Zx
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f412zx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f412zx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f412zx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f412zx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f412zg
diff --git a/hw/bsp/stm32f4/boards/stm32f439nucleo/board.mk b/hw/bsp/stm32f4/boards/stm32f439nucleo/board.mk
index e1f337a7e..2ab32b7f3 100644
--- a/hw/bsp/stm32f4/boards/stm32f439nucleo/board.mk
+++ b/hw/bsp/stm32f4/boards/stm32f439nucleo/board.mk
@@ -1,12 +1,12 @@
 CFLAGS += -DSTM32F439xx
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f439xx.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32F439ZITX_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f439xx.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32F439ZITX_FLASH.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f439xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f439xx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f439xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f439xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f439zi
diff --git a/hw/bsp/stm32f4/family.mk b/hw/bsp/stm32f4/family.mk
index 9c132fd21..38592ecb0 100644
--- a/hw/bsp/stm32f4/family.mk
+++ b/hw/bsp/stm32f4/family.mk
@@ -15,12 +15,12 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32F4
 
 # GCC Flags
-GCC_CFLAGS += \
+CFLAGS_GCC += \
   -flto \
   -nostdlib -nostartfiles
 
 # suppress warning caused by vendor mcu driver
-GCC_CFLAGS += -Wno-error=cast-align
+CFLAGS_GCC += -Wno-error=cast-align
 
 # -----------------
 # Sources & Include
diff --git a/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk b/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk
index e1d352cc9..b59125edc 100644
--- a/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk
+++ b/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk
@@ -7,12 +7,12 @@ CFLAGS += \
   -DHSE_VALUE=25000000 \
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f723xx.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32F723xE_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f723xx.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32F723xE_FLASH.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f723xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f723xx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f723xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f723xx_flash.icf
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32f7/boards/stm32f723disco/board.mk b/hw/bsp/stm32f7/boards/stm32f723disco/board.mk
index 6ddb727c7..168ca5dad 100644
--- a/hw/bsp/stm32f7/boards/stm32f723disco/board.mk
+++ b/hw/bsp/stm32f7/boards/stm32f723disco/board.mk
@@ -6,12 +6,12 @@ CFLAGS += \
   -DHSE_VALUE=25000000 \
 
 # GCC
-GCC_LD_FILE = $(BOARD_PATH)/STM32F723xE_FLASH.ld
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f723xx.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32F723xE_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f723xx.s
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f723xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f723xx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f723xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f723xx_flash.icf
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32f7/boards/stm32f746disco/board.mk b/hw/bsp/stm32f7/boards/stm32f746disco/board.mk
index ba31baa16..acda5e2e8 100644
--- a/hw/bsp/stm32f7/boards/stm32f746disco/board.mk
+++ b/hw/bsp/stm32f7/boards/stm32f746disco/board.mk
@@ -6,12 +6,12 @@ CFLAGS += \
   -DHSE_VALUE=25000000
 
 # GCC
-GCC_LD_FILE = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f746xx.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f746xx.s
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f746xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f746xx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f746xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f746xx_flash.icf
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk
index e4d31040e..511433885 100644
--- a/hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk
+++ b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk
@@ -6,12 +6,12 @@ CFLAGS += \
   -DHSE_VALUE=8000000
 
 # GCC
-GCC_LD_FILE = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f746xx.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f746xx.s
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f746xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f746xx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f746xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f746xx_flash.icf
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk
index be5862612..329771986 100644
--- a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk
+++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk
@@ -6,12 +6,12 @@ CFLAGS += \
 	-DHSE_VALUE=8000000 \
 
 # GCC
-GCC_LD_FILE = $(BOARD_PATH)/STM32F767ZITx_FLASH.ld
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f767xx.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32F767ZITx_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f767xx.s
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f767xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f767xx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f767xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f767xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f767zi
diff --git a/hw/bsp/stm32f7/boards/stm32f769disco/board.mk b/hw/bsp/stm32f7/boards/stm32f769disco/board.mk
index 18f59e8b2..20042db98 100644
--- a/hw/bsp/stm32f7/boards/stm32f769disco/board.mk
+++ b/hw/bsp/stm32f7/boards/stm32f769disco/board.mk
@@ -7,12 +7,12 @@ CFLAGS += \
   -DHSE_VALUE=25000000 \
 
 # GCC
-GCC_LD_FILE = $(BOARD_PATH)/STM32F769ZITx_FLASH.ld
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f769xx.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32F769ZITx_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f769xx.s
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f769xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f769xx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f769xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f769xx_flash.icf
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32f7/family.mk b/hw/bsp/stm32f7/family.mk
index 0b3b641d8..1a15a743c 100644
--- a/hw/bsp/stm32f7/family.mk
+++ b/hw/bsp/stm32f7/family.mk
@@ -28,12 +28,12 @@ else
 endif
 
 # GCC Flags
-GCC_CFLAGS += \
+CFLAGS_GCC += \
   -flto \
   -nostdlib -nostartfiles
 
 # mcu driver cause following warnings
-GCC_CFLAGS += -Wno-error=shadow -Wno-error=cast-align
+CFLAGS_GCC += -Wno-error=shadow -Wno-error=cast-align
 
 # -----------------
 # Sources & Include
diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.mk b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.mk
index 50f282b09..6a6078d5f 100644
--- a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.mk
+++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.mk
@@ -2,12 +2,12 @@ CFLAGS += \
 	-DSTM32G0B1xx
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32g0b1xx.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32G0B1RETx_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32g0b1xx.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32G0B1RETx_FLASH.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32g0b1xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32g0b1xx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32g0b1xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32g0b1xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32g0b1re
diff --git a/hw/bsp/stm32g0/family.mk b/hw/bsp/stm32g0/family.mk
index 76f1524e5..412c73291 100644
--- a/hw/bsp/stm32g0/family.mk
+++ b/hw/bsp/stm32g0/family.mk
@@ -14,12 +14,12 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32G0
 
 # GCC Flags
-GCC_CFLAGS += \
+CFLAGS_GCC += \
   -flto \
   -nostdlib -nostartfiles
 
 # suppress warning caused by vendor mcu driver
-GCC_CFLAGS += -Wno-error=cast-align
+CFLAGS_GCC += -Wno-error=cast-align
 
 # -----------------
 # Sources & Include
diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.mk b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.mk
index 75cd9d8f5..6266b3ccc 100644
--- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.mk
+++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.mk
@@ -1,13 +1,10 @@
+MCU_VARIANT = stm32g474xx
+
 CFLAGS += \
 	-DSTM32G474xx \
 
-# GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32g474xx.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32G474RETx_FLASH.ld
-
-# IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32g474xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32g474xx_flash.icf
+# Linker
+LD_FILE_GCC = $(BOARD_PATH)/STM32G474RETx_FLASH.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32g474re
diff --git a/hw/bsp/stm32g4/boards/stm32g474nucleo/board.mk b/hw/bsp/stm32g4/boards/stm32g474nucleo/board.mk
index 2f6ec0ed6..dc46af1d1 100644
--- a/hw/bsp/stm32g4/boards/stm32g474nucleo/board.mk
+++ b/hw/bsp/stm32g4/boards/stm32g474nucleo/board.mk
@@ -1,14 +1,11 @@
+MCU_VARIANT = stm32g474xx
+
 CFLAGS += \
 	-DSTM32G474xx \
 	-DHSE_VALUE=24000000
 
-# GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32g474xx.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32G474RETx_FLASH.ld
-
-# IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32g474xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32g474xx_flash.icf
+# Linker
+LD_FILE_GCC = $(BOARD_PATH)/STM32G474RETx_FLASH.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32g474re
diff --git a/hw/bsp/stm32g4/family.mk b/hw/bsp/stm32g4/family.mk
index 8ee453aed..2efe91449 100644
--- a/hw/bsp/stm32g4/family.mk
+++ b/hw/bsp/stm32g4/family.mk
@@ -15,12 +15,12 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32G4
 
 # GCC Flags
-GCC_CFLAGS += \
+CFLAGS_GCC += \
   -flto \
   -nostdlib -nostartfiles \
 
 # suppress warning caused by vendor mcu driver
-GCC_CFLAGS += -Wno-error=cast-align
+CFLAGS_GCC += -Wno-error=cast-align
 
 # -----------------
 # Sources & Include
@@ -45,5 +45,12 @@ INC += \
 	$(TOP)/$(ST_CMSIS)/Include \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
+# Startup
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
+
+# Linker
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf
+
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32h7/boards/daisyseed/board.mk b/hw/bsp/stm32h7/boards/daisyseed/board.mk
index d53782496..da2eb4433 100644
--- a/hw/bsp/stm32h7/boards/daisyseed/board.mk
+++ b/hw/bsp/stm32h7/boards/daisyseed/board.mk
@@ -4,12 +4,12 @@ CFLAGS += -DSTM32H750xx -DCORE_CM7 -DHSE_VALUE=16000000
 PORT ?= 0
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h750xx.s
-GCC_LD_FILE = $(BOARD_PATH)/stm32h750ibkx_flash.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h750xx.s
+LD_FILE_GCC = $(BOARD_PATH)/stm32h750ibkx_flash.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h750xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h750xx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h750xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h750xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32h750ibk6_m7
diff --git a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk
index 9cf241df8..57a316f41 100644
--- a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk
+++ b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk
@@ -4,12 +4,12 @@ CFLAGS += -DSTM32H723xx -DHSE_VALUE=8000000
 PORT ?= 0
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h723xx.s
-GCC_LD_FILE =  $(FAMILY_PATH)/linker/stm32h723xx_flash.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h723xx.s
+LD_FILE_GCC =  $(FAMILY_PATH)/linker/stm32h723xx_flash.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h723xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h723xx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h723xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h723xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32h723zg
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.mk b/hw/bsp/stm32h7/boards/stm32h743eval/board.mk
index 558e943b4..36882a0e5 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/board.mk
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.mk
@@ -5,12 +5,12 @@ PORT ?= 1
 SPEED ?= high
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s
-GCC_LD_FILE = $(FAMILY_PATH)/linker/stm32h743xx_flash.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s
+LD_FILE_GCC = $(FAMILY_PATH)/linker/stm32h743xx_flash.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h743xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h743xx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h743xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h743xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32h743xi
diff --git a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk
index 0bff0940e..f641b77aa 100644
--- a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk
+++ b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk
@@ -4,12 +4,12 @@ CFLAGS += -DSTM32H743xx -DHSE_VALUE=8000000
 PORT ?= 0
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s
-GCC_LD_FILE = $(FAMILY_PATH)/linker/stm32h743xx_flash.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s
+LD_FILE_GCC = $(FAMILY_PATH)/linker/stm32h743xx_flash.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h743xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h743xx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h743xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h743xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32h743zi
diff --git a/hw/bsp/stm32h7/boards/stm32h745disco/board.mk b/hw/bsp/stm32h7/boards/stm32h745disco/board.mk
index 86347ade7..9c3615f05 100644
--- a/hw/bsp/stm32h7/boards/stm32h745disco/board.mk
+++ b/hw/bsp/stm32h7/boards/stm32h745disco/board.mk
@@ -7,12 +7,12 @@ CFLAGS += -DSTM32H745xx -DCORE_CM7 -DHSE_VALUE=25000000
 PORT ?= 0
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h745xx.s
-GCC_LD_FILE = $(ST_CMSIS)/Source/Templates/gcc/linker/stm32h745xx_flash_CM7.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h745xx.s
+LD_FILE_GCC = $(ST_CMSIS)/Source/Templates/gcc/linker/stm32h745xx_flash_CM7.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h745xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h745xx_flash_CM7.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h745xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h745xx_flash_CM7.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32h745xi_m7
diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk
index 9997faff9..cea4bfacb 100644
--- a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk
+++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk
@@ -10,12 +10,12 @@ SRC_C += \
   $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_tim_ex.c
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s
-GCC_LD_FILE = $(FAMILY_PATH)/linker/stm32h743xx_flash.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h743xx.s
+LD_FILE_GCC = $(FAMILY_PATH)/linker/stm32h743xx_flash.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h743xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h743xx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h743xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h743xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32h743ii
diff --git a/hw/bsp/stm32h7/family.mk b/hw/bsp/stm32h7/family.mk
index 48730bbb4..a1ff26d0b 100644
--- a/hw/bsp/stm32h7/family.mk
+++ b/hw/bsp/stm32h7/family.mk
@@ -28,12 +28,12 @@ else
 endif
 
 # GCC Flags
-GCC_CFLAGS += \
+CFLAGS_GCC += \
   -flto \
   -nostdlib -nostartfiles
 
 # suppress warning caused by vendor mcu driver
-GCC_CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align -Wno-error=unused-parameter
+CFLAGS_GCC += -Wno-error=maybe-uninitialized -Wno-error=cast-align -Wno-error=unused-parameter
 
 # -----------------
 # Sources & Include
diff --git a/hw/bsp/stm32l4/boards/stm32l412nucleo/board.mk b/hw/bsp/stm32l4/boards/stm32l412nucleo/board.mk
index 854397fc8..87b333500 100644
--- a/hw/bsp/stm32l4/boards/stm32l412nucleo/board.mk
+++ b/hw/bsp/stm32l4/boards/stm32l412nucleo/board.mk
@@ -2,12 +2,12 @@ CFLAGS += \
   -DSTM32L412xx \
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l412xx.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32L412KBUx_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l412xx.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32L412KBUx_FLASH.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l412xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l412xx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l412xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l412xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32l412kb
diff --git a/hw/bsp/stm32l4/boards/stm32l476disco/board.mk b/hw/bsp/stm32l4/boards/stm32l476disco/board.mk
index 125f1f106..3ba9ab444 100644
--- a/hw/bsp/stm32l4/boards/stm32l476disco/board.mk
+++ b/hw/bsp/stm32l4/boards/stm32l476disco/board.mk
@@ -2,12 +2,12 @@ CFLAGS += \
   -DSTM32L476xx \
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l476xx.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32L476VGTx_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l476xx.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32L476VGTx_FLASH.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l476xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l476xx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l476xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l476xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32l476vg
diff --git a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.mk b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.mk
index 11edcd9a8..84f831878 100644
--- a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.mk
+++ b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.mk
@@ -2,12 +2,12 @@ CFLAGS += \
   -DSTM32L4P5xx \
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l4p5xx.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32L4P5ZGTX_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l4p5xx.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32L4P5ZGTX_FLASH.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l4p5xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l4p5xx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l4p5xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l4p5xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32l4p5zg
diff --git a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.mk b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.mk
index 6dca88a8b..ad5bfba38 100644
--- a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.mk
+++ b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.mk
@@ -3,12 +3,12 @@ CFLAGS += \
   -DSTM32L4R5xx \
 
 # GCC
-GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l4r5xx.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32L4RXxI_FLASH.ld
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l4r5xx.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32L4RXxI_FLASH.ld
 
 # IAR
-IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l4r5xx.s
-IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l4r5xx_flash.icf
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l4r5xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l4r5xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32l4r5zi
diff --git a/hw/bsp/stm32l4/family.mk b/hw/bsp/stm32l4/family.mk
index 4392c6766..d492b9645 100644
--- a/hw/bsp/stm32l4/family.mk
+++ b/hw/bsp/stm32l4/family.mk
@@ -14,12 +14,12 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32L4
 
 # GCC Flags
-GCC_CFLAGS += \
+CFLAGS_GCC += \
   -flto \
   -nostdlib -nostartfiles
 
 # suppress warning caused by vendor mcu driver
-GCC_CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align
+CFLAGS_GCC += -Wno-error=maybe-uninitialized -Wno-error=cast-align
 
 # -----------------
 # Sources & Include
diff --git a/tools/make/toolchain/arm_gcc.mk b/tools/make/toolchain/arm_gcc.mk
index 693fda0b3..bba0607df 100644
--- a/tools/make/toolchain/arm_gcc.mk
+++ b/tools/make/toolchain/arm_gcc.mk
@@ -69,6 +69,3 @@ LDFLAGS += \
 ifneq ($(FAMILY),rx)
 LDFLAGS += -Wl,--print-memory-usage
 endif
-
-LDFLAGS += \
-  -Wl,--print-memory-usage \
diff --git a/tools/make/toolchain/arm_gcc_rules.mk b/tools/make/toolchain/arm_gcc_rules.mk
index a39caf351..2e8b9f911 100644
--- a/tools/make/toolchain/arm_gcc_rules.mk
+++ b/tools/make/toolchain/arm_gcc_rules.mk
@@ -1,4 +1,4 @@
-SRC_S += $(GCC_SRC_S)
+SRC_S += $(SRC_S_GCC)
 
 # Assembly files can be name with upper case .S, convert it to .s
 SRC_S := $(SRC_S:.S=.s)
@@ -9,7 +9,7 @@ SRC_S := $(SRC_S:.S=.s)
 OBJ += $(addprefix $(BUILD)/obj/, $(SRC_S:.s=_asm.o))
 OBJ += $(addprefix $(BUILD)/obj/, $(SRC_C:.c=.o))
 
-CFLAGS += $(GCC_CFLAGS) -MD
+CFLAGS += $(CFLAGS_GCC) -MD
 
 # LTO makes it difficult to analyze map file for optimizing size purpose
 # We will run this option in ci
@@ -27,8 +27,8 @@ ifdef LD_FILE
 LDFLAGS += -Wl,-T,$(TOP)/$(LD_FILE)
 endif
 
-ifdef GCC_LD_FILE
-LDFLAGS += -Wl,-T,$(TOP)/$(GCC_LD_FILE)
+ifdef LD_FILE_GCC
+LDFLAGS += -Wl,-T,$(TOP)/$(LD_FILE_GCC)
 endif
 
 ifneq ($(SKIP_NANOLIB), 1)
diff --git a/tools/make/toolchain/arm_iar_rules.mk b/tools/make/toolchain/arm_iar_rules.mk
index 4b5cc90e3..2c066f6da 100644
--- a/tools/make/toolchain/arm_iar_rules.mk
+++ b/tools/make/toolchain/arm_iar_rules.mk
@@ -1,4 +1,4 @@
-SRC_S += $(IAR_SRC_S)
+SRC_S += $(SRC_S_IAR)
 
 # Assembly files can be name with upper case .S, convert it to .s
 SRC_S := $(SRC_S:.S=.s)
@@ -10,7 +10,7 @@ OBJ += $(addprefix $(BUILD)/obj/, $(SRC_S:.s=_asm.o))
 OBJ += $(addprefix $(BUILD)/obj/, $(SRC_C:.c=.o))
 
 # Linker script
-LDFLAGS += --config $(TOP)/$(IAR_LD_FILE)
+LDFLAGS += --config $(TOP)/$(LD_FILE_IAR)
 
 # ---------------------------------------
 # Rules

From eb4380fa14a4cdbd8dde92da74c223b458662dc9 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 24 Jun 2023 20:17:48 +0700
Subject: [PATCH 439/691] more make update

---
 hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk | 2 ++
 hw/bsp/stm32f0/boards/stm32f072eval/board.mk     | 7 +++----
 hw/bsp/stm32f7/boards/stlinkv3mini/board.mk      | 9 +++------
 hw/bsp/stm32f7/boards/stm32f723disco/board.mk    | 9 +++------
 hw/bsp/stm32f7/boards/stm32f746disco/board.mk    | 9 +++------
 hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk   | 9 +++------
 hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk   | 9 +++------
 hw/bsp/stm32f7/boards/stm32f769disco/board.mk    | 9 +++------
 hw/bsp/stm32f7/family.mk                         | 7 +++++++
 9 files changed, 30 insertions(+), 40 deletions(-)

diff --git a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk
index f8f0952e8..63f6a31c2 100644
--- a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk
+++ b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk
@@ -1,3 +1,5 @@
+MCU_VARIANT = stm32f070xb
+
 CFLAGS += -DSTM32F070xB -DCFG_EXAMPLE_VIDEO_READONLY
 
 # Linker
diff --git a/hw/bsp/stm32f0/boards/stm32f072eval/board.mk b/hw/bsp/stm32f0/boards/stm32f072eval/board.mk
index c368bd8af..bab889524 100644
--- a/hw/bsp/stm32f0/boards/stm32f072eval/board.mk
+++ b/hw/bsp/stm32f0/boards/stm32f072eval/board.mk
@@ -1,11 +1,10 @@
+MCU_VARIANT = stm32f072xb
+
 CFLAGS += -DSTM32F072xB -DLSI_VALUE=40000 -DCFG_EXAMPLE_VIDEO_READONLY
 
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f072xb.s
+# Linker
 LD_FILE_GCC = $(BOARD_PATH)/STM32F072VBTx_FLASH.ld
 
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f072xb.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f072xb_flash.icf
-
 # For flash-jlink target
 JLINK_DEVICE = stm32f072vb
 
diff --git a/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk b/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk
index b59125edc..94dce5e84 100644
--- a/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk
+++ b/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk
@@ -1,3 +1,5 @@
+MCU_VARIANT = stm32f723xx
+
 # Only OTG-HS has a connector on this board
 PORT ?= 1
 SPEED ?= high
@@ -6,13 +8,8 @@ CFLAGS += \
   -DSTM32F723xx \
   -DHSE_VALUE=25000000 \
 
-# GCC
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f723xx.s
+# Linker
 LD_FILE_GCC = $(BOARD_PATH)/STM32F723xE_FLASH.ld
 
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f723xx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f723xx_flash.icf
-
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32f7/boards/stm32f723disco/board.mk b/hw/bsp/stm32f7/boards/stm32f723disco/board.mk
index 168ca5dad..43e8eafe1 100644
--- a/hw/bsp/stm32f7/boards/stm32f723disco/board.mk
+++ b/hw/bsp/stm32f7/boards/stm32f723disco/board.mk
@@ -1,3 +1,5 @@
+MCU_VARIANT = stm32f723xx
+
 PORT ?= 1
 SPEED ?= high
 
@@ -5,13 +7,8 @@ CFLAGS += \
   -DSTM32F723xx \
   -DHSE_VALUE=25000000 \
 
-# GCC
+# Linker
 LD_FILE_GCC = $(BOARD_PATH)/STM32F723xE_FLASH.ld
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f723xx.s
-
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f723xx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f723xx_flash.icf
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32f7/boards/stm32f746disco/board.mk b/hw/bsp/stm32f7/boards/stm32f746disco/board.mk
index acda5e2e8..61c0aaa7d 100644
--- a/hw/bsp/stm32f7/boards/stm32f746disco/board.mk
+++ b/hw/bsp/stm32f7/boards/stm32f746disco/board.mk
@@ -1,3 +1,5 @@
+MCU_VARIANT = stm32f746xx
+
 PORT ?= 1
 SPEED ?= high
 
@@ -5,13 +7,8 @@ CFLAGS += \
   -DSTM32F746xx \
   -DHSE_VALUE=25000000
 
-# GCC
+# Linker
 LD_FILE_GCC = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f746xx.s
-
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f746xx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f746xx_flash.icf
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk
index 511433885..3683c79a5 100644
--- a/hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk
+++ b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk
@@ -1,3 +1,5 @@
+MCU_VARIANT = stm32f746xx
+
 PORT ?= 0
 SPEED ?= full
 
@@ -5,13 +7,8 @@ CFLAGS += \
   -DSTM32F746xx \
   -DHSE_VALUE=8000000
 
-# GCC
+# Linker
 LD_FILE_GCC = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f746xx.s
-
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f746xx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f746xx_flash.icf
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk
index 329771986..059ad166a 100644
--- a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk
+++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk
@@ -1,3 +1,5 @@
+MCU_VARIANT = stm32f767xx
+
 PORT ?= 0
 SPEED ?= full
 
@@ -5,13 +7,8 @@ CFLAGS += \
   -DSTM32F767xx \
 	-DHSE_VALUE=8000000 \
 
-# GCC
+# Linker
 LD_FILE_GCC = $(BOARD_PATH)/STM32F767ZITx_FLASH.ld
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f767xx.s
-
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f767xx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f767xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f767zi
diff --git a/hw/bsp/stm32f7/boards/stm32f769disco/board.mk b/hw/bsp/stm32f7/boards/stm32f769disco/board.mk
index 20042db98..a45af8cc0 100644
--- a/hw/bsp/stm32f7/boards/stm32f769disco/board.mk
+++ b/hw/bsp/stm32f7/boards/stm32f769disco/board.mk
@@ -1,3 +1,5 @@
+MCU_VARIANT = stm32f769xx
+
 # Only OTG-HS has a connector on this board
 PORT ?= 1
 SPEED ?= high
@@ -6,13 +8,8 @@ CFLAGS += \
   -DSTM32F769xx \
   -DHSE_VALUE=25000000 \
 
-# GCC
+# Linker
 LD_FILE_GCC = $(BOARD_PATH)/STM32F769ZITx_FLASH.ld
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f769xx.s
-
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f769xx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f769xx_flash.icf
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32f7/family.mk b/hw/bsp/stm32f7/family.mk
index 1a15a743c..4a699ea31 100644
--- a/hw/bsp/stm32f7/family.mk
+++ b/hw/bsp/stm32f7/family.mk
@@ -56,3 +56,10 @@ INC += \
 	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
 	$(TOP)/$(ST_CMSIS)/Include \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
+
+# Startup
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
+
+# Linker
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf

From 38a582634ecb31745600768583651df2468ed913 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 24 Jun 2023 20:32:18 +0700
Subject: [PATCH 440/691] fix missing replace

---
 examples/device/cdc_msc_freertos/Makefile       | 4 ++--
 examples/device/hid_composite_freertos/Makefile | 4 ++--
 examples/device/net_lwip_webserver/Makefile     | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/examples/device/cdc_msc_freertos/Makefile b/examples/device/cdc_msc_freertos/Makefile
index 73b4ce608..5b5e513ad 100644
--- a/examples/device/cdc_msc_freertos/Makefile
+++ b/examples/device/cdc_msc_freertos/Makefile
@@ -37,10 +37,10 @@ SRC_S += \
 # CFLAGS += -Wno-error=sign-compare
 
 # Suppress FreeRTOSConfig.h warnings
-GCC_CFLAGS += -Wno-error=redundant-decls
+CFLAGS_GCC += -Wno-error=redundant-decls
 
 # Suppress FreeRTOS source warnings
-GCC_CFLAGS += -Wno-error=cast-qual
+CFLAGS_GCC += -Wno-error=cast-qual
 
 # FreeRTOS (lto + Os) linker issue
 LDFLAGS += -Wl,--undefined=vTaskSwitchContext
diff --git a/examples/device/hid_composite_freertos/Makefile b/examples/device/hid_composite_freertos/Makefile
index 9d30fddf7..cc1526cfe 100644
--- a/examples/device/hid_composite_freertos/Makefile
+++ b/examples/device/hid_composite_freertos/Makefile
@@ -36,10 +36,10 @@ SRC_S += \
 # CFLAGS += -Wno-error=sign-compare
 
 # Suppress FreeRTOSConfig.h warnings
-GCC_CFLAGS += -Wno-error=redundant-decls
+CFLAGS_GCC += -Wno-error=redundant-decls
 
 # Suppress FreeRTOS source warnings
-GCC_CFLAGS += -Wno-error=cast-qual
+CFLAGS_GCC += -Wno-error=cast-qual
 
 # FreeRTOS (lto + Os) linker issue
 LDFLAGS += -Wl,--undefined=vTaskSwitchContext
diff --git a/examples/device/net_lwip_webserver/Makefile b/examples/device/net_lwip_webserver/Makefile
index bc2914b36..90b429d00 100644
--- a/examples/device/net_lwip_webserver/Makefile
+++ b/examples/device/net_lwip_webserver/Makefile
@@ -3,7 +3,7 @@ DEPS_SUBMODULES += lib/lwip
 include ../../make.mk
 
 # suppress warning caused by lwip
-GCC_CFLAGS += \
+CFLAGS_GCC += \
   -Wno-error=null-dereference \
   -Wno-error=unused-parameter \
   -Wno-error=unused-variable

From 946d3fdd4f0b5dc1e5a3cadde25691d6f34e30dc Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 24 Jun 2023 21:17:40 +0700
Subject: [PATCH 441/691] fix iar with make

---
 examples/device/cdc_msc_freertos/Makefile       | 2 +-
 examples/device/hid_composite_freertos/Makefile | 2 +-
 tools/make/toolchain/arm_gcc_rules.mk           | 2 +-
 tools/make/toolchain/arm_iar.mk                 | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/examples/device/cdc_msc_freertos/Makefile b/examples/device/cdc_msc_freertos/Makefile
index 5b5e513ad..0bee668b7 100644
--- a/examples/device/cdc_msc_freertos/Makefile
+++ b/examples/device/cdc_msc_freertos/Makefile
@@ -43,6 +43,6 @@ CFLAGS_GCC += -Wno-error=redundant-decls
 CFLAGS_GCC += -Wno-error=cast-qual
 
 # FreeRTOS (lto + Os) linker issue
-LDFLAGS += -Wl,--undefined=vTaskSwitchContext
+LDFLAGS_GCC += -Wl,--undefined=vTaskSwitchContext
 
 include ../../rules.mk
diff --git a/examples/device/hid_composite_freertos/Makefile b/examples/device/hid_composite_freertos/Makefile
index cc1526cfe..a892e7d1d 100644
--- a/examples/device/hid_composite_freertos/Makefile
+++ b/examples/device/hid_composite_freertos/Makefile
@@ -42,6 +42,6 @@ CFLAGS_GCC += -Wno-error=redundant-decls
 CFLAGS_GCC += -Wno-error=cast-qual
 
 # FreeRTOS (lto + Os) linker issue
-LDFLAGS += -Wl,--undefined=vTaskSwitchContext
+LDFLAGS_GCC += -Wl,--undefined=vTaskSwitchContext
 
 include ../../rules.mk
diff --git a/tools/make/toolchain/arm_gcc_rules.mk b/tools/make/toolchain/arm_gcc_rules.mk
index 2e8b9f911..f3482b9a8 100644
--- a/tools/make/toolchain/arm_gcc_rules.mk
+++ b/tools/make/toolchain/arm_gcc_rules.mk
@@ -21,7 +21,7 @@ ifneq ($(CFLAGS_SKIP),)
 CFLAGS := $(filter-out $(CFLAGS_SKIP),$(CFLAGS))
 endif
 
-LDFLAGS += $(CFLAGS)
+LDFLAGS += $(CFLAGS) $(LDFLAGS_GCC)
 
 ifdef LD_FILE
 LDFLAGS += -Wl,-T,$(TOP)/$(LD_FILE)
diff --git a/tools/make/toolchain/arm_iar.mk b/tools/make/toolchain/arm_iar.mk
index f1850add7..04c9f22b3 100644
--- a/tools/make/toolchain/arm_iar.mk
+++ b/tools/make/toolchain/arm_iar.mk
@@ -8,4 +8,4 @@ SIZE = size
 CFLAGS += -e --debug --silent
 
 # silent mode
-ASFLAGS += -S
+ASFLAGS += -S $(addprefix -I,$(INC))

From 2a96ef2519d566c654907df0e1198088510774fe Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 24 Jun 2023 21:33:46 +0700
Subject: [PATCH 442/691] add cmake for f0, f1

---
 .github/workflows/build_iar.yml               |   4 +-
 .../boards/stm32f070rbnucleo/board.cmake      |  11 ++
 .../stm32f0/boards/stm32f072disco/board.cmake |  11 ++
 .../stm32f0/boards/stm32f072eval/board.cmake  |  12 ++
 hw/bsp/stm32f0/family.cmake                   | 134 ++++++++++++++++++
 .../boards/stm32f103_bluepill/board.cmake     |  13 ++
 .../boards/stm32f103_mini_2/board.cmake       |  12 ++
 hw/bsp/stm32f1/family.cmake                   | 130 +++++++++++++++++
 tools/cmake/cpu/cortex-m0.cmake               |  17 +++
 9 files changed, 342 insertions(+), 2 deletions(-)
 create mode 100644 hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.cmake
 create mode 100644 hw/bsp/stm32f0/boards/stm32f072disco/board.cmake
 create mode 100644 hw/bsp/stm32f0/boards/stm32f072eval/board.cmake
 create mode 100644 hw/bsp/stm32f0/family.cmake
 create mode 100644 hw/bsp/stm32f1/boards/stm32f103_bluepill/board.cmake
 create mode 100644 hw/bsp/stm32f1/boards/stm32f103_mini_2/board.cmake
 create mode 100644 hw/bsp/stm32f1/family.cmake
 create mode 100644 tools/cmake/cpu/cortex-m0.cmake

diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml
index 8c9a500d7..39d9b9232 100644
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@@ -32,7 +32,7 @@ jobs:
         # Alphabetical order
         # Note: bundle multiple families into a matrix since there is only one self-hosted instance can
         # run IAR build. Too many matrix can hurt due to setup/teardown overhead.
-        - 'stm32f0 stm32f1 stm32f7 stm32l4'
+        - 'stm32f7 stm32l4'
     steps:
     - name: Clean workspace
       run: |
@@ -58,7 +58,7 @@ jobs:
           # Alphabetical order
           # Note: bundle multiple families into a matrix since there is only one self-hosted instance can
           # run IAR build. Too many matrix can hurt due to setup/teardown overhead.
-          - 'stm32g0 stm32g4 stm32h7'
+          - 'stm32f0 stm32f1 stm32g0 stm32g4 stm32h7'
     steps:
       - name: Clean workspace
         run: |
diff --git a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.cmake b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.cmake
new file mode 100644
index 000000000..61fec0d30
--- /dev/null
+++ b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.cmake
@@ -0,0 +1,11 @@
+set(MCU_VARIANT stm32f070xb)
+set(JLINK_DEVICE stm32f070rb)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/stm32F070rbtx_flash.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F070xB
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/stm32f0/boards/stm32f072disco/board.cmake b/hw/bsp/stm32f0/boards/stm32f072disco/board.cmake
new file mode 100644
index 000000000..287593f43
--- /dev/null
+++ b/hw/bsp/stm32f0/boards/stm32f072disco/board.cmake
@@ -0,0 +1,11 @@
+set(MCU_VARIANT stm32f072xb)
+set(JLINK_DEVICE stm32f072rb)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F072RBTx_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F072xB
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/stm32f0/boards/stm32f072eval/board.cmake b/hw/bsp/stm32f0/boards/stm32f072eval/board.cmake
new file mode 100644
index 000000000..42d778cb5
--- /dev/null
+++ b/hw/bsp/stm32f0/boards/stm32f072eval/board.cmake
@@ -0,0 +1,12 @@
+set(MCU_VARIANT stm32f072xb)
+set(JLINK_DEVICE stm32f072vb)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F072VBTx_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F072xB
+    LSI_VALUE=40000
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/stm32f0/family.cmake b/hw/bsp/stm32f0/family.cmake
new file mode 100644
index 000000000..68a69586e
--- /dev/null
+++ b/hw/bsp/stm32f0/family.cmake
@@ -0,0 +1,134 @@
+include_guard()
+
+if (NOT BOARD)
+  message(FATAL_ERROR "BOARD not specified")
+endif ()
+
+set(ST_FAMILY f0)
+set(ST_PREFIX stm32${ST_FAMILY}xx)
+
+set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver)
+set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY})
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m0 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS STM32F0 CACHE INTERNAL "")
+
+# enable LTO if supported
+include(CheckIPOSupported)
+check_ipo_supported(RESULT IPO_SUPPORTED)
+if (IPO_SUPPORTED)
+  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+endif ()
+
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    add_library(${BOARD_TARGET} STATIC
+      ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
+      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+      )
+    target_include_directories(${BOARD_TARGET} PUBLIC
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+      ${CMSIS_5}/CMSIS/Core/Include
+      ${ST_CMSIS}/Include
+      ${ST_HAL_DRIVER}/Inc
+      )
+    target_compile_options(${BOARD_TARGET} PUBLIC
+      )
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      )
+
+    update_board(${BOARD_TARGET})
+
+    # Startup
+    set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+    set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+
+    # Linker
+    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--script=${LD_FILE_GNU}"
+        -nostartfiles
+        # nanolib
+        --specs=nosys.specs
+        --specs=nano.specs
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET)
+  family_configure_common(${TARGET})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32F0)
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_flash_stlink(${TARGET})
+  #family_flash_jlink(${TARGET})
+endfunction()
+
+
+function(family_configure_device_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
+
+function(family_configure_host_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
+
+function(family_configure_dual_usb_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
diff --git a/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.cmake b/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.cmake
new file mode 100644
index 000000000..87b8458a2
--- /dev/null
+++ b/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.cmake
@@ -0,0 +1,13 @@
+set(MCU_VARIANT stm32f103xb)
+set(JLINK_DEVICE stm32f103c8)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F103X8_FLASH.ld)
+set(LD_FILE_IAR ${CMAKE_CURRENT_LIST_DIR}/stm32f103x8_flash.icf)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F103xB
+    HSE_VALUE=8000000U
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.cmake b/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.cmake
new file mode 100644
index 000000000..67a96c4d1
--- /dev/null
+++ b/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.cmake
@@ -0,0 +1,12 @@
+set(MCU_VARIANT stm32f103xb)
+set(JLINK_DEVICE stm32f103rc)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F103XC_FLASH.ld)
+set(LD_FILE_IAR ${CMAKE_CURRENT_LIST_DIR}/stm32f103xc_flash.icf)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F103xB
+    HSE_VALUE=8000000U
+    )
+endfunction()
diff --git a/hw/bsp/stm32f1/family.cmake b/hw/bsp/stm32f1/family.cmake
new file mode 100644
index 000000000..d42da090d
--- /dev/null
+++ b/hw/bsp/stm32f1/family.cmake
@@ -0,0 +1,130 @@
+include_guard()
+
+if (NOT BOARD)
+  message(FATAL_ERROR "BOARD not specified")
+endif ()
+
+set(ST_FAMILY f1)
+set(ST_PREFIX stm32${ST_FAMILY}xx)
+
+set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver)
+set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY})
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m3 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS STM32F1 CACHE INTERNAL "")
+
+# enable LTO if supported
+include(CheckIPOSupported)
+check_ipo_supported(RESULT IPO_SUPPORTED)
+if (IPO_SUPPORTED)
+  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+endif ()
+
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    add_library(${BOARD_TARGET} STATIC
+      ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
+      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+      )
+    target_include_directories(${BOARD_TARGET} PUBLIC
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+      ${CMSIS_5}/CMSIS/Core/Include
+      ${ST_CMSIS}/Include
+      ${ST_HAL_DRIVER}/Inc
+      )
+    target_compile_options(${BOARD_TARGET} PUBLIC
+      )
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      )
+
+    update_board(${BOARD_TARGET})
+
+    # Startup
+    set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+    set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--script=${LD_FILE_GNU}"
+        -nostartfiles
+        # nanolib
+        --specs=nosys.specs
+        --specs=nano.specs
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET)
+  family_configure_common(${TARGET})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32F1)
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_flash_stlink(${TARGET})
+  #family_flash_jlink(${TARGET})
+endfunction()
+
+
+function(family_configure_device_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
+
+function(family_configure_host_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
+
+function(family_configure_dual_usb_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
diff --git a/tools/cmake/cpu/cortex-m0.cmake b/tools/cmake/cpu/cortex-m0.cmake
new file mode 100644
index 000000000..bc2257048
--- /dev/null
+++ b/tools/cmake/cpu/cortex-m0.cmake
@@ -0,0 +1,17 @@
+if (TOOLCHAIN STREQUAL "gcc")
+  set(TOOLCHAIN_COMMON_FLAGS
+    -mthumb
+    -mcpu=cortex-m0plus
+    -mfloat-abi=soft
+    )
+
+  set(FREERTOS_PORT GCC_ARM_CM0 CACHE INTERNAL "")
+
+elseif (TOOLCHAIN STREQUAL "iar")
+  set(TOOLCHAIN_COMMON_FLAGS
+    --cpu cortex-m0
+    )
+
+  set(FREERTOS_PORT IAR_ARM_CM0 CACHE INTERNAL "")
+
+endif ()

From 430f16bf76738ca192cfca872c9fd271bfbb78eb Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 24 Jun 2023 22:36:53 +0700
Subject: [PATCH 443/691] move all IAR to cmake

---
 .github/workflows/build_iar.yml               |  28 +-
 .../stm32f0/FreeRTOSConfig/FreeRTOSConfig.h   | 165 ++++++
 hw/bsp/stm32f0/family.cmake                   |  12 +-
 .../stm32f1/FreeRTOSConfig/FreeRTOSConfig.h   | 165 ++++++
 hw/bsp/stm32f1/family.cmake                   |   8 +-
 .../stm32f7/FreeRTOSConfig/FreeRTOSConfig.h   | 165 ++++++
 .../stm32f7/boards/stlinkv3mini/board.cmake   |  14 +
 .../stm32f7/boards/stm32f723disco/board.cmake |  14 +
 .../stm32f723disco/stm32f7xx_hal_conf.h       | 472 ------------------
 .../stm32f7/boards/stm32f746disco/board.cmake |  14 +
 .../stm32f746disco/stm32f7xx_hal_conf.h       | 472 ------------------
 .../boards/stm32f746nucleo/board.cmake        |  13 +
 .../stm32f746nucleo/stm32f7xx_hal_conf.h      | 472 ------------------
 .../boards/stm32f767nucleo/board.cmake        |  13 +
 .../stm32f767nucleo/stm32f7xx_hal_conf.h      | 472 ------------------
 .../stm32f7/boards/stm32f769disco/board.cmake |  14 +
 .../stm32f769disco/stm32f7xx_hal_conf.h       | 472 ------------------
 hw/bsp/stm32f7/family.cmake                   | 135 +++++
 .../stlinkv3mini => }/stm32f7xx_hal_conf.h    |   0
 .../boards/stm32g0b1nucleo/board.cmake        |   4 -
 hw/bsp/stm32g0/family.cmake                   |   5 +
 .../stm32g4/boards/b_g474e_dpow1/board.cmake  |   4 -
 .../boards/stm32g474nucleo/board.cmake        |   4 -
 hw/bsp/stm32g4/family.cmake                   |   5 +
 hw/bsp/stm32h7/boards/daisyseed/board.cmake   |   4 -
 .../boards/stm32h723nucleo/board.cmake        |   4 -
 .../stm32h7/boards/stm32h743eval/board.cmake  |   4 -
 .../boards/stm32h743nucleo/board.cmake        |   4 -
 .../stm32h7/boards/stm32h745disco/board.cmake |   4 -
 .../boards/waveshare_openh743i/board.cmake    |   4 -
 hw/bsp/stm32h7/family.cmake                   |   5 +
 .../boards/stm32l412nucleo/board.cmake        |  10 +
 .../stm32l4/boards/stm32l476disco/board.cmake |  10 +
 .../boards/stm32l4p5nucleo/board.cmake        |  10 +
 .../boards/stm32l4r5nucleo/board.cmake        |  11 +
 hw/bsp/stm32l4/family.cmake                   | 136 +++++
 hw/bsp/stm32l4/family.mk                      |   6 +-
 37 files changed, 917 insertions(+), 2437 deletions(-)
 create mode 100644 hw/bsp/stm32f0/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/stm32f1/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/stm32f7/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/stm32f7/boards/stlinkv3mini/board.cmake
 create mode 100644 hw/bsp/stm32f7/boards/stm32f723disco/board.cmake
 delete mode 100644 hw/bsp/stm32f7/boards/stm32f723disco/stm32f7xx_hal_conf.h
 create mode 100644 hw/bsp/stm32f7/boards/stm32f746disco/board.cmake
 delete mode 100644 hw/bsp/stm32f7/boards/stm32f746disco/stm32f7xx_hal_conf.h
 create mode 100644 hw/bsp/stm32f7/boards/stm32f746nucleo/board.cmake
 delete mode 100644 hw/bsp/stm32f7/boards/stm32f746nucleo/stm32f7xx_hal_conf.h
 create mode 100644 hw/bsp/stm32f7/boards/stm32f767nucleo/board.cmake
 delete mode 100644 hw/bsp/stm32f7/boards/stm32f767nucleo/stm32f7xx_hal_conf.h
 create mode 100644 hw/bsp/stm32f7/boards/stm32f769disco/board.cmake
 delete mode 100644 hw/bsp/stm32f7/boards/stm32f769disco/stm32f7xx_hal_conf.h
 create mode 100644 hw/bsp/stm32f7/family.cmake
 rename hw/bsp/stm32f7/{boards/stlinkv3mini => }/stm32f7xx_hal_conf.h (100%)
 create mode 100644 hw/bsp/stm32l4/boards/stm32l412nucleo/board.cmake
 create mode 100644 hw/bsp/stm32l4/boards/stm32l476disco/board.cmake
 create mode 100644 hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.cmake
 create mode 100644 hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.cmake
 create mode 100644 hw/bsp/stm32l4/family.cmake

diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml
index 39d9b9232..6273385e7 100644
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@@ -23,32 +23,6 @@ concurrency:
   cancel-in-progress: true
 
 jobs:
-  makefile:
-    runs-on: [self-hosted, Linux, X64, hifiphile]
-    strategy:
-      fail-fast: false
-      matrix:
-        family:
-        # Alphabetical order
-        # Note: bundle multiple families into a matrix since there is only one self-hosted instance can
-        # run IAR build. Too many matrix can hurt due to setup/teardown overhead.
-        - 'stm32f7 stm32l4'
-    steps:
-    - name: Clean workspace
-      run: |
-        echo "Cleaning up previous run"
-        rm -rf "${{ github.workspace }}"
-        mkdir -p "${{ github.workspace }}"
-
-    - name: Checkout TinyUSB
-      uses: actions/checkout@v3
-
-    - name: Get Dependencies
-      run: python3 tools/get_deps.py ${{ matrix.family }}
-
-    - name: Build
-      run: python3 tools/build_family.py ${{ matrix.family }} TOOLCHAIN=iar
-
   cmake:
     runs-on: [self-hosted, Linux, X64, hifiphile]
     strategy:
@@ -58,7 +32,7 @@ jobs:
           # Alphabetical order
           # Note: bundle multiple families into a matrix since there is only one self-hosted instance can
           # run IAR build. Too many matrix can hurt due to setup/teardown overhead.
-          - 'stm32f0 stm32f1 stm32g0 stm32g4 stm32h7'
+          - 'stm32f0 stm32f1 stm32f7 stm32g0 stm32g4 stm32h7 stm32l4'
     steps:
       - name: Clean workspace
         run: |
diff --git a/hw/bsp/stm32f0/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32f0/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..fc2f9fc67
--- /dev/null
+++ b/hw/bsp/stm32f0/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,165 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "stm32f0xx.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               2
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       2
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/stm32f0/family.cmake b/hw/bsp/stm32f0/family.cmake
index 68a69586e..9f6a7f098 100644
--- a/hw/bsp/stm32f0/family.cmake
+++ b/hw/bsp/stm32f0/family.cmake
@@ -34,6 +34,11 @@ endif ()
 # only need to be built ONCE for all examples
 function(add_board_target BOARD_TARGET)
   if (NOT TARGET ${BOARD_TARGET})
+    # Startup & Linker script
+    set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+    set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+
     add_library(${BOARD_TARGET} STATIC
       ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -58,13 +63,6 @@ function(add_board_target BOARD_TARGET)
 
     update_board(${BOARD_TARGET})
 
-    # Startup
-    set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-    set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-
-    # Linker
-    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
-
     if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
       target_link_options(${BOARD_TARGET} PUBLIC
         "LINKER:--script=${LD_FILE_GNU}"
diff --git a/hw/bsp/stm32f1/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32f1/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..5a6b2300b
--- /dev/null
+++ b/hw/bsp/stm32f1/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,165 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "stm32f1xx.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               2
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       4
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/stm32f1/family.cmake b/hw/bsp/stm32f1/family.cmake
index d42da090d..ab46c9872 100644
--- a/hw/bsp/stm32f1/family.cmake
+++ b/hw/bsp/stm32f1/family.cmake
@@ -34,6 +34,10 @@ endif ()
 # only need to be built ONCE for all examples
 function(add_board_target BOARD_TARGET)
   if (NOT TARGET ${BOARD_TARGET})
+    # Startup & Linker script
+    set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+    set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+
     add_library(${BOARD_TARGET} STATIC
       ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -57,10 +61,6 @@ function(add_board_target BOARD_TARGET)
 
     update_board(${BOARD_TARGET})
 
-    # Startup
-    set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-    set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-
     if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
       target_link_options(${BOARD_TARGET} PUBLIC
         "LINKER:--script=${LD_FILE_GNU}"
diff --git a/hw/bsp/stm32f7/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32f7/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..815e567dd
--- /dev/null
+++ b/hw/bsp/stm32f7/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,165 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "stm32f7xx.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               2
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       4
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/stm32f7/boards/stlinkv3mini/board.cmake b/hw/bsp/stm32f7/boards/stlinkv3mini/board.cmake
new file mode 100644
index 000000000..378e736d4
--- /dev/null
+++ b/hw/bsp/stm32f7/boards/stlinkv3mini/board.cmake
@@ -0,0 +1,14 @@
+set(MCU_VARIANT stm32f723xx)
+set(JLINK_DEVICE stm32f723xx)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F723xE_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F723xx
+    HSE_VALUE=25000000
+    # default to PORT 1 High Speed
+    BOARD_TUD_RHPORT=1
+    BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+    )
+endfunction()
diff --git a/hw/bsp/stm32f7/boards/stm32f723disco/board.cmake b/hw/bsp/stm32f7/boards/stm32f723disco/board.cmake
new file mode 100644
index 000000000..dd3c35b00
--- /dev/null
+++ b/hw/bsp/stm32f7/boards/stm32f723disco/board.cmake
@@ -0,0 +1,14 @@
+set(MCU_VARIANT stm32f723xx)
+set(JLINK_DEVICE stm32f723ie)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F723xE_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F723xx
+    HSE_VALUE=25000000
+    # default to PORT 1 High Speed
+    BOARD_TUD_RHPORT=1
+    BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+    )
+endfunction()
diff --git a/hw/bsp/stm32f7/boards/stm32f723disco/stm32f7xx_hal_conf.h b/hw/bsp/stm32f7/boards/stm32f723disco/stm32f7xx_hal_conf.h
deleted file mode 100644
index 581f0e46a..000000000
--- a/hw/bsp/stm32f7/boards/stm32f723disco/stm32f7xx_hal_conf.h
+++ /dev/null
@@ -1,472 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f7xx_hal_conf.h
-  * @author  MCD Application Team
-  * @brief   HAL configuration file.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F7xx_HAL_CONF_H
-#define __STM32F7xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver
-  */
-#define HAL_MODULE_ENABLED
-/* #define HAL_ADC_MODULE_ENABLED   */
-/* #define HAL_CAN_MODULE_ENABLED */
-/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
-/* #define HAL_CEC_MODULE_ENABLED   */
-/* #define HAL_CRC_MODULE_ENABLED   */
-/* #define HAL_CRYP_MODULE_ENABLED   */
-/* #define HAL_DAC_MODULE_ENABLED   */
-/* #define HAL_DCMI_MODULE_ENABLED  */
-#define HAL_DMA_MODULE_ENABLED
-/* #define HAL_DMA2D_MODULE_ENABLED  */
-/* #define HAL_ETH_MODULE_ENABLED  */
-#define HAL_FLASH_MODULE_ENABLED
-/* #define HAL_NAND_MODULE_ENABLED */
-/* #define HAL_NOR_MODULE_ENABLED */
-/* #define HAL_SRAM_MODULE_ENABLED */
-/* #define HAL_SDRAM_MODULE_ENABLED */
-/* #define HAL_HASH_MODULE_ENABLED   */
-#define HAL_GPIO_MODULE_ENABLED
-/* #define HAL_I2C_MODULE_ENABLED */
-/* #define HAL_I2S_MODULE_ENABLED    */
-/* #define HAL_IWDG_MODULE_ENABLED  */
-/* #define HAL_LPTIM_MODULE_ENABLED */
-/* #define HAL_LTDC_MODULE_ENABLED  */
-#define HAL_PWR_MODULE_ENABLED
-/* #define HAL_QSPI_MODULE_ENABLED    */
-#define HAL_RCC_MODULE_ENABLED
-/* #define HAL_RNG_MODULE_ENABLED    */
-/* #define HAL_RTC_MODULE_ENABLED */
-/* #define HAL_SAI_MODULE_ENABLED    */
-/* #define HAL_SD_MODULE_ENABLED   */
-/* #define HAL_SPDIFRX_MODULE_ENABLED */
-/* #define HAL_SPI_MODULE_ENABLED    */
-/* #define HAL_TIM_MODULE_ENABLED    */
-#define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED  */
-/* #define HAL_IRDA_MODULE_ENABLED  */
-/* #define HAL_SMARTCARD_MODULE_ENABLED  */
-/* #define HAL_WWDG_MODULE_ENABLED   */
-#define HAL_CORTEX_MODULE_ENABLED
-/* #define HAL_PCD_MODULE_ENABLED */
-/* #define HAL_HCD_MODULE_ENABLED */
-/* #define HAL_DFSDM_MODULE_ENABLED */
-/* #define HAL_DSI_MODULE_ENABLED */
-/* #define HAL_JPEG_MODULE_ENABLED */
-/* #define HAL_MDIOS_MODULE_ENABLED */
-
-
-/* ########################## HSE/HSI Values adaptation ##################### */
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSE_VALUE)
-  #define HSE_VALUE    ((uint32_t)25000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)100U)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE)
- #define LSI_VALUE  ((uint32_t)32000U)       /*!< LSI Typical Value in Hz*/
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.  */
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  */
-#if !defined  (LSE_VALUE)
- #define LSE_VALUE  ((uint32_t)32768U)    /*!< Value of the External Low Speed oscillator in Hz */
-#endif /* LSE_VALUE */
-
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000U)   /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source
-  *        frequency, this source is inserted directly through I2S_CKIN pad.
-  */
-#if !defined  (EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE    ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* EXTERNAL_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */
-#define  VDD_VALUE                    ((uint32_t)3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            ((uint32_t)0x0FU) /*!< tick interrupt priority */
-#define  USE_RTOS                     0U
-#define  PREFETCH_ENABLE              1U
-#define  ART_ACCLERATOR_ENABLE        1U /* To enable instruction cache and prefetch */
-
-#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
-#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
-#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
-#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
-#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
-#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
-#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
-#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
-#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
-#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
-#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
-#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
-#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
-#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
-#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
-#define  USE_HAL_JPEG_REGISTER_CALLBACKS        0U /* JPEG register callback disabled      */
-#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
-#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
-#define  USE_HAL_MDIOS_REGISTER_CALLBACKS       0U /* MDIOS register callback disabled     */
-#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
-#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
-#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
-#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
-#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
-#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
-#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
-#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
-#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
-#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
-#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
-#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
-#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
-#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
-#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
-#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
-#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
-#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
-#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1 */
-
-/* ################## Ethernet peripheral configuration for NUCLEO 144 board ##################### */
-
-/* Section 1 : Ethernet peripheral configuration */
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2U
-#define MAC_ADDR1   0U
-#define MAC_ADDR2   0U
-#define MAC_ADDR3   0U
-#define MAC_ADDR4   0U
-#define MAC_ADDR5   0U
-
-/* Definition of the Ethernet driver buffers size and count */
-#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
-#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    ((uint32_t)5)       /* 5 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    ((uint32_t)5)       /* 5 Tx buffers of size ETH_TX_BUF_SIZE  */
-
-/* Section 2: PHY configuration section */
-/* LAN8742A PHY Address*/
-#define LAN8742A_PHY_ADDRESS            0x00
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
-#define PHY_RESET_DELAY                 ((uint32_t)0x00000FFF)
-/* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFF)
-
-#define PHY_READ_TO                     ((uint32_t)0x0000FFFF)
-#define PHY_WRITE_TO                    ((uint32_t)0x0000FFFF)
-
-/* Section 3: Common PHY Registers */
-
-#define PHY_BCR                         ((uint16_t)0x00)    /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x01)    /*!< Transceiver Basic Status Register    */
-
-#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
-#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
-#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
-#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
-
-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
-#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-
-/* Section 4: Extended PHY Registers */
-
-#define PHY_SR                          ((uint16_t)0x1F)    /*!< PHY special control/ status register Offset     */
-
-#define PHY_SPEED_STATUS                ((uint16_t)0x0004)  /*!< PHY Speed mask                                  */
-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0010)  /*!< PHY Duplex mask                                 */
-
-
-#define PHY_ISFR                        ((uint16_t)0x1D)    /*!< PHY Interrupt Source Flag register Offset       */
-#define PHY_ISFR_INT4                   ((uint16_t)0x0010)  /*!< PHY Link down inturrupt                         */
-
-/* ################## SPI peripheral configuration ########################## */
-
-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
-* Activated: CRC code is present inside driver
-* Deactivated: CRC code cleaned from driver
-*/
-
-#define USE_SPI_CRC                     1U
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32f7xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32f7xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f7xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32f7xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32f7xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
-  #include "stm32f7xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
-  #include "stm32f7xx_hal_can_legacy.h"
-#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
-
-#ifdef HAL_CEC_MODULE_ENABLED
-  #include "stm32f7xx_hal_cec.h"
-#endif /* HAL_CEC_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32f7xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f7xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DMA2D_MODULE_ENABLED
-  #include "stm32f7xx_hal_dma2d.h"
-#endif /* HAL_DMA2D_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32f7xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_DCMI_MODULE_ENABLED
-  #include "stm32f7xx_hal_dcmi.h"
-#endif /* HAL_DCMI_MODULE_ENABLED */
-
-#ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f7xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32f7xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_SRAM_MODULE_ENABLED
-  #include "stm32f7xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
-  #include "stm32f7xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
-  #include "stm32f7xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_SDRAM_MODULE_ENABLED
-  #include "stm32f7xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */
-
-#ifdef HAL_HASH_MODULE_ENABLED
- #include "stm32f7xx_hal_hash.h"
-#endif /* HAL_HASH_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f7xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f7xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f7xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
- #include "stm32f7xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-
-#ifdef HAL_LTDC_MODULE_ENABLED
- #include "stm32f7xx_hal_ltdc.h"
-#endif /* HAL_LTDC_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f7xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_QSPI_MODULE_ENABLED
- #include "stm32f7xx_hal_qspi.h"
-#endif /* HAL_QSPI_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32f7xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f7xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SAI_MODULE_ENABLED
- #include "stm32f7xx_hal_sai.h"
-#endif /* HAL_SAI_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f7xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_SPDIFRX_MODULE_ENABLED
- #include "stm32f7xx_hal_spdifrx.h"
-#endif /* HAL_SPDIFRX_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f7xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f7xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f7xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f7xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f7xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f7xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f7xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f7xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f7xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-
-#ifdef HAL_DFSDM_MODULE_ENABLED
- #include "stm32f7xx_hal_dfsdm.h"
-#endif /* HAL_DFSDM_MODULE_ENABLED */
-
-#ifdef HAL_DSI_MODULE_ENABLED
- #include "stm32f7xx_hal_dsi.h"
-#endif /* HAL_DSI_MODULE_ENABLED */
-
-#ifdef HAL_JPEG_MODULE_ENABLED
- #include "stm32f7xx_hal_jpeg.h"
-#endif /* HAL_JPEG_MODULE_ENABLED */
-
-#ifdef HAL_MDIOS_MODULE_ENABLED
- #include "stm32f7xx_hal_mdios.h"
-#endif /* HAL_MDIOS_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed.
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F7xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32f7/boards/stm32f746disco/board.cmake b/hw/bsp/stm32f7/boards/stm32f746disco/board.cmake
new file mode 100644
index 000000000..e44c164b8
--- /dev/null
+++ b/hw/bsp/stm32f7/boards/stm32f746disco/board.cmake
@@ -0,0 +1,14 @@
+set(MCU_VARIANT stm32f746xx)
+set(JLINK_DEVICE stm32f746xx)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F746ZGTx_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F746xx
+    HSE_VALUE=25000000
+    # default to PORT 1 High Speed
+    BOARD_TUD_RHPORT=1
+    BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+    )
+endfunction()
diff --git a/hw/bsp/stm32f7/boards/stm32f746disco/stm32f7xx_hal_conf.h b/hw/bsp/stm32f7/boards/stm32f746disco/stm32f7xx_hal_conf.h
deleted file mode 100644
index 03dec8f0d..000000000
--- a/hw/bsp/stm32f7/boards/stm32f746disco/stm32f7xx_hal_conf.h
+++ /dev/null
@@ -1,472 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f7xx_hal_conf.h
-  * @author  MCD Application Team
-  * @brief   HAL configuration file.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F7xx_HAL_CONF_H
-#define __STM32F7xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver
-  */
-#define HAL_MODULE_ENABLED
-/* #define HAL_ADC_MODULE_ENABLED   */
-/* #define HAL_CAN_MODULE_ENABLED */
-/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
-/* #define HAL_CEC_MODULE_ENABLED   */
-/* #define HAL_CRC_MODULE_ENABLED   */
-/* #define HAL_CRYP_MODULE_ENABLED   */
-/* #define HAL_DAC_MODULE_ENABLED   */
-/* #define HAL_DCMI_MODULE_ENABLED  */
-#define HAL_DMA_MODULE_ENABLED
-/* #define HAL_DMA2D_MODULE_ENABLED  */
-/* #define HAL_ETH_MODULE_ENABLED  */
-#define HAL_FLASH_MODULE_ENABLED
-/* #define HAL_NAND_MODULE_ENABLED */
-/* #define HAL_NOR_MODULE_ENABLED */
-/* #define HAL_SRAM_MODULE_ENABLED */
-/* #define HAL_SDRAM_MODULE_ENABLED */
-/* #define HAL_HASH_MODULE_ENABLED   */
-#define HAL_GPIO_MODULE_ENABLED
-/* #define HAL_I2C_MODULE_ENABLED */
-/* #define HAL_I2S_MODULE_ENABLED    */
-/* #define HAL_IWDG_MODULE_ENABLED  */
-/* #define HAL_LPTIM_MODULE_ENABLED */
-/* #define HAL_LTDC_MODULE_ENABLED  */
-#define HAL_PWR_MODULE_ENABLED
-/* #define HAL_QSPI_MODULE_ENABLED    */
-#define HAL_RCC_MODULE_ENABLED
-/* #define HAL_RNG_MODULE_ENABLED    */
-/* #define HAL_RTC_MODULE_ENABLED */
-/* #define HAL_SAI_MODULE_ENABLED    */
-/* #define HAL_SD_MODULE_ENABLED   */
-/* #define HAL_SPDIFRX_MODULE_ENABLED */
-/* #define HAL_SPI_MODULE_ENABLED    */
-/* #define HAL_TIM_MODULE_ENABLED    */
-#define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED  */
-/* #define HAL_IRDA_MODULE_ENABLED  */
-/* #define HAL_SMARTCARD_MODULE_ENABLED  */
-/* #define HAL_WWDG_MODULE_ENABLED   */
-#define HAL_CORTEX_MODULE_ENABLED
-/* #define HAL_PCD_MODULE_ENABLED */
-/* #define HAL_HCD_MODULE_ENABLED */
-/* #define HAL_DFSDM_MODULE_ENABLED */
-/* #define HAL_DSI_MODULE_ENABLED */
-/* #define HAL_JPEG_MODULE_ENABLED */
-/* #define HAL_MDIOS_MODULE_ENABLED */
-
-
-/* ########################## HSE/HSI Values adaptation ##################### */
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSE_VALUE)
-  #define HSE_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)100U)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE)
- #define LSI_VALUE  ((uint32_t)32000U)       /*!< LSI Typical Value in Hz*/
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.  */
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  */
-#if !defined  (LSE_VALUE)
- #define LSE_VALUE  ((uint32_t)32768U)    /*!< Value of the External Low Speed oscillator in Hz */
-#endif /* LSE_VALUE */
-
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000U)   /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source
-  *        frequency, this source is inserted directly through I2S_CKIN pad.
-  */
-#if !defined  (EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE    ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* EXTERNAL_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */
-#define  VDD_VALUE                    ((uint32_t)3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            ((uint32_t)0x0FU) /*!< tick interrupt priority */
-#define  USE_RTOS                     0U
-#define  PREFETCH_ENABLE              1U
-#define  ART_ACCLERATOR_ENABLE        1U /* To enable instruction cache and prefetch */
-
-#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
-#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
-#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
-#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
-#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
-#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
-#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
-#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
-#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
-#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
-#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
-#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
-#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
-#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
-#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
-#define  USE_HAL_JPEG_REGISTER_CALLBACKS        0U /* JPEG register callback disabled      */
-#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
-#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
-#define  USE_HAL_MDIOS_REGISTER_CALLBACKS       0U /* MDIOS register callback disabled     */
-#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
-#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
-#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
-#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
-#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
-#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
-#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
-#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
-#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
-#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
-#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
-#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
-#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
-#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
-#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
-#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
-#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
-#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
-#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1 */
-
-/* ################## Ethernet peripheral configuration for NUCLEO 144 board ##################### */
-
-/* Section 1 : Ethernet peripheral configuration */
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2U
-#define MAC_ADDR1   0U
-#define MAC_ADDR2   0U
-#define MAC_ADDR3   0U
-#define MAC_ADDR4   0U
-#define MAC_ADDR5   0U
-
-/* Definition of the Ethernet driver buffers size and count */
-#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
-#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    ((uint32_t)5)       /* 5 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    ((uint32_t)5)       /* 5 Tx buffers of size ETH_TX_BUF_SIZE  */
-
-/* Section 2: PHY configuration section */
-/* LAN8742A PHY Address*/
-#define LAN8742A_PHY_ADDRESS            0x00
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
-#define PHY_RESET_DELAY                 ((uint32_t)0x00000FFF)
-/* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFF)
-
-#define PHY_READ_TO                     ((uint32_t)0x0000FFFF)
-#define PHY_WRITE_TO                    ((uint32_t)0x0000FFFF)
-
-/* Section 3: Common PHY Registers */
-
-#define PHY_BCR                         ((uint16_t)0x00)    /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x01)    /*!< Transceiver Basic Status Register    */
-
-#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
-#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
-#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
-#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
-
-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
-#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-
-/* Section 4: Extended PHY Registers */
-
-#define PHY_SR                          ((uint16_t)0x1F)    /*!< PHY special control/ status register Offset     */
-
-#define PHY_SPEED_STATUS                ((uint16_t)0x0004)  /*!< PHY Speed mask                                  */
-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0010)  /*!< PHY Duplex mask                                 */
-
-
-#define PHY_ISFR                        ((uint16_t)0x1D)    /*!< PHY Interrupt Source Flag register Offset       */
-#define PHY_ISFR_INT4                   ((uint16_t)0x0010)  /*!< PHY Link down inturrupt                         */
-
-/* ################## SPI peripheral configuration ########################## */
-
-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
-* Activated: CRC code is present inside driver
-* Deactivated: CRC code cleaned from driver
-*/
-
-#define USE_SPI_CRC                     1U
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32f7xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32f7xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f7xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32f7xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32f7xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
-  #include "stm32f7xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
-  #include "stm32f7xx_hal_can_legacy.h"
-#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
-
-#ifdef HAL_CEC_MODULE_ENABLED
-  #include "stm32f7xx_hal_cec.h"
-#endif /* HAL_CEC_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32f7xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f7xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DMA2D_MODULE_ENABLED
-  #include "stm32f7xx_hal_dma2d.h"
-#endif /* HAL_DMA2D_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32f7xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_DCMI_MODULE_ENABLED
-  #include "stm32f7xx_hal_dcmi.h"
-#endif /* HAL_DCMI_MODULE_ENABLED */
-
-#ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f7xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32f7xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_SRAM_MODULE_ENABLED
-  #include "stm32f7xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
-  #include "stm32f7xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
-  #include "stm32f7xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_SDRAM_MODULE_ENABLED
-  #include "stm32f7xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */
-
-#ifdef HAL_HASH_MODULE_ENABLED
- #include "stm32f7xx_hal_hash.h"
-#endif /* HAL_HASH_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f7xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f7xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f7xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
- #include "stm32f7xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-
-#ifdef HAL_LTDC_MODULE_ENABLED
- #include "stm32f7xx_hal_ltdc.h"
-#endif /* HAL_LTDC_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f7xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_QSPI_MODULE_ENABLED
- #include "stm32f7xx_hal_qspi.h"
-#endif /* HAL_QSPI_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32f7xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f7xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SAI_MODULE_ENABLED
- #include "stm32f7xx_hal_sai.h"
-#endif /* HAL_SAI_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f7xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_SPDIFRX_MODULE_ENABLED
- #include "stm32f7xx_hal_spdifrx.h"
-#endif /* HAL_SPDIFRX_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f7xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f7xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f7xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f7xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f7xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f7xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f7xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f7xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f7xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-
-#ifdef HAL_DFSDM_MODULE_ENABLED
- #include "stm32f7xx_hal_dfsdm.h"
-#endif /* HAL_DFSDM_MODULE_ENABLED */
-
-#ifdef HAL_DSI_MODULE_ENABLED
- #include "stm32f7xx_hal_dsi.h"
-#endif /* HAL_DSI_MODULE_ENABLED */
-
-#ifdef HAL_JPEG_MODULE_ENABLED
- #include "stm32f7xx_hal_jpeg.h"
-#endif /* HAL_JPEG_MODULE_ENABLED */
-
-#ifdef HAL_MDIOS_MODULE_ENABLED
- #include "stm32f7xx_hal_mdios.h"
-#endif /* HAL_MDIOS_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed.
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F7xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32f7/boards/stm32f746nucleo/board.cmake b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.cmake
new file mode 100644
index 000000000..dd4d4a753
--- /dev/null
+++ b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.cmake
@@ -0,0 +1,13 @@
+set(MCU_VARIANT stm32f746xx)
+set(JLINK_DEVICE stm32f746xx)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F746ZGTx_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F746xx
+    HSE_VALUE=8000000
+    BOARD_TUD_RHPORT=0
+    BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
+    )
+endfunction()
diff --git a/hw/bsp/stm32f7/boards/stm32f746nucleo/stm32f7xx_hal_conf.h b/hw/bsp/stm32f7/boards/stm32f746nucleo/stm32f7xx_hal_conf.h
deleted file mode 100644
index 03dec8f0d..000000000
--- a/hw/bsp/stm32f7/boards/stm32f746nucleo/stm32f7xx_hal_conf.h
+++ /dev/null
@@ -1,472 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f7xx_hal_conf.h
-  * @author  MCD Application Team
-  * @brief   HAL configuration file.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F7xx_HAL_CONF_H
-#define __STM32F7xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver
-  */
-#define HAL_MODULE_ENABLED
-/* #define HAL_ADC_MODULE_ENABLED   */
-/* #define HAL_CAN_MODULE_ENABLED */
-/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
-/* #define HAL_CEC_MODULE_ENABLED   */
-/* #define HAL_CRC_MODULE_ENABLED   */
-/* #define HAL_CRYP_MODULE_ENABLED   */
-/* #define HAL_DAC_MODULE_ENABLED   */
-/* #define HAL_DCMI_MODULE_ENABLED  */
-#define HAL_DMA_MODULE_ENABLED
-/* #define HAL_DMA2D_MODULE_ENABLED  */
-/* #define HAL_ETH_MODULE_ENABLED  */
-#define HAL_FLASH_MODULE_ENABLED
-/* #define HAL_NAND_MODULE_ENABLED */
-/* #define HAL_NOR_MODULE_ENABLED */
-/* #define HAL_SRAM_MODULE_ENABLED */
-/* #define HAL_SDRAM_MODULE_ENABLED */
-/* #define HAL_HASH_MODULE_ENABLED   */
-#define HAL_GPIO_MODULE_ENABLED
-/* #define HAL_I2C_MODULE_ENABLED */
-/* #define HAL_I2S_MODULE_ENABLED    */
-/* #define HAL_IWDG_MODULE_ENABLED  */
-/* #define HAL_LPTIM_MODULE_ENABLED */
-/* #define HAL_LTDC_MODULE_ENABLED  */
-#define HAL_PWR_MODULE_ENABLED
-/* #define HAL_QSPI_MODULE_ENABLED    */
-#define HAL_RCC_MODULE_ENABLED
-/* #define HAL_RNG_MODULE_ENABLED    */
-/* #define HAL_RTC_MODULE_ENABLED */
-/* #define HAL_SAI_MODULE_ENABLED    */
-/* #define HAL_SD_MODULE_ENABLED   */
-/* #define HAL_SPDIFRX_MODULE_ENABLED */
-/* #define HAL_SPI_MODULE_ENABLED    */
-/* #define HAL_TIM_MODULE_ENABLED    */
-#define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED  */
-/* #define HAL_IRDA_MODULE_ENABLED  */
-/* #define HAL_SMARTCARD_MODULE_ENABLED  */
-/* #define HAL_WWDG_MODULE_ENABLED   */
-#define HAL_CORTEX_MODULE_ENABLED
-/* #define HAL_PCD_MODULE_ENABLED */
-/* #define HAL_HCD_MODULE_ENABLED */
-/* #define HAL_DFSDM_MODULE_ENABLED */
-/* #define HAL_DSI_MODULE_ENABLED */
-/* #define HAL_JPEG_MODULE_ENABLED */
-/* #define HAL_MDIOS_MODULE_ENABLED */
-
-
-/* ########################## HSE/HSI Values adaptation ##################### */
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSE_VALUE)
-  #define HSE_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)100U)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE)
- #define LSI_VALUE  ((uint32_t)32000U)       /*!< LSI Typical Value in Hz*/
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.  */
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  */
-#if !defined  (LSE_VALUE)
- #define LSE_VALUE  ((uint32_t)32768U)    /*!< Value of the External Low Speed oscillator in Hz */
-#endif /* LSE_VALUE */
-
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000U)   /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source
-  *        frequency, this source is inserted directly through I2S_CKIN pad.
-  */
-#if !defined  (EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE    ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* EXTERNAL_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */
-#define  VDD_VALUE                    ((uint32_t)3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            ((uint32_t)0x0FU) /*!< tick interrupt priority */
-#define  USE_RTOS                     0U
-#define  PREFETCH_ENABLE              1U
-#define  ART_ACCLERATOR_ENABLE        1U /* To enable instruction cache and prefetch */
-
-#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
-#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
-#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
-#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
-#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
-#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
-#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
-#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
-#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
-#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
-#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
-#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
-#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
-#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
-#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
-#define  USE_HAL_JPEG_REGISTER_CALLBACKS        0U /* JPEG register callback disabled      */
-#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
-#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
-#define  USE_HAL_MDIOS_REGISTER_CALLBACKS       0U /* MDIOS register callback disabled     */
-#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
-#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
-#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
-#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
-#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
-#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
-#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
-#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
-#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
-#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
-#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
-#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
-#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
-#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
-#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
-#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
-#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
-#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
-#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1 */
-
-/* ################## Ethernet peripheral configuration for NUCLEO 144 board ##################### */
-
-/* Section 1 : Ethernet peripheral configuration */
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2U
-#define MAC_ADDR1   0U
-#define MAC_ADDR2   0U
-#define MAC_ADDR3   0U
-#define MAC_ADDR4   0U
-#define MAC_ADDR5   0U
-
-/* Definition of the Ethernet driver buffers size and count */
-#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
-#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    ((uint32_t)5)       /* 5 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    ((uint32_t)5)       /* 5 Tx buffers of size ETH_TX_BUF_SIZE  */
-
-/* Section 2: PHY configuration section */
-/* LAN8742A PHY Address*/
-#define LAN8742A_PHY_ADDRESS            0x00
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
-#define PHY_RESET_DELAY                 ((uint32_t)0x00000FFF)
-/* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFF)
-
-#define PHY_READ_TO                     ((uint32_t)0x0000FFFF)
-#define PHY_WRITE_TO                    ((uint32_t)0x0000FFFF)
-
-/* Section 3: Common PHY Registers */
-
-#define PHY_BCR                         ((uint16_t)0x00)    /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x01)    /*!< Transceiver Basic Status Register    */
-
-#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
-#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
-#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
-#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
-
-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
-#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-
-/* Section 4: Extended PHY Registers */
-
-#define PHY_SR                          ((uint16_t)0x1F)    /*!< PHY special control/ status register Offset     */
-
-#define PHY_SPEED_STATUS                ((uint16_t)0x0004)  /*!< PHY Speed mask                                  */
-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0010)  /*!< PHY Duplex mask                                 */
-
-
-#define PHY_ISFR                        ((uint16_t)0x1D)    /*!< PHY Interrupt Source Flag register Offset       */
-#define PHY_ISFR_INT4                   ((uint16_t)0x0010)  /*!< PHY Link down inturrupt                         */
-
-/* ################## SPI peripheral configuration ########################## */
-
-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
-* Activated: CRC code is present inside driver
-* Deactivated: CRC code cleaned from driver
-*/
-
-#define USE_SPI_CRC                     1U
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32f7xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32f7xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f7xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32f7xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32f7xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
-  #include "stm32f7xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
-  #include "stm32f7xx_hal_can_legacy.h"
-#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
-
-#ifdef HAL_CEC_MODULE_ENABLED
-  #include "stm32f7xx_hal_cec.h"
-#endif /* HAL_CEC_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32f7xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f7xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DMA2D_MODULE_ENABLED
-  #include "stm32f7xx_hal_dma2d.h"
-#endif /* HAL_DMA2D_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32f7xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_DCMI_MODULE_ENABLED
-  #include "stm32f7xx_hal_dcmi.h"
-#endif /* HAL_DCMI_MODULE_ENABLED */
-
-#ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f7xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32f7xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_SRAM_MODULE_ENABLED
-  #include "stm32f7xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
-  #include "stm32f7xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
-  #include "stm32f7xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_SDRAM_MODULE_ENABLED
-  #include "stm32f7xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */
-
-#ifdef HAL_HASH_MODULE_ENABLED
- #include "stm32f7xx_hal_hash.h"
-#endif /* HAL_HASH_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f7xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f7xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f7xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
- #include "stm32f7xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-
-#ifdef HAL_LTDC_MODULE_ENABLED
- #include "stm32f7xx_hal_ltdc.h"
-#endif /* HAL_LTDC_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f7xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_QSPI_MODULE_ENABLED
- #include "stm32f7xx_hal_qspi.h"
-#endif /* HAL_QSPI_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32f7xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f7xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SAI_MODULE_ENABLED
- #include "stm32f7xx_hal_sai.h"
-#endif /* HAL_SAI_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f7xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_SPDIFRX_MODULE_ENABLED
- #include "stm32f7xx_hal_spdifrx.h"
-#endif /* HAL_SPDIFRX_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f7xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f7xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f7xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f7xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f7xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f7xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f7xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f7xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f7xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-
-#ifdef HAL_DFSDM_MODULE_ENABLED
- #include "stm32f7xx_hal_dfsdm.h"
-#endif /* HAL_DFSDM_MODULE_ENABLED */
-
-#ifdef HAL_DSI_MODULE_ENABLED
- #include "stm32f7xx_hal_dsi.h"
-#endif /* HAL_DSI_MODULE_ENABLED */
-
-#ifdef HAL_JPEG_MODULE_ENABLED
- #include "stm32f7xx_hal_jpeg.h"
-#endif /* HAL_JPEG_MODULE_ENABLED */
-
-#ifdef HAL_MDIOS_MODULE_ENABLED
- #include "stm32f7xx_hal_mdios.h"
-#endif /* HAL_MDIOS_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed.
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F7xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.cmake b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.cmake
new file mode 100644
index 000000000..679a6ce87
--- /dev/null
+++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.cmake
@@ -0,0 +1,13 @@
+set(MCU_VARIANT stm32f767xx)
+set(JLINK_DEVICE stm32f767zi)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F767ZITx_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F767xx
+    HSE_VALUE=8000000
+    BOARD_TUD_RHPORT=0
+    BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
+    )
+endfunction()
diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/stm32f7xx_hal_conf.h b/hw/bsp/stm32f7/boards/stm32f767nucleo/stm32f7xx_hal_conf.h
deleted file mode 100644
index 03dec8f0d..000000000
--- a/hw/bsp/stm32f7/boards/stm32f767nucleo/stm32f7xx_hal_conf.h
+++ /dev/null
@@ -1,472 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f7xx_hal_conf.h
-  * @author  MCD Application Team
-  * @brief   HAL configuration file.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F7xx_HAL_CONF_H
-#define __STM32F7xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver
-  */
-#define HAL_MODULE_ENABLED
-/* #define HAL_ADC_MODULE_ENABLED   */
-/* #define HAL_CAN_MODULE_ENABLED */
-/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
-/* #define HAL_CEC_MODULE_ENABLED   */
-/* #define HAL_CRC_MODULE_ENABLED   */
-/* #define HAL_CRYP_MODULE_ENABLED   */
-/* #define HAL_DAC_MODULE_ENABLED   */
-/* #define HAL_DCMI_MODULE_ENABLED  */
-#define HAL_DMA_MODULE_ENABLED
-/* #define HAL_DMA2D_MODULE_ENABLED  */
-/* #define HAL_ETH_MODULE_ENABLED  */
-#define HAL_FLASH_MODULE_ENABLED
-/* #define HAL_NAND_MODULE_ENABLED */
-/* #define HAL_NOR_MODULE_ENABLED */
-/* #define HAL_SRAM_MODULE_ENABLED */
-/* #define HAL_SDRAM_MODULE_ENABLED */
-/* #define HAL_HASH_MODULE_ENABLED   */
-#define HAL_GPIO_MODULE_ENABLED
-/* #define HAL_I2C_MODULE_ENABLED */
-/* #define HAL_I2S_MODULE_ENABLED    */
-/* #define HAL_IWDG_MODULE_ENABLED  */
-/* #define HAL_LPTIM_MODULE_ENABLED */
-/* #define HAL_LTDC_MODULE_ENABLED  */
-#define HAL_PWR_MODULE_ENABLED
-/* #define HAL_QSPI_MODULE_ENABLED    */
-#define HAL_RCC_MODULE_ENABLED
-/* #define HAL_RNG_MODULE_ENABLED    */
-/* #define HAL_RTC_MODULE_ENABLED */
-/* #define HAL_SAI_MODULE_ENABLED    */
-/* #define HAL_SD_MODULE_ENABLED   */
-/* #define HAL_SPDIFRX_MODULE_ENABLED */
-/* #define HAL_SPI_MODULE_ENABLED    */
-/* #define HAL_TIM_MODULE_ENABLED    */
-#define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED  */
-/* #define HAL_IRDA_MODULE_ENABLED  */
-/* #define HAL_SMARTCARD_MODULE_ENABLED  */
-/* #define HAL_WWDG_MODULE_ENABLED   */
-#define HAL_CORTEX_MODULE_ENABLED
-/* #define HAL_PCD_MODULE_ENABLED */
-/* #define HAL_HCD_MODULE_ENABLED */
-/* #define HAL_DFSDM_MODULE_ENABLED */
-/* #define HAL_DSI_MODULE_ENABLED */
-/* #define HAL_JPEG_MODULE_ENABLED */
-/* #define HAL_MDIOS_MODULE_ENABLED */
-
-
-/* ########################## HSE/HSI Values adaptation ##################### */
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSE_VALUE)
-  #define HSE_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)100U)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE)
- #define LSI_VALUE  ((uint32_t)32000U)       /*!< LSI Typical Value in Hz*/
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.  */
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  */
-#if !defined  (LSE_VALUE)
- #define LSE_VALUE  ((uint32_t)32768U)    /*!< Value of the External Low Speed oscillator in Hz */
-#endif /* LSE_VALUE */
-
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000U)   /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source
-  *        frequency, this source is inserted directly through I2S_CKIN pad.
-  */
-#if !defined  (EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE    ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* EXTERNAL_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */
-#define  VDD_VALUE                    ((uint32_t)3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            ((uint32_t)0x0FU) /*!< tick interrupt priority */
-#define  USE_RTOS                     0U
-#define  PREFETCH_ENABLE              1U
-#define  ART_ACCLERATOR_ENABLE        1U /* To enable instruction cache and prefetch */
-
-#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
-#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
-#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
-#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
-#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
-#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
-#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
-#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
-#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
-#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
-#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
-#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
-#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
-#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
-#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
-#define  USE_HAL_JPEG_REGISTER_CALLBACKS        0U /* JPEG register callback disabled      */
-#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
-#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
-#define  USE_HAL_MDIOS_REGISTER_CALLBACKS       0U /* MDIOS register callback disabled     */
-#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
-#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
-#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
-#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
-#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
-#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
-#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
-#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
-#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
-#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
-#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
-#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
-#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
-#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
-#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
-#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
-#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
-#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
-#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1 */
-
-/* ################## Ethernet peripheral configuration for NUCLEO 144 board ##################### */
-
-/* Section 1 : Ethernet peripheral configuration */
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2U
-#define MAC_ADDR1   0U
-#define MAC_ADDR2   0U
-#define MAC_ADDR3   0U
-#define MAC_ADDR4   0U
-#define MAC_ADDR5   0U
-
-/* Definition of the Ethernet driver buffers size and count */
-#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
-#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    ((uint32_t)5)       /* 5 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    ((uint32_t)5)       /* 5 Tx buffers of size ETH_TX_BUF_SIZE  */
-
-/* Section 2: PHY configuration section */
-/* LAN8742A PHY Address*/
-#define LAN8742A_PHY_ADDRESS            0x00
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
-#define PHY_RESET_DELAY                 ((uint32_t)0x00000FFF)
-/* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFF)
-
-#define PHY_READ_TO                     ((uint32_t)0x0000FFFF)
-#define PHY_WRITE_TO                    ((uint32_t)0x0000FFFF)
-
-/* Section 3: Common PHY Registers */
-
-#define PHY_BCR                         ((uint16_t)0x00)    /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x01)    /*!< Transceiver Basic Status Register    */
-
-#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
-#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
-#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
-#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
-
-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
-#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-
-/* Section 4: Extended PHY Registers */
-
-#define PHY_SR                          ((uint16_t)0x1F)    /*!< PHY special control/ status register Offset     */
-
-#define PHY_SPEED_STATUS                ((uint16_t)0x0004)  /*!< PHY Speed mask                                  */
-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0010)  /*!< PHY Duplex mask                                 */
-
-
-#define PHY_ISFR                        ((uint16_t)0x1D)    /*!< PHY Interrupt Source Flag register Offset       */
-#define PHY_ISFR_INT4                   ((uint16_t)0x0010)  /*!< PHY Link down inturrupt                         */
-
-/* ################## SPI peripheral configuration ########################## */
-
-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
-* Activated: CRC code is present inside driver
-* Deactivated: CRC code cleaned from driver
-*/
-
-#define USE_SPI_CRC                     1U
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32f7xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32f7xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f7xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32f7xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32f7xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
-  #include "stm32f7xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
-  #include "stm32f7xx_hal_can_legacy.h"
-#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
-
-#ifdef HAL_CEC_MODULE_ENABLED
-  #include "stm32f7xx_hal_cec.h"
-#endif /* HAL_CEC_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32f7xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f7xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DMA2D_MODULE_ENABLED
-  #include "stm32f7xx_hal_dma2d.h"
-#endif /* HAL_DMA2D_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32f7xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_DCMI_MODULE_ENABLED
-  #include "stm32f7xx_hal_dcmi.h"
-#endif /* HAL_DCMI_MODULE_ENABLED */
-
-#ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f7xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32f7xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_SRAM_MODULE_ENABLED
-  #include "stm32f7xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
-  #include "stm32f7xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
-  #include "stm32f7xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_SDRAM_MODULE_ENABLED
-  #include "stm32f7xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */
-
-#ifdef HAL_HASH_MODULE_ENABLED
- #include "stm32f7xx_hal_hash.h"
-#endif /* HAL_HASH_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f7xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f7xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f7xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
- #include "stm32f7xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-
-#ifdef HAL_LTDC_MODULE_ENABLED
- #include "stm32f7xx_hal_ltdc.h"
-#endif /* HAL_LTDC_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f7xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_QSPI_MODULE_ENABLED
- #include "stm32f7xx_hal_qspi.h"
-#endif /* HAL_QSPI_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32f7xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f7xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SAI_MODULE_ENABLED
- #include "stm32f7xx_hal_sai.h"
-#endif /* HAL_SAI_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f7xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_SPDIFRX_MODULE_ENABLED
- #include "stm32f7xx_hal_spdifrx.h"
-#endif /* HAL_SPDIFRX_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f7xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f7xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f7xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f7xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f7xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f7xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f7xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f7xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f7xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-
-#ifdef HAL_DFSDM_MODULE_ENABLED
- #include "stm32f7xx_hal_dfsdm.h"
-#endif /* HAL_DFSDM_MODULE_ENABLED */
-
-#ifdef HAL_DSI_MODULE_ENABLED
- #include "stm32f7xx_hal_dsi.h"
-#endif /* HAL_DSI_MODULE_ENABLED */
-
-#ifdef HAL_JPEG_MODULE_ENABLED
- #include "stm32f7xx_hal_jpeg.h"
-#endif /* HAL_JPEG_MODULE_ENABLED */
-
-#ifdef HAL_MDIOS_MODULE_ENABLED
- #include "stm32f7xx_hal_mdios.h"
-#endif /* HAL_MDIOS_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed.
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F7xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32f7/boards/stm32f769disco/board.cmake b/hw/bsp/stm32f7/boards/stm32f769disco/board.cmake
new file mode 100644
index 000000000..62a157c58
--- /dev/null
+++ b/hw/bsp/stm32f7/boards/stm32f769disco/board.cmake
@@ -0,0 +1,14 @@
+set(MCU_VARIANT stm32f769xx)
+set(JLINK_DEVICE stm32f769xx)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F769ZITx_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F769xx
+    HSE_VALUE=25000000
+    # default to PORT 1 High Speed
+    BOARD_TUD_RHPORT=1
+    BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+    )
+endfunction()
diff --git a/hw/bsp/stm32f7/boards/stm32f769disco/stm32f7xx_hal_conf.h b/hw/bsp/stm32f7/boards/stm32f769disco/stm32f7xx_hal_conf.h
deleted file mode 100644
index 581f0e46a..000000000
--- a/hw/bsp/stm32f7/boards/stm32f769disco/stm32f7xx_hal_conf.h
+++ /dev/null
@@ -1,472 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f7xx_hal_conf.h
-  * @author  MCD Application Team
-  * @brief   HAL configuration file.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F7xx_HAL_CONF_H
-#define __STM32F7xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver
-  */
-#define HAL_MODULE_ENABLED
-/* #define HAL_ADC_MODULE_ENABLED   */
-/* #define HAL_CAN_MODULE_ENABLED */
-/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
-/* #define HAL_CEC_MODULE_ENABLED   */
-/* #define HAL_CRC_MODULE_ENABLED   */
-/* #define HAL_CRYP_MODULE_ENABLED   */
-/* #define HAL_DAC_MODULE_ENABLED   */
-/* #define HAL_DCMI_MODULE_ENABLED  */
-#define HAL_DMA_MODULE_ENABLED
-/* #define HAL_DMA2D_MODULE_ENABLED  */
-/* #define HAL_ETH_MODULE_ENABLED  */
-#define HAL_FLASH_MODULE_ENABLED
-/* #define HAL_NAND_MODULE_ENABLED */
-/* #define HAL_NOR_MODULE_ENABLED */
-/* #define HAL_SRAM_MODULE_ENABLED */
-/* #define HAL_SDRAM_MODULE_ENABLED */
-/* #define HAL_HASH_MODULE_ENABLED   */
-#define HAL_GPIO_MODULE_ENABLED
-/* #define HAL_I2C_MODULE_ENABLED */
-/* #define HAL_I2S_MODULE_ENABLED    */
-/* #define HAL_IWDG_MODULE_ENABLED  */
-/* #define HAL_LPTIM_MODULE_ENABLED */
-/* #define HAL_LTDC_MODULE_ENABLED  */
-#define HAL_PWR_MODULE_ENABLED
-/* #define HAL_QSPI_MODULE_ENABLED    */
-#define HAL_RCC_MODULE_ENABLED
-/* #define HAL_RNG_MODULE_ENABLED    */
-/* #define HAL_RTC_MODULE_ENABLED */
-/* #define HAL_SAI_MODULE_ENABLED    */
-/* #define HAL_SD_MODULE_ENABLED   */
-/* #define HAL_SPDIFRX_MODULE_ENABLED */
-/* #define HAL_SPI_MODULE_ENABLED    */
-/* #define HAL_TIM_MODULE_ENABLED    */
-#define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED  */
-/* #define HAL_IRDA_MODULE_ENABLED  */
-/* #define HAL_SMARTCARD_MODULE_ENABLED  */
-/* #define HAL_WWDG_MODULE_ENABLED   */
-#define HAL_CORTEX_MODULE_ENABLED
-/* #define HAL_PCD_MODULE_ENABLED */
-/* #define HAL_HCD_MODULE_ENABLED */
-/* #define HAL_DFSDM_MODULE_ENABLED */
-/* #define HAL_DSI_MODULE_ENABLED */
-/* #define HAL_JPEG_MODULE_ENABLED */
-/* #define HAL_MDIOS_MODULE_ENABLED */
-
-
-/* ########################## HSE/HSI Values adaptation ##################### */
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSE_VALUE)
-  #define HSE_VALUE    ((uint32_t)25000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)100U)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE)
- #define LSI_VALUE  ((uint32_t)32000U)       /*!< LSI Typical Value in Hz*/
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.  */
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  */
-#if !defined  (LSE_VALUE)
- #define LSE_VALUE  ((uint32_t)32768U)    /*!< Value of the External Low Speed oscillator in Hz */
-#endif /* LSE_VALUE */
-
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000U)   /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source
-  *        frequency, this source is inserted directly through I2S_CKIN pad.
-  */
-#if !defined  (EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE    ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* EXTERNAL_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */
-#define  VDD_VALUE                    ((uint32_t)3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            ((uint32_t)0x0FU) /*!< tick interrupt priority */
-#define  USE_RTOS                     0U
-#define  PREFETCH_ENABLE              1U
-#define  ART_ACCLERATOR_ENABLE        1U /* To enable instruction cache and prefetch */
-
-#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
-#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
-#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
-#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
-#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
-#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
-#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
-#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
-#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
-#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
-#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
-#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
-#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
-#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
-#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
-#define  USE_HAL_JPEG_REGISTER_CALLBACKS        0U /* JPEG register callback disabled      */
-#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
-#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
-#define  USE_HAL_MDIOS_REGISTER_CALLBACKS       0U /* MDIOS register callback disabled     */
-#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
-#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
-#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
-#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
-#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
-#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
-#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
-#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
-#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
-#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
-#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
-#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
-#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
-#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
-#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
-#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
-#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
-#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
-#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1 */
-
-/* ################## Ethernet peripheral configuration for NUCLEO 144 board ##################### */
-
-/* Section 1 : Ethernet peripheral configuration */
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2U
-#define MAC_ADDR1   0U
-#define MAC_ADDR2   0U
-#define MAC_ADDR3   0U
-#define MAC_ADDR4   0U
-#define MAC_ADDR5   0U
-
-/* Definition of the Ethernet driver buffers size and count */
-#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
-#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    ((uint32_t)5)       /* 5 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    ((uint32_t)5)       /* 5 Tx buffers of size ETH_TX_BUF_SIZE  */
-
-/* Section 2: PHY configuration section */
-/* LAN8742A PHY Address*/
-#define LAN8742A_PHY_ADDRESS            0x00
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
-#define PHY_RESET_DELAY                 ((uint32_t)0x00000FFF)
-/* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFF)
-
-#define PHY_READ_TO                     ((uint32_t)0x0000FFFF)
-#define PHY_WRITE_TO                    ((uint32_t)0x0000FFFF)
-
-/* Section 3: Common PHY Registers */
-
-#define PHY_BCR                         ((uint16_t)0x00)    /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x01)    /*!< Transceiver Basic Status Register    */
-
-#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
-#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
-#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
-#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
-
-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
-#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-
-/* Section 4: Extended PHY Registers */
-
-#define PHY_SR                          ((uint16_t)0x1F)    /*!< PHY special control/ status register Offset     */
-
-#define PHY_SPEED_STATUS                ((uint16_t)0x0004)  /*!< PHY Speed mask                                  */
-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0010)  /*!< PHY Duplex mask                                 */
-
-
-#define PHY_ISFR                        ((uint16_t)0x1D)    /*!< PHY Interrupt Source Flag register Offset       */
-#define PHY_ISFR_INT4                   ((uint16_t)0x0010)  /*!< PHY Link down inturrupt                         */
-
-/* ################## SPI peripheral configuration ########################## */
-
-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
-* Activated: CRC code is present inside driver
-* Deactivated: CRC code cleaned from driver
-*/
-
-#define USE_SPI_CRC                     1U
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32f7xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32f7xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f7xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32f7xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32f7xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
-  #include "stm32f7xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
-  #include "stm32f7xx_hal_can_legacy.h"
-#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
-
-#ifdef HAL_CEC_MODULE_ENABLED
-  #include "stm32f7xx_hal_cec.h"
-#endif /* HAL_CEC_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32f7xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f7xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DMA2D_MODULE_ENABLED
-  #include "stm32f7xx_hal_dma2d.h"
-#endif /* HAL_DMA2D_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32f7xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_DCMI_MODULE_ENABLED
-  #include "stm32f7xx_hal_dcmi.h"
-#endif /* HAL_DCMI_MODULE_ENABLED */
-
-#ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f7xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32f7xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_SRAM_MODULE_ENABLED
-  #include "stm32f7xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
-  #include "stm32f7xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
-  #include "stm32f7xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_SDRAM_MODULE_ENABLED
-  #include "stm32f7xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */
-
-#ifdef HAL_HASH_MODULE_ENABLED
- #include "stm32f7xx_hal_hash.h"
-#endif /* HAL_HASH_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f7xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f7xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f7xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
- #include "stm32f7xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-
-#ifdef HAL_LTDC_MODULE_ENABLED
- #include "stm32f7xx_hal_ltdc.h"
-#endif /* HAL_LTDC_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f7xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_QSPI_MODULE_ENABLED
- #include "stm32f7xx_hal_qspi.h"
-#endif /* HAL_QSPI_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32f7xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f7xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SAI_MODULE_ENABLED
- #include "stm32f7xx_hal_sai.h"
-#endif /* HAL_SAI_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f7xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_SPDIFRX_MODULE_ENABLED
- #include "stm32f7xx_hal_spdifrx.h"
-#endif /* HAL_SPDIFRX_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f7xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f7xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f7xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f7xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f7xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f7xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f7xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f7xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f7xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-
-#ifdef HAL_DFSDM_MODULE_ENABLED
- #include "stm32f7xx_hal_dfsdm.h"
-#endif /* HAL_DFSDM_MODULE_ENABLED */
-
-#ifdef HAL_DSI_MODULE_ENABLED
- #include "stm32f7xx_hal_dsi.h"
-#endif /* HAL_DSI_MODULE_ENABLED */
-
-#ifdef HAL_JPEG_MODULE_ENABLED
- #include "stm32f7xx_hal_jpeg.h"
-#endif /* HAL_JPEG_MODULE_ENABLED */
-
-#ifdef HAL_MDIOS_MODULE_ENABLED
- #include "stm32f7xx_hal_mdios.h"
-#endif /* HAL_MDIOS_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed.
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F7xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32f7/family.cmake b/hw/bsp/stm32f7/family.cmake
new file mode 100644
index 000000000..3b6ba1a15
--- /dev/null
+++ b/hw/bsp/stm32f7/family.cmake
@@ -0,0 +1,135 @@
+include_guard()
+
+if (NOT BOARD)
+  message(FATAL_ERROR "BOARD not specified")
+endif ()
+
+set(ST_FAMILY f7)
+set(ST_PREFIX stm32${ST_FAMILY}xx)
+
+set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver)
+set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY})
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m7 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS STM32F7 CACHE INTERNAL "")
+
+# enable LTO if supported
+include(CheckIPOSupported)
+check_ipo_supported(RESULT IPO_SUPPORTED)
+if (IPO_SUPPORTED)
+  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+endif ()
+
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    # Startup & Linker script
+    set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+    set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+
+    add_library(${BOARD_TARGET} STATIC
+      ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
+      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+      )
+    target_include_directories(${BOARD_TARGET} PUBLIC
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+      ${CMSIS_5}/CMSIS/Core/Include
+      ${ST_CMSIS}/Include
+      ${ST_HAL_DRIVER}/Inc
+      )
+    target_compile_options(${BOARD_TARGET} PUBLIC
+      )
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      )
+
+    update_board(${BOARD_TARGET})
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--script=${LD_FILE_GNU}"
+        -nostartfiles
+        # nanolib
+        --specs=nosys.specs
+        --specs=nano.specs
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET)
+  family_configure_common(${TARGET})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32F7)
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_flash_stlink(${TARGET})
+  family_flash_jlink(${TARGET})
+endfunction()
+
+
+function(family_configure_device_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
+
+function(family_configure_host_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
+
+function(family_configure_dual_usb_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
diff --git a/hw/bsp/stm32f7/boards/stlinkv3mini/stm32f7xx_hal_conf.h b/hw/bsp/stm32f7/stm32f7xx_hal_conf.h
similarity index 100%
rename from hw/bsp/stm32f7/boards/stlinkv3mini/stm32f7xx_hal_conf.h
rename to hw/bsp/stm32f7/stm32f7xx_hal_conf.h
diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake
index 1ebf8a700..defeb0114 100644
--- a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake
+++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake
@@ -2,10 +2,6 @@
 set(JLINK_DEVICE STM32G0B1RE)
 
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32G0B1RETx_FLASH.ld)
-set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/stm32g0b1xx_flash.icf)
-
-set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_stm32g0b1xx.s)
-set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_stm32g0b1xx.s)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake
index 1381eaa5f..fa93566bf 100644
--- a/hw/bsp/stm32g0/family.cmake
+++ b/hw/bsp/stm32g0/family.cmake
@@ -34,6 +34,11 @@ endif ()
 # only need to be built ONCE for all examples
 function(add_board_target BOARD_TARGET)
   if (NOT TARGET ${BOARD_TARGET})
+    # Startup & Linker script
+    set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+    set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+
     add_library(${BOARD_TARGET} STATIC
       ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake
index 9b72672ea..7a276b20d 100644
--- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake
+++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.cmake
@@ -2,10 +2,6 @@ set(MCU_VARIANT stm32g474xx)
 set(JLINK_DEVICE stm32g474re)
 
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32G474RETx_FLASH.ld)
-set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
-
-set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake b/hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake
index 88cd616b3..11c76863f 100644
--- a/hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake
+++ b/hw/bsp/stm32g4/boards/stm32g474nucleo/board.cmake
@@ -2,10 +2,6 @@ set(MCU_VARIANT stm32g474xx)
 set(JLINK_DEVICE stm32g474re)
 
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32G474RETx_FLASH.ld)
-set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
-
-set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake
index 45525c744..c89993f6d 100644
--- a/hw/bsp/stm32g4/family.cmake
+++ b/hw/bsp/stm32g4/family.cmake
@@ -34,6 +34,11 @@ endif ()
 # only need to be built ONCE for all examples
 function(add_board_target BOARD_TARGET)
   if (NOT TARGET ${BOARD_TARGET})
+    # Startup & Linker script
+    set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+    set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+
     add_library(${BOARD_TARGET} STATIC
       ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
diff --git a/hw/bsp/stm32h7/boards/daisyseed/board.cmake b/hw/bsp/stm32h7/boards/daisyseed/board.cmake
index 9fac51128..4811c97e8 100644
--- a/hw/bsp/stm32h7/boards/daisyseed/board.cmake
+++ b/hw/bsp/stm32h7/boards/daisyseed/board.cmake
@@ -2,10 +2,6 @@ set(MCU_VARIANT stm32h750xx)
 set(JLINK_DEVICE stm32h750ibk6_m7)
 
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/stm32h750ibkx_flash.ld)
-set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
-
-set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.cmake b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.cmake
index ac1acd346..b7d133dfa 100644
--- a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.cmake
+++ b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.cmake
@@ -2,10 +2,6 @@ set(MCU_VARIANT stm32h723xx)
 set(JLINK_DEVICE stm32h723zg)
 
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/${MCU_VARIANT}_flash.ld)
-set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
-
-set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.cmake b/hw/bsp/stm32h7/boards/stm32h743eval/board.cmake
index 2cd2a4bac..a28aa87bd 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/board.cmake
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.cmake
@@ -2,10 +2,6 @@ set(MCU_VARIANT stm32h743xx)
 set(JLINK_DEVICE stm32h743xi)
 
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/${MCU_VARIANT}_flash.ld)
-set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
-
-set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.cmake b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.cmake
index 9d5f09be4..f1532a95f 100644
--- a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.cmake
+++ b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.cmake
@@ -2,10 +2,6 @@ set(MCU_VARIANT stm32h743xx)
 set(JLINK_DEVICE stm32h743xi)
 
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/${MCU_VARIANT}_flash.ld)
-set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
-
-set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake b/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake
index 46744df49..f0e8bd70a 100644
--- a/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake
+++ b/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake
@@ -2,10 +2,6 @@ set(MCU_VARIANT stm32h745xx)
 set(JLINK_DEVICE stm32h745xi_m7)
 
 set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_flash_CM7.ld)
-set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash_CM7.icf)
-
-set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.cmake b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.cmake
index 033d3a9f2..83c8d4833 100644
--- a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.cmake
+++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.cmake
@@ -2,10 +2,6 @@ set(MCU_VARIANT stm32h743xx)
 set(JLINK_DEVICE stm32h743xi)
 
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/${MCU_VARIANT}_flash.ld)
-set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
-
-set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32h7/family.cmake b/hw/bsp/stm32h7/family.cmake
index f04a768a5..8f161470e 100644
--- a/hw/bsp/stm32h7/family.cmake
+++ b/hw/bsp/stm32h7/family.cmake
@@ -34,6 +34,11 @@ endif ()
 # only need to be built ONCE for all examples
 function(add_board_target BOARD_TARGET)
   if (NOT TARGET ${BOARD_TARGET})
+    # Startup & Linker script
+    set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+    set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+
     add_library(${BOARD_TARGET} STATIC
       ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
diff --git a/hw/bsp/stm32l4/boards/stm32l412nucleo/board.cmake b/hw/bsp/stm32l4/boards/stm32l412nucleo/board.cmake
new file mode 100644
index 000000000..e979a7378
--- /dev/null
+++ b/hw/bsp/stm32l4/boards/stm32l412nucleo/board.cmake
@@ -0,0 +1,10 @@
+set(MCU_VARIANT stm32l412xx)
+set(JLINK_DEVICE stm32l412kb)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32L412KBUx_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32L412xx
+    )
+endfunction()
diff --git a/hw/bsp/stm32l4/boards/stm32l476disco/board.cmake b/hw/bsp/stm32l4/boards/stm32l476disco/board.cmake
new file mode 100644
index 000000000..4ade0a5c9
--- /dev/null
+++ b/hw/bsp/stm32l4/boards/stm32l476disco/board.cmake
@@ -0,0 +1,10 @@
+set(MCU_VARIANT stm32l476xx)
+set(JLINK_DEVICE stm32l476vg)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32L476VGTx_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32L476xx
+    )
+endfunction()
diff --git a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.cmake b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.cmake
new file mode 100644
index 000000000..ead241e32
--- /dev/null
+++ b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.cmake
@@ -0,0 +1,10 @@
+set(MCU_VARIANT stm32l4p5xx)
+set(JLINK_DEVICE stm32l4p5zg)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32L4P5ZGTX_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32L4P5xx
+    )
+endfunction()
diff --git a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.cmake b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.cmake
new file mode 100644
index 000000000..d4bbe6a94
--- /dev/null
+++ b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.cmake
@@ -0,0 +1,11 @@
+set(MCU_VARIANT stm32l4r5xx)
+set(JLINK_DEVICE stm32l4r5zi)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32L4RXxI_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32L4R5xx
+    HSE_VALUE=8000000
+    )
+endfunction()
diff --git a/hw/bsp/stm32l4/family.cmake b/hw/bsp/stm32l4/family.cmake
new file mode 100644
index 000000000..d299b2568
--- /dev/null
+++ b/hw/bsp/stm32l4/family.cmake
@@ -0,0 +1,136 @@
+include_guard()
+
+if (NOT BOARD)
+  message(FATAL_ERROR "BOARD not specified")
+endif ()
+
+set(ST_FAMILY l4)
+set(ST_PREFIX stm32${ST_FAMILY}xx)
+
+set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver)
+set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY})
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS STM32L4 CACHE INTERNAL "")
+
+# enable LTO if supported
+include(CheckIPOSupported)
+check_ipo_supported(RESULT IPO_SUPPORTED)
+if (IPO_SUPPORTED)
+  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+endif ()
+
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    # Startup & Linker script
+    set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+    set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+
+    add_library(${BOARD_TARGET} STATIC
+      ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
+      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+      )
+    target_include_directories(${BOARD_TARGET} PUBLIC
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+      ${CMSIS_5}/CMSIS/Core/Include
+      ${ST_CMSIS}/Include
+      ${ST_HAL_DRIVER}/Inc
+      )
+    target_compile_options(${BOARD_TARGET} PUBLIC
+      )
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      )
+
+    update_board(${BOARD_TARGET})
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--script=${LD_FILE_GNU}"
+        -nostartfiles
+        # nanolib
+        --specs=nosys.specs
+        --specs=nano.specs
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET)
+  family_configure_common(${TARGET})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_$(FAMILY_MCUS))
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/st/stm32_fsdev/dcd_stm32_fsdev.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_flash_stlink(${TARGET})
+  family_flash_jlink(${TARGET})
+endfunction()
+
+
+function(family_configure_device_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
+
+function(family_configure_host_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
+
+function(family_configure_dual_usb_example TARGET)
+  family_configure_example(${TARGET})
+endfunction()
diff --git a/hw/bsp/stm32l4/family.mk b/hw/bsp/stm32l4/family.mk
index d492b9645..c16040887 100644
--- a/hw/bsp/stm32l4/family.mk
+++ b/hw/bsp/stm32l4/family.mk
@@ -32,11 +32,11 @@ SRC_C += \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_dma.c \
-	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
-	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c \
-	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart_ex.c
 

From c81d8b43a1f0d366cf273b489ce51a3f21653c87 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 24 Jun 2023 22:58:15 +0700
Subject: [PATCH 444/691] fix ci build

---
 hw/bsp/stm32f0/family.cmake                       | 1 +
 hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake | 5 ++---
 hw/bsp/stm32h7/boards/stm32h745disco/board.cmake  | 1 +
 hw/bsp/stm32h7/family.cmake                       | 5 ++++-
 hw/bsp/stm32l4/family.cmake                       | 2 +-
 5 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/hw/bsp/stm32f0/family.cmake b/hw/bsp/stm32f0/family.cmake
index 9f6a7f098..ecf6a8424 100644
--- a/hw/bsp/stm32f0/family.cmake
+++ b/hw/bsp/stm32f0/family.cmake
@@ -59,6 +59,7 @@ function(add_board_target BOARD_TARGET)
     target_compile_options(${BOARD_TARGET} PUBLIC
       )
     target_compile_definitions(${BOARD_TARGET} PUBLIC
+      CFG_EXAMPLE_MSC_READONLY
       )
 
     update_board(${BOARD_TARGET})
diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake
index defeb0114..8874b0526 100644
--- a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake
+++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.cmake
@@ -1,11 +1,10 @@
-#set(MCU_VARIANT MIMXRT1011)
-set(JLINK_DEVICE STM32G0B1RE)
+set(MCU_VARIANT stm32g0b1xx)
+set(JLINK_DEVICE stm32g0b1re)
 
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32G0B1RETx_FLASH.ld)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     STM32G0B1xx
-    #HSE_VALUE=8000000U
     )
 endfunction()
diff --git a/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake b/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake
index f0e8bd70a..f1313d54e 100644
--- a/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake
+++ b/hw/bsp/stm32h7/boards/stm32h745disco/board.cmake
@@ -2,6 +2,7 @@ set(MCU_VARIANT stm32h745xx)
 set(JLINK_DEVICE stm32h745xi_m7)
 
 set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_flash_CM7.ld)
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash_CM7.icf)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32h7/family.cmake b/hw/bsp/stm32h7/family.cmake
index 8f161470e..f3705edb4 100644
--- a/hw/bsp/stm32h7/family.cmake
+++ b/hw/bsp/stm32h7/family.cmake
@@ -37,7 +37,10 @@ function(add_board_target BOARD_TARGET)
     # Startup & Linker script
     set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
     set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+
+    if(NOT DEFINED LD_FILE_IAR)
+      set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+    endif()
 
     add_library(${BOARD_TARGET} STATIC
       ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
diff --git a/hw/bsp/stm32l4/family.cmake b/hw/bsp/stm32l4/family.cmake
index d299b2568..c8397f418 100644
--- a/hw/bsp/stm32l4/family.cmake
+++ b/hw/bsp/stm32l4/family.cmake
@@ -110,7 +110,7 @@ function(family_configure_example TARGET)
   family_add_tinyusb(${TARGET} OPT_MCU_$(FAMILY_MCUS))
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    ${TOP}/src/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
     )
   target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 

From b9cefb144004691ec201f3bb60619ebac633da4b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 24 Jun 2023 23:10:01 +0700
Subject: [PATCH 445/691] fix build with L4

---
 hw/bsp/stm32l4/family.cmake | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/bsp/stm32l4/family.cmake b/hw/bsp/stm32l4/family.cmake
index c8397f418..83c51c9bf 100644
--- a/hw/bsp/stm32l4/family.cmake
+++ b/hw/bsp/stm32l4/family.cmake
@@ -107,7 +107,7 @@ function(family_configure_example TARGET)
     )
 
   # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_$(FAMILY_MCUS))
+  family_add_tinyusb(${TARGET} OPT_MCU_${FAMILY_MCUS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c

From a64d5607a745cc655ded19bc91494a9b55dc0dd6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 24 Jun 2023 23:17:28 +0700
Subject: [PATCH 446/691] fix l4 freertos build

---
 .../stm32l4/FreeRTOSConfig/FreeRTOSConfig.h   | 165 ++++++++++++++++++
 1 file changed, 165 insertions(+)
 create mode 100644 hw/bsp/stm32l4/FreeRTOSConfig/FreeRTOSConfig.h

diff --git a/hw/bsp/stm32l4/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32l4/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..e6a735ddd
--- /dev/null
+++ b/hw/bsp/stm32l4/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,165 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "stm32l4xx.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               2
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       4
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif

From 9b2b4ce647812150ba03cc29a196ce10564a2c73 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 24 Jun 2023 23:32:24 +0700
Subject: [PATCH 447/691] move some family ci make to cmake

---
 .github/workflows/build_arm.yml | 6 ++----
 .github/workflows/cmake_arm.yml | 5 +++++
 2 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 620aec193..94721004c 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -43,11 +43,9 @@ jobs:
         - 'samd11 samd21'
         - 'samd51 same5x'
         - 'saml2x'
-        - 'stm32f0 stm32f1 stm32f2 stm32f3'
+        - 'stm32f2 stm32f3'
         - 'stm32f4'
-        - 'stm32f7'
-        - 'stm32h7'
-        - 'stm32l0 stm32l4 stm32u5 stm32wb'
+        - 'stm32l0 stm32u5 stm32wb'
         - 'tm4c123 xmc4000'
     steps:
     - name: Setup Python
diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index 2ca8e32f5..ec2f977b6 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -37,8 +37,13 @@ jobs:
           - 'mcx'
           - 'imxrt'
           - 'rp2040'
+          - 'stm32f0'
+          - 'stm32f1'
+          - 'stm32f7'
           - 'stm32g0'
           - 'stm32g4'
+          - 'stm32h7'
+          - 'stm32l4'
     steps:
     - name: Setup Python
       uses: actions/setup-python@v4

From 30ccfe083216f5219bfa8e85e0a0a26547a2655c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 24 Jun 2023 23:36:52 +0700
Subject: [PATCH 448/691] more cmake less make

---
 .github/workflows/build_arm.yml | 4 ++--
 .github/workflows/cmake_arm.yml | 6 ++++--
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 94721004c..b7e6890f9 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -34,9 +34,9 @@ jobs:
         family:
         # Alphabetical order
         - 'broadcom_32bit'
-        - 'kinetis_k32l2 kinetis_kl'
+        - 'kinetis_k32l2'
         - 'lpc11 lpc13 lpc15 lpc17'
-        - 'lpc51 lpc54 lpc55'
+        - 'lpc51 lpc54'
         - 'mm32 msp432e4'
         - 'nrf'
         - 'ra'
diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index ec2f977b6..6d7977de8 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -33,9 +33,11 @@ jobs:
       matrix:
         family:
           # Alphabetical order
-          - 'lpc18'
-          - 'mcx'
           - 'imxrt'
+          - 'kinetis_kl'
+          - 'lpc18'
+          - 'lpc55'
+          - 'mcx'
           - 'rp2040'
           - 'stm32f0'
           - 'stm32f1'

From 15376397b10e6fb35ef7ec4b693271adbafecabf Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 25 Jun 2023 00:05:23 +0700
Subject: [PATCH 449/691] run ci with -DCMAKE_BUILD_TYPE=MinSizeRel

---
 .github/workflows/build_iar.yml |  2 +-
 .github/workflows/cmake_arm.yml |  2 +-
 hw/bsp/stm32f7/family.c         | 10 ++++++++++
 hw/bsp/stm32f7/family.mk        |  2 +-
 tools/build_cmake.py            | 15 +++++++--------
 5 files changed, 20 insertions(+), 11 deletions(-)

diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml
index 6273385e7..4c5fd770c 100644
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@@ -47,4 +47,4 @@ jobs:
         run: python3 tools/get_deps.py ${{ matrix.family }}
 
       - name: Build
-        run: python3 tools/build_cmake.py ${{ matrix.family }} -DTOOLCHAIN=iar
+        run: python3 tools/build_cmake.py ${{ matrix.family }} -DTOOLCHAIN=iar -DCMAKE_BUILD_TYPE=MinSizeRel
diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index 6d7977de8..0ce63281e 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -75,7 +75,7 @@ jobs:
       run: python3 tools/get_deps.py ${{ matrix.family }}
 
     - name: Build
-      run: python tools/build_cmake.py ${{ matrix.family }}
+      run: python tools/build_cmake.py ${{ matrix.family }} -DCMAKE_BUILD_TYPE=MinSizeRel
       env:
         # for rp2040, there is no harm if defined for other families
         PICO_SDK_PATH: ${{ github.workspace }}/pico-sdk
diff --git a/hw/bsp/stm32f7/family.c b/hw/bsp/stm32f7/family.c
index 88cba2c7d..ce7e9d1bc 100644
--- a/hw/bsp/stm32f7/family.c
+++ b/hw/bsp/stm32f7/family.c
@@ -143,9 +143,19 @@ void board_init(void)
   GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
+// Suppress warning caused by mcu driver
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wshadow"
+#endif
+
   /* Enable USB FS Clocks */
   __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 #if OTG_FS_VBUS_SENSE
   /* Configure VBUS Pin */
   GPIO_InitStruct.Pin = GPIO_PIN_9;
diff --git a/hw/bsp/stm32f7/family.mk b/hw/bsp/stm32f7/family.mk
index 4a699ea31..7f37a7e40 100644
--- a/hw/bsp/stm32f7/family.mk
+++ b/hw/bsp/stm32f7/family.mk
@@ -33,7 +33,7 @@ CFLAGS_GCC += \
   -nostdlib -nostartfiles
 
 # mcu driver cause following warnings
-CFLAGS_GCC += -Wno-error=shadow -Wno-error=cast-align
+CFLAGS_GCC += -Wno-error=cast-align
 
 # -----------------
 # Sources & Include
diff --git a/tools/build_cmake.py b/tools/build_cmake.py
index eb7375ae2..e539b9f94 100644
--- a/tools/build_cmake.py
+++ b/tools/build_cmake.py
@@ -13,8 +13,6 @@ SKIPPED = "\033[33mskipped\033[0m"
 
 build_separator = '-' * 106
 
-toolchain_iar = '-DTOOLCHAIN=iar'
-
 def filter_with_input(mylist):
     if len(sys.argv) > 1:
         input_args = list(set(mylist).intersection(sys.argv))
@@ -22,7 +20,7 @@ def filter_with_input(mylist):
             mylist[:] = input_args
 
 
-def build_family(family, toolchain_option):
+def build_family(family, cmake_option):
     all_boards = []
     for entry in os.scandir("hw/bsp/{}/boards".format(family)):
         if entry.is_dir() and entry.name != 'pico_sdk':
@@ -38,7 +36,7 @@ def build_family(family, toolchain_option):
 
         # Generate build
         r = subprocess.run(f"cmake examples -B {build_dir} -G \"Ninja\" -DFAMILY={family} -DBOARD"
-                           f"={board} {toolchain_option}", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+                           f"={board} {cmake_option}", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
 
         # Build
         if r.returncode == 0:
@@ -74,9 +72,10 @@ def build_family(family, toolchain_option):
 
 
 if __name__ == '__main__':
-    # IAR CC
-    if toolchain_iar not in sys.argv:
-        toolchain_iar = ''
+    cmake_options = ''
+    for a in sys.argv[1:]:
+        if a.startswith('-'):
+            cmake_options += ' ' + a
 
     # If family are not specified in arguments, build all supported
     all_families = []
@@ -93,7 +92,7 @@ if __name__ == '__main__':
     # succeeded, failed, skipped
     total_result = [0, 0, 0]
     for family in all_families:
-        fret = build_family(family, toolchain_iar)
+        fret = build_family(family, cmake_options)
         if len(fret) == len(total_result):
             total_result = [total_result[i] + fret[i] for i in range(len(fret))]
 

From 2ecd7c148db9f370dc151dc2f4fe223a71e9df76 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 25 Jun 2023 09:55:05 +0700
Subject: [PATCH 450/691] fix ci with lpc55 and kl, move hw test l4 to cmake
 iar

---
 .github/workflows/build_arm.yml | 128 ++++++++++++++++----------------
 .github/workflows/build_iar.yml |  78 +++++++++++++++++++
 hw/bsp/lpc55/family.cmake       |   6 ++
 tools/get_deps.py               |   4 +-
 4 files changed, 150 insertions(+), 66 deletions(-)

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index b7e6890f9..0b770f379 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -101,67 +101,67 @@ jobs:
         path: |
           *.elf
 
-  # ---------------------------------------
-  # Hardware in the loop (HIL)
-  # Current self-hosted instance is running on an EPYC 7232 server hosted by HiFiPhile user
-  # - STM32L412 Nucleo with on-board jlink as ttyACM0
-  # ---------------------------------------
-  hw-stm32l412nucleo-test:
-    needs: build-arm
-    runs-on: [self-hosted, Linux, X64, hifiphile]
-
-    steps:
-    - name: Clean workspace
-      run: |
-        echo "Cleaning up previous run"
-        rm -rf "${{ github.workspace }}"
-        mkdir -p "${{ github.workspace }}"
-
-    - name: Download stm32l4 Artifacts
-      uses: actions/download-artifact@v3
-      with:
-        name: stm32l4
-
-    - name: Create flash.sh
-      run: |
-        echo > flash.sh 'echo halt > flash.jlink'
-        echo >> flash.sh 'echo r >> flash.jlink'
-        echo >> flash.sh 'echo loadfile $1 >> flash.jlink'
-        echo >> flash.sh 'echo r >> flash.jlink'
-        echo >> flash.sh 'echo go >> flash.jlink'
-        echo >> flash.sh 'echo exit >> flash.jlink'
-        echo >> flash.sh 'cmdout=$(JLinkExe -device stm32l412kb -if swd -JTAGConf -1,-1 -speed auto -NoGui 1 -ExitOnError 1 -CommandFile flash.jlink)'
-        echo >> flash.sh 'if (( $? )) ; then echo $cmdout ; fi'
-        chmod +x flash.sh
-
-    - name: Test cdc_dual_ports
-      run: |
-        ./flash.sh cdc_dual_ports.elf
-        while (! ([ -e /dev/ttyACM1 ] && [ -e /dev/ttyACM2 ])) && [ $SECONDS -le 10 ]; do :; done
-        test -e /dev/ttyACM1 && echo "ttyACM1 exists"
-        test -e /dev/ttyACM2 && echo "ttyACM2 exists"
-
-      # Debian does not auto mount usb drive. skip this test for now
-    - name: Test cdc_msc
-      if: false
-      run: |
-        ./flash.sh cdc_msc.elf
-        readme='/media/pi/TinyUSB MSC/README.TXT'
-        while (! ([ -e /dev/ttyACM1 ] && [ -f "$readme" ])) && [ $SECONDS -le 10 ]; do :; done
-        test -e /dev/ttyACM1 && echo "ttyACM1 exists"
-        test -f "$readme" && echo "$readme exists"
-        cat "$readme"
-
-    - name: Test dfu
-      run: |
-        ./flash.sh dfu.elf
-        while (! (dfu-util -l | grep "Found DFU")) && [ $SECONDS -le 10 ]; do :; done
-        dfu-util -d cafe -a 0 -U dfu0
-        dfu-util -d cafe -a 1 -U dfu1
-        grep "TinyUSB DFU! - Partition 0" dfu0
-        grep "TinyUSB DFU! - Partition 1" dfu1
-
-    - name: Test dfu_runtime
-      run: |
-        ./flash.sh dfu_runtime.elf
-        while (! (dfu-util -l | grep "Found Runtime")) && [ $SECONDS -le 10 ]; do :; done
+#  # ---------------------------------------
+#  # Hardware in the loop (HIL)
+#  # Current self-hosted instance is running on an EPYC 7232 server hosted by HiFiPhile user
+#  # - STM32L412 Nucleo with on-board jlink as ttyACM0
+#  # ---------------------------------------
+#  hw-stm32l412nucleo-test:
+#    needs: build-arm
+#    runs-on: [self-hosted, Linux, X64, hifiphile]
+#
+#    steps:
+#    - name: Clean workspace
+#      run: |
+#        echo "Cleaning up previous run"
+#        rm -rf "${{ github.workspace }}"
+#        mkdir -p "${{ github.workspace }}"
+#
+#    - name: Download stm32l4 Artifacts
+#      uses: actions/download-artifact@v3
+#      with:
+#        name: stm32l4
+#
+#    - name: Create flash.sh
+#      run: |
+#        echo > flash.sh 'echo halt > flash.jlink'
+#        echo >> flash.sh 'echo r >> flash.jlink'
+#        echo >> flash.sh 'echo loadfile $1 >> flash.jlink'
+#        echo >> flash.sh 'echo r >> flash.jlink'
+#        echo >> flash.sh 'echo go >> flash.jlink'
+#        echo >> flash.sh 'echo exit >> flash.jlink'
+#        echo >> flash.sh 'cmdout=$(JLinkExe -device stm32l412kb -if swd -JTAGConf -1,-1 -speed auto -NoGui 1 -ExitOnError 1 -CommandFile flash.jlink)'
+#        echo >> flash.sh 'if (( $? )) ; then echo $cmdout ; fi'
+#        chmod +x flash.sh
+#
+#    - name: Test cdc_dual_ports
+#      run: |
+#        ./flash.sh cdc_dual_ports.elf
+#        while (! ([ -e /dev/ttyACM1 ] && [ -e /dev/ttyACM2 ])) && [ $SECONDS -le 10 ]; do :; done
+#        test -e /dev/ttyACM1 && echo "ttyACM1 exists"
+#        test -e /dev/ttyACM2 && echo "ttyACM2 exists"
+#
+#      # Debian does not auto mount usb drive. skip this test for now
+#    - name: Test cdc_msc
+#      if: false
+#      run: |
+#        ./flash.sh cdc_msc.elf
+#        readme='/media/pi/TinyUSB MSC/README.TXT'
+#        while (! ([ -e /dev/ttyACM1 ] && [ -f "$readme" ])) && [ $SECONDS -le 10 ]; do :; done
+#        test -e /dev/ttyACM1 && echo "ttyACM1 exists"
+#        test -f "$readme" && echo "$readme exists"
+#        cat "$readme"
+#
+#    - name: Test dfu
+#      run: |
+#        ./flash.sh dfu.elf
+#        while (! (dfu-util -l | grep "Found DFU")) && [ $SECONDS -le 10 ]; do :; done
+#        dfu-util -d cafe -a 0 -U dfu0
+#        dfu-util -d cafe -a 1 -U dfu1
+#        grep "TinyUSB DFU! - Partition 0" dfu0
+#        grep "TinyUSB DFU! - Partition 1" dfu1
+#
+#    - name: Test dfu_runtime
+#      run: |
+#        ./flash.sh dfu_runtime.elf
+#        while (! (dfu-util -l | grep "Found Runtime")) && [ $SECONDS -le 10 ]; do :; done
diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml
index 4c5fd770c..cafb75cd8 100644
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@@ -48,3 +48,81 @@ jobs:
 
       - name: Build
         run: python3 tools/build_cmake.py ${{ matrix.family }} -DTOOLCHAIN=iar -DCMAKE_BUILD_TYPE=MinSizeRel
+
+      # Upload binaries for hardware test with self-hosted
+      - name: Prepare stm32l412nucleo Artifacts
+        if: contains(matrix.family, 'stm32l4')
+        run: find examples/ -path "*stm32l412nucleo/*.elf" -exec mv {} . \;
+
+      - name: Upload Artifacts for stm32l412nucleo
+        if: contains(matrix.family, 'stm32l4') && github.repository_owner == 'hathach'
+        uses: actions/upload-artifact@v3
+        with:
+          name: stm32l4
+          path: |
+            *.elf
+
+  # ---------------------------------------
+  # Hardware in the loop (HIL)
+  # Current self-hosted instance is running on an EPYC 7232 server hosted by HiFiPhile user
+  # - STM32L412 Nucleo with on-board jlink as ttyACM0
+  # ---------------------------------------
+  hw-stm32l412nucleo-test:
+    needs: cmake
+    runs-on: [self-hosted, Linux, X64, hifiphile]
+
+    steps:
+      - name: Clean workspace
+        run: |
+          echo "Cleaning up previous run"
+          rm -rf "${{ github.workspace }}"
+          mkdir -p "${{ github.workspace }}"
+
+      - name: Download stm32l4 Artifacts
+        uses: actions/download-artifact@v3
+        with:
+          name: stm32l4
+
+      - name: Create flash.sh
+        run: |
+          echo > flash.sh 'echo halt > flash.jlink'
+          echo >> flash.sh 'echo r >> flash.jlink'
+          echo >> flash.sh 'echo loadfile $1 >> flash.jlink'
+          echo >> flash.sh 'echo r >> flash.jlink'
+          echo >> flash.sh 'echo go >> flash.jlink'
+          echo >> flash.sh 'echo exit >> flash.jlink'
+          echo >> flash.sh 'cmdout=$(JLinkExe -device stm32l412kb -if swd -JTAGConf -1,-1 -speed auto -NoGui 1 -ExitOnError 1 -CommandFile flash.jlink)'
+          echo >> flash.sh 'if (( $? )) ; then echo $cmdout ; fi'
+          chmod +x flash.sh
+
+      - name: Test cdc_dual_ports
+        run: |
+          ./flash.sh cdc_dual_ports.elf
+          while (! ([ -e /dev/ttyACM1 ] && [ -e /dev/ttyACM2 ])) && [ $SECONDS -le 10 ]; do :; done
+          test -e /dev/ttyACM1 && echo "ttyACM1 exists"
+          test -e /dev/ttyACM2 && echo "ttyACM2 exists"
+
+        # Debian does not auto mount usb drive. skip this test for now
+      - name: Test cdc_msc
+        if: false
+        run: |
+          ./flash.sh cdc_msc.elf
+          readme='/media/pi/TinyUSB MSC/README.TXT'
+          while (! ([ -e /dev/ttyACM1 ] && [ -f "$readme" ])) && [ $SECONDS -le 10 ]; do :; done
+          test -e /dev/ttyACM1 && echo "ttyACM1 exists"
+          test -f "$readme" && echo "$readme exists"
+          cat "$readme"
+
+      - name: Test dfu
+        run: |
+          ./flash.sh dfu.elf
+          while (! (dfu-util -l | grep "Found DFU")) && [ $SECONDS -le 10 ]; do :; done
+          dfu-util -d cafe -a 0 -U dfu0
+          dfu-util -d cafe -a 1 -U dfu1
+          grep "TinyUSB DFU! - Partition 0" dfu0
+          grep "TinyUSB DFU! - Partition 1" dfu1
+
+      - name: Test dfu_runtime
+        run: |
+          ./flash.sh dfu_runtime.elf
+          while (! (dfu-util -l | grep "Found Runtime")) && [ $SECONDS -le 10 ]; do :; done
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index 9f6b1f63d..e443f47d3 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -103,6 +103,12 @@ function(family_configure_example TARGET)
     ${TOP}/lib/sct_neopixel/sct_neopixel.c
     )
 
+  # https://github.com/gsteiert/sct_neopixel/pull/1
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    set_source_files_properties(${TOP}/lib/sct_neopixel/sct_neopixel.c PROPERTIES
+      COMPILE_FLAGS "-Wno-unused-parameter")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/tools/get_deps.py b/tools/get_deps.py
index b81dabae0..34e2f30a3 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -52,7 +52,7 @@ deps_optional = {
                            'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43'],
     'hw/mcu/nxp/mcux-sdk': ['https://github.com/hathach/mcux-sdk.git',
                             '950819b7de9b32f92c3edf396bc5ffb8d66e7009',
-                            'kinetis_k32l2 lpc51 lpc54 lpc55 mcx imxrt'],
+                            'kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx imxrt'],
     'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git',
                                          'c3715ce94b6f6391856de56081d4d9b3e98fa93d',
                                          'rp2040'],
@@ -166,7 +166,7 @@ deps_optional = {
                             'ch32v307'],
     'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git',
                     '20285262657d1b482d132d20d755c8c330d55c1f',
-                    'imxrt kinetis_k32l2 lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x'
+                    'imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x'
                     'stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 '
                     'stm32h7 stm32l0 stm32l1 stm32l4 stm32l5 stm32u5 stm32wb'],
     'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git',

From 06d93e95d15b7b6fad4cde608a25c1b50776ec3e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 25 Jun 2023 10:15:05 +0700
Subject: [PATCH 451/691] update hw test l4

---
 .github/workflows/build_iar.yml | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml
index cafb75cd8..4b170f2bd 100644
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@@ -52,7 +52,9 @@ jobs:
       # Upload binaries for hardware test with self-hosted
       - name: Prepare stm32l412nucleo Artifacts
         if: contains(matrix.family, 'stm32l4')
-        run: find examples/ -path "*stm32l412nucleo/*.elf" -exec mv {} . \;
+        working-directory: ${{github.workspace}}/cmake-build/cmake-build-stm32l412nucleo
+        run: |
+          find device/ -name "*.elf" -exec mv {} ../../ \;
 
       - name: Upload Artifacts for stm32l412nucleo
         if: contains(matrix.family, 'stm32l4') && github.repository_owner == 'hathach'

From 200e58d11ec6aceec31867129508c77f7989d051 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 26 Jun 2023 13:38:24 +0700
Subject: [PATCH 452/691] auto detect FAMILY based on BOARD

---
 .idea/cmake.xml             | 42 ++++++++++++++++++++-----------------
 hw/bsp/family_support.cmake | 21 +++++++++++++++++--
 2 files changed, 42 insertions(+), 21 deletions(-)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 0f7649efc..012dc63ef 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -2,10 +2,10 @@
 <project version="4">
   <component name="CMakeSharedSettings">
     <configurations>
-      <configuration PROFILE_NAME="mcxn947" ENABLED="false" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DFAMILY=mcx -DBOARD=mcxn947brk -DLOG=0 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10056 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=nrf -DBOARD=pca10095 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="esp32s2" ENABLED="false" GENERATION_OPTIONS="-DFAMILY=espressif -DBOARD=espressif_saola_1 -DIDF_TARGET=esp32s2">
+      <configuration PROFILE_NAME="mcxn947" ENABLED="false" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DBOARD=mcxn947brk -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10056 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10095 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="esp32s2" ENABLED="false" GENERATION_OPTIONS="-DBOARD=espressif_saola_1 -DIDF_TARGET=esp32s2">
         <ADDITIONAL_GENERATION_ENVIRONMENT>
           <envs>
             <env name="ESPBAUD" value="1500000" />
@@ -15,7 +15,7 @@
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
-      <configuration PROFILE_NAME="esp32s3" ENABLED="false" GENERATION_OPTIONS="-DFAMILY=espressif -DBOARD=espressif_s3_devkitm -DIDF_TARGET=esp32s3">
+      <configuration PROFILE_NAME="esp32s3" ENABLED="false" GENERATION_OPTIONS="-DBOARD=espressif_s3_devkitm -DIDF_TARGET=esp32s3">
         <ADDITIONAL_GENERATION_ENVIRONMENT>
           <envs>
             <env name="ESPBAUD" value="1500000" />
@@ -25,20 +25,24 @@
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
-      <configuration PROFILE_NAME="rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=rp2040 -DBOARD=raspberry_pi_pico" />
-      <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1010_evk" />
-      <configuration PROFILE_NAME="rt1060 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1060_evk" />
-      <configuration PROFILE_NAME="rt1064 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=imxrt -DBOARD=mimxrt1064_evk" />
-      <configuration PROFILE_NAME="mcb1800" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc18 -DBOARD=mcb1800 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="lpcxpresso18s37" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc18 -DBOARD=lpcxpresso18s37" />
-      <configuration PROFILE_NAME="lpc55s69" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=lpc55 -DBOARD=lpcxpresso55s69" />
-      <configuration PROFILE_NAME="stm32g0b1nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g0 -DBOARD=stm32g0b1nucleo" />
-      <configuration PROFILE_NAME="stm32g0b1nucleo iar" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g0 -DBOARD=stm32g0b1nucleo -DTOOLCHAIN=iar" />
-      <configuration PROFILE_NAME="stm32g474nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g4 -DBOARD=stm32g474nucleo" />
-      <configuration PROFILE_NAME="b_g474e_dpow1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g4 -DBOARD=b_g474e_dpow1 -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="b_g474e_dpow1 iar" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32g4 -DBOARD=b_g474e_dpow1 -DTOOLCHAIN=iar" />
-      <configuration PROFILE_NAME="frdm_kl25z" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=kinetis_kl -DBOARD=frdm_kl25z -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="stm32h743eval" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DFAMILY=stm32h7 -DBOARD=stm32h743eval -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico" />
+      <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1010_evk" />
+      <configuration PROFILE_NAME="rt1060 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1060_evk" />
+      <configuration PROFILE_NAME="rt1064 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1064_evk" />
+      <configuration PROFILE_NAME="mcb1800" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mcb1800 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="lpcxpresso18s37" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso18s37" />
+      <configuration PROFILE_NAME="lpc55s69" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso55s69" />
+      <configuration PROFILE_NAME="stm32g0b1nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32g0b1nucleo" />
+      <configuration PROFILE_NAME="stm32g474nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32g474nucleo" />
+      <configuration PROFILE_NAME="b_g474e_dpow1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=b_g474e_dpow1 -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="b_g474e_dpow1 iar" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=b_g474e_dpow1 -DTOOLCHAIN=iar" />
+      <configuration PROFILE_NAME="frdm_kl25z" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=frdm_kl25z -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="stm32h743eval" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h743eval -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="metro m7" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="stm32f072disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f072disco" />
+      <configuration PROFILE_NAME="stm32f103_mini_2" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f103_mini_2" />
+      <configuration PROFILE_NAME="stm32f769disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f769disco -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="stm32l476disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32l476disco" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 73e674c18..93cab8723 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -11,8 +11,25 @@ if (NOT DEFINED TOOLCHAIN)
   set(TOOLCHAIN gcc)
 endif ()
 
-if (NOT FAMILY)
-  message(FATAL_ERROR "You must set a FAMILY variable for the build (e.g. rp2040, eps32s2, esp32s3). You can do this via -DFAMILY=xxx on the cmake command line")
+# FAMILY not defined, try to detect it from BOARD
+if (NOT DEFINED FAMILY)
+  if (NOT DEFINED BOARD)
+    message(FATAL_ERROR "You must set a FAMILY variable for the build (e.g. rp2040, espressif).
+    You can do this via -DFAMILY=xxx on the cmake command line")
+  endif ()
+
+  # Find path contains BOARD
+  file(GLOB BOARD_PATH LIST_DIRECTORIES true
+    RELATIVE ${TOP}/hw/bsp
+    ${TOP}/hw/bsp/*/boards/${BOARD}
+    )
+  if (NOT BOARD_PATH)
+    message(FATAL_ERROR "Could not detect FAMILY from BOARD=${BOARD}")
+  endif ()
+
+  # replace / with ; so that we can get the first element as FAMILY
+  string(REPLACE "/" ";" BOARD_PATH ${BOARD_PATH})
+  list(GET BOARD_PATH 0 FAMILY)
 endif ()
 
 if (NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake)

From 3cfb838ba7f1f1a12203d36c9cbb615178af2cf7 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 26 Jun 2023 17:03:45 +0700
Subject: [PATCH 453/691] fix warnings when enable rtt with rp2040

---
 hw/bsp/rp2040/family.c                       | 4 ++--
 hw/bsp/rp2040/family.cmake                   | 6 +++++-
 src/portable/raspberrypi/rp2040/dcd_rp2040.c | 2 +-
 src/portable/raspberrypi/rp2040/rp2040_usb.c | 2 +-
 4 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index 3aa989c0e..097e6fbd6 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -93,12 +93,12 @@ bool __no_inline_not_in_flash_func(get_bootsel_button)(void) {
 
 static void stdio_rtt_write (const char *buf, int length)
 {
-  SEGGER_RTT_Write(0, buf, length);
+  SEGGER_RTT_Write(0, buf, (unsigned) length);
 }
 
 static int stdio_rtt_read (char *buf, int len)
 {
-  return SEGGER_RTT_Read(0, buf, len);
+  return (int) SEGGER_RTT_Read(0, buf, (unsigned) len);
 }
 
 static stdio_driver_t stdio_rtt =
diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index 28637e3ee..5cf6b1219 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -127,7 +127,7 @@ if (NOT TARGET _rp2040_family_inclusion_marker)
 		target_compile_definitions(tinyusb_additions INTERFACE CFG_TUSB_DEBUG=${LOG})
 	endif()
 
-	if(LOGGER STREQUAL "rtt")
+	if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt")
 		target_compile_definitions(tinyusb_additions INTERFACE
 				LOGGER_RTT
 				SEGGER_RTT_MODE_DEFAULT=SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL
@@ -137,6 +137,10 @@ if (NOT TARGET _rp2040_family_inclusion_marker)
 				${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c
 		)
 
+		set_source_files_properties(${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c
+			PROPERTIES
+			COMPILE_FLAGS "-Wno-cast-qual -Wno-cast-align -Wno-sign-conversion")
+
 		target_include_directories(tinyusb_additions INTERFACE
 				${TOP}/lib/SEGGER_RTT/RTT
 		)
diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
index 500a5373f..479b17b67 100644
--- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
@@ -189,7 +189,7 @@ static void hw_endpoint_xfer(uint8_t ep_addr, uint8_t *buffer, uint16_t total_by
 static void __tusb_irq_path_func(hw_handle_buff_status)(void)
 {
     uint32_t remaining_buffers = usb_hw->buf_status;
-    pico_trace("buf_status = 0x%08x\n", remaining_buffers);
+    pico_trace("buf_status = 0x%08lx\n", remaining_buffers);
     uint bit = 1u;
     for (uint8_t i = 0; remaining_buffers && i < USB_MAX_ENDPOINTS * 2; i++)
     {
diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c
index cf37cba07..1f49665ff 100644
--- a/src/portable/raspberrypi/rp2040/rp2040_usb.c
+++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c
@@ -419,7 +419,7 @@ static bool __tusb_irq_path_func(e15_is_critical_frame_period) (struct hw_endpoi
   if (delta < 800 || delta > 998) {
     return false;
   }
-  TU_LOG(3, "Avoiding sof %u now %lu last %lu\n", (usb_hw->sof_rd + 1) & USB_SOF_RD_BITS, time_us_32(), e15_last_sof);
+  TU_LOG(3, "Avoiding sof %lu now %lu last %lu\n", (usb_hw->sof_rd + 1) & USB_SOF_RD_BITS, time_us_32(), e15_last_sof);
   return true;
 }
 

From 8aa28e63fbcb4f38b62a8e111e29ee48b710db6b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 26 Jun 2023 17:54:31 +0700
Subject: [PATCH 454/691] minor clean up with include_guard()

---
 .idea/cmake.xml            |   2 +-
 hw/bsp/rp2040/family.cmake | 674 ++++++++++++++++++-------------------
 src/CMakeLists.txt         |   7 +-
 3 files changed, 342 insertions(+), 341 deletions(-)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 012dc63ef..2ac7993c1 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -25,7 +25,7 @@
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
-      <configuration PROFILE_NAME="rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico" />
+      <configuration PROFILE_NAME="rp2040" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico -DLOG=2 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1010_evk" />
       <configuration PROFILE_NAME="rt1060 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1060_evk" />
       <configuration PROFILE_NAME="rt1064 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1064_evk" />
diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index 5cf6b1219..fee376538 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -1,341 +1,339 @@
 cmake_minimum_required(VERSION 3.13)
-if (NOT TARGET _rp2040_family_inclusion_marker)
-	add_library(_rp2040_family_inclusion_marker INTERFACE)
+include_guard()
 
-	if (NOT BOARD)
-		message("BOARD not specified, defaulting to pico_sdk")
-		set(BOARD pico_sdk)
-	endif()
-
-	# add the SDK in case we are standalone tinyusb example (noop if already present)
-	include(${CMAKE_CURRENT_LIST_DIR}/pico_sdk_import.cmake)
-
-	# include basic family CMake functionality
-	set(FAMILY_MCUS RP2040)
-
-	include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
-
-	# TOP is absolute path to root directory of TinyUSB git repo
-	#set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
-	#get_filename_component(TOP "${TOP}" REALPATH)
-
-	if (NOT PICO_TINYUSB_PATH)
-		set(PICO_TINYUSB_PATH ${TOP})
-	endif()
-
-	if (NOT TINYUSB_OPT_OS)
-		set(TINYUSB_OPT_OS OPT_OS_PICO)
-	endif()
-
-	#------------------------------------
-	# Base config for both device and host; wrapped by SDK's tinyusb_common
-	#------------------------------------
-	add_library(tinyusb_common_base INTERFACE)
-
-	target_sources(tinyusb_common_base INTERFACE
-			${TOP}/src/tusb.c
-			${TOP}/src/common/tusb_fifo.c
-			)
-
-	target_include_directories(tinyusb_common_base INTERFACE
-			${TOP}/src
-			${TOP}/src/common
-			${TOP}/hw
-			)
-
-	target_link_libraries(tinyusb_common_base INTERFACE
-			hardware_structs
-			hardware_irq
-			hardware_resets
-			pico_sync
-			)
-
-	set(TINYUSB_DEBUG_LEVEL 0)
-	if (CMAKE_BUILD_TYPE STREQUAL "Debug")
-		message("Compiling TinyUSB with CFG_TUSB_DEBUG=1")
-		set(TINYUSB_DEBUG_LEVEL 1)
-	endif()
-
-	target_compile_definitions(tinyusb_common_base INTERFACE
-			CFG_TUSB_MCU=OPT_MCU_RP2040
-			CFG_TUSB_OS=${TINYUSB_OPT_OS}
-			#CFG_TUSB_DEBUG=${TINYUSB_DEBUG_LEVEL}
-	)
-
-	#------------------------------------
-	# Base config for device mode; wrapped by SDK's tinyusb_device
-	#------------------------------------
-	add_library(tinyusb_device_base INTERFACE)
-	target_sources(tinyusb_device_base INTERFACE
-			${TOP}/src/portable/raspberrypi/rp2040/dcd_rp2040.c
-			${TOP}/src/portable/raspberrypi/rp2040/rp2040_usb.c
-			${TOP}/src/device/usbd.c
-			${TOP}/src/device/usbd_control.c
-			${TOP}/src/class/audio/audio_device.c
-			${TOP}/src/class/cdc/cdc_device.c
-			${TOP}/src/class/dfu/dfu_device.c
-			${TOP}/src/class/dfu/dfu_rt_device.c
-			${TOP}/src/class/hid/hid_device.c
-			${TOP}/src/class/midi/midi_device.c
-			${TOP}/src/class/msc/msc_device.c
-			${TOP}/src/class/net/ecm_rndis_device.c
-			${TOP}/src/class/net/ncm_device.c
-			${TOP}/src/class/usbtmc/usbtmc_device.c
-			${TOP}/src/class/vendor/vendor_device.c
-			${TOP}/src/class/video/video_device.c
-			)
-
-	#------------------------------------
-	# Base config for host mode; wrapped by SDK's tinyusb_host
-	#------------------------------------
-	add_library(tinyusb_host_base INTERFACE)
-	target_sources(tinyusb_host_base INTERFACE
-			${TOP}/src/portable/raspberrypi/rp2040/hcd_rp2040.c
-			${TOP}/src/portable/raspberrypi/rp2040/rp2040_usb.c
-			${TOP}/src/host/usbh.c
-			${TOP}/src/host/hub.c
-			${TOP}/src/class/cdc/cdc_host.c
-			${TOP}/src/class/hid/hid_host.c
-			${TOP}/src/class/msc/msc_host.c
-			${TOP}/src/class/vendor/vendor_host.c
-			)
-
-	# Sometimes have to do host specific actions in mostly common functions
-	target_compile_definitions(tinyusb_host_base INTERFACE
-			RP2040_USB_HOST_MODE=1
-	)
-
-	#------------------------------------
-	# BSP & Additions
-	#------------------------------------
-	add_library(tinyusb_bsp INTERFACE)
-	target_sources(tinyusb_bsp INTERFACE
-			${TOP}/hw/bsp/rp2040/family.c
-			)
-	#	target_include_directories(tinyusb_bsp INTERFACE
-	#			${TOP}/hw/bsp/rp2040)
-
-	# tinyusb_additions will hold our extra settings for examples
-	add_library(tinyusb_additions INTERFACE)
-
-	target_compile_definitions(tinyusb_additions INTERFACE
-		PICO_RP2040_USB_DEVICE_ENUMERATION_FIX=1
-		PICO_RP2040_USB_DEVICE_UFRAME_FIX=1
-	)
-
-	if(DEFINED LOG)
-		target_compile_definitions(tinyusb_additions INTERFACE CFG_TUSB_DEBUG=${LOG})
-	endif()
-
-	if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt")
-		target_compile_definitions(tinyusb_additions INTERFACE
-				LOGGER_RTT
-				SEGGER_RTT_MODE_DEFAULT=SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL
-		)
-
-		target_sources(tinyusb_additions INTERFACE
-				${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c
-		)
-
-		set_source_files_properties(${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c
-			PROPERTIES
-			COMPILE_FLAGS "-Wno-cast-qual -Wno-cast-align -Wno-sign-conversion")
-
-		target_include_directories(tinyusb_additions INTERFACE
-				${TOP}/lib/SEGGER_RTT/RTT
-		)
-	endif()
-
-	#------------------------------------
-	# Functions
-	#------------------------------------
-
-	function(family_configure_target TARGET)
-		pico_add_extra_outputs(${TARGET})
-		pico_enable_stdio_uart(${TARGET} 1)
-		target_link_libraries(${TARGET} PUBLIC pico_stdlib pico_bootsel_via_double_reset tinyusb_board tinyusb_additions)
-	endfunction()
-
-	function(rp2040_family_configure_example_warnings TARGET)
-		if (NOT PICO_TINYUSB_NO_EXAMPLE_WARNINGS)
-			family_add_default_example_warnings(${TARGET})
-		endif()
-		if(CMAKE_C_COMPILER_ID STREQUAL "Clang")
-			target_compile_options(${TARGET} PRIVATE -Wno-unreachable-code)
-		endif()
-		suppress_tinyusb_warnings()
-	endfunction()
-
-	function(family_configure_device_example TARGET)
-		family_configure_target(${TARGET})
-		target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device)
-		rp2040_family_configure_example_warnings(${TARGET})
-	endfunction()
-
-	function(family_add_pico_pio_usb TARGET)
-		target_link_libraries(${TARGET} PUBLIC tinyusb_pico_pio_usb)
-	endfunction()
-
-	function(family_configure_host_example TARGET)
-		family_configure_target(${TARGET})
-		target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_host)
-		rp2040_family_configure_example_warnings(${TARGET})
-
-		# For rp2040 enable pico-pio-usb
-		if (TARGET tinyusb_pico_pio_usb)
-			# code does not compile with non GCC, or GCC 11.3+
-			if (CMAKE_C_COMPILER_ID STREQUAL "GNU" AND NOT CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 11.3)
-				family_add_pico_pio_usb(${PROJECT})
-			endif()
-		endif()
-	endfunction()
-
-	function(family_configure_dual_usb_example TARGET)
-		family_configure_target(${TARGET})
-		# require tinyusb_pico_pio_usb
-		target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device tinyusb_host tinyusb_pico_pio_usb )
-		rp2040_family_configure_example_warnings(${TARGET})
-	endfunction()
-
-	function(check_and_add_pico_pio_usb_support)
-		# check for pico_generate_pio_header (as depending on environment we may be called before SDK is
-		# initialized in which case it isn't available yet), and only do the initialization once
-		if (COMMAND pico_generate_pio_header AND NOT TARGET tinyusb_pico_pio_usb)
-			#------------------------------------
-			# PIO USB for both host and device
-			#------------------------------------
-
-			if (NOT DEFINED PICO_PIO_USB_PATH)
-				set(PICO_PIO_USB_PATH "${TOP}/hw/mcu/raspberry_pi/Pico-PIO-USB")
-			endif()
-
-			if (EXISTS ${PICO_PIO_USB_PATH}/src/pio_usb.c)
-				add_library(tinyusb_pico_pio_usb INTERFACE)
-				target_sources(tinyusb_device_base INTERFACE
-						${TOP}/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c
-						)
-				target_sources(tinyusb_host_base INTERFACE
-						${TOP}/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
-						)
-
-				target_sources(tinyusb_pico_pio_usb INTERFACE
-						${PICO_PIO_USB_PATH}/src/pio_usb.c
-						${PICO_PIO_USB_PATH}/src/pio_usb_host.c
-						${PICO_PIO_USB_PATH}/src/pio_usb_device.c
-						${PICO_PIO_USB_PATH}/src/usb_crc.c
-						)
-
-				target_include_directories(tinyusb_pico_pio_usb INTERFACE
-						${PICO_PIO_USB_PATH}/src
-						)
-
-				target_link_libraries(tinyusb_pico_pio_usb INTERFACE
-						hardware_dma
-						hardware_pio
-						pico_multicore
-						)
-
-				target_compile_definitions(tinyusb_pico_pio_usb INTERFACE
-						PIO_USB_USE_TINYUSB
-						)
-
-				pico_generate_pio_header(tinyusb_pico_pio_usb ${PICO_PIO_USB_PATH}/src/usb_tx.pio)
-				pico_generate_pio_header(tinyusb_pico_pio_usb ${PICO_PIO_USB_PATH}/src/usb_rx.pio)
-			endif()
-		endif()
-	endfunction()
-
-	# Try to add Pico-PIO_USB support now for the case where this file is included directly
-	# after Pico SDK initialization, but without using the family_ functions (as is the case
-	# when included by the SDK itself)
-	check_and_add_pico_pio_usb_support()
-
-	function(family_initialize_project PROJECT DIR)
-		# call the original version of this function from family_common.cmake
-		_family_initialize_project(${PROJECT} ${DIR})
-		enable_language(C CXX ASM)
-		pico_sdk_init()
-
-		# now re-check for adding Pico-PIO_USB support now SDK is definitely available
-		check_and_add_pico_pio_usb_support()
-	endfunction()
-
-	# This method must be called from the project scope to suppress known warnings in TinyUSB source files
-	function(suppress_tinyusb_warnings)
-		# some of these are pretty silly warnings only occurring in some older GCC versions 9 or prior
-		if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-			if (CMAKE_C_COMPILER_VERSION VERSION_LESS 10.0)
-				set(CONVERSION_WARNING_FILES
-					${PICO_TINYUSB_PATH}/src/tusb.c
-					${PICO_TINYUSB_PATH}/src/common/tusb_fifo.c
-					${PICO_TINYUSB_PATH}/src/device/usbd.c
-					${PICO_TINYUSB_PATH}/src/device/usbd_control.c
-					${PICO_TINYUSB_PATH}/src/host/usbh.c
-					${PICO_TINYUSB_PATH}/src/class/cdc/cdc_device.c
-					${PICO_TINYUSB_PATH}/src/class/cdc/cdc_host.c
-					${PICO_TINYUSB_PATH}/src/class/hid/hid_device.c
-					${PICO_TINYUSB_PATH}/src/class/hid/hid_host.c
-					${PICO_TINYUSB_PATH}/src/class/audio/audio_device.c
-					${PICO_TINYUSB_PATH}/src/class/dfu/dfu_device.c
-					${PICO_TINYUSB_PATH}/src/class/dfu/dfu_rt_device.c
-					${PICO_TINYUSB_PATH}/src/class/midi/midi_device.c
-					${PICO_TINYUSB_PATH}/src/class/usbtmc/usbtmc_device.c
-					${PICO_TINYUSB_PATH}/src/portable/raspberrypi/rp2040/hcd_rp2040.c
-					)
-				foreach(SOURCE_FILE IN LISTS CONVERSION_WARNING_FILES)
-					set_source_files_properties(
-							${SOURCE_FILE}
-							PROPERTIES
-							COMPILE_FLAGS "-Wno-conversion")
-				endforeach()
-			endif()
-			if (CMAKE_C_COMPILER_ID STREQUAL "GNU" AND CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 11.0)
-				set_source_files_properties(
-						${PICO_TINYUSB_PATH}/lib/fatfs/source/ff.c
-						COMPILE_FLAGS "-Wno-stringop-overflow -Wno-array-bounds")
-			endif()
-			set_source_files_properties(
-					${PICO_TINYUSB_PATH}/lib/fatfs/source/ff.c
-					PROPERTIES
-					COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual")
-
-			set_source_files_properties(
-					${PICO_TINYUSB_PATH}/lib/lwip/src/core/tcp_in.c
-					${PICO_TINYUSB_PATH}/lib/lwip/src/core/tcp_out.c
-					PROPERTIES
-					COMPILE_FLAGS "-Wno-conversion")
-
-			set_source_files_properties(
-					${PICO_TINYUSB_PATH}/lib/networking/dnserver.c
-					${PICO_TINYUSB_PATH}/lib/networking/dhserver.c
-					${PICO_TINYUSB_PATH}/lib/networking/rndis_reports.c
-					PROPERTIES
-					COMPILE_FLAGS "-Wno-conversion -Wno-sign-conversion")
-
-			if (TARGET tinyusb_pico_pio_usb)
-				set_source_files_properties(
-						${PICO_TINYUSB_PATH}/hw/mcu/raspberry_pi/Pico-PIO-USB/src/pio_usb_device.c
-						${PICO_TINYUSB_PATH}/hw/mcu/raspberry_pi/Pico-PIO-USB/src/pio_usb.c
-						${PICO_TINYUSB_PATH}/hw/mcu/raspberry_pi/Pico-PIO-USB/src/pio_usb_host.c
-						${PICO_TINYUSB_PATH}/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
-						PROPERTIES
-						COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual -Wno-attributes")
-			endif()
-		elseif(CMAKE_C_COMPILER_ID STREQUAL "Clang")
-			set_source_files_properties(
-					${PICO_TINYUSB_PATH}/src/class/cdc/cdc_device.c
-					COMPILE_FLAGS "-Wno-unreachable-code")
-			set_source_files_properties(
-					${PICO_TINYUSB_PATH}/src/class/cdc/cdc_host.c
-					COMPILE_FLAGS "-Wno-unreachable-code-fallthrough")
-			set_source_files_properties(
-					${PICO_TINYUSB_PATH}/lib/fatfs/source/ff.c
-					PROPERTIES
-					COMPILE_FLAGS "-Wno-cast-qual")
-		endif()
-	endfunction()
-
-	# rp2040 does not support freeRTOS example yet
-	function(family_add_freertos TARGET)
-	endfunction()
+if (NOT BOARD)
+	message("BOARD not specified, defaulting to pico_sdk")
+	set(BOARD pico_sdk)
 endif()
+
+# add the SDK in case we are standalone tinyusb example (noop if already present)
+include(${CMAKE_CURRENT_LIST_DIR}/pico_sdk_import.cmake)
+
+# include basic family CMake functionality
+set(FAMILY_MCUS RP2040)
+
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# TOP is absolute path to root directory of TinyUSB git repo
+#set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
+#get_filename_component(TOP "${TOP}" REALPATH)
+
+if (NOT PICO_TINYUSB_PATH)
+	set(PICO_TINYUSB_PATH ${TOP})
+endif()
+
+if (NOT TINYUSB_OPT_OS)
+	set(TINYUSB_OPT_OS OPT_OS_PICO)
+endif()
+
+#------------------------------------
+# Base config for both device and host; wrapped by SDK's tinyusb_common
+#------------------------------------
+add_library(tinyusb_common_base INTERFACE)
+
+target_sources(tinyusb_common_base INTERFACE
+		${TOP}/src/tusb.c
+		${TOP}/src/common/tusb_fifo.c
+		)
+
+target_include_directories(tinyusb_common_base INTERFACE
+		${TOP}/src
+		${TOP}/src/common
+		${TOP}/hw
+		)
+
+target_link_libraries(tinyusb_common_base INTERFACE
+		hardware_structs
+		hardware_irq
+		hardware_resets
+		pico_sync
+		)
+
+set(TINYUSB_DEBUG_LEVEL 0)
+if (CMAKE_BUILD_TYPE STREQUAL "Debug")
+	message("Compiling TinyUSB with CFG_TUSB_DEBUG=1")
+	set(TINYUSB_DEBUG_LEVEL 1)
+endif()
+
+target_compile_definitions(tinyusb_common_base INTERFACE
+		CFG_TUSB_MCU=OPT_MCU_RP2040
+		CFG_TUSB_OS=${TINYUSB_OPT_OS}
+		#CFG_TUSB_DEBUG=${TINYUSB_DEBUG_LEVEL}
+)
+
+#------------------------------------
+# Base config for device mode; wrapped by SDK's tinyusb_device
+#------------------------------------
+add_library(tinyusb_device_base INTERFACE)
+target_sources(tinyusb_device_base INTERFACE
+		${TOP}/src/portable/raspberrypi/rp2040/dcd_rp2040.c
+		${TOP}/src/portable/raspberrypi/rp2040/rp2040_usb.c
+		${TOP}/src/device/usbd.c
+		${TOP}/src/device/usbd_control.c
+		${TOP}/src/class/audio/audio_device.c
+		${TOP}/src/class/cdc/cdc_device.c
+		${TOP}/src/class/dfu/dfu_device.c
+		${TOP}/src/class/dfu/dfu_rt_device.c
+		${TOP}/src/class/hid/hid_device.c
+		${TOP}/src/class/midi/midi_device.c
+		${TOP}/src/class/msc/msc_device.c
+		${TOP}/src/class/net/ecm_rndis_device.c
+		${TOP}/src/class/net/ncm_device.c
+		${TOP}/src/class/usbtmc/usbtmc_device.c
+		${TOP}/src/class/vendor/vendor_device.c
+		${TOP}/src/class/video/video_device.c
+		)
+
+#------------------------------------
+# Base config for host mode; wrapped by SDK's tinyusb_host
+#------------------------------------
+add_library(tinyusb_host_base INTERFACE)
+target_sources(tinyusb_host_base INTERFACE
+		${TOP}/src/portable/raspberrypi/rp2040/hcd_rp2040.c
+		${TOP}/src/portable/raspberrypi/rp2040/rp2040_usb.c
+		${TOP}/src/host/usbh.c
+		${TOP}/src/host/hub.c
+		${TOP}/src/class/cdc/cdc_host.c
+		${TOP}/src/class/hid/hid_host.c
+		${TOP}/src/class/msc/msc_host.c
+		${TOP}/src/class/vendor/vendor_host.c
+		)
+
+# Sometimes have to do host specific actions in mostly common functions
+target_compile_definitions(tinyusb_host_base INTERFACE
+		RP2040_USB_HOST_MODE=1
+)
+
+#------------------------------------
+# BSP & Additions
+#------------------------------------
+add_library(tinyusb_bsp INTERFACE)
+target_sources(tinyusb_bsp INTERFACE
+		${TOP}/hw/bsp/rp2040/family.c
+		)
+#	target_include_directories(tinyusb_bsp INTERFACE
+#			${TOP}/hw/bsp/rp2040)
+
+# tinyusb_additions will hold our extra settings for examples
+add_library(tinyusb_additions INTERFACE)
+
+target_compile_definitions(tinyusb_additions INTERFACE
+	PICO_RP2040_USB_DEVICE_ENUMERATION_FIX=1
+	PICO_RP2040_USB_DEVICE_UFRAME_FIX=1
+)
+
+if(DEFINED LOG)
+	target_compile_definitions(tinyusb_additions INTERFACE CFG_TUSB_DEBUG=${LOG})
+endif()
+
+if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt")
+	target_compile_definitions(tinyusb_additions INTERFACE
+			LOGGER_RTT
+			SEGGER_RTT_MODE_DEFAULT=SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL
+	)
+
+	target_sources(tinyusb_additions INTERFACE
+			${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c
+	)
+
+	set_source_files_properties(${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c
+		PROPERTIES
+		COMPILE_FLAGS "-Wno-cast-qual -Wno-cast-align -Wno-sign-conversion")
+
+	target_include_directories(tinyusb_additions INTERFACE
+			${TOP}/lib/SEGGER_RTT/RTT
+	)
+endif()
+
+#------------------------------------
+# Functions
+#------------------------------------
+
+function(family_configure_target TARGET)
+	pico_add_extra_outputs(${TARGET})
+	pico_enable_stdio_uart(${TARGET} 1)
+	target_link_libraries(${TARGET} PUBLIC pico_stdlib pico_bootsel_via_double_reset tinyusb_board tinyusb_additions)
+endfunction()
+
+function(rp2040_family_configure_example_warnings TARGET)
+	if (NOT PICO_TINYUSB_NO_EXAMPLE_WARNINGS)
+		family_add_default_example_warnings(${TARGET})
+	endif()
+	if(CMAKE_C_COMPILER_ID STREQUAL "Clang")
+		target_compile_options(${TARGET} PRIVATE -Wno-unreachable-code)
+	endif()
+	suppress_tinyusb_warnings()
+endfunction()
+
+function(family_configure_device_example TARGET)
+	family_configure_target(${TARGET})
+	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device)
+	rp2040_family_configure_example_warnings(${TARGET})
+endfunction()
+
+function(family_add_pico_pio_usb TARGET)
+	target_link_libraries(${TARGET} PUBLIC tinyusb_pico_pio_usb)
+endfunction()
+
+function(family_configure_host_example TARGET)
+	family_configure_target(${TARGET})
+	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_host)
+	rp2040_family_configure_example_warnings(${TARGET})
+
+	# For rp2040 enable pico-pio-usb
+	if (TARGET tinyusb_pico_pio_usb)
+		# code does not compile with non GCC, or GCC 11.3+
+		if (CMAKE_C_COMPILER_ID STREQUAL "GNU" AND NOT CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 11.3)
+			family_add_pico_pio_usb(${PROJECT})
+		endif()
+	endif()
+endfunction()
+
+function(family_configure_dual_usb_example TARGET)
+	family_configure_target(${TARGET})
+	# require tinyusb_pico_pio_usb
+	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device tinyusb_host tinyusb_pico_pio_usb )
+	rp2040_family_configure_example_warnings(${TARGET})
+endfunction()
+
+function(check_and_add_pico_pio_usb_support)
+	# check for pico_generate_pio_header (as depending on environment we may be called before SDK is
+	# initialized in which case it isn't available yet), and only do the initialization once
+	if (COMMAND pico_generate_pio_header AND NOT TARGET tinyusb_pico_pio_usb)
+		#------------------------------------
+		# PIO USB for both host and device
+		#------------------------------------
+
+		if (NOT DEFINED PICO_PIO_USB_PATH)
+			set(PICO_PIO_USB_PATH "${TOP}/hw/mcu/raspberry_pi/Pico-PIO-USB")
+		endif()
+
+		if (EXISTS ${PICO_PIO_USB_PATH}/src/pio_usb.c)
+			add_library(tinyusb_pico_pio_usb INTERFACE)
+			target_sources(tinyusb_device_base INTERFACE
+					${TOP}/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c
+					)
+			target_sources(tinyusb_host_base INTERFACE
+					${TOP}/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
+					)
+
+			target_sources(tinyusb_pico_pio_usb INTERFACE
+					${PICO_PIO_USB_PATH}/src/pio_usb.c
+					${PICO_PIO_USB_PATH}/src/pio_usb_host.c
+					${PICO_PIO_USB_PATH}/src/pio_usb_device.c
+					${PICO_PIO_USB_PATH}/src/usb_crc.c
+					)
+
+			target_include_directories(tinyusb_pico_pio_usb INTERFACE
+					${PICO_PIO_USB_PATH}/src
+					)
+
+			target_link_libraries(tinyusb_pico_pio_usb INTERFACE
+					hardware_dma
+					hardware_pio
+					pico_multicore
+					)
+
+			target_compile_definitions(tinyusb_pico_pio_usb INTERFACE
+					PIO_USB_USE_TINYUSB
+					)
+
+			pico_generate_pio_header(tinyusb_pico_pio_usb ${PICO_PIO_USB_PATH}/src/usb_tx.pio)
+			pico_generate_pio_header(tinyusb_pico_pio_usb ${PICO_PIO_USB_PATH}/src/usb_rx.pio)
+		endif()
+	endif()
+endfunction()
+
+# Try to add Pico-PIO_USB support now for the case where this file is included directly
+# after Pico SDK initialization, but without using the family_ functions (as is the case
+# when included by the SDK itself)
+check_and_add_pico_pio_usb_support()
+
+function(family_initialize_project PROJECT DIR)
+	# call the original version of this function from family_common.cmake
+	_family_initialize_project(${PROJECT} ${DIR})
+	enable_language(C CXX ASM)
+	pico_sdk_init()
+
+	# now re-check for adding Pico-PIO_USB support now SDK is definitely available
+	check_and_add_pico_pio_usb_support()
+endfunction()
+
+# This method must be called from the project scope to suppress known warnings in TinyUSB source files
+function(suppress_tinyusb_warnings)
+	# some of these are pretty silly warnings only occurring in some older GCC versions 9 or prior
+	if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+		if (CMAKE_C_COMPILER_VERSION VERSION_LESS 10.0)
+			set(CONVERSION_WARNING_FILES
+				${PICO_TINYUSB_PATH}/src/tusb.c
+				${PICO_TINYUSB_PATH}/src/common/tusb_fifo.c
+				${PICO_TINYUSB_PATH}/src/device/usbd.c
+				${PICO_TINYUSB_PATH}/src/device/usbd_control.c
+				${PICO_TINYUSB_PATH}/src/host/usbh.c
+				${PICO_TINYUSB_PATH}/src/class/cdc/cdc_device.c
+				${PICO_TINYUSB_PATH}/src/class/cdc/cdc_host.c
+				${PICO_TINYUSB_PATH}/src/class/hid/hid_device.c
+				${PICO_TINYUSB_PATH}/src/class/hid/hid_host.c
+				${PICO_TINYUSB_PATH}/src/class/audio/audio_device.c
+				${PICO_TINYUSB_PATH}/src/class/dfu/dfu_device.c
+				${PICO_TINYUSB_PATH}/src/class/dfu/dfu_rt_device.c
+				${PICO_TINYUSB_PATH}/src/class/midi/midi_device.c
+				${PICO_TINYUSB_PATH}/src/class/usbtmc/usbtmc_device.c
+				${PICO_TINYUSB_PATH}/src/portable/raspberrypi/rp2040/hcd_rp2040.c
+				)
+			foreach(SOURCE_FILE IN LISTS CONVERSION_WARNING_FILES)
+				set_source_files_properties(
+						${SOURCE_FILE}
+						PROPERTIES
+						COMPILE_FLAGS "-Wno-conversion")
+			endforeach()
+		endif()
+		if (CMAKE_C_COMPILER_ID STREQUAL "GNU" AND CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 11.0)
+			set_source_files_properties(
+					${PICO_TINYUSB_PATH}/lib/fatfs/source/ff.c
+					COMPILE_FLAGS "-Wno-stringop-overflow -Wno-array-bounds")
+		endif()
+		set_source_files_properties(
+				${PICO_TINYUSB_PATH}/lib/fatfs/source/ff.c
+				PROPERTIES
+				COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual")
+
+		set_source_files_properties(
+				${PICO_TINYUSB_PATH}/lib/lwip/src/core/tcp_in.c
+				${PICO_TINYUSB_PATH}/lib/lwip/src/core/tcp_out.c
+				PROPERTIES
+				COMPILE_FLAGS "-Wno-conversion")
+
+		set_source_files_properties(
+				${PICO_TINYUSB_PATH}/lib/networking/dnserver.c
+				${PICO_TINYUSB_PATH}/lib/networking/dhserver.c
+				${PICO_TINYUSB_PATH}/lib/networking/rndis_reports.c
+				PROPERTIES
+				COMPILE_FLAGS "-Wno-conversion -Wno-sign-conversion")
+
+		if (TARGET tinyusb_pico_pio_usb)
+			set_source_files_properties(
+					${PICO_TINYUSB_PATH}/hw/mcu/raspberry_pi/Pico-PIO-USB/src/pio_usb_device.c
+					${PICO_TINYUSB_PATH}/hw/mcu/raspberry_pi/Pico-PIO-USB/src/pio_usb.c
+					${PICO_TINYUSB_PATH}/hw/mcu/raspberry_pi/Pico-PIO-USB/src/pio_usb_host.c
+					${PICO_TINYUSB_PATH}/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
+					PROPERTIES
+					COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual -Wno-attributes")
+		endif()
+	elseif(CMAKE_C_COMPILER_ID STREQUAL "Clang")
+		set_source_files_properties(
+				${PICO_TINYUSB_PATH}/src/class/cdc/cdc_device.c
+				COMPILE_FLAGS "-Wno-unreachable-code")
+		set_source_files_properties(
+				${PICO_TINYUSB_PATH}/src/class/cdc/cdc_host.c
+				COMPILE_FLAGS "-Wno-unreachable-code-fallthrough")
+		set_source_files_properties(
+				${PICO_TINYUSB_PATH}/lib/fatfs/source/ff.c
+				PROPERTIES
+				COMPILE_FLAGS "-Wno-cast-qual")
+	endif()
+endfunction()
+
+# rp2040 does not support freeRTOS example yet
+function(family_add_freertos TARGET)
+endfunction()
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index b99c7be6e..8f7f38589 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -75,8 +75,11 @@ endfunction()
 #------------------------------------
 # TinyUSB as library target
 #------------------------------------
-set(TINYUSB_TARGET "tinyusb")
-set(TINYUSB_CONFIG_TARGET "tinyusb_config")
+if (NOT DEFINED TINYUSB_TARGET)
+  set(TINYUSB_TARGET "tinyusb")
+endif ()
+
+set(TINYUSB_CONFIG_TARGET "${TINYUSB_TARGET}_config")
 
 if (DEFINED TINYUSB_TARGET_PREFIX)
   set(TINYUSB_TARGET "${TINYUSB_TARGET_PREFIX}${TINYUSB_TARGET}")

From a61d0f074fbca389ff5e8744dfcb610aafd8ae1e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 26 Jun 2023 23:08:59 +0700
Subject: [PATCH 455/691] more rp2040 family clean up

---
 hw/bsp/rp2040/family.cmake | 42 ++++++++++++++++----------------------
 1 file changed, 18 insertions(+), 24 deletions(-)

diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index fee376538..2d37f8be9 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -14,10 +14,6 @@ set(FAMILY_MCUS RP2040)
 
 include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 
-# TOP is absolute path to root directory of TinyUSB git repo
-#set(TOP "${CMAKE_CURRENT_LIST_DIR}/../../..")
-#get_filename_component(TOP "${TOP}" REALPATH)
-
 if (NOT PICO_TINYUSB_PATH)
 	set(PICO_TINYUSB_PATH ${TOP})
 endif()
@@ -38,29 +34,30 @@ target_sources(tinyusb_common_base INTERFACE
 
 target_include_directories(tinyusb_common_base INTERFACE
 		${TOP}/src
-		${TOP}/src/common
-		${TOP}/hw
 		)
 
-target_link_libraries(tinyusb_common_base INTERFACE
-		hardware_structs
-		hardware_irq
-		hardware_resets
-		pico_sync
-		)
-
-set(TINYUSB_DEBUG_LEVEL 0)
-if (CMAKE_BUILD_TYPE STREQUAL "Debug")
+if(DEFINED LOG)
+	set(TINYUSB_DEBUG_LEVEL ${LOG})
+elseif (CMAKE_BUILD_TYPE STREQUAL "Debug")
 	message("Compiling TinyUSB with CFG_TUSB_DEBUG=1")
 	set(TINYUSB_DEBUG_LEVEL 1)
+else ()
+	set(TINYUSB_DEBUG_LEVEL 0)
 endif()
 
 target_compile_definitions(tinyusb_common_base INTERFACE
 		CFG_TUSB_MCU=OPT_MCU_RP2040
 		CFG_TUSB_OS=${TINYUSB_OPT_OS}
-		#CFG_TUSB_DEBUG=${TINYUSB_DEBUG_LEVEL}
+		CFG_TUSB_DEBUG=${TINYUSB_DEBUG_LEVEL}
 )
 
+target_link_libraries(tinyusb_common_base INTERFACE
+	hardware_structs
+	hardware_irq
+	hardware_resets
+	pico_sync
+	)
+
 #------------------------------------
 # Base config for device mode; wrapped by SDK's tinyusb_device
 #------------------------------------
@@ -109,10 +106,11 @@ target_compile_definitions(tinyusb_host_base INTERFACE
 #------------------------------------
 add_library(tinyusb_bsp INTERFACE)
 target_sources(tinyusb_bsp INTERFACE
-		${TOP}/hw/bsp/rp2040/family.c
-		)
-#	target_include_directories(tinyusb_bsp INTERFACE
-#			${TOP}/hw/bsp/rp2040)
+	${TOP}/hw/bsp/rp2040/family.c
+	)
+target_include_directories(tinyusb_bsp INTERFACE
+	${TOP}/hw
+	)
 
 # tinyusb_additions will hold our extra settings for examples
 add_library(tinyusb_additions INTERFACE)
@@ -122,10 +120,6 @@ target_compile_definitions(tinyusb_additions INTERFACE
 	PICO_RP2040_USB_DEVICE_UFRAME_FIX=1
 )
 
-if(DEFINED LOG)
-	target_compile_definitions(tinyusb_additions INTERFACE CFG_TUSB_DEBUG=${LOG})
-endif()
-
 if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt")
 	target_compile_definitions(tinyusb_additions INTERFACE
 			LOGGER_RTT

From e43387abaca2044f96017481ccb00b3b68dbdc2a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 27 Jun 2023 15:45:38 +0700
Subject: [PATCH 456/691] rework cmake with rtos support add RTOS to
 family_configure_device/host/dual_example()

---
 .../device/audio_4_channel_mic/CMakeLists.txt |   6 +-
 examples/device/audio_test/CMakeLists.txt     |   6 +-
 .../audio_test_multi_rate/CMakeLists.txt      |   6 +-
 examples/device/board_test/CMakeLists.txt     |   6 +-
 examples/device/cdc_dual_ports/CMakeLists.txt |   6 +-
 examples/device/cdc_msc/CMakeLists.txt        |   2 +-
 .../device/cdc_msc_freertos/CMakeLists.txt    |   9 +-
 examples/device/dfu/CMakeLists.txt            |   6 +-
 examples/device/dfu_runtime/CMakeLists.txt    |   6 +-
 .../dynamic_configuration/CMakeLists.txt      |   6 +-
 .../device/hid_boot_interface/CMakeLists.txt  |   6 +-
 examples/device/hid_composite/CMakeLists.txt  |   6 +-
 .../hid_composite_freertos/CMakeLists.txt     |   9 +-
 .../device/hid_generic_inout/CMakeLists.txt   |   6 +-
 .../hid_multiple_interface/CMakeLists.txt     |   6 +-
 examples/device/midi_test/CMakeLists.txt      |   6 +-
 examples/device/msc_dual_lun/CMakeLists.txt   |   6 +-
 .../device/net_lwip_webserver/CMakeLists.txt  |   6 +-
 examples/device/uac2_headset/CMakeLists.txt   |   6 +-
 examples/device/usbtmc/CMakeLists.txt         |   6 +-
 examples/device/video_capture/CMakeLists.txt  |   6 +-
 examples/device/webusb_serial/CMakeLists.txt  |   6 +-
 .../host_hid_to_device_cdc/CMakeLists.txt     |   6 +-
 examples/host/bare_api/CMakeLists.txt         |   6 +-
 examples/host/cdc_msc_hid/CMakeLists.txt      |   6 +-
 examples/host/hid_controller/CMakeLists.txt   |   6 +-
 .../host/msc_file_explorer/CMakeLists.txt     |   6 +-
 examples/typec/power_delivery/CMakeLists.txt  |   6 +-
 .../typec/power_delivery/src/tusb_config.h    |  14 +-
 hw/bsp/family_support.cmake                   | 174 ++++++++++--------
 hw/bsp/imxrt/family.cmake                     |  19 +-
 hw/bsp/kinetis_kl/family.cmake                |  19 +-
 hw/bsp/lpc18/family.cmake                     |  19 +-
 hw/bsp/lpc55/family.cmake                     |  19 +-
 hw/bsp/mcx/family.cmake                       |  19 +-
 hw/bsp/nrf/family.cmake                       |  19 +-
 hw/bsp/rp2040/family.cmake                    |  43 +++--
 hw/bsp/stm32f0/family.cmake                   |  19 +-
 hw/bsp/stm32f1/family.cmake                   |  19 +-
 hw/bsp/stm32f7/family.cmake                   |  19 +-
 hw/bsp/stm32g0/family.cmake                   |  19 +-
 hw/bsp/stm32g4/family.cmake                   |  19 +-
 hw/bsp/stm32h7/family.cmake                   |  19 +-
 hw/bsp/stm32l4/family.cmake                   |  19 +-
 src/common/tusb_compiler.h                    |   8 +-
 test/fuzz/device/cdc/CMakeLists.txt           |  18 +-
 test/fuzz/device/msc/CMakeLists.txt           |   6 +-
 test/fuzz/device/net/CMakeLists.txt           |   6 +-
 48 files changed, 277 insertions(+), 409 deletions(-)

diff --git a/examples/device/audio_4_channel_mic/CMakeLists.txt b/examples/device/audio_4_channel_mic/CMakeLists.txt
index 87b7d07d4..f61e1b640 100644
--- a/examples/device/audio_4_channel_mic/CMakeLists.txt
+++ b/examples/device/audio_4_channel_mic/CMakeLists.txt
@@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/audio_test/CMakeLists.txt b/examples/device/audio_test/CMakeLists.txt
index 87b7d07d4..f61e1b640 100644
--- a/examples/device/audio_test/CMakeLists.txt
+++ b/examples/device/audio_test/CMakeLists.txt
@@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/audio_test_multi_rate/CMakeLists.txt b/examples/device/audio_test_multi_rate/CMakeLists.txt
index 87b7d07d4..f61e1b640 100644
--- a/examples/device/audio_test_multi_rate/CMakeLists.txt
+++ b/examples/device/audio_test_multi_rate/CMakeLists.txt
@@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/board_test/CMakeLists.txt b/examples/device/board_test/CMakeLists.txt
index 4ab8d5a65..012eff095 100644
--- a/examples/device/board_test/CMakeLists.txt
+++ b/examples/device/board_test/CMakeLists.txt
@@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/cdc_dual_ports/CMakeLists.txt b/examples/device/cdc_dual_ports/CMakeLists.txt
index 87b7d07d4..f61e1b640 100644
--- a/examples/device/cdc_dual_ports/CMakeLists.txt
+++ b/examples/device/cdc_dual_ports/CMakeLists.txt
@@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/cdc_msc/CMakeLists.txt b/examples/device/cdc_msc/CMakeLists.txt
index 4ec172f17..9415f8c68 100644
--- a/examples/device/cdc_msc/CMakeLists.txt
+++ b/examples/device/cdc_msc/CMakeLists.txt
@@ -32,4 +32,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/cdc_msc_freertos/CMakeLists.txt b/examples/device/cdc_msc_freertos/CMakeLists.txt
index 319ad0356..33c7a1ec0 100644
--- a/examples/device/cdc_msc_freertos/CMakeLists.txt
+++ b/examples/device/cdc_msc_freertos/CMakeLists.txt
@@ -30,9 +30,6 @@ target_include_directories(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
-
-# Add FreeRTOS for this example
-family_add_freertos(${PROJECT})
+# Configure compilation flags and libraries for the example with FreeRTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} freertos)
diff --git a/examples/device/dfu/CMakeLists.txt b/examples/device/dfu/CMakeLists.txt
index eb4c198d6..a01eb3456 100644
--- a/examples/device/dfu/CMakeLists.txt
+++ b/examples/device/dfu/CMakeLists.txt
@@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/dfu_runtime/CMakeLists.txt b/examples/device/dfu_runtime/CMakeLists.txt
index eb4c198d6..a01eb3456 100644
--- a/examples/device/dfu_runtime/CMakeLists.txt
+++ b/examples/device/dfu_runtime/CMakeLists.txt
@@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/dynamic_configuration/CMakeLists.txt b/examples/device/dynamic_configuration/CMakeLists.txt
index 046a32257..2b20d2234 100644
--- a/examples/device/dynamic_configuration/CMakeLists.txt
+++ b/examples/device/dynamic_configuration/CMakeLists.txt
@@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/hid_boot_interface/CMakeLists.txt b/examples/device/hid_boot_interface/CMakeLists.txt
index eb4c198d6..a01eb3456 100644
--- a/examples/device/hid_boot_interface/CMakeLists.txt
+++ b/examples/device/hid_boot_interface/CMakeLists.txt
@@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/hid_composite/CMakeLists.txt b/examples/device/hid_composite/CMakeLists.txt
index eb4c198d6..a01eb3456 100644
--- a/examples/device/hid_composite/CMakeLists.txt
+++ b/examples/device/hid_composite/CMakeLists.txt
@@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/hid_composite_freertos/CMakeLists.txt b/examples/device/hid_composite_freertos/CMakeLists.txt
index 211904cf9..eb22014fb 100644
--- a/examples/device/hid_composite_freertos/CMakeLists.txt
+++ b/examples/device/hid_composite_freertos/CMakeLists.txt
@@ -29,9 +29,6 @@ target_include_directories(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
-
-# Add FreeRTOS for this example
-family_add_freertos(${PROJECT})
+# Configure compilation flags and libraries for the example with FreeRTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} freertos)
diff --git a/examples/device/hid_generic_inout/CMakeLists.txt b/examples/device/hid_generic_inout/CMakeLists.txt
index eb4c198d6..a01eb3456 100644
--- a/examples/device/hid_generic_inout/CMakeLists.txt
+++ b/examples/device/hid_generic_inout/CMakeLists.txt
@@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/hid_multiple_interface/CMakeLists.txt b/examples/device/hid_multiple_interface/CMakeLists.txt
index eb4c198d6..a01eb3456 100644
--- a/examples/device/hid_multiple_interface/CMakeLists.txt
+++ b/examples/device/hid_multiple_interface/CMakeLists.txt
@@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/midi_test/CMakeLists.txt b/examples/device/midi_test/CMakeLists.txt
index 5b1a5547d..e51f14c02 100644
--- a/examples/device/midi_test/CMakeLists.txt
+++ b/examples/device/midi_test/CMakeLists.txt
@@ -26,6 +26,6 @@ target_include_directories(${PROJECT} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/msc_dual_lun/CMakeLists.txt b/examples/device/msc_dual_lun/CMakeLists.txt
index dc8d5512c..e69fead35 100644
--- a/examples/device/msc_dual_lun/CMakeLists.txt
+++ b/examples/device/msc_dual_lun/CMakeLists.txt
@@ -29,6 +29,6 @@ target_include_directories(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/net_lwip_webserver/CMakeLists.txt b/examples/device/net_lwip_webserver/CMakeLists.txt
index 2c21aa52b..1e34428fe 100644
--- a/examples/device/net_lwip_webserver/CMakeLists.txt
+++ b/examples/device/net_lwip_webserver/CMakeLists.txt
@@ -88,6 +88,6 @@ elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
 
 endif ()
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/uac2_headset/CMakeLists.txt b/examples/device/uac2_headset/CMakeLists.txt
index d142e9c04..e92a57148 100644
--- a/examples/device/uac2_headset/CMakeLists.txt
+++ b/examples/device/uac2_headset/CMakeLists.txt
@@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/usbtmc/CMakeLists.txt b/examples/device/usbtmc/CMakeLists.txt
index a6b22ab36..a63ca2d81 100644
--- a/examples/device/usbtmc/CMakeLists.txt
+++ b/examples/device/usbtmc/CMakeLists.txt
@@ -29,6 +29,6 @@ target_include_directories(${PROJECT} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/video_capture/CMakeLists.txt b/examples/device/video_capture/CMakeLists.txt
index e0bd975c4..80dc39ca5 100644
--- a/examples/device/video_capture/CMakeLists.txt
+++ b/examples/device/video_capture/CMakeLists.txt
@@ -34,6 +34,6 @@ target_include_directories(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
 )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/webusb_serial/CMakeLists.txt b/examples/device/webusb_serial/CMakeLists.txt
index d142e9c04..e92a57148 100644
--- a/examples/device/webusb_serial/CMakeLists.txt
+++ b/examples/device/webusb_serial/CMakeLists.txt
@@ -28,6 +28,6 @@ target_include_directories(${PROJECT} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/dual/host_hid_to_device_cdc/CMakeLists.txt b/examples/dual/host_hid_to_device_cdc/CMakeLists.txt
index c6d19a720..a6557c2d0 100644
--- a/examples/dual/host_hid_to_device_cdc/CMakeLists.txt
+++ b/examples/dual/host_hid_to_device_cdc/CMakeLists.txt
@@ -23,9 +23,9 @@ target_include_directories(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_dual_usb_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_dual_usb_example(${PROJECT} noos)
 
 # due to warnings from Pico-PIO-USB
 target_compile_options(${PROJECT} PUBLIC
diff --git a/examples/host/bare_api/CMakeLists.txt b/examples/host/bare_api/CMakeLists.txt
index b6d8c9c89..95af48718 100644
--- a/examples/host/bare_api/CMakeLists.txt
+++ b/examples/host/bare_api/CMakeLists.txt
@@ -22,9 +22,9 @@ target_include_directories(${PROJECT} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_host_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_host_example(${PROJECT} noos)
 
 # Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host
 if(FAMILY STREQUAL "rp2040")
diff --git a/examples/host/cdc_msc_hid/CMakeLists.txt b/examples/host/cdc_msc_hid/CMakeLists.txt
index 68b52e274..3fdc832ab 100644
--- a/examples/host/cdc_msc_hid/CMakeLists.txt
+++ b/examples/host/cdc_msc_hid/CMakeLists.txt
@@ -25,9 +25,9 @@ target_include_directories(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_host_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_host_example(${PROJECT} noos)
 
 # Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host
 if(FAMILY STREQUAL "rp2040")
diff --git a/examples/host/hid_controller/CMakeLists.txt b/examples/host/hid_controller/CMakeLists.txt
index e27f83c53..d1d901b53 100644
--- a/examples/host/hid_controller/CMakeLists.txt
+++ b/examples/host/hid_controller/CMakeLists.txt
@@ -23,9 +23,9 @@ target_include_directories(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_host_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_host_example(${PROJECT} noos)
 
 # Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host
 if(FAMILY STREQUAL "rp2040")
diff --git a/examples/host/msc_file_explorer/CMakeLists.txt b/examples/host/msc_file_explorer/CMakeLists.txt
index 327d1218a..99c797275 100644
--- a/examples/host/msc_file_explorer/CMakeLists.txt
+++ b/examples/host/msc_file_explorer/CMakeLists.txt
@@ -35,9 +35,9 @@ target_include_directories(${PROJECT} PUBLIC
   ${TOP}/lib/embedded-cli
   )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_host_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_host_example(${PROJECT} noos)
 
 # Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host
 if(FAMILY STREQUAL "rp2040")
diff --git a/examples/typec/power_delivery/CMakeLists.txt b/examples/typec/power_delivery/CMakeLists.txt
index 4ab8d5a65..012eff095 100644
--- a/examples/typec/power_delivery/CMakeLists.txt
+++ b/examples/typec/power_delivery/CMakeLists.txt
@@ -27,6 +27,6 @@ target_include_directories(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/examples/typec/power_delivery/src/tusb_config.h b/examples/typec/power_delivery/src/tusb_config.h
index deddcbfa4..f7cb3cc04 100644
--- a/examples/typec/power_delivery/src/tusb_config.h
+++ b/examples/typec/power_delivery/src/tusb_config.h
@@ -30,11 +30,6 @@
  extern "C" {
 #endif
 
-// special example that doesn't enable device or host stack
-// This can cause some TinyUSB API missing, this define hack to allow us to fill those API
-// to pass the compilation process
-#define tud_int_handler(x)
-
 //--------------------------------------------------------------------
 // COMMON CONFIGURATION
 //--------------------------------------------------------------------
@@ -54,6 +49,15 @@
 // Enable TYPEC stack
 #define CFG_TUC_ENABLED   1
 
+
+// special example that doesn't enable device or host stack
+// This can cause some TinyUSB API missing, this define hack to allow us to fill those API
+// to pass the compilation process
+#if CFG_TUD_ENABLED == 0
+#define tud_int_handler(x)
+#endif
+
+
 // CFG_TUSB_DEBUG is defined by compiler in DEBUG build
 // #define CFG_TUSB_DEBUG           0
 
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 93cab8723..781c67bf7 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -64,6 +64,8 @@ set(WARNING_FLAGS_GNU
 
 set(WARNINGS_FLAGS_IAR "")
 
+
+# Filter example based on only.txt and skip.txt
 function(family_filter RESULT DIR)
   get_filename_component(DIR ${DIR} ABSOLUTE BASE_DIR ${CMAKE_CURRENT_SOURCE_DIR})
 
@@ -142,112 +144,136 @@ function(family_initialize_project PROJECT DIR)
 endfunction()
 
 
-# Add segger rtt to example
-function(family_add_segger_rtt TARGET)
-  if (NOT TARGET segger_rtt)
-    add_library(segger_rtt STATIC
-      ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c
-      )
-    target_include_directories(segger_rtt PUBLIC ${TOP}/lib/SEGGER_RTT/RTT)
-  endif()
+#-------------------------------------------------------------
+# Common Target Configure
+# Most families use these settings except rp2040 and espressif
+#-------------------------------------------------------------
 
-  target_link_libraries(${TARGET} PUBLIC segger_rtt)
+# Add RTOS to example
+function(family_add_rtos TARGET RTOS)
+  if (RTOS STREQUAL "freertos")
+    # freertos config
+    if (NOT TARGET freertos_config)
+      add_library(freertos_config INTERFACE)
+      target_include_directories(freertos_config INTERFACE ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig)
+      # add board definition to freertos_config mostly for SystemCoreClock
+      target_link_libraries(freertos_config INTERFACE board_${BOARD})
+    endif()
+
+    # freertos kernel
+    if (NOT TARGET freertos_kernel)
+      add_subdirectory(${TOP}/lib/FreeRTOS-Kernel ${CMAKE_BINARY_DIR}/lib/freertos_kernel)
+    endif ()
+
+    target_link_libraries(${TARGET} PUBLIC freertos_kernel)
+  endif ()
 endfunction()
 
-#------------------------------------
-# Main target configure
-#------------------------------------
 
 # Add common configuration to example
-function(family_configure_common TARGET)
+function(family_configure_common TARGET RTOS)
+  family_add_rtos(${TARGET} ${RTOS})
+
   # run size after build
   add_custom_command(TARGET ${TARGET} POST_BUILD
     COMMAND ${CMAKE_SIZE} $<TARGET_FILE:${TARGET}>
     )
 
+  # Add warnings flags
   target_compile_options(${TARGET} PUBLIC ${WARNING_FLAGS_${CMAKE_C_COMPILER_ID}})
 
+  # Generate linker map file
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    # Generate map file
-    target_link_options(${TARGET} PUBLIC
-      # link map
-      "LINKER:-Map=$<TARGET_FILE:${TARGET}>.map"
-      )
+    target_link_options(${TARGET} PUBLIC "LINKER:-Map=$<TARGET_FILE:${TARGET}>.map")
   endif()
 
-  # LOGGER
-  if (DEFINED LOGGER)
-    target_compile_definitions(${TARGET} PUBLIC LOGGER_${LOGGER})
-    if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt")
-      family_add_segger_rtt(${TARGET})
-    endif ()
-  endif ()
-
-  # ETM Trace
+  # ETM Trace option
   if (TRACE_ETM STREQUAL "1")
     target_compile_definitions(${TARGET} PUBLIC TRACE_ETM)
   endif ()
 
-endfunction()
+  # LOGGER option
+  if (DEFINED LOGGER)
+    target_compile_definitions(${TARGET} PUBLIC LOGGER_${LOGGER})
 
-
-# configure an executable target to link to tinyusb in device mode, and add the board implementation
-function(family_configure_device_example TARGET)
-  # default implementation is empty, the function should be redefined in the FAMILY/family.cmake
-endfunction()
-
-
-# configure an executable target to link to tinyusb in host mode, and add the board implementation
-function(family_configure_host_example TARGET)
-  # default implementation is empty, the function should be redefined in the FAMILY/family.cmake
+    # Add segger rtt to example
+    if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt")
+      if (NOT TARGET segger_rtt)
+        add_library(segger_rtt STATIC ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c)
+        target_include_directories(segger_rtt PUBLIC ${TOP}/lib/SEGGER_RTT/RTT)
+      endif()
+      target_link_libraries(${TARGET} PUBLIC segger_rtt)
+    endif ()
+  endif ()
 endfunction()
 
 
 # Add tinyusb to example
-function(family_add_tinyusb TARGET OPT_MCU)
+function(family_add_tinyusb TARGET OPT_MCU RTOS)
   # tinyusb target is built for each example since it depends on example's tusb_config.h
   set(TINYUSB_TARGET_PREFIX ${TARGET}-)
   add_library(${TARGET}-tinyusb_config INTERFACE)
 
+  # path to tusb_config.h
   target_include_directories(${TARGET}-tinyusb_config INTERFACE ${CMAKE_CURRENT_SOURCE_DIR}/src)
   target_compile_definitions(${TARGET}-tinyusb_config INTERFACE CFG_TUSB_MCU=${OPT_MCU})
+
   if (DEFINED LOG)
     target_compile_definitions(${TARGET}-tinyusb_config INTERFACE CFG_TUSB_DEBUG=${LOG})
   endif()
 
-  # tinyusb's CMakeList.txt
-  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
-endfunction()
-
-
-# Add freeRTOS support to example
-function(family_add_freertos TARGET)
-  # freeros config
-  if (NOT TARGET freertos_config)
-    add_library(freertos_config INTERFACE)
-    target_include_directories(freertos_config INTERFACE
-      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig
-      )
-    # add board definition to freertos_config mostly for SystemCoreClock
-    target_link_libraries(freertos_config INTERFACE board_${BOARD})
-  endif()
-
-  # freertos kernel should be generic as freertos_config however, CMAKE complains with missing variable
-  # such as CMAKE_C_COMPILE_OBJECT
-  if (NOT TARGET freertos_kernel)
-    add_subdirectory(${TOP}/lib/FreeRTOS-Kernel ${CMAKE_BINARY_DIR}/lib/freertos_kernel)
+  if (RTOS STREQUAL "freertos")
+    target_compile_definitions(${TARGET}-tinyusb_config INTERFACE CFG_TUSB_OS=OPT_OS_FREERTOS)
   endif ()
 
-  # Add FreeRTOS option to tinyusb_config
-  target_compile_definitions(${TARGET}-tinyusb_config INTERFACE
-    CFG_TUSB_OS=OPT_OS_FREERTOS
-    )
-  # link tinyusb with freeRTOS kernel
-  target_link_libraries(${TARGET}-tinyusb PUBLIC freertos_kernel)
-  target_link_libraries(${TARGET} PUBLIC freertos_kernel)
+  # tinyusb's CMakeList.txt
+  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+
+  if (RTOS STREQUAL "freertos")
+    # link tinyusb with freeRTOS kernel
+    target_link_libraries(${TARGET}-tinyusb PUBLIC freertos_kernel)
+  endif ()
 endfunction()
 
 
+# Add bin/hex output
+function(family_add_bin_hex TARGET)
+  add_custom_command(TARGET ${TARGET} POST_BUILD
+    COMMAND ${CMAKE_OBJCOPY} -Obinary $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin
+    COMMAND ${CMAKE_OBJCOPY} -Oihex $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.hex
+    VERBATIM)
+endfunction()
+
+
+#----------------------------------
+# Example Target Configure (Default rule)
+# These function can be redefined in FAMILY/family.cmake
+#----------------------------------
+
+function(family_configure_example TARGET RTOS)
+  # empty function, should be redefined in FAMILY/family.cmake
+endfunction()
+
+# Configure device example with RTOS
+function(family_configure_device_example TARGET RTOS)
+  family_configure_example(${TARGET} ${RTOS})
+endfunction()
+
+
+# Configure host example with RTOS
+function(family_configure_host_example TARGET RTOS)
+  family_configure_example(${TARGET} ${RTOS})
+endfunction()
+
+
+# Configure host + device example with RTOS
+function(family_configure_dual_usb_example TARGET RTOS)
+  family_configure_example(${TARGET} ${RTOS})
+endfunction()
+
+#----------------------------------
+# RPI specific: refactor later
+#----------------------------------
 function(family_add_default_example_warnings TARGET)
   target_compile_options(${TARGET} PUBLIC
     -Wall
@@ -294,16 +320,6 @@ function(family_add_default_example_warnings TARGET)
   endif()
 endfunction()
 
-
-# Add bin/hex output
-function(family_add_bin_hex TARGET)
-  add_custom_command(TARGET ${TARGET} POST_BUILD
-    COMMAND ${CMAKE_OBJCOPY} -Obinary $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin
-    COMMAND ${CMAKE_OBJCOPY} -Oihex $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.hex
-    VERBATIM)
-endfunction()
-
-
 #----------------------------------
 # Flashing target
 #----------------------------------
@@ -374,6 +390,10 @@ function(family_flash_nxplink TARGET)
 endfunction()
 
 
+#----------------------------------
+# Family specific
+#----------------------------------
+
 # family specific: can override above functions
 include(${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake)
 
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 4a9842cf9..aaedfc9d6 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -94,8 +94,8 @@ endfunction()
 #------------------------------------
 # Functions
 #------------------------------------
-function(family_configure_example TARGET)
-  family_configure_common(${TARGET})
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
 
   # Board target
   add_board_target(board_${BOARD})
@@ -115,7 +115,7 @@ function(family_configure_example TARGET)
     )
 
   # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT1XXX)
+  family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT1XXX ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
     ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
@@ -130,16 +130,3 @@ function(family_configure_example TARGET)
   family_flash_jlink(${TARGET})
   #family_flash_nxplink(${TARGET})
 endfunction()
-
-
-function(family_configure_device_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_host_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_dual_usb_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
diff --git a/hw/bsp/kinetis_kl/family.cmake b/hw/bsp/kinetis_kl/family.cmake
index 5d4165185..4df3d1ed1 100644
--- a/hw/bsp/kinetis_kl/family.cmake
+++ b/hw/bsp/kinetis_kl/family.cmake
@@ -78,8 +78,8 @@ endfunction()
 #------------------------------------
 # Functions
 #------------------------------------
-function(family_configure_example TARGET)
-  family_configure_common(${TARGET})
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
 
   # Board target
   add_board_target(board_${BOARD})
@@ -99,7 +99,7 @@ function(family_configure_example TARGET)
     )
 
   # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_KINETIS_KL)
+  family_add_tinyusb(${TARGET} OPT_MCU_KINETIS_KL ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/chipidea/ci_fs/dcd_ci_fs.c
     ${TOP}/src/portable/nxp/khci/hcd_khci.c
@@ -113,16 +113,3 @@ function(family_configure_example TARGET)
   family_flash_jlink(${TARGET})
   #family_flash_nxplink(${TARGET})
 endfunction()
-
-
-function(family_configure_device_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_host_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_dual_usb_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
diff --git a/hw/bsp/lpc18/family.cmake b/hw/bsp/lpc18/family.cmake
index 4e6e2b56d..da71a0e5d 100644
--- a/hw/bsp/lpc18/family.cmake
+++ b/hw/bsp/lpc18/family.cmake
@@ -70,8 +70,8 @@ endfunction()
 #------------------------------------
 # Functions
 #------------------------------------
-function(family_configure_example TARGET)
-  family_configure_common(${TARGET})
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
 
   # Board target
   add_board_target(board_${BOARD})
@@ -91,7 +91,7 @@ function(family_configure_example TARGET)
     )
 
   # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_LPC18XX)
+  family_add_tinyusb(${TARGET} OPT_MCU_LPC18XX ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
     ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
@@ -106,16 +106,3 @@ function(family_configure_example TARGET)
   family_flash_jlink(${TARGET})
   #family_flash_nxplink(${TARGET})
 endfunction()
-
-
-function(family_configure_device_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_host_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_dual_usb_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index e443f47d3..dfd08a732 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -87,8 +87,8 @@ endfunction()
 #------------------------------------
 # Functions
 #------------------------------------
-function(family_configure_example TARGET)
-  family_configure_common(${TARGET})
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
 
   # Board target
   add_board_target(board_${BOARD})
@@ -117,7 +117,7 @@ function(family_configure_example TARGET)
     )
 
   # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_LPC55XX)
+  family_add_tinyusb(${TARGET} OPT_MCU_LPC55XX ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
     )
@@ -131,16 +131,3 @@ function(family_configure_example TARGET)
   #family_flash_nxplink(${TARGET})
   #family_flash_pyocd(${TARGET})
 endfunction()
-
-
-function(family_configure_device_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_host_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_dual_usb_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake
index 83f44222b..f548ac4f3 100644
--- a/hw/bsp/mcx/family.cmake
+++ b/hw/bsp/mcx/family.cmake
@@ -79,8 +79,8 @@ endfunction()
 #------------------------------------
 # Functions
 #------------------------------------
-function(family_configure_example TARGET)
-  family_configure_common(${TARGET})
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
 
   # Board target
   add_board_target(board_${BOARD})
@@ -100,7 +100,7 @@ function(family_configure_example TARGET)
     )
 
   # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_MCXN9)
+  family_add_tinyusb(${TARGET} OPT_MCU_MCXN9 ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     # TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS
     ${TOP}/src/portable/chipidea/$<IF:${PORT},ci_hs/dcd_ci_hs.c,ci_fs/dcd_ci_fs.c>
@@ -115,16 +115,3 @@ function(family_configure_example TARGET)
   #family_flash_nxplink(${TARGET})
   #family_flash_pyocd(${TARGET})
 endfunction()
-
-
-function(family_configure_device_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_host_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_dual_usb_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 825380d0b..30fd41d7b 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -97,8 +97,8 @@ endfunction()
 #------------------------------------
 # Functions
 #------------------------------------
-function(family_configure_example TARGET)
-  family_configure_common(${TARGET})
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
 
   # Board target
   add_board_target(board_${BOARD})
@@ -118,7 +118,7 @@ function(family_configure_example TARGET)
     )
 
   # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_NRF5X)
+  family_add_tinyusb(${TARGET} OPT_MCU_NRF5X ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/nordic/nrf5x/dcd_nrf5x.c
     )
@@ -132,16 +132,3 @@ function(family_configure_example TARGET)
   # Flashing
   family_flash_jlink(${TARGET})
 endfunction()
-
-
-function(family_configure_device_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_host_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_dual_usb_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index 2d37f8be9..b986b3ebb 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -11,6 +11,7 @@ include(${CMAKE_CURRENT_LIST_DIR}/pico_sdk_import.cmake)
 
 # include basic family CMake functionality
 set(FAMILY_MCUS RP2040)
+set(JLINK_DEVICE rp2040_m0_0)
 
 include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 
@@ -143,12 +144,23 @@ endif()
 # Functions
 #------------------------------------
 
-function(family_configure_target TARGET)
+function(family_configure_target TARGET RTOS)
+	if (RTOS STREQUAL noos OR RTOS STREQUAL "")
+		set(RTOS_SUFFIX "")
+	else()
+		set(RTOS_SUFFIX _${RTOS})
+	endif()
+	# export RTOS_SUFFIX to parent scope
+	set(RTOS_SUFFIX ${RTOS_SUFFIX} PARENT_SCOPE)
+
 	pico_add_extra_outputs(${TARGET})
 	pico_enable_stdio_uart(${TARGET} 1)
-	target_link_libraries(${TARGET} PUBLIC pico_stdlib pico_bootsel_via_double_reset tinyusb_board tinyusb_additions)
+	target_link_libraries(${TARGET} PUBLIC pico_stdlib pico_bootsel_via_double_reset tinyusb_board${RTOS_SUFFIX} tinyusb_additions)
+
+	family_flash_jlink(${TARGET})
 endfunction()
 
+
 function(rp2040_family_configure_example_warnings TARGET)
 	if (NOT PICO_TINYUSB_NO_EXAMPLE_WARNINGS)
 		family_add_default_example_warnings(${TARGET})
@@ -159,19 +171,22 @@ function(rp2040_family_configure_example_warnings TARGET)
 	suppress_tinyusb_warnings()
 endfunction()
 
-function(family_configure_device_example TARGET)
-	family_configure_target(${TARGET})
-	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device)
+
+function(family_configure_device_example TARGET RTOS)
+	family_configure_target(${TARGET} ${RTOS})
+	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device${RTOS_SUFFIX})
 	rp2040_family_configure_example_warnings(${TARGET})
 endfunction()
 
+
 function(family_add_pico_pio_usb TARGET)
 	target_link_libraries(${TARGET} PUBLIC tinyusb_pico_pio_usb)
 endfunction()
 
-function(family_configure_host_example TARGET)
-	family_configure_target(${TARGET})
-	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_host)
+
+function(family_configure_host_example TARGET RTOS)
+	family_configure_target(${TARGET} ${RTOS})
+	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_host${RTOS_SUFFIX})
 	rp2040_family_configure_example_warnings(${TARGET})
 
 	# For rp2040 enable pico-pio-usb
@@ -183,13 +198,15 @@ function(family_configure_host_example TARGET)
 	endif()
 endfunction()
 
-function(family_configure_dual_usb_example TARGET)
-	family_configure_target(${TARGET})
+
+function(family_configure_dual_usb_example TARGET RTOS)
+	family_configure_target(${TARGET} ${RTOS})
 	# require tinyusb_pico_pio_usb
 	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device tinyusb_host tinyusb_pico_pio_usb )
 	rp2040_family_configure_example_warnings(${TARGET})
 endfunction()
 
+
 function(check_and_add_pico_pio_usb_support)
 	# check for pico_generate_pio_header (as depending on environment we may be called before SDK is
 	# initialized in which case it isn't available yet), and only do the initialization once
@@ -243,6 +260,7 @@ endfunction()
 # when included by the SDK itself)
 check_and_add_pico_pio_usb_support()
 
+
 function(family_initialize_project PROJECT DIR)
 	# call the original version of this function from family_common.cmake
 	_family_initialize_project(${PROJECT} ${DIR})
@@ -253,6 +271,7 @@ function(family_initialize_project PROJECT DIR)
 	check_and_add_pico_pio_usb_support()
 endfunction()
 
+
 # This method must be called from the project scope to suppress known warnings in TinyUSB source files
 function(suppress_tinyusb_warnings)
 	# some of these are pretty silly warnings only occurring in some older GCC versions 9 or prior
@@ -327,7 +346,3 @@ function(suppress_tinyusb_warnings)
 				COMPILE_FLAGS "-Wno-cast-qual")
 	endif()
 endfunction()
-
-# rp2040 does not support freeRTOS example yet
-function(family_add_freertos TARGET)
-endfunction()
diff --git a/hw/bsp/stm32f0/family.cmake b/hw/bsp/stm32f0/family.cmake
index ecf6a8424..73f43de82 100644
--- a/hw/bsp/stm32f0/family.cmake
+++ b/hw/bsp/stm32f0/family.cmake
@@ -84,8 +84,8 @@ endfunction()
 #------------------------------------
 # Functions
 #------------------------------------
-function(family_configure_example TARGET)
-  family_configure_common(${TARGET})
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
 
   # Board target
   add_board_target(board_${BOARD})
@@ -105,7 +105,7 @@ function(family_configure_example TARGET)
     )
 
   # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32F0)
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32F0 ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
     )
@@ -118,16 +118,3 @@ function(family_configure_example TARGET)
   family_flash_stlink(${TARGET})
   #family_flash_jlink(${TARGET})
 endfunction()
-
-
-function(family_configure_device_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_host_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_dual_usb_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
diff --git a/hw/bsp/stm32f1/family.cmake b/hw/bsp/stm32f1/family.cmake
index ab46c9872..efe41bc1b 100644
--- a/hw/bsp/stm32f1/family.cmake
+++ b/hw/bsp/stm32f1/family.cmake
@@ -81,8 +81,8 @@ endfunction()
 #------------------------------------
 # Functions
 #------------------------------------
-function(family_configure_example TARGET)
-  family_configure_common(${TARGET})
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
 
   # Board target
   add_board_target(board_${BOARD})
@@ -102,7 +102,7 @@ function(family_configure_example TARGET)
     )
 
   # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32F1)
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32F1 ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
     )
@@ -115,16 +115,3 @@ function(family_configure_example TARGET)
   family_flash_stlink(${TARGET})
   #family_flash_jlink(${TARGET})
 endfunction()
-
-
-function(family_configure_device_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_host_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_dual_usb_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
diff --git a/hw/bsp/stm32f7/family.cmake b/hw/bsp/stm32f7/family.cmake
index 3b6ba1a15..30bde9b0d 100644
--- a/hw/bsp/stm32f7/family.cmake
+++ b/hw/bsp/stm32f7/family.cmake
@@ -86,8 +86,8 @@ endfunction()
 #------------------------------------
 # Functions
 #------------------------------------
-function(family_configure_example TARGET)
-  family_configure_common(${TARGET})
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
 
   # Board target
   add_board_target(board_${BOARD})
@@ -107,7 +107,7 @@ function(family_configure_example TARGET)
     )
 
   # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32F7)
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32F7 ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
     )
@@ -120,16 +120,3 @@ function(family_configure_example TARGET)
   family_flash_stlink(${TARGET})
   family_flash_jlink(${TARGET})
 endfunction()
-
-
-function(family_configure_device_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_host_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_dual_usb_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake
index fa93566bf..f7b665090 100644
--- a/hw/bsp/stm32g0/family.cmake
+++ b/hw/bsp/stm32g0/family.cmake
@@ -84,8 +84,8 @@ endfunction()
 #------------------------------------
 # Functions
 #------------------------------------
-function(family_configure_example TARGET)
-  family_configure_common(${TARGET})
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
 
   # Board target
   add_board_target(board_${BOARD})
@@ -105,7 +105,7 @@ function(family_configure_example TARGET)
     )
 
   # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32G0)
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32G0 ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
     ${TOP}/src/portable/st/typec/typec_stm32.c
@@ -119,16 +119,3 @@ function(family_configure_example TARGET)
   family_flash_stlink(${TARGET})
   #family_flash_jlink(${TARGET})
 endfunction()
-
-
-function(family_configure_device_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_host_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_dual_usb_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake
index c89993f6d..3c7633d64 100644
--- a/hw/bsp/stm32g4/family.cmake
+++ b/hw/bsp/stm32g4/family.cmake
@@ -84,8 +84,8 @@ endfunction()
 #------------------------------------
 # Functions
 #------------------------------------
-function(family_configure_example TARGET)
-  family_configure_common(${TARGET})
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
 
   # Board target
   add_board_target(board_${BOARD})
@@ -105,7 +105,7 @@ function(family_configure_example TARGET)
     )
 
   # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32G4)
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32G4 ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
     ${TOP}/src/portable/st/typec/typec_stm32.c
@@ -119,16 +119,3 @@ function(family_configure_example TARGET)
   family_flash_stlink(${TARGET})
   family_flash_jlink(${TARGET})
 endfunction()
-
-
-function(family_configure_device_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_host_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_dual_usb_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
diff --git a/hw/bsp/stm32h7/family.cmake b/hw/bsp/stm32h7/family.cmake
index f3705edb4..1a8c4354c 100644
--- a/hw/bsp/stm32h7/family.cmake
+++ b/hw/bsp/stm32h7/family.cmake
@@ -89,8 +89,8 @@ endfunction()
 #------------------------------------
 # Functions
 #------------------------------------
-function(family_configure_example TARGET)
-  family_configure_common(${TARGET})
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
 
   # Board target
   add_board_target(board_${BOARD})
@@ -110,7 +110,7 @@ function(family_configure_example TARGET)
     )
 
   # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32H7)
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32H7 ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
     )
@@ -123,16 +123,3 @@ function(family_configure_example TARGET)
   family_flash_stlink(${TARGET})
   family_flash_jlink(${TARGET})
 endfunction()
-
-
-function(family_configure_device_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_host_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_dual_usb_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
diff --git a/hw/bsp/stm32l4/family.cmake b/hw/bsp/stm32l4/family.cmake
index 83c51c9bf..da017cdde 100644
--- a/hw/bsp/stm32l4/family.cmake
+++ b/hw/bsp/stm32l4/family.cmake
@@ -86,8 +86,8 @@ endfunction()
 #------------------------------------
 # Functions
 #------------------------------------
-function(family_configure_example TARGET)
-  family_configure_common(${TARGET})
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
 
   # Board target
   add_board_target(board_${BOARD})
@@ -107,7 +107,7 @@ function(family_configure_example TARGET)
     )
 
   # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_${FAMILY_MCUS})
+  family_add_tinyusb(${TARGET} OPT_MCU_${FAMILY_MCUS} ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -121,16 +121,3 @@ function(family_configure_example TARGET)
   family_flash_stlink(${TARGET})
   family_flash_jlink(${TARGET})
 endfunction()
-
-
-function(family_configure_device_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_host_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_dual_usb_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index 5ab56e145..6f07bdd53 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -128,7 +128,9 @@
   #define TU_ATTR_SECTION(sec_name)     __attribute__ ((section(#sec_name)))
   #define TU_ATTR_PACKED                __attribute__ ((packed))
   #define TU_ATTR_WEAK                  __attribute__ ((weak))
-  #define TU_ATTR_ALWAYS_INLINE         __attribute__ ((always_inline))
+  #ifndef TU_ATTR_ALWAYS_INLINE // allow to override for debug
+    #define TU_ATTR_ALWAYS_INLINE       __attribute__ ((always_inline))
+  #endif
   #define TU_ATTR_DEPRECATED(mess)      __attribute__ ((deprecated(mess))) // warn if function with this attribute is used
   #define TU_ATTR_UNUSED                __attribute__ ((unused))           // Function/Variable is meant to be possibly unused
   #define TU_ATTR_USED                  __attribute__ ((used))             // Function/Variable is meant to be used
@@ -205,7 +207,9 @@
   #define TU_ATTR_SECTION(sec_name)     __attribute__ ((section(#sec_name)))
   #define TU_ATTR_PACKED                __attribute__ ((packed))
   #define TU_ATTR_WEAK                  __attribute__ ((weak))
-  #define TU_ATTR_ALWAYS_INLINE         __attribute__ ((always_inline))
+  #ifndef TU_ATTR_ALWAYS_INLINE // allow to override for debug
+    #define TU_ATTR_ALWAYS_INLINE         __attribute__ ((always_inline))
+  #endif
   #define TU_ATTR_DEPRECATED(mess)      __attribute__ ((deprecated(mess))) // warn if function with this attribute is used
   #define TU_ATTR_UNUSED                __attribute__ ((unused))           // Function/Variable is meant to be possibly unused
   #define TU_ATTR_USED                  __attribute__ ((used))             // Function/Variable is meant to be used
diff --git a/test/fuzz/device/cdc/CMakeLists.txt b/test/fuzz/device/cdc/CMakeLists.txt
index 8e4db9d29..c60f292b9 100644
--- a/test/fuzz/device/cdc/CMakeLists.txt
+++ b/test/fuzz/device/cdc/CMakeLists.txt
@@ -14,16 +14,16 @@ add_executable(${PROJECT})
 
 # Example source
 target_sources(${PROJECT} PUBLIC
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_disk.c
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
-        )
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_disk.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
+  )
 
 # Example include
 target_include_directories(${PROJECT} PUBLIC
-        ${CMAKE_CURRENT_SOURCE_DIR}/src
-        )
+  ${CMAKE_CURRENT_SOURCE_DIR}/src
+  )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/test/fuzz/device/msc/CMakeLists.txt b/test/fuzz/device/msc/CMakeLists.txt
index 8e4db9d29..8bff217cb 100644
--- a/test/fuzz/device/msc/CMakeLists.txt
+++ b/test/fuzz/device/msc/CMakeLists.txt
@@ -24,6 +24,6 @@ target_include_directories(${PROJECT} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)
diff --git a/test/fuzz/device/net/CMakeLists.txt b/test/fuzz/device/net/CMakeLists.txt
index 8e4db9d29..8bff217cb 100644
--- a/test/fuzz/device/net/CMakeLists.txt
+++ b/test/fuzz/device/net/CMakeLists.txt
@@ -24,6 +24,6 @@ target_include_directories(${PROJECT} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
-# Configure compilation flags and libraries for the example... see the corresponding function
-# in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_device_example(${PROJECT} noos)

From 98fb10a724a33b545990a8593f60b5f10f030f5d Mon Sep 17 00:00:00 2001
From: Devin Auclair <devinauclair@gmail.com>
Date: Wed, 28 Jun 2023 14:03:18 -0400
Subject: [PATCH 457/691] Fix minor spelling

---
 src/class/msc/msc.h | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/class/msc/msc.h b/src/class/msc/msc.h
index 7f25a29ba..bbfd35a43 100644
--- a/src/class/msc/msc.h
+++ b/src/class/msc/msc.h
@@ -53,7 +53,7 @@ enum {
 };
 
 /// \brief MassStorage Protocol.
-/// \details CBI only approved to use with full-speed floopy disk & should not used with highspeed or device other than floopy
+/// \details CBI only approved to use with full-speed floppy disk & should not used with highspeed or device other than floppy
 typedef enum
 {
   MSC_PROTOCOL_CBI              = 0 ,  ///< Control/Bulk/Interrupt protocol (with command completion interrupt)
@@ -97,7 +97,7 @@ typedef struct TU_ATTR_PACKED
 {
   uint32_t signature    ; ///< Signature that helps identify this data packet as a CSW. The signature field shall contain the value 53425355h (little endian), indicating CSW.
   uint32_t tag          ; ///< The device shall set this field to the value received in the dCBWTag of the associated CBW.
-  uint32_t data_residue ; ///< For Data-Out the device shall report in the dCSWDataResiduethe difference between the amount of data expected as stated in the dCBWDataTransferLength, and the actual amount of data processed by the device. For Data-In the device shall report in the dCSWDataResiduethe difference between the amount of data expected as stated in the dCBWDataTransferLengthand the actual amount of relevant data sent by the device
+  uint32_t data_residue ; ///< For Data-Out the device shall report in the dCSWDataResidue the difference between the amount of data expected as stated in the dCBWDataTransferLength, and the actual amount of data processed by the device. For Data-In the device shall report in the dCSWDataResiduethe difference between the amount of data expected as stated in the dCBWDataTransferLengthand the actual amount of relevant data sent by the device
   uint8_t  status       ; ///< indicates the success or failure of the command. Values from \ref msc_csw_status_t
 }msc_csw_t;
 
@@ -120,14 +120,14 @@ typedef enum
   SCSI_CMD_REQUEST_SENSE                = 0x03, ///< The SCSI Request Sense command is part of the SCSI computer protocol standard. This command is used to obtain sense data -- status/error information -- from a target device.
   SCSI_CMD_READ_FORMAT_CAPACITY         = 0x23, ///< The command allows the Host to request a list of the possible format capacities for an installed writable media. This command also has the capability to report the writable capacity for a media when it is installed
   SCSI_CMD_READ_10                      = 0x28, ///< The READ (10) command requests that the device server read the specified logical block(s) and transfer them to the data-in buffer.
-  SCSI_CMD_WRITE_10                     = 0x2A, ///< The WRITE (10) command requests thatthe device server transfer the specified logical block(s) from the data-out buffer and write them.
+  SCSI_CMD_WRITE_10                     = 0x2A, ///< The WRITE (10) command requests that the device server transfer the specified logical block(s) from the data-out buffer and write them.
 }scsi_cmd_type_t;
 
 /// SCSI Sense Key
 typedef enum
 {
   SCSI_SENSE_NONE            = 0x00, ///< no specific Sense Key. This would be the case for a successful command
-  SCSI_SENSE_RECOVERED_ERROR = 0x01, ///< ndicates the last command completed successfully with some recovery action performed by the disc drive.
+  SCSI_SENSE_RECOVERED_ERROR = 0x01, ///< Indicates the last command completed successfully with some recovery action performed by the disc drive.
   SCSI_SENSE_NOT_READY       = 0x02, ///< Indicates the logical unit addressed cannot be accessed.
   SCSI_SENSE_MEDIUM_ERROR    = 0x03, ///< Indicates the command terminated with a non-recovered error condition.
   SCSI_SENSE_HARDWARE_ERROR  = 0x04, ///< Indicates the disc drive detected a nonrecoverable hardware failure while performing the command or during a self test.
@@ -138,7 +138,7 @@ typedef enum
   SCSI_SENSE_ABORTED_COMMAND = 0x0b, ///< Indicates the disc drive aborted the command.
   SCSI_SENSE_EQUAL           = 0x0c, ///< Indicates a SEARCH DATA command has satisfied an equal comparison.
   SCSI_SENSE_VOLUME_OVERFLOW = 0x0d, ///< Indicates a buffered peripheral device has reached the end of medium partition and data remains in the buffer that has not been written to the medium.
-  SCSI_SENSE_MISCOMPARE      = 0x0e  ///< ndicates that the source data did not match the data read from the medium.
+  SCSI_SENSE_MISCOMPARE      = 0x0e  ///< Indicates that the source data did not match the data read from the medium.
 }scsi_sense_key_type_t;
 
 //--------------------------------------------------------------------+

From 11fba59319d81fb9502fbf399abb4fe27cf3fa29 Mon Sep 17 00:00:00 2001
From: Dave Nadler <drn@nadler.com>
Date: Wed, 28 Jun 2023 17:25:22 -0400
Subject: [PATCH 458/691] Name queues for easier FreeRTOS debugging with task-
 and queue-aware debuggers

---
 src/device/usbd.c        | 4 ++--
 src/host/usbh.c          | 4 ++--
 src/osal/osal_freertos.h | 5 +++--
 3 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/src/device/usbd.c b/src/device/usbd.c
index 44c2530ce..b6c679b22 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -279,7 +279,7 @@ tu_static uint8_t _usbd_rhport = RHPORT_INVALID;
 
 // Event queue
 // usbd_int_set() is used as mutex in OS NONE config
-OSAL_QUEUE_DEF(usbd_int_set, _usbd_qdef, CFG_TUD_TASK_QUEUE_SZ, dcd_event_t);
+OSAL_QUEUE_DEF(usbd_int_set, usbd_events, CFG_TUD_TASK_QUEUE_SZ, dcd_event_t);
 tu_static osal_queue_t _usbd_q;
 
 // Mutex for claiming endpoint
@@ -410,7 +410,7 @@ bool tud_init (uint8_t rhport)
 #endif
 
   // Init device queue & task
-  _usbd_q = osal_queue_create(&_usbd_qdef);
+  _usbd_q = osal_queue_create(&usbd_events);
   TU_ASSERT(_usbd_q);
 
   // Get application driver if available
diff --git a/src/host/usbh.c b/src/host/usbh.c
index f3e9d3858..987ff7a6e 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -219,7 +219,7 @@ static usbh_device_t _usbh_devices[TOTAL_DEVICES];
 
 // Event queue
 // usbh_int_set is used as mutex in OS NONE config
-OSAL_QUEUE_DEF(usbh_int_set, _usbh_qdef, CFG_TUH_TASK_QUEUE_SZ, hcd_event_t);
+OSAL_QUEUE_DEF(usbh_int_set, usbh_events, CFG_TUH_TASK_QUEUE_SZ, hcd_event_t);
 static osal_queue_t _usbh_q;
 
 CFG_TUH_MEM_SECTION CFG_TUH_MEM_ALIGN
@@ -330,7 +330,7 @@ bool tuh_init(uint8_t controller_id)
   TU_LOG_INT(USBH_DEBUG, sizeof(tu_edpt_stream_t));
 
   // Event queue
-  _usbh_q = osal_queue_create( &_usbh_qdef );
+  _usbh_q = osal_queue_create( &usbh_events );
   TU_ASSERT(_usbh_q != NULL);
 
 #if OSAL_MUTEX_REQUIRED
diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h
index 0b1b11589..e83277eb3 100644
--- a/src/osal/osal_freertos.h
+++ b/src/osal/osal_freertos.h
@@ -56,7 +56,7 @@ typedef SemaphoreHandle_t osal_mutex_t;
 // _int_set is not used with an RTOS
 #define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type) \
   static _type _name##_##buf[_depth];\
-  osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf };
+  osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf, .pQueueName = #_name };
 
 typedef struct
 {
@@ -66,6 +66,7 @@ typedef struct
 #if configSUPPORT_STATIC_ALLOCATION
   StaticQueue_t sq;
 #endif
+  const char* pQueueName;
 }osal_queue_def_t;
 
 typedef QueueHandle_t osal_queue_t;
@@ -176,7 +177,7 @@ TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_de
     q = xQueueCreate(qdef->depth, qdef->item_sz);
   #endif
   #if defined(configQUEUE_REGISTRY_SIZE) && (configQUEUE_REGISTRY_SIZE>0)
-    vQueueAddToRegistry(q, "tinyUSB");
+    vQueueAddToRegistry(q, qdef->pQueueName);
   #endif
   return q;
 }

From 6284f2d72287396a0df153a0a7bd192c4e3847a7 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 29 Jun 2023 18:58:33 +0700
Subject: [PATCH 459/691] add hcd_frame_number() for pio-usb host

---
 .gitmodules                                    | 0
 hw/bsp/rp2040/board.h                          | 4 +++-
 src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 2 +-
 tools/get_deps.py                              | 2 +-
 4 files changed, 5 insertions(+), 3 deletions(-)
 delete mode 100644 .gitmodules

diff --git a/.gitmodules b/.gitmodules
deleted file mode 100644
index e69de29bb..000000000
diff --git a/hw/bsp/rp2040/board.h b/hw/bsp/rp2040/board.h
index ccad00c4a..934e1c7ae 100644
--- a/hw/bsp/rp2040/board.h
+++ b/hw/bsp/rp2040/board.h
@@ -49,7 +49,10 @@
 #define UART_RX_PIN           PICO_DEFAULT_UART_RX_PIN
 #endif
 
+//--------------------------------------------------------------------+
 // PIO_USB
+// default to pin on Adafruit Feather rp2040 USB Host or Tester if defined
+//--------------------------------------------------------------------+
 
 // #define USE_ADAFRUIT_RP2040_TESTER
 #ifdef USE_ADAFRUIT_RP2040_TESTER
@@ -57,7 +60,6 @@
 #define PICO_DEFAULT_PIO_USB_VBUSEN_PIN   22
 #endif
 
-// following default to pin on Adafruit Feather rp2040 USB Host
 #ifndef PICO_DEFAULT_PIO_USB_DP_PIN
 #define PICO_DEFAULT_PIO_USB_DP_PIN       16
 #endif
diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
index 58b153ac3..264af2e7a 100644
--- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
+++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
@@ -105,7 +105,7 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
 uint32_t hcd_frame_number(uint8_t rhport)
 {
   (void) rhport;
-  return 0;
+  return pio_usb_host_get_frame_number();
 }
 
 void hcd_int_enable(uint8_t rhport)
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 34e2f30a3..9b89c5e4c 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -54,7 +54,7 @@ deps_optional = {
                             '950819b7de9b32f92c3edf396bc5ffb8d66e7009',
                             'kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx imxrt'],
     'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git',
-                                         'c3715ce94b6f6391856de56081d4d9b3e98fa93d',
+                                         '58879cfa0eca5725d8db6443ec17f8896a321042',
                                          'rp2040'],
     'hw/mcu/renesas/fsp': ['https://github.com/renesas/fsp.git',
                            '8dc14709f2a6518b43f71efad70d900b7718d9f1',

From f5d0510064bd2a0ffd040697de1fac707fa70069 Mon Sep 17 00:00:00 2001
From: Ha Thach <thach@tinyusb.org>
Date: Thu, 29 Jun 2023 22:57:58 +0700
Subject: [PATCH 460/691] Update build badge

---
 README.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README.rst b/README.rst
index 2c9119fef..78e8d87b0 100644
--- a/README.rst
+++ b/README.rst
@@ -138,7 +138,7 @@ Please make sure you understand all the license term for files you use
 in your project.
 
 
-.. |Build Status| image:: https://github.com/hathach/tinyusb/workflows/Build/badge.svg
+.. |Build Status| image:: https://github.com/hathach/tinyusb/actions/workflows/cmake_arm.yml/badge.svg
    :target: https://github.com/hathach/tinyusb/actions
 .. |Documentation Status| image:: https://readthedocs.org/projects/tinyusb/badge/?version=latest
    :target: https://docs.tinyusb.org/en/latest/?badge=latest

From 3cb4d738996e0856ab42654e421fd766652519bd Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 30 Jun 2023 14:52:04 +0700
Subject: [PATCH 461/691] clean up ra makefile

---
 hw/bsp/ra/boards/ra4m1_ek/board.mk |  9 +++++-
 hw/bsp/ra/boards/ra4m3_ek/board.mk |  9 +++++-
 hw/bsp/ra/family.mk                | 47 +++++++++++++-----------------
 tools/make/cpu/cortex-m0.mk        |  2 +-
 tools/make/cpu/cortex-m0plus.mk    |  2 +-
 tools/make/cpu/cortex-m3.mk        |  2 +-
 tools/make/cpu/cortex-m33.mk       |  2 +-
 tools/make/cpu/cortex-m4.mk        |  2 +-
 tools/make/cpu/cortex-m7.mk        |  2 +-
 9 files changed, 43 insertions(+), 34 deletions(-)

diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.mk b/hw/bsp/ra/boards/ra4m1_ek/board.mk
index 5c193513d..eae68f87d 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/board.mk
+++ b/hw/bsp/ra/boards/ra4m1_ek/board.mk
@@ -1,8 +1,15 @@
 CPU_CORE = cortex-m4
+MCU_VARIANT = ra4m1
 
-FSP_MCU_DIR = hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/ra4m1
 FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m1_ek
 
+SRC_C += \
+	$(FSP_BOARD_DIR)/board_init.c \
+	$(FSP_BOARD_DIR)/board_leds.c \
+
+INC += \
+	$(TOP)/$(FSP_BOARD_DIR)
+
 # All source paths should be relative to the top level.
 LD_FILE = $(BOARD_PATH)/ra4m1_ek.ld
 
diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.mk b/hw/bsp/ra/boards/ra4m3_ek/board.mk
index 264f29c1a..4ca1d365e 100644
--- a/hw/bsp/ra/boards/ra4m3_ek/board.mk
+++ b/hw/bsp/ra/boards/ra4m3_ek/board.mk
@@ -1,8 +1,15 @@
 CPU_CORE = cortex-m33
+MCU_VARIANT = ra4m3
 
-FSP_MCU_DIR = hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/ra4m3
 FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m3_ek
 
+SRC_C += \
+	$(FSP_BOARD_DIR)/board_init.c \
+	$(FSP_BOARD_DIR)/board_leds.c \
+
+INC += \
+	$(TOP)/$(FSP_BOARD_DIR)
+
 # All source paths should be relative to the top level.
 LD_FILE = $(BOARD_PATH)/ra4m3_ek.ld
 
diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk
index b65c95191..103d3cfa6 100644
--- a/hw/bsp/ra/family.mk
+++ b/hw/bsp/ra/family.mk
@@ -1,5 +1,6 @@
 DEPS_SUBMODULES += hw/mcu/renesas/fsp lib/CMSIS_5
 
+FSP_RA = hw/mcu/renesas/fsp/ra/fsp
 include $(TOP)/$(BOARD_PATH)/board.mk
 
 CFLAGS += \
@@ -10,44 +11,38 @@ CFLAGS += \
 	-Wno-error=cast-qual \
 	-Wno-error=unused-but-set-variable \
 	-Wno-error=unused-variable \
-	-mthumb \
 	-nostdlib \
 	-nostartfiles \
-	-ffunction-sections \
-	-fdata-sections \
 	-ffreestanding
 
 SRC_C += \
 	src/portable/renesas/rusb2/dcd_rusb2.c \
 	src/portable/renesas/rusb2/hcd_rusb2.c \
-	hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c \
-	hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c \
-	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_clocks.c \
-	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_common.c \
-	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_delay.c \
-	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_group_irq.c \
-	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_guard.c \
-	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_io.c \
-	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_irq.c \
-	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_register_protection.c \
-	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c \
-	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_sbrk.c \
-	hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/all/bsp_security.c \
-	hw/mcu/renesas/fsp/ra/fsp/src/r_ioport/r_ioport.c \
-	$(FSP_BOARD_DIR)/board_init.c \
-	$(FSP_BOARD_DIR)/board_leds.c
+	$(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Source/startup.c \
+	$(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Source/system.c \
+	$(FSP_RA)/src/bsp/mcu/all/bsp_clocks.c \
+	$(FSP_RA)/src/bsp/mcu/all/bsp_common.c \
+	$(FSP_RA)/src/bsp/mcu/all/bsp_delay.c \
+	$(FSP_RA)/src/bsp/mcu/all/bsp_group_irq.c \
+	$(FSP_RA)/src/bsp/mcu/all/bsp_guard.c \
+	$(FSP_RA)/src/bsp/mcu/all/bsp_io.c \
+	$(FSP_RA)/src/bsp/mcu/all/bsp_irq.c \
+	$(FSP_RA)/src/bsp/mcu/all/bsp_register_protection.c \
+	$(FSP_RA)/src/bsp/mcu/all/bsp_rom_registers.c \
+	$(FSP_RA)/src/bsp/mcu/all/bsp_sbrk.c \
+	$(FSP_RA)/src/bsp/mcu/all/bsp_security.c \
+	$(FSP_RA)/src/r_ioport/r_ioport.c \
 
 INC += \
 	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
-	$(TOP)/hw/mcu/renesas/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include \
+	$(TOP)/$(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Include \
 	$(TOP)/$(BOARD_PATH) \
 	$(TOP)/$(BOARD_PATH)/fsp_cfg \
-	$(TOP)/hw/mcu/renesas/fsp/ra/fsp/inc \
-	$(TOP)/hw/mcu/renesas/fsp/ra/fsp/inc/api \
-	$(TOP)/hw/mcu/renesas/fsp/ra/fsp/inc/instances \
-	$(TOP)/$(FSP_MCU_DIR) \
-	$(TOP)/$(FSP_BOARD_DIR)
+	$(TOP)/$(FSP_RA)/inc \
+	$(TOP)/$(FSP_RA)/inc/api \
+	$(TOP)/$(FSP_RA)/inc/instances \
+	$(TOP)/$(FSP_RA)/src/bsp/mcu/$(MCU_VARIANT) \
 
 # For freeRTOS port source
 # hack to use the port provided by renesas
-FREERTOS_PORTABLE_SRC = hw/mcu/renesas/fsp/ra/fsp/src/rm_freertos_port
+FREERTOS_PORTABLE_SRC = $(FSP_RA)/src/rm_freertos_port
diff --git a/tools/make/cpu/cortex-m0.mk b/tools/make/cpu/cortex-m0.mk
index c264802c8..feb0f395b 100644
--- a/tools/make/cpu/cortex-m0.mk
+++ b/tools/make/cpu/cortex-m0.mk
@@ -11,4 +11,4 @@ else ifeq ($(TOOLCHAIN),iar)
 endif
 
 # For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
+FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM0
diff --git a/tools/make/cpu/cortex-m0plus.mk b/tools/make/cpu/cortex-m0plus.mk
index 626f7156e..b416b7a4a 100644
--- a/tools/make/cpu/cortex-m0plus.mk
+++ b/tools/make/cpu/cortex-m0plus.mk
@@ -11,4 +11,4 @@ else ifeq ($(TOOLCHAIN),iar)
 endif
 
 # For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
+FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM0
diff --git a/tools/make/cpu/cortex-m3.mk b/tools/make/cpu/cortex-m3.mk
index c81cbace6..7a34b9e04 100644
--- a/tools/make/cpu/cortex-m3.mk
+++ b/tools/make/cpu/cortex-m3.mk
@@ -14,4 +14,4 @@ else ifeq ($(TOOLCHAIN),iar)
 endif
 
 # For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
+FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM3
diff --git a/tools/make/cpu/cortex-m33.mk b/tools/make/cpu/cortex-m33.mk
index e53f5c2b1..fe5b7b380 100644
--- a/tools/make/cpu/cortex-m33.mk
+++ b/tools/make/cpu/cortex-m33.mk
@@ -16,4 +16,4 @@ else ifeq ($(TOOLCHAIN),iar)
 
 endif
 
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure
+FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure
diff --git a/tools/make/cpu/cortex-m4.mk b/tools/make/cpu/cortex-m4.mk
index fabe05632..d8776b5d8 100644
--- a/tools/make/cpu/cortex-m4.mk
+++ b/tools/make/cpu/cortex-m4.mk
@@ -10,4 +10,4 @@ else ifeq ($(TOOLCHAIN),iar)
   ASFLAGS += --cpu cortex-m4 --fpu VFPv4
 endif
 
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
+FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
diff --git a/tools/make/cpu/cortex-m7.mk b/tools/make/cpu/cortex-m7.mk
index 0e53cbe9c..0e3461787 100644
--- a/tools/make/cpu/cortex-m7.mk
+++ b/tools/make/cpu/cortex-m7.mk
@@ -16,4 +16,4 @@ else ifeq ($(TOOLCHAIN),iar)
 
 endif
 
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1
+FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM7/r0p1

From 48738df489ac583ea8a999d15222f1a570f735f7 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 30 Jun 2023 16:05:59 +0700
Subject: [PATCH 462/691] move LTO checked to family_support.cmake

---
 hw/bsp/family_support.cmake    | 7 +++++++
 hw/bsp/imxrt/family.cmake      | 7 -------
 hw/bsp/kinetis_kl/family.cmake | 7 -------
 hw/bsp/lpc18/family.cmake      | 7 -------
 hw/bsp/mcx/family.cmake        | 7 -------
 hw/bsp/nrf/family.cmake        | 8 --------
 hw/bsp/stm32f0/family.cmake    | 7 -------
 hw/bsp/stm32f1/family.cmake    | 7 -------
 hw/bsp/stm32f7/family.cmake    | 7 -------
 hw/bsp/stm32g0/family.cmake    | 7 -------
 hw/bsp/stm32g4/family.cmake    | 7 -------
 hw/bsp/stm32h7/family.cmake    | 7 -------
 hw/bsp/stm32l4/family.cmake    | 7 -------
 13 files changed, 7 insertions(+), 85 deletions(-)

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 781c67bf7..b2e61a824 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -36,6 +36,13 @@ if (NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake)
   message(FATAL_ERROR "Family '${FAMILY}' is not known/supported")
 endif()
 
+# enable LTO if supported
+include(CheckIPOSupported)
+check_ipo_supported(RESULT IPO_SUPPORTED)
+if (IPO_SUPPORTED)
+  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+endif ()
+
 set(WARNING_FLAGS_GNU
   -Wall
   -Wextra
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index aaedfc9d6..a8841f8ce 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -16,13 +16,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS MIMXRT1XXX CACHE INTERNAL "")
 
-# enable LTO if supported
-include(CheckIPOSupported)
-check_ipo_supported(RESULT IPO_SUPPORTED)
-if (IPO_SUPPORTED)
-  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
-endif ()
-
 
 #------------------------------------
 # BOARD_TARGET
diff --git a/hw/bsp/kinetis_kl/family.cmake b/hw/bsp/kinetis_kl/family.cmake
index 4df3d1ed1..793ef1783 100644
--- a/hw/bsp/kinetis_kl/family.cmake
+++ b/hw/bsp/kinetis_kl/family.cmake
@@ -16,13 +16,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS KINETIS_KL CACHE INTERNAL "")
 
-# enable LTO if supported
-include(CheckIPOSupported)
-check_ipo_supported(RESULT IPO_SUPPORTED)
-if (IPO_SUPPORTED)
-  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
-endif ()
-
 
 #------------------------------------
 # BOARD_TARGET
diff --git a/hw/bsp/lpc18/family.cmake b/hw/bsp/lpc18/family.cmake
index da71a0e5d..74a794bde 100644
--- a/hw/bsp/lpc18/family.cmake
+++ b/hw/bsp/lpc18/family.cmake
@@ -15,13 +15,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS LPC18XX CACHE INTERNAL "")
 
-# enable LTO if supported
-include(CheckIPOSupported)
-check_ipo_supported(RESULT IPO_SUPPORTED)
-if (IPO_SUPPORTED)
-  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
-endif ()
-
 
 #------------------------------------
 # BOARD_TARGET
diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake
index f548ac4f3..b3a4a846e 100644
--- a/hw/bsp/mcx/family.cmake
+++ b/hw/bsp/mcx/family.cmake
@@ -16,13 +16,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS MCXN9 CACHE INTERNAL "")
 
-# enable LTO if supported
-include(CheckIPOSupported)
-check_ipo_supported(RESULT IPO_SUPPORTED)
-if (IPO_SUPPORTED)
-  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
-endif ()
-
 
 #------------------------------------
 # BOARD_TARGET
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 30fd41d7b..2b13249f4 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -23,12 +23,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS NRF5X CACHE INTERNAL "")
 
-# enable LTO if supported
-include(CheckIPOSupported)
-check_ipo_supported(RESULT IPO_SUPPORTED)
-if (IPO_SUPPORTED)
-  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
-endif ()
 
 #------------------------------------
 # BOARD_TARGET
@@ -124,8 +118,6 @@ function(family_configure_example TARGET RTOS)
     )
   target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 
-
-
   # Link dependencies
   target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
 
diff --git a/hw/bsp/stm32f0/family.cmake b/hw/bsp/stm32f0/family.cmake
index 73f43de82..e0fc705f8 100644
--- a/hw/bsp/stm32f0/family.cmake
+++ b/hw/bsp/stm32f0/family.cmake
@@ -20,13 +20,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS STM32F0 CACHE INTERNAL "")
 
-# enable LTO if supported
-include(CheckIPOSupported)
-check_ipo_supported(RESULT IPO_SUPPORTED)
-if (IPO_SUPPORTED)
-  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
-endif ()
-
 
 #------------------------------------
 # BOARD_TARGET
diff --git a/hw/bsp/stm32f1/family.cmake b/hw/bsp/stm32f1/family.cmake
index efe41bc1b..53af35862 100644
--- a/hw/bsp/stm32f1/family.cmake
+++ b/hw/bsp/stm32f1/family.cmake
@@ -20,13 +20,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS STM32F1 CACHE INTERNAL "")
 
-# enable LTO if supported
-include(CheckIPOSupported)
-check_ipo_supported(RESULT IPO_SUPPORTED)
-if (IPO_SUPPORTED)
-  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
-endif ()
-
 
 #------------------------------------
 # BOARD_TARGET
diff --git a/hw/bsp/stm32f7/family.cmake b/hw/bsp/stm32f7/family.cmake
index 30bde9b0d..48dd9c7ca 100644
--- a/hw/bsp/stm32f7/family.cmake
+++ b/hw/bsp/stm32f7/family.cmake
@@ -20,13 +20,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS STM32F7 CACHE INTERNAL "")
 
-# enable LTO if supported
-include(CheckIPOSupported)
-check_ipo_supported(RESULT IPO_SUPPORTED)
-if (IPO_SUPPORTED)
-  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
-endif ()
-
 
 #------------------------------------
 # BOARD_TARGET
diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake
index f7b665090..b787363ed 100644
--- a/hw/bsp/stm32g0/family.cmake
+++ b/hw/bsp/stm32g0/family.cmake
@@ -20,13 +20,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS STM32G0 CACHE INTERNAL "")
 
-# enable LTO if supported
-include(CheckIPOSupported)
-check_ipo_supported(RESULT IPO_SUPPORTED)
-if (IPO_SUPPORTED)
-  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
-endif ()
-
 
 #------------------------------------
 # BOARD_TARGET
diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake
index 3c7633d64..675a96c74 100644
--- a/hw/bsp/stm32g4/family.cmake
+++ b/hw/bsp/stm32g4/family.cmake
@@ -20,13 +20,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS STM32G4 CACHE INTERNAL "")
 
-# enable LTO if supported
-include(CheckIPOSupported)
-check_ipo_supported(RESULT IPO_SUPPORTED)
-if (IPO_SUPPORTED)
-  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
-endif ()
-
 
 #------------------------------------
 # BOARD_TARGET
diff --git a/hw/bsp/stm32h7/family.cmake b/hw/bsp/stm32h7/family.cmake
index 1a8c4354c..c08857a50 100644
--- a/hw/bsp/stm32h7/family.cmake
+++ b/hw/bsp/stm32h7/family.cmake
@@ -20,13 +20,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS STM32H7 CACHE INTERNAL "")
 
-# enable LTO if supported
-include(CheckIPOSupported)
-check_ipo_supported(RESULT IPO_SUPPORTED)
-if (IPO_SUPPORTED)
-  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
-endif ()
-
 
 #------------------------------------
 # BOARD_TARGET
diff --git a/hw/bsp/stm32l4/family.cmake b/hw/bsp/stm32l4/family.cmake
index da017cdde..87f87004b 100644
--- a/hw/bsp/stm32l4/family.cmake
+++ b/hw/bsp/stm32l4/family.cmake
@@ -20,13 +20,6 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS STM32L4 CACHE INTERNAL "")
 
-# enable LTO if supported
-include(CheckIPOSupported)
-check_ipo_supported(RESULT IPO_SUPPORTED)
-if (IPO_SUPPORTED)
-  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
-endif ()
-
 
 #------------------------------------
 # BOARD_TARGET

From 14d69e46be7b875fef534d70e619764df63f023d Mon Sep 17 00:00:00 2001
From: mndza <diego.hdmp@gmail.com>
Date: Tue, 27 Jun 2023 12:05:59 +0200
Subject: [PATCH 463/691] Update support for Cynthion boards

- Rename LUNA to Cynthion
- Add support for newer revisions (>=0.6)
- Bootloader (saturn-v) default size is now 2K
---
 docs/reference/supported.rst                  |  2 +-
 .../boards/{luna_d11 => cynthion_d11}/board.h |  6 +++++
 hw/bsp/samd11/boards/cynthion_d11/board.mk    | 22 +++++++++++++++++++
 .../samd11d14am_flash.ld                      |  2 +-
 hw/bsp/samd11/boards/luna_d11/board.mk        | 11 ----------
 hw/bsp/samd11/boards/samd11_xplained/board.h  |  1 +
 hw/bsp/samd11/family.c                        |  2 +-
 .../boards/{luna_d21 => cynthion_d21}/board.h |  0
 .../{luna_d21 => cynthion_d21}/board.mk       |  6 +++++
 .../samd21g18a_flash.ld                       |  2 +-
 10 files changed, 39 insertions(+), 15 deletions(-)
 rename hw/bsp/samd11/boards/{luna_d11 => cynthion_d11}/board.h (87%)
 create mode 100644 hw/bsp/samd11/boards/cynthion_d11/board.mk
 rename hw/bsp/samd11/boards/{luna_d11 => cynthion_d11}/samd11d14am_flash.ld (97%)
 delete mode 100644 hw/bsp/samd11/boards/luna_d11/board.mk
 rename hw/bsp/samd21/boards/{luna_d21 => cynthion_d21}/board.h (100%)
 rename hw/bsp/samd21/boards/{luna_d21 => cynthion_d21}/board.mk (60%)
 rename hw/bsp/samd21/boards/{luna_d21 => cynthion_d21}/samd21g18a_flash.ld (97%)

diff --git a/docs/reference/supported.rst b/docs/reference/supported.rst
index a5d055893..aed64782c 100644
--- a/docs/reference/supported.rst
+++ b/docs/reference/supported.rst
@@ -175,7 +175,7 @@ SAMD11 & SAMD21
 -  `Adafruit Feather M0 Express <https://www.adafruit.com/product/3403>`__
 -  `Adafruit ItsyBitsy M0 Express <https://www.adafruit.com/product/3727>`__
 -  `Adafruit Metro M0 Express <https://www.adafruit.com/product/3505>`__
--  `Great Scott Gadgets LUNA <https://greatscottgadgets.com/luna/>`__
+-  `Great Scott Gadgets Cynthion <https://greatscottgadgets.com/cynthion/>`__
 -  `Microchip SAMD11 Xplained Pro <https://www.microchip.com/developmenttools/ProductDetails/atsamd11-xpro>`__
 -  `Microchip SAMD21 Xplained Pro <https://www.microchip.com/DevelopmentTools/ProductDetails/ATSAMD21-XPRO>`__
 -  `Seeeduino Xiao <https://www.seeedstudio.com/Seeeduino-XIAO-Arduino-Microcontroller-SAMD21-Cortex-M0+-p-4426.html>`__
diff --git a/hw/bsp/samd11/boards/luna_d11/board.h b/hw/bsp/samd11/boards/cynthion_d11/board.h
similarity index 87%
rename from hw/bsp/samd11/boards/luna_d11/board.h
rename to hw/bsp/samd11/boards/cynthion_d11/board.h
index 1bda92934..b13c8eeea 100644
--- a/hw/bsp/samd11/boards/luna_d11/board.h
+++ b/hw/bsp/samd11/boards/cynthion_d11/board.h
@@ -36,7 +36,13 @@
 #define LED_STATE_ON          0
 
 // Button
+#if ((_BOARD_REVISION_MAJOR_ == 0) && (_BOARD_REVISION_MINOR_ < 6))
 #define BUTTON_PIN            PIN_PA16 // pin PB22
+#define BUTTON_PULL_MODE      GPIO_PULL_UP
+#else
+#define BUTTON_PIN            PIN_PA02
+#define BUTTON_PULL_MODE      GPIO_PULL_OFF
+#endif
 #define BUTTON_STATE_ACTIVE   0
 
 #ifdef __cplusplus
diff --git a/hw/bsp/samd11/boards/cynthion_d11/board.mk b/hw/bsp/samd11/boards/cynthion_d11/board.mk
new file mode 100644
index 000000000..d36c91970
--- /dev/null
+++ b/hw/bsp/samd11/boards/cynthion_d11/board.mk
@@ -0,0 +1,22 @@
+BOARD_REVISION_MAJOR ?= 1
+BOARD_REVISION_MINOR ?= 0
+
+CFLAGS += -D__SAMD11D14AM__ \
+	-D_BOARD_REVISION_MAJOR_=$(BOARD_REVISION_MAJOR) \
+	-D_BOARD_REVISION_MINOR_=$(BOARD_REVISION_MINOR)
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/samd11d14am_flash.ld
+
+# Default bootloader size is now 2K, allow to specify other
+ifeq ($(BOOTLOADER_SIZE), )
+	BOOTLOADER_SIZE := 0x800
+endif
+LDFLAGS += -Wl,--defsym=BOOTLOADER_SIZE=$(BOOTLOADER_SIZE)
+
+# For flash-jlink target
+JLINK_DEVICE = ATSAMD11D14
+
+# flash using dfu-util
+flash: $(BUILD)/$(PROJECT).bin
+	dfu-util -a 0 -d 1d50:615c -D $< || dfu-util -a 0 -d 16d0:05a5 -D $<
diff --git a/hw/bsp/samd11/boards/luna_d11/samd11d14am_flash.ld b/hw/bsp/samd11/boards/cynthion_d11/samd11d14am_flash.ld
similarity index 97%
rename from hw/bsp/samd11/boards/luna_d11/samd11d14am_flash.ld
rename to hw/bsp/samd11/boards/cynthion_d11/samd11d14am_flash.ld
index cb633c195..f175e6504 100644
--- a/hw/bsp/samd11/boards/luna_d11/samd11d14am_flash.ld
+++ b/hw/bsp/samd11/boards/cynthion_d11/samd11d14am_flash.ld
@@ -35,7 +35,7 @@ SEARCH_DIR(.)
 /* Memory Spaces Definitions */
 MEMORY
 {
-  rom      (rx)  : ORIGIN = 0x00000000 + 4K, LENGTH = 0x00004000 - 4K
+  rom      (rx)  : ORIGIN = 0x00000000 + BOOTLOADER_SIZE, LENGTH = 0x00004000 - BOOTLOADER_SIZE
   ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00001000
 }
 
diff --git a/hw/bsp/samd11/boards/luna_d11/board.mk b/hw/bsp/samd11/boards/luna_d11/board.mk
deleted file mode 100644
index ad9cfb25d..000000000
--- a/hw/bsp/samd11/boards/luna_d11/board.mk
+++ /dev/null
@@ -1,11 +0,0 @@
-CFLAGS += -D__SAMD11D14AM__
-
-# All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/samd11d14am_flash.ld
-
-# For flash-jlink target
-JLINK_DEVICE = ATSAMD11D14
-
-# flash using dfu-util
-flash: $(BUILD)/$(PROJECT).bin
-	dfu-util -a 0 -d 1d50:615c -D $< || dfu-util -a 0 -d 16d0:05a5 -D $<
diff --git a/hw/bsp/samd11/boards/samd11_xplained/board.h b/hw/bsp/samd11/boards/samd11_xplained/board.h
index cfeac673c..2bbec4958 100644
--- a/hw/bsp/samd11/boards/samd11_xplained/board.h
+++ b/hw/bsp/samd11/boards/samd11_xplained/board.h
@@ -38,6 +38,7 @@
 // Button
 #define BUTTON_PIN            PIN_PA14 // pin PB22
 #define BUTTON_STATE_ACTIVE   0
+#define BUTTON_PULL_MODE      GPIO_PULL_UP
 
 #ifdef __cplusplus
  }
diff --git a/hw/bsp/samd11/family.c b/hw/bsp/samd11/family.c
index 8d9633971..e232761cc 100644
--- a/hw/bsp/samd11/family.c
+++ b/hw/bsp/samd11/family.c
@@ -78,7 +78,7 @@ void board_init(void)
 
   // Button init
   gpio_set_pin_direction(BUTTON_PIN, GPIO_DIRECTION_IN);
-  gpio_set_pin_pull_mode(BUTTON_PIN, GPIO_PULL_UP);
+  gpio_set_pin_pull_mode(BUTTON_PIN, BUTTON_PULL_MODE);
 
   /* USB Clock init
    * The USB module requires a GCLK_USB of 48 MHz ~ 0.25% clock
diff --git a/hw/bsp/samd21/boards/luna_d21/board.h b/hw/bsp/samd21/boards/cynthion_d21/board.h
similarity index 100%
rename from hw/bsp/samd21/boards/luna_d21/board.h
rename to hw/bsp/samd21/boards/cynthion_d21/board.h
diff --git a/hw/bsp/samd21/boards/luna_d21/board.mk b/hw/bsp/samd21/boards/cynthion_d21/board.mk
similarity index 60%
rename from hw/bsp/samd21/boards/luna_d21/board.mk
rename to hw/bsp/samd21/boards/cynthion_d21/board.mk
index 508a72b1f..52c9d60cb 100644
--- a/hw/bsp/samd21/boards/luna_d21/board.mk
+++ b/hw/bsp/samd21/boards/cynthion_d21/board.mk
@@ -2,6 +2,12 @@ CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
 
 LD_FILE = $(BOARD_PATH)/samd21g18a_flash.ld
 
+# Default bootloader size is now 2K, allow to specify other
+ifeq ($(BOOTLOADER_SIZE), )
+	BOOTLOADER_SIZE := 0x800
+endif
+LDFLAGS += -Wl,--defsym=BOOTLOADER_SIZE=$(BOOTLOADER_SIZE)
+
 # For flash-jlink target
 JLINK_DEVICE = ATSAMD21G18
 
diff --git a/hw/bsp/samd21/boards/luna_d21/samd21g18a_flash.ld b/hw/bsp/samd21/boards/cynthion_d21/samd21g18a_flash.ld
similarity index 97%
rename from hw/bsp/samd21/boards/luna_d21/samd21g18a_flash.ld
rename to hw/bsp/samd21/boards/cynthion_d21/samd21g18a_flash.ld
index 158593036..ecb6b8523 100644
--- a/hw/bsp/samd21/boards/luna_d21/samd21g18a_flash.ld
+++ b/hw/bsp/samd21/boards/cynthion_d21/samd21g18a_flash.ld
@@ -35,7 +35,7 @@ SEARCH_DIR(.)
 /* Memory Spaces Definitions */
 MEMORY
 {
-  rom      (rx)  : ORIGIN = 0x00000000 + 4K, LENGTH = 0x00040000 - 4K
+  rom      (rx)  : ORIGIN = 0x00000000 + BOOTLOADER_SIZE, LENGTH = 0x00040000 - BOOTLOADER_SIZE
   ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
 }
 

From 99e75e6a8a0de9903e574a51d6ce8057a1e3e73f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 1 Jul 2023 12:40:56 +0700
Subject: [PATCH 464/691] rework ra build

---
 .github/workflows/cmake_arm.yml               |   1 +
 hw/bsp/ra/boards/ra4m1_ek/board.cmake         |  15 ++
 hw/bsp/ra/boards/ra4m1_ek/board.h             |  53 ++++
 hw/bsp/ra/boards/ra4m1_ek/board.mk            |   7 -
 hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h   |   6 +-
 .../ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h     |   5 +
 hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld         |   1 +
 hw/bsp/ra/boards/ra4m3_ek/board.cmake         |  15 ++
 hw/bsp/ra/boards/ra4m3_ek/board.h             |  52 ++++
 hw/bsp/ra/boards/ra4m3_ek/board.mk            |   7 -
 hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_cfg.h   |   4 +-
 hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c          | 236 ------------------
 hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld         |   1 +
 .../{boards/ra4m1_ek/ra4m1_ek.c => family.c}  |  43 ++--
 hw/bsp/ra/family.cmake                        | 114 +++++++++
 hw/bsp/ra/family.mk                           |   2 +-
 src/portable/renesas/rusb2/rusb2_ra.h         |  12 +
 17 files changed, 299 insertions(+), 275 deletions(-)
 create mode 100644 hw/bsp/ra/boards/ra4m1_ek/board.cmake
 create mode 100644 hw/bsp/ra/boards/ra4m1_ek/board.h
 create mode 100644 hw/bsp/ra/boards/ra4m3_ek/board.cmake
 create mode 100644 hw/bsp/ra/boards/ra4m3_ek/board.h
 delete mode 100644 hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c
 rename hw/bsp/ra/{boards/ra4m1_ek/ra4m1_ek.c => family.c} (83%)
 create mode 100644 hw/bsp/ra/family.cmake

diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index 0ce63281e..4d8cd5591 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -38,6 +38,7 @@ jobs:
           - 'lpc18'
           - 'lpc55'
           - 'mcx'
+          - 'ra'
           - 'rp2040'
           - 'stm32f0'
           - 'stm32f1'
diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.cmake b/hw/bsp/ra/boards/ra4m1_ek/board.cmake
new file mode 100644
index 000000000..37c39061d
--- /dev/null
+++ b/hw/bsp/ra/boards/ra4m1_ek/board.cmake
@@ -0,0 +1,15 @@
+set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
+set(MCU_VARIANT ra4m1)
+
+set(JLINK_DEVICE R7FA4M1AB)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/ra4m1_ek.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    )
+  target_sources(${TARGET} PRIVATE
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    )
+endfunction()
diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.h b/hw/bsp/ra/boards/ra4m1_ek/board.h
new file mode 100644
index 000000000..383ab7399
--- /dev/null
+++ b/hw/bsp/ra/boards/ra4m1_ek/board.h
@@ -0,0 +1,53 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LED1 (BSP_IO_PORT_01_PIN_06)
+#define LED_STATE_ON          1
+
+#define SW1  (BSP_IO_PORT_01_PIN_05)
+#define BUTTON_STATE_ACTIVE   0
+
+const ioport_pin_cfg_t board_pin_cfg[] = {
+    { .pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW) },
+    { .pin = SW1 , .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT) },
+
+    { .pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) },
+    { .pin = BSP_IO_PORT_09_PIN_14, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) },
+    { .pin = BSP_IO_PORT_09_PIN_15, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) },
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.mk b/hw/bsp/ra/boards/ra4m1_ek/board.mk
index eae68f87d..9b0fafb28 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/board.mk
+++ b/hw/bsp/ra/boards/ra4m1_ek/board.mk
@@ -3,13 +3,6 @@ MCU_VARIANT = ra4m1
 
 FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m1_ek
 
-SRC_C += \
-	$(FSP_BOARD_DIR)/board_init.c \
-	$(FSP_BOARD_DIR)/board_leds.c \
-
-INC += \
-	$(TOP)/$(FSP_BOARD_DIR)
-
 # All source paths should be relative to the top level.
 LD_FILE = $(BOARD_PATH)/ra4m1_ek.ld
 
diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h
index b38a79b40..b337e49f2 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h
+++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h
@@ -2,7 +2,6 @@
 #ifndef BSP_CFG_H_
 #define BSP_CFG_H_
 
-#include "board.h"
 #include "bsp_clock_cfg.h"
 #include "bsp_mcu_family_cfg.h"
 
@@ -32,4 +31,9 @@
 #define BSP_CLOCK_CFG_SUBCLOCK_POPULATED	(1)
 #define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000
 
+#define BSP_FEATURE_TFU_SUPPORTED 0
+
+// for SystemInit()
+void bsp_init(void * p_args);
+
 #endif /* BSP_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h
index 3bde2db0d..4e080023e 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h
+++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h
@@ -25,6 +25,11 @@
 #define BSP_CORTEX_VECTOR_TABLE_ENTRIES    (16U)
 #define BSP_VECTOR_TABLE_MAX_ENTRIES       (48U)
 
+#define BSP_TZ_SECURE_BUILD    (0)
+#define BSP_TZ_NONSECURE_BUILD (0)
+
+#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK 0
+
 #define OFS_SEQ1 0xA001A001 | (1 << 1) | (3 << 2)
 #define OFS_SEQ2 (15 << 4) | (3 << 8) | (3 << 10)
 #define OFS_SEQ3 (1 << 12) | (1 << 14) | (1 << 17)
diff --git a/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld b/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld
index 8ddaa0a97..63c1d33aa 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld
+++ b/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld
@@ -553,6 +553,7 @@ SECTIONS
     {
         . = ALIGN(8);
         __HeapBase = .;
+        PROVIDE(end = .);
         /* Place the STD heap here. */
         KEEP(*(.heap))
         __HeapLimit = .;
diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.cmake b/hw/bsp/ra/boards/ra4m3_ek/board.cmake
new file mode 100644
index 000000000..241b659a0
--- /dev/null
+++ b/hw/bsp/ra/boards/ra4m3_ek/board.cmake
@@ -0,0 +1,15 @@
+set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
+set(MCU_VARIANT ra4m3)
+
+set(JLINK_DEVICE R7FA4M3AF)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/ra4m3_ek.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    )
+  target_sources(${TARGET} PRIVATE
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    )
+endfunction()
diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.h b/hw/bsp/ra/boards/ra4m3_ek/board.h
new file mode 100644
index 000000000..e41302f90
--- /dev/null
+++ b/hw/bsp/ra/boards/ra4m3_ek/board.h
@@ -0,0 +1,52 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LED1 (BSP_IO_PORT_04_PIN_15)
+#define LED_STATE_ON          1
+
+#define SW1  (BSP_IO_PORT_00_PIN_05)
+#define BUTTON_STATE_ACTIVE   0
+
+const ioport_pin_cfg_t board_pin_cfg[] = {
+  {.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
+  {.pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
+  {.pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
+  {.pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
+  {.pin = SW1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)},
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.mk b/hw/bsp/ra/boards/ra4m3_ek/board.mk
index 4ca1d365e..266de7c0d 100644
--- a/hw/bsp/ra/boards/ra4m3_ek/board.mk
+++ b/hw/bsp/ra/boards/ra4m3_ek/board.mk
@@ -3,13 +3,6 @@ MCU_VARIANT = ra4m3
 
 FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m3_ek
 
-SRC_C += \
-	$(FSP_BOARD_DIR)/board_init.c \
-	$(FSP_BOARD_DIR)/board_leds.c \
-
-INC += \
-	$(TOP)/$(FSP_BOARD_DIR)
-
 # All source paths should be relative to the top level.
 LD_FILE = $(BOARD_PATH)/ra4m3_ek.ld
 
diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_cfg.h
index a84d81e8d..a9cb8210b 100755
--- a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_cfg.h
+++ b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_cfg.h
@@ -2,7 +2,6 @@
 #ifndef BSP_CFG_H_
 #define BSP_CFG_H_
 
-#include "board.h"
 #include "bsp_clock_cfg.h"
 #include "bsp_mcu_family_cfg.h"
 
@@ -32,4 +31,7 @@
 #define BSP_CLOCK_CFG_SUBCLOCK_POPULATED	(1)
 #define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000
 
+// for SystemInit()
+void bsp_init(void * p_args);
+
 #endif /* BSP_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c b/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c
deleted file mode 100644
index 327ef71d5..000000000
--- a/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.c
+++ /dev/null
@@ -1,236 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2022, Rafael Silva
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include <stdio.h>
-
-#include "bsp/board.h"
-#include "bsp_api.h"
-#include "r_ioport.h"
-#include "r_ioport_api.h"
-#include "renesas.h"
-
-/* Key code for writing PRCR register. */
-#define BSP_PRV_PRCR_KEY	 (0xA500U)
-#define BSP_PRV_PRCR_PRC1_UNLOCK ((BSP_PRV_PRCR_KEY) | 0x2U)
-#define BSP_PRV_PRCR_LOCK	 ((BSP_PRV_PRCR_KEY) | 0x0U)
-
-#define SW1  (BSP_IO_PORT_00_PIN_05)
-#define SW2  (BSP_IO_PORT_00_PIN_06)
-#define LED1 (BSP_IO_PORT_04_PIN_15)
-#define LED3 (BSP_IO_PORT_04_PIN_00)
-#define LED2 (BSP_IO_PORT_04_PIN_04)
-
-/* ISR prototypes */
-void usbfs_interrupt_handler(void);
-void usbfs_resume_handler(void);
-void usbfs_d0fifo_handler(void);
-void usbfs_d1fifo_handler(void);
-
-BSP_DONT_REMOVE const
-  fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = {
-    [0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */
-    [1] = usbfs_resume_handler,    /* USBFS RESUME (USBFS resume interrupt) */
-    [2] = usbfs_d0fifo_handler,    /* USBFS FIFO 0 (DMA transfer request 0) */
-    [3] = usbfs_d1fifo_handler,    /* USBFS FIFO 1 (DMA transfer request 1) */
-};
-const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENTRIES] = {
-  [0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT),    /* USBFS INT (USBFS interrupt) */
-  [1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */
-  [2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */
-  [3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1)  /* USBFS FIFO 1 (DMA transfer request 1) */
-};
-
-const ioport_pin_cfg_t g_bsp_pin_cfg_data[] = {
-  {.pin = BSP_IO_PORT_04_PIN_07,
-   .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
-  {.pin = BSP_IO_PORT_05_PIN_00,
-   .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
-  {.pin = BSP_IO_PORT_05_PIN_01,
-   .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
-  {.pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
-  {.pin = LED2, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
-  {.pin = LED3, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
-  {.pin = SW1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)},
-  {.pin = SW2, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)}};
-
-const ioport_cfg_t g_bsp_pin_cfg = {
-  .number_of_pins = sizeof(g_bsp_pin_cfg_data) / sizeof(ioport_pin_cfg_t),
-  .p_pin_cfg_data = &g_bsp_pin_cfg_data[0],
-};
-ioport_instance_ctrl_t g_ioport_ctrl;
-const ioport_instance_t g_ioport = {.p_api = &g_ioport_on_ioport, .p_ctrl = &g_ioport_ctrl, .p_cfg = &g_bsp_pin_cfg};
-
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-void usbfs_interrupt_handler(void)
-{
-  IRQn_Type irq = R_FSP_CurrentIrqGet();
-  R_BSP_IrqStatusClear(irq);
-
-#if CFG_TUH_ENABLED
-  tuh_int_handler(0);
-#endif
-
-#if CFG_TUD_ENABLED
-  tud_int_handler(0);
-#endif
-}
-void usbfs_resume_handler(void)
-{
-  IRQn_Type irq = R_FSP_CurrentIrqGet();
-  R_BSP_IrqStatusClear(irq);
-
-#if CFG_TUH_ENABLED
-  tuh_int_handler(0);
-#endif
-
-#if CFG_TUD_ENABLED
-  tud_int_handler(0);
-#endif
-}
-
-void usbfs_d0fifo_handler(void)
-{
-  IRQn_Type irq = R_FSP_CurrentIrqGet();
-  R_BSP_IrqStatusClear(irq);
-
-#if CFG_TUH_ENABLED
-  tuh_int_handler(0);
-#endif
-
-#if CFG_TUD_ENABLED
-  tud_int_handler(0);
-#endif
-}
-
-void usbfs_d1fifo_handler(void)
-{
-  IRQn_Type irq = R_FSP_CurrentIrqGet();
-  R_BSP_IrqStatusClear(irq);
-
-#if CFG_TUH_ENABLED
-  tuh_int_handler(0);
-#endif
-
-#if CFG_TUD_ENABLED
-  tud_int_handler(0);
-#endif
-}
-
-void board_init(void)
-{
-  /* Configure pins. */
-  R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg);
-
-  /* Enable USB_BASE */
-  R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_PRC1_UNLOCK;
-  R_MSTP->MSTPCRB &= ~(1U << 11U);
-  R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK;
-
-#if CFG_TUSB_OS == OPT_OS_FREERTOS
-  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
-  NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-  NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-  NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-  NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-#endif
-
-#if CFG_TUSB_OS == OPT_OS_NONE
-  /* Init systick */
-  SysTick_Config(SystemCoreClock / 1000);
-#endif
-}
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-void board_led_write(bool state)
-{
-  R_IOPORT_PinWrite(&g_ioport_ctrl, LED1, state);
-  R_IOPORT_PinWrite(&g_ioport_ctrl, LED2, state);
-  R_IOPORT_PinWrite(&g_ioport_ctrl, LED3, state);
-}
-
-uint32_t board_button_read(void)
-{
-  bsp_io_level_t lvl;
-  R_IOPORT_PinRead(&g_ioport_ctrl, SW1, &lvl);
-  return lvl;
-}
-
-int board_uart_read(uint8_t *buf, int len)
-{
-  (void) buf;
-  (void) len;
-  return 0;
-}
-
-int board_uart_write(void const *buf, int len)
-{
-  (void) buf;
-  (void) len;
-  return 0;
-}
-
-#if CFG_TUSB_OS == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-void SysTick_Handler(void)
-{
-  system_ticks++;
-}
-
-uint32_t board_millis(void)
-{
-  return system_ticks;
-}
-#else
-#endif
-
-int close(int fd)
-{
-  (void) fd;
-  return -1;
-}
-int fstat(int fd, void *pstat)
-{
-  (void) fd;
-  (void) pstat;
-  return 0;
-}
-off_t lseek(int fd, off_t pos, int whence)
-{
-  (void) fd;
-  (void) pos;
-  (void) whence;
-  return 0;
-}
-int isatty(int fd)
-{
-  (void) fd;
-  return 1;
-}
diff --git a/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld b/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld
index 5bc335cb4..520b44cc6 100644
--- a/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld
+++ b/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld
@@ -413,6 +413,7 @@ SECTIONS
     {
         . = ALIGN(8);
         __HeapBase = .;
+        PROVIDE(end = .);
         /* Place the STD heap here. */
         KEEP(*(.heap))
         __HeapLimit = .;
diff --git a/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c b/hw/bsp/ra/family.c
similarity index 83%
rename from hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c
rename to hw/bsp/ra/family.c
index ea2204837..42cb2d4a4 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.c
+++ b/hw/bsp/ra/family.c
@@ -26,23 +26,33 @@
 
 #include <stdio.h>
 
-#include "bsp/board.h"
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wstrict-prototypes"
+#pragma GCC diagnostic ignored "-Wundef"
+
+// extra push due to https://github.com/renesas/fsp/pull/278
+#pragma GCC diagnostic push
+#endif
+
 #include "bsp_api.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 #include "r_ioport.h"
 #include "r_ioport_api.h"
 #include "renesas.h"
 
+#include "bsp/board.h"
+#include "board.h"
+
 /* Key code for writing PRCR register. */
 #define BSP_PRV_PRCR_KEY	 (0xA500U)
 #define BSP_PRV_PRCR_PRC1_UNLOCK ((BSP_PRV_PRCR_KEY) | 0x2U)
 #define BSP_PRV_PRCR_LOCK	 ((BSP_PRV_PRCR_KEY) | 0x0U)
 
-#define SW1  (BSP_IO_PORT_01_PIN_05)
-#define LED1 (BSP_IO_PORT_01_PIN_06)
-
-#define LED_STATE_ON          1
-#define BUTTON_STATE_ACTIVE   0
-
 /* ISR prototypes */
 void usbfs_interrupt_handler(void);
 void usbfs_resume_handler(void);
@@ -50,7 +60,7 @@ void usbfs_d0fifo_handler(void);
 void usbfs_d1fifo_handler(void);
 
 BSP_DONT_REMOVE const
-  fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = {
+fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = {
     [0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */
     [1] = usbfs_resume_handler,    /* USBFS RESUME (USBFS resume interrupt) */
     [2] = usbfs_d0fifo_handler,    /* USBFS FIFO 0 (DMA transfer request 0) */
@@ -63,22 +73,12 @@ const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENT
   [3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1)  /* USBFS FIFO 1 (DMA transfer request 1) */
 };
 
-const ioport_pin_cfg_t g_bsp_pin_cfg_data[] = {
-  { .pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW) },
-  { .pin = SW1 , .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT) },
-
-  { .pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) },
-  { .pin = BSP_IO_PORT_09_PIN_14, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) },
-  { .pin = BSP_IO_PORT_09_PIN_15, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) },
-
-};
-
 const ioport_cfg_t g_bsp_pin_cfg = {
-  .number_of_pins = sizeof(g_bsp_pin_cfg_data) / sizeof(ioport_pin_cfg_t),
-  .p_pin_cfg_data = &g_bsp_pin_cfg_data[0],
+  .number_of_pins = sizeof(board_pin_cfg) / sizeof(ioport_pin_cfg_t),
+  .p_pin_cfg_data = board_pin_cfg,
 };
 ioport_instance_ctrl_t g_ioport_ctrl;
-const ioport_instance_t g_ioport = {.p_api = &g_ioport_on_ioport, .p_ctrl = &g_ioport_ctrl, .p_cfg = &g_bsp_pin_cfg};
+//const ioport_instance_t g_ioport = {.p_api = &g_ioport_on_ioport, .p_ctrl = &g_ioport_ctrl, .p_cfg = &g_bsp_pin_cfg};
 
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
@@ -204,7 +204,6 @@ uint32_t board_millis(void)
 {
   return system_ticks;
 }
-#else
 #endif
 
 int close(int fd)
diff --git a/hw/bsp/ra/family.cmake b/hw/bsp/ra/family.cmake
new file mode 100644
index 000000000..c4c25bf4f
--- /dev/null
+++ b/hw/bsp/ra/family.cmake
@@ -0,0 +1,114 @@
+include_guard()
+
+if (NOT BOARD)
+  message(FATAL_ERROR "BOARD not specified")
+endif ()
+
+set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
+set(FSP_RA ${TOP}/hw/mcu/renesas/fsp/ra/fsp)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS RA CACHE INTERNAL "")
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    add_library(${BOARD_TARGET} STATIC
+      ${FSP_RA}/src/bsp/cmsis/Device/RENESAS/Source/startup.c
+      ${FSP_RA}/src/bsp/cmsis/Device/RENESAS/Source/system.c
+      ${FSP_RA}/src/bsp/mcu/all/bsp_clocks.c
+      ${FSP_RA}/src/bsp/mcu/all/bsp_common.c
+      ${FSP_RA}/src/bsp/mcu/all/bsp_delay.c
+      ${FSP_RA}/src/bsp/mcu/all/bsp_group_irq.c
+      ${FSP_RA}/src/bsp/mcu/all/bsp_guard.c
+      ${FSP_RA}/src/bsp/mcu/all/bsp_io.c
+      ${FSP_RA}/src/bsp/mcu/all/bsp_irq.c
+      ${FSP_RA}/src/bsp/mcu/all/bsp_register_protection.c
+      ${FSP_RA}/src/bsp/mcu/all/bsp_rom_registers.c
+      ${FSP_RA}/src/bsp/mcu/all/bsp_sbrk.c
+      ${FSP_RA}/src/bsp/mcu/all/bsp_security.c
+      ${FSP_RA}/src/r_ioport/r_ioport.c
+      )
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      _RA_TZ_NONSECURE
+      )
+
+    target_compile_options(${BOARD_TARGET} PUBLIC
+      -ffreestanding
+      )
+
+    target_include_directories(${BOARD_TARGET} PUBLIC
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/fsp_cfg
+      ${CMSIS_DIR}/CMSIS/Core/Include
+      ${FSP_RA}/inc
+      ${FSP_RA}/inc/api
+      ${FSP_RA}/inc/instances
+      ${FSP_RA}/src/bsp/cmsis/Device/RENESAS/Include
+      ${FSP_RA}/src/bsp/mcu/${MCU_VARIANT}
+      )
+
+    update_board(${BOARD_TARGET})
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        # linker file
+        "LINKER:--script=${LD_FILE_GNU}"
+        -nostartfiles
+        # nanolib
+        --specs=nano.specs
+        --specs=nosys.specs
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_RAXXX ${RTOS})
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/renesas/rusb2/dcd_rusb2.c
+    ${TOP}/src/portable/renesas/rusb2/hcd_rusb2.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_flash_jlink(${TARGET})
+endfunction()
diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk
index 103d3cfa6..8e4f80eaf 100644
--- a/hw/bsp/ra/family.mk
+++ b/hw/bsp/ra/family.mk
@@ -35,9 +35,9 @@ SRC_C += \
 
 INC += \
 	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
-	$(TOP)/$(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Include \
 	$(TOP)/$(BOARD_PATH) \
 	$(TOP)/$(BOARD_PATH)/fsp_cfg \
+	$(TOP)/$(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Include \
 	$(TOP)/$(FSP_RA)/inc \
 	$(TOP)/$(FSP_RA)/inc/api \
 	$(TOP)/$(FSP_RA)/inc/instances \
diff --git a/src/portable/renesas/rusb2/rusb2_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h
index 5be9f11ce..be0a9fa66 100644
--- a/src/portable/renesas/rusb2/rusb2_ra.h
+++ b/src/portable/renesas/rusb2/rusb2_ra.h
@@ -31,9 +31,21 @@
 extern "C" {
 #endif
 
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wstrict-prototypes"
+
+// extra push due to https://github.com/renesas/fsp/pull/278
+#pragma GCC diagnostic push
+#endif
+
 /* renesas fsp api */
 #include "bsp_api.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 #define RUSB2_REG_BASE (0x40090000)
 
 #if defined(__ICCARM__)

From 22fb66436db38e701b0b1c69ea80c5c3d50d445e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 1 Jul 2023 16:40:47 +0700
Subject: [PATCH 465/691] update linker

---
 hw/bsp/ra/FreeRTOSConfig/FreeRTOSConfig.h     | 180 ++++++
 hw/bsp/ra/boards/ra4m1_ek/board.cmake         |  11 +-
 hw/bsp/ra/boards/ra4m1_ek/board.h             |  18 +-
 hw/bsp/ra/boards/ra4m1_ek/board.mk            |   5 -
 hw/bsp/ra/boards/ra4m3_ek/board.cmake         |  11 +-
 hw/bsp/ra/boards/ra4m3_ek/board.mk            |   5 -
 hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld         | 576 ------------------
 hw/bsp/ra/family.c                            | 167 +++--
 hw/bsp/ra/family.cmake                        |  17 +-
 hw/bsp/ra/family.mk                           |   5 +
 .../ra4m1_ek.ld => linker/gcc/fsp.ld}         |  33 +-
 hw/bsp/ra/linker/gcc/ra4m1.ld                 |  22 +
 hw/bsp/ra/linker/gcc/ra4m3.ld                 |  22 +
 hw/bsp/ra/linker/gcc/ra6m1.ld                 |  22 +
 tools/cmake/cpu/cortex-m4.cmake               |   8 +-
 15 files changed, 375 insertions(+), 727 deletions(-)
 create mode 100644 hw/bsp/ra/FreeRTOSConfig/FreeRTOSConfig.h
 delete mode 100644 hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld
 rename hw/bsp/ra/{boards/ra4m1_ek/ra4m1_ek.ld => linker/gcc/fsp.ld} (97%)
 create mode 100644 hw/bsp/ra/linker/gcc/ra4m1.ld
 create mode 100644 hw/bsp/ra/linker/gcc/ra4m3.ld
 create mode 100644 hw/bsp/ra/linker/gcc/ra6m1.ld

diff --git a/hw/bsp/ra/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/ra/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..8c39a2fb8
--- /dev/null
+++ b/hw/bsp/ra/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,180 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wstrict-prototypes"
+#pragma GCC diagnostic ignored "-Wundef"
+
+// extra push due to https://github.com/renesas/fsp/pull/278
+#pragma GCC diagnostic push
+#endif
+
+#include "bsp_api.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               2
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       __NVIC_PRIO_BITS
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.cmake b/hw/bsp/ra/boards/ra4m1_ek/board.cmake
index 37c39061d..51c1f3d6c 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/board.cmake
+++ b/hw/bsp/ra/boards/ra4m1_ek/board.cmake
@@ -3,13 +3,8 @@ set(MCU_VARIANT ra4m1)
 
 set(JLINK_DEVICE R7FA4M1AB)
 
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/ra4m1_ek.ld)
-
 function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    )
-  target_sources(${TARGET} PRIVATE
-    )
-  target_include_directories(${BOARD_TARGET} PUBLIC
-    )
+  target_compile_definitions(${TARGET} PUBLIC)
+  target_sources(${TARGET} PRIVATE)
+  target_include_directories(${BOARD_TARGET} PUBLIC)
 endfunction()
diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.h b/hw/bsp/ra/boards/ra4m1_ek/board.h
index 383ab7399..b580bb5e9 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/board.h
+++ b/hw/bsp/ra/boards/ra4m1_ek/board.h
@@ -31,19 +31,19 @@
 extern "C" {
 #endif
 
-#define LED1 (BSP_IO_PORT_01_PIN_06)
-#define LED_STATE_ON          1
+#define LED1          BSP_IO_PORT_01_PIN_06
+#define LED_STATE_ON  1
 
-#define SW1  (BSP_IO_PORT_01_PIN_05)
+#define SW1                   BSP_IO_PORT_01_PIN_05
 #define BUTTON_STATE_ACTIVE   0
 
 const ioport_pin_cfg_t board_pin_cfg[] = {
-    { .pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW) },
-    { .pin = SW1 , .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT) },
-
-    { .pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) },
-    { .pin = BSP_IO_PORT_09_PIN_14, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) },
-    { .pin = BSP_IO_PORT_09_PIN_15, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS) },
+    {.pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT},
+    {.pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT},
+    // USB D+, D-, VBus
+    {.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
+    {.pin = BSP_IO_PORT_09_PIN_14, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
+    {.pin = BSP_IO_PORT_09_PIN_15, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
 };
 
 #ifdef __cplusplus
diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.mk b/hw/bsp/ra/boards/ra4m1_ek/board.mk
index 9b0fafb28..a06d75ef3 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/board.mk
+++ b/hw/bsp/ra/boards/ra4m1_ek/board.mk
@@ -1,11 +1,6 @@
 CPU_CORE = cortex-m4
 MCU_VARIANT = ra4m1
 
-FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m1_ek
-
-# All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/ra4m1_ek.ld
-
 # For flash-jlink target
 JLINK_DEVICE = R7FA4M1AB
 JLINK_IF     = SWD
diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.cmake b/hw/bsp/ra/boards/ra4m3_ek/board.cmake
index 241b659a0..637e99db6 100644
--- a/hw/bsp/ra/boards/ra4m3_ek/board.cmake
+++ b/hw/bsp/ra/boards/ra4m3_ek/board.cmake
@@ -3,13 +3,8 @@ set(MCU_VARIANT ra4m3)
 
 set(JLINK_DEVICE R7FA4M3AF)
 
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/ra4m3_ek.ld)
-
 function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    )
-  target_sources(${TARGET} PRIVATE
-    )
-  target_include_directories(${BOARD_TARGET} PUBLIC
-    )
+  target_compile_definitions(${TARGET} PUBLIC)
+  target_sources(${TARGET} PRIVATE)
+  target_include_directories(${BOARD_TARGET} PUBLIC)
 endfunction()
diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.mk b/hw/bsp/ra/boards/ra4m3_ek/board.mk
index 266de7c0d..f2d0ecfc5 100644
--- a/hw/bsp/ra/boards/ra4m3_ek/board.mk
+++ b/hw/bsp/ra/boards/ra4m3_ek/board.mk
@@ -1,11 +1,6 @@
 CPU_CORE = cortex-m33
 MCU_VARIANT = ra4m3
 
-FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m3_ek
-
-# All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/ra4m3_ek.ld
-
 # For flash-jlink target
 JLINK_DEVICE = R7FA4M3AF
 JLINK_IF     = SWD
diff --git a/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld b/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld
deleted file mode 100644
index 520b44cc6..000000000
--- a/hw/bsp/ra/boards/ra4m3_ek/ra4m3_ek.ld
+++ /dev/null
@@ -1,576 +0,0 @@
-/* generated memory regions file - do not edit */
-RAM_START = 0x20000000;
-RAM_LENGTH = 0x20000;
-FLASH_START = 0x00000000;
-FLASH_LENGTH = 0x100000;
-DATA_FLASH_START = 0x08000000;
-DATA_FLASH_LENGTH = 0x2000;
-OPTION_SETTING_START = 0x0100A100;
-OPTION_SETTING_LENGTH = 0x100;
-OPTION_SETTING_S_START = 0x0100A200;
-OPTION_SETTING_S_LENGTH = 0x100;
-ID_CODE_START = 0x00000000;
-ID_CODE_LENGTH = 0x0;
-SDRAM_START = 0x90000000;
-SDRAM_LENGTH = 0x0;
-QSPI_FLASH_START = 0x60000000;
-QSPI_FLASH_LENGTH = 0x4000000;
-OSPI_DEVICE_0_START = 0x68000000;
-OSPI_DEVICE_0_LENGTH = 0x0;
-OSPI_DEVICE_1_START = 0x70000000;
-OSPI_DEVICE_1_LENGTH = 0x0;
-
-/*
-    Linker File for Renesas FSP
-*/
-
-QSPI_FLASH_PRV_LENGTH = DEFINED(QSPI_FLASH_SIZE) ? ABSOLUTE(QSPI_FLASH_SIZE) : ABSOLUTE(QSPI_FLASH_LENGTH);
-OSPI_DEVICE_0_PRV_LENGTH = DEFINED(OSPI_DEVICE_0_SIZE) ? ABSOLUTE(OSPI_DEVICE_0_SIZE) : ABSOLUTE(OSPI_DEVICE_0_LENGTH);
-OSPI_DEVICE_1_PRV_LENGTH = DEFINED(OSPI_DEVICE_1_SIZE) ? ABSOLUTE(OSPI_DEVICE_1_SIZE) : ABSOLUTE(OSPI_DEVICE_1_LENGTH);
-
-/* This is a non-secure project if the OPTION_SETTING region is non-zero and it does not start at the base address for
- * secure option settings (meaning the secure option settings were already allocated in the secure project). */
-__TZ_NS_PROJECT = LENGTH(OPTION_SETTING) && DEFINED(OPTION_SETTING_S_START) && (ABSOLUTE(OPTION_SETTING_START_S) != ORIGIN(OPTION_SETTING));
-
-/* This is a secure project if the option setting base address matches the option setting base address for secure
- * option settings. This is also set for flat projects because the CPU runs in secure mode for flat projects.
- * This is not defined for projects that do not support TrustZone. */
-__TZ_S_PROJECT = LENGTH(OPTION_SETTING) && DEFINED(OPTION_SETTING_S_START) && (ABSOLUTE(OPTION_SETTING_START_S) == ORIGIN(OPTION_SETTING));
-
-/* If a flat (secure) project has defined RAM_NS_BUFFER_LENGTH, then emit IDAU symbols to allocate non-secure RAM. */
-__RESERVE_NS_RAM = __TZ_S_PROJECT && DEFINED(RAM_NS_BUFFER_LENGTH);
-
-RAM_NS_BUFFER_BLOCK_LENGTH = DEFINED(RAM_NS_BUFFER_LENGTH) ? ALIGN(RAM_NS_BUFFER_LENGTH, 8192) : 0;
-RAM_NS_BUFFER_LENGTH = DEFINED(RAM_NS_BUFFER_LENGTH) ? RAM_NS_BUFFER_LENGTH : 0;
-RAM_NS_BUFFER_START = RAM_START + RAM_LENGTH - RAM_NS_BUFFER_LENGTH;
-RAM_NS_BUFFER_BLOCK_START = RAM_START + RAM_LENGTH - RAM_NS_BUFFER_BLOCK_LENGTH;
-
-/* Define memory regions. */
-MEMORY
-{
-  FLASH (rx)      : ORIGIN = FLASH_START, LENGTH = FLASH_LENGTH
-  RAM (rwx)       : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
-  DATA_FLASH (rx) : ORIGIN = DATA_FLASH_START, LENGTH = DATA_FLASH_LENGTH
-  QSPI_FLASH (rx) : ORIGIN = QSPI_FLASH_START, LENGTH = QSPI_FLASH_PRV_LENGTH
-  OSPI_DEVICE_0 (rx) : ORIGIN = OSPI_DEVICE_0_START, LENGTH = OSPI_DEVICE_0_PRV_LENGTH
-  OSPI_DEVICE_1 (rx) : ORIGIN = OSPI_DEVICE_1_START, LENGTH = OSPI_DEVICE_1_PRV_LENGTH
-  SDRAM (rwx)     : ORIGIN = SDRAM_START, LENGTH = SDRAM_LENGTH
-  OPTION_SETTING (r): ORIGIN = OPTION_SETTING_START, LENGTH = OPTION_SETTING_LENGTH
-  OPTION_SETTING_S (r): ORIGIN = OPTION_SETTING_S_START, LENGTH = OPTION_SETTING_S_LENGTH
-  ID_CODE (rx)    : ORIGIN = ID_CODE_START, LENGTH = ID_CODE_LENGTH
-}
-
-OPTION_SETTING_START_NS = 0x0100A180;
-OPTION_SETTING_START_S = 0x0100A100;
-
-/* Library configurations */
-GROUP(libgcc.a libc.a libm.a libnosys.a)
-
-/* Linker script to place sections and symbol values. Should be used together
- * with other linker script that defines memory regions FLASH and RAM.
- * It references following symbols, which must be defined in code:
- *   Reset_Handler : Entry of reset handler
- *
- * It defines following symbols, which code can use without definition:
- *   __exidx_start
- *   __exidx_end
- *   __copy_table_start__
- *   __copy_table_end__
- *   __zero_table_start__
- *   __zero_table_end__
- *   __etext
- *   __data_start__
- *   __preinit_array_start
- *   __preinit_array_end
- *   __init_array_start
- *   __init_array_end
- *   __fini_array_start
- *   __fini_array_end
- *   __data_end__
- *   __bss_start__
- *   __bss_end__
- *   __HeapLimit
- *   __StackLimit
- *   __StackTop
- *   __stack
- *   __Vectors_End
- *   __Vectors_Size
- *   __qspi_flash_start__
- *   __qspi_flash_end__
- *   __qspi_flash_code_size__
- *   __qspi_region_max_size__
- *   __qspi_region_start_address__
- *   __qspi_region_end_address__
- *   __ospi_device_0_start__
- *   __ospi_device_0_end__
- *   __ospi_device_0_code_size__
- *   __ospi_device_0_region_max_size__
- *   __ospi_device_0_region_start_address__
- *   __ospi_device_0_region_end_address__
- *   __ospi_device_1_start__
- *   __ospi_device_1_end__
- *   __ospi_device_1_code_size__
- *   __ospi_device_1_region_max_size__
- *   __ospi_device_1_region_start_address__
- *   __ospi_device_1_region_end_address__
- */
-ENTRY(Reset_Handler)
-
-SECTIONS
-{
-    .text :
-    {
-        __tz_FLASH_S = ABSOLUTE(FLASH_START);
-        __ROM_Start = .;
-
-        /* Even though the vector table is not 256 entries (1KB) long, we still allocate that much
-         * space because ROM registers are at address 0x400 and there is very little space
-         * in between. */
-        KEEP(*(.fixed_vectors*))
-        KEEP(*(.application_vectors*))
-        __Vectors_End = .;
-
-        /* ROM Registers start at address 0x00000400 */
-        . = __ROM_Start + 0x400;
-        KEEP(*(.rom_registers*))
-
-        /* Reserving 0x100 bytes of space for ROM registers. */
-        . = __ROM_Start + 0x500;
-
-        *(.text*)
-
-        KEEP(*(.version))
-        KEEP(*(.init))
-        KEEP(*(.fini))
-
-        /* .ctors */
-        *crtbegin.o(.ctors)
-        *crtbegin?.o(.ctors)
-        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
-        *(SORT(.ctors.*))
-        *(.ctors)
-
-        /* .dtors */
-        *crtbegin.o(.dtors)
-        *crtbegin?.o(.dtors)
-        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
-        *(SORT(.dtors.*))
-        *(.dtors)
-
-        *(.rodata*)
-        __usb_dev_descriptor_start_fs = .;
-        KEEP(*(.usb_device_desc_fs*))
-        __usb_cfg_descriptor_start_fs = .;
-        KEEP(*(.usb_config_desc_fs*))
-        __usb_interface_descriptor_start_fs = .;
-        KEEP(*(.usb_interface_desc_fs*))
-        __usb_descriptor_end_fs = .;
-        __usb_dev_descriptor_start_hs = .;
-        KEEP(*(.usb_device_desc_hs*))
-        __usb_cfg_descriptor_start_hs = .;
-        KEEP(*(.usb_config_desc_hs*))
-        __usb_interface_descriptor_start_hs = .;
-        KEEP(*(.usb_interface_desc_hs*))
-        __usb_descriptor_end_hs = .;
-
-        KEEP(*(.eh_frame*))
-
-        __ROM_End = .;
-    } > FLASH = 0xFF
-
-    __Vectors_Size = __Vectors_End - __Vectors;
-
-    .ARM.extab :
-    {
-        *(.ARM.extab* .gnu.linkonce.armextab.*)
-    } > FLASH
-
-    __exidx_start = .;
-    .ARM.exidx :
-    {
-        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-    } > FLASH
-    __exidx_end = .;
-
-    /* To copy multiple ROM to RAM sections,
-     * uncomment .copy.table section and,
-     * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
-    /*
-    .copy.table :
-    {
-        . = ALIGN(4);
-        __copy_table_start__ = .;
-        LONG (__etext)
-        LONG (__data_start__)
-        LONG (__data_end__ - __data_start__)
-        LONG (__etext2)
-        LONG (__data2_start__)
-        LONG (__data2_end__ - __data2_start__)
-        __copy_table_end__ = .;
-    } > FLASH
-    */
-
-    /* To clear multiple BSS sections,
-     * uncomment .zero.table section and,
-     * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
-    /*
-    .zero.table :
-    {
-        . = ALIGN(4);
-        __zero_table_start__ = .;
-        LONG (__bss_start__)
-        LONG (__bss_end__ - __bss_start__)
-        LONG (__bss2_start__)
-        LONG (__bss2_end__ - __bss2_start__)
-        __zero_table_end__ = .;
-    } > FLASH
-    */
-
-    __etext = .;
-
-    __tz_RAM_S = ORIGIN(RAM);
-
-    /* If DTC is used, put the DTC vector table at the start of SRAM.
-       This avoids memory holes due to 1K alignment required by it. */
-    .fsp_dtc_vector_table (NOLOAD) :
-    {
-        . = ORIGIN(RAM);
-        *(.fsp_dtc_vector_table)
-    } > RAM
-
-    /* Initialized data section. */
-    .data :
-    {
-        __data_start__ = .;
-        . = ALIGN(4);
-
-        __Code_In_RAM_Start = .;
-
-        KEEP(*(.code_in_ram*))
-        __Code_In_RAM_End = .;
-
-        *(vtable)
-        /* Don't use *(.data*) because it will place data meant for .data_flash in this section. */
-        *(.data.*)
-        *(.data)
-
-        . = ALIGN(4);
-        /* preinit data */
-        PROVIDE_HIDDEN (__preinit_array_start = .);
-        KEEP(*(.preinit_array))
-        PROVIDE_HIDDEN (__preinit_array_end = .);
-
-        . = ALIGN(4);
-        /* init data */
-        PROVIDE_HIDDEN (__init_array_start = .);
-        KEEP(*(SORT(.init_array.*)))
-        KEEP(*(.init_array))
-        PROVIDE_HIDDEN (__init_array_end = .);
-
-
-        . = ALIGN(4);
-        /* finit data */
-        PROVIDE_HIDDEN (__fini_array_start = .);
-        KEEP(*(SORT(.fini_array.*)))
-        KEEP(*(.fini_array))
-        PROVIDE_HIDDEN (__fini_array_end = .);
-
-        KEEP(*(.jcr*))
-
-        . = ALIGN(4);
-
-        /* All data end */
-        __data_end__ = .;
-
-    } > RAM AT > FLASH
-
-
-    /* TrustZone Secure Gateway Stubs Section. */
-    .gnu.sgstubs : ALIGN (1024)
-    {
-        . = DEFINED(FLASH_NSC_START) ? ABSOLUTE(FLASH_NSC_START) : ALIGN(1024);
-        __tz_FLASH_C = DEFINED(FLASH_NSC_START) ? ABSOLUTE(FLASH_NSC_START) : __RESERVE_NS_RAM ? ABSOLUTE(FLASH_START + FLASH_LENGTH) : ALIGN(1024);
-        _start_sg = .;
-        *(.gnu.sgstubs*)
-        . = ALIGN(32);
-        _end_sg = .;
-    } > FLASH
-
-    __tz_FLASH_N = DEFINED(FLASH_NS_START) ? ABSOLUTE(FLASH_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(FLASH_START + FLASH_LENGTH) : ALIGN(32768);
-
-    /* Note: There are no secure/non-secure boundaries for QSPI.  These symbols are provided for the RA configuration tool. */
-    __tz_QSPI_FLASH_S = ORIGIN(QSPI_FLASH);
-
-    /* QSPI_FLASH section to be downloaded via debugger */
-    .qspi_flash :
-    {
-        __qspi_flash_start__ = .;
-        KEEP(*(.qspi_flash*))
-        KEEP(*(.code_in_qspi*))
-        __qspi_flash_end__ = .;
-    } > QSPI_FLASH
-    __qspi_flash_code_size__ = __qspi_flash_end__ - __qspi_flash_start__;
-
-    /* QSPI_FLASH non-retentive section, creates a copy in internal flash that can be copied to QSPI */
-    __qspi_flash_code_addr__ = __etext + (__data_end__ - __data_start__);
-    .qspi_non_retentive : AT (__qspi_flash_code_addr__)
-    {
-        __qspi_non_retentive_start__ = .;
-        KEEP(*(.qspi_non_retentive*))
-        __qspi_non_retentive_end__ = .;
-    } > QSPI_FLASH
-    __qspi_non_retentive_size__ = __qspi_non_retentive_end__ - __qspi_non_retentive_start__;
-
-    __qspi_region_max_size__ = 0x4000000;   /* Must be the same as defined in MEMORY above */
-    __qspi_region_start_address__ = __qspi_flash_start__;
-    __qspi_region_end_address__ = __qspi_flash_start__ + __qspi_region_max_size__;
-
-    /* Note: There are no secure/non-secure boundaries for QSPI.  These symbols are provided for the RA configuration tool. */
-    __tz_QSPI_FLASH_N = __qspi_non_retentive_end__;
-
-    /* Note: There are no secure/non-secure boundaries for QSPI.  These symbols are provided for the RA configuration tool. */
-    __tz_OSPI_DEVICE_0_S = ORIGIN(OSPI_DEVICE_0);
-
-    /* OSPI_DEVICE_0 section to be downloaded via debugger */
-    .OSPI_DEVICE_0 :
-    {
-        __ospi_device_0_start__ = .;
-        KEEP(*(.ospi_device_0*))
-        KEEP(*(.code_in_ospi_device_0*))
-        __ospi_device_0_end__ = .;
-    } > OSPI_DEVICE_0
-    __ospi_device_0_code_size__ = __ospi_device_0_end__ - __ospi_device_0_start__;
-
-    /* OSPI_DEVICE_0 non-retentive section, creates a copy in internal flash that can be copied to OSPI */
-    __ospi_device_0_code_addr__ = __etext + (__data_end__ - __data_start__);
-    .ospi_device_0_non_retentive : AT (__ospi_device_0_code_addr__)
-    {
-        __ospi_device_0_non_retentive_start__ = .;
-        KEEP(*(.ospi_device_0_non_retentive*))
-        __ospi_device_0_non_retentive_end__ = .;
-    } > OSPI_DEVICE_0
-    __ospi_device_0_non_retentive_size__ = __ospi_device_0_non_retentive_end__ - __ospi_device_0_non_retentive_start__;
-
-    __ospi_device_0_region_max_size__ = 0x8000000;   /* Must be the same as defined in MEMORY above */
-    __ospi_device_0_region_start_address__ = __ospi_device_0_start__;
-    __ospi_device_0_region_end_address__ = __ospi_device_0_start__ + __ospi_device_0_region_max_size__;
-
-    /* Note: There are no secure/non-secure boundaries for OSPI.  These symbols are provided for the RA configuration tool. */
-    __tz_OSPI_DEVICE_0_N = __ospi_device_0_non_retentive_end__;
-
-    /* Note: There are no secure/non-secure boundaries for OSPI.  These symbols are provided for the RA configuration tool. */
-    __tz_OSPI_DEVICE_1_S = ORIGIN(OSPI_DEVICE_1);
-
-    /* OSPI_DEVICE_1 section to be downloaded via debugger */
-    .OSPI_DEVICE_1 :
-    {
-        __ospi_device_1_start__ = .;
-        KEEP(*(.ospi_device_1*))
-        KEEP(*(.code_in_ospi_device_1*))
-        __ospi_device_1_end__ = .;
-    } > OSPI_DEVICE_1
-    __ospi_device_1_code_size__ = __ospi_device_1_end__ - __ospi_device_1_start__;
-
-    /* OSPI_DEVICE_1 non-retentive section, creates a copy in internal flash that can be copied to OSPI */
-    __ospi_device_1_code_addr__ = __etext + (__data_end__ - __data_start__);
-    .ospi_device_1_non_retentive : AT (__ospi_device_1_code_addr__)
-    {
-        __ospi_device_1_non_retentive_start__ = .;
-        KEEP(*(.ospi_device_1_non_retentive*))
-        __ospi_device_1_non_retentive_end__ = .;
-    } > OSPI_DEVICE_1
-    __ospi_device_1_non_retentive_size__ = __ospi_device_1_non_retentive_end__ - __ospi_device_1_non_retentive_start__;
-
-    __ospi_device_1_region_max_size__ = 0x10000000;   /* Must be the same as defined in MEMORY above */
-    __ospi_device_1_region_start_address__ = __ospi_device_1_start__;
-    __ospi_device_1_region_end_address__ = __ospi_device_1_start__ + __ospi_device_1_region_max_size__;
-
-    /* Note: There are no secure/non-secure boundaries for OSPI.  These symbols are provided for the RA configuration tool. */
-    __tz_OSPI_DEVICE_1_N = __ospi_device_1_non_retentive_end__;
-
-    .noinit (NOLOAD):
-    {
-        . = ALIGN(4);
-        __noinit_start = .;
-        KEEP(*(.noinit*))
-        . = ALIGN(8);
-        /* Place the FreeRTOS heap here so that the __HeapLimit calculation does not include the freertos heap. */
-        KEEP(*(.heap.*))
-        __noinit_end = .;
-    } > RAM
-
-    .bss :
-    {
-        . = ALIGN(4);
-        __bss_start__ = .;
-        *(.bss*)
-        *(COMMON)
-        . = ALIGN(4);
-        __bss_end__ = .;
-    } > RAM
-
-    .heap (NOLOAD):
-    {
-        . = ALIGN(8);
-        __HeapBase = .;
-        PROVIDE(end = .);
-        /* Place the STD heap here. */
-        KEEP(*(.heap))
-        __HeapLimit = .;
-    } > RAM
-
-    /* Stacks are stored in this section. */
-    .stack_dummy (NOLOAD):
-    {
-        . = ALIGN(8);
-        __StackLimit = .;
-        /* Main stack */
-        KEEP(*(.stack))
-        __StackTop = .;
-        /* Thread stacks */
-        KEEP(*(.stack*))
-        __StackTopAll = .;
-    } > RAM
-
-    PROVIDE(__stack = __StackTopAll);
-
-    /* This symbol represents the end of user allocated RAM. The RAM after this symbol can be used
-       at run time for things such as ThreadX memory pool allocations. */
-    __RAM_segment_used_end__ = ALIGN(__StackTopAll , 4);
-
-    /* RAM_NSC_START can be used to set a fixed address for non-secure callable RAM in secure projects.
-     * If it is not specified, the address for NSC RAM is the end of RAM aligned to a 1K boundary.
-     * In flat projects that require non-secure RAM, this variable is set to the start of non-secure RAM. */
-    __tz_RAM_C = DEFINED(RAM_NSC_START) ? ABSOLUTE(RAM_NSC_START) : __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_BLOCK_START) : ALIGN(__RAM_segment_used_end__, 1024);
-
-    /* RAM_NS_START can be used to set a fixed address for non-secure RAM in secure projects or flat projects.
-     * RAM_NS_BUFFER_BLOCK_LENGTH is used to allocate non-secure buffers in a flat project. If it is not
-     * specified, the address for NSC RAM is the end of RAM aligned to an 8K boundary.
-     * In flat projects that require non-secure RAM, this variable is set to the start of non-secure RAM. */
-    __tz_RAM_N = DEFINED(RAM_NS_START) ? ABSOLUTE(RAM_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_BLOCK_START) : ALIGN(__tz_RAM_C, 8192);
-
-    /* Non-secure buffers must be in non-secure RAM. This is primarily used for the EDMAC in flat projects.
-     * The EDMAC is a non-secure bus master and can only access non-secure RAM. */
-    .ns_buffer (NOLOAD):
-    {
-        /* Allocate RAM on a 32-byte boundary to help with placement of Ethernet buffers. */
-        . = __RESERVE_NS_RAM ? ABSOLUTE(RAM_NS_BUFFER_START & 0xFFFFFFE0) : .;
-
-        KEEP(*(.ns_buffer*))
-    } > RAM
-
-    /* Data flash. */
-    .data_flash :
-    {
-        . = ORIGIN(DATA_FLASH);
-        __tz_DATA_FLASH_S = .;
-        __Data_Flash_Start = .;
-        KEEP(*(.data_flash*))
-        __Data_Flash_End = .;
-
-        __tz_DATA_FLASH_N = DEFINED(DATA_FLASH_NS_START) ? ABSOLUTE(DATA_FLASH_NS_START) : __RESERVE_NS_RAM ? ABSOLUTE(DATA_FLASH_START + DATA_FLASH_LENGTH) : ALIGN(1024);
-    } > DATA_FLASH
-
-    /* Note: There are no secure/non-secure boundaries for SDRAM.  These symbols are provided for the RA configuration tool. */
-    __tz_SDRAM_S = ORIGIN(SDRAM);
-
-    /* SDRAM */
-    .sdram (NOLOAD):
-    {
-        __SDRAM_Start = .;
-        KEEP(*(.sdram*))
-        KEEP(*(.frame*))
-        __SDRAM_End = .;
-    } > SDRAM
-
-    /* Note: There are no secure/non-secure boundaries for SDRAM.  These symbols are provided for the RA configuration tool. */
-    __tz_SDRAM_N = __SDRAM_End;
-
-    /* Note: There are no secure/non-secure boundaries for ID_CODE.  These symbols are provided for the RA configuration tool. */
-    __tz_ID_CODE_S = ORIGIN(ID_CODE);
-
-    .id_code :
-    {
-        __ID_Code_Start = .;
-        KEEP(*(.id_code*))
-        __ID_Code_End = .;
-    } > ID_CODE
-
-    /* Note: There are no secure/non-secure boundaries for ID_CODE.  These symbols are provided for the RA configuration tool. */
-    __tz_ID_CODE_N = __ID_Code_End;
-
-    /* Symbol required for RA Configuration tool. */
-    __tz_OPTION_SETTING_S = ORIGIN(OPTION_SETTING);
-
-    .option_setting :
-    {
-        __OPTION_SETTING_Start = .;
-        KEEP(*(.option_setting_ofs0))
-        . = __TZ_S_PROJECT ? __OPTION_SETTING_Start + 0x10 : __OPTION_SETTING_Start;
-        KEEP(*(.option_setting_dualsel))
-        . = __TZ_S_PROJECT ? __OPTION_SETTING_Start + 0x34 : __OPTION_SETTING_Start;
-        KEEP(*(.option_setting_sas))
-        __OPTION_SETTING_End = .;
-    } > OPTION_SETTING = 0xFF
-
-    /* Symbol required for RA Configuration tool. */
-    __tz_OPTION_SETTING_N = OPTION_SETTING_START_NS;
-
-    .option_setting_ns :
-    {
-        __OPTION_SETTING_NS_Start = .;
-        KEEP(*(.option_setting_ofs1))
-        . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x10 : __OPTION_SETTING_NS_Start;
-        KEEP(*(.option_setting_banksel))
-        . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x40 : __OPTION_SETTING_NS_Start;
-        KEEP(*(.option_setting_bps0))
-        . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x44 : __OPTION_SETTING_NS_Start;
-        KEEP(*(.option_setting_bps1))
-        . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x48 : __OPTION_SETTING_NS_Start;
-        KEEP(*(.option_setting_bps2))
-        . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x60 : __OPTION_SETTING_NS_Start;
-        KEEP(*(.option_setting_pbps0))
-        . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x64 : __OPTION_SETTING_NS_Start;
-        KEEP(*(.option_setting_pbps1))
-        . = __TZ_NS_PROJECT ? __OPTION_SETTING_NS_Start + 0x68 : __OPTION_SETTING_NS_Start;
-        KEEP(*(.option_setting_pbps2))
-        __OPTION_SETTING_NS_End = .;
-    } > OPTION_SETTING = 0xFF
-
-    /* Symbol required for RA Configuration tool. */
-    __tz_OPTION_SETTING_S_S = ORIGIN(OPTION_SETTING_S);
-
-    .option_setting_s :
-    {
-        __OPTION_SETTING_S_Start = .;
-        KEEP(*(.option_setting_ofs1_sec))
-        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x10 : __OPTION_SETTING_S_Start;
-        KEEP(*(.option_setting_banksel_sec))
-        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x40 : __OPTION_SETTING_S_Start;
-        KEEP(*(.option_setting_bps_sec0))
-        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x44 : __OPTION_SETTING_S_Start;
-        KEEP(*(.option_setting_bps_sec1))
-        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x48 : __OPTION_SETTING_S_Start;
-        KEEP(*(.option_setting_bps_sec2))
-        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x60 : __OPTION_SETTING_S_Start;
-        KEEP(*(.option_setting_pbps_sec0))
-        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x64 : __OPTION_SETTING_S_Start;
-        KEEP(*(.option_setting_pbps_sec1))
-        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x68 : __OPTION_SETTING_S_Start;
-        KEEP(*(.option_setting_pbps_sec2))
-        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x80 : __OPTION_SETTING_S_Start;
-        KEEP(*(.option_setting_ofs1_sel))
-        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0x90 : __OPTION_SETTING_S_Start;
-        KEEP(*(.option_setting_banksel_sel))
-        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0xC0 : __OPTION_SETTING_S_Start;
-        KEEP(*(.option_setting_bps_sel0))
-        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0xC4 : __OPTION_SETTING_S_Start;
-        KEEP(*(.option_setting_bps_sel1))
-        . = __TZ_S_PROJECT ? __OPTION_SETTING_S_Start + 0xC8 : __OPTION_SETTING_S_Start;
-        KEEP(*(.option_setting_bps_sel2))
-        __OPTION_SETTING_S_End = .;
-    } > OPTION_SETTING_S = 0xFF
-
-    /* Symbol required for RA Configuration tool. */
-    __tz_OPTION_SETTING_S_N = __OPTION_SETTING_S_End;
-}
diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c
index 42cb2d4a4..82d7a60c5 100644
--- a/hw/bsp/ra/family.c
+++ b/hw/bsp/ra/family.c
@@ -49,9 +49,9 @@
 #include "board.h"
 
 /* Key code for writing PRCR register. */
-#define BSP_PRV_PRCR_KEY	 (0xA500U)
+#define BSP_PRV_PRCR_KEY	       (0xA500U)
 #define BSP_PRV_PRCR_PRC1_UNLOCK ((BSP_PRV_PRCR_KEY) | 0x2U)
-#define BSP_PRV_PRCR_LOCK	 ((BSP_PRV_PRCR_KEY) | 0x0U)
+#define BSP_PRV_PRCR_LOCK	       ((BSP_PRV_PRCR_KEY) | 0x0U)
 
 /* ISR prototypes */
 void usbfs_interrupt_handler(void);
@@ -59,26 +59,87 @@ void usbfs_resume_handler(void);
 void usbfs_d0fifo_handler(void);
 void usbfs_d1fifo_handler(void);
 
-BSP_DONT_REMOVE const
-fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = {
+const fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = {
     [0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */
     [1] = usbfs_resume_handler,    /* USBFS RESUME (USBFS resume interrupt) */
     [2] = usbfs_d0fifo_handler,    /* USBFS FIFO 0 (DMA transfer request 0) */
     [3] = usbfs_d1fifo_handler,    /* USBFS FIFO 1 (DMA transfer request 1) */
 };
 const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENTRIES] = {
-  [0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT),    /* USBFS INT (USBFS interrupt) */
-  [1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */
-  [2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */
-  [3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1)  /* USBFS FIFO 1 (DMA transfer request 1) */
+    [0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT),    /* USBFS INT (USBFS interrupt) */
+    [1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */
+    [2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */
+    [3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1)  /* USBFS FIFO 1 (DMA transfer request 1) */
 };
 
-const ioport_cfg_t g_bsp_pin_cfg = {
-  .number_of_pins = sizeof(board_pin_cfg) / sizeof(ioport_pin_cfg_t),
-  .p_pin_cfg_data = board_pin_cfg,
+static const ioport_cfg_t family_pin_cfg = {
+    .number_of_pins = sizeof(board_pin_cfg) / sizeof(ioport_pin_cfg_t),
+    .p_pin_cfg_data = board_pin_cfg,
 };
-ioport_instance_ctrl_t g_ioport_ctrl;
-//const ioport_instance_t g_ioport = {.p_api = &g_ioport_on_ioport, .p_ctrl = &g_ioport_ctrl, .p_cfg = &g_bsp_pin_cfg};
+static ioport_instance_ctrl_t port_ctrl;
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_init(void)
+{
+  /* Configure pins. */
+  R_IOPORT_Open(&port_ctrl, &family_pin_cfg);
+
+  board_led_write(false);
+
+  /* Enable USB_BASE */
+  R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_PRC1_UNLOCK;
+  R_MSTP->MSTPCRB &= ~(1U << 11U);
+  R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK;
+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+#endif
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+  SysTick_Config(SystemCoreClock / 1000);
+#endif
+}
+
+void board_led_write(bool state) {
+  R_IOPORT_PinWrite(&port_ctrl, LED1, state ? LED_STATE_ON : !LED_STATE_ON);
+}
+
+uint32_t board_button_read(void) {
+  bsp_io_level_t lvl;
+  R_IOPORT_PinRead(&port_ctrl, SW1, &lvl);
+  return lvl == BUTTON_STATE_ACTIVE;
+}
+
+int board_uart_read(uint8_t *buf, int len) {
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+int board_uart_write(void const *buf, int len) {
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+
+void SysTick_Handler(void) {
+  system_ticks++;
+}
+
+uint32_t board_millis(void) {
+  return system_ticks;
+}
+#endif
 
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
@@ -139,93 +200,29 @@ void usbfs_d1fifo_handler(void)
 #endif
 }
 
-void board_init(void)
-{
-  /* Configure pins. */
-  R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg);
-
-  /* Enable USB_BASE */
-  R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_PRC1_UNLOCK;
-  R_MSTP->MSTPCRB &= ~(1U << 11U);
-  R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK;
-
-#if CFG_TUSB_OS == OPT_OS_FREERTOS
-  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
-  NVIC_SetPriority(TU_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-  NVIC_SetPriority(USBFS_RESUME_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-  NVIC_SetPriority(USBFS_FIFO_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-  NVIC_SetPriority(USBFS_FIFO_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-#endif
-
-#if CFG_TUSB_OS == OPT_OS_NONE
-  /* Init systick */
-  SysTick_Config(SystemCoreClock / 1000);
-#endif
-}
-
 //--------------------------------------------------------------------+
-// Board porting API
+// stdlib
 //--------------------------------------------------------------------+
 
-void board_led_write(bool state)
-{
-  R_IOPORT_PinWrite(&g_ioport_ctrl, LED1, state ? LED_STATE_ON : !LED_STATE_ON);
-}
-
-uint32_t board_button_read(void)
-{
-  bsp_io_level_t lvl;
-  R_IOPORT_PinRead(&g_ioport_ctrl, SW1, &lvl);
-  return lvl == BUTTON_STATE_ACTIVE;
-}
-
-int board_uart_read(uint8_t *buf, int len)
-{
-  (void) buf;
-  (void) len;
-  return 0;
-}
-
-int board_uart_write(void const *buf, int len)
-{
-  (void) buf;
-  (void) len;
-  return 0;
-}
-
-#if CFG_TUSB_OS == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-void SysTick_Handler(void)
-{
-  system_ticks++;
-}
-
-uint32_t board_millis(void)
-{
-  return system_ticks;
-}
-#endif
-
-int close(int fd)
-{
+int close(int fd) {
   (void) fd;
   return -1;
 }
-int fstat(int fd, void *pstat)
-{
+
+int fstat(int fd, void *pstat) {
   (void) fd;
   (void) pstat;
   return 0;
 }
-off_t lseek(int fd, off_t pos, int whence)
-{
+
+off_t lseek(int fd, off_t pos, int whence) {
   (void) fd;
   (void) pos;
   (void) whence;
   return 0;
 }
-int isatty(int fd)
-{
+
+int isatty(int fd) {
   (void) fd;
   return 1;
 }
diff --git a/hw/bsp/ra/family.cmake b/hw/bsp/ra/family.cmake
index c4c25bf4f..57e05a4b1 100644
--- a/hw/bsp/ra/family.cmake
+++ b/hw/bsp/ra/family.cmake
@@ -9,6 +9,7 @@ set(FSP_RA ${TOP}/hw/mcu/renesas/fsp/ra/fsp)
 
 # include board specific
 include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+#set(FREERTOS_PORT A_CUSTOM_PORT CACHE INTERNAL "")
 
 set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
@@ -58,10 +59,15 @@ function(add_board_target BOARD_TARGET)
 
     update_board(${BOARD_TARGET})
 
+    if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+      set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/gcc/${MCU_VARIANT}.ld)
+    endif ()
+
     if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
       target_link_options(${BOARD_TARGET} PUBLIC
         # linker file
         "LINKER:--script=${LD_FILE_GNU}"
+        -L${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/gcc
         -nostartfiles
         # nanolib
         --specs=nano.specs
@@ -98,7 +104,16 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     )
 
-  # Add TinyUSB target and port source
+#  # RA has custom freertos port
+#  if (NOT TARGET freertos_kernel_port)
+#    add_library(freertos_kernel_port STATIC)
+#    target_sources(freertos_kernel_port PUBLIC ${FSP_RA}/src/rm_freertos_port/port.c)
+#    target_include_directories(freertos_kernel_port PUBLIC ${FSP_RA}/src/rm_freertos_port)
+#
+#    target_link_libraries(freertos_kernel_port PUBLIC freertos_kernel)
+#  endif ()
+
+    # Add TinyUSB target and port source
   family_add_tinyusb(${TARGET} OPT_MCU_RAXXX ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/renesas/rusb2/dcd_rusb2.c
diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk
index 8e4f80eaf..6e90583e7 100644
--- a/hw/bsp/ra/family.mk
+++ b/hw/bsp/ra/family.mk
@@ -43,6 +43,11 @@ INC += \
 	$(TOP)/$(FSP_RA)/inc/instances \
 	$(TOP)/$(FSP_RA)/src/bsp/mcu/$(MCU_VARIANT) \
 
+ifndef LD_FILE
+LD_FILE = $(FAMILY_PATH)/linker/gcc/$(MCU_VARIANT).ld
+LDFLAGS += -L$(TOP)/$(FAMILY_PATH)/linker/gcc
+endif
+
 # For freeRTOS port source
 # hack to use the port provided by renesas
 FREERTOS_PORTABLE_SRC = $(FSP_RA)/src/rm_freertos_port
diff --git a/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld b/hw/bsp/ra/linker/gcc/fsp.ld
similarity index 97%
rename from hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld
rename to hw/bsp/ra/linker/gcc/fsp.ld
index 63c1d33aa..453d46f24 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/ra4m1_ek.ld
+++ b/hw/bsp/ra/linker/gcc/fsp.ld
@@ -1,29 +1,3 @@
-/* generated memory regions file - do not edit */
-RAM_START = 0x20000000;
-RAM_LENGTH = 0x8000;
-FLASH_START = 0x00000000;
-FLASH_LENGTH = 0x40000;
-DATA_FLASH_START = 0x40100000;
-DATA_FLASH_LENGTH = 0x2000;
-OPTION_SETTING_START = 0x00000000;
-OPTION_SETTING_LENGTH = 0x0;
-OPTION_SETTING_S_START = 0x80000000;
-OPTION_SETTING_S_LENGTH = 0x0;
-ID_CODE_START = 0x01010018;
-ID_CODE_LENGTH = 0x20;
-SDRAM_START = 0x80010000;
-SDRAM_LENGTH = 0x0;
-QSPI_FLASH_START = 0x60000000;
-QSPI_FLASH_LENGTH = 0x0;
-OSPI_DEVICE_0_START = 0x80020000;
-OSPI_DEVICE_0_LENGTH = 0x0;
-OSPI_DEVICE_1_START = 0x80030000;
-OSPI_DEVICE_1_LENGTH = 0x0;
-
-/*
-                  Linker File for Renesas FSP
-*/
-
 /* Uncomment and set XIP_SECONDARY_SLOT_IMAGE to 1 below for the secondary XIP application image.*/
 /*
  XIP_SECONDARY_SLOT_IMAGE = 1;
@@ -629,6 +603,11 @@ SECTIONS
     /* Note: There are no secure/non-secure boundaries for ID_CODE.  These symbols are provided for the RA configuration tool. */
     __tz_ID_CODE_S = ORIGIN(ID_CODE);
 
+    /* Note: There are no secure/non-secure boundaries for ID_CODE.  These symbols are provided for the RA configuration tool.
+     *       Set this symbol to the same value as __tz_ID_CODE_S so the RA configuration tool does not split the ID_CODE
+     *       memory region between TrustZone projects. */
+    __tz_ID_CODE_N = __tz_ID_CODE_S;
+
     .id_code :
     {
         __ID_Code_Start = .;
@@ -636,8 +615,6 @@ SECTIONS
         __ID_Code_End = .;
     } > ID_CODE
 
-    /* Note: There are no secure/non-secure boundaries for ID_CODE.  These symbols are provided for the RA configuration tool. */
-    __tz_ID_CODE_N = __ID_Code_End;
 
     /* Symbol required for RA Configuration tool. */
     __tz_OPTION_SETTING_S = ORIGIN(OPTION_SETTING_OFS);
diff --git a/hw/bsp/ra/linker/gcc/ra4m1.ld b/hw/bsp/ra/linker/gcc/ra4m1.ld
new file mode 100644
index 000000000..218acbb2a
--- /dev/null
+++ b/hw/bsp/ra/linker/gcc/ra4m1.ld
@@ -0,0 +1,22 @@
+RAM_START = 0x20000000;
+RAM_LENGTH = 0x8000;
+FLASH_START = 0x00000000;
+FLASH_LENGTH = 0x40000;
+DATA_FLASH_START = 0x40100000;
+DATA_FLASH_LENGTH = 0x2000;
+OPTION_SETTING_START = 0x00000000;
+OPTION_SETTING_LENGTH = 0x0;
+OPTION_SETTING_S_START = 0x80000000;
+OPTION_SETTING_S_LENGTH = 0x0;
+ID_CODE_START = 0x01010018;
+ID_CODE_LENGTH = 0x20;
+SDRAM_START = 0x80010000;
+SDRAM_LENGTH = 0x0;
+QSPI_FLASH_START = 0x60000000;
+QSPI_FLASH_LENGTH = 0x0;
+OSPI_DEVICE_0_START = 0x80020000;
+OSPI_DEVICE_0_LENGTH = 0x0;
+OSPI_DEVICE_1_START = 0x80030000;
+OSPI_DEVICE_1_LENGTH = 0x0;
+
+INCLUDE fsp.ld
diff --git a/hw/bsp/ra/linker/gcc/ra4m3.ld b/hw/bsp/ra/linker/gcc/ra4m3.ld
new file mode 100644
index 000000000..7b3a63fbe
--- /dev/null
+++ b/hw/bsp/ra/linker/gcc/ra4m3.ld
@@ -0,0 +1,22 @@
+RAM_START = 0x20000000;
+RAM_LENGTH = 0x20000;
+FLASH_START = 0x00000000;
+FLASH_LENGTH = 0x100000;
+DATA_FLASH_START = 0x08000000;
+DATA_FLASH_LENGTH = 0x2000;
+OPTION_SETTING_START = 0x0100A100;
+OPTION_SETTING_LENGTH = 0x100;
+OPTION_SETTING_S_START = 0x0100A200;
+OPTION_SETTING_S_LENGTH = 0x100;
+ID_CODE_START = 0x00000000;
+ID_CODE_LENGTH = 0x0;
+SDRAM_START = 0x80010000;
+SDRAM_LENGTH = 0x0;
+QSPI_FLASH_START = 0x60000000;
+QSPI_FLASH_LENGTH = 0x4000000;
+OSPI_DEVICE_0_START = 0x80020000;
+OSPI_DEVICE_0_LENGTH = 0x0;
+OSPI_DEVICE_1_START = 0x80030000;
+OSPI_DEVICE_1_LENGTH = 0x0;
+
+INCLUDE fsp.ld
diff --git a/hw/bsp/ra/linker/gcc/ra6m1.ld b/hw/bsp/ra/linker/gcc/ra6m1.ld
new file mode 100644
index 000000000..91d27f74c
--- /dev/null
+++ b/hw/bsp/ra/linker/gcc/ra6m1.ld
@@ -0,0 +1,22 @@
+RAM_START = 0x1FFE0000;
+RAM_LENGTH = 0x40000;
+FLASH_START = 0x00000000;
+FLASH_LENGTH = 0x80000;
+DATA_FLASH_START = 0x40100000;
+DATA_FLASH_LENGTH = 0x2000;
+OPTION_SETTING_START = 0x00000000;
+OPTION_SETTING_LENGTH = 0x0;
+OPTION_SETTING_S_START = 0x80000000;
+OPTION_SETTING_S_LENGTH = 0x0;
+ID_CODE_START = 0x0100A150;
+ID_CODE_LENGTH = 0x10;
+SDRAM_START = 0x80010000;
+SDRAM_LENGTH = 0x0;
+QSPI_FLASH_START = 0x60000000;
+QSPI_FLASH_LENGTH = 0x4000000;
+OSPI_DEVICE_0_START = 0x80020000;
+OSPI_DEVICE_0_LENGTH = 0x0;
+OSPI_DEVICE_1_START = 0x80030000;
+OSPI_DEVICE_1_LENGTH = 0x0;
+
+INCLUDE fsp.ld
diff --git a/tools/cmake/cpu/cortex-m4.cmake b/tools/cmake/cpu/cortex-m4.cmake
index a0cf3498f..4e9bc242d 100644
--- a/tools/cmake/cpu/cortex-m4.cmake
+++ b/tools/cmake/cpu/cortex-m4.cmake
@@ -6,7 +6,9 @@ if (TOOLCHAIN STREQUAL "gcc")
     -mfpu=fpv4-sp-d16
     )
 
-  set(FREERTOS_PORT GCC_ARM_CM4F CACHE INTERNAL "")
+  if (NOT DEFINED FREERTOS_PORT)
+    set(FREERTOS_PORT GCC_ARM_CM4F CACHE INTERNAL "")
+  endif ()
 
 elseif (TOOLCHAIN STREQUAL "iar")
   set(TOOLCHAIN_COMMON_FLAGS
@@ -14,6 +16,8 @@ elseif (TOOLCHAIN STREQUAL "iar")
     --fpu VFPv4
     )
 
-  set(FREERTOS_PORT IAR_ARM_CM4F CACHE INTERNAL "")
+  if (NOT DEFINED FREERTOS_PORT)
+    set(FREERTOS_PORT IAR_ARM_CM4F CACHE INTERNAL "")
+  endif ()
 
 endif ()

From 50381f7b4caf2d5ee10de16e9cf7bf2fb113364a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 1 Jul 2023 17:08:20 +0700
Subject: [PATCH 466/691] refactor to match fsp_cfg

---
 .../ra/boards/ra4m1_ek/fsp_cfg/{ => bsp}/bsp_cfg.h  |  0
 .../ra4m1_ek/fsp_cfg/{ => bsp}/bsp_clock_cfg.h      |  0
 .../ra4m1_ek/fsp_cfg/{ => bsp}/bsp_mcu_device_cfg.h |  0
 .../fsp_cfg/{ => bsp}/bsp_mcu_device_pn_cfg.h       |  0
 .../ra4m1_ek/fsp_cfg/{ => bsp}/bsp_mcu_family_cfg.h |  0
 .../ra/boards/ra4m3_ek/fsp_cfg/{ => bsp}/bsp_cfg.h  |  0
 .../ra4m3_ek/fsp_cfg/{ => bsp}/bsp_clock_cfg.h      |  0
 .../ra4m3_ek/fsp_cfg/{ => bsp}/bsp_mcu_family_cfg.h |  0
 hw/bsp/ra/boards/ra6m1_ek/board.cmake               | 13 +++++++++++++
 hw/bsp/ra/family.cmake                              |  1 +
 hw/bsp/ra/family.mk                                 |  1 +
 11 files changed, 15 insertions(+)
 rename hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/{ => bsp}/bsp_cfg.h (100%)
 rename hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/{ => bsp}/bsp_clock_cfg.h (100%)
 rename hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/{ => bsp}/bsp_mcu_device_cfg.h (100%)
 rename hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/{ => bsp}/bsp_mcu_device_pn_cfg.h (100%)
 rename hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/{ => bsp}/bsp_mcu_family_cfg.h (100%)
 rename hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/{ => bsp}/bsp_cfg.h (100%)
 mode change 100755 => 100644
 rename hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/{ => bsp}/bsp_clock_cfg.h (100%)
 rename hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/{ => bsp}/bsp_mcu_family_cfg.h (100%)
 create mode 100644 hw/bsp/ra/boards/ra6m1_ek/board.cmake

diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h
similarity index 100%
rename from hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_cfg.h
rename to hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h
diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h
similarity index 100%
rename from hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h
rename to hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h
diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h
similarity index 100%
rename from hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_cfg.h
rename to hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h
diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_pn_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h
similarity index 100%
rename from hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_device_pn_cfg.h
rename to hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h
diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h
similarity index 100%
rename from hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_mcu_family_cfg.h
rename to hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h
diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h
old mode 100755
new mode 100644
similarity index 100%
rename from hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_cfg.h
rename to hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h
diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_clock_cfg.h
similarity index 100%
rename from hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_clock_cfg.h
rename to hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_clock_cfg.h
diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h
similarity index 100%
rename from hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_mcu_family_cfg.h
rename to hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h
diff --git a/hw/bsp/ra/boards/ra6m1_ek/board.cmake b/hw/bsp/ra/boards/ra6m1_ek/board.cmake
new file mode 100644
index 000000000..0d599b2da
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m1_ek/board.cmake
@@ -0,0 +1,13 @@
+set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
+set(MCU_VARIANT ra6m1)
+
+set(JLINK_DEVICE R7FA6M1AD)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    )
+  target_sources(${TARGET} PRIVATE
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    )
+endfunction()
diff --git a/hw/bsp/ra/family.cmake b/hw/bsp/ra/family.cmake
index 57e05a4b1..cf7dfad55 100644
--- a/hw/bsp/ra/family.cmake
+++ b/hw/bsp/ra/family.cmake
@@ -49,6 +49,7 @@ function(add_board_target BOARD_TARGET)
       ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
       ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
       ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/fsp_cfg
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/fsp_cfg/bsp
       ${CMSIS_DIR}/CMSIS/Core/Include
       ${FSP_RA}/inc
       ${FSP_RA}/inc/api
diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk
index 6e90583e7..03125aac5 100644
--- a/hw/bsp/ra/family.mk
+++ b/hw/bsp/ra/family.mk
@@ -37,6 +37,7 @@ INC += \
 	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
 	$(TOP)/$(BOARD_PATH) \
 	$(TOP)/$(BOARD_PATH)/fsp_cfg \
+	$(TOP)/$(BOARD_PATH)/fsp_cfg/bsp \
 	$(TOP)/$(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Include \
 	$(TOP)/$(FSP_RA)/inc \
 	$(TOP)/$(FSP_RA)/inc/api \

From c5d958d104d4ded1554876cf86aec85dc98a1b37 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 1 Jul 2023 17:27:45 +0700
Subject: [PATCH 467/691] add ra6m1 board

---
 .../ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h  |  4 +
 .../ra4m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h |  5 --
 hw/bsp/ra/boards/ra6m1_ek/board.h             | 53 ++++++++++++
 .../ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h  | 77 +++++++++++++++++
 .../ra6m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h      | 23 +++++
 .../ra6m1_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h |  5 ++
 .../fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h       | 11 +++
 .../ra6m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h | 84 +++++++++++++++++++
 .../boards/ra6m1_ek/fsp_cfg/bsp/bsp_pin_cfg.h | 16 ++++
 .../ra/boards/ra6m1_ek/fsp_cfg/r_ioport_cfg.h |  7 ++
 .../ra/boards/ra6m1_ek/fsp_cfg/vector_data.h  |  5 ++
 11 files changed, 285 insertions(+), 5 deletions(-)
 create mode 100644 hw/bsp/ra/boards/ra6m1_ek/board.h
 create mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_pin_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/r_ioport_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/vector_data.h

diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h
index b337e49f2..700d9b29f 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h
+++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h
@@ -31,7 +31,11 @@
 #define BSP_CLOCK_CFG_SUBCLOCK_POPULATED	(1)
 #define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000
 
+#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK 0
+
 #define BSP_FEATURE_TFU_SUPPORTED 0
+#define BSP_TZ_SECURE_BUILD    (0)
+#define BSP_TZ_NONSECURE_BUILD (0)
 
 // for SystemInit()
 void bsp_init(void * p_args);
diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h
index 4e080023e..3bde2db0d 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h
+++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h
@@ -25,11 +25,6 @@
 #define BSP_CORTEX_VECTOR_TABLE_ENTRIES    (16U)
 #define BSP_VECTOR_TABLE_MAX_ENTRIES       (48U)
 
-#define BSP_TZ_SECURE_BUILD    (0)
-#define BSP_TZ_NONSECURE_BUILD (0)
-
-#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK 0
-
 #define OFS_SEQ1 0xA001A001 | (1 << 1) | (3 << 2)
 #define OFS_SEQ2 (15 << 4) | (3 << 8) | (3 << 10)
 #define OFS_SEQ3 (1 << 12) | (1 << 14) | (1 << 17)
diff --git a/hw/bsp/ra/boards/ra6m1_ek/board.h b/hw/bsp/ra/boards/ra6m1_ek/board.h
new file mode 100644
index 000000000..982a78e52
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m1_ek/board.h
@@ -0,0 +1,53 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LED1          BSP_IO_PORT_01_PIN_12
+#define LED_STATE_ON  1
+
+#define SW1                   BSP_IO_PORT_04_PIN_15
+#define BUTTON_STATE_ACTIVE   0
+
+const ioport_pin_cfg_t board_pin_cfg[] = {
+    {.pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT},
+    {.pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT},
+    // USB D+, D-, VBus
+    {.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
+    {.pin = BSP_IO_PORT_09_PIN_14, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
+    {.pin = BSP_IO_PORT_09_PIN_15, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h
new file mode 100644
index 000000000..c2b23b16c
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h
@@ -0,0 +1,77 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_CFG_H_
+#define BSP_CFG_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "bsp_clock_cfg.h"
+#include "bsp_mcu_family_cfg.h"
+
+#define RA_NOT_DEFINED 0
+#ifndef BSP_CFG_RTOS
+#if (RA_NOT_DEFINED) != (2)
+#define BSP_CFG_RTOS (2)
+#elif (RA_NOT_DEFINED) != (RA_NOT_DEFINED)
+  #define BSP_CFG_RTOS (1)
+#else
+  #define BSP_CFG_RTOS (0)
+#endif
+#endif
+
+#ifndef BSP_CFG_RTC_USED
+#define BSP_CFG_RTC_USED (RA_NOT_DEFINED)
+#endif
+
+#undef RA_NOT_DEFINED
+#if defined(_RA_BOOT_IMAGE)
+  #define BSP_CFG_BOOT_IMAGE (1)
+#endif
+
+#define BSP_CFG_MCU_VCC_MV (3300)
+#define BSP_CFG_STACK_MAIN_BYTES (0x400)
+#define BSP_CFG_HEAP_BYTES (0x1000)
+#define BSP_CFG_PARAM_CHECKING_ENABLE (1)
+#define BSP_CFG_ASSERT (0)
+#define BSP_CFG_ERROR_LOG (0)
+
+#define BSP_CFG_PFS_PROTECT ((1))
+
+#define BSP_CFG_C_RUNTIME_INIT ((1))
+#define BSP_CFG_EARLY_INIT     ((0))
+
+#define BSP_CFG_STARTUP_CLOCK_REG_NOT_RESET ((0))
+
+#ifndef BSP_CLOCK_CFG_MAIN_OSC_POPULATED
+#define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (1)
+#endif
+
+#ifndef BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE
+#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE (0)
+#endif
+#ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
+#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (0)
+#endif
+#ifndef BSP_CLOCK_CFG_SUBCLOCK_POPULATED
+#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (1)
+#endif
+#ifndef BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS
+#define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000
+#endif
+
+#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK 0
+#define BSP_FEATURE_TFU_SUPPORTED 0
+#define BSP_TZ_SECURE_BUILD    (0)
+#define BSP_TZ_NONSECURE_BUILD (0)
+
+#define BSP_CFG_USE_LOW_VOLTAGE_MODE 0
+
+// for SystemInit()
+void bsp_init(void * p_args);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BSP_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h
new file mode 100644
index 000000000..1cdfae949
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h
@@ -0,0 +1,23 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_CLOCK_CFG_H_
+#define BSP_CLOCK_CFG_H_
+#define BSP_CFG_CLOCKS_SECURE (0)
+#define BSP_CFG_CLOCKS_OVERRIDE (0)
+#define BSP_CFG_XTAL_HZ (12000000) /* XTAL 12000000Hz */
+#define BSP_CFG_PLL_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL Src: XTAL */
+#define BSP_CFG_HOCO_FREQUENCY (2) /* HOCO 20MHz */
+#define BSP_CFG_PLL_DIV (BSP_CLOCKS_PLL_DIV_1) /* PLL Div /1 */
+#define BSP_CFG_PLL_MUL BSP_CLOCKS_PLL_MUL_20_0 /* PLL Mul x20.0 */
+#define BSP_CFG_CLOCK_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_PLL) /* Clock Src: PLL */
+#define BSP_CFG_ICLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* ICLK Div /2 */
+#define BSP_CFG_PCLKA_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* PCLKA Div /2 */
+#define BSP_CFG_PCLKB_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* PCLKB Div /4 */
+#define BSP_CFG_PCLKC_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* PCLKC Div /4 */
+#define BSP_CFG_PCLKD_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* PCLKD Div /2 */
+#define BSP_CFG_BCLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* BCLK Div /2 */
+#define BSP_CFG_BCLK_OUTPUT (2) /* EBCLK Div /2 */
+#define BSP_CFG_UCK_DIV (BSP_CLOCKS_USB_CLOCK_DIV_5) /* UCLK Div /5 */
+#define BSP_CFG_FCLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* FCLK Div /4 */
+#define BSP_CFG_CLKOUT_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* CLKOUT Disabled */
+#define BSP_CFG_CLKOUT_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* CLKOUT Div /1 */
+#endif /* BSP_CLOCK_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h
new file mode 100644
index 000000000..bd6a901c3
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h
@@ -0,0 +1,5 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_MCU_DEVICE_CFG_H_
+#define BSP_MCU_DEVICE_CFG_H_
+#define BSP_CFG_MCU_PART_SERIES (6)
+#endif /* BSP_MCU_DEVICE_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h
new file mode 100644
index 000000000..40bb3a3bf
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h
@@ -0,0 +1,11 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_MCU_DEVICE_PN_CFG_H_
+#define BSP_MCU_DEVICE_PN_CFG_H_
+#define BSP_MCU_R7FA6M1AD3CFP
+#define BSP_MCU_FEATURE_SET ('A')
+#define BSP_ROM_SIZE_BYTES (524288)
+#define BSP_RAM_SIZE_BYTES (262144)
+#define BSP_DATA_FLASH_SIZE_BYTES (8192)
+#define BSP_PACKAGE_LQFP
+#define BSP_PACKAGE_PINS (100)
+#endif /* BSP_MCU_DEVICE_PN_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h
new file mode 100644
index 000000000..5fedd754f
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h
@@ -0,0 +1,84 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_MCU_FAMILY_CFG_H_
+#define BSP_MCU_FAMILY_CFG_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "bsp_mcu_device_pn_cfg.h"
+#include "bsp_mcu_device_cfg.h"
+#include "../../../ra/fsp/src/bsp/mcu/ra6m1/bsp_mcu_info.h"
+#include "bsp_clock_cfg.h"
+
+#define BSP_MCU_GROUP_RA6M1 (1)
+#define BSP_LOCO_HZ                 (32768)
+#define BSP_MOCO_HZ                 (8000000)
+#define BSP_SUB_CLOCK_HZ            (32768)
+#if   BSP_CFG_HOCO_FREQUENCY == 0
+#define BSP_HOCO_HZ                 (16000000)
+#elif BSP_CFG_HOCO_FREQUENCY == 1
+  #define BSP_HOCO_HZ                 (18000000)
+#elif BSP_CFG_HOCO_FREQUENCY == 2
+  #define BSP_HOCO_HZ                 (20000000)
+#else
+  #error "Invalid HOCO frequency chosen (BSP_CFG_HOCO_FREQUENCY) in bsp_clock_cfg.h"
+#endif
+
+#define BSP_CFG_FLL_ENABLE                 (0)
+
+#define BSP_CORTEX_VECTOR_TABLE_ENTRIES    (16U)
+#define BSP_VECTOR_TABLE_MAX_ENTRIES       (112U)
+
+#define OFS_SEQ1 0xA001A001 | (1 << 1) | (3 << 2)
+#define OFS_SEQ2 (15 << 4) | (3 << 8) | (3 << 10)
+#define OFS_SEQ3 (1 << 12) | (1 << 14) | (1 << 17)
+#define OFS_SEQ4 (3 << 18) |(15 << 20) | (3 << 24) | (3 << 26)
+#define OFS_SEQ5 (1 << 28) | (1 << 30)
+#define BSP_CFG_ROM_REG_OFS0 (OFS_SEQ1 | OFS_SEQ2 | OFS_SEQ3 | OFS_SEQ4 | OFS_SEQ5)
+#define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (3) |  (1 << 8))
+#define BSP_CFG_ROM_REG_MPU_PC0_ENABLE (1)
+#define BSP_CFG_ROM_REG_MPU_PC0_START (0xFFFFFFFC)
+#define BSP_CFG_ROM_REG_MPU_PC0_END (0xFFFFFFFF)
+#define BSP_CFG_ROM_REG_MPU_PC1_ENABLE (1)
+#define BSP_CFG_ROM_REG_MPU_PC1_START (0xFFFFFFFC)
+#define BSP_CFG_ROM_REG_MPU_PC1_END (0xFFFFFFFF)
+#define BSP_CFG_ROM_REG_MPU_REGION0_ENABLE (1)
+#define BSP_CFG_ROM_REG_MPU_REGION0_START (0x00FFFFFC)
+#define BSP_CFG_ROM_REG_MPU_REGION0_END (0x00FFFFFF)
+#define BSP_CFG_ROM_REG_MPU_REGION1_ENABLE (1)
+#define BSP_CFG_ROM_REG_MPU_REGION1_START (0x200FFFFC)
+#define BSP_CFG_ROM_REG_MPU_REGION1_END (0x200FFFFF)
+#define BSP_CFG_ROM_REG_MPU_REGION2_ENABLE (1)
+#define BSP_CFG_ROM_REG_MPU_REGION2_START (0x407FFFFC)
+#define BSP_CFG_ROM_REG_MPU_REGION2_END (0x407FFFFF)
+#define BSP_CFG_ROM_REG_MPU_REGION3_ENABLE (1)
+#define BSP_CFG_ROM_REG_MPU_REGION3_START (0x400DFFFC)
+#define BSP_CFG_ROM_REG_MPU_REGION3_END (0x400DFFFF)
+#ifndef BSP_CLOCK_CFG_MAIN_OSC_WAIT
+#define BSP_CLOCK_CFG_MAIN_OSC_WAIT (9)
+#endif
+/* Used to create IELS values for the interrupt initialization table g_interrupt_event_link_select. */
+#define BSP_PRV_IELS_ENUM(vector)    (ELC_ ## vector)
+
+/*
+ ID Code
+ Note: To permanently lock and disable the debug interface define the BSP_ID_CODE_PERMANENTLY_LOCKED in the compiler settings.
+ WARNING: This will disable debug access to the part and cannot be reversed by a debug probe.
+ */
+#if defined(BSP_ID_CODE_PERMANENTLY_LOCKED)
+  #define BSP_CFG_ID_CODE_LONG_1 (0x00000000)
+  #define BSP_CFG_ID_CODE_LONG_2 (0x00000000)
+  #define BSP_CFG_ID_CODE_LONG_3 (0x00000000)
+  #define BSP_CFG_ID_CODE_LONG_4 (0x00000000)
+#else
+  /* ID CODE: FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF */
+  #define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF)
+  #define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF)
+  #define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF)
+  #define BSP_CFG_ID_CODE_LONG_4 (0xffFFFFFF)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* BSP_MCU_FAMILY_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_pin_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_pin_cfg.h
new file mode 100644
index 000000000..95ceca3e2
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_pin_cfg.h
@@ -0,0 +1,16 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_PIN_CFG_H_
+#define BSP_PIN_CFG_H_
+#include "r_ioport.h"
+
+/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
+FSP_HEADER
+
+extern const ioport_cfg_t g_bsp_pin_cfg; /* RA6M1-EK.pincfg */
+
+void BSP_PinConfigSecurityInit();
+
+/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
+FSP_FOOTER
+
+#endif /* BSP_PIN_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/r_ioport_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/r_ioport_cfg.h
new file mode 100644
index 000000000..cb7c07932
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/r_ioport_cfg.h
@@ -0,0 +1,7 @@
+/* generated configuration header file - do not edit */
+#ifndef R_IOPORT_CFG_H_
+#define R_IOPORT_CFG_H_
+
+#define IOPORT_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
+
+#endif /* R_IOPORT_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/vector_data.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/vector_data.h
new file mode 100644
index 000000000..37739c12a
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/vector_data.h
@@ -0,0 +1,5 @@
+/* vector numbers are configurable/dynamic, hence this, it will be used inside the port */
+#define TU_IRQn 0
+#define USBFS_RESUME_IRQn 1
+#define USBFS_FIFO_0_IRQn 2
+#define USBFS_FIFO_1_IRQn 3

From 54dc699ddd4ff0c9ac4595ff752a97861dd434dc Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 1 Jul 2023 17:43:06 +0700
Subject: [PATCH 468/691] forgot board.mk for ra6m1

---
 hw/bsp/ra/boards/ra4m1_ek/board.mk | 1 -
 hw/bsp/ra/boards/ra4m3_ek/board.mk | 1 -
 hw/bsp/ra/boards/ra6m1_ek/board.mk | 7 +++++++
 3 files changed, 7 insertions(+), 2 deletions(-)
 create mode 100644 hw/bsp/ra/boards/ra6m1_ek/board.mk

diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.mk b/hw/bsp/ra/boards/ra4m1_ek/board.mk
index a06d75ef3..f257c0000 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/board.mk
+++ b/hw/bsp/ra/boards/ra4m1_ek/board.mk
@@ -3,6 +3,5 @@ MCU_VARIANT = ra4m1
 
 # For flash-jlink target
 JLINK_DEVICE = R7FA4M1AB
-JLINK_IF     = SWD
 
 flash: flash-jlink
diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.mk b/hw/bsp/ra/boards/ra4m3_ek/board.mk
index f2d0ecfc5..5987269b5 100644
--- a/hw/bsp/ra/boards/ra4m3_ek/board.mk
+++ b/hw/bsp/ra/boards/ra4m3_ek/board.mk
@@ -3,6 +3,5 @@ MCU_VARIANT = ra4m3
 
 # For flash-jlink target
 JLINK_DEVICE = R7FA4M3AF
-JLINK_IF     = SWD
 
 flash: flash-jlink
diff --git a/hw/bsp/ra/boards/ra6m1_ek/board.mk b/hw/bsp/ra/boards/ra6m1_ek/board.mk
new file mode 100644
index 000000000..f06b693d8
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m1_ek/board.mk
@@ -0,0 +1,7 @@
+CPU_CORE = cortex-m4
+MCU_VARIANT = ra6m1
+
+# For flash-jlink target
+JLINK_DEVICE = R7FA6M1AD
+
+flash: flash-jlink

From e7431f54f207b8563f2d8dba3384dba243d55bf4 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 1 Jul 2023 17:46:21 +0700
Subject: [PATCH 469/691] fix undef with fsp

---
 src/portable/renesas/rusb2/rusb2_ra.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/portable/renesas/rusb2/rusb2_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h
index be0a9fa66..df4afdfa0 100644
--- a/src/portable/renesas/rusb2/rusb2_ra.h
+++ b/src/portable/renesas/rusb2/rusb2_ra.h
@@ -34,6 +34,7 @@ extern "C" {
 #ifdef __GNUC__
 #pragma GCC diagnostic push
 #pragma GCC diagnostic ignored "-Wstrict-prototypes"
+#pragma GCC diagnostic ignored "-Wundef"
 
 // extra push due to https://github.com/renesas/fsp/pull/278
 #pragma GCC diagnostic push

From 14f1123bbdb221a1ff755ca64061ec72b8baca67 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 1 Jul 2023 17:55:36 +0700
Subject: [PATCH 470/691] remove left-over build_arm

---
 .github/workflows/build_arm.yml | 84 ---------------------------------
 1 file changed, 84 deletions(-)

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 0b770f379..72ddf164b 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -67,12 +67,6 @@ jobs:
          repository: hathach/linkermap
          path: linkermap
 
-    - name: Checkout pico-sdk for rp2040
-      if: matrix.family == 'rp2040'
-      run: |
-        git clone --depth 1 -b develop https://github.com/raspberrypi/pico-sdk ~/pico-sdk
-        echo >> $GITHUB_ENV PICO_SDK_PATH=~/pico-sdk
-
     - name: Get Dependencies
       run: python3 tools/get_deps.py ${{ matrix.family }}
 
@@ -87,81 +81,3 @@ jobs:
         do
           find ${ex} -name *.map -print -quit | xargs -I % sh -c 'echo "::group::%"; linkermap -v %; echo "::endgroup::"'
         done
-
-    # Upload binaries for hardware test with self-hosted
-    - name: Prepare stm32l412nucleo Artifacts
-      if: contains(matrix.family, 'stm32l4')
-      run: find examples/ -path "*stm32l412nucleo/*.elf" -exec mv {} . \;
-
-    - name: Upload Artifacts for stm32l412nucleo
-      if: contains(matrix.family, 'stm32l4') && github.repository_owner == 'hathach'
-      uses: actions/upload-artifact@v3
-      with:
-        name: stm32l4
-        path: |
-          *.elf
-
-#  # ---------------------------------------
-#  # Hardware in the loop (HIL)
-#  # Current self-hosted instance is running on an EPYC 7232 server hosted by HiFiPhile user
-#  # - STM32L412 Nucleo with on-board jlink as ttyACM0
-#  # ---------------------------------------
-#  hw-stm32l412nucleo-test:
-#    needs: build-arm
-#    runs-on: [self-hosted, Linux, X64, hifiphile]
-#
-#    steps:
-#    - name: Clean workspace
-#      run: |
-#        echo "Cleaning up previous run"
-#        rm -rf "${{ github.workspace }}"
-#        mkdir -p "${{ github.workspace }}"
-#
-#    - name: Download stm32l4 Artifacts
-#      uses: actions/download-artifact@v3
-#      with:
-#        name: stm32l4
-#
-#    - name: Create flash.sh
-#      run: |
-#        echo > flash.sh 'echo halt > flash.jlink'
-#        echo >> flash.sh 'echo r >> flash.jlink'
-#        echo >> flash.sh 'echo loadfile $1 >> flash.jlink'
-#        echo >> flash.sh 'echo r >> flash.jlink'
-#        echo >> flash.sh 'echo go >> flash.jlink'
-#        echo >> flash.sh 'echo exit >> flash.jlink'
-#        echo >> flash.sh 'cmdout=$(JLinkExe -device stm32l412kb -if swd -JTAGConf -1,-1 -speed auto -NoGui 1 -ExitOnError 1 -CommandFile flash.jlink)'
-#        echo >> flash.sh 'if (( $? )) ; then echo $cmdout ; fi'
-#        chmod +x flash.sh
-#
-#    - name: Test cdc_dual_ports
-#      run: |
-#        ./flash.sh cdc_dual_ports.elf
-#        while (! ([ -e /dev/ttyACM1 ] && [ -e /dev/ttyACM2 ])) && [ $SECONDS -le 10 ]; do :; done
-#        test -e /dev/ttyACM1 && echo "ttyACM1 exists"
-#        test -e /dev/ttyACM2 && echo "ttyACM2 exists"
-#
-#      # Debian does not auto mount usb drive. skip this test for now
-#    - name: Test cdc_msc
-#      if: false
-#      run: |
-#        ./flash.sh cdc_msc.elf
-#        readme='/media/pi/TinyUSB MSC/README.TXT'
-#        while (! ([ -e /dev/ttyACM1 ] && [ -f "$readme" ])) && [ $SECONDS -le 10 ]; do :; done
-#        test -e /dev/ttyACM1 && echo "ttyACM1 exists"
-#        test -f "$readme" && echo "$readme exists"
-#        cat "$readme"
-#
-#    - name: Test dfu
-#      run: |
-#        ./flash.sh dfu.elf
-#        while (! (dfu-util -l | grep "Found DFU")) && [ $SECONDS -le 10 ]; do :; done
-#        dfu-util -d cafe -a 0 -U dfu0
-#        dfu-util -d cafe -a 1 -U dfu1
-#        grep "TinyUSB DFU! - Partition 0" dfu0
-#        grep "TinyUSB DFU! - Partition 1" dfu1
-#
-#    - name: Test dfu_runtime
-#      run: |
-#        ./flash.sh dfu_runtime.elf
-#        while (! (dfu-util -l | grep "Found Runtime")) && [ $SECONDS -le 10 ]; do :; done

From 7d45a43f57c805f3d7b48638aee2e997bff08b96 Mon Sep 17 00:00:00 2001
From: Andrew Hooper <ahooper@kos.net>
Date: Sat, 1 Jul 2023 07:59:39 -0400
Subject: [PATCH 471/691] Correct loader file

---
 hw/bsp/stm32f4/boards/stm32f407blackvet/board.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/bsp/stm32f4/boards/stm32f407blackvet/board.mk b/hw/bsp/stm32f4/boards/stm32f407blackvet/board.mk
index a184804d3..2593978ec 100644
--- a/hw/bsp/stm32f4/boards/stm32f407blackvet/board.mk
+++ b/hw/bsp/stm32f4/boards/stm32f407blackvet/board.mk
@@ -2,7 +2,7 @@ CFLAGS += -DSTM32F407xx
 
 # GCC
 GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f407xx.s
-GCC_LD_FILE = $(BOARD_PATH)/STM32F407VGTx_FLASH.ld
+GCC_LD_FILE = $(BOARD_PATH)/STM32F407VETX_FLASH.ld
 
 # IAR
 IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f407xx.s

From ec02ddf9863ee6e1b7a464d73b6cce205c772f43 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 1 Jul 2023 21:43:52 +0700
Subject: [PATCH 472/691] initial ra6m5 ek, board_test led + sw works

---
 hw/bsp/ra/boards/ra4m1_ek/board.cmake         |   6 +-
 hw/bsp/ra/boards/ra4m3_ek/board.cmake         |   6 +-
 hw/bsp/ra/boards/ra6m1_ek/board.cmake         |   9 +-
 .../boards/ra6m1_ek/fsp_cfg/bsp/bsp_pin_cfg.h |  16 -
 hw/bsp/ra/boards/ra6m5_ek/board.cmake         |  10 +
 hw/bsp/ra/boards/ra6m5_ek/board.h             |  52 +++
 hw/bsp/ra/boards/ra6m5_ek/board.mk            |   7 +
 .../ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h  |  65 +++
 .../ra6m5_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h |   5 +
 .../fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h       |  11 +
 .../ra6m5_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h | 387 ++++++++++++++++++
 .../boards/ra6m5_ek/fsp_cfg/bsp_clock_cfg.h   |  35 ++
 .../ra/boards/ra6m5_ek/fsp_cfg/r_ioport_cfg.h |   7 +
 .../ra/boards/ra6m5_ek/fsp_cfg/vector_data.h  |   5 +
 hw/bsp/ra/family.cmake                        |   1 +
 hw/bsp/ra/linker/gcc/ra6m5.ld                 |  22 +
 16 files changed, 616 insertions(+), 28 deletions(-)
 delete mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_pin_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra6m5_ek/board.cmake
 create mode 100644 hw/bsp/ra/boards/ra6m5_ek/board.h
 create mode 100644 hw/bsp/ra/boards/ra6m5_ek/board.mk
 create mode 100644 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp_clock_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/r_ioport_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/vector_data.h
 create mode 100644 hw/bsp/ra/linker/gcc/ra6m5.ld

diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.cmake b/hw/bsp/ra/boards/ra4m1_ek/board.cmake
index 51c1f3d6c..4188d3188 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/board.cmake
+++ b/hw/bsp/ra/boards/ra4m1_ek/board.cmake
@@ -4,7 +4,7 @@ set(MCU_VARIANT ra4m1)
 set(JLINK_DEVICE R7FA4M1AB)
 
 function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC)
-  target_sources(${TARGET} PRIVATE)
-  target_include_directories(${BOARD_TARGET} PUBLIC)
+#  target_compile_definitions(${TARGET} PUBLIC)
+#  target_sources(${TARGET} PRIVATE)
+#  target_include_directories(${BOARD_TARGET} PUBLIC)
 endfunction()
diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.cmake b/hw/bsp/ra/boards/ra4m3_ek/board.cmake
index 637e99db6..dfd5fc95a 100644
--- a/hw/bsp/ra/boards/ra4m3_ek/board.cmake
+++ b/hw/bsp/ra/boards/ra4m3_ek/board.cmake
@@ -4,7 +4,7 @@ set(MCU_VARIANT ra4m3)
 set(JLINK_DEVICE R7FA4M3AF)
 
 function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC)
-  target_sources(${TARGET} PRIVATE)
-  target_include_directories(${BOARD_TARGET} PUBLIC)
+#  target_compile_definitions(${TARGET} PUBLIC)
+#  target_sources(${TARGET} PRIVATE)
+#  target_include_directories(${BOARD_TARGET} PUBLIC)
 endfunction()
diff --git a/hw/bsp/ra/boards/ra6m1_ek/board.cmake b/hw/bsp/ra/boards/ra6m1_ek/board.cmake
index 0d599b2da..b2f41a354 100644
--- a/hw/bsp/ra/boards/ra6m1_ek/board.cmake
+++ b/hw/bsp/ra/boards/ra6m1_ek/board.cmake
@@ -4,10 +4,7 @@ set(MCU_VARIANT ra6m1)
 set(JLINK_DEVICE R7FA6M1AD)
 
 function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    )
-  target_sources(${TARGET} PRIVATE
-    )
-  target_include_directories(${BOARD_TARGET} PUBLIC
-    )
+#  target_compile_definitions(${TARGET} PUBLIC)
+#  target_sources(${TARGET} PRIVATE)
+#  target_include_directories(${BOARD_TARGET} PUBLIC)
 endfunction()
diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_pin_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_pin_cfg.h
deleted file mode 100644
index 95ceca3e2..000000000
--- a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_pin_cfg.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* generated configuration header file - do not edit */
-#ifndef BSP_PIN_CFG_H_
-#define BSP_PIN_CFG_H_
-#include "r_ioport.h"
-
-/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
-FSP_HEADER
-
-extern const ioport_cfg_t g_bsp_pin_cfg; /* RA6M1-EK.pincfg */
-
-void BSP_PinConfigSecurityInit();
-
-/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
-FSP_FOOTER
-
-#endif /* BSP_PIN_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra6m5_ek/board.cmake b/hw/bsp/ra/boards/ra6m5_ek/board.cmake
new file mode 100644
index 000000000..42a4c7417
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m5_ek/board.cmake
@@ -0,0 +1,10 @@
+set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
+set(MCU_VARIANT ra6m5)
+
+set(JLINK_DEVICE R7FA6M5BH)
+
+function(update_board TARGET)
+#  target_compile_definitions(${TARGET} PUBLIC)
+#  target_sources(${TARGET} PRIVATE)
+#  target_include_directories(${BOARD_TARGET} PUBLIC)
+endfunction()
diff --git a/hw/bsp/ra/boards/ra6m5_ek/board.h b/hw/bsp/ra/boards/ra6m5_ek/board.h
new file mode 100644
index 000000000..4a1527f93
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m5_ek/board.h
@@ -0,0 +1,52 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LED1                  BSP_IO_PORT_00_PIN_08
+#define LED_STATE_ON          1
+
+#define SW1                   BSP_IO_PORT_00_PIN_05
+#define BUTTON_STATE_ACTIVE   0
+
+const ioport_pin_cfg_t board_pin_cfg[] = {
+  {.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
+  {.pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
+  {.pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
+  {.pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
+  {.pin = SW1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)},
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/hw/bsp/ra/boards/ra6m5_ek/board.mk b/hw/bsp/ra/boards/ra6m5_ek/board.mk
new file mode 100644
index 000000000..567908b63
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m5_ek/board.mk
@@ -0,0 +1,7 @@
+CPU_CORE = cortex-m33
+MCU_VARIANT = ra6m5
+
+# For flash-jlink target
+JLINK_DEVICE = R7FA6M5BH
+
+flash: flash-jlink
diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h
new file mode 100644
index 000000000..e41f603ad
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h
@@ -0,0 +1,65 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_CFG_H_
+#define BSP_CFG_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "bsp_clock_cfg.h"
+#include "bsp_mcu_family_cfg.h"
+
+#define RA_NOT_DEFINED 0
+#ifndef BSP_CFG_RTOS
+#if (RA_NOT_DEFINED) != (2)
+#define BSP_CFG_RTOS (2)
+#elif (RA_NOT_DEFINED) != (RA_NOT_DEFINED)
+  #define BSP_CFG_RTOS (1)
+#else
+  #define BSP_CFG_RTOS (0)
+#endif
+#endif
+#ifndef BSP_CFG_RTC_USED
+#define BSP_CFG_RTC_USED (RA_NOT_DEFINED)
+#endif
+#undef RA_NOT_DEFINED
+#if defined(_RA_BOOT_IMAGE)
+  #define BSP_CFG_BOOT_IMAGE (1)
+#endif
+#define BSP_CFG_MCU_VCC_MV (3300)
+#define BSP_CFG_STACK_MAIN_BYTES (0x400)
+#define BSP_CFG_HEAP_BYTES (0x1000)
+#define BSP_CFG_PARAM_CHECKING_ENABLE (1)
+#define BSP_CFG_ASSERT (0)
+#define BSP_CFG_ERROR_LOG (0)
+
+#define BSP_CFG_PFS_PROTECT ((1))
+
+#define BSP_CFG_C_RUNTIME_INIT ((1))
+#define BSP_CFG_EARLY_INIT     ((0))
+
+#define BSP_CFG_STARTUP_CLOCK_REG_NOT_RESET ((0))
+
+#ifndef BSP_CLOCK_CFG_MAIN_OSC_POPULATED
+#define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (1)
+#endif
+
+#ifndef BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE
+#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE (0)
+#endif
+#ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
+#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (0)
+#endif
+#ifndef BSP_CLOCK_CFG_SUBCLOCK_POPULATED
+#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (1)
+#endif
+#ifndef BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS
+#define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000
+#endif
+
+// for SystemInit()
+void bsp_init(void * p_args);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* BSP_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h
new file mode 100644
index 000000000..bd6a901c3
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h
@@ -0,0 +1,5 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_MCU_DEVICE_CFG_H_
+#define BSP_MCU_DEVICE_CFG_H_
+#define BSP_CFG_MCU_PART_SERIES (6)
+#endif /* BSP_MCU_DEVICE_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h
new file mode 100644
index 000000000..6845183db
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h
@@ -0,0 +1,11 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_MCU_DEVICE_PN_CFG_H_
+#define BSP_MCU_DEVICE_PN_CFG_H_
+#define BSP_MCU_R7FA6M5BH3CFC
+#define BSP_MCU_FEATURE_SET ('B')
+#define BSP_ROM_SIZE_BYTES (2097152)
+#define BSP_RAM_SIZE_BYTES (524288)
+#define BSP_DATA_FLASH_SIZE_BYTES (8192)
+#define BSP_PACKAGE_LQFP
+#define BSP_PACKAGE_PINS (176)
+#endif /* BSP_MCU_DEVICE_PN_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h
new file mode 100644
index 000000000..d5428540f
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h
@@ -0,0 +1,387 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_MCU_FAMILY_CFG_H_
+#define BSP_MCU_FAMILY_CFG_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "bsp_mcu_device_pn_cfg.h"
+#include "bsp_mcu_device_cfg.h"
+#include "../../../ra/fsp/src/bsp/mcu/ra6m5/bsp_mcu_info.h"
+#include "bsp_clock_cfg.h"
+
+#define BSP_MCU_GROUP_RA6M5 (1)
+#define BSP_LOCO_HZ                 (32768)
+#define BSP_MOCO_HZ                 (8000000)
+#define BSP_SUB_CLOCK_HZ            (32768)
+#if   BSP_CFG_HOCO_FREQUENCY == 0
+#define BSP_HOCO_HZ                 (16000000)
+#elif BSP_CFG_HOCO_FREQUENCY == 1
+  #define BSP_HOCO_HZ                 (18000000)
+#elif BSP_CFG_HOCO_FREQUENCY == 2
+  #define BSP_HOCO_HZ                 (20000000)
+#else
+  #error "Invalid HOCO frequency chosen (BSP_CFG_HOCO_FREQUENCY) in bsp_clock_cfg.h"
+#endif
+
+#define BSP_CFG_FLL_ENABLE                 (0)
+
+#define BSP_CORTEX_VECTOR_TABLE_ENTRIES    (16U)
+#define BSP_VECTOR_TABLE_MAX_ENTRIES       (112U)
+
+#if defined(_RA_TZ_SECURE)
+            #define BSP_TZ_SECURE_BUILD           (1)
+            #define BSP_TZ_NONSECURE_BUILD        (0)
+            #elif defined(_RA_TZ_NONSECURE)
+            #define BSP_TZ_SECURE_BUILD           (0)
+            #define BSP_TZ_NONSECURE_BUILD        (1)
+            #else
+#define BSP_TZ_SECURE_BUILD           (0)
+#define BSP_TZ_NONSECURE_BUILD        (0)
+#endif
+
+/* TrustZone Settings */
+#define BSP_TZ_CFG_INIT_SECURE_ONLY       (BSP_CFG_CLOCKS_SECURE || (!BSP_CFG_CLOCKS_OVERRIDE))
+#define BSP_TZ_CFG_SKIP_INIT              (BSP_TZ_NONSECURE_BUILD && BSP_TZ_CFG_INIT_SECURE_ONLY)
+#define BSP_TZ_CFG_EXCEPTION_RESPONSE     (0)
+
+/* CMSIS TrustZone Settings */
+#define SCB_CSR_AIRCR_INIT                (1)
+#define SCB_AIRCR_BFHFNMINS_VAL           (0)
+#define SCB_AIRCR_SYSRESETREQS_VAL        (1)
+#define SCB_AIRCR_PRIS_VAL                (0)
+#define TZ_FPU_NS_USAGE                   (1)
+#ifndef SCB_NSACR_CP10_11_VAL
+#define SCB_NSACR_CP10_11_VAL             (3U)
+#endif
+
+#ifndef FPU_FPCCR_TS_VAL
+#define FPU_FPCCR_TS_VAL                  (1U)
+#endif
+#define FPU_FPCCR_CLRONRETS_VAL           (1)
+
+#ifndef FPU_FPCCR_CLRONRET_VAL
+#define FPU_FPCCR_CLRONRET_VAL            (1)
+#endif
+
+/* The C-Cache line size that is configured during startup. */
+#ifndef BSP_CFG_C_CACHE_LINE_SIZE
+#define BSP_CFG_C_CACHE_LINE_SIZE   (1U)
+#endif
+
+/* Type 1 Peripheral Security Attribution */
+
+/* Peripheral Security Attribution Register (PSAR) Settings */
+#ifndef BSP_TZ_CFG_PSARB
+#define BSP_TZ_CFG_PSARB (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CAN1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* CAN0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* IIC1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9) /* IIC0 */ | \
+            (((1 > 0) ? 0U : 1U) << 11) /* USBFS */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 18) /* SPI1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 19) /* SPI0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* SCI9 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* SCI8 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* SCI7 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 25) /* SCI6 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* SCI5 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* SCI4 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 28) /* SCI3 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* SCI2 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 30) /* SCI1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCI0 */ | \
+            0x33f4f9) /* Unused */
+#endif
+#ifndef BSP_TZ_CFG_PSARC
+#define BSP_TZ_CFG_PSARC (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* CAC */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CRC */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* CTSU */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* SSIE0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* SDHI0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* DOC */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCE9 */ | \
+            0x7fffcef4) /* Unused */
+#endif
+#ifndef BSP_TZ_CFG_PSARD
+#define BSP_TZ_CFG_PSARD (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* AGT3 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* AGT2 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* AGT1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* AGT0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 11) /* POEG3 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* POEG2 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* POEG1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* POEG0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* ADC1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 16) /* ADC0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 20) /* DAC */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* TSN */ | \
+            0xffae07f0) /* Unused */
+#endif
+#ifndef BSP_TZ_CFG_PSARE
+#define BSP_TZ_CFG_PSARE (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* WDT */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* IWDT */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* RTC */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* AGT5 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* AGT4 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* GPT9 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* GPT8 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* GPT7 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 25) /* GPT6 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* GPT5 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* GPT4 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 28) /* GPT3 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* GPT2 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 30) /* GPT1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* GPT0 */ | \
+            0x3f3ff8) /* Unused */
+#endif
+#ifndef BSP_TZ_CFG_MSSAR
+#define BSP_TZ_CFG_MSSAR (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* ELC */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* DTC_DMAC */ | \
+            0xfffffffc) /* Unused */
+#endif
+
+/* Type 2 Peripheral Security Attribution */
+
+/* Security attribution for Cache registers. */
+#ifndef BSP_TZ_CFG_CSAR
+#define BSP_TZ_CFG_CSAR (0xFFFFFFFFU)
+#endif
+
+/* Security attribution for RSTSRn registers. */
+#ifndef BSP_TZ_CFG_RSTSAR
+#define BSP_TZ_CFG_RSTSAR (0xFFFFFFFFU)
+#endif
+
+/* Security attribution for registers of LVD channels. */
+#ifndef BSP_TZ_CFG_LVDSAR
+#define BSP_TZ_CFG_LVDSAR (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) | /* LVD Channel 1 */ \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) | /* LVD Channel 2 */ \
+            0xFFFFFFFCU)
+#endif
+
+/* Security attribution for LPM registers. */
+#ifndef BSP_TZ_CFG_LPMSAR
+#define BSP_TZ_CFG_LPMSAR ((RA_NOT_DEFINED > 0) ? 0xFFFFFCEAU : 0xFFFFFFFFU)
+#endif
+/* Deep Standby Interrupt Factor Security Attribution Register. */
+#ifndef BSP_TZ_CFG_DPFSAR
+#define BSP_TZ_CFG_DPFSAR ((RA_NOT_DEFINED > 0) ? 0xF2E00000U : 0xFFFFFFFFU)
+#endif
+
+/* Security attribution for CGC registers. */
+#ifndef BSP_TZ_CFG_CGFSAR
+#if BSP_CFG_CLOCKS_SECURE
+/* Protect all CGC registers from Non-secure write access. */
+#define BSP_TZ_CFG_CGFSAR (0xFFFCE402U)
+#else
+/* Allow Secure and Non-secure write access. */
+#define BSP_TZ_CFG_CGFSAR (0xFFFFFFFFU)
+#endif
+#endif
+
+/* Security attribution for Battery Backup registers. */
+#ifndef BSP_TZ_CFG_BBFSAR
+#define BSP_TZ_CFG_BBFSAR (0x00FFFFFF)
+#endif
+
+/* Security attribution for registers for IRQ channels. */
+#ifndef BSP_TZ_CFG_ICUSARA
+#define BSP_TZ_CFG_ICUSARA (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* External IRQ0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* External IRQ1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* External IRQ2 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* External IRQ3 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* External IRQ4 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* External IRQ5 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* External IRQ6 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* External IRQ7 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8U) /* External IRQ8 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9U) /* External IRQ9 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 10U) /* External IRQ10 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 11U) /* External IRQ11 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12U) /* External IRQ12 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13U) /* External IRQ13 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14U) /* External IRQ14 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15U) /* External IRQ15 */ | \
+            0xFFFF0000U)
+#endif
+
+/* Security attribution for NMI registers. */
+#ifndef BSP_TZ_CFG_ICUSARB
+#define BSP_TZ_CFG_ICUSARB (0 | 0xFFFFFFFEU) /* Should match AIRCR.BFHFNMINS. */
+#endif
+
+/* Security attribution for registers for DMAC channels */
+#ifndef BSP_TZ_CFG_ICUSARC
+#define BSP_TZ_CFG_ICUSARC (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* DMAC Channel 0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* DMAC Channel 1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* DMAC Channel 2 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* DMAC Channel 3 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* DMAC Channel 4 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* DMAC Channel 5 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* DMAC Channel 6 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* DMAC Channel 7 */ | \
+            0xFFFFFF00U)
+#endif
+
+/* Security attribution registers for SELSR0. */
+#ifndef BSP_TZ_CFG_ICUSARD
+#define BSP_TZ_CFG_ICUSARD ((RA_NOT_DEFINED > 0) ? 0xFFFFFFFEU : 0xFFFFFFFFU)
+#endif
+
+/* Security attribution registers for WUPEN0. */
+#ifndef BSP_TZ_CFG_ICUSARE
+#define BSP_TZ_CFG_ICUSARE ((RA_NOT_DEFINED > 0) ? 0x04F2FFFFU : 0xFFFFFFFFU)
+#endif
+
+/* Security attribution registers for WUPEN1. */
+#ifndef BSP_TZ_CFG_ICUSARF
+#define BSP_TZ_CFG_ICUSARF ((RA_NOT_DEFINED > 0) ? 0xFFFFFFF8U : 0xFFFFFFFFU)
+#endif
+
+/* Set DTCSTSAR if the Secure program uses the DTC. */
+#if RA_NOT_DEFINED == RA_NOT_DEFINED
+#define BSP_TZ_CFG_DTC_USED (0U)
+#else
+ #define BSP_TZ_CFG_DTC_USED (1U)
+#endif
+
+/* Security attribution of FLWT and FCKMHZ registers. */
+#ifndef BSP_TZ_CFG_FSAR
+/* If the CGC registers are only accessible in Secure mode, than there is no
+ * reason for nonsecure applications to access FLWT and FCKMHZ. */
+#if BSP_CFG_CLOCKS_SECURE
+/* Protect FLWT and FCKMHZ registers from nonsecure write access. */
+#define BSP_TZ_CFG_FSAR (0xFEFEU)
+#else
+/* Allow Secure and Non-secure write access. */
+#define BSP_TZ_CFG_FSAR (0xFFFFU)
+#endif
+#endif
+
+/* Security attribution for SRAM registers. */
+#ifndef BSP_TZ_CFG_SRAMSAR
+/* If the CGC registers are only accessible in Secure mode, than there is no reason for Non Secure applications to access
+ * SRAM0WTEN and therefore there is no reason to access PRCR2. */
+#define BSP_TZ_CFG_SRAMSAR (\
+        1 | \
+        ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 1U) : 0U) | \
+        4 | \
+        0xFFFFFFF8U)
+#endif
+
+/* Security attribution for Standby RAM registers. */
+#ifndef BSP_TZ_CFG_STBRAMSAR
+#define BSP_TZ_CFG_STBRAMSAR (0 | 0xFFFFFFF0U)
+#endif
+
+/* Security attribution for the DMAC Bus Master MPU settings. */
+#ifndef BSP_TZ_CFG_MMPUSARA
+/* The DMAC Bus Master MPU settings should align with the DMAC channel settings. */
+#define BSP_TZ_CFG_MMPUSARA (BSP_TZ_CFG_ICUSARC)
+#endif
+
+/* Security Attribution Register A for BUS Control registers. */
+#ifndef BSP_TZ_CFG_BUSSARA
+#define BSP_TZ_CFG_BUSSARA (0xFFFFFFFFU)
+#endif
+/* Security Attribution Register B for BUS Control registers. */
+#ifndef BSP_TZ_CFG_BUSSARB
+#define BSP_TZ_CFG_BUSSARB (0xFFFFFFFFU)
+#endif
+
+/* Enable Uninitialized Non-Secure Application Fallback. */
+#ifndef BSP_TZ_CFG_NON_SECURE_APPLICATION_FALLBACK
+#define BSP_TZ_CFG_NON_SECURE_APPLICATION_FALLBACK (1U)
+#endif
+
+#define OFS_SEQ1 0xA001A001 | (1 << 1) | (3 << 2)
+#define OFS_SEQ2 (15 << 4) | (3 << 8) | (3 << 10)
+#define OFS_SEQ3 (1 << 12) | (1 << 14) | (1 << 17)
+#define OFS_SEQ4 (3 << 18) |(15 << 20) | (3 << 24) | (3 << 26)
+#define OFS_SEQ5 (1 << 28) | (1 << 30)
+#define BSP_CFG_ROM_REG_OFS0 (OFS_SEQ1 | OFS_SEQ2 | OFS_SEQ3 | OFS_SEQ4 | OFS_SEQ5)
+
+/* Option Function Select Register 1 Security Attribution */
+#ifndef BSP_CFG_ROM_REG_OFS1_SEL
+#if defined(_RA_TZ_SECURE) || defined(_RA_TZ_NONSECURE)
+            #define BSP_CFG_ROM_REG_OFS1_SEL (0xFFFFF8F8U | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0x700U : 0U) | ((RA_NOT_DEFINED > 0) ? 0U : 0x7U))
+#else
+#define BSP_CFG_ROM_REG_OFS1_SEL (0xFFFFF8F8U)
+#endif
+#endif
+
+#define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (3) |  (1 << 8))
+
+/* Used to create IELS values for the interrupt initialization table g_interrupt_event_link_select. */
+#define BSP_PRV_IELS_ENUM(vector)    (ELC_ ## vector)
+
+/* Dual Mode Select Register */
+#ifndef BSP_CFG_ROM_REG_DUALSEL
+#define BSP_CFG_ROM_REG_DUALSEL (0xFFFFFFF8U | (0x7U))
+#endif
+
+/* Block Protection Register 0 */
+#ifndef BSP_CFG_ROM_REG_BPS0
+#define BSP_CFG_ROM_REG_BPS0 (~( 0U))
+#endif
+/* Block Protection Register 1 */
+#ifndef BSP_CFG_ROM_REG_BPS1
+#define BSP_CFG_ROM_REG_BPS1 (~( 0U))
+#endif
+/* Block Protection Register 2 */
+#ifndef BSP_CFG_ROM_REG_BPS2
+#define BSP_CFG_ROM_REG_BPS2 (~( 0U))
+#endif
+/* Block Protection Register 3 */
+#ifndef BSP_CFG_ROM_REG_BPS3
+#define BSP_CFG_ROM_REG_BPS3 (0xFFFFFFFFU)
+#endif
+/* Permanent Block Protection Register 0 */
+#ifndef BSP_CFG_ROM_REG_PBPS0
+#define BSP_CFG_ROM_REG_PBPS0 (~( 0U))
+#endif
+/* Permanent Block Protection Register 1 */
+#ifndef BSP_CFG_ROM_REG_PBPS1
+#define BSP_CFG_ROM_REG_PBPS1 (~( 0U))
+#endif
+/* Permanent Block Protection Register 2 */
+#ifndef BSP_CFG_ROM_REG_PBPS2
+#define BSP_CFG_ROM_REG_PBPS2 (~( 0U))
+#endif
+/* Permanent Block Protection Register 3 */
+#ifndef BSP_CFG_ROM_REG_PBPS3
+#define BSP_CFG_ROM_REG_PBPS3 (0xFFFFFFFFU)
+#endif
+/* Security Attribution for Block Protection Register 0 (If any blocks are marked as protected in the secure application, then mark them as secure) */
+#ifndef BSP_CFG_ROM_REG_BPS_SEL0
+#define BSP_CFG_ROM_REG_BPS_SEL0 (BSP_CFG_ROM_REG_BPS0 & BSP_CFG_ROM_REG_PBPS0)
+#endif
+/* Security Attribution for Block Protection Register 1 (If any blocks are marked as protected in the secure application, then mark them as secure) */
+#ifndef BSP_CFG_ROM_REG_BPS_SEL1
+#define BSP_CFG_ROM_REG_BPS_SEL1 (BSP_CFG_ROM_REG_BPS1 & BSP_CFG_ROM_REG_PBPS1)
+#endif
+/* Security Attribution for Block Protection Register 2 (If any blocks are marked as protected in the secure application, then mark them as secure) */
+#ifndef BSP_CFG_ROM_REG_BPS_SEL2
+#define BSP_CFG_ROM_REG_BPS_SEL2 (BSP_CFG_ROM_REG_BPS2 & BSP_CFG_ROM_REG_PBPS2)
+#endif
+/* Security Attribution for Block Protection Register 3 (If any blocks are marked as protected in the secure application, then mark them as secure) */
+#ifndef BSP_CFG_ROM_REG_BPS_SEL3
+#define BSP_CFG_ROM_REG_BPS_SEL3 (BSP_CFG_ROM_REG_BPS3 & BSP_CFG_ROM_REG_PBPS3)
+#endif
+#ifndef BSP_CLOCK_CFG_MAIN_OSC_WAIT
+#define BSP_CLOCK_CFG_MAIN_OSC_WAIT (9)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* BSP_MCU_FAMILY_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp_clock_cfg.h
new file mode 100644
index 000000000..77ac41d0a
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp_clock_cfg.h
@@ -0,0 +1,35 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_CLOCK_CFG_H_
+#define BSP_CLOCK_CFG_H_
+#define BSP_CFG_CLOCKS_SECURE (0)
+#define BSP_CFG_CLOCKS_OVERRIDE (0)
+#define BSP_CFG_XTAL_HZ (24000000) /* XTAL 24000000Hz */
+#define BSP_CFG_HOCO_FREQUENCY (2) /* HOCO 20MHz */
+#define BSP_CFG_PLL_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL Src: XTAL */
+#define BSP_CFG_PLL_DIV (BSP_CLOCKS_PLL_DIV_3) /* PLL Div /3 */
+#define BSP_CFG_PLL_MUL BSP_CLOCKS_PLL_MUL_25_0 /* PLL Mul x25.0 */
+#define BSP_CFG_PLL2_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL2 Src: XTAL */
+#define BSP_CFG_PLL2_DIV (BSP_CLOCKS_PLL_DIV_2) /* PLL2 Div /2 */
+#define BSP_CFG_PLL2_MUL BSP_CLOCKS_PLL_MUL_20_0 /* PLL2 Mul x20.0 */
+#define BSP_CFG_CLOCK_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_PLL) /* Clock Src: PLL */
+#define BSP_CFG_CLKOUT_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* CLKOUT Disabled */
+#define BSP_CFG_UCK_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_PLL2) /* UCLK Src: PLL2 */
+#define BSP_CFG_U60CK_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* U60CK Disabled */
+#define BSP_CFG_OCTA_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* OCTASPICLK Disabled */
+#define BSP_CFG_CANFDCLK_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* CANFDCLK Disabled */
+#define BSP_CFG_CECCLK_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* CECCLK Disabled */
+#define BSP_CFG_ICLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* ICLK Div /1 */
+#define BSP_CFG_PCLKA_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* PCLKA Div /2 */
+#define BSP_CFG_PCLKB_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* PCLKB Div /4 */
+#define BSP_CFG_PCLKC_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* PCLKC Div /4 */
+#define BSP_CFG_PCLKD_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* PCLKD Div /2 */
+#define BSP_CFG_BCLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* BCLK Div /2 */
+#define BSP_CFG_BCLK_OUTPUT (2) /* EBCLK Div /2 */
+#define BSP_CFG_FCLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* FCLK Div /4 */
+#define BSP_CFG_CLKOUT_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* CLKOUT Div /1 */
+#define BSP_CFG_UCK_DIV (BSP_CLOCKS_USB_CLOCK_DIV_5) /* UCLK Div /5 */
+#define BSP_CFG_U60CK_DIV (BSP_CLOCKS_USB60_CLOCK_DIV_1) /* U60CK Div /1 */
+#define BSP_CFG_OCTA_DIV (BSP_CLOCKS_OCTA_CLOCK_DIV_1) /* OCTASPICLK Div /1 */
+#define BSP_CFG_CANFDCLK_DIV (BSP_CLOCKS_CANFD_CLOCK_DIV_1) /* CANFDCLK Div /1 */
+#define BSP_CFG_CECCLK_DIV (BSP_CLOCKS_CEC_CLOCK_DIV_1) /* CECCLK Div /1 */
+#endif /* BSP_CLOCK_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/r_ioport_cfg.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/r_ioport_cfg.h
new file mode 100644
index 000000000..cb7c07932
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/r_ioport_cfg.h
@@ -0,0 +1,7 @@
+/* generated configuration header file - do not edit */
+#ifndef R_IOPORT_CFG_H_
+#define R_IOPORT_CFG_H_
+
+#define IOPORT_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
+
+#endif /* R_IOPORT_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/vector_data.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/vector_data.h
new file mode 100644
index 000000000..37739c12a
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/vector_data.h
@@ -0,0 +1,5 @@
+/* vector numbers are configurable/dynamic, hence this, it will be used inside the port */
+#define TU_IRQn 0
+#define USBFS_RESUME_IRQn 1
+#define USBFS_FIFO_0_IRQn 2
+#define USBFS_FIFO_1_IRQn 3
diff --git a/hw/bsp/ra/family.cmake b/hw/bsp/ra/family.cmake
index cf7dfad55..f93880dff 100644
--- a/hw/bsp/ra/family.cmake
+++ b/hw/bsp/ra/family.cmake
@@ -55,6 +55,7 @@ function(add_board_target BOARD_TARGET)
       ${FSP_RA}/inc/api
       ${FSP_RA}/inc/instances
       ${FSP_RA}/src/bsp/cmsis/Device/RENESAS/Include
+      ${FSP_RA}/src/bsp/mcu/all
       ${FSP_RA}/src/bsp/mcu/${MCU_VARIANT}
       )
 
diff --git a/hw/bsp/ra/linker/gcc/ra6m5.ld b/hw/bsp/ra/linker/gcc/ra6m5.ld
new file mode 100644
index 000000000..af747fd9b
--- /dev/null
+++ b/hw/bsp/ra/linker/gcc/ra6m5.ld
@@ -0,0 +1,22 @@
+RAM_START = 0x20000000;
+RAM_LENGTH = 0x80000;
+FLASH_START = 0x00000000;
+FLASH_LENGTH = 0x200000;
+DATA_FLASH_START = 0x08000000;
+DATA_FLASH_LENGTH = 0x2000;
+OPTION_SETTING_START = 0x0100A100;
+OPTION_SETTING_LENGTH = 0x100;
+OPTION_SETTING_S_START = 0x0100A200;
+OPTION_SETTING_S_LENGTH = 0x100;
+ID_CODE_START = 0x00000000;
+ID_CODE_LENGTH = 0x0;
+SDRAM_START = 0x80010000;
+SDRAM_LENGTH = 0x0;
+QSPI_FLASH_START = 0x60000000;
+QSPI_FLASH_LENGTH = 0x4000000;
+OSPI_DEVICE_0_START = 0x68000000;
+OSPI_DEVICE_0_LENGTH = 0x8000000;
+OSPI_DEVICE_1_START = 0x70000000;
+OSPI_DEVICE_1_LENGTH = 0x10000000;
+
+INCLUDE fsp.ld

From 0693462ebad20338de78aeb93d60d6c3c73a6ca7 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Lars=20P=C3=B6tter?= <kontakt@ing-poetter.de>
Date: Sun, 2 Jul 2023 09:02:24 +0200
Subject: [PATCH 473/691] made line ends consistent.

---
 src/class/cdc/cdc_host.c                     |  4 +--
 src/class/video/video_device.c               | 16 +++++-----
 src/common/tusb_fifo.c                       |  2 +-
 src/portable/dialog/da146xx/dcd_da146xx.c    |  2 +-
 src/portable/mentor/musb/dcd_musb.c          | 30 +++++++++---------
 src/portable/mentor/musb/hcd_musb.c          |  8 ++---
 src/portable/nxp/khci/hcd_khci.c             | 16 +++++-----
 src/portable/raspberrypi/rp2040/hcd_rp2040.c |  4 +--
 src/portable/raspberrypi/rp2040/rp2040_usb.c |  4 +--
 src/portable/renesas/rusb2/hcd_rusb2.c       |  8 ++---
 src/portable/st/typec/typec_stm32.c          | 18 +++++------
 src/portable/sunxi/dcd_sunxi_musb.c          | 32 ++++++++++----------
 12 files changed, 72 insertions(+), 72 deletions(-)

diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index ce9f27c33..e1af8d801 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -973,7 +973,7 @@ static uint32_t ftdi_232bm_baud_to_divisor(uint32_t baud)
 static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
   uint16_t const divisor = (uint16_t) ftdi_232bm_baud_to_divisor(baudrate);
-  TU_LOG_DRV("CDC FTDI Set BaudRate = %lu, divisor = 0x%04x\n", baudrate, divisor);
+  TU_LOG_DRV("CDC FTDI Set BaudRate = %lu, divisor = 0x%04x\r\n", baudrate, divisor);
 
   p_cdc->user_control_cb = complete_cb;
   _ftdi_requested_baud = baudrate;
@@ -1108,7 +1108,7 @@ static bool cp210x_ifc_enable(cdch_interface_t* p_cdc, uint16_t enabled, tuh_xfe
 }
 
 static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  TU_LOG_DRV("CDC CP210x Set BaudRate = %lu\n", baudrate);
+  TU_LOG_DRV("CDC CP210x Set BaudRate = %lu\r\n", baudrate);
   uint32_t baud_le = tu_htole32(baudrate);
   p_cdc->user_control_cb = complete_cb;
   return cp210x_set_request(p_cdc, CP210X_SET_BAUDRATE, 0, (uint8_t *) &baud_le, 4,
diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c
index 91f452afc..16eae0ced 100644
--- a/src/class/video/video_device.c
+++ b/src/class/video/video_device.c
@@ -609,17 +609,17 @@ static bool _close_vc_itf(uint8_t rhport, videod_interface_t *self)
  * @param[in]     altnum   The target alternate setting number. */
 static bool _open_vc_itf(uint8_t rhport, videod_interface_t *self, uint_fast8_t altnum)
 {
-  TU_LOG2("    open VC %d\n", altnum);
+  TU_LOG2("    open VC %d\r\n", altnum);
   uint8_t const *beg = self->beg;
   uint8_t const *end = beg + self->len;
 
   /* The first descriptor is a video control interface descriptor. */
   uint8_t const *cur = _find_desc_itf(beg, end, _desc_itfnum(beg), altnum);
-  TU_LOG2("    cur %d\n", cur - beg);
+  TU_LOG2("    cur %d\r\n", cur - beg);
   TU_VERIFY(cur < end);
 
   tusb_desc_vc_itf_t const *vc = (tusb_desc_vc_itf_t const *)cur;
-  TU_LOG2("    bInCollection %d\n", vc->ctl.bInCollection);
+  TU_LOG2("    bInCollection %d\r\n", vc->ctl.bInCollection);
   /* Support for up to 2 streaming interfaces only. */
   TU_ASSERT(vc->ctl.bInCollection <= CFG_TUD_VIDEO_STREAMING);
 
@@ -628,7 +628,7 @@ static bool _open_vc_itf(uint8_t rhport, videod_interface_t *self, uint_fast8_t
 
   /* Advance to the next descriptor after the class-specific VC interface header descriptor. */
   cur += vc->std.bLength + vc->ctl.bLength;
-  TU_LOG2("    bNumEndpoints %d\n", vc->std.bNumEndpoints);
+  TU_LOG2("    bNumEndpoints %d\r\n", vc->std.bNumEndpoints);
   /* Open the notification endpoint if it exist. */
   if (vc->std.bNumEndpoints) {
     /* Support for 1 endpoint only. */
@@ -662,7 +662,7 @@ static bool _init_vs_configuration(videod_streaming_interface_t *stm)
 static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint_fast8_t altnum)
 {
   uint_fast8_t i;
-  TU_LOG2("    reopen VS %d\n", altnum);
+  TU_LOG2("    reopen VS %d\r\n", altnum);
   uint8_t const *desc = _videod_itf[stm->index_vc].beg;
 
   /* Close endpoints of previous settings. */
@@ -672,7 +672,7 @@ static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint
     uint8_t  ep_adr = _desc_ep_addr(desc + ofs_ep);
     usbd_edpt_close(rhport, ep_adr);
     stm->desc.ep[i] = 0;
-    TU_LOG2("    close EP%02x\n", ep_adr);
+    TU_LOG2("    close EP%02x\r\n", ep_adr);
   }
 
   /* clear transfer management information */
@@ -709,12 +709,12 @@ static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint
     }
     TU_ASSERT(usbd_edpt_open(rhport, ep));
     stm->desc.ep[i] = (uint16_t) (cur - desc);
-    TU_LOG2("    open EP%02x\n", _desc_ep_addr(cur));
+    TU_LOG2("    open EP%02x\r\n", _desc_ep_addr(cur));
   }
   if (altnum) {
     stm->state = VS_STATE_STREAMING;
   }
-  TU_LOG2("    done\n");
+  TU_LOG2("    done\r\n");
   return true;
 }
 
diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c
index a52c92267..d6c3db4ce 100644
--- a/src/common/tusb_fifo.c
+++ b/src/common/tusb_fifo.c
@@ -539,7 +539,7 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu
     // Advance index
     f->wr_idx = advance_index(f->depth, wr_idx, n);
 
-    TU_LOG(TU_FIFO_DBG, "\tnew_wr = %u\n", f->wr_idx);
+    TU_LOG(TU_FIFO_DBG, "\tnew_wr = %u\r\n", f->wr_idx);
   }
 
   _ff_unlock(f->mutex_wr);
diff --git a/src/portable/dialog/da146xx/dcd_da146xx.c b/src/portable/dialog/da146xx/dcd_da146xx.c
index 961da81d6..d1e85c2df 100644
--- a/src/portable/dialog/da146xx/dcd_da146xx.c
+++ b/src/portable/dialog/da146xx/dcd_da146xx.c
@@ -651,7 +651,7 @@ static void handle_epx_tx_ev(xfer_ctl_t *xfer)
   }
   if (txs & USB_USB_TXS1_REG_USB_TX_URUN_Msk)
   {
-    TU_LOG1("EP %d FIFO underrun\n", epnum);
+    TU_LOG1("EP %d FIFO underrun\r\n", epnum);
   }
   // Start next or repeated packet.
   start_tx_packet(xfer);
diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c
index 487761847..3c0114e41 100644
--- a/src/portable/mentor/musb/dcd_musb.c
+++ b/src/portable/mentor/musb/dcd_musb.c
@@ -317,7 +317,7 @@ static bool handle_xfer_in(uint_fast8_t ep_addr)
   const unsigned mps = regs->TXMAXP;
   const unsigned len = TU_MIN(mps, rem);
   void          *buf = pipe->buf;
-  // TU_LOG1("   %p mps %d len %d rem %d\n", buf, mps, len, rem);
+  // TU_LOG1("   %p mps %d len %d rem %d\r\n", buf, mps, len, rem);
   if (len) {
     if (_dcd.pipe_buf_is_fifo[TUSB_DIR_IN] & TU_BIT(epnum_minus1)) {
       pipe_read_write_packet_ff(buf, &USB0->FIFO1_WORD + epnum_minus1, len, TUSB_DIR_IN);
@@ -328,7 +328,7 @@ static bool handle_xfer_in(uint_fast8_t ep_addr)
     pipe->remaining = rem - len;
   }
   regs->TXCSRL = USB_TXCSRL1_TXRDY;
-  // TU_LOG1(" TXCSRL%d = %x %d\n", epnum_minus1 + 1, regs->TXCSRL, rem - len);
+  // TU_LOG1(" TXCSRL%d = %x %d\r\n", epnum_minus1 + 1, regs->TXCSRL, rem - len);
   return false;
 }
 
@@ -337,7 +337,7 @@ static bool handle_xfer_out(uint_fast8_t ep_addr)
   unsigned epnum_minus1 = tu_edpt_number(ep_addr) - 1;
   pipe_state_t  *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
   volatile hw_endpoint_t *regs = edpt_regs(epnum_minus1);
-  // TU_LOG1(" RXCSRL%d = %x\n", epnum_minus1 + 1, regs->RXCSRL);
+  // TU_LOG1(" RXCSRL%d = %x\r\n", epnum_minus1 + 1, regs->RXCSRL);
 
   TU_ASSERT(regs->RXCSRL & USB_RXCSRL1_RXRDY);
 
@@ -399,14 +399,14 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
      * may have already finished and received the next setup packet
      * without calling this function, so we have no choice but to
      * invoke the callback function of status packet here. */
-    // TU_LOG1(" STATUS OUT USB0->CSRL0 = %x\n", USB0->CSRL0);
+    // TU_LOG1(" STATUS OUT USB0->CSRL0 = %x\r\n", USB0->CSRL0);
     _dcd.status_out = 0;
     if (req == REQUEST_TYPE_INVALID) {
       dcd_event_xfer_complete(rhport, ep_addr, total_bytes, XFER_RESULT_SUCCESS, false);
     } else {
       /* The next setup packet has already been received, it aborts
        * invoking callback function to avoid confusing TUSB stack. */
-      TU_LOG1("Drop CONTROL_STAGE_ACK\n");
+      TU_LOG1("Drop CONTROL_STAGE_ACK\r\n");
     }
     return true;
   }
@@ -431,16 +431,16 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
       } else {
         USB0->CSRL0 = USB_CSRL0_TXRDY; /* Flush TX FIFO to return ACK. */
       }
-      // TU_LOG1(" IN USB0->CSRL0 = %x\n", USB0->CSRL0);
+      // TU_LOG1(" IN USB0->CSRL0 = %x\r\n", USB0->CSRL0);
     } else {
-      // TU_LOG1(" OUT USB0->CSRL0 = %x\n", USB0->CSRL0);
+      // TU_LOG1(" OUT USB0->CSRL0 = %x\r\n", USB0->CSRL0);
       _dcd.pipe0.buf       = buffer;
       _dcd.pipe0.length    = len;
       _dcd.pipe0.remaining = len;
       USB0->CSRL0 = USB_CSRL0_RXRDYC; /* Clear RX FIFO to return ACK. */
     }
   } else if (dir_in) {
-    // TU_LOG1(" STATUS IN USB0->CSRL0 = %x\n", USB0->CSRL0);
+    // TU_LOG1(" STATUS IN USB0->CSRL0 = %x\r\n", USB0->CSRL0);
     _dcd.pipe0.buf = NULL;
     _dcd.pipe0.length    = 0;
     _dcd.pipe0.remaining = 0;
@@ -454,7 +454,7 @@ static void process_ep0(uint8_t rhport)
 {
   uint_fast8_t csrl = USB0->CSRL0;
 
-  // TU_LOG1(" EP0 USB0->CSRL0 = %x\n", csrl);
+  // TU_LOG1(" EP0 USB0->CSRL0 = %x\r\n", csrl);
 
   if (csrl & USB_CSRL0_STALLED) {
     /* Returned STALL packet to HOST. */
@@ -464,7 +464,7 @@ static void process_ep0(uint8_t rhport)
 
   unsigned req = _dcd.setup_packet.bmRequestType;
   if (csrl & USB_CSRL0_SETEND) {
-    TU_LOG1("   ABORT by the next packets\n");
+    TU_LOG1("   ABORT by the next packets\r\n");
     USB0->CSRL0 = USB_CSRL0_SETENDC;
     if (req != REQUEST_TYPE_INVALID && _dcd.pipe0.buf) {
       /* DATA stage was aborted by receiving STATUS or SETUP packet. */
@@ -539,14 +539,14 @@ static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
 
   volatile hw_endpoint_t *regs = edpt_regs(epn_minus1);
   if (dir_in) {
-    // TU_LOG1(" TXCSRL%d = %x\n", epn_minus1 + 1, regs->TXCSRL);
+    // TU_LOG1(" TXCSRL%d = %x\r\n", epn_minus1 + 1, regs->TXCSRL);
     if (regs->TXCSRL & USB_TXCSRL1_STALLED) {
       regs->TXCSRL &= ~(USB_TXCSRL1_STALLED | USB_TXCSRL1_UNDRN);
       return;
     }
     completed = handle_xfer_in(ep_addr);
   } else {
-    // TU_LOG1(" RXCSRL%d = %x\n", epn_minus1 + 1, regs->RXCSRL);
+    // TU_LOG1(" RXCSRL%d = %x\r\n", epn_minus1 + 1, regs->RXCSRL);
     if (regs->RXCSRL & USB_RXCSRL1_STALLED) {
       regs->RXCSRL &= ~(USB_RXCSRL1_STALLED | USB_RXCSRL1_OVER);
       return;
@@ -789,7 +789,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
 {
   (void)rhport;
   bool ret;
-  // TU_LOG1("X %x %d\n", ep_addr, total_bytes);
+  // TU_LOG1("X %x %d\r\n", ep_addr, total_bytes);
   unsigned const epnum = tu_edpt_number(ep_addr);
   unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn);
   NVIC_DisableIRQ(USB0_IRQn);
@@ -807,7 +807,7 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_
 {
   (void)rhport;
   bool ret;
-  // TU_LOG1("X %x %d\n", ep_addr, total_bytes);
+  // TU_LOG1("X %x %d\r\n", ep_addr, total_bytes);
   unsigned const epnum = tu_edpt_number(ep_addr);
   TU_ASSERT(epnum);
   unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn);
@@ -869,7 +869,7 @@ void dcd_int_handler(uint8_t rhport)
   is   = USB0->IS;   /* read and clear interrupt status */
   txis = USB0->TXIS; /* read and clear interrupt status */
   rxis = USB0->RXIS; /* read and clear interrupt status */
-  // TU_LOG1("D%2x T%2x R%2x\n", is, txis, rxis);
+  // TU_LOG1("D%2x T%2x R%2x\r\n", is, txis, rxis);
 
   is &= USB0->IE; /* Clear disabled interrupts */
   if (is & USB_IS_DISCON) {
diff --git a/src/portable/mentor/musb/hcd_musb.c b/src/portable/mentor/musb/hcd_musb.c
index 9eb2e005e..7e67b8291 100644
--- a/src/portable/mentor/musb/hcd_musb.c
+++ b/src/portable/mentor/musb/hcd_musb.c
@@ -418,7 +418,7 @@ static void process_ep0(uint8_t rhport)
   (void)rhport;
 
   uint_fast8_t csrl = USB0->CSRL0;
-  // TU_LOG1(" EP0 CSRL = %x\n", csrl);
+  // TU_LOG1(" EP0 CSRL = %x\r\n", csrl);
 
   unsigned const dev_addr = USB0->TXFUNCADDR0;
   unsigned const req = _hcd.bmRequestType;
@@ -508,7 +508,7 @@ static void process_pipe_tx(uint8_t rhport, uint_fast8_t pipenum)
 
   volatile hw_endpoint_t *regs = edpt_regs(pipenum - 1);
   unsigned const csrl = regs->TXCSRL;
-  // TU_LOG1(" TXCSRL%d = %x\n", pipenum, csrl);
+  // TU_LOG1(" TXCSRL%d = %x\r\n", pipenum, csrl);
   if (csrl & (USB_TXCSRL1_STALLED | USB_TXCSRL1_ERROR)) {
     if (csrl & USB_TXCSRL1_TXRDY)
       regs->TXCSRL = (csrl & ~(USB_TXCSRL1_STALLED | USB_TXCSRL1_ERROR)) | USB_TXCSRL1_FLUSH;
@@ -537,7 +537,7 @@ static void process_pipe_rx(uint8_t rhport, uint_fast8_t pipenum)
 
   volatile hw_endpoint_t *regs = edpt_regs(pipenum - 1);
   unsigned const csrl = regs->RXCSRL;
-  // TU_LOG1(" RXCSRL%d = %x\n", pipenum, csrl);
+  // TU_LOG1(" RXCSRL%d = %x\r\n", pipenum, csrl);
   if (csrl & (USB_RXCSRL1_STALLED | USB_RXCSRL1_ERROR)) {
     if (csrl & USB_RXCSRL1_RXRDY)
       regs->RXCSRL = (csrl & ~(USB_RXCSRL1_STALLED | USB_RXCSRL1_ERROR)) | USB_RXCSRL1_FLUSH;
@@ -846,7 +846,7 @@ void hcd_int_handler(uint8_t rhport)
   is   = USB0->IS;   /* read and clear interrupt status */
   txis = USB0->TXIS; /* read and clear interrupt status */
   rxis = USB0->RXIS; /* read and clear interrupt status */
-  // TU_LOG1("D%2x T%2x R%2x\n", is, txis, rxis);
+  // TU_LOG1("D%2x T%2x R%2x\r\n", is, txis, rxis);
 
   is &= USB0->IE; /* Clear disabled interrupts */
   if (is & USB_IS_RESUME) {
diff --git a/src/portable/nxp/khci/hcd_khci.c b/src/portable/nxp/khci/hcd_khci.c
index f6029ee0d..fb978cac8 100644
--- a/src/portable/nxp/khci/hcd_khci.c
+++ b/src/portable/nxp/khci/hcd_khci.c
@@ -161,7 +161,7 @@ static int prepare_packets(int pipenum)
   buffer_descriptor_t *bd = _hcd.bdt[dir_tx];
   TU_ASSERT(0 == bd[odd].own, -1);
 
-  // TU_LOG1("  %p dir %d odd %d data %d\n", &bd[odd], dir_tx, odd, pipe->data);
+  // TU_LOG1("  %p dir %d odd %d data %d\r\n", &bd[odd], dir_tx, odd, pipe->data);
 
   ep->pipenum = pipenum;
 
@@ -251,7 +251,7 @@ static bool resume_transfer(int pipenum)
     flags |= USB_ENDPT_EPHSHK_MASK | USB_ENDPT_EPCTLDIS_MASK | USB_ENDPT_RETRYDIS_MASK;
     break;
   }
-  // TU_LOG1("  resume pipenum %d flags %x\n", pipenum, flags);
+  // TU_LOG1("  resume pipenum %d flags %x\r\n", pipenum, flags);
 
   KHCI->ENDPOINT[0].ENDPT = flags;
   KHCI->ADDR  = (KHCI->ADDR & USB_ADDR_LSEN_MASK) | pipe->dev_addr;
@@ -302,7 +302,7 @@ static void process_tokdne(uint8_t rhport)
 
   int pipenum = ep->pipenum;
   int next_pipenum;
-  // TU_LOG1("TOKDNE %x PID %x pipe %d\n", s, pid, pipenum);
+  // TU_LOG1("TOKDNE %x PID %x pipe %d\r\n", s, pid, pipenum);
 
   xfer_result_t result;
   switch (pid) {
@@ -479,7 +479,7 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
 bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8])
 {
   (void)rhport;
-  // TU_LOG1("SETUP %u\n", dev_addr);
+  // TU_LOG1("SETUP %u\r\n", dev_addr);
   TU_ASSERT(0 == (_hcd.in_progress & TU_BIT(0)));
 
   int pipenum = find_pipe(dev_addr, 0);
@@ -510,7 +510,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
 {
   (void)rhport;
   uint8_t const ep_addr = ep_desc->bEndpointAddress;
-  // TU_LOG1("O %u %x\n", dev_addr, ep_addr);
+  // TU_LOG1("O %u %x\r\n", dev_addr, ep_addr);
   /* Find a free pipe */
   pipe_state_t *p = &_hcd.pipe[0];
   pipe_state_t *end = &_hcd.pipe[CFG_TUH_ENDPOINT_MAX * 2];
@@ -543,7 +543,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
 bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen)
 {
   (void)rhport;
-  // TU_LOG1("X %u %x %x %d\n", dev_addr, ep_addr, (uintptr_t)buffer, buflen);
+  // TU_LOG1("X %u %x %x %d\r\n", dev_addr, ep_addr, (uintptr_t)buffer, buflen);
 
   int pipenum = find_pipe(dev_addr, ep_addr);
   TU_ASSERT(0 <= pipenum);
@@ -580,7 +580,7 @@ void hcd_int_handler(uint8_t rhport)
   uint32_t is  = KHCI->ISTAT;
   uint32_t msk = KHCI->INTEN;
 
-  // TU_LOG1("S %lx\n", is);
+  // TU_LOG1("S %lx\r\n", is);
 
   /* clear disabled interrupts */
   KHCI->ISTAT = (is & ~msk & ~USB_ISTAT_TOKDNE_MASK) | USB_ISTAT_SOFTOK_MASK;
@@ -589,7 +589,7 @@ void hcd_int_handler(uint8_t rhport)
   if (is & USB_ISTAT_ERROR_MASK) {
     unsigned err = KHCI->ERRSTAT;
     if (err) {
-      TU_LOG1(" ERR %x\n", err);
+      TU_LOG1(" ERR %x\r\n", err);
       KHCI->ERRSTAT = err;
     } else {
       KHCI->INTEN &= ~USB_ISTAT_ERROR_MASK;
diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c
index 02f9968a7..51b8bf72d 100644
--- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c
@@ -219,7 +219,7 @@ static void __tusb_irq_path_func(hcd_rp2040_irq)(void)
   if ( status & USB_INTS_BUFF_STATUS_BITS )
   {
     handled |= USB_INTS_BUFF_STATUS_BITS;
-    TU_LOG(2, "Buffer complete\n");
+    TU_LOG(2, "Buffer complete\r\n");
     hw_handle_buff_status();
   }
 
@@ -227,7 +227,7 @@ static void __tusb_irq_path_func(hcd_rp2040_irq)(void)
   {
     handled |= USB_INTS_TRANS_COMPLETE_BITS;
     usb_hw_clear->sie_status = USB_SIE_STATUS_TRANS_COMPLETE_BITS;
-    TU_LOG(2, "Transfer complete\n");
+    TU_LOG(2, "Transfer complete\r\n");
     hw_trans_complete();
   }
 
diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c
index 1f49665ff..53486a586 100644
--- a/src/portable/raspberrypi/rp2040/rp2040_usb.c
+++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c
@@ -219,7 +219,7 @@ void hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t to
   if ( ep->active )
   {
     // TODO: Is this acceptable for interrupt packets?
-    TU_LOG(1, "WARN: starting new transfer on already active ep %d %s\n", tu_edpt_number(ep->ep_addr),
+    TU_LOG(1, "WARN: starting new transfer on already active ep %d %s\r\n", tu_edpt_number(ep->ep_addr),
               ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
 
     hw_endpoint_reset_transfer(ep);
@@ -419,7 +419,7 @@ static bool __tusb_irq_path_func(e15_is_critical_frame_period) (struct hw_endpoi
   if (delta < 800 || delta > 998) {
     return false;
   }
-  TU_LOG(3, "Avoiding sof %lu now %lu last %lu\n", (usb_hw->sof_rd + 1) & USB_SOF_RD_BITS, time_us_32(), e15_last_sof);
+  TU_LOG(3, "Avoiding sof %lu now %lu last %lu\r\n", (usb_hw->sof_rd + 1) & USB_SOF_RD_BITS, time_us_32(), e15_last_sof);
   return true;
 }
 
diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index 0e6fa1618..886a6f6b8 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -409,7 +409,7 @@ static void process_pipe_nrdy(uint8_t rhport, unsigned num)
   (void)rhport;
   xfer_result_t result;
   uint16_t volatile *ctr = get_pipectr(num);
-  // TU_LOG1("NRDY %d %x\n", num, *ctr);
+  // TU_LOG1("NRDY %d %x\r\n", num, *ctr);
   switch (*ctr & RUSB2_PIPE_CTR_PID_Msk) {
     default: return;
     case RUSB2_PIPE_CTR_PID_STALL: result = XFER_RESULT_STALLED; break;
@@ -608,7 +608,7 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
 bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8])
 {
   (void)rhport;
-  //  TU_LOG1("S %d %x\n", dev_addr, RUSB2->DCPCTR);
+  //  TU_LOG1("S %d %x\r\n", dev_addr, RUSB2->DCPCTR);
 
   TU_ASSERT(dev_addr < 6); /* USBa can only handle addresses from 0 to 5. */
   TU_ASSERT(0 == RUSB2->DCPCTR_b.SUREQ);
@@ -701,7 +701,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *b
 {
   bool r;
   hcd_int_disable(rhport);
-  // TU_LOG1("X %d %x %u\n", dev_addr, ep_addr, buflen);
+  // TU_LOG1("X %d %x %u\r\n", dev_addr, ep_addr, buflen);
   r = process_edpt_xfer(dev_addr, ep_addr, buffer, buflen);
   hcd_int_enable(rhport);
   return r;
@@ -745,7 +745,7 @@ void hcd_int_handler(uint8_t rhport)
   /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */
   RUSB2->INTSTS1 = ~((RUSB2_INTSTS1_SACK_Msk | RUSB2_INTSTS1_SIGN_Msk | RUSB2_INTSTS1_ATTCH_Msk | RUSB2_INTSTS1_DTCH_Msk) & is1);
   RUSB2->INTSTS0 = ~((RUSB2_INTSTS0_BRDY_Msk | RUSB2_INTSTS0_NRDY_Msk | RUSB2_INTSTS0_BEMP_Msk) & is0);
-  // TU_LOG1("IS %04x %04x\n", is0, is1);
+  // TU_LOG1("IS %04x %04x\r\n", is0, is1);
   is1 &= RUSB2->INTENB1;
   is0 &= RUSB2->INTENB0;
 
diff --git a/src/portable/st/typec/typec_stm32.c b/src/portable/st/typec/typec_stm32.c
index bf8b660f0..8da2e39ba 100644
--- a/src/portable/st/typec/typec_stm32.c
+++ b/src/portable/st/typec/typec_stm32.c
@@ -246,7 +246,7 @@ void tcd_int_handler(uint8_t rhport) {
     v_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03;
     v_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03;
 
-    TU_LOG3("VState CC1 = %lu, CC2 = %lu\n", v_cc[0], v_cc[1]);
+    TU_LOG3("VState CC1 = %lu, CC2 = %lu\r\n", v_cc[0], v_cc[1]);
 
     uint32_t cr = UCPD1->CR;
 
@@ -255,15 +255,15 @@ void tcd_int_handler(uint8_t rhport) {
     // FIXME somehow CC2 is vstate is not correct, always 1 even not attached.
     // on DPOW1 board, it is connected to PA10 (USBPD_DBCC2), we probably miss something.
     if ((sr & UCPD_SR_TYPECEVT1) && (v_cc[0] == 3)) {
-      TU_LOG3("Attach CC1\n");
+      TU_LOG3("Attach CC1\r\n");
       cr &= ~(UCPD_CR_PHYCCSEL | UCPD_CR_CCENABLE);
       cr |= UCPD_CR_PHYRXEN | UCPD_CR_CCENABLE_0;
     } else if ((sr & UCPD_SR_TYPECEVT2) && (v_cc[1] == 3)) {
-      TU_LOG3("Attach CC2\n");
+      TU_LOG3("Attach CC2\r\n");
       cr &= ~UCPD_CR_CCENABLE;
       cr |= (UCPD_CR_PHYCCSEL | UCPD_CR_PHYRXEN | UCPD_CR_CCENABLE_1);
     } else {
-      TU_LOG3("Detach\n");
+      TU_LOG3("Detach\r\n");
       cr &= ~UCPD_CR_PHYRXEN;
       cr |= UCPD_CR_CCENABLE_0 | UCPD_CR_CCENABLE_1;
     }
@@ -290,7 +290,7 @@ void tcd_int_handler(uint8_t rhport) {
   //------------- RX -------------//
   if (sr & UCPD_SR_RXORDDET) {
     // SOP: Start of Packet.
-    TU_LOG3("SOP\n");
+    TU_LOG3("SOP\r\n");
     // UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk;
 
     // ack
@@ -299,7 +299,7 @@ void tcd_int_handler(uint8_t rhport) {
 
   // Received full message
   if (sr & UCPD_SR_RXMSGEND) {
-    TU_LOG3("RX MSG END\n");
+    TU_LOG3("RX MSG END\r\n");
 
     // stop TX
     dma_stop(rhport, true);
@@ -328,7 +328,7 @@ void tcd_int_handler(uint8_t rhport) {
   }
 
   if (sr & UCPD_SR_RXOVR) {
-    TU_LOG3("RXOVR\n");
+    TU_LOG3("RXOVR\r\n");
     // ack
     UCPD1->ICR = UCPD_ICR_RXOVRCF;
   }
@@ -343,12 +343,12 @@ void tcd_int_handler(uint8_t rhport) {
     uint8_t result;
 
     if ( sr & UCPD_SR_TXMSGSENT ) {
-      TU_LOG3("TX MSG SENT\n");
+      TU_LOG3("TX MSG SENT\r\n");
       result = XFER_RESULT_SUCCESS;
       // ack
       UCPD1->ICR = UCPD_ICR_TXMSGSENTCF;
     }else {
-      TU_LOG3("TX Error\n");
+      TU_LOG3("TX Error\r\n");
       result = XFER_RESULT_FAILED;
       // ack
       UCPD1->ICR = UCPD_SR_TXMSGDISC | UCPD_SR_TXMSGABT | UCPD_SR_TXUND;
diff --git a/src/portable/sunxi/dcd_sunxi_musb.c b/src/portable/sunxi/dcd_sunxi_musb.c
index e26be775d..6cc1975a8 100644
--- a/src/portable/sunxi/dcd_sunxi_musb.c
+++ b/src/portable/sunxi/dcd_sunxi_musb.c
@@ -408,9 +408,9 @@ static inline unsigned free_block_size(free_block_t const *blk)
 #if 0
 static inline void print_block_list(free_block_t const *blk, unsigned num)
 {
-  TU_LOG1("*************\n");
+  TU_LOG1("*************\r\n");
   for (unsigned i = 0; i < num; ++i) {
-    TU_LOG1(" Blk%u %u %u\n", i, blk->beg, blk->end);
+    TU_LOG1(" Blk%u %u %u\r\n", i, blk->beg, blk->end);
     ++blk;
   }
 }
@@ -590,7 +590,7 @@ static bool handle_xfer_in(uint_fast8_t ep_addr)
   const unsigned mps = USBC_Readw(USBC_REG_TXMAXP(USBC0_BASE));
   const unsigned len = TU_MIN(mps, rem);
   uint8_t          *buf = pipe->buf;
-  // TU_LOG1("   %p mps %d len %d rem %d\n", buf, mps, len, rem);
+  // TU_LOG1("   %p mps %d len %d rem %d\r\n", buf, mps, len, rem);
   if (len) {
     volatile void* addr = (volatile void*)(USBC_REG_EPFIFO1(USBC0_BASE) + (epnum_minus1 << 2));
     if (_dcd.pipe_buf_is_fifo[TUSB_DIR_IN] & TU_BIT(epnum_minus1)) {
@@ -602,7 +602,7 @@ static bool handle_xfer_in(uint_fast8_t ep_addr)
     pipe->remaining = rem - len;
   }
   __USBC_Dev_Tx_WriteDataComplete();
-  // TU_LOG1(" TXCSRL%d = %x %d\n", epnum_minus1 + 1, regs->TXCSRL, rem - len);
+  // TU_LOG1(" TXCSRL%d = %x %d\r\n", epnum_minus1 + 1, regs->TXCSRL, rem - len);
   return false;
 }
 
@@ -610,7 +610,7 @@ static bool handle_xfer_out(uint_fast8_t ep_addr)
 {
   unsigned epnum_minus1 = tu_edpt_number(ep_addr) - 1;
   pipe_state_t  *pipe = &_dcd.pipe[tu_edpt_dir(ep_addr)][epnum_minus1];
-  // TU_LOG1(" RXCSRL%d = %x\n", epnum_minus1 + 1, regs->RXCSRL);
+  // TU_LOG1(" RXCSRL%d = %x\r\n", epnum_minus1 + 1, regs->RXCSRL);
 
   TU_ASSERT(__USBC_Dev_Rx_IsReadDataReady());
 
@@ -677,14 +677,14 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
      * may have already finished and received the next setup packet
      * without calling this function, so we have no choice but to
      * invoke the callback function of status packet here. */
-    // TU_LOG1(" STATUS OUT CSRL0 = %x\n", CSRL0);
+    // TU_LOG1(" STATUS OUT CSRL0 = %x\r\n", CSRL0);
     _dcd.status_out = 0;
     if (req == REQUEST_TYPE_INVALID) {
       dcd_event_xfer_complete(rhport, ep_addr, total_bytes, XFER_RESULT_SUCCESS, false);
     } else {
       /* The next setup packet has already been received, it aborts
        * invoking callback function to avoid confusing TUSB stack. */
-      TU_LOG1("Drop CONTROL_STAGE_ACK\n");
+      TU_LOG1("Drop CONTROL_STAGE_ACK\r\n");
     }
     return true;
   }
@@ -709,16 +709,16 @@ static bool edpt0_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_
       } else {
         __USBC_Dev_ep0_WriteDataHalf();
       }
-      // TU_LOG1(" IN CSRL0 = %x\n", CSRL0);
+      // TU_LOG1(" IN CSRL0 = %x\r\n", CSRL0);
     } else {
-      // TU_LOG1(" OUT CSRL0 = %x\n", CSRL0);
+      // TU_LOG1(" OUT CSRL0 = %x\r\n", CSRL0);
       _dcd.pipe0.buf       = buffer;
       _dcd.pipe0.length    = len;
       _dcd.pipe0.remaining = len;
       __USBC_Dev_ep0_ReadDataHalf();
     }
   } else if (dir_in) {
-    // TU_LOG1(" STATUS IN CSRL0 = %x\n", CSRL0);
+    // TU_LOG1(" STATUS IN CSRL0 = %x\r\n", CSRL0);
     _dcd.pipe0.buf = NULL;
     _dcd.pipe0.length    = 0;
     _dcd.pipe0.remaining = 0;
@@ -733,7 +733,7 @@ static void process_ep0(uint8_t rhport)
   USBC_SelectActiveEp(0);
   uint_fast8_t csrl = USBC_Readw(USBC_REG_CSR0(USBC0_BASE));
 
-  // TU_LOG1(" EP0 CSRL0 = %x\n", csrl);
+  // TU_LOG1(" EP0 CSRL0 = %x\r\n", csrl);
 
   if (csrl & USB_CSRL0_STALLED) {
     /* Returned STALL packet to HOST. */
@@ -743,7 +743,7 @@ static void process_ep0(uint8_t rhport)
 
   unsigned req = _dcd.setup_packet.bmRequestType;
   if (csrl & USB_CSRL0_SETEND) {
-    // TU_LOG1("   ABORT by the next packets\n");
+    // TU_LOG1("   ABORT by the next packets\r\n");
     USBC_Dev_Ctrl_ClearSetupEnd();
     if (req != REQUEST_TYPE_INVALID && _dcd.pipe0.buf) {
       /* DATA stage was aborted by receiving STATUS or SETUP packet. */
@@ -819,14 +819,14 @@ static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
   USBC_SelectActiveEp(epn);
 
   if (dir_in) {
-    // TU_LOG1(" TXCSRL%d = %x\n", epn_minus1 + 1, regs->TXCSRL);
+    // TU_LOG1(" TXCSRL%d = %x\r\n", epn_minus1 + 1, regs->TXCSRL);
     if (__USBC_Dev_Tx_IsEpStall()) {
 	  __USBC_Dev_Tx_ClearStall();
       return;
     }
     completed = handle_xfer_in(ep_addr);
   } else {
-    // TU_LOG1(" RXCSRL%d = %x\n", epn_minus1 + 1, regs->RXCSRL);
+    // TU_LOG1(" RXCSRL%d = %x\r\n", epn_minus1 + 1, regs->RXCSRL);
     if (__USBC_Dev_Rx_IsEpStall()) {
 	    __USBC_Dev_Rx_ClearStall();
       return;
@@ -1092,7 +1092,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
 {
   (void)rhport;
   bool ret;
-  // TU_LOG1("X %x %d\n", ep_addr, total_bytes);
+  // TU_LOG1("X %x %d\r\n", ep_addr, total_bytes);
   unsigned const epnum = tu_edpt_number(ep_addr);
   musb_int_mask();
 
@@ -1111,7 +1111,7 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_
 {
   (void)rhport;
   bool ret;
-  // TU_LOG1("X %x %d\n", ep_addr, total_bytes);
+  // TU_LOG1("X %x %d\r\n", ep_addr, total_bytes);
   unsigned const epnum = tu_edpt_number(ep_addr);
   TU_ASSERT(epnum);
 

From 2029ca9536e7e889f0f420218136e7bd1ac091fc Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Lars=20P=C3=B6tter?= <kontakt@ing-poetter.de>
Date: Sun, 2 Jul 2023 10:53:08 +0200
Subject: [PATCH 474/691] also fixed pico_trac() log messages.

---
 src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 4 ++--
 src/portable/raspberrypi/rp2040/dcd_rp2040.c   | 6 +++---
 src/portable/raspberrypi/rp2040/rp2040_usb.c   | 4 ++--
 3 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
index 264af2e7a..130716da4 100644
--- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
+++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
@@ -150,11 +150,11 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
 //    // so if any transfer is active on epx, we are busy. Interrupt endpoints have their own
 //    // EPX so ep->active will only be busy if there is a pending transfer on that interrupt endpoint
 //    // on that device
-//    pico_trace("hcd_edpt_busy dev addr %d ep_addr 0x%x\n", dev_addr, ep_addr);
+//    pico_trace("hcd_edpt_busy dev addr %d ep_addr 0x%x\r\n", dev_addr, ep_addr);
 //    struct hw_endpoint *ep = get_dev_ep(dev_addr, ep_addr);
 //    assert(ep);
 //    bool busy = ep->active;
-//    pico_trace("busy == %d\n", busy);
+//    pico_trace("busy == %d\r\n", busy);
 //    return busy;
 //}
 
diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
index 479b17b67..e8cee73fd 100644
--- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
@@ -189,7 +189,7 @@ static void hw_endpoint_xfer(uint8_t ep_addr, uint8_t *buffer, uint16_t total_by
 static void __tusb_irq_path_func(hw_handle_buff_status)(void)
 {
     uint32_t remaining_buffers = usb_hw->buf_status;
-    pico_trace("buf_status = 0x%08lx\n", remaining_buffers);
+    pico_trace("buf_status = 0x%08lx\r\n", remaining_buffers);
     uint bit = 1u;
     for (uint8_t i = 0; remaining_buffers && i < USB_MAX_ENDPOINTS * 2; i++)
     {
@@ -331,7 +331,7 @@ static void __tusb_irq_path_func(dcd_rp2040_irq)(void)
   // SE0 for 2.5 us or more (will last at least 10ms)
   if ( status & USB_INTS_BUS_RESET_BITS )
   {
-    pico_trace("BUS RESET\n");
+    pico_trace("BUS RESET\r\n");
 
     handled |= USB_INTS_BUS_RESET_BITS;
 
@@ -565,7 +565,7 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr)
 {
     (void) rhport;
 
-    pico_trace("dcd_edpt_close %02x\n", ep_addr);
+    pico_trace("dcd_edpt_close %02x\r\n", ep_addr);
     hw_endpoint_close(ep_addr);
 }
 
diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c
index 53486a586..a512dc34f 100644
--- a/src/portable/raspberrypi/rp2040/rp2040_usb.c
+++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c
@@ -276,7 +276,7 @@ static uint16_t __tusb_irq_path_func(sync_ep_buffer)(struct hw_endpoint *ep, uin
   // Short packet
   if (xferred_bytes < ep->wMaxPacketSize)
   {
-    pico_trace("  Short packet on buffer %d with %u bytes\n", buf_id, xferred_bytes);
+    pico_trace("  Short packet on buffer %d with %u bytes\r\n", buf_id, xferred_bytes);
     // Reduce total length as this is last packet
     ep->remaining_len = 0;
   }
@@ -352,7 +352,7 @@ bool __tusb_irq_path_func(hw_endpoint_xfer_continue)(struct hw_endpoint *ep)
   // If we are done then notify tinyusb
   if (ep->remaining_len == 0)
   {
-    pico_trace("Completed transfer of %d bytes on ep %d %s\n",
+    pico_trace("Completed transfer of %d bytes on ep %d %s\r\n",
                ep->xferred_len, tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
     // Notify caller we are done so it can notify the tinyusb stack
     hw_endpoint_lock_update(ep, -1);

From 787229a35e20e488b642e879e4f068571e9488df Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 2 Jul 2023 23:39:43 +0700
Subject: [PATCH 475/691] add etm trace for 6m5

---
 hw/bsp/ra/boards/ra6m5_ek/board.h            | 19 ++++++++---
 hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug | 35 ++++++++++++++++++++
 hw/bsp/ra/family.c                           |  5 +++
 3 files changed, 54 insertions(+), 5 deletions(-)
 create mode 100644 hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug

diff --git a/hw/bsp/ra/boards/ra6m5_ek/board.h b/hw/bsp/ra/boards/ra6m5_ek/board.h
index 4a1527f93..9c9bb6dcf 100644
--- a/hw/bsp/ra/boards/ra6m5_ek/board.h
+++ b/hw/bsp/ra/boards/ra6m5_ek/board.h
@@ -38,11 +38,20 @@ extern "C" {
 #define BUTTON_STATE_ACTIVE   0
 
 const ioport_pin_cfg_t board_pin_cfg[] = {
-  {.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
-  {.pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
-  {.pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
-  {.pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
-  {.pin = SW1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)},
+    { .pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS },
+    { .pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS },
+    { .pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS },
+    { .pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT | IOPORT_CFG_PORT_OUTPUT_LOW },
+    { .pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT },
+
+    #ifdef TRACE_ETM
+    // ETM Trace
+    { .pin = BSP_IO_PORT_02_PIN_08, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE },
+    { .pin = BSP_IO_PORT_02_PIN_09, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE },
+    { .pin = BSP_IO_PORT_02_PIN_10, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE },
+    { .pin = BSP_IO_PORT_02_PIN_11, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE },
+    { .pin = BSP_IO_PORT_02_PIN_14, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE },
+    #endif
 };
 
 #ifdef __cplusplus
diff --git a/hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug b/hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug
new file mode 100644
index 000000000..fa55d40b2
--- /dev/null
+++ b/hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug
@@ -0,0 +1,35 @@
+
+/*********************************************************************
+*
+*       OnProjectLoad
+*
+* Function description
+*   Project load routine. Required.
+*
+**********************************************************************
+*/
+void OnProjectLoad (void) {
+  Project.AddSvdFile ("Cortex-M33.svd");
+  Project.AddSvdFile ("./R7FA6M5BH.svd");
+
+  Project.SetDevice ("R7FA6M5BH");
+  Project.SetHostIF ("USB", "");
+  Project.SetTargetIF ("SWD");
+  Project.SetTIFSpeed ("50 MHz");
+
+  Project.SetTraceSource ("Trace Pins");
+  Project.SetTracePortWidth (4);
+
+  File.Open ("../../../../../../examples/device/cdc_msc/cmake-build-ra6m5/cdc_msc.elf");
+}
+/*********************************************************************
+*
+*       BeforeTargetConnect
+*
+**********************************************************************
+*/
+void BeforeTargetConnect (void) {
+  //
+  // Trace pin init is done by J-Link script file as J-Link script files are IDE independent
+  //
+}
diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c
index 82d7a60c5..f7c5e36f9 100644
--- a/hw/bsp/ra/family.c
+++ b/hw/bsp/ra/family.c
@@ -87,6 +87,11 @@ void board_init(void)
   /* Configure pins. */
   R_IOPORT_Open(&port_ctrl, &family_pin_cfg);
 
+#ifdef TRACE_ETM
+  // Enable trace clock with div 1 (100 Mhz)
+  R_SYSTEM->TRCKCR = R_SYSTEM_TRCKCR_TRCKEN_Msk;
+#endif
+
   board_led_write(false);
 
   /* Enable USB_BASE */

From ad7764b5b2f4fc3be3e7da53731559c92784d796 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 3 Jul 2023 10:54:37 +0700
Subject: [PATCH 476/691] move vector_data.h and ioport_cfg.h to common family

---
 hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/r_ioport_cfg.h       | 7 -------
 hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/vector_data.h        | 5 -----
 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/r_ioport_cfg.h       | 7 -------
 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/vector_data.h        | 5 -----
 hw/bsp/ra/{boards/ra4m1_ek/fsp_cfg => }/r_ioport_cfg.h | 0
 hw/bsp/ra/{boards/ra4m1_ek/fsp_cfg => }/vector_data.h  | 0
 6 files changed, 24 deletions(-)
 delete mode 100755 hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/r_ioport_cfg.h
 delete mode 100644 hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/vector_data.h
 delete mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/r_ioport_cfg.h
 delete mode 100644 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/vector_data.h
 rename hw/bsp/ra/{boards/ra4m1_ek/fsp_cfg => }/r_ioport_cfg.h (100%)
 rename hw/bsp/ra/{boards/ra4m1_ek/fsp_cfg => }/vector_data.h (100%)

diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/r_ioport_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/r_ioport_cfg.h
deleted file mode 100755
index cb7c07932..000000000
--- a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/r_ioport_cfg.h
+++ /dev/null
@@ -1,7 +0,0 @@
-/* generated configuration header file - do not edit */
-#ifndef R_IOPORT_CFG_H_
-#define R_IOPORT_CFG_H_
-
-#define IOPORT_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
-
-#endif /* R_IOPORT_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/vector_data.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/vector_data.h
deleted file mode 100644
index 37739c12a..000000000
--- a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/vector_data.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/* vector numbers are configurable/dynamic, hence this, it will be used inside the port */
-#define TU_IRQn 0
-#define USBFS_RESUME_IRQn 1
-#define USBFS_FIFO_0_IRQn 2
-#define USBFS_FIFO_1_IRQn 3
diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/r_ioport_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/r_ioport_cfg.h
deleted file mode 100644
index cb7c07932..000000000
--- a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/r_ioport_cfg.h
+++ /dev/null
@@ -1,7 +0,0 @@
-/* generated configuration header file - do not edit */
-#ifndef R_IOPORT_CFG_H_
-#define R_IOPORT_CFG_H_
-
-#define IOPORT_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
-
-#endif /* R_IOPORT_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/vector_data.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/vector_data.h
deleted file mode 100644
index 37739c12a..000000000
--- a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/vector_data.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/* vector numbers are configurable/dynamic, hence this, it will be used inside the port */
-#define TU_IRQn 0
-#define USBFS_RESUME_IRQn 1
-#define USBFS_FIFO_0_IRQn 2
-#define USBFS_FIFO_1_IRQn 3
diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/r_ioport_cfg.h b/hw/bsp/ra/r_ioport_cfg.h
similarity index 100%
rename from hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/r_ioport_cfg.h
rename to hw/bsp/ra/r_ioport_cfg.h
diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/vector_data.h b/hw/bsp/ra/vector_data.h
similarity index 100%
rename from hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/vector_data.h
rename to hw/bsp/ra/vector_data.h

From 960d9fa6f1a2b4e6c17eda354847acbbb6501d77 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 3 Jul 2023 11:03:50 +0700
Subject: [PATCH 477/691] move files around

---
 .../ra4m1_ek/fsp_cfg/{bsp => }/bsp_clock_cfg.h  |  0
 .../ra4m3_ek/fsp_cfg/{bsp => }/bsp_clock_cfg.h  |  0
 .../ra6m1_ek/fsp_cfg/{bsp => }/bsp_clock_cfg.h  |  0
 .../ra/boards/ra6m5_ek/fsp_cfg/r_ioport_cfg.h   |  7 -------
 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/vector_data.h |  5 -----
 hw/bsp/ra/family.c                              | 17 ++++++++++-------
 6 files changed, 10 insertions(+), 19 deletions(-)
 rename hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/{bsp => }/bsp_clock_cfg.h (100%)
 rename hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/{bsp => }/bsp_clock_cfg.h (100%)
 rename hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/{bsp => }/bsp_clock_cfg.h (100%)
 delete mode 100644 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/r_ioport_cfg.h
 delete mode 100644 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/vector_data.h

diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h
similarity index 100%
rename from hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h
rename to hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h
diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_clock_cfg.h
similarity index 100%
rename from hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_clock_cfg.h
rename to hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_clock_cfg.h
diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp_clock_cfg.h
similarity index 100%
rename from hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_clock_cfg.h
rename to hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp_clock_cfg.h
diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/r_ioport_cfg.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/r_ioport_cfg.h
deleted file mode 100644
index cb7c07932..000000000
--- a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/r_ioport_cfg.h
+++ /dev/null
@@ -1,7 +0,0 @@
-/* generated configuration header file - do not edit */
-#ifndef R_IOPORT_CFG_H_
-#define R_IOPORT_CFG_H_
-
-#define IOPORT_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
-
-#endif /* R_IOPORT_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/vector_data.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/vector_data.h
deleted file mode 100644
index 37739c12a..000000000
--- a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/vector_data.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/* vector numbers are configurable/dynamic, hence this, it will be used inside the port */
-#define TU_IRQn 0
-#define USBFS_RESUME_IRQn 1
-#define USBFS_FIFO_0_IRQn 2
-#define USBFS_FIFO_1_IRQn 3
diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c
index f7c5e36f9..850498fbb 100644
--- a/hw/bsp/ra/family.c
+++ b/hw/bsp/ra/family.c
@@ -53,7 +53,16 @@
 #define BSP_PRV_PRCR_PRC1_UNLOCK ((BSP_PRV_PRCR_KEY) | 0x2U)
 #define BSP_PRV_PRCR_LOCK	       ((BSP_PRV_PRCR_KEY) | 0x0U)
 
-/* ISR prototypes */
+static const ioport_cfg_t family_pin_cfg = {
+    .number_of_pins = sizeof(board_pin_cfg) / sizeof(ioport_pin_cfg_t),
+    .p_pin_cfg_data = board_pin_cfg,
+};
+static ioport_instance_ctrl_t port_ctrl;
+
+//--------------------------------------------------------------------+
+// Vector Data
+//--------------------------------------------------------------------+
+
 void usbfs_interrupt_handler(void);
 void usbfs_resume_handler(void);
 void usbfs_d0fifo_handler(void);
@@ -72,12 +81,6 @@ const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENT
     [3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1)  /* USBFS FIFO 1 (DMA transfer request 1) */
 };
 
-static const ioport_cfg_t family_pin_cfg = {
-    .number_of_pins = sizeof(board_pin_cfg) / sizeof(ioport_pin_cfg_t),
-    .p_pin_cfg_data = board_pin_cfg,
-};
-static ioport_instance_ctrl_t port_ctrl;
-
 //--------------------------------------------------------------------+
 // Board porting API
 //--------------------------------------------------------------------+

From 4080ab3d034557572bcaf17c340026865137bf15 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 3 Jul 2023 11:22:19 +0700
Subject: [PATCH 478/691] wrap up ra update

---
 .idea/cmake.xml                       |  7 +++++--
 .idea/runConfigurations/kl25.xml      |  2 +-
 .idea/runConfigurations/stm32g474.xml |  2 +-
 hw/bsp/ra/family.c                    |  7 +------
 hw/bsp/ra/vector_data.h               | 24 ++++++++++++++++++++++++
 5 files changed, 32 insertions(+), 10 deletions(-)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 2ac7993c1..47ca8253e 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -2,7 +2,7 @@
 <project version="4">
   <component name="CMakeSharedSettings">
     <configurations>
-      <configuration PROFILE_NAME="mcxn947" ENABLED="false" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DBOARD=mcxn947brk -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="mcxn947" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mcxn947brk -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10056 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10095 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="esp32s2" ENABLED="false" GENERATION_OPTIONS="-DBOARD=espressif_saola_1 -DIDF_TARGET=esp32s2">
@@ -25,7 +25,7 @@
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
-      <configuration PROFILE_NAME="rp2040" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico -DLOG=2 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico -DLOG=2" />
       <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1010_evk" />
       <configuration PROFILE_NAME="rt1060 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1060_evk" />
       <configuration PROFILE_NAME="rt1064 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1064_evk" />
@@ -43,6 +43,9 @@
       <configuration PROFILE_NAME="stm32f103_mini_2" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f103_mini_2" />
       <configuration PROFILE_NAME="stm32f769disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f769disco -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32l476disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32l476disco" />
+      <configuration PROFILE_NAME="ra4m1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra4m1_ek -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="ra6m1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m1_ek -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="ra6m5" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/.idea/runConfigurations/kl25.xml b/.idea/runConfigurations/kl25.xml
index add9a0d6b..3052b440b 100644
--- a/.idea/runConfigurations/kl25.xml
+++ b/.idea/runConfigurations/kl25.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="kl25" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MKL25Z128xxx4&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="pca10056" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="kl25" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MKL25Z128xxx4&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/stm32g474.xml b/.idea/runConfigurations/stm32g474.xml
index bbab2a5c5..6076320b5 100644
--- a/.idea/runConfigurations/stm32g474.xml
+++ b/.idea/runConfigurations/stm32g474.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="stm32g474" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;stm32g474re&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="pca10056" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="stm32g474" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;stm32g474re&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c
index 850498fbb..00b87f335 100644
--- a/hw/bsp/ra/family.c
+++ b/hw/bsp/ra/family.c
@@ -63,12 +63,7 @@ static ioport_instance_ctrl_t port_ctrl;
 // Vector Data
 //--------------------------------------------------------------------+
 
-void usbfs_interrupt_handler(void);
-void usbfs_resume_handler(void);
-void usbfs_d0fifo_handler(void);
-void usbfs_d1fifo_handler(void);
-
-const fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = {
+BSP_DONT_REMOVE const fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = {
     [0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */
     [1] = usbfs_resume_handler,    /* USBFS RESUME (USBFS resume interrupt) */
     [2] = usbfs_d0fifo_handler,    /* USBFS FIFO 0 (DMA transfer request 0) */
diff --git a/hw/bsp/ra/vector_data.h b/hw/bsp/ra/vector_data.h
index 37739c12a..400743d17 100644
--- a/hw/bsp/ra/vector_data.h
+++ b/hw/bsp/ra/vector_data.h
@@ -1,5 +1,29 @@
 /* vector numbers are configurable/dynamic, hence this, it will be used inside the port */
+#ifndef VECTOR_DATA_H
+#define VECTOR_DATA_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef VECTOR_DATA_IRQ_COUNT
+  #define VECTOR_DATA_IRQ_COUNT 4
+#endif
+
+/* ISR prototypes */
+void usbfs_interrupt_handler(void);
+void usbfs_resume_handler(void);
+void usbfs_d0fifo_handler(void);
+void usbfs_d1fifo_handler(void);
+
+/* Vector table allocations */
 #define TU_IRQn 0
 #define USBFS_RESUME_IRQn 1
 #define USBFS_FIFO_0_IRQn 2
 #define USBFS_FIFO_1_IRQn 3
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

From d5d1b43eb9d1a619b71879892ada7cb85ca3c00f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 3 Jul 2023 12:07:27 +0700
Subject: [PATCH 479/691] board pin data clean up

---
 hw/bsp/ra/boards/ra4m1_ek/board.h |  2 +-
 hw/bsp/ra/boards/ra4m3_ek/board.h | 11 ++++++-----
 hw/bsp/ra/boards/ra6m1_ek/board.h |  2 +-
 hw/bsp/ra/boards/ra6m5_ek/board.h | 15 ++++++++++-----
 4 files changed, 18 insertions(+), 12 deletions(-)

diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.h b/hw/bsp/ra/boards/ra4m1_ek/board.h
index b580bb5e9..ba3698f3d 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/board.h
+++ b/hw/bsp/ra/boards/ra4m1_ek/board.h
@@ -40,7 +40,7 @@ extern "C" {
 const ioport_pin_cfg_t board_pin_cfg[] = {
     {.pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT},
     {.pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT},
-    // USB D+, D-, VBus
+    // USB FS D+, D-, VBus
     {.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
     {.pin = BSP_IO_PORT_09_PIN_14, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
     {.pin = BSP_IO_PORT_09_PIN_15, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.h b/hw/bsp/ra/boards/ra4m3_ek/board.h
index e41302f90..c2f150b33 100644
--- a/hw/bsp/ra/boards/ra4m3_ek/board.h
+++ b/hw/bsp/ra/boards/ra4m3_ek/board.h
@@ -38,11 +38,12 @@ extern "C" {
 #define BUTTON_STATE_ACTIVE   0
 
 const ioport_pin_cfg_t board_pin_cfg[] = {
-  {.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
-  {.pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
-  {.pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN | (uint32_t) IOPORT_PERIPHERAL_USB_FS)},
-  {.pin = LED1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_OUTPUT | (uint32_t) IOPORT_CFG_PORT_OUTPUT_LOW)},
-  {.pin = SW1, .pin_cfg = ((uint32_t) IOPORT_CFG_PORT_DIRECTION_INPUT)},
+  {.pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT},
+  {.pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT},
+    // USB FS D+, D-, VBus
+  {.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
+  {.pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
+  {.pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
 };
 
 #ifdef __cplusplus
diff --git a/hw/bsp/ra/boards/ra6m1_ek/board.h b/hw/bsp/ra/boards/ra6m1_ek/board.h
index 982a78e52..0b7297fd4 100644
--- a/hw/bsp/ra/boards/ra6m1_ek/board.h
+++ b/hw/bsp/ra/boards/ra6m1_ek/board.h
@@ -40,7 +40,7 @@ extern "C" {
 const ioport_pin_cfg_t board_pin_cfg[] = {
     {.pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT},
     {.pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT},
-    // USB D+, D-, VBus
+    // USB FS D+, D-, VBus
     {.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
     {.pin = BSP_IO_PORT_09_PIN_14, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
     {.pin = BSP_IO_PORT_09_PIN_15, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
diff --git a/hw/bsp/ra/boards/ra6m5_ek/board.h b/hw/bsp/ra/boards/ra6m5_ek/board.h
index 9c9bb6dcf..87434630f 100644
--- a/hw/bsp/ra/boards/ra6m5_ek/board.h
+++ b/hw/bsp/ra/boards/ra6m5_ek/board.h
@@ -38,20 +38,25 @@ extern "C" {
 #define BUTTON_STATE_ACTIVE   0
 
 const ioport_pin_cfg_t board_pin_cfg[] = {
-    { .pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS },
-    { .pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS },
-    { .pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS },
     { .pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT | IOPORT_CFG_PORT_OUTPUT_LOW },
     { .pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT },
 
-    #ifdef TRACE_ETM
+    // USB FS D+, D-, VBus
+    { .pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS | IOPORT_CFG_DRIVE_HIGH },
+    { .pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS | IOPORT_CFG_DRIVE_HIGH},
+    { .pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS | IOPORT_CFG_DRIVE_HIGH},
+
+    // USB HS D+, D-, VBus
+    { .pin = BSP_IO_PORT_07_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_HS },
+    { .pin = BSP_IO_PORT_11_PIN_00, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_HS | IOPORT_CFG_DRIVE_HIGH},
+    { .pin = BSP_IO_PORT_11_PIN_01, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_HS | IOPORT_CFG_DRIVE_HIGH},
+
     // ETM Trace
     { .pin = BSP_IO_PORT_02_PIN_08, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE },
     { .pin = BSP_IO_PORT_02_PIN_09, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE },
     { .pin = BSP_IO_PORT_02_PIN_10, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE },
     { .pin = BSP_IO_PORT_02_PIN_11, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE },
     { .pin = BSP_IO_PORT_02_PIN_14, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE },
-    #endif
 };
 
 #ifdef __cplusplus

From bb0e688b8e950652c70d82b46b7093e14b33c350 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 3 Jul 2023 16:35:22 +0700
Subject: [PATCH 480/691] add jlinkscript for detect rtt

---
 hw/bsp/ra/boards/ra4m1_ek/board.h |  2 +-
 hw/bsp/ra/boards/ra4m3_ek/board.h |  2 +-
 hw/bsp/ra/boards/ra6m1_ek/board.h |  2 +-
 hw/bsp/ra/boards/ra6m5_ek/board.h |  2 +-
 hw/bsp/ra/debug.jlinkscript       |  4 ++++
 hw/bsp/ra/family.c                | 12 +++++++-----
 6 files changed, 15 insertions(+), 9 deletions(-)
 create mode 100644 hw/bsp/ra/debug.jlinkscript

diff --git a/hw/bsp/ra/boards/ra4m1_ek/board.h b/hw/bsp/ra/boards/ra4m1_ek/board.h
index ba3698f3d..c132387bc 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/board.h
+++ b/hw/bsp/ra/boards/ra4m1_ek/board.h
@@ -37,7 +37,7 @@ extern "C" {
 #define SW1                   BSP_IO_PORT_01_PIN_05
 #define BUTTON_STATE_ACTIVE   0
 
-const ioport_pin_cfg_t board_pin_cfg[] = {
+static const ioport_pin_cfg_t board_pin_cfg[] = {
     {.pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT},
     {.pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT},
     // USB FS D+, D-, VBus
diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.h b/hw/bsp/ra/boards/ra4m3_ek/board.h
index c2f150b33..4b4735c4f 100644
--- a/hw/bsp/ra/boards/ra4m3_ek/board.h
+++ b/hw/bsp/ra/boards/ra4m3_ek/board.h
@@ -37,7 +37,7 @@ extern "C" {
 #define SW1  (BSP_IO_PORT_00_PIN_05)
 #define BUTTON_STATE_ACTIVE   0
 
-const ioport_pin_cfg_t board_pin_cfg[] = {
+static const ioport_pin_cfg_t board_pin_cfg[] = {
   {.pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT},
   {.pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT},
     // USB FS D+, D-, VBus
diff --git a/hw/bsp/ra/boards/ra6m1_ek/board.h b/hw/bsp/ra/boards/ra6m1_ek/board.h
index 0b7297fd4..2765a6a5f 100644
--- a/hw/bsp/ra/boards/ra6m1_ek/board.h
+++ b/hw/bsp/ra/boards/ra6m1_ek/board.h
@@ -37,7 +37,7 @@ extern "C" {
 #define SW1                   BSP_IO_PORT_04_PIN_15
 #define BUTTON_STATE_ACTIVE   0
 
-const ioport_pin_cfg_t board_pin_cfg[] = {
+static const ioport_pin_cfg_t board_pin_cfg[] = {
     {.pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT},
     {.pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT},
     // USB FS D+, D-, VBus
diff --git a/hw/bsp/ra/boards/ra6m5_ek/board.h b/hw/bsp/ra/boards/ra6m5_ek/board.h
index 87434630f..c88e9a0a2 100644
--- a/hw/bsp/ra/boards/ra6m5_ek/board.h
+++ b/hw/bsp/ra/boards/ra6m5_ek/board.h
@@ -37,7 +37,7 @@ extern "C" {
 #define SW1                   BSP_IO_PORT_00_PIN_05
 #define BUTTON_STATE_ACTIVE   0
 
-const ioport_pin_cfg_t board_pin_cfg[] = {
+static const ioport_pin_cfg_t board_pin_cfg[] = {
     { .pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT | IOPORT_CFG_PORT_OUTPUT_LOW },
     { .pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT },
 
diff --git a/hw/bsp/ra/debug.jlinkscript b/hw/bsp/ra/debug.jlinkscript
new file mode 100644
index 000000000..b34cfaa7f
--- /dev/null
+++ b/hw/bsp/ra/debug.jlinkscript
@@ -0,0 +1,4 @@
+int SetupTarget(void) {
+  JLINK_ExecCommand("SetRTTSearchRanges 0x20000000 0x80000");
+  return 0;
+}
diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c
index 8b5e911a1..08823dd52 100644
--- a/hw/bsp/ra/family.c
+++ b/hw/bsp/ra/family.c
@@ -90,12 +90,12 @@ void board_init(void)
   R_SYSTEM->TRCKCR = R_SYSTEM_TRCKCR_TRCKEN_Msk;
 #endif
 
-  board_led_write(false);
+  // Enable USB module
+  R_MSTP->MSTPCRB &= ~(1U << 11U); // FS
 
-  /* Enable USB_BASE */
-  R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_PRC1_UNLOCK;
-  R_MSTP->MSTPCRB &= ~(1U << 11U);
-  R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK;
+#ifdef R_USB_HS0_BASE
+  R_MSTP->MSTPCRB &= ~(1U << 12U); // HS
+#endif
 
 #if CFG_TUSB_OS == OPT_OS_FREERTOS
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
@@ -108,6 +108,8 @@ void board_init(void)
 #if CFG_TUSB_OS == OPT_OS_NONE
   SysTick_Config(SystemCoreClock / 1000);
 #endif
+
+  board_led_write(false);
 }
 
 void board_led_write(bool state) {

From 34966304dd2b32b141ad107eb75cdf77d22e031f Mon Sep 17 00:00:00 2001
From: Andrew Hooper <ahooper@kos.net>
Date: Mon, 3 Jul 2023 11:21:47 -0400
Subject: [PATCH 481/691] Restore RTOS argument for stm32f4

---
 hw/bsp/stm32f4/family.cmake | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/hw/bsp/stm32f4/family.cmake b/hw/bsp/stm32f4/family.cmake
index 7d9bbf331..a2f36a9e8 100644
--- a/hw/bsp/stm32f4/family.cmake
+++ b/hw/bsp/stm32f4/family.cmake
@@ -79,8 +79,9 @@ endfunction()
 #------------------------------------
 # Functions
 #------------------------------------
-function(family_configure_example TARGET)
-  family_configure_common(${TARGET})
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
 
   # Board target
   add_board_target(board_${BOARD})
@@ -100,7 +101,7 @@ function(family_configure_example TARGET)
     )
 
   # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32F4)
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32F4 ${RTOS})
   if (MCU_VARIANT STREQUAL "stm32f407xx")
     target_sources(${TARGET}-tinyusb PUBLIC
             ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c

From cfc146e18fe2aa0df4d77d435d4a4b7053361cd7 Mon Sep 17 00:00:00 2001
From: Andrew Hooper <ahooper@kos.net>
Date: Tue, 4 Jul 2023 08:08:05 -0400
Subject: [PATCH 482/691] Add FreeRTOSConfig for family stm32f4

---
 .../stm32f4/FreeRTOSConfig/FreeRTOSConfig.h   | 165 ++++++++++++++++++
 1 file changed, 165 insertions(+)
 create mode 100644 hw/bsp/stm32f4/FreeRTOSConfig/FreeRTOSConfig.h

diff --git a/hw/bsp/stm32f4/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32f4/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..b4a9be477
--- /dev/null
+++ b/hw/bsp/stm32f4/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,165 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "stm32f4xx.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               2
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       4
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif

From 071c30f381074c780bfb068cd31ed0801336bea6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 4 Jul 2023 19:27:37 +0700
Subject: [PATCH 483/691] update fsp to version 4.5, correct RA BSP. Fix ETM
 Trace with 6m5 by lowering PLL to 128Mhz.

---
 hw/bsp/family_support.cmake                   |  4 ++
 .../ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h  |  6 --
 .../boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h   |  2 +-
 hw/bsp/ra/boards/ra6m1_ek/board.h             | 10 ++-
 .../ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h  |  7 --
 .../boards/ra6m1_ek/fsp_cfg/bsp_clock_cfg.h   |  2 +-
 hw/bsp/ra/boards/ra6m5_ek/board.h             | 16 +++--
 .../boards/ra6m5_ek/fsp_cfg/bsp_clock_cfg.h   | 70 +++++++++++--------
 hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug  | 70 +++++++++++++++++++
 hw/bsp/ra/family.c                            | 15 ++--
 hw/bsp/ra/family.cmake                        |  8 +--
 tools/get_deps.py                             |  2 +-
 12 files changed, 142 insertions(+), 70 deletions(-)

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index b2e61a824..5b97eb5e4 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -227,6 +227,10 @@ function(family_add_tinyusb TARGET OPT_MCU RTOS)
 
   if (DEFINED LOG)
     target_compile_definitions(${TARGET}-tinyusb_config INTERFACE CFG_TUSB_DEBUG=${LOG})
+    if (LOG STREQUAL "3")
+      # no inline for debug level 3
+      target_compile_definitions(${TARGET}-tinyusb_config INTERFACE TU_ATTR_ALWAYS_INLINE=)
+    endif ()
   endif()
 
   if (RTOS STREQUAL "freertos")
diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h
index 700d9b29f..19bb473eb 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h
+++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h
@@ -31,12 +31,6 @@
 #define BSP_CLOCK_CFG_SUBCLOCK_POPULATED	(1)
 #define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000
 
-#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK 0
-
-#define BSP_FEATURE_TFU_SUPPORTED 0
-#define BSP_TZ_SECURE_BUILD    (0)
-#define BSP_TZ_NONSECURE_BUILD (0)
-
 // for SystemInit()
 void bsp_init(void * p_args);
 
diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h
index 930fa3547..554126523 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h
+++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp_clock_cfg.h
@@ -7,7 +7,7 @@
 #define BSP_CFG_PLL_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL Src: XTAL */
 #define BSP_CFG_HOCO_FREQUENCY (0) /* HOCO 24MHz */
 #define BSP_CFG_PLL_DIV (BSP_CLOCKS_PLL_DIV_2) /* PLL Div /2 */
-#define BSP_CFG_PLL_MUL (BSP_CLOCKS_PLL_MUL_8_0) /* PLL Mul x8 */
+#define BSP_CFG_PLL_MUL (BSP_CLOCKS_PLL_MUL(8u,0u)) /* PLL Mul x8 */
 #define BSP_CFG_CLOCK_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_PLL) /* Clock Src: PLL */
 #define BSP_CFG_ICLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* ICLK Div /1 */
 #define BSP_CFG_PCLKA_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* PCLKA Div /1 */
diff --git a/hw/bsp/ra/boards/ra6m1_ek/board.h b/hw/bsp/ra/boards/ra6m1_ek/board.h
index 2765a6a5f..f73a08fc0 100644
--- a/hw/bsp/ra/boards/ra6m1_ek/board.h
+++ b/hw/bsp/ra/boards/ra6m1_ek/board.h
@@ -38,12 +38,10 @@ extern "C" {
 #define BUTTON_STATE_ACTIVE   0
 
 static const ioport_pin_cfg_t board_pin_cfg[] = {
-    {.pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT},
-    {.pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT},
-    // USB FS D+, D-, VBus
-    {.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
-    {.pin = BSP_IO_PORT_09_PIN_14, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
-    {.pin = BSP_IO_PORT_09_PIN_15, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
+    { .pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT },
+    { .pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT },
+    // USB FS
+    { .pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS },
 };
 
 #ifdef __cplusplus
diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h
index c2b23b16c..75a331fc2 100644
--- a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h
+++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h
@@ -60,13 +60,6 @@ extern "C" {
 #define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000
 #endif
 
-#define BSP_FEATURE_BSP_HAS_SCISPI_CLOCK 0
-#define BSP_FEATURE_TFU_SUPPORTED 0
-#define BSP_TZ_SECURE_BUILD    (0)
-#define BSP_TZ_NONSECURE_BUILD (0)
-
-#define BSP_CFG_USE_LOW_VOLTAGE_MODE 0
-
 // for SystemInit()
 void bsp_init(void * p_args);
 
diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp_clock_cfg.h
index 1cdfae949..945a6010b 100644
--- a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp_clock_cfg.h
+++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp_clock_cfg.h
@@ -7,7 +7,7 @@
 #define BSP_CFG_PLL_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL Src: XTAL */
 #define BSP_CFG_HOCO_FREQUENCY (2) /* HOCO 20MHz */
 #define BSP_CFG_PLL_DIV (BSP_CLOCKS_PLL_DIV_1) /* PLL Div /1 */
-#define BSP_CFG_PLL_MUL BSP_CLOCKS_PLL_MUL_20_0 /* PLL Mul x20.0 */
+#define BSP_CFG_PLL_MUL BSP_CLOCKS_PLL_MUL(20U,0U) /* PLL Mul x20.0 */
 #define BSP_CFG_CLOCK_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_PLL) /* Clock Src: PLL */
 #define BSP_CFG_ICLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* ICLK Div /2 */
 #define BSP_CFG_PCLKA_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* PCLKA Div /2 */
diff --git a/hw/bsp/ra/boards/ra6m5_ek/board.h b/hw/bsp/ra/boards/ra6m5_ek/board.h
index c88e9a0a2..779f71810 100644
--- a/hw/bsp/ra/boards/ra6m5_ek/board.h
+++ b/hw/bsp/ra/boards/ra6m5_ek/board.h
@@ -41,22 +41,24 @@ static const ioport_pin_cfg_t board_pin_cfg[] = {
     { .pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT | IOPORT_CFG_PORT_OUTPUT_LOW },
     { .pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT },
 
-    // USB FS D+, D-, VBus
+    // USB FS
     { .pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS | IOPORT_CFG_DRIVE_HIGH },
     { .pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS | IOPORT_CFG_DRIVE_HIGH},
     { .pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS | IOPORT_CFG_DRIVE_HIGH},
 
-    // USB HS D+, D-, VBus
+    // USB HS
     { .pin = BSP_IO_PORT_07_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_HS },
     { .pin = BSP_IO_PORT_11_PIN_00, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_HS | IOPORT_CFG_DRIVE_HIGH},
     { .pin = BSP_IO_PORT_11_PIN_01, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_HS | IOPORT_CFG_DRIVE_HIGH},
 
     // ETM Trace
-    { .pin = BSP_IO_PORT_02_PIN_08, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE },
-    { .pin = BSP_IO_PORT_02_PIN_09, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE },
-    { .pin = BSP_IO_PORT_02_PIN_10, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE },
-    { .pin = BSP_IO_PORT_02_PIN_11, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE },
-    { .pin = BSP_IO_PORT_02_PIN_14, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE },
+    #ifdef TRACE_ETM
+    { .pin = BSP_IO_PORT_02_PIN_08, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE | IOPORT_CFG_DRIVE_HS_HIGH },
+    { .pin = BSP_IO_PORT_02_PIN_09, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE | IOPORT_CFG_DRIVE_HS_HIGH },
+    { .pin = BSP_IO_PORT_02_PIN_10, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE | IOPORT_CFG_DRIVE_HS_HIGH },
+    { .pin = BSP_IO_PORT_02_PIN_11, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE | IOPORT_CFG_DRIVE_HS_HIGH },
+    { .pin = BSP_IO_PORT_02_PIN_14, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE | IOPORT_CFG_DRIVE_HS_HIGH },
+     #endif
 };
 
 #ifdef __cplusplus
diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp_clock_cfg.h
index 77ac41d0a..9bb496dd6 100644
--- a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp_clock_cfg.h
+++ b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp_clock_cfg.h
@@ -1,35 +1,45 @@
 /* generated configuration header file - do not edit */
 #ifndef BSP_CLOCK_CFG_H_
 #define BSP_CLOCK_CFG_H_
-#define BSP_CFG_CLOCKS_SECURE (0)
+
+#define BSP_CFG_CLOCKS_SECURE   (0)
 #define BSP_CFG_CLOCKS_OVERRIDE (0)
-#define BSP_CFG_XTAL_HZ (24000000) /* XTAL 24000000Hz */
-#define BSP_CFG_HOCO_FREQUENCY (2) /* HOCO 20MHz */
-#define BSP_CFG_PLL_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL Src: XTAL */
-#define BSP_CFG_PLL_DIV (BSP_CLOCKS_PLL_DIV_3) /* PLL Div /3 */
-#define BSP_CFG_PLL_MUL BSP_CLOCKS_PLL_MUL_25_0 /* PLL Mul x25.0 */
-#define BSP_CFG_PLL2_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL2 Src: XTAL */
-#define BSP_CFG_PLL2_DIV (BSP_CLOCKS_PLL_DIV_2) /* PLL2 Div /2 */
-#define BSP_CFG_PLL2_MUL BSP_CLOCKS_PLL_MUL_20_0 /* PLL2 Mul x20.0 */
-#define BSP_CFG_CLOCK_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_PLL) /* Clock Src: PLL */
-#define BSP_CFG_CLKOUT_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* CLKOUT Disabled */
-#define BSP_CFG_UCK_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_PLL2) /* UCLK Src: PLL2 */
-#define BSP_CFG_U60CK_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* U60CK Disabled */
-#define BSP_CFG_OCTA_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* OCTASPICLK Disabled */
-#define BSP_CFG_CANFDCLK_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* CANFDCLK Disabled */
-#define BSP_CFG_CECCLK_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* CECCLK Disabled */
-#define BSP_CFG_ICLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* ICLK Div /1 */
-#define BSP_CFG_PCLKA_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* PCLKA Div /2 */
-#define BSP_CFG_PCLKB_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* PCLKB Div /4 */
-#define BSP_CFG_PCLKC_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* PCLKC Div /4 */
-#define BSP_CFG_PCLKD_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* PCLKD Div /2 */
-#define BSP_CFG_BCLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* BCLK Div /2 */
-#define BSP_CFG_BCLK_OUTPUT (2) /* EBCLK Div /2 */
-#define BSP_CFG_FCLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* FCLK Div /4 */
-#define BSP_CFG_CLKOUT_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* CLKOUT Div /1 */
-#define BSP_CFG_UCK_DIV (BSP_CLOCKS_USB_CLOCK_DIV_5) /* UCLK Div /5 */
-#define BSP_CFG_U60CK_DIV (BSP_CLOCKS_USB60_CLOCK_DIV_1) /* U60CK Div /1 */
-#define BSP_CFG_OCTA_DIV (BSP_CLOCKS_OCTA_CLOCK_DIV_1) /* OCTASPICLK Div /1 */
-#define BSP_CFG_CANFDCLK_DIV (BSP_CLOCKS_CANFD_CLOCK_DIV_1) /* CANFDCLK Div /1 */
-#define BSP_CFG_CECCLK_DIV (BSP_CLOCKS_CEC_CLOCK_DIV_1) /* CECCLK Div /1 */
+#define BSP_CFG_XTAL_HZ         (24000000)                         /* XTAL 24000000Hz */
+#define BSP_CFG_HOCO_FREQUENCY  (2)                                /* HOCO 20MHz */
+#define BSP_CFG_PLL_SOURCE      (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL Src: XTAL */
+#define BSP_CFG_PLL_DIV         (BSP_CLOCKS_PLL_DIV_3)             /* PLL Div /3 */
+
+#ifdef TRACE_ETM
+// Due to ozone fixed trace clock div = 1, PLL is limited around 100Mhz. This use 128 Mhz
+#define BSP_CFG_PLL_MUL         (BSP_CLOCKS_PLL_MUL(16U,0U))       /* PLL Mul x16.0 */
+#else
+#define BSP_CFG_PLL_MUL         (BSP_CLOCKS_PLL_MUL(25U,0U))       /* PLL Mul x25.0 */
+#endif
+
+#define BSP_CFG_PLL2_SOURCE     (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL2 Src: XTAL */
+#define BSP_CFG_PLL2_DIV        (BSP_CLOCKS_PLL_DIV_2)             /* PLL2 Div /2 */
+#define BSP_CFG_PLL2_MUL        (BSP_CLOCKS_PLL_MUL(20U,0U))       /* PLL2 Mul x20.0 */
+#define BSP_CFG_CLOCK_SOURCE    (BSP_CLOCKS_SOURCE_CLOCK_PLL)      /* Clock Src: PLL */
+#define BSP_CFG_CLKOUT_SOURCE   (BSP_CLOCKS_CLOCK_DISABLED)        /* CLKOUT Disabled */
+#define BSP_CFG_UCK_SOURCE      (BSP_CLOCKS_SOURCE_CLOCK_PLL2)     /* UCLK Src: PLL2 */
+#define BSP_CFG_U60CK_SOURCE    (BSP_CLOCKS_SOURCE_CLOCK_PLL2)     /* U60CK Src: PLL2 */
+#define BSP_CFG_OCTA_SOURCE     (BSP_CLOCKS_CLOCK_DISABLED)        /* OCTASPICLK Disabled */
+#define BSP_CFG_CANFDCLK_SOURCE (BSP_CLOCKS_CLOCK_DISABLED)        /* CANFDCLK Disabled */
+#define BSP_CFG_CECCLK_SOURCE   (BSP_CLOCKS_CLOCK_DISABLED)        /* CECCLK Disabled */
+#define BSP_CFG_ICLK_DIV        (BSP_CLOCKS_SYS_CLOCK_DIV_1)       /* ICLK Div /1 */
+#define BSP_CFG_PCLKA_DIV       (BSP_CLOCKS_SYS_CLOCK_DIV_2)       /* PCLKA Div /2 */
+#define BSP_CFG_PCLKB_DIV       (BSP_CLOCKS_SYS_CLOCK_DIV_4)       /* PCLKB Div /4 */
+#define BSP_CFG_PCLKC_DIV       (BSP_CLOCKS_SYS_CLOCK_DIV_4)       /* PCLKC Div /4 */
+#define BSP_CFG_PCLKD_DIV       (BSP_CLOCKS_SYS_CLOCK_DIV_2)       /* PCLKD Div /2 */
+#define BSP_CFG_BCLK_DIV        (BSP_CLOCKS_SYS_CLOCK_DIV_2)       /* BCLK Div /2 */
+#define BSP_CFG_BCLK_OUTPUT     (2)                                /* EBCLK Div /2 */
+#define BSP_CFG_FCLK_DIV        (BSP_CLOCKS_SYS_CLOCK_DIV_4)       /* FCLK Div /4 */
+#define BSP_CFG_CLKOUT_DIV      (BSP_CLOCKS_SYS_CLOCK_DIV_1)       /* CLKOUT Div /1 */
+#define BSP_CFG_UCK_DIV         (BSP_CLOCKS_USB_CLOCK_DIV_5)       /* UCLK Div /5 */
+#define BSP_CFG_U60CK_DIV       (BSP_CLOCKS_USB60_CLOCK_DIV_4)     /* U60CK Div /4 */
+#define BSP_CFG_OCTA_DIV        (BSP_CLOCKS_OCTA_CLOCK_DIV_1)      /* OCTASPICLK Div /1 */
+#define BSP_CFG_CANFDCLK_DIV    (BSP_CLOCKS_CANFD_CLOCK_DIV_1)     /* CANFDCLK Div /1 */
+#define BSP_CFG_CECCLK_DIV      (BSP_CLOCKS_CEC_CLOCK_DIV_1)       /* CECCLK Div /1 */
+
+
 #endif /* BSP_CLOCK_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug b/hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug
index fa55d40b2..8a1262138 100644
--- a/hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug
+++ b/hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug
@@ -33,3 +33,73 @@ void BeforeTargetConnect (void) {
   // Trace pin init is done by J-Link script file as J-Link script files are IDE independent
   //
 }
+
+/*********************************************************************
+*
+*       AfterTargetReset
+*
+* Function description
+*   Event handler routine.
+*    - Sets the PC register to program reset value.
+*    - Sets the SP register to program reset value on Cortex-M.
+*
+**********************************************************************
+*/
+void AfterTargetReset (void) {
+  unsigned int SP;
+  unsigned int PC;
+  unsigned int VectorTableAddr;
+
+  VectorTableAddr = Elf.GetBaseAddr();
+
+  if (VectorTableAddr != 0xFFFFFFFF) {
+    SP = Target.ReadU32(VectorTableAddr);
+    Target.SetReg("SP", SP);
+  } else {
+    Util.Log("Project file error: failed to get program base");
+  }
+
+  PC = Elf.GetEntryPointPC();
+
+  if (PC != 0xFFFFFFFF) {
+    Target.SetReg("PC", PC);
+  } else if (VectorTableAddr != 0xFFFFFFFF) {
+    PC = Target.ReadU32(VectorTableAddr + 4);
+    Target.SetReg("PC", PC);
+  }
+}
+
+/*********************************************************************
+*
+*      AfterTargetDownload
+*
+* Function description
+*   Event handler routine.
+*    - Sets the PC register to program reset value.
+*    - Sets the SP register to program reset value on Cortex-M.
+*
+**********************************************************************
+*/
+void AfterTargetDownload (void) {
+  unsigned int SP;
+  unsigned int PC;
+  unsigned int VectorTableAddr;
+
+  VectorTableAddr = Elf.GetBaseAddr();
+
+  if (VectorTableAddr != 0xFFFFFFFF) {
+    SP = Target.ReadU32(VectorTableAddr);
+    Target.SetReg("SP", SP);
+  } else {
+    Util.Log("Project file error: failed to get program base");
+  }
+
+  PC = Elf.GetEntryPointPC();
+
+  if (PC != 0xFFFFFFFF) {
+    Target.SetReg("PC", PC);
+  } else if (VectorTableAddr != 0xFFFFFFFF) {
+    PC = Target.ReadU32(VectorTableAddr + 4);
+    Target.SetReg("PC", PC);
+  }
+}
diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c
index 08823dd52..769678954 100644
--- a/hw/bsp/ra/family.c
+++ b/hw/bsp/ra/family.c
@@ -36,15 +36,14 @@
 #endif
 
 #include "bsp_api.h"
+#include "r_ioport.h"
+#include "r_ioport_api.h"
+#include "renesas.h"
 
 #ifdef __GNUC__
 #pragma GCC diagnostic pop
 #endif
 
-#include "r_ioport.h"
-#include "r_ioport_api.h"
-#include "renesas.h"
-
 #include "bsp/board.h"
 #include "board.h"
 
@@ -86,15 +85,17 @@ void board_init(void)
   R_IOPORT_Open(&port_ctrl, &family_pin_cfg);
 
 #ifdef TRACE_ETM
-  // Enable trace clock with div 1 (100 Mhz)
-  R_SYSTEM->TRCKCR = R_SYSTEM_TRCKCR_TRCKEN_Msk;
+  // Enable trace clock (max 100Mhz) = PLL / div
+  // Somehow ozone/jtrace always fixed trace div to 1 therefore for ETM tracing working reliably
+  // PLL is limited around 100Mhz
+  R_SYSTEM->TRCKCR = R_SYSTEM_TRCKCR_TRCKEN_Msk | 0x01;
 #endif
 
   // Enable USB module
   R_MSTP->MSTPCRB &= ~(1U << 11U); // FS
 
 #ifdef R_USB_HS0_BASE
-  R_MSTP->MSTPCRB &= ~(1U << 12U); // HS
+//  R_MSTP->MSTPCRB &= ~(1U << 12U); // HS
 #endif
 
 #if CFG_TUSB_OS == OPT_OS_FREERTOS
diff --git a/hw/bsp/ra/family.cmake b/hw/bsp/ra/family.cmake
index 828559e5e..f4e978230 100644
--- a/hw/bsp/ra/family.cmake
+++ b/hw/bsp/ra/family.cmake
@@ -37,14 +37,14 @@ function(add_board_target BOARD_TARGET)
       ${FSP_RA}/src/bsp/mcu/all/bsp_security.c
       ${FSP_RA}/src/r_ioport/r_ioport.c
       )
-    target_compile_definitions(${BOARD_TARGET} PUBLIC
-      _RA_TZ_NONSECURE
-      )
+    # ETM Trace option
+    if (TRACE_ETM STREQUAL "1")
+      target_compile_definitions(${BOARD_TARGET} PUBLIC TRACE_ETM)
+    endif ()
 
     target_compile_options(${BOARD_TARGET} PUBLIC
       -ffreestanding
       )
-
     target_include_directories(${BOARD_TARGET} PUBLIC
       ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
       ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
diff --git a/tools/get_deps.py b/tools/get_deps.py
index fa47a8067..21ad539c4 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -57,7 +57,7 @@ deps_optional = {
                                          '58879cfa0eca5725d8db6443ec17f8896a321042',
                                          'rp2040'],
     'hw/mcu/renesas/fsp': ['https://github.com/renesas/fsp.git',
-                           '9860fae1f180340a0e3c097dc6e91323cf83b926',
+                           'd52e5a6a59b7c638da860c2bb309b6e78e752ff8',
                            'ra'],
     'hw/mcu/renesas/rx': ['https://github.com/kkitayam/rx_device.git',
                           '706b4e0cf485605c32351e2f90f5698267996023',

From 1d6ca3bc9b68e0f17f2db61d2d8c2c951b8b32eb Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 4 Jul 2023 20:04:54 +0700
Subject: [PATCH 484/691] fix ra4m3 ek build

---
 hw/bsp/ra/boards/ra4m3_ek/board.h             |   2 +-
 .../ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h  |  46 +-
 .../ra4m3_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h |   5 +
 .../fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h       |  11 +
 .../ra4m3_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h | 436 +++++++++++-------
 .../boards/ra4m3_ek/fsp_cfg/bsp_clock_cfg.h   |  42 +-
 6 files changed, 355 insertions(+), 187 deletions(-)
 create mode 100644 hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h
 create mode 100644 hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h

diff --git a/hw/bsp/ra/boards/ra4m3_ek/board.h b/hw/bsp/ra/boards/ra4m3_ek/board.h
index 4b4735c4f..9dd2545a0 100644
--- a/hw/bsp/ra/boards/ra4m3_ek/board.h
+++ b/hw/bsp/ra/boards/ra4m3_ek/board.h
@@ -40,7 +40,7 @@ extern "C" {
 static const ioport_pin_cfg_t board_pin_cfg[] = {
   {.pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT},
   {.pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT},
-    // USB FS D+, D-, VBus
+    // USB FS
   {.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
   {.pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
   {.pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h
index a9cb8210b..6a47bccc6 100644
--- a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h
+++ b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h
@@ -1,21 +1,36 @@
 /* generated configuration header file - do not edit */
 #ifndef BSP_CFG_H_
 #define BSP_CFG_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 #include "bsp_clock_cfg.h"
 #include "bsp_mcu_family_cfg.h"
 
-#undef RA_NOT_DEFINED
+#define RA_NOT_DEFINED 0
+#ifndef BSP_CFG_RTOS
+#if (RA_NOT_DEFINED) != (RA_NOT_DEFINED)
+#define BSP_CFG_RTOS (2)
+#elif (RA_NOT_DEFINED) != (RA_NOT_DEFINED)
+#define BSP_CFG_RTOS (1)
+#else
 #define BSP_CFG_RTOS (0)
+#endif
+#endif
+#ifndef BSP_CFG_RTC_USED
+#define BSP_CFG_RTC_USED (RA_NOT_DEFINED)
+#endif
+#undef RA_NOT_DEFINED
 #if defined(_RA_BOOT_IMAGE)
 #define BSP_CFG_BOOT_IMAGE (1)
 #endif
-#define BSP_CFG_MCU_VCC_MV	      (3300)
-#define BSP_CFG_STACK_MAIN_BYTES      (0x400)
-#define BSP_CFG_HEAP_BYTES	      (0x400)
+#define BSP_CFG_MCU_VCC_MV (3300)
+#define BSP_CFG_STACK_MAIN_BYTES (0x400)
+#define BSP_CFG_HEAP_BYTES (0x400)
 #define BSP_CFG_PARAM_CHECKING_ENABLE (1)
-#define BSP_CFG_ASSERT		      (0)
-#define BSP_CFG_ERROR_LOG	      (0)
+#define BSP_CFG_ASSERT (0)
+#define BSP_CFG_ERROR_LOG (0)
 
 #define BSP_CFG_PFS_PROTECT ((1))
 
@@ -24,14 +39,27 @@
 
 #define BSP_CFG_STARTUP_CLOCK_REG_NOT_RESET ((0))
 
+#ifndef BSP_CLOCK_CFG_MAIN_OSC_POPULATED
 #define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (1)
+#endif
 
-#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE	(0)
-#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE		(0)
-#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED	(1)
+#ifndef BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE
+#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE (0)
+#endif
+#ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
+#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (0)
+#endif
+#ifndef BSP_CLOCK_CFG_SUBCLOCK_POPULATED
+#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (1)
+#endif
+#ifndef BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS
 #define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000
+#endif
 
 // for SystemInit()
 void bsp_init(void * p_args);
 
+#ifdef __cplusplus
+}
+#endif
 #endif /* BSP_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h
new file mode 100644
index 000000000..444d32e56
--- /dev/null
+++ b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_mcu_device_cfg.h
@@ -0,0 +1,5 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_MCU_DEVICE_CFG_H_
+#define BSP_MCU_DEVICE_CFG_H_
+#define BSP_CFG_MCU_PART_SERIES (4)
+#endif /* BSP_MCU_DEVICE_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h
new file mode 100644
index 000000000..1a0bc02e2
--- /dev/null
+++ b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h
@@ -0,0 +1,11 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_MCU_DEVICE_PN_CFG_H_
+#define BSP_MCU_DEVICE_PN_CFG_H_
+#define BSP_MCU_R7FA4M3AF3CFB
+#define BSP_MCU_FEATURE_SET ('A')
+#define BSP_ROM_SIZE_BYTES (1048576)
+#define BSP_RAM_SIZE_BYTES (131072)
+#define BSP_DATA_FLASH_SIZE_BYTES (8192)
+#define BSP_PACKAGE_LQFP
+#define BSP_PACKAGE_PINS (144)
+#endif /* BSP_MCU_DEVICE_PN_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h
index 4ecda1c66..26e184a94 100644
--- a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h
+++ b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h
@@ -1,129 +1,181 @@
-/* generated configuration header file through renesas e2 studio */
+/* generated configuration header file - do not edit */
 #ifndef BSP_MCU_FAMILY_CFG_H_
 #define BSP_MCU_FAMILY_CFG_H_
-
-#include "bsp_clock_cfg.h"
-#include "bsp_mcu_info.h"
-
-#define BSP_CFG_MCU_PART_SERIES (4)
-#define BSP_MCU_R7FA4M3AF3CFB
-#define BSP_ROM_SIZE_BYTES	  (1048576)
-#define BSP_RAM_SIZE_BYTES	  (131072)
-#define BSP_DATA_FLASH_SIZE_BYTES (8192)
-#define BSP_PACKAGE_LQFP
-#define BSP_PACKAGE_PINS (144)
-
-#define BSP_MCU_GROUP_RA4M3 (1)
-#define BSP_LOCO_HZ	    (32768)
-#define BSP_MOCO_HZ	    (8000000)
-#define BSP_SUB_CLOCK_HZ    (32768)
-#if BSP_CFG_HOCO_FREQUENCY == 0
-#define BSP_HOCO_HZ (16000000)
-#elif BSP_CFG_HOCO_FREQUENCY == 1
-#define BSP_HOCO_HZ (18000000)
-#elif BSP_CFG_HOCO_FREQUENCY == 2
-#define BSP_HOCO_HZ (20000000)
-#else
-#error "Invalid HOCO frequency chosen (BSP_CFG_HOCO_FREQUENCY) in bsp_clock_cfg.h"
+#ifdef __cplusplus
+extern "C" {
 #endif
 
-#define BSP_CFG_FLL_ENABLE (0)
+#include "bsp_mcu_device_pn_cfg.h"
+#include "bsp_mcu_device_cfg.h"
+#include "../../../ra/fsp/src/bsp/mcu/ra4m3/bsp_mcu_info.h"
+#include "bsp_clock_cfg.h"
+#define BSP_MCU_GROUP_RA4M3 (1)
+#define BSP_LOCO_HZ                 (32768)
+#define BSP_MOCO_HZ                 (8000000)
+#define BSP_SUB_CLOCK_HZ            (32768)
+#if   BSP_CFG_HOCO_FREQUENCY == 0
+#define BSP_HOCO_HZ                 (16000000)
+#elif BSP_CFG_HOCO_FREQUENCY == 1
+                #define BSP_HOCO_HZ                 (18000000)
+            #elif BSP_CFG_HOCO_FREQUENCY == 2
+                #define BSP_HOCO_HZ                 (20000000)
+            #else
+                #error "Invalid HOCO frequency chosen (BSP_CFG_HOCO_FREQUENCY) in bsp_clock_cfg.h"
+            #endif
 
-#define BSP_CORTEX_VECTOR_TABLE_ENTRIES (16U)
-#define BSP_VECTOR_TABLE_MAX_ENTRIES	(112U)
-#define BSP_MCU_VBATT_SUPPORT		(1)
+#define BSP_CFG_FLL_ENABLE                 (0)
+
+#define BSP_CORTEX_VECTOR_TABLE_ENTRIES    (16U)
+#define BSP_VECTOR_TABLE_MAX_ENTRIES       (112U)
 
 #if defined(_RA_TZ_SECURE)
-#define BSP_TZ_SECURE_BUILD    (1)
-#define BSP_TZ_NONSECURE_BUILD (0)
-#elif defined(_RA_TZ_NONSECURE)
-#define BSP_TZ_SECURE_BUILD    (0)
-#define BSP_TZ_NONSECURE_BUILD (1)
-#else
-#define BSP_TZ_SECURE_BUILD    (0)
-#define BSP_TZ_NONSECURE_BUILD (0)
+            #define BSP_TZ_SECURE_BUILD           (1)
+            #define BSP_TZ_NONSECURE_BUILD        (0)
+            #elif defined(_RA_TZ_NONSECURE)
+            #define BSP_TZ_SECURE_BUILD           (0)
+            #define BSP_TZ_NONSECURE_BUILD        (1)
+            #else
+#define BSP_TZ_SECURE_BUILD           (0)
+#define BSP_TZ_NONSECURE_BUILD        (0)
 #endif
 
 /* TrustZone Settings */
-#define BSP_TZ_CFG_INIT_SECURE_ONLY   (BSP_CFG_CLOCKS_SECURE || (!BSP_CFG_CLOCKS_OVERRIDE))
-#define BSP_TZ_CFG_SKIP_INIT	      (BSP_TZ_NONSECURE_BUILD && BSP_TZ_CFG_INIT_SECURE_ONLY)
-#define BSP_TZ_CFG_EXCEPTION_RESPONSE (0)
+#define BSP_TZ_CFG_INIT_SECURE_ONLY       (BSP_CFG_CLOCKS_SECURE || (!BSP_CFG_CLOCKS_OVERRIDE))
+#define BSP_TZ_CFG_SKIP_INIT              (BSP_TZ_NONSECURE_BUILD && BSP_TZ_CFG_INIT_SECURE_ONLY)
+#define BSP_TZ_CFG_EXCEPTION_RESPONSE     (0)
 
 /* CMSIS TrustZone Settings */
-#define SCB_CSR_AIRCR_INIT	   (1)
-#define SCB_AIRCR_BFHFNMINS_VAL	   (0)
-#define SCB_AIRCR_SYSRESETREQS_VAL (1)
-#define SCB_AIRCR_PRIS_VAL	   (0)
-#define TZ_FPU_NS_USAGE		   (1)
-#define SCB_NSACR_CP10_11_VAL	   (3U)
+#define SCB_CSR_AIRCR_INIT                (1)
+#define SCB_AIRCR_BFHFNMINS_VAL           (0)
+#define SCB_AIRCR_SYSRESETREQS_VAL        (1)
+#define SCB_AIRCR_PRIS_VAL                (0)
+#define TZ_FPU_NS_USAGE                   (1)
+#ifndef SCB_NSACR_CP10_11_VAL
+#define SCB_NSACR_CP10_11_VAL             (3U)
+#endif
 
-#define FPU_FPCCR_TS_VAL	(1U)
-#define FPU_FPCCR_CLRONRETS_VAL (1)
+#ifndef FPU_FPCCR_TS_VAL
+#define FPU_FPCCR_TS_VAL                  (1U)
+#endif
+#define FPU_FPCCR_CLRONRETS_VAL           (1)
 
-#define FPU_FPCCR_CLRONRET_VAL (1)
+#ifndef FPU_FPCCR_CLRONRET_VAL
+#define FPU_FPCCR_CLRONRET_VAL            (1)
+#endif
 
 /* The C-Cache line size that is configured during startup. */
-#define BSP_CFG_C_CACHE_LINE_SIZE (1U)
+#ifndef BSP_CFG_C_CACHE_LINE_SIZE
+#define BSP_CFG_C_CACHE_LINE_SIZE   (1U)
+#endif
 
 /* Type 1 Peripheral Security Attribution */
 
 /* Peripheral Security Attribution Register (PSAR) Settings */
-#define BSP_TZ_CFG_PSARB                                                                                             \
-  ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CAN1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* CAN0 */ |   \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* IIC1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9) /* IIC0 */ |   \
-   (((1 > 0) ? 0U : 1U) << 11) /* USBFS */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 18) /* SPI1 */ |             \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 19) /* SPI0 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* SCI9 */ | \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* SCI8 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* SCI7 */ | \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 25) /* SCI6 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* SCI5 */ | \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* SCI4 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 28) /* SCI3 */ | \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* SCI2 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 30) /* SCI1 */ | \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCI0 */ | 0x33f4f9) /* Unused */
-#define BSP_TZ_CFG_PSARC                                                                                             \
-  ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* CAC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CRC */ |     \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* CTSU */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* SSIE0 */ |  \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* SDHI0 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* DOC */ | \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCE9 */ | 0x7fffcef4) /* Unused */
-#define BSP_TZ_CFG_PSARD                                                                                               \
-  ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* AGT3 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* AGT2 */ |     \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* AGT1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* AGT0 */ |     \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 11) /* POEG3 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* POEG2 */ | \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* POEG1 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* POEG0 */ | \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* ADC1 */ | (((1 > 0) ? 0U : 1U) << 16) /* ADC0 */ |                \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 20) /* DAC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* TSN */ |     \
-   0xffae07f0) /* Unused */
-#define BSP_TZ_CFG_PSARE                                                                                             \
-  ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* WDT */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* IWDT */ |    \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* RTC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* AGT5 */ |   \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* AGT4 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* GPT9 */ | \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* GPT8 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* GPT7 */ | \
-   (((1 > 0) ? 0U : 1U) << 25) /* GPT6 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* GPT5 */ |              \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* GPT4 */ | (((1 > 0) ? 0U : 1U) << 28) /* GPT3 */ |              \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* GPT2 */ | (((1 > 0) ? 0U : 1U) << 30) /* GPT1 */ |              \
-   (((1 > 0) ? 0U : 1U) << 31) /* GPT0 */ | 0x3f3ff8) /* Unused */
-#define BSP_TZ_CFG_MSSAR                                                                                              \
-  ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* ELC */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* DTC_DMAC */ | \
-   0xfffffffc) /* Unused */
+#ifndef BSP_TZ_CFG_PSARB
+#define BSP_TZ_CFG_PSARB (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CAN1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* CAN0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* IIC1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9) /* IIC0 */ | \
+            (((1 > 0) ? 0U : 1U) << 11) /* USBFS */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 18) /* SPI1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 19) /* SPI0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* SCI9 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* SCI8 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* SCI7 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 25) /* SCI6 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* SCI5 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* SCI4 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 28) /* SCI3 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* SCI2 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 30) /* SCI1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCI0 */ | \
+            0x33f4f9) /* Unused */
+#endif
+#ifndef BSP_TZ_CFG_PSARC
+#define BSP_TZ_CFG_PSARC (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* CAC */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CRC */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* CTSU */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* SSIE0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* SDHI0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* DOC */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCE9 */ | \
+            0x7fffcef4) /* Unused */
+#endif
+#ifndef BSP_TZ_CFG_PSARD
+#define BSP_TZ_CFG_PSARD (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* AGT3 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* AGT2 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* AGT1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* AGT0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 11) /* POEG3 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* POEG2 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* POEG1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* POEG0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* ADC1 */ | \
+            (((1 > 0) ? 0U : 1U) << 16) /* ADC0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 20) /* DAC */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* TSN */ | \
+            0xffae07f0) /* Unused */
+#endif
+#ifndef BSP_TZ_CFG_PSARE
+#define BSP_TZ_CFG_PSARE (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* WDT */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* IWDT */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* RTC */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* AGT5 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* AGT4 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* GPT9 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* GPT8 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* GPT7 */ | \
+            (((1 > 0) ? 0U : 1U) << 25) /* GPT6 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* GPT5 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* GPT4 */ | \
+            (((1 > 0) ? 0U : 1U) << 28) /* GPT3 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* GPT2 */ | \
+            (((1 > 0) ? 0U : 1U) << 30) /* GPT1 */ | \
+            (((1 > 0) ? 0U : 1U) << 31) /* GPT0 */ | \
+            0x3f3ff8) /* Unused */
+#endif
+#ifndef BSP_TZ_CFG_MSSAR
+#define BSP_TZ_CFG_MSSAR (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* ELC */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* DTC_DMAC */ | \
+            0xfffffffc) /* Unused */
+#endif
 
 /* Type 2 Peripheral Security Attribution */
 
 /* Security attribution for Cache registers. */
+#ifndef BSP_TZ_CFG_CSAR
 #define BSP_TZ_CFG_CSAR (0xFFFFFFFFU)
+#endif
 
 /* Security attribution for RSTSRn registers. */
+#ifndef BSP_TZ_CFG_RSTSAR
 #define BSP_TZ_CFG_RSTSAR (0xFFFFFFFFU)
+#endif
 
 /* Security attribution for registers of LVD channels. */
-#define BSP_TZ_CFG_LVDSAR                                              \
-  ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) | /* LVD Channel 1 */ \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) | /* LVD Channel 2 */ \
-   0xFFFFFFFCU)
+#ifndef BSP_TZ_CFG_LVDSAR
+#define BSP_TZ_CFG_LVDSAR (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) | /* LVD Channel 1 */ \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) | /* LVD Channel 2 */ \
+            0xFFFFFFFCU)
+#endif
 
 /* Security attribution for LPM registers. */
+#ifndef BSP_TZ_CFG_LPMSAR
 #define BSP_TZ_CFG_LPMSAR ((RA_NOT_DEFINED > 0) ? 0xFFFFFCEAU : 0xFFFFFFFFU)
+#endif
 /* Deep Standby Interrupt Factor Security Attribution Register. */
+#ifndef BSP_TZ_CFG_DPFSAR
 #define BSP_TZ_CFG_DPFSAR ((RA_NOT_DEFINED > 0) ? 0xF2E00000U : 0xFFFFFFFFU)
+#endif
 
 /* Security attribution for CGC registers. */
+#ifndef BSP_TZ_CFG_CGFSAR
 #if BSP_CFG_CLOCKS_SECURE
 /* Protect all CGC registers from Non-secure write access. */
 #define BSP_TZ_CFG_CGFSAR (0xFFFCE402U)
@@ -131,58 +183,78 @@
 /* Allow Secure and Non-secure write access. */
 #define BSP_TZ_CFG_CGFSAR (0xFFFFFFFFU)
 #endif
+#endif
 
 /* Security attribution for Battery Backup registers. */
+#ifndef BSP_TZ_CFG_BBFSAR
 #define BSP_TZ_CFG_BBFSAR (0x00FFFFFF)
+#endif
 
 /* Security attribution for registers for IRQ channels. */
-#define BSP_TZ_CFG_ICUSARA                                                                                                    \
-  ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* External IRQ0 */ |                                                       \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* External IRQ1 */ |                                                       \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* External IRQ2 */ |                                                       \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* External IRQ3 */ |                                                       \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* External IRQ4 */ |                                                       \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* External IRQ5 */ |                                                       \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* External IRQ6 */ |                                                       \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* External IRQ7 */ |                                                       \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8U) /* External IRQ8 */ |                                                       \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9U) /* External IRQ9 */ | (((1 > 0) ? 0U : 1U) << 10U) /* External IRQ10 */ |   \
-   (((1 > 0) ? 0U : 1U) << 11U) /* External IRQ11 */ | (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12U) /* External IRQ12 */ | \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13U) /* External IRQ13 */ |                                                     \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14U) /* External IRQ14 */ |                                                     \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15U) /* External IRQ15 */ | 0xFFFF0000U)
+#ifndef BSP_TZ_CFG_ICUSARA
+#define BSP_TZ_CFG_ICUSARA (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* External IRQ0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* External IRQ1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* External IRQ2 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* External IRQ3 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* External IRQ4 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* External IRQ5 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* External IRQ6 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* External IRQ7 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8U) /* External IRQ8 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9U) /* External IRQ9 */ | \
+            (((1 > 0) ? 0U : 1U) << 10U) /* External IRQ10 */ | \
+            (((1 > 0) ? 0U : 1U) << 11U) /* External IRQ11 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12U) /* External IRQ12 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13U) /* External IRQ13 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14U) /* External IRQ14 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15U) /* External IRQ15 */ | \
+            0xFFFF0000U)
+#endif
 
 /* Security attribution for NMI registers. */
+#ifndef BSP_TZ_CFG_ICUSARB
 #define BSP_TZ_CFG_ICUSARB (0 | 0xFFFFFFFEU) /* Should match AIRCR.BFHFNMINS. */
+#endif
 
 /* Security attribution for registers for DMAC channels */
-#define BSP_TZ_CFG_ICUSARC                                               \
-  ((((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* DMAC Channel 0 */ | \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* DMAC Channel 1 */ | \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* DMAC Channel 2 */ | \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* DMAC Channel 3 */ | \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* DMAC Channel 4 */ | \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* DMAC Channel 5 */ | \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* DMAC Channel 6 */ | \
-   (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* DMAC Channel 7 */ | 0xFFFFFF00U)
+#ifndef BSP_TZ_CFG_ICUSARC
+#define BSP_TZ_CFG_ICUSARC (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* DMAC Channel 0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* DMAC Channel 1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* DMAC Channel 2 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* DMAC Channel 3 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* DMAC Channel 4 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* DMAC Channel 5 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* DMAC Channel 6 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* DMAC Channel 7 */ | \
+            0xFFFFFF00U)
+#endif
 
 /* Security attribution registers for SELSR0. */
+#ifndef BSP_TZ_CFG_ICUSARD
 #define BSP_TZ_CFG_ICUSARD ((RA_NOT_DEFINED > 0) ? 0xFFFFFFFEU : 0xFFFFFFFFU)
+#endif
 
 /* Security attribution registers for WUPEN0. */
+#ifndef BSP_TZ_CFG_ICUSARE
 #define BSP_TZ_CFG_ICUSARE ((RA_NOT_DEFINED > 0) ? 0x04F2FFFFU : 0xFFFFFFFFU)
+#endif
 
 /* Security attribution registers for WUPEN1. */
+#ifndef BSP_TZ_CFG_ICUSARF
 #define BSP_TZ_CFG_ICUSARF ((RA_NOT_DEFINED > 0) ? 0xFFFFFFF8U : 0xFFFFFFFFU)
+#endif
 
 /* Set DTCSTSAR if the Secure program uses the DTC. */
-// #if RA_NOT_DEFINED == RA_NOT_DEFINED
+#if RA_NOT_DEFINED == RA_NOT_DEFINED
 #define BSP_TZ_CFG_DTC_USED (0U)
-// #else
-// #define BSP_TZ_CFG_DTC_USED (1U)
-// #endif
+#else
+ #define BSP_TZ_CFG_DTC_USED (1U)
+#endif
 
 /* Security attribution of FLWT and FCKMHZ registers. */
+#ifndef BSP_TZ_CFG_FSAR
 /* If the CGC registers are only accessible in Secure mode, than there is no
  * reason for nonsecure applications to access FLWT and FCKMHZ. */
 #if BSP_CFG_CLOCKS_SECURE
@@ -192,69 +264,123 @@
 /* Allow Secure and Non-secure write access. */
 #define BSP_TZ_CFG_FSAR (0xFFFFU)
 #endif
+#endif
 
 /* Security attribution for SRAM registers. */
-/* If the CGC registers are only accessible in Secure mode, than there is no
- * reason for Non Secure applications to access
+#ifndef BSP_TZ_CFG_SRAMSAR
+/* If the CGC registers are only accessible in Secure mode, than there is no reason for Non Secure applications to access
  * SRAM0WTEN and therefore there is no reason to access PRCR2. */
-#define BSP_TZ_CFG_SRAMSAR (1 | ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 1U) : 0U) | 4 | 0xFFFFFFF8U)
+#define BSP_TZ_CFG_SRAMSAR (\
+        1 | \
+        ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 1U) : 0U) | \
+        4 | \
+        0xFFFFFFF8U)
+#endif
 
 /* Security attribution for Standby RAM registers. */
+#ifndef BSP_TZ_CFG_STBRAMSAR
 #define BSP_TZ_CFG_STBRAMSAR (0 | 0xFFFFFFF0U)
+#endif
 
 /* Security attribution for the DMAC Bus Master MPU settings. */
-/* The DMAC Bus Master MPU settings should align with the DMAC channel settings.
- */
+#ifndef BSP_TZ_CFG_MMPUSARA
+/* The DMAC Bus Master MPU settings should align with the DMAC channel settings. */
 #define BSP_TZ_CFG_MMPUSARA (BSP_TZ_CFG_ICUSARC)
+#endif
 
 /* Security Attribution Register A for BUS Control registers. */
+#ifndef BSP_TZ_CFG_BUSSARA
 #define BSP_TZ_CFG_BUSSARA (0xFFFFFFFFU)
+#endif
 /* Security Attribution Register B for BUS Control registers. */
+#ifndef BSP_TZ_CFG_BUSSARB
 #define BSP_TZ_CFG_BUSSARB (0xFFFFFFFFU)
+#endif
 
-#define OFS_SEQ1	     0xA001A001 | (1 << 1) | (3 << 2)
-#define OFS_SEQ2	     (15 << 4) | (3 << 8) | (3 << 10)
-#define OFS_SEQ3	     (1 << 12) | (1 << 14) | (1 << 17)
-#define OFS_SEQ4	     (3 << 18) | (15 << 20) | (3 << 24) | (3 << 26)
-#define OFS_SEQ5	     (1 << 28) | (1 << 30)
+/* Enable Uninitialized Non-Secure Application Fallback. */
+#ifndef BSP_TZ_CFG_NON_SECURE_APPLICATION_FALLBACK
+#define BSP_TZ_CFG_NON_SECURE_APPLICATION_FALLBACK (1U)
+#endif
+
+#define OFS_SEQ1 0xA001A001 | (1 << 1) | (3 << 2)
+#define OFS_SEQ2 (15 << 4) | (3 << 8) | (3 << 10)
+#define OFS_SEQ3 (1 << 12) | (1 << 14) | (1 << 17)
+#define OFS_SEQ4 (3 << 18) |(15 << 20) | (3 << 24) | (3 << 26)
+#define OFS_SEQ5 (1 << 28) | (1 << 30)
 #define BSP_CFG_ROM_REG_OFS0 (OFS_SEQ1 | OFS_SEQ2 | OFS_SEQ3 | OFS_SEQ4 | OFS_SEQ5)
 
 /* Option Function Select Register 1 Security Attribution */
+#ifndef BSP_CFG_ROM_REG_OFS1_SEL
 #if defined(_RA_TZ_SECURE) || defined(_RA_TZ_NONSECURE)
-#define BSP_CFG_ROM_REG_OFS1_SEL \
-  (0xFFFFF8F8U | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0x700U : 0U) | ((RA_NOT_DEFINED > 0) ? 0U : 0x7U))
+            #define BSP_CFG_ROM_REG_OFS1_SEL (0xFFFFF8F8U | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0x700U : 0U) | ((RA_NOT_DEFINED > 0) ? 0U : 0x7U))
 #else
 #define BSP_CFG_ROM_REG_OFS1_SEL (0xFFFFF8F8U)
 #endif
+#endif
 
-#define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (3) | (1 << 8))
+#define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (3) |  (1 << 8))
+
+/* Used to create IELS values for the interrupt initialization table g_interrupt_event_link_select. */
+#define BSP_PRV_IELS_ENUM(vector)    (ELC_ ## vector)
 
-/* Used to create IELS values for the interrupt initialization table
- * g_interrupt_event_link_select. */
-#define BSP_PRV_IELS_ENUM(vector) (ELC_##vector)
 /* Dual Mode Select Register */
+#ifndef BSP_CFG_ROM_REG_DUALSEL
 #define BSP_CFG_ROM_REG_DUALSEL (0xFFFFFFFFU)
-/* Block Protection Register 0 */
-#define BSP_CFG_ROM_REG_BPS0 (~(0U))
-/* Block Protection Register 1 */
-#define BSP_CFG_ROM_REG_BPS1 (~(0U))
-/* Block Protection Register 2 */
-#define BSP_CFG_ROM_REG_BPS2 (0xFFFFFFFFU)
-/* Permanent Block Protection Register 0 */
-#define BSP_CFG_ROM_REG_PBPS0 (~(0U))
-/* Permanent Block Protection Register 1 */
-#define BSP_CFG_ROM_REG_PBPS1 (~(0U))
-/* Permanent Block Protection Register 2 */
-#define BSP_CFG_ROM_REG_PBPS2 (0xFFFFFFFFU)
-/* Security Attribution for Block Protection Register 0 (If any blocks are
- * marked as protected in the secure application, then mark them as secure) */
-#define BSP_CFG_ROM_REG_BPS_SEL0 (BSP_CFG_ROM_REG_BPS0 & BSP_CFG_ROM_REG_PBPS0)
-/* Security Attribution for Block Protection Register 1 (If any blocks are
- * marked as protected in the secure application, then mark them as secure) */
-#define BSP_CFG_ROM_REG_BPS_SEL1 (BSP_CFG_ROM_REG_BPS1 & BSP_CFG_ROM_REG_PBPS1)
-/* Security Attribution for Block Protection Register 2 (If any blocks are
- * marked as protected in the secure application, then mark them as secure) */
-#define BSP_CFG_ROM_REG_BPS_SEL2    (0xFFFFFFFFU)
-#define BSP_CLOCK_CFG_MAIN_OSC_WAIT (9)
+#endif
 
+/* Block Protection Register 0 */
+#ifndef BSP_CFG_ROM_REG_BPS0
+#define BSP_CFG_ROM_REG_BPS0 (~( 0U))
+#endif
+/* Block Protection Register 1 */
+#ifndef BSP_CFG_ROM_REG_BPS1
+#define BSP_CFG_ROM_REG_BPS1 (~( 0U))
+#endif
+/* Block Protection Register 2 */
+#ifndef BSP_CFG_ROM_REG_BPS2
+#define BSP_CFG_ROM_REG_BPS2 (0xFFFFFFFFU)
+#endif
+/* Block Protection Register 3 */
+#ifndef BSP_CFG_ROM_REG_BPS3
+#define BSP_CFG_ROM_REG_BPS3 (0xFFFFFFFFU)
+#endif
+/* Permanent Block Protection Register 0 */
+#ifndef BSP_CFG_ROM_REG_PBPS0
+#define BSP_CFG_ROM_REG_PBPS0 (~( 0U))
+#endif
+/* Permanent Block Protection Register 1 */
+#ifndef BSP_CFG_ROM_REG_PBPS1
+#define BSP_CFG_ROM_REG_PBPS1 (~( 0U))
+#endif
+/* Permanent Block Protection Register 2 */
+#ifndef BSP_CFG_ROM_REG_PBPS2
+#define BSP_CFG_ROM_REG_PBPS2 (0xFFFFFFFFU)
+#endif
+/* Permanent Block Protection Register 3 */
+#ifndef BSP_CFG_ROM_REG_PBPS3
+#define BSP_CFG_ROM_REG_PBPS3 (0xFFFFFFFFU)
+#endif
+/* Security Attribution for Block Protection Register 0 (If any blocks are marked as protected in the secure application, then mark them as secure) */
+#ifndef BSP_CFG_ROM_REG_BPS_SEL0
+#define BSP_CFG_ROM_REG_BPS_SEL0 (BSP_CFG_ROM_REG_BPS0 & BSP_CFG_ROM_REG_PBPS0)
+#endif
+/* Security Attribution for Block Protection Register 1 (If any blocks are marked as protected in the secure application, then mark them as secure) */
+#ifndef BSP_CFG_ROM_REG_BPS_SEL1
+#define BSP_CFG_ROM_REG_BPS_SEL1 (BSP_CFG_ROM_REG_BPS1 & BSP_CFG_ROM_REG_PBPS1)
+#endif
+/* Security Attribution for Block Protection Register 2 (If any blocks are marked as protected in the secure application, then mark them as secure) */
+#ifndef BSP_CFG_ROM_REG_BPS_SEL2
+#define BSP_CFG_ROM_REG_BPS_SEL2 (0xFFFFFFFFU)
+#endif
+/* Security Attribution for Block Protection Register 3 (If any blocks are marked as protected in the secure application, then mark them as secure) */
+#ifndef BSP_CFG_ROM_REG_BPS_SEL3
+#define BSP_CFG_ROM_REG_BPS_SEL3 (0xFFFFFFFFU)
+#endif
+#ifndef BSP_CLOCK_CFG_MAIN_OSC_WAIT
+#define BSP_CLOCK_CFG_MAIN_OSC_WAIT (9)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
 #endif /* BSP_MCU_FAMILY_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_clock_cfg.h
index 4f490f340..80641945d 100644
--- a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_clock_cfg.h
+++ b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp_clock_cfg.h
@@ -1,27 +1,25 @@
 /* generated configuration header file - do not edit */
 #ifndef BSP_CLOCK_CFG_H_
 #define BSP_CLOCK_CFG_H_
-
-#define BSP_CFG_CLOCKS_SECURE	(0)
+#define BSP_CFG_CLOCKS_SECURE (0)
 #define BSP_CFG_CLOCKS_OVERRIDE (0)
-#define BSP_CFG_XTAL_HZ		(24000000)			   /* XTAL 24000000Hz */
-#define BSP_CFG_HOCO_FREQUENCY	(2)				   /* HOCO 20MHz */
-#define BSP_CFG_PLL_SOURCE	(BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL Src: XTAL */
-#define BSP_CFG_PLL_DIV		(BSP_CLOCKS_PLL_DIV_3)		   /* PLL Div /3 */
-#define BSP_CFG_PLL_MUL		BSP_CLOCKS_PLL_MUL_24_0		   /* PLL Mul x24.0 */
-#define BSP_CFG_PLL2_SOURCE	(BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL2 Src: XTAL */
-#define BSP_CFG_PLL2_DIV	(BSP_CLOCKS_PLL_DIV_3)		   /* PLL2 Div /3 */
-#define BSP_CFG_PLL2_MUL	BSP_CLOCKS_PLL_MUL_24_0		   /* PLL2 Mul x24.0 */
-#define BSP_CFG_CLOCK_SOURCE	(BSP_CLOCKS_SOURCE_CLOCK_PLL)	   /* Clock Src: PLL */
-#define BSP_CFG_CLKOUT_SOURCE	(BSP_CLOCKS_CLOCK_DISABLED)	   /* CLKOUT Disabled */
-#define BSP_CFG_UCK_SOURCE	(BSP_CLOCKS_SOURCE_CLOCK_PLL2)	   /* UCLK Src: PLL2 */
-#define BSP_CFG_ICLK_DIV	(BSP_CLOCKS_SYS_CLOCK_DIV_2)	   /* ICLK Div /2 */
-#define BSP_CFG_PCLKA_DIV	(BSP_CLOCKS_SYS_CLOCK_DIV_2)	   /* PCLKA Div /2 */
-#define BSP_CFG_PCLKB_DIV	(BSP_CLOCKS_SYS_CLOCK_DIV_4)	   /* PCLKB Div /4 */
-#define BSP_CFG_PCLKC_DIV	(BSP_CLOCKS_SYS_CLOCK_DIV_4)	   /* PCLKC Div /4 */
-#define BSP_CFG_PCLKD_DIV	(BSP_CLOCKS_SYS_CLOCK_DIV_2)	   /* PCLKD Div /2 */
-#define BSP_CFG_FCLK_DIV	(BSP_CLOCKS_SYS_CLOCK_DIV_4)	   /* FCLK Div /4 */
-#define BSP_CFG_CLKOUT_DIV	(BSP_CLOCKS_SYS_CLOCK_DIV_1)	   /* CLKOUT Div /1 */
-#define BSP_CFG_UCK_DIV		(BSP_CLOCKS_USB_CLOCK_DIV_4)	   /* UCLK Div /4 */
-
+#define BSP_CFG_XTAL_HZ (24000000) /* XTAL 24000000Hz */
+#define BSP_CFG_HOCO_FREQUENCY (2) /* HOCO 20MHz */
+#define BSP_CFG_PLL_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL Src: XTAL */
+#define BSP_CFG_PLL_DIV (BSP_CLOCKS_PLL_DIV_3) /* PLL Div /3 */
+#define BSP_CFG_PLL_MUL BSP_CLOCKS_PLL_MUL(24U,0U) /* PLL Mul x24.0 */
+#define BSP_CFG_PLL2_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL2 Src: XTAL */
+#define BSP_CFG_PLL2_DIV (BSP_CLOCKS_PLL_DIV_3) /* PLL2 Div /3 */
+#define BSP_CFG_PLL2_MUL BSP_CLOCKS_PLL_MUL(24U,0U) /* PLL2 Mul x24.0 */
+#define BSP_CFG_CLOCK_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_PLL) /* Clock Src: PLL */
+#define BSP_CFG_CLKOUT_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* CLKOUT Disabled */
+#define BSP_CFG_UCK_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_PLL2) /* UCLK Src: PLL2 */
+#define BSP_CFG_ICLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* ICLK Div /2 */
+#define BSP_CFG_PCLKA_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* PCLKA Div /2 */
+#define BSP_CFG_PCLKB_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* PCLKB Div /4 */
+#define BSP_CFG_PCLKC_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* PCLKC Div /4 */
+#define BSP_CFG_PCLKD_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* PCLKD Div /2 */
+#define BSP_CFG_FCLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_4) /* FCLK Div /4 */
+#define BSP_CFG_CLKOUT_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* CLKOUT Div /1 */
+#define BSP_CFG_UCK_DIV (BSP_CLOCKS_USB_CLOCK_DIV_4) /* UCLK Div /4 */
 #endif /* BSP_CLOCK_CFG_H_ */

From f79529c09c6e7c0d6ee5586633ceb8c83e345406 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 5 Jul 2023 17:13:01 +0700
Subject: [PATCH 485/691] usb hs work with ra 6m5 ek

---
 .idea/runConfigurations/ra4m1.xml             |  10 ++
 .idea/runConfigurations/ra6m1.xml             |  10 ++
 .idea/runConfigurations/ra6m5.xml             |  10 ++
 hw/bsp/ra/board_cfg.h                         |  45 +++++++
 .../ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h  |   4 +-
 .../ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h  |   4 +-
 .../ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h  |   4 +-
 hw/bsp/ra/boards/ra6m5_ek/board.cmake         |  20 ++-
 .../ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h  |   4 +-
 hw/bsp/ra/family.c                            | 122 ++++++++++++------
 hw/bsp/ra/vector_data.h                       |  15 ++-
 src/common/tusb_mcu.h                         |   1 +
 src/portable/renesas/rusb2/dcd_rusb2.c        |   3 +-
 13 files changed, 190 insertions(+), 62 deletions(-)
 create mode 100644 .idea/runConfigurations/ra4m1.xml
 create mode 100644 .idea/runConfigurations/ra6m1.xml
 create mode 100644 .idea/runConfigurations/ra6m5.xml
 create mode 100644 hw/bsp/ra/board_cfg.h

diff --git a/.idea/runConfigurations/ra4m1.xml b/.idea/runConfigurations/ra4m1.xml
new file mode 100644
index 000000000..22bb61949
--- /dev/null
+++ b/.idea/runConfigurations/ra4m1.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="ra4m1" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA4M1AB&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="ra6m5" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/ra6m1.xml b/.idea/runConfigurations/ra6m1.xml
new file mode 100644
index 000000000..438ac4063
--- /dev/null
+++ b/.idea/runConfigurations/ra6m1.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="ra6m1" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA6M1AD&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="ra6m5" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/ra6m5.xml b/.idea/runConfigurations/ra6m5.xml
new file mode 100644
index 000000000..02df11610
--- /dev/null
+++ b/.idea/runConfigurations/ra6m5.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="ra6m5" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA6M5BH&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="ra6m5" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/hw/bsp/ra/board_cfg.h b/hw/bsp/ra/board_cfg.h
new file mode 100644
index 000000000..baed46b5f
--- /dev/null
+++ b/hw/bsp/ra/board_cfg.h
@@ -0,0 +1,45 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#ifndef _BOARD_CFG_H
+#define _BOARD_CFG_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(BSP_MCU_GROUP_RA6M5) || defined(BSP_MCU_GROUP_RA6M3) || (BSP_CFG_MCU_PART_SERIES == 8)
+  #define BOARD_HAS_USB_HIGHSPEED
+#endif
+
+// for SystemInit()
+void bsp_init(void * p_args);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h
index 19bb473eb..f0577b702 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h
+++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h
@@ -4,6 +4,7 @@
 
 #include "bsp_clock_cfg.h"
 #include "bsp_mcu_family_cfg.h"
+#include "board_cfg.h"
 
 #undef RA_NOT_DEFINED
 #define BSP_CFG_RTOS (0)
@@ -31,7 +32,4 @@
 #define BSP_CLOCK_CFG_SUBCLOCK_POPULATED	(1)
 #define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000
 
-// for SystemInit()
-void bsp_init(void * p_args);
-
 #endif /* BSP_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h
index 6a47bccc6..47de7747d 100644
--- a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h
+++ b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h
@@ -7,6 +7,7 @@ extern "C" {
 
 #include "bsp_clock_cfg.h"
 #include "bsp_mcu_family_cfg.h"
+#include "board_cfg.h"
 
 #define RA_NOT_DEFINED 0
 #ifndef BSP_CFG_RTOS
@@ -56,9 +57,6 @@ extern "C" {
 #define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000
 #endif
 
-// for SystemInit()
-void bsp_init(void * p_args);
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h
index 75a331fc2..b5ed53a3b 100644
--- a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h
+++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h
@@ -8,6 +8,7 @@ extern "C" {
 
 #include "bsp_clock_cfg.h"
 #include "bsp_mcu_family_cfg.h"
+#include "board_cfg.h"
 
 #define RA_NOT_DEFINED 0
 #ifndef BSP_CFG_RTOS
@@ -60,9 +61,6 @@ extern "C" {
 #define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000
 #endif
 
-// for SystemInit()
-void bsp_init(void * p_args);
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/ra/boards/ra6m5_ek/board.cmake b/hw/bsp/ra/boards/ra6m5_ek/board.cmake
index 42a4c7417..d934a0c0d 100644
--- a/hw/bsp/ra/boards/ra6m5_ek/board.cmake
+++ b/hw/bsp/ra/boards/ra6m5_ek/board.cmake
@@ -3,8 +3,22 @@ set(MCU_VARIANT ra6m5)
 
 set(JLINK_DEVICE R7FA6M5BH)
 
+# default to PORT1 Highspeed
+if (NOT DEFINED PORT)
+set(PORT 1)
+endif()
+
 function(update_board TARGET)
-#  target_compile_definitions(${TARGET} PUBLIC)
-#  target_sources(${TARGET} PRIVATE)
-#  target_include_directories(${BOARD_TARGET} PUBLIC)
+  target_compile_definitions(${TARGET} PUBLIC
+    BOARD_TUD_RHPORT=${PORT}
+    # port 0 is fullspeed, port 1 is highspeed
+    BOARD_TUD_MAX_SPEED=$<IF:${PORT},OPT_MODE_HIGH_SPEED,OPT_MODE_FULL_SPEED>
+    )
+
+  if (PORT STREQUAL 1)
+    target_compile_definitions(${TARGET} PUBLIC
+      CFG_TUSB_RHPORT1_MODE=OPT_MODE_DEVICE|OPT_MODE_HIGH_SPEED
+      CFG_TUSB_RHPORT0_MODE=0
+      )
+  endif ()
 endfunction()
diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h
index e41f603ad..a41536eda 100644
--- a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h
+++ b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h
@@ -7,6 +7,7 @@ extern "C" {
 
 #include "bsp_clock_cfg.h"
 #include "bsp_mcu_family_cfg.h"
+#include "board_cfg.h"
 
 #define RA_NOT_DEFINED 0
 #ifndef BSP_CFG_RTOS
@@ -56,9 +57,6 @@ extern "C" {
 #define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000
 #endif
 
-// for SystemInit()
-void bsp_init(void * p_args);
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c
index 769678954..36b46beab 100644
--- a/hw/bsp/ra/family.c
+++ b/hw/bsp/ra/family.c
@@ -48,9 +48,9 @@
 #include "board.h"
 
 /* Key code for writing PRCR register. */
-#define BSP_PRV_PRCR_KEY	       (0xA500U)
+#define BSP_PRV_PRCR_KEY         (0xA500U)
 #define BSP_PRV_PRCR_PRC1_UNLOCK ((BSP_PRV_PRCR_KEY) | 0x2U)
-#define BSP_PRV_PRCR_LOCK	       ((BSP_PRV_PRCR_KEY) | 0x0U)
+#define BSP_PRV_PRCR_LOCK         ((BSP_PRV_PRCR_KEY) | 0x0U)
 
 static const ioport_cfg_t family_pin_cfg = {
     .number_of_pins = sizeof(board_pin_cfg) / sizeof(ioport_pin_cfg_t),
@@ -62,25 +62,38 @@ static ioport_instance_ctrl_t port_ctrl;
 // Vector Data
 //--------------------------------------------------------------------+
 
-BSP_DONT_REMOVE const fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) = {
+BSP_DONT_REMOVE BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS)
+const fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] = {
     [0] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */
     [1] = usbfs_resume_handler,    /* USBFS RESUME (USBFS resume interrupt) */
     [2] = usbfs_d0fifo_handler,    /* USBFS FIFO 0 (DMA transfer request 0) */
     [3] = usbfs_d1fifo_handler,    /* USBFS FIFO 1 (DMA transfer request 1) */
+
+#ifdef BOARD_HAS_USB_HIGHSPEED
+    [4] = usbhs_interrupt_handler, /* USBHS INT (USBHS interrupt) */
+    [5] = usbhs_d0fifo_handler,    /* USBHS FIFO 0 (DMA transfer request 0) */
+    [6] = usbhs_d1fifo_handler,    /* USBHS FIFO 1 (DMA transfer request 1) */
+#endif
 };
+
 const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENTRIES] = {
-    [0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT),    /* USBFS INT (USBFS interrupt) */
-    [1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */
-    [2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */
-    [3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1)  /* USBFS FIFO 1 (DMA transfer request 1) */
+    [0] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT),            /* USBFS INT (USBFS interrupt) */
+    [1] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME),         /* USBFS RESUME (USBFS resume interrupt) */
+    [2] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0),         /* USBFS FIFO 0 (DMA transfer request 0) */
+    [3] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1),         /* USBFS FIFO 1 (DMA transfer request 1) */
+
+#ifdef BOARD_HAS_USB_HIGHSPEED
+    [4] = BSP_PRV_IELS_ENUM(EVENT_USBHS_USB_INT_RESUME), /* USBHS USB INT RESUME (USBHS interrupt) */
+    [5] = BSP_PRV_IELS_ENUM(EVENT_USBHS_FIFO_0),         /* USBHS FIFO 0 (DMA transfer request 0) */
+    [6] = BSP_PRV_IELS_ENUM(EVENT_USBHS_FIFO_1),         /* USBHS FIFO 1 (DMA transfer request 1) */
+#endif
 };
 
 //--------------------------------------------------------------------+
 // Board porting API
 //--------------------------------------------------------------------+
 
-void board_init(void)
-{
+void board_init(void) {
   /* Configure pins. */
   R_IOPORT_Open(&port_ctrl, &family_pin_cfg);
 
@@ -94,8 +107,8 @@ void board_init(void)
   // Enable USB module
   R_MSTP->MSTPCRB &= ~(1U << 11U); // FS
 
-#ifdef R_USB_HS0_BASE
-//  R_MSTP->MSTPCRB &= ~(1U << 12U); // HS
+#ifdef BOARD_HAS_USB_HIGHSPEED
+  R_MSTP->MSTPCRB &= ~(1U << 12U);
 #endif
 
 #if CFG_TUSB_OS == OPT_OS_FREERTOS
@@ -145,67 +158,94 @@ void SysTick_Handler(void) {
 uint32_t board_millis(void) {
   return system_ticks;
 }
+
 #endif
 
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
-void usbfs_interrupt_handler(void)
-{
+
+#if CFG_TUD_ENABLED && defined(BOARD_TUD_RHPORT)
+  #define PORT_SUPPORT_DEVICE(_n)  (BOARD_TUD_RHPORT == _n)
+#else
+  #define PORT_SUPPORT_DEVICE(_n)  0
+#endif
+
+#if CFG_TUH_ENABLED && defined(BOARD_TUH_RHPORT)
+  #define PORT_SUPPORT_HOST(_n)    (BOARD_TUH_RHPORT == _n)
+#else
+  #define PORT_SUPPORT_HOST(_n)    0
+#endif
+
+//------------- USB0 FullSpeed -------------//
+void usbfs_interrupt_handler(void) {
   IRQn_Type irq = R_FSP_CurrentIrqGet();
   R_BSP_IrqStatusClear(irq);
 
-#if CFG_TUH_ENABLED
+  #if PORT_SUPPORT_HOST(0)
   tuh_int_handler(0);
-#endif
+  #endif
 
-#if CFG_TUD_ENABLED
+  #if PORT_SUPPORT_DEVICE(0)
   tud_int_handler(0);
-#endif
+  #endif
 }
 
-void usbfs_resume_handler(void)
-{
+void usbfs_resume_handler(void) {
   IRQn_Type irq = R_FSP_CurrentIrqGet();
   R_BSP_IrqStatusClear(irq);
 
-#if CFG_TUH_ENABLED
+  #if PORT_SUPPORT_HOST(0)
   tuh_int_handler(0);
-#endif
+  #endif
 
-#if CFG_TUD_ENABLED
+  #if PORT_SUPPORT_DEVICE(0)
   tud_int_handler(0);
-#endif
+  #endif
 }
 
-void usbfs_d0fifo_handler(void)
-{
+void usbfs_d0fifo_handler(void) {
+  IRQn_Type irq = R_FSP_CurrentIrqGet();
+  R_BSP_IrqStatusClear(irq);
+  // TODO not used yet
+}
+
+void usbfs_d1fifo_handler(void) {
+  IRQn_Type irq = R_FSP_CurrentIrqGet();
+  R_BSP_IrqStatusClear(irq);
+  // TODO not used yet
+}
+
+//------------- USB1 HighSpeed -------------//
+#ifdef BOARD_HAS_USB_HIGHSPEED
+
+void usbhs_interrupt_handler(void) {
   IRQn_Type irq = R_FSP_CurrentIrqGet();
   R_BSP_IrqStatusClear(irq);
 
-#if CFG_TUH_ENABLED
-  tuh_int_handler(0);
-#endif
+  #if PORT_SUPPORT_HOST(1)
+  tuh_int_handler(1);
+  #endif
 
-#if CFG_TUD_ENABLED
-  tud_int_handler(0);
-#endif
+  #if PORT_SUPPORT_DEVICE(1)
+  tud_int_handler(1);
+  #endif
 }
 
-void usbfs_d1fifo_handler(void)
-{
+void usbhs_d0fifo_handler(void) {
   IRQn_Type irq = R_FSP_CurrentIrqGet();
   R_BSP_IrqStatusClear(irq);
-
-#if CFG_TUH_ENABLED
-  tuh_int_handler(0);
-#endif
-
-#if CFG_TUD_ENABLED
-  tud_int_handler(0);
-#endif
+  // TODO not used yet
 }
 
+void usbhs_d1fifo_handler(void) {
+  IRQn_Type irq = R_FSP_CurrentIrqGet();
+  R_BSP_IrqStatusClear(irq);
+  // TODO not used yet
+}
+
+#endif
+
 //--------------------------------------------------------------------+
 // stdlib
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/ra/vector_data.h b/hw/bsp/ra/vector_data.h
index 3d8a24634..ca667faa3 100644
--- a/hw/bsp/ra/vector_data.h
+++ b/hw/bsp/ra/vector_data.h
@@ -6,22 +6,29 @@
 extern "C" {
 #endif
 
-#ifndef VECTOR_DATA_IRQ_COUNT
-  #define VECTOR_DATA_IRQ_COUNT 4
-#endif
-
 /* ISR prototypes */
 void usbfs_interrupt_handler(void);
 void usbfs_resume_handler(void);
 void usbfs_d0fifo_handler(void);
 void usbfs_d1fifo_handler(void);
 
+#ifdef BOARD_HAS_USB_HIGHSPEED
+void usbhs_interrupt_handler(void);
+void usbhs_d0fifo_handler(void);
+void usbhs_d1fifo_handler(void);
+#endif
+
 /* Vector table allocations */
 #define USBFS_INT_IRQn    0
 #define USBFS_RESUME_IRQn 1
 #define USBFS_FIFO_0_IRQn 2
 #define USBFS_FIFO_1_IRQn 3
 
+#define USBHS_USB_INT_RESUME_IRQn  4 /* USBHS USB INT RESUME (USBHS interrupt) */
+#define USBHS_FIFO_0_IRQn          5 /* USBHS FIFO 0 (DMA transfer request 0) */
+#define USBHS_FIFO_1_IRQn          6 /* USBHS FIFO 1 (DMA transfer request 1) */
+
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 9f3be78fd..496ebfc85 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -327,6 +327,7 @@
 // Renesas
 //--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N, OPT_MCU_RAXXX)
+  #define TUP_USBIP_RUSB2
   #define TUP_DCD_ENDPOINT_MAX    10
 
 //--------------------------------------------------------------------+
diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index e9ac46517..83d2a34c6 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -31,8 +31,7 @@
 // We disable SOF for now until needed later on
 #define USE_SOF     0
 
-#if CFG_TUD_ENABLED && (TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) || \
-                        TU_CHECK_MCU(OPT_MCU_RAXXX))
+#if CFG_TUD_ENABLED && defined(TUP_USBIP_RUSB2)
 
 #include "device/dcd.h"
 #include "rusb2_type.h"

From 4f4c93594d8f82c18f9a1052c4da2e7c31fc1b8c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 5 Jul 2023 17:51:36 +0700
Subject: [PATCH 486/691] minor pipe clean up

---
 src/portable/renesas/rusb2/dcd_rusb2.c | 74 +++++++++++++++-----------
 1 file changed, 43 insertions(+), 31 deletions(-)

diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 83d2a34c6..b58e0be01 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -93,20 +93,20 @@ typedef struct TU_ATTR_PACKED {
 
 typedef union TU_ATTR_PACKED {
   struct {
-    volatile uint16_t u8: 8;
-    volatile uint16_t   : 0;
+    volatile uint8_t u8;
+    volatile uint8_t reserved8;
   };
   volatile uint16_t u16;
 } hw_fifo_t;
 
 typedef union TU_ATTR_PACKED {
   struct {
-    volatile uint32_t  : 24;
-    volatile uint32_t u8: 8;
+    volatile uint8_t reserved8[3];
+    volatile uint8_t u8;
   };
   struct {
-    volatile uint32_t    : 16;
-    volatile uint32_t u16: 16;
+    volatile uint16_t reserved16;
+    volatile uint16_t u16;
   };
   volatile uint32_t u32;
 } hw_fifo32_t;
@@ -126,6 +126,19 @@ typedef struct TU_ATTR_PACKED
 TU_ATTR_PACKED_END  // End of definition of packed structs (used by the CCRX toolchain)
 TU_ATTR_BIT_FIELD_ORDER_END
 
+// Transfer conditions specifiable for each pipe:
+// - Pipe 0: Control transfer with 64-byte single buffer
+// - Pipes 1 and 2: Bulk isochronous transfer continuous transfer mode with programmable buffer size up
+//   to 2 KB and optional double buffer
+// - Pipes 3 to 5: Bulk transfer continuous transfer mode with programmable buffer size up to 2 KB and
+//   optional double buffer
+// - Pipes 6 to 9: Interrupt transfer with 64-byte single buffer
+enum {
+  PIPE_1ST_BULK = 3,
+  PIPE_1ST_INTERRUPT = 6,
+  PIPE_COUNT = 10,
+};
+
 typedef struct
 {
   pipe_state_t pipe[10];
@@ -137,34 +150,33 @@ typedef struct
 //--------------------------------------------------------------------+
 static dcd_data_t _dcd;
 
-#ifndef FIRST_BULK_PIPE
-#define FIRST_BULK_PIPE 3
-#endif
-
 static unsigned find_pipe(unsigned xfer)
 {
   switch (xfer) {
-  case TUSB_XFER_ISOCHRONOUS:
-    for (int i = 1; i <= 2; ++i) {
-      if (0 == _dcd.pipe[i].ep) return  i;
-    }
-    break;
-  case TUSB_XFER_BULK:
-    for (int i = FIRST_BULK_PIPE; i <= 5; ++i) {
-      if (0 == _dcd.pipe[i].ep) return  i;
-    }
-    for (int i = 1; i <= 1; ++i) {
-      if (0 == _dcd.pipe[i].ep) return  i;
-    }
-    break;
-  case TUSB_XFER_INTERRUPT:
-    for (int i = 6; i <= 9; ++i) {
-      if (0 == _dcd.pipe[i].ep) return  i;
-    }
-    break;
-  default:
-    /* No support for control transfer */
-    break;
+    case TUSB_XFER_ISOCHRONOUS:
+      for (int i = 1; i < PIPE_1ST_BULK; ++i) {
+        if (0 == _dcd.pipe[i].ep) return i;
+      }
+      break;
+
+    case TUSB_XFER_BULK:
+      for (int i = PIPE_1ST_BULK; i < PIPE_1ST_INTERRUPT; ++i) {
+        if (0 == _dcd.pipe[i].ep) return i;
+      }
+      for (int i = 1; i < PIPE_1ST_BULK; ++i) {
+        if (0 == _dcd.pipe[i].ep) return i;
+      }
+      break;
+
+    case TUSB_XFER_INTERRUPT:
+      for (int i = PIPE_1ST_INTERRUPT; i < PIPE_COUNT; ++i) {
+        if (0 == _dcd.pipe[i].ep) return i;
+      }
+      break;
+
+    default:
+      /* No support for control transfer */
+      break;
   }
   return 0;
 }

From f308435b649c37f0cffc1d5a566fb71c22b57aa1 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 5 Jul 2023 22:09:35 +0700
Subject: [PATCH 487/691] update ra type to include usbhs registers

---
 hw/bsp/ra/family.cmake                  |   1 -
 hw/bsp/ra/family.mk                     |   1 -
 src/portable/renesas/rusb2/rusb2_ra.c   |  16 --
 src/portable/renesas/rusb2/rusb2_ra.h   |  85 ++++---
 src/portable/renesas/rusb2/rusb2_type.h | 313 +++++++++++++++---------
 5 files changed, 245 insertions(+), 171 deletions(-)
 delete mode 100644 src/portable/renesas/rusb2/rusb2_ra.c

diff --git a/hw/bsp/ra/family.cmake b/hw/bsp/ra/family.cmake
index f4e978230..74329165f 100644
--- a/hw/bsp/ra/family.cmake
+++ b/hw/bsp/ra/family.cmake
@@ -120,7 +120,6 @@ function(family_configure_example TARGET RTOS)
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/renesas/rusb2/dcd_rusb2.c
     ${TOP}/src/portable/renesas/rusb2/hcd_rusb2.c
-    ${TOP}/src/portable/renesas/rusb2/rusb2_ra.c
     )
   target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 
diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk
index 9b6b02c02..b6e1bb0ae 100644
--- a/hw/bsp/ra/family.mk
+++ b/hw/bsp/ra/family.mk
@@ -18,7 +18,6 @@ CFLAGS += \
 SRC_C += \
 	src/portable/renesas/rusb2/dcd_rusb2.c \
 	src/portable/renesas/rusb2/hcd_rusb2.c \
-  src/portable/renesas/rusb2/rusb2_ra.c \
 	$(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Source/startup.c \
 	$(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Source/system.c \
 	$(FSP_RA)/src/bsp/mcu/all/bsp_clocks.c \
diff --git a/src/portable/renesas/rusb2/rusb2_ra.c b/src/portable/renesas/rusb2/rusb2_ra.c
deleted file mode 100644
index ff2191b1f..000000000
--- a/src/portable/renesas/rusb2/rusb2_ra.c
+++ /dev/null
@@ -1,16 +0,0 @@
-#include "tusb_option.h"
-#include "rusb2_ra.h"
-
-#if (CFG_TUSB_RHPORT0_MODE != 0)
-IRQn_Type _usb_fs_irqn = USBFS_INT_IRQn;
-void tud_set_irq_usbfs(IRQn_Type q) {
-  _usb_fs_irqn = q;
-}
-#endif
-
-#if (CFG_TUSB_RHPORT1_MODE != 0)
-IRQn_Type _usb_hs_irqn = USBHS_USB_INT_RESUME_IRQn;
-void tud_set_irq_usbhs(IRQn_Type q) {
-  _usb_hs_irqn = q;
-}
-#endif
diff --git a/src/portable/renesas/rusb2/rusb2_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h
index 07fcafe6f..ca7c38907 100644
--- a/src/portable/renesas/rusb2/rusb2_ra.h
+++ b/src/portable/renesas/rusb2/rusb2_ra.h
@@ -47,55 +47,53 @@ extern "C" {
 #pragma GCC diagnostic pop
 #endif
 
-extern IRQn_Type _usb_fs_irqn;
-extern IRQn_Type _usb_hs_irqn;
-
-#if !defined(CFG_TUSB_RHPORT0_MODE) && !defined(CFG_TUSB_RHPORT1_MODE)
-// fallback
-#define CFG_TUSB_RHPORT0_MODE   ( CFG_TUD_ENABLED ? OPT_MODE_DEVICE : OPT_MODE_HOST )
-#define CFG_TUSB_RHPORT1_MODE   0
-#endif
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
 
+// IAR does not have __builtin_ctz
 #if defined(__ICCARM__)
-  #define __builtin_ctz(x)             __iar_builtin_CLZ(__iar_builtin_RBIT(x))
+  #define __builtin_ctz(x)   __iar_builtin_CLZ(__iar_builtin_RBIT(x))
 #endif
 
+typedef struct {
+  uint32_t reg_base;
+  int32_t irqnum;
+}rusb2_controller_t;
+
+#if defined(BSP_MCU_GROUP_RA6M5) || defined(BSP_MCU_GROUP_RA6M3) || (BSP_CFG_MCU_PART_SERIES == 8)
+  #define RUSB2_HAS_HIGHSPEED
+  #define RUSB2_CONTROLLER_COUNT 2
+#else
+  #define RUSB2_CONTROLLER_COUNT 1
+#endif
+
+// USBFS_INT_IRQn and USBHS_USB_INT_RESUME_IRQn are generated by FSP
+static rusb2_controller_t rusb2_controller[] = {
+    { .reg_base = R_USB_FS0_BASE, .irqnum = USBFS_INT_IRQn },
+    #ifdef RUSB2_HAS_HIGHSPEED
+    { .reg_base = R_USB_HS0_BASE, .irqnum = USBHS_USB_INT_RESUME_IRQn },
+    #endif
+};
+
 TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_enable(uint8_t rhport)
 {
-#ifdef CFG_TUSB_RHPORT1_MODE
-#if (CFG_TUSB_RHPORT1_MODE != 0)
-  if (rhport == 1) {
-    NVIC_EnableIRQ(_usb_hs_irqn);
-  }
-#endif
-#endif
-
-#ifdef CFG_TUSB_RHPORT0_MODE
-#if  (CFG_TUSB_RHPORT0_MODE != 0)
-  if (rhport == 0) {
-    NVIC_EnableIRQ(_usb_fs_irqn);
-  }
-#endif
-#endif
+  #if RUSB2_CONTROLLER_COUNT > 1
+  NVIC_EnableIRQ(rusb2_controller[rhport].irqnum);
+  #else
+  (void) rhport;
+  NVIC_EnableIRQ(rusb2_controller[0].irqnum);
+  #endif
 }
 
 TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_disable(uint8_t rhport)
 {
-#ifdef CFG_TUSB_RHPORT1_MODE
-#if (CFG_TUSB_RHPORT1_MODE != 0)
-  if (rhport == 1) {
-    NVIC_DisableIRQ(_usb_hs_irqn);
-  }
-#endif
-#endif
-
-#ifdef CFG_TUSB_RHPORT0_MODE
-#if (CFG_TUSB_RHPORT0_MODE != 0)
-  if (rhport == 0) {
-    NVIC_DisableIRQ(_usb_fs_irqn);
-  }
-#endif
-#endif
+  #if RUSB2_CONTROLLER_COUNT > 1
+  NVIC_DisableIRQ(rusb2_controller[rhport].irqnum);
+  #else
+  (void) rhport;
+  NVIC_DisableIRQ(rusb2_controller[0].irqnum);
+  #endif
 }
 
 // MCU specific PHY init
@@ -103,6 +101,15 @@ TU_ATTR_ALWAYS_INLINE static inline void rusb2_phy_init(void)
 {
 }
 
+void tud_int_set_irqnum(uint8_t rhport, int32_t irqnum) {
+  #if RUSB2_CONTROLLER_COUNT > 1
+  rusb2_controller[rhport].irqnum = irqnum;
+  #else
+  (void) rhport;
+  rusb2_controller[0].irqnum = irqnum;
+  #endif
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/src/portable/renesas/rusb2/rusb2_type.h b/src/portable/renesas/rusb2/rusb2_type.h
index 90ba4f012..0928f5aeb 100644
--- a/src/portable/renesas/rusb2/rusb2_type.h
+++ b/src/portable/renesas/rusb2/rusb2_type.h
@@ -46,10 +46,10 @@ typedef struct {
     volatile uint16_t E; /* (@ 0x00000000) Pipe Transaction Counter Enable Register */
 
     struct TU_ATTR_PACKED {
-      uint16_t : 8;
+      uint16_t                : 8;
       volatile uint16_t TRCLR : 1; /* [8..8] Transaction Counter Clear */
       volatile uint16_t TRENB : 1; /* [9..9] Transaction Counter Enable */
-      uint16_t : 6;
+      uint16_t                : 6;
     } E_b;
   };
 
@@ -62,7 +62,8 @@ typedef struct {
   };
 } RUSB2_PIPE_TR_t; /* Size = 4 (0x4) */
 
-/* LINK_REG Structure */
+
+/* RUSB2 Registers Structure */
 typedef struct {
   union {
     volatile uint16_t SYSCFG; /* (@ 0x00000000) System Configuration Control Register */
@@ -74,7 +75,7 @@ typedef struct {
       volatile uint16_t DPRPU : 1; /* [4..4] D+ Line Resistor Control */
       volatile uint16_t DRPD  : 1; /* [5..5] D+/D- Line Resistor Control */
       volatile uint16_t DCFM  : 1; /* [6..6] Controller Function Select */
-      uint16_t                : 1;
+      volatile uint16_t HSE   : 1; // [7..7] High-Speed Operation Enable
       volatile uint16_t CNEN  : 1; /* [8..8] CNEN Single End Receiver Enable */
       uint16_t                : 1;
       volatile uint16_t SCKE  : 1; /* [10..10] USB Clock Enable */
@@ -87,7 +88,7 @@ typedef struct {
 
     struct TU_ATTR_PACKED {
       volatile uint16_t BWAIT : 4; /* [3..0] CPU Bus Access Wait Specification BWAIT waits (BWAIT+2 access cycles) */
-      uint16_t : 12;
+      uint16_t                : 12;
     } BUSWAIT_b;
   };
 
@@ -98,8 +99,7 @@ typedef struct {
       volatile const uint16_t LNST   : 2; /* [1..0] USB Data Line Status Monitor */
       volatile const uint16_t IDMON  : 1; /* [2..2] External ID0 Input Pin Monitor */
       uint16_t                       : 2;
-      volatile const uint16_t
-        SOFEA                        : 1; /* [5..5] SOF Active Monitor While Host Controller Function is Selected. */
+      volatile const uint16_t SOFEA  : 1; /* [5..5] SOF Active Monitor While Host Controller Function is Selected. */
       volatile const uint16_t HTACT  : 1; /* [6..6] USB Host Sequencer Status Monitor */
       uint16_t                       : 7;
       volatile const uint16_t OVCMON : 2; /* [15..14] External USB0_OVRCURA/ USB0_OVRCURB Input Pin Monitor */
@@ -111,7 +111,7 @@ typedef struct {
 
     struct TU_ATTR_PACKED {
       volatile const uint16_t PLLLOCK : 1; /* [0..0] PLL Lock Flag */
-      uint16_t : 15;
+      uint16_t                        : 15;
     } PLLSTA_b;
   };
 
@@ -139,7 +139,7 @@ typedef struct {
 
     struct TU_ATTR_PACKED {
       volatile uint16_t UTST : 4; /* [3..0] Test Mode */
-      uint16_t : 12;
+      uint16_t               : 12;
     } TESTMODE_b;
   };
   volatile const uint16_t RESERVED1;
@@ -295,7 +295,7 @@ typedef struct {
     volatile uint16_t INTENB0; /* (@ 0x00000030) Interrupt Enable Register 0 */
 
     struct TU_ATTR_PACKED {
-      uint16_t : 8;
+      uint16_t                : 8;
       volatile uint16_t BRDYE : 1; /* [8..8] Buffer Ready Interrupt Enable */
       volatile uint16_t NRDYE : 1; /* [9..9] Buffer Not Ready Response Interrupt Enable */
       volatile uint16_t BEMPE : 1; /* [10..10] Buffer Empty Interrupt Enable */
@@ -316,7 +316,10 @@ typedef struct {
       volatile uint16_t SACKE      : 1; /* [4..4] Setup Transaction Normal Response Interrupt Enable */
       volatile uint16_t SIGNE      : 1; /* [5..5] Setup Transaction Error Interrupt Enable */
       volatile uint16_t EOFERRE    : 1; /* [6..6] EOF Error Detection Interrupt Enable */
-      uint16_t                     : 4;
+               uint16_t            : 1;
+      volatile uint16_t LPMENDE    : 1; /*!< [8..8] LPM Transaction End Interrupt Enable                               */
+      volatile uint16_t L1RSMENDE  : 1; /*!< [9..9] L1 Resume End Interrupt Enable                                     */
+               uint16_t            : 1;
       volatile uint16_t ATTCHE     : 1; /* [11..11] Connection Detection Interrupt Enable */
       volatile uint16_t DTCHE      : 1; /* [12..12] Disconnection Detection Interrupt Enable */
       uint16_t                     : 1;
@@ -340,7 +343,7 @@ typedef struct {
       volatile uint16_t PIPE7BRDYE : 1; /* [7..7] BRDY Interrupt Enable for PIPE */
       volatile uint16_t PIPE8BRDYE : 1; /* [8..8] BRDY Interrupt Enable for PIPE */
       volatile uint16_t PIPE9BRDYE : 1; /* [9..9] BRDY Interrupt Enable for PIPE */
-      uint16_t : 6;
+      uint16_t                     : 6;
     } BRDYENB_b;
   };
 
@@ -358,7 +361,7 @@ typedef struct {
       volatile uint16_t PIPE7NRDYE : 1; /* [7..7] NRDY Interrupt Enable for PIPE */
       volatile uint16_t PIPE8NRDYE : 1; /* [8..8] NRDY Interrupt Enable for PIPE */
       volatile uint16_t PIPE9NRDYE : 1; /* [9..9] NRDY Interrupt Enable for PIPE */
-      uint16_t : 6;
+      uint16_t                     : 6;
     } NRDYENB_b;
   };
 
@@ -376,7 +379,7 @@ typedef struct {
       volatile uint16_t PIPE7BEMPE : 1; /* [7..7] BEMP Interrupt Enable for PIPE */
       volatile uint16_t PIPE8BEMPE : 1; /* [8..8] BEMP Interrupt Enable for PIPE */
       volatile uint16_t PIPE9BEMPE : 1; /* [9..9] BEMP Interrupt Enable for PIPE */
-      uint16_t : 6;
+      uint16_t                     : 6;
     } BEMPENB_b;
   };
 
@@ -390,7 +393,7 @@ typedef struct {
       volatile uint16_t BRDYM         : 1; /* [6..6] BRDY Interrupt Status Clear Timing */
       uint16_t                        : 1;
       volatile uint16_t TRNENSEL      : 1; /* [8..8] Transaction-Enabled Time Select */
-      uint16_t : 7;
+      uint16_t                        : 7;
     } SOFCFG_b;
   };
 
@@ -467,7 +470,7 @@ typedef struct {
       volatile uint16_t PIPE7BRDY : 1; /* [7..7] BRDY Interrupt Status for PIPE */
       volatile uint16_t PIPE8BRDY : 1; /* [8..8] BRDY Interrupt Status for PIPE */
       volatile uint16_t PIPE9BRDY : 1; /* [9..9] BRDY Interrupt Status for PIPE */
-      uint16_t : 6;
+      uint16_t                    : 6;
     } BRDYSTS_b;
   };
 
@@ -485,7 +488,7 @@ typedef struct {
       volatile uint16_t PIPE7NRDY : 1; /* [7..7] NRDY Interrupt Status for PIPE */
       volatile uint16_t PIPE8NRDY : 1; /* [8..8] NRDY Interrupt Status for PIPE */
       volatile uint16_t PIPE9NRDY : 1; /* [9..9] NRDY Interrupt Status for PIPE */
-      uint16_t : 6;
+      uint16_t                    : 6;
     } NRDYSTS_b;
   };
 
@@ -503,7 +506,7 @@ typedef struct {
       volatile uint16_t PIPE7BEMP : 1; /* [7..7] BEMP Interrupt Status for PIPE */
       volatile uint16_t PIPE8BEMP : 1; /* [8..8] BEMP Interrupt Status for PIPE */
       volatile uint16_t PIPE9BEMP : 1; /* [9..9] BEMP Interrupt Status for PIPE */
-      uint16_t : 6;
+      uint16_t                    : 6;
     } BEMPSTS_b;
   };
 
@@ -609,7 +612,8 @@ typedef struct {
       volatile uint16_t SQCLR       : 1; /* [8..8] Sequence Toggle Bit Clear */
       uint16_t                      : 2;
       volatile uint16_t SUREQCLR    : 1; /* [11..11] SUREQ Bit Clear */
-      uint16_t                      : 2;
+      volatile uint16_t CSSTS       : 1; /* [12..12] Split Transaction COMPLETE SPLIT(CSPLIT) Status                  */
+      volatile uint16_t CSCLR       : 1; /* [13..13] Split Transaction CSPLIT Status Clear                            */
       volatile uint16_t SUREQ       : 1; /* [14..14] Setup Token Transmission */
       volatile const uint16_t BSTS  : 1; /* [15..15] Buffer Status */
     } DCPCTR_b;
@@ -621,7 +625,7 @@ typedef struct {
 
     struct TU_ATTR_PACKED {
       volatile uint16_t PIPESEL : 4; /* [3..0] Pipe Window Select */
-      uint16_t : 12;
+      uint16_t                  : 12;
     } PIPESEL_b;
   };
   volatile const uint16_t RESERVED11;
@@ -634,21 +638,31 @@ typedef struct {
       volatile uint16_t DIR    : 1; /* [4..4] Transfer Direction */
       uint16_t                 : 2;
       volatile uint16_t SHTNAK : 1; /* [7..7] Pipe Disabled at End of Transfer */
-      uint16_t                 : 1;
+      volatile uint16_t CNTMD  : 1; /* [8..8] Continuous Transfer Mode                                           */
       volatile uint16_t DBLB   : 1; /* [9..9] Double Buffer Mode */
       volatile uint16_t BFRE   : 1; /* [10..10] BRDY Interrupt Operation Specification */
       uint16_t                 : 3;
       volatile uint16_t TYPE   : 2; /* [15..14] Transfer Type */
     } PIPECFG_b;
   };
-  volatile const uint16_t RESERVED12;
+
+  union {
+    volatile uint16_t PIPEBUF;         /*!< (@ 0x0000006A) Pipe Buffer Register                                       */
+
+    struct {
+      volatile uint16_t BUFNMB  : 8; // [7..0] Buffer NumberThese bits specify the FIFO buffer number of the selected pipe (04h to 87h)
+      uint16_t                  : 2;
+      volatile uint16_t BUFSIZE : 5; /*!< [14..10] Buffer Size 00h: 64 bytes 01h: 128 bytes : 1Fh: 2 Kbytes         */
+      uint16_t                  : 1;
+    } PIPEBUF_b;
+  };
 
   union {
     volatile uint16_t PIPEMAXP; /* (@ 0x0000006C) Pipe Maximum Packet Size Register */
 
     struct TU_ATTR_PACKED {
-      volatile uint16_t MXPS   : 9; /* [8..0] Maximum Packet Size */
-      uint16_t                 : 3;
+      volatile uint16_t MXPS   : 11; /* [10..0] Maximum Packet Size */
+      uint16_t                 : 1;
       volatile uint16_t DEVSEL : 4; /* [15..12] Device Select */
     } PIPEMAXP_b;
   };
@@ -694,11 +708,9 @@ typedef struct {
     struct TU_ATTR_PACKED {
       volatile uint16_t RPDME0           : 1; /* [0..0] D- Pin Pull-Down Control */
       volatile uint16_t IDPSRCE0         : 1; /* [1..1] D+ Pin IDPSRC Output Control */
-      volatile uint16_t
-        IDMSINKE0                        : 1; /* [2..2] D- Pin 0.6 V Input Detection (Comparator and Sink) Control */
+      volatile uint16_t IDMSINKE0        : 1; /* [2..2] D- Pin 0.6 V Input Detection (Comparator and Sink) Control */
       volatile uint16_t VDPSRCE0         : 1; /* [3..3] D+ Pin VDPSRC (0.6 V) Output Control */
-      volatile uint16_t
-        IDPSINKE0                        : 1; /* [4..4] D+ Pin 0.6 V Input Detection (Comparator and Sink) Control */
+      volatile uint16_t IDPSINKE0        : 1; /* [4..4] D+ Pin 0.6 V Input Detection (Comparator and Sink) Control */
       volatile uint16_t VDMSRCE0         : 1; /* [5..5] D- Pin VDMSRC (0.6 V) Output Control */
       uint16_t                           : 1;
       volatile uint16_t BATCHGE0         : 1; /* [7..7] BC (Battery Charger) Function Ch0 General Enable Control */
@@ -715,7 +727,7 @@ typedef struct {
 
     struct TU_ATTR_PACKED {
       volatile uint16_t UCKSELC : 1; /* [0..0] USB Clock Selection */
-      uint16_t : 15;
+      uint16_t                  : 15;
     } UCKSEL_b;
   };
   volatile const uint16_t RESERVED18;
@@ -737,11 +749,11 @@ typedef struct {
     volatile uint16_t DEVADD[10]; /* (@ 0x000000D0) Device Address Configuration Register */
 
     struct TU_ATTR_PACKED {
-      uint16_t : 6;
+      uint16_t                  : 6;
       volatile uint16_t USBSPD  : 2; /* [7..6] Transfer Speed of Communication Target Device */
       volatile uint16_t HUBPORT : 3; /* [10..8] Communication Target Connecting Hub Port */
       volatile uint16_t UPPHUB  : 4; /* [14..11] Communication Target Connecting Hub Register */
-      uint16_t : 1;
+      uint16_t                  : 1;
     } DEVADD_b[10];
   };
   volatile const uint32_t RESERVED21[3];
@@ -754,7 +766,7 @@ typedef struct {
       volatile uint32_t SLEWR01 : 1; /* [1..1] Receiver Cross Point Adjustment 01 */
       volatile uint32_t SLEWF00 : 1; /* [2..2] Receiver Cross Point Adjustment 00 */
       volatile uint32_t SLEWF01 : 1; /* [3..3] Receiver Cross Point Adjustment 01 */
-      uint32_t : 28;
+      uint32_t                  : 28;
     } PHYSLEW_b;
   };
   volatile const uint32_t RESERVED22[3];
@@ -763,9 +775,9 @@ typedef struct {
     volatile uint16_t LPCTRL; /* (@ 0x00000100) Low Power Control Register */
 
     struct TU_ATTR_PACKED {
-      uint16_t : 7;
+      uint16_t                : 7;
       volatile uint16_t HWUPM : 1; /* [7..7] Resume Return Mode Setting */
-      uint16_t : 8;
+      uint16_t                : 8;
     } LPCTRL_b;
   };
 
@@ -773,9 +785,9 @@ typedef struct {
     volatile uint16_t LPSTS; /* (@ 0x00000102) Low Power Status Register */
 
     struct TU_ATTR_PACKED {
-      uint16_t : 14;
+      uint16_t                   : 14;
       volatile uint16_t SUSPENDM : 1; /* [14..14] UTMI SuspendM Control */
-      uint16_t : 1;
+      uint16_t                   : 1;
     } LPSTS_b;
   };
   volatile const uint32_t RESERVED23[15];
@@ -793,7 +805,7 @@ typedef struct {
       uint16_t                          : 2;
       volatile const uint16_t CHGDETSTS : 1; /* [8..8] CHGDET Status */
       volatile const uint16_t PDDETSTS  : 1; /* [9..9] PDDET Status */
-      uint16_t : 6;
+      uint16_t                          : 6;
     } BCCTRL_b;
   };
   volatile const uint16_t RESERVED24;
@@ -809,7 +821,7 @@ typedef struct {
       volatile uint16_t HIRDTHR    : 4; /* [11..8] L1 Response Negotiation Threshold Value */
       uint16_t                     : 2;
       volatile uint16_t L1EXTMD    : 1; /* [14..14] PHY Control Mode at L1 Return */
-      uint16_t : 1;
+      uint16_t                     : 1;
     } PL1CTRL1_b;
   };
 
@@ -817,10 +829,10 @@ typedef struct {
     volatile uint16_t PL1CTRL2; /* (@ 0x00000146) Function L1 Control Register 2 */
 
     struct TU_ATTR_PACKED {
-      uint16_t : 8;
+      uint16_t                  : 8;
       volatile uint16_t HIRDMON : 4; /* [11..8] HIRD Value Monitor */
       volatile uint16_t RWEMON  : 1;  /* [12..12] RWE Value Monitor */
-      uint16_t : 3;
+      uint16_t                  : 3;
     } PL1CTRL2_b;
   };
 
@@ -830,7 +842,7 @@ typedef struct {
     struct TU_ATTR_PACKED {
       volatile uint16_t L1REQ          : 1;       /* [0..0] L1 Transition Request */
       volatile const uint16_t L1STATUS : 2; /* [2..1] L1 Request Completion Status */
-      uint16_t : 13;
+      uint16_t                         : 13;
     } HL1CTRL1_b;
   };
 
@@ -846,18 +858,48 @@ typedef struct {
       volatile uint16_t BESL   : 1; /* [15..15] BESL & Alternate HIRD */
     } HL1CTRL2_b;
   };
-  volatile const uint32_t RESERVED25[5];
+
+  volatile uint32_t RESERVED25_1;
+
+  union {
+    volatile uint16_t PHYTRIM1;          /*!< (@ 0x00000150) PHY Timing Register 1                                      */
+
+    struct {
+      volatile uint16_t DRISE      : 2; /*!< [1..0] FS/LS Rising-Edge Output Waveform Adjustment Function              */
+      volatile uint16_t DFALL      : 2; /*!< [3..2] FS/LS Falling-Edge Output Waveform Adjustment Function             */
+               uint16_t            : 3;
+      volatile uint16_t PCOMPENB   : 1; /*!< [7..7] PVDD Start-up Detection                                            */
+      volatile uint16_t HSIUP      : 4; /*!< [11..8] HS Output Level Setting                                           */
+      volatile uint16_t IMPOFFSET  : 3; /*!< [14..12] terminating resistance offset value setting.Offset value for adjusting the terminating resistance.                           */
+               uint16_t            : 1;
+    } PHYTRIM1_b;
+  };
+
+  union {
+    volatile uint16_t PHYTRIM2;         /*!< (@ 0x00000152) PHY Timing Register 2                                      */
+
+    struct {
+      volatile  uint16_t SQU      : 4; /*!< [3..0] Squelch Detection Level                                            */
+      uint16_t                    : 3;
+      volatile  uint16_t HSRXENMO : 1; /*!< [7..7] HS Receive Enable Control Mode                                     */
+      volatile  uint16_t PDR      : 2; /*!< [9..8] HS Output Adjustment Function                                      */
+      uint16_t                    : 2;
+      volatile  uint16_t DIS      : 3; /*!< [14..12] Disconnect Detection Level                                       */
+      uint16_t                    : 1;
+    } PHYTRIM2_b;
+  };
+  volatile uint32_t RESERVED25_2[3];
 
   union {
     volatile const uint32_t DPUSR0R; /* (@ 0x00000160) Deep Standby USB Transceiver Control/Pin Monitor Register */
 
     struct TU_ATTR_PACKED {
-      uint32_t : 20;
+      uint32_t                         : 20;
       volatile const uint32_t DOVCAHM  : 1; /* [20..20] OVRCURA InputIndicates OVRCURA input signal on the HS side of USB port. */
       volatile const uint32_t DOVCBHM  : 1; /* [21..21] OVRCURB InputIndicates OVRCURB input signal on the HS side of USB port. */
       uint32_t                         : 1;
       volatile const uint32_t DVBSTSHM : 1; /* [23..23] VBUS InputIndicates VBUS input signal on the HS side of USB port. */
-      uint32_t : 8;
+      uint32_t                         : 8;
     } DPUSR0R_b;
   };
 
@@ -865,7 +907,7 @@ typedef struct {
     volatile uint32_t DPUSR1R; /* (@ 0x00000164) Deep Standby USB Suspend/Resume Interrupt Register */
 
     struct TU_ATTR_PACKED {
-      uint32_t : 4;
+      uint32_t                        : 4;
       volatile uint32_t DOVCAHE       : 1; /* [4..4] OVRCURA Interrupt Enable Clear */
       volatile uint32_t DOVCBHE       : 1; /* [5..5] OVRCURB Interrupt Enable Clear */
       uint32_t                        : 1;
@@ -875,7 +917,7 @@ typedef struct {
       volatile const uint32_t DOVCBH  : 1; /* [21..21] Indication of Return from OVRCURB Interrupt Source */
       uint32_t                        : 1;
       volatile const uint32_t DVBSTSH : 1; /* [23..23] Indication of Return from VBUS Interrupt Source */
-      uint32_t : 8;
+      uint32_t                        : 8;
     } DPUSR1R_b;
   };
 
@@ -891,7 +933,7 @@ typedef struct {
       uint16_t                      : 2;
       volatile uint16_t DPINTE      : 1; /* [8..8] DP Interrupt Enable Clear */
       volatile uint16_t DMINTE      : 1; /* [9..9] DM Interrupt Enable Clear */
-      uint16_t : 6;
+      uint16_t                      : 6;
     } DPUSR2R_b;
   };
 
@@ -901,7 +943,7 @@ typedef struct {
     struct TU_ATTR_PACKED {
       volatile uint16_t FIXPHY   : 1; /* [0..0] USB Transceiver Control Fix */
       volatile uint16_t FIXPHYPD : 1; /* [1..1] USB Transceiver Control Fix for PLL */
-      uint16_t : 14;
+      uint16_t                   : 14;
     } DPUSRCR_b;
   };
   volatile const uint32_t RESERVED26[165];
@@ -924,7 +966,7 @@ typedef struct {
       volatile const uint32_t DOVCB0  : 1; /* [21..21] USB OVRCURB InputIndicates the OVRCURB input signal of the USB. */
       uint32_t                        : 1;
       volatile const uint32_t DVBSTS0 : 1; /* [23..23] USB VBUS InputIndicates the VBUS input signal of the USB. */
-      uint32_t : 8;
+      uint32_t                        : 8;
     } DPUSR0R_FS_b;
   };
 
@@ -947,10 +989,10 @@ typedef struct {
       volatile const uint32_t DOVRCRB0 : 1; /* [21..21] USB OVRCURB Interrupt Source Recovery */
       uint32_t                         : 1;
       volatile const uint32_t DVBINT0  : 1; /* [23..23] USB VBUS Interrupt Source Recovery */
-      uint32_t : 8;
+      uint32_t                         : 8;
     } DPUSR1R_FS_b;
   };
-} RUSB2_REG_t; /* Size = 1032 (0x408) */
+} rusb2_reg_t; /* Size = 1032 (0x408) */
 
 TU_ATTR_PACKED_END /* End of definition of packed structs (used by the CCRX toolchain) */
 TU_ATTR_BIT_FIELD_ORDER_END
@@ -970,13 +1012,15 @@ TU_ATTR_BIT_FIELD_ORDER_END
 #define RUSB2_PIPE_TR_N_TRNCNT_Pos      (0UL)        /* TRNCNT (Bit 0) */
 #define RUSB2_PIPE_TR_N_TRNCNT_Msk      (0xffffUL)   /* TRNCNT (Bitfield-Mask: 0xffff) */
 
-// LINK_REG
+// Core Registers
 
 // SYSCFG
 #define RUSB2_SYSCFG_SCKE_Pos           (10UL)       /* SCKE (Bit 10) */
 #define RUSB2_SYSCFG_SCKE_Msk           (0x400UL)    /* SCKE (Bitfield-Mask: 0x01) */
 #define RUSB2_SYSCFG_CNEN_Pos           (8UL)        /* CNEN (Bit 8) */
 #define RUSB2_SYSCFG_CNEN_Msk           (0x100UL)    /* CNEN (Bitfield-Mask: 0x01) */
+#define RUSB2_SYSCFG_HSE_Pos            (7UL)        /*!< HSE (Bit 7)                                           */
+#define RUSB2_SYSCFG_HSE_Msk            (0x80UL)     /*!< HSE (Bitfield-Mask: 0x01)                             */
 #define RUSB2_SYSCFG_DCFM_Pos           (6UL)        /* DCFM (Bit 6) */
 #define RUSB2_SYSCFG_DCFM_Msk           (0x40UL)     /* DCFM (Bitfield-Mask: 0x01) */
 #define RUSB2_SYSCFG_DRPD_Pos           (5UL)        /* DRPD (Bit 5) */
@@ -1135,6 +1179,10 @@ TU_ATTR_BIT_FIELD_ORDER_END
 #define RUSB2_INTENB1_DTCHE_Msk         (0x1000UL)   /* DTCHE (Bitfield-Mask: 0x01) */
 #define RUSB2_INTENB1_ATTCHE_Pos        (11UL)       /* ATTCHE (Bit 11) */
 #define RUSB2_INTENB1_ATTCHE_Msk        (0x800UL)    /* ATTCHE (Bitfield-Mask: 0x01) */
+#define RUSB2_INTENB1_L1RSMENDE_Pos     (9UL)        /*!< L1RSMENDE (Bit 9)                                     */
+#define RUSB2_INTENB1_L1RSMENDE_Msk     (0x200UL)    /*!< L1RSMENDE (Bitfield-Mask: 0x01)                       */
+#define RUSB2_INTENB1_LPMENDE_Pos       (8UL)        /*!< LPMENDE (Bit 8)                                       */
+#define RUSB2_INTENB1_LPMENDE_Msk       (0x100UL)    /*!< LPMENDE (Bitfield-Mask: 0x01)                         */
 #define RUSB2_INTENB1_EOFERRE_Pos       (6UL)        /* EOFERRE (Bit 6) */
 #define RUSB2_INTENB1_EOFERRE_Msk       (0x40UL)     /* EOFERRE (Bitfield-Mask: 0x01) */
 #define RUSB2_INTENB1_SIGNE_Pos         (5UL)        /* SIGNE (Bit 5) */
@@ -1299,6 +1347,10 @@ TU_ATTR_BIT_FIELD_ORDER_END
 #define RUSB2_DCPCTR_BSTS_Msk           (0x8000UL)   /* BSTS (Bitfield-Mask: 0x01) */
 #define RUSB2_DCPCTR_SUREQ_Pos          (14UL)       /* SUREQ (Bit 14) */
 #define RUSB2_DCPCTR_SUREQ_Msk          (0x4000UL)   /* SUREQ (Bitfield-Mask: 0x01) */
+#define R_USB_HS0_DCPCTR_CSCLR_Pos      (13UL)       /*!< CSCLR (Bit 13)                                        */
+#define RUSB2_DCPCTR_CSCLR_Msk          (0x2000UL)   /*!< CSCLR (Bitfield-Mask: 0x01)                           */
+#define RUSB2_DCPCTR_CSSTS_Pos          (12UL)       /*!< CSSTS (Bit 12)                                        */
+#define RUSB2_DCPCTR_CSSTS_Msk          (0x1000UL)   /*!< CSSTS (Bitfield-Mask: 0x01)                           */
 #define RUSB2_DCPCTR_SUREQCLR_Pos       (11UL)       /* SUREQCLR (Bit 11) */
 #define RUSB2_DCPCTR_SUREQCLR_Msk       (0x800UL)    /* SUREQCLR (Bitfield-Mask: 0x01) */
 #define RUSB2_DCPCTR_SQCLR_Pos          (8UL)        /* SQCLR (Bit 8) */
@@ -1325,6 +1377,8 @@ TU_ATTR_BIT_FIELD_ORDER_END
 #define RUSB2_PIPECFG_BFRE_Msk          (0x400UL)    /* BFRE (Bitfield-Mask: 0x01) */
 #define RUSB2_PIPECFG_DBLB_Pos          (9UL)        /* DBLB (Bit 9) */
 #define RUSB2_PIPECFG_DBLB_Msk          (0x200UL)    /* DBLB (Bitfield-Mask: 0x01) */
+#define RUSB2_PIPECFG_CNTMD_Pos         (8UL)        /*!< CNTMD (Bit 8)                                         */
+#define RUSB2_PIPECFG_CNTMD_Msk         (0x100UL)    /*!< CNTMD (Bitfield-Mask: 0x01)                           */
 #define RUSB2_PIPECFG_SHTNAK_Pos        (7UL)        /* SHTNAK (Bit 7) */
 #define RUSB2_PIPECFG_SHTNAK_Msk        (0x80UL)     /* SHTNAK (Bitfield-Mask: 0x01) */
 #define RUSB2_PIPECFG_DIR_Pos           (4UL)        /* DIR (Bit 4) */
@@ -1332,6 +1386,12 @@ TU_ATTR_BIT_FIELD_ORDER_END
 #define RUSB2_PIPECFG_EPNUM_Pos         (0UL)        /* EPNUM (Bit 0) */
 #define RUSB2_PIPECFG_EPNUM_Msk         (0xfUL)      /* EPNUM (Bitfield-Mask: 0x0f) */
 
+// PIPEBUF
+#define RUSB2_PIPEBUF_BUFSIZE_Pos       (10UL)       /*!< BUFSIZE (Bit 10)                                      */
+#define RUSB2_PIPEBUF_BUFSIZE_Msk       (0x7c00UL)   /*!< BUFSIZE (Bitfield-Mask: 0x1f)                         */
+#define RUSB2_PIPEBUF_BUFNMB_Pos        (0UL)        /*!< BUFNMB (Bit 0)                                        */
+#define RUSB2_PIPEBUF_BUFNMB_Msk        (0xffUL)     /*!< BUFNMB (Bitfield-Mask: 0xff)                          */
+
 // PIPEMAXP
 #define RUSB2_PIPEMAXP_DEVSEL_Pos       (12UL)       /* DEVSEL (Bit 12) */
 #define RUSB2_PIPEMAXP_DEVSEL_Msk       (0xf000UL)   /* DEVSEL (Bitfield-Mask: 0x0f) */
@@ -1478,6 +1538,28 @@ TU_ATTR_BIT_FIELD_ORDER_END
 #define RUSB2_HL1CTRL2_L1ADDR_Pos       (0UL)        /* L1ADDR (Bit 0) */
 #define RUSB2_HL1CTRL2_L1ADDR_Msk       (0xfUL)      /* L1ADDR (Bitfield-Mask: 0x0f) */
 
+// PHYTRIM1
+#define RUSB2_PHYTRIM1_IMPOFFSET_Pos    (12UL)       /*!< IMPOFFSET (Bit 12)                                    */
+#define RUSB2_PHYTRIM1_IMPOFFSET_Msk    (0x7000UL)   /*!< IMPOFFSET (Bitfield-Mask: 0x07)                       */
+#define RUSB2_PHYTRIM1_HSIUP_Pos        (8UL)        /*!< HSIUP (Bit 8)                                         */
+#define RUSB2_PHYTRIM1_HSIUP_Msk        (0xf00UL)    /*!< HSIUP (Bitfield-Mask: 0x0f)                           */
+#define RUSB2_PHYTRIM1_PCOMPENB_Pos     (7UL)        /*!< PCOMPENB (Bit 7)                                      */
+#define RUSB2_PHYTRIM1_PCOMPENB_Msk     (0x80UL)     /*!< PCOMPENB (Bitfield-Mask: 0x01)                        */
+#define RUSB2_PHYTRIM1_DFALL_Pos        (2UL)        /*!< DFALL (Bit 2)                                         */
+#define RUSB2_PHYTRIM1_DFALL_Msk        (0xcUL)      /*!< DFALL (Bitfield-Mask: 0x03)                           */
+#define RUSB2_PHYTRIM1_DRISE_Pos        (0UL)        /*!< DRISE (Bit 0)                                         */
+#define RUSB2_PHYTRIM1_DRISE_Msk        (0x3UL)      /*!< DRISE (Bitfield-Mask: 0x03)                           */
+
+// PHYTRIM2
+#define RUSB2_PHYTRIM2_DIS_Pos          (12UL)       /*!< DIS (Bit 12)                                          */
+#define RUSB2_PHYTRIM2_DIS_Msk          (0x7000UL)   /*!< DIS (Bitfield-Mask: 0x07)                             */
+#define RUSB2_PHYTRIM2_PDR_Pos          (8UL)        /*!< PDR (Bit 8)                                           */
+#define RUSB2_PHYTRIM2_PDR_Msk          (0x300UL)    /*!< PDR (Bitfield-Mask: 0x03)                             */
+#define RUSB2_PHYTRIM2_HSRXENMO_Pos     (7UL)        /*!< HSRXENMO (Bit 7)                                      */
+#define RUSB2_PHYTRIM2_HSRXENMO_Msk     (0x80UL)     /*!< HSRXENMO (Bitfield-Mask: 0x01)                        */
+#define RUSB2_PHYTRIM2_SQU_Pos          (0UL)        /*!< SQU (Bit 0)                                           */
+#define RUSB2_PHYTRIM2_SQU_Msk          (0xfUL)      /*!< SQU (Bitfield-Mask: 0x0f)                             */
+
 // DPUSR0R
 #define RUSB2_DPUSR0R_DVBSTSHM_Pos      (23UL)       /* DVBSTSHM (Bit 23) */
 #define RUSB2_DPUSR0R_DVBSTSHM_Msk      (0x800000UL) /* DVBSTSHM (Bitfield-Mask: 0x01) */
@@ -1599,69 +1681,72 @@ TU_ATTR_BIT_FIELD_ORDER_END
 //--------------------------------------------------------------------+
 
 TU_VERIFY_STATIC(sizeof(RUSB2_PIPE_TR_t) == 4, "incorrect size");
-TU_VERIFY_STATIC(sizeof(RUSB2_REG_t) == 1032, "incorrect size");
+TU_VERIFY_STATIC(sizeof(rusb2_reg_t) == 1032, "incorrect size");
 
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, SYSCFG     ) == 0x00000000, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, BUSWAIT    ) == 0x00000002, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, SYSSTS0    ) == 0x00000004, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PLLSTA     ) == 0x00000006, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DVSTCTR0   ) == 0x00000008, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, TESTMODE   ) == 0x0000000C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, CFIFO      ) == 0x00000014, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, D0FIFO     ) == 0x00000018, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, D1FIFO     ) == 0x0000001C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, CFIFOSEL   ) == 0x00000020, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, CFIFOCTR   ) == 0x00000022, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, D0FIFOSEL  ) == 0x00000028, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, D0FIFOCTR  ) == 0x0000002A, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, D1FIFOSEL  ) == 0x0000002C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, D1FIFOCTR  ) == 0x0000002E, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, INTENB0    ) == 0x00000030, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, INTENB1    ) == 0x00000032, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, BRDYENB    ) == 0x00000036, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, NRDYENB    ) == 0x00000038, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, BEMPENB    ) == 0x0000003A, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, SOFCFG     ) == 0x0000003C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PHYSET     ) == 0x0000003E, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, INTSTS0    ) == 0x00000040, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, INTSTS1    ) == 0x00000042, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, BRDYSTS    ) == 0x00000046, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, NRDYSTS    ) == 0x00000048, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, BEMPSTS    ) == 0x0000004A, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, FRMNUM     ) == 0x0000004C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, UFRMNUM    ) == 0x0000004E, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBADDR    ) == 0x00000050, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBREQ     ) == 0x00000054, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBVAL     ) == 0x00000056, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBINDX    ) == 0x00000058, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBLENG    ) == 0x0000005A, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DCPCFG     ) == 0x0000005C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DCPMAXP    ) == 0x0000005E, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DCPCTR     ) == 0x00000060, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PIPESEL    ) == 0x00000064, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PIPECFG    ) == 0x00000068, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PIPEMAXP   ) == 0x0000006C, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PIPEPERI   ) == 0x0000006E, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PIPE_CTR   ) == 0x00000070, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PIPE_TR    ) == 0x00000090, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBBCCTRL0 ) == 0x000000B0, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, UCKSEL     ) == 0x000000C4, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, USBMC      ) == 0x000000CC, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DEVADD     ) == 0x000000D0, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PHYSLEW    ) == 0x000000F0, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, LPCTRL     ) == 0x00000100, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, LPSTS      ) == 0x00000102, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, BCCTRL     ) == 0x00000140, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PL1CTRL1   ) == 0x00000144, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, PL1CTRL2   ) == 0x00000146, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, HL1CTRL1   ) == 0x00000148, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, HL1CTRL2   ) == 0x0000014A, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DPUSR0R    ) == 0x00000160, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DPUSR1R    ) == 0x00000164, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DPUSR2R    ) == 0x00000168, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DPUSRCR    ) == 0x0000016A, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DPUSR0R_FS ) == 0x00000400, "incorrect offset");
-TU_VERIFY_STATIC(offsetof(RUSB2_REG_t, DPUSR1R_FS ) == 0x00000404, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, SYSCFG     ) == 0x0000, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, BUSWAIT    ) == 0x0002, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, SYSSTS0    ) == 0x0004, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, PLLSTA     ) == 0x0006, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, DVSTCTR0   ) == 0x0008, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, TESTMODE   ) == 0x000C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, CFIFO      ) == 0x0014, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, D0FIFO     ) == 0x0018, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, D1FIFO     ) == 0x001C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, CFIFOSEL   ) == 0x0020, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, CFIFOCTR   ) == 0x0022, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, D0FIFOSEL  ) == 0x0028, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, D0FIFOCTR  ) == 0x002A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, D1FIFOSEL  ) == 0x002C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, D1FIFOCTR  ) == 0x002E, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, INTENB0    ) == 0x0030, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, INTENB1    ) == 0x0032, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, BRDYENB    ) == 0x0036, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, NRDYENB    ) == 0x0038, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, BEMPENB    ) == 0x003A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, SOFCFG     ) == 0x003C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, PHYSET     ) == 0x003E, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, INTSTS0    ) == 0x0040, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, INTSTS1    ) == 0x0042, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, BRDYSTS    ) == 0x0046, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, NRDYSTS    ) == 0x0048, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, BEMPSTS    ) == 0x004A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, FRMNUM     ) == 0x004C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, UFRMNUM    ) == 0x004E, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, USBADDR    ) == 0x0050, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, USBREQ     ) == 0x0054, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, USBVAL     ) == 0x0056, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, USBINDX    ) == 0x0058, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, USBLENG    ) == 0x005A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, DCPCFG     ) == 0x005C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, DCPMAXP    ) == 0x005E, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, DCPCTR     ) == 0x0060, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, PIPESEL    ) == 0x0064, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, PIPECFG    ) == 0x0068, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, PIPEBUF    ) == 0x006A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, PIPEMAXP   ) == 0x006C, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, PIPEPERI   ) == 0x006E, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, PIPE_CTR   ) == 0x0070, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, PIPE_TR    ) == 0x0090, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, USBBCCTRL0 ) == 0x00B0, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, UCKSEL     ) == 0x00C4, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, USBMC      ) == 0x00CC, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, DEVADD     ) == 0x00D0, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, PHYSLEW    ) == 0x00F0, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, LPCTRL     ) == 0x0100, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, LPSTS      ) == 0x0102, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, BCCTRL     ) == 0x0140, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, PL1CTRL1   ) == 0x0144, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, PL1CTRL2   ) == 0x0146, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, HL1CTRL1   ) == 0x0148, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, HL1CTRL2   ) == 0x014A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, PHYTRIM1   ) == 0x0150, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, PHYTRIM2   ) == 0x0152, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, DPUSR0R    ) == 0x0160, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, DPUSR1R    ) == 0x0164, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, DPUSR2R    ) == 0x0168, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, DPUSRCR    ) == 0x016A, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, DPUSR0R_FS ) == 0x0400, "incorrect offset");
+TU_VERIFY_STATIC(offsetof(rusb2_reg_t, DPUSR1R_FS ) == 0x0404, "incorrect offset");
 
 #ifdef __cplusplus
 }

From 95b77a0e7356b5f6625fbdb66f35415db3aac7a9 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 6 Jul 2023 15:54:07 +0700
Subject: [PATCH 488/691] add rusb2_module_start(), more update for multiple
 ports for dcd rusb2

---
 hw/bsp/ra/family.c                      |   7 -
 src/portable/renesas/rusb2/dcd_rusb2.c  | 278 ++++++++++++++----------
 src/portable/renesas/rusb2/rusb2_ra.h   |  40 ++--
 src/portable/renesas/rusb2/rusb2_rx.h   |   6 +
 src/portable/renesas/rusb2/rusb2_type.h |   1 +
 5 files changed, 190 insertions(+), 142 deletions(-)

diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c
index 36b46beab..2c21a9967 100644
--- a/hw/bsp/ra/family.c
+++ b/hw/bsp/ra/family.c
@@ -104,13 +104,6 @@ void board_init(void) {
   R_SYSTEM->TRCKCR = R_SYSTEM_TRCKCR_TRCKEN_Msk | 0x01;
 #endif
 
-  // Enable USB module
-  R_MSTP->MSTPCRB &= ~(1U << 11U); // FS
-
-#ifdef BOARD_HAS_USB_HIGHSPEED
-  R_MSTP->MSTPCRB &= ~(1U << 12U);
-#endif
-
 #if CFG_TUSB_OS == OPT_OS_FREERTOS
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USBFS_INT_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index b58e0be01..27d525b68 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -65,9 +65,9 @@
 
 /* LINK core registers */
 #if defined(__CCRX__)
-  #define RUSB2 ((RUSB2_REG_t __evenaccess*) RUSB2_REG_BASE)
+  #define RUSB2 ((rusb2_reg_t __evenaccess*) RUSB2_REG_BASE)
 #elif defined(__RX__)
-  #define RUSB2 ((RUSB2_REG_t*) RUSB2_REG_BASE)
+  #define RUSB2 ((rusb2_reg_t*) RUSB2_REG_BASE)
 #elif (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
   #define RUSB2 ((R_USB_HS0_Type*)R_USB_HS0_BASE)
 #else
@@ -145,10 +145,15 @@ typedef struct
   uint8_t ep[2][16];   /* a lookup table for a pipe index from an endpoint address */
 } dcd_data_t;
 
+static dcd_data_t _dcd;
+
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
-static dcd_data_t _dcd;
+
+TU_ATTR_ALWAYS_INLINE static inline bool is_highspeed(uint8_t rhport) {
+  return rhport == 1;
+}
 
 static unsigned find_pipe(unsigned xfer)
 {
@@ -543,38 +548,60 @@ static void process_pipe_brdy(uint8_t rhport, unsigned num)
 
 static void process_bus_reset(uint8_t rhport)
 {
-  RUSB2->BEMPENB = 1;
-  RUSB2->BRDYENB = 1;
-  RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk;
-  RUSB2->D0FIFOSEL = 0;
-  while (RUSB2->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
-  RUSB2->D1FIFOSEL = 0;
-  while (RUSB2->D1FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
-  volatile uint16_t *ctr = (volatile uint16_t*)((uintptr_t) (&RUSB2->PIPE_CTR[0]));
-  volatile uint16_t *tre = (volatile uint16_t*)((uintptr_t) (&RUSB2->PIPE_TR[0].E));
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
+
+  rusb->BEMPENB = 1;
+  rusb->BRDYENB = 1;
+  rusb->CFIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk;
+
+  rusb->D0FIFOSEL = 0;
+  while (rusb->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
+
+  rusb->D1FIFOSEL = 0;
+  while (rusb->D1FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
+
+  volatile uint16_t *ctr = (volatile uint16_t*)((uintptr_t) (&rusb->PIPE_CTR[0]));
+  volatile uint16_t *tre = (volatile uint16_t*)((uintptr_t) (&rusb->PIPE_TR[0].E));
+
   for (int i = 1; i <= 5; ++i) {
-    RUSB2->PIPESEL = i;
-    RUSB2->PIPECFG = 0;
+    rusb->PIPESEL = i;
+    rusb->PIPECFG = 0;
     *ctr = RUSB2_PIPE_CTR_ACLRM_Msk;
     *ctr = 0;
     ++ctr;
     *tre = TU_BIT(8);
     tre += 2;
   }
+
   for (int i = 6; i <= 9; ++i) {
-    RUSB2->PIPESEL = i;
-    RUSB2->PIPECFG = 0;
+    rusb->PIPESEL = i;
+    rusb->PIPECFG = 0;
     *ctr = RUSB2_PIPE_CTR_ACLRM_Msk;
     *ctr = 0;
     ++ctr;
   }
   tu_varclr(&_dcd);
 
-#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
-  dcd_event_bus_reset(rhport, TUSB_SPEED_HIGH, true);
-#else
-  dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true);
-#endif
+  TU_LOG3("Bus reset, RHST = %u\r\n", rusb->DVSTCTR0_b.RHST);
+  tusb_speed_t speed;
+  switch(rusb->DVSTCTR0 & RUSB2_DVSTCTR0_RHST_Msk) {
+    case RUSB2_DVSTCTR0_RHST_LS:
+      speed = TUSB_SPEED_LOW;
+      break;
+
+    case RUSB2_DVSTCTR0_RHST_FS:
+      speed = TUSB_SPEED_FULL;
+      break;
+
+    case RUSB2_DVSTCTR0_RHST_HS:
+      speed = TUSB_SPEED_HIGH;
+      break;
+
+    default:
+      TU_ASSERT(false, );
+  }
+
+  dcd_event_bus_reset(rhport, speed, true);
 }
 
 static void process_set_address(uint8_t rhport)
@@ -625,56 +652,63 @@ static void enable_interrupt(uint32_t pswi)
 
 void dcd_init(uint8_t rhport)
 {
-  (void)rhport;
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
 
-#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
-  RUSB2->SYSCFG_b.HSE = 1;
-  RUSB2->PHYSET_b.DIRPD = 0;
-  R_BSP_SoftwareDelay((uint32_t) 1, BSP_DELAY_UNITS_MILLISECONDS);
-  RUSB2->PHYSET_b.PLLRESET = 0;
-  //RUSB2->PHYSET_b.REPSTART = 1;
-  RUSB2->SYSCFG_b.DRPD = 0;
-  RUSB2->SYSCFG_b.USBE = 1;
-  RUSB2->LPSTS_b.SUSPENDM = 1;
-  while (!RUSB2->PLLSTA_b.PLLLOCK);
-  //RUSB2->BUSWAIT |= 0x0F00U;
-  //RUSB2->PHYSET_b.REPSEL = 1;
-  RUSB2->CFIFOSEL_b.MBW = 1;
-  RUSB2->D0FIFOSEL_b.MBW = 1;
-  RUSB2->D1FIFOSEL_b.MBW = 1;
-  RUSB2->INTSTS0 = 0;
-#else
-  RUSB2->SYSCFG_b.SCKE = 1;
-  while (!RUSB2->SYSCFG_b.SCKE) ;
-  RUSB2->SYSCFG_b.DRPD = 0;
-  RUSB2->SYSCFG_b.DCFM = 0;
-  RUSB2->SYSCFG_b.USBE = 1;
-#endif
+  rusb2_module_start(rhport, true);
 
-  // MCU specific PHY init
-  rusb2_phy_init();
+  if ( is_highspeed(rhport) ) {
+    rusb->SYSCFG_b.HSE = 1;
 
-#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE)
-  RUSB2->PHYSLEW = 0x5;
-  RUSB2->DPUSR0R_FS_b.FIXPHY0 = 0u; /* USB_BASE Transceiver Output fixed */
+    // leave CLKSEL as default (0x11) 24Mhz
 
-  #define USB_VDCEN                 (0x0080U) /* b7: Regulator ON/OFF control */
-  RUSB2->USBMC = (uint16_t) (RUSB2->USBMC | (USB_VDCEN));
-#endif
+    // Power and reset UTMI Phy
+    uint16_t physet = (rusb->PHYSET | RUSB2_PHYSET_PLLRESET_Msk) & ~RUSB2_PHYSET_DIRPD_Msk;
+    rusb->PHYSET = physet;
+    R_BSP_SoftwareDelay((uint32_t) 1, BSP_DELAY_UNITS_MILLISECONDS);
+    rusb->PHYSET_b.PLLRESET = 0;
+
+    // set UTMI to operating mode and wait for PLL lock confirmation
+    rusb->LPSTS_b.SUSPENDM = 1;
+    while (!rusb->PLLSTA_b.PLLLOCK) {}
+
+    rusb->SYSCFG_b.DRPD = 0;
+    rusb->SYSCFG_b.USBE = 1;
+
+    // Set CPU bus wait time (fine tunne later)
+    // rusb2->BUSWAIT |= 0x0F00U;
+
+    rusb->PHYSET_b.REPSEL = 1;
+
+    rusb->CFIFOSEL_b.MBW = 1;
+    rusb->D0FIFOSEL_b.MBW = 1;
+    rusb->D1FIFOSEL_b.MBW = 1;
+  } else {
+    rusb->SYSCFG_b.SCKE = 1;
+    while (!rusb->SYSCFG_b.SCKE) {}
+    rusb->SYSCFG_b.DRPD = 0;
+    rusb->SYSCFG_b.DCFM = 0;
+    rusb->SYSCFG_b.USBE = 1;
+
+    // MCU specific PHY init
+    rusb2_phy_init();
+
+    rusb->PHYSLEW = 0x5;
+    rusb->DPUSR0R_FS_b.FIXPHY0 = 0u; /* USB_BASE Transceiver Output fixed */
+
+    // rusb2->USBMC = (uint16_t) (rusb2->USBMC | RUSB2_USBMC_VDCEN_Msk);
+  }
 
   /* Setup default control pipe */
-  RUSB2->DCPMAXP_b.MXPS = 64;
-  RUSB2->INTENB0 = RUSB2_INTSTS0_VBINT_Msk | RUSB2_INTSTS0_BRDY_Msk | RUSB2_INTSTS0_BEMP_Msk |
-          RUSB2_INTSTS0_DVST_Msk | RUSB2_INTSTS0_CTRT_Msk | (USE_SOF ? RUSB2_INTSTS0_SOFR_Msk : 0) |
-          RUSB2_INTSTS0_RESM_Msk | RUSB2_INTSTS0_NRDY_Msk;
-  RUSB2->BEMPENB = 1;
-  RUSB2->BRDYENB = 1;
+  rusb->DCPMAXP_b.MXPS = 64;
 
-#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE)
-  RUSB2->SYSCFG_b.DPRPU = 1;  /* necessary in this position */
-#endif
+  rusb->INTSTS0 = 0;
+  rusb->INTENB0 = RUSB2_INTSTS0_VBINT_Msk | RUSB2_INTSTS0_BRDY_Msk | RUSB2_INTSTS0_BEMP_Msk |
+                  RUSB2_INTSTS0_DVST_Msk | RUSB2_INTSTS0_CTRT_Msk | (USE_SOF ? RUSB2_INTSTS0_SOFR_Msk : 0) |
+                  RUSB2_INTSTS0_RESM_Msk | RUSB2_INTSTS0_NRDY_Msk;
+  rusb->BEMPENB = 1;
+  rusb->BRDYENB = 1;
 
-  if (RUSB2->INTSTS0_b.VBSTS) {
+  if (rusb->INTSTS0_b.VBSTS) {
     dcd_connect(rhport);
   }
 }
@@ -697,24 +731,24 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
 
 void dcd_remote_wakeup(uint8_t rhport)
 {
-  (void)rhport;
-  RUSB2->DVSTCTR0_b.WKUP = 1;
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
+  rusb->DVSTCTR0_b.WKUP = 1;
 }
 
 void dcd_connect(uint8_t rhport)
 {
-  (void)rhport;
-  #if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
-  RUSB2->SYSCFG_b.CNEN = 1;
-  R_BSP_SoftwareDelay((uint32_t) 10, BSP_DELAY_UNITS_MILLISECONDS);
-  #endif
-  RUSB2->SYSCFG_b.DPRPU = 1;
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
+
+  if ( is_highspeed(rhport)) {
+    rusb->SYSCFG_b.CNEN = 1;
+  }
+  rusb->SYSCFG_b.DPRPU = 1;
 }
 
 void dcd_disconnect(uint8_t rhport)
 {
-  (void)rhport;
-  RUSB2->SYSCFG_b.DPRPU = 0;
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
+  rusb->SYSCFG_b.DPRPU = 0;
 }
 
 void dcd_sof_enable(uint8_t rhport, bool en)
@@ -861,76 +895,94 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
 //--------------------------------------------------------------------+
 void dcd_int_handler(uint8_t rhport)
 {
-  (void)rhport;
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
+
+  uint16_t is0 = rusb->INTSTS0;
 
-  unsigned is0 = RUSB2->INTSTS0;
   /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */
-  RUSB2->INTSTS0 = ~((RUSB2_INTSTS0_CTRT_Msk | RUSB2_INTSTS0_DVST_Msk | RUSB2_INTSTS0_SOFR_Msk |
-                         RUSB2_INTSTS0_RESM_Msk | RUSB2_INTSTS0_VBINT_Msk) & is0) | RUSB2_INTSTS0_VALID_Msk;
-  if (is0 & RUSB2_INTSTS0_VBINT_Msk) {
-    if (RUSB2->INTSTS0_b.VBSTS) {
+  rusb->INTSTS0 = ~((RUSB2_INTSTS0_CTRT_Msk | RUSB2_INTSTS0_DVST_Msk | RUSB2_INTSTS0_SOFR_Msk |
+                     RUSB2_INTSTS0_RESM_Msk | RUSB2_INTSTS0_VBINT_Msk) & is0) | RUSB2_INTSTS0_VALID_Msk;
+
+  // VBUS changes
+  if ( is0 & RUSB2_INTSTS0_VBINT_Msk ) {
+    if ( rusb->INTSTS0_b.VBSTS ) {
       dcd_connect(rhport);
     } else {
       dcd_disconnect(rhport);
     }
   }
-  if (is0 & RUSB2_INTSTS0_RESM_Msk) {
+
+  // Resumed
+  if ( is0 & RUSB2_INTSTS0_RESM_Msk ) {
     dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true);
-#if (0==USE_SOF)
-    RUSB2->INTENB0_b.SOFE = 0;
+#if (0 == USE_SOF)
+    rusb->INTENB0_b.SOFE = 0;
 #endif
   }
-  if ((is0 & RUSB2_INTSTS0_SOFR_Msk) && RUSB2->INTENB0_b.SOFE) {
+
+  // SOF received
+  if ( (is0 & RUSB2_INTSTS0_SOFR_Msk) && rusb->INTENB0_b.SOFE ) {
     // USBD will exit suspended mode when SOF event is received
     dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true);
 #if (0 == USE_SOF)
-    RUSB2->INTENB0_b.SOFE = 0;
+    rusb->INTENB0_b.SOFE = 0;
 #endif
   }
-  if (is0 & RUSB2_INTSTS0_DVST_Msk) {
+
+  // Device state changes
+  if ( is0 & RUSB2_INTSTS0_DVST_Msk ) {
     switch (is0 & RUSB2_INTSTS0_DVSQ_Msk) {
-    case RUSB2_INTSTS0_DVSQ_STATE_DEF:
-      process_bus_reset(rhport);
-      break;
-    case RUSB2_INTSTS0_DVSQ_STATE_ADDR:
-      process_set_address(rhport);
-      break;
-    case RUSB2_INTSTS0_DVSQ_STATE_SUSP0:
-    case RUSB2_INTSTS0_DVSQ_STATE_SUSP1:
-    case RUSB2_INTSTS0_DVSQ_STATE_SUSP2:
-    case RUSB2_INTSTS0_DVSQ_STATE_SUSP3:
-       dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true);
-#if (0==USE_SOF)
-      RUSB2->INTENB0_b.SOFE = 1;
+      case RUSB2_INTSTS0_DVSQ_STATE_DEF:
+        process_bus_reset(rhport);
+        break;
+
+      case RUSB2_INTSTS0_DVSQ_STATE_ADDR:
+        process_set_address(rhport);
+        break;
+
+      case RUSB2_INTSTS0_DVSQ_STATE_SUSP0:
+      case RUSB2_INTSTS0_DVSQ_STATE_SUSP1:
+      case RUSB2_INTSTS0_DVSQ_STATE_SUSP2:
+      case RUSB2_INTSTS0_DVSQ_STATE_SUSP3:
+        dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true);
+#if (0 == USE_SOF)
+        rusb->INTENB0_b.SOFE = 1;
 #endif
-    default:
-      break;
+
+      default: break;
     }
   }
-  if (is0 & RUSB2_INTSTS0_NRDY_Msk) {
-    RUSB2->NRDYSTS = 0;
+
+  if ( is0 & RUSB2_INTSTS0_NRDY_Msk ) {
+    rusb->NRDYSTS = 0;
   }
-  if (is0 & RUSB2_INTSTS0_CTRT_Msk) {
-    if (is0 & RUSB2_INTSTS0_CTSQ_CTRL_RDATA) {
+
+  // Control transfer stage changes
+  if ( is0 & RUSB2_INTSTS0_CTRT_Msk ) {
+    if ( is0 & RUSB2_INTSTS0_CTSQ_CTRL_RDATA ) {
       /* A setup packet has been received. */
       process_setup_packet(rhport);
-    } else if (0 == (is0 & RUSB2_INTSTS0_CTSQ_Msk)) {
+    } else if ( 0 == (is0 & RUSB2_INTSTS0_CTSQ_Msk) ) {
       /* A ZLP has been sent/received. */
       process_status_completion(rhport);
     }
   }
-  if (is0 & RUSB2_INTSTS0_BEMP_Msk) {
-    const unsigned s = RUSB2->BEMPSTS;
-    RUSB2->BEMPSTS = 0;
-    if (s & 1) {
+
+  // Buffer empty
+  if ( is0 & RUSB2_INTSTS0_BEMP_Msk ) {
+    const unsigned s = rusb->BEMPSTS;
+    rusb->BEMPSTS = 0;
+    if ( s & 1 ) {
       process_pipe0_bemp(rhport);
     }
   }
-  if (is0 & RUSB2_INTSTS0_BRDY_Msk) {
-    const unsigned m = RUSB2->BRDYENB;
-    unsigned s = RUSB2->BRDYSTS & m;
+
+  // Buffer ready
+  if ( is0 & RUSB2_INTSTS0_BRDY_Msk ) {
+    const unsigned m = rusb->BRDYENB;
+    unsigned s = rusb->BRDYSTS & m;
     /* clear active bits (don't write 0 to already cleared bits according to the HW manual) */
-    RUSB2->BRDYSTS = ~s;
+    rusb->BRDYSTS = ~s;
     while (s) {
 #if defined(__CCRX__)
       static const int Mod37BitPosition[] = {
diff --git a/src/portable/renesas/rusb2/rusb2_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h
index ca7c38907..0dc59331a 100644
--- a/src/portable/renesas/rusb2/rusb2_ra.h
+++ b/src/portable/renesas/rusb2/rusb2_ra.h
@@ -76,38 +76,34 @@ static rusb2_controller_t rusb2_controller[] = {
     #endif
 };
 
-TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_enable(uint8_t rhport)
-{
-  #if RUSB2_CONTROLLER_COUNT > 1
-  NVIC_EnableIRQ(rusb2_controller[rhport].irqnum);
-  #else
-  (void) rhport;
-  NVIC_EnableIRQ(rusb2_controller[0].irqnum);
-  #endif
+#define RUSB2_REG(_p)      ((rusb2_reg_t*) rusb2_controller[_p].reg_base)
+
+TU_ATTR_ALWAYS_INLINE static inline void rusb2_module_start(uint8_t rhport, bool start) {
+  uint32_t const mask = 1U << (11+rhport);
+  if (start) {
+    R_MSTP->MSTPCRB &= ~mask;
+  }else {
+    R_MSTP->MSTPCRB |= mask;
+  }
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_disable(uint8_t rhport)
-{
-  #if RUSB2_CONTROLLER_COUNT > 1
+TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_enable(uint8_t rhport) {
+  NVIC_EnableIRQ(rusb2_controller[rhport].irqnum);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_disable(uint8_t rhport) {
   NVIC_DisableIRQ(rusb2_controller[rhport].irqnum);
-  #else
-  (void) rhport;
-  NVIC_DisableIRQ(rusb2_controller[0].irqnum);
-  #endif
 }
 
 // MCU specific PHY init
-TU_ATTR_ALWAYS_INLINE static inline void rusb2_phy_init(void)
-{
+TU_ATTR_ALWAYS_INLINE static inline void rusb2_phy_init(void) {
 }
 
+//--------------------------------------------------------------------+
+// Application API for setting IRQ number
+//--------------------------------------------------------------------+
 void tud_int_set_irqnum(uint8_t rhport, int32_t irqnum) {
-  #if RUSB2_CONTROLLER_COUNT > 1
   rusb2_controller[rhport].irqnum = irqnum;
-  #else
-  (void) rhport;
-  rusb2_controller[0].irqnum = irqnum;
-  #endif
 }
 
 #ifdef __cplusplus
diff --git a/src/portable/renesas/rusb2/rusb2_rx.h b/src/portable/renesas/rusb2/rusb2_rx.h
index 397c0d56c..d7f4e0b42 100644
--- a/src/portable/renesas/rusb2/rusb2_rx.h
+++ b/src/portable/renesas/rusb2/rusb2_rx.h
@@ -37,6 +37,12 @@ extern "C" {
 
 #define RUSB2_REG_BASE (0x000A0000)
 
+// Start/Stop MSTP TODO implement later
+TU_ATTR_ALWAYS_INLINE static inline void rusb2_module_start(uint8_t rhport, bool start) {
+  (void) rhport;
+  (void) start;
+}
+
 TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_enable(uint8_t rhport)
 {
   (void) rhport;
diff --git a/src/portable/renesas/rusb2/rusb2_type.h b/src/portable/renesas/rusb2/rusb2_type.h
index 0928f5aeb..b704626f6 100644
--- a/src/portable/renesas/rusb2/rusb2_type.h
+++ b/src/portable/renesas/rusb2/rusb2_type.h
@@ -1653,6 +1653,7 @@ TU_ATTR_BIT_FIELD_ORDER_END
 
 #define RUSB2_DVSTCTR0_RHST_LS          (1U << RUSB2_DVSTCTR0_RHST_Pos)   /*  Low-speed connection */
 #define RUSB2_DVSTCTR0_RHST_FS          (2U << RUSB2_DVSTCTR0_RHST_Pos)   /*  Full-speed connection */
+#define RUSB2_DVSTCTR0_RHST_HS          (3U << RUSB2_DVSTCTR0_RHST_Pos)   /*  Full-speed connection */
 
 #define RUSB2_DEVADD_USBSPD_LS          (1U << RUSB2_DEVADD_USBSPD_Pos)   /* Target Device Low-speed */
 #define RUSB2_DEVADD_USBSPD_FS          (2U << RUSB2_DEVADD_USBSPD_Pos)   /* Target Device Full-speed */

From 1eefc2b3ef2e268e839002a8b5221eebe26f6cd3 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 6 Jul 2023 19:35:42 +0700
Subject: [PATCH 489/691] more multiple ports update

---
 src/portable/renesas/rusb2/dcd_rusb2.c  | 344 ++++++++++++++----------
 src/portable/renesas/rusb2/rusb2_rx.h   |   2 +
 src/portable/renesas/rusb2/rusb2_type.h |   9 +-
 3 files changed, 208 insertions(+), 147 deletions(-)

diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 27d525b68..833737181 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -63,22 +63,11 @@
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
 
-/* LINK core registers */
-#if defined(__CCRX__)
-  #define RUSB2 ((rusb2_reg_t __evenaccess*) RUSB2_REG_BASE)
-#elif defined(__RX__)
-  #define RUSB2 ((rusb2_reg_t*) RUSB2_REG_BASE)
-#elif (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
-  #define RUSB2 ((R_USB_HS0_Type*)R_USB_HS0_BASE)
-#else
-  #define RUSB2 ((R_USB_FS0_Type*)R_USB_FS0_BASE)
-#endif
-
 /* Start of definition of packed structs (used by the CCRX toolchain) */
 TU_ATTR_PACKED_BEGIN
 TU_ATTR_BIT_FIELD_ORDER_BEGIN
 
-typedef struct TU_ATTR_PACKED {
+typedef struct TU_ATTR_PACKED _ccrx_evenaccess {
   union {
     struct {
       uint16_t      : 8;
@@ -186,52 +175,53 @@ static unsigned find_pipe(unsigned xfer)
   return 0;
 }
 
-static volatile uint16_t* get_pipectr(unsigned num)
+static volatile uint16_t* get_pipectr(rusb2_reg_t *rusb, unsigned num)
 {
   if (num) {
-    return (volatile uint16_t*)&(RUSB2->PIPE_CTR[num - 1]);
+    return (volatile uint16_t*)&(rusb->PIPE_CTR[num - 1]);
   } else {
-    return (volatile uint16_t*)&(RUSB2->DCPCTR);
+    return (volatile uint16_t*)&(rusb->DCPCTR);
   }
 }
 
-static volatile reg_pipetre_t* get_pipetre(unsigned num)
+static volatile reg_pipetre_t* get_pipetre(rusb2_reg_t *rusb, unsigned num)
 {
   volatile reg_pipetre_t* tre = NULL;
   if ((1 <= num) && (num <= 5)) {
-    tre = (volatile reg_pipetre_t*)&(RUSB2->PIPE_TR[num - 1].E);
+    tre = (volatile reg_pipetre_t*)&(rusb->PIPE_TR[num - 1].E);
   }
   return tre;
 }
 
 static volatile uint16_t* ep_addr_to_pipectr(uint8_t rhport, unsigned ep_addr)
 {
-  (void)rhport;
+  rusb2_reg_t *rusb = RUSB2_REG(rhport);
   const unsigned epn = tu_edpt_number(ep_addr);
+
   if (epn) {
     const unsigned dir = tu_edpt_dir(ep_addr);
     const unsigned num = _dcd.ep[dir][epn];
-    return get_pipectr(num);
+    return get_pipectr(rusb, num);
   } else {
-    return get_pipectr(0);
+    return get_pipectr(rusb, 0);
   }
 }
 
-static unsigned edpt0_max_packet_size(void)
+static uint16_t edpt0_max_packet_size(rusb2_reg_t* rusb)
 {
-  return RUSB2->DCPMAXP_b.MXPS;
+  return rusb->DCPMAXP_b.MXPS;
 }
 
-static unsigned edpt_max_packet_size(unsigned num)
+static uint16_t edpt_max_packet_size(rusb2_reg_t *rusb, unsigned num)
 {
-  RUSB2->PIPESEL = num;
-  return RUSB2->PIPEMAXP;
+  rusb->PIPESEL = num;
+  return rusb->PIPEMAXP;
 }
 
-static inline void pipe_wait_for_ready(unsigned num)
+static inline void pipe_wait_for_ready(rusb2_reg_t * rusb, unsigned num)
 {
-  while (RUSB2->D0FIFOSEL_b.CURPIPE != num) ;
-  while (!RUSB2->D0FIFOCTR_b.FRDY) ;
+  while ( rusb->D0FIFOSEL_b.CURPIPE != num ) {}
+  while ( !rusb->D0FIFOCTR_b.FRDY ) {}
 }
 
 static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
@@ -284,61 +274,70 @@ static void pipe_read_write_packet_ff(tu_fifo_t *f, volatile void *fifo, unsigne
   ops[dir].tu_fifo_advance(f, total_len - rem);
 }
 
-static bool pipe0_xfer_in(void)
+static bool pipe0_xfer_in(rusb2_reg_t* rusb)
 {
   pipe_state_t *pipe = &_dcd.pipe[0];
   const unsigned rem = pipe->remaining;
+
   if (!rem) {
     pipe->buf = NULL;
     return true;
   }
-  const unsigned mps = edpt0_max_packet_size();
-  const unsigned len = TU_MIN(mps, rem);
+
+  const uint16_t mps = edpt0_max_packet_size(rusb);
+  const uint16_t len = tu_min16(mps, rem);
   void          *buf = pipe->buf;
+
   if (len) {
     if (pipe->ff) {
-      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&RUSB2->CFIFO, len, TUSB_DIR_IN);
+      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->CFIFO, len, TUSB_DIR_IN);
     } else {
-      pipe_write_packet(buf, (volatile void*)&RUSB2->CFIFO, len);
+      pipe_write_packet(buf, (volatile void*)&rusb->CFIFO, len);
       pipe->buf = (uint8_t*)buf + len;
     }
   }
+
   if (len < mps) {
-    RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
+    rusb->CFIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
   }
+
   pipe->remaining = rem - len;
   return false;
 }
 
-static bool pipe0_xfer_out(void)
+static bool pipe0_xfer_out(rusb2_reg_t* rusb)
 {
   pipe_state_t *pipe = &_dcd.pipe[0];
   const unsigned rem = pipe->remaining;
 
-  const unsigned mps = edpt0_max_packet_size();
-  const unsigned vld = RUSB2->CFIFOCTR_b.DTLN;
-  const unsigned len = TU_MIN(TU_MIN(rem, mps), vld);
+  const uint16_t mps = edpt0_max_packet_size(rusb);
+  const uint16_t vld = rusb->CFIFOCTR_b.DTLN;
+  const uint16_t len = tu_min16(tu_min16(rem, mps), vld);
   void          *buf = pipe->buf;
+
   if (len) {
     if (pipe->ff) {
-      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&RUSB2->CFIFO, len, TUSB_DIR_OUT);
+      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->CFIFO, len, TUSB_DIR_OUT);
     } else {
-      pipe_read_packet(buf, (volatile void*)&RUSB2->CFIFO, len);
+      pipe_read_packet(buf, (volatile void*)&rusb->CFIFO, len);
       pipe->buf = (uint8_t*)buf + len;
     }
   }
+
   if (len < mps) {
-    RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk;
+    rusb->CFIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk;
   }
+
   pipe->remaining = rem - len;
   if ((len < mps) || (rem == len)) {
     pipe->buf = NULL;
     return true;
   }
+
   return false;
 }
 
-static bool pipe_xfer_in(unsigned num)
+static bool pipe_xfer_in(rusb2_reg_t* rusb, unsigned num)
 {
   pipe_state_t  *pipe = &_dcd.pipe[num];
   const unsigned rem  = pipe->remaining;
@@ -348,119 +347,141 @@ static bool pipe_xfer_in(unsigned num)
     return true;
   }
 
-  RUSB2->D0FIFOSEL = num | RUSB2_FIFOSEL_MBW_16BIT | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? RUSB2_FIFOSEL_BIGEND : 0);
-  const unsigned mps  = edpt_max_packet_size(num);
-  pipe_wait_for_ready(num);
-  const unsigned len  = TU_MIN(rem, mps);
+  rusb->D0FIFOSEL = num | RUSB2_FIFOSEL_MBW_16BIT | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? RUSB2_FIFOSEL_BIGEND : 0);
+  const uint16_t mps  = edpt_max_packet_size(rusb, num);
+  pipe_wait_for_ready(rusb, num);
+  const uint16_t len  = tu_min16(rem, mps);
   void          *buf  = pipe->buf;
+
   if (len) {
     if (pipe->ff) {
-      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&RUSB2->D0FIFO, len, TUSB_DIR_IN);
+      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->D0FIFO, len, TUSB_DIR_IN);
     } else {
-      pipe_write_packet(buf, (volatile void*)&RUSB2->D0FIFO, len);
+      pipe_write_packet(buf, (volatile void*)&rusb->D0FIFO, len);
       pipe->buf = (uint8_t*)buf + len;
     }
   }
+
   if (len < mps) {
-    RUSB2->D0FIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
+    rusb->D0FIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
   }
-  RUSB2->D0FIFOSEL = 0;
-  while (RUSB2->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
+
+  rusb->D0FIFOSEL = 0;
+  while (rusb->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
+
   pipe->remaining = rem - len;
+
   return false;
 }
 
-static bool pipe_xfer_out(unsigned num)
+static bool pipe_xfer_out(rusb2_reg_t* rusb, unsigned num)
 {
   pipe_state_t  *pipe = &_dcd.pipe[num];
-  const unsigned rem  = pipe->remaining;
+  const uint16_t rem  = pipe->remaining;
 
-  RUSB2->D0FIFOSEL = num | RUSB2_FIFOSEL_MBW_8BIT;
-  const unsigned mps  = edpt_max_packet_size(num);
-  pipe_wait_for_ready(num);
-  const unsigned vld  = RUSB2->D0FIFOCTR_b.DTLN;
-  const unsigned len  = TU_MIN(TU_MIN(rem, mps), vld);
+  rusb->D0FIFOSEL = num | RUSB2_FIFOSEL_MBW_8BIT;
+  const uint16_t mps = edpt_max_packet_size(rusb, num);
+  pipe_wait_for_ready(rusb, num);
+
+  const uint16_t vld  = rusb->D0FIFOCTR_b.DTLN;
+  const uint16_t len  = tu_min16(tu_min16(rem, mps), vld);
   void          *buf  = pipe->buf;
+
   if (len) {
     if (pipe->ff) {
-      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&RUSB2->D0FIFO, len, TUSB_DIR_OUT);
+      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->D0FIFO, len, TUSB_DIR_OUT);
     } else {
-      pipe_read_packet(buf, (volatile void*)&RUSB2->D0FIFO, len);
+      pipe_read_packet(buf, (volatile void*)&rusb->D0FIFO, len);
       pipe->buf = (uint8_t*)buf + len;
     }
   }
+
   if (len < mps) {
-    RUSB2->D0FIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk;
+    rusb->D0FIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk;
   }
-  RUSB2->D0FIFOSEL = 0;
-  while (RUSB2->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
+
+  rusb->D0FIFOSEL = 0;
+  while (rusb->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
+
   pipe->remaining = rem - len;
   if ((len < mps) || (rem == len)) {
     pipe->buf = NULL;
     return NULL != buf;
   }
+
   return false;
 }
 
 static void process_setup_packet(uint8_t rhport)
 {
-  uint16_t setup_packet[4];
-  if (0 == (RUSB2->INTSTS0 & RUSB2_INTSTS0_VALID_Msk)) return;
-  RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk;
-  setup_packet[0] = tu_le16toh(RUSB2->USBREQ);
-  setup_packet[1] = RUSB2->USBVAL;
-  setup_packet[2] = RUSB2->USBINDX;
-  setup_packet[3] = RUSB2->USBLENG;
-  RUSB2->INTSTS0 = ~((uint16_t)RUSB2_INTSTS0_VALID_Msk);
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
+  if (0 == (rusb->INTSTS0 & RUSB2_INTSTS0_VALID_Msk)) return;
+
+  rusb->CFIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk;
+  uint16_t setup_packet[4] = {
+      tu_htole16(rusb->USBREQ),
+      tu_htole16(rusb->USBVAL),
+      tu_htole16(rusb->USBINDX),
+      tu_htole16(rusb->USBLENG)
+  };
+
+  rusb->INTSTS0 = ~((uint16_t) RUSB2_INTSTS0_VALID_Msk);
   dcd_event_setup_received(rhport, (const uint8_t*)&setup_packet[0], true);
 }
 
 static void process_status_completion(uint8_t rhport)
 {
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
   uint8_t ep_addr;
   /* Check the data stage direction */
-  if (RUSB2->CFIFOSEL & RUSB2_CFIFOSEL_ISEL_WRITE) {
+  if (rusb->CFIFOSEL & RUSB2_CFIFOSEL_ISEL_WRITE) {
     /* IN transfer. */
     ep_addr = tu_edpt_addr(0, TUSB_DIR_IN);
   } else {
     /* OUT transfer. */
     ep_addr = tu_edpt_addr(0, TUSB_DIR_OUT);
   }
+
   dcd_event_xfer_complete(rhport, ep_addr, 0, XFER_RESULT_SUCCESS, true);
 }
 
-static bool process_pipe0_xfer(int buffer_type, uint8_t ep_addr, void* buffer, uint16_t total_bytes)
+static bool process_pipe0_xfer(rusb2_reg_t* rusb, int buffer_type, uint8_t ep_addr, void* buffer, uint16_t total_bytes)
 {
   /* configure fifo direction and access unit settings */
-  if (ep_addr) { /* IN, 2 bytes */
-    RUSB2->CFIFOSEL = RUSB2_CFIFOSEL_ISEL_WRITE | RUSB2_FIFOSEL_MBW_16BIT |
-                         (TU_BYTE_ORDER == TU_BIG_ENDIAN ? RUSB2_FIFOSEL_BIGEND : 0);
-    while (!(RUSB2->CFIFOSEL & RUSB2_CFIFOSEL_ISEL_WRITE)) ;
-  } else { /* OUT, a byte */
-    RUSB2->CFIFOSEL = RUSB2_FIFOSEL_MBW_8BIT;
-    while (RUSB2->CFIFOSEL & RUSB2_CFIFOSEL_ISEL_WRITE) ;
+  if ( ep_addr ) {
+    /* IN, 2 bytes */
+    rusb->CFIFOSEL = RUSB2_CFIFOSEL_ISEL_WRITE | RUSB2_FIFOSEL_MBW_16BIT |
+                     (TU_BYTE_ORDER == TU_BIG_ENDIAN ? RUSB2_FIFOSEL_BIGEND : 0);
+    while ( !(rusb->CFIFOSEL & RUSB2_CFIFOSEL_ISEL_WRITE) ) {}
+  } else {
+    /* OUT, a byte */
+    rusb->CFIFOSEL = RUSB2_FIFOSEL_MBW_8BIT;
+    while ( rusb->CFIFOSEL & RUSB2_CFIFOSEL_ISEL_WRITE ) {}
   }
 
   pipe_state_t *pipe = &_dcd.pipe[0];
   pipe->ff        = buffer_type;
   pipe->length    = total_bytes;
   pipe->remaining = total_bytes;
-  if (total_bytes) {
-    pipe->buf     = buffer;
-    if (ep_addr) { /* IN */
-      TU_ASSERT(RUSB2->DCPCTR_b.BSTS && (RUSB2->USBREQ & 0x80));
-      pipe0_xfer_in();
+
+  if ( total_bytes ) {
+    pipe->buf = buffer;
+    if ( ep_addr ) {
+      /* IN */
+      TU_ASSERT(rusb->DCPCTR_b.BSTS && (rusb->USBREQ & 0x80));
+      pipe0_xfer_in(rusb);
     }
-    RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_BUF;
+    rusb->DCPCTR = RUSB2_PIPE_CTR_PID_BUF;
   } else {
     /* ZLP */
-    pipe->buf        = NULL;
-    RUSB2->DCPCTR = RUSB2_DCPCTR_CCPL_Msk | RUSB2_PIPE_CTR_PID_BUF;
+    pipe->buf = NULL;
+    rusb->DCPCTR = RUSB2_DCPCTR_CCPL_Msk | RUSB2_PIPE_CTR_PID_BUF;
   }
+
   return true;
 }
 
-static bool process_pipe_xfer(int buffer_type, uint8_t ep_addr, void* buffer, uint16_t total_bytes)
+static bool process_pipe_xfer(rusb2_reg_t* rusb, int buffer_type, uint8_t ep_addr, void* buffer, uint16_t total_bytes)
 {
   const unsigned epn = tu_edpt_number(ep_addr);
   const unsigned dir = tu_edpt_dir(ep_addr);
@@ -473,49 +494,55 @@ static bool process_pipe_xfer(int buffer_type, uint8_t ep_addr, void* buffer, ui
   pipe->buf       = buffer;
   pipe->length    = total_bytes;
   pipe->remaining = total_bytes;
-  if (dir) { /* IN */
+
+  if (dir) {
+    /* IN */
     if (total_bytes) {
-      pipe_xfer_in(num);
-    } else { /* ZLP */
-      RUSB2->D0FIFOSEL = num;
-      pipe_wait_for_ready(num);
-      RUSB2->D0FIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
-      RUSB2->D0FIFOSEL = 0;
-      while (RUSB2->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
+      pipe_xfer_in(rusb, num);
+    } else {
+      /* ZLP */
+      rusb->D0FIFOSEL = num;
+      pipe_wait_for_ready(rusb, num);
+      rusb->D0FIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
+      rusb->D0FIFOSEL = 0;
+      /* if CURPIPE bits changes, check written value */
+      while (rusb->D0FIFOSEL_b.CURPIPE) {}
     }
   } else {
-#if defined(__CCRX__)
-    __evenaccess volatile reg_pipetre_t *pt = get_pipetre(num);
-#else
-    volatile reg_pipetre_t *pt = get_pipetre(num);
-#endif
+    // OUT
+    volatile reg_pipetre_t *pt = get_pipetre(rusb, num);
+
     if (pt) {
-      const unsigned     mps = edpt_max_packet_size(num);
-      volatile uint16_t *ctr = get_pipectr(num);
+      const uint16_t     mps = edpt_max_packet_size(rusb, num);
+      volatile uint16_t *ctr = get_pipectr(rusb, num);
+
       if (*ctr & 0x3) *ctr = RUSB2_PIPE_CTR_PID_NAK;
+
       pt->TRE   = TU_BIT(8);
       pt->TRN   = (total_bytes + mps - 1) / mps;
       pt->TRENB = 1;
       *ctr = RUSB2_PIPE_CTR_PID_BUF;
     }
   }
-  //  TU_LOG1("X %x %d %d\r\n", ep_addr, total_bytes, buffer_type);
+
+  //  TU_LOG2("X %x %d %d\r\n", ep_addr, total_bytes, buffer_type);
   return true;
 }
 
-static bool process_edpt_xfer(int buffer_type, uint8_t ep_addr, void* buffer, uint16_t total_bytes)
+static bool process_edpt_xfer(rusb2_reg_t* rusb, int buffer_type, uint8_t ep_addr, void* buffer, uint16_t total_bytes)
 {
   const unsigned epn = tu_edpt_number(ep_addr);
   if (0 == epn) {
-    return process_pipe0_xfer(buffer_type, ep_addr, buffer, total_bytes);
+    return process_pipe0_xfer(rusb, buffer_type, ep_addr, buffer, total_bytes);
   } else {
-    return process_pipe_xfer(buffer_type, ep_addr, buffer, total_bytes);
+    return process_pipe_xfer(rusb, buffer_type, ep_addr, buffer, total_bytes);
   }
 }
 
 static void process_pipe0_bemp(uint8_t rhport)
 {
-  bool completed = pipe0_xfer_in();
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
+  bool completed = pipe0_xfer_in(rusb);
   if (completed) {
     pipe_state_t *pipe = &_dcd.pipe[0];
     dcd_event_xfer_complete(rhport, tu_edpt_addr(0, TUSB_DIR_IN),
@@ -525,17 +552,20 @@ static void process_pipe0_bemp(uint8_t rhport)
 
 static void process_pipe_brdy(uint8_t rhport, unsigned num)
 {
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
   pipe_state_t  *pipe = &_dcd.pipe[num];
   const unsigned dir  = tu_edpt_dir(pipe->ep);
   bool completed;
 
-  if (dir) { /* IN */
-    completed = pipe_xfer_in(num);
+  if (dir) {
+    /* IN */
+    completed = pipe_xfer_in(rusb, num);
   } else {
+    // OUT
     if (num) {
-      completed = pipe_xfer_out(num);
+      completed = pipe_xfer_out(rusb, num);
     } else {
-      completed = pipe0_xfer_out();
+      completed = pipe0_xfer_out(rusb);
     }
   }
   if (completed) {
@@ -606,8 +636,10 @@ static void process_bus_reset(uint8_t rhport)
 
 static void process_set_address(uint8_t rhport)
 {
-  const uint32_t addr = RUSB2->USBADDR & 0xFF;
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
+  const uint32_t addr = rusb->USBADDR & 0xFF;
   if (!addr) return;
+
   const tusb_control_request_t setup_packet = {
 #if defined(__CCRX__)
       .bmRequestType = { 0 },  /* Note: CCRX needs the braces over this struct member */
@@ -618,8 +650,9 @@ static void process_set_address(uint8_t rhport)
       .wValue        = addr,
       .wIndex        = 0,
       .wLength       = 0,
-    };
-  dcd_event_setup_received(rhport, (const uint8_t*)&setup_packet, true);
+  };
+
+  dcd_event_setup_received(rhport, (const uint8_t *) &setup_packet, true);
 }
 
 /*------------------------------------------------------------------*/
@@ -704,7 +737,7 @@ void dcd_init(uint8_t rhport)
   rusb->INTSTS0 = 0;
   rusb->INTENB0 = RUSB2_INTSTS0_VBINT_Msk | RUSB2_INTSTS0_BRDY_Msk | RUSB2_INTSTS0_BEMP_Msk |
                   RUSB2_INTSTS0_DVST_Msk | RUSB2_INTSTS0_CTRT_Msk | (USE_SOF ? RUSB2_INTSTS0_SOFR_Msk : 0) |
-                  RUSB2_INTSTS0_RESM_Msk | RUSB2_INTSTS0_NRDY_Msk;
+                  RUSB2_INTSTS0_RESM_Msk;
   rusb->BEMPENB = 1;
   rusb->BRDYENB = 1;
 
@@ -766,33 +799,43 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
 {
   (void)rhport;
 
+  rusb2_reg_t * rusb = RUSB2_REG(rhport);
   const unsigned ep_addr = ep_desc->bEndpointAddress;
   const unsigned epn     = tu_edpt_number(ep_addr);
   const unsigned dir     = tu_edpt_dir(ep_addr);
   const unsigned xfer    = ep_desc->bmAttributes.xfer;
 
   const unsigned mps = tu_edpt_packet_size(ep_desc);
-  if (xfer == TUSB_XFER_ISOCHRONOUS && mps > 256) {
-    /* USBa supports up to 256 bytes */
-    return false;
+
+  if (xfer == TUSB_XFER_ISOCHRONOUS) {
+    // Fullspeed ISO is limit to 256 bytes
+    if ( !is_highspeed(rhport) && mps > 256) {
+      return false;
+    }
   }
 
   const unsigned num = find_pipe(xfer);
-  if (!num) return false;
+  TU_ASSERT(num);
+
   _dcd.pipe[num].ep = ep_addr;
   _dcd.ep[dir][epn] = num;
 
   /* setup pipe */
   dcd_int_disable(rhport);
-  #if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
-  RUSB2->PIPEBUF = 0x7C08;
-  #endif
-  RUSB2->PIPESEL = num;
-  RUSB2->PIPEMAXP = mps;
-  volatile uint16_t *ctr = get_pipectr(num);
+
+  if ( is_highspeed(rhport) ) {
+    // FIXME shouldn't be after pipe selection and config, also the BUFNMB should be changed
+    // depending on the allocation scheme
+    rusb->PIPEBUF = 0x7C08;
+  }
+
+  rusb->PIPESEL = num;
+  rusb->PIPEMAXP = mps;
+  volatile uint16_t *ctr = get_pipectr(rusb, num);
   *ctr = RUSB2_PIPE_CTR_ACLRM_Msk | RUSB2_PIPE_CTR_SQCLR_Msk;
   *ctr = 0;
   unsigned cfg = (dir << 4) | epn;
+
   if (xfer == TUSB_XFER_BULK) {
     cfg |= (RUSB2_PIPECFG_TYPE_BULK | RUSB2_PIPECFG_SHTNAK_Msk | RUSB2_PIPECFG_DBLB_Msk);
   } else if (xfer == TUSB_XFER_INTERRUPT) {
@@ -800,13 +843,16 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   } else {
     cfg |= (RUSB2_PIPECFG_TYPE_ISO | RUSB2_PIPECFG_DBLB_Msk);
   }
-  RUSB2->PIPECFG = cfg;
-  RUSB2->BRDYSTS = 0x1FFu ^ TU_BIT(num);
-  RUSB2->BRDYENB |= TU_BIT(num);
+
+  rusb->PIPECFG = cfg;
+  rusb->BRDYSTS = 0x1FFu ^ TU_BIT(num);
+  rusb->BRDYENB |= TU_BIT(num);
+
   if (dir || (xfer != TUSB_XFER_BULK)) {
     *ctr = RUSB2_PIPE_CTR_PID_BUF;
   }
-  // TU_LOG1("O %d %x %x\r\n", RUSB2->PIPESEL, RUSB2->PIPECFG, RUSB2->PIPEMAXP);
+
+  // TU_LOG1("O %d %x %x\r\n", rusb->PIPESEL, rusb->PIPECFG, rusb->PIPEMAXP);
   dcd_int_enable(rhport);
 
   return true;
@@ -826,26 +872,28 @@ void dcd_edpt_close_all(uint8_t rhport)
 
 void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
 {
-  (void)rhport;
+  rusb2_reg_t * rusb = RUSB2_REG(rhport);
   const unsigned epn = tu_edpt_number(ep_addr);
   const unsigned dir = tu_edpt_dir(ep_addr);
   const unsigned num = _dcd.ep[dir][epn];
 
-  RUSB2->BRDYENB &= ~TU_BIT(num);
-  volatile uint16_t *ctr = get_pipectr(num);
+  rusb->BRDYENB &= ~TU_BIT(num);
+  volatile uint16_t *ctr = get_pipectr(rusb, num);
   *ctr = 0;
-  RUSB2->PIPESEL = num;
-  RUSB2->PIPECFG = 0;
+  rusb->PIPESEL = num;
+  rusb->PIPECFG = 0;
   _dcd.pipe[num].ep = 0;
   _dcd.ep[dir][epn] = 0;
 }
 
 bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes)
 {
-  bool r;
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
+
   dcd_int_disable(rhport);
-  r = process_edpt_xfer(0, ep_addr, buffer, total_bytes);
+  bool r = process_edpt_xfer(rusb, 0, ep_addr, buffer, total_bytes);
   dcd_int_enable(rhport);
+
   return r;
 }
 
@@ -853,10 +901,12 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_
 {
   // USB buffers always work in bytes so to avoid unnecessary divisions we demand item_size = 1
   TU_ASSERT(ff->item_size == 1);
-  bool r;
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
+
   dcd_int_disable(rhport);
-  r = process_edpt_xfer(1, ep_addr, ff, total_bytes);
+  bool r = process_edpt_xfer(rusb, 1, ep_addr, ff, total_bytes);
   dcd_int_enable(rhport);
+
   return r;
 }
 
@@ -873,8 +923,10 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
 
 void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
 {
+  rusb2_reg_t * rusb = RUSB2_REG(rhport);
   volatile uint16_t *ctr = ep_addr_to_pipectr(rhport, ep_addr);
   if (!ctr) return;
+
   dcd_int_disable(rhport);
   *ctr = RUSB2_PIPE_CTR_SQCLR_Msk;
 
@@ -882,8 +934,8 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
     *ctr = RUSB2_PIPE_CTR_PID_BUF;
   } else {
     const unsigned num = _dcd.ep[0][tu_edpt_number(ep_addr)];
-    RUSB2->PIPESEL = num;
-    if (RUSB2->PIPECFG_b.TYPE != 1) {
+    rusb->PIPESEL = num;
+    if (rusb->PIPECFG_b.TYPE != 1) {
       *ctr = RUSB2_PIPE_CTR_PID_BUF;
     }
   }
@@ -953,9 +1005,9 @@ void dcd_int_handler(uint8_t rhport)
     }
   }
 
-  if ( is0 & RUSB2_INTSTS0_NRDY_Msk ) {
-    rusb->NRDYSTS = 0;
-  }
+//  if ( is0 & RUSB2_INTSTS0_NRDY_Msk ) {
+//    rusb->NRDYSTS = 0;
+//  }
 
   // Control transfer stage changes
   if ( is0 & RUSB2_INTSTS0_CTRT_Msk ) {
@@ -970,7 +1022,7 @@ void dcd_int_handler(uint8_t rhport)
 
   // Buffer empty
   if ( is0 & RUSB2_INTSTS0_BEMP_Msk ) {
-    const unsigned s = rusb->BEMPSTS;
+    const uint16_t s = rusb->BEMPSTS;
     rusb->BEMPSTS = 0;
     if ( s & 1 ) {
       process_pipe0_bemp(rhport);
diff --git a/src/portable/renesas/rusb2/rusb2_rx.h b/src/portable/renesas/rusb2/rusb2_rx.h
index d7f4e0b42..21b2527c3 100644
--- a/src/portable/renesas/rusb2/rusb2_rx.h
+++ b/src/portable/renesas/rusb2/rusb2_rx.h
@@ -37,6 +37,8 @@ extern "C" {
 
 #define RUSB2_REG_BASE (0x000A0000)
 
+#define RUSB2_REG(_p)      ((rusb2_reg_t *) RUSB2_REG_BASE)
+
 // Start/Stop MSTP TODO implement later
 TU_ATTR_ALWAYS_INLINE static inline void rusb2_module_start(uint8_t rhport, bool start) {
   (void) rhport;
diff --git a/src/portable/renesas/rusb2/rusb2_type.h b/src/portable/renesas/rusb2/rusb2_type.h
index b704626f6..7a5e37089 100644
--- a/src/portable/renesas/rusb2/rusb2_type.h
+++ b/src/portable/renesas/rusb2/rusb2_type.h
@@ -33,6 +33,13 @@
 extern "C" {
 #endif
 
+// CCRX specific attribute to generate a Code that Accesses Variables in the Declared Size
+#ifdef __CCRX__
+  #define _ccrx_evenaccess __evenaccess
+#else
+  #define _ccrx_evenaccess
+#endif
+
 /*--------------------------------------------------------------------*/
 /* Register Definitions                                           */
 /*--------------------------------------------------------------------*/
@@ -64,7 +71,7 @@ typedef struct {
 
 
 /* RUSB2 Registers Structure */
-typedef struct {
+typedef struct _ccrx_evenaccess {
   union {
     volatile uint16_t SYSCFG; /* (@ 0x00000000) System Configuration Control Register */
 

From c53acb145589e2733b7d1abe012e85ae590bffb7 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 6 Jul 2023 20:10:58 +0700
Subject: [PATCH 490/691] fix build with rx

---
 src/portable/renesas/rusb2/dcd_rusb2.c | 37 +++++++++++++++-----------
 src/portable/renesas/rusb2/rusb2_ra.h  |  4 +--
 src/portable/renesas/rusb2/rusb2_rx.h  |  5 +++-
 3 files changed, 27 insertions(+), 19 deletions(-)

diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 833737181..81b60b3bc 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -36,12 +36,6 @@
 #include "device/dcd.h"
 #include "rusb2_type.h"
 
-#if !defined(CFG_TUSB_RHPORT0_MODE) && !defined(CFG_TUSB_RHPORT1_MODE)
-// fallback
-#define CFG_TUSB_RHPORT0_MODE   OPT_MODE_DEVICE
-#define CFG_TUSB_RHPORT1_MODE   0
-#endif
-
 #if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
   #include "rusb2_rx.h"
 #elif TU_CHECK_MCU(OPT_MCU_RAXXX)
@@ -86,7 +80,7 @@ typedef union TU_ATTR_PACKED {
     volatile uint8_t reserved8;
   };
   volatile uint16_t u16;
-} hw_fifo_t;
+} hw_fifo16_t;
 
 typedef union TU_ATTR_PACKED {
   struct {
@@ -140,9 +134,11 @@ static dcd_data_t _dcd;
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
 
-TU_ATTR_ALWAYS_INLINE static inline bool is_highspeed(uint8_t rhport) {
-  return rhport == 1;
-}
+#ifdef RUSB2_SUPPORT_HIGHSPEED
+  #define is_highspeed_usbip(_p) (_p == 1)
+#else
+  #define is_highspeed_usbip(_p) (false)
+#endif
 
 static unsigned find_pipe(unsigned xfer)
 {
@@ -229,14 +225,17 @@ static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
 #if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
   volatile hw_fifo32_t *reg = (volatile hw_fifo32_t*) fifo;
 #else
-  volatile hw_fifo_t *reg = (volatile hw_fifo_t*) fifo;
+  volatile hw_fifo16_t *reg = (volatile hw_fifo16_t*) fifo;
 #endif
+
   uintptr_t addr = (uintptr_t)buf;
+
   while (len >= 2) {
     reg->u16 = *(const uint16_t *)addr;
     addr += 2;
     len  -= 2;
   }
+
   if (len > 0) {
     reg->u8 = *(const uint8_t *)addr;
     ++addr;
@@ -260,11 +259,14 @@ static void pipe_read_write_packet_ff(tu_fifo_t *f, volatile void *fifo, unsigne
     /* OUT */ {tu_fifo_get_write_info,tu_fifo_advance_write_pointer,pipe_read_packet},
     /* IN  */ {tu_fifo_get_read_info, tu_fifo_advance_read_pointer, pipe_write_packet},
   };
+
   tu_fifo_buffer_info_t info;
   ops[dir].tu_fifo_get_info(f, &info);
+
   unsigned total_len = len;
   len = TU_MIN(total_len, info.len_lin);
   ops[dir].pipe_read_write(info.ptr_lin, fifo, len);
+
   unsigned rem = total_len - len;
   if (rem) {
     len = TU_MIN(rem, info.len_wrap);
@@ -689,7 +691,8 @@ void dcd_init(uint8_t rhport)
 
   rusb2_module_start(rhport, true);
 
-  if ( is_highspeed(rhport) ) {
+#ifdef RUSB2_SUPPORT_HIGHSPEED
+  if ( is_highspeed_usbip(rhport) ) {
     rusb->SYSCFG_b.HSE = 1;
 
     // leave CLKSEL as default (0x11) 24Mhz
@@ -715,7 +718,9 @@ void dcd_init(uint8_t rhport)
     rusb->CFIFOSEL_b.MBW = 1;
     rusb->D0FIFOSEL_b.MBW = 1;
     rusb->D1FIFOSEL_b.MBW = 1;
-  } else {
+  } else
+#endif
+  {
     rusb->SYSCFG_b.SCKE = 1;
     while (!rusb->SYSCFG_b.SCKE) {}
     rusb->SYSCFG_b.DRPD = 0;
@@ -772,7 +777,7 @@ void dcd_connect(uint8_t rhport)
 {
   rusb2_reg_t* rusb = RUSB2_REG(rhport);
 
-  if ( is_highspeed(rhport)) {
+  if ( is_highspeed_usbip(rhport)) {
     rusb->SYSCFG_b.CNEN = 1;
   }
   rusb->SYSCFG_b.DPRPU = 1;
@@ -809,7 +814,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
 
   if (xfer == TUSB_XFER_ISOCHRONOUS) {
     // Fullspeed ISO is limit to 256 bytes
-    if ( !is_highspeed(rhport) && mps > 256) {
+    if ( !is_highspeed_usbip(rhport) && mps > 256) {
       return false;
     }
   }
@@ -823,7 +828,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   /* setup pipe */
   dcd_int_disable(rhport);
 
-  if ( is_highspeed(rhport) ) {
+  if ( is_highspeed_usbip(rhport) ) {
     // FIXME shouldn't be after pipe selection and config, also the BUFNMB should be changed
     // depending on the allocation scheme
     rusb->PIPEBUF = 0x7C08;
diff --git a/src/portable/renesas/rusb2/rusb2_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h
index 0dc59331a..e04a99685 100644
--- a/src/portable/renesas/rusb2/rusb2_ra.h
+++ b/src/portable/renesas/rusb2/rusb2_ra.h
@@ -62,7 +62,7 @@ typedef struct {
 }rusb2_controller_t;
 
 #if defined(BSP_MCU_GROUP_RA6M5) || defined(BSP_MCU_GROUP_RA6M3) || (BSP_CFG_MCU_PART_SERIES == 8)
-  #define RUSB2_HAS_HIGHSPEED
+  #define RUSB2_SUPPORT_HIGHSPEED
   #define RUSB2_CONTROLLER_COUNT 2
 #else
   #define RUSB2_CONTROLLER_COUNT 1
@@ -71,7 +71,7 @@ typedef struct {
 // USBFS_INT_IRQn and USBHS_USB_INT_RESUME_IRQn are generated by FSP
 static rusb2_controller_t rusb2_controller[] = {
     { .reg_base = R_USB_FS0_BASE, .irqnum = USBFS_INT_IRQn },
-    #ifdef RUSB2_HAS_HIGHSPEED
+    #ifdef RUSB2_SUPPORT_HIGHSPEED
     { .reg_base = R_USB_HS0_BASE, .irqnum = USBHS_USB_INT_RESUME_IRQn },
     #endif
 };
diff --git a/src/portable/renesas/rusb2/rusb2_rx.h b/src/portable/renesas/rusb2/rusb2_rx.h
index 21b2527c3..17b9a918c 100644
--- a/src/portable/renesas/rusb2/rusb2_rx.h
+++ b/src/portable/renesas/rusb2/rusb2_rx.h
@@ -37,7 +37,10 @@ extern "C" {
 
 #define RUSB2_REG_BASE (0x000A0000)
 
-#define RUSB2_REG(_p)      ((rusb2_reg_t *) RUSB2_REG_BASE)
+TU_ATTR_ALWAYS_INLINE static inline rusb2_reg_t* RUSB2_REG(uint8_t rhport) {
+  (void) rhport;
+  return (rusb2_reg_t *) RUSB2_REG_BASE;
+}
 
 // Start/Stop MSTP TODO implement later
 TU_ATTR_ALWAYS_INLINE static inline void rusb2_module_start(uint8_t rhport, bool start) {

From 4bbacb10089856fd6cd6e4c54da8ab2dc8575c60 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 7 Jul 2023 11:07:57 +0700
Subject: [PATCH 491/691] correct setting trace clock

---
 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp_clock_cfg.h |  8 --------
 hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug      |  3 +--
 hw/bsp/ra/family.c                                | 11 ++++++-----
 hw/bsp/ra/family.cmake                            |  4 ----
 4 files changed, 7 insertions(+), 19 deletions(-)

diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp_clock_cfg.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp_clock_cfg.h
index 9bb496dd6..0eb5e0516 100644
--- a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp_clock_cfg.h
+++ b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp_clock_cfg.h
@@ -8,14 +8,7 @@
 #define BSP_CFG_HOCO_FREQUENCY  (2)                                /* HOCO 20MHz */
 #define BSP_CFG_PLL_SOURCE      (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL Src: XTAL */
 #define BSP_CFG_PLL_DIV         (BSP_CLOCKS_PLL_DIV_3)             /* PLL Div /3 */
-
-#ifdef TRACE_ETM
-// Due to ozone fixed trace clock div = 1, PLL is limited around 100Mhz. This use 128 Mhz
-#define BSP_CFG_PLL_MUL         (BSP_CLOCKS_PLL_MUL(16U,0U))       /* PLL Mul x16.0 */
-#else
 #define BSP_CFG_PLL_MUL         (BSP_CLOCKS_PLL_MUL(25U,0U))       /* PLL Mul x25.0 */
-#endif
-
 #define BSP_CFG_PLL2_SOURCE     (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL2 Src: XTAL */
 #define BSP_CFG_PLL2_DIV        (BSP_CLOCKS_PLL_DIV_2)             /* PLL2 Div /2 */
 #define BSP_CFG_PLL2_MUL        (BSP_CLOCKS_PLL_MUL(20U,0U))       /* PLL2 Mul x20.0 */
@@ -41,5 +34,4 @@
 #define BSP_CFG_CANFDCLK_DIV    (BSP_CLOCKS_CANFD_CLOCK_DIV_1)     /* CANFDCLK Div /1 */
 #define BSP_CFG_CECCLK_DIV      (BSP_CLOCKS_CEC_CLOCK_DIV_1)       /* CECCLK Div /1 */
 
-
 #endif /* BSP_CLOCK_CFG_H_ */
diff --git a/hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug b/hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug
index 8a1262138..aebb29162 100644
--- a/hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug
+++ b/hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug
@@ -29,9 +29,8 @@ void OnProjectLoad (void) {
 **********************************************************************
 */
 void BeforeTargetConnect (void) {
-  //
   // Trace pin init is done by J-Link script file as J-Link script files are IDE independent
-  //
+	Project.SetJLinkScript("../../../debug.jlinkscript");
 }
 
 /*********************************************************************
diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c
index 2c21a9967..b78fdedc7 100644
--- a/hw/bsp/ra/family.c
+++ b/hw/bsp/ra/family.c
@@ -49,8 +49,6 @@
 
 /* Key code for writing PRCR register. */
 #define BSP_PRV_PRCR_KEY         (0xA500U)
-#define BSP_PRV_PRCR_PRC1_UNLOCK ((BSP_PRV_PRCR_KEY) | 0x2U)
-#define BSP_PRV_PRCR_LOCK         ((BSP_PRV_PRCR_KEY) | 0x0U)
 
 static const ioport_cfg_t family_pin_cfg = {
     .number_of_pins = sizeof(board_pin_cfg) / sizeof(ioport_pin_cfg_t),
@@ -98,10 +96,13 @@ void board_init(void) {
   R_IOPORT_Open(&port_ctrl, &family_pin_cfg);
 
 #ifdef TRACE_ETM
-  // Enable trace clock (max 100Mhz) = PLL / div
-  // Somehow ozone/jtrace always fixed trace div to 1 therefore for ETM tracing working reliably
-  // PLL is limited around 100Mhz
+  // TRCKCR is protected by PRCR bit0 register
+  R_SYSTEM->PRCR = (uint16_t) (BSP_PRV_PRCR_KEY | 0x01);
+
+  // Enable trace clock (max 100Mhz). Since PLL/CPU is 200Mhz, clock div = 2
   R_SYSTEM->TRCKCR = R_SYSTEM_TRCKCR_TRCKEN_Msk | 0x01;
+
+  R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_KEY;
 #endif
 
 #if CFG_TUSB_OS == OPT_OS_FREERTOS
diff --git a/hw/bsp/ra/family.cmake b/hw/bsp/ra/family.cmake
index 74329165f..eb2d4958f 100644
--- a/hw/bsp/ra/family.cmake
+++ b/hw/bsp/ra/family.cmake
@@ -37,10 +37,6 @@ function(add_board_target BOARD_TARGET)
       ${FSP_RA}/src/bsp/mcu/all/bsp_security.c
       ${FSP_RA}/src/r_ioport/r_ioport.c
       )
-    # ETM Trace option
-    if (TRACE_ETM STREQUAL "1")
-      target_compile_definitions(${BOARD_TARGET} PUBLIC TRACE_ETM)
-    endif ()
 
     target_compile_options(${BOARD_TARGET} PUBLIC
       -ffreestanding

From 4c156100fafa682407f1a9a459d8b8800a029446 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 7 Jul 2023 12:27:18 +0700
Subject: [PATCH 492/691] use unaligned access read for hw fifo

---
 src/common/tusb_common.h               | 18 ++++--
 src/common/tusb_mcu.h                  | 12 +++-
 src/portable/renesas/rusb2/dcd_rusb2.c | 79 ++++++++++++++++----------
 3 files changed, 72 insertions(+), 37 deletions(-)

diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index 957491aa9..576cb123f 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -260,11 +260,21 @@ TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16(void* mem, uint16_
 #else
 
 // MCU that could access unaligned memory natively
-TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_unaligned_read32  (const void* mem) { return *((uint32_t const *) mem); }
-TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_unaligned_read16  (const void* mem) { return *((uint16_t const *) mem); }
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_unaligned_read32(const void *mem) {
+  return *((uint32_t const *) mem);
+}
 
-TU_ATTR_ALWAYS_INLINE static inline void     tu_unaligned_write32 (void* mem, uint32_t value ) { *((uint32_t*) mem) = value; }
-TU_ATTR_ALWAYS_INLINE static inline void     tu_unaligned_write16 (void* mem, uint16_t value ) { *((uint16_t*) mem) = value; }
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_unaligned_read16(const void *mem) {
+  return *((uint16_t const *) mem);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write32(void *mem, uint32_t value) {
+  *((uint32_t *) mem) = value;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16(void *mem, uint16_t value) {
+  *((uint16_t *) mem) = value;
+}
 
 #endif
 
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 496ebfc85..89f89182e 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -34,10 +34,16 @@
 
 //------------- Unaligned Memory Access -------------//
 
-// ARMv7+ (M3-M7, M23-M33) can access unaligned memory
-#if (defined(__ARM_ARCH) && (__ARM_ARCH >= 7))
-  #define TUP_ARCH_STRICT_ALIGN   0
+#ifdef __ARM_ARCH
+  // ARM Architecture set __ARM_FEATURE_UNALIGNED to 1 for mcu supports unaligned access
+  #if defined(__ARM_FEATURE_UNALIGNED) && __ARM_FEATURE_UNALIGNED == 1
+    #define TUP_ARCH_STRICT_ALIGN   0
+  #else
+    #define TUP_ARCH_STRICT_ALIGN   1
+  #endif
 #else
+  // TODO default to strict align for others
+  // Should investigate other architecture such as risv, xtensa, mips for optimal setting
   #define TUP_ARCH_STRICT_ALIGN   1
 #endif
 
diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 81b60b3bc..464929224 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -220,6 +220,11 @@ static inline void pipe_wait_for_ready(rusb2_reg_t * rusb, unsigned num)
   while ( !rusb->D0FIFOCTR_b.FRDY ) {}
 }
 
+//--------------------------------------------------------------------+
+// Pipe FIFO
+//--------------------------------------------------------------------+
+
+// Write data buffer --> hw fifo
 static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
 {
 #if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
@@ -228,54 +233,68 @@ static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
   volatile hw_fifo16_t *reg = (volatile hw_fifo16_t*) fifo;
 #endif
 
-  uintptr_t addr = (uintptr_t)buf;
+  uint8_t const* buf8 = (uint8_t const*) buf;
 
   while (len >= 2) {
-    reg->u16 = *(const uint16_t *)addr;
-    addr += 2;
+    reg->u16 = tu_unaligned_read16(buf8);
+    buf8 += 2;
     len  -= 2;
   }
 
   if (len > 0) {
-    reg->u8 = *(const uint8_t *)addr;
-    ++addr;
+    reg->u8 = *buf8;
+    ++buf8;
   }
 }
 
+// Read data buffer <-- hw fifo
 static void pipe_read_packet(void *buf, volatile void *fifo, unsigned len)
 {
-  uint8_t *p   = (uint8_t*)buf;
+  uint8_t *p = (uint8_t*)buf;
   volatile uint8_t *reg = (volatile uint8_t*)fifo;  /* byte access is always at base register address */
   while (len--) *p++ = *reg;
 }
 
-static void pipe_read_write_packet_ff(tu_fifo_t *f, volatile void *fifo, unsigned len, unsigned dir)
-{
-  static const struct {
-    void (*tu_fifo_get_info)(tu_fifo_t *f, tu_fifo_buffer_info_t *info);
-    void (*tu_fifo_advance)(tu_fifo_t *f, uint16_t n);
-    void (*pipe_read_write)(void *buf, volatile void *fifo, unsigned len);
-  } ops[] = {
-    /* OUT */ {tu_fifo_get_write_info,tu_fifo_advance_write_pointer,pipe_read_packet},
-    /* IN  */ {tu_fifo_get_read_info, tu_fifo_advance_read_pointer, pipe_write_packet},
-  };
-
+// Write data sw fifo --> hw fifo
+static void pipe_write_packet_ff(tu_fifo_t *f, volatile void *fifo, uint16_t total_len) {
   tu_fifo_buffer_info_t info;
-  ops[dir].tu_fifo_get_info(f, &info);
+  tu_fifo_get_read_info(f, &info);
 
-  unsigned total_len = len;
-  len = TU_MIN(total_len, info.len_lin);
-  ops[dir].pipe_read_write(info.ptr_lin, fifo, len);
+  uint16_t count = tu_min16(total_len, info.len_lin);
+  pipe_write_packet(info.ptr_lin, fifo, count);
 
-  unsigned rem = total_len - len;
+  uint16_t rem = total_len - count;
   if (rem) {
-    len = TU_MIN(rem, info.len_wrap);
-    ops[dir].pipe_read_write(info.ptr_wrap, fifo, len);
-    rem -= len;
+    rem = tu_min16(rem, info.len_wrap);
+    pipe_write_packet(info.ptr_wrap, fifo, rem);
+    count += rem;
   }
-  ops[dir].tu_fifo_advance(f, total_len - rem);
+
+  tu_fifo_advance_read_pointer(f, count);
 }
 
+// Read data sw fifo <-- hw fifo
+static void pipe_read_packet_ff(tu_fifo_t *f, volatile void *fifo, uint16_t total_len) {
+  tu_fifo_buffer_info_t info;
+  tu_fifo_get_write_info(f, &info);
+
+  uint16_t count = tu_min16(total_len, info.len_lin);
+  pipe_read_packet(info.ptr_lin, fifo, count);
+
+  uint16_t rem = total_len - count;
+  if (rem) {
+    rem = tu_min16(rem, info.len_wrap);
+    pipe_read_packet(info.ptr_wrap, fifo, rem);
+    count += rem;
+  }
+
+  tu_fifo_advance_write_pointer(f, count);
+}
+
+//--------------------------------------------------------------------+
+// Pipe Transfer
+//--------------------------------------------------------------------+
+
 static bool pipe0_xfer_in(rusb2_reg_t* rusb)
 {
   pipe_state_t *pipe = &_dcd.pipe[0];
@@ -292,7 +311,7 @@ static bool pipe0_xfer_in(rusb2_reg_t* rusb)
 
   if (len) {
     if (pipe->ff) {
-      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->CFIFO, len, TUSB_DIR_IN);
+      pipe_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->CFIFO, len);
     } else {
       pipe_write_packet(buf, (volatile void*)&rusb->CFIFO, len);
       pipe->buf = (uint8_t*)buf + len;
@@ -319,7 +338,7 @@ static bool pipe0_xfer_out(rusb2_reg_t* rusb)
 
   if (len) {
     if (pipe->ff) {
-      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->CFIFO, len, TUSB_DIR_OUT);
+      pipe_read_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->CFIFO, len);
     } else {
       pipe_read_packet(buf, (volatile void*)&rusb->CFIFO, len);
       pipe->buf = (uint8_t*)buf + len;
@@ -357,7 +376,7 @@ static bool pipe_xfer_in(rusb2_reg_t* rusb, unsigned num)
 
   if (len) {
     if (pipe->ff) {
-      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->D0FIFO, len, TUSB_DIR_IN);
+      pipe_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->D0FIFO, len);
     } else {
       pipe_write_packet(buf, (volatile void*)&rusb->D0FIFO, len);
       pipe->buf = (uint8_t*)buf + len;
@@ -391,7 +410,7 @@ static bool pipe_xfer_out(rusb2_reg_t* rusb, unsigned num)
 
   if (len) {
     if (pipe->ff) {
-      pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->D0FIFO, len, TUSB_DIR_OUT);
+      pipe_read_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->D0FIFO, len);
     } else {
       pipe_read_packet(buf, (volatile void*)&rusb->D0FIFO, len);
       pipe->buf = (uint8_t*)buf + len;

From e0f1ba8b0e9cf46fabcddc72a61d5515df424edf Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 7 Jul 2023 16:07:11 +0700
Subject: [PATCH 493/691] fully work with multiple ports without
 CFG_TUSB_RHPORT0/1

---
 hw/bsp/family_support.cmake             |  4 +-
 hw/bsp/ra/boards/ra6m5_ek/board.cmake   |  7 --
 src/portable/renesas/rusb2/dcd_rusb2.c  | 85 +++++++++++--------------
 src/portable/renesas/rusb2/rusb2_type.h |  1 +
 4 files changed, 39 insertions(+), 58 deletions(-)

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 5b97eb5e4..d8298c8ad 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -227,8 +227,8 @@ function(family_add_tinyusb TARGET OPT_MCU RTOS)
 
   if (DEFINED LOG)
     target_compile_definitions(${TARGET}-tinyusb_config INTERFACE CFG_TUSB_DEBUG=${LOG})
-    if (LOG STREQUAL "3")
-      # no inline for debug level 3
+    if (LOG STREQUAL "4")
+      # no inline for debug level 4
       target_compile_definitions(${TARGET}-tinyusb_config INTERFACE TU_ATTR_ALWAYS_INLINE=)
     endif ()
   endif()
diff --git a/hw/bsp/ra/boards/ra6m5_ek/board.cmake b/hw/bsp/ra/boards/ra6m5_ek/board.cmake
index d934a0c0d..5a615f9b0 100644
--- a/hw/bsp/ra/boards/ra6m5_ek/board.cmake
+++ b/hw/bsp/ra/boards/ra6m5_ek/board.cmake
@@ -14,11 +14,4 @@ function(update_board TARGET)
     # port 0 is fullspeed, port 1 is highspeed
     BOARD_TUD_MAX_SPEED=$<IF:${PORT},OPT_MODE_HIGH_SPEED,OPT_MODE_FULL_SPEED>
     )
-
-  if (PORT STREQUAL 1)
-    target_compile_definitions(${TARGET} PUBLIC
-      CFG_TUSB_RHPORT1_MODE=OPT_MODE_DEVICE|OPT_MODE_HIGH_SPEED
-      CFG_TUSB_RHPORT0_MODE=0
-      )
-  endif ()
 endfunction()
diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 464929224..3d3e52bfa 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -74,26 +74,6 @@ typedef struct TU_ATTR_PACKED _ccrx_evenaccess {
   uint16_t TRN;
 } reg_pipetre_t;
 
-typedef union TU_ATTR_PACKED {
-  struct {
-    volatile uint8_t u8;
-    volatile uint8_t reserved8;
-  };
-  volatile uint16_t u16;
-} hw_fifo16_t;
-
-typedef union TU_ATTR_PACKED {
-  struct {
-    volatile uint8_t reserved8[3];
-    volatile uint8_t u8;
-  };
-  struct {
-    volatile uint16_t reserved16;
-    volatile uint16_t u16;
-  };
-  volatile uint32_t u32;
-} hw_fifo32_t;
-
 typedef struct TU_ATTR_PACKED
 {
   void      *buf;      /* the start address of a transfer data buffer */
@@ -135,9 +115,11 @@ static dcd_data_t _dcd;
 //--------------------------------------------------------------------+
 
 #ifdef RUSB2_SUPPORT_HIGHSPEED
-  #define is_highspeed_usbip(_p) (_p == 1)
+  #define is_highspeed_usbip(_p)     (_p == 1)
+  #define is_highspeed_regbase(_reg) (_reg == RUSB2_REG(1))
 #else
-  #define is_highspeed_usbip(_p) (false)
+  #define is_highspeed_usbip(_p)     (false)
+  #define is_highspeed_regbase(_reg) (false)
 #endif
 
 static unsigned find_pipe(unsigned xfer)
@@ -225,48 +207,57 @@ static inline void pipe_wait_for_ready(rusb2_reg_t * rusb, unsigned num)
 //--------------------------------------------------------------------+
 
 // Write data buffer --> hw fifo
-static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
+static void pipe_write_packet(rusb2_reg_t * rusb, void *buf, volatile void *fifo, unsigned len)
 {
-#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
-  volatile hw_fifo32_t *reg = (volatile hw_fifo32_t*) fifo;
-#else
-  volatile hw_fifo16_t *reg = (volatile hw_fifo16_t*) fifo;
-#endif
+  (void) rusb;
+
+  volatile uint16_t *ff16;
+  volatile uint8_t *ff8;
+
+  // Highspeed FIFO is 32-bit
+  if ( is_highspeed_regbase(rusb) ) {
+    ff16 = (volatile uint16_t*) ((uintptr_t) fifo+2);
+    ff8  = (volatile uint8_t *) ((uintptr_t) fifo+3);
+  }else {
+    ff16 = (volatile uint16_t*) fifo;
+    ff8  = ((volatile uint8_t*) fifo);
+  }
 
   uint8_t const* buf8 = (uint8_t const*) buf;
 
   while (len >= 2) {
-    reg->u16 = tu_unaligned_read16(buf8);
+    *ff16 = tu_unaligned_read16(buf8);
     buf8 += 2;
     len  -= 2;
   }
 
   if (len > 0) {
-    reg->u8 = *buf8;
+    *ff8 = *buf8;
     ++buf8;
   }
 }
 
 // Read data buffer <-- hw fifo
-static void pipe_read_packet(void *buf, volatile void *fifo, unsigned len)
+static void pipe_read_packet(rusb2_reg_t * rusb, void *buf, volatile void *fifo, unsigned len)
 {
+  (void) rusb;
   uint8_t *p = (uint8_t*)buf;
   volatile uint8_t *reg = (volatile uint8_t*)fifo;  /* byte access is always at base register address */
   while (len--) *p++ = *reg;
 }
 
 // Write data sw fifo --> hw fifo
-static void pipe_write_packet_ff(tu_fifo_t *f, volatile void *fifo, uint16_t total_len) {
+static void pipe_write_packet_ff(rusb2_reg_t * rusb, tu_fifo_t *f, volatile void *fifo, uint16_t total_len) {
   tu_fifo_buffer_info_t info;
   tu_fifo_get_read_info(f, &info);
 
   uint16_t count = tu_min16(total_len, info.len_lin);
-  pipe_write_packet(info.ptr_lin, fifo, count);
+  pipe_write_packet(rusb, info.ptr_lin, fifo, count);
 
   uint16_t rem = total_len - count;
   if (rem) {
     rem = tu_min16(rem, info.len_wrap);
-    pipe_write_packet(info.ptr_wrap, fifo, rem);
+    pipe_write_packet(rusb, info.ptr_wrap, fifo, rem);
     count += rem;
   }
 
@@ -274,17 +265,17 @@ static void pipe_write_packet_ff(tu_fifo_t *f, volatile void *fifo, uint16_t tot
 }
 
 // Read data sw fifo <-- hw fifo
-static void pipe_read_packet_ff(tu_fifo_t *f, volatile void *fifo, uint16_t total_len) {
+static void pipe_read_packet_ff(rusb2_reg_t * rusb, tu_fifo_t *f, volatile void *fifo, uint16_t total_len) {
   tu_fifo_buffer_info_t info;
   tu_fifo_get_write_info(f, &info);
 
   uint16_t count = tu_min16(total_len, info.len_lin);
-  pipe_read_packet(info.ptr_lin, fifo, count);
+  pipe_read_packet(rusb, info.ptr_lin, fifo, count);
 
   uint16_t rem = total_len - count;
   if (rem) {
     rem = tu_min16(rem, info.len_wrap);
-    pipe_read_packet(info.ptr_wrap, fifo, rem);
+    pipe_read_packet(rusb, info.ptr_wrap, fifo, rem);
     count += rem;
   }
 
@@ -311,9 +302,9 @@ static bool pipe0_xfer_in(rusb2_reg_t* rusb)
 
   if (len) {
     if (pipe->ff) {
-      pipe_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->CFIFO, len);
+      pipe_write_packet_ff(rusb, (tu_fifo_t*)buf, (volatile void*)&rusb->CFIFO, len);
     } else {
-      pipe_write_packet(buf, (volatile void*)&rusb->CFIFO, len);
+      pipe_write_packet(rusb, buf, (volatile void*)&rusb->CFIFO, len);
       pipe->buf = (uint8_t*)buf + len;
     }
   }
@@ -338,9 +329,9 @@ static bool pipe0_xfer_out(rusb2_reg_t* rusb)
 
   if (len) {
     if (pipe->ff) {
-      pipe_read_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->CFIFO, len);
+      pipe_read_packet_ff(rusb, (tu_fifo_t*)buf, (volatile void*)&rusb->CFIFO, len);
     } else {
-      pipe_read_packet(buf, (volatile void*)&rusb->CFIFO, len);
+      pipe_read_packet(rusb, buf, (volatile void*)&rusb->CFIFO, len);
       pipe->buf = (uint8_t*)buf + len;
     }
   }
@@ -376,9 +367,9 @@ static bool pipe_xfer_in(rusb2_reg_t* rusb, unsigned num)
 
   if (len) {
     if (pipe->ff) {
-      pipe_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->D0FIFO, len);
+      pipe_write_packet_ff(rusb, (tu_fifo_t*)buf, (volatile void*)&rusb->D0FIFO, len);
     } else {
-      pipe_write_packet(buf, (volatile void*)&rusb->D0FIFO, len);
+      pipe_write_packet(rusb, buf, (volatile void*)&rusb->D0FIFO, len);
       pipe->buf = (uint8_t*)buf + len;
     }
   }
@@ -410,9 +401,9 @@ static bool pipe_xfer_out(rusb2_reg_t* rusb, unsigned num)
 
   if (len) {
     if (pipe->ff) {
-      pipe_read_packet_ff((tu_fifo_t*)buf, (volatile void*)&rusb->D0FIFO, len);
+      pipe_read_packet_ff(rusb, (tu_fifo_t*)buf, (volatile void*)&rusb->D0FIFO, len);
     } else {
-      pipe_read_packet(buf, (volatile void*)&rusb->D0FIFO, len);
+      pipe_read_packet(rusb, buf, (volatile void*)&rusb->D0FIFO, len);
       pipe->buf = (uint8_t*)buf + len;
     }
   }
@@ -733,10 +724,6 @@ void dcd_init(uint8_t rhport)
     // rusb2->BUSWAIT |= 0x0F00U;
 
     rusb->PHYSET_b.REPSEL = 1;
-
-    rusb->CFIFOSEL_b.MBW = 1;
-    rusb->D0FIFOSEL_b.MBW = 1;
-    rusb->D1FIFOSEL_b.MBW = 1;
   } else
 #endif
   {
diff --git a/src/portable/renesas/rusb2/rusb2_type.h b/src/portable/renesas/rusb2/rusb2_type.h
index 7a5e37089..28cec9999 100644
--- a/src/portable/renesas/rusb2/rusb2_type.h
+++ b/src/portable/renesas/rusb2/rusb2_type.h
@@ -1670,6 +1670,7 @@ TU_ATTR_BIT_FIELD_ORDER_END
 #define RUSB2_FIFOSEL_BIGEND            (1U << RUSB2_CFIFOSEL_BIGEND_Pos) /* FIFO Big Endian */
 #define RUSB2_FIFOSEL_MBW_8BIT          (0U << RUSB2_CFIFOSEL_MBW_Pos)    /* 8-bit width */
 #define RUSB2_FIFOSEL_MBW_16BIT         (1U << RUSB2_CFIFOSEL_MBW_Pos)    /* 16-bit width */
+#define RUSB2_FIFOSEL_MBW_32BIT         (2U << RUSB2_CFIFOSEL_MBW_Pos)    /* 32-bit width */
 
 #define RUSB2_INTSTS0_CTSQ_CTRL_RDATA   (1U << RUSB2_INTSTS0_CTSQ_Pos)
 

From 88478a9d052edc364561da39382faef72f937ecb Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 7 Jul 2023 16:24:22 +0700
Subject: [PATCH 494/691] add PORT selection for makefile

---
 hw/bsp/ra/boards/ra6m5_ek/board.mk     |  3 +++
 hw/bsp/ra/family.cmake                 |  2 +-
 hw/bsp/ra/family.mk                    | 12 ++++++++++++
 src/portable/renesas/rusb2/dcd_rusb2.c |  4 ++++
 4 files changed, 20 insertions(+), 1 deletion(-)

diff --git a/hw/bsp/ra/boards/ra6m5_ek/board.mk b/hw/bsp/ra/boards/ra6m5_ek/board.mk
index 567908b63..a5c933764 100644
--- a/hw/bsp/ra/boards/ra6m5_ek/board.mk
+++ b/hw/bsp/ra/boards/ra6m5_ek/board.mk
@@ -4,4 +4,7 @@ MCU_VARIANT = ra6m5
 # For flash-jlink target
 JLINK_DEVICE = R7FA6M5BH
 
+# Port 1 is highspeed
+PORT ?= 1
+
 flash: flash-jlink
diff --git a/hw/bsp/ra/family.cmake b/hw/bsp/ra/family.cmake
index eb2d4958f..f09e86a72 100644
--- a/hw/bsp/ra/family.cmake
+++ b/hw/bsp/ra/family.cmake
@@ -13,7 +13,7 @@ include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 
 set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
-set(FAMILY_MCUS RA CACHE INTERNAL "")
+set(FAMILY_MCUS RAXXX CACHE INTERNAL "")
 
 #------------------------------------
 # BOARD_TARGET
diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk
index b6e1bb0ae..f5097460a 100644
--- a/hw/bsp/ra/family.mk
+++ b/hw/bsp/ra/family.mk
@@ -3,8 +3,12 @@ DEPS_SUBMODULES += hw/mcu/renesas/fsp lib/CMSIS_5
 FSP_RA = hw/mcu/renesas/fsp/ra/fsp
 include $(TOP)/$(BOARD_PATH)/board.mk
 
+# Default to port 0 fullspeed, board with port 1 highspeed should override this in board.mk
+PORT ?= 0
+
 CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_RAXXX \
+  -DBOARD_TUD_RHPORT=$(PORT) \
 	-Wno-error=undef \
 	-Wno-error=strict-prototypes \
 	-Wno-error=cast-align \
@@ -15,6 +19,14 @@ CFLAGS += \
 	-nostartfiles \
 	-ffreestanding
 
+ifeq ($(PORT), 1)
+  CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+  $(info "Using PORT 1 HighSpeed")
+else
+  CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
+  $(info "Using PORT 0 FullSpeed")
+endif
+
 SRC_C += \
 	src/portable/renesas/rusb2/dcd_rusb2.c \
 	src/portable/renesas/rusb2/hcd_rusb2.c \
diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 3d3e52bfa..17d22f696 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -216,6 +216,7 @@ static void pipe_write_packet(rusb2_reg_t * rusb, void *buf, volatile void *fifo
 
   // Highspeed FIFO is 32-bit
   if ( is_highspeed_regbase(rusb) ) {
+    // TODO 32-bit access for better performance
     ff16 = (volatile uint16_t*) ((uintptr_t) fifo+2);
     ff8  = (volatile uint8_t *) ((uintptr_t) fifo+3);
   }else {
@@ -241,6 +242,9 @@ static void pipe_write_packet(rusb2_reg_t * rusb, void *buf, volatile void *fifo
 static void pipe_read_packet(rusb2_reg_t * rusb, void *buf, volatile void *fifo, unsigned len)
 {
   (void) rusb;
+
+  // TODO 16/32-bit access for better performance
+
   uint8_t *p = (uint8_t*)buf;
   volatile uint8_t *reg = (volatile uint8_t*)fifo;  /* byte access is always at base register address */
   while (len--) *p++ = *reg;

From f7e7ba92ca7850c3c098fc988bf187a8b12a322a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 7 Jul 2023 16:27:12 +0700
Subject: [PATCH 495/691] enable host example for ra

---
 .idea/cmake.xml                          | 1 +
 examples/host/bare_api/only.txt          | 1 +
 examples/host/cdc_msc_hid/only.txt       | 1 +
 examples/host/hid_controller/only.txt    | 1 +
 examples/host/msc_file_explorer/only.txt | 1 +
 5 files changed, 5 insertions(+)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 47ca8253e..864ff615b 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -46,6 +46,7 @@
       <configuration PROFILE_NAME="ra4m1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra4m1_ek -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="ra6m1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m1_ek -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="ra6m5" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="ra6m5 PORT0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1 -DPORT=0" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/examples/host/bare_api/only.txt b/examples/host/bare_api/only.txt
index 45da6c3f2..f8aa2186f 100644
--- a/examples/host/bare_api/only.txt
+++ b/examples/host/bare_api/only.txt
@@ -9,3 +9,4 @@ mcu:MIMXRT11XX
 mcu:RP2040
 mcu:MSP432E4
 mcu:RX65X
+mcu:RAXXX
diff --git a/examples/host/cdc_msc_hid/only.txt b/examples/host/cdc_msc_hid/only.txt
index 45da6c3f2..f8aa2186f 100644
--- a/examples/host/cdc_msc_hid/only.txt
+++ b/examples/host/cdc_msc_hid/only.txt
@@ -9,3 +9,4 @@ mcu:MIMXRT11XX
 mcu:RP2040
 mcu:MSP432E4
 mcu:RX65X
+mcu:RAXXX
diff --git a/examples/host/hid_controller/only.txt b/examples/host/hid_controller/only.txt
index 45da6c3f2..f8aa2186f 100644
--- a/examples/host/hid_controller/only.txt
+++ b/examples/host/hid_controller/only.txt
@@ -9,3 +9,4 @@ mcu:MIMXRT11XX
 mcu:RP2040
 mcu:MSP432E4
 mcu:RX65X
+mcu:RAXXX
diff --git a/examples/host/msc_file_explorer/only.txt b/examples/host/msc_file_explorer/only.txt
index 45da6c3f2..f8aa2186f 100644
--- a/examples/host/msc_file_explorer/only.txt
+++ b/examples/host/msc_file_explorer/only.txt
@@ -9,3 +9,4 @@ mcu:MIMXRT11XX
 mcu:RP2040
 mcu:MSP432E4
 mcu:RX65X
+mcu:RAXXX

From 0f53e746ffa21b6186809b2b896ddc74d38e9058 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 7 Jul 2023 18:41:16 +0700
Subject: [PATCH 496/691] move check highspeed to rusb_ra

---
 src/portable/renesas/rusb2/dcd_rusb2.c  | 31 ++++---------------------
 src/portable/renesas/rusb2/rusb2_ra.h   | 15 ++++++++----
 src/portable/renesas/rusb2/rusb2_rx.h   |  9 +++++++
 src/portable/renesas/rusb2/rusb2_type.h | 14 +++++++++++
 4 files changed, 39 insertions(+), 30 deletions(-)

diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 17d22f696..358e5644b 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -61,19 +61,6 @@
 TU_ATTR_PACKED_BEGIN
 TU_ATTR_BIT_FIELD_ORDER_BEGIN
 
-typedef struct TU_ATTR_PACKED _ccrx_evenaccess {
-  union {
-    struct {
-      uint16_t      : 8;
-      uint16_t TRCLR: 1;
-      uint16_t TRENB: 1;
-      uint16_t      : 0;
-    };
-    uint16_t TRE;
-  };
-  uint16_t TRN;
-} reg_pipetre_t;
-
 typedef struct TU_ATTR_PACKED
 {
   void      *buf;      /* the start address of a transfer data buffer */
@@ -114,14 +101,6 @@ static dcd_data_t _dcd;
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
 
-#ifdef RUSB2_SUPPORT_HIGHSPEED
-  #define is_highspeed_usbip(_p)     (_p == 1)
-  #define is_highspeed_regbase(_reg) (_reg == RUSB2_REG(1))
-#else
-  #define is_highspeed_usbip(_p)     (false)
-  #define is_highspeed_regbase(_reg) (false)
-#endif
-
 static unsigned find_pipe(unsigned xfer)
 {
   switch (xfer) {
@@ -215,7 +194,7 @@ static void pipe_write_packet(rusb2_reg_t * rusb, void *buf, volatile void *fifo
   volatile uint8_t *ff8;
 
   // Highspeed FIFO is 32-bit
-  if ( is_highspeed_regbase(rusb) ) {
+  if ( rusb2_is_highspeed_reg(rusb) ) {
     // TODO 32-bit access for better performance
     ff16 = (volatile uint16_t*) ((uintptr_t) fifo+2);
     ff8  = (volatile uint8_t *) ((uintptr_t) fifo+3);
@@ -706,7 +685,7 @@ void dcd_init(uint8_t rhport)
   rusb2_module_start(rhport, true);
 
 #ifdef RUSB2_SUPPORT_HIGHSPEED
-  if ( is_highspeed_usbip(rhport) ) {
+  if ( rusb2_is_highspeed_rhport(rhport) ) {
     rusb->SYSCFG_b.HSE = 1;
 
     // leave CLKSEL as default (0x11) 24Mhz
@@ -787,7 +766,7 @@ void dcd_connect(uint8_t rhport)
 {
   rusb2_reg_t* rusb = RUSB2_REG(rhport);
 
-  if ( is_highspeed_usbip(rhport)) {
+  if ( rusb2_is_highspeed_rhport(rhport)) {
     rusb->SYSCFG_b.CNEN = 1;
   }
   rusb->SYSCFG_b.DPRPU = 1;
@@ -824,7 +803,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
 
   if (xfer == TUSB_XFER_ISOCHRONOUS) {
     // Fullspeed ISO is limit to 256 bytes
-    if ( !is_highspeed_usbip(rhport) && mps > 256) {
+    if ( !rusb2_is_highspeed_rhport(rhport) && mps > 256) {
       return false;
     }
   }
@@ -838,7 +817,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   /* setup pipe */
   dcd_int_disable(rhport);
 
-  if ( is_highspeed_usbip(rhport) ) {
+  if ( rusb2_is_highspeed_rhport(rhport) ) {
     // FIXME shouldn't be after pipe selection and config, also the BUFNMB should be changed
     // depending on the allocation scheme
     rusb->PIPEBUF = 0x7C08;
diff --git a/src/portable/renesas/rusb2/rusb2_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h
index e04a99685..28b690512 100644
--- a/src/portable/renesas/rusb2/rusb2_ra.h
+++ b/src/portable/renesas/rusb2/rusb2_ra.h
@@ -47,15 +47,15 @@ extern "C" {
 #pragma GCC diagnostic pop
 #endif
 
-//--------------------------------------------------------------------+
-//
-//--------------------------------------------------------------------+
-
 // IAR does not have __builtin_ctz
 #if defined(__ICCARM__)
   #define __builtin_ctz(x)   __iar_builtin_CLZ(__iar_builtin_RBIT(x))
 #endif
 
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
 typedef struct {
   uint32_t reg_base;
   int32_t irqnum;
@@ -78,6 +78,13 @@ static rusb2_controller_t rusb2_controller[] = {
 
 #define RUSB2_REG(_p)      ((rusb2_reg_t*) rusb2_controller[_p].reg_base)
 
+#define rusb2_is_highspeed_rhport(_p)  (_p == 1)
+#define rusb2_is_highspeed_reg(_reg)   (_reg == RUSB2_REG(1))
+
+//--------------------------------------------------------------------+
+// RUSB2 API
+//--------------------------------------------------------------------+
+
 TU_ATTR_ALWAYS_INLINE static inline void rusb2_module_start(uint8_t rhport, bool start) {
   uint32_t const mask = 1U << (11+rhport);
   if (start) {
diff --git a/src/portable/renesas/rusb2/rusb2_rx.h b/src/portable/renesas/rusb2/rusb2_rx.h
index 17b9a918c..7bf4be47e 100644
--- a/src/portable/renesas/rusb2/rusb2_rx.h
+++ b/src/portable/renesas/rusb2/rusb2_rx.h
@@ -42,6 +42,15 @@ TU_ATTR_ALWAYS_INLINE static inline rusb2_reg_t* RUSB2_REG(uint8_t rhport) {
   return (rusb2_reg_t *) RUSB2_REG_BASE;
 }
 
+
+#define rusb2_is_highspeed_rhport(_p)  (false)
+#define rusb2_is_highspeed_reg(_reg)   (false)
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+
 // Start/Stop MSTP TODO implement later
 TU_ATTR_ALWAYS_INLINE static inline void rusb2_module_start(uint8_t rhport, bool start) {
   (void) rhport;
diff --git a/src/portable/renesas/rusb2/rusb2_type.h b/src/portable/renesas/rusb2/rusb2_type.h
index 28cec9999..aceeb3c3e 100644
--- a/src/portable/renesas/rusb2/rusb2_type.h
+++ b/src/portable/renesas/rusb2/rusb2_type.h
@@ -48,6 +48,20 @@ extern "C" {
 TU_ATTR_PACKED_BEGIN
 TU_ATTR_BIT_FIELD_ORDER_BEGIN
 
+// TODO same as RUSB2_PIPE_TR_t
+typedef struct TU_ATTR_PACKED _ccrx_evenaccess {
+  union {
+    struct {
+      uint16_t      : 8;
+      uint16_t TRCLR: 1;
+      uint16_t TRENB: 1;
+      uint16_t      : 0;
+    };
+    uint16_t TRE;
+  };
+  uint16_t TRN;
+} reg_pipetre_t;
+
 typedef struct {
   union {
     volatile uint16_t E; /* (@ 0x00000000) Pipe Transaction Counter Enable Register */

From 4b59cb9a2003aae67f607c441d1b9e8428ffe237 Mon Sep 17 00:00:00 2001
From: Szymon Janc <szymon.janc@codecoup.pl>
Date: Mon, 10 Jul 2023 12:12:26 +0200
Subject: [PATCH 497/691] Fix documentation symlinks

There were typos in symlinks target names resulting in following
warrning on checkout (at least in Mynewt newt tool):
* Warning: stat mynewt/repos/tinyusb/docs/contributing/code_of_conduct.rst: no such file or directory
* Warning: stat mynewt/repos/tinyusb/docs/info/contributors.rst: no such file or directory
---
 docs/contributing/code_of_conduct.rst | 2 +-
 docs/info/contributors.rst            | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/docs/contributing/code_of_conduct.rst b/docs/contributing/code_of_conduct.rst
index 82627099f..b52bf14c5 120000
--- a/docs/contributing/code_of_conduct.rst
+++ b/docs/contributing/code_of_conduct.rst
@@ -1 +1 @@
-../../CODE_OF_CONDUCT.rst
+../../CODE_OF_CONDUCT.rst
\ No newline at end of file
diff --git a/docs/info/contributors.rst b/docs/info/contributors.rst
index 02608919f..b3748ccb5 120000
--- a/docs/info/contributors.rst
+++ b/docs/info/contributors.rst
@@ -1 +1 @@
-../../CONTRIBUTORS.rst
+../../CONTRIBUTORS.rst
\ No newline at end of file

From eb298e2b81762ab2ead484dd021179d09e0335c9 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 14 Jul 2023 12:34:43 +0700
Subject: [PATCH 498/691] add clock_config.c for imxrt generated by mcuxpresso
 config

---
 .idea/runConfigurations/mcx947.xml            |    2 +-
 .idea/runConfigurations/rt1010.xml            |    4 +-
 .../boards/metro_m7_1011/board/clock_config.c |  340 ++++++
 .../boards/metro_m7_1011/board/clock_config.h |   97 ++
 .../boards/metro_m7_1011/metro_m7_1011.mex    |  692 ++++++++++++
 .../mimxrt1010_evk/board/clock_config.c       |  351 ++++++
 .../mimxrt1010_evk/board/clock_config.h       |   97 ++
 .../boards/mimxrt1010_evk/mimxrt1010_evk.mex  |  692 ++++++++++++
 .../mimxrt1015_evk/board/clock_config.c       |  357 ++++++
 .../mimxrt1015_evk/board/clock_config.h       |  100 ++
 .../boards/mimxrt1015_evk/mimxrt1015_evk.mex  |  576 ++++++++++
 .../imxrt/boards/mimxrt1020_evk/board.cmake   |    2 +-
 hw/bsp/imxrt/boards/mimxrt1020_evk/board.mk   |    2 +-
 .../mimxrt1020_evk/board/clock_config.c       |  421 +++++++
 .../mimxrt1020_evk/board/clock_config.h       |  108 ++
 .../boards/mimxrt1020_evk/mimxrt1020_evk.mex  |  597 ++++++++++
 .../imxrt/boards/mimxrt1024_evk/board.cmake   |    2 +-
 hw/bsp/imxrt/boards/mimxrt1024_evk/board.mk   |    2 +-
 .../mimxrt1024_evk/board/clock_config.c       |  421 +++++++
 .../mimxrt1024_evk/board/clock_config.h       |  108 ++
 .../boards/mimxrt1024_evk/mimxrt1024_evk.mex  |  503 +++++++++
 hw/bsp/imxrt/boards/mimxrt1050_evkb/board.mk  |    2 +
 .../mimxrt1050_evkb/board/clock_config.c      |  495 ++++++++
 .../mimxrt1050_evkb/board/clock_config.h      |  119 ++
 .../mimxrt1050_evkb/mimxrt1050_evkb.mex       | 1001 ++++++++++++++++
 .../mimxrt1060_evk/board/clock_config.c       |  509 +++++++++
 .../mimxrt1060_evk/board/clock_config.h       |  123 ++
 .../boards/mimxrt1060_evk/mimxrt1060_evk.mex  | 1001 ++++++++++++++++
 .../mimxrt1064_evk/board/clock_config.c       |  511 +++++++++
 .../mimxrt1064_evk/board/clock_config.h       |  123 ++
 .../boards/mimxrt1064_evk/mimxrt1064_evk.mex  | 1006 +++++++++++++++++
 .../boards/teensy_40/board/clock_config.c     |  509 +++++++++
 .../boards/teensy_40/board/clock_config.h     |  123 ++
 hw/bsp/imxrt/boards/teensy_40/teensy40.mex    | 1001 ++++++++++++++++
 .../boards/teensy_41/board/clock_config.c     |  509 +++++++++
 .../boards/teensy_41/board/clock_config.h     |  123 ++
 hw/bsp/imxrt/boards/teensy_41/teensy41.mex    | 1001 ++++++++++++++++
 .../debug.jlinkscript}                        |    0
 hw/bsp/imxrt/family.c                         |    9 +-
 hw/bsp/imxrt/family.cmake                     |    9 +-
 hw/bsp/mcx/debug.jlinkscript                  |    5 +
 41 files changed, 13638 insertions(+), 15 deletions(-)
 create mode 100644 hw/bsp/imxrt/boards/metro_m7_1011/board/clock_config.c
 create mode 100644 hw/bsp/imxrt/boards/metro_m7_1011/board/clock_config.h
 create mode 100644 hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.mex
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1010_evk/board/clock_config.c
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1010_evk/board/clock_config.h
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1010_evk/mimxrt1010_evk.mex
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1015_evk/board/clock_config.c
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1015_evk/board/clock_config.h
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1015_evk/mimxrt1015_evk.mex
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1020_evk/board/clock_config.c
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1020_evk/board/clock_config.h
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1020_evk/mimxrt1020_evk.mex
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1024_evk/board/clock_config.c
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1024_evk/board/clock_config.h
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1024_evk/mimxrt1024_evk.mex
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1050_evkb/board/clock_config.c
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1050_evkb/board/clock_config.h
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1050_evkb/mimxrt1050_evkb.mex
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1060_evk/board/clock_config.c
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1060_evk/board/clock_config.h
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1060_evk/mimxrt1060_evk.mex
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1064_evk/board/clock_config.c
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1064_evk/board/clock_config.h
 create mode 100644 hw/bsp/imxrt/boards/mimxrt1064_evk/mimxrt1064_evk.mex
 create mode 100644 hw/bsp/imxrt/boards/teensy_40/board/clock_config.c
 create mode 100644 hw/bsp/imxrt/boards/teensy_40/board/clock_config.h
 create mode 100644 hw/bsp/imxrt/boards/teensy_40/teensy40.mex
 create mode 100644 hw/bsp/imxrt/boards/teensy_41/board/clock_config.c
 create mode 100644 hw/bsp/imxrt/boards/teensy_41/board/clock_config.h
 create mode 100644 hw/bsp/imxrt/boards/teensy_41/teensy41.mex
 rename hw/bsp/{mcx/mcx.jlinkscript => imxrt/debug.jlinkscript} (100%)
 create mode 100644 hw/bsp/mcx/debug.jlinkscript

diff --git a/.idea/runConfigurations/mcx947.xml b/.idea/runConfigurations/mcx947.xml
index 038c87421..0e7e2befc 100644
--- a/.idea/runConfigurations/mcx947.xml
+++ b/.idea/runConfigurations/mcx947.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="mcx947" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MCXN947_M33_0&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/mcx/mcx.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="pca10056" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="mcx947" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MCXN947_M33_0&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/mcx/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="metro m7" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/rt1010.xml b/.idea/runConfigurations/rt1010.xml
index 6fabd8561..a39f1f684 100644
--- a/.idea/runConfigurations/rt1010.xml
+++ b/.idea/runConfigurations/rt1010.xml
@@ -1,6 +1,6 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rt1010" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1011xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="pca10056" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
-    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+  <configuration default="false" name="rt1010" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1011xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/imxrt/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="metro m7" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
     <method v="2">
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011/board/clock_config.c b/hw/bsp/imxrt/boards/metro_m7_1011/board/clock_config.c
new file mode 100644
index 000000000..1b28b668a
--- /dev/null
+++ b/hw/bsp/imxrt/boards/metro_m7_1011/board/clock_config.c
@@ -0,0 +1,340 @@
+/*
+ * How to setup clock using clock driver functions:
+ *
+ * 1. Call CLOCK_InitXXXPLL() to configure corresponding PLL clock.
+ *
+ * 2. Call CLOCK_InitXXXpfd() to configure corresponding PLL pfd clock.
+ *
+ * 3. Call CLOCK_SetMux() to configure corresponding clock source for target clock out.
+ *
+ * 4. Call CLOCK_SetDiv() to configure corresponding clock divider for target clock out.
+ *
+ * 5. Call CLOCK_SetXtalFreq() to set XTAL frequency based on board settings.
+ *
+ */
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v11.0
+processor: MIMXRT1011xxxxx
+package_id: MIMXRT1011DAE5A
+mcu_data: ksdk2_0
+processor_version: 13.0.2
+board: MIMXRT1010-EVK
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+#include "clock_config.h"
+#include "fsl_iomuxc.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockRUN();
+}
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockRUN
+called_from_default_init: true
+outputs:
+- {id: ADC_ALT_CLK.outFreq, value: 40 MHz}
+- {id: CKIL_SYNC_CLK_ROOT.outFreq, value: 32.768 kHz}
+- {id: CLK_1M.outFreq, value: 1 MHz}
+- {id: CLK_24M.outFreq, value: 24 MHz}
+- {id: CORE_CLK_ROOT.outFreq, value: 500 MHz}
+- {id: ENET_500M_REF_CLK.outFreq, value: 500 MHz}
+- {id: FLEXIO1_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: FLEXSPI_CLK_ROOT.outFreq, value: 132 MHz}
+- {id: GPT1_ipg_clk_highfreq.outFreq, value: 62.5 MHz}
+- {id: GPT2_ipg_clk_highfreq.outFreq, value: 62.5 MHz}
+- {id: IPG_CLK_ROOT.outFreq, value: 125 MHz}
+- {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz}
+- {id: LPSPI_CLK_ROOT.outFreq, value: 105.6 MHz}
+- {id: MQS_MCLK.outFreq, value: 1080/17 MHz}
+- {id: PERCLK_CLK_ROOT.outFreq, value: 62.5 MHz}
+- {id: SAI1_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK2.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK3.outFreq, value: 30 MHz}
+- {id: SAI3_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK3.outFreq, value: 30 MHz}
+- {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: TRACE_CLK_ROOT.outFreq, value: 132 MHz}
+- {id: UART_CLK_ROOT.outFreq, value: 80 MHz}
+- {id: USBPHY_CLK.outFreq, value: 480 MHz}
+settings:
+- {id: CCM.ADC_ACLK_PODF.scale, value: '12', locked: true}
+- {id: CCM.AHB_PODF.scale, value: '1', locked: true}
+- {id: CCM.FLEXSPI_PODF.scale, value: '4', locked: true}
+- {id: CCM.IPG_PODF.scale, value: '4'}
+- {id: CCM.LPSPI_PODF.scale, value: '5'}
+- {id: CCM.PERCLK_PODF.scale, value: '2', locked: true}
+- {id: CCM.PRE_PERIPH_CLK_SEL.sel, value: CCM_ANALOG.ENET_500M_REF_CLK}
+- {id: CCM.SAI1_CLK_SEL.sel, value: CCM_ANALOG.PLL3_PFD2_CLK}
+- {id: CCM.SAI3_CLK_SEL.sel, value: CCM_ANALOG.PLL3_PFD2_CLK}
+- {id: CCM.TRACE_CLK_SEL.sel, value: CCM_ANALOG.PLL2_MAIN_CLK}
+- {id: CCM_ANALOG.PLL2.denom, value: '1'}
+- {id: CCM_ANALOG.PLL2.num, value: '0'}
+- {id: CCM_ANALOG.PLL2_BYPASS.sel, value: CCM_ANALOG.PLL2_OUT_CLK}
+- {id: CCM_ANALOG.PLL2_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD0}
+- {id: CCM_ANALOG.PLL2_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD1}
+- {id: CCM_ANALOG.PLL2_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD2}
+- {id: CCM_ANALOG.PLL2_PFD2_DIV.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL2_PFD2_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL2_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD3}
+- {id: CCM_ANALOG.PLL2_PFD3_DIV.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL2_PFD3_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_BYPASS.sel, value: CCM_ANALOG.PLL3}
+- {id: CCM_ANALOG.PLL3_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD0}
+- {id: CCM_ANALOG.PLL3_PFD0_DIV.scale, value: '22', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD0_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD1}
+- {id: CCM_ANALOG.PLL3_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD2}
+- {id: CCM_ANALOG.PLL3_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD3}
+- {id: CCM_ANALOG.PLL3_PFD3_DIV.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD3_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL6_BYPASS.sel, value: CCM_ANALOG.PLL6}
+- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB1_POWER_CFG, value: 'Yes'}
+sources:
+- {id: XTALOSC24M.RTC_OSC.outFreq, value: 32.768 kHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 1,                         /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
+        .numerator = 0,                           /* 30 bit numerator of fractional loop divider */
+        .denominator = 1,                         /* 30 bit denominator of fractional loop divider */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 0,                         /* PLL loop divider, Fout = Fin * 20 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN =
+    {
+        .enableClkOutput500M = true,              /* Enable the PLL providing the ENET 500MHz reference clock */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+/*******************************************************************************
+ * Code for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+void BOARD_BootClockRUN(void)
+{
+    /* Init RTC OSC clock frequency. */
+    CLOCK_SetRtcXtalFreq(32768U);
+    /* Enable 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK;
+    /* Use free 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK;
+    /* Set XTAL 24MHz clock frequency. */
+    CLOCK_SetXtalFreq(24000000U);
+    /* Enable XTAL 24MHz clock source. */
+    CLOCK_InitExternalClk(0);
+    /* Enable internal RC. */
+    CLOCK_InitRcOsc24M();
+    /* Switch clock source to external OSC. */
+    CLOCK_SwitchOsc(kCLOCK_XtalOsc);
+    /* Set Oscillator ready counter value. */
+    CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127);
+    /* Setting the VDD_SOC to 1.25V. It is necessary to config CORE to 500Mhz. */
+    DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x12);
+    /* Waiting for DCDC_STS_DC_OK bit is asserted */
+    while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0))
+    {
+    }
+    /* Disable IPG clock gate. */
+    CLOCK_DisableClock(kCLOCK_Adc1);
+    CLOCK_DisableClock(kCLOCK_Xbar1);
+    /* Set IPG_PODF. */
+    CLOCK_SetDiv(kCLOCK_IpgDiv, 3);
+    /* Init Enet PLL. */
+    CLOCK_InitEnetPll(&enetPllConfig_BOARD_BootClockRUN);
+    /* Disable PERCLK clock gate. */
+    CLOCK_DisableClock(kCLOCK_Gpt1);
+    CLOCK_DisableClock(kCLOCK_Gpt1S);
+    CLOCK_DisableClock(kCLOCK_Gpt2);
+    CLOCK_DisableClock(kCLOCK_Gpt2S);
+    CLOCK_DisableClock(kCLOCK_Pit);
+    /* Set PERCLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_PerclkDiv, 1);
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Disable Flexspi clock gate. */
+    CLOCK_DisableClock(kCLOCK_FlexSpi);
+    /* Set FLEXSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_FlexspiDiv, 3);
+    /* Set Flexspi clock source. */
+    CLOCK_SetMux(kCLOCK_FlexspiMux, 0);
+    CLOCK_SetMux(kCLOCK_FlexspiSrcMux, 0);
+#endif
+    /* Disable ADC_ACLK_EN clock gate. */
+    CCM->CSCMR2 &= ~CCM_CSCMR2_ADC_ACLK_EN_MASK;
+    /* Set ADC_ACLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_AdcDiv, 11);
+    /* Disable LPSPI clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpspi1);
+    CLOCK_DisableClock(kCLOCK_Lpspi2);
+    /* Set LPSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_LpspiDiv, 4);
+    /* Set Lpspi clock source. */
+    CLOCK_SetMux(kCLOCK_LpspiMux, 2);
+    /* Disable TRACE clock gate. */
+    CLOCK_DisableClock(kCLOCK_Trace);
+    /* Set TRACE_PODF. */
+    CLOCK_SetDiv(kCLOCK_TraceDiv, 3);
+    /* Set Trace clock source. */
+    CLOCK_SetMux(kCLOCK_TraceMux, 0);
+    /* Disable SAI1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai1);
+    /* Set SAI1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3);
+    /* Set SAI1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai1Div, 1);
+    /* Set Sai1 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai1Mux, 0);
+    /* Disable SAI3 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai3);
+    /* Set SAI3_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3);
+    /* Set SAI3_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai3Div, 1);
+    /* Set Sai3 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai3Mux, 0);
+    /* Disable Lpi2c clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpi2c1);
+    CLOCK_DisableClock(kCLOCK_Lpi2c2);
+    /* Set LPI2C_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0);
+    /* Set Lpi2c clock source. */
+    CLOCK_SetMux(kCLOCK_Lpi2cMux, 0);
+    /* Disable UART clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpuart1);
+    CLOCK_DisableClock(kCLOCK_Lpuart2);
+    CLOCK_DisableClock(kCLOCK_Lpuart3);
+    CLOCK_DisableClock(kCLOCK_Lpuart4);
+    /* Set UART_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+    /* Set Uart clock source. */
+    CLOCK_SetMux(kCLOCK_UartMux, 0);
+    /* Disable SPDIF clock gate. */
+    CLOCK_DisableClock(kCLOCK_Spdif);
+    /* Set SPDIF0_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1);
+    /* Set SPDIF0_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Spdif0Div, 7);
+    /* Set Spdif clock source. */
+    CLOCK_SetMux(kCLOCK_SpdifMux, 3);
+    /* Disable Flexio1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Flexio1);
+    /* Set FLEXIO1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1);
+    /* Set FLEXIO1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexio1Div, 7);
+    /* Set Flexio1 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexio1Mux, 3);
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Init Usb1 PLL. */
+    CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
+    /* Init Usb1 pfd0. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 22);
+    /* Init Usb1 pfd1. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
+    /* Init Usb1 pfd2. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
+    /* Init Usb1 pfd3. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 18);
+#endif
+    /* Set periph clock source to use the USB1 PLL output (PLL3_SW_CLK) temporarily. */
+    /* Set Pll3 SW clock source to use the USB1 PLL output. */
+    CLOCK_SetMux(kCLOCK_Pll3SwMux, 0);
+    /* Set safe value of the AHB_PODF. */
+    CLOCK_SetDiv(kCLOCK_AhbDiv, 1);
+    /* Set periph clock2 clock source to use the PLL3_SW_CLK. */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
+    /* Set peripheral clock source (glitchless mux) to select the temporary core clock. */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 1);
+    /* Set per clock source. */
+    CLOCK_SetMux(kCLOCK_PerclkMux, 0);
+    /* Init System PLL. */
+    CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
+    /* Init System pfd0. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
+    /* Init System pfd1. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
+    /* Init System pfd2. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd2, 18);
+    /* Init System pfd3. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd3, 18);
+    /* DeInit Audio PLL. */
+    CLOCK_DeinitAudioPll();
+    /* Bypass Audio PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1);
+    /* Set divider for Audio PLL. */
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK;
+    /* Enable Audio PLL output. */
+    CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK;
+    /* Set preperiph clock source. */
+    CLOCK_SetMux(kCLOCK_PrePeriphMux, 3);
+    /* Set periph clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 0);
+    /* Set periph clock2 clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
+    /* Set AHB_PODF. */
+    CLOCK_SetDiv(kCLOCK_AhbDiv, 0);
+    /* Set clock out1 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0);
+    /* Set clock out1 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1);
+    /* Set clock out2 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0);
+    /* Set clock out2 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(18);
+    /* Set clock out1 drives clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK;
+    /* Disable clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK;
+    /* Disable clock out2. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK;
+    /* Set SAI1 MCLK1 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0);
+    /* Set SAI1 MCLK2 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0);
+    /* Set SAI1 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0);
+    /* Set SAI3 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0);
+    /* Set MQS configuration. */
+    IOMUXC_MQSConfig(IOMUXC_GPR,kIOMUXC_MqsPwmOverSampleRate32, 0);
+    /* Set GPT1 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK;
+    /* Set GPT2 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK;
+    /* Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
+}
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011/board/clock_config.h b/hw/bsp/imxrt/boards/metro_m7_1011/board/clock_config.h
new file mode 100644
index 000000000..119fd94bd
--- /dev/null
+++ b/hw/bsp/imxrt/boards/metro_m7_1011/board/clock_config.h
@@ -0,0 +1,97 @@
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define BOARD_XTAL0_CLK_HZ                         24000000U  /*!< Board xtal0 frequency in Hz */
+
+#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32k frequency in Hz */
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKRUN_CORE_CLOCK             500000000U  /*!< Core clock frequency: 500000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKRUN_ADC_ALT_CLK                40000000UL
+#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT         32768UL
+#define BOARD_BOOTCLOCKRUN_CLKO1_CLK                  0UL
+#define BOARD_BOOTCLOCKRUN_CLKO2_CLK                  0UL
+#define BOARD_BOOTCLOCKRUN_CLK_1M                     1000000UL
+#define BOARD_BOOTCLOCKRUN_CLK_24M                    24000000UL
+#define BOARD_BOOTCLOCKRUN_CORE_CLK_ROOT              500000000UL
+#define BOARD_BOOTCLOCKRUN_ENET_500M_REF_CLK          500000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT           30000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT           132000000UL
+#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ      62500000UL
+#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ      62500000UL
+#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT               125000000UL
+#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT             60000000UL
+#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT             105600000UL
+#define BOARD_BOOTCLOCKRUN_MQS_MCLK                   63529411UL
+#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT            62500000UL
+#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2                 0UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT            30000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT          0UL
+#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT             132000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT              80000000UL
+#define BOARD_BOOTCLOCKRUN_USBPHY_CLK                 480000000UL
+
+/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
+/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
+ */
+extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
+/*! @brief Enet PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN;
+
+/*******************************************************************************
+ * API for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockRUN(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.mex b/hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.mex
new file mode 100644
index 000000000..606ec2cfc
--- /dev/null
+++ b/hw/bsp/imxrt/boards/metro_m7_1011/metro_m7_1011.mex
@@ -0,0 +1,692 @@
+<?xml version="1.0" encoding= "UTF-8" ?>
+<configuration name="MIMXRT1010-EVK" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_13 http://mcuxpresso.nxp.com/XSD/mex_configuration_13.xsd" uuid="f341eb24-9521-4127-8932-81692aeb76df" version="13" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_13" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+   <common>
+      <processor>MIMXRT1011xxxxx</processor>
+      <package>MIMXRT1011DAE5A</package>
+      <board>MIMXRT1010-EVK</board>
+      <board_revision>A</board_revision>
+      <mcu_data>ksdk2_0</mcu_data>
+      <cores selected="core0">
+         <core name="Cortex-M7F" id="core0" description="M7 core"/>
+      </cores>
+      <description></description>
+   </common>
+   <preferences>
+      <validate_boot_init_only>true</validate_boot_init_only>
+      <generate_extended_information>false</generate_extended_information>
+      <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
+      <update_include_paths>true</update_include_paths>
+      <generate_registers_defines>false</generate_registers_defines>
+   </preferences>
+   <tools>
+      <pins name="Pins" version="13.1" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/pin_mux.c" update_enabled="true"/>
+            <file path="board/pin_mux.h" update_enabled="true"/>
+         </generated_project_files>
+         <pins_profile>
+            <processor_version>13.0.2</processor_version>
+            <external_user_signals>
+               <properties/>
+            </external_user_signals>
+            <power_domains>
+               <power_domain name="NVCC_GPIO" value="3.3"/>
+            </power_domains>
+         </pins_profile>
+         <functions_list>
+            <function name="BOARD_InitPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LPSPI1" description="Peripheral LPSPI1 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="ARM" description="Peripheral ARM is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="LPI2C1" description="Peripheral LPI2C1 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LPSPI1" signal="SDI" pin_num="57" pin_signal="GPIO_AD_03"/>
+                  <pin peripheral="LPSPI1" signal="SDO" pin_num="56" pin_signal="GPIO_AD_04"/>
+                  <pin peripheral="LPSPI1" signal="SCK" pin_num="52" pin_signal="GPIO_AD_06"/>
+                  <pin peripheral="ARM" signal="TRACE, 0" pin_num="60" pin_signal="GPIO_AD_00"/>
+                  <pin peripheral="ARM" signal="TRACE, 1" pin_num="79" pin_signal="GPIO_13"/>
+                  <pin peripheral="ARM" signal="TRACE, 2" pin_num="80" pin_signal="GPIO_12"/>
+                  <pin peripheral="ARM" signal="TRACE, 3" pin_num="1" pin_signal="GPIO_11"/>
+                  <pin peripheral="ARM" signal="arm_trace_clk" pin_num="58" pin_signal="GPIO_AD_02"/>
+                  <pin peripheral="GPIO2" signal="gpio_io, 05" pin_num="70" pin_signal="GPIO_SD_05"/>
+                  <pin peripheral="LPI2C1" signal="SCL" pin_num="11" pin_signal="GPIO_02"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitDEBUG_UARTPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 is not initialized" problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LPUART1" signal="RXD" pin_num="3" pin_signal="GPIO_09"/>
+                  <pin peripheral="LPUART1" signal="TXD" pin_num="2" pin_signal="GPIO_10"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitQSPIPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXSPI" description="Peripheral FLEXSPI is not initialized" problem_level="1" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_SCLK" pin_num="65" pin_signal="GPIO_SD_10"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA0" pin_num="66" pin_signal="GPIO_SD_09"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA1" pin_num="68" pin_signal="GPIO_SD_07"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA2" pin_num="67" pin_signal="GPIO_SD_08"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA3" pin_num="64" pin_signal="GPIO_SD_11"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_SS0_B" pin_num="69" pin_signal="GPIO_SD_06"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitLEDPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.igpio" description="Pins initialization requires the IGPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="GPIO1" signal="gpiomux_io, 11" pin_num="1" pin_signal="GPIO_11">
+                     <pin_features>
+                        <pin_feature name="direction" value="OUTPUT"/>
+                        <pin_feature name="gpio_init_state" value="true"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="open_drain" value="Disable"/>
+                        <pin_feature name="drive_strength" value="R0_4"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitBUTTONPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="GPIO2" description="Peripheral GPIO2 is not initialized" problem_level="1" source="Pins:BOARD_InitBUTTONPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.igpio" description="Pins initialization requires the IGPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="GPIO2" signal="gpio_io, 05" pin_num="70" pin_signal="GPIO_SD_05">
+                     <pin_features>
+                        <pin_feature name="direction" value="INPUT"/>
+                        <pin_feature name="gpio_interrupt" value="kGPIO_NoIntmode"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="open_drain" value="Disable"/>
+                        <pin_feature name="drive_strength" value="R0_4"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitCOMBO_SENSORPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LPI2C1" description="Peripheral LPI2C1 is not initialized" problem_level="1" source="Pins:BOARD_InitCOMBO_SENSORPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitCOMBO_SENSORPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitCOMBO_SENSORPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LPI2C1" signal="SCL" pin_num="11" pin_signal="GPIO_02">
+                     <pin_features>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                        <pin_feature name="software_input_on" value="Enable"/>
+                        <pin_feature name="open_drain" value="Enable"/>
+                        <pin_feature name="drive_strength" value="R0_4"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_22K_Ohm"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LPI2C1" signal="SDA" pin_num="12" pin_signal="GPIO_01">
+                     <pin_features>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                        <pin_feature name="software_input_on" value="Enable"/>
+                        <pin_feature name="open_drain" value="Enable"/>
+                        <pin_feature name="drive_strength" value="R0_4"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_22K_Ohm"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+         </functions_list>
+      </pins>
+      <clocks name="Clocks" version="11.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/clock_config.c" update_enabled="true"/>
+            <file path="board/clock_config.h" update_enabled="true"/>
+         </generated_project_files>
+         <clocks_profile>
+            <processor_version>13.0.2</processor_version>
+         </clocks_profile>
+         <clock_configurations>
+            <clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Clocks initialization requires the IOMUXC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="XTALOSC24M.RTC_OSC.outFreq" value="32.768 kHz" locked="false" enabled="true"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="ADC_ALT_CLK.outFreq" value="40 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CKIL_SYNC_CLK_ROOT.outFreq" value="32.768 kHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_1M.outFreq" value="1 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_24M.outFreq" value="24 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CORE_CLK_ROOT.outFreq" value="500 MHz" locked="false" accuracy=""/>
+                  <clock_output id="ENET_500M_REF_CLK.outFreq" value="500 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXIO1_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXSPI_CLK_ROOT.outFreq" value="132 MHz" locked="false" accuracy=""/>
+                  <clock_output id="GPT1_ipg_clk_highfreq.outFreq" value="62.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="GPT2_ipg_clk_highfreq.outFreq" value="62.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="IPG_CLK_ROOT.outFreq" value="125 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LPI2C_CLK_ROOT.outFreq" value="60 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LPSPI_CLK_ROOT.outFreq" value="105.6 MHz" locked="false" accuracy=""/>
+                  <clock_output id="MQS_MCLK.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="PERCLK_CLK_ROOT.outFreq" value="62.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK2.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SPDIF0_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="TRACE_CLK_ROOT.outFreq" value="132 MHz" locked="false" accuracy=""/>
+                  <clock_output id="UART_CLK_ROOT.outFreq" value="80 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USBPHY_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="CCM.ADC_ACLK_PODF.scale" value="12" locked="true"/>
+                  <setting id="CCM.AHB_PODF.scale" value="1" locked="true"/>
+                  <setting id="CCM.FLEXSPI_PODF.scale" value="4" locked="true"/>
+                  <setting id="CCM.IPG_PODF.scale" value="4" locked="false"/>
+                  <setting id="CCM.LPSPI_PODF.scale" value="5" locked="false"/>
+                  <setting id="CCM.PERCLK_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.PRE_PERIPH_CLK_SEL.sel" value="CCM_ANALOG.ENET_500M_REF_CLK" locked="false"/>
+                  <setting id="CCM.SAI1_CLK_SEL.sel" value="CCM_ANALOG.PLL3_PFD2_CLK" locked="false"/>
+                  <setting id="CCM.SAI3_CLK_SEL.sel" value="CCM_ANALOG.PLL3_PFD2_CLK" locked="false"/>
+                  <setting id="CCM.TRACE_CLK_SEL.sel" value="CCM_ANALOG.PLL2_MAIN_CLK" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2.denom" value="1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2.num" value="0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_BYPASS.sel" value="CCM_ANALOG.PLL2_OUT_CLK" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD2_DIV.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD2_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD3_DIV.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD3_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_BYPASS.sel" value="CCM_ANALOG.PLL3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_DIV.scale" value="22" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD3_DIV.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD3_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL6_BYPASS.sel" value="CCM_ANALOG.PLL6" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_POWER_CFG" value="Yes" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>true</called_from_default_init>
+            </clock_configuration>
+         </clock_configurations>
+      </clocks>
+      <dcdx name="DCDx" version="2.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <dcdx_profile>
+            <processor_version>0.0.0</processor_version>
+         </dcdx_profile>
+         <dcdx_configurations/>
+      </dcdx>
+      <periphs name="Peripherals" version="12.0" enabled="true" update_project_code="true">
+         <dependencies>
+            <dependency resourceType="SWComponent" resourceId="platform.drivers.lpuart" description="LPUART Driver not found in the toolchain/IDE project. Project will not compile!" problem_level="2" source="Peripherals">
+               <feature name="enabled" evaluation="equal">
+                  <data type="Boolean">true</data>
+               </feature>
+            </dependency>
+            <dependency resourceType="SWComponent" resourceId="platform.drivers.lpuart" description="Unsupported version of the LPUART Driver in the toolchain/IDE project. Required: ${required_value}, actual: ${actual_value}. Project might not compile correctly." problem_level="1" source="Peripherals">
+               <feature name="version" evaluation="equivalent">
+                  <data type="Version">2.5.1</data>
+               </feature>
+            </dependency>
+            <dependency resourceType="SWComponent" resourceId="platform.drivers.igpio" description="igpio not found in the toolchain/IDE project. Project will not compile!" problem_level="2" source="Peripherals">
+               <feature name="enabled" evaluation="equal">
+                  <data type="Boolean">true</data>
+               </feature>
+            </dependency>
+            <dependency resourceType="SWComponent" resourceId="platform.drivers.igpio" description="Unsupported version of the igpio in the toolchain/IDE project. Required: ${required_value}, actual: ${actual_value}. Project might not compile correctly." problem_level="1" source="Peripherals">
+               <feature name="version" evaluation="equivalent">
+                  <data type="Version">2.0.1</data>
+               </feature>
+            </dependency>
+            <dependency resourceType="SWComponent" resourceId="platform.drivers.lpspi" description="LPSPI Driver not found in the toolchain/IDE project. Project will not compile!" problem_level="2" source="Peripherals">
+               <feature name="enabled" evaluation="equal">
+                  <data type="Boolean">true</data>
+               </feature>
+            </dependency>
+            <dependency resourceType="SWComponent" resourceId="platform.drivers.lpspi" description="Unsupported version of the LPSPI Driver in the toolchain/IDE project. Required: ${required_value}, actual: ${actual_value}. Project might not compile correctly." problem_level="1" source="Peripherals">
+               <feature name="version" evaluation="greaterOrEqual">
+                  <data type="Version">2.0.3</data>
+               </feature>
+            </dependency>
+         </dependencies>
+         <generated_project_files>
+            <file path="board/peripherals.c" update_enabled="true"/>
+            <file path="board/peripherals.h" update_enabled="true"/>
+         </generated_project_files>
+         <peripherals_profile>
+            <processor_version>13.0.2</processor_version>
+         </peripherals_profile>
+         <functional_groups>
+            <functional_group name="BOARD_InitPeripherals" uuid="5e519eed-bd94-4950-84de-0f29de85bcea" called_from_default_init="true" id_prefix="" core="core0">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="ClockOutput" resourceId="UART_CLK_ROOT" description="UART_CLK_ROOT is inactive." problem_level="2" source="Peripherals:BOARD_InitPeripherals">
+                     <feature name="frequency" evaluation="greaterThan">
+                        <data type="Frequency" unit="Hz">0</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="LPUART1.uart_tx" description="Signal TX is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
+                     <feature name="routed" evaluation="equal">
+                        <data type="Boolean">true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="LPUART1.uart_rx" description="Signal RX is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
+                     <feature name="routed" evaluation="equal">
+                        <data type="Boolean">true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="LPSPI1.lpspi_sck" description="Signal serial clock is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
+                     <feature name="routed" evaluation="">
+                        <data type="Boolean">true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="LPSPI1.lpspi_sin" description="Signal serial data input is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
+                     <feature name="routed" evaluation="">
+                        <data type="Boolean">true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="LPSPI1.lpspi_sout" description="Signal serial data output is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
+                     <feature name="routed" evaluation="">
+                        <data type="Boolean">true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="ClockOutput" resourceId="LPSPI_CLK_ROOT" description="LPSPI_CLK_ROOT is inactive." problem_level="2" source="Peripherals:BOARD_InitPeripherals">
+                     <feature name="frequency" evaluation="greaterThan">
+                        <data type="Frequency" unit="Hz">0</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <instances>
+                  <instance name="COMBO_SENSOR" uuid="2342e373-ea2e-4bed-8aa4-bd33509155f6" type="lpi2c" type_id="lpi2c_6b71962515c3208facfccd030afebc98" mode="master" peripheral="LPI2C1" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="main" quick_selection="qs_interrupt">
+                        <setting name="clockSource" value="Lpi2cClock"/>
+                        <setting name="clockSourceFreq" value="BOARD_BootClockRUN"/>
+                     </config_set>
+                     <config_set name="interrupt_vector"/>
+                     <config_set name="master" quick_selection="qs_master_transfer">
+                        <setting name="mode" value="transfer"/>
+                        <struct name="config">
+                           <setting name="enableMaster" value="true"/>
+                           <setting name="enableDoze" value="true"/>
+                           <setting name="debugEnable" value="false"/>
+                           <setting name="ignoreAck" value="false"/>
+                           <setting name="pinConfig" value="kLPI2C_2PinOpenDrain"/>
+                           <setting name="baudRate_Hz" value="100000"/>
+                           <setting name="busIdleTimeout_ns" value="0"/>
+                           <setting name="pinLowTimeout_ns" value="0"/>
+                           <setting name="sdaGlitchFilterWidth_ns" value="0"/>
+                           <setting name="sclGlitchFilterWidth_ns" value="0"/>
+                           <struct name="hostRequest">
+                              <setting name="enable" value="false"/>
+                              <setting name="source" value="kLPI2C_HostRequestExternalPin"/>
+                              <setting name="polarity" value="kLPI2C_HostRequestPinActiveHigh"/>
+                           </struct>
+                           <set name="edmaRequestSources">
+                              <selected/>
+                           </set>
+                        </struct>
+                        <struct name="transfer">
+                           <setting name="blocking" value="false"/>
+                           <setting name="enable_custom_handle" value="false"/>
+                           <struct name="callback">
+                              <setting name="name" value=""/>
+                              <setting name="userData" value=""/>
+                           </struct>
+                           <set name="flags">
+                              <selected/>
+                           </set>
+                           <setting name="slaveAddress" value="0"/>
+                           <setting name="direction" value="kLPI2C_Write"/>
+                           <setting name="subaddress" value="0"/>
+                           <setting name="subaddressSize" value="1"/>
+                           <setting name="blocking_buffer" value="false"/>
+                           <setting name="enable_custom_buffer" value="false"/>
+                           <setting name="dataSize" value="1"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="DEBUG_UART" uuid="0d9274fe-8f49-48a8-8e6a-8c3ac009384d" type="lpuart" type_id="lpuart_bf01db7d964092f3cf860852cba17f7e" mode="polling" peripheral="LPUART1" enabled="true" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="lpuartConfig_t" quick_selection="QuickSelection1">
+                        <struct name="lpuartConfig">
+                           <setting name="clockSource" value="LpuartClock"/>
+                           <setting name="lpuartSrcClkFreq" value="ClocksTool_DefaultInit"/>
+                           <setting name="baudRate_Bps" value="115200"/>
+                           <setting name="parityMode" value="kLPUART_ParityDisabled"/>
+                           <setting name="dataBitsCount" value="kLPUART_EightDataBits"/>
+                           <setting name="isMsb" value="false"/>
+                           <setting name="stopBitCount" value="kLPUART_OneStopBit"/>
+                           <setting name="enableMatchAddress1" value="false"/>
+                           <setting name="matchAddress1" value="0"/>
+                           <setting name="enableMatchAddress2" value="false"/>
+                           <setting name="matchAddress2" value="0"/>
+                           <setting name="txFifoWatermark" value="0"/>
+                           <setting name="rxFifoWatermark" value="1"/>
+                           <setting name="enableRxRTS" value="false"/>
+                           <setting name="enableTxCTS" value="false"/>
+                           <setting name="txCtsSource" value="kLPUART_CtsSourcePin"/>
+                           <setting name="txCtsConfig" value="kLPUART_CtsSampleAtStart"/>
+                           <setting name="rxIdleType" value="kLPUART_IdleTypeStartBit"/>
+                           <setting name="rxIdleConfig" value="kLPUART_IdleCharacter1"/>
+                           <setting name="enableTx" value="true"/>
+                           <setting name="enableRx" value="true"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="USER_BUTTON" uuid="6c9e57cc-d98c-4f6d-bf94-3920a8fd474e" type="igpio" type_id="igpio_b1c1fa279aa7069dca167502b8589cb7" mode="GPIO" peripheral="GPIO2" enabled="true" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="fsl_gpio">
+                        <setting name="enable_irq_comb_0_15" value="false"/>
+                        <struct name="gpio_interrupt_comb_0_15">
+                           <setting name="IRQn" value="GPIO2_Combined_0_15_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="USER_LED" uuid="0f7a142d-ad6c-4e47-a2a3-015e90afa37b" type="igpio" type_id="igpio_b1c1fa279aa7069dca167502b8589cb7" mode="GPIO" peripheral="GPIO1" enabled="true" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="fsl_gpio">
+                        <setting name="enable_irq_comb_0_15" value="false"/>
+                        <struct name="gpio_interrupt_comb_0_15">
+                           <setting name="IRQn" value="GPIO1_Combined_0_15_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                        <setting name="enable_irq_comb_16_31" value="false"/>
+                        <struct name="gpio_interrupt_comb_16_31">
+                           <setting name="IRQn" value="GPIO1_Combined_16_31_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="NVIC" uuid="1f9167f9-b5d4-4014-bb88-164f5cb5df38" type="nvic" type_id="nvic_57b5eef3774cc60acaede6f5b8bddc67" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="nvic">
+                        <array name="interrupt_table"/>
+                        <array name="interrupts"/>
+                     </config_set>
+                  </instance>
+                  <instance name="LPSPI1" uuid="de6f91ec-e184-4998-995c-9c22586a5529" type="lpspi" type_id="lpspi_6e21a1e0a09f0a012d683c4f91752db8" mode="polling" peripheral="LPSPI1" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="main">
+                        <setting name="mode" value="kLPSPI_Master"/>
+                        <setting name="clockSource" value="LpspiClock"/>
+                        <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                        <struct name="master">
+                           <setting name="baudRate" value="400000"/>
+                           <setting name="bitsPerFrame" value="8"/>
+                           <setting name="cpol" value="kLPSPI_ClockPolarityActiveHigh"/>
+                           <setting name="cpha" value="kLPSPI_ClockPhaseFirstEdge"/>
+                           <setting name="direction" value="kLPSPI_MsbFirst"/>
+                           <setting name="pcsToSckDelayInNanoSec" value="1000"/>
+                           <setting name="lastSckToPcsDelayInNanoSec" value="1000"/>
+                           <setting name="betweenTransferDelayInNanoSec" value="1000"/>
+                           <setting name="whichPcs" value="kLPSPI_Pcs0"/>
+                           <setting name="pcsActiveHighOrLow" value="kLPSPI_PcsActiveLow"/>
+                           <setting name="pinCfg" value="kLPSPI_SdiInSdoOut"/>
+                           <setting name="dataOutConfig" value="kLpspiDataOutRetained"/>
+                        </struct>
+                        <setting name="set_FifoWaterMarks" value="false"/>
+                        <struct name="fifoWaterMarks">
+                           <setting name="txWatermark" value="0"/>
+                           <setting name="rxWatermark" value="0"/>
+                        </struct>
+                        <setting name="allPcsPolarityEnable" value="false"/>
+                        <struct name="allPcsPolarity">
+                           <setting name="kLPSPI_Pcs1Active" value="kLPSPI_PcsActiveLow"/>
+                           <setting name="kLPSPI_Pcs2Active" value="kLPSPI_PcsActiveLow"/>
+                           <setting name="kLPSPI_Pcs3Active" value="kLPSPI_PcsActiveLow"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+               </instances>
+            </functional_group>
+         </functional_groups>
+         <components>
+            <component name="system" uuid="991327ca-3ad0-49d1-aff3-37b7734338db" type_id="system">
+               <config_set_global name="global_system_definitions">
+                  <setting name="user_definitions" value=""/>
+                  <setting name="user_includes" value=""/>
+               </config_set_global>
+            </component>
+            <component name="msg" uuid="3e46e698-099c-4180-92f5-2af1abbb93a5" type_id="msg">
+               <config_set_global name="global_messages"/>
+            </component>
+            <component name="gpio_adapter_common" uuid="452cb7cf-ac6a-4f29-a940-5f049b272fb1" type_id="gpio_adapter_common_57579b9ac814fe26bf95df0a384c36b6">
+               <config_set_global name="global_gpio_adapter_common" quick_selection="default"/>
+            </component>
+            <component name="generic_uart" uuid="be6880f0-7c2d-4331-bd40-2163fb383fd7" type_id="generic_uart_8cae00565451cf2346eb1b8c624e73a6">
+               <config_set_global name="global_uart"/>
+            </component>
+            <component name="generic_can" uuid="0f82c647-4c11-4163-87a4-aca908bb012c" type_id="generic_can_1bfdd78b1af214566c1f23cf6a582d80">
+               <config_set_global name="global_can"/>
+            </component>
+            <component name="uart_cmsis_common" uuid="18436376-474a-425e-81c0-9aa48fcbccd6" type_id="uart_cmsis_common_9cb8e302497aa696fdbb5a4fd622c2a8">
+               <config_set_global name="global_USART_CMSIS_common" quick_selection="default"/>
+            </component>
+            <component name="generic_enet" uuid="5501650f-8266-4cab-aadb-7799f5079dfb" type_id="generic_enet_74db5c914f0ddbe47d86af40cb77a619">
+               <config_set_global name="global_enet"/>
+            </component>
+         </components>
+      </periphs>
+      <tee name="TEE" version="4.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <tee_profile>
+            <processor_version>0.0.0</processor_version>
+         </tee_profile>
+      </tee>
+   </tools>
+</configuration>
diff --git a/hw/bsp/imxrt/boards/mimxrt1010_evk/board/clock_config.c b/hw/bsp/imxrt/boards/mimxrt1010_evk/board/clock_config.c
new file mode 100644
index 000000000..6cd18c8c2
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1010_evk/board/clock_config.c
@@ -0,0 +1,351 @@
+/*
+ * How to setup clock using clock driver functions:
+ *
+ * 1. Call CLOCK_InitXXXPLL() to configure corresponding PLL clock.
+ *
+ * 2. Call CLOCK_InitXXXpfd() to configure corresponding PLL pfd clock.
+ *
+ * 3. Call CLOCK_SetMux() to configure corresponding clock source for target clock out.
+ *
+ * 4. Call CLOCK_SetDiv() to configure corresponding clock divider for target clock out.
+ *
+ * 5. Call CLOCK_SetXtalFreq() to set XTAL frequency based on board settings.
+ *
+ */
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v11.0
+processor: MIMXRT1011xxxxx
+package_id: MIMXRT1011DAE5A
+mcu_data: ksdk2_0
+processor_version: 13.0.2
+board: MIMXRT1010-EVK
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+#include "clock_config.h"
+
+// Suppress warning caused by mcu driver
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wunused-parameter"
+#endif
+
+#include "fsl_iomuxc.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockRUN();
+}
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockRUN
+called_from_default_init: true
+outputs:
+- {id: ADC_ALT_CLK.outFreq, value: 40 MHz}
+- {id: CKIL_SYNC_CLK_ROOT.outFreq, value: 32.768 kHz}
+- {id: CLK_1M.outFreq, value: 1 MHz}
+- {id: CLK_24M.outFreq, value: 24 MHz}
+- {id: CORE_CLK_ROOT.outFreq, value: 500 MHz}
+- {id: ENET_500M_REF_CLK.outFreq, value: 500 MHz}
+- {id: FLEXIO1_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: FLEXSPI_CLK_ROOT.outFreq, value: 132 MHz}
+- {id: GPT1_ipg_clk_highfreq.outFreq, value: 62.5 MHz}
+- {id: GPT2_ipg_clk_highfreq.outFreq, value: 62.5 MHz}
+- {id: IPG_CLK_ROOT.outFreq, value: 125 MHz}
+- {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz}
+- {id: LPSPI_CLK_ROOT.outFreq, value: 105.6 MHz}
+- {id: MQS_MCLK.outFreq, value: 1080/17 MHz}
+- {id: PERCLK_CLK_ROOT.outFreq, value: 62.5 MHz}
+- {id: SAI1_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK2.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK3.outFreq, value: 30 MHz}
+- {id: SAI3_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK3.outFreq, value: 30 MHz}
+- {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: TRACE_CLK_ROOT.outFreq, value: 132 MHz}
+- {id: UART_CLK_ROOT.outFreq, value: 80 MHz}
+- {id: USBPHY_CLK.outFreq, value: 480 MHz}
+settings:
+- {id: CCM.ADC_ACLK_PODF.scale, value: '12', locked: true}
+- {id: CCM.AHB_PODF.scale, value: '1', locked: true}
+- {id: CCM.FLEXSPI_PODF.scale, value: '4', locked: true}
+- {id: CCM.IPG_PODF.scale, value: '4'}
+- {id: CCM.LPSPI_PODF.scale, value: '5'}
+- {id: CCM.PERCLK_PODF.scale, value: '2', locked: true}
+- {id: CCM.PRE_PERIPH_CLK_SEL.sel, value: CCM_ANALOG.ENET_500M_REF_CLK}
+- {id: CCM.SAI1_CLK_SEL.sel, value: CCM_ANALOG.PLL3_PFD2_CLK}
+- {id: CCM.SAI3_CLK_SEL.sel, value: CCM_ANALOG.PLL3_PFD2_CLK}
+- {id: CCM.TRACE_CLK_SEL.sel, value: CCM_ANALOG.PLL2_MAIN_CLK}
+- {id: CCM_ANALOG.PLL2.denom, value: '1'}
+- {id: CCM_ANALOG.PLL2.num, value: '0'}
+- {id: CCM_ANALOG.PLL2_BYPASS.sel, value: CCM_ANALOG.PLL2_OUT_CLK}
+- {id: CCM_ANALOG.PLL2_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD0}
+- {id: CCM_ANALOG.PLL2_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD1}
+- {id: CCM_ANALOG.PLL2_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD2}
+- {id: CCM_ANALOG.PLL2_PFD2_DIV.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL2_PFD2_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL2_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD3}
+- {id: CCM_ANALOG.PLL2_PFD3_DIV.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL2_PFD3_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_BYPASS.sel, value: CCM_ANALOG.PLL3}
+- {id: CCM_ANALOG.PLL3_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD0}
+- {id: CCM_ANALOG.PLL3_PFD0_DIV.scale, value: '22', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD0_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD1}
+- {id: CCM_ANALOG.PLL3_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD2}
+- {id: CCM_ANALOG.PLL3_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD3}
+- {id: CCM_ANALOG.PLL3_PFD3_DIV.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD3_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL6_BYPASS.sel, value: CCM_ANALOG.PLL6}
+- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB1_POWER_CFG, value: 'Yes'}
+sources:
+- {id: XTALOSC24M.RTC_OSC.outFreq, value: 32.768 kHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 1,                         /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
+        .numerator = 0,                           /* 30 bit numerator of fractional loop divider */
+        .denominator = 1,                         /* 30 bit denominator of fractional loop divider */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 0,                         /* PLL loop divider, Fout = Fin * 20 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN =
+    {
+        .enableClkOutput500M = true,              /* Enable the PLL providing the ENET 500MHz reference clock */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+/*******************************************************************************
+ * Code for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+void BOARD_BootClockRUN(void)
+{
+    /* Init RTC OSC clock frequency. */
+    CLOCK_SetRtcXtalFreq(32768U);
+    /* Enable 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK;
+    /* Use free 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK;
+    /* Set XTAL 24MHz clock frequency. */
+    CLOCK_SetXtalFreq(24000000U);
+    /* Enable XTAL 24MHz clock source. */
+    CLOCK_InitExternalClk(0);
+    /* Enable internal RC. */
+    CLOCK_InitRcOsc24M();
+    /* Switch clock source to external OSC. */
+    CLOCK_SwitchOsc(kCLOCK_XtalOsc);
+    /* Set Oscillator ready counter value. */
+    CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127);
+    /* Setting the VDD_SOC to 1.25V. It is necessary to config CORE to 500Mhz. */
+    DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x12);
+    /* Waiting for DCDC_STS_DC_OK bit is asserted */
+    while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0))
+    {
+    }
+    /* Disable IPG clock gate. */
+    CLOCK_DisableClock(kCLOCK_Adc1);
+    CLOCK_DisableClock(kCLOCK_Xbar1);
+    /* Set IPG_PODF. */
+    CLOCK_SetDiv(kCLOCK_IpgDiv, 3);
+    /* Init Enet PLL. */
+    CLOCK_InitEnetPll(&enetPllConfig_BOARD_BootClockRUN);
+    /* Disable PERCLK clock gate. */
+    CLOCK_DisableClock(kCLOCK_Gpt1);
+    CLOCK_DisableClock(kCLOCK_Gpt1S);
+    CLOCK_DisableClock(kCLOCK_Gpt2);
+    CLOCK_DisableClock(kCLOCK_Gpt2S);
+    CLOCK_DisableClock(kCLOCK_Pit);
+    /* Set PERCLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_PerclkDiv, 1);
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Disable Flexspi clock gate. */
+    CLOCK_DisableClock(kCLOCK_FlexSpi);
+    /* Set FLEXSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_FlexspiDiv, 3);
+    /* Set Flexspi clock source. */
+    CLOCK_SetMux(kCLOCK_FlexspiMux, 0);
+    CLOCK_SetMux(kCLOCK_FlexspiSrcMux, 0);
+#endif
+    /* Disable ADC_ACLK_EN clock gate. */
+    CCM->CSCMR2 &= ~CCM_CSCMR2_ADC_ACLK_EN_MASK;
+    /* Set ADC_ACLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_AdcDiv, 11);
+    /* Disable LPSPI clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpspi1);
+    CLOCK_DisableClock(kCLOCK_Lpspi2);
+    /* Set LPSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_LpspiDiv, 4);
+    /* Set Lpspi clock source. */
+    CLOCK_SetMux(kCLOCK_LpspiMux, 2);
+    /* Disable TRACE clock gate. */
+    CLOCK_DisableClock(kCLOCK_Trace);
+    /* Set TRACE_PODF. */
+    CLOCK_SetDiv(kCLOCK_TraceDiv, 3);
+    /* Set Trace clock source. */
+    CLOCK_SetMux(kCLOCK_TraceMux, 0);
+    /* Disable SAI1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai1);
+    /* Set SAI1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3);
+    /* Set SAI1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai1Div, 1);
+    /* Set Sai1 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai1Mux, 0);
+    /* Disable SAI3 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai3);
+    /* Set SAI3_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3);
+    /* Set SAI3_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai3Div, 1);
+    /* Set Sai3 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai3Mux, 0);
+    /* Disable Lpi2c clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpi2c1);
+    CLOCK_DisableClock(kCLOCK_Lpi2c2);
+    /* Set LPI2C_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0);
+    /* Set Lpi2c clock source. */
+    CLOCK_SetMux(kCLOCK_Lpi2cMux, 0);
+    /* Disable UART clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpuart1);
+    CLOCK_DisableClock(kCLOCK_Lpuart2);
+    CLOCK_DisableClock(kCLOCK_Lpuart3);
+    CLOCK_DisableClock(kCLOCK_Lpuart4);
+    /* Set UART_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+    /* Set Uart clock source. */
+    CLOCK_SetMux(kCLOCK_UartMux, 0);
+    /* Disable SPDIF clock gate. */
+    CLOCK_DisableClock(kCLOCK_Spdif);
+    /* Set SPDIF0_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1);
+    /* Set SPDIF0_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Spdif0Div, 7);
+    /* Set Spdif clock source. */
+    CLOCK_SetMux(kCLOCK_SpdifMux, 3);
+    /* Disable Flexio1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Flexio1);
+    /* Set FLEXIO1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1);
+    /* Set FLEXIO1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexio1Div, 7);
+    /* Set Flexio1 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexio1Mux, 3);
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Init Usb1 PLL. */
+    CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
+    /* Init Usb1 pfd0. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 22);
+    /* Init Usb1 pfd1. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
+    /* Init Usb1 pfd2. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
+    /* Init Usb1 pfd3. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 18);
+#endif
+    /* Set periph clock source to use the USB1 PLL output (PLL3_SW_CLK) temporarily. */
+    /* Set Pll3 SW clock source to use the USB1 PLL output. */
+    CLOCK_SetMux(kCLOCK_Pll3SwMux, 0);
+    /* Set safe value of the AHB_PODF. */
+    CLOCK_SetDiv(kCLOCK_AhbDiv, 1);
+    /* Set periph clock2 clock source to use the PLL3_SW_CLK. */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
+    /* Set peripheral clock source (glitchless mux) to select the temporary core clock. */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 1);
+    /* Set per clock source. */
+    CLOCK_SetMux(kCLOCK_PerclkMux, 0);
+    /* Init System PLL. */
+    CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
+    /* Init System pfd0. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
+    /* Init System pfd1. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
+    /* Init System pfd2. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd2, 18);
+    /* Init System pfd3. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd3, 18);
+    /* DeInit Audio PLL. */
+    CLOCK_DeinitAudioPll();
+    /* Bypass Audio PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1);
+    /* Set divider for Audio PLL. */
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK;
+    /* Enable Audio PLL output. */
+    CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK;
+    /* Set preperiph clock source. */
+    CLOCK_SetMux(kCLOCK_PrePeriphMux, 3);
+    /* Set periph clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 0);
+    /* Set periph clock2 clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
+    /* Set AHB_PODF. */
+    CLOCK_SetDiv(kCLOCK_AhbDiv, 0);
+    /* Set clock out1 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0);
+    /* Set clock out1 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1);
+    /* Set clock out2 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0);
+    /* Set clock out2 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(18);
+    /* Set clock out1 drives clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK;
+    /* Disable clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK;
+    /* Disable clock out2. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK;
+    /* Set SAI1 MCLK1 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0);
+    /* Set SAI1 MCLK2 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0);
+    /* Set SAI1 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0);
+    /* Set SAI3 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0);
+    /* Set MQS configuration. */
+    IOMUXC_MQSConfig(IOMUXC_GPR,kIOMUXC_MqsPwmOverSampleRate32, 0);
+    /* Set GPT1 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK;
+    /* Set GPT2 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK;
+    /* Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
+}
diff --git a/hw/bsp/imxrt/boards/mimxrt1010_evk/board/clock_config.h b/hw/bsp/imxrt/boards/mimxrt1010_evk/board/clock_config.h
new file mode 100644
index 000000000..119fd94bd
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1010_evk/board/clock_config.h
@@ -0,0 +1,97 @@
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define BOARD_XTAL0_CLK_HZ                         24000000U  /*!< Board xtal0 frequency in Hz */
+
+#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32k frequency in Hz */
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKRUN_CORE_CLOCK             500000000U  /*!< Core clock frequency: 500000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKRUN_ADC_ALT_CLK                40000000UL
+#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT         32768UL
+#define BOARD_BOOTCLOCKRUN_CLKO1_CLK                  0UL
+#define BOARD_BOOTCLOCKRUN_CLKO2_CLK                  0UL
+#define BOARD_BOOTCLOCKRUN_CLK_1M                     1000000UL
+#define BOARD_BOOTCLOCKRUN_CLK_24M                    24000000UL
+#define BOARD_BOOTCLOCKRUN_CORE_CLK_ROOT              500000000UL
+#define BOARD_BOOTCLOCKRUN_ENET_500M_REF_CLK          500000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT           30000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT           132000000UL
+#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ      62500000UL
+#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ      62500000UL
+#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT               125000000UL
+#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT             60000000UL
+#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT             105600000UL
+#define BOARD_BOOTCLOCKRUN_MQS_MCLK                   63529411UL
+#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT            62500000UL
+#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2                 0UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT            30000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT          0UL
+#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT             132000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT              80000000UL
+#define BOARD_BOOTCLOCKRUN_USBPHY_CLK                 480000000UL
+
+/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
+/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
+ */
+extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
+/*! @brief Enet PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN;
+
+/*******************************************************************************
+ * API for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockRUN(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/imxrt/boards/mimxrt1010_evk/mimxrt1010_evk.mex b/hw/bsp/imxrt/boards/mimxrt1010_evk/mimxrt1010_evk.mex
new file mode 100644
index 000000000..606ec2cfc
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1010_evk/mimxrt1010_evk.mex
@@ -0,0 +1,692 @@
+<?xml version="1.0" encoding= "UTF-8" ?>
+<configuration name="MIMXRT1010-EVK" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_13 http://mcuxpresso.nxp.com/XSD/mex_configuration_13.xsd" uuid="f341eb24-9521-4127-8932-81692aeb76df" version="13" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_13" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+   <common>
+      <processor>MIMXRT1011xxxxx</processor>
+      <package>MIMXRT1011DAE5A</package>
+      <board>MIMXRT1010-EVK</board>
+      <board_revision>A</board_revision>
+      <mcu_data>ksdk2_0</mcu_data>
+      <cores selected="core0">
+         <core name="Cortex-M7F" id="core0" description="M7 core"/>
+      </cores>
+      <description></description>
+   </common>
+   <preferences>
+      <validate_boot_init_only>true</validate_boot_init_only>
+      <generate_extended_information>false</generate_extended_information>
+      <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
+      <update_include_paths>true</update_include_paths>
+      <generate_registers_defines>false</generate_registers_defines>
+   </preferences>
+   <tools>
+      <pins name="Pins" version="13.1" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/pin_mux.c" update_enabled="true"/>
+            <file path="board/pin_mux.h" update_enabled="true"/>
+         </generated_project_files>
+         <pins_profile>
+            <processor_version>13.0.2</processor_version>
+            <external_user_signals>
+               <properties/>
+            </external_user_signals>
+            <power_domains>
+               <power_domain name="NVCC_GPIO" value="3.3"/>
+            </power_domains>
+         </pins_profile>
+         <functions_list>
+            <function name="BOARD_InitPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LPSPI1" description="Peripheral LPSPI1 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="ARM" description="Peripheral ARM is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="LPI2C1" description="Peripheral LPI2C1 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LPSPI1" signal="SDI" pin_num="57" pin_signal="GPIO_AD_03"/>
+                  <pin peripheral="LPSPI1" signal="SDO" pin_num="56" pin_signal="GPIO_AD_04"/>
+                  <pin peripheral="LPSPI1" signal="SCK" pin_num="52" pin_signal="GPIO_AD_06"/>
+                  <pin peripheral="ARM" signal="TRACE, 0" pin_num="60" pin_signal="GPIO_AD_00"/>
+                  <pin peripheral="ARM" signal="TRACE, 1" pin_num="79" pin_signal="GPIO_13"/>
+                  <pin peripheral="ARM" signal="TRACE, 2" pin_num="80" pin_signal="GPIO_12"/>
+                  <pin peripheral="ARM" signal="TRACE, 3" pin_num="1" pin_signal="GPIO_11"/>
+                  <pin peripheral="ARM" signal="arm_trace_clk" pin_num="58" pin_signal="GPIO_AD_02"/>
+                  <pin peripheral="GPIO2" signal="gpio_io, 05" pin_num="70" pin_signal="GPIO_SD_05"/>
+                  <pin peripheral="LPI2C1" signal="SCL" pin_num="11" pin_signal="GPIO_02"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitDEBUG_UARTPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 is not initialized" problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LPUART1" signal="RXD" pin_num="3" pin_signal="GPIO_09"/>
+                  <pin peripheral="LPUART1" signal="TXD" pin_num="2" pin_signal="GPIO_10"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitQSPIPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXSPI" description="Peripheral FLEXSPI is not initialized" problem_level="1" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_SCLK" pin_num="65" pin_signal="GPIO_SD_10"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA0" pin_num="66" pin_signal="GPIO_SD_09"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA1" pin_num="68" pin_signal="GPIO_SD_07"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA2" pin_num="67" pin_signal="GPIO_SD_08"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA3" pin_num="64" pin_signal="GPIO_SD_11"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_SS0_B" pin_num="69" pin_signal="GPIO_SD_06"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitLEDPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.igpio" description="Pins initialization requires the IGPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="GPIO1" signal="gpiomux_io, 11" pin_num="1" pin_signal="GPIO_11">
+                     <pin_features>
+                        <pin_feature name="direction" value="OUTPUT"/>
+                        <pin_feature name="gpio_init_state" value="true"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="open_drain" value="Disable"/>
+                        <pin_feature name="drive_strength" value="R0_4"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitBUTTONPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="GPIO2" description="Peripheral GPIO2 is not initialized" problem_level="1" source="Pins:BOARD_InitBUTTONPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.igpio" description="Pins initialization requires the IGPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="GPIO2" signal="gpio_io, 05" pin_num="70" pin_signal="GPIO_SD_05">
+                     <pin_features>
+                        <pin_feature name="direction" value="INPUT"/>
+                        <pin_feature name="gpio_interrupt" value="kGPIO_NoIntmode"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="open_drain" value="Disable"/>
+                        <pin_feature name="drive_strength" value="R0_4"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitCOMBO_SENSORPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LPI2C1" description="Peripheral LPI2C1 is not initialized" problem_level="1" source="Pins:BOARD_InitCOMBO_SENSORPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitCOMBO_SENSORPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitCOMBO_SENSORPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LPI2C1" signal="SCL" pin_num="11" pin_signal="GPIO_02">
+                     <pin_features>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                        <pin_feature name="software_input_on" value="Enable"/>
+                        <pin_feature name="open_drain" value="Enable"/>
+                        <pin_feature name="drive_strength" value="R0_4"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_22K_Ohm"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LPI2C1" signal="SDA" pin_num="12" pin_signal="GPIO_01">
+                     <pin_features>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                        <pin_feature name="software_input_on" value="Enable"/>
+                        <pin_feature name="open_drain" value="Enable"/>
+                        <pin_feature name="drive_strength" value="R0_4"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_22K_Ohm"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+         </functions_list>
+      </pins>
+      <clocks name="Clocks" version="11.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/clock_config.c" update_enabled="true"/>
+            <file path="board/clock_config.h" update_enabled="true"/>
+         </generated_project_files>
+         <clocks_profile>
+            <processor_version>13.0.2</processor_version>
+         </clocks_profile>
+         <clock_configurations>
+            <clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Clocks initialization requires the IOMUXC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="XTALOSC24M.RTC_OSC.outFreq" value="32.768 kHz" locked="false" enabled="true"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="ADC_ALT_CLK.outFreq" value="40 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CKIL_SYNC_CLK_ROOT.outFreq" value="32.768 kHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_1M.outFreq" value="1 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_24M.outFreq" value="24 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CORE_CLK_ROOT.outFreq" value="500 MHz" locked="false" accuracy=""/>
+                  <clock_output id="ENET_500M_REF_CLK.outFreq" value="500 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXIO1_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXSPI_CLK_ROOT.outFreq" value="132 MHz" locked="false" accuracy=""/>
+                  <clock_output id="GPT1_ipg_clk_highfreq.outFreq" value="62.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="GPT2_ipg_clk_highfreq.outFreq" value="62.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="IPG_CLK_ROOT.outFreq" value="125 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LPI2C_CLK_ROOT.outFreq" value="60 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LPSPI_CLK_ROOT.outFreq" value="105.6 MHz" locked="false" accuracy=""/>
+                  <clock_output id="MQS_MCLK.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="PERCLK_CLK_ROOT.outFreq" value="62.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK2.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SPDIF0_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="TRACE_CLK_ROOT.outFreq" value="132 MHz" locked="false" accuracy=""/>
+                  <clock_output id="UART_CLK_ROOT.outFreq" value="80 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USBPHY_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="CCM.ADC_ACLK_PODF.scale" value="12" locked="true"/>
+                  <setting id="CCM.AHB_PODF.scale" value="1" locked="true"/>
+                  <setting id="CCM.FLEXSPI_PODF.scale" value="4" locked="true"/>
+                  <setting id="CCM.IPG_PODF.scale" value="4" locked="false"/>
+                  <setting id="CCM.LPSPI_PODF.scale" value="5" locked="false"/>
+                  <setting id="CCM.PERCLK_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.PRE_PERIPH_CLK_SEL.sel" value="CCM_ANALOG.ENET_500M_REF_CLK" locked="false"/>
+                  <setting id="CCM.SAI1_CLK_SEL.sel" value="CCM_ANALOG.PLL3_PFD2_CLK" locked="false"/>
+                  <setting id="CCM.SAI3_CLK_SEL.sel" value="CCM_ANALOG.PLL3_PFD2_CLK" locked="false"/>
+                  <setting id="CCM.TRACE_CLK_SEL.sel" value="CCM_ANALOG.PLL2_MAIN_CLK" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2.denom" value="1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2.num" value="0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_BYPASS.sel" value="CCM_ANALOG.PLL2_OUT_CLK" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD2_DIV.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD2_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD3_DIV.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD3_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_BYPASS.sel" value="CCM_ANALOG.PLL3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_DIV.scale" value="22" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD3_DIV.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD3_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL6_BYPASS.sel" value="CCM_ANALOG.PLL6" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_POWER_CFG" value="Yes" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>true</called_from_default_init>
+            </clock_configuration>
+         </clock_configurations>
+      </clocks>
+      <dcdx name="DCDx" version="2.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <dcdx_profile>
+            <processor_version>0.0.0</processor_version>
+         </dcdx_profile>
+         <dcdx_configurations/>
+      </dcdx>
+      <periphs name="Peripherals" version="12.0" enabled="true" update_project_code="true">
+         <dependencies>
+            <dependency resourceType="SWComponent" resourceId="platform.drivers.lpuart" description="LPUART Driver not found in the toolchain/IDE project. Project will not compile!" problem_level="2" source="Peripherals">
+               <feature name="enabled" evaluation="equal">
+                  <data type="Boolean">true</data>
+               </feature>
+            </dependency>
+            <dependency resourceType="SWComponent" resourceId="platform.drivers.lpuart" description="Unsupported version of the LPUART Driver in the toolchain/IDE project. Required: ${required_value}, actual: ${actual_value}. Project might not compile correctly." problem_level="1" source="Peripherals">
+               <feature name="version" evaluation="equivalent">
+                  <data type="Version">2.5.1</data>
+               </feature>
+            </dependency>
+            <dependency resourceType="SWComponent" resourceId="platform.drivers.igpio" description="igpio not found in the toolchain/IDE project. Project will not compile!" problem_level="2" source="Peripherals">
+               <feature name="enabled" evaluation="equal">
+                  <data type="Boolean">true</data>
+               </feature>
+            </dependency>
+            <dependency resourceType="SWComponent" resourceId="platform.drivers.igpio" description="Unsupported version of the igpio in the toolchain/IDE project. Required: ${required_value}, actual: ${actual_value}. Project might not compile correctly." problem_level="1" source="Peripherals">
+               <feature name="version" evaluation="equivalent">
+                  <data type="Version">2.0.1</data>
+               </feature>
+            </dependency>
+            <dependency resourceType="SWComponent" resourceId="platform.drivers.lpspi" description="LPSPI Driver not found in the toolchain/IDE project. Project will not compile!" problem_level="2" source="Peripherals">
+               <feature name="enabled" evaluation="equal">
+                  <data type="Boolean">true</data>
+               </feature>
+            </dependency>
+            <dependency resourceType="SWComponent" resourceId="platform.drivers.lpspi" description="Unsupported version of the LPSPI Driver in the toolchain/IDE project. Required: ${required_value}, actual: ${actual_value}. Project might not compile correctly." problem_level="1" source="Peripherals">
+               <feature name="version" evaluation="greaterOrEqual">
+                  <data type="Version">2.0.3</data>
+               </feature>
+            </dependency>
+         </dependencies>
+         <generated_project_files>
+            <file path="board/peripherals.c" update_enabled="true"/>
+            <file path="board/peripherals.h" update_enabled="true"/>
+         </generated_project_files>
+         <peripherals_profile>
+            <processor_version>13.0.2</processor_version>
+         </peripherals_profile>
+         <functional_groups>
+            <functional_group name="BOARD_InitPeripherals" uuid="5e519eed-bd94-4950-84de-0f29de85bcea" called_from_default_init="true" id_prefix="" core="core0">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="ClockOutput" resourceId="UART_CLK_ROOT" description="UART_CLK_ROOT is inactive." problem_level="2" source="Peripherals:BOARD_InitPeripherals">
+                     <feature name="frequency" evaluation="greaterThan">
+                        <data type="Frequency" unit="Hz">0</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="LPUART1.uart_tx" description="Signal TX is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
+                     <feature name="routed" evaluation="equal">
+                        <data type="Boolean">true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="LPUART1.uart_rx" description="Signal RX is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
+                     <feature name="routed" evaluation="equal">
+                        <data type="Boolean">true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="LPSPI1.lpspi_sck" description="Signal serial clock is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
+                     <feature name="routed" evaluation="">
+                        <data type="Boolean">true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="LPSPI1.lpspi_sin" description="Signal serial data input is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
+                     <feature name="routed" evaluation="">
+                        <data type="Boolean">true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="LPSPI1.lpspi_sout" description="Signal serial data output is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
+                     <feature name="routed" evaluation="">
+                        <data type="Boolean">true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="ClockOutput" resourceId="LPSPI_CLK_ROOT" description="LPSPI_CLK_ROOT is inactive." problem_level="2" source="Peripherals:BOARD_InitPeripherals">
+                     <feature name="frequency" evaluation="greaterThan">
+                        <data type="Frequency" unit="Hz">0</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <instances>
+                  <instance name="COMBO_SENSOR" uuid="2342e373-ea2e-4bed-8aa4-bd33509155f6" type="lpi2c" type_id="lpi2c_6b71962515c3208facfccd030afebc98" mode="master" peripheral="LPI2C1" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="main" quick_selection="qs_interrupt">
+                        <setting name="clockSource" value="Lpi2cClock"/>
+                        <setting name="clockSourceFreq" value="BOARD_BootClockRUN"/>
+                     </config_set>
+                     <config_set name="interrupt_vector"/>
+                     <config_set name="master" quick_selection="qs_master_transfer">
+                        <setting name="mode" value="transfer"/>
+                        <struct name="config">
+                           <setting name="enableMaster" value="true"/>
+                           <setting name="enableDoze" value="true"/>
+                           <setting name="debugEnable" value="false"/>
+                           <setting name="ignoreAck" value="false"/>
+                           <setting name="pinConfig" value="kLPI2C_2PinOpenDrain"/>
+                           <setting name="baudRate_Hz" value="100000"/>
+                           <setting name="busIdleTimeout_ns" value="0"/>
+                           <setting name="pinLowTimeout_ns" value="0"/>
+                           <setting name="sdaGlitchFilterWidth_ns" value="0"/>
+                           <setting name="sclGlitchFilterWidth_ns" value="0"/>
+                           <struct name="hostRequest">
+                              <setting name="enable" value="false"/>
+                              <setting name="source" value="kLPI2C_HostRequestExternalPin"/>
+                              <setting name="polarity" value="kLPI2C_HostRequestPinActiveHigh"/>
+                           </struct>
+                           <set name="edmaRequestSources">
+                              <selected/>
+                           </set>
+                        </struct>
+                        <struct name="transfer">
+                           <setting name="blocking" value="false"/>
+                           <setting name="enable_custom_handle" value="false"/>
+                           <struct name="callback">
+                              <setting name="name" value=""/>
+                              <setting name="userData" value=""/>
+                           </struct>
+                           <set name="flags">
+                              <selected/>
+                           </set>
+                           <setting name="slaveAddress" value="0"/>
+                           <setting name="direction" value="kLPI2C_Write"/>
+                           <setting name="subaddress" value="0"/>
+                           <setting name="subaddressSize" value="1"/>
+                           <setting name="blocking_buffer" value="false"/>
+                           <setting name="enable_custom_buffer" value="false"/>
+                           <setting name="dataSize" value="1"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="DEBUG_UART" uuid="0d9274fe-8f49-48a8-8e6a-8c3ac009384d" type="lpuart" type_id="lpuart_bf01db7d964092f3cf860852cba17f7e" mode="polling" peripheral="LPUART1" enabled="true" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="lpuartConfig_t" quick_selection="QuickSelection1">
+                        <struct name="lpuartConfig">
+                           <setting name="clockSource" value="LpuartClock"/>
+                           <setting name="lpuartSrcClkFreq" value="ClocksTool_DefaultInit"/>
+                           <setting name="baudRate_Bps" value="115200"/>
+                           <setting name="parityMode" value="kLPUART_ParityDisabled"/>
+                           <setting name="dataBitsCount" value="kLPUART_EightDataBits"/>
+                           <setting name="isMsb" value="false"/>
+                           <setting name="stopBitCount" value="kLPUART_OneStopBit"/>
+                           <setting name="enableMatchAddress1" value="false"/>
+                           <setting name="matchAddress1" value="0"/>
+                           <setting name="enableMatchAddress2" value="false"/>
+                           <setting name="matchAddress2" value="0"/>
+                           <setting name="txFifoWatermark" value="0"/>
+                           <setting name="rxFifoWatermark" value="1"/>
+                           <setting name="enableRxRTS" value="false"/>
+                           <setting name="enableTxCTS" value="false"/>
+                           <setting name="txCtsSource" value="kLPUART_CtsSourcePin"/>
+                           <setting name="txCtsConfig" value="kLPUART_CtsSampleAtStart"/>
+                           <setting name="rxIdleType" value="kLPUART_IdleTypeStartBit"/>
+                           <setting name="rxIdleConfig" value="kLPUART_IdleCharacter1"/>
+                           <setting name="enableTx" value="true"/>
+                           <setting name="enableRx" value="true"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="USER_BUTTON" uuid="6c9e57cc-d98c-4f6d-bf94-3920a8fd474e" type="igpio" type_id="igpio_b1c1fa279aa7069dca167502b8589cb7" mode="GPIO" peripheral="GPIO2" enabled="true" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="fsl_gpio">
+                        <setting name="enable_irq_comb_0_15" value="false"/>
+                        <struct name="gpio_interrupt_comb_0_15">
+                           <setting name="IRQn" value="GPIO2_Combined_0_15_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="USER_LED" uuid="0f7a142d-ad6c-4e47-a2a3-015e90afa37b" type="igpio" type_id="igpio_b1c1fa279aa7069dca167502b8589cb7" mode="GPIO" peripheral="GPIO1" enabled="true" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="fsl_gpio">
+                        <setting name="enable_irq_comb_0_15" value="false"/>
+                        <struct name="gpio_interrupt_comb_0_15">
+                           <setting name="IRQn" value="GPIO1_Combined_0_15_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                        <setting name="enable_irq_comb_16_31" value="false"/>
+                        <struct name="gpio_interrupt_comb_16_31">
+                           <setting name="IRQn" value="GPIO1_Combined_16_31_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="NVIC" uuid="1f9167f9-b5d4-4014-bb88-164f5cb5df38" type="nvic" type_id="nvic_57b5eef3774cc60acaede6f5b8bddc67" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="nvic">
+                        <array name="interrupt_table"/>
+                        <array name="interrupts"/>
+                     </config_set>
+                  </instance>
+                  <instance name="LPSPI1" uuid="de6f91ec-e184-4998-995c-9c22586a5529" type="lpspi" type_id="lpspi_6e21a1e0a09f0a012d683c4f91752db8" mode="polling" peripheral="LPSPI1" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="main">
+                        <setting name="mode" value="kLPSPI_Master"/>
+                        <setting name="clockSource" value="LpspiClock"/>
+                        <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                        <struct name="master">
+                           <setting name="baudRate" value="400000"/>
+                           <setting name="bitsPerFrame" value="8"/>
+                           <setting name="cpol" value="kLPSPI_ClockPolarityActiveHigh"/>
+                           <setting name="cpha" value="kLPSPI_ClockPhaseFirstEdge"/>
+                           <setting name="direction" value="kLPSPI_MsbFirst"/>
+                           <setting name="pcsToSckDelayInNanoSec" value="1000"/>
+                           <setting name="lastSckToPcsDelayInNanoSec" value="1000"/>
+                           <setting name="betweenTransferDelayInNanoSec" value="1000"/>
+                           <setting name="whichPcs" value="kLPSPI_Pcs0"/>
+                           <setting name="pcsActiveHighOrLow" value="kLPSPI_PcsActiveLow"/>
+                           <setting name="pinCfg" value="kLPSPI_SdiInSdoOut"/>
+                           <setting name="dataOutConfig" value="kLpspiDataOutRetained"/>
+                        </struct>
+                        <setting name="set_FifoWaterMarks" value="false"/>
+                        <struct name="fifoWaterMarks">
+                           <setting name="txWatermark" value="0"/>
+                           <setting name="rxWatermark" value="0"/>
+                        </struct>
+                        <setting name="allPcsPolarityEnable" value="false"/>
+                        <struct name="allPcsPolarity">
+                           <setting name="kLPSPI_Pcs1Active" value="kLPSPI_PcsActiveLow"/>
+                           <setting name="kLPSPI_Pcs2Active" value="kLPSPI_PcsActiveLow"/>
+                           <setting name="kLPSPI_Pcs3Active" value="kLPSPI_PcsActiveLow"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+               </instances>
+            </functional_group>
+         </functional_groups>
+         <components>
+            <component name="system" uuid="991327ca-3ad0-49d1-aff3-37b7734338db" type_id="system">
+               <config_set_global name="global_system_definitions">
+                  <setting name="user_definitions" value=""/>
+                  <setting name="user_includes" value=""/>
+               </config_set_global>
+            </component>
+            <component name="msg" uuid="3e46e698-099c-4180-92f5-2af1abbb93a5" type_id="msg">
+               <config_set_global name="global_messages"/>
+            </component>
+            <component name="gpio_adapter_common" uuid="452cb7cf-ac6a-4f29-a940-5f049b272fb1" type_id="gpio_adapter_common_57579b9ac814fe26bf95df0a384c36b6">
+               <config_set_global name="global_gpio_adapter_common" quick_selection="default"/>
+            </component>
+            <component name="generic_uart" uuid="be6880f0-7c2d-4331-bd40-2163fb383fd7" type_id="generic_uart_8cae00565451cf2346eb1b8c624e73a6">
+               <config_set_global name="global_uart"/>
+            </component>
+            <component name="generic_can" uuid="0f82c647-4c11-4163-87a4-aca908bb012c" type_id="generic_can_1bfdd78b1af214566c1f23cf6a582d80">
+               <config_set_global name="global_can"/>
+            </component>
+            <component name="uart_cmsis_common" uuid="18436376-474a-425e-81c0-9aa48fcbccd6" type_id="uart_cmsis_common_9cb8e302497aa696fdbb5a4fd622c2a8">
+               <config_set_global name="global_USART_CMSIS_common" quick_selection="default"/>
+            </component>
+            <component name="generic_enet" uuid="5501650f-8266-4cab-aadb-7799f5079dfb" type_id="generic_enet_74db5c914f0ddbe47d86af40cb77a619">
+               <config_set_global name="global_enet"/>
+            </component>
+         </components>
+      </periphs>
+      <tee name="TEE" version="4.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <tee_profile>
+            <processor_version>0.0.0</processor_version>
+         </tee_profile>
+      </tee>
+   </tools>
+</configuration>
diff --git a/hw/bsp/imxrt/boards/mimxrt1015_evk/board/clock_config.c b/hw/bsp/imxrt/boards/mimxrt1015_evk/board/clock_config.c
new file mode 100644
index 000000000..ae1aa7fb1
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1015_evk/board/clock_config.c
@@ -0,0 +1,357 @@
+/*
+ * How to setup clock using clock driver functions:
+ *
+ * 1. Call CLOCK_InitXXXPLL() to configure corresponding PLL clock.
+ *
+ * 2. Call CLOCK_InitXXXpfd() to configure corresponding PLL pfd clock.
+ *
+ * 3. Call CLOCK_SetMux() to configure corresponding clock source for target clock out.
+ *
+ * 4. Call CLOCK_SetDiv() to configure corresponding clock divider for target clock out.
+ *
+ * 5. Call CLOCK_SetXtalFreq() to set XTAL frequency based on board settings.
+ *
+ */
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v11.0
+processor: MIMXRT1015xxxxx
+package_id: MIMXRT1015DAF5A
+mcu_data: ksdk2_0
+processor_version: 13.0.2
+board: MIMXRT1015-EVK
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+#include "clock_config.h"
+#include "fsl_iomuxc.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockRUN();
+}
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockRUN
+called_from_default_init: true
+outputs:
+- {id: AHB_CLK_ROOT.outFreq, value: 500 MHz}
+- {id: CKIL_SYNC_CLK_ROOT.outFreq, value: 32.768 kHz}
+- {id: CLK_1M.outFreq, value: 1 MHz}
+- {id: CLK_24M.outFreq, value: 24 MHz}
+- {id: ENET_500M_REF_CLK.outFreq, value: 500 MHz}
+- {id: FLEXIO1_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: FLEXSPI_CLK_ROOT.outFreq, value: 2160/11 MHz}
+- {id: GPT1_ipg_clk_highfreq.outFreq, value: 62.5 MHz}
+- {id: GPT2_ipg_clk_highfreq.outFreq, value: 62.5 MHz}
+- {id: IPG_CLK_ROOT.outFreq, value: 125 MHz}
+- {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz}
+- {id: LPSPI_CLK_ROOT.outFreq, value: 105.6 MHz}
+- {id: MQS_MCLK.outFreq, value: 1080/17 MHz}
+- {id: PERCLK_CLK_ROOT.outFreq, value: 62.5 MHz}
+- {id: SAI1_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK2.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK3.outFreq, value: 30 MHz}
+- {id: SAI2_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI2_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI2_MCLK3.outFreq, value: 30 MHz}
+- {id: SAI3_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK3.outFreq, value: 30 MHz}
+- {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: TRACE_CLK_ROOT.outFreq, value: 352/3 MHz}
+- {id: UART_CLK_ROOT.outFreq, value: 80 MHz}
+- {id: USBPHY1_CLK.outFreq, value: 480 MHz}
+settings:
+- {id: CCM.AHB_PODF.scale, value: '1', locked: true}
+- {id: CCM.ARM_PODF.scale, value: '1', locked: true}
+- {id: CCM.CLKO2_SEL.sel, value: CCM.LPI2C_CLK_ROOT}
+- {id: CCM.FLEXSPI_PODF.scale, value: '2', locked: true}
+- {id: CCM.FLEXSPI_SEL.sel, value: CCM_ANALOG.PLL3_PFD0_CLK}
+- {id: CCM.IPG_PODF.scale, value: '4'}
+- {id: CCM.LPSPI_PODF.scale, value: '5', locked: true}
+- {id: CCM.PERCLK_PODF.scale, value: '2', locked: true}
+- {id: CCM.PRE_PERIPH_CLK_SEL.sel, value: CCM.ARM_PODF}
+- {id: CCM.SEMC_PODF.scale, value: '2'}
+- {id: CCM.TRACE_PODF.scale, value: '3', locked: true}
+- {id: CCM_ANALOG.PLL2.denom, value: '1', locked: true}
+- {id: CCM_ANALOG.PLL2.num, value: '0', locked: true}
+- {id: CCM_ANALOG.PLL2_BYPASS.sel, value: CCM_ANALOG.PLL2_OUT_CLK}
+- {id: CCM_ANALOG.PLL2_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD0}
+- {id: CCM_ANALOG.PLL2_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD1}
+- {id: CCM_ANALOG.PLL2_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD2}
+- {id: CCM_ANALOG.PLL2_PFD2_DIV.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL2_PFD2_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL2_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD3}
+- {id: CCM_ANALOG.PLL2_PFD3_DIV.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL2_PFD3_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_BYPASS.sel, value: CCM_ANALOG.PLL3}
+- {id: CCM_ANALOG.PLL3_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD0}
+- {id: CCM_ANALOG.PLL3_PFD0_DIV.scale, value: '22', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD0_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD1}
+- {id: CCM_ANALOG.PLL3_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD2}
+- {id: CCM_ANALOG.PLL3_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD3}
+- {id: CCM_ANALOG.PLL3_PFD3_DIV.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD3_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL4.denom, value: '50'}
+- {id: CCM_ANALOG.PLL4.div, value: '47'}
+- {id: CCM_ANALOG.PLL6_BYPASS.sel, value: CCM_ANALOG.PLL6}
+- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB1_POWER_CFG, value: 'Yes'}
+sources:
+- {id: XTALOSC24M.RTC_OSC.outFreq, value: 32.768 kHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 1,                         /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
+        .numerator = 0,                           /* 30 bit numerator of fractional loop divider */
+        .denominator = 1,                         /* 30 bit denominator of fractional loop divider */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 0,                         /* PLL loop divider, Fout = Fin * 20 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN =
+    {
+        .enableClkOutput500M = true,              /* Enable the PLL providing the ENET 500MHz reference clock */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+/*******************************************************************************
+ * Code for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+void BOARD_BootClockRUN(void)
+{
+    /* Init RTC OSC clock frequency. */
+    CLOCK_SetRtcXtalFreq(32768U);
+    /* Enable 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK;
+    /* Use free 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK;
+    /* Set XTAL 24MHz clock frequency. */
+    CLOCK_SetXtalFreq(24000000U);
+    /* Enable XTAL 24MHz clock source. */
+    CLOCK_InitExternalClk(0);
+    /* Enable internal RC. */
+    CLOCK_InitRcOsc24M();
+    /* Switch clock source to external OSC. */
+    CLOCK_SwitchOsc(kCLOCK_XtalOsc);
+    /* Set Oscillator ready counter value. */
+    CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127);
+    /* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 1);     /* Set PERIPH_CLK MUX to PERIPH_CLK2 */
+    /* Setting the VDD_SOC to 1.25V. It is necessary to config AHB to 500Mhz. */
+    DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x12);
+    /* Waiting for DCDC_STS_DC_OK bit is asserted */
+    while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0))
+    {
+    }
+    /* Set AHB_PODF. */
+    CLOCK_SetDiv(kCLOCK_AhbDiv, 0);
+    /* Disable IPG clock gate. */
+    CLOCK_DisableClock(kCLOCK_Adc1);
+    CLOCK_DisableClock(kCLOCK_Xbar1);
+    CLOCK_DisableClock(kCLOCK_Xbar2);
+    /* Set IPG_PODF. */
+    CLOCK_SetDiv(kCLOCK_IpgDiv, 3);
+    /* Set ARM_PODF. */
+    CLOCK_SetDiv(kCLOCK_ArmDiv, 0);
+    /* Set PERIPH_CLK2_PODF. */
+    CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0);
+    /* Disable PERCLK clock gate. */
+    CLOCK_DisableClock(kCLOCK_Gpt1);
+    CLOCK_DisableClock(kCLOCK_Gpt1S);
+    CLOCK_DisableClock(kCLOCK_Gpt2);
+    CLOCK_DisableClock(kCLOCK_Gpt2S);
+    CLOCK_DisableClock(kCLOCK_Pit);
+    /* Set PERCLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_PerclkDiv, 1);
+    /* Set SEMC_PODF. */
+    CLOCK_SetDiv(kCLOCK_SemcDiv, 1);
+    /* Set Semc alt clock source. */
+    CLOCK_SetMux(kCLOCK_SemcAltMux, 0);
+    /* Set Semc clock source. */
+    CLOCK_SetMux(kCLOCK_SemcMux, 0);
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Disable Flexspi clock gate. */
+    CLOCK_DisableClock(kCLOCK_FlexSpi);
+    /* Set FLEXSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_FlexspiDiv, 1);
+    /* Set Flexspi clock source. */
+    CLOCK_SetMux(kCLOCK_FlexspiMux, 3);
+#endif
+    /* Disable LPSPI clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpspi1);
+    CLOCK_DisableClock(kCLOCK_Lpspi2);
+    /* Set LPSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_LpspiDiv, 4);
+    /* Set Lpspi clock source. */
+    CLOCK_SetMux(kCLOCK_LpspiMux, 2);
+    /* Disable TRACE clock gate. */
+    CLOCK_DisableClock(kCLOCK_Trace);
+    /* Set TRACE_PODF. */
+    CLOCK_SetDiv(kCLOCK_TraceDiv, 2);
+    /* Set Trace clock source. */
+    CLOCK_SetMux(kCLOCK_TraceMux, 2);
+    /* Disable SAI1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai1);
+    /* Set SAI1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3);
+    /* Set SAI1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai1Div, 1);
+    /* Set Sai1 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai1Mux, 0);
+    /* Disable SAI2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai2);
+    /* Set SAI2_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 3);
+    /* Set SAI2_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai2Div, 1);
+    /* Set Sai2 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai2Mux, 0);
+    /* Disable SAI3 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai3);
+    /* Set SAI3_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3);
+    /* Set SAI3_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai3Div, 1);
+    /* Set Sai3 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai3Mux, 0);
+    /* Disable Lpi2c clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpi2c1);
+    CLOCK_DisableClock(kCLOCK_Lpi2c2);
+    /* Set LPI2C_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0);
+    /* Set Lpi2c clock source. */
+    CLOCK_SetMux(kCLOCK_Lpi2cMux, 0);
+    /* Disable UART clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpuart1);
+    CLOCK_DisableClock(kCLOCK_Lpuart2);
+    CLOCK_DisableClock(kCLOCK_Lpuart3);
+    CLOCK_DisableClock(kCLOCK_Lpuart4);
+    /* Set UART_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+    /* Set Uart clock source. */
+    CLOCK_SetMux(kCLOCK_UartMux, 0);
+    /* Disable SPDIF clock gate. */
+    CLOCK_DisableClock(kCLOCK_Spdif);
+    /* Set SPDIF0_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1);
+    /* Set SPDIF0_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Spdif0Div, 7);
+    /* Set Spdif clock source. */
+    CLOCK_SetMux(kCLOCK_SpdifMux, 3);
+    /* Disable Flexio1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Flexio1);
+    /* Set FLEXIO1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1);
+    /* Set FLEXIO1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexio1Div, 7);
+    /* Set Flexio1 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexio1Mux, 3);
+    /* Set Pll3 sw clock source. */
+    CLOCK_SetMux(kCLOCK_Pll3SwMux, 0);
+    /* Init System PLL. */
+    CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
+    /* Init System pfd0. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
+    /* Init System pfd1. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
+    /* Init System pfd2. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd2, 18);
+    /* Init System pfd3. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd3, 18);
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Init Usb1 PLL. */
+    CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
+    /* Init Usb1 pfd0. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 22);
+    /* Init Usb1 pfd1. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
+    /* Init Usb1 pfd2. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
+    /* Init Usb1 pfd3. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 18);
+#endif
+    /* DeInit Audio PLL. */
+    CLOCK_DeinitAudioPll();
+    /* Bypass Audio PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1);
+    /* Set divider for Audio PLL. */
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK;
+    /* Enable Audio PLL output. */
+    CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK;
+    /* Init Enet PLL. */
+    CLOCK_InitEnetPll(&enetPllConfig_BOARD_BootClockRUN);
+    /* Set preperiph clock source. */
+    CLOCK_SetMux(kCLOCK_PrePeriphMux, 3);
+    /* Set periph clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 0);
+    /* Set periph clock2 clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
+    /* Set per clock source. */
+    CLOCK_SetMux(kCLOCK_PerclkMux, 0);
+    /* Set clock out1 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0);
+    /* Set clock out1 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1);
+    /* Set clock out2 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0);
+    /* Set clock out2 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(6);
+    /* Set clock out1 drives clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK;
+    /* Disable clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK;
+    /* Disable clock out2. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK;
+    /* Set SAI1 MCLK1 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0);
+    /* Set SAI1 MCLK2 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0);
+    /* Set SAI1 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0);
+    /* Set SAI2 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI2MClk3Sel, 0);
+    /* Set SAI3 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0);
+    /* Set MQS configuration. */
+    IOMUXC_MQSConfig(IOMUXC_GPR,kIOMUXC_MqsPwmOverSampleRate32, 0);
+    /* Set GPT1 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK;
+    /* Set GPT2 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK;
+    /* Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
+}
diff --git a/hw/bsp/imxrt/boards/mimxrt1015_evk/board/clock_config.h b/hw/bsp/imxrt/boards/mimxrt1015_evk/board/clock_config.h
new file mode 100644
index 000000000..2acdb16a7
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1015_evk/board/clock_config.h
@@ -0,0 +1,100 @@
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define BOARD_XTAL0_CLK_HZ                         24000000U  /*!< Board xtal0 frequency in Hz */
+
+#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32k frequency in Hz */
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKRUN_CORE_CLOCK             500000000U  /*!< Core clock frequency: 500000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT               500000000UL
+#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT         32768UL
+#define BOARD_BOOTCLOCKRUN_CLKO1_CLK                  0UL
+#define BOARD_BOOTCLOCKRUN_CLKO2_CLK                  0UL
+#define BOARD_BOOTCLOCKRUN_CLK_1M                     1000000UL
+#define BOARD_BOOTCLOCKRUN_CLK_24M                    24000000UL
+#define BOARD_BOOTCLOCKRUN_ENET_500M_REF_CLK          500000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT           30000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT           196363636UL
+#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ      62500000UL
+#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ      62500000UL
+#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT               125000000UL
+#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT             60000000UL
+#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT             105600000UL
+#define BOARD_BOOTCLOCKRUN_MQS_MCLK                   63529411UL
+#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT            62500000UL
+#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2                 0UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2                 0UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT            30000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT          0UL
+#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT             117333333UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT              80000000UL
+#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK                480000000UL
+
+/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
+/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
+ */
+extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
+/*! @brief Enet PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN;
+
+/*******************************************************************************
+ * API for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockRUN(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/imxrt/boards/mimxrt1015_evk/mimxrt1015_evk.mex b/hw/bsp/imxrt/boards/mimxrt1015_evk/mimxrt1015_evk.mex
new file mode 100644
index 000000000..431a59af7
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1015_evk/mimxrt1015_evk.mex
@@ -0,0 +1,576 @@
+<?xml version="1.0" encoding= "UTF-8" ?>
+<configuration name="MIMXRT1015-EVK" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_13 http://mcuxpresso.nxp.com/XSD/mex_configuration_13.xsd" uuid="4be4468a-3124-4ac9-9d4f-05d5f8ad6399" version="13" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_13" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+   <common>
+      <processor>MIMXRT1015xxxxx</processor>
+      <package>MIMXRT1015DAF5A</package>
+      <board>MIMXRT1015-EVK</board>
+      <board_revision>B</board_revision>
+      <mcu_data>ksdk2_0</mcu_data>
+      <cores selected="core0">
+         <core name="Cortex-M7F" id="core0" description="M7 core"/>
+      </cores>
+      <description></description>
+   </common>
+   <preferences>
+      <validate_boot_init_only>true</validate_boot_init_only>
+      <generate_extended_information>false</generate_extended_information>
+      <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
+      <update_include_paths>true</update_include_paths>
+      <generate_registers_defines>false</generate_registers_defines>
+   </preferences>
+   <tools>
+      <pins name="Pins" version="13.1" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/pin_mux.c" update_enabled="true"/>
+            <file path="board/pin_mux.h" update_enabled="true"/>
+         </generated_project_files>
+         <pins_profile>
+            <processor_version>13.0.2</processor_version>
+            <power_domains>
+               <power_domain name="NVCC_GPIO" value="3.3"/>
+            </power_domains>
+         </pins_profile>
+         <functions_list>
+            <function name="BOARD_InitPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins/>
+            </function>
+            <function name="BOARD_InitDEBUG_UARTPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 is not initialized" problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LPUART1" signal="RX" pin_num="68" pin_signal="GPIO_AD_B0_07"/>
+                  <pin peripheral="LPUART1" signal="TX" pin_num="72" pin_signal="GPIO_AD_B0_06"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitQSPIPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXSPI" description="Peripheral FLEXSPI is not initialized" problem_level="1" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_SCLK" pin_num="12" pin_signal="GPIO_SD_B1_07"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA0" pin_num="11" pin_signal="GPIO_SD_B1_08"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA1" pin_num="9" pin_signal="GPIO_SD_B1_10"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA2" pin_num="10" pin_signal="GPIO_SD_B1_09"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA3" pin_num="13" pin_signal="GPIO_SD_B1_06"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_SS0_B" pin_num="8" pin_signal="GPIO_SD_B1_11"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitLEDPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.igpio" description="Pins initialization requires the IGPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="GPIO3" signal="gpio_io, 21" pin_num="21" pin_signal="GPIO_SD_B1_01">
+                     <pin_features>
+                        <pin_feature name="direction" value="OUTPUT"/>
+                        <pin_feature name="gpio_init_state" value="true"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="open_drain" value="Disable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitBUTTONPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="GPIO2" description="Peripheral GPIO2 is not initialized" problem_level="1" source="Pins:BOARD_InitBUTTONPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.igpio" description="Pins initialization requires the IGPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="GPIO2" signal="gpio_io, 09" pin_num="1" pin_signal="GPIO_EMC_09">
+                     <pin_features>
+                        <pin_feature name="direction" value="INPUT"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="open_drain" value="Disable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_4"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitCOMBO_SENSORPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LPI2C1" description="Peripheral LPI2C1 is not initialized" problem_level="1" source="Pins:BOARD_InitCOMBO_SENSORPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitCOMBO_SENSORPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitCOMBO_SENSORPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LPI2C1" signal="SCL" pin_num="53" pin_signal="GPIO_AD_B1_14">
+                     <pin_features>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                        <pin_feature name="software_input_on" value="Enable"/>
+                        <pin_feature name="open_drain" value="Enable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_22K_Ohm"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LPI2C1" signal="SDA" pin_num="52" pin_signal="GPIO_AD_B1_15">
+                     <pin_features>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                        <pin_feature name="software_input_on" value="Enable"/>
+                        <pin_feature name="open_drain" value="Enable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_22K_Ohm"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+         </functions_list>
+      </pins>
+      <clocks name="Clocks" version="11.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/clock_config.c" update_enabled="true"/>
+            <file path="board/clock_config.h" update_enabled="true"/>
+         </generated_project_files>
+         <clocks_profile>
+            <processor_version>13.0.2</processor_version>
+         </clocks_profile>
+         <clock_configurations>
+            <clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Clocks initialization requires the IOMUXC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="XTALOSC24M.RTC_OSC.outFreq" value="32.768 kHz" locked="false" enabled="true"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="AHB_CLK_ROOT.outFreq" value="500 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CKIL_SYNC_CLK_ROOT.outFreq" value="32.768 kHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_1M.outFreq" value="1 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_24M.outFreq" value="24 MHz" locked="false" accuracy=""/>
+                  <clock_output id="ENET_500M_REF_CLK.outFreq" value="500 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXIO1_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXSPI_CLK_ROOT.outFreq" value="2160/11 MHz" locked="false" accuracy=""/>
+                  <clock_output id="GPT1_ipg_clk_highfreq.outFreq" value="62.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="GPT2_ipg_clk_highfreq.outFreq" value="62.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="IPG_CLK_ROOT.outFreq" value="125 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LPI2C_CLK_ROOT.outFreq" value="60 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LPSPI_CLK_ROOT.outFreq" value="105.6 MHz" locked="false" accuracy=""/>
+                  <clock_output id="MQS_MCLK.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="PERCLK_CLK_ROOT.outFreq" value="62.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK2.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SPDIF0_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="TRACE_CLK_ROOT.outFreq" value="352/3 MHz" locked="false" accuracy=""/>
+                  <clock_output id="UART_CLK_ROOT.outFreq" value="80 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USBPHY1_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="CCM.AHB_PODF.scale" value="1" locked="true"/>
+                  <setting id="CCM.ARM_PODF.scale" value="1" locked="true"/>
+                  <setting id="CCM.CLKO2_SEL.sel" value="CCM.LPI2C_CLK_ROOT" locked="false"/>
+                  <setting id="CCM.FLEXSPI_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.FLEXSPI_SEL.sel" value="CCM_ANALOG.PLL3_PFD0_CLK" locked="false"/>
+                  <setting id="CCM.IPG_PODF.scale" value="4" locked="false"/>
+                  <setting id="CCM.LPSPI_PODF.scale" value="5" locked="true"/>
+                  <setting id="CCM.PERCLK_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.PRE_PERIPH_CLK_SEL.sel" value="CCM.ARM_PODF" locked="false"/>
+                  <setting id="CCM.SEMC_PODF.scale" value="2" locked="false"/>
+                  <setting id="CCM.TRACE_PODF.scale" value="3" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2.denom" value="1" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2.num" value="0" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_BYPASS.sel" value="CCM_ANALOG.PLL2_OUT_CLK" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD2_DIV.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD2_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD3_DIV.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD3_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_BYPASS.sel" value="CCM_ANALOG.PLL3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_DIV.scale" value="22" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD3_DIV.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD3_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL4.denom" value="50" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL4.div" value="47" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL6_BYPASS.sel" value="CCM_ANALOG.PLL6" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_POWER_CFG" value="Yes" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>true</called_from_default_init>
+            </clock_configuration>
+         </clock_configurations>
+      </clocks>
+      <dcdx name="DCDx" version="3.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <dcdx_profile>
+            <processor_version>N/A</processor_version>
+         </dcdx_profile>
+         <dcdx_configurations/>
+      </dcdx>
+      <periphs name="Peripherals" version="12.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/peripherals.c" update_enabled="true"/>
+            <file path="board/peripherals.h" update_enabled="true"/>
+         </generated_project_files>
+         <peripherals_profile>
+            <processor_version>13.0.2</processor_version>
+         </peripherals_profile>
+         <functional_groups>
+            <functional_group name="BOARD_InitPeripherals" uuid="57fc488c-a9f7-4a03-8ab3-5d2a3fd16a50" called_from_default_init="true" id_prefix="" core="core0">
+               <description></description>
+               <options/>
+               <dependencies/>
+               <instances>
+                  <instance name="DEBUG_UART" uuid="600d7aee-5a2d-4373-9763-ce007b981c15" type="lpuart" type_id="lpuart_bebe3e12b6ec22bbd14199038f2bf459" mode="polling" peripheral="LPUART1" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="lpuartConfig_t" quick_selection="QuickSelection1">
+                        <struct name="lpuartConfig">
+                           <setting name="clockSource" value="LpuartClock"/>
+                           <setting name="lpuartSrcClkFreq" value="ClocksTool_DefaultInit"/>
+                           <setting name="baudRate_Bps" value="115200"/>
+                           <setting name="parityMode" value="kLPUART_ParityDisabled"/>
+                           <setting name="dataBitsCount" value="kLPUART_EightDataBits"/>
+                           <setting name="isMsb" value="false"/>
+                           <setting name="stopBitCount" value="kLPUART_OneStopBit"/>
+                           <setting name="txFifoWatermark" value="0"/>
+                           <setting name="rxFifoWatermark" value="1"/>
+                           <setting name="enableRxRTS" value="false"/>
+                           <setting name="enableTxCTS" value="false"/>
+                           <setting name="txCtsSource" value="kLPUART_CtsSourcePin"/>
+                           <setting name="txCtsConfig" value="kLPUART_CtsSampleAtStart"/>
+                           <setting name="rxIdleType" value="kLPUART_IdleTypeStartBit"/>
+                           <setting name="rxIdleConfig" value="kLPUART_IdleCharacter1"/>
+                           <setting name="enableTx" value="true"/>
+                           <setting name="enableRx" value="true"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="COMBO_SENSOR" uuid="96f9e552-25e5-434a-9454-5cf9e614733d" type="lpi2c" type_id="lpi2c_db68d4f4f06a22e25ab51fe9bd6db4d2" mode="master" peripheral="LPI2C1" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="main" quick_selection="qs_interrupt">
+                        <setting name="clockSource" value="Lpi2cClock"/>
+                        <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                        <struct name="interrupt">
+                           <setting name="IRQn" value="LPI2C1_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                     <config_set name="master" quick_selection="qs_master_transfer">
+                        <setting name="mode" value="transfer"/>
+                        <struct name="config">
+                           <setting name="enableMaster" value="true"/>
+                           <setting name="enableDoze" value="true"/>
+                           <setting name="debugEnable" value="false"/>
+                           <setting name="ignoreAck" value="false"/>
+                           <setting name="pinConfig" value="kLPI2C_2PinOpenDrain"/>
+                           <setting name="baudRate_Hz" value="100000"/>
+                           <setting name="busIdleTimeout_ns" value="0"/>
+                           <setting name="pinLowTimeout_ns" value="0"/>
+                           <setting name="sdaGlitchFilterWidth_ns" value="0"/>
+                           <setting name="sclGlitchFilterWidth_ns" value="0"/>
+                           <struct name="hostRequest">
+                              <setting name="enable" value="false"/>
+                              <setting name="source" value="kLPI2C_HostRequestExternalPin"/>
+                              <setting name="polarity" value="kLPI2C_HostRequestPinActiveHigh"/>
+                           </struct>
+                           <set name="edmaRequestSources">
+                              <selected/>
+                           </set>
+                        </struct>
+                        <struct name="transfer">
+                           <setting name="blocking" value="false"/>
+                           <setting name="enable_custom_handle" value="false"/>
+                           <struct name="callback">
+                              <setting name="name" value=""/>
+                              <setting name="userData" value=""/>
+                           </struct>
+                           <set name="flags">
+                              <selected/>
+                           </set>
+                           <setting name="slaveAddress" value="0"/>
+                           <setting name="direction" value="kLPI2C_Write"/>
+                           <setting name="subaddress" value="0"/>
+                           <setting name="subaddressSize" value="1"/>
+                           <setting name="blocking_buffer" value="false"/>
+                           <setting name="enable_custom_buffer" value="false"/>
+                           <setting name="dataSize" value="1"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="USER_LED" uuid="5592aac0-ced9-4284-88a8-bbeb5083a92f" type="igpio" type_id="igpio_b1c1fa279aa7069dca167502b8589cb7" mode="GPIO" peripheral="GPIO3" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="fsl_gpio">
+                        <setting name="enable_irq_comb_0_15" value="false"/>
+                        <struct name="gpio_interrupt_comb_0_15">
+                           <setting name="IRQn" value="GPIO3_Combined_0_15_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                        <setting name="enable_irq_comb_16_31" value="false"/>
+                        <struct name="gpio_interrupt_comb_16_31">
+                           <setting name="IRQn" value="GPIO3_Combined_16_31_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="USER_BUTTON" uuid="e7774953-3606-41b8-8b72-6e09025369e0" type="igpio" type_id="igpio_b1c1fa279aa7069dca167502b8589cb7" mode="GPIO" peripheral="GPIO2" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="fsl_gpio">
+                        <setting name="enable_irq_comb_0_15" value="false"/>
+                        <struct name="gpio_interrupt_comb_0_15">
+                           <setting name="IRQn" value="GPIO2_Combined_0_15_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                        <setting name="enable_irq_comb_16_31" value="false"/>
+                        <struct name="gpio_interrupt_comb_16_31">
+                           <setting name="IRQn" value="GPIO2_Combined_16_31_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="NVIC" uuid="0329fbca-00e5-4ec4-9f79-3cb65a7b267a" type="nvic" type_id="nvic_57b5eef3774cc60acaede6f5b8bddc67" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="nvic">
+                        <array name="interrupt_table"/>
+                        <array name="interrupts"/>
+                     </config_set>
+                  </instance>
+               </instances>
+            </functional_group>
+         </functional_groups>
+         <components>
+            <component name="system" uuid="59cf1b09-8396-4bf9-bed6-03d5457c292f" type_id="system_54b53072540eeeb8f8e9343e71f28176">
+               <config_set_global name="global_system_definitions">
+                  <setting name="user_definitions" value=""/>
+                  <setting name="user_includes" value=""/>
+               </config_set_global>
+            </component>
+            <component name="msg" uuid="7d589e9f-7522-408c-b7c8-42770920766f" type_id="msg_6e2baaf3b97dbeef01c0043275f9a0e7">
+               <config_set_global name="global_messages"/>
+            </component>
+            <component name="gpio_adapter_common" uuid="e9da5e16-1f55-49be-87ec-af8cfd4a4105" type_id="gpio_adapter_common_57579b9ac814fe26bf95df0a384c36b6">
+               <config_set_global name="global_gpio_adapter_common" quick_selection="default"/>
+            </component>
+            <component name="generic_uart" uuid="9dc7a034-9408-4852-9990-a713693635ee" type_id="generic_uart_8cae00565451cf2346eb1b8c624e73a6">
+               <config_set_global name="global_uart"/>
+            </component>
+            <component name="generic_can" uuid="28ec81a8-d7ea-4363-9330-20b877c481f6" type_id="generic_can_1bfdd78b1af214566c1f23cf6a582d80">
+               <config_set_global name="global_can"/>
+            </component>
+            <component name="uart_cmsis_common" uuid="774dd0a0-63ed-4846-b9d7-dfd082d810e3" type_id="uart_cmsis_common_9cb8e302497aa696fdbb5a4fd622c2a8">
+               <config_set_global name="global_USART_CMSIS_common" quick_selection="default"/>
+            </component>
+            <component name="generic_enet" uuid="77cd333e-4adc-4c6e-8b18-bbe349d78182" type_id="generic_enet_74db5c914f0ddbe47d86af40cb77a619">
+               <config_set_global name="global_enet"/>
+            </component>
+         </components>
+      </periphs>
+      <tee name="TEE" version="4.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <tee_profile>
+            <processor_version>N/A</processor_version>
+         </tee_profile>
+      </tee>
+   </tools>
+</configuration>
diff --git a/hw/bsp/imxrt/boards/mimxrt1020_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1020_evk/board.cmake
index 1696dc987..39c94147c 100644
--- a/hw/bsp/imxrt/boards/mimxrt1020_evk/board.cmake
+++ b/hw/bsp/imxrt/boards/mimxrt1020_evk/board.cmake
@@ -1,6 +1,6 @@
 set(MCU_VARIANT MIMXRT1021)
 
-set(JLINK_DEVICE MIMXRT1021DAG5A)
+set(JLINK_DEVICE MIMXRT1021xxx5A)
 set(PYOCD_TARGET mimxrt1020)
 set(NXPLINK_DEVICE MIMXRT1021xxxxx:EVK-MIMXRT1020)
 
diff --git a/hw/bsp/imxrt/boards/mimxrt1020_evk/board.mk b/hw/bsp/imxrt/boards/mimxrt1020_evk/board.mk
index b15da1b67..e269c8ac5 100644
--- a/hw/bsp/imxrt/boards/mimxrt1020_evk/board.mk
+++ b/hw/bsp/imxrt/boards/mimxrt1020_evk/board.mk
@@ -2,7 +2,7 @@ CFLAGS += -DCPU_MIMXRT1021DAG5A
 MCU_VARIANT = MIMXRT1021
 
 # For flash-jlink target
-JLINK_DEVICE = MIMXRT1021DAG5A
+JLINK_DEVICE = MIMXRT1021xxx5A
 
 # For flash-pyocd target
 PYOCD_TARGET = mimxrt1020
diff --git a/hw/bsp/imxrt/boards/mimxrt1020_evk/board/clock_config.c b/hw/bsp/imxrt/boards/mimxrt1020_evk/board/clock_config.c
new file mode 100644
index 000000000..764042928
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1020_evk/board/clock_config.c
@@ -0,0 +1,421 @@
+/*
+ * How to setup clock using clock driver functions:
+ *
+ * 1. Call CLOCK_InitXXXPLL() to configure corresponding PLL clock.
+ *
+ * 2. Call CLOCK_InitXXXpfd() to configure corresponding PLL pfd clock.
+ *
+ * 3. Call CLOCK_SetMux() to configure corresponding clock source for target clock out.
+ *
+ * 4. Call CLOCK_SetDiv() to configure corresponding clock divider for target clock out.
+ *
+ * 5. Call CLOCK_SetXtalFreq() to set XTAL frequency based on board settings.
+ *
+ */
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v11.0
+processor: MIMXRT1021xxxxx
+package_id: MIMXRT1021DAG5A
+mcu_data: ksdk2_0
+processor_version: 13.0.2
+board: MIMXRT1020-EVK
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+#include "clock_config.h"
+#include "fsl_iomuxc.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockRUN();
+}
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockRUN
+called_from_default_init: true
+outputs:
+- {id: AHB_CLK_ROOT.outFreq, value: 500 MHz}
+- {id: CAN_CLK_ROOT.outFreq, value: 40 MHz}
+- {id: CKIL_SYNC_CLK_ROOT.outFreq, value: 32.768 kHz}
+- {id: CLK_1M.outFreq, value: 1 MHz}
+- {id: CLK_24M.outFreq, value: 24 MHz}
+- {id: ENET_500M_REF_CLK.outFreq, value: 500 MHz}
+- {id: FLEXIO1_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: FLEXSPI_CLK_ROOT.outFreq, value: 132 MHz}
+- {id: GPT1_ipg_clk_highfreq.outFreq, value: 62.5 MHz}
+- {id: GPT2_ipg_clk_highfreq.outFreq, value: 62.5 MHz}
+- {id: IPG_CLK_ROOT.outFreq, value: 125 MHz}
+- {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz}
+- {id: LPSPI_CLK_ROOT.outFreq, value: 105.6 MHz}
+- {id: MQS_MCLK.outFreq, value: 1080/17 MHz}
+- {id: PERCLK_CLK_ROOT.outFreq, value: 62.5 MHz}
+- {id: SAI1_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK2.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK3.outFreq, value: 30 MHz}
+- {id: SAI2_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI2_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI2_MCLK3.outFreq, value: 30 MHz}
+- {id: SAI3_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK3.outFreq, value: 30 MHz}
+- {id: SEMC_CLK_ROOT.outFreq, value: 62.5 MHz}
+- {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: TRACE_CLK_ROOT.outFreq, value: 132 MHz}
+- {id: UART_CLK_ROOT.outFreq, value: 80 MHz}
+- {id: USBPHY1_CLK.outFreq, value: 480 MHz}
+- {id: USDHC1_CLK_ROOT.outFreq, value: 176 MHz}
+- {id: USDHC2_CLK_ROOT.outFreq, value: 176 MHz}
+settings:
+- {id: CCM.AHB_PODF.scale, value: '1', locked: true}
+- {id: CCM.ARM_PODF.scale, value: '1', locked: true}
+- {id: CCM.FLEXSPI_PODF.scale, value: '4', locked: true}
+- {id: CCM.FLEXSPI_SEL.sel, value: CCM_ANALOG.PLL2_PFD2_CLK}
+- {id: CCM.IPG_PODF.scale, value: '4'}
+- {id: CCM.LPSPI_PODF.scale, value: '5', locked: true}
+- {id: CCM.PERCLK_PODF.scale, value: '2', locked: true}
+- {id: CCM.PRE_PERIPH_CLK_SEL.sel, value: CCM.ARM_PODF}
+- {id: CCM.SEMC_PODF.scale, value: '8'}
+- {id: CCM.TRACE_CLK_SEL.sel, value: CCM_ANALOG.PLL2_MAIN_CLK}
+- {id: CCM.TRACE_PODF.scale, value: '4', locked: true}
+- {id: CCM.USDHC1_PODF.scale, value: '3', locked: true}
+- {id: CCM.USDHC2_PODF.scale, value: '3', locked: true}
+- {id: CCM_ANALOG.PLL2.denom, value: '1', locked: true}
+- {id: CCM_ANALOG.PLL2.num, value: '0', locked: true}
+- {id: CCM_ANALOG.PLL2_BYPASS.sel, value: CCM_ANALOG.PLL2_OUT_CLK}
+- {id: CCM_ANALOG.PLL2_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD0}
+- {id: CCM_ANALOG.PLL2_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD1}
+- {id: CCM_ANALOG.PLL2_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD2}
+- {id: CCM_ANALOG.PLL2_PFD2_DIV.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL2_PFD2_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL2_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD3}
+- {id: CCM_ANALOG.PLL2_PFD3_DIV.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL2_PFD3_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_BYPASS.sel, value: CCM_ANALOG.PLL3}
+- {id: CCM_ANALOG.PLL3_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD0}
+- {id: CCM_ANALOG.PLL3_PFD0_DIV.scale, value: '22', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD0_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD1}
+- {id: CCM_ANALOG.PLL3_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD2}
+- {id: CCM_ANALOG.PLL3_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD3}
+- {id: CCM_ANALOG.PLL3_PFD3_DIV.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD3_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL4.denom, value: '50'}
+- {id: CCM_ANALOG.PLL4.div, value: '47'}
+- {id: CCM_ANALOG.PLL6_BYPASS.sel, value: CCM_ANALOG.PLL6}
+- {id: CCM_ANALOG_PLL_ENET_ENABLE_CFG, value: Disabled}
+- {id: CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_CFG, value: Disabled}
+- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB1_POWER_CFG, value: 'Yes'}
+sources:
+- {id: XTALOSC24M.RTC_OSC.outFreq, value: 32.768 kHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 1,                         /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
+        .numerator = 0,                           /* 30 bit numerator of fractional loop divider */
+        .denominator = 1,                         /* 30 bit denominator of fractional loop divider */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 0,                         /* PLL loop divider, Fout = Fin * 20 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN =
+    {
+        .enableClkOutput = false,                 /* Disable the PLL providing the ENET 125MHz reference clock */
+        .enableClkOutput500M = true,              /* Enable the PLL providing the ENET 500MHz reference clock */
+        .enableClkOutput25M = false,              /* Disable the PLL providing the ENET 25MHz reference clock */
+        .loopDivider = 1,                         /* Set frequency of ethernet reference clock to 50 MHz */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+/*******************************************************************************
+ * Code for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+void BOARD_BootClockRUN(void)
+{
+    /* Init RTC OSC clock frequency. */
+    CLOCK_SetRtcXtalFreq(32768U);
+    /* Enable 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK;
+    /* Use free 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK;
+    /* Set XTAL 24MHz clock frequency. */
+    CLOCK_SetXtalFreq(24000000U);
+    /* Enable XTAL 24MHz clock source. */
+    CLOCK_InitExternalClk(0);
+    /* Enable internal RC. */
+    CLOCK_InitRcOsc24M();
+    /* Switch clock source to external OSC. */
+    CLOCK_SwitchOsc(kCLOCK_XtalOsc);
+    /* Set Oscillator ready counter value. */
+    CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127);
+    /* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 1);     /* Set PERIPH_CLK MUX to PERIPH_CLK2 */
+    /* Setting the VDD_SOC to 1.25V. It is necessary to config AHB to 500Mhz. */
+    DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x12);
+    /* Waiting for DCDC_STS_DC_OK bit is asserted */
+    while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0))
+    {
+    }
+    /* Set AHB_PODF. */
+    CLOCK_SetDiv(kCLOCK_AhbDiv, 0);
+    /* Disable IPG clock gate. */
+    CLOCK_DisableClock(kCLOCK_Adc1);
+    CLOCK_DisableClock(kCLOCK_Adc2);
+    CLOCK_DisableClock(kCLOCK_Xbar1);
+    CLOCK_DisableClock(kCLOCK_Xbar2);
+    /* Set IPG_PODF. */
+    CLOCK_SetDiv(kCLOCK_IpgDiv, 3);
+    /* Set ARM_PODF. */
+    CLOCK_SetDiv(kCLOCK_ArmDiv, 0);
+    /* Set PERIPH_CLK2_PODF. */
+    CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0);
+    /* Disable PERCLK clock gate. */
+    CLOCK_DisableClock(kCLOCK_Gpt1);
+    CLOCK_DisableClock(kCLOCK_Gpt1S);
+    CLOCK_DisableClock(kCLOCK_Gpt2);
+    CLOCK_DisableClock(kCLOCK_Gpt2S);
+    CLOCK_DisableClock(kCLOCK_Pit);
+    /* Set PERCLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_PerclkDiv, 1);
+    /* Disable USDHC1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Usdhc1);
+    /* Set USDHC1_PODF. */
+    CLOCK_SetDiv(kCLOCK_Usdhc1Div, 2);
+    /* Set Usdhc1 clock source. */
+    CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0);
+    /* Disable USDHC2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Usdhc2);
+    /* Set USDHC2_PODF. */
+    CLOCK_SetDiv(kCLOCK_Usdhc2Div, 2);
+    /* Set Usdhc2 clock source. */
+    CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0);
+    /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
+     * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
+#ifndef SKIP_SYSCLK_INIT
+    /* Disable Semc clock gate. */
+    CLOCK_DisableClock(kCLOCK_Semc);
+    /* Set SEMC_PODF. */
+    CLOCK_SetDiv(kCLOCK_SemcDiv, 7);
+    /* Set Semc alt clock source. */
+    CLOCK_SetMux(kCLOCK_SemcAltMux, 0);
+    /* Set Semc clock source. */
+    CLOCK_SetMux(kCLOCK_SemcMux, 0);
+#endif
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Disable Flexspi clock gate. */
+    CLOCK_DisableClock(kCLOCK_FlexSpi);
+    /* Set FLEXSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_FlexspiDiv, 3);
+    /* Set Flexspi clock source. */
+    CLOCK_SetMux(kCLOCK_FlexspiMux, 2);
+#endif
+    /* Disable LPSPI clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpspi1);
+    CLOCK_DisableClock(kCLOCK_Lpspi2);
+    CLOCK_DisableClock(kCLOCK_Lpspi3);
+    CLOCK_DisableClock(kCLOCK_Lpspi4);
+    /* Set LPSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_LpspiDiv, 4);
+    /* Set Lpspi clock source. */
+    CLOCK_SetMux(kCLOCK_LpspiMux, 2);
+    /* Disable TRACE clock gate. */
+    CLOCK_DisableClock(kCLOCK_Trace);
+    /* Set TRACE_PODF. */
+    CLOCK_SetDiv(kCLOCK_TraceDiv, 3);
+    /* Set Trace clock source. */
+    CLOCK_SetMux(kCLOCK_TraceMux, 0);
+    /* Disable SAI1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai1);
+    /* Set SAI1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3);
+    /* Set SAI1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai1Div, 1);
+    /* Set Sai1 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai1Mux, 0);
+    /* Disable SAI2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai2);
+    /* Set SAI2_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 3);
+    /* Set SAI2_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai2Div, 1);
+    /* Set Sai2 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai2Mux, 0);
+    /* Disable SAI3 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai3);
+    /* Set SAI3_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3);
+    /* Set SAI3_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai3Div, 1);
+    /* Set Sai3 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai3Mux, 0);
+    /* Disable Lpi2c clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpi2c1);
+    CLOCK_DisableClock(kCLOCK_Lpi2c2);
+    CLOCK_DisableClock(kCLOCK_Lpi2c3);
+    /* Set LPI2C_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0);
+    /* Set Lpi2c clock source. */
+    CLOCK_SetMux(kCLOCK_Lpi2cMux, 0);
+    /* Disable CAN clock gate. */
+    CLOCK_DisableClock(kCLOCK_Can1);
+    CLOCK_DisableClock(kCLOCK_Can2);
+    CLOCK_DisableClock(kCLOCK_Can1S);
+    CLOCK_DisableClock(kCLOCK_Can2S);
+    /* Set CAN_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_CanDiv, 1);
+    /* Set Can clock source. */
+    CLOCK_SetMux(kCLOCK_CanMux, 2);
+    /* Disable UART clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpuart1);
+    CLOCK_DisableClock(kCLOCK_Lpuart2);
+    CLOCK_DisableClock(kCLOCK_Lpuart3);
+    CLOCK_DisableClock(kCLOCK_Lpuart4);
+    CLOCK_DisableClock(kCLOCK_Lpuart5);
+    CLOCK_DisableClock(kCLOCK_Lpuart6);
+    CLOCK_DisableClock(kCLOCK_Lpuart7);
+    CLOCK_DisableClock(kCLOCK_Lpuart8);
+    /* Set UART_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+    /* Set Uart clock source. */
+    CLOCK_SetMux(kCLOCK_UartMux, 0);
+    /* Disable SPDIF clock gate. */
+    CLOCK_DisableClock(kCLOCK_Spdif);
+    /* Set SPDIF0_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1);
+    /* Set SPDIF0_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Spdif0Div, 7);
+    /* Set Spdif clock source. */
+    CLOCK_SetMux(kCLOCK_SpdifMux, 3);
+    /* Disable Flexio1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Flexio1);
+    /* Set FLEXIO1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1);
+    /* Set FLEXIO1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexio1Div, 7);
+    /* Set Flexio1 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexio1Mux, 3);
+    /* Set Pll3 sw clock source. */
+    CLOCK_SetMux(kCLOCK_Pll3SwMux, 0);
+    /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
+     * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
+#ifndef SKIP_SYSCLK_INIT
+#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1)
+    #warning "SKIP_SYSCLK_INIT should be defined to keep system pll (selected to be SEMC source clock in SDK projects) unchanged."
+#endif
+    /* Init System PLL. */
+    CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
+    /* Init System pfd0. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
+    /* Init System pfd1. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
+    /* Init System pfd2. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd2, 18);
+    /* Init System pfd3. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd3, 18);
+#endif
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Init Usb1 PLL. */
+    CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
+    /* Init Usb1 pfd0. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 22);
+    /* Init Usb1 pfd1. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
+    /* Init Usb1 pfd2. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
+    /* Init Usb1 pfd3. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 18);
+#endif
+    /* DeInit Audio PLL. */
+    CLOCK_DeinitAudioPll();
+    /* Bypass Audio PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1);
+    /* Set divider for Audio PLL. */
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK;
+    /* Enable Audio PLL output. */
+    CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK;
+    /* Init Enet PLL. */
+    CLOCK_InitEnetPll(&enetPllConfig_BOARD_BootClockRUN);
+    /* Set preperiph clock source. */
+    CLOCK_SetMux(kCLOCK_PrePeriphMux, 3);
+    /* Set periph clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 0);
+    /* Set periph clock2 clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
+    /* Set per clock source. */
+    CLOCK_SetMux(kCLOCK_PerclkMux, 0);
+    /* Set clock out1 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0);
+    /* Set clock out1 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1);
+    /* Set clock out2 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0);
+    /* Set clock out2 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(3);
+    /* Set clock out1 drives clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK;
+    /* Disable clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK;
+    /* Disable clock out2. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK;
+    /* Set SAI1 MCLK1 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0);
+    /* Set SAI1 MCLK2 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0);
+    /* Set SAI1 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0);
+    /* Set SAI2 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI2MClk3Sel, 0);
+    /* Set SAI3 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0);
+    /* Set MQS configuration. */
+    IOMUXC_MQSConfig(IOMUXC_GPR,kIOMUXC_MqsPwmOverSampleRate32, 0);
+    /* Set ENET Ref clock source. */
+#if defined(IOMUXC_GPR_GPR1_ENET_REF_CLK_DIR_MASK)
+    IOMUXC_GPR->GPR1 &= ~IOMUXC_GPR_GPR1_ENET_REF_CLK_DIR_MASK;
+#elif defined(IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK)
+    /* Backward compatibility for original bitfield name */
+    IOMUXC_GPR->GPR1 &= ~IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK;
+#else
+#error "Neither IOMUXC_GPR_GPR1_ENET_REF_CLK_DIR_MASK nor IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK is defined."
+#endif /* defined(IOMUXC_GPR_GPR1_ENET_REF_CLK_DIR_MASK) */
+    /* Set GPT1 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK;
+    /* Set GPT2 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK;
+    /* Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
+}
diff --git a/hw/bsp/imxrt/boards/mimxrt1020_evk/board/clock_config.h b/hw/bsp/imxrt/boards/mimxrt1020_evk/board/clock_config.h
new file mode 100644
index 000000000..d678a4f66
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1020_evk/board/clock_config.h
@@ -0,0 +1,108 @@
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define BOARD_XTAL0_CLK_HZ                         24000000U  /*!< Board xtal0 frequency in Hz */
+
+#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32k frequency in Hz */
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKRUN_CORE_CLOCK             500000000U  /*!< Core clock frequency: 500000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT               500000000UL
+#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT               40000000UL
+#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT         32768UL
+#define BOARD_BOOTCLOCKRUN_CLKO1_CLK                  0UL
+#define BOARD_BOOTCLOCKRUN_CLKO2_CLK                  0UL
+#define BOARD_BOOTCLOCKRUN_CLK_1M                     1000000UL
+#define BOARD_BOOTCLOCKRUN_CLK_24M                    24000000UL
+#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK              0UL
+#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK           0UL
+#define BOARD_BOOTCLOCKRUN_ENET_500M_REF_CLK          500000000UL
+#define BOARD_BOOTCLOCKRUN_ENET_REF_CLK               0UL
+#define BOARD_BOOTCLOCKRUN_ENET_TX_CLK                0UL
+#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT           30000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT           132000000UL
+#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ      62500000UL
+#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ      62500000UL
+#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT               125000000UL
+#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT             60000000UL
+#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT             105600000UL
+#define BOARD_BOOTCLOCKRUN_MQS_MCLK                   63529411UL
+#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT            62500000UL
+#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2                 0UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2                 0UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT              62500000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT            30000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT          0UL
+#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT             132000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT              80000000UL
+#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK                480000000UL
+#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT            176000000UL
+#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT            176000000UL
+
+/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
+/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
+ */
+extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
+/*! @brief Enet PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN;
+
+/*******************************************************************************
+ * API for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockRUN(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/imxrt/boards/mimxrt1020_evk/mimxrt1020_evk.mex b/hw/bsp/imxrt/boards/mimxrt1020_evk/mimxrt1020_evk.mex
new file mode 100644
index 000000000..4ddaaed77
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1020_evk/mimxrt1020_evk.mex
@@ -0,0 +1,597 @@
+<?xml version="1.0" encoding= "UTF-8" ?>
+<configuration name="MIMXRT1020-EVK" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_13 http://mcuxpresso.nxp.com/XSD/mex_configuration_13.xsd" uuid="a558cc6e-82c2-41f9-9f55-0348efc7896f" version="13" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_13" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+   <common>
+      <processor>MIMXRT1021xxxxx</processor>
+      <package>MIMXRT1021DAG5A</package>
+      <board>MIMXRT1020-EVK</board>
+      <board_revision>A3</board_revision>
+      <mcu_data>ksdk2_0</mcu_data>
+      <cores selected="core0">
+         <core name="Cortex-M7F" id="core0" description="M7 core"/>
+      </cores>
+      <description></description>
+   </common>
+   <preferences>
+      <validate_boot_init_only>false</validate_boot_init_only>
+      <generate_extended_information>false</generate_extended_information>
+      <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
+      <update_include_paths>true</update_include_paths>
+      <generate_registers_defines>false</generate_registers_defines>
+   </preferences>
+   <tools>
+      <pins name="Pins" version="13.1" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/pin_mux.c" update_enabled="true"/>
+            <file path="board/pin_mux.h" update_enabled="true"/>
+         </generated_project_files>
+         <pins_profile>
+            <processor_version>13.0.2</processor_version>
+            <external_user_signals>
+               <properties/>
+            </external_user_signals>
+            <power_domains>
+               <power_domain name="NVCC_GPIO" value="3.3"/>
+            </power_domains>
+         </pins_profile>
+         <functions_list>
+            <function name="BOARD_InitPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins/>
+            </function>
+            <function name="BOARD_InitDEBUG_UARTPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 is not initialized" problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LPUART1" signal="RX" pin_num="101" pin_signal="GPIO_AD_B0_07"/>
+                  <pin peripheral="LPUART1" signal="TX" pin_num="105" pin_signal="GPIO_AD_B0_06"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitSDRAMPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="SEMC" description="Peripheral SEMC is not initialized" problem_level="1" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="SEMC" signal="ADDR, 00" pin_num="142" pin_signal="GPIO_EMC_16"/>
+                  <pin peripheral="SEMC" signal="ADDR, 01" pin_num="141" pin_signal="GPIO_EMC_17"/>
+                  <pin peripheral="SEMC" signal="ADDR, 02" pin_num="140" pin_signal="GPIO_EMC_18"/>
+                  <pin peripheral="SEMC" signal="ADDR, 03" pin_num="139" pin_signal="GPIO_EMC_19"/>
+                  <pin peripheral="SEMC" signal="ADDR, 04" pin_num="138" pin_signal="GPIO_EMC_20"/>
+                  <pin peripheral="SEMC" signal="ADDR, 06" pin_num="136" pin_signal="GPIO_EMC_22"/>
+                  <pin peripheral="SEMC" signal="ADDR, 05" pin_num="137" pin_signal="GPIO_EMC_21"/>
+                  <pin peripheral="SEMC" signal="ADDR, 07" pin_num="133" pin_signal="GPIO_EMC_23"/>
+                  <pin peripheral="SEMC" signal="ADDR, 08" pin_num="132" pin_signal="GPIO_EMC_24"/>
+                  <pin peripheral="SEMC" signal="ADDR, 09" pin_num="131" pin_signal="GPIO_EMC_25"/>
+                  <pin peripheral="SEMC" signal="ADDR, 10" pin_num="143" pin_signal="GPIO_EMC_15"/>
+                  <pin peripheral="SEMC" signal="ADDR, 11" pin_num="130" pin_signal="GPIO_EMC_26"/>
+                  <pin peripheral="SEMC" signal="ADDR, 12" pin_num="129" pin_signal="GPIO_EMC_27"/>
+                  <pin peripheral="SEMC" signal="BA, 0" pin_num="2" pin_signal="GPIO_EMC_13"/>
+                  <pin peripheral="SEMC" signal="BA, 1" pin_num="1" pin_signal="GPIO_EMC_14"/>
+                  <pin peripheral="SEMC" signal="semc_cas" pin_num="7" pin_signal="GPIO_EMC_10"/>
+                  <pin peripheral="SEMC" signal="semc_cke" pin_num="127" pin_signal="GPIO_EMC_29"/>
+                  <pin peripheral="SEMC" signal="semc_clk" pin_num="126" pin_signal="GPIO_EMC_30"/>
+                  <pin peripheral="SEMC" signal="CS, 0" pin_num="3" pin_signal="GPIO_EMC_12"/>
+                  <pin peripheral="SEMC" signal="semc_we" pin_num="8" pin_signal="GPIO_EMC_09"/>
+                  <pin peripheral="SEMC" signal="semc_ras" pin_num="4" pin_signal="GPIO_EMC_11"/>
+                  <pin peripheral="SEMC" signal="semc_dqs" pin_num="128" pin_signal="GPIO_EMC_28"/>
+                  <pin peripheral="SEMC" signal="DM, 1" pin_num="125" pin_signal="GPIO_EMC_31"/>
+                  <pin peripheral="SEMC" signal="DM, 0" pin_num="9" pin_signal="GPIO_EMC_08"/>
+                  <pin peripheral="SEMC" signal="DATA, 15" pin_num="117" pin_signal="GPIO_EMC_39"/>
+                  <pin peripheral="SEMC" signal="DATA, 14" pin_num="118" pin_signal="GPIO_EMC_38"/>
+                  <pin peripheral="SEMC" signal="DATA, 13" pin_num="119" pin_signal="GPIO_EMC_37"/>
+                  <pin peripheral="SEMC" signal="DATA, 12" pin_num="120" pin_signal="GPIO_EMC_36"/>
+                  <pin peripheral="SEMC" signal="DATA, 10" pin_num="122" pin_signal="GPIO_EMC_34"/>
+                  <pin peripheral="SEMC" signal="DATA, 11" pin_num="121" pin_signal="GPIO_EMC_35"/>
+                  <pin peripheral="SEMC" signal="DATA, 09" pin_num="123" pin_signal="GPIO_EMC_33"/>
+                  <pin peripheral="SEMC" signal="DATA, 08" pin_num="124" pin_signal="GPIO_EMC_32"/>
+                  <pin peripheral="SEMC" signal="DATA, 07" pin_num="10" pin_signal="GPIO_EMC_07"/>
+                  <pin peripheral="SEMC" signal="DATA, 06" pin_num="12" pin_signal="GPIO_EMC_06"/>
+                  <pin peripheral="SEMC" signal="DATA, 05" pin_num="13" pin_signal="GPIO_EMC_05"/>
+                  <pin peripheral="SEMC" signal="DATA, 04" pin_num="14" pin_signal="GPIO_EMC_04"/>
+                  <pin peripheral="SEMC" signal="DATA, 03" pin_num="15" pin_signal="GPIO_EMC_03"/>
+                  <pin peripheral="SEMC" signal="DATA, 02" pin_num="16" pin_signal="GPIO_EMC_02"/>
+                  <pin peripheral="SEMC" signal="DATA, 01" pin_num="17" pin_signal="GPIO_EMC_01"/>
+                  <pin peripheral="SEMC" signal="DATA, 00" pin_num="18" pin_signal="GPIO_EMC_00"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitCANPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="CAN1" description="Peripheral CAN1 is not initialized" problem_level="1" source="Pins:BOARD_InitCANPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitCANPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitCANPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="CAN1" signal="RX" pin_num="32" pin_signal="GPIO_SD_B1_01"/>
+                  <pin peripheral="CAN1" signal="TX" pin_num="33" pin_signal="GPIO_SD_B1_00"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitENETPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="ENET" description="Peripheral ENET is not initialized" problem_level="1" source="Pins:BOARD_InitENETPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitENETPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitENETPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="ENET" signal="enet_rx_en" pin_num="97" pin_signal="GPIO_AD_B0_11"/>
+                  <pin peripheral="GPIO1" signal="gpio_io, 22" pin_num="84" pin_signal="GPIO_AD_B1_06"/>
+                  <pin peripheral="GPIO1" signal="gpio_io, 04" pin_num="107" pin_signal="GPIO_AD_B0_04"/>
+                  <pin peripheral="ENET" signal="enet_tx_clk" pin_num="100" pin_signal="GPIO_AD_B0_08"/>
+                  <pin peripheral="ENET" signal="enet_tx_en" pin_num="95" pin_signal="GPIO_AD_B0_13"/>
+                  <pin peripheral="ENET" signal="enet_tx_data, 1" pin_num="93" pin_signal="GPIO_AD_B0_15"/>
+                  <pin peripheral="ENET" signal="enet_tx_data, 0" pin_num="94" pin_signal="GPIO_AD_B0_14"/>
+                  <pin peripheral="ENET" signal="enet_rx_er" pin_num="96" pin_signal="GPIO_AD_B0_12"/>
+                  <pin peripheral="ENET" signal="enet_rx_data, 1" pin_num="99" pin_signal="GPIO_AD_B0_09"/>
+                  <pin peripheral="ENET" signal="enet_rx_data, 0" pin_num="98" pin_signal="GPIO_AD_B0_10"/>
+                  <pin peripheral="ENET" signal="enet_mdio" pin_num="116" pin_signal="GPIO_EMC_40"/>
+                  <pin peripheral="ENET" signal="enet_mdc" pin_num="115" pin_signal="GPIO_EMC_41"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitUSDHCPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="USDHC1" description="Peripheral USDHC1 is not initialized" problem_level="1" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="USDHC1" signal="usdhc_clk" pin_num="45" pin_signal="GPIO_SD_B0_03"/>
+                  <pin peripheral="USDHC1" signal="usdhc_cmd" pin_num="46" pin_signal="GPIO_SD_B0_02"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 0" pin_num="43" pin_signal="GPIO_SD_B0_04"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 1" pin_num="42" pin_signal="GPIO_SD_B0_05"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 2" pin_num="48" pin_signal="GPIO_SD_B0_00"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 3" pin_num="47" pin_signal="GPIO_SD_B0_01"/>
+                  <pin peripheral="GPIO3" signal="gpio_io, 19" pin_num="41" pin_signal="GPIO_SD_B0_06"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitQSPIPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXSPI" description="Peripheral FLEXSPI is not initialized" problem_level="1" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_SCLK" pin_num="24" pin_signal="GPIO_SD_B1_07"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA0" pin_num="23" pin_signal="GPIO_SD_B1_08"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA1" pin_num="21" pin_signal="GPIO_SD_B1_10"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA2" pin_num="22" pin_signal="GPIO_SD_B1_09"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA3" pin_num="25" pin_signal="GPIO_SD_B1_06"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_SS0_B" pin_num="19" pin_signal="GPIO_SD_B1_11"/>
+               </pins>
+            </function>
+         </functions_list>
+      </pins>
+      <clocks name="Clocks" version="11.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/clock_config.c" update_enabled="true"/>
+            <file path="board/clock_config.h" update_enabled="true"/>
+         </generated_project_files>
+         <clocks_profile>
+            <processor_version>13.0.2</processor_version>
+         </clocks_profile>
+         <clock_configurations>
+            <clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Clocks initialization requires the IOMUXC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="XTALOSC24M.RTC_OSC.outFreq" value="32.768 kHz" locked="false" enabled="true"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="AHB_CLK_ROOT.outFreq" value="500 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CAN_CLK_ROOT.outFreq" value="40 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CKIL_SYNC_CLK_ROOT.outFreq" value="32.768 kHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_1M.outFreq" value="1 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_24M.outFreq" value="24 MHz" locked="false" accuracy=""/>
+                  <clock_output id="ENET_500M_REF_CLK.outFreq" value="500 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXIO1_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXSPI_CLK_ROOT.outFreq" value="132 MHz" locked="false" accuracy=""/>
+                  <clock_output id="GPT1_ipg_clk_highfreq.outFreq" value="62.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="GPT2_ipg_clk_highfreq.outFreq" value="62.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="IPG_CLK_ROOT.outFreq" value="125 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LPI2C_CLK_ROOT.outFreq" value="60 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LPSPI_CLK_ROOT.outFreq" value="105.6 MHz" locked="false" accuracy=""/>
+                  <clock_output id="MQS_MCLK.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="PERCLK_CLK_ROOT.outFreq" value="62.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK2.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SEMC_CLK_ROOT.outFreq" value="62.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SPDIF0_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="TRACE_CLK_ROOT.outFreq" value="132 MHz" locked="false" accuracy=""/>
+                  <clock_output id="UART_CLK_ROOT.outFreq" value="80 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USBPHY1_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USDHC1_CLK_ROOT.outFreq" value="176 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USDHC2_CLK_ROOT.outFreq" value="176 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="CCM.AHB_PODF.scale" value="1" locked="true"/>
+                  <setting id="CCM.ARM_PODF.scale" value="1" locked="true"/>
+                  <setting id="CCM.FLEXSPI_PODF.scale" value="4" locked="true"/>
+                  <setting id="CCM.FLEXSPI_SEL.sel" value="CCM_ANALOG.PLL2_PFD2_CLK" locked="false"/>
+                  <setting id="CCM.IPG_PODF.scale" value="4" locked="false"/>
+                  <setting id="CCM.LPSPI_PODF.scale" value="5" locked="true"/>
+                  <setting id="CCM.PERCLK_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.PRE_PERIPH_CLK_SEL.sel" value="CCM.ARM_PODF" locked="false"/>
+                  <setting id="CCM.SEMC_PODF.scale" value="8" locked="false"/>
+                  <setting id="CCM.TRACE_CLK_SEL.sel" value="CCM_ANALOG.PLL2_MAIN_CLK" locked="false"/>
+                  <setting id="CCM.TRACE_PODF.scale" value="4" locked="true"/>
+                  <setting id="CCM.USDHC1_PODF.scale" value="3" locked="true"/>
+                  <setting id="CCM.USDHC2_PODF.scale" value="3" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2.denom" value="1" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2.num" value="0" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_BYPASS.sel" value="CCM_ANALOG.PLL2_OUT_CLK" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD2_DIV.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD2_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD3_DIV.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD3_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_BYPASS.sel" value="CCM_ANALOG.PLL3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_DIV.scale" value="22" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD3_DIV.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD3_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL4.denom" value="50" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL4.div" value="47" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL6_BYPASS.sel" value="CCM_ANALOG.PLL6" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_ENET_ENABLE_CFG" value="Disabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_CFG" value="Disabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_POWER_CFG" value="Yes" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>true</called_from_default_init>
+            </clock_configuration>
+         </clock_configurations>
+      </clocks>
+      <dcdx name="DCDx" version="3.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/dcd.c" update_enabled="true"/>
+            <file path="board/dcd.h" update_enabled="true"/>
+         </generated_project_files>
+         <dcdx_profile>
+            <processor_version>13.0.2</processor_version>
+            <output_format>c_array</output_format>
+         </dcdx_profile>
+         <dcdx_configurations>
+            <dcdx_configuration name="Device_configuration">
+               <description></description>
+               <options/>
+               <command_groups/>
+            </dcdx_configuration>
+         </dcdx_configurations>
+      </dcdx>
+      <periphs name="Peripherals" version="12.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/peripherals.c" update_enabled="true"/>
+            <file path="board/peripherals.h" update_enabled="true"/>
+         </generated_project_files>
+         <peripherals_profile>
+            <processor_version>13.0.2</processor_version>
+         </peripherals_profile>
+         <functional_groups>
+            <functional_group name="BOARD_InitPeripherals" uuid="6d394465-bc9b-47f2-9a1f-3ca61f76d27b" called_from_default_init="true" id_prefix="" core="core0">
+               <description></description>
+               <options/>
+               <dependencies/>
+               <instances>
+                  <instance name="CAN" uuid="d0b30ebd-b05e-42b2-8e94-40b1625c2dba" type="flexcan" type_id="flexcan_10d80efac19b25dcd240244aae88dca0" mode="interrupts" peripheral="CAN1" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="interruptsCfg">
+                        <setting name="messageBufferIrqs" value="0"/>
+                        <setting name="messageBufferIrqs2" value="0"/>
+                        <set name="interruptsEnable">
+                           <selected/>
+                        </set>
+                        <setting name="enable_irq" value="false"/>
+                        <struct name="interrupt_shared">
+                           <setting name="IRQn" value="CAN1_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                     <config_set name="fsl_flexcan" quick_selection="default">
+                        <struct name="can_config">
+                           <setting name="clockSource" value="kFLEXCAN_ClkSrcOsc"/>
+                           <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                           <setting name="wakeupSrc" value="kFLEXCAN_WakeupSrcUnfiltered"/>
+                           <setting name="baudRate" value="1000000"/>
+                           <setting name="maxMbNum" value="16"/>
+                           <setting name="enableLoopBack" value="false"/>
+                           <setting name="enableTimerSync" value="true"/>
+                           <setting name="enableSelfWakeup" value="false"/>
+                           <setting name="enableIndividMask" value="false"/>
+                           <struct name="timingConfig">
+                              <setting name="propSeg" value="2"/>
+                              <setting name="phaseSeg1" value="4"/>
+                              <setting name="phaseSeg2" value="3"/>
+                              <setting name="rJumpwidth" value="2"/>
+                              <struct name="bitTime"/>
+                           </struct>
+                        </struct>
+                        <setting name="enableRxFIFO" value="false"/>
+                        <struct name="rxFIFO">
+                           <setting name="idFilterTable" value=""/>
+                           <setting name="idFilterNum" value="num0"/>
+                           <setting name="idFilterType" value="kFLEXCAN_RxFifoFilterTypeA"/>
+                           <setting name="priority" value="kFLEXCAN_RxFifoPrioLow"/>
+                        </struct>
+                        <array name="channels">
+                           <struct name="0">
+                              <setting name="mbID" value="0"/>
+                              <setting name="mbType" value="mbRx"/>
+                              <struct name="rxMb">
+                                 <setting name="id" value="0"/>
+                                 <setting name="format" value="kFLEXCAN_FrameFormatStandard"/>
+                                 <setting name="type" value="kFLEXCAN_FrameTypeData"/>
+                              </struct>
+                           </struct>
+                           <struct name="1">
+                              <setting name="mbID" value="1"/>
+                              <setting name="mbType" value="mbTx"/>
+                              <struct name="rxMb">
+                                 <setting name="id" value="0"/>
+                                 <setting name="format" value="kFLEXCAN_FrameFormatStandard"/>
+                                 <setting name="type" value="kFLEXCAN_FrameTypeData"/>
+                              </struct>
+                           </struct>
+                        </array>
+                     </config_set>
+                  </instance>
+                  <instance name="DEBUG_UART" uuid="27a94726-61ef-42ac-b517-d1eda3853dfe" type="lpuart" type_id="lpuart_bf01db7d964092f3cf860852cba17f7e" mode="polling" peripheral="LPUART1" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="lpuartConfig_t">
+                        <struct name="lpuartConfig">
+                           <setting name="clockSource" value="LpuartClock"/>
+                           <setting name="lpuartSrcClkFreq" value="BOARD_BootClockRUN"/>
+                           <setting name="baudRate_Bps" value="115200"/>
+                           <setting name="parityMode" value="kLPUART_ParityDisabled"/>
+                           <setting name="dataBitsCount" value="kLPUART_EightDataBits"/>
+                           <setting name="isMsb" value="false"/>
+                           <setting name="stopBitCount" value="kLPUART_OneStopBit"/>
+                           <setting name="enableMatchAddress1" value="false"/>
+                           <setting name="matchAddress1" value="0"/>
+                           <setting name="enableMatchAddress2" value="false"/>
+                           <setting name="matchAddress2" value="0"/>
+                           <setting name="txFifoWatermark" value="0"/>
+                           <setting name="rxFifoWatermark" value="1"/>
+                           <setting name="enableRxRTS" value="false"/>
+                           <setting name="enableTxCTS" value="false"/>
+                           <setting name="txCtsSource" value="kLPUART_CtsSourcePin"/>
+                           <setting name="txCtsConfig" value="kLPUART_CtsSampleAtStart"/>
+                           <setting name="rxIdleType" value="kLPUART_IdleTypeStartBit"/>
+                           <setting name="rxIdleConfig" value="kLPUART_IdleCharacter1"/>
+                           <setting name="enableTx" value="true"/>
+                           <setting name="enableRx" value="true"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="NVIC" uuid="e2a4cccd-cb23-4714-8c90-022fcf6146e8" type="nvic" type_id="nvic_57b5eef3774cc60acaede6f5b8bddc67" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="nvic">
+                        <array name="interrupt_table"/>
+                        <array name="interrupts"/>
+                     </config_set>
+                  </instance>
+               </instances>
+            </functional_group>
+         </functional_groups>
+         <components>
+            <component name="system" uuid="bd191d83-2cb2-40ed-a718-47b39d772006" type_id="system">
+               <config_set_global name="global_system_definitions">
+                  <setting name="user_definitions" value=""/>
+                  <setting name="user_includes" value=""/>
+               </config_set_global>
+            </component>
+            <component name="msg" uuid="d097438f-179b-43e0-b37c-aee31212cebd" type_id="msg">
+               <config_set_global name="global_messages"/>
+            </component>
+            <component name="gpio_adapter_common" uuid="d84400f7-fd84-4466-908a-04abca190ef6" type_id="gpio_adapter_common_57579b9ac814fe26bf95df0a384c36b6">
+               <config_set_global name="global_gpio_adapter_common" quick_selection="default"/>
+            </component>
+            <component name="generic_uart" uuid="4f0123a9-0338-4076-b275-b49951642704" type_id="generic_uart_8cae00565451cf2346eb1b8c624e73a6">
+               <config_set_global name="global_uart"/>
+            </component>
+            <component name="generic_can" uuid="18150193-6d2b-469f-88e5-4908669bf3e5" type_id="generic_can_1bfdd78b1af214566c1f23cf6a582d80">
+               <config_set_global name="global_can"/>
+            </component>
+            <component name="uart_cmsis_common" uuid="602159e8-d65b-45d3-b63b-cd33be549134" type_id="uart_cmsis_common_9cb8e302497aa696fdbb5a4fd622c2a8">
+               <config_set_global name="global_USART_CMSIS_common" quick_selection="default"/>
+            </component>
+            <component name="generic_enet" uuid="eb963b89-5367-4d86-8885-82b4b8cff735" type_id="generic_enet_74db5c914f0ddbe47d86af40cb77a619">
+               <config_set_global name="global_enet"/>
+            </component>
+         </components>
+      </periphs>
+      <tee name="TEE" version="4.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <tee_profile>
+            <processor_version>0.0.0</processor_version>
+         </tee_profile>
+      </tee>
+      <common name="common" version="1.0" enabled="true" update_project_code="true">
+         <core name="core0" role="primary" project_name="Project"/>
+      </common>
+   </tools>
+</configuration>
diff --git a/hw/bsp/imxrt/boards/mimxrt1024_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1024_evk/board.cmake
index 7011fec9b..45487d148 100644
--- a/hw/bsp/imxrt/boards/mimxrt1024_evk/board.cmake
+++ b/hw/bsp/imxrt/boards/mimxrt1024_evk/board.cmake
@@ -1,6 +1,6 @@
 set(MCU_VARIANT MIMXRT1024)
 
-set(JLINK_DEVICE MIMXRT1024DAG5A)
+set(JLINK_DEVICE MIMXRT1024xxx5A)
 set(PYOCD_TARGET mimxrt1024)
 set(NXPLINK_DEVICE MIMXRT1024xxxxx:MIMXRT1024-EVK)
 
diff --git a/hw/bsp/imxrt/boards/mimxrt1024_evk/board.mk b/hw/bsp/imxrt/boards/mimxrt1024_evk/board.mk
index 92209992d..3c325cc93 100644
--- a/hw/bsp/imxrt/boards/mimxrt1024_evk/board.mk
+++ b/hw/bsp/imxrt/boards/mimxrt1024_evk/board.mk
@@ -5,7 +5,7 @@ MCU_VARIANT = MIMXRT1024
 CFLAGS += -Wno-error=array-bounds
 
 # For flash-jlink target
-JLINK_DEVICE = MIMXRT1024DAG5A
+JLINK_DEVICE = MIMXRT1024xxx5A
 
 # For flash-pyocd target
 PYOCD_TARGET = mimxrt1024
diff --git a/hw/bsp/imxrt/boards/mimxrt1024_evk/board/clock_config.c b/hw/bsp/imxrt/boards/mimxrt1024_evk/board/clock_config.c
new file mode 100644
index 000000000..ba0cadafa
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1024_evk/board/clock_config.c
@@ -0,0 +1,421 @@
+/*
+ * How to setup clock using clock driver functions:
+ *
+ * 1. Call CLOCK_InitXXXPLL() to configure corresponding PLL clock.
+ *
+ * 2. Call CLOCK_InitXXXpfd() to configure corresponding PLL pfd clock.
+ *
+ * 3. Call CLOCK_SetMux() to configure corresponding clock source for target clock out.
+ *
+ * 4. Call CLOCK_SetDiv() to configure corresponding clock divider for target clock out.
+ *
+ * 5. Call CLOCK_SetXtalFreq() to set XTAL frequency based on board settings.
+ *
+ */
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v11.0
+processor: MIMXRT1024xxxxx
+package_id: MIMXRT1024DAG5A
+mcu_data: ksdk2_0
+processor_version: 13.0.2
+board: MIMXRT1024-EVK
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+#include "clock_config.h"
+#include "fsl_iomuxc.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockRUN();
+}
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockRUN
+called_from_default_init: true
+outputs:
+- {id: AHB_CLK_ROOT.outFreq, value: 500 MHz}
+- {id: CAN_CLK_ROOT.outFreq, value: 40 MHz}
+- {id: CKIL_SYNC_CLK_ROOT.outFreq, value: 32.768 kHz}
+- {id: CLK_1M.outFreq, value: 1 MHz}
+- {id: CLK_24M.outFreq, value: 24 MHz}
+- {id: ENET_500M_REF_CLK.outFreq, value: 500 MHz}
+- {id: FLEXIO1_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: FLEXSPI_CLK_ROOT.outFreq, value: 132 MHz}
+- {id: GPT1_ipg_clk_highfreq.outFreq, value: 62.5 MHz}
+- {id: GPT2_ipg_clk_highfreq.outFreq, value: 62.5 MHz}
+- {id: IPG_CLK_ROOT.outFreq, value: 125 MHz}
+- {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz}
+- {id: LPSPI_CLK_ROOT.outFreq, value: 105.6 MHz}
+- {id: MQS_MCLK.outFreq, value: 1080/17 MHz}
+- {id: PERCLK_CLK_ROOT.outFreq, value: 62.5 MHz}
+- {id: SAI1_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK2.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK3.outFreq, value: 30 MHz}
+- {id: SAI2_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI2_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI2_MCLK3.outFreq, value: 30 MHz}
+- {id: SAI3_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK3.outFreq, value: 30 MHz}
+- {id: SEMC_CLK_ROOT.outFreq, value: 62.5 MHz}
+- {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: TRACE_CLK_ROOT.outFreq, value: 132 MHz}
+- {id: UART_CLK_ROOT.outFreq, value: 80 MHz}
+- {id: USBPHY1_CLK.outFreq, value: 480 MHz}
+- {id: USDHC1_CLK_ROOT.outFreq, value: 176 MHz}
+- {id: USDHC2_CLK_ROOT.outFreq, value: 176 MHz}
+settings:
+- {id: CCM.AHB_PODF.scale, value: '1', locked: true}
+- {id: CCM.ARM_PODF.scale, value: '1', locked: true}
+- {id: CCM.FLEXSPI_PODF.scale, value: '4', locked: true}
+- {id: CCM.FLEXSPI_SEL.sel, value: CCM_ANALOG.PLL2_PFD2_CLK}
+- {id: CCM.IPG_PODF.scale, value: '4'}
+- {id: CCM.LPSPI_PODF.scale, value: '5', locked: true}
+- {id: CCM.PERCLK_PODF.scale, value: '2', locked: true}
+- {id: CCM.PRE_PERIPH_CLK_SEL.sel, value: CCM.ARM_PODF}
+- {id: CCM.SEMC_PODF.scale, value: '8'}
+- {id: CCM.TRACE_CLK_SEL.sel, value: CCM_ANALOG.PLL2_MAIN_CLK}
+- {id: CCM.TRACE_PODF.scale, value: '4', locked: true}
+- {id: CCM.USDHC1_PODF.scale, value: '3', locked: true}
+- {id: CCM.USDHC2_PODF.scale, value: '3', locked: true}
+- {id: CCM_ANALOG.PLL2.denom, value: '1', locked: true}
+- {id: CCM_ANALOG.PLL2.num, value: '0', locked: true}
+- {id: CCM_ANALOG.PLL2_BYPASS.sel, value: CCM_ANALOG.PLL2_OUT_CLK}
+- {id: CCM_ANALOG.PLL2_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD0}
+- {id: CCM_ANALOG.PLL2_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD1}
+- {id: CCM_ANALOG.PLL2_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD2}
+- {id: CCM_ANALOG.PLL2_PFD2_DIV.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL2_PFD2_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL2_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD3}
+- {id: CCM_ANALOG.PLL2_PFD3_DIV.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL2_PFD3_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_BYPASS.sel, value: CCM_ANALOG.PLL3}
+- {id: CCM_ANALOG.PLL3_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD0}
+- {id: CCM_ANALOG.PLL3_PFD0_DIV.scale, value: '22', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD0_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD1}
+- {id: CCM_ANALOG.PLL3_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD2}
+- {id: CCM_ANALOG.PLL3_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD3}
+- {id: CCM_ANALOG.PLL3_PFD3_DIV.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD3_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL4.denom, value: '50'}
+- {id: CCM_ANALOG.PLL4.div, value: '47'}
+- {id: CCM_ANALOG.PLL6_BYPASS.sel, value: CCM_ANALOG.PLL6}
+- {id: CCM_ANALOG_PLL_ENET_ENABLE_CFG, value: Disabled}
+- {id: CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_CFG, value: Disabled}
+- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB1_POWER_CFG, value: 'Yes'}
+sources:
+- {id: XTALOSC24M.RTC_OSC.outFreq, value: 32.768 kHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 1,                         /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
+        .numerator = 0,                           /* 30 bit numerator of fractional loop divider */
+        .denominator = 1,                         /* 30 bit denominator of fractional loop divider */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 0,                         /* PLL loop divider, Fout = Fin * 20 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN =
+    {
+        .enableClkOutput = false,                 /* Disable the PLL providing the ENET 125MHz reference clock */
+        .enableClkOutput500M = true,              /* Enable the PLL providing the ENET 500MHz reference clock */
+        .enableClkOutput25M = false,              /* Disable the PLL providing the ENET 25MHz reference clock */
+        .loopDivider = 1,                         /* Set frequency of ethernet reference clock to 50 MHz */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+/*******************************************************************************
+ * Code for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+void BOARD_BootClockRUN(void)
+{
+    /* Init RTC OSC clock frequency. */
+    CLOCK_SetRtcXtalFreq(32768U);
+    /* Enable 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK;
+    /* Use free 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK;
+    /* Set XTAL 24MHz clock frequency. */
+    CLOCK_SetXtalFreq(24000000U);
+    /* Enable XTAL 24MHz clock source. */
+    CLOCK_InitExternalClk(0);
+    /* Enable internal RC. */
+    CLOCK_InitRcOsc24M();
+    /* Switch clock source to external OSC. */
+    CLOCK_SwitchOsc(kCLOCK_XtalOsc);
+    /* Set Oscillator ready counter value. */
+    CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127);
+    /* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 1);     /* Set PERIPH_CLK MUX to PERIPH_CLK2 */
+    /* Setting the VDD_SOC to 1.25V. It is necessary to config AHB to 500Mhz. */
+    DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x12);
+    /* Waiting for DCDC_STS_DC_OK bit is asserted */
+    while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0))
+    {
+    }
+    /* Set AHB_PODF. */
+    CLOCK_SetDiv(kCLOCK_AhbDiv, 0);
+    /* Disable IPG clock gate. */
+    CLOCK_DisableClock(kCLOCK_Adc1);
+    CLOCK_DisableClock(kCLOCK_Adc2);
+    CLOCK_DisableClock(kCLOCK_Xbar1);
+    CLOCK_DisableClock(kCLOCK_Xbar2);
+    /* Set IPG_PODF. */
+    CLOCK_SetDiv(kCLOCK_IpgDiv, 3);
+    /* Set ARM_PODF. */
+    CLOCK_SetDiv(kCLOCK_ArmDiv, 0);
+    /* Set PERIPH_CLK2_PODF. */
+    CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0);
+    /* Disable PERCLK clock gate. */
+    CLOCK_DisableClock(kCLOCK_Gpt1);
+    CLOCK_DisableClock(kCLOCK_Gpt1S);
+    CLOCK_DisableClock(kCLOCK_Gpt2);
+    CLOCK_DisableClock(kCLOCK_Gpt2S);
+    CLOCK_DisableClock(kCLOCK_Pit);
+    /* Set PERCLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_PerclkDiv, 1);
+    /* Disable USDHC1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Usdhc1);
+    /* Set USDHC1_PODF. */
+    CLOCK_SetDiv(kCLOCK_Usdhc1Div, 2);
+    /* Set Usdhc1 clock source. */
+    CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0);
+    /* Disable USDHC2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Usdhc2);
+    /* Set USDHC2_PODF. */
+    CLOCK_SetDiv(kCLOCK_Usdhc2Div, 2);
+    /* Set Usdhc2 clock source. */
+    CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0);
+    /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
+     * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
+#ifndef SKIP_SYSCLK_INIT
+    /* Disable Semc clock gate. */
+    CLOCK_DisableClock(kCLOCK_Semc);
+    /* Set SEMC_PODF. */
+    CLOCK_SetDiv(kCLOCK_SemcDiv, 7);
+    /* Set Semc alt clock source. */
+    CLOCK_SetMux(kCLOCK_SemcAltMux, 0);
+    /* Set Semc clock source. */
+    CLOCK_SetMux(kCLOCK_SemcMux, 0);
+#endif
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Disable Flexspi clock gate. */
+    CLOCK_DisableClock(kCLOCK_FlexSpi);
+    /* Set FLEXSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_FlexspiDiv, 3);
+    /* Set Flexspi clock source. */
+    CLOCK_SetMux(kCLOCK_FlexspiMux, 2);
+#endif
+    /* Disable LPSPI clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpspi1);
+    CLOCK_DisableClock(kCLOCK_Lpspi2);
+    CLOCK_DisableClock(kCLOCK_Lpspi3);
+    CLOCK_DisableClock(kCLOCK_Lpspi4);
+    /* Set LPSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_LpspiDiv, 4);
+    /* Set Lpspi clock source. */
+    CLOCK_SetMux(kCLOCK_LpspiMux, 2);
+    /* Disable TRACE clock gate. */
+    CLOCK_DisableClock(kCLOCK_Trace);
+    /* Set TRACE_PODF. */
+    CLOCK_SetDiv(kCLOCK_TraceDiv, 3);
+    /* Set Trace clock source. */
+    CLOCK_SetMux(kCLOCK_TraceMux, 0);
+    /* Disable SAI1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai1);
+    /* Set SAI1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3);
+    /* Set SAI1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai1Div, 1);
+    /* Set Sai1 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai1Mux, 0);
+    /* Disable SAI2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai2);
+    /* Set SAI2_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 3);
+    /* Set SAI2_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai2Div, 1);
+    /* Set Sai2 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai2Mux, 0);
+    /* Disable SAI3 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai3);
+    /* Set SAI3_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3);
+    /* Set SAI3_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai3Div, 1);
+    /* Set Sai3 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai3Mux, 0);
+    /* Disable Lpi2c clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpi2c1);
+    CLOCK_DisableClock(kCLOCK_Lpi2c2);
+    CLOCK_DisableClock(kCLOCK_Lpi2c3);
+    /* Set LPI2C_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0);
+    /* Set Lpi2c clock source. */
+    CLOCK_SetMux(kCLOCK_Lpi2cMux, 0);
+    /* Disable CAN clock gate. */
+    CLOCK_DisableClock(kCLOCK_Can1);
+    CLOCK_DisableClock(kCLOCK_Can2);
+    CLOCK_DisableClock(kCLOCK_Can1S);
+    CLOCK_DisableClock(kCLOCK_Can2S);
+    /* Set CAN_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_CanDiv, 1);
+    /* Set Can clock source. */
+    CLOCK_SetMux(kCLOCK_CanMux, 2);
+    /* Disable UART clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpuart1);
+    CLOCK_DisableClock(kCLOCK_Lpuart2);
+    CLOCK_DisableClock(kCLOCK_Lpuart3);
+    CLOCK_DisableClock(kCLOCK_Lpuart4);
+    CLOCK_DisableClock(kCLOCK_Lpuart5);
+    CLOCK_DisableClock(kCLOCK_Lpuart6);
+    CLOCK_DisableClock(kCLOCK_Lpuart7);
+    CLOCK_DisableClock(kCLOCK_Lpuart8);
+    /* Set UART_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+    /* Set Uart clock source. */
+    CLOCK_SetMux(kCLOCK_UartMux, 0);
+    /* Disable SPDIF clock gate. */
+    CLOCK_DisableClock(kCLOCK_Spdif);
+    /* Set SPDIF0_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1);
+    /* Set SPDIF0_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Spdif0Div, 7);
+    /* Set Spdif clock source. */
+    CLOCK_SetMux(kCLOCK_SpdifMux, 3);
+    /* Disable Flexio1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Flexio1);
+    /* Set FLEXIO1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1);
+    /* Set FLEXIO1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexio1Div, 7);
+    /* Set Flexio1 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexio1Mux, 3);
+    /* Set Pll3 sw clock source. */
+    CLOCK_SetMux(kCLOCK_Pll3SwMux, 0);
+    /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
+     * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
+#ifndef SKIP_SYSCLK_INIT
+#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1)
+    #warning "SKIP_SYSCLK_INIT should be defined to keep system pll (selected to be SEMC source clock in SDK projects) unchanged."
+#endif
+    /* Init System PLL. */
+    CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
+    /* Init System pfd0. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
+    /* Init System pfd1. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
+    /* Init System pfd2. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd2, 18);
+    /* Init System pfd3. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd3, 18);
+#endif
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Init Usb1 PLL. */
+    CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
+    /* Init Usb1 pfd0. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 22);
+    /* Init Usb1 pfd1. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
+    /* Init Usb1 pfd2. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
+    /* Init Usb1 pfd3. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 18);
+#endif
+    /* DeInit Audio PLL. */
+    CLOCK_DeinitAudioPll();
+    /* Bypass Audio PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1);
+    /* Set divider for Audio PLL. */
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK;
+    /* Enable Audio PLL output. */
+    CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK;
+    /* Init Enet PLL. */
+    CLOCK_InitEnetPll(&enetPllConfig_BOARD_BootClockRUN);
+    /* Set preperiph clock source. */
+    CLOCK_SetMux(kCLOCK_PrePeriphMux, 3);
+    /* Set periph clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 0);
+    /* Set periph clock2 clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
+    /* Set per clock source. */
+    CLOCK_SetMux(kCLOCK_PerclkMux, 0);
+    /* Set clock out1 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0);
+    /* Set clock out1 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1);
+    /* Set clock out2 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0);
+    /* Set clock out2 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(3);
+    /* Set clock out1 drives clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK;
+    /* Disable clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK;
+    /* Disable clock out2. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK;
+    /* Set SAI1 MCLK1 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0);
+    /* Set SAI1 MCLK2 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0);
+    /* Set SAI1 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0);
+    /* Set SAI2 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI2MClk3Sel, 0);
+    /* Set SAI3 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0);
+    /* Set MQS configuration. */
+    IOMUXC_MQSConfig(IOMUXC_GPR,kIOMUXC_MqsPwmOverSampleRate32, 0);
+    /* Set ENET Ref clock source. */
+#if defined(IOMUXC_GPR_GPR1_ENET_REF_CLK_DIR_MASK)
+    IOMUXC_GPR->GPR1 &= ~IOMUXC_GPR_GPR1_ENET_REF_CLK_DIR_MASK;
+#elif defined(IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK)
+    /* Backward compatibility for original bitfield name */
+    IOMUXC_GPR->GPR1 &= ~IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK;
+#else
+#error "Neither IOMUXC_GPR_GPR1_ENET_REF_CLK_DIR_MASK nor IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK is defined."
+#endif /* defined(IOMUXC_GPR_GPR1_ENET_REF_CLK_DIR_MASK) */
+    /* Set GPT1 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK;
+    /* Set GPT2 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK;
+    /* Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
+}
diff --git a/hw/bsp/imxrt/boards/mimxrt1024_evk/board/clock_config.h b/hw/bsp/imxrt/boards/mimxrt1024_evk/board/clock_config.h
new file mode 100644
index 000000000..d678a4f66
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1024_evk/board/clock_config.h
@@ -0,0 +1,108 @@
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define BOARD_XTAL0_CLK_HZ                         24000000U  /*!< Board xtal0 frequency in Hz */
+
+#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32k frequency in Hz */
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKRUN_CORE_CLOCK             500000000U  /*!< Core clock frequency: 500000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT               500000000UL
+#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT               40000000UL
+#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT         32768UL
+#define BOARD_BOOTCLOCKRUN_CLKO1_CLK                  0UL
+#define BOARD_BOOTCLOCKRUN_CLKO2_CLK                  0UL
+#define BOARD_BOOTCLOCKRUN_CLK_1M                     1000000UL
+#define BOARD_BOOTCLOCKRUN_CLK_24M                    24000000UL
+#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK              0UL
+#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK           0UL
+#define BOARD_BOOTCLOCKRUN_ENET_500M_REF_CLK          500000000UL
+#define BOARD_BOOTCLOCKRUN_ENET_REF_CLK               0UL
+#define BOARD_BOOTCLOCKRUN_ENET_TX_CLK                0UL
+#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT           30000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT           132000000UL
+#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ      62500000UL
+#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ      62500000UL
+#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT               125000000UL
+#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT             60000000UL
+#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT             105600000UL
+#define BOARD_BOOTCLOCKRUN_MQS_MCLK                   63529411UL
+#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT            62500000UL
+#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2                 0UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2                 0UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT              62500000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT            30000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT          0UL
+#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT             132000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT              80000000UL
+#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK                480000000UL
+#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT            176000000UL
+#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT            176000000UL
+
+/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
+/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
+ */
+extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
+/*! @brief Enet PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN;
+
+/*******************************************************************************
+ * API for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockRUN(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/imxrt/boards/mimxrt1024_evk/mimxrt1024_evk.mex b/hw/bsp/imxrt/boards/mimxrt1024_evk/mimxrt1024_evk.mex
new file mode 100644
index 000000000..2aa55a604
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1024_evk/mimxrt1024_evk.mex
@@ -0,0 +1,503 @@
+<?xml version="1.0" encoding= "UTF-8" ?>
+<configuration name="MIMXRT1024-EVK" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_13 http://mcuxpresso.nxp.com/XSD/mex_configuration_13.xsd" uuid="a558cc6e-82c2-41f9-9f55-0348efc7896f" version="13" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_13" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+   <common>
+      <processor>MIMXRT1024xxxxx</processor>
+      <package>MIMXRT1024DAG5A</package>
+      <board>MIMXRT1024-EVK</board>
+      <board_revision>B1</board_revision>
+      <mcu_data>ksdk2_0</mcu_data>
+      <cores selected="core0">
+         <core name="Cortex-M7F" id="core0" description="M7 core"/>
+      </cores>
+      <description></description>
+   </common>
+   <preferences>
+      <validate_boot_init_only>false</validate_boot_init_only>
+      <generate_extended_information>false</generate_extended_information>
+      <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
+      <update_include_paths>true</update_include_paths>
+      <generate_registers_defines>false</generate_registers_defines>
+   </preferences>
+   <tools>
+      <pins name="Pins" version="13.1" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/pin_mux.c" update_enabled="true"/>
+            <file path="board/pin_mux.h" update_enabled="true"/>
+         </generated_project_files>
+         <pins_profile>
+            <processor_version>13.0.2</processor_version>
+            <power_domains>
+               <power_domain name="NVCC_GPIO" value="3.3"/>
+            </power_domains>
+         </pins_profile>
+         <functions_list>
+            <function name="BOARD_InitPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins/>
+            </function>
+            <function name="BOARD_InitDEBUG_UARTPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 is not initialized" problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LPUART1" signal="RX" pin_num="101" pin_signal="GPIO_AD_B0_07"/>
+                  <pin peripheral="LPUART1" signal="TX" pin_num="105" pin_signal="GPIO_AD_B0_06"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitSDRAMPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="SEMC" description="Peripheral SEMC is not initialized" problem_level="1" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="SEMC" signal="ADDR, 00" pin_num="142" pin_signal="GPIO_EMC_16"/>
+                  <pin peripheral="SEMC" signal="ADDR, 01" pin_num="141" pin_signal="GPIO_EMC_17"/>
+                  <pin peripheral="SEMC" signal="ADDR, 02" pin_num="140" pin_signal="GPIO_EMC_18"/>
+                  <pin peripheral="SEMC" signal="ADDR, 03" pin_num="139" pin_signal="GPIO_EMC_19"/>
+                  <pin peripheral="SEMC" signal="ADDR, 04" pin_num="138" pin_signal="GPIO_EMC_20"/>
+                  <pin peripheral="SEMC" signal="ADDR, 06" pin_num="136" pin_signal="GPIO_EMC_22"/>
+                  <pin peripheral="SEMC" signal="ADDR, 05" pin_num="137" pin_signal="GPIO_EMC_21"/>
+                  <pin peripheral="SEMC" signal="ADDR, 07" pin_num="133" pin_signal="GPIO_EMC_23"/>
+                  <pin peripheral="SEMC" signal="ADDR, 08" pin_num="132" pin_signal="GPIO_EMC_24"/>
+                  <pin peripheral="SEMC" signal="ADDR, 09" pin_num="131" pin_signal="GPIO_EMC_25"/>
+                  <pin peripheral="SEMC" signal="ADDR, 10" pin_num="143" pin_signal="GPIO_EMC_15"/>
+                  <pin peripheral="SEMC" signal="ADDR, 11" pin_num="130" pin_signal="GPIO_EMC_26"/>
+                  <pin peripheral="SEMC" signal="ADDR, 12" pin_num="129" pin_signal="GPIO_EMC_27"/>
+                  <pin peripheral="SEMC" signal="BA, 0" pin_num="2" pin_signal="GPIO_EMC_13"/>
+                  <pin peripheral="SEMC" signal="BA, 1" pin_num="1" pin_signal="GPIO_EMC_14"/>
+                  <pin peripheral="SEMC" signal="semc_cas" pin_num="7" pin_signal="GPIO_EMC_10"/>
+                  <pin peripheral="SEMC" signal="semc_cke" pin_num="127" pin_signal="GPIO_EMC_29"/>
+                  <pin peripheral="SEMC" signal="semc_clk" pin_num="126" pin_signal="GPIO_EMC_30"/>
+                  <pin peripheral="SEMC" signal="CS, 0" pin_num="3" pin_signal="GPIO_EMC_12"/>
+                  <pin peripheral="SEMC" signal="semc_we" pin_num="8" pin_signal="GPIO_EMC_09"/>
+                  <pin peripheral="SEMC" signal="semc_ras" pin_num="4" pin_signal="GPIO_EMC_11"/>
+                  <pin peripheral="SEMC" signal="semc_dqs" pin_num="128" pin_signal="GPIO_EMC_28"/>
+                  <pin peripheral="SEMC" signal="DM, 1" pin_num="125" pin_signal="GPIO_EMC_31"/>
+                  <pin peripheral="SEMC" signal="DM, 0" pin_num="9" pin_signal="GPIO_EMC_08"/>
+                  <pin peripheral="SEMC" signal="DATA, 15" pin_num="117" pin_signal="GPIO_EMC_39"/>
+                  <pin peripheral="SEMC" signal="DATA, 14" pin_num="118" pin_signal="GPIO_EMC_38"/>
+                  <pin peripheral="SEMC" signal="DATA, 13" pin_num="119" pin_signal="GPIO_EMC_37"/>
+                  <pin peripheral="SEMC" signal="DATA, 12" pin_num="120" pin_signal="GPIO_EMC_36"/>
+                  <pin peripheral="SEMC" signal="DATA, 10" pin_num="122" pin_signal="GPIO_EMC_34"/>
+                  <pin peripheral="SEMC" signal="DATA, 11" pin_num="121" pin_signal="GPIO_EMC_35"/>
+                  <pin peripheral="SEMC" signal="DATA, 09" pin_num="123" pin_signal="GPIO_EMC_33"/>
+                  <pin peripheral="SEMC" signal="DATA, 08" pin_num="124" pin_signal="GPIO_EMC_32"/>
+                  <pin peripheral="SEMC" signal="DATA, 07" pin_num="10" pin_signal="GPIO_EMC_07"/>
+                  <pin peripheral="SEMC" signal="DATA, 06" pin_num="12" pin_signal="GPIO_EMC_06"/>
+                  <pin peripheral="SEMC" signal="DATA, 05" pin_num="13" pin_signal="GPIO_EMC_05"/>
+                  <pin peripheral="SEMC" signal="DATA, 04" pin_num="14" pin_signal="GPIO_EMC_04"/>
+                  <pin peripheral="SEMC" signal="DATA, 03" pin_num="15" pin_signal="GPIO_EMC_03"/>
+                  <pin peripheral="SEMC" signal="DATA, 02" pin_num="16" pin_signal="GPIO_EMC_02"/>
+                  <pin peripheral="SEMC" signal="DATA, 01" pin_num="17" pin_signal="GPIO_EMC_01"/>
+                  <pin peripheral="SEMC" signal="DATA, 00" pin_num="18" pin_signal="GPIO_EMC_00"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitCANPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="CAN1" description="Peripheral CAN1 is not initialized" problem_level="1" source="Pins:BOARD_InitCANPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitCANPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitCANPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="CAN1" signal="RX" pin_num="32" pin_signal="GPIO_SD_B1_01"/>
+                  <pin peripheral="CAN1" signal="TX" pin_num="33" pin_signal="GPIO_SD_B1_00"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitENETPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="ENET" description="Peripheral ENET is not initialized" problem_level="1" source="Pins:BOARD_InitENETPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitENETPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitENETPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="ENET" signal="enet_rx_en" pin_num="97" pin_signal="GPIO_AD_B0_11"/>
+                  <pin peripheral="GPIO1" signal="gpio_io, 22" pin_num="84" pin_signal="GPIO_AD_B1_06"/>
+                  <pin peripheral="GPIO1" signal="gpio_io, 04" pin_num="107" pin_signal="GPIO_AD_B0_04"/>
+                  <pin peripheral="ENET" signal="enet_tx_clk" pin_num="100" pin_signal="GPIO_AD_B0_08"/>
+                  <pin peripheral="ENET" signal="enet_tx_en" pin_num="95" pin_signal="GPIO_AD_B0_13"/>
+                  <pin peripheral="ENET" signal="enet_tx_data, 1" pin_num="93" pin_signal="GPIO_AD_B0_15"/>
+                  <pin peripheral="ENET" signal="enet_tx_data, 0" pin_num="94" pin_signal="GPIO_AD_B0_14"/>
+                  <pin peripheral="ENET" signal="enet_rx_er" pin_num="96" pin_signal="GPIO_AD_B0_12"/>
+                  <pin peripheral="ENET" signal="enet_rx_data, 1" pin_num="99" pin_signal="GPIO_AD_B0_09"/>
+                  <pin peripheral="ENET" signal="enet_rx_data, 0" pin_num="98" pin_signal="GPIO_AD_B0_10"/>
+                  <pin peripheral="ENET" signal="enet_mdio" pin_num="116" pin_signal="GPIO_EMC_40"/>
+                  <pin peripheral="ENET" signal="enet_mdc" pin_num="115" pin_signal="GPIO_EMC_41"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitUSDHCPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="USDHC1" description="Peripheral USDHC1 is not initialized" problem_level="1" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="USDHC1" signal="usdhc_clk" pin_num="45" pin_signal="GPIO_SD_B0_03"/>
+                  <pin peripheral="USDHC1" signal="usdhc_cmd" pin_num="46" pin_signal="GPIO_SD_B0_02"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 0" pin_num="43" pin_signal="GPIO_SD_B0_04"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 1" pin_num="42" pin_signal="GPIO_SD_B0_05"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 2" pin_num="48" pin_signal="GPIO_SD_B0_00"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 3" pin_num="47" pin_signal="GPIO_SD_B0_01"/>
+                  <pin peripheral="GPIO3" signal="gpio_io, 19" pin_num="41" pin_signal="GPIO_SD_B0_06"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitQSPIPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXSPI" description="Peripheral FLEXSPI is not initialized" problem_level="1" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_SCLK" pin_num="24" pin_signal="GPIO_SD_B1_07"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA0" pin_num="23" pin_signal="GPIO_SD_B1_08"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA1" pin_num="21" pin_signal="GPIO_SD_B1_10"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA2" pin_num="22" pin_signal="GPIO_SD_B1_09"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA3" pin_num="25" pin_signal="GPIO_SD_B1_06"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_SS0_B" pin_num="19" pin_signal="GPIO_SD_B1_11"/>
+               </pins>
+            </function>
+         </functions_list>
+      </pins>
+      <clocks name="Clocks" version="11.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/clock_config.c" update_enabled="true"/>
+            <file path="board/clock_config.h" update_enabled="true"/>
+         </generated_project_files>
+         <clocks_profile>
+            <processor_version>13.0.2</processor_version>
+         </clocks_profile>
+         <clock_configurations>
+            <clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Clocks initialization requires the IOMUXC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="XTALOSC24M.RTC_OSC.outFreq" value="32.768 kHz" locked="false" enabled="true"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="AHB_CLK_ROOT.outFreq" value="500 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CAN_CLK_ROOT.outFreq" value="40 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CKIL_SYNC_CLK_ROOT.outFreq" value="32.768 kHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_1M.outFreq" value="1 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_24M.outFreq" value="24 MHz" locked="false" accuracy=""/>
+                  <clock_output id="ENET_500M_REF_CLK.outFreq" value="500 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXIO1_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXSPI_CLK_ROOT.outFreq" value="132 MHz" locked="false" accuracy=""/>
+                  <clock_output id="GPT1_ipg_clk_highfreq.outFreq" value="62.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="GPT2_ipg_clk_highfreq.outFreq" value="62.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="IPG_CLK_ROOT.outFreq" value="125 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LPI2C_CLK_ROOT.outFreq" value="60 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LPSPI_CLK_ROOT.outFreq" value="105.6 MHz" locked="false" accuracy=""/>
+                  <clock_output id="MQS_MCLK.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="PERCLK_CLK_ROOT.outFreq" value="62.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK2.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SEMC_CLK_ROOT.outFreq" value="62.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SPDIF0_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="TRACE_CLK_ROOT.outFreq" value="132 MHz" locked="false" accuracy=""/>
+                  <clock_output id="UART_CLK_ROOT.outFreq" value="80 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USBPHY1_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USDHC1_CLK_ROOT.outFreq" value="176 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USDHC2_CLK_ROOT.outFreq" value="176 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="CCM.AHB_PODF.scale" value="1" locked="true"/>
+                  <setting id="CCM.ARM_PODF.scale" value="1" locked="true"/>
+                  <setting id="CCM.FLEXSPI_PODF.scale" value="4" locked="true"/>
+                  <setting id="CCM.FLEXSPI_SEL.sel" value="CCM_ANALOG.PLL2_PFD2_CLK" locked="false"/>
+                  <setting id="CCM.IPG_PODF.scale" value="4" locked="false"/>
+                  <setting id="CCM.LPSPI_PODF.scale" value="5" locked="true"/>
+                  <setting id="CCM.PERCLK_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.PRE_PERIPH_CLK_SEL.sel" value="CCM.ARM_PODF" locked="false"/>
+                  <setting id="CCM.SEMC_PODF.scale" value="8" locked="false"/>
+                  <setting id="CCM.TRACE_CLK_SEL.sel" value="CCM_ANALOG.PLL2_MAIN_CLK" locked="false"/>
+                  <setting id="CCM.TRACE_PODF.scale" value="4" locked="true"/>
+                  <setting id="CCM.USDHC1_PODF.scale" value="3" locked="true"/>
+                  <setting id="CCM.USDHC2_PODF.scale" value="3" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2.denom" value="1" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2.num" value="0" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_BYPASS.sel" value="CCM_ANALOG.PLL2_OUT_CLK" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD2_DIV.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD2_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD3_DIV.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD3_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_BYPASS.sel" value="CCM_ANALOG.PLL3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_DIV.scale" value="22" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD3_DIV.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD3_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL4.denom" value="50" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL4.div" value="47" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL6_BYPASS.sel" value="CCM_ANALOG.PLL6" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_ENET_ENABLE_CFG" value="Disabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_CFG" value="Disabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_POWER_CFG" value="Yes" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>true</called_from_default_init>
+            </clock_configuration>
+         </clock_configurations>
+      </clocks>
+      <dcdx name="DCDx" version="3.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/dcd.c" update_enabled="true"/>
+            <file path="board/dcd.h" update_enabled="true"/>
+         </generated_project_files>
+         <dcdx_profile>
+            <processor_version>13.0.2</processor_version>
+            <output_format>c_array</output_format>
+         </dcdx_profile>
+         <dcdx_configurations>
+            <dcdx_configuration name="Device_configuration">
+               <description></description>
+               <options/>
+               <command_groups/>
+            </dcdx_configuration>
+         </dcdx_configurations>
+      </dcdx>
+      <periphs name="Peripherals" version="12.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/peripherals.c" update_enabled="true"/>
+            <file path="board/peripherals.h" update_enabled="true"/>
+         </generated_project_files>
+         <peripherals_profile>
+            <processor_version>13.0.2</processor_version>
+         </peripherals_profile>
+         <functional_groups>
+            <functional_group name="BOARD_InitPeripherals" uuid="6d394465-bc9b-47f2-9a1f-3ca61f76d27b" called_from_default_init="true" id_prefix="" core="core0">
+               <description></description>
+               <options/>
+               <dependencies/>
+               <instances>
+                  <instance name="NVIC" uuid="096e7e36-6917-481a-a4c5-06822cfc2da4" type="nvic" type_id="nvic_57b5eef3774cc60acaede6f5b8bddc67" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="nvic">
+                        <array name="interrupt_table"/>
+                        <array name="interrupts"/>
+                     </config_set>
+                  </instance>
+               </instances>
+            </functional_group>
+         </functional_groups>
+         <components>
+            <component name="system" uuid="5dc935cc-5865-4d50-bac9-89ad440a12ee" type_id="system_54b53072540eeeb8f8e9343e71f28176">
+               <config_set_global name="global_system_definitions">
+                  <setting name="user_definitions" value=""/>
+                  <setting name="user_includes" value=""/>
+               </config_set_global>
+            </component>
+            <component name="msg" uuid="c2fe99b8-bf9b-437f-9446-a35000b06679" type_id="msg_6e2baaf3b97dbeef01c0043275f9a0e7">
+               <config_set_global name="global_messages"/>
+            </component>
+            <component name="generic_uart" uuid="eca93ea1-cadf-4247-bfdc-08769ef8ed12" type_id="generic_uart_8cae00565451cf2346eb1b8c624e73a6">
+               <config_set_global name="global_uart"/>
+            </component>
+            <component name="generic_can" uuid="fdf82c69-a73f-4f32-9699-457260453bc6" type_id="generic_can_1bfdd78b1af214566c1f23cf6a582d80">
+               <config_set_global name="global_can"/>
+            </component>
+            <component name="gpio_adapter_common" uuid="af80d7a8-d163-4a6f-839d-0ce2b15abffd" type_id="gpio_adapter_common_57579b9ac814fe26bf95df0a384c36b6">
+               <config_set_global name="global_gpio_adapter_common" quick_selection="default"/>
+            </component>
+            <component name="uart_cmsis_common" uuid="dca6ee55-a78d-4884-99bd-4f821b552213" type_id="uart_cmsis_common_9cb8e302497aa696fdbb5a4fd622c2a8">
+               <config_set_global name="global_USART_CMSIS_common" quick_selection="default"/>
+            </component>
+            <component name="generic_enet" uuid="4c34638b-b184-4e9d-8a81-5f3a1287180a" type_id="generic_enet_74db5c914f0ddbe47d86af40cb77a619">
+               <config_set_global name="global_enet"/>
+            </component>
+         </components>
+      </periphs>
+      <tee name="TEE" version="4.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <tee_profile>
+            <processor_version>N/A</processor_version>
+         </tee_profile>
+      </tee>
+      <common name="common" version="1.0" enabled="true" update_project_code="true">
+         <core name="core0" role="primary" project_name="Project"/>
+      </common>
+   </tools>
+</configuration>
diff --git a/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.mk b/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.mk
index 9fd229105..60aa1e28f 100644
--- a/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.mk
+++ b/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.mk
@@ -1,6 +1,8 @@
 CFLAGS += -DCPU_MIMXRT1052DVL6B
 MCU_VARIANT = MIMXRT1052
 
+JLINK_DEVICE = MIMXRT1052xxxxB
+
 # For flash-pyocd target
 PYOCD_TARGET = mimxrt1050
 
diff --git a/hw/bsp/imxrt/boards/mimxrt1050_evkb/board/clock_config.c b/hw/bsp/imxrt/boards/mimxrt1050_evkb/board/clock_config.c
new file mode 100644
index 000000000..9738c6350
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1050_evkb/board/clock_config.c
@@ -0,0 +1,495 @@
+/*
+ * How to setup clock using clock driver functions:
+ *
+ * 1. Call CLOCK_InitXXXPLL() to configure corresponding PLL clock.
+ *
+ * 2. Call CLOCK_InitXXXpfd() to configure corresponding PLL pfd clock.
+ *
+ * 3. Call CLOCK_SetMux() to configure corresponding clock source for target clock out.
+ *
+ * 4. Call CLOCK_SetDiv() to configure corresponding clock divider for target clock out.
+ *
+ * 5. Call CLOCK_SetXtalFreq() to set XTAL frequency based on board settings.
+ *
+ */
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v11.0
+processor: MIMXRT1052xxxxB
+package_id: MIMXRT1052DVL6B
+mcu_data: ksdk2_0
+processor_version: 13.0.2
+board: IMXRT1050-EVKB
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+#include "clock_config.h"
+#include "fsl_iomuxc.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockRUN();
+}
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockRUN
+called_from_default_init: true
+outputs:
+- {id: AHB_CLK_ROOT.outFreq, value: 600 MHz}
+- {id: CAN_CLK_ROOT.outFreq, value: 40 MHz}
+- {id: CKIL_SYNC_CLK_ROOT.outFreq, value: 32.768 kHz}
+- {id: CLK_1M.outFreq, value: 1 MHz}
+- {id: CLK_24M.outFreq, value: 24 MHz}
+- {id: CSI_CLK_ROOT.outFreq, value: 12 MHz}
+- {id: ENET_125M_CLK.outFreq, value: 2.4 MHz}
+- {id: ENET_25M_REF_CLK.outFreq, value: 1.2 MHz}
+- {id: FLEXIO1_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: FLEXIO2_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: FLEXSPI_CLK_ROOT.outFreq, value: 160 MHz}
+- {id: GPT1_ipg_clk_highfreq.outFreq, value: 75 MHz}
+- {id: GPT2_ipg_clk_highfreq.outFreq, value: 75 MHz}
+- {id: IPG_CLK_ROOT.outFreq, value: 150 MHz}
+- {id: LCDIF_CLK_ROOT.outFreq, value: 67.5 MHz}
+- {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz}
+- {id: LPSPI_CLK_ROOT.outFreq, value: 105.6 MHz}
+- {id: LVDS1_CLK.outFreq, value: 1.2 GHz}
+- {id: MQS_MCLK.outFreq, value: 1080/17 MHz}
+- {id: PERCLK_CLK_ROOT.outFreq, value: 75 MHz}
+- {id: PLL7_MAIN_CLK.outFreq, value: 480 MHz}
+- {id: SAI1_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK2.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK3.outFreq, value: 30 MHz}
+- {id: SAI2_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI2_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI2_MCLK3.outFreq, value: 30 MHz}
+- {id: SAI3_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK3.outFreq, value: 30 MHz}
+- {id: SEMC_CLK_ROOT.outFreq, value: 75 MHz}
+- {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: TRACE_CLK_ROOT.outFreq, value: 132 MHz}
+- {id: UART_CLK_ROOT.outFreq, value: 80 MHz}
+- {id: USBPHY1_CLK.outFreq, value: 480 MHz}
+- {id: USBPHY2_CLK.outFreq, value: 480 MHz}
+- {id: USDHC1_CLK_ROOT.outFreq, value: 198 MHz}
+- {id: USDHC2_CLK_ROOT.outFreq, value: 198 MHz}
+settings:
+- {id: CCM.AHB_PODF.scale, value: '1', locked: true}
+- {id: CCM.ARM_PODF.scale, value: '2', locked: true}
+- {id: CCM.FLEXSPI_PODF.scale, value: '3', locked: true}
+- {id: CCM.FLEXSPI_SEL.sel, value: CCM.PLL3_SW_CLK_SEL}
+- {id: CCM.LPSPI_PODF.scale, value: '5', locked: true}
+- {id: CCM.PERCLK_PODF.scale, value: '2', locked: true}
+- {id: CCM.SEMC_PODF.scale, value: '8'}
+- {id: CCM.TRACE_CLK_SEL.sel, value: CCM_ANALOG.PLL2_MAIN_CLK}
+- {id: CCM_ANALOG.PLL1_BYPASS.sel, value: CCM_ANALOG.PLL1}
+- {id: CCM_ANALOG.PLL1_PREDIV.scale, value: '1', locked: true}
+- {id: CCM_ANALOG.PLL1_VDIV.scale, value: '50', locked: true}
+- {id: CCM_ANALOG.PLL2.denom, value: '1', locked: true}
+- {id: CCM_ANALOG.PLL2.num, value: '0', locked: true}
+- {id: CCM_ANALOG.PLL2_BYPASS.sel, value: CCM_ANALOG.PLL2_OUT_CLK}
+- {id: CCM_ANALOG.PLL2_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD0}
+- {id: CCM_ANALOG.PLL2_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD1}
+- {id: CCM_ANALOG.PLL2_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD2}
+- {id: CCM_ANALOG.PLL2_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD3}
+- {id: CCM_ANALOG.PLL3_BYPASS.sel, value: CCM_ANALOG.PLL3}
+- {id: CCM_ANALOG.PLL3_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD0}
+- {id: CCM_ANALOG.PLL3_PFD0_DIV.scale, value: '33', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD0_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD1}
+- {id: CCM_ANALOG.PLL3_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD2}
+- {id: CCM_ANALOG.PLL3_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD3}
+- {id: CCM_ANALOG.PLL4.denom, value: '50'}
+- {id: CCM_ANALOG.PLL4.div, value: '47'}
+- {id: CCM_ANALOG.PLL5.denom, value: '1'}
+- {id: CCM_ANALOG.PLL5.div, value: '40'}
+- {id: CCM_ANALOG.PLL5.num, value: '0'}
+- {id: CCM_ANALOG.PLL5_BYPASS.sel, value: CCM_ANALOG.PLL5_POST_DIV}
+- {id: CCM_ANALOG.PLL5_POST_DIV.scale, value: '2'}
+- {id: CCM_ANALOG.PLL7_BYPASS.sel, value: CCM_ANALOG.PLL7}
+- {id: CCM_ANALOG.VIDEO_DIV.scale, value: '4'}
+- {id: CCM_ANALOG_PLL_ENET_POWERDOWN_CFG, value: 'Yes'}
+- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB1_POWER_CFG, value: 'Yes'}
+- {id: CCM_ANALOG_PLL_USB2_EN_USB_CLKS_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB2_EN_USB_CLKS_OUT_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB2_POWER_CFG, value: 'Yes'}
+- {id: CCM_ANALOG_PLL_VIDEO_POWERDOWN_CFG, value: 'No'}
+sources:
+- {id: XTALOSC24M.RTC_OSC.outFreq, value: 32.768 kHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 100,                       /* PLL loop divider, Fout = Fin * 50 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 1,                         /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
+        .numerator = 0,                           /* 30 bit numerator of fractional loop divider */
+        .denominator = 1,                         /* 30 bit denominator of fractional loop divider */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 0,                         /* PLL loop divider, Fout = Fin * 20 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_usb_pll_config_t usb2PllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 0,                         /* PLL loop divider, Fout = Fin * 20 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 40,                        /* PLL loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
+        .postDivider = 8,                         /* Divider after PLL */
+        .numerator = 0,                           /* 30 bit numerator of fractional loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
+        .denominator = 1,                         /* 30 bit denominator of fractional loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+/*******************************************************************************
+ * Code for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+void BOARD_BootClockRUN(void)
+{
+    /* Init RTC OSC clock frequency. */
+    CLOCK_SetRtcXtalFreq(32768U);
+    /* Enable 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK;
+    /* Use free 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK;
+    /* Set XTAL 24MHz clock frequency. */
+    CLOCK_SetXtalFreq(24000000U);
+    /* Enable XTAL 24MHz clock source. */
+    CLOCK_InitExternalClk(0);
+    /* Enable internal RC. */
+    CLOCK_InitRcOsc24M();
+    /* Switch clock source to external OSC. */
+    CLOCK_SwitchOsc(kCLOCK_XtalOsc);
+    /* Set Oscillator ready counter value. */
+    CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127);
+    /* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 1);     /* Set PERIPH_CLK MUX to PERIPH_CLK2 */
+    /* Setting the VDD_SOC to 1.275V. It is necessary to config AHB to 600Mhz. */
+    DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x13);
+    /* Waiting for DCDC_STS_DC_OK bit is asserted */
+    while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0))
+    {
+    }
+    /* Set AHB_PODF. */
+    CLOCK_SetDiv(kCLOCK_AhbDiv, 0);
+    /* Disable IPG clock gate. */
+    CLOCK_DisableClock(kCLOCK_Adc1);
+    CLOCK_DisableClock(kCLOCK_Adc2);
+    CLOCK_DisableClock(kCLOCK_Xbar1);
+    CLOCK_DisableClock(kCLOCK_Xbar2);
+    CLOCK_DisableClock(kCLOCK_Xbar3);
+    /* Set IPG_PODF. */
+    CLOCK_SetDiv(kCLOCK_IpgDiv, 3);
+    /* Set ARM_PODF. */
+    CLOCK_SetDiv(kCLOCK_ArmDiv, 1);
+    /* Set PERIPH_CLK2_PODF. */
+    CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0);
+    /* Disable PERCLK clock gate. */
+    CLOCK_DisableClock(kCLOCK_Gpt1);
+    CLOCK_DisableClock(kCLOCK_Gpt1S);
+    CLOCK_DisableClock(kCLOCK_Gpt2);
+    CLOCK_DisableClock(kCLOCK_Gpt2S);
+    CLOCK_DisableClock(kCLOCK_Pit);
+    /* Set PERCLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_PerclkDiv, 1);
+    /* Disable USDHC1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Usdhc1);
+    /* Set USDHC1_PODF. */
+    CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1);
+    /* Set Usdhc1 clock source. */
+    CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0);
+    /* Disable USDHC2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Usdhc2);
+    /* Set USDHC2_PODF. */
+    CLOCK_SetDiv(kCLOCK_Usdhc2Div, 1);
+    /* Set Usdhc2 clock source. */
+    CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0);
+    /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
+     * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
+#ifndef SKIP_SYSCLK_INIT
+    /* Disable Semc clock gate. */
+    CLOCK_DisableClock(kCLOCK_Semc);
+    /* Set SEMC_PODF. */
+    CLOCK_SetDiv(kCLOCK_SemcDiv, 7);
+    /* Set Semc alt clock source. */
+    CLOCK_SetMux(kCLOCK_SemcAltMux, 0);
+    /* Set Semc clock source. */
+    CLOCK_SetMux(kCLOCK_SemcMux, 0);
+#endif
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Disable Flexspi clock gate. */
+    CLOCK_DisableClock(kCLOCK_FlexSpi);
+    /* Set FLEXSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_FlexspiDiv, 2);
+    /* Set Flexspi clock source. */
+    CLOCK_SetMux(kCLOCK_FlexspiMux, 1);
+#endif
+    /* Disable CSI clock gate. */
+    CLOCK_DisableClock(kCLOCK_Csi);
+    /* Set CSI_PODF. */
+    CLOCK_SetDiv(kCLOCK_CsiDiv, 1);
+    /* Set Csi clock source. */
+    CLOCK_SetMux(kCLOCK_CsiMux, 0);
+    /* Disable LPSPI clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpspi1);
+    CLOCK_DisableClock(kCLOCK_Lpspi2);
+    CLOCK_DisableClock(kCLOCK_Lpspi3);
+    CLOCK_DisableClock(kCLOCK_Lpspi4);
+    /* Set LPSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_LpspiDiv, 4);
+    /* Set Lpspi clock source. */
+    CLOCK_SetMux(kCLOCK_LpspiMux, 2);
+    /* Disable TRACE clock gate. */
+    CLOCK_DisableClock(kCLOCK_Trace);
+    /* Set TRACE_PODF. */
+    CLOCK_SetDiv(kCLOCK_TraceDiv, 3);
+    /* Set Trace clock source. */
+    CLOCK_SetMux(kCLOCK_TraceMux, 0);
+    /* Disable SAI1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai1);
+    /* Set SAI1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3);
+    /* Set SAI1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai1Div, 1);
+    /* Set Sai1 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai1Mux, 0);
+    /* Disable SAI2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai2);
+    /* Set SAI2_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 3);
+    /* Set SAI2_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai2Div, 1);
+    /* Set Sai2 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai2Mux, 0);
+    /* Disable SAI3 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai3);
+    /* Set SAI3_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3);
+    /* Set SAI3_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai3Div, 1);
+    /* Set Sai3 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai3Mux, 0);
+    /* Disable Lpi2c clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpi2c1);
+    CLOCK_DisableClock(kCLOCK_Lpi2c2);
+    CLOCK_DisableClock(kCLOCK_Lpi2c3);
+    /* Set LPI2C_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0);
+    /* Set Lpi2c clock source. */
+    CLOCK_SetMux(kCLOCK_Lpi2cMux, 0);
+    /* Disable CAN clock gate. */
+    CLOCK_DisableClock(kCLOCK_Can1);
+    CLOCK_DisableClock(kCLOCK_Can2);
+    CLOCK_DisableClock(kCLOCK_Can1S);
+    CLOCK_DisableClock(kCLOCK_Can2S);
+    /* Set CAN_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_CanDiv, 1);
+    /* Set Can clock source. */
+    CLOCK_SetMux(kCLOCK_CanMux, 2);
+    /* Disable UART clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpuart1);
+    CLOCK_DisableClock(kCLOCK_Lpuart2);
+    CLOCK_DisableClock(kCLOCK_Lpuart3);
+    CLOCK_DisableClock(kCLOCK_Lpuart4);
+    CLOCK_DisableClock(kCLOCK_Lpuart5);
+    CLOCK_DisableClock(kCLOCK_Lpuart6);
+    CLOCK_DisableClock(kCLOCK_Lpuart7);
+    CLOCK_DisableClock(kCLOCK_Lpuart8);
+    /* Set UART_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+    /* Set Uart clock source. */
+    CLOCK_SetMux(kCLOCK_UartMux, 0);
+    /* Disable LCDIF clock gate. */
+    CLOCK_DisableClock(kCLOCK_LcdPixel);
+    /* Set LCDIF_PRED. */
+    CLOCK_SetDiv(kCLOCK_LcdifPreDiv, 1);
+    /* Set LCDIF_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_LcdifDiv, 3);
+    /* Set Lcdif pre clock source. */
+    CLOCK_SetMux(kCLOCK_LcdifPreMux, 5);
+    /* Disable SPDIF clock gate. */
+    CLOCK_DisableClock(kCLOCK_Spdif);
+    /* Set SPDIF0_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1);
+    /* Set SPDIF0_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Spdif0Div, 7);
+    /* Set Spdif clock source. */
+    CLOCK_SetMux(kCLOCK_SpdifMux, 3);
+    /* Disable Flexio1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Flexio1);
+    /* Set FLEXIO1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1);
+    /* Set FLEXIO1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexio1Div, 7);
+    /* Set Flexio1 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexio1Mux, 3);
+    /* Disable Flexio2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Flexio2);
+    /* Set FLEXIO2_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Flexio2PreDiv, 1);
+    /* Set FLEXIO2_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexio2Div, 7);
+    /* Set Flexio2 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexio2Mux, 3);
+    /* Set Pll3 sw clock source. */
+    CLOCK_SetMux(kCLOCK_Pll3SwMux, 0);
+    /* Init ARM PLL. */
+    CLOCK_InitArmPll(&armPllConfig_BOARD_BootClockRUN);
+    /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
+     * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
+#ifndef SKIP_SYSCLK_INIT
+#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1)
+    #warning "SKIP_SYSCLK_INIT should be defined to keep system pll (selected to be SEMC source clock in SDK projects) unchanged."
+#endif
+    /* Init System PLL. */
+    CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
+    /* Init System pfd0. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
+    /* Init System pfd1. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
+    /* Init System pfd2. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd2, 24);
+    /* Init System pfd3. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd3, 16);
+#endif
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Init Usb1 PLL. */
+    CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
+    /* Init Usb1 pfd0. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 33);
+    /* Init Usb1 pfd1. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
+    /* Init Usb1 pfd2. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
+    /* Init Usb1 pfd3. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 19);
+#endif
+    /* DeInit Audio PLL. */
+    CLOCK_DeinitAudioPll();
+    /* Bypass Audio PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1);
+    /* Set divider for Audio PLL. */
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK;
+    /* Enable Audio PLL output. */
+    CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK;
+    /* Init Video PLL. */
+    uint32_t pllVideo;
+    /* Disable Video PLL output before initial Video PLL. */
+    CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_ENABLE_MASK;
+    /* Bypass PLL first */
+    CCM_ANALOG->PLL_VIDEO = (CCM_ANALOG->PLL_VIDEO & (~CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_MASK)) |
+                            CCM_ANALOG_PLL_VIDEO_BYPASS_MASK | CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC(0);
+    CCM_ANALOG->PLL_VIDEO_NUM = CCM_ANALOG_PLL_VIDEO_NUM_A(0);
+    CCM_ANALOG->PLL_VIDEO_DENOM = CCM_ANALOG_PLL_VIDEO_DENOM_B(1);
+    pllVideo = (CCM_ANALOG->PLL_VIDEO & (~(CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK | CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK))) |
+               CCM_ANALOG_PLL_VIDEO_ENABLE_MASK |CCM_ANALOG_PLL_VIDEO_DIV_SELECT(40);
+    pllVideo |= CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(1);
+    CCM_ANALOG->MISC2 = (CCM_ANALOG->MISC2 & (~CCM_ANALOG_MISC2_VIDEO_DIV_MASK)) | CCM_ANALOG_MISC2_VIDEO_DIV(3);
+    CCM_ANALOG->PLL_VIDEO = pllVideo;
+    while ((CCM_ANALOG->PLL_VIDEO & CCM_ANALOG_PLL_VIDEO_LOCK_MASK) == 0)
+    {
+    }
+    /* Disable bypass for Video PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllVideo, 0);
+    /* DeInit Enet PLL. */
+    CLOCK_DeinitEnetPll();
+    /* Bypass Enet PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllEnet, 1);
+    /* Set Enet output divider. */
+    CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_DIV_SELECT(1);
+    /* Enable Enet output. */
+    CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENABLE_MASK;
+    /* Enable Enet25M output. */
+    CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK;
+    /* Init Usb2 PLL. */
+    CLOCK_InitUsb2Pll(&usb2PllConfig_BOARD_BootClockRUN);
+    /* Set preperiph clock source. */
+    CLOCK_SetMux(kCLOCK_PrePeriphMux, 3);
+    /* Set periph clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 0);
+    /* Set periph clock2 clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
+    /* Set per clock source. */
+    CLOCK_SetMux(kCLOCK_PerclkMux, 0);
+    /* Set lvds1 clock source. */
+    CCM_ANALOG->MISC1 = (CCM_ANALOG->MISC1 & (~CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)) | CCM_ANALOG_MISC1_LVDS1_CLK_SEL(0);
+    /* Set clock out1 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0);
+    /* Set clock out1 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1);
+    /* Set clock out2 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0);
+    /* Set clock out2 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(18);
+    /* Set clock out1 drives clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK;
+    /* Disable clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK;
+    /* Disable clock out2. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK;
+    /* Set SAI1 MCLK1 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0);
+    /* Set SAI1 MCLK2 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0);
+    /* Set SAI1 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0);
+    /* Set SAI2 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI2MClk3Sel, 0);
+    /* Set SAI3 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0);
+    /* Set MQS configuration. */
+    IOMUXC_MQSConfig(IOMUXC_GPR,kIOMUXC_MqsPwmOverSampleRate32, 0);
+    /* Set ENET Ref clock source. */
+#if defined(IOMUXC_GPR_GPR1_ENET_REF_CLK_DIR_MASK)
+    IOMUXC_GPR->GPR1 &= ~IOMUXC_GPR_GPR1_ENET_REF_CLK_DIR_MASK;
+#elif defined(IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK)
+    /* Backward compatibility for original bitfield name */
+    IOMUXC_GPR->GPR1 &= ~IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK;
+#else
+#error "Neither IOMUXC_GPR_GPR1_ENET_REF_CLK_DIR_MASK nor IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK is defined."
+#endif /* defined(IOMUXC_GPR_GPR1_ENET_REF_CLK_DIR_MASK) */
+    /* Set GPT1 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK;
+    /* Set GPT2 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK;
+    /* Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
+}
diff --git a/hw/bsp/imxrt/boards/mimxrt1050_evkb/board/clock_config.h b/hw/bsp/imxrt/boards/mimxrt1050_evkb/board/clock_config.h
new file mode 100644
index 000000000..6b4264bf2
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1050_evkb/board/clock_config.h
@@ -0,0 +1,119 @@
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define BOARD_XTAL0_CLK_HZ                         24000000U  /*!< Board xtal0 frequency in Hz */
+
+#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32k frequency in Hz */
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKRUN_CORE_CLOCK             600000000U  /*!< Core clock frequency: 600000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT               600000000UL
+#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT               40000000UL
+#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT         32768UL
+#define BOARD_BOOTCLOCKRUN_CLKO1_CLK                  0UL
+#define BOARD_BOOTCLOCKRUN_CLKO2_CLK                  0UL
+#define BOARD_BOOTCLOCKRUN_CLK_1M                     1000000UL
+#define BOARD_BOOTCLOCKRUN_CLK_24M                    24000000UL
+#define BOARD_BOOTCLOCKRUN_CSI_CLK_ROOT               12000000UL
+#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK              2400000UL
+#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK           1200000UL
+#define BOARD_BOOTCLOCKRUN_ENET_REF_CLK               0UL
+#define BOARD_BOOTCLOCKRUN_ENET_TX_CLK                0UL
+#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT           30000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXIO2_CLK_ROOT           30000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT           160000000UL
+#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ      75000000UL
+#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ      75000000UL
+#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT               150000000UL
+#define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT             67500000UL
+#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT             60000000UL
+#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT             105600000UL
+#define BOARD_BOOTCLOCKRUN_LVDS1_CLK                  1200000000UL
+#define BOARD_BOOTCLOCKRUN_MQS_MCLK                   63529411UL
+#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT            75000000UL
+#define BOARD_BOOTCLOCKRUN_PLL7_MAIN_CLK              480000000UL
+#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2                 0UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2                 0UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT              75000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT            30000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT          0UL
+#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT             132000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT              80000000UL
+#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK                480000000UL
+#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK                480000000UL
+#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT            198000000UL
+#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT            198000000UL
+
+/*! @brief Arm PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN;
+/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
+/*! @brief Usb2 PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_usb_pll_config_t usb2PllConfig_BOARD_BootClockRUN;
+/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
+ */
+extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
+/*! @brief Video PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN;
+
+/*******************************************************************************
+ * API for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockRUN(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/imxrt/boards/mimxrt1050_evkb/mimxrt1050_evkb.mex b/hw/bsp/imxrt/boards/mimxrt1050_evkb/mimxrt1050_evkb.mex
new file mode 100644
index 000000000..c0a5b5660
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1050_evkb/mimxrt1050_evkb.mex
@@ -0,0 +1,1001 @@
+<?xml version="1.0" encoding= "UTF-8" ?>
+<configuration name="IMXRT1050-EVKB" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_13 http://mcuxpresso.nxp.com/XSD/mex_configuration_13.xsd" uuid="789fd1d3-821c-40a6-b04d-44ccc5a5d158" version="13" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_13" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+   <common>
+      <processor>MIMXRT1052xxxxB</processor>
+      <package>MIMXRT1052DVL6B</package>
+      <board>IMXRT1050-EVKB</board>
+      <board_revision>A</board_revision>
+      <mcu_data>ksdk2_0</mcu_data>
+      <cores selected="core0">
+         <core name="Cortex-M7F" id="core0" description="M7 core"/>
+      </cores>
+      <description></description>
+   </common>
+   <preferences>
+      <validate_boot_init_only>false</validate_boot_init_only>
+      <generate_extended_information>false</generate_extended_information>
+      <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
+      <update_include_paths>true</update_include_paths>
+      <generate_registers_defines>false</generate_registers_defines>
+   </preferences>
+   <tools>
+      <pins name="Pins" version="13.1" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/pin_mux.c" update_enabled="true"/>
+            <file path="board/pin_mux.h" update_enabled="true"/>
+         </generated_project_files>
+         <pins_profile>
+            <processor_version>13.0.2</processor_version>
+            <power_domains/>
+         </pins_profile>
+         <functions_list>
+            <function name="BOARD_InitPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins/>
+            </function>
+            <function name="BOARD_InitDEBUG_UARTPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 is not initialized" problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LPUART1" signal="TX" pin_num="K14" pin_signal="GPIO_AD_B0_12">
+                     <pin_features>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="open_drain" value="Disable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LPUART1" signal="RX" pin_num="L14" pin_signal="GPIO_AD_B0_13">
+                     <pin_features>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="open_drain" value="Disable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitSDRAMPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="SEMC" description="Peripheral SEMC is not initialized" problem_level="1" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="SEMC" signal="ADDR, 00" pin_num="C2" pin_signal="GPIO_EMC_09"/>
+                  <pin peripheral="SEMC" signal="ADDR, 01" pin_num="G1" pin_signal="GPIO_EMC_10"/>
+                  <pin peripheral="SEMC" signal="ADDR, 02" pin_num="G3" pin_signal="GPIO_EMC_11"/>
+                  <pin peripheral="SEMC" signal="ADDR, 03" pin_num="H1" pin_signal="GPIO_EMC_12"/>
+                  <pin peripheral="SEMC" signal="ADDR, 04" pin_num="A6" pin_signal="GPIO_EMC_13"/>
+                  <pin peripheral="SEMC" signal="ADDR, 05" pin_num="B6" pin_signal="GPIO_EMC_14"/>
+                  <pin peripheral="SEMC" signal="ADDR, 06" pin_num="B1" pin_signal="GPIO_EMC_15"/>
+                  <pin peripheral="SEMC" signal="ADDR, 07" pin_num="A5" pin_signal="GPIO_EMC_16"/>
+                  <pin peripheral="SEMC" signal="ADDR, 08" pin_num="A4" pin_signal="GPIO_EMC_17"/>
+                  <pin peripheral="SEMC" signal="ADDR, 09" pin_num="B2" pin_signal="GPIO_EMC_18"/>
+                  <pin peripheral="SEMC" signal="ADDR, 10" pin_num="G2" pin_signal="GPIO_EMC_23"/>
+                  <pin peripheral="SEMC" signal="ADDR, 11" pin_num="B4" pin_signal="GPIO_EMC_19"/>
+                  <pin peripheral="SEMC" signal="ADDR, 12" pin_num="A3" pin_signal="GPIO_EMC_20"/>
+                  <pin peripheral="SEMC" signal="BA, 0" pin_num="C1" pin_signal="GPIO_EMC_21"/>
+                  <pin peripheral="SEMC" signal="BA, 1" pin_num="F1" pin_signal="GPIO_EMC_22"/>
+                  <pin peripheral="SEMC" signal="semc_cas" pin_num="D3" pin_signal="GPIO_EMC_24"/>
+                  <pin peripheral="SEMC" signal="semc_cke" pin_num="A2" pin_signal="GPIO_EMC_27"/>
+                  <pin peripheral="SEMC" signal="semc_clk" pin_num="B3" pin_signal="GPIO_EMC_26"/>
+                  <pin peripheral="SEMC" signal="DATA, 00" pin_num="E3" pin_signal="GPIO_EMC_00"/>
+                  <pin peripheral="SEMC" signal="DATA, 01" pin_num="F3" pin_signal="GPIO_EMC_01"/>
+                  <pin peripheral="SEMC" signal="DATA, 02" pin_num="F4" pin_signal="GPIO_EMC_02"/>
+                  <pin peripheral="SEMC" signal="DATA, 03" pin_num="G4" pin_signal="GPIO_EMC_03"/>
+                  <pin peripheral="SEMC" signal="DATA, 04" pin_num="F2" pin_signal="GPIO_EMC_04"/>
+                  <pin peripheral="SEMC" signal="DATA, 05" pin_num="G5" pin_signal="GPIO_EMC_05"/>
+                  <pin peripheral="SEMC" signal="DATA, 06" pin_num="H5" pin_signal="GPIO_EMC_06"/>
+                  <pin peripheral="SEMC" signal="DATA, 07" pin_num="H4" pin_signal="GPIO_EMC_07"/>
+                  <pin peripheral="SEMC" signal="DATA, 08" pin_num="C6" pin_signal="GPIO_EMC_30"/>
+                  <pin peripheral="SEMC" signal="DATA, 09" pin_num="C5" pin_signal="GPIO_EMC_31"/>
+                  <pin peripheral="SEMC" signal="DATA, 10" pin_num="D5" pin_signal="GPIO_EMC_32"/>
+                  <pin peripheral="SEMC" signal="DATA, 11" pin_num="C4" pin_signal="GPIO_EMC_33"/>
+                  <pin peripheral="SEMC" signal="DATA, 12" pin_num="D4" pin_signal="GPIO_EMC_34"/>
+                  <pin peripheral="SEMC" signal="DATA, 13" pin_num="E5" pin_signal="GPIO_EMC_35"/>
+                  <pin peripheral="SEMC" signal="DATA, 14" pin_num="C3" pin_signal="GPIO_EMC_36"/>
+                  <pin peripheral="SEMC" signal="DATA, 15" pin_num="E4" pin_signal="GPIO_EMC_37"/>
+                  <pin peripheral="SEMC" signal="DM, 0" pin_num="H3" pin_signal="GPIO_EMC_08"/>
+                  <pin peripheral="SEMC" signal="DM, 1" pin_num="D6" pin_signal="GPIO_EMC_38"/>
+                  <pin peripheral="SEMC" signal="semc_ras" pin_num="D2" pin_signal="GPIO_EMC_25"/>
+                  <pin peripheral="SEMC" signal="semc_we" pin_num="D1" pin_signal="GPIO_EMC_28"/>
+                  <pin peripheral="SEMC" signal="CSX, 0" pin_num="C7" pin_signal="GPIO_EMC_41"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitCSIPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="CSI" description="Peripheral CSI is not initialized" problem_level="1" source="Pins:BOARD_InitCSIPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="LPI2C1" description="Peripheral LPI2C1 is not initialized" problem_level="1" source="Pins:BOARD_InitCSIPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitCSIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitCSIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="CSI" signal="csi_data, 09" pin_num="H13" pin_signal="GPIO_AD_B1_08"/>
+                  <pin peripheral="CSI" signal="csi_data, 08" pin_num="M13" pin_signal="GPIO_AD_B1_09"/>
+                  <pin peripheral="CSI" signal="csi_data, 07" pin_num="L13" pin_signal="GPIO_AD_B1_10"/>
+                  <pin peripheral="CSI" signal="csi_data, 06" pin_num="J13" pin_signal="GPIO_AD_B1_11"/>
+                  <pin peripheral="CSI" signal="csi_data, 05" pin_num="H12" pin_signal="GPIO_AD_B1_12"/>
+                  <pin peripheral="CSI" signal="csi_data, 04" pin_num="H11" pin_signal="GPIO_AD_B1_13"/>
+                  <pin peripheral="CSI" signal="csi_data, 02" pin_num="J14" pin_signal="GPIO_AD_B1_15"/>
+                  <pin peripheral="CSI" signal="csi_data, 03" pin_num="G12" pin_signal="GPIO_AD_B1_14"/>
+                  <pin peripheral="CSI" signal="csi_pixclk" pin_num="L12" pin_signal="GPIO_AD_B1_04"/>
+                  <pin peripheral="CSI" signal="csi_mclk" pin_num="K12" pin_signal="GPIO_AD_B1_05"/>
+                  <pin peripheral="CSI" signal="csi_vsync" pin_num="J12" pin_signal="GPIO_AD_B1_06"/>
+                  <pin peripheral="CSI" signal="csi_hsync" pin_num="K10" pin_signal="GPIO_AD_B1_07"/>
+                  <pin peripheral="LPI2C1" signal="SCL" pin_num="J11" pin_signal="GPIO_AD_B1_00">
+                     <pin_features>
+                        <pin_feature name="identifier" value="CSI_I2C_SCL"/>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_22K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="open_drain" value="Enable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LPI2C1" signal="SDA" pin_num="K11" pin_signal="GPIO_AD_B1_01">
+                     <pin_features>
+                        <pin_feature name="identifier" value="CSI_I2C_SDA"/>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_22K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="open_drain" value="Enable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO1" signal="gpio_io, 04" pin_num="F11" pin_signal="GPIO_AD_B0_04"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitLCDPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LCDIF" description="Peripheral LCDIF is not initialized" problem_level="1" source="Pins:BOARD_InitLCDPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitLCDPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitLCDPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 00" pin_num="C8" pin_signal="GPIO_B0_04">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 01" pin_num="B8" pin_signal="GPIO_B0_05">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 02" pin_num="A8" pin_signal="GPIO_B0_06">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_clk" pin_num="D7" pin_signal="GPIO_B0_00">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 03" pin_num="A9" pin_signal="GPIO_B0_07">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 04" pin_num="B9" pin_signal="GPIO_B0_08">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 05" pin_num="C9" pin_signal="GPIO_B0_09">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 06" pin_num="D9" pin_signal="GPIO_B0_10">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 07" pin_num="A10" pin_signal="GPIO_B0_11">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 08" pin_num="C10" pin_signal="GPIO_B0_12">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 09" pin_num="D10" pin_signal="GPIO_B0_13">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 10" pin_num="E10" pin_signal="GPIO_B0_14">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 11" pin_num="E11" pin_signal="GPIO_B0_15">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 12" pin_num="A11" pin_signal="GPIO_B1_00">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 13" pin_num="B11" pin_signal="GPIO_B1_01">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 14" pin_num="C11" pin_signal="GPIO_B1_02">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 15" pin_num="D11" pin_signal="GPIO_B1_03">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_enable" pin_num="E7" pin_signal="GPIO_B0_01">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_hsync" pin_num="E8" pin_signal="GPIO_B0_02">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_vsync" pin_num="D8" pin_signal="GPIO_B0_03">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO2" signal="gpio_io, 31" pin_num="B14" pin_signal="GPIO_B1_15">
+                     <pin_features>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitCANPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="CAN2" description="Peripheral CAN2 is not initialized" problem_level="1" source="Pins:BOARD_InitCANPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitCANPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitCANPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="CAN2" signal="TX" pin_num="H14" pin_signal="GPIO_AD_B0_14"/>
+                  <pin peripheral="CAN2" signal="RX" pin_num="L10" pin_signal="GPIO_AD_B0_15"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitENETPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="ENET" description="Peripheral ENET is not initialized" problem_level="1" source="Pins:BOARD_InitENETPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitENETPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitENETPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="ENET" signal="enet_mdc" pin_num="A7" pin_signal="GPIO_EMC_40"/>
+                  <pin peripheral="ENET" signal="enet_mdio" pin_num="C7" pin_signal="GPIO_EMC_41"/>
+                  <pin peripheral="ENET" signal="enet_ref_clk" pin_num="B13" pin_signal="GPIO_B1_10"/>
+                  <pin peripheral="ENET" signal="enet_rx_data, 0" pin_num="E12" pin_signal="GPIO_B1_04"/>
+                  <pin peripheral="ENET" signal="enet_rx_data, 1" pin_num="D12" pin_signal="GPIO_B1_05"/>
+                  <pin peripheral="ENET" signal="enet_rx_en" pin_num="C12" pin_signal="GPIO_B1_06"/>
+                  <pin peripheral="ENET" signal="enet_rx_er" pin_num="C13" pin_signal="GPIO_B1_11"/>
+                  <pin peripheral="ENET" signal="enet_tx_data, 0" pin_num="B12" pin_signal="GPIO_B1_07"/>
+                  <pin peripheral="ENET" signal="enet_tx_data, 1" pin_num="A12" pin_signal="GPIO_B1_08"/>
+                  <pin peripheral="ENET" signal="enet_tx_en" pin_num="A13" pin_signal="GPIO_B1_09"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitUSDHCPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="USDHC1" description="Peripheral USDHC1 is not initialized" problem_level="1" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 3" pin_num="J2" pin_signal="GPIO_SD_B0_05"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 2" pin_num="H2" pin_signal="GPIO_SD_B0_04"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 1" pin_num="K1" pin_signal="GPIO_SD_B0_03"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 0" pin_num="J1" pin_signal="GPIO_SD_B0_02"/>
+                  <pin peripheral="USDHC1" signal="usdhc_cmd" pin_num="J4" pin_signal="GPIO_SD_B0_00"/>
+                  <pin peripheral="USDHC1" signal="usdhc_clk" pin_num="J3" pin_signal="GPIO_SD_B0_01"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitHyperFlashPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXSPI" description="Peripheral FLEXSPI is not initialized" problem_level="1" source="Pins:BOARD_InitHyperFlashPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitHyperFlashPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitHyperFlashPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_SCLK" pin_num="L4" pin_signal="GPIO_SD_B1_07"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA2" pin_num="P4" pin_signal="GPIO_SD_B1_10"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA0" pin_num="P3" pin_signal="GPIO_SD_B1_08"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA1" pin_num="N4" pin_signal="GPIO_SD_B1_09"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_B_DATA3" pin_num="L5" pin_signal="GPIO_SD_B1_00"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_B_DATA2" pin_num="M5" pin_signal="GPIO_SD_B1_01"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_B_DATA1" pin_num="M3" pin_signal="GPIO_SD_B1_02"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_B_DATA0" pin_num="M4" pin_signal="GPIO_SD_B1_03"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_B_SCLK" pin_num="P2" pin_signal="GPIO_SD_B1_04"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_SS0_B" pin_num="L3" pin_signal="GPIO_SD_B1_06"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA3" pin_num="P5" pin_signal="GPIO_SD_B1_11"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DQS" pin_num="N3" pin_signal="GPIO_SD_B1_05"/>
+               </pins>
+            </function>
+         </functions_list>
+      </pins>
+      <clocks name="Clocks" version="11.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/clock_config.c" update_enabled="true"/>
+            <file path="board/clock_config.h" update_enabled="true"/>
+         </generated_project_files>
+         <clocks_profile>
+            <processor_version>13.0.2</processor_version>
+         </clocks_profile>
+         <clock_configurations>
+            <clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Clocks initialization requires the IOMUXC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="XTALOSC24M.RTC_OSC.outFreq" value="32.768 kHz" locked="false" enabled="true"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="AHB_CLK_ROOT.outFreq" value="600 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CAN_CLK_ROOT.outFreq" value="40 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CKIL_SYNC_CLK_ROOT.outFreq" value="32.768 kHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_1M.outFreq" value="1 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_24M.outFreq" value="24 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CSI_CLK_ROOT.outFreq" value="12 MHz" locked="false" accuracy=""/>
+                  <clock_output id="ENET_125M_CLK.outFreq" value="2.4 MHz" locked="false" accuracy=""/>
+                  <clock_output id="ENET_25M_REF_CLK.outFreq" value="1.2 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXIO1_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXIO2_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXSPI_CLK_ROOT.outFreq" value="160 MHz" locked="false" accuracy=""/>
+                  <clock_output id="GPT1_ipg_clk_highfreq.outFreq" value="75 MHz" locked="false" accuracy=""/>
+                  <clock_output id="GPT2_ipg_clk_highfreq.outFreq" value="75 MHz" locked="false" accuracy=""/>
+                  <clock_output id="IPG_CLK_ROOT.outFreq" value="150 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LCDIF_CLK_ROOT.outFreq" value="67.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LPI2C_CLK_ROOT.outFreq" value="60 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LPSPI_CLK_ROOT.outFreq" value="105.6 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LVDS1_CLK.outFreq" value="1.2 GHz" locked="false" accuracy=""/>
+                  <clock_output id="MQS_MCLK.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="PERCLK_CLK_ROOT.outFreq" value="75 MHz" locked="false" accuracy=""/>
+                  <clock_output id="PLL7_MAIN_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK2.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SEMC_CLK_ROOT.outFreq" value="75 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SPDIF0_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="TRACE_CLK_ROOT.outFreq" value="132 MHz" locked="false" accuracy=""/>
+                  <clock_output id="UART_CLK_ROOT.outFreq" value="80 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USBPHY1_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USBPHY2_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USDHC1_CLK_ROOT.outFreq" value="198 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USDHC2_CLK_ROOT.outFreq" value="198 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="CCM.AHB_PODF.scale" value="1" locked="true"/>
+                  <setting id="CCM.ARM_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.FLEXSPI_PODF.scale" value="3" locked="true"/>
+                  <setting id="CCM.FLEXSPI_SEL.sel" value="CCM.PLL3_SW_CLK_SEL" locked="false"/>
+                  <setting id="CCM.LPSPI_PODF.scale" value="5" locked="true"/>
+                  <setting id="CCM.PERCLK_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.SEMC_PODF.scale" value="8" locked="false"/>
+                  <setting id="CCM.TRACE_CLK_SEL.sel" value="CCM_ANALOG.PLL2_MAIN_CLK" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL1_BYPASS.sel" value="CCM_ANALOG.PLL1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL1_PREDIV.scale" value="1" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL1_VDIV.scale" value="50" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2.denom" value="1" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2.num" value="0" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_BYPASS.sel" value="CCM_ANALOG.PLL2_OUT_CLK" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_BYPASS.sel" value="CCM_ANALOG.PLL3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_DIV.scale" value="33" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL4.denom" value="50" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL4.div" value="47" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5.denom" value="1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5.div" value="40" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5.num" value="0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5_BYPASS.sel" value="CCM_ANALOG.PLL5_POST_DIV" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5_POST_DIV.scale" value="2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL7_BYPASS.sel" value="CCM_ANALOG.PLL7" locked="false"/>
+                  <setting id="CCM_ANALOG.VIDEO_DIV.scale" value="4" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_ENET_POWERDOWN_CFG" value="Yes" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_POWER_CFG" value="Yes" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB2_EN_USB_CLKS_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB2_EN_USB_CLKS_OUT_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB2_POWER_CFG" value="Yes" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_VIDEO_POWERDOWN_CFG" value="No" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>true</called_from_default_init>
+            </clock_configuration>
+         </clock_configurations>
+      </clocks>
+      <dcdx name="DCDx" version="3.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <dcdx_profile>
+            <processor_version>0.0.0</processor_version>
+         </dcdx_profile>
+         <dcdx_configurations/>
+      </dcdx>
+      <periphs name="Peripherals" version="12.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/peripherals.c" update_enabled="true"/>
+            <file path="board/peripherals.h" update_enabled="true"/>
+         </generated_project_files>
+         <peripherals_profile>
+            <processor_version>13.0.2</processor_version>
+         </peripherals_profile>
+         <functional_groups>
+            <functional_group name="BOARD_InitPeripherals" uuid="a7525270-2da6-4556-8d91-4ab9d0edc0e2" called_from_default_init="true" id_prefix="" core="core0">
+               <description></description>
+               <options/>
+               <dependencies/>
+               <instances>
+                  <instance name="CAN" uuid="cb1fcaec-81fe-4d3e-a079-a7d2819d6075" type="flexcan" type_id="flexcan_10d80efac19b25dcd240244aae88dca0" mode="interrupts" peripheral="CAN2" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="interruptsCfg">
+                        <setting name="messageBufferIrqs" value="0"/>
+                        <setting name="messageBufferIrqs2" value="0"/>
+                        <set name="interruptsEnable">
+                           <selected/>
+                        </set>
+                        <setting name="enable_irq" value="false"/>
+                        <struct name="interrupt_shared">
+                           <setting name="IRQn" value="CAN2_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                     <config_set name="fsl_flexcan" quick_selection="default">
+                        <struct name="can_config">
+                           <setting name="clockSource" value="kFLEXCAN_ClkSrcOsc"/>
+                           <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                           <setting name="wakeupSrc" value="kFLEXCAN_WakeupSrcUnfiltered"/>
+                           <setting name="baudRate" value="1000000"/>
+                           <setting name="maxMbNum" value="16"/>
+                           <setting name="enableLoopBack" value="false"/>
+                           <setting name="enableTimerSync" value="true"/>
+                           <setting name="enableSelfWakeup" value="false"/>
+                           <setting name="enableIndividMask" value="false"/>
+                           <struct name="timingConfig">
+                              <setting name="propSeg" value="2"/>
+                              <setting name="phaseSeg1" value="4"/>
+                              <setting name="phaseSeg2" value="3"/>
+                              <setting name="rJumpwidth" value="2"/>
+                              <struct name="bitTime"/>
+                           </struct>
+                        </struct>
+                        <setting name="enableRxFIFO" value="false"/>
+                        <struct name="rxFIFO">
+                           <setting name="idFilterTable" value=""/>
+                           <setting name="idFilterNum" value="num0"/>
+                           <setting name="idFilterType" value="kFLEXCAN_RxFifoFilterTypeA"/>
+                           <setting name="priority" value="kFLEXCAN_RxFifoPrioLow"/>
+                        </struct>
+                        <array name="channels">
+                           <struct name="0">
+                              <setting name="mbID" value="0"/>
+                              <setting name="mbType" value="mbRx"/>
+                              <struct name="rxMb">
+                                 <setting name="id" value="0"/>
+                                 <setting name="format" value="kFLEXCAN_FrameFormatStandard"/>
+                                 <setting name="type" value="kFLEXCAN_FrameTypeData"/>
+                              </struct>
+                           </struct>
+                           <struct name="1">
+                              <setting name="mbID" value="1"/>
+                              <setting name="mbType" value="mbTx"/>
+                              <struct name="rxMb">
+                                 <setting name="id" value="0"/>
+                                 <setting name="format" value="kFLEXCAN_FrameFormatStandard"/>
+                                 <setting name="type" value="kFLEXCAN_FrameTypeData"/>
+                              </struct>
+                           </struct>
+                        </array>
+                     </config_set>
+                  </instance>
+                  <instance name="CSI" uuid="da865a46-3511-4001-8bb0-5249c52b0e4d" type="csi" type_id="csi_b2cf1faba8074e676ac4be93ec552c5a" mode="interrupt" peripheral="CSI" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="fsl_csi" quick_selection="QuickSelection1">
+                        <struct name="clockConfig">
+                           <setting name="clockSource" value="BusInterfaceClock"/>
+                           <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                           <setting name="masterClockSource" value="CsiClock"/>
+                           <setting name="masterClockSourceFreq" value="ClocksTool_DefaultInit"/>
+                        </struct>
+                        <struct name="config">
+                           <setting name="format" value="RGB565"/>
+                           <setting name="i_width" value="320"/>
+                           <setting name="i_height" value="240"/>
+                           <setting name="dataBus" value="kCSI_DataBus8Bit"/>
+                           <setting name="workMode" value="kCSI_GatedClockMode"/>
+                           <setting name="useExtVsync" value="true"/>
+                           <set name="polarityFlags">
+                              <selected/>
+                           </set>
+                           <struct name="buffers_config">
+                              <setting name="bufferName" value="defaultBuffer"/>
+                              <setting name="bufCount" value="4"/>
+                              <setting name="bufferAlign" value="64"/>
+                           </struct>
+                        </struct>
+                        <struct name="interruptsCfg">
+                           <setting name="isInterruptEnabled" value="false"/>
+                           <set name="interruptSources">
+                              <selected/>
+                           </set>
+                           <struct name="interrupt">
+                              <setting name="IRQn" value="CSI_IRQn"/>
+                              <setting name="enable_interrrupt" value="enabled"/>
+                              <setting name="enable_priority" value="false"/>
+                              <setting name="priority" value="0"/>
+                              <setting name="enable_custom_name" value="false"/>
+                           </struct>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="CSI_LPI2C" uuid="47051ef3-2c25-4648-8f79-4ae87cd12674" type="lpi2c" type_id="lpi2c_db68d4f4f06a22e25ab51fe9bd6db4d2" mode="master" peripheral="LPI2C1" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="main" quick_selection="qs_interrupt">
+                        <setting name="clockSource" value="Lpi2cClock"/>
+                        <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                        <struct name="interrupt">
+                           <setting name="IRQn" value="LPI2C1_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                     <config_set name="master" quick_selection="qs_master_transfer">
+                        <setting name="mode" value="transfer"/>
+                        <struct name="config">
+                           <setting name="enableMaster" value="true"/>
+                           <setting name="enableDoze" value="true"/>
+                           <setting name="debugEnable" value="false"/>
+                           <setting name="ignoreAck" value="false"/>
+                           <setting name="pinConfig" value="kLPI2C_2PinOpenDrain"/>
+                           <setting name="baudRate_Hz" value="100000"/>
+                           <setting name="busIdleTimeout_ns" value="0"/>
+                           <setting name="pinLowTimeout_ns" value="0"/>
+                           <setting name="sdaGlitchFilterWidth_ns" value="0"/>
+                           <setting name="sclGlitchFilterWidth_ns" value="0"/>
+                           <struct name="hostRequest">
+                              <setting name="enable" value="false"/>
+                              <setting name="source" value="kLPI2C_HostRequestExternalPin"/>
+                              <setting name="polarity" value="kLPI2C_HostRequestPinActiveHigh"/>
+                           </struct>
+                           <set name="edmaRequestSources">
+                              <selected/>
+                           </set>
+                        </struct>
+                        <struct name="transfer">
+                           <setting name="blocking" value="false"/>
+                           <setting name="enable_custom_handle" value="false"/>
+                           <struct name="callback">
+                              <setting name="name" value=""/>
+                              <setting name="userData" value=""/>
+                           </struct>
+                           <set name="flags">
+                              <selected/>
+                           </set>
+                           <setting name="slaveAddress" value="0"/>
+                           <setting name="direction" value="kLPI2C_Write"/>
+                           <setting name="subaddress" value="0"/>
+                           <setting name="subaddressSize" value="1"/>
+                           <setting name="blocking_buffer" value="false"/>
+                           <setting name="enable_custom_buffer" value="false"/>
+                           <setting name="dataSize" value="1"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="DEBUG_UART" uuid="64741c26-6183-46d0-8bfe-02a92aa90e05" type="lpuart" type_id="lpuart_bf01db7d964092f3cf860852cba17f7e" mode="polling" peripheral="LPUART1" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="lpuartConfig_t">
+                        <struct name="lpuartConfig">
+                           <setting name="clockSource" value="LpuartClock"/>
+                           <setting name="lpuartSrcClkFreq" value="BOARD_BootClockRUN"/>
+                           <setting name="baudRate_Bps" value="115200"/>
+                           <setting name="parityMode" value="kLPUART_ParityDisabled"/>
+                           <setting name="dataBitsCount" value="kLPUART_EightDataBits"/>
+                           <setting name="isMsb" value="false"/>
+                           <setting name="stopBitCount" value="kLPUART_OneStopBit"/>
+                           <setting name="enableMatchAddress1" value="false"/>
+                           <setting name="matchAddress1" value="0"/>
+                           <setting name="enableMatchAddress2" value="false"/>
+                           <setting name="matchAddress2" value="0"/>
+                           <setting name="txFifoWatermark" value="0"/>
+                           <setting name="rxFifoWatermark" value="1"/>
+                           <setting name="enableRxRTS" value="false"/>
+                           <setting name="enableTxCTS" value="false"/>
+                           <setting name="txCtsSource" value="kLPUART_CtsSourcePin"/>
+                           <setting name="txCtsConfig" value="kLPUART_CtsSampleAtStart"/>
+                           <setting name="rxIdleType" value="kLPUART_IdleTypeStartBit"/>
+                           <setting name="rxIdleConfig" value="kLPUART_IdleCharacter1"/>
+                           <setting name="enableTx" value="true"/>
+                           <setting name="enableRx" value="true"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="LCD" uuid="8bf370a5-e797-45e8-b8c4-629c84c62843" type="elcdif" type_id="elcdif_1c39bcb43ed1a24bc8980672c7378576" mode="rgbMode" peripheral="LCDIF" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="fsl_elcdif">
+                        <struct name="config">
+                           <setting name="panelWidthInt" value="480"/>
+                           <setting name="panelHeightInt" value="272"/>
+                           <setting name="hsw" value="41"/>
+                           <setting name="hfp" value="4"/>
+                           <setting name="hbp" value="8"/>
+                           <setting name="vsw" value="10"/>
+                           <setting name="vfp" value="4"/>
+                           <setting name="vbp" value="2"/>
+                           <setting name="frameRate" value="60 Hz"/>
+                           <setting name="clockSource" value="LcdIfClock"/>
+                           <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                           <struct name="polarityFlags_st">
+                              <setting name="vSyncActive" value="kELCDIF_VsyncActiveLow"/>
+                              <setting name="hSyncActive" value="kELCDIF_HsyncActiveLow"/>
+                              <setting name="dataEnableActive" value="kELCDIF_DataEnableActiveLow"/>
+                              <setting name="driveDataClkEdge" value="kELCDIF_DriveDataOnFallingClkEdge"/>
+                           </struct>
+                           <setting name="bufferName" value="defaultBuffer"/>
+                           <setting name="bufferAlign" value="64"/>
+                           <setting name="pixelFormat" value="kELCDIF_PixelFormatRGB565"/>
+                           <setting name="dataBus" value="kELCDIF_DataBus16Bit"/>
+                           <setting name="enablePxpHandShake" value="false"/>
+                           <setting name="start" value="false"/>
+                        </struct>
+                        <setting name="isInterruptEnabled" value="true"/>
+                        <set name="elcdifInterruptSources">
+                           <selected>
+                              <id>kELCDIF_CurFrameDoneInterruptEnable</id>
+                           </selected>
+                        </set>
+                        <struct name="interrupt">
+                           <setting name="IRQn" value="LCDIF_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="NVIC" uuid="687e3f12-1330-4ff9-8138-6aaf372d3e22" type="nvic" type_id="nvic_57b5eef3774cc60acaede6f5b8bddc67" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="nvic">
+                        <array name="interrupt_table"/>
+                        <array name="interrupts"/>
+                     </config_set>
+                  </instance>
+               </instances>
+            </functional_group>
+         </functional_groups>
+         <components>
+            <component name="system" uuid="17c5d0d5-726a-40f6-a434-b121e9798a55" type_id="system">
+               <config_set_global name="global_system_definitions">
+                  <setting name="user_definitions" value=""/>
+                  <setting name="user_includes" value=""/>
+               </config_set_global>
+            </component>
+            <component name="msg" uuid="4a40b9b1-b64b-41b7-8ba7-728cda5039cd" type_id="msg">
+               <config_set_global name="global_messages"/>
+            </component>
+            <component name="gpio_adapter_common" uuid="c8d21d99-3f5e-47f2-aba7-0588ad4c2132" type_id="gpio_adapter_common_57579b9ac814fe26bf95df0a384c36b6">
+               <config_set_global name="global_gpio_adapter_common" quick_selection="default"/>
+            </component>
+            <component name="generic_uart" uuid="dfa0bda9-5863-49b3-9482-3ee85a2b93f0" type_id="generic_uart_8cae00565451cf2346eb1b8c624e73a6">
+               <config_set_global name="global_uart"/>
+            </component>
+            <component name="generic_can" uuid="3358d4d0-14d8-4ca7-9c13-378a0dc7f9a2" type_id="generic_can_1bfdd78b1af214566c1f23cf6a582d80">
+               <config_set_global name="global_can"/>
+            </component>
+            <component name="uart_cmsis_common" uuid="65c68c04-c4f4-4fbc-8c15-452d53d79fe6" type_id="uart_cmsis_common_9cb8e302497aa696fdbb5a4fd622c2a8">
+               <config_set_global name="global_USART_CMSIS_common" quick_selection="default"/>
+            </component>
+            <component name="generic_enet" uuid="99f59d06-c3df-407a-856a-22072ef95a98" type_id="generic_enet_74db5c914f0ddbe47d86af40cb77a619">
+               <config_set_global name="global_enet"/>
+            </component>
+         </components>
+      </periphs>
+      <tee name="TEE" version="4.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <tee_profile>
+            <processor_version>0.0.0</processor_version>
+         </tee_profile>
+      </tee>
+      <common name="common" version="1.0" enabled="true" update_project_code="true">
+         <core name="core0" role="primary" project_name="Project"/>
+      </common>
+   </tools>
+</configuration>
diff --git a/hw/bsp/imxrt/boards/mimxrt1060_evk/board/clock_config.c b/hw/bsp/imxrt/boards/mimxrt1060_evk/board/clock_config.c
new file mode 100644
index 000000000..c55e0135a
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1060_evk/board/clock_config.c
@@ -0,0 +1,509 @@
+/*
+ * How to setup clock using clock driver functions:
+ *
+ * 1. Call CLOCK_InitXXXPLL() to configure corresponding PLL clock.
+ *
+ * 2. Call CLOCK_InitXXXpfd() to configure corresponding PLL pfd clock.
+ *
+ * 3. Call CLOCK_SetMux() to configure corresponding clock source for target clock out.
+ *
+ * 4. Call CLOCK_SetDiv() to configure corresponding clock divider for target clock out.
+ *
+ * 5. Call CLOCK_SetXtalFreq() to set XTAL frequency based on board settings.
+ *
+ */
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v11.0
+processor: MIMXRT1062xxxxA
+package_id: MIMXRT1062DVL6A
+mcu_data: ksdk2_0
+processor_version: 13.0.2
+board: MIMXRT1060-EVK
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+#include "clock_config.h"
+#include "fsl_iomuxc.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockRUN();
+}
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockRUN
+called_from_default_init: true
+outputs:
+- {id: AHB_CLK_ROOT.outFreq, value: 600 MHz}
+- {id: CAN_CLK_ROOT.outFreq, value: 40 MHz}
+- {id: CKIL_SYNC_CLK_ROOT.outFreq, value: 32.768 kHz}
+- {id: CLK_1M.outFreq, value: 1 MHz}
+- {id: CLK_24M.outFreq, value: 24 MHz}
+- {id: CSI_CLK_ROOT.outFreq, value: 12 MHz}
+- {id: ENET2_125M_CLK.outFreq, value: 1.2 MHz}
+- {id: ENET_125M_CLK.outFreq, value: 2.4 MHz}
+- {id: ENET_25M_REF_CLK.outFreq, value: 1.2 MHz}
+- {id: FLEXIO1_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: FLEXIO2_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: FLEXSPI2_CLK_ROOT.outFreq, value: 1440/11 MHz}
+- {id: FLEXSPI_CLK_ROOT.outFreq, value: 1440/11 MHz}
+- {id: GPT1_ipg_clk_highfreq.outFreq, value: 75 MHz}
+- {id: GPT2_ipg_clk_highfreq.outFreq, value: 75 MHz}
+- {id: IPG_CLK_ROOT.outFreq, value: 150 MHz}
+- {id: LCDIF_CLK_ROOT.outFreq, value: 67.5 MHz}
+- {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz}
+- {id: LPSPI_CLK_ROOT.outFreq, value: 105.6 MHz}
+- {id: LVDS1_CLK.outFreq, value: 1.2 GHz}
+- {id: MQS_MCLK.outFreq, value: 1080/17 MHz}
+- {id: PERCLK_CLK_ROOT.outFreq, value: 75 MHz}
+- {id: PLL7_MAIN_CLK.outFreq, value: 480 MHz}
+- {id: SAI1_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK2.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK3.outFreq, value: 30 MHz}
+- {id: SAI2_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI2_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI2_MCLK3.outFreq, value: 30 MHz}
+- {id: SAI3_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK3.outFreq, value: 30 MHz}
+- {id: SEMC_CLK_ROOT.outFreq, value: 75 MHz}
+- {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: TRACE_CLK_ROOT.outFreq, value: 132 MHz}
+- {id: UART_CLK_ROOT.outFreq, value: 80 MHz}
+- {id: USBPHY1_CLK.outFreq, value: 480 MHz}
+- {id: USBPHY2_CLK.outFreq, value: 480 MHz}
+- {id: USDHC1_CLK_ROOT.outFreq, value: 198 MHz}
+- {id: USDHC2_CLK_ROOT.outFreq, value: 198 MHz}
+settings:
+- {id: CCM.AHB_PODF.scale, value: '1', locked: true}
+- {id: CCM.ARM_PODF.scale, value: '2', locked: true}
+- {id: CCM.FLEXSPI2_PODF.scale, value: '2', locked: true}
+- {id: CCM.FLEXSPI2_SEL.sel, value: CCM_ANALOG.PLL3_PFD0_CLK}
+- {id: CCM.FLEXSPI_PODF.scale, value: '2', locked: true}
+- {id: CCM.FLEXSPI_SEL.sel, value: CCM_ANALOG.PLL3_PFD0_CLK}
+- {id: CCM.LCDIF_PODF.scale, value: '4', locked: true}
+- {id: CCM.LCDIF_PRED.scale, value: '2', locked: true}
+- {id: CCM.LPSPI_PODF.scale, value: '5', locked: true}
+- {id: CCM.PERCLK_PODF.scale, value: '2', locked: true}
+- {id: CCM.SEMC_PODF.scale, value: '8'}
+- {id: CCM.TRACE_CLK_SEL.sel, value: CCM_ANALOG.PLL2_MAIN_CLK}
+- {id: CCM.TRACE_PODF.scale, value: '4', locked: true}
+- {id: CCM_ANALOG.PLL1_BYPASS.sel, value: CCM_ANALOG.PLL1}
+- {id: CCM_ANALOG.PLL1_PREDIV.scale, value: '1', locked: true}
+- {id: CCM_ANALOG.PLL1_VDIV.scale, value: '50', locked: true}
+- {id: CCM_ANALOG.PLL2.denom, value: '1', locked: true}
+- {id: CCM_ANALOG.PLL2.num, value: '0', locked: true}
+- {id: CCM_ANALOG.PLL2_BYPASS.sel, value: CCM_ANALOG.PLL2_OUT_CLK}
+- {id: CCM_ANALOG.PLL2_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD0}
+- {id: CCM_ANALOG.PLL2_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD1}
+- {id: CCM_ANALOG.PLL2_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD2}
+- {id: CCM_ANALOG.PLL2_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD3}
+- {id: CCM_ANALOG.PLL3_BYPASS.sel, value: CCM_ANALOG.PLL3}
+- {id: CCM_ANALOG.PLL3_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD0}
+- {id: CCM_ANALOG.PLL3_PFD0_DIV.scale, value: '33', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD0_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD1}
+- {id: CCM_ANALOG.PLL3_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD2}
+- {id: CCM_ANALOG.PLL3_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD3}
+- {id: CCM_ANALOG.PLL4.denom, value: '50'}
+- {id: CCM_ANALOG.PLL4.div, value: '47'}
+- {id: CCM_ANALOG.PLL5.denom, value: '1'}
+- {id: CCM_ANALOG.PLL5.div, value: '31', locked: true}
+- {id: CCM_ANALOG.PLL5.num, value: '0'}
+- {id: CCM_ANALOG.PLL5_BYPASS.sel, value: CCM_ANALOG.PLL5_POST_DIV}
+- {id: CCM_ANALOG.PLL5_POST_DIV.scale, value: '2', locked: true}
+- {id: CCM_ANALOG.PLL7_BYPASS.sel, value: CCM_ANALOG.PLL7}
+- {id: CCM_ANALOG.VIDEO_DIV.scale, value: '4', locked: true}
+- {id: CCM_ANALOG_PLL_ENET_POWERDOWN_CFG, value: 'Yes'}
+- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB1_POWER_CFG, value: 'Yes'}
+- {id: CCM_ANALOG_PLL_USB2_EN_USB_CLKS_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB2_EN_USB_CLKS_OUT_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB2_POWER_CFG, value: 'Yes'}
+- {id: CCM_ANALOG_PLL_VIDEO_POWERDOWN_CFG, value: 'No'}
+sources:
+- {id: XTALOSC24M.RTC_OSC.outFreq, value: 32.768 kHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 100,                       /* PLL loop divider, Fout = Fin * 50 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 1,                         /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
+        .numerator = 0,                           /* 30 bit numerator of fractional loop divider */
+        .denominator = 1,                         /* 30 bit denominator of fractional loop divider */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 0,                         /* PLL loop divider, Fout = Fin * 20 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_usb_pll_config_t usb2PllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 0,                         /* PLL loop divider, Fout = Fin * 20 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 31,                        /* PLL loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
+        .postDivider = 8,                         /* Divider after PLL */
+        .numerator = 0,                           /* 30 bit numerator of fractional loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
+        .denominator = 1,                         /* 30 bit denominator of fractional loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+/*******************************************************************************
+ * Code for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+void BOARD_BootClockRUN(void)
+{
+    /* Init RTC OSC clock frequency. */
+    CLOCK_SetRtcXtalFreq(32768U);
+    /* Enable 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK;
+    /* Use free 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK;
+    /* Set XTAL 24MHz clock frequency. */
+    CLOCK_SetXtalFreq(24000000U);
+    /* Enable XTAL 24MHz clock source. */
+    CLOCK_InitExternalClk(0);
+    /* Enable internal RC. */
+    CLOCK_InitRcOsc24M();
+    /* Switch clock source to external OSC. */
+    CLOCK_SwitchOsc(kCLOCK_XtalOsc);
+    /* Set Oscillator ready counter value. */
+    CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127);
+    /* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 1);     /* Set PERIPH_CLK MUX to PERIPH_CLK2 */
+    /* Setting the VDD_SOC to 1.275V. It is necessary to config AHB to 600Mhz. */
+    DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x13);
+    /* Waiting for DCDC_STS_DC_OK bit is asserted */
+    while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0))
+    {
+    }
+    /* Set AHB_PODF. */
+    CLOCK_SetDiv(kCLOCK_AhbDiv, 0);
+    /* Disable IPG clock gate. */
+    CLOCK_DisableClock(kCLOCK_Adc1);
+    CLOCK_DisableClock(kCLOCK_Adc2);
+    CLOCK_DisableClock(kCLOCK_Xbar1);
+    CLOCK_DisableClock(kCLOCK_Xbar2);
+    CLOCK_DisableClock(kCLOCK_Xbar3);
+    /* Set IPG_PODF. */
+    CLOCK_SetDiv(kCLOCK_IpgDiv, 3);
+    /* Set ARM_PODF. */
+    CLOCK_SetDiv(kCLOCK_ArmDiv, 1);
+    /* Set PERIPH_CLK2_PODF. */
+    CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0);
+    /* Disable PERCLK clock gate. */
+    CLOCK_DisableClock(kCLOCK_Gpt1);
+    CLOCK_DisableClock(kCLOCK_Gpt1S);
+    CLOCK_DisableClock(kCLOCK_Gpt2);
+    CLOCK_DisableClock(kCLOCK_Gpt2S);
+    CLOCK_DisableClock(kCLOCK_Pit);
+    /* Set PERCLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_PerclkDiv, 1);
+    /* Disable USDHC1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Usdhc1);
+    /* Set USDHC1_PODF. */
+    CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1);
+    /* Set Usdhc1 clock source. */
+    CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0);
+    /* Disable USDHC2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Usdhc2);
+    /* Set USDHC2_PODF. */
+    CLOCK_SetDiv(kCLOCK_Usdhc2Div, 1);
+    /* Set Usdhc2 clock source. */
+    CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0);
+    /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
+     * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
+#ifndef SKIP_SYSCLK_INIT
+    /* Disable Semc clock gate. */
+    CLOCK_DisableClock(kCLOCK_Semc);
+    /* Set SEMC_PODF. */
+    CLOCK_SetDiv(kCLOCK_SemcDiv, 7);
+    /* Set Semc alt clock source. */
+    CLOCK_SetMux(kCLOCK_SemcAltMux, 0);
+    /* Set Semc clock source. */
+    CLOCK_SetMux(kCLOCK_SemcMux, 0);
+#endif
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Disable Flexspi clock gate. */
+    CLOCK_DisableClock(kCLOCK_FlexSpi);
+    /* Set FLEXSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_FlexspiDiv, 1);
+    /* Set Flexspi clock source. */
+    CLOCK_SetMux(kCLOCK_FlexspiMux, 3);
+#endif
+    /* Disable Flexspi2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_FlexSpi2);
+    /* Set FLEXSPI2_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexspi2Div, 1);
+    /* Set Flexspi2 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexspi2Mux, 1);
+    /* Disable CSI clock gate. */
+    CLOCK_DisableClock(kCLOCK_Csi);
+    /* Set CSI_PODF. */
+    CLOCK_SetDiv(kCLOCK_CsiDiv, 1);
+    /* Set Csi clock source. */
+    CLOCK_SetMux(kCLOCK_CsiMux, 0);
+    /* Disable LPSPI clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpspi1);
+    CLOCK_DisableClock(kCLOCK_Lpspi2);
+    CLOCK_DisableClock(kCLOCK_Lpspi3);
+    CLOCK_DisableClock(kCLOCK_Lpspi4);
+    /* Set LPSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_LpspiDiv, 4);
+    /* Set Lpspi clock source. */
+    CLOCK_SetMux(kCLOCK_LpspiMux, 2);
+    /* Disable TRACE clock gate. */
+    CLOCK_DisableClock(kCLOCK_Trace);
+    /* Set TRACE_PODF. */
+    CLOCK_SetDiv(kCLOCK_TraceDiv, 3);
+    /* Set Trace clock source. */
+    CLOCK_SetMux(kCLOCK_TraceMux, 0);
+    /* Disable SAI1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai1);
+    /* Set SAI1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3);
+    /* Set SAI1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai1Div, 1);
+    /* Set Sai1 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai1Mux, 0);
+    /* Disable SAI2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai2);
+    /* Set SAI2_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 3);
+    /* Set SAI2_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai2Div, 1);
+    /* Set Sai2 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai2Mux, 0);
+    /* Disable SAI3 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai3);
+    /* Set SAI3_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3);
+    /* Set SAI3_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai3Div, 1);
+    /* Set Sai3 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai3Mux, 0);
+    /* Disable Lpi2c clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpi2c1);
+    CLOCK_DisableClock(kCLOCK_Lpi2c2);
+    CLOCK_DisableClock(kCLOCK_Lpi2c3);
+    /* Set LPI2C_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0);
+    /* Set Lpi2c clock source. */
+    CLOCK_SetMux(kCLOCK_Lpi2cMux, 0);
+    /* Disable CAN clock gate. */
+    CLOCK_DisableClock(kCLOCK_Can1);
+    CLOCK_DisableClock(kCLOCK_Can2);
+    CLOCK_DisableClock(kCLOCK_Can3);
+    CLOCK_DisableClock(kCLOCK_Can1S);
+    CLOCK_DisableClock(kCLOCK_Can2S);
+    CLOCK_DisableClock(kCLOCK_Can3S);
+    /* Set CAN_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_CanDiv, 1);
+    /* Set Can clock source. */
+    CLOCK_SetMux(kCLOCK_CanMux, 2);
+    /* Disable UART clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpuart1);
+    CLOCK_DisableClock(kCLOCK_Lpuart2);
+    CLOCK_DisableClock(kCLOCK_Lpuart3);
+    CLOCK_DisableClock(kCLOCK_Lpuart4);
+    CLOCK_DisableClock(kCLOCK_Lpuart5);
+    CLOCK_DisableClock(kCLOCK_Lpuart6);
+    CLOCK_DisableClock(kCLOCK_Lpuart7);
+    CLOCK_DisableClock(kCLOCK_Lpuart8);
+    /* Set UART_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+    /* Set Uart clock source. */
+    CLOCK_SetMux(kCLOCK_UartMux, 0);
+    /* Disable LCDIF clock gate. */
+    CLOCK_DisableClock(kCLOCK_LcdPixel);
+    /* Set LCDIF_PRED. */
+    CLOCK_SetDiv(kCLOCK_LcdifPreDiv, 1);
+    /* Set LCDIF_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_LcdifDiv, 3);
+    /* Set Lcdif pre clock source. */
+    CLOCK_SetMux(kCLOCK_LcdifPreMux, 5);
+    /* Disable SPDIF clock gate. */
+    CLOCK_DisableClock(kCLOCK_Spdif);
+    /* Set SPDIF0_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1);
+    /* Set SPDIF0_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Spdif0Div, 7);
+    /* Set Spdif clock source. */
+    CLOCK_SetMux(kCLOCK_SpdifMux, 3);
+    /* Disable Flexio1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Flexio1);
+    /* Set FLEXIO1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1);
+    /* Set FLEXIO1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexio1Div, 7);
+    /* Set Flexio1 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexio1Mux, 3);
+    /* Disable Flexio2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Flexio2);
+    /* Set FLEXIO2_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Flexio2PreDiv, 1);
+    /* Set FLEXIO2_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexio2Div, 7);
+    /* Set Flexio2 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexio2Mux, 3);
+    /* Set Pll3 sw clock source. */
+    CLOCK_SetMux(kCLOCK_Pll3SwMux, 0);
+    /* Init ARM PLL. */
+    CLOCK_InitArmPll(&armPllConfig_BOARD_BootClockRUN);
+    /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
+     * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
+#ifndef SKIP_SYSCLK_INIT
+#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1)
+    #warning "SKIP_SYSCLK_INIT should be defined to keep system pll (selected to be SEMC source clock in SDK projects) unchanged."
+#endif
+    /* Init System PLL. */
+    CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
+    /* Init System pfd0. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
+    /* Init System pfd1. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
+    /* Init System pfd2. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd2, 24);
+    /* Init System pfd3. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd3, 16);
+#endif
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Init Usb1 PLL. */
+    CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
+    /* Init Usb1 pfd0. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 33);
+    /* Init Usb1 pfd1. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
+    /* Init Usb1 pfd2. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
+    /* Init Usb1 pfd3. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 19);
+#endif
+    /* DeInit Audio PLL. */
+    CLOCK_DeinitAudioPll();
+    /* Bypass Audio PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1);
+    /* Set divider for Audio PLL. */
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK;
+    /* Enable Audio PLL output. */
+    CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK;
+    /* Init Video PLL. */
+    uint32_t pllVideo;
+    /* Disable Video PLL output before initial Video PLL. */
+    CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_ENABLE_MASK;
+    /* Bypass PLL first */
+    CCM_ANALOG->PLL_VIDEO = (CCM_ANALOG->PLL_VIDEO & (~CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_MASK)) |
+                            CCM_ANALOG_PLL_VIDEO_BYPASS_MASK | CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC(0);
+    CCM_ANALOG->PLL_VIDEO_NUM = CCM_ANALOG_PLL_VIDEO_NUM_A(0);
+    CCM_ANALOG->PLL_VIDEO_DENOM = CCM_ANALOG_PLL_VIDEO_DENOM_B(1);
+    pllVideo = (CCM_ANALOG->PLL_VIDEO & (~(CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK | CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK))) |
+               CCM_ANALOG_PLL_VIDEO_ENABLE_MASK |CCM_ANALOG_PLL_VIDEO_DIV_SELECT(31);
+    pllVideo |= CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(1);
+    CCM_ANALOG->MISC2 = (CCM_ANALOG->MISC2 & (~CCM_ANALOG_MISC2_VIDEO_DIV_MASK)) | CCM_ANALOG_MISC2_VIDEO_DIV(3);
+    CCM_ANALOG->PLL_VIDEO = pllVideo;
+    while ((CCM_ANALOG->PLL_VIDEO & CCM_ANALOG_PLL_VIDEO_LOCK_MASK) == 0)
+    {
+    }
+    /* Disable bypass for Video PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllVideo, 0);
+    /* DeInit Enet PLL. */
+    CLOCK_DeinitEnetPll();
+    /* Bypass Enet PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllEnet, 1);
+    /* Set Enet output divider. */
+    CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_DIV_SELECT(1);
+    /* Enable Enet output. */
+    CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENABLE_MASK;
+    /* Set Enet2 output divider. */
+    CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_ENET2_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_ENET2_DIV_SELECT(0);
+    /* Enable Enet2 output. */
+    CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET2_REF_EN_MASK;
+    /* Enable Enet25M output. */
+    CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK;
+    /* Init Usb2 PLL. */
+    CLOCK_InitUsb2Pll(&usb2PllConfig_BOARD_BootClockRUN);
+    /* Set preperiph clock source. */
+    CLOCK_SetMux(kCLOCK_PrePeriphMux, 3);
+    /* Set periph clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 0);
+    /* Set periph clock2 clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
+    /* Set per clock source. */
+    CLOCK_SetMux(kCLOCK_PerclkMux, 0);
+    /* Set lvds1 clock source. */
+    CCM_ANALOG->MISC1 = (CCM_ANALOG->MISC1 & (~CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)) | CCM_ANALOG_MISC1_LVDS1_CLK_SEL(0);
+    /* Set clock out1 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0);
+    /* Set clock out1 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1);
+    /* Set clock out2 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0);
+    /* Set clock out2 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(18);
+    /* Set clock out1 drives clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK;
+    /* Disable clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK;
+    /* Disable clock out2. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK;
+    /* Set SAI1 MCLK1 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0);
+    /* Set SAI1 MCLK2 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0);
+    /* Set SAI1 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0);
+    /* Set SAI2 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI2MClk3Sel, 0);
+    /* Set SAI3 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0);
+    /* Set MQS configuration. */
+    IOMUXC_MQSConfig(IOMUXC_GPR,kIOMUXC_MqsPwmOverSampleRate32, 0);
+    /* Set ENET Ref clock source. */
+    IOMUXC_GPR->GPR1 &= ~IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK;
+    /* Set ENET2 Ref clock source. */
+    IOMUXC_GPR->GPR1 &= ~IOMUXC_GPR_GPR1_ENET2_TX_CLK_DIR_MASK;
+    /* Set GPT1 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK;
+    /* Set GPT2 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK;
+    /* Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
+}
diff --git a/hw/bsp/imxrt/boards/mimxrt1060_evk/board/clock_config.h b/hw/bsp/imxrt/boards/mimxrt1060_evk/board/clock_config.h
new file mode 100644
index 000000000..7ce24b6f4
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1060_evk/board/clock_config.h
@@ -0,0 +1,123 @@
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define BOARD_XTAL0_CLK_HZ                         24000000U  /*!< Board xtal0 frequency in Hz */
+
+#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32k frequency in Hz */
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKRUN_CORE_CLOCK             600000000U  /*!< Core clock frequency: 600000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT               600000000UL
+#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT               40000000UL
+#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT         32768UL
+#define BOARD_BOOTCLOCKRUN_CLKO1_CLK                  0UL
+#define BOARD_BOOTCLOCKRUN_CLKO2_CLK                  0UL
+#define BOARD_BOOTCLOCKRUN_CLK_1M                     1000000UL
+#define BOARD_BOOTCLOCKRUN_CLK_24M                    24000000UL
+#define BOARD_BOOTCLOCKRUN_CSI_CLK_ROOT               12000000UL
+#define BOARD_BOOTCLOCKRUN_ENET2_125M_CLK             1200000UL
+#define BOARD_BOOTCLOCKRUN_ENET2_REF_CLK              0UL
+#define BOARD_BOOTCLOCKRUN_ENET2_TX_CLK               0UL
+#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK              2400000UL
+#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK           1200000UL
+#define BOARD_BOOTCLOCKRUN_ENET_REF_CLK               0UL
+#define BOARD_BOOTCLOCKRUN_ENET_TX_CLK                0UL
+#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT           30000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXIO2_CLK_ROOT           30000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXSPI2_CLK_ROOT          130909090UL
+#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT           130909090UL
+#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ      75000000UL
+#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ      75000000UL
+#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT               150000000UL
+#define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT             67500000UL
+#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT             60000000UL
+#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT             105600000UL
+#define BOARD_BOOTCLOCKRUN_LVDS1_CLK                  1200000000UL
+#define BOARD_BOOTCLOCKRUN_MQS_MCLK                   63529411UL
+#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT            75000000UL
+#define BOARD_BOOTCLOCKRUN_PLL7_MAIN_CLK              480000000UL
+#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2                 0UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2                 0UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT              75000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT            30000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT          0UL
+#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT             132000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT              80000000UL
+#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK                480000000UL
+#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK                480000000UL
+#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT            198000000UL
+#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT            198000000UL
+
+/*! @brief Arm PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN;
+/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
+/*! @brief Usb2 PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_usb_pll_config_t usb2PllConfig_BOARD_BootClockRUN;
+/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
+ */
+extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
+/*! @brief Video PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN;
+
+/*******************************************************************************
+ * API for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockRUN(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/imxrt/boards/mimxrt1060_evk/mimxrt1060_evk.mex b/hw/bsp/imxrt/boards/mimxrt1060_evk/mimxrt1060_evk.mex
new file mode 100644
index 000000000..39b3ed606
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1060_evk/mimxrt1060_evk.mex
@@ -0,0 +1,1001 @@
+<?xml version="1.0" encoding= "UTF-8" ?>
+<configuration name="MIMXRT1060-EVK" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_13 http://mcuxpresso.nxp.com/XSD/mex_configuration_13.xsd" uuid="2174caba-38fe-48d5-8f89-42a23354d23b" version="13" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_13" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+   <common>
+      <processor>MIMXRT1062xxxxA</processor>
+      <package>MIMXRT1062DVL6A</package>
+      <board>MIMXRT1060-EVK</board>
+      <board_revision>A2</board_revision>
+      <mcu_data>ksdk2_0</mcu_data>
+      <cores selected="core0">
+         <core name="Cortex-M7F" id="core0" description="M7 core"/>
+      </cores>
+      <description></description>
+   </common>
+   <preferences>
+      <validate_boot_init_only>false</validate_boot_init_only>
+      <generate_extended_information>false</generate_extended_information>
+      <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
+      <update_include_paths>true</update_include_paths>
+      <generate_registers_defines>false</generate_registers_defines>
+   </preferences>
+   <tools>
+      <pins name="Pins" version="13.1" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/pin_mux.c" update_enabled="true"/>
+            <file path="board/pin_mux.h" update_enabled="true"/>
+         </generated_project_files>
+         <pins_profile>
+            <processor_version>13.0.2</processor_version>
+            <power_domains/>
+         </pins_profile>
+         <functions_list>
+            <function name="BOARD_InitPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins/>
+            </function>
+            <function name="BOARD_InitDEBUG_UARTPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 is not initialized" problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LPUART1" signal="TX" pin_num="K14" pin_signal="GPIO_AD_B0_12">
+                     <pin_features>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="open_drain" value="Disable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LPUART1" signal="RX" pin_num="L14" pin_signal="GPIO_AD_B0_13">
+                     <pin_features>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="open_drain" value="Disable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitSDRAMPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="SEMC" description="Peripheral SEMC is not initialized" problem_level="1" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="SEMC" signal="ADDR, 00" pin_num="C2" pin_signal="GPIO_EMC_09"/>
+                  <pin peripheral="SEMC" signal="ADDR, 01" pin_num="G1" pin_signal="GPIO_EMC_10"/>
+                  <pin peripheral="SEMC" signal="ADDR, 02" pin_num="G3" pin_signal="GPIO_EMC_11"/>
+                  <pin peripheral="SEMC" signal="ADDR, 03" pin_num="H1" pin_signal="GPIO_EMC_12"/>
+                  <pin peripheral="SEMC" signal="ADDR, 04" pin_num="A6" pin_signal="GPIO_EMC_13"/>
+                  <pin peripheral="SEMC" signal="ADDR, 05" pin_num="B6" pin_signal="GPIO_EMC_14"/>
+                  <pin peripheral="SEMC" signal="ADDR, 06" pin_num="B1" pin_signal="GPIO_EMC_15"/>
+                  <pin peripheral="SEMC" signal="ADDR, 07" pin_num="A5" pin_signal="GPIO_EMC_16"/>
+                  <pin peripheral="SEMC" signal="ADDR, 08" pin_num="A4" pin_signal="GPIO_EMC_17"/>
+                  <pin peripheral="SEMC" signal="ADDR, 09" pin_num="B2" pin_signal="GPIO_EMC_18"/>
+                  <pin peripheral="SEMC" signal="ADDR, 10" pin_num="G2" pin_signal="GPIO_EMC_23"/>
+                  <pin peripheral="SEMC" signal="ADDR, 11" pin_num="B4" pin_signal="GPIO_EMC_19"/>
+                  <pin peripheral="SEMC" signal="ADDR, 12" pin_num="A3" pin_signal="GPIO_EMC_20"/>
+                  <pin peripheral="SEMC" signal="BA, 0" pin_num="C1" pin_signal="GPIO_EMC_21"/>
+                  <pin peripheral="SEMC" signal="BA, 1" pin_num="F1" pin_signal="GPIO_EMC_22"/>
+                  <pin peripheral="SEMC" signal="semc_cas" pin_num="D3" pin_signal="GPIO_EMC_24"/>
+                  <pin peripheral="SEMC" signal="semc_cke" pin_num="A2" pin_signal="GPIO_EMC_27"/>
+                  <pin peripheral="SEMC" signal="semc_clk" pin_num="B3" pin_signal="GPIO_EMC_26"/>
+                  <pin peripheral="SEMC" signal="DATA, 00" pin_num="E3" pin_signal="GPIO_EMC_00"/>
+                  <pin peripheral="SEMC" signal="DATA, 01" pin_num="F3" pin_signal="GPIO_EMC_01"/>
+                  <pin peripheral="SEMC" signal="DATA, 02" pin_num="F4" pin_signal="GPIO_EMC_02"/>
+                  <pin peripheral="SEMC" signal="DATA, 03" pin_num="G4" pin_signal="GPIO_EMC_03"/>
+                  <pin peripheral="SEMC" signal="DATA, 04" pin_num="F2" pin_signal="GPIO_EMC_04"/>
+                  <pin peripheral="SEMC" signal="DATA, 05" pin_num="G5" pin_signal="GPIO_EMC_05"/>
+                  <pin peripheral="SEMC" signal="DATA, 06" pin_num="H5" pin_signal="GPIO_EMC_06"/>
+                  <pin peripheral="SEMC" signal="DATA, 07" pin_num="H4" pin_signal="GPIO_EMC_07"/>
+                  <pin peripheral="SEMC" signal="DATA, 08" pin_num="C6" pin_signal="GPIO_EMC_30"/>
+                  <pin peripheral="SEMC" signal="DATA, 09" pin_num="C5" pin_signal="GPIO_EMC_31"/>
+                  <pin peripheral="SEMC" signal="DATA, 10" pin_num="D5" pin_signal="GPIO_EMC_32"/>
+                  <pin peripheral="SEMC" signal="DATA, 11" pin_num="C4" pin_signal="GPIO_EMC_33"/>
+                  <pin peripheral="SEMC" signal="DATA, 12" pin_num="D4" pin_signal="GPIO_EMC_34"/>
+                  <pin peripheral="SEMC" signal="DATA, 13" pin_num="E5" pin_signal="GPIO_EMC_35"/>
+                  <pin peripheral="SEMC" signal="DATA, 14" pin_num="C3" pin_signal="GPIO_EMC_36"/>
+                  <pin peripheral="SEMC" signal="DATA, 15" pin_num="E4" pin_signal="GPIO_EMC_37"/>
+                  <pin peripheral="SEMC" signal="DM, 0" pin_num="H3" pin_signal="GPIO_EMC_08"/>
+                  <pin peripheral="SEMC" signal="DM, 1" pin_num="D6" pin_signal="GPIO_EMC_38"/>
+                  <pin peripheral="SEMC" signal="semc_ras" pin_num="D2" pin_signal="GPIO_EMC_25"/>
+                  <pin peripheral="SEMC" signal="semc_we" pin_num="D1" pin_signal="GPIO_EMC_28"/>
+                  <pin peripheral="SEMC" signal="CS, 0" pin_num="E1" pin_signal="GPIO_EMC_29"/>
+                  <pin peripheral="SEMC" signal="semc_dqs" pin_num="B7" pin_signal="GPIO_EMC_39"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitCSIPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="CSI" description="Peripheral CSI is not initialized" problem_level="1" source="Pins:BOARD_InitCSIPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="LPI2C1" description="Peripheral LPI2C1 is not initialized" problem_level="1" source="Pins:BOARD_InitCSIPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitCSIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitCSIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="CSI" signal="csi_data, 09" pin_num="H13" pin_signal="GPIO_AD_B1_08"/>
+                  <pin peripheral="CSI" signal="csi_data, 08" pin_num="M13" pin_signal="GPIO_AD_B1_09"/>
+                  <pin peripheral="CSI" signal="csi_data, 07" pin_num="L13" pin_signal="GPIO_AD_B1_10"/>
+                  <pin peripheral="CSI" signal="csi_data, 06" pin_num="J13" pin_signal="GPIO_AD_B1_11"/>
+                  <pin peripheral="CSI" signal="csi_data, 05" pin_num="H12" pin_signal="GPIO_AD_B1_12"/>
+                  <pin peripheral="CSI" signal="csi_data, 04" pin_num="H11" pin_signal="GPIO_AD_B1_13"/>
+                  <pin peripheral="CSI" signal="csi_data, 02" pin_num="J14" pin_signal="GPIO_AD_B1_15"/>
+                  <pin peripheral="CSI" signal="csi_data, 03" pin_num="G12" pin_signal="GPIO_AD_B1_14"/>
+                  <pin peripheral="CSI" signal="csi_pixclk" pin_num="L12" pin_signal="GPIO_AD_B1_04"/>
+                  <pin peripheral="CSI" signal="csi_mclk" pin_num="K12" pin_signal="GPIO_AD_B1_05"/>
+                  <pin peripheral="CSI" signal="csi_vsync" pin_num="J12" pin_signal="GPIO_AD_B1_06"/>
+                  <pin peripheral="CSI" signal="csi_hsync" pin_num="K10" pin_signal="GPIO_AD_B1_07"/>
+                  <pin peripheral="LPI2C1" signal="SCL" pin_num="J11" pin_signal="GPIO_AD_B1_00">
+                     <pin_features>
+                        <pin_feature name="identifier" value="CSI_I2C_SCL"/>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_22K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="open_drain" value="Enable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LPI2C1" signal="SDA" pin_num="K11" pin_signal="GPIO_AD_B1_01">
+                     <pin_features>
+                        <pin_feature name="identifier" value="CSI_I2C_SDA"/>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_22K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="open_drain" value="Enable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO1" signal="gpio_io, 04" pin_num="F11" pin_signal="GPIO_AD_B0_04"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitLCDPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LCDIF" description="Peripheral LCDIF is not initialized" problem_level="1" source="Pins:BOARD_InitLCDPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitLCDPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitLCDPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 00" pin_num="C8" pin_signal="GPIO_B0_04">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 01" pin_num="B8" pin_signal="GPIO_B0_05">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 02" pin_num="A8" pin_signal="GPIO_B0_06">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_clk" pin_num="D7" pin_signal="GPIO_B0_00">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 03" pin_num="A9" pin_signal="GPIO_B0_07">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 04" pin_num="B9" pin_signal="GPIO_B0_08">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 05" pin_num="C9" pin_signal="GPIO_B0_09">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 06" pin_num="D9" pin_signal="GPIO_B0_10">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 07" pin_num="A10" pin_signal="GPIO_B0_11">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 08" pin_num="C10" pin_signal="GPIO_B0_12">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 09" pin_num="D10" pin_signal="GPIO_B0_13">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 10" pin_num="E10" pin_signal="GPIO_B0_14">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 11" pin_num="E11" pin_signal="GPIO_B0_15">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 12" pin_num="A11" pin_signal="GPIO_B1_00">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 13" pin_num="B11" pin_signal="GPIO_B1_01">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 14" pin_num="C11" pin_signal="GPIO_B1_02">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 15" pin_num="D11" pin_signal="GPIO_B1_03">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_enable" pin_num="E7" pin_signal="GPIO_B0_01">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_hsync" pin_num="E8" pin_signal="GPIO_B0_02">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_vsync" pin_num="D8" pin_signal="GPIO_B0_03">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO2" signal="gpio_io, 31" pin_num="B14" pin_signal="GPIO_B1_15">
+                     <pin_features>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO1" signal="gpio_io, 02" pin_num="M11" pin_signal="GPIO_AD_B0_02"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitCANPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="CAN2" description="Peripheral CAN2 is not initialized" problem_level="1" source="Pins:BOARD_InitCANPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitCANPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitCANPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="CAN2" signal="TX" pin_num="H14" pin_signal="GPIO_AD_B0_14"/>
+                  <pin peripheral="CAN2" signal="RX" pin_num="L10" pin_signal="GPIO_AD_B0_15"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitENETPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="ENET" description="Peripheral ENET is not initialized" problem_level="1" source="Pins:BOARD_InitENETPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitENETPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitENETPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="ENET" signal="enet_mdc" pin_num="A7" pin_signal="GPIO_EMC_40"/>
+                  <pin peripheral="ENET" signal="enet_mdio" pin_num="C7" pin_signal="GPIO_EMC_41"/>
+                  <pin peripheral="ENET" signal="enet_ref_clk" pin_num="B13" pin_signal="GPIO_B1_10"/>
+                  <pin peripheral="ENET" signal="enet_rx_data, 0" pin_num="E12" pin_signal="GPIO_B1_04"/>
+                  <pin peripheral="ENET" signal="enet_rx_data, 1" pin_num="D12" pin_signal="GPIO_B1_05"/>
+                  <pin peripheral="ENET" signal="enet_rx_en" pin_num="C12" pin_signal="GPIO_B1_06"/>
+                  <pin peripheral="ENET" signal="enet_rx_er" pin_num="C13" pin_signal="GPIO_B1_11"/>
+                  <pin peripheral="ENET" signal="enet_tx_data, 0" pin_num="B12" pin_signal="GPIO_B1_07"/>
+                  <pin peripheral="ENET" signal="enet_tx_data, 1" pin_num="A12" pin_signal="GPIO_B1_08"/>
+                  <pin peripheral="ENET" signal="enet_tx_en" pin_num="A13" pin_signal="GPIO_B1_09"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitUSDHCPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="USDHC1" description="Peripheral USDHC1 is not initialized" problem_level="1" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 3" pin_num="J2" pin_signal="GPIO_SD_B0_05"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 2" pin_num="H2" pin_signal="GPIO_SD_B0_04"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 1" pin_num="K1" pin_signal="GPIO_SD_B0_03"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 0" pin_num="J1" pin_signal="GPIO_SD_B0_02"/>
+                  <pin peripheral="USDHC1" signal="usdhc_cmd" pin_num="J4" pin_signal="GPIO_SD_B0_00"/>
+                  <pin peripheral="USDHC1" signal="usdhc_clk" pin_num="J3" pin_signal="GPIO_SD_B0_01"/>
+                  <pin peripheral="USDHC1" signal="usdhc_vselect" pin_num="C14" pin_signal="GPIO_B1_14"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitQSPIPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXSPI" description="Peripheral FLEXSPI is not initialized" problem_level="1" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA0" pin_num="P3" pin_signal="GPIO_SD_B1_08"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA1" pin_num="N4" pin_signal="GPIO_SD_B1_09"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA2" pin_num="P4" pin_signal="GPIO_SD_B1_10"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA3" pin_num="P5" pin_signal="GPIO_SD_B1_11"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_SCLK" pin_num="L4" pin_signal="GPIO_SD_B1_07"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_SS0_B" pin_num="L3" pin_signal="GPIO_SD_B1_06"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DQS" pin_num="N3" pin_signal="GPIO_SD_B1_05"/>
+               </pins>
+            </function>
+         </functions_list>
+      </pins>
+      <clocks name="Clocks" version="11.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/clock_config.c" update_enabled="true"/>
+            <file path="board/clock_config.h" update_enabled="true"/>
+         </generated_project_files>
+         <clocks_profile>
+            <processor_version>13.0.2</processor_version>
+         </clocks_profile>
+         <clock_configurations>
+            <clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Clocks initialization requires the IOMUXC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="XTALOSC24M.RTC_OSC.outFreq" value="32.768 kHz" locked="false" enabled="true"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="AHB_CLK_ROOT.outFreq" value="600 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CAN_CLK_ROOT.outFreq" value="40 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CKIL_SYNC_CLK_ROOT.outFreq" value="32.768 kHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_1M.outFreq" value="1 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_24M.outFreq" value="24 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CSI_CLK_ROOT.outFreq" value="12 MHz" locked="false" accuracy=""/>
+                  <clock_output id="ENET2_125M_CLK.outFreq" value="1.2 MHz" locked="false" accuracy=""/>
+                  <clock_output id="ENET_125M_CLK.outFreq" value="2.4 MHz" locked="false" accuracy=""/>
+                  <clock_output id="ENET_25M_REF_CLK.outFreq" value="1.2 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXIO1_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXIO2_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXSPI2_CLK_ROOT.outFreq" value="1440/11 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXSPI_CLK_ROOT.outFreq" value="1440/11 MHz" locked="false" accuracy=""/>
+                  <clock_output id="GPT1_ipg_clk_highfreq.outFreq" value="75 MHz" locked="false" accuracy=""/>
+                  <clock_output id="GPT2_ipg_clk_highfreq.outFreq" value="75 MHz" locked="false" accuracy=""/>
+                  <clock_output id="IPG_CLK_ROOT.outFreq" value="150 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LCDIF_CLK_ROOT.outFreq" value="67.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LPI2C_CLK_ROOT.outFreq" value="60 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LPSPI_CLK_ROOT.outFreq" value="105.6 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LVDS1_CLK.outFreq" value="1.2 GHz" locked="false" accuracy=""/>
+                  <clock_output id="MQS_MCLK.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="PERCLK_CLK_ROOT.outFreq" value="75 MHz" locked="false" accuracy=""/>
+                  <clock_output id="PLL7_MAIN_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK2.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SEMC_CLK_ROOT.outFreq" value="75 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SPDIF0_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="TRACE_CLK_ROOT.outFreq" value="132 MHz" locked="false" accuracy=""/>
+                  <clock_output id="UART_CLK_ROOT.outFreq" value="80 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USBPHY1_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USBPHY2_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USDHC1_CLK_ROOT.outFreq" value="198 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USDHC2_CLK_ROOT.outFreq" value="198 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="CCM.AHB_PODF.scale" value="1" locked="true"/>
+                  <setting id="CCM.ARM_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.FLEXSPI2_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.FLEXSPI2_SEL.sel" value="CCM_ANALOG.PLL3_PFD0_CLK" locked="false"/>
+                  <setting id="CCM.FLEXSPI_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.FLEXSPI_SEL.sel" value="CCM_ANALOG.PLL3_PFD0_CLK" locked="false"/>
+                  <setting id="CCM.LCDIF_PODF.scale" value="4" locked="true"/>
+                  <setting id="CCM.LCDIF_PRED.scale" value="2" locked="true"/>
+                  <setting id="CCM.LPSPI_PODF.scale" value="5" locked="true"/>
+                  <setting id="CCM.PERCLK_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.SEMC_PODF.scale" value="8" locked="false"/>
+                  <setting id="CCM.TRACE_CLK_SEL.sel" value="CCM_ANALOG.PLL2_MAIN_CLK" locked="false"/>
+                  <setting id="CCM.TRACE_PODF.scale" value="4" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL1_BYPASS.sel" value="CCM_ANALOG.PLL1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL1_PREDIV.scale" value="1" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL1_VDIV.scale" value="50" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2.denom" value="1" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2.num" value="0" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_BYPASS.sel" value="CCM_ANALOG.PLL2_OUT_CLK" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_BYPASS.sel" value="CCM_ANALOG.PLL3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_DIV.scale" value="33" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL4.denom" value="50" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL4.div" value="47" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5.denom" value="1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5.div" value="31" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL5.num" value="0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5_BYPASS.sel" value="CCM_ANALOG.PLL5_POST_DIV" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5_POST_DIV.scale" value="2" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL7_BYPASS.sel" value="CCM_ANALOG.PLL7" locked="false"/>
+                  <setting id="CCM_ANALOG.VIDEO_DIV.scale" value="4" locked="true"/>
+                  <setting id="CCM_ANALOG_PLL_ENET_POWERDOWN_CFG" value="Yes" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_POWER_CFG" value="Yes" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB2_EN_USB_CLKS_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB2_EN_USB_CLKS_OUT_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB2_POWER_CFG" value="Yes" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_VIDEO_POWERDOWN_CFG" value="No" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>true</called_from_default_init>
+            </clock_configuration>
+         </clock_configurations>
+      </clocks>
+      <dcdx name="DCDx" version="3.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <dcdx_profile>
+            <processor_version>0.0.0</processor_version>
+         </dcdx_profile>
+         <dcdx_configurations/>
+      </dcdx>
+      <periphs name="Peripherals" version="12.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/peripherals.c" update_enabled="true"/>
+            <file path="board/peripherals.h" update_enabled="true"/>
+         </generated_project_files>
+         <peripherals_profile>
+            <processor_version>13.0.2</processor_version>
+         </peripherals_profile>
+         <functional_groups>
+            <functional_group name="BOARD_InitPeripherals" uuid="96c1cec6-3bd3-47a2-8301-f38e4b0dd25f" called_from_default_init="true" id_prefix="" core="core0">
+               <description></description>
+               <options/>
+               <dependencies/>
+               <instances>
+                  <instance name="CAN" uuid="eb0900eb-d552-4097-9dcf-a07e592a887f" type="flexcan" type_id="flexcan_ba45456ec815807245205237e2bf425b" mode="interrupts" peripheral="CAN2" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="interruptsCfg">
+                        <setting name="messageBufferIrqs" value="0"/>
+                        <setting name="messageBufferIrqs2" value="0"/>
+                        <set name="interruptsEnable">
+                           <selected/>
+                        </set>
+                        <setting name="enable_irq" value="false"/>
+                        <struct name="interrupt_shared">
+                           <setting name="IRQn" value="CAN2_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                     <config_set name="fsl_flexcan" quick_selection="default">
+                        <struct name="can_config">
+                           <setting name="clockSource" value="kFLEXCAN_ClkSrcOsc"/>
+                           <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                           <setting name="baudRate" value="1000000"/>
+                           <setting name="maxMbNum" value="16"/>
+                           <setting name="enableLoopBack" value="false"/>
+                           <setting name="enableSelfWakeup" value="false"/>
+                           <setting name="enableIndividMask" value="false"/>
+                           <struct name="timingConfig">
+                              <setting name="propSeg" value="2"/>
+                              <setting name="phaseSeg1" value="4"/>
+                              <setting name="phaseSeg2" value="3"/>
+                              <setting name="rJumpwidth" value="2"/>
+                              <struct name="bitTime"/>
+                           </struct>
+                        </struct>
+                        <setting name="enableRxFIFO" value="false"/>
+                        <struct name="rxFIFO">
+                           <setting name="idFilterTable" value=""/>
+                           <setting name="idFilterNum" value="num0"/>
+                           <setting name="idFilterType" value="kFLEXCAN_RxFifoFilterTypeA"/>
+                           <setting name="priority" value="kFLEXCAN_RxFifoPrioLow"/>
+                        </struct>
+                        <array name="channels">
+                           <struct name="0">
+                              <setting name="mbID" value="0"/>
+                              <setting name="mbType" value="mbRx"/>
+                              <struct name="rxMb">
+                                 <setting name="id" value="0"/>
+                                 <setting name="format" value="kFLEXCAN_FrameFormatStandard"/>
+                                 <setting name="type" value="kFLEXCAN_FrameTypeData"/>
+                              </struct>
+                           </struct>
+                           <struct name="1">
+                              <setting name="mbID" value="1"/>
+                              <setting name="mbType" value="mbTx"/>
+                              <struct name="rxMb">
+                                 <setting name="id" value="0"/>
+                                 <setting name="format" value="kFLEXCAN_FrameFormatStandard"/>
+                                 <setting name="type" value="kFLEXCAN_FrameTypeData"/>
+                              </struct>
+                           </struct>
+                        </array>
+                     </config_set>
+                  </instance>
+                  <instance name="CSI" uuid="f67d9a64-c26d-4421-9805-a062b24146f2" type="csi" type_id="csi_3739ec1355c7b915be929f3b7e35095b" mode="interrupt" peripheral="CSI" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="fsl_csi" quick_selection="QuickSelection1">
+                        <struct name="clockConfig">
+                           <setting name="clockSource" value="BusInterfaceClock"/>
+                           <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                           <setting name="masterClockSource" value="CsiClock"/>
+                           <setting name="masterClockSourceFreq" value="ClocksTool_DefaultInit"/>
+                        </struct>
+                        <struct name="config">
+                           <setting name="format" value="RGB565"/>
+                           <setting name="i_width" value="320"/>
+                           <setting name="i_height" value="240"/>
+                           <setting name="dataBus" value="kCSI_DataBus8Bit"/>
+                           <setting name="workMode" value="kCSI_GatedClockMode"/>
+                           <setting name="useExtVsync" value="true"/>
+                           <set name="polarityFlags">
+                              <selected/>
+                           </set>
+                           <struct name="buffers_config">
+                              <setting name="bufferName" value="defaultBuffer"/>
+                              <setting name="bufCount" value="4"/>
+                              <setting name="bufferAlign" value="64"/>
+                           </struct>
+                        </struct>
+                        <struct name="interruptsCfg">
+                           <setting name="isInterruptEnabled" value="false"/>
+                           <set name="interruptSources">
+                              <selected/>
+                           </set>
+                           <struct name="interrupt">
+                              <setting name="IRQn" value="CSI_IRQn"/>
+                              <setting name="enable_interrrupt" value="enabled"/>
+                              <setting name="enable_priority" value="false"/>
+                              <setting name="priority" value="0"/>
+                              <setting name="enable_custom_name" value="false"/>
+                           </struct>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="CSI_LPI2C" uuid="f2c6cd0a-751c-4424-9248-a4d98da47de7" type="lpi2c" type_id="lpi2c_db68d4f4f06a22e25ab51fe9bd6db4d2" mode="master" peripheral="LPI2C1" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="main" quick_selection="qs_interrupt">
+                        <setting name="clockSource" value="Lpi2cClock"/>
+                        <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                        <struct name="interrupt">
+                           <setting name="IRQn" value="LPI2C1_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                     <config_set name="master" quick_selection="qs_master_transfer">
+                        <setting name="mode" value="transfer"/>
+                        <struct name="config">
+                           <setting name="enableMaster" value="true"/>
+                           <setting name="enableDoze" value="true"/>
+                           <setting name="debugEnable" value="false"/>
+                           <setting name="ignoreAck" value="false"/>
+                           <setting name="pinConfig" value="kLPI2C_2PinOpenDrain"/>
+                           <setting name="baudRate_Hz" value="100000"/>
+                           <setting name="busIdleTimeout_ns" value="0"/>
+                           <setting name="pinLowTimeout_ns" value="0"/>
+                           <setting name="sdaGlitchFilterWidth_ns" value="0"/>
+                           <setting name="sclGlitchFilterWidth_ns" value="0"/>
+                           <struct name="hostRequest">
+                              <setting name="enable" value="false"/>
+                              <setting name="source" value="kLPI2C_HostRequestExternalPin"/>
+                              <setting name="polarity" value="kLPI2C_HostRequestPinActiveHigh"/>
+                           </struct>
+                           <set name="edmaRequestSources">
+                              <selected/>
+                           </set>
+                        </struct>
+                        <struct name="transfer">
+                           <setting name="blocking" value="false"/>
+                           <setting name="enable_custom_handle" value="false"/>
+                           <struct name="callback">
+                              <setting name="name" value=""/>
+                              <setting name="userData" value=""/>
+                           </struct>
+                           <set name="flags">
+                              <selected/>
+                           </set>
+                           <setting name="slaveAddress" value="0"/>
+                           <setting name="direction" value="kLPI2C_Write"/>
+                           <setting name="subaddress" value="0"/>
+                           <setting name="subaddressSize" value="1"/>
+                           <setting name="blocking_buffer" value="false"/>
+                           <setting name="enable_custom_buffer" value="false"/>
+                           <setting name="dataSize" value="1"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="DEBUG_UART" uuid="01f250e2-83d7-4b7b-a98d-772d1c3bdb42" type="lpuart" type_id="lpuart_bf01db7d964092f3cf860852cba17f7e" mode="polling" peripheral="LPUART1" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="lpuartConfig_t">
+                        <struct name="lpuartConfig">
+                           <setting name="clockSource" value="LpuartClock"/>
+                           <setting name="lpuartSrcClkFreq" value="BOARD_BootClockRUN"/>
+                           <setting name="baudRate_Bps" value="115200"/>
+                           <setting name="parityMode" value="kLPUART_ParityDisabled"/>
+                           <setting name="dataBitsCount" value="kLPUART_EightDataBits"/>
+                           <setting name="isMsb" value="false"/>
+                           <setting name="stopBitCount" value="kLPUART_OneStopBit"/>
+                           <setting name="enableMatchAddress1" value="false"/>
+                           <setting name="matchAddress1" value="0"/>
+                           <setting name="enableMatchAddress2" value="false"/>
+                           <setting name="matchAddress2" value="0"/>
+                           <setting name="txFifoWatermark" value="0"/>
+                           <setting name="rxFifoWatermark" value="1"/>
+                           <setting name="enableRxRTS" value="false"/>
+                           <setting name="enableTxCTS" value="false"/>
+                           <setting name="txCtsSource" value="kLPUART_CtsSourcePin"/>
+                           <setting name="txCtsConfig" value="kLPUART_CtsSampleAtStart"/>
+                           <setting name="rxIdleType" value="kLPUART_IdleTypeStartBit"/>
+                           <setting name="rxIdleConfig" value="kLPUART_IdleCharacter1"/>
+                           <setting name="enableTx" value="true"/>
+                           <setting name="enableRx" value="true"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="LCD" uuid="90a0c31d-6042-4687-af0f-0892536bc1ba" type="elcdif" type_id="elcdif_1c39bcb43ed1a24bc8980672c7378576" mode="rgbMode" peripheral="LCDIF" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="fsl_elcdif">
+                        <struct name="config">
+                           <setting name="panelWidthInt" value="480"/>
+                           <setting name="panelHeightInt" value="272"/>
+                           <setting name="hsw" value="41"/>
+                           <setting name="hfp" value="4"/>
+                           <setting name="hbp" value="8"/>
+                           <setting name="vsw" value="10"/>
+                           <setting name="vfp" value="4"/>
+                           <setting name="vbp" value="3"/>
+                           <setting name="frameRate" value="60 Hz"/>
+                           <setting name="clockSource" value="LcdIfClock"/>
+                           <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                           <struct name="polarityFlags_st">
+                              <setting name="vSyncActive" value="kELCDIF_VsyncActiveLow"/>
+                              <setting name="hSyncActive" value="kELCDIF_HsyncActiveLow"/>
+                              <setting name="dataEnableActive" value="kELCDIF_DataEnableActiveLow"/>
+                              <setting name="driveDataClkEdge" value="kELCDIF_DriveDataOnFallingClkEdge"/>
+                           </struct>
+                           <setting name="bufferName" value="defaultBuffer"/>
+                           <setting name="bufferAlign" value="64"/>
+                           <setting name="pixelFormat" value="kELCDIF_PixelFormatRGB565"/>
+                           <setting name="dataBus" value="kELCDIF_DataBus16Bit"/>
+                           <setting name="enablePxpHandShake" value="false"/>
+                           <setting name="start" value="false"/>
+                        </struct>
+                        <setting name="isInterruptEnabled" value="true"/>
+                        <set name="elcdifInterruptSources">
+                           <selected>
+                              <id>kELCDIF_CurFrameDoneInterruptEnable</id>
+                           </selected>
+                        </set>
+                        <struct name="interrupt">
+                           <setting name="IRQn" value="LCDIF_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="NVIC" uuid="b31fa225-2a52-486b-9c5c-33a184a2c716" type="nvic" type_id="nvic_57b5eef3774cc60acaede6f5b8bddc67" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="nvic">
+                        <array name="interrupt_table"/>
+                        <array name="interrupts"/>
+                     </config_set>
+                  </instance>
+               </instances>
+            </functional_group>
+         </functional_groups>
+         <components>
+            <component name="system" uuid="aa3cc953-557b-4557-b7fe-6fedc31acf98" type_id="system">
+               <config_set_global name="global_system_definitions">
+                  <setting name="user_definitions" value=""/>
+                  <setting name="user_includes" value=""/>
+               </config_set_global>
+            </component>
+            <component name="msg" uuid="8b3f852e-ee1e-45e9-abff-0ff722f1d65d" type_id="msg">
+               <config_set_global name="global_messages"/>
+            </component>
+            <component name="gpio_adapter_common" uuid="539d282e-5136-4289-9058-9a46b221ca45" type_id="gpio_adapter_common_57579b9ac814fe26bf95df0a384c36b6">
+               <config_set_global name="global_gpio_adapter_common" quick_selection="default"/>
+            </component>
+            <component name="generic_uart" uuid="6e4c02c4-0524-4905-91b5-01d2e2502186" type_id="generic_uart_8cae00565451cf2346eb1b8c624e73a6">
+               <config_set_global name="global_uart"/>
+            </component>
+            <component name="generic_can" uuid="c6d8fd36-2bbd-44c6-a160-54e7e12d0807" type_id="generic_can_1bfdd78b1af214566c1f23cf6a582d80">
+               <config_set_global name="global_can"/>
+            </component>
+            <component name="uart_cmsis_common" uuid="7d3626d3-4536-4838-a35d-3b8cf5a2bd71" type_id="uart_cmsis_common_9cb8e302497aa696fdbb5a4fd622c2a8">
+               <config_set_global name="global_USART_CMSIS_common" quick_selection="default"/>
+            </component>
+            <component name="generic_enet" uuid="738ea8df-6176-4e52-b4c7-b88aa9c17d13" type_id="generic_enet_74db5c914f0ddbe47d86af40cb77a619">
+               <config_set_global name="global_enet"/>
+            </component>
+         </components>
+      </periphs>
+      <tee name="TEE" version="4.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <tee_profile>
+            <processor_version>0.0.0</processor_version>
+         </tee_profile>
+      </tee>
+   </tools>
+</configuration>
diff --git a/hw/bsp/imxrt/boards/mimxrt1064_evk/board/clock_config.c b/hw/bsp/imxrt/boards/mimxrt1064_evk/board/clock_config.c
new file mode 100644
index 000000000..778ab02f2
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1064_evk/board/clock_config.c
@@ -0,0 +1,511 @@
+/*
+ * How to setup clock using clock driver functions:
+ *
+ * 1. Call CLOCK_InitXXXPLL() to configure corresponding PLL clock.
+ *
+ * 2. Call CLOCK_InitXXXpfd() to configure corresponding PLL pfd clock.
+ *
+ * 3. Call CLOCK_SetMux() to configure corresponding clock source for target clock out.
+ *
+ * 4. Call CLOCK_SetDiv() to configure corresponding clock divider for target clock out.
+ *
+ * 5. Call CLOCK_SetXtalFreq() to set XTAL frequency based on board settings.
+ *
+ */
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v11.0
+processor: MIMXRT1064xxxxA
+package_id: MIMXRT1064DVL6A
+mcu_data: ksdk2_0
+processor_version: 13.0.2
+board: MIMXRT1064-EVK
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+#include "clock_config.h"
+#include "fsl_iomuxc.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockRUN();
+}
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockRUN
+called_from_default_init: true
+outputs:
+- {id: AHB_CLK_ROOT.outFreq, value: 600 MHz}
+- {id: CAN_CLK_ROOT.outFreq, value: 40 MHz}
+- {id: CKIL_SYNC_CLK_ROOT.outFreq, value: 32.768 kHz}
+- {id: CLK_1M.outFreq, value: 1 MHz}
+- {id: CLK_24M.outFreq, value: 24 MHz}
+- {id: CSI_CLK_ROOT.outFreq, value: 12 MHz}
+- {id: ENET2_125M_CLK.outFreq, value: 1.2 MHz}
+- {id: ENET_125M_CLK.outFreq, value: 2.4 MHz}
+- {id: ENET_25M_REF_CLK.outFreq, value: 1.2 MHz}
+- {id: FLEXIO1_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: FLEXIO2_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: FLEXSPI2_CLK_ROOT.outFreq, value: 1440/11 MHz}
+- {id: FLEXSPI_CLK_ROOT.outFreq, value: 1440/11 MHz}
+- {id: GPT1_ipg_clk_highfreq.outFreq, value: 75 MHz}
+- {id: GPT2_ipg_clk_highfreq.outFreq, value: 75 MHz}
+- {id: IPG_CLK_ROOT.outFreq, value: 150 MHz}
+- {id: LCDIF_CLK_ROOT.outFreq, value: 67.5 MHz}
+- {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz}
+- {id: LPSPI_CLK_ROOT.outFreq, value: 105.6 MHz}
+- {id: LVDS1_CLK.outFreq, value: 1.2 GHz}
+- {id: MQS_MCLK.outFreq, value: 1080/17 MHz}
+- {id: PERCLK_CLK_ROOT.outFreq, value: 75 MHz}
+- {id: PLL7_MAIN_CLK.outFreq, value: 480 MHz}
+- {id: SAI1_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK2.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK3.outFreq, value: 30 MHz}
+- {id: SAI2_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI2_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI2_MCLK3.outFreq, value: 30 MHz}
+- {id: SAI3_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK3.outFreq, value: 30 MHz}
+- {id: SEMC_CLK_ROOT.outFreq, value: 75 MHz}
+- {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: TRACE_CLK_ROOT.outFreq, value: 132 MHz}
+- {id: UART_CLK_ROOT.outFreq, value: 80 MHz}
+- {id: USBPHY1_CLK.outFreq, value: 480 MHz}
+- {id: USBPHY2_CLK.outFreq, value: 480 MHz}
+- {id: USDHC1_CLK_ROOT.outFreq, value: 198 MHz}
+- {id: USDHC2_CLK_ROOT.outFreq, value: 198 MHz}
+settings:
+- {id: CCM.AHB_PODF.scale, value: '1', locked: true}
+- {id: CCM.ARM_PODF.scale, value: '2', locked: true}
+- {id: CCM.FLEXSPI2_PODF.scale, value: '2', locked: true}
+- {id: CCM.FLEXSPI2_SEL.sel, value: CCM_ANALOG.PLL3_PFD0_CLK}
+- {id: CCM.FLEXSPI_PODF.scale, value: '2', locked: true}
+- {id: CCM.FLEXSPI_SEL.sel, value: CCM_ANALOG.PLL3_PFD0_CLK}
+- {id: CCM.LCDIF_PODF.scale, value: '4', locked: true}
+- {id: CCM.LCDIF_PRED.scale, value: '2', locked: true}
+- {id: CCM.LPSPI_PODF.scale, value: '5', locked: true}
+- {id: CCM.PERCLK_PODF.scale, value: '2', locked: true}
+- {id: CCM.SEMC_PODF.scale, value: '8'}
+- {id: CCM.TRACE_CLK_SEL.sel, value: CCM_ANALOG.PLL2_MAIN_CLK}
+- {id: CCM.TRACE_PODF.scale, value: '4', locked: true}
+- {id: CCM_ANALOG.PLL1_BYPASS.sel, value: CCM_ANALOG.PLL1}
+- {id: CCM_ANALOG.PLL1_PREDIV.scale, value: '1', locked: true}
+- {id: CCM_ANALOG.PLL1_VDIV.scale, value: '50', locked: true}
+- {id: CCM_ANALOG.PLL2.denom, value: '1', locked: true}
+- {id: CCM_ANALOG.PLL2.num, value: '0', locked: true}
+- {id: CCM_ANALOG.PLL2_BYPASS.sel, value: CCM_ANALOG.PLL2_OUT_CLK}
+- {id: CCM_ANALOG.PLL2_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD0}
+- {id: CCM_ANALOG.PLL2_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD1}
+- {id: CCM_ANALOG.PLL2_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD2}
+- {id: CCM_ANALOG.PLL2_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD3}
+- {id: CCM_ANALOG.PLL3_BYPASS.sel, value: CCM_ANALOG.PLL3}
+- {id: CCM_ANALOG.PLL3_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD0}
+- {id: CCM_ANALOG.PLL3_PFD0_DIV.scale, value: '33', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD0_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD1}
+- {id: CCM_ANALOG.PLL3_PFD1_DIV.scale, value: '16', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD1_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD2}
+- {id: CCM_ANALOG.PLL3_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD3}
+- {id: CCM_ANALOG.PLL4.denom, value: '50'}
+- {id: CCM_ANALOG.PLL4.div, value: '47'}
+- {id: CCM_ANALOG.PLL5.denom, value: '1'}
+- {id: CCM_ANALOG.PLL5.div, value: '31', locked: true}
+- {id: CCM_ANALOG.PLL5.num, value: '0'}
+- {id: CCM_ANALOG.PLL5_BYPASS.sel, value: CCM_ANALOG.PLL5_POST_DIV}
+- {id: CCM_ANALOG.PLL5_POST_DIV.scale, value: '2', locked: true}
+- {id: CCM_ANALOG.PLL7_BYPASS.sel, value: CCM_ANALOG.PLL7}
+- {id: CCM_ANALOG.VIDEO_DIV.scale, value: '4', locked: true}
+- {id: CCM_ANALOG_PLL_ENET_POWERDOWN_CFG, value: 'Yes'}
+- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB1_POWER_CFG, value: 'Yes'}
+- {id: CCM_ANALOG_PLL_USB2_EN_USB_CLKS_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB2_EN_USB_CLKS_OUT_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB2_POWER_CFG, value: 'Yes'}
+- {id: CCM_ANALOG_PLL_VIDEO_POWERDOWN_CFG, value: 'No'}
+sources:
+- {id: XTALOSC24M.RTC_OSC.outFreq, value: 32.768 kHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 100,                       /* PLL loop divider, Fout = Fin * 50 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 1,                         /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
+        .numerator = 0,                           /* 30 bit numerator of fractional loop divider */
+        .denominator = 1,                         /* 30 bit denominator of fractional loop divider */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 0,                         /* PLL loop divider, Fout = Fin * 20 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_usb_pll_config_t usb2PllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 0,                         /* PLL loop divider, Fout = Fin * 20 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 31,                        /* PLL loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
+        .postDivider = 8,                         /* Divider after PLL */
+        .numerator = 0,                           /* 30 bit numerator of fractional loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
+        .denominator = 1,                         /* 30 bit denominator of fractional loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+/*******************************************************************************
+ * Code for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+void BOARD_BootClockRUN(void)
+{
+    /* Init RTC OSC clock frequency. */
+    CLOCK_SetRtcXtalFreq(32768U);
+    /* Enable 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK;
+    /* Use free 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK;
+    /* Set XTAL 24MHz clock frequency. */
+    CLOCK_SetXtalFreq(24000000U);
+    /* Enable XTAL 24MHz clock source. */
+    CLOCK_InitExternalClk(0);
+    /* Enable internal RC. */
+    CLOCK_InitRcOsc24M();
+    /* Switch clock source to external OSC. */
+    CLOCK_SwitchOsc(kCLOCK_XtalOsc);
+    /* Set Oscillator ready counter value. */
+    CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127);
+    /* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 1);     /* Set PERIPH_CLK MUX to PERIPH_CLK2 */
+    /* Setting the VDD_SOC to 1.275V. It is necessary to config AHB to 600Mhz. */
+    DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x13);
+    /* Waiting for DCDC_STS_DC_OK bit is asserted */
+    while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0))
+    {
+    }
+    /* Set AHB_PODF. */
+    CLOCK_SetDiv(kCLOCK_AhbDiv, 0);
+    /* Disable IPG clock gate. */
+    CLOCK_DisableClock(kCLOCK_Adc1);
+    CLOCK_DisableClock(kCLOCK_Adc2);
+    CLOCK_DisableClock(kCLOCK_Xbar1);
+    CLOCK_DisableClock(kCLOCK_Xbar2);
+    CLOCK_DisableClock(kCLOCK_Xbar3);
+    /* Set IPG_PODF. */
+    CLOCK_SetDiv(kCLOCK_IpgDiv, 3);
+    /* Set ARM_PODF. */
+    CLOCK_SetDiv(kCLOCK_ArmDiv, 1);
+    /* Set PERIPH_CLK2_PODF. */
+    CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0);
+    /* Disable PERCLK clock gate. */
+    CLOCK_DisableClock(kCLOCK_Gpt1);
+    CLOCK_DisableClock(kCLOCK_Gpt1S);
+    CLOCK_DisableClock(kCLOCK_Gpt2);
+    CLOCK_DisableClock(kCLOCK_Gpt2S);
+    CLOCK_DisableClock(kCLOCK_Pit);
+    /* Set PERCLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_PerclkDiv, 1);
+    /* Disable USDHC1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Usdhc1);
+    /* Set USDHC1_PODF. */
+    CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1);
+    /* Set Usdhc1 clock source. */
+    CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0);
+    /* Disable USDHC2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Usdhc2);
+    /* Set USDHC2_PODF. */
+    CLOCK_SetDiv(kCLOCK_Usdhc2Div, 1);
+    /* Set Usdhc2 clock source. */
+    CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0);
+    /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
+     * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
+#ifndef SKIP_SYSCLK_INIT
+    /* Disable Semc clock gate. */
+    CLOCK_DisableClock(kCLOCK_Semc);
+    /* Set SEMC_PODF. */
+    CLOCK_SetDiv(kCLOCK_SemcDiv, 7);
+    /* Set Semc alt clock source. */
+    CLOCK_SetMux(kCLOCK_SemcAltMux, 0);
+    /* Set Semc clock source. */
+    CLOCK_SetMux(kCLOCK_SemcMux, 0);
+#endif
+    /* Disable Flexspi clock gate. */
+    CLOCK_DisableClock(kCLOCK_FlexSpi);
+    /* Set FLEXSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_FlexspiDiv, 1);
+    /* Set Flexspi clock source. */
+    CLOCK_SetMux(kCLOCK_FlexspiMux, 3);
+    /* In SDK projects, external flash (configured by FLEXSPI2) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI2 clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI2, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Disable Flexspi2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_FlexSpi2);
+    /* Set FLEXSPI2_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexspi2Div, 1);
+    /* Set Flexspi2 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexspi2Mux, 1);
+#endif
+    /* Disable CSI clock gate. */
+    CLOCK_DisableClock(kCLOCK_Csi);
+    /* Set CSI_PODF. */
+    CLOCK_SetDiv(kCLOCK_CsiDiv, 1);
+    /* Set Csi clock source. */
+    CLOCK_SetMux(kCLOCK_CsiMux, 0);
+    /* Disable LPSPI clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpspi1);
+    CLOCK_DisableClock(kCLOCK_Lpspi2);
+    CLOCK_DisableClock(kCLOCK_Lpspi3);
+    CLOCK_DisableClock(kCLOCK_Lpspi4);
+    /* Set LPSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_LpspiDiv, 4);
+    /* Set Lpspi clock source. */
+    CLOCK_SetMux(kCLOCK_LpspiMux, 2);
+    /* Disable TRACE clock gate. */
+    CLOCK_DisableClock(kCLOCK_Trace);
+    /* Set TRACE_PODF. */
+    CLOCK_SetDiv(kCLOCK_TraceDiv, 3);
+    /* Set Trace clock source. */
+    CLOCK_SetMux(kCLOCK_TraceMux, 0);
+    /* Disable SAI1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai1);
+    /* Set SAI1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3);
+    /* Set SAI1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai1Div, 1);
+    /* Set Sai1 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai1Mux, 0);
+    /* Disable SAI2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai2);
+    /* Set SAI2_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 3);
+    /* Set SAI2_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai2Div, 1);
+    /* Set Sai2 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai2Mux, 0);
+    /* Disable SAI3 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai3);
+    /* Set SAI3_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3);
+    /* Set SAI3_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai3Div, 1);
+    /* Set Sai3 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai3Mux, 0);
+    /* Disable Lpi2c clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpi2c1);
+    CLOCK_DisableClock(kCLOCK_Lpi2c2);
+    CLOCK_DisableClock(kCLOCK_Lpi2c3);
+    /* Set LPI2C_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0);
+    /* Set Lpi2c clock source. */
+    CLOCK_SetMux(kCLOCK_Lpi2cMux, 0);
+    /* Disable CAN clock gate. */
+    CLOCK_DisableClock(kCLOCK_Can1);
+    CLOCK_DisableClock(kCLOCK_Can2);
+    CLOCK_DisableClock(kCLOCK_Can3);
+    CLOCK_DisableClock(kCLOCK_Can1S);
+    CLOCK_DisableClock(kCLOCK_Can2S);
+    CLOCK_DisableClock(kCLOCK_Can3S);
+    /* Set CAN_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_CanDiv, 1);
+    /* Set Can clock source. */
+    CLOCK_SetMux(kCLOCK_CanMux, 2);
+    /* Disable UART clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpuart1);
+    CLOCK_DisableClock(kCLOCK_Lpuart2);
+    CLOCK_DisableClock(kCLOCK_Lpuart3);
+    CLOCK_DisableClock(kCLOCK_Lpuart4);
+    CLOCK_DisableClock(kCLOCK_Lpuart5);
+    CLOCK_DisableClock(kCLOCK_Lpuart6);
+    CLOCK_DisableClock(kCLOCK_Lpuart7);
+    CLOCK_DisableClock(kCLOCK_Lpuart8);
+    /* Set UART_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+    /* Set Uart clock source. */
+    CLOCK_SetMux(kCLOCK_UartMux, 0);
+    /* Disable LCDIF clock gate. */
+    CLOCK_DisableClock(kCLOCK_LcdPixel);
+    /* Set LCDIF_PRED. */
+    CLOCK_SetDiv(kCLOCK_LcdifPreDiv, 1);
+    /* Set LCDIF_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_LcdifDiv, 3);
+    /* Set Lcdif pre clock source. */
+    CLOCK_SetMux(kCLOCK_LcdifPreMux, 5);
+    /* Disable SPDIF clock gate. */
+    CLOCK_DisableClock(kCLOCK_Spdif);
+    /* Set SPDIF0_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1);
+    /* Set SPDIF0_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Spdif0Div, 7);
+    /* Set Spdif clock source. */
+    CLOCK_SetMux(kCLOCK_SpdifMux, 3);
+    /* Disable Flexio1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Flexio1);
+    /* Set FLEXIO1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1);
+    /* Set FLEXIO1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexio1Div, 7);
+    /* Set Flexio1 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexio1Mux, 3);
+    /* Disable Flexio2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Flexio2);
+    /* Set FLEXIO2_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Flexio2PreDiv, 1);
+    /* Set FLEXIO2_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexio2Div, 7);
+    /* Set Flexio2 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexio2Mux, 3);
+    /* Set Pll3 sw clock source. */
+    CLOCK_SetMux(kCLOCK_Pll3SwMux, 0);
+    /* Init ARM PLL. */
+    CLOCK_InitArmPll(&armPllConfig_BOARD_BootClockRUN);
+    /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
+     * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
+#ifndef SKIP_SYSCLK_INIT
+#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1)
+    #warning "SKIP_SYSCLK_INIT should be defined to keep system pll (selected to be SEMC source clock in SDK projects) unchanged."
+#endif
+    /* Init System PLL. */
+    CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
+    /* Init System pfd0. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
+    /* Init System pfd1. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
+    /* Init System pfd2. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd2, 24);
+    /* Init System pfd3. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd3, 16);
+#endif
+    /* In SDK projects, external flash (configured by FLEXSPI2) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI2 clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI2, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Init Usb1 PLL. */
+    CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
+    /* Init Usb1 pfd0. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 33);
+    /* Init Usb1 pfd1. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
+    /* Init Usb1 pfd2. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
+    /* Init Usb1 pfd3. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 19);
+#endif
+    /* DeInit Audio PLL. */
+    CLOCK_DeinitAudioPll();
+    /* Bypass Audio PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1);
+    /* Set divider for Audio PLL. */
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK;
+    /* Enable Audio PLL output. */
+    CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK;
+    /* Init Video PLL. */
+    uint32_t pllVideo;
+    /* Disable Video PLL output before initial Video PLL. */
+    CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_ENABLE_MASK;
+    /* Bypass PLL first */
+    CCM_ANALOG->PLL_VIDEO = (CCM_ANALOG->PLL_VIDEO & (~CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_MASK)) |
+                            CCM_ANALOG_PLL_VIDEO_BYPASS_MASK | CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC(0);
+    CCM_ANALOG->PLL_VIDEO_NUM = CCM_ANALOG_PLL_VIDEO_NUM_A(0);
+    CCM_ANALOG->PLL_VIDEO_DENOM = CCM_ANALOG_PLL_VIDEO_DENOM_B(1);
+    pllVideo = (CCM_ANALOG->PLL_VIDEO & (~(CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK | CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK))) |
+               CCM_ANALOG_PLL_VIDEO_ENABLE_MASK |CCM_ANALOG_PLL_VIDEO_DIV_SELECT(31);
+    pllVideo |= CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(1);
+    CCM_ANALOG->MISC2 = (CCM_ANALOG->MISC2 & (~CCM_ANALOG_MISC2_VIDEO_DIV_MASK)) | CCM_ANALOG_MISC2_VIDEO_DIV(3);
+    CCM_ANALOG->PLL_VIDEO = pllVideo;
+    while ((CCM_ANALOG->PLL_VIDEO & CCM_ANALOG_PLL_VIDEO_LOCK_MASK) == 0)
+    {
+    }
+    /* Disable bypass for Video PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllVideo, 0);
+    /* DeInit Enet PLL. */
+    CLOCK_DeinitEnetPll();
+    /* Bypass Enet PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllEnet, 1);
+    /* Set Enet output divider. */
+    CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_DIV_SELECT(1);
+    /* Enable Enet output. */
+    CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENABLE_MASK;
+    /* Set Enet2 output divider. */
+    CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_ENET2_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_ENET2_DIV_SELECT(0);
+    /* Enable Enet2 output. */
+    CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET2_REF_EN_MASK;
+    /* Enable Enet25M output. */
+    CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK;
+    /* Init Usb2 PLL. */
+    CLOCK_InitUsb2Pll(&usb2PllConfig_BOARD_BootClockRUN);
+    /* Set preperiph clock source. */
+    CLOCK_SetMux(kCLOCK_PrePeriphMux, 3);
+    /* Set periph clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 0);
+    /* Set periph clock2 clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
+    /* Set per clock source. */
+    CLOCK_SetMux(kCLOCK_PerclkMux, 0);
+    /* Set lvds1 clock source. */
+    CCM_ANALOG->MISC1 = (CCM_ANALOG->MISC1 & (~CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)) | CCM_ANALOG_MISC1_LVDS1_CLK_SEL(0);
+    /* Set clock out1 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0);
+    /* Set clock out1 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1);
+    /* Set clock out2 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0);
+    /* Set clock out2 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(18);
+    /* Set clock out1 drives clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK;
+    /* Disable clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK;
+    /* Disable clock out2. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK;
+    /* Set SAI1 MCLK1 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0);
+    /* Set SAI1 MCLK2 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0);
+    /* Set SAI1 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0);
+    /* Set SAI2 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI2MClk3Sel, 0);
+    /* Set SAI3 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0);
+    /* Set MQS configuration. */
+    IOMUXC_MQSConfig(IOMUXC_GPR,kIOMUXC_MqsPwmOverSampleRate32, 0);
+    /* Set ENET Ref clock source. */
+    IOMUXC_GPR->GPR1 &= ~IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK;
+    /* Set ENET2 Ref clock source. */
+    IOMUXC_GPR->GPR1 &= ~IOMUXC_GPR_GPR1_ENET2_TX_CLK_DIR_MASK;
+    /* Set GPT1 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK;
+    /* Set GPT2 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK;
+    /* Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
+}
diff --git a/hw/bsp/imxrt/boards/mimxrt1064_evk/board/clock_config.h b/hw/bsp/imxrt/boards/mimxrt1064_evk/board/clock_config.h
new file mode 100644
index 000000000..7ce24b6f4
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1064_evk/board/clock_config.h
@@ -0,0 +1,123 @@
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define BOARD_XTAL0_CLK_HZ                         24000000U  /*!< Board xtal0 frequency in Hz */
+
+#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32k frequency in Hz */
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKRUN_CORE_CLOCK             600000000U  /*!< Core clock frequency: 600000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT               600000000UL
+#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT               40000000UL
+#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT         32768UL
+#define BOARD_BOOTCLOCKRUN_CLKO1_CLK                  0UL
+#define BOARD_BOOTCLOCKRUN_CLKO2_CLK                  0UL
+#define BOARD_BOOTCLOCKRUN_CLK_1M                     1000000UL
+#define BOARD_BOOTCLOCKRUN_CLK_24M                    24000000UL
+#define BOARD_BOOTCLOCKRUN_CSI_CLK_ROOT               12000000UL
+#define BOARD_BOOTCLOCKRUN_ENET2_125M_CLK             1200000UL
+#define BOARD_BOOTCLOCKRUN_ENET2_REF_CLK              0UL
+#define BOARD_BOOTCLOCKRUN_ENET2_TX_CLK               0UL
+#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK              2400000UL
+#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK           1200000UL
+#define BOARD_BOOTCLOCKRUN_ENET_REF_CLK               0UL
+#define BOARD_BOOTCLOCKRUN_ENET_TX_CLK                0UL
+#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT           30000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXIO2_CLK_ROOT           30000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXSPI2_CLK_ROOT          130909090UL
+#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT           130909090UL
+#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ      75000000UL
+#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ      75000000UL
+#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT               150000000UL
+#define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT             67500000UL
+#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT             60000000UL
+#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT             105600000UL
+#define BOARD_BOOTCLOCKRUN_LVDS1_CLK                  1200000000UL
+#define BOARD_BOOTCLOCKRUN_MQS_MCLK                   63529411UL
+#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT            75000000UL
+#define BOARD_BOOTCLOCKRUN_PLL7_MAIN_CLK              480000000UL
+#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2                 0UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2                 0UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT              75000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT            30000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT          0UL
+#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT             132000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT              80000000UL
+#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK                480000000UL
+#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK                480000000UL
+#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT            198000000UL
+#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT            198000000UL
+
+/*! @brief Arm PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN;
+/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
+/*! @brief Usb2 PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_usb_pll_config_t usb2PllConfig_BOARD_BootClockRUN;
+/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
+ */
+extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
+/*! @brief Video PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN;
+
+/*******************************************************************************
+ * API for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockRUN(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/imxrt/boards/mimxrt1064_evk/mimxrt1064_evk.mex b/hw/bsp/imxrt/boards/mimxrt1064_evk/mimxrt1064_evk.mex
new file mode 100644
index 000000000..5e0fc72d3
--- /dev/null
+++ b/hw/bsp/imxrt/boards/mimxrt1064_evk/mimxrt1064_evk.mex
@@ -0,0 +1,1006 @@
+<?xml version="1.0" encoding= "UTF-8" ?>
+<configuration name="MIMXRT1064-EVK" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_13 http://mcuxpresso.nxp.com/XSD/mex_configuration_13.xsd" uuid="d75e55f6-68ab-46ef-814b-b94593af7f06" version="13" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_13" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+   <common>
+      <processor>MIMXRT1064xxxxA</processor>
+      <package>MIMXRT1064DVL6A</package>
+      <board>MIMXRT1064-EVK</board>
+      <board_revision>1</board_revision>
+      <mcu_data>ksdk2_0</mcu_data>
+      <cores selected="core0">
+         <core name="Cortex-M7F" id="core0" description="M7 core"/>
+      </cores>
+      <description></description>
+   </common>
+   <preferences>
+      <validate_boot_init_only>true</validate_boot_init_only>
+      <generate_extended_information>false</generate_extended_information>
+      <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
+      <update_include_paths>true</update_include_paths>
+      <generate_registers_defines>false</generate_registers_defines>
+   </preferences>
+   <tools>
+      <pins name="Pins" version="13.1" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/pin_mux.c" update_enabled="true"/>
+            <file path="board/pin_mux.h" update_enabled="true"/>
+         </generated_project_files>
+         <pins_profile>
+            <processor_version>13.0.2</processor_version>
+            <power_domains/>
+         </pins_profile>
+         <functions_list>
+            <function name="BOARD_InitPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins/>
+            </function>
+            <function name="BOARD_InitDEBUG_UARTPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 is not initialized" problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LPUART1" signal="TX" pin_num="K14" pin_signal="GPIO_AD_B0_12">
+                     <pin_features>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="open_drain" value="Disable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LPUART1" signal="RX" pin_num="L14" pin_signal="GPIO_AD_B0_13">
+                     <pin_features>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="open_drain" value="Disable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitSDRAMPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="SEMC" description="Peripheral SEMC is not initialized" problem_level="1" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="SEMC" signal="ADDR, 00" pin_num="C2" pin_signal="GPIO_EMC_09"/>
+                  <pin peripheral="SEMC" signal="ADDR, 01" pin_num="G1" pin_signal="GPIO_EMC_10"/>
+                  <pin peripheral="SEMC" signal="ADDR, 02" pin_num="G3" pin_signal="GPIO_EMC_11"/>
+                  <pin peripheral="SEMC" signal="ADDR, 03" pin_num="H1" pin_signal="GPIO_EMC_12"/>
+                  <pin peripheral="SEMC" signal="ADDR, 04" pin_num="A6" pin_signal="GPIO_EMC_13"/>
+                  <pin peripheral="SEMC" signal="ADDR, 05" pin_num="B6" pin_signal="GPIO_EMC_14"/>
+                  <pin peripheral="SEMC" signal="ADDR, 06" pin_num="B1" pin_signal="GPIO_EMC_15"/>
+                  <pin peripheral="SEMC" signal="ADDR, 07" pin_num="A5" pin_signal="GPIO_EMC_16"/>
+                  <pin peripheral="SEMC" signal="ADDR, 08" pin_num="A4" pin_signal="GPIO_EMC_17"/>
+                  <pin peripheral="SEMC" signal="ADDR, 09" pin_num="B2" pin_signal="GPIO_EMC_18"/>
+                  <pin peripheral="SEMC" signal="ADDR, 10" pin_num="G2" pin_signal="GPIO_EMC_23"/>
+                  <pin peripheral="SEMC" signal="ADDR, 11" pin_num="B4" pin_signal="GPIO_EMC_19"/>
+                  <pin peripheral="SEMC" signal="ADDR, 12" pin_num="A3" pin_signal="GPIO_EMC_20"/>
+                  <pin peripheral="SEMC" signal="BA, 0" pin_num="C1" pin_signal="GPIO_EMC_21"/>
+                  <pin peripheral="SEMC" signal="BA, 1" pin_num="F1" pin_signal="GPIO_EMC_22"/>
+                  <pin peripheral="SEMC" signal="semc_cas" pin_num="D3" pin_signal="GPIO_EMC_24"/>
+                  <pin peripheral="SEMC" signal="semc_cke" pin_num="A2" pin_signal="GPIO_EMC_27"/>
+                  <pin peripheral="SEMC" signal="semc_clk" pin_num="B3" pin_signal="GPIO_EMC_26"/>
+                  <pin peripheral="SEMC" signal="DATA, 00" pin_num="E3" pin_signal="GPIO_EMC_00"/>
+                  <pin peripheral="SEMC" signal="DATA, 01" pin_num="F3" pin_signal="GPIO_EMC_01"/>
+                  <pin peripheral="SEMC" signal="DATA, 02" pin_num="F4" pin_signal="GPIO_EMC_02"/>
+                  <pin peripheral="SEMC" signal="DATA, 03" pin_num="G4" pin_signal="GPIO_EMC_03"/>
+                  <pin peripheral="SEMC" signal="DATA, 04" pin_num="F2" pin_signal="GPIO_EMC_04"/>
+                  <pin peripheral="SEMC" signal="DATA, 05" pin_num="G5" pin_signal="GPIO_EMC_05"/>
+                  <pin peripheral="SEMC" signal="DATA, 06" pin_num="H5" pin_signal="GPIO_EMC_06"/>
+                  <pin peripheral="SEMC" signal="DATA, 07" pin_num="H4" pin_signal="GPIO_EMC_07"/>
+                  <pin peripheral="SEMC" signal="DATA, 08" pin_num="C6" pin_signal="GPIO_EMC_30"/>
+                  <pin peripheral="SEMC" signal="DATA, 09" pin_num="C5" pin_signal="GPIO_EMC_31"/>
+                  <pin peripheral="SEMC" signal="DATA, 10" pin_num="D5" pin_signal="GPIO_EMC_32"/>
+                  <pin peripheral="SEMC" signal="DATA, 11" pin_num="C4" pin_signal="GPIO_EMC_33"/>
+                  <pin peripheral="SEMC" signal="DATA, 12" pin_num="D4" pin_signal="GPIO_EMC_34"/>
+                  <pin peripheral="SEMC" signal="DATA, 13" pin_num="E5" pin_signal="GPIO_EMC_35"/>
+                  <pin peripheral="SEMC" signal="DATA, 14" pin_num="C3" pin_signal="GPIO_EMC_36"/>
+                  <pin peripheral="SEMC" signal="DATA, 15" pin_num="E4" pin_signal="GPIO_EMC_37"/>
+                  <pin peripheral="SEMC" signal="DM, 0" pin_num="H3" pin_signal="GPIO_EMC_08"/>
+                  <pin peripheral="SEMC" signal="DM, 1" pin_num="D6" pin_signal="GPIO_EMC_38"/>
+                  <pin peripheral="SEMC" signal="semc_ras" pin_num="D2" pin_signal="GPIO_EMC_25"/>
+                  <pin peripheral="SEMC" signal="semc_we" pin_num="D1" pin_signal="GPIO_EMC_28"/>
+                  <pin peripheral="SEMC" signal="CS, 0" pin_num="E1" pin_signal="GPIO_EMC_29"/>
+                  <pin peripheral="SEMC" signal="semc_dqs" pin_num="B7" pin_signal="GPIO_EMC_39"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitCSIPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="CSI" description="Peripheral CSI is not initialized" problem_level="1" source="Pins:BOARD_InitCSIPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="LPI2C1" description="Peripheral LPI2C1 is not initialized" problem_level="1" source="Pins:BOARD_InitCSIPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitCSIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitCSIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="CSI" signal="csi_data, 09" pin_num="H13" pin_signal="GPIO_AD_B1_08"/>
+                  <pin peripheral="CSI" signal="csi_data, 08" pin_num="M13" pin_signal="GPIO_AD_B1_09"/>
+                  <pin peripheral="CSI" signal="csi_data, 07" pin_num="L13" pin_signal="GPIO_AD_B1_10"/>
+                  <pin peripheral="CSI" signal="csi_data, 06" pin_num="J13" pin_signal="GPIO_AD_B1_11"/>
+                  <pin peripheral="CSI" signal="csi_data, 05" pin_num="H12" pin_signal="GPIO_AD_B1_12"/>
+                  <pin peripheral="CSI" signal="csi_data, 04" pin_num="H11" pin_signal="GPIO_AD_B1_13"/>
+                  <pin peripheral="CSI" signal="csi_data, 02" pin_num="J14" pin_signal="GPIO_AD_B1_15"/>
+                  <pin peripheral="CSI" signal="csi_data, 03" pin_num="G12" pin_signal="GPIO_AD_B1_14"/>
+                  <pin peripheral="CSI" signal="csi_pixclk" pin_num="L12" pin_signal="GPIO_AD_B1_04"/>
+                  <pin peripheral="CSI" signal="csi_mclk" pin_num="K12" pin_signal="GPIO_AD_B1_05"/>
+                  <pin peripheral="CSI" signal="csi_vsync" pin_num="J12" pin_signal="GPIO_AD_B1_06"/>
+                  <pin peripheral="CSI" signal="csi_hsync" pin_num="K10" pin_signal="GPIO_AD_B1_07"/>
+                  <pin peripheral="LPI2C1" signal="SCL" pin_num="J11" pin_signal="GPIO_AD_B1_00">
+                     <pin_features>
+                        <pin_feature name="identifier" value="CSI_I2C_SCL"/>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_22K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="open_drain" value="Enable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LPI2C1" signal="SDA" pin_num="K11" pin_signal="GPIO_AD_B1_01">
+                     <pin_features>
+                        <pin_feature name="identifier" value="CSI_I2C_SDA"/>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_22K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="open_drain" value="Enable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO1" signal="gpio_io, 04" pin_num="F11" pin_signal="GPIO_AD_B0_04"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitLCDPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LCDIF" description="Peripheral LCDIF is not initialized" problem_level="1" source="Pins:BOARD_InitLCDPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitLCDPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitLCDPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 00" pin_num="C8" pin_signal="GPIO_B0_04">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 01" pin_num="B8" pin_signal="GPIO_B0_05">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 02" pin_num="A8" pin_signal="GPIO_B0_06">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_clk" pin_num="D7" pin_signal="GPIO_B0_00">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 03" pin_num="A9" pin_signal="GPIO_B0_07">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 04" pin_num="B9" pin_signal="GPIO_B0_08">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 05" pin_num="C9" pin_signal="GPIO_B0_09">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 06" pin_num="D9" pin_signal="GPIO_B0_10">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 07" pin_num="A10" pin_signal="GPIO_B0_11">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 08" pin_num="C10" pin_signal="GPIO_B0_12">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 09" pin_num="D10" pin_signal="GPIO_B0_13">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 10" pin_num="E10" pin_signal="GPIO_B0_14">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 11" pin_num="E11" pin_signal="GPIO_B0_15">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 12" pin_num="A11" pin_signal="GPIO_B1_00">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 13" pin_num="B11" pin_signal="GPIO_B1_01">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 14" pin_num="C11" pin_signal="GPIO_B1_02">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 15" pin_num="D11" pin_signal="GPIO_B1_03">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_enable" pin_num="E7" pin_signal="GPIO_B0_01">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_hsync" pin_num="E8" pin_signal="GPIO_B0_02">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_vsync" pin_num="D8" pin_signal="GPIO_B0_03">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO2" signal="gpio_io, 31" pin_num="B14" pin_signal="GPIO_B1_15">
+                     <pin_features>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO1" signal="gpio_io, 02" pin_num="M11" pin_signal="GPIO_AD_B0_02"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitCANPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="CAN2" description="Peripheral CAN2 is not initialized" problem_level="1" source="Pins:BOARD_InitCANPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitCANPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitCANPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="CAN2" signal="TX" pin_num="H14" pin_signal="GPIO_AD_B0_14"/>
+                  <pin peripheral="CAN2" signal="RX" pin_num="L10" pin_signal="GPIO_AD_B0_15"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitENETPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="ENET" description="Peripheral ENET is not initialized" problem_level="1" source="Pins:BOARD_InitENETPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitENETPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitENETPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="ENET" signal="enet_mdc" pin_num="A7" pin_signal="GPIO_EMC_40"/>
+                  <pin peripheral="ENET" signal="enet_mdio" pin_num="C7" pin_signal="GPIO_EMC_41"/>
+                  <pin peripheral="ENET" signal="enet_ref_clk" pin_num="B13" pin_signal="GPIO_B1_10"/>
+                  <pin peripheral="ENET" signal="enet_rx_data, 0" pin_num="E12" pin_signal="GPIO_B1_04"/>
+                  <pin peripheral="ENET" signal="enet_rx_data, 1" pin_num="D12" pin_signal="GPIO_B1_05"/>
+                  <pin peripheral="ENET" signal="enet_rx_en" pin_num="C12" pin_signal="GPIO_B1_06"/>
+                  <pin peripheral="ENET" signal="enet_rx_er" pin_num="C13" pin_signal="GPIO_B1_11"/>
+                  <pin peripheral="ENET" signal="enet_tx_data, 0" pin_num="B12" pin_signal="GPIO_B1_07"/>
+                  <pin peripheral="ENET" signal="enet_tx_data, 1" pin_num="A12" pin_signal="GPIO_B1_08"/>
+                  <pin peripheral="ENET" signal="enet_tx_en" pin_num="A13" pin_signal="GPIO_B1_09"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitUSDHCPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="USDHC1" description="Peripheral USDHC1 is not initialized" problem_level="1" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 3" pin_num="J2" pin_signal="GPIO_SD_B0_05"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 2" pin_num="H2" pin_signal="GPIO_SD_B0_04"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 1" pin_num="K1" pin_signal="GPIO_SD_B0_03"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 0" pin_num="J1" pin_signal="GPIO_SD_B0_02"/>
+                  <pin peripheral="USDHC1" signal="usdhc_cmd" pin_num="J4" pin_signal="GPIO_SD_B0_00"/>
+                  <pin peripheral="USDHC1" signal="usdhc_clk" pin_num="J3" pin_signal="GPIO_SD_B0_01"/>
+                  <pin peripheral="USDHC1" signal="usdhc_vselect" pin_num="C14" pin_signal="GPIO_B1_14"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitQSPIPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXSPI" description="Peripheral FLEXSPI is not initialized" problem_level="1" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA0" pin_num="P3" pin_signal="GPIO_SD_B1_08"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA1" pin_num="N4" pin_signal="GPIO_SD_B1_09"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA2" pin_num="P4" pin_signal="GPIO_SD_B1_10"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA3" pin_num="P5" pin_signal="GPIO_SD_B1_11"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_SCLK" pin_num="L4" pin_signal="GPIO_SD_B1_07"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_SS0_B" pin_num="L3" pin_signal="GPIO_SD_B1_06"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DQS" pin_num="N3" pin_signal="GPIO_SD_B1_05"/>
+               </pins>
+            </function>
+         </functions_list>
+      </pins>
+      <clocks name="Clocks" version="11.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/clock_config.c" update_enabled="true"/>
+            <file path="board/clock_config.h" update_enabled="true"/>
+         </generated_project_files>
+         <clocks_profile>
+            <processor_version>13.0.2</processor_version>
+         </clocks_profile>
+         <clock_configurations>
+            <clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Clocks initialization requires the IOMUXC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="XTALOSC24M.RTC_OSC.outFreq" value="32.768 kHz" locked="false" enabled="true"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="AHB_CLK_ROOT.outFreq" value="600 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CAN_CLK_ROOT.outFreq" value="40 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CKIL_SYNC_CLK_ROOT.outFreq" value="32.768 kHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_1M.outFreq" value="1 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_24M.outFreq" value="24 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CSI_CLK_ROOT.outFreq" value="12 MHz" locked="false" accuracy=""/>
+                  <clock_output id="ENET2_125M_CLK.outFreq" value="1.2 MHz" locked="false" accuracy=""/>
+                  <clock_output id="ENET_125M_CLK.outFreq" value="2.4 MHz" locked="false" accuracy=""/>
+                  <clock_output id="ENET_25M_REF_CLK.outFreq" value="1.2 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXIO1_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXIO2_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXSPI2_CLK_ROOT.outFreq" value="1440/11 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXSPI_CLK_ROOT.outFreq" value="1440/11 MHz" locked="false" accuracy=""/>
+                  <clock_output id="GPT1_ipg_clk_highfreq.outFreq" value="75 MHz" locked="false" accuracy=""/>
+                  <clock_output id="GPT2_ipg_clk_highfreq.outFreq" value="75 MHz" locked="false" accuracy=""/>
+                  <clock_output id="IPG_CLK_ROOT.outFreq" value="150 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LCDIF_CLK_ROOT.outFreq" value="67.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LPI2C_CLK_ROOT.outFreq" value="60 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LPSPI_CLK_ROOT.outFreq" value="105.6 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LVDS1_CLK.outFreq" value="1.2 GHz" locked="false" accuracy=""/>
+                  <clock_output id="MQS_MCLK.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="PERCLK_CLK_ROOT.outFreq" value="75 MHz" locked="false" accuracy=""/>
+                  <clock_output id="PLL7_MAIN_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK2.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SEMC_CLK_ROOT.outFreq" value="75 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SPDIF0_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="TRACE_CLK_ROOT.outFreq" value="132 MHz" locked="false" accuracy=""/>
+                  <clock_output id="UART_CLK_ROOT.outFreq" value="80 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USBPHY1_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USBPHY2_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USDHC1_CLK_ROOT.outFreq" value="198 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USDHC2_CLK_ROOT.outFreq" value="198 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="CCM.AHB_PODF.scale" value="1" locked="true"/>
+                  <setting id="CCM.ARM_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.FLEXSPI2_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.FLEXSPI2_SEL.sel" value="CCM_ANALOG.PLL3_PFD0_CLK" locked="false"/>
+                  <setting id="CCM.FLEXSPI_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.FLEXSPI_SEL.sel" value="CCM_ANALOG.PLL3_PFD0_CLK" locked="false"/>
+                  <setting id="CCM.LCDIF_PODF.scale" value="4" locked="true"/>
+                  <setting id="CCM.LCDIF_PRED.scale" value="2" locked="true"/>
+                  <setting id="CCM.LPSPI_PODF.scale" value="5" locked="true"/>
+                  <setting id="CCM.PERCLK_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.SEMC_PODF.scale" value="8" locked="false"/>
+                  <setting id="CCM.TRACE_CLK_SEL.sel" value="CCM_ANALOG.PLL2_MAIN_CLK" locked="false"/>
+                  <setting id="CCM.TRACE_PODF.scale" value="4" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL1_BYPASS.sel" value="CCM_ANALOG.PLL1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL1_PREDIV.scale" value="1" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL1_VDIV.scale" value="50" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2.denom" value="1" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2.num" value="0" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_BYPASS.sel" value="CCM_ANALOG.PLL2_OUT_CLK" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_BYPASS.sel" value="CCM_ANALOG.PLL3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_DIV.scale" value="33" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD1_DIV.scale" value="16" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD1_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL4.denom" value="50" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL4.div" value="47" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5.denom" value="1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5.div" value="31" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL5.num" value="0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5_BYPASS.sel" value="CCM_ANALOG.PLL5_POST_DIV" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5_POST_DIV.scale" value="2" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL7_BYPASS.sel" value="CCM_ANALOG.PLL7" locked="false"/>
+                  <setting id="CCM_ANALOG.VIDEO_DIV.scale" value="4" locked="true"/>
+                  <setting id="CCM_ANALOG_PLL_ENET_POWERDOWN_CFG" value="Yes" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_POWER_CFG" value="Yes" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB2_EN_USB_CLKS_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB2_EN_USB_CLKS_OUT_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB2_POWER_CFG" value="Yes" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_VIDEO_POWERDOWN_CFG" value="No" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>true</called_from_default_init>
+            </clock_configuration>
+         </clock_configurations>
+      </clocks>
+      <dcdx name="DCDx" version="3.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <dcdx_profile>
+            <processor_version>0.0.0</processor_version>
+         </dcdx_profile>
+         <dcdx_configurations/>
+      </dcdx>
+      <periphs name="Peripherals" version="12.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/peripherals.c" update_enabled="true"/>
+            <file path="board/peripherals.h" update_enabled="true"/>
+         </generated_project_files>
+         <peripherals_profile>
+            <processor_version>13.0.2</processor_version>
+         </peripherals_profile>
+         <functional_groups>
+            <functional_group name="BOARD_InitPeripherals" uuid="1c6563a6-c68b-40e5-8828-2853c99f95fa" called_from_default_init="true" id_prefix="BOARD_" core="core0">
+               <description></description>
+               <options/>
+               <dependencies/>
+               <instances>
+                  <instance name="CAN" uuid="e311ffe2-a68e-4ccc-bab1-c97e2207c5f0" type="flexcan" type_id="flexcan_ba45456ec815807245205237e2bf425b" mode="interrupts" peripheral="CAN2" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="interruptsCfg">
+                        <setting name="messageBufferIrqs" value="0"/>
+                        <setting name="messageBufferIrqs2" value="0"/>
+                        <set name="interruptsEnable">
+                           <selected/>
+                        </set>
+                        <setting name="enable_irq" value="false"/>
+                        <struct name="interrupt_shared">
+                           <setting name="IRQn" value="CAN2_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                     <config_set name="fsl_flexcan" quick_selection="default">
+                        <struct name="can_config">
+                           <setting name="clockSource" value="kFLEXCAN_ClkSrcOsc"/>
+                           <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                           <setting name="baudRate" value="1000000"/>
+                           <setting name="maxMbNum" value="16"/>
+                           <setting name="enableLoopBack" value="false"/>
+                           <setting name="enableSelfWakeup" value="false"/>
+                           <setting name="enableIndividMask" value="false"/>
+                           <struct name="timingConfig">
+                              <setting name="propSeg" value="2"/>
+                              <setting name="phaseSeg1" value="4"/>
+                              <setting name="phaseSeg2" value="3"/>
+                              <setting name="rJumpwidth" value="2"/>
+                              <struct name="bitTime"/>
+                           </struct>
+                        </struct>
+                        <setting name="enableRxFIFO" value="false"/>
+                        <struct name="rxFIFO">
+                           <setting name="idFilterTable" value=""/>
+                           <setting name="idFilterNum" value="num0"/>
+                           <setting name="idFilterType" value="kFLEXCAN_RxFifoFilterTypeA"/>
+                           <setting name="priority" value="kFLEXCAN_RxFifoPrioLow"/>
+                        </struct>
+                        <array name="channels">
+                           <struct name="0">
+                              <setting name="mbID" value="0"/>
+                              <setting name="mbType" value="mbRx"/>
+                              <struct name="rxMb">
+                                 <setting name="id" value="0"/>
+                                 <setting name="format" value="kFLEXCAN_FrameFormatStandard"/>
+                                 <setting name="type" value="kFLEXCAN_FrameTypeData"/>
+                              </struct>
+                           </struct>
+                           <struct name="1">
+                              <setting name="mbID" value="1"/>
+                              <setting name="mbType" value="mbTx"/>
+                              <struct name="rxMb">
+                                 <setting name="id" value="0"/>
+                                 <setting name="format" value="kFLEXCAN_FrameFormatStandard"/>
+                                 <setting name="type" value="kFLEXCAN_FrameTypeData"/>
+                              </struct>
+                           </struct>
+                        </array>
+                     </config_set>
+                  </instance>
+                  <instance name="CSI_LPI2C" uuid="7b69310c-fa35-4379-ac89-358df9280646" type="lpi2c" type_id="lpi2c_db68d4f4f06a22e25ab51fe9bd6db4d2" mode="master" peripheral="LPI2C1" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="main" quick_selection="qs_interrupt">
+                        <setting name="clockSource" value="Lpi2cClock"/>
+                        <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                        <struct name="interrupt">
+                           <setting name="IRQn" value="LPI2C1_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                     <config_set name="master" quick_selection="qs_master_transfer">
+                        <setting name="mode" value="transfer"/>
+                        <struct name="config">
+                           <setting name="enableMaster" value="true"/>
+                           <setting name="enableDoze" value="true"/>
+                           <setting name="debugEnable" value="false"/>
+                           <setting name="ignoreAck" value="false"/>
+                           <setting name="pinConfig" value="kLPI2C_2PinOpenDrain"/>
+                           <setting name="baudRate_Hz" value="100000"/>
+                           <setting name="busIdleTimeout_ns" value="0"/>
+                           <setting name="pinLowTimeout_ns" value="0"/>
+                           <setting name="sdaGlitchFilterWidth_ns" value="0"/>
+                           <setting name="sclGlitchFilterWidth_ns" value="0"/>
+                           <struct name="hostRequest">
+                              <setting name="enable" value="false"/>
+                              <setting name="source" value="kLPI2C_HostRequestExternalPin"/>
+                              <setting name="polarity" value="kLPI2C_HostRequestPinActiveHigh"/>
+                           </struct>
+                           <set name="edmaRequestSources">
+                              <selected/>
+                           </set>
+                        </struct>
+                        <struct name="transfer">
+                           <setting name="blocking" value="false"/>
+                           <setting name="enable_custom_handle" value="false"/>
+                           <struct name="callback">
+                              <setting name="name" value=""/>
+                              <setting name="userData" value=""/>
+                           </struct>
+                           <set name="flags">
+                              <selected/>
+                           </set>
+                           <setting name="slaveAddress" value="0"/>
+                           <setting name="direction" value="kLPI2C_Write"/>
+                           <setting name="subaddress" value="0"/>
+                           <setting name="subaddressSize" value="1"/>
+                           <setting name="blocking_buffer" value="false"/>
+                           <setting name="enable_custom_buffer" value="false"/>
+                           <setting name="dataSize" value="1"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="CSI_RGB565" uuid="ae342c96-df71-41a3-8419-3cccf201c91e" type="csi" type_id="csi_20660d007fd9c28a0b6ec615663d2939" mode="interrupt" peripheral="CSI" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="fsl_csi">
+                        <struct name="clockConfig">
+                           <setting name="clockSource" value="BusInterfaceClock"/>
+                           <setting name="clockSourceFreq" value="BOARD_BootClockRUN"/>
+                           <setting name="masterClockSource" value="CsiClock"/>
+                           <setting name="masterClockSourceFreq" value="BOARD_BootClockRUN"/>
+                        </struct>
+                        <struct name="config">
+                           <setting name="format" value="RGB565"/>
+                           <setting name="i_width" value="320"/>
+                           <setting name="i_height" value="240"/>
+                           <setting name="dataBus" value="kCSI_DataBus8Bit"/>
+                           <setting name="workMode" value="kCSI_GatedClockMode"/>
+                           <setting name="useExtVsync" value="true"/>
+                           <set name="polarityFlags">
+                              <selected>
+                                 <id>kCSI_HsyncActiveHigh</id>
+                                 <id>kCSI_VsyncActiveLow</id>
+                              </selected>
+                           </set>
+                           <struct name="buffers_config">
+                              <setting name="bufferName" value="defaultBuffer"/>
+                              <setting name="bufCount" value="4"/>
+                              <setting name="bufferAlign" value="64"/>
+                           </struct>
+                        </struct>
+                        <struct name="interruptsCfg">
+                           <set name="interruptSources">
+                              <selected/>
+                           </set>
+                           <setting name="isInterruptEnabled" value="false"/>
+                           <struct name="interrupt">
+                              <setting name="IRQn" value="CSI_IRQn"/>
+                              <setting name="enable_interrrupt" value="enabled"/>
+                              <setting name="enable_priority" value="false"/>
+                              <setting name="priority" value="0"/>
+                              <setting name="enable_custom_name" value="false"/>
+                           </struct>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="DEBUG_UART" uuid="81411659-def5-4dbf-839a-d5e5f32dec0b" type="lpuart" type_id="lpuart_bf01db7d964092f3cf860852cba17f7e" mode="polling" peripheral="LPUART1" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="lpuartConfig_t" quick_selection="QuickSelection1">
+                        <struct name="lpuartConfig">
+                           <setting name="clockSource" value="LpuartClock"/>
+                           <setting name="lpuartSrcClkFreq" value="ClocksTool_DefaultInit"/>
+                           <setting name="baudRate_Bps" value="115200"/>
+                           <setting name="parityMode" value="kLPUART_ParityDisabled"/>
+                           <setting name="dataBitsCount" value="kLPUART_EightDataBits"/>
+                           <setting name="isMsb" value="false"/>
+                           <setting name="stopBitCount" value="kLPUART_OneStopBit"/>
+                           <setting name="enableMatchAddress1" value="false"/>
+                           <setting name="matchAddress1" value="0"/>
+                           <setting name="enableMatchAddress2" value="false"/>
+                           <setting name="matchAddress2" value="0"/>
+                           <setting name="txFifoWatermark" value="0"/>
+                           <setting name="rxFifoWatermark" value="1"/>
+                           <setting name="enableRxRTS" value="false"/>
+                           <setting name="enableTxCTS" value="false"/>
+                           <setting name="txCtsSource" value="kLPUART_CtsSourcePin"/>
+                           <setting name="txCtsConfig" value="kLPUART_CtsSampleAtStart"/>
+                           <setting name="rxIdleType" value="kLPUART_IdleTypeStartBit"/>
+                           <setting name="rxIdleConfig" value="kLPUART_IdleCharacter1"/>
+                           <setting name="enableTx" value="true"/>
+                           <setting name="enableRx" value="true"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="LCD_RGB565" uuid="8c491814-4517-44d9-95de-844144e0c6b5" type="elcdif" type_id="elcdif_1c39bcb43ed1a24bc8980672c7378576" mode="rgbMode" peripheral="LCDIF" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="fsl_elcdif">
+                        <struct name="config">
+                           <setting name="panelWidthInt" value="480"/>
+                           <setting name="panelHeightInt" value="272"/>
+                           <setting name="hsw" value="41"/>
+                           <setting name="hfp" value="4"/>
+                           <setting name="hbp" value="8"/>
+                           <setting name="vsw" value="10"/>
+                           <setting name="vfp" value="4"/>
+                           <setting name="vbp" value="2"/>
+                           <setting name="frameRate" value="60 Hz"/>
+                           <setting name="clockSource" value="LcdIfClock"/>
+                           <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                           <struct name="polarityFlags_st">
+                              <setting name="vSyncActive" value="kELCDIF_VsyncActiveLow"/>
+                              <setting name="hSyncActive" value="kELCDIF_HsyncActiveLow"/>
+                              <setting name="dataEnableActive" value="kELCDIF_DataEnableActiveLow"/>
+                              <setting name="driveDataClkEdge" value="kELCDIF_DriveDataOnFallingClkEdge"/>
+                           </struct>
+                           <setting name="bufferName" value="defaultBuffer"/>
+                           <setting name="bufferAlign" value="64"/>
+                           <setting name="pixelFormat" value="kELCDIF_PixelFormatRGB565"/>
+                           <setting name="dataBus" value="kELCDIF_DataBus16Bit"/>
+                           <setting name="enablePxpHandShake" value="false"/>
+                           <setting name="start" value="false"/>
+                        </struct>
+                        <setting name="isInterruptEnabled" value="true"/>
+                        <set name="elcdifInterruptSources">
+                           <selected>
+                              <id>kELCDIF_CurFrameDoneInterruptEnable</id>
+                           </selected>
+                        </set>
+                        <struct name="interrupt">
+                           <setting name="IRQn" value="LCDIF_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="NVIC" uuid="352dfcca-72ab-4214-bb68-9c1a927c4922" type="nvic" type_id="nvic_57b5eef3774cc60acaede6f5b8bddc67" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="nvic">
+                        <array name="interrupt_table"/>
+                        <array name="interrupts"/>
+                     </config_set>
+                  </instance>
+               </instances>
+            </functional_group>
+         </functional_groups>
+         <components>
+            <component name="system" uuid="fe5e46a0-17b8-41e8-9cbc-ffb6f1cf78c1" type_id="system">
+               <config_set_global name="global_system_definitions">
+                  <setting name="user_definitions" value=""/>
+                  <setting name="user_includes" value=""/>
+               </config_set_global>
+            </component>
+            <component name="msg" uuid="f79f6878-69b5-4063-9007-0b8e509f7274" type_id="msg">
+               <config_set_global name="global_messages"/>
+            </component>
+            <component name="gpio_adapter_common" uuid="7ce8b24b-29e6-4b69-86e5-bdfd641cef44" type_id="gpio_adapter_common_57579b9ac814fe26bf95df0a384c36b6">
+               <config_set_global name="global_gpio_adapter_common" quick_selection="default"/>
+            </component>
+            <component name="generic_uart" uuid="ef6a8ae2-3961-4a05-a37f-d42a6a4d8a56" type_id="generic_uart_8cae00565451cf2346eb1b8c624e73a6">
+               <config_set_global name="global_uart"/>
+            </component>
+            <component name="generic_can" uuid="00a2a52b-0c40-4dbf-a6d0-5257cfc384e0" type_id="generic_can_1bfdd78b1af214566c1f23cf6a582d80">
+               <config_set_global name="global_can"/>
+            </component>
+            <component name="uart_cmsis_common" uuid="f30f7e21-6805-4236-9ab3-ff06a6013fa1" type_id="uart_cmsis_common_9cb8e302497aa696fdbb5a4fd622c2a8">
+               <config_set_global name="global_USART_CMSIS_common" quick_selection="default"/>
+            </component>
+            <component name="generic_enet" uuid="ea574324-8cc3-4da3-bdfc-2bdba0dfc3df" type_id="generic_enet_74db5c914f0ddbe47d86af40cb77a619">
+               <config_set_global name="global_enet"/>
+            </component>
+         </components>
+      </periphs>
+      <tee name="TEE" version="4.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <tee_profile>
+            <processor_version>0.0.0</processor_version>
+         </tee_profile>
+      </tee>
+   </tools>
+</configuration>
diff --git a/hw/bsp/imxrt/boards/teensy_40/board/clock_config.c b/hw/bsp/imxrt/boards/teensy_40/board/clock_config.c
new file mode 100644
index 000000000..c55e0135a
--- /dev/null
+++ b/hw/bsp/imxrt/boards/teensy_40/board/clock_config.c
@@ -0,0 +1,509 @@
+/*
+ * How to setup clock using clock driver functions:
+ *
+ * 1. Call CLOCK_InitXXXPLL() to configure corresponding PLL clock.
+ *
+ * 2. Call CLOCK_InitXXXpfd() to configure corresponding PLL pfd clock.
+ *
+ * 3. Call CLOCK_SetMux() to configure corresponding clock source for target clock out.
+ *
+ * 4. Call CLOCK_SetDiv() to configure corresponding clock divider for target clock out.
+ *
+ * 5. Call CLOCK_SetXtalFreq() to set XTAL frequency based on board settings.
+ *
+ */
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v11.0
+processor: MIMXRT1062xxxxA
+package_id: MIMXRT1062DVL6A
+mcu_data: ksdk2_0
+processor_version: 13.0.2
+board: MIMXRT1060-EVK
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+#include "clock_config.h"
+#include "fsl_iomuxc.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockRUN();
+}
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockRUN
+called_from_default_init: true
+outputs:
+- {id: AHB_CLK_ROOT.outFreq, value: 600 MHz}
+- {id: CAN_CLK_ROOT.outFreq, value: 40 MHz}
+- {id: CKIL_SYNC_CLK_ROOT.outFreq, value: 32.768 kHz}
+- {id: CLK_1M.outFreq, value: 1 MHz}
+- {id: CLK_24M.outFreq, value: 24 MHz}
+- {id: CSI_CLK_ROOT.outFreq, value: 12 MHz}
+- {id: ENET2_125M_CLK.outFreq, value: 1.2 MHz}
+- {id: ENET_125M_CLK.outFreq, value: 2.4 MHz}
+- {id: ENET_25M_REF_CLK.outFreq, value: 1.2 MHz}
+- {id: FLEXIO1_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: FLEXIO2_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: FLEXSPI2_CLK_ROOT.outFreq, value: 1440/11 MHz}
+- {id: FLEXSPI_CLK_ROOT.outFreq, value: 1440/11 MHz}
+- {id: GPT1_ipg_clk_highfreq.outFreq, value: 75 MHz}
+- {id: GPT2_ipg_clk_highfreq.outFreq, value: 75 MHz}
+- {id: IPG_CLK_ROOT.outFreq, value: 150 MHz}
+- {id: LCDIF_CLK_ROOT.outFreq, value: 67.5 MHz}
+- {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz}
+- {id: LPSPI_CLK_ROOT.outFreq, value: 105.6 MHz}
+- {id: LVDS1_CLK.outFreq, value: 1.2 GHz}
+- {id: MQS_MCLK.outFreq, value: 1080/17 MHz}
+- {id: PERCLK_CLK_ROOT.outFreq, value: 75 MHz}
+- {id: PLL7_MAIN_CLK.outFreq, value: 480 MHz}
+- {id: SAI1_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK2.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK3.outFreq, value: 30 MHz}
+- {id: SAI2_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI2_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI2_MCLK3.outFreq, value: 30 MHz}
+- {id: SAI3_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK3.outFreq, value: 30 MHz}
+- {id: SEMC_CLK_ROOT.outFreq, value: 75 MHz}
+- {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: TRACE_CLK_ROOT.outFreq, value: 132 MHz}
+- {id: UART_CLK_ROOT.outFreq, value: 80 MHz}
+- {id: USBPHY1_CLK.outFreq, value: 480 MHz}
+- {id: USBPHY2_CLK.outFreq, value: 480 MHz}
+- {id: USDHC1_CLK_ROOT.outFreq, value: 198 MHz}
+- {id: USDHC2_CLK_ROOT.outFreq, value: 198 MHz}
+settings:
+- {id: CCM.AHB_PODF.scale, value: '1', locked: true}
+- {id: CCM.ARM_PODF.scale, value: '2', locked: true}
+- {id: CCM.FLEXSPI2_PODF.scale, value: '2', locked: true}
+- {id: CCM.FLEXSPI2_SEL.sel, value: CCM_ANALOG.PLL3_PFD0_CLK}
+- {id: CCM.FLEXSPI_PODF.scale, value: '2', locked: true}
+- {id: CCM.FLEXSPI_SEL.sel, value: CCM_ANALOG.PLL3_PFD0_CLK}
+- {id: CCM.LCDIF_PODF.scale, value: '4', locked: true}
+- {id: CCM.LCDIF_PRED.scale, value: '2', locked: true}
+- {id: CCM.LPSPI_PODF.scale, value: '5', locked: true}
+- {id: CCM.PERCLK_PODF.scale, value: '2', locked: true}
+- {id: CCM.SEMC_PODF.scale, value: '8'}
+- {id: CCM.TRACE_CLK_SEL.sel, value: CCM_ANALOG.PLL2_MAIN_CLK}
+- {id: CCM.TRACE_PODF.scale, value: '4', locked: true}
+- {id: CCM_ANALOG.PLL1_BYPASS.sel, value: CCM_ANALOG.PLL1}
+- {id: CCM_ANALOG.PLL1_PREDIV.scale, value: '1', locked: true}
+- {id: CCM_ANALOG.PLL1_VDIV.scale, value: '50', locked: true}
+- {id: CCM_ANALOG.PLL2.denom, value: '1', locked: true}
+- {id: CCM_ANALOG.PLL2.num, value: '0', locked: true}
+- {id: CCM_ANALOG.PLL2_BYPASS.sel, value: CCM_ANALOG.PLL2_OUT_CLK}
+- {id: CCM_ANALOG.PLL2_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD0}
+- {id: CCM_ANALOG.PLL2_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD1}
+- {id: CCM_ANALOG.PLL2_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD2}
+- {id: CCM_ANALOG.PLL2_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD3}
+- {id: CCM_ANALOG.PLL3_BYPASS.sel, value: CCM_ANALOG.PLL3}
+- {id: CCM_ANALOG.PLL3_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD0}
+- {id: CCM_ANALOG.PLL3_PFD0_DIV.scale, value: '33', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD0_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD1}
+- {id: CCM_ANALOG.PLL3_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD2}
+- {id: CCM_ANALOG.PLL3_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD3}
+- {id: CCM_ANALOG.PLL4.denom, value: '50'}
+- {id: CCM_ANALOG.PLL4.div, value: '47'}
+- {id: CCM_ANALOG.PLL5.denom, value: '1'}
+- {id: CCM_ANALOG.PLL5.div, value: '31', locked: true}
+- {id: CCM_ANALOG.PLL5.num, value: '0'}
+- {id: CCM_ANALOG.PLL5_BYPASS.sel, value: CCM_ANALOG.PLL5_POST_DIV}
+- {id: CCM_ANALOG.PLL5_POST_DIV.scale, value: '2', locked: true}
+- {id: CCM_ANALOG.PLL7_BYPASS.sel, value: CCM_ANALOG.PLL7}
+- {id: CCM_ANALOG.VIDEO_DIV.scale, value: '4', locked: true}
+- {id: CCM_ANALOG_PLL_ENET_POWERDOWN_CFG, value: 'Yes'}
+- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB1_POWER_CFG, value: 'Yes'}
+- {id: CCM_ANALOG_PLL_USB2_EN_USB_CLKS_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB2_EN_USB_CLKS_OUT_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB2_POWER_CFG, value: 'Yes'}
+- {id: CCM_ANALOG_PLL_VIDEO_POWERDOWN_CFG, value: 'No'}
+sources:
+- {id: XTALOSC24M.RTC_OSC.outFreq, value: 32.768 kHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 100,                       /* PLL loop divider, Fout = Fin * 50 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 1,                         /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
+        .numerator = 0,                           /* 30 bit numerator of fractional loop divider */
+        .denominator = 1,                         /* 30 bit denominator of fractional loop divider */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 0,                         /* PLL loop divider, Fout = Fin * 20 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_usb_pll_config_t usb2PllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 0,                         /* PLL loop divider, Fout = Fin * 20 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 31,                        /* PLL loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
+        .postDivider = 8,                         /* Divider after PLL */
+        .numerator = 0,                           /* 30 bit numerator of fractional loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
+        .denominator = 1,                         /* 30 bit denominator of fractional loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+/*******************************************************************************
+ * Code for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+void BOARD_BootClockRUN(void)
+{
+    /* Init RTC OSC clock frequency. */
+    CLOCK_SetRtcXtalFreq(32768U);
+    /* Enable 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK;
+    /* Use free 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK;
+    /* Set XTAL 24MHz clock frequency. */
+    CLOCK_SetXtalFreq(24000000U);
+    /* Enable XTAL 24MHz clock source. */
+    CLOCK_InitExternalClk(0);
+    /* Enable internal RC. */
+    CLOCK_InitRcOsc24M();
+    /* Switch clock source to external OSC. */
+    CLOCK_SwitchOsc(kCLOCK_XtalOsc);
+    /* Set Oscillator ready counter value. */
+    CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127);
+    /* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 1);     /* Set PERIPH_CLK MUX to PERIPH_CLK2 */
+    /* Setting the VDD_SOC to 1.275V. It is necessary to config AHB to 600Mhz. */
+    DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x13);
+    /* Waiting for DCDC_STS_DC_OK bit is asserted */
+    while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0))
+    {
+    }
+    /* Set AHB_PODF. */
+    CLOCK_SetDiv(kCLOCK_AhbDiv, 0);
+    /* Disable IPG clock gate. */
+    CLOCK_DisableClock(kCLOCK_Adc1);
+    CLOCK_DisableClock(kCLOCK_Adc2);
+    CLOCK_DisableClock(kCLOCK_Xbar1);
+    CLOCK_DisableClock(kCLOCK_Xbar2);
+    CLOCK_DisableClock(kCLOCK_Xbar3);
+    /* Set IPG_PODF. */
+    CLOCK_SetDiv(kCLOCK_IpgDiv, 3);
+    /* Set ARM_PODF. */
+    CLOCK_SetDiv(kCLOCK_ArmDiv, 1);
+    /* Set PERIPH_CLK2_PODF. */
+    CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0);
+    /* Disable PERCLK clock gate. */
+    CLOCK_DisableClock(kCLOCK_Gpt1);
+    CLOCK_DisableClock(kCLOCK_Gpt1S);
+    CLOCK_DisableClock(kCLOCK_Gpt2);
+    CLOCK_DisableClock(kCLOCK_Gpt2S);
+    CLOCK_DisableClock(kCLOCK_Pit);
+    /* Set PERCLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_PerclkDiv, 1);
+    /* Disable USDHC1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Usdhc1);
+    /* Set USDHC1_PODF. */
+    CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1);
+    /* Set Usdhc1 clock source. */
+    CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0);
+    /* Disable USDHC2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Usdhc2);
+    /* Set USDHC2_PODF. */
+    CLOCK_SetDiv(kCLOCK_Usdhc2Div, 1);
+    /* Set Usdhc2 clock source. */
+    CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0);
+    /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
+     * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
+#ifndef SKIP_SYSCLK_INIT
+    /* Disable Semc clock gate. */
+    CLOCK_DisableClock(kCLOCK_Semc);
+    /* Set SEMC_PODF. */
+    CLOCK_SetDiv(kCLOCK_SemcDiv, 7);
+    /* Set Semc alt clock source. */
+    CLOCK_SetMux(kCLOCK_SemcAltMux, 0);
+    /* Set Semc clock source. */
+    CLOCK_SetMux(kCLOCK_SemcMux, 0);
+#endif
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Disable Flexspi clock gate. */
+    CLOCK_DisableClock(kCLOCK_FlexSpi);
+    /* Set FLEXSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_FlexspiDiv, 1);
+    /* Set Flexspi clock source. */
+    CLOCK_SetMux(kCLOCK_FlexspiMux, 3);
+#endif
+    /* Disable Flexspi2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_FlexSpi2);
+    /* Set FLEXSPI2_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexspi2Div, 1);
+    /* Set Flexspi2 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexspi2Mux, 1);
+    /* Disable CSI clock gate. */
+    CLOCK_DisableClock(kCLOCK_Csi);
+    /* Set CSI_PODF. */
+    CLOCK_SetDiv(kCLOCK_CsiDiv, 1);
+    /* Set Csi clock source. */
+    CLOCK_SetMux(kCLOCK_CsiMux, 0);
+    /* Disable LPSPI clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpspi1);
+    CLOCK_DisableClock(kCLOCK_Lpspi2);
+    CLOCK_DisableClock(kCLOCK_Lpspi3);
+    CLOCK_DisableClock(kCLOCK_Lpspi4);
+    /* Set LPSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_LpspiDiv, 4);
+    /* Set Lpspi clock source. */
+    CLOCK_SetMux(kCLOCK_LpspiMux, 2);
+    /* Disable TRACE clock gate. */
+    CLOCK_DisableClock(kCLOCK_Trace);
+    /* Set TRACE_PODF. */
+    CLOCK_SetDiv(kCLOCK_TraceDiv, 3);
+    /* Set Trace clock source. */
+    CLOCK_SetMux(kCLOCK_TraceMux, 0);
+    /* Disable SAI1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai1);
+    /* Set SAI1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3);
+    /* Set SAI1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai1Div, 1);
+    /* Set Sai1 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai1Mux, 0);
+    /* Disable SAI2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai2);
+    /* Set SAI2_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 3);
+    /* Set SAI2_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai2Div, 1);
+    /* Set Sai2 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai2Mux, 0);
+    /* Disable SAI3 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai3);
+    /* Set SAI3_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3);
+    /* Set SAI3_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai3Div, 1);
+    /* Set Sai3 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai3Mux, 0);
+    /* Disable Lpi2c clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpi2c1);
+    CLOCK_DisableClock(kCLOCK_Lpi2c2);
+    CLOCK_DisableClock(kCLOCK_Lpi2c3);
+    /* Set LPI2C_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0);
+    /* Set Lpi2c clock source. */
+    CLOCK_SetMux(kCLOCK_Lpi2cMux, 0);
+    /* Disable CAN clock gate. */
+    CLOCK_DisableClock(kCLOCK_Can1);
+    CLOCK_DisableClock(kCLOCK_Can2);
+    CLOCK_DisableClock(kCLOCK_Can3);
+    CLOCK_DisableClock(kCLOCK_Can1S);
+    CLOCK_DisableClock(kCLOCK_Can2S);
+    CLOCK_DisableClock(kCLOCK_Can3S);
+    /* Set CAN_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_CanDiv, 1);
+    /* Set Can clock source. */
+    CLOCK_SetMux(kCLOCK_CanMux, 2);
+    /* Disable UART clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpuart1);
+    CLOCK_DisableClock(kCLOCK_Lpuart2);
+    CLOCK_DisableClock(kCLOCK_Lpuart3);
+    CLOCK_DisableClock(kCLOCK_Lpuart4);
+    CLOCK_DisableClock(kCLOCK_Lpuart5);
+    CLOCK_DisableClock(kCLOCK_Lpuart6);
+    CLOCK_DisableClock(kCLOCK_Lpuart7);
+    CLOCK_DisableClock(kCLOCK_Lpuart8);
+    /* Set UART_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+    /* Set Uart clock source. */
+    CLOCK_SetMux(kCLOCK_UartMux, 0);
+    /* Disable LCDIF clock gate. */
+    CLOCK_DisableClock(kCLOCK_LcdPixel);
+    /* Set LCDIF_PRED. */
+    CLOCK_SetDiv(kCLOCK_LcdifPreDiv, 1);
+    /* Set LCDIF_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_LcdifDiv, 3);
+    /* Set Lcdif pre clock source. */
+    CLOCK_SetMux(kCLOCK_LcdifPreMux, 5);
+    /* Disable SPDIF clock gate. */
+    CLOCK_DisableClock(kCLOCK_Spdif);
+    /* Set SPDIF0_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1);
+    /* Set SPDIF0_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Spdif0Div, 7);
+    /* Set Spdif clock source. */
+    CLOCK_SetMux(kCLOCK_SpdifMux, 3);
+    /* Disable Flexio1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Flexio1);
+    /* Set FLEXIO1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1);
+    /* Set FLEXIO1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexio1Div, 7);
+    /* Set Flexio1 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexio1Mux, 3);
+    /* Disable Flexio2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Flexio2);
+    /* Set FLEXIO2_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Flexio2PreDiv, 1);
+    /* Set FLEXIO2_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexio2Div, 7);
+    /* Set Flexio2 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexio2Mux, 3);
+    /* Set Pll3 sw clock source. */
+    CLOCK_SetMux(kCLOCK_Pll3SwMux, 0);
+    /* Init ARM PLL. */
+    CLOCK_InitArmPll(&armPllConfig_BOARD_BootClockRUN);
+    /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
+     * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
+#ifndef SKIP_SYSCLK_INIT
+#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1)
+    #warning "SKIP_SYSCLK_INIT should be defined to keep system pll (selected to be SEMC source clock in SDK projects) unchanged."
+#endif
+    /* Init System PLL. */
+    CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
+    /* Init System pfd0. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
+    /* Init System pfd1. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
+    /* Init System pfd2. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd2, 24);
+    /* Init System pfd3. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd3, 16);
+#endif
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Init Usb1 PLL. */
+    CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
+    /* Init Usb1 pfd0. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 33);
+    /* Init Usb1 pfd1. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
+    /* Init Usb1 pfd2. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
+    /* Init Usb1 pfd3. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 19);
+#endif
+    /* DeInit Audio PLL. */
+    CLOCK_DeinitAudioPll();
+    /* Bypass Audio PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1);
+    /* Set divider for Audio PLL. */
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK;
+    /* Enable Audio PLL output. */
+    CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK;
+    /* Init Video PLL. */
+    uint32_t pllVideo;
+    /* Disable Video PLL output before initial Video PLL. */
+    CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_ENABLE_MASK;
+    /* Bypass PLL first */
+    CCM_ANALOG->PLL_VIDEO = (CCM_ANALOG->PLL_VIDEO & (~CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_MASK)) |
+                            CCM_ANALOG_PLL_VIDEO_BYPASS_MASK | CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC(0);
+    CCM_ANALOG->PLL_VIDEO_NUM = CCM_ANALOG_PLL_VIDEO_NUM_A(0);
+    CCM_ANALOG->PLL_VIDEO_DENOM = CCM_ANALOG_PLL_VIDEO_DENOM_B(1);
+    pllVideo = (CCM_ANALOG->PLL_VIDEO & (~(CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK | CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK))) |
+               CCM_ANALOG_PLL_VIDEO_ENABLE_MASK |CCM_ANALOG_PLL_VIDEO_DIV_SELECT(31);
+    pllVideo |= CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(1);
+    CCM_ANALOG->MISC2 = (CCM_ANALOG->MISC2 & (~CCM_ANALOG_MISC2_VIDEO_DIV_MASK)) | CCM_ANALOG_MISC2_VIDEO_DIV(3);
+    CCM_ANALOG->PLL_VIDEO = pllVideo;
+    while ((CCM_ANALOG->PLL_VIDEO & CCM_ANALOG_PLL_VIDEO_LOCK_MASK) == 0)
+    {
+    }
+    /* Disable bypass for Video PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllVideo, 0);
+    /* DeInit Enet PLL. */
+    CLOCK_DeinitEnetPll();
+    /* Bypass Enet PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllEnet, 1);
+    /* Set Enet output divider. */
+    CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_DIV_SELECT(1);
+    /* Enable Enet output. */
+    CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENABLE_MASK;
+    /* Set Enet2 output divider. */
+    CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_ENET2_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_ENET2_DIV_SELECT(0);
+    /* Enable Enet2 output. */
+    CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET2_REF_EN_MASK;
+    /* Enable Enet25M output. */
+    CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK;
+    /* Init Usb2 PLL. */
+    CLOCK_InitUsb2Pll(&usb2PllConfig_BOARD_BootClockRUN);
+    /* Set preperiph clock source. */
+    CLOCK_SetMux(kCLOCK_PrePeriphMux, 3);
+    /* Set periph clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 0);
+    /* Set periph clock2 clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
+    /* Set per clock source. */
+    CLOCK_SetMux(kCLOCK_PerclkMux, 0);
+    /* Set lvds1 clock source. */
+    CCM_ANALOG->MISC1 = (CCM_ANALOG->MISC1 & (~CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)) | CCM_ANALOG_MISC1_LVDS1_CLK_SEL(0);
+    /* Set clock out1 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0);
+    /* Set clock out1 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1);
+    /* Set clock out2 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0);
+    /* Set clock out2 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(18);
+    /* Set clock out1 drives clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK;
+    /* Disable clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK;
+    /* Disable clock out2. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK;
+    /* Set SAI1 MCLK1 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0);
+    /* Set SAI1 MCLK2 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0);
+    /* Set SAI1 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0);
+    /* Set SAI2 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI2MClk3Sel, 0);
+    /* Set SAI3 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0);
+    /* Set MQS configuration. */
+    IOMUXC_MQSConfig(IOMUXC_GPR,kIOMUXC_MqsPwmOverSampleRate32, 0);
+    /* Set ENET Ref clock source. */
+    IOMUXC_GPR->GPR1 &= ~IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK;
+    /* Set ENET2 Ref clock source. */
+    IOMUXC_GPR->GPR1 &= ~IOMUXC_GPR_GPR1_ENET2_TX_CLK_DIR_MASK;
+    /* Set GPT1 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK;
+    /* Set GPT2 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK;
+    /* Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
+}
diff --git a/hw/bsp/imxrt/boards/teensy_40/board/clock_config.h b/hw/bsp/imxrt/boards/teensy_40/board/clock_config.h
new file mode 100644
index 000000000..7ce24b6f4
--- /dev/null
+++ b/hw/bsp/imxrt/boards/teensy_40/board/clock_config.h
@@ -0,0 +1,123 @@
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define BOARD_XTAL0_CLK_HZ                         24000000U  /*!< Board xtal0 frequency in Hz */
+
+#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32k frequency in Hz */
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKRUN_CORE_CLOCK             600000000U  /*!< Core clock frequency: 600000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT               600000000UL
+#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT               40000000UL
+#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT         32768UL
+#define BOARD_BOOTCLOCKRUN_CLKO1_CLK                  0UL
+#define BOARD_BOOTCLOCKRUN_CLKO2_CLK                  0UL
+#define BOARD_BOOTCLOCKRUN_CLK_1M                     1000000UL
+#define BOARD_BOOTCLOCKRUN_CLK_24M                    24000000UL
+#define BOARD_BOOTCLOCKRUN_CSI_CLK_ROOT               12000000UL
+#define BOARD_BOOTCLOCKRUN_ENET2_125M_CLK             1200000UL
+#define BOARD_BOOTCLOCKRUN_ENET2_REF_CLK              0UL
+#define BOARD_BOOTCLOCKRUN_ENET2_TX_CLK               0UL
+#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK              2400000UL
+#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK           1200000UL
+#define BOARD_BOOTCLOCKRUN_ENET_REF_CLK               0UL
+#define BOARD_BOOTCLOCKRUN_ENET_TX_CLK                0UL
+#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT           30000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXIO2_CLK_ROOT           30000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXSPI2_CLK_ROOT          130909090UL
+#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT           130909090UL
+#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ      75000000UL
+#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ      75000000UL
+#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT               150000000UL
+#define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT             67500000UL
+#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT             60000000UL
+#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT             105600000UL
+#define BOARD_BOOTCLOCKRUN_LVDS1_CLK                  1200000000UL
+#define BOARD_BOOTCLOCKRUN_MQS_MCLK                   63529411UL
+#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT            75000000UL
+#define BOARD_BOOTCLOCKRUN_PLL7_MAIN_CLK              480000000UL
+#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2                 0UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2                 0UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT              75000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT            30000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT          0UL
+#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT             132000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT              80000000UL
+#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK                480000000UL
+#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK                480000000UL
+#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT            198000000UL
+#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT            198000000UL
+
+/*! @brief Arm PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN;
+/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
+/*! @brief Usb2 PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_usb_pll_config_t usb2PllConfig_BOARD_BootClockRUN;
+/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
+ */
+extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
+/*! @brief Video PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN;
+
+/*******************************************************************************
+ * API for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockRUN(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/imxrt/boards/teensy_40/teensy40.mex b/hw/bsp/imxrt/boards/teensy_40/teensy40.mex
new file mode 100644
index 000000000..39b3ed606
--- /dev/null
+++ b/hw/bsp/imxrt/boards/teensy_40/teensy40.mex
@@ -0,0 +1,1001 @@
+<?xml version="1.0" encoding= "UTF-8" ?>
+<configuration name="MIMXRT1060-EVK" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_13 http://mcuxpresso.nxp.com/XSD/mex_configuration_13.xsd" uuid="2174caba-38fe-48d5-8f89-42a23354d23b" version="13" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_13" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+   <common>
+      <processor>MIMXRT1062xxxxA</processor>
+      <package>MIMXRT1062DVL6A</package>
+      <board>MIMXRT1060-EVK</board>
+      <board_revision>A2</board_revision>
+      <mcu_data>ksdk2_0</mcu_data>
+      <cores selected="core0">
+         <core name="Cortex-M7F" id="core0" description="M7 core"/>
+      </cores>
+      <description></description>
+   </common>
+   <preferences>
+      <validate_boot_init_only>false</validate_boot_init_only>
+      <generate_extended_information>false</generate_extended_information>
+      <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
+      <update_include_paths>true</update_include_paths>
+      <generate_registers_defines>false</generate_registers_defines>
+   </preferences>
+   <tools>
+      <pins name="Pins" version="13.1" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/pin_mux.c" update_enabled="true"/>
+            <file path="board/pin_mux.h" update_enabled="true"/>
+         </generated_project_files>
+         <pins_profile>
+            <processor_version>13.0.2</processor_version>
+            <power_domains/>
+         </pins_profile>
+         <functions_list>
+            <function name="BOARD_InitPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins/>
+            </function>
+            <function name="BOARD_InitDEBUG_UARTPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 is not initialized" problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LPUART1" signal="TX" pin_num="K14" pin_signal="GPIO_AD_B0_12">
+                     <pin_features>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="open_drain" value="Disable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LPUART1" signal="RX" pin_num="L14" pin_signal="GPIO_AD_B0_13">
+                     <pin_features>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="open_drain" value="Disable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitSDRAMPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="SEMC" description="Peripheral SEMC is not initialized" problem_level="1" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="SEMC" signal="ADDR, 00" pin_num="C2" pin_signal="GPIO_EMC_09"/>
+                  <pin peripheral="SEMC" signal="ADDR, 01" pin_num="G1" pin_signal="GPIO_EMC_10"/>
+                  <pin peripheral="SEMC" signal="ADDR, 02" pin_num="G3" pin_signal="GPIO_EMC_11"/>
+                  <pin peripheral="SEMC" signal="ADDR, 03" pin_num="H1" pin_signal="GPIO_EMC_12"/>
+                  <pin peripheral="SEMC" signal="ADDR, 04" pin_num="A6" pin_signal="GPIO_EMC_13"/>
+                  <pin peripheral="SEMC" signal="ADDR, 05" pin_num="B6" pin_signal="GPIO_EMC_14"/>
+                  <pin peripheral="SEMC" signal="ADDR, 06" pin_num="B1" pin_signal="GPIO_EMC_15"/>
+                  <pin peripheral="SEMC" signal="ADDR, 07" pin_num="A5" pin_signal="GPIO_EMC_16"/>
+                  <pin peripheral="SEMC" signal="ADDR, 08" pin_num="A4" pin_signal="GPIO_EMC_17"/>
+                  <pin peripheral="SEMC" signal="ADDR, 09" pin_num="B2" pin_signal="GPIO_EMC_18"/>
+                  <pin peripheral="SEMC" signal="ADDR, 10" pin_num="G2" pin_signal="GPIO_EMC_23"/>
+                  <pin peripheral="SEMC" signal="ADDR, 11" pin_num="B4" pin_signal="GPIO_EMC_19"/>
+                  <pin peripheral="SEMC" signal="ADDR, 12" pin_num="A3" pin_signal="GPIO_EMC_20"/>
+                  <pin peripheral="SEMC" signal="BA, 0" pin_num="C1" pin_signal="GPIO_EMC_21"/>
+                  <pin peripheral="SEMC" signal="BA, 1" pin_num="F1" pin_signal="GPIO_EMC_22"/>
+                  <pin peripheral="SEMC" signal="semc_cas" pin_num="D3" pin_signal="GPIO_EMC_24"/>
+                  <pin peripheral="SEMC" signal="semc_cke" pin_num="A2" pin_signal="GPIO_EMC_27"/>
+                  <pin peripheral="SEMC" signal="semc_clk" pin_num="B3" pin_signal="GPIO_EMC_26"/>
+                  <pin peripheral="SEMC" signal="DATA, 00" pin_num="E3" pin_signal="GPIO_EMC_00"/>
+                  <pin peripheral="SEMC" signal="DATA, 01" pin_num="F3" pin_signal="GPIO_EMC_01"/>
+                  <pin peripheral="SEMC" signal="DATA, 02" pin_num="F4" pin_signal="GPIO_EMC_02"/>
+                  <pin peripheral="SEMC" signal="DATA, 03" pin_num="G4" pin_signal="GPIO_EMC_03"/>
+                  <pin peripheral="SEMC" signal="DATA, 04" pin_num="F2" pin_signal="GPIO_EMC_04"/>
+                  <pin peripheral="SEMC" signal="DATA, 05" pin_num="G5" pin_signal="GPIO_EMC_05"/>
+                  <pin peripheral="SEMC" signal="DATA, 06" pin_num="H5" pin_signal="GPIO_EMC_06"/>
+                  <pin peripheral="SEMC" signal="DATA, 07" pin_num="H4" pin_signal="GPIO_EMC_07"/>
+                  <pin peripheral="SEMC" signal="DATA, 08" pin_num="C6" pin_signal="GPIO_EMC_30"/>
+                  <pin peripheral="SEMC" signal="DATA, 09" pin_num="C5" pin_signal="GPIO_EMC_31"/>
+                  <pin peripheral="SEMC" signal="DATA, 10" pin_num="D5" pin_signal="GPIO_EMC_32"/>
+                  <pin peripheral="SEMC" signal="DATA, 11" pin_num="C4" pin_signal="GPIO_EMC_33"/>
+                  <pin peripheral="SEMC" signal="DATA, 12" pin_num="D4" pin_signal="GPIO_EMC_34"/>
+                  <pin peripheral="SEMC" signal="DATA, 13" pin_num="E5" pin_signal="GPIO_EMC_35"/>
+                  <pin peripheral="SEMC" signal="DATA, 14" pin_num="C3" pin_signal="GPIO_EMC_36"/>
+                  <pin peripheral="SEMC" signal="DATA, 15" pin_num="E4" pin_signal="GPIO_EMC_37"/>
+                  <pin peripheral="SEMC" signal="DM, 0" pin_num="H3" pin_signal="GPIO_EMC_08"/>
+                  <pin peripheral="SEMC" signal="DM, 1" pin_num="D6" pin_signal="GPIO_EMC_38"/>
+                  <pin peripheral="SEMC" signal="semc_ras" pin_num="D2" pin_signal="GPIO_EMC_25"/>
+                  <pin peripheral="SEMC" signal="semc_we" pin_num="D1" pin_signal="GPIO_EMC_28"/>
+                  <pin peripheral="SEMC" signal="CS, 0" pin_num="E1" pin_signal="GPIO_EMC_29"/>
+                  <pin peripheral="SEMC" signal="semc_dqs" pin_num="B7" pin_signal="GPIO_EMC_39"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitCSIPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="CSI" description="Peripheral CSI is not initialized" problem_level="1" source="Pins:BOARD_InitCSIPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="LPI2C1" description="Peripheral LPI2C1 is not initialized" problem_level="1" source="Pins:BOARD_InitCSIPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitCSIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitCSIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="CSI" signal="csi_data, 09" pin_num="H13" pin_signal="GPIO_AD_B1_08"/>
+                  <pin peripheral="CSI" signal="csi_data, 08" pin_num="M13" pin_signal="GPIO_AD_B1_09"/>
+                  <pin peripheral="CSI" signal="csi_data, 07" pin_num="L13" pin_signal="GPIO_AD_B1_10"/>
+                  <pin peripheral="CSI" signal="csi_data, 06" pin_num="J13" pin_signal="GPIO_AD_B1_11"/>
+                  <pin peripheral="CSI" signal="csi_data, 05" pin_num="H12" pin_signal="GPIO_AD_B1_12"/>
+                  <pin peripheral="CSI" signal="csi_data, 04" pin_num="H11" pin_signal="GPIO_AD_B1_13"/>
+                  <pin peripheral="CSI" signal="csi_data, 02" pin_num="J14" pin_signal="GPIO_AD_B1_15"/>
+                  <pin peripheral="CSI" signal="csi_data, 03" pin_num="G12" pin_signal="GPIO_AD_B1_14"/>
+                  <pin peripheral="CSI" signal="csi_pixclk" pin_num="L12" pin_signal="GPIO_AD_B1_04"/>
+                  <pin peripheral="CSI" signal="csi_mclk" pin_num="K12" pin_signal="GPIO_AD_B1_05"/>
+                  <pin peripheral="CSI" signal="csi_vsync" pin_num="J12" pin_signal="GPIO_AD_B1_06"/>
+                  <pin peripheral="CSI" signal="csi_hsync" pin_num="K10" pin_signal="GPIO_AD_B1_07"/>
+                  <pin peripheral="LPI2C1" signal="SCL" pin_num="J11" pin_signal="GPIO_AD_B1_00">
+                     <pin_features>
+                        <pin_feature name="identifier" value="CSI_I2C_SCL"/>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_22K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="open_drain" value="Enable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LPI2C1" signal="SDA" pin_num="K11" pin_signal="GPIO_AD_B1_01">
+                     <pin_features>
+                        <pin_feature name="identifier" value="CSI_I2C_SDA"/>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_22K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="open_drain" value="Enable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO1" signal="gpio_io, 04" pin_num="F11" pin_signal="GPIO_AD_B0_04"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitLCDPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LCDIF" description="Peripheral LCDIF is not initialized" problem_level="1" source="Pins:BOARD_InitLCDPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitLCDPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitLCDPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 00" pin_num="C8" pin_signal="GPIO_B0_04">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 01" pin_num="B8" pin_signal="GPIO_B0_05">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 02" pin_num="A8" pin_signal="GPIO_B0_06">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_clk" pin_num="D7" pin_signal="GPIO_B0_00">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 03" pin_num="A9" pin_signal="GPIO_B0_07">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 04" pin_num="B9" pin_signal="GPIO_B0_08">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 05" pin_num="C9" pin_signal="GPIO_B0_09">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 06" pin_num="D9" pin_signal="GPIO_B0_10">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 07" pin_num="A10" pin_signal="GPIO_B0_11">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 08" pin_num="C10" pin_signal="GPIO_B0_12">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 09" pin_num="D10" pin_signal="GPIO_B0_13">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 10" pin_num="E10" pin_signal="GPIO_B0_14">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 11" pin_num="E11" pin_signal="GPIO_B0_15">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 12" pin_num="A11" pin_signal="GPIO_B1_00">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 13" pin_num="B11" pin_signal="GPIO_B1_01">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 14" pin_num="C11" pin_signal="GPIO_B1_02">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 15" pin_num="D11" pin_signal="GPIO_B1_03">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_enable" pin_num="E7" pin_signal="GPIO_B0_01">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_hsync" pin_num="E8" pin_signal="GPIO_B0_02">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_vsync" pin_num="D8" pin_signal="GPIO_B0_03">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO2" signal="gpio_io, 31" pin_num="B14" pin_signal="GPIO_B1_15">
+                     <pin_features>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO1" signal="gpio_io, 02" pin_num="M11" pin_signal="GPIO_AD_B0_02"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitCANPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="CAN2" description="Peripheral CAN2 is not initialized" problem_level="1" source="Pins:BOARD_InitCANPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitCANPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitCANPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="CAN2" signal="TX" pin_num="H14" pin_signal="GPIO_AD_B0_14"/>
+                  <pin peripheral="CAN2" signal="RX" pin_num="L10" pin_signal="GPIO_AD_B0_15"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitENETPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="ENET" description="Peripheral ENET is not initialized" problem_level="1" source="Pins:BOARD_InitENETPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitENETPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitENETPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="ENET" signal="enet_mdc" pin_num="A7" pin_signal="GPIO_EMC_40"/>
+                  <pin peripheral="ENET" signal="enet_mdio" pin_num="C7" pin_signal="GPIO_EMC_41"/>
+                  <pin peripheral="ENET" signal="enet_ref_clk" pin_num="B13" pin_signal="GPIO_B1_10"/>
+                  <pin peripheral="ENET" signal="enet_rx_data, 0" pin_num="E12" pin_signal="GPIO_B1_04"/>
+                  <pin peripheral="ENET" signal="enet_rx_data, 1" pin_num="D12" pin_signal="GPIO_B1_05"/>
+                  <pin peripheral="ENET" signal="enet_rx_en" pin_num="C12" pin_signal="GPIO_B1_06"/>
+                  <pin peripheral="ENET" signal="enet_rx_er" pin_num="C13" pin_signal="GPIO_B1_11"/>
+                  <pin peripheral="ENET" signal="enet_tx_data, 0" pin_num="B12" pin_signal="GPIO_B1_07"/>
+                  <pin peripheral="ENET" signal="enet_tx_data, 1" pin_num="A12" pin_signal="GPIO_B1_08"/>
+                  <pin peripheral="ENET" signal="enet_tx_en" pin_num="A13" pin_signal="GPIO_B1_09"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitUSDHCPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="USDHC1" description="Peripheral USDHC1 is not initialized" problem_level="1" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 3" pin_num="J2" pin_signal="GPIO_SD_B0_05"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 2" pin_num="H2" pin_signal="GPIO_SD_B0_04"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 1" pin_num="K1" pin_signal="GPIO_SD_B0_03"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 0" pin_num="J1" pin_signal="GPIO_SD_B0_02"/>
+                  <pin peripheral="USDHC1" signal="usdhc_cmd" pin_num="J4" pin_signal="GPIO_SD_B0_00"/>
+                  <pin peripheral="USDHC1" signal="usdhc_clk" pin_num="J3" pin_signal="GPIO_SD_B0_01"/>
+                  <pin peripheral="USDHC1" signal="usdhc_vselect" pin_num="C14" pin_signal="GPIO_B1_14"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitQSPIPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXSPI" description="Peripheral FLEXSPI is not initialized" problem_level="1" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA0" pin_num="P3" pin_signal="GPIO_SD_B1_08"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA1" pin_num="N4" pin_signal="GPIO_SD_B1_09"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA2" pin_num="P4" pin_signal="GPIO_SD_B1_10"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA3" pin_num="P5" pin_signal="GPIO_SD_B1_11"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_SCLK" pin_num="L4" pin_signal="GPIO_SD_B1_07"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_SS0_B" pin_num="L3" pin_signal="GPIO_SD_B1_06"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DQS" pin_num="N3" pin_signal="GPIO_SD_B1_05"/>
+               </pins>
+            </function>
+         </functions_list>
+      </pins>
+      <clocks name="Clocks" version="11.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/clock_config.c" update_enabled="true"/>
+            <file path="board/clock_config.h" update_enabled="true"/>
+         </generated_project_files>
+         <clocks_profile>
+            <processor_version>13.0.2</processor_version>
+         </clocks_profile>
+         <clock_configurations>
+            <clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Clocks initialization requires the IOMUXC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="XTALOSC24M.RTC_OSC.outFreq" value="32.768 kHz" locked="false" enabled="true"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="AHB_CLK_ROOT.outFreq" value="600 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CAN_CLK_ROOT.outFreq" value="40 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CKIL_SYNC_CLK_ROOT.outFreq" value="32.768 kHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_1M.outFreq" value="1 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_24M.outFreq" value="24 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CSI_CLK_ROOT.outFreq" value="12 MHz" locked="false" accuracy=""/>
+                  <clock_output id="ENET2_125M_CLK.outFreq" value="1.2 MHz" locked="false" accuracy=""/>
+                  <clock_output id="ENET_125M_CLK.outFreq" value="2.4 MHz" locked="false" accuracy=""/>
+                  <clock_output id="ENET_25M_REF_CLK.outFreq" value="1.2 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXIO1_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXIO2_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXSPI2_CLK_ROOT.outFreq" value="1440/11 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXSPI_CLK_ROOT.outFreq" value="1440/11 MHz" locked="false" accuracy=""/>
+                  <clock_output id="GPT1_ipg_clk_highfreq.outFreq" value="75 MHz" locked="false" accuracy=""/>
+                  <clock_output id="GPT2_ipg_clk_highfreq.outFreq" value="75 MHz" locked="false" accuracy=""/>
+                  <clock_output id="IPG_CLK_ROOT.outFreq" value="150 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LCDIF_CLK_ROOT.outFreq" value="67.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LPI2C_CLK_ROOT.outFreq" value="60 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LPSPI_CLK_ROOT.outFreq" value="105.6 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LVDS1_CLK.outFreq" value="1.2 GHz" locked="false" accuracy=""/>
+                  <clock_output id="MQS_MCLK.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="PERCLK_CLK_ROOT.outFreq" value="75 MHz" locked="false" accuracy=""/>
+                  <clock_output id="PLL7_MAIN_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK2.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SEMC_CLK_ROOT.outFreq" value="75 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SPDIF0_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="TRACE_CLK_ROOT.outFreq" value="132 MHz" locked="false" accuracy=""/>
+                  <clock_output id="UART_CLK_ROOT.outFreq" value="80 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USBPHY1_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USBPHY2_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USDHC1_CLK_ROOT.outFreq" value="198 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USDHC2_CLK_ROOT.outFreq" value="198 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="CCM.AHB_PODF.scale" value="1" locked="true"/>
+                  <setting id="CCM.ARM_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.FLEXSPI2_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.FLEXSPI2_SEL.sel" value="CCM_ANALOG.PLL3_PFD0_CLK" locked="false"/>
+                  <setting id="CCM.FLEXSPI_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.FLEXSPI_SEL.sel" value="CCM_ANALOG.PLL3_PFD0_CLK" locked="false"/>
+                  <setting id="CCM.LCDIF_PODF.scale" value="4" locked="true"/>
+                  <setting id="CCM.LCDIF_PRED.scale" value="2" locked="true"/>
+                  <setting id="CCM.LPSPI_PODF.scale" value="5" locked="true"/>
+                  <setting id="CCM.PERCLK_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.SEMC_PODF.scale" value="8" locked="false"/>
+                  <setting id="CCM.TRACE_CLK_SEL.sel" value="CCM_ANALOG.PLL2_MAIN_CLK" locked="false"/>
+                  <setting id="CCM.TRACE_PODF.scale" value="4" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL1_BYPASS.sel" value="CCM_ANALOG.PLL1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL1_PREDIV.scale" value="1" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL1_VDIV.scale" value="50" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2.denom" value="1" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2.num" value="0" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_BYPASS.sel" value="CCM_ANALOG.PLL2_OUT_CLK" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_BYPASS.sel" value="CCM_ANALOG.PLL3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_DIV.scale" value="33" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL4.denom" value="50" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL4.div" value="47" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5.denom" value="1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5.div" value="31" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL5.num" value="0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5_BYPASS.sel" value="CCM_ANALOG.PLL5_POST_DIV" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5_POST_DIV.scale" value="2" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL7_BYPASS.sel" value="CCM_ANALOG.PLL7" locked="false"/>
+                  <setting id="CCM_ANALOG.VIDEO_DIV.scale" value="4" locked="true"/>
+                  <setting id="CCM_ANALOG_PLL_ENET_POWERDOWN_CFG" value="Yes" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_POWER_CFG" value="Yes" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB2_EN_USB_CLKS_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB2_EN_USB_CLKS_OUT_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB2_POWER_CFG" value="Yes" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_VIDEO_POWERDOWN_CFG" value="No" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>true</called_from_default_init>
+            </clock_configuration>
+         </clock_configurations>
+      </clocks>
+      <dcdx name="DCDx" version="3.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <dcdx_profile>
+            <processor_version>0.0.0</processor_version>
+         </dcdx_profile>
+         <dcdx_configurations/>
+      </dcdx>
+      <periphs name="Peripherals" version="12.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/peripherals.c" update_enabled="true"/>
+            <file path="board/peripherals.h" update_enabled="true"/>
+         </generated_project_files>
+         <peripherals_profile>
+            <processor_version>13.0.2</processor_version>
+         </peripherals_profile>
+         <functional_groups>
+            <functional_group name="BOARD_InitPeripherals" uuid="96c1cec6-3bd3-47a2-8301-f38e4b0dd25f" called_from_default_init="true" id_prefix="" core="core0">
+               <description></description>
+               <options/>
+               <dependencies/>
+               <instances>
+                  <instance name="CAN" uuid="eb0900eb-d552-4097-9dcf-a07e592a887f" type="flexcan" type_id="flexcan_ba45456ec815807245205237e2bf425b" mode="interrupts" peripheral="CAN2" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="interruptsCfg">
+                        <setting name="messageBufferIrqs" value="0"/>
+                        <setting name="messageBufferIrqs2" value="0"/>
+                        <set name="interruptsEnable">
+                           <selected/>
+                        </set>
+                        <setting name="enable_irq" value="false"/>
+                        <struct name="interrupt_shared">
+                           <setting name="IRQn" value="CAN2_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                     <config_set name="fsl_flexcan" quick_selection="default">
+                        <struct name="can_config">
+                           <setting name="clockSource" value="kFLEXCAN_ClkSrcOsc"/>
+                           <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                           <setting name="baudRate" value="1000000"/>
+                           <setting name="maxMbNum" value="16"/>
+                           <setting name="enableLoopBack" value="false"/>
+                           <setting name="enableSelfWakeup" value="false"/>
+                           <setting name="enableIndividMask" value="false"/>
+                           <struct name="timingConfig">
+                              <setting name="propSeg" value="2"/>
+                              <setting name="phaseSeg1" value="4"/>
+                              <setting name="phaseSeg2" value="3"/>
+                              <setting name="rJumpwidth" value="2"/>
+                              <struct name="bitTime"/>
+                           </struct>
+                        </struct>
+                        <setting name="enableRxFIFO" value="false"/>
+                        <struct name="rxFIFO">
+                           <setting name="idFilterTable" value=""/>
+                           <setting name="idFilterNum" value="num0"/>
+                           <setting name="idFilterType" value="kFLEXCAN_RxFifoFilterTypeA"/>
+                           <setting name="priority" value="kFLEXCAN_RxFifoPrioLow"/>
+                        </struct>
+                        <array name="channels">
+                           <struct name="0">
+                              <setting name="mbID" value="0"/>
+                              <setting name="mbType" value="mbRx"/>
+                              <struct name="rxMb">
+                                 <setting name="id" value="0"/>
+                                 <setting name="format" value="kFLEXCAN_FrameFormatStandard"/>
+                                 <setting name="type" value="kFLEXCAN_FrameTypeData"/>
+                              </struct>
+                           </struct>
+                           <struct name="1">
+                              <setting name="mbID" value="1"/>
+                              <setting name="mbType" value="mbTx"/>
+                              <struct name="rxMb">
+                                 <setting name="id" value="0"/>
+                                 <setting name="format" value="kFLEXCAN_FrameFormatStandard"/>
+                                 <setting name="type" value="kFLEXCAN_FrameTypeData"/>
+                              </struct>
+                           </struct>
+                        </array>
+                     </config_set>
+                  </instance>
+                  <instance name="CSI" uuid="f67d9a64-c26d-4421-9805-a062b24146f2" type="csi" type_id="csi_3739ec1355c7b915be929f3b7e35095b" mode="interrupt" peripheral="CSI" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="fsl_csi" quick_selection="QuickSelection1">
+                        <struct name="clockConfig">
+                           <setting name="clockSource" value="BusInterfaceClock"/>
+                           <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                           <setting name="masterClockSource" value="CsiClock"/>
+                           <setting name="masterClockSourceFreq" value="ClocksTool_DefaultInit"/>
+                        </struct>
+                        <struct name="config">
+                           <setting name="format" value="RGB565"/>
+                           <setting name="i_width" value="320"/>
+                           <setting name="i_height" value="240"/>
+                           <setting name="dataBus" value="kCSI_DataBus8Bit"/>
+                           <setting name="workMode" value="kCSI_GatedClockMode"/>
+                           <setting name="useExtVsync" value="true"/>
+                           <set name="polarityFlags">
+                              <selected/>
+                           </set>
+                           <struct name="buffers_config">
+                              <setting name="bufferName" value="defaultBuffer"/>
+                              <setting name="bufCount" value="4"/>
+                              <setting name="bufferAlign" value="64"/>
+                           </struct>
+                        </struct>
+                        <struct name="interruptsCfg">
+                           <setting name="isInterruptEnabled" value="false"/>
+                           <set name="interruptSources">
+                              <selected/>
+                           </set>
+                           <struct name="interrupt">
+                              <setting name="IRQn" value="CSI_IRQn"/>
+                              <setting name="enable_interrrupt" value="enabled"/>
+                              <setting name="enable_priority" value="false"/>
+                              <setting name="priority" value="0"/>
+                              <setting name="enable_custom_name" value="false"/>
+                           </struct>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="CSI_LPI2C" uuid="f2c6cd0a-751c-4424-9248-a4d98da47de7" type="lpi2c" type_id="lpi2c_db68d4f4f06a22e25ab51fe9bd6db4d2" mode="master" peripheral="LPI2C1" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="main" quick_selection="qs_interrupt">
+                        <setting name="clockSource" value="Lpi2cClock"/>
+                        <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                        <struct name="interrupt">
+                           <setting name="IRQn" value="LPI2C1_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                     <config_set name="master" quick_selection="qs_master_transfer">
+                        <setting name="mode" value="transfer"/>
+                        <struct name="config">
+                           <setting name="enableMaster" value="true"/>
+                           <setting name="enableDoze" value="true"/>
+                           <setting name="debugEnable" value="false"/>
+                           <setting name="ignoreAck" value="false"/>
+                           <setting name="pinConfig" value="kLPI2C_2PinOpenDrain"/>
+                           <setting name="baudRate_Hz" value="100000"/>
+                           <setting name="busIdleTimeout_ns" value="0"/>
+                           <setting name="pinLowTimeout_ns" value="0"/>
+                           <setting name="sdaGlitchFilterWidth_ns" value="0"/>
+                           <setting name="sclGlitchFilterWidth_ns" value="0"/>
+                           <struct name="hostRequest">
+                              <setting name="enable" value="false"/>
+                              <setting name="source" value="kLPI2C_HostRequestExternalPin"/>
+                              <setting name="polarity" value="kLPI2C_HostRequestPinActiveHigh"/>
+                           </struct>
+                           <set name="edmaRequestSources">
+                              <selected/>
+                           </set>
+                        </struct>
+                        <struct name="transfer">
+                           <setting name="blocking" value="false"/>
+                           <setting name="enable_custom_handle" value="false"/>
+                           <struct name="callback">
+                              <setting name="name" value=""/>
+                              <setting name="userData" value=""/>
+                           </struct>
+                           <set name="flags">
+                              <selected/>
+                           </set>
+                           <setting name="slaveAddress" value="0"/>
+                           <setting name="direction" value="kLPI2C_Write"/>
+                           <setting name="subaddress" value="0"/>
+                           <setting name="subaddressSize" value="1"/>
+                           <setting name="blocking_buffer" value="false"/>
+                           <setting name="enable_custom_buffer" value="false"/>
+                           <setting name="dataSize" value="1"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="DEBUG_UART" uuid="01f250e2-83d7-4b7b-a98d-772d1c3bdb42" type="lpuart" type_id="lpuart_bf01db7d964092f3cf860852cba17f7e" mode="polling" peripheral="LPUART1" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="lpuartConfig_t">
+                        <struct name="lpuartConfig">
+                           <setting name="clockSource" value="LpuartClock"/>
+                           <setting name="lpuartSrcClkFreq" value="BOARD_BootClockRUN"/>
+                           <setting name="baudRate_Bps" value="115200"/>
+                           <setting name="parityMode" value="kLPUART_ParityDisabled"/>
+                           <setting name="dataBitsCount" value="kLPUART_EightDataBits"/>
+                           <setting name="isMsb" value="false"/>
+                           <setting name="stopBitCount" value="kLPUART_OneStopBit"/>
+                           <setting name="enableMatchAddress1" value="false"/>
+                           <setting name="matchAddress1" value="0"/>
+                           <setting name="enableMatchAddress2" value="false"/>
+                           <setting name="matchAddress2" value="0"/>
+                           <setting name="txFifoWatermark" value="0"/>
+                           <setting name="rxFifoWatermark" value="1"/>
+                           <setting name="enableRxRTS" value="false"/>
+                           <setting name="enableTxCTS" value="false"/>
+                           <setting name="txCtsSource" value="kLPUART_CtsSourcePin"/>
+                           <setting name="txCtsConfig" value="kLPUART_CtsSampleAtStart"/>
+                           <setting name="rxIdleType" value="kLPUART_IdleTypeStartBit"/>
+                           <setting name="rxIdleConfig" value="kLPUART_IdleCharacter1"/>
+                           <setting name="enableTx" value="true"/>
+                           <setting name="enableRx" value="true"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="LCD" uuid="90a0c31d-6042-4687-af0f-0892536bc1ba" type="elcdif" type_id="elcdif_1c39bcb43ed1a24bc8980672c7378576" mode="rgbMode" peripheral="LCDIF" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="fsl_elcdif">
+                        <struct name="config">
+                           <setting name="panelWidthInt" value="480"/>
+                           <setting name="panelHeightInt" value="272"/>
+                           <setting name="hsw" value="41"/>
+                           <setting name="hfp" value="4"/>
+                           <setting name="hbp" value="8"/>
+                           <setting name="vsw" value="10"/>
+                           <setting name="vfp" value="4"/>
+                           <setting name="vbp" value="3"/>
+                           <setting name="frameRate" value="60 Hz"/>
+                           <setting name="clockSource" value="LcdIfClock"/>
+                           <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                           <struct name="polarityFlags_st">
+                              <setting name="vSyncActive" value="kELCDIF_VsyncActiveLow"/>
+                              <setting name="hSyncActive" value="kELCDIF_HsyncActiveLow"/>
+                              <setting name="dataEnableActive" value="kELCDIF_DataEnableActiveLow"/>
+                              <setting name="driveDataClkEdge" value="kELCDIF_DriveDataOnFallingClkEdge"/>
+                           </struct>
+                           <setting name="bufferName" value="defaultBuffer"/>
+                           <setting name="bufferAlign" value="64"/>
+                           <setting name="pixelFormat" value="kELCDIF_PixelFormatRGB565"/>
+                           <setting name="dataBus" value="kELCDIF_DataBus16Bit"/>
+                           <setting name="enablePxpHandShake" value="false"/>
+                           <setting name="start" value="false"/>
+                        </struct>
+                        <setting name="isInterruptEnabled" value="true"/>
+                        <set name="elcdifInterruptSources">
+                           <selected>
+                              <id>kELCDIF_CurFrameDoneInterruptEnable</id>
+                           </selected>
+                        </set>
+                        <struct name="interrupt">
+                           <setting name="IRQn" value="LCDIF_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="NVIC" uuid="b31fa225-2a52-486b-9c5c-33a184a2c716" type="nvic" type_id="nvic_57b5eef3774cc60acaede6f5b8bddc67" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="nvic">
+                        <array name="interrupt_table"/>
+                        <array name="interrupts"/>
+                     </config_set>
+                  </instance>
+               </instances>
+            </functional_group>
+         </functional_groups>
+         <components>
+            <component name="system" uuid="aa3cc953-557b-4557-b7fe-6fedc31acf98" type_id="system">
+               <config_set_global name="global_system_definitions">
+                  <setting name="user_definitions" value=""/>
+                  <setting name="user_includes" value=""/>
+               </config_set_global>
+            </component>
+            <component name="msg" uuid="8b3f852e-ee1e-45e9-abff-0ff722f1d65d" type_id="msg">
+               <config_set_global name="global_messages"/>
+            </component>
+            <component name="gpio_adapter_common" uuid="539d282e-5136-4289-9058-9a46b221ca45" type_id="gpio_adapter_common_57579b9ac814fe26bf95df0a384c36b6">
+               <config_set_global name="global_gpio_adapter_common" quick_selection="default"/>
+            </component>
+            <component name="generic_uart" uuid="6e4c02c4-0524-4905-91b5-01d2e2502186" type_id="generic_uart_8cae00565451cf2346eb1b8c624e73a6">
+               <config_set_global name="global_uart"/>
+            </component>
+            <component name="generic_can" uuid="c6d8fd36-2bbd-44c6-a160-54e7e12d0807" type_id="generic_can_1bfdd78b1af214566c1f23cf6a582d80">
+               <config_set_global name="global_can"/>
+            </component>
+            <component name="uart_cmsis_common" uuid="7d3626d3-4536-4838-a35d-3b8cf5a2bd71" type_id="uart_cmsis_common_9cb8e302497aa696fdbb5a4fd622c2a8">
+               <config_set_global name="global_USART_CMSIS_common" quick_selection="default"/>
+            </component>
+            <component name="generic_enet" uuid="738ea8df-6176-4e52-b4c7-b88aa9c17d13" type_id="generic_enet_74db5c914f0ddbe47d86af40cb77a619">
+               <config_set_global name="global_enet"/>
+            </component>
+         </components>
+      </periphs>
+      <tee name="TEE" version="4.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <tee_profile>
+            <processor_version>0.0.0</processor_version>
+         </tee_profile>
+      </tee>
+   </tools>
+</configuration>
diff --git a/hw/bsp/imxrt/boards/teensy_41/board/clock_config.c b/hw/bsp/imxrt/boards/teensy_41/board/clock_config.c
new file mode 100644
index 000000000..c55e0135a
--- /dev/null
+++ b/hw/bsp/imxrt/boards/teensy_41/board/clock_config.c
@@ -0,0 +1,509 @@
+/*
+ * How to setup clock using clock driver functions:
+ *
+ * 1. Call CLOCK_InitXXXPLL() to configure corresponding PLL clock.
+ *
+ * 2. Call CLOCK_InitXXXpfd() to configure corresponding PLL pfd clock.
+ *
+ * 3. Call CLOCK_SetMux() to configure corresponding clock source for target clock out.
+ *
+ * 4. Call CLOCK_SetDiv() to configure corresponding clock divider for target clock out.
+ *
+ * 5. Call CLOCK_SetXtalFreq() to set XTAL frequency based on board settings.
+ *
+ */
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v11.0
+processor: MIMXRT1062xxxxA
+package_id: MIMXRT1062DVL6A
+mcu_data: ksdk2_0
+processor_version: 13.0.2
+board: MIMXRT1060-EVK
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+#include "clock_config.h"
+#include "fsl_iomuxc.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockRUN();
+}
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockRUN
+called_from_default_init: true
+outputs:
+- {id: AHB_CLK_ROOT.outFreq, value: 600 MHz}
+- {id: CAN_CLK_ROOT.outFreq, value: 40 MHz}
+- {id: CKIL_SYNC_CLK_ROOT.outFreq, value: 32.768 kHz}
+- {id: CLK_1M.outFreq, value: 1 MHz}
+- {id: CLK_24M.outFreq, value: 24 MHz}
+- {id: CSI_CLK_ROOT.outFreq, value: 12 MHz}
+- {id: ENET2_125M_CLK.outFreq, value: 1.2 MHz}
+- {id: ENET_125M_CLK.outFreq, value: 2.4 MHz}
+- {id: ENET_25M_REF_CLK.outFreq, value: 1.2 MHz}
+- {id: FLEXIO1_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: FLEXIO2_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: FLEXSPI2_CLK_ROOT.outFreq, value: 1440/11 MHz}
+- {id: FLEXSPI_CLK_ROOT.outFreq, value: 1440/11 MHz}
+- {id: GPT1_ipg_clk_highfreq.outFreq, value: 75 MHz}
+- {id: GPT2_ipg_clk_highfreq.outFreq, value: 75 MHz}
+- {id: IPG_CLK_ROOT.outFreq, value: 150 MHz}
+- {id: LCDIF_CLK_ROOT.outFreq, value: 67.5 MHz}
+- {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz}
+- {id: LPSPI_CLK_ROOT.outFreq, value: 105.6 MHz}
+- {id: LVDS1_CLK.outFreq, value: 1.2 GHz}
+- {id: MQS_MCLK.outFreq, value: 1080/17 MHz}
+- {id: PERCLK_CLK_ROOT.outFreq, value: 75 MHz}
+- {id: PLL7_MAIN_CLK.outFreq, value: 480 MHz}
+- {id: SAI1_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK2.outFreq, value: 1080/17 MHz}
+- {id: SAI1_MCLK3.outFreq, value: 30 MHz}
+- {id: SAI2_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI2_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI2_MCLK3.outFreq, value: 30 MHz}
+- {id: SAI3_CLK_ROOT.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK1.outFreq, value: 1080/17 MHz}
+- {id: SAI3_MCLK3.outFreq, value: 30 MHz}
+- {id: SEMC_CLK_ROOT.outFreq, value: 75 MHz}
+- {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz}
+- {id: TRACE_CLK_ROOT.outFreq, value: 132 MHz}
+- {id: UART_CLK_ROOT.outFreq, value: 80 MHz}
+- {id: USBPHY1_CLK.outFreq, value: 480 MHz}
+- {id: USBPHY2_CLK.outFreq, value: 480 MHz}
+- {id: USDHC1_CLK_ROOT.outFreq, value: 198 MHz}
+- {id: USDHC2_CLK_ROOT.outFreq, value: 198 MHz}
+settings:
+- {id: CCM.AHB_PODF.scale, value: '1', locked: true}
+- {id: CCM.ARM_PODF.scale, value: '2', locked: true}
+- {id: CCM.FLEXSPI2_PODF.scale, value: '2', locked: true}
+- {id: CCM.FLEXSPI2_SEL.sel, value: CCM_ANALOG.PLL3_PFD0_CLK}
+- {id: CCM.FLEXSPI_PODF.scale, value: '2', locked: true}
+- {id: CCM.FLEXSPI_SEL.sel, value: CCM_ANALOG.PLL3_PFD0_CLK}
+- {id: CCM.LCDIF_PODF.scale, value: '4', locked: true}
+- {id: CCM.LCDIF_PRED.scale, value: '2', locked: true}
+- {id: CCM.LPSPI_PODF.scale, value: '5', locked: true}
+- {id: CCM.PERCLK_PODF.scale, value: '2', locked: true}
+- {id: CCM.SEMC_PODF.scale, value: '8'}
+- {id: CCM.TRACE_CLK_SEL.sel, value: CCM_ANALOG.PLL2_MAIN_CLK}
+- {id: CCM.TRACE_PODF.scale, value: '4', locked: true}
+- {id: CCM_ANALOG.PLL1_BYPASS.sel, value: CCM_ANALOG.PLL1}
+- {id: CCM_ANALOG.PLL1_PREDIV.scale, value: '1', locked: true}
+- {id: CCM_ANALOG.PLL1_VDIV.scale, value: '50', locked: true}
+- {id: CCM_ANALOG.PLL2.denom, value: '1', locked: true}
+- {id: CCM_ANALOG.PLL2.num, value: '0', locked: true}
+- {id: CCM_ANALOG.PLL2_BYPASS.sel, value: CCM_ANALOG.PLL2_OUT_CLK}
+- {id: CCM_ANALOG.PLL2_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD0}
+- {id: CCM_ANALOG.PLL2_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD1}
+- {id: CCM_ANALOG.PLL2_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD2}
+- {id: CCM_ANALOG.PLL2_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD3}
+- {id: CCM_ANALOG.PLL3_BYPASS.sel, value: CCM_ANALOG.PLL3}
+- {id: CCM_ANALOG.PLL3_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD0}
+- {id: CCM_ANALOG.PLL3_PFD0_DIV.scale, value: '33', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD0_MUL.scale, value: '18', locked: true}
+- {id: CCM_ANALOG.PLL3_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD1}
+- {id: CCM_ANALOG.PLL3_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD2}
+- {id: CCM_ANALOG.PLL3_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD3}
+- {id: CCM_ANALOG.PLL4.denom, value: '50'}
+- {id: CCM_ANALOG.PLL4.div, value: '47'}
+- {id: CCM_ANALOG.PLL5.denom, value: '1'}
+- {id: CCM_ANALOG.PLL5.div, value: '31', locked: true}
+- {id: CCM_ANALOG.PLL5.num, value: '0'}
+- {id: CCM_ANALOG.PLL5_BYPASS.sel, value: CCM_ANALOG.PLL5_POST_DIV}
+- {id: CCM_ANALOG.PLL5_POST_DIV.scale, value: '2', locked: true}
+- {id: CCM_ANALOG.PLL7_BYPASS.sel, value: CCM_ANALOG.PLL7}
+- {id: CCM_ANALOG.VIDEO_DIV.scale, value: '4', locked: true}
+- {id: CCM_ANALOG_PLL_ENET_POWERDOWN_CFG, value: 'Yes'}
+- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB1_POWER_CFG, value: 'Yes'}
+- {id: CCM_ANALOG_PLL_USB2_EN_USB_CLKS_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB2_EN_USB_CLKS_OUT_CFG, value: Enabled}
+- {id: CCM_ANALOG_PLL_USB2_POWER_CFG, value: 'Yes'}
+- {id: CCM_ANALOG_PLL_VIDEO_POWERDOWN_CFG, value: 'No'}
+sources:
+- {id: XTALOSC24M.RTC_OSC.outFreq, value: 32.768 kHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 100,                       /* PLL loop divider, Fout = Fin * 50 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 1,                         /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
+        .numerator = 0,                           /* 30 bit numerator of fractional loop divider */
+        .denominator = 1,                         /* 30 bit denominator of fractional loop divider */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 0,                         /* PLL loop divider, Fout = Fin * 20 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_usb_pll_config_t usb2PllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 0,                         /* PLL loop divider, Fout = Fin * 20 */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN =
+    {
+        .loopDivider = 31,                        /* PLL loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
+        .postDivider = 8,                         /* Divider after PLL */
+        .numerator = 0,                           /* 30 bit numerator of fractional loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
+        .denominator = 1,                         /* 30 bit denominator of fractional loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
+        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+    };
+/*******************************************************************************
+ * Code for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+void BOARD_BootClockRUN(void)
+{
+    /* Init RTC OSC clock frequency. */
+    CLOCK_SetRtcXtalFreq(32768U);
+    /* Enable 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK;
+    /* Use free 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK;
+    /* Set XTAL 24MHz clock frequency. */
+    CLOCK_SetXtalFreq(24000000U);
+    /* Enable XTAL 24MHz clock source. */
+    CLOCK_InitExternalClk(0);
+    /* Enable internal RC. */
+    CLOCK_InitRcOsc24M();
+    /* Switch clock source to external OSC. */
+    CLOCK_SwitchOsc(kCLOCK_XtalOsc);
+    /* Set Oscillator ready counter value. */
+    CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127);
+    /* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 1);     /* Set PERIPH_CLK MUX to PERIPH_CLK2 */
+    /* Setting the VDD_SOC to 1.275V. It is necessary to config AHB to 600Mhz. */
+    DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x13);
+    /* Waiting for DCDC_STS_DC_OK bit is asserted */
+    while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0))
+    {
+    }
+    /* Set AHB_PODF. */
+    CLOCK_SetDiv(kCLOCK_AhbDiv, 0);
+    /* Disable IPG clock gate. */
+    CLOCK_DisableClock(kCLOCK_Adc1);
+    CLOCK_DisableClock(kCLOCK_Adc2);
+    CLOCK_DisableClock(kCLOCK_Xbar1);
+    CLOCK_DisableClock(kCLOCK_Xbar2);
+    CLOCK_DisableClock(kCLOCK_Xbar3);
+    /* Set IPG_PODF. */
+    CLOCK_SetDiv(kCLOCK_IpgDiv, 3);
+    /* Set ARM_PODF. */
+    CLOCK_SetDiv(kCLOCK_ArmDiv, 1);
+    /* Set PERIPH_CLK2_PODF. */
+    CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0);
+    /* Disable PERCLK clock gate. */
+    CLOCK_DisableClock(kCLOCK_Gpt1);
+    CLOCK_DisableClock(kCLOCK_Gpt1S);
+    CLOCK_DisableClock(kCLOCK_Gpt2);
+    CLOCK_DisableClock(kCLOCK_Gpt2S);
+    CLOCK_DisableClock(kCLOCK_Pit);
+    /* Set PERCLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_PerclkDiv, 1);
+    /* Disable USDHC1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Usdhc1);
+    /* Set USDHC1_PODF. */
+    CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1);
+    /* Set Usdhc1 clock source. */
+    CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0);
+    /* Disable USDHC2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Usdhc2);
+    /* Set USDHC2_PODF. */
+    CLOCK_SetDiv(kCLOCK_Usdhc2Div, 1);
+    /* Set Usdhc2 clock source. */
+    CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0);
+    /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
+     * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
+#ifndef SKIP_SYSCLK_INIT
+    /* Disable Semc clock gate. */
+    CLOCK_DisableClock(kCLOCK_Semc);
+    /* Set SEMC_PODF. */
+    CLOCK_SetDiv(kCLOCK_SemcDiv, 7);
+    /* Set Semc alt clock source. */
+    CLOCK_SetMux(kCLOCK_SemcAltMux, 0);
+    /* Set Semc clock source. */
+    CLOCK_SetMux(kCLOCK_SemcMux, 0);
+#endif
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Disable Flexspi clock gate. */
+    CLOCK_DisableClock(kCLOCK_FlexSpi);
+    /* Set FLEXSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_FlexspiDiv, 1);
+    /* Set Flexspi clock source. */
+    CLOCK_SetMux(kCLOCK_FlexspiMux, 3);
+#endif
+    /* Disable Flexspi2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_FlexSpi2);
+    /* Set FLEXSPI2_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexspi2Div, 1);
+    /* Set Flexspi2 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexspi2Mux, 1);
+    /* Disable CSI clock gate. */
+    CLOCK_DisableClock(kCLOCK_Csi);
+    /* Set CSI_PODF. */
+    CLOCK_SetDiv(kCLOCK_CsiDiv, 1);
+    /* Set Csi clock source. */
+    CLOCK_SetMux(kCLOCK_CsiMux, 0);
+    /* Disable LPSPI clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpspi1);
+    CLOCK_DisableClock(kCLOCK_Lpspi2);
+    CLOCK_DisableClock(kCLOCK_Lpspi3);
+    CLOCK_DisableClock(kCLOCK_Lpspi4);
+    /* Set LPSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_LpspiDiv, 4);
+    /* Set Lpspi clock source. */
+    CLOCK_SetMux(kCLOCK_LpspiMux, 2);
+    /* Disable TRACE clock gate. */
+    CLOCK_DisableClock(kCLOCK_Trace);
+    /* Set TRACE_PODF. */
+    CLOCK_SetDiv(kCLOCK_TraceDiv, 3);
+    /* Set Trace clock source. */
+    CLOCK_SetMux(kCLOCK_TraceMux, 0);
+    /* Disable SAI1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai1);
+    /* Set SAI1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3);
+    /* Set SAI1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai1Div, 1);
+    /* Set Sai1 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai1Mux, 0);
+    /* Disable SAI2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai2);
+    /* Set SAI2_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 3);
+    /* Set SAI2_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai2Div, 1);
+    /* Set Sai2 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai2Mux, 0);
+    /* Disable SAI3 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai3);
+    /* Set SAI3_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3);
+    /* Set SAI3_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai3Div, 1);
+    /* Set Sai3 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai3Mux, 0);
+    /* Disable Lpi2c clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpi2c1);
+    CLOCK_DisableClock(kCLOCK_Lpi2c2);
+    CLOCK_DisableClock(kCLOCK_Lpi2c3);
+    /* Set LPI2C_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0);
+    /* Set Lpi2c clock source. */
+    CLOCK_SetMux(kCLOCK_Lpi2cMux, 0);
+    /* Disable CAN clock gate. */
+    CLOCK_DisableClock(kCLOCK_Can1);
+    CLOCK_DisableClock(kCLOCK_Can2);
+    CLOCK_DisableClock(kCLOCK_Can3);
+    CLOCK_DisableClock(kCLOCK_Can1S);
+    CLOCK_DisableClock(kCLOCK_Can2S);
+    CLOCK_DisableClock(kCLOCK_Can3S);
+    /* Set CAN_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_CanDiv, 1);
+    /* Set Can clock source. */
+    CLOCK_SetMux(kCLOCK_CanMux, 2);
+    /* Disable UART clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpuart1);
+    CLOCK_DisableClock(kCLOCK_Lpuart2);
+    CLOCK_DisableClock(kCLOCK_Lpuart3);
+    CLOCK_DisableClock(kCLOCK_Lpuart4);
+    CLOCK_DisableClock(kCLOCK_Lpuart5);
+    CLOCK_DisableClock(kCLOCK_Lpuart6);
+    CLOCK_DisableClock(kCLOCK_Lpuart7);
+    CLOCK_DisableClock(kCLOCK_Lpuart8);
+    /* Set UART_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+    /* Set Uart clock source. */
+    CLOCK_SetMux(kCLOCK_UartMux, 0);
+    /* Disable LCDIF clock gate. */
+    CLOCK_DisableClock(kCLOCK_LcdPixel);
+    /* Set LCDIF_PRED. */
+    CLOCK_SetDiv(kCLOCK_LcdifPreDiv, 1);
+    /* Set LCDIF_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_LcdifDiv, 3);
+    /* Set Lcdif pre clock source. */
+    CLOCK_SetMux(kCLOCK_LcdifPreMux, 5);
+    /* Disable SPDIF clock gate. */
+    CLOCK_DisableClock(kCLOCK_Spdif);
+    /* Set SPDIF0_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1);
+    /* Set SPDIF0_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Spdif0Div, 7);
+    /* Set Spdif clock source. */
+    CLOCK_SetMux(kCLOCK_SpdifMux, 3);
+    /* Disable Flexio1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Flexio1);
+    /* Set FLEXIO1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1);
+    /* Set FLEXIO1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexio1Div, 7);
+    /* Set Flexio1 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexio1Mux, 3);
+    /* Disable Flexio2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Flexio2);
+    /* Set FLEXIO2_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Flexio2PreDiv, 1);
+    /* Set FLEXIO2_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexio2Div, 7);
+    /* Set Flexio2 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexio2Mux, 3);
+    /* Set Pll3 sw clock source. */
+    CLOCK_SetMux(kCLOCK_Pll3SwMux, 0);
+    /* Init ARM PLL. */
+    CLOCK_InitArmPll(&armPllConfig_BOARD_BootClockRUN);
+    /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
+     * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
+#ifndef SKIP_SYSCLK_INIT
+#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1)
+    #warning "SKIP_SYSCLK_INIT should be defined to keep system pll (selected to be SEMC source clock in SDK projects) unchanged."
+#endif
+    /* Init System PLL. */
+    CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
+    /* Init System pfd0. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
+    /* Init System pfd1. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
+    /* Init System pfd2. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd2, 24);
+    /* Init System pfd3. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd3, 16);
+#endif
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
+     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Init Usb1 PLL. */
+    CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
+    /* Init Usb1 pfd0. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 33);
+    /* Init Usb1 pfd1. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
+    /* Init Usb1 pfd2. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
+    /* Init Usb1 pfd3. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 19);
+#endif
+    /* DeInit Audio PLL. */
+    CLOCK_DeinitAudioPll();
+    /* Bypass Audio PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1);
+    /* Set divider for Audio PLL. */
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK;
+    /* Enable Audio PLL output. */
+    CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK;
+    /* Init Video PLL. */
+    uint32_t pllVideo;
+    /* Disable Video PLL output before initial Video PLL. */
+    CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_ENABLE_MASK;
+    /* Bypass PLL first */
+    CCM_ANALOG->PLL_VIDEO = (CCM_ANALOG->PLL_VIDEO & (~CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_MASK)) |
+                            CCM_ANALOG_PLL_VIDEO_BYPASS_MASK | CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC(0);
+    CCM_ANALOG->PLL_VIDEO_NUM = CCM_ANALOG_PLL_VIDEO_NUM_A(0);
+    CCM_ANALOG->PLL_VIDEO_DENOM = CCM_ANALOG_PLL_VIDEO_DENOM_B(1);
+    pllVideo = (CCM_ANALOG->PLL_VIDEO & (~(CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK | CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK))) |
+               CCM_ANALOG_PLL_VIDEO_ENABLE_MASK |CCM_ANALOG_PLL_VIDEO_DIV_SELECT(31);
+    pllVideo |= CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(1);
+    CCM_ANALOG->MISC2 = (CCM_ANALOG->MISC2 & (~CCM_ANALOG_MISC2_VIDEO_DIV_MASK)) | CCM_ANALOG_MISC2_VIDEO_DIV(3);
+    CCM_ANALOG->PLL_VIDEO = pllVideo;
+    while ((CCM_ANALOG->PLL_VIDEO & CCM_ANALOG_PLL_VIDEO_LOCK_MASK) == 0)
+    {
+    }
+    /* Disable bypass for Video PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllVideo, 0);
+    /* DeInit Enet PLL. */
+    CLOCK_DeinitEnetPll();
+    /* Bypass Enet PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllEnet, 1);
+    /* Set Enet output divider. */
+    CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_DIV_SELECT(1);
+    /* Enable Enet output. */
+    CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENABLE_MASK;
+    /* Set Enet2 output divider. */
+    CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_ENET2_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_ENET2_DIV_SELECT(0);
+    /* Enable Enet2 output. */
+    CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET2_REF_EN_MASK;
+    /* Enable Enet25M output. */
+    CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK;
+    /* Init Usb2 PLL. */
+    CLOCK_InitUsb2Pll(&usb2PllConfig_BOARD_BootClockRUN);
+    /* Set preperiph clock source. */
+    CLOCK_SetMux(kCLOCK_PrePeriphMux, 3);
+    /* Set periph clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 0);
+    /* Set periph clock2 clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
+    /* Set per clock source. */
+    CLOCK_SetMux(kCLOCK_PerclkMux, 0);
+    /* Set lvds1 clock source. */
+    CCM_ANALOG->MISC1 = (CCM_ANALOG->MISC1 & (~CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)) | CCM_ANALOG_MISC1_LVDS1_CLK_SEL(0);
+    /* Set clock out1 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0);
+    /* Set clock out1 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1);
+    /* Set clock out2 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0);
+    /* Set clock out2 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(18);
+    /* Set clock out1 drives clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK;
+    /* Disable clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK;
+    /* Disable clock out2. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK;
+    /* Set SAI1 MCLK1 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0);
+    /* Set SAI1 MCLK2 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0);
+    /* Set SAI1 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0);
+    /* Set SAI2 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI2MClk3Sel, 0);
+    /* Set SAI3 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0);
+    /* Set MQS configuration. */
+    IOMUXC_MQSConfig(IOMUXC_GPR,kIOMUXC_MqsPwmOverSampleRate32, 0);
+    /* Set ENET Ref clock source. */
+    IOMUXC_GPR->GPR1 &= ~IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK;
+    /* Set ENET2 Ref clock source. */
+    IOMUXC_GPR->GPR1 &= ~IOMUXC_GPR_GPR1_ENET2_TX_CLK_DIR_MASK;
+    /* Set GPT1 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK;
+    /* Set GPT2 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK;
+    /* Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
+}
diff --git a/hw/bsp/imxrt/boards/teensy_41/board/clock_config.h b/hw/bsp/imxrt/boards/teensy_41/board/clock_config.h
new file mode 100644
index 000000000..7ce24b6f4
--- /dev/null
+++ b/hw/bsp/imxrt/boards/teensy_41/board/clock_config.h
@@ -0,0 +1,123 @@
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define BOARD_XTAL0_CLK_HZ                         24000000U  /*!< Board xtal0 frequency in Hz */
+
+#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32k frequency in Hz */
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKRUN_CORE_CLOCK             600000000U  /*!< Core clock frequency: 600000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT               600000000UL
+#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT               40000000UL
+#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT         32768UL
+#define BOARD_BOOTCLOCKRUN_CLKO1_CLK                  0UL
+#define BOARD_BOOTCLOCKRUN_CLKO2_CLK                  0UL
+#define BOARD_BOOTCLOCKRUN_CLK_1M                     1000000UL
+#define BOARD_BOOTCLOCKRUN_CLK_24M                    24000000UL
+#define BOARD_BOOTCLOCKRUN_CSI_CLK_ROOT               12000000UL
+#define BOARD_BOOTCLOCKRUN_ENET2_125M_CLK             1200000UL
+#define BOARD_BOOTCLOCKRUN_ENET2_REF_CLK              0UL
+#define BOARD_BOOTCLOCKRUN_ENET2_TX_CLK               0UL
+#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK              2400000UL
+#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK           1200000UL
+#define BOARD_BOOTCLOCKRUN_ENET_REF_CLK               0UL
+#define BOARD_BOOTCLOCKRUN_ENET_TX_CLK                0UL
+#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT           30000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXIO2_CLK_ROOT           30000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXSPI2_CLK_ROOT          130909090UL
+#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT           130909090UL
+#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ      75000000UL
+#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ      75000000UL
+#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT               150000000UL
+#define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT             67500000UL
+#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT             60000000UL
+#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT             105600000UL
+#define BOARD_BOOTCLOCKRUN_LVDS1_CLK                  1200000000UL
+#define BOARD_BOOTCLOCKRUN_MQS_MCLK                   63529411UL
+#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT            75000000UL
+#define BOARD_BOOTCLOCKRUN_PLL7_MAIN_CLK              480000000UL
+#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2                 0UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT              63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1                 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2                 0UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3                 30000000UL
+#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT              75000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT            30000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT          0UL
+#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT             132000000UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT              80000000UL
+#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK                480000000UL
+#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK                480000000UL
+#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT            198000000UL
+#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT            198000000UL
+
+/*! @brief Arm PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN;
+/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
+/*! @brief Usb2 PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_usb_pll_config_t usb2PllConfig_BOARD_BootClockRUN;
+/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
+ */
+extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
+/*! @brief Video PLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN;
+
+/*******************************************************************************
+ * API for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockRUN(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/imxrt/boards/teensy_41/teensy41.mex b/hw/bsp/imxrt/boards/teensy_41/teensy41.mex
new file mode 100644
index 000000000..39b3ed606
--- /dev/null
+++ b/hw/bsp/imxrt/boards/teensy_41/teensy41.mex
@@ -0,0 +1,1001 @@
+<?xml version="1.0" encoding= "UTF-8" ?>
+<configuration name="MIMXRT1060-EVK" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_13 http://mcuxpresso.nxp.com/XSD/mex_configuration_13.xsd" uuid="2174caba-38fe-48d5-8f89-42a23354d23b" version="13" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_13" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+   <common>
+      <processor>MIMXRT1062xxxxA</processor>
+      <package>MIMXRT1062DVL6A</package>
+      <board>MIMXRT1060-EVK</board>
+      <board_revision>A2</board_revision>
+      <mcu_data>ksdk2_0</mcu_data>
+      <cores selected="core0">
+         <core name="Cortex-M7F" id="core0" description="M7 core"/>
+      </cores>
+      <description></description>
+   </common>
+   <preferences>
+      <validate_boot_init_only>false</validate_boot_init_only>
+      <generate_extended_information>false</generate_extended_information>
+      <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
+      <update_include_paths>true</update_include_paths>
+      <generate_registers_defines>false</generate_registers_defines>
+   </preferences>
+   <tools>
+      <pins name="Pins" version="13.1" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/pin_mux.c" update_enabled="true"/>
+            <file path="board/pin_mux.h" update_enabled="true"/>
+         </generated_project_files>
+         <pins_profile>
+            <processor_version>13.0.2</processor_version>
+            <power_domains/>
+         </pins_profile>
+         <functions_list>
+            <function name="BOARD_InitPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins/>
+            </function>
+            <function name="BOARD_InitDEBUG_UARTPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 is not initialized" problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LPUART1" signal="TX" pin_num="K14" pin_signal="GPIO_AD_B0_12">
+                     <pin_features>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="open_drain" value="Disable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LPUART1" signal="RX" pin_num="L14" pin_signal="GPIO_AD_B0_13">
+                     <pin_features>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="open_drain" value="Disable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitSDRAMPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="SEMC" description="Peripheral SEMC is not initialized" problem_level="1" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitSDRAMPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="SEMC" signal="ADDR, 00" pin_num="C2" pin_signal="GPIO_EMC_09"/>
+                  <pin peripheral="SEMC" signal="ADDR, 01" pin_num="G1" pin_signal="GPIO_EMC_10"/>
+                  <pin peripheral="SEMC" signal="ADDR, 02" pin_num="G3" pin_signal="GPIO_EMC_11"/>
+                  <pin peripheral="SEMC" signal="ADDR, 03" pin_num="H1" pin_signal="GPIO_EMC_12"/>
+                  <pin peripheral="SEMC" signal="ADDR, 04" pin_num="A6" pin_signal="GPIO_EMC_13"/>
+                  <pin peripheral="SEMC" signal="ADDR, 05" pin_num="B6" pin_signal="GPIO_EMC_14"/>
+                  <pin peripheral="SEMC" signal="ADDR, 06" pin_num="B1" pin_signal="GPIO_EMC_15"/>
+                  <pin peripheral="SEMC" signal="ADDR, 07" pin_num="A5" pin_signal="GPIO_EMC_16"/>
+                  <pin peripheral="SEMC" signal="ADDR, 08" pin_num="A4" pin_signal="GPIO_EMC_17"/>
+                  <pin peripheral="SEMC" signal="ADDR, 09" pin_num="B2" pin_signal="GPIO_EMC_18"/>
+                  <pin peripheral="SEMC" signal="ADDR, 10" pin_num="G2" pin_signal="GPIO_EMC_23"/>
+                  <pin peripheral="SEMC" signal="ADDR, 11" pin_num="B4" pin_signal="GPIO_EMC_19"/>
+                  <pin peripheral="SEMC" signal="ADDR, 12" pin_num="A3" pin_signal="GPIO_EMC_20"/>
+                  <pin peripheral="SEMC" signal="BA, 0" pin_num="C1" pin_signal="GPIO_EMC_21"/>
+                  <pin peripheral="SEMC" signal="BA, 1" pin_num="F1" pin_signal="GPIO_EMC_22"/>
+                  <pin peripheral="SEMC" signal="semc_cas" pin_num="D3" pin_signal="GPIO_EMC_24"/>
+                  <pin peripheral="SEMC" signal="semc_cke" pin_num="A2" pin_signal="GPIO_EMC_27"/>
+                  <pin peripheral="SEMC" signal="semc_clk" pin_num="B3" pin_signal="GPIO_EMC_26"/>
+                  <pin peripheral="SEMC" signal="DATA, 00" pin_num="E3" pin_signal="GPIO_EMC_00"/>
+                  <pin peripheral="SEMC" signal="DATA, 01" pin_num="F3" pin_signal="GPIO_EMC_01"/>
+                  <pin peripheral="SEMC" signal="DATA, 02" pin_num="F4" pin_signal="GPIO_EMC_02"/>
+                  <pin peripheral="SEMC" signal="DATA, 03" pin_num="G4" pin_signal="GPIO_EMC_03"/>
+                  <pin peripheral="SEMC" signal="DATA, 04" pin_num="F2" pin_signal="GPIO_EMC_04"/>
+                  <pin peripheral="SEMC" signal="DATA, 05" pin_num="G5" pin_signal="GPIO_EMC_05"/>
+                  <pin peripheral="SEMC" signal="DATA, 06" pin_num="H5" pin_signal="GPIO_EMC_06"/>
+                  <pin peripheral="SEMC" signal="DATA, 07" pin_num="H4" pin_signal="GPIO_EMC_07"/>
+                  <pin peripheral="SEMC" signal="DATA, 08" pin_num="C6" pin_signal="GPIO_EMC_30"/>
+                  <pin peripheral="SEMC" signal="DATA, 09" pin_num="C5" pin_signal="GPIO_EMC_31"/>
+                  <pin peripheral="SEMC" signal="DATA, 10" pin_num="D5" pin_signal="GPIO_EMC_32"/>
+                  <pin peripheral="SEMC" signal="DATA, 11" pin_num="C4" pin_signal="GPIO_EMC_33"/>
+                  <pin peripheral="SEMC" signal="DATA, 12" pin_num="D4" pin_signal="GPIO_EMC_34"/>
+                  <pin peripheral="SEMC" signal="DATA, 13" pin_num="E5" pin_signal="GPIO_EMC_35"/>
+                  <pin peripheral="SEMC" signal="DATA, 14" pin_num="C3" pin_signal="GPIO_EMC_36"/>
+                  <pin peripheral="SEMC" signal="DATA, 15" pin_num="E4" pin_signal="GPIO_EMC_37"/>
+                  <pin peripheral="SEMC" signal="DM, 0" pin_num="H3" pin_signal="GPIO_EMC_08"/>
+                  <pin peripheral="SEMC" signal="DM, 1" pin_num="D6" pin_signal="GPIO_EMC_38"/>
+                  <pin peripheral="SEMC" signal="semc_ras" pin_num="D2" pin_signal="GPIO_EMC_25"/>
+                  <pin peripheral="SEMC" signal="semc_we" pin_num="D1" pin_signal="GPIO_EMC_28"/>
+                  <pin peripheral="SEMC" signal="CS, 0" pin_num="E1" pin_signal="GPIO_EMC_29"/>
+                  <pin peripheral="SEMC" signal="semc_dqs" pin_num="B7" pin_signal="GPIO_EMC_39"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitCSIPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="CSI" description="Peripheral CSI is not initialized" problem_level="1" source="Pins:BOARD_InitCSIPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="LPI2C1" description="Peripheral LPI2C1 is not initialized" problem_level="1" source="Pins:BOARD_InitCSIPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitCSIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitCSIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="CSI" signal="csi_data, 09" pin_num="H13" pin_signal="GPIO_AD_B1_08"/>
+                  <pin peripheral="CSI" signal="csi_data, 08" pin_num="M13" pin_signal="GPIO_AD_B1_09"/>
+                  <pin peripheral="CSI" signal="csi_data, 07" pin_num="L13" pin_signal="GPIO_AD_B1_10"/>
+                  <pin peripheral="CSI" signal="csi_data, 06" pin_num="J13" pin_signal="GPIO_AD_B1_11"/>
+                  <pin peripheral="CSI" signal="csi_data, 05" pin_num="H12" pin_signal="GPIO_AD_B1_12"/>
+                  <pin peripheral="CSI" signal="csi_data, 04" pin_num="H11" pin_signal="GPIO_AD_B1_13"/>
+                  <pin peripheral="CSI" signal="csi_data, 02" pin_num="J14" pin_signal="GPIO_AD_B1_15"/>
+                  <pin peripheral="CSI" signal="csi_data, 03" pin_num="G12" pin_signal="GPIO_AD_B1_14"/>
+                  <pin peripheral="CSI" signal="csi_pixclk" pin_num="L12" pin_signal="GPIO_AD_B1_04"/>
+                  <pin peripheral="CSI" signal="csi_mclk" pin_num="K12" pin_signal="GPIO_AD_B1_05"/>
+                  <pin peripheral="CSI" signal="csi_vsync" pin_num="J12" pin_signal="GPIO_AD_B1_06"/>
+                  <pin peripheral="CSI" signal="csi_hsync" pin_num="K10" pin_signal="GPIO_AD_B1_07"/>
+                  <pin peripheral="LPI2C1" signal="SCL" pin_num="J11" pin_signal="GPIO_AD_B1_00">
+                     <pin_features>
+                        <pin_feature name="identifier" value="CSI_I2C_SCL"/>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_22K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="open_drain" value="Enable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LPI2C1" signal="SDA" pin_num="K11" pin_signal="GPIO_AD_B1_01">
+                     <pin_features>
+                        <pin_feature name="identifier" value="CSI_I2C_SDA"/>
+                        <pin_feature name="software_input_on" value="Disable"/>
+                        <pin_feature name="hysteresis_enable" value="Disable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_22K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Keeper"/>
+                        <pin_feature name="pull_keeper_enable" value="Enable"/>
+                        <pin_feature name="open_drain" value="Enable"/>
+                        <pin_feature name="speed" value="MHZ_100"/>
+                        <pin_feature name="drive_strength" value="R0_6"/>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO1" signal="gpio_io, 04" pin_num="F11" pin_signal="GPIO_AD_B0_04"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitLCDPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LCDIF" description="Peripheral LCDIF is not initialized" problem_level="1" source="Pins:BOARD_InitLCDPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitLCDPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitLCDPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 00" pin_num="C8" pin_signal="GPIO_B0_04">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 01" pin_num="B8" pin_signal="GPIO_B0_05">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 02" pin_num="A8" pin_signal="GPIO_B0_06">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_clk" pin_num="D7" pin_signal="GPIO_B0_00">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 03" pin_num="A9" pin_signal="GPIO_B0_07">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 04" pin_num="B9" pin_signal="GPIO_B0_08">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 05" pin_num="C9" pin_signal="GPIO_B0_09">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 06" pin_num="D9" pin_signal="GPIO_B0_10">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 07" pin_num="A10" pin_signal="GPIO_B0_11">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 08" pin_num="C10" pin_signal="GPIO_B0_12">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 09" pin_num="D10" pin_signal="GPIO_B0_13">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 10" pin_num="E10" pin_signal="GPIO_B0_14">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 11" pin_num="E11" pin_signal="GPIO_B0_15">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 12" pin_num="A11" pin_signal="GPIO_B1_00">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 13" pin_num="B11" pin_signal="GPIO_B1_01">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 14" pin_num="C11" pin_signal="GPIO_B1_02">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_data, 15" pin_num="D11" pin_signal="GPIO_B1_03">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_enable" pin_num="E7" pin_signal="GPIO_B0_01">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_hsync" pin_num="E8" pin_signal="GPIO_B0_02">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LCDIF" signal="lcdif_vsync" pin_num="D8" pin_signal="GPIO_B0_03">
+                     <pin_features>
+                        <pin_feature name="hysteresis_enable" value="Enable"/>
+                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
+                        <pin_feature name="pull_keeper_select" value="Pull"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO2" signal="gpio_io, 31" pin_num="B14" pin_signal="GPIO_B1_15">
+                     <pin_features>
+                        <pin_feature name="slew_rate" value="Slow"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO1" signal="gpio_io, 02" pin_num="M11" pin_signal="GPIO_AD_B0_02"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitCANPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="CAN2" description="Peripheral CAN2 is not initialized" problem_level="1" source="Pins:BOARD_InitCANPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitCANPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitCANPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="CAN2" signal="TX" pin_num="H14" pin_signal="GPIO_AD_B0_14"/>
+                  <pin peripheral="CAN2" signal="RX" pin_num="L10" pin_signal="GPIO_AD_B0_15"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitENETPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="ENET" description="Peripheral ENET is not initialized" problem_level="1" source="Pins:BOARD_InitENETPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitENETPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitENETPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="ENET" signal="enet_mdc" pin_num="A7" pin_signal="GPIO_EMC_40"/>
+                  <pin peripheral="ENET" signal="enet_mdio" pin_num="C7" pin_signal="GPIO_EMC_41"/>
+                  <pin peripheral="ENET" signal="enet_ref_clk" pin_num="B13" pin_signal="GPIO_B1_10"/>
+                  <pin peripheral="ENET" signal="enet_rx_data, 0" pin_num="E12" pin_signal="GPIO_B1_04"/>
+                  <pin peripheral="ENET" signal="enet_rx_data, 1" pin_num="D12" pin_signal="GPIO_B1_05"/>
+                  <pin peripheral="ENET" signal="enet_rx_en" pin_num="C12" pin_signal="GPIO_B1_06"/>
+                  <pin peripheral="ENET" signal="enet_rx_er" pin_num="C13" pin_signal="GPIO_B1_11"/>
+                  <pin peripheral="ENET" signal="enet_tx_data, 0" pin_num="B12" pin_signal="GPIO_B1_07"/>
+                  <pin peripheral="ENET" signal="enet_tx_data, 1" pin_num="A12" pin_signal="GPIO_B1_08"/>
+                  <pin peripheral="ENET" signal="enet_tx_en" pin_num="A13" pin_signal="GPIO_B1_09"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitUSDHCPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="USDHC1" description="Peripheral USDHC1 is not initialized" problem_level="1" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitUSDHCPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 3" pin_num="J2" pin_signal="GPIO_SD_B0_05"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 2" pin_num="H2" pin_signal="GPIO_SD_B0_04"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 1" pin_num="K1" pin_signal="GPIO_SD_B0_03"/>
+                  <pin peripheral="USDHC1" signal="usdhc_data, 0" pin_num="J1" pin_signal="GPIO_SD_B0_02"/>
+                  <pin peripheral="USDHC1" signal="usdhc_cmd" pin_num="J4" pin_signal="GPIO_SD_B0_00"/>
+                  <pin peripheral="USDHC1" signal="usdhc_clk" pin_num="J3" pin_signal="GPIO_SD_B0_01"/>
+                  <pin peripheral="USDHC1" signal="usdhc_vselect" pin_num="C14" pin_signal="GPIO_B1_14"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitQSPIPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXSPI" description="Peripheral FLEXSPI is not initialized" problem_level="1" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitQSPIPins">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA0" pin_num="P3" pin_signal="GPIO_SD_B1_08"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA1" pin_num="N4" pin_signal="GPIO_SD_B1_09"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA2" pin_num="P4" pin_signal="GPIO_SD_B1_10"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DATA3" pin_num="P5" pin_signal="GPIO_SD_B1_11"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_SCLK" pin_num="L4" pin_signal="GPIO_SD_B1_07"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_SS0_B" pin_num="L3" pin_signal="GPIO_SD_B1_06"/>
+                  <pin peripheral="FLEXSPI" signal="FLEXSPI_A_DQS" pin_num="N3" pin_signal="GPIO_SD_B1_05"/>
+               </pins>
+            </function>
+         </functions_list>
+      </pins>
+      <clocks name="Clocks" version="11.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/clock_config.c" update_enabled="true"/>
+            <file path="board/clock_config.h" update_enabled="true"/>
+         </generated_project_files>
+         <clocks_profile>
+            <processor_version>13.0.2</processor_version>
+         </clocks_profile>
+         <clock_configurations>
+            <clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Clocks initialization requires the IOMUXC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="XTALOSC24M.RTC_OSC.outFreq" value="32.768 kHz" locked="false" enabled="true"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="AHB_CLK_ROOT.outFreq" value="600 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CAN_CLK_ROOT.outFreq" value="40 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CKIL_SYNC_CLK_ROOT.outFreq" value="32.768 kHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_1M.outFreq" value="1 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_24M.outFreq" value="24 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CSI_CLK_ROOT.outFreq" value="12 MHz" locked="false" accuracy=""/>
+                  <clock_output id="ENET2_125M_CLK.outFreq" value="1.2 MHz" locked="false" accuracy=""/>
+                  <clock_output id="ENET_125M_CLK.outFreq" value="2.4 MHz" locked="false" accuracy=""/>
+                  <clock_output id="ENET_25M_REF_CLK.outFreq" value="1.2 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXIO1_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXIO2_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXSPI2_CLK_ROOT.outFreq" value="1440/11 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FLEXSPI_CLK_ROOT.outFreq" value="1440/11 MHz" locked="false" accuracy=""/>
+                  <clock_output id="GPT1_ipg_clk_highfreq.outFreq" value="75 MHz" locked="false" accuracy=""/>
+                  <clock_output id="GPT2_ipg_clk_highfreq.outFreq" value="75 MHz" locked="false" accuracy=""/>
+                  <clock_output id="IPG_CLK_ROOT.outFreq" value="150 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LCDIF_CLK_ROOT.outFreq" value="67.5 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LPI2C_CLK_ROOT.outFreq" value="60 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LPSPI_CLK_ROOT.outFreq" value="105.6 MHz" locked="false" accuracy=""/>
+                  <clock_output id="LVDS1_CLK.outFreq" value="1.2 GHz" locked="false" accuracy=""/>
+                  <clock_output id="MQS_MCLK.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="PERCLK_CLK_ROOT.outFreq" value="75 MHz" locked="false" accuracy=""/>
+                  <clock_output id="PLL7_MAIN_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK2.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI1_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI2_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SAI3_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SEMC_CLK_ROOT.outFreq" value="75 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SPDIF0_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
+                  <clock_output id="TRACE_CLK_ROOT.outFreq" value="132 MHz" locked="false" accuracy=""/>
+                  <clock_output id="UART_CLK_ROOT.outFreq" value="80 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USBPHY1_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USBPHY2_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USDHC1_CLK_ROOT.outFreq" value="198 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USDHC2_CLK_ROOT.outFreq" value="198 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="CCM.AHB_PODF.scale" value="1" locked="true"/>
+                  <setting id="CCM.ARM_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.FLEXSPI2_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.FLEXSPI2_SEL.sel" value="CCM_ANALOG.PLL3_PFD0_CLK" locked="false"/>
+                  <setting id="CCM.FLEXSPI_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.FLEXSPI_SEL.sel" value="CCM_ANALOG.PLL3_PFD0_CLK" locked="false"/>
+                  <setting id="CCM.LCDIF_PODF.scale" value="4" locked="true"/>
+                  <setting id="CCM.LCDIF_PRED.scale" value="2" locked="true"/>
+                  <setting id="CCM.LPSPI_PODF.scale" value="5" locked="true"/>
+                  <setting id="CCM.PERCLK_PODF.scale" value="2" locked="true"/>
+                  <setting id="CCM.SEMC_PODF.scale" value="8" locked="false"/>
+                  <setting id="CCM.TRACE_CLK_SEL.sel" value="CCM_ANALOG.PLL2_MAIN_CLK" locked="false"/>
+                  <setting id="CCM.TRACE_PODF.scale" value="4" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL1_BYPASS.sel" value="CCM_ANALOG.PLL1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL1_PREDIV.scale" value="1" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL1_VDIV.scale" value="50" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2.denom" value="1" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2.num" value="0" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL2_BYPASS.sel" value="CCM_ANALOG.PLL2_OUT_CLK" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL2_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_BYPASS.sel" value="CCM_ANALOG.PLL3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_DIV.scale" value="33" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD0_MUL.scale" value="18" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD2" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL3_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD3" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL4.denom" value="50" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL4.div" value="47" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5.denom" value="1" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5.div" value="31" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL5.num" value="0" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5_BYPASS.sel" value="CCM_ANALOG.PLL5_POST_DIV" locked="false"/>
+                  <setting id="CCM_ANALOG.PLL5_POST_DIV.scale" value="2" locked="true"/>
+                  <setting id="CCM_ANALOG.PLL7_BYPASS.sel" value="CCM_ANALOG.PLL7" locked="false"/>
+                  <setting id="CCM_ANALOG.VIDEO_DIV.scale" value="4" locked="true"/>
+                  <setting id="CCM_ANALOG_PLL_ENET_POWERDOWN_CFG" value="Yes" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB1_POWER_CFG" value="Yes" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB2_EN_USB_CLKS_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB2_EN_USB_CLKS_OUT_CFG" value="Enabled" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_USB2_POWER_CFG" value="Yes" locked="false"/>
+                  <setting id="CCM_ANALOG_PLL_VIDEO_POWERDOWN_CFG" value="No" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>true</called_from_default_init>
+            </clock_configuration>
+         </clock_configurations>
+      </clocks>
+      <dcdx name="DCDx" version="3.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <dcdx_profile>
+            <processor_version>0.0.0</processor_version>
+         </dcdx_profile>
+         <dcdx_configurations/>
+      </dcdx>
+      <periphs name="Peripherals" version="12.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/peripherals.c" update_enabled="true"/>
+            <file path="board/peripherals.h" update_enabled="true"/>
+         </generated_project_files>
+         <peripherals_profile>
+            <processor_version>13.0.2</processor_version>
+         </peripherals_profile>
+         <functional_groups>
+            <functional_group name="BOARD_InitPeripherals" uuid="96c1cec6-3bd3-47a2-8301-f38e4b0dd25f" called_from_default_init="true" id_prefix="" core="core0">
+               <description></description>
+               <options/>
+               <dependencies/>
+               <instances>
+                  <instance name="CAN" uuid="eb0900eb-d552-4097-9dcf-a07e592a887f" type="flexcan" type_id="flexcan_ba45456ec815807245205237e2bf425b" mode="interrupts" peripheral="CAN2" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="interruptsCfg">
+                        <setting name="messageBufferIrqs" value="0"/>
+                        <setting name="messageBufferIrqs2" value="0"/>
+                        <set name="interruptsEnable">
+                           <selected/>
+                        </set>
+                        <setting name="enable_irq" value="false"/>
+                        <struct name="interrupt_shared">
+                           <setting name="IRQn" value="CAN2_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                     <config_set name="fsl_flexcan" quick_selection="default">
+                        <struct name="can_config">
+                           <setting name="clockSource" value="kFLEXCAN_ClkSrcOsc"/>
+                           <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                           <setting name="baudRate" value="1000000"/>
+                           <setting name="maxMbNum" value="16"/>
+                           <setting name="enableLoopBack" value="false"/>
+                           <setting name="enableSelfWakeup" value="false"/>
+                           <setting name="enableIndividMask" value="false"/>
+                           <struct name="timingConfig">
+                              <setting name="propSeg" value="2"/>
+                              <setting name="phaseSeg1" value="4"/>
+                              <setting name="phaseSeg2" value="3"/>
+                              <setting name="rJumpwidth" value="2"/>
+                              <struct name="bitTime"/>
+                           </struct>
+                        </struct>
+                        <setting name="enableRxFIFO" value="false"/>
+                        <struct name="rxFIFO">
+                           <setting name="idFilterTable" value=""/>
+                           <setting name="idFilterNum" value="num0"/>
+                           <setting name="idFilterType" value="kFLEXCAN_RxFifoFilterTypeA"/>
+                           <setting name="priority" value="kFLEXCAN_RxFifoPrioLow"/>
+                        </struct>
+                        <array name="channels">
+                           <struct name="0">
+                              <setting name="mbID" value="0"/>
+                              <setting name="mbType" value="mbRx"/>
+                              <struct name="rxMb">
+                                 <setting name="id" value="0"/>
+                                 <setting name="format" value="kFLEXCAN_FrameFormatStandard"/>
+                                 <setting name="type" value="kFLEXCAN_FrameTypeData"/>
+                              </struct>
+                           </struct>
+                           <struct name="1">
+                              <setting name="mbID" value="1"/>
+                              <setting name="mbType" value="mbTx"/>
+                              <struct name="rxMb">
+                                 <setting name="id" value="0"/>
+                                 <setting name="format" value="kFLEXCAN_FrameFormatStandard"/>
+                                 <setting name="type" value="kFLEXCAN_FrameTypeData"/>
+                              </struct>
+                           </struct>
+                        </array>
+                     </config_set>
+                  </instance>
+                  <instance name="CSI" uuid="f67d9a64-c26d-4421-9805-a062b24146f2" type="csi" type_id="csi_3739ec1355c7b915be929f3b7e35095b" mode="interrupt" peripheral="CSI" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="fsl_csi" quick_selection="QuickSelection1">
+                        <struct name="clockConfig">
+                           <setting name="clockSource" value="BusInterfaceClock"/>
+                           <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                           <setting name="masterClockSource" value="CsiClock"/>
+                           <setting name="masterClockSourceFreq" value="ClocksTool_DefaultInit"/>
+                        </struct>
+                        <struct name="config">
+                           <setting name="format" value="RGB565"/>
+                           <setting name="i_width" value="320"/>
+                           <setting name="i_height" value="240"/>
+                           <setting name="dataBus" value="kCSI_DataBus8Bit"/>
+                           <setting name="workMode" value="kCSI_GatedClockMode"/>
+                           <setting name="useExtVsync" value="true"/>
+                           <set name="polarityFlags">
+                              <selected/>
+                           </set>
+                           <struct name="buffers_config">
+                              <setting name="bufferName" value="defaultBuffer"/>
+                              <setting name="bufCount" value="4"/>
+                              <setting name="bufferAlign" value="64"/>
+                           </struct>
+                        </struct>
+                        <struct name="interruptsCfg">
+                           <setting name="isInterruptEnabled" value="false"/>
+                           <set name="interruptSources">
+                              <selected/>
+                           </set>
+                           <struct name="interrupt">
+                              <setting name="IRQn" value="CSI_IRQn"/>
+                              <setting name="enable_interrrupt" value="enabled"/>
+                              <setting name="enable_priority" value="false"/>
+                              <setting name="priority" value="0"/>
+                              <setting name="enable_custom_name" value="false"/>
+                           </struct>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="CSI_LPI2C" uuid="f2c6cd0a-751c-4424-9248-a4d98da47de7" type="lpi2c" type_id="lpi2c_db68d4f4f06a22e25ab51fe9bd6db4d2" mode="master" peripheral="LPI2C1" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="main" quick_selection="qs_interrupt">
+                        <setting name="clockSource" value="Lpi2cClock"/>
+                        <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                        <struct name="interrupt">
+                           <setting name="IRQn" value="LPI2C1_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                     <config_set name="master" quick_selection="qs_master_transfer">
+                        <setting name="mode" value="transfer"/>
+                        <struct name="config">
+                           <setting name="enableMaster" value="true"/>
+                           <setting name="enableDoze" value="true"/>
+                           <setting name="debugEnable" value="false"/>
+                           <setting name="ignoreAck" value="false"/>
+                           <setting name="pinConfig" value="kLPI2C_2PinOpenDrain"/>
+                           <setting name="baudRate_Hz" value="100000"/>
+                           <setting name="busIdleTimeout_ns" value="0"/>
+                           <setting name="pinLowTimeout_ns" value="0"/>
+                           <setting name="sdaGlitchFilterWidth_ns" value="0"/>
+                           <setting name="sclGlitchFilterWidth_ns" value="0"/>
+                           <struct name="hostRequest">
+                              <setting name="enable" value="false"/>
+                              <setting name="source" value="kLPI2C_HostRequestExternalPin"/>
+                              <setting name="polarity" value="kLPI2C_HostRequestPinActiveHigh"/>
+                           </struct>
+                           <set name="edmaRequestSources">
+                              <selected/>
+                           </set>
+                        </struct>
+                        <struct name="transfer">
+                           <setting name="blocking" value="false"/>
+                           <setting name="enable_custom_handle" value="false"/>
+                           <struct name="callback">
+                              <setting name="name" value=""/>
+                              <setting name="userData" value=""/>
+                           </struct>
+                           <set name="flags">
+                              <selected/>
+                           </set>
+                           <setting name="slaveAddress" value="0"/>
+                           <setting name="direction" value="kLPI2C_Write"/>
+                           <setting name="subaddress" value="0"/>
+                           <setting name="subaddressSize" value="1"/>
+                           <setting name="blocking_buffer" value="false"/>
+                           <setting name="enable_custom_buffer" value="false"/>
+                           <setting name="dataSize" value="1"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="DEBUG_UART" uuid="01f250e2-83d7-4b7b-a98d-772d1c3bdb42" type="lpuart" type_id="lpuart_bf01db7d964092f3cf860852cba17f7e" mode="polling" peripheral="LPUART1" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="lpuartConfig_t">
+                        <struct name="lpuartConfig">
+                           <setting name="clockSource" value="LpuartClock"/>
+                           <setting name="lpuartSrcClkFreq" value="BOARD_BootClockRUN"/>
+                           <setting name="baudRate_Bps" value="115200"/>
+                           <setting name="parityMode" value="kLPUART_ParityDisabled"/>
+                           <setting name="dataBitsCount" value="kLPUART_EightDataBits"/>
+                           <setting name="isMsb" value="false"/>
+                           <setting name="stopBitCount" value="kLPUART_OneStopBit"/>
+                           <setting name="enableMatchAddress1" value="false"/>
+                           <setting name="matchAddress1" value="0"/>
+                           <setting name="enableMatchAddress2" value="false"/>
+                           <setting name="matchAddress2" value="0"/>
+                           <setting name="txFifoWatermark" value="0"/>
+                           <setting name="rxFifoWatermark" value="1"/>
+                           <setting name="enableRxRTS" value="false"/>
+                           <setting name="enableTxCTS" value="false"/>
+                           <setting name="txCtsSource" value="kLPUART_CtsSourcePin"/>
+                           <setting name="txCtsConfig" value="kLPUART_CtsSampleAtStart"/>
+                           <setting name="rxIdleType" value="kLPUART_IdleTypeStartBit"/>
+                           <setting name="rxIdleConfig" value="kLPUART_IdleCharacter1"/>
+                           <setting name="enableTx" value="true"/>
+                           <setting name="enableRx" value="true"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="LCD" uuid="90a0c31d-6042-4687-af0f-0892536bc1ba" type="elcdif" type_id="elcdif_1c39bcb43ed1a24bc8980672c7378576" mode="rgbMode" peripheral="LCDIF" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="fsl_elcdif">
+                        <struct name="config">
+                           <setting name="panelWidthInt" value="480"/>
+                           <setting name="panelHeightInt" value="272"/>
+                           <setting name="hsw" value="41"/>
+                           <setting name="hfp" value="4"/>
+                           <setting name="hbp" value="8"/>
+                           <setting name="vsw" value="10"/>
+                           <setting name="vfp" value="4"/>
+                           <setting name="vbp" value="3"/>
+                           <setting name="frameRate" value="60 Hz"/>
+                           <setting name="clockSource" value="LcdIfClock"/>
+                           <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                           <struct name="polarityFlags_st">
+                              <setting name="vSyncActive" value="kELCDIF_VsyncActiveLow"/>
+                              <setting name="hSyncActive" value="kELCDIF_HsyncActiveLow"/>
+                              <setting name="dataEnableActive" value="kELCDIF_DataEnableActiveLow"/>
+                              <setting name="driveDataClkEdge" value="kELCDIF_DriveDataOnFallingClkEdge"/>
+                           </struct>
+                           <setting name="bufferName" value="defaultBuffer"/>
+                           <setting name="bufferAlign" value="64"/>
+                           <setting name="pixelFormat" value="kELCDIF_PixelFormatRGB565"/>
+                           <setting name="dataBus" value="kELCDIF_DataBus16Bit"/>
+                           <setting name="enablePxpHandShake" value="false"/>
+                           <setting name="start" value="false"/>
+                        </struct>
+                        <setting name="isInterruptEnabled" value="true"/>
+                        <set name="elcdifInterruptSources">
+                           <selected>
+                              <id>kELCDIF_CurFrameDoneInterruptEnable</id>
+                           </selected>
+                        </set>
+                        <struct name="interrupt">
+                           <setting name="IRQn" value="LCDIF_IRQn"/>
+                           <setting name="enable_interrrupt" value="enabled"/>
+                           <setting name="enable_priority" value="false"/>
+                           <setting name="priority" value="0"/>
+                           <setting name="enable_custom_name" value="false"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="NVIC" uuid="b31fa225-2a52-486b-9c5c-33a184a2c716" type="nvic" type_id="nvic_57b5eef3774cc60acaede6f5b8bddc67" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="nvic">
+                        <array name="interrupt_table"/>
+                        <array name="interrupts"/>
+                     </config_set>
+                  </instance>
+               </instances>
+            </functional_group>
+         </functional_groups>
+         <components>
+            <component name="system" uuid="aa3cc953-557b-4557-b7fe-6fedc31acf98" type_id="system">
+               <config_set_global name="global_system_definitions">
+                  <setting name="user_definitions" value=""/>
+                  <setting name="user_includes" value=""/>
+               </config_set_global>
+            </component>
+            <component name="msg" uuid="8b3f852e-ee1e-45e9-abff-0ff722f1d65d" type_id="msg">
+               <config_set_global name="global_messages"/>
+            </component>
+            <component name="gpio_adapter_common" uuid="539d282e-5136-4289-9058-9a46b221ca45" type_id="gpio_adapter_common_57579b9ac814fe26bf95df0a384c36b6">
+               <config_set_global name="global_gpio_adapter_common" quick_selection="default"/>
+            </component>
+            <component name="generic_uart" uuid="6e4c02c4-0524-4905-91b5-01d2e2502186" type_id="generic_uart_8cae00565451cf2346eb1b8c624e73a6">
+               <config_set_global name="global_uart"/>
+            </component>
+            <component name="generic_can" uuid="c6d8fd36-2bbd-44c6-a160-54e7e12d0807" type_id="generic_can_1bfdd78b1af214566c1f23cf6a582d80">
+               <config_set_global name="global_can"/>
+            </component>
+            <component name="uart_cmsis_common" uuid="7d3626d3-4536-4838-a35d-3b8cf5a2bd71" type_id="uart_cmsis_common_9cb8e302497aa696fdbb5a4fd622c2a8">
+               <config_set_global name="global_USART_CMSIS_common" quick_selection="default"/>
+            </component>
+            <component name="generic_enet" uuid="738ea8df-6176-4e52-b4c7-b88aa9c17d13" type_id="generic_enet_74db5c914f0ddbe47d86af40cb77a619">
+               <config_set_global name="global_enet"/>
+            </component>
+         </components>
+      </periphs>
+      <tee name="TEE" version="4.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <tee_profile>
+            <processor_version>0.0.0</processor_version>
+         </tee_profile>
+      </tee>
+   </tools>
+</configuration>
diff --git a/hw/bsp/mcx/mcx.jlinkscript b/hw/bsp/imxrt/debug.jlinkscript
similarity index 100%
rename from hw/bsp/mcx/mcx.jlinkscript
rename to hw/bsp/imxrt/debug.jlinkscript
diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c
index 735fbdb9b..9aa55bc94 100644
--- a/hw/bsp/imxrt/family.c
+++ b/hw/bsp/imxrt/family.c
@@ -234,21 +234,18 @@ int board_uart_read(uint8_t* buf, int len)
   return count;
 }
 
-int board_uart_write(void const * buf, int len)
-{
+int board_uart_write(void const * buf, int len) {
   LPUART_WriteBlocking(UART_PORT, (uint8_t const*)buf, len);
   return len;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
-void SysTick_Handler(void)
-{
+void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void)
-{
+uint32_t board_millis(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index a8841f8ce..f1c5b0ab1 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -24,12 +24,14 @@ set(FAMILY_MCUS MIMXRT1XXX CACHE INTERNAL "")
 function(add_board_target BOARD_TARGET)
   if (NOT TARGET ${BOARD_TARGET})
     add_library(${BOARD_TARGET} STATIC
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board/clock_config.c
+      #${SDK_DIR}/drivers/adc_12b1msps_sar/fsl_adc.c
       ${SDK_DIR}/drivers/common/fsl_common.c
       ${SDK_DIR}/drivers/igpio/fsl_gpio.c
+      ${SDK_DIR}/drivers/lpspi/fsl_lpspi.c
       ${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
       ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
       ${SDK_DIR}/devices/${MCU_VARIANT}/xip/fsl_flexspi_nor_boot.c
-      ${SDK_DIR}/devices/${MCU_VARIANT}/project_template/clock_config.c
       ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
       )
     target_compile_definitions(${BOARD_TARGET} PUBLIC
@@ -39,12 +41,15 @@ function(add_board_target BOARD_TARGET)
       XIP_BOOT_HEADER_ENABLE=1
       )
     target_include_directories(${BOARD_TARGET} PUBLIC
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board
       ${CMSIS_DIR}/CMSIS/Core/Include
       ${SDK_DIR}/devices/${MCU_VARIANT}
-      ${SDK_DIR}/devices/${MCU_VARIANT}/project_template
       ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+      #${SDK_DIR}/drivers/adc_12b1msps_sar
       ${SDK_DIR}/drivers/common
       ${SDK_DIR}/drivers/igpio
+      ${SDK_DIR}/drivers/lpspi
       ${SDK_DIR}/drivers/lpuart
       )
 
diff --git a/hw/bsp/mcx/debug.jlinkscript b/hw/bsp/mcx/debug.jlinkscript
new file mode 100644
index 000000000..fd8bcffef
--- /dev/null
+++ b/hw/bsp/mcx/debug.jlinkscript
@@ -0,0 +1,5 @@
+int SetupTarget(void) {
+  JLINK_ExecCommand("SetRTTSearchRanges 0x20000000 0x40000");
+
+  return 0;
+}

From 8b6d0a166b3837e664eeabbada724b678b7fd62d Mon Sep 17 00:00:00 2001
From: Scott Shawcroft <scott@tannewt.org>
Date: Fri, 14 Jul 2023 15:30:22 -0700
Subject: [PATCH 499/691] Fix host buffer alignment setting

---
 src/portable/chipidea/ci_hs/ci_hs_imxrt.h | 6 ++++++
 src/tusb_option.h                         | 6 +++++-
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h
index c14f00431..96f0ba766 100644
--- a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h
+++ b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h
@@ -78,6 +78,12 @@ TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean(void const* addr, ui
 TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_invalidate(void const* addr, uint32_t data_size) {
   const uintptr_t addr32 = (uintptr_t) addr;
   if (imxrt_is_cache_mem(addr32)) {
+    // Invalidating does not push cached changes back to RAM so we need to be
+    // *very* careful when we do it. If we're not aligned, then we risk resetting
+    // values back to their RAM state.
+    // if (addr32 % 32 != 0) {
+    //   TU_BREAKPOINT();
+    // }
     SCB_InvalidateDCache_by_Addr((void*) addr32, (int32_t) data_size);
   }
 }
diff --git a/src/tusb_option.h b/src/tusb_option.h
index f16d8a5d0..c792efe6a 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -431,7 +431,11 @@
 
 // Attribute to align memory for host controller
 #ifndef CFG_TUH_MEM_ALIGN
-  #define CFG_TUH_MEM_ALIGN   TU_ATTR_ALIGNED(4)
+  #ifdef CFG_TUSB_MEM_ALIGN
+    #define CFG_TUH_MEM_ALIGN   CFG_TUSB_MEM_ALIGN
+  #else
+    #define CFG_TUH_MEM_ALIGN   TU_ATTR_ALIGNED(4)
+  #endif
 #endif
 
 //------------- CLASS -------------//

From 1923b1845d033a3d42db9b739029b2cc39248150 Mon Sep 17 00:00:00 2001
From: Aladdin Bakosh <aladdin.bakosh@emerson.com>
Date: Fri, 23 Jun 2023 10:26:45 +0200
Subject: [PATCH 500/691] fix(RA_hcd): STALL status can be also 3 not only 2

---
 src/host/usbh.c                         | 2 +-
 src/portable/renesas/rusb2/hcd_rusb2.c  | 5 +++--
 src/portable/renesas/rusb2/rusb2_type.h | 1 +
 3 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/host/usbh.c b/src/host/usbh.c
index f3e9d3858..184bda23b 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -791,7 +791,7 @@ bool usbh_edpt_xfer_with_callback(uint8_t dev_addr, uint8_t ep_addr, uint8_t * b
   uint8_t const dir   = tu_edpt_dir(ep_addr);
   tu_edpt_state_t* ep_state = &dev->ep_status[epnum][dir];
 
-  TU_LOG_USBH("  Queue EP %02X with %u bytes ... ", ep_addr, total_bytes);
+  TU_LOG_USBH("  Queue EP %02X with %u bytes ... \r\n", ep_addr, total_bytes);
 
   // Attempt to transfer on a busy endpoint, sound like an race condition !
   TU_ASSERT(ep_state->busy == 0);
diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index 0e6fa1618..193e07d8c 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -116,7 +116,7 @@ static unsigned find_pipe(unsigned xfer)
     for (int i = 3; i <= 5; ++i) {
       if (0 == _hcd.pipe[i].ep) return  i;
     }
-    for (int i = 1; i <= 1; ++i) {
+    for (int i = 1; i <= 2; ++i) {
       if (0 == _hcd.pipe[i].ep) return  i;
     }
     break;
@@ -413,6 +413,7 @@ static void process_pipe_nrdy(uint8_t rhport, unsigned num)
   switch (*ctr & RUSB2_PIPE_CTR_PID_Msk) {
     default: return;
     case RUSB2_PIPE_CTR_PID_STALL: result = XFER_RESULT_STALLED; break;
+    case RUSB2_PIPE_CTR_PID_STALL2: result = XFER_RESULT_STALLED; break;
     case RUSB2_PIPE_CTR_PID_NAK:   result = XFER_RESULT_FAILED;  break;
   }
   pipe_state_t *pipe = &_hcd.pipe[num];
@@ -586,7 +587,7 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
   uint8_t *ep = &_hcd.ep[dev_addr - 1][0][0];
   for (int i = 0; i < 2 * 15; ++i, ++ep) {
     unsigned num = *ep;
-    if (!num || dev_addr != _hcd.pipe[num].dev) continue;
+    if (!num || (dev_addr != _hcd.pipe[num].dev)) continue;
 
     ctr = (uint16_t volatile*)&RUSB2->PIPE_CTR[num - 1];
     *ctr = 0;
diff --git a/src/portable/renesas/rusb2/rusb2_type.h b/src/portable/renesas/rusb2/rusb2_type.h
index 90ba4f012..83119507a 100644
--- a/src/portable/renesas/rusb2/rusb2_type.h
+++ b/src/portable/renesas/rusb2/rusb2_type.h
@@ -1568,6 +1568,7 @@ TU_ATTR_BIT_FIELD_ORDER_END
 #define RUSB2_PIPE_CTR_PID_NAK          (0U << RUSB2_PIPE_CTR_PID_Pos)    /* NAK response */
 #define RUSB2_PIPE_CTR_PID_BUF          (1U << RUSB2_PIPE_CTR_PID_Pos)    /* BUF response (depends buffer state) */
 #define RUSB2_PIPE_CTR_PID_STALL        (2U << RUSB2_PIPE_CTR_PID_Pos)    /* STALL response */
+#define RUSB2_PIPE_CTR_PID_STALL2       (3U << RUSB2_PIPE_CTR_PID_Pos)    /* Also STALL response */
 
 #define RUSB2_DVSTCTR0_RHST_LS          (1U << RUSB2_DVSTCTR0_RHST_Pos)   /*  Low-speed connection */
 #define RUSB2_DVSTCTR0_RHST_FS          (2U << RUSB2_DVSTCTR0_RHST_Pos)   /*  Full-speed connection */

From 41b608562a40b68d6b58d01a3239c466533b4b6b Mon Sep 17 00:00:00 2001
From: Aladdin Bakosh <aladdin.bakosh@emerson.com>
Date: Fri, 23 Jun 2023 14:21:58 +0200
Subject: [PATCH 501/691] debugging can be configured on renesas hcd

---
 src/portable/renesas/rusb2/hcd_rusb2.c | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index 193e07d8c..65bbc656b 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -41,6 +41,8 @@
   #error "Unsupported MCU"
 #endif
 
+#define TU_RUSB2_HCD_DBG   0
+
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM DECLARATION
 //--------------------------------------------------------------------+
@@ -409,7 +411,7 @@ static void process_pipe_nrdy(uint8_t rhport, unsigned num)
   (void)rhport;
   xfer_result_t result;
   uint16_t volatile *ctr = get_pipectr(num);
-  // TU_LOG1("NRDY %d %x\n", num, *ctr);
+  TU_LOG(TU_RUSB2_HCD_DBG, "NRDY %d %x\n", num, *ctr);
   switch (*ctr & RUSB2_PIPE_CTR_PID_Msk) {
     default: return;
     case RUSB2_PIPE_CTR_PID_STALL: result = XFER_RESULT_STALLED; break;
@@ -442,7 +444,7 @@ static void process_pipe_brdy(uint8_t rhport, unsigned num)
     hcd_event_xfer_complete(pipe->dev, pipe->ep,
                             pipe->length - pipe->remaining,
                             XFER_RESULT_SUCCESS, true);
-    //  TU_LOG1("C %d %d\r\n", num, pipe->length - pipe->remaining);
+    TU_LOG(TU_RUSB2_HCD_DBG, "C %d %d\r\n", num, pipe->length - pipe->remaining);
   }
 }
 
@@ -609,7 +611,7 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
 bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8])
 {
   (void)rhport;
-  //  TU_LOG1("S %d %x\n", dev_addr, RUSB2->DCPCTR);
+  TU_LOG(TU_RUSB2_HCD_DBG, "S %d %x\n", dev_addr, RUSB2->DCPCTR);
 
   TU_ASSERT(dev_addr < 6); /* USBa can only handle addresses from 0 to 5. */
   TU_ASSERT(0 == RUSB2->DCPCTR_b.SUREQ);
@@ -702,7 +704,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *b
 {
   bool r;
   hcd_int_disable(rhport);
-  // TU_LOG1("X %d %x %u\n", dev_addr, ep_addr, buflen);
+  TU_LOG(TU_RUSB2_HCD_DBG, "X %d %x %u\n", dev_addr, ep_addr, buflen);
   r = process_edpt_xfer(dev_addr, ep_addr, buffer, buflen);
   hcd_int_enable(rhport);
   return r;
@@ -746,7 +748,7 @@ void hcd_int_handler(uint8_t rhport)
   /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */
   RUSB2->INTSTS1 = ~((RUSB2_INTSTS1_SACK_Msk | RUSB2_INTSTS1_SIGN_Msk | RUSB2_INTSTS1_ATTCH_Msk | RUSB2_INTSTS1_DTCH_Msk) & is1);
   RUSB2->INTSTS0 = ~((RUSB2_INTSTS0_BRDY_Msk | RUSB2_INTSTS0_NRDY_Msk | RUSB2_INTSTS0_BEMP_Msk) & is0);
-  // TU_LOG1("IS %04x %04x\n", is0, is1);
+  TU_LOG(TU_RUSB2_HCD_DBG, "IS %04x %04x\n", is0, is1);
   is1 &= RUSB2->INTENB1;
   is0 &= RUSB2->INTENB0;
 

From 3230d5b1ea45ac2b17e4abaac2bfbe190360fff8 Mon Sep 17 00:00:00 2001
From: Aladdin Bakosh <aladdin.bakosh@emerson.com>
Date: Fri, 23 Jun 2023 14:22:13 +0200
Subject: [PATCH 502/691] debugging can be configured on renesas dcd

---
 src/portable/renesas/rusb2/dcd_rusb2.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 78584125f..022c1b5b6 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -45,6 +45,8 @@
   #error "Unsupported MCU"
 #endif
 
+#define TU_RUSB2_DCD_DBG   0
+
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
@@ -444,7 +446,7 @@ static bool process_pipe_xfer(int buffer_type, uint8_t ep_addr, void* buffer, ui
       *ctr = RUSB2_PIPE_CTR_PID_BUF;
     }
   }
-  //  TU_LOG1("X %x %d %d\r\n", ep_addr, total_bytes, buffer_type);
+  TU_LOG(TU_RUSB2_DCD_DBG ,"X %x %d %d\r\n", ep_addr, total_bytes, buffer_type);
   return true;
 }
 
@@ -487,7 +489,7 @@ static void process_pipe_brdy(uint8_t rhport, unsigned num)
     dcd_event_xfer_complete(rhport, pipe->ep,
                             pipe->length - pipe->remaining,
                             XFER_RESULT_SUCCESS, true);
-    //  TU_LOG1("C %d %d\r\n", num, pipe->length - pipe->remaining);
+    TU_LOG(TU_RUSB2_DCD_DBG, "C %d %d\r\n", num, pipe->length - pipe->remaining);
   }
 }
 
@@ -691,7 +693,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   if (dir || (xfer != TUSB_XFER_BULK)) {
     *ctr = RUSB2_PIPE_CTR_PID_BUF;
   }
-  // TU_LOG1("O %d %x %x\r\n", RUSB2->PIPESEL, RUSB2->PIPECFG, RUSB2->PIPEMAXP);
+  TU_LOG(TU_RUSB2_DCD_DBG, "O %d %x %x\r\n", RUSB2->PIPESEL, RUSB2->PIPECFG, RUSB2->PIPEMAXP);
   dcd_int_enable(rhport);
 
   return true;

From 5723d3808770a5fb1057534dd3c21be482e446eb Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 17 Jul 2023 21:59:21 +0700
Subject: [PATCH 503/691] correct jlink dev for rt1010

---
 hw/bsp/imxrt/boards/metro_m7_1011/board.cmake  |  2 +-
 hw/bsp/imxrt/boards/metro_m7_1011/board.mk     |  2 +-
 hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake |  2 +-
 hw/bsp/imxrt/boards/mimxrt1010_evk/board.mk    |  2 +-
 hw/bsp/imxrt/family.c                          | 10 ++++++++++
 5 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/hw/bsp/imxrt/boards/metro_m7_1011/board.cmake b/hw/bsp/imxrt/boards/metro_m7_1011/board.cmake
index 3ba95bf2c..99681ab12 100644
--- a/hw/bsp/imxrt/boards/metro_m7_1011/board.cmake
+++ b/hw/bsp/imxrt/boards/metro_m7_1011/board.cmake
@@ -1,6 +1,6 @@
 set(MCU_VARIANT MIMXRT1011)
 
-set(JLINK_DEVICE MIMXRT1011DAE5A)
+set(JLINK_DEVICE MIMXRT1011xxx5A)
 set(PYOCD_TARGET mimxrt1010)
 set(NXPLINK_DEVICE MIMXRT1011xxxxx:EVK-MIMXRT1010)
 
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011/board.mk b/hw/bsp/imxrt/boards/metro_m7_1011/board.mk
index 89a459958..b845194c2 100644
--- a/hw/bsp/imxrt/boards/metro_m7_1011/board.mk
+++ b/hw/bsp/imxrt/boards/metro_m7_1011/board.mk
@@ -5,7 +5,7 @@ MCU_VARIANT = MIMXRT1011
 LD_FILE = $(BOARD_PATH)/$(BOARD).ld
 
 # For flash-jlink target
-JLINK_DEVICE = MIMXRT1011DAE5A
+JLINK_DEVICE = MIMXRT1011xxx5A
 
 # For flash-pyocd target
 PYOCD_TARGET = mimxrt1010
diff --git a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
index 3ba95bf2c..99681ab12 100644
--- a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
+++ b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
@@ -1,6 +1,6 @@
 set(MCU_VARIANT MIMXRT1011)
 
-set(JLINK_DEVICE MIMXRT1011DAE5A)
+set(JLINK_DEVICE MIMXRT1011xxx5A)
 set(PYOCD_TARGET mimxrt1010)
 set(NXPLINK_DEVICE MIMXRT1011xxxxx:EVK-MIMXRT1010)
 
diff --git a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.mk b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.mk
index 17dc01cd9..488a56fdc 100644
--- a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.mk
+++ b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.mk
@@ -2,7 +2,7 @@ CFLAGS += -DCPU_MIMXRT1011DAE5A -DCFG_EXAMPLE_VIDEO_READONLY
 MCU_VARIANT = MIMXRT1011
 
 # For flash-jlink target
-JLINK_DEVICE = MIMXRT1011DAE5A
+JLINK_DEVICE = MIMXRT1011xxx5A
 
 # For flash-pyocd target
 PYOCD_TARGET = mimxrt1010
diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c
index 9aa55bc94..bfab1d496 100644
--- a/hw/bsp/imxrt/family.c
+++ b/hw/bsp/imxrt/family.c
@@ -91,6 +91,16 @@ void board_init(void)
   BOARD_BootClockRUN();
   SystemCoreClockUpdate();
 
+#ifdef TRACE_ETM
+  // RT1011 ETM pins
+//  IOMUXC_SetPinMux(IOMUXC_GPIO_11_ARM_TRACE3, 0U);
+//  IOMUXC_SetPinMux(IOMUXC_GPIO_12_ARM_TRACE2, 0U);
+//  IOMUXC_SetPinMux(IOMUXC_GPIO_13_ARM_TRACE1, 0U);
+//  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_00_ARM_TRACE0, 0U);
+//  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_02_ARM_TRACE_CLK, 0U);
+//  CLOCK_EnableClock(kCLOCK_Trace);
+#endif
+
   // Enable IOCON clock
   CLOCK_EnableClock(kCLOCK_Iomuxc);
 

From 2cd0b9ec35465aa54c57aee9cce68e556859db07 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 18 Jul 2023 15:27:51 +0700
Subject: [PATCH 504/691] fix etm trace clock with stm32h743eval board

---
 .idea/cmake.xml                               |   8 +-
 hw/bsp/lpc18/boards/mcb1800/board.h           |   1 -
 hw/bsp/stm32h7/boards/stm32h743eval/board.h   |  38 ++-----
 .../stm32h743eval/cubemx/stm32h743eval.ioc    | 102 +++++++++---------
 4 files changed, 67 insertions(+), 82 deletions(-)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 47ca8253e..788f70433 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -26,8 +26,10 @@
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
       <configuration PROFILE_NAME="rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico -DLOG=2" />
-      <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1010_evk" />
-      <configuration PROFILE_NAME="rt1060 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1060_evk" />
+      <configuration PROFILE_NAME="metro m7 1011" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1010_evk -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="rt1015 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1015_evk -DLOG=1" />
+      <configuration PROFILE_NAME="rt1060 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1060_evk -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="rt1064 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1064_evk" />
       <configuration PROFILE_NAME="mcb1800" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mcb1800 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="lpcxpresso18s37" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso18s37" />
@@ -38,7 +40,6 @@
       <configuration PROFILE_NAME="b_g474e_dpow1 iar" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=b_g474e_dpow1 -DTOOLCHAIN=iar" />
       <configuration PROFILE_NAME="frdm_kl25z" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=frdm_kl25z -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32h743eval" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h743eval -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="metro m7" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="stm32f072disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f072disco" />
       <configuration PROFILE_NAME="stm32f103_mini_2" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f103_mini_2" />
       <configuration PROFILE_NAME="stm32f769disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f769disco -DLOG=3 -DLOGGER=RTT" />
@@ -46,6 +47,7 @@
       <configuration PROFILE_NAME="ra4m1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra4m1_ek -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="ra6m1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m1_ek -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="ra6m5" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="rt1050 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1050_evkb -DLOG=1 -DLOGGER=RTT" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/hw/bsp/lpc18/boards/mcb1800/board.h b/hw/bsp/lpc18/boards/mcb1800/board.h
index 5bfaa37cd..93b3cd112 100644
--- a/hw/bsp/lpc18/boards/mcb1800/board.h
+++ b/hw/bsp/lpc18/boards/mcb1800/board.h
@@ -71,7 +71,6 @@ static inline void board_lpc18_pinmux(void) {
 
     // USB0
     { 0x6, 3, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC1 },		                // P6_3 USB0_PWR_EN, USB0 VBus function
-
     { 0x9, 5, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC2 },			              // P9_5 USB1_VBUS_EN, USB1 VBus function
     { 0x2, 5, SCU_MODE_INACT  | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC2 }, // P2_5 USB1_VBUS, MUST CONFIGURE THIS SIGNAL FOR USB1 NORMAL OPERATION
   };
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.h b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
index 7e3c015c8..c46b525ca 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
@@ -61,8 +61,7 @@
 //--------------------------------------------------------------------+
 // RCC Clock
 //--------------------------------------------------------------------+
-static inline void board_stm32h7_clock_init(void)
-{
+static inline void board_stm32h7_clock_init(void) {
   RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
   RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
   RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 };
@@ -75,7 +74,7 @@ static inline void board_stm32h7_clock_init(void)
      regarding system frequency refer to product datasheet.  */
   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
 
-  while ((PWR->D3CR & (PWR_D3CR_VOSRDY)) != PWR_D3CR_VOSRDY) {}
+  while ( (PWR->D3CR & (PWR_D3CR_VOSRDY)) != PWR_D3CR_VOSRDY ) {}
 
   /* Enable HSE Oscillator and activate PLL with HSE as source */
   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
@@ -85,40 +84,23 @@ static inline void board_stm32h7_clock_init(void)
   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 
-  // PLL1 for System Clock
-#ifdef TRACE_ETM
-  // From H743 eval board manual
-  // - ETM can only work at 50 MHz clock by default because ETM signals are shared with other peripherals. If better
-  //   performance of ETM is required (84 MHz/98 MHz), R217, R230, R231, R234, R236, SB2, SB5, SB8, SB11,
-  //   SB42, SB57 must be removed to reduce the stub on ETM signals. In this configuration SAI and PDM are not
-  //   functional and NOR Flash and the address of SRAM are limited on A18.
-  // - ETM trace function would be abnormal as SAI_SDB share the same pins with TRACE_D0, and TRACE_D0
-  //   would be forced high by SAI_SDB. When using ETM trace it is necessary to set ADCDAT1 pin (SAI_SDB signal
-  //   of the STM32) of audio codec WM8994ECS/R (U22) by software to be tri-state.
-
-  // Since Trace CLK = PLL1 / 3 --> max PLL1 clock is 150Mhz
-  RCC_OscInitStruct.PLL.PLLM = 2;
-  RCC_OscInitStruct.PLL.PLLN = 24;
-  RCC_OscInitStruct.PLL.PLLP = 2;
-  RCC_OscInitStruct.PLL.PLLQ = 4;
-  RCC_OscInitStruct.PLL.PLLR = 2;
-  RCC_OscInitStruct.PLL.PLLFRACN = 0;
-#else
-  // Set PLL1 to 400Mhz
+  // PLL1 for System Clock (400Mhz)
+  // From H743 eval manual ETM can only work at 50 MHz clock by default because ETM signals
+  // are shared with other peripherals. Trace CLK = PLL1R.
   RCC_OscInitStruct.PLL.PLLM = 5;
   RCC_OscInitStruct.PLL.PLLN = 160;
   RCC_OscInitStruct.PLL.PLLP = 2;
-  RCC_OscInitStruct.PLL.PLLR = 2;
   RCC_OscInitStruct.PLL.PLLQ = 4;
-#endif
+  RCC_OscInitStruct.PLL.PLLR = 6; // Trace clock is 400/6 = 66.67 MHz (larger than 50 MHz but work well)
   RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOMEDIUM;
+  RCC_OscInitStruct.PLL.PLLFRACN = 0;
   RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
   HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
 
   /* Select PLL as system clock source and configure bus clocks dividers */
   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 |
-      RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_D3PCLK1;
+                                RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_D3PCLK1;
 
   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
   RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
@@ -141,10 +123,10 @@ static inline void board_stm32h7_clock_init(void)
   HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
 
   /*activate CSI clock mondatory for I/O Compensation Cell*/
-  __HAL_RCC_CSI_ENABLE() ;
+  __HAL_RCC_CSI_ENABLE();
 
   /* Enable SYSCFG clock mondatory for I/O Compensation Cell */
-  __HAL_RCC_SYSCFG_CLK_ENABLE() ;
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
 
   /* Enables the I/O Compensation Cell */
   HAL_EnableCompensationCell();
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc b/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc
index 331080c17..01458a0a9 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc
@@ -892,93 +892,95 @@ ProjectManager.ProjectStructure=
 ProjectManager.RegisterCallBack=
 ProjectManager.StackSize=0x400
 ProjectManager.TargetToolchain=Makefile
-ProjectManager.ToolChainLocation=Src
+ProjectManager.ToolChainLocation=Src/
 ProjectManager.UnderRoot=false
 ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true,4-MX_USB_OTG_HS_PCD_Init-USB_OTG_HS-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
 RCC.ADCFreq_Value=50390625
-RCC.AHB12Freq_Value=150000000
-RCC.AHB4Freq_Value=150000000
-RCC.APB1Freq_Value=75000000
-RCC.APB2Freq_Value=75000000
-RCC.APB3Freq_Value=75000000
-RCC.APB4Freq_Value=75000000
-RCC.AXIClockFreq_Value=150000000
+RCC.AHB12Freq_Value=200000000
+RCC.AHB4Freq_Value=200000000
+RCC.APB1Freq_Value=100000000
+RCC.APB2Freq_Value=100000000
+RCC.APB3Freq_Value=100000000
+RCC.APB4Freq_Value=100000000
+RCC.AXIClockFreq_Value=200000000
 RCC.CECFreq_Value=32000
 RCC.CKPERFreq_Value=64000000
-RCC.CortexFreq_Value=150000000
-RCC.CpuClockFreq_Value=150000000
-RCC.D1CPREFreq_Value=150000000
+RCC.CortexFreq_Value=400000000
+RCC.CpuClockFreq_Value=400000000
+RCC.D1CPREFreq_Value=400000000
 RCC.D1PPRE=RCC_APB3_DIV2
 RCC.D2PPRE1=RCC_APB1_DIV2
 RCC.D2PPRE2=RCC_APB2_DIV2
 RCC.D3PPRE=RCC_APB4_DIV2
-RCC.DFSDMACLkFreq_Value=75000000
-RCC.DFSDMFreq_Value=75000000
-RCC.DIVM1=2
+RCC.DFSDMACLkFreq_Value=200000000
+RCC.DFSDMFreq_Value=100000000
+RCC.DIVM1=5
 RCC.DIVM3=25
-RCC.DIVN1=24
+RCC.DIVN1=160
 RCC.DIVN3=336
-RCC.DIVP1Freq_Value=150000000
+RCC.DIVP1Freq_Value=400000000
 RCC.DIVP2Freq_Value=50390625
 RCC.DIVP3Freq_Value=168000000
 RCC.DIVQ1=4
-RCC.DIVQ1Freq_Value=75000000
+RCC.DIVQ1Freq_Value=200000000
 RCC.DIVQ2Freq_Value=50390625
 RCC.DIVQ3=7
 RCC.DIVQ3Freq_Value=48000000
-RCC.DIVR1Freq_Value=150000000
+RCC.DIVR1=6
+RCC.DIVR1Freq_Value=133333333.33333333
 RCC.DIVR2Freq_Value=50390625
 RCC.DIVR3Freq_Value=168000000
 RCC.EnbaleCSS=true
-RCC.FDCANFreq_Value=75000000
-RCC.FMCFreq_Value=150000000
+RCC.FDCANFreq_Value=200000000
+RCC.FMCFreq_Value=200000000
 RCC.FamilyName=M
-RCC.HCLK3ClockFreq_Value=150000000
-RCC.HCLKFreq_Value=150000000
+RCC.HCLK3ClockFreq_Value=200000000
+RCC.HCLKFreq_Value=200000000
+RCC.HPRE=RCC_HCLK_DIV2
 RCC.HPREFreq_Value=64000000
-RCC.HRTIMFreq_Value=150000000
+RCC.HRTIMFreq_Value=200000000
 RCC.HSICalibrationValue=32
-RCC.I2C123Freq_Value=75000000
-RCC.I2C4Freq_Value=75000000
-RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVM3,DIVN1,DIVN3,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,EnbaleCSS,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPREFreq_Value,HRTIMFreq_Value,HSICalibrationValue,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLL2FRACN,PLL3FRACN,PLLFRACN,PLLSourceVirtual,PWR_Regulator_Voltage_Scale,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBCLockSelection,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
-RCC.LPTIM1Freq_Value=75000000
-RCC.LPTIM2Freq_Value=75000000
-RCC.LPTIM345Freq_Value=75000000
-RCC.LPUART1Freq_Value=75000000
+RCC.I2C123Freq_Value=100000000
+RCC.I2C4Freq_Value=100000000
+RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVM3,DIVN1,DIVN3,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3,DIVQ3Freq_Value,DIVR1,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,EnbaleCSS,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HPREFreq_Value,HRTIMFreq_Value,HSICalibrationValue,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLL2FRACN,PLL3FRACN,PLLFRACN,PLLSourceVirtual,PWR_Regulator_Voltage_Scale,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBCLockSelection,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
+RCC.LPTIM1Freq_Value=100000000
+RCC.LPTIM2Freq_Value=100000000
+RCC.LPTIM345Freq_Value=100000000
+RCC.LPUART1Freq_Value=100000000
 RCC.LTDCFreq_Value=168000000
 RCC.MCO1PinFreq_Value=64000000
-RCC.MCO2PinFreq_Value=150000000
+RCC.MCO2PinFreq_Value=400000000
 RCC.PLL2FRACN=0
 RCC.PLL3FRACN=0
 RCC.PLLFRACN=0
 RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
 RCC.PWR_Regulator_Voltage_Scale=PWR_REGULATOR_VOLTAGE_SCALE1
-RCC.QSPIFreq_Value=150000000
+RCC.QSPIFreq_Value=200000000
 RCC.RNGFreq_Value=48000000
 RCC.RTCFreq_Value=32000
-RCC.SAI1Freq_Value=75000000
-RCC.SAI23Freq_Value=75000000
-RCC.SAI4AFreq_Value=75000000
-RCC.SAI4BFreq_Value=75000000
-RCC.SDMMCFreq_Value=75000000
-RCC.SPDIFRXFreq_Value=75000000
-RCC.SPI123Freq_Value=75000000
-RCC.SPI45Freq_Value=75000000
-RCC.SPI6Freq_Value=75000000
-RCC.SWPMI1Freq_Value=75000000
-RCC.SYSCLKFreq_VALUE=150000000
+RCC.SAI1Freq_Value=200000000
+RCC.SAI23Freq_Value=200000000
+RCC.SAI4AFreq_Value=200000000
+RCC.SAI4BFreq_Value=200000000
+RCC.SDMMCFreq_Value=200000000
+RCC.SPDIFRXFreq_Value=200000000
+RCC.SPI123Freq_Value=200000000
+RCC.SPI45Freq_Value=100000000
+RCC.SPI6Freq_Value=100000000
+RCC.SWPMI1Freq_Value=100000000
+RCC.SYSCLKFreq_VALUE=400000000
 RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
-RCC.Tim1OutputFreq_Value=150000000
-RCC.Tim2OutputFreq_Value=150000000
-RCC.TraceFreq_Value=150000000
-RCC.USART16Freq_Value=75000000
-RCC.USART234578Freq_Value=75000000
+RCC.Tim1OutputFreq_Value=200000000
+RCC.Tim2OutputFreq_Value=200000000
+RCC.TraceFreq_Value=133333333.33333333
+RCC.USART16Freq_Value=100000000
+RCC.USART234578Freq_Value=100000000
 RCC.USBCLockSelection=RCC_USBCLKSOURCE_PLL3
 RCC.USBFreq_Value=48000000
-RCC.VCO1OutputFreq_Value=300000000
+RCC.VCO1OutputFreq_Value=800000000
 RCC.VCO2OutputFreq_Value=100781250
 RCC.VCO3OutputFreq_Value=336000000
-RCC.VCOInput1Freq_Value=12500000
+RCC.VCOInput1Freq_Value=5000000
 RCC.VCOInput2Freq_Value=781250
 RCC.VCOInput3Freq_Value=1000000
 SH.ADCx_INN1.0=ADC1_INN1

From 3fdd2a40b2103089e47609a05577fc84b786ec4f Mon Sep 17 00:00:00 2001
From: Aladdin Bakosh <aladdin.bakosh@emerson.com>
Date: Fri, 2 Jun 2023 15:04:53 +0200
Subject: [PATCH 505/691] osal_none: make it possible to override the task
 delay function

---
 src/host/usbh.c      | 2 +-
 src/osal/osal_none.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/host/usbh.c b/src/host/usbh.c
index 184bda23b..1418cfb79 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -256,7 +256,7 @@ static bool usbh_control_xfer_cb (uint8_t daddr, uint8_t ep_addr, xfer_result_t
 
 #if CFG_TUSB_OS == OPT_OS_NONE
 // TODO rework time-related function later
-void osal_task_delay(uint32_t msec)
+TU_ATTR_WEAK void osal_task_delay(uint32_t msec)
 {
   const uint32_t start = hcd_frame_number(_usbh_controller);
   while ( ( hcd_frame_number(_usbh_controller) - start ) < msec ) {}
diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h
index 5f407378e..76e77c25d 100644
--- a/src/osal/osal_none.h
+++ b/src/osal/osal_none.h
@@ -37,7 +37,7 @@
 
 #if CFG_TUH_ENABLED
 // currently only needed/available in host mode
-void osal_task_delay(uint32_t msec);
+TU_ATTR_WEAK void osal_task_delay(uint32_t msec);
 #endif
 
 //--------------------------------------------------------------------+

From efa8b4a9b81577047efb957eb191f707949ef188 Mon Sep 17 00:00:00 2001
From: kkitayam <45088311+kkitayam@users.noreply.github.com>
Date: Tue, 18 Jul 2023 22:55:55 +0900
Subject: [PATCH 506/691] Change a variable to a target so that it works on
 windows command prompt

echo command of windows command prompt can't handle line breaks in a variable.
---
 examples/rules.mk | 19 ++++++++-----------
 1 file changed, 8 insertions(+), 11 deletions(-)

diff --git a/examples/rules.mk b/examples/rules.mk
index e50c0ec7d..44698b019 100644
--- a/examples/rules.mk
+++ b/examples/rules.mk
@@ -99,19 +99,16 @@ endif
 JLINK_IF ?= swd
 
 # Jlink script
-define jlink_script
-halt
-loadfile $^
-r
-go
-exit
-endef
-export jlink_script
+$(BUILD)/$(BOARD).jlink: $(BUILD)/$(PROJECT).hex
+	@echo halt > $@
+	@echo loadfile $^ >> $@
+	@echo r >> $@
+	@echo go >> $@
+	@echo exit >> $@
 
 # Flash using jlink
-flash-jlink: $(BUILD)/$(PROJECT).hex
-	@echo "$$jlink_script" > $(BUILD)/$(BOARD).jlink
-	$(JLINKEXE) -device $(JLINK_DEVICE) -if $(JLINK_IF) -JTAGConf -1,-1 -speed auto -CommandFile $(BUILD)/$(BOARD).jlink
+flash-jlink: $(BUILD)/$(BOARD).jlink
+	$(JLINKEXE) -device $(JLINK_DEVICE) -if $(JLINK_IF) -JTAGConf -1,-1 -speed auto -CommandFile $<
 
 # Flash STM32 MCU using stlink with STM32 Cube Programmer CLI
 flash-stlink: $(BUILD)/$(PROJECT).elf

From 3678a25baaeb6cd6f269d405903aeca23e93dca6 Mon Sep 17 00:00:00 2001
From: graham sanderson <graham.sanderson@raspberrypi.com>
Date: Tue, 18 Jul 2023 09:02:59 -0500
Subject: [PATCH 507/691] Fix build issues when building for RP2040 from
 pico-examples/pico-sdk.

* include_guard requires GLOBAL as family.cmake is included in multiple non child places
* the following recently added check is suprfluous (family_configure_host_example for rp2040 should do this already),
  and breaks if pico_pio_usb is not avaialble, so i have removed
   # Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host
   if(FAMILY STREQUAL "rp2040")
      family_add_pico_pio_usb(${PROJECT})
   endif()
* added new familt_example_missing_dependency functino to print missing dependency warning, so
  pico-examples can override it to be less in your face, and also more contextual to pico-examples
---
 .../device/net_lwip_webserver/CMakeLists.txt  | 12 +++++------
 examples/host/bare_api/CMakeLists.txt         |  7 +------
 examples/host/cdc_msc_hid/CMakeLists.txt      |  5 -----
 examples/host/hid_controller/CMakeLists.txt   |  5 -----
 .../host/msc_file_explorer/CMakeLists.txt     |  5 -----
 hw/bsp/family_support.cmake                   | 20 ++++++++++++-------
 hw/bsp/rp2040/family.cmake                    |  2 +-
 7 files changed, 21 insertions(+), 35 deletions(-)

diff --git a/examples/device/net_lwip_webserver/CMakeLists.txt b/examples/device/net_lwip_webserver/CMakeLists.txt
index 1e34428fe..a16b8bd71 100644
--- a/examples/device/net_lwip_webserver/CMakeLists.txt
+++ b/examples/device/net_lwip_webserver/CMakeLists.txt
@@ -2,15 +2,15 @@ cmake_minimum_required(VERSION 3.17)
 
 include(${CMAKE_CURRENT_LIST_DIR}/../../../hw/bsp/family_support.cmake)
 
-set(LWIP ${TOP}/lib/lwip)
-if (NOT EXISTS ${LWIP}/src)
-  MESSAGE(WARNING "lib/lwip submodule not found, please run 'python tools/get_deps.py lib/lwip' to fetch it")
-  return()
-endif()
-
 # gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
 family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
+set(LWIP ${TOP}/lib/lwip)
+if (NOT EXISTS ${LWIP}/src)
+  family_example_missing_dependency(${PROJECT} "lib/lwip")
+  return()
+endif()
+
 project(${PROJECT} C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
diff --git a/examples/host/bare_api/CMakeLists.txt b/examples/host/bare_api/CMakeLists.txt
index 95af48718..7049fe66b 100644
--- a/examples/host/bare_api/CMakeLists.txt
+++ b/examples/host/bare_api/CMakeLists.txt
@@ -24,9 +24,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_host_example(${PROJECT} noos)
-
-# Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host
-if(FAMILY STREQUAL "rp2040")
-  family_add_pico_pio_usb(${PROJECT})
-endif()
+family_configure_host_example(${PROJECT} noos)
\ No newline at end of file
diff --git a/examples/host/cdc_msc_hid/CMakeLists.txt b/examples/host/cdc_msc_hid/CMakeLists.txt
index 3fdc832ab..ad5751705 100644
--- a/examples/host/cdc_msc_hid/CMakeLists.txt
+++ b/examples/host/cdc_msc_hid/CMakeLists.txt
@@ -28,8 +28,3 @@ target_include_directories(${PROJECT} PUBLIC
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
 family_configure_host_example(${PROJECT} noos)
-
-# Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host
-if(FAMILY STREQUAL "rp2040")
-  family_add_pico_pio_usb(${PROJECT})
-endif()
diff --git a/examples/host/hid_controller/CMakeLists.txt b/examples/host/hid_controller/CMakeLists.txt
index d1d901b53..3fb630aaa 100644
--- a/examples/host/hid_controller/CMakeLists.txt
+++ b/examples/host/hid_controller/CMakeLists.txt
@@ -26,8 +26,3 @@ target_include_directories(${PROJECT} PUBLIC
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
 family_configure_host_example(${PROJECT} noos)
-
-# Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host
-if(FAMILY STREQUAL "rp2040")
-  family_add_pico_pio_usb(${PROJECT})
-endif()
diff --git a/examples/host/msc_file_explorer/CMakeLists.txt b/examples/host/msc_file_explorer/CMakeLists.txt
index 99c797275..a35a7f0fb 100644
--- a/examples/host/msc_file_explorer/CMakeLists.txt
+++ b/examples/host/msc_file_explorer/CMakeLists.txt
@@ -38,8 +38,3 @@ target_include_directories(${PROJECT} PUBLIC
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
 family_configure_host_example(${PROJECT} noos)
-
-# Add pico-pio-usb for rp2040 since user can choose to run on bit-banging host
-if(FAMILY STREQUAL "rp2040")
-  family_add_pico_pio_usb(${PROJECT})
-endif()
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index b2e61a824..9959784ae 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -1,4 +1,4 @@
-include_guard()
+include_guard(GLOBAL)
 
 include(CMakePrintHelpers)
 
@@ -36,12 +36,14 @@ if (NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake)
   message(FATAL_ERROR "Family '${FAMILY}' is not known/supported")
 endif()
 
-# enable LTO if supported
-include(CheckIPOSupported)
-check_ipo_supported(RESULT IPO_SUPPORTED)
-if (IPO_SUPPORTED)
-  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
-endif ()
+if (NOT TINYUSB_OPT_SKIP_CHECK_IPO_SUPPORTED)
+  # enable LTO if supported
+  include(CheckIPOSupported)
+  check_ipo_supported(RESULT IPO_SUPPORTED)
+  if (IPO_SUPPORTED)
+    set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
+  endif()
+endif()
 
 set(WARNING_FLAGS_GNU
   -Wall
@@ -278,6 +280,10 @@ function(family_configure_dual_usb_example TARGET RTOS)
   family_configure_example(${TARGET} ${RTOS})
 endfunction()
 
+function(family_example_missing_dependency TARGET DEPENDENCY)
+  message(WARNING "${DEPENDENCY} submodule needed by ${TARGET} not found, please run 'python tools/get_deps.py ${DEPENDENCY}' to fetch it")
+endfunction()
+
 #----------------------------------
 # RPI specific: refactor later
 #----------------------------------
diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index b986b3ebb..8b8014e8a 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -1,5 +1,5 @@
 cmake_minimum_required(VERSION 3.13)
-include_guard()
+include_guard(GLOBAL)
 
 if (NOT BOARD)
 	message("BOARD not specified, defaulting to pico_sdk")

From 08a1892801088f2b3df74cc2bdaeeeadf9e8624b Mon Sep 17 00:00:00 2001
From: graham sanderson <graham.sanderson@raspberrypi.com>
Date: Tue, 18 Jul 2023 11:04:43 -0500
Subject: [PATCH 508/691] add is_compiler_supported_by_pico_pio_usb()

previosuly users of TinyUSB (e.g. pico-examples) would have to decide this for themselves. This function couples
the check closer with the actual version of Pico-PIO-USB used (since TinyUSB picks)
---
 hw/bsp/rp2040/family.cmake | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index b986b3ebb..17900dd7a 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -183,6 +183,15 @@ function(family_add_pico_pio_usb TARGET)
 	target_link_libraries(${TARGET} PUBLIC tinyusb_pico_pio_usb)
 endfunction()
 
+# since Pico-PIO_USB compiler support may lag, and change from version to version, add a function that pico-sdk/pico-examples
+# can check (if present) in case the user has updated their TinyUSB
+function(is_compiler_supported_by_pico_pio_usb OUTVAR)
+	if ((NOT CMAKE_C_COMPILER_ID STREQUAL "GNU"))
+		SET(${OUTVAR} 0 PARENT_SCOPE)
+	else()
+		set(${OUTVAR} 1 PARENT_SCOPE)
+	endif()
+endfunction()
 
 function(family_configure_host_example TARGET RTOS)
 	family_configure_target(${TARGET} ${RTOS})
@@ -191,8 +200,9 @@ function(family_configure_host_example TARGET RTOS)
 
 	# For rp2040 enable pico-pio-usb
 	if (TARGET tinyusb_pico_pio_usb)
-		# code does not compile with non GCC, or GCC 11.3+
-		if (CMAKE_C_COMPILER_ID STREQUAL "GNU" AND NOT CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 11.3)
+		# Pico-PIO-USB does not compile with all pico-sdk supported compilers, so check before enabling it
+		is_compiler_supported_by_pico_pio_usb(PICO_PIO_USB_COMPILER_SUPPORTED)
+		if (PICO_PIO_USB_COMPILER_SUPPORTED)
 			family_add_pico_pio_usb(${PROJECT})
 		endif()
 	endif()

From b1e345b6bc5c528751cf0126e0a50daa5733960b Mon Sep 17 00:00:00 2001
From: jferreir <jesus.ferreira@gmail.com>
Date: Thu, 20 Jul 2023 10:52:16 +0200
Subject: [PATCH 509/691] Add UART_DEV support

---
 hw/bsp/xmc4000/family.c | 24 ++++++++++++++++++++----
 1 file changed, 20 insertions(+), 4 deletions(-)

diff --git a/hw/bsp/xmc4000/family.c b/hw/bsp/xmc4000/family.c
index bf6684736..35bed0ba4 100644
--- a/hw/bsp/xmc4000/family.c
+++ b/hw/bsp/xmc4000/family.c
@@ -26,6 +26,7 @@
 
 #include "xmc_gpio.h"
 #include "xmc_scu.h"
+#include "xmc_uart.h"
 
 #include "bsp/board.h"
 #include "board.h"
@@ -45,17 +46,31 @@ void board_init(void)
   SystemCoreClockUpdate();
 
   // LED
-  XMC_GPIO_CONFIG_t led_cfg;
+  XMC_GPIO_CONFIG_t led_cfg = {0};
   led_cfg.mode = XMC_GPIO_MODE_OUTPUT_PUSH_PULL;
   led_cfg.output_level = XMC_GPIO_OUTPUT_LEVEL_HIGH;
   led_cfg.output_strength = XMC_GPIO_OUTPUT_STRENGTH_MEDIUM;
   XMC_GPIO_Init(LED_PIN, &led_cfg);
 
   // Button
-  XMC_GPIO_CONFIG_t button_cfg;
+  XMC_GPIO_CONFIG_t button_cfg = {0};
   button_cfg.mode = XMC_GPIO_MODE_INPUT_TRISTATE;
   XMC_GPIO_Init(BUTTON_PIN, &button_cfg);
 
+#ifdef UART_DEV
+  XMC_UART_CH_CONFIG_t uart_cfg = {0};
+  uart_cfg.baudrate = CFG_BOARD_UART_BAUDRATE;
+  uart_cfg.data_bits = 8;
+  uart_cfg.stop_bits = 1;
+  XMC_UART_CH_Init(UART_DEV, &uart_cfg);
+
+  XMC_GPIO_SetMode(UART_RX_PIN, XMC_GPIO_MODE_INPUT_PULL_UP);
+  XMC_UART_CH_SetInputSource(UART_DEV, XMC_UART_CH_INPUT_RXD, UART_RX_INPUT);
+
+  XMC_UART_CH_Start(UART_DEV);
+  XMC_GPIO_SetMode(UART_TX_PIN, (XMC_GPIO_MODE_t)(XMC_GPIO_MODE_OUTPUT_PUSH_PULL | UART_TX_PIN_AF));
+#endif
+
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
@@ -69,6 +84,7 @@ void board_init(void)
 #endif
 
   // USB Power Enable
+  XMC_SCU_CLOCK_UngatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_USB0);
   XMC_SCU_RESET_DeassertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_USB0);
   XMC_SCU_POWER_EnableUsb();
 }
@@ -93,7 +109,7 @@ int board_uart_read(uint8_t* buf, int len)
 {
 #ifdef UART_DEV
   for(int i=0;i<len;i++) {
-    buf[i] = uart_getc(uart_inst);
+    buf[i] = XMC_UART_CH_GetReceivedData(UART_DEV);
   }
   return len;
 #else
@@ -107,7 +123,7 @@ int board_uart_write(void const * buf, int len)
 #ifdef UART_DEV
   char const* bufch = (char const*) buf;
   for(int i=0;i<len;i++) {
-    uart_putc(uart_inst, bufch[i]);
+    XMC_UART_CH_Transmit(UART_DEV, bufch[i]);
   }
   return len;
 #else

From 59778664c900254a576edb105ecca9104adcb5b7 Mon Sep 17 00:00:00 2001
From: jferreir <jesus.ferreira@gmail.com>
Date: Thu, 20 Jul 2023 10:53:29 +0200
Subject: [PATCH 510/691] Add UART_DEV support

---
 hw/bsp/xmc4000/family.mk | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/hw/bsp/xmc4000/family.mk b/hw/bsp/xmc4000/family.mk
index 35c3a58b7..6c460c93b 100644
--- a/hw/bsp/xmc4000/family.mk
+++ b/hw/bsp/xmc4000/family.mk
@@ -20,8 +20,11 @@ SRC_C += \
 	src/portable/synopsys/dwc2/dcd_dwc2.c \
 	$(MCU_DIR)/Newlib/syscalls.c \
 	$(MCU_DIR)/CMSIS/Infineon/COMPONENT_$(MCU_VARIANT)/Source/system_$(MCU_VARIANT).c \
+	$(MCU_DIR)/XMCLib/src/xmc_gpio.c \
 	$(MCU_DIR)/XMCLib/src/xmc4_gpio.c \
-	$(MCU_DIR)/XMCLib/src/xmc4_scu.c
+	$(MCU_DIR)/XMCLib/src/xmc4_scu.c \
+	$(MCU_DIR)/XMCLib/src/xmc_usic.c \
+	$(MCU_DIR)/XMCLib/src/xmc_uart.c
 
 SRC_S += $(MCU_DIR)/CMSIS/Infineon/COMPONENT_$(MCU_VARIANT)/Source/TOOLCHAIN_GCC_ARM/startup_$(MCU_VARIANT).S
 

From 2772581c284fae8073b6717f51d819a7e4bc653d Mon Sep 17 00:00:00 2001
From: jferreir <jesus.ferreira@gmail.com>
Date: Thu, 20 Jul 2023 10:53:59 +0200
Subject: [PATCH 511/691] Add support for XMC4700_RELAX kit

---
 hw/bsp/xmc4000/boards/xmc4700_relax/board.h  | 81 ++++++++++++++++++++
 hw/bsp/xmc4000/boards/xmc4700_relax/board.mk | 12 +++
 2 files changed, 93 insertions(+)
 create mode 100644 hw/bsp/xmc4000/boards/xmc4700_relax/board.h
 create mode 100644 hw/bsp/xmc4000/boards/xmc4700_relax/board.mk

diff --git a/hw/bsp/xmc4000/boards/xmc4700_relax/board.h b/hw/bsp/xmc4000/boards/xmc4700_relax/board.h
new file mode 100644
index 000000000..aa12fde3b
--- /dev/null
+++ b/hw/bsp/xmc4000/boards/xmc4700_relax/board.h
@@ -0,0 +1,81 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define LED_PIN               P5_9
+#define LED_STATE_ON          1
+
+#define BUTTON_PIN            P15_13
+#define BUTTON_STATE_ACTIVE   0
+
+#define UART_DEV              XMC_UART0_CH0
+#define UART_TX_PIN           P1_5
+#define UART_TX_PIN_AF        P1_5_AF_U0C0_DOUT0
+#define UART_RX_PIN           P1_4
+#define UART_RX_INPUT         USIC0_C0_DX0_P1_4
+
+static inline void board_clock_init(void)
+{
+  /* Clock configuration */
+  /* fPLL = 144MHz */
+  /* fSYS = 144MHz */
+  /* fUSB = 48MHz */
+  const XMC_SCU_CLOCK_CONFIG_t clock_config =
+  {
+    .syspll_config.p_div  = 2,
+    .syspll_config.n_div  = 48,
+    .syspll_config.k_div  = 1,
+    .syspll_config.mode   = XMC_SCU_CLOCK_SYSPLL_MODE_NORMAL,
+    .syspll_config.clksrc = XMC_SCU_CLOCK_SYSPLLCLKSRC_OSCHP,
+    .enable_oschp         = true,
+    .calibration_mode     = XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_FACTORY,
+    .fsys_clksrc          = XMC_SCU_CLOCK_SYSCLKSRC_PLL,
+    .fsys_clkdiv          = 2,
+    .fcpu_clkdiv          = 1,
+    .fccu_clkdiv          = 1,
+    .fperipheral_clkdiv   = 1
+  };
+
+  /* Setup settings for USB clock */
+  XMC_SCU_CLOCK_Init(&clock_config);
+
+  XMC_SCU_CLOCK_SetUsbClockDivider(6);
+  XMC_SCU_CLOCK_SetUsbClockSource(XMC_SCU_CLOCK_USBCLKSRC_SYSPLL);
+  XMC_SCU_CLOCK_EnableClock(XMC_SCU_CLOCK_USB);
+}
+
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/xmc4000/boards/xmc4700_relax/board.mk b/hw/bsp/xmc4000/boards/xmc4700_relax/board.mk
new file mode 100644
index 000000000..28fadf8f4
--- /dev/null
+++ b/hw/bsp/xmc4000/boards/xmc4700_relax/board.mk
@@ -0,0 +1,12 @@
+MCU_VARIANT = XMC4700
+CFLAGS += \
+  -DXMC4700_F144x2048 \
+
+# mcu driver cause following warnings
+CFLAGS += -Wno-stringop-overread
+
+LD_FILE = $(MCU_DIR)/CMSIS/Infineon/COMPONENT_$(MCU_VARIANT)/Source/TOOLCHAIN_GCC_ARM/XMC4700x2048.ld
+
+JLINK_DEVICE = XMC4700-2048
+
+flash: flash-jlink

From 77495cf119c89c3091e7ab05773ebce19988da86 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 20 Jul 2023 17:06:57 +0700
Subject: [PATCH 512/691] improve logging, allow easier to turn off usbd,
 driver logging

can be useful when focusing on let's say usbh
---
 src/class/msc/msc_device.c | 43 ++++++++++--------
 src/device/usbd.c          | 93 ++++++++++++++++++--------------------
 src/device/usbd_control.c  |  9 ++--
 src/device/usbd_pvt.h      |  9 +++-
 src/host/usbh.c            | 34 +++++++-------
 5 files changed, 97 insertions(+), 91 deletions(-)

diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c
index 159a11259..a409c4e27 100644
--- a/src/class/msc/msc_device.c
+++ b/src/class/msc/msc_device.c
@@ -34,13 +34,16 @@
 
 #include "msc_device.h"
 
+// Level where CFG_TUSB_DEBUG must be at least for this driver is logged
+#ifndef CFG_TUD_MSC_LOG_LEVEL
+  #define CFG_TUD_MSC_LOG_LEVEL   2
+#endif
+
+#define TU_LOG_DRV(...)   TU_LOG(CFG_TUD_MSC_LOG_LEVEL, __VA_ARGS__)
+
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
-
-// Can be selectively disabled to reduce logging when troubleshooting other driver
-#define MSC_DEBUG   2
-
 enum
 {
   MSC_STAGE_CMD  = 0,
@@ -164,7 +167,7 @@ uint8_t rdwr10_validate_cmd(msc_cbw_t const* cbw)
   {
     if ( block_count )
     {
-      TU_LOG(MSC_DEBUG, "  SCSI case 2 (Hn < Di) or case 3 (Hn < Do) \r\n");
+      TU_LOG_DRV("  SCSI case 2 (Hn < Di) or case 3 (Hn < Do) \r\n");
       status = MSC_CSW_STATUS_PHASE_ERROR;
     }else
     {
@@ -174,22 +177,22 @@ uint8_t rdwr10_validate_cmd(msc_cbw_t const* cbw)
   {
     if ( SCSI_CMD_READ_10 == cbw->command[0] && !is_data_in(cbw->dir) )
     {
-      TU_LOG(MSC_DEBUG, "  SCSI case 10 (Ho <> Di)\r\n");
+      TU_LOG_DRV("  SCSI case 10 (Ho <> Di)\r\n");
       status = MSC_CSW_STATUS_PHASE_ERROR;
     }
     else if ( SCSI_CMD_WRITE_10 == cbw->command[0] && is_data_in(cbw->dir) )
     {
-      TU_LOG(MSC_DEBUG, "  SCSI case 8 (Hi <> Do)\r\n");
+      TU_LOG_DRV("  SCSI case 8 (Hi <> Do)\r\n");
       status = MSC_CSW_STATUS_PHASE_ERROR;
     }
     else if ( 0 == block_count )
     {
-      TU_LOG(MSC_DEBUG, "  SCSI case 4 Hi > Dn (READ10) or case 9 Ho > Dn (WRITE10) \r\n");
+      TU_LOG_DRV("  SCSI case 4 Hi > Dn (READ10) or case 9 Ho > Dn (WRITE10) \r\n");
       status =  MSC_CSW_STATUS_FAILED;
     }
     else if ( cbw->total_bytes / block_count == 0 )
     {
-      TU_LOG(MSC_DEBUG, " Computed block size = 0. SCSI case 7 Hi < Di (READ10) or case 13 Ho < Do (WRIT10)\r\n");
+      TU_LOG_DRV(" Computed block size = 0. SCSI case 7 Hi < Di (READ10) or case 13 Ho < Do (WRIT10)\r\n");
       status = MSC_CSW_STATUS_PHASE_ERROR;
     }
   }
@@ -352,7 +355,7 @@ bool mscd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
   switch ( request->bRequest )
   {
     case MSC_REQ_RESET:
-      TU_LOG(MSC_DEBUG, "  MSC BOT Reset\r\n");
+      TU_LOG_DRV("  MSC BOT Reset\r\n");
       TU_VERIFY(request->wValue == 0 && request->wLength == 0);
 
       // driver state reset
@@ -363,7 +366,7 @@ bool mscd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
 
     case MSC_REQ_GET_MAX_LUN:
     {
-      TU_LOG(MSC_DEBUG, "  MSC Get Max Lun\r\n");
+      TU_LOG_DRV("  MSC Get Max Lun\r\n");
       TU_VERIFY(request->wValue == 0 && request->wLength == 1);
 
       uint8_t maxlun = 1;
@@ -400,7 +403,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
 
       if ( !(xferred_bytes == sizeof(msc_cbw_t) && p_cbw->signature == MSC_CBW_SIGNATURE) )
       {
-        TU_LOG(MSC_DEBUG, "  SCSI CBW is not valid\r\n");
+        TU_LOG_DRV("  SCSI CBW is not valid\r\n");
 
         // BOT 6.6.1 If CBW is not valid stall both endpoints until reset recovery
         p_msc->stage = MSC_STAGE_NEED_RESET;
@@ -412,7 +415,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
         return false;
       }
 
-      TU_LOG(MSC_DEBUG, "  SCSI Command [Lun%u]: %s\r\n", p_cbw->lun, tu_lookup_find(&_msc_scsi_cmd_table, p_cbw->command[0]));
+      TU_LOG_DRV("  SCSI Command [Lun%u]: %s\r\n", p_cbw->lun, tu_lookup_find(&_msc_scsi_cmd_table, p_cbw->command[0]));
       //TU_LOG_MEM(MSC_DEBUG, p_cbw, xferred_bytes, 2);
 
       p_csw->signature    = MSC_CSW_SIGNATURE;
@@ -457,7 +460,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
         {
           if (p_cbw->total_bytes > sizeof(_mscd_buf))
           {
-            TU_LOG(MSC_DEBUG, "  SCSI reject non READ10/WRITE10 with large data\r\n");
+            TU_LOG_DRV("  SCSI reject non READ10/WRITE10 with large data\r\n");
             fail_scsi_op(rhport, p_msc, MSC_CSW_STATUS_FAILED);
           }else
           {
@@ -479,7 +482,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
           if ( resplen < 0 )
           {
             // unsupported command
-            TU_LOG(MSC_DEBUG, "  SCSI unsupported or failed command\r\n");
+            TU_LOG_DRV("  SCSI unsupported or failed command\r\n");
             fail_scsi_op(rhport, p_msc, MSC_CSW_STATUS_FAILED);
           }
           else if (resplen == 0)
@@ -514,7 +517,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
     break;
 
     case MSC_STAGE_DATA:
-      TU_LOG(MSC_DEBUG, "  SCSI Data [Lun%u]\r\n", p_cbw->lun);
+      TU_LOG_DRV("  SCSI Data [Lun%u]\r\n", p_cbw->lun);
       //TU_LOG_MEM(MSC_DEBUG, _mscd_buf, xferred_bytes, 2);
 
       if (SCSI_CMD_READ_10 == p_cbw->command[0])
@@ -546,7 +549,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
           if ( cb_result < 0 )
           {
             // unsupported command
-            TU_LOG(MSC_DEBUG, "  SCSI unsupported command\r\n");
+            TU_LOG_DRV("  SCSI unsupported command\r\n");
             fail_scsi_op(rhport, p_msc, MSC_CSW_STATUS_FAILED);
           }else
           {
@@ -575,7 +578,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
       // Wait for the Status phase to complete
       if( (ep_addr == p_msc->ep_in) && (xferred_bytes == sizeof(msc_csw_t)) )
       {
-        TU_LOG(MSC_DEBUG, "  SCSI Status [Lun%u] = %u\r\n", p_cbw->lun, p_csw->status);
+        TU_LOG_DRV("  SCSI Status [Lun%u] = %u\r\n", p_cbw->lun, p_csw->status);
         // TU_LOG_MEM(MSC_DEBUG, p_csw, xferred_bytes, 2);
 
         // Invoke complete callback if defined
@@ -845,7 +848,7 @@ static void proc_read10_cmd(uint8_t rhport, mscd_interface_t* p_msc)
   if ( nbytes < 0 )
   {
     // negative means error -> endpoint is stalled & status in CSW set to failed
-    TU_LOG(MSC_DEBUG, "  tud_msc_read10_cb() return -1\r\n");
+    TU_LOG_DRV("  tud_msc_read10_cb() return -1\r\n");
 
     // set sense
     set_sense_medium_not_present(p_cbw->lun);
@@ -907,7 +910,7 @@ static void proc_write10_new_data(uint8_t rhport, mscd_interface_t* p_msc, uint3
   if ( nbytes < 0 )
   {
     // negative means error -> failed this scsi op
-    TU_LOG(MSC_DEBUG, "  tud_msc_write10_cb() return -1\r\n");
+    TU_LOG_DRV("  tud_msc_write10_cb() return -1\r\n");
 
     // update actual byte before failed
     p_msc->xferred_len += xferred_bytes;
diff --git a/src/device/usbd.c b/src/device/usbd.c
index 44c2530ce..9429cf664 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -43,9 +43,6 @@
   #define CFG_TUD_TASK_QUEUE_SZ   16
 #endif
 
-// Debug level of USBD
-#define USBD_DBG   2
-
 //--------------------------------------------------------------------+
 // Device Data
 //--------------------------------------------------------------------+
@@ -81,7 +78,7 @@ tu_static usbd_device_t _usbd_dev;
 //--------------------------------------------------------------------+
 // Class Driver
 //--------------------------------------------------------------------+
-#if CFG_TUSB_DEBUG >= 2
+#if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
   #define DRIVER_NAME(_name)    .name = _name,
 #else
   #define DRIVER_NAME(_name)
@@ -308,7 +305,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t event,
 //--------------------------------------------------------------------+
 // Debug
 //--------------------------------------------------------------------+
-#if CFG_TUSB_DEBUG >= 2
+#if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
 tu_static char const* const _usbd_event_str[DCD_EVENT_COUNT] =
 {
   "Invalid"        ,
@@ -330,7 +327,7 @@ void usbd_driver_print_control_complete_name(usbd_control_xfer_cb_t callback)
     usbd_class_driver_t const * driver = get_driver(i);
     if ( driver && driver->control_xfer_cb == callback )
     {
-      TU_LOG(USBD_DBG, "  %s control complete\r\n", driver->name);
+      TU_LOG_USBD("  %s control complete\r\n", driver->name);
       return;
     }
   }
@@ -396,10 +393,10 @@ bool tud_init (uint8_t rhport)
   // skip if already initialized
   if ( tud_inited() ) return true;
 
-  TU_LOG(USBD_DBG, "USBD init on controller %u\r\n", rhport);
-  TU_LOG_INT(USBD_DBG, sizeof(usbd_device_t));
-  TU_LOG_INT(USBD_DBG, sizeof(tu_fifo_t));
-  TU_LOG_INT(USBD_DBG, sizeof(tu_edpt_stream_t));
+  TU_LOG_USBD("USBD init on controller %u\r\n", rhport);
+  TU_LOG_INT(CFG_TUD_LOG_LEVEL, sizeof(usbd_device_t));
+  TU_LOG_INT(CFG_TUD_LOG_LEVEL, sizeof(tu_fifo_t));
+  TU_LOG_INT(CFG_TUD_LOG_LEVEL, sizeof(tu_edpt_stream_t));
 
   tu_varclr(&_usbd_dev);
 
@@ -424,7 +421,7 @@ bool tud_init (uint8_t rhport)
   {
     usbd_class_driver_t const * driver = get_driver(i);
     TU_ASSERT(driver);
-    TU_LOG(USBD_DBG, "%s init\r\n", driver->name);
+    TU_LOG_USBD("%s init\r\n", driver->name);
     driver->init();
   }
 
@@ -496,21 +493,21 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr)
     dcd_event_t event;
     if ( !osal_queue_receive(_usbd_q, &event, timeout_ms) ) return;
 
-#if CFG_TUSB_DEBUG >= 2
-    if (event.event_id == DCD_EVENT_SETUP_RECEIVED) TU_LOG(USBD_DBG, "\r\n"); // extra line for setup
-    TU_LOG(USBD_DBG, "USBD %s ", event.event_id < DCD_EVENT_COUNT ? _usbd_event_str[event.event_id] : "CORRUPTED");
+#if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
+    if (event.event_id == DCD_EVENT_SETUP_RECEIVED) TU_LOG_USBD("\r\n"); // extra line for setup
+    TU_LOG_USBD("USBD %s ", event.event_id < DCD_EVENT_COUNT ? _usbd_event_str[event.event_id] : "CORRUPTED");
 #endif
 
     switch ( event.event_id )
     {
       case DCD_EVENT_BUS_RESET:
-        TU_LOG(USBD_DBG, ": %s Speed\r\n", tu_str_speed[event.bus_reset.speed]);
+        TU_LOG_USBD(": %s Speed\r\n", tu_str_speed[event.bus_reset.speed]);
         usbd_reset(event.rhport);
         _usbd_dev.speed = event.bus_reset.speed;
       break;
 
       case DCD_EVENT_UNPLUGGED:
-        TU_LOG(USBD_DBG, "\r\n");
+        TU_LOG_USBD("\r\n");
         usbd_reset(event.rhport);
 
         // invoke callback
@@ -518,8 +515,8 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr)
       break;
 
       case DCD_EVENT_SETUP_RECEIVED:
-        TU_LOG_PTR(USBD_DBG, &event.setup_received);
-        TU_LOG(USBD_DBG, "\r\n");
+        TU_LOG_PTR(CFG_TUD_LOG_LEVEL, &event.setup_received);
+        TU_LOG_USBD("\r\n");
 
         // Mark as connected after receiving 1st setup packet.
         // But it is easier to set it every time instead of wasting time to check then set
@@ -534,7 +531,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr)
         // Process control request
         if ( !process_control_request(event.rhport, &event.setup_received) )
         {
-          TU_LOG(USBD_DBG, "  Stall EP0\r\n");
+          TU_LOG_USBD("  Stall EP0\r\n");
           // Failed -> stall both control endpoint IN and OUT
           dcd_edpt_stall(event.rhport, 0);
           dcd_edpt_stall(event.rhport, 0 | TUSB_DIR_IN_MASK);
@@ -548,7 +545,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr)
         uint8_t const epnum   = tu_edpt_number(ep_addr);
         uint8_t const ep_dir  = tu_edpt_dir(ep_addr);
 
-        TU_LOG(USBD_DBG, "on EP %02X with %u bytes\r\n", ep_addr, (unsigned int) event.xfer_complete.len);
+        TU_LOG_USBD("on EP %02X with %u bytes\r\n", ep_addr, (unsigned int) event.xfer_complete.len);
 
         _usbd_dev.ep_status[epnum][ep_dir].busy = 0;
         _usbd_dev.ep_status[epnum][ep_dir].claimed = 0;
@@ -563,7 +560,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr)
           usbd_class_driver_t const * driver = get_driver( _usbd_dev.ep2drv[epnum][ep_dir] );
           TU_ASSERT(driver, );
 
-          TU_LOG(USBD_DBG, "  %s xfer callback\r\n", driver->name);
+          TU_LOG_USBD("  %s xfer callback\r\n", driver->name);
           driver->xfer_cb(event.rhport, ep_addr, (xfer_result_t) event.xfer_complete.result, event.xfer_complete.len);
         }
       }
@@ -575,27 +572,27 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr)
         // e.g suspend -> resume -> unplug/plug. Skip suspend/resume if not connected
         if ( _usbd_dev.connected )
         {
-          TU_LOG(USBD_DBG, ": Remote Wakeup = %u\r\n", _usbd_dev.remote_wakeup_en);
+          TU_LOG_USBD(": Remote Wakeup = %u\r\n", _usbd_dev.remote_wakeup_en);
           if (tud_suspend_cb) tud_suspend_cb(_usbd_dev.remote_wakeup_en);
         }else
         {
-          TU_LOG(USBD_DBG, " Skipped\r\n");
+          TU_LOG_USBD(" Skipped\r\n");
         }
       break;
 
       case DCD_EVENT_RESUME:
         if ( _usbd_dev.connected )
         {
-          TU_LOG(USBD_DBG, "\r\n");
+          TU_LOG_USBD("\r\n");
           if (tud_resume_cb) tud_resume_cb();
         }else
         {
-          TU_LOG(USBD_DBG, " Skipped\r\n");
+          TU_LOG_USBD(" Skipped\r\n");
         }
       break;
 
       case USBD_EVENT_FUNC_CALL:
-        TU_LOG(USBD_DBG, "\r\n");
+        TU_LOG_USBD("\r\n");
         if ( event.func_call.func ) event.func_call.func(event.func_call.param);
       break;
 
@@ -620,7 +617,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr)
 static bool invoke_class_control(uint8_t rhport, usbd_class_driver_t const * driver, tusb_control_request_t const * request)
 {
   usbd_control_set_complete_callback(driver->control_xfer_cb);
-  TU_LOG(USBD_DBG, "  %s control request\r\n", driver->name);
+  TU_LOG_USBD("  %s control request\r\n", driver->name);
   return driver->control_xfer_cb(rhport, CONTROL_STAGE_SETUP, request);
 }
 
@@ -641,11 +638,11 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
     return tud_vendor_control_xfer_cb(rhport, CONTROL_STAGE_SETUP, p_request);
   }
 
-#if CFG_TUSB_DEBUG >= 2
+#if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
   if (TUSB_REQ_TYPE_STANDARD == p_request->bmRequestType_bit.type && p_request->bRequest <= TUSB_REQ_SYNCH_FRAME)
   {
-    TU_LOG(USBD_DBG, "  %s", tu_str_std_request[p_request->bRequest]);
-    if (TUSB_REQ_GET_DESCRIPTOR != p_request->bRequest) TU_LOG(USBD_DBG, "\r\n");
+    TU_LOG_USBD("  %s", tu_str_std_request[p_request->bRequest]);
+    if (TUSB_REQ_GET_DESCRIPTOR != p_request->bRequest) TU_LOG_USBD("\r\n");
   }
 #endif
 
@@ -701,7 +698,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
             if ( _usbd_dev.cfg_num )
             {
               // already configured: need to clear all endpoints and driver first
-              TU_LOG(USBD_DBG, "  Clear current Configuration (%u) before switching\r\n", _usbd_dev.cfg_num);
+              TU_LOG_USBD("  Clear current Configuration (%u) before switching\r\n", _usbd_dev.cfg_num);
 
               // close all non-control endpoints, cancel all pending transfers if any
               dcd_edpt_close_all(rhport);
@@ -730,7 +727,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
           // Only support remote wakeup for device feature
           TU_VERIFY(TUSB_REQ_FEATURE_REMOTE_WAKEUP == p_request->wValue);
 
-          TU_LOG(USBD_DBG, "    Enable Remote Wakeup\r\n");
+          TU_LOG_USBD("    Enable Remote Wakeup\r\n");
 
           // Host may enable remote wake up before suspending especially HID device
           _usbd_dev.remote_wakeup_en = true;
@@ -741,7 +738,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
           // Only support remote wakeup for device feature
           TU_VERIFY(TUSB_REQ_FEATURE_REMOTE_WAKEUP == p_request->wValue);
 
-          TU_LOG(USBD_DBG, "    Disable Remote Wakeup\r\n");
+          TU_LOG_USBD("    Disable Remote Wakeup\r\n");
 
           // Host may disable remote wake up after resuming
           _usbd_dev.remote_wakeup_en = false;
@@ -924,7 +921,7 @@ static bool process_set_config(uint8_t rhport, uint8_t cfg_num)
       if ( (sizeof(tusb_desc_interface_t) <= drv_len)  && (drv_len <= remaining_len) )
       {
         // Open successfully
-        TU_LOG(USBD_DBG, "  %s opened\r\n", driver->name);
+        TU_LOG_USBD("  %s opened\r\n", driver->name);
 
         // Some drivers use 2 or more interfaces but may not have IAD e.g MIDI (always) or
         // BTH (even CDC) with class in device descriptor (single interface)
@@ -983,7 +980,7 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
   {
     case TUSB_DESC_DEVICE:
     {
-      TU_LOG(USBD_DBG, " Device\r\n");
+      TU_LOG_USBD(" Device\r\n");
 
       void* desc_device = (void*) (uintptr_t) tud_descriptor_device_cb();
 
@@ -1007,7 +1004,7 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
 
     case TUSB_DESC_BOS:
     {
-      TU_LOG(USBD_DBG, " BOS\r\n");
+      TU_LOG_USBD(" BOS\r\n");
 
       // requested by host if USB > 2.0 ( i.e 2.1 or 3.x )
       if (!tud_descriptor_bos_cb) return false;
@@ -1029,12 +1026,12 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
 
       if ( desc_type == TUSB_DESC_CONFIGURATION )
       {
-        TU_LOG(USBD_DBG, " Configuration[%u]\r\n", desc_index);
+        TU_LOG_USBD(" Configuration[%u]\r\n", desc_index);
         desc_config = (uintptr_t) tud_descriptor_configuration_cb(desc_index);
       }else
       {
         // Host only request this after getting Device Qualifier descriptor
-        TU_LOG(USBD_DBG, " Other Speed Configuration\r\n");
+        TU_LOG_USBD(" Other Speed Configuration\r\n");
         TU_VERIFY( tud_descriptor_other_speed_configuration_cb );
         desc_config = (uintptr_t) tud_descriptor_other_speed_configuration_cb(desc_index);
       }
@@ -1050,7 +1047,7 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
 
     case TUSB_DESC_STRING:
     {
-      TU_LOG(USBD_DBG, " String[%u]\r\n", desc_index);
+      TU_LOG_USBD(" String[%u]\r\n", desc_index);
 
       // String Descriptor always uses the desc set from user
       uint8_t const* desc_str = (uint8_t const*) tud_descriptor_string_cb(desc_index, tu_le16toh(p_request->wIndex));
@@ -1063,7 +1060,7 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
 
     case TUSB_DESC_DEVICE_QUALIFIER:
     {
-      TU_LOG(USBD_DBG, " Device Qualifier\r\n");
+      TU_LOG_USBD(" Device Qualifier\r\n");
 
       TU_VERIFY( tud_descriptor_device_qualifier_cb );
 
@@ -1248,7 +1245,7 @@ bool usbd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
   // TODO skip ready() check for now since enumeration also use this API
   // TU_VERIFY(tud_ready());
 
-  TU_LOG(USBD_DBG, "  Queue EP %02X with %u bytes ...\r\n", ep_addr, total_bytes);
+  TU_LOG_USBD("  Queue EP %02X with %u bytes ...\r\n", ep_addr, total_bytes);
 
   // Attempt to transfer on a busy endpoint, sound like an race condition !
   TU_ASSERT(_usbd_dev.ep_status[epnum][dir].busy == 0);
@@ -1265,7 +1262,7 @@ bool usbd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
     // DCD error, mark endpoint as ready to allow next transfer
     _usbd_dev.ep_status[epnum][dir].busy = 0;
     _usbd_dev.ep_status[epnum][dir].claimed = 0;
-    TU_LOG(USBD_DBG, "FAILED\r\n");
+    TU_LOG_USBD("FAILED\r\n");
     TU_BREAKPOINT();
     return false;
   }
@@ -1282,7 +1279,7 @@ bool usbd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16
   uint8_t const epnum = tu_edpt_number(ep_addr);
   uint8_t const dir   = tu_edpt_dir(ep_addr);
 
-  TU_LOG(USBD_DBG, "  Queue ISO EP %02X with %u bytes ... ", ep_addr, total_bytes);
+  TU_LOG_USBD("  Queue ISO EP %02X with %u bytes ... ", ep_addr, total_bytes);
 
   // Attempt to transfer on a busy endpoint, sound like an race condition !
   TU_ASSERT(_usbd_dev.ep_status[epnum][dir].busy == 0);
@@ -1293,14 +1290,14 @@ bool usbd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16
 
   if (dcd_edpt_xfer_fifo(rhport, ep_addr, ff, total_bytes))
   {
-    TU_LOG(USBD_DBG, "OK\r\n");
+    TU_LOG_USBD("OK\r\n");
     return true;
   }else
   {
     // DCD error, mark endpoint as ready to allow next transfer
     _usbd_dev.ep_status[epnum][dir].busy = 0;
     _usbd_dev.ep_status[epnum][dir].claimed = 0;
-    TU_LOG(USBD_DBG, "failed\r\n");
+    TU_LOG_USBD("failed\r\n");
     TU_BREAKPOINT();
     return false;
   }
@@ -1326,7 +1323,7 @@ void usbd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
   // only stalled if currently cleared
   if ( !_usbd_dev.ep_status[epnum][dir].stalled )
   {
-    TU_LOG(USBD_DBG, "    Stall EP %02X\r\n", ep_addr);
+    TU_LOG_USBD("    Stall EP %02X\r\n", ep_addr);
     dcd_edpt_stall(rhport, ep_addr);
     _usbd_dev.ep_status[epnum][dir].stalled = 1;
     _usbd_dev.ep_status[epnum][dir].busy = 1;
@@ -1343,7 +1340,7 @@ void usbd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
   // only clear if currently stalled
   if ( _usbd_dev.ep_status[epnum][dir].stalled )
   {
-    TU_LOG(USBD_DBG, "    Clear Stall EP %02X\r\n", ep_addr);
+    TU_LOG_USBD("    Clear Stall EP %02X\r\n", ep_addr);
     dcd_edpt_clear_stall(rhport, ep_addr);
     _usbd_dev.ep_status[epnum][dir].stalled = 0;
     _usbd_dev.ep_status[epnum][dir].busy = 0;
@@ -1371,7 +1368,7 @@ void usbd_edpt_close(uint8_t rhport, uint8_t ep_addr)
   rhport = _usbd_rhport;
 
   TU_ASSERT(dcd_edpt_close, /**/);
-  TU_LOG(USBD_DBG, "  CLOSING Endpoint: 0x%02X\r\n", ep_addr);
+  TU_LOG_USBD("  CLOSING Endpoint: 0x%02X\r\n", ep_addr);
 
   uint8_t const epnum = tu_edpt_number(ep_addr);
   uint8_t const dir   = tu_edpt_dir(ep_addr);
diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c
index 2afe967b5..c580e6ecf 100644
--- a/src/device/usbd_control.c
+++ b/src/device/usbd_control.c
@@ -32,10 +32,7 @@
 #include "tusb.h"
 #include "device/usbd_pvt.h"
 
-// Debug level of USBD Control
-#define USBD_CONTROL_DEBUG   2
-
-#if CFG_TUSB_DEBUG >= USBD_CONTROL_DEBUG
+#if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
 extern void usbd_driver_print_control_complete_name(usbd_control_xfer_cb_t callback);
 #endif
 
@@ -191,7 +188,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result
   {
     TU_VERIFY(_ctrl_xfer.buffer);
     memcpy(_ctrl_xfer.buffer, _usbd_ctrl_buf, xferred_bytes);
-    TU_LOG_MEM(USBD_CONTROL_DEBUG, _usbd_ctrl_buf, xferred_bytes, 2);
+    TU_LOG_MEM(CFG_TUD_LOG_LEVEL, _usbd_ctrl_buf, xferred_bytes, 2);
   }
 
   _ctrl_xfer.total_xferred += (uint16_t) xferred_bytes;
@@ -208,7 +205,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result
     // callback can still stall control in status phase e.g out data does not make sense
     if ( _ctrl_xfer.complete_cb )
     {
-      #if CFG_TUSB_DEBUG >= USBD_CONTROL_DEBUG
+      #if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
       usbd_driver_print_control_complete_name(_ctrl_xfer.complete_cb);
       #endif
 
diff --git a/src/device/usbd_pvt.h b/src/device/usbd_pvt.h
index 8393d3469..940b2858b 100644
--- a/src/device/usbd_pvt.h
+++ b/src/device/usbd_pvt.h
@@ -33,13 +33,20 @@
  extern "C" {
 #endif
 
+// Level where CFG_TUSB_DEBUG must be at least for USBD is logged
+#ifndef CFG_TUD_LOG_LEVEL
+#define CFG_TUD_LOG_LEVEL   2
+#endif
+
+#define TU_LOG_USBD(...)   TU_LOG(CFG_TUD_LOG_LEVEL, __VA_ARGS__)
+
 //--------------------------------------------------------------------+
 // Class Driver API
 //--------------------------------------------------------------------+
 
 typedef struct
 {
-  #if CFG_TUSB_DEBUG >= 2
+  #if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
   char const* name;
   #endif
 
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 184bda23b..58129c16e 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -38,17 +38,19 @@
 //--------------------------------------------------------------------+
 
 #ifndef CFG_TUH_TASK_QUEUE_SZ
-#define CFG_TUH_TASK_QUEUE_SZ   16
+  #define CFG_TUH_TASK_QUEUE_SZ   16
 #endif
 
 #ifndef CFG_TUH_INTERFACE_MAX
-#define CFG_TUH_INTERFACE_MAX   8
+  #define CFG_TUH_INTERFACE_MAX   8
 #endif
 
-// Debug level, TUSB_CFG_DEBUG must be at least this level for debug message
-#define USBH_DEBUG   2
+// Level where CFG_TUSB_DEBUG must be at least for USBH is logged
+#ifndef CFG_TUH_LOG_LEVEL
+  #define CFG_TUH_LOG_LEVEL   2
+#endif
 
-#define TU_LOG_USBH(...)   TU_LOG(USBH_DEBUG, __VA_ARGS__)
+#define TU_LOG_USBH(...)   TU_LOG(CFG_TUH_LOG_LEVEL, __VA_ARGS__)
 
 //--------------------------------------------------------------------+
 // USBH-HCD common data structure
@@ -322,12 +324,12 @@ bool tuh_init(uint8_t controller_id)
   if ( tuh_inited() ) return true;
 
   TU_LOG_USBH("USBH init on controller %u\r\n", controller_id);
-  TU_LOG_INT(USBH_DEBUG, sizeof(usbh_device_t));
-  TU_LOG_INT(USBH_DEBUG, sizeof(hcd_event_t));
-  TU_LOG_INT(USBH_DEBUG, sizeof(_ctrl_xfer));
-  TU_LOG_INT(USBH_DEBUG, sizeof(tuh_xfer_t));
-  TU_LOG_INT(USBH_DEBUG, sizeof(tu_fifo_t));
-  TU_LOG_INT(USBH_DEBUG, sizeof(tu_edpt_stream_t));
+  TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(usbh_device_t));
+  TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(hcd_event_t));
+  TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(_ctrl_xfer));
+  TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(tuh_xfer_t));
+  TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(tu_fifo_t));
+  TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(tu_edpt_stream_t));
 
   // Event queue
   _usbh_q = osal_queue_create( &_usbh_qdef );
@@ -565,7 +567,7 @@ bool tuh_control_xfer (tuh_xfer_t* xfer)
   TU_LOG_USBH("[%u:%u] %s: ", rhport, daddr,
               (xfer->setup->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD && xfer->setup->bRequest <= TUSB_REQ_SYNCH_FRAME) ?
                   tu_str_std_request[xfer->setup->bRequest] : "Class Request");
-  TU_LOG_PTR(USBH_DEBUG, xfer->setup);
+  TU_LOG_PTR(CFG_TUH_LOG_LEVEL, xfer->setup);
   TU_LOG_USBH("\r\n");
 
   if (xfer->complete_cb)
@@ -671,7 +673,7 @@ static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result
         if (request->wLength)
         {
           TU_LOG_USBH("[%u:%u] Control data:\r\n", rhport, dev_addr);
-          TU_LOG_MEM(USBH_DEBUG, _ctrl_xfer.buffer, xferred_bytes, 2);
+          TU_LOG_MEM(CFG_TUH_LOG_LEVEL, _ctrl_xfer.buffer, xferred_bytes, 2);
         }
 
         _ctrl_xfer.actual_len = (uint16_t) xferred_bytes;
@@ -1186,7 +1188,7 @@ static void process_removing_device(uint8_t rhport, uint8_t hub_addr, uint8_t hu
       TU_LOG_USBH("Device unplugged address = %u\r\n", daddr);
 
       if (is_hub_addr(daddr)) {
-        TU_LOG(USBH_DEBUG, "  is a HUB device %u\r\n", daddr);
+        TU_LOG(CFG_TUH_LOG_LEVEL, "  is a HUB device %u\r\n", daddr);
 
         // Submit removed event If the device itself is a hub (un-rolled recursive)
         // TODO a better to unroll recursrive is using array of removing_hubs and mark it here
@@ -1657,7 +1659,7 @@ static bool _parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configur
 
       if( drv_id >= USBH_CLASS_DRIVER_COUNT )
       {
-        TU_LOG(USBH_DEBUG, "Interface %u: class = %u subclass = %u protocol = %u is not supported\r\n",
+        TU_LOG(CFG_TUH_LOG_LEVEL, "Interface %u: class = %u subclass = %u protocol = %u is not supported\r\n",
                desc_itf->bInterfaceNumber, desc_itf->bInterfaceClass, desc_itf->bInterfaceSubClass, desc_itf->bInterfaceProtocol);
       }
     }
@@ -1695,7 +1697,7 @@ void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num)
 
     if (is_hub_addr(dev_addr))
     {
-      TU_LOG(USBH_DEBUG, "HUB address = %u is mounted\r\n", dev_addr);
+      TU_LOG(CFG_TUH_LOG_LEVEL, "HUB address = %u is mounted\r\n", dev_addr);
     }else
     {
       // Invoke callback if available

From 16ad918d96b2bd01189906d64d0871f0ea952833 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 20 Jul 2023 17:37:06 +0700
Subject: [PATCH 513/691] prefer application callback over built-in driver

---
 src/host/usbh.c | 56 ++++++++++++++++++++++---------------------------
 1 file changed, 25 insertions(+), 31 deletions(-)

diff --git a/src/host/usbh.c b/src/host/usbh.c
index 58129c16e..ecc672198 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -452,39 +452,28 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr)
         TU_LOG_USBH("on EP %02X with %u bytes: %s\r\n", ep_addr, (unsigned int) event.xfer_complete.len,
                     tu_str_xfer_result[event.xfer_complete.result]);
 
-        if (event.dev_addr == 0)
-        {
+        if (event.dev_addr == 0) {
           // device 0 only has control endpoint
           TU_ASSERT(epnum == 0, );
           usbh_control_xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result, event.xfer_complete.len);
-        }
-        else
-        {
+        } else {
           usbh_device_t* dev = get_device(event.dev_addr);
           TU_VERIFY(dev && dev->connected, );
 
           dev->ep_status[epnum][ep_dir].busy    = 0;
           dev->ep_status[epnum][ep_dir].claimed = 0;
 
-          if ( 0 == epnum )
-          {
-            usbh_control_xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result, event.xfer_complete.len);
-          }else
-          {
-            uint8_t drv_id = dev->ep2drv[epnum][ep_dir];
-            if(drv_id < USBH_CLASS_DRIVER_COUNT)
-            {
-              TU_LOG_USBH("%s xfer callback\r\n", usbh_class_drivers[drv_id].name);
-              usbh_class_drivers[drv_id].xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result, event.xfer_complete.len);
-            }
-            else
-            {
-#if CFG_TUH_API_EDPT_XFER
-              tuh_xfer_cb_t complete_cb = dev->ep_callback[epnum][ep_dir].complete_cb;
-              if ( complete_cb )
-              {
-                tuh_xfer_t xfer =
-                {
+          if ( 0 == epnum ) {
+            usbh_control_xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result,
+                                 event.xfer_complete.len);
+          }else {
+            // Prefer application callback over built-in one if available. This occurs when tuh_edpt_xfer() is used
+            // with enabled driver e.g HID endpoint
+            #if CFG_TUH_API_EDPT_XFER
+            tuh_xfer_cb_t const complete_cb = dev->ep_callback[epnum][ep_dir].complete_cb;
+            if ( complete_cb ) {
+              // re-construct xfer info
+              tuh_xfer_t xfer = {
                   .daddr       = event.dev_addr,
                   .ep_addr     = ep_addr,
                   .result      = event.xfer_complete.result,
@@ -493,16 +482,21 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr)
                   .buffer      = NULL, // not available
                   .complete_cb = complete_cb,
                   .user_data   = dev->ep_callback[epnum][ep_dir].user_data
-                };
+              };
 
-                complete_cb(&xfer);
-              }else
-#endif
-              {
+              complete_cb(&xfer);
+            }else
+            #endif
+            {
+              uint8_t const drv_id = dev->ep2drv[epnum][ep_dir];
+              if ( drv_id < USBH_CLASS_DRIVER_COUNT ) {
+                TU_LOG_USBH("%s xfer callback\r\n", usbh_class_drivers[drv_id].name);
+                usbh_class_drivers[drv_id].xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result,
+                                                   event.xfer_complete.len);
+              } else {
                 // no driver/callback responsible for this transfer
-                TU_ASSERT(false, );
+                TU_ASSERT(false,);
               }
-
             }
           }
         }

From eae8678d67aa0add8970da86a0228578f49e9836 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 20 Jul 2023 17:06:57 +0700
Subject: [PATCH 514/691] improve logging, allow easier to turn off usbd,
 driver logging

can be useful when focusing on let's say usbh
---
 src/class/msc/msc_device.c | 43 ++++++++++--------
 src/device/usbd.c          | 93 ++++++++++++++++++--------------------
 src/device/usbd_control.c  |  9 ++--
 src/device/usbd_pvt.h      |  9 +++-
 src/host/usbh.c            | 34 +++++++-------
 5 files changed, 97 insertions(+), 91 deletions(-)

diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c
index 159a11259..a409c4e27 100644
--- a/src/class/msc/msc_device.c
+++ b/src/class/msc/msc_device.c
@@ -34,13 +34,16 @@
 
 #include "msc_device.h"
 
+// Level where CFG_TUSB_DEBUG must be at least for this driver is logged
+#ifndef CFG_TUD_MSC_LOG_LEVEL
+  #define CFG_TUD_MSC_LOG_LEVEL   2
+#endif
+
+#define TU_LOG_DRV(...)   TU_LOG(CFG_TUD_MSC_LOG_LEVEL, __VA_ARGS__)
+
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
-
-// Can be selectively disabled to reduce logging when troubleshooting other driver
-#define MSC_DEBUG   2
-
 enum
 {
   MSC_STAGE_CMD  = 0,
@@ -164,7 +167,7 @@ uint8_t rdwr10_validate_cmd(msc_cbw_t const* cbw)
   {
     if ( block_count )
     {
-      TU_LOG(MSC_DEBUG, "  SCSI case 2 (Hn < Di) or case 3 (Hn < Do) \r\n");
+      TU_LOG_DRV("  SCSI case 2 (Hn < Di) or case 3 (Hn < Do) \r\n");
       status = MSC_CSW_STATUS_PHASE_ERROR;
     }else
     {
@@ -174,22 +177,22 @@ uint8_t rdwr10_validate_cmd(msc_cbw_t const* cbw)
   {
     if ( SCSI_CMD_READ_10 == cbw->command[0] && !is_data_in(cbw->dir) )
     {
-      TU_LOG(MSC_DEBUG, "  SCSI case 10 (Ho <> Di)\r\n");
+      TU_LOG_DRV("  SCSI case 10 (Ho <> Di)\r\n");
       status = MSC_CSW_STATUS_PHASE_ERROR;
     }
     else if ( SCSI_CMD_WRITE_10 == cbw->command[0] && is_data_in(cbw->dir) )
     {
-      TU_LOG(MSC_DEBUG, "  SCSI case 8 (Hi <> Do)\r\n");
+      TU_LOG_DRV("  SCSI case 8 (Hi <> Do)\r\n");
       status = MSC_CSW_STATUS_PHASE_ERROR;
     }
     else if ( 0 == block_count )
     {
-      TU_LOG(MSC_DEBUG, "  SCSI case 4 Hi > Dn (READ10) or case 9 Ho > Dn (WRITE10) \r\n");
+      TU_LOG_DRV("  SCSI case 4 Hi > Dn (READ10) or case 9 Ho > Dn (WRITE10) \r\n");
       status =  MSC_CSW_STATUS_FAILED;
     }
     else if ( cbw->total_bytes / block_count == 0 )
     {
-      TU_LOG(MSC_DEBUG, " Computed block size = 0. SCSI case 7 Hi < Di (READ10) or case 13 Ho < Do (WRIT10)\r\n");
+      TU_LOG_DRV(" Computed block size = 0. SCSI case 7 Hi < Di (READ10) or case 13 Ho < Do (WRIT10)\r\n");
       status = MSC_CSW_STATUS_PHASE_ERROR;
     }
   }
@@ -352,7 +355,7 @@ bool mscd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
   switch ( request->bRequest )
   {
     case MSC_REQ_RESET:
-      TU_LOG(MSC_DEBUG, "  MSC BOT Reset\r\n");
+      TU_LOG_DRV("  MSC BOT Reset\r\n");
       TU_VERIFY(request->wValue == 0 && request->wLength == 0);
 
       // driver state reset
@@ -363,7 +366,7 @@ bool mscd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
 
     case MSC_REQ_GET_MAX_LUN:
     {
-      TU_LOG(MSC_DEBUG, "  MSC Get Max Lun\r\n");
+      TU_LOG_DRV("  MSC Get Max Lun\r\n");
       TU_VERIFY(request->wValue == 0 && request->wLength == 1);
 
       uint8_t maxlun = 1;
@@ -400,7 +403,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
 
       if ( !(xferred_bytes == sizeof(msc_cbw_t) && p_cbw->signature == MSC_CBW_SIGNATURE) )
       {
-        TU_LOG(MSC_DEBUG, "  SCSI CBW is not valid\r\n");
+        TU_LOG_DRV("  SCSI CBW is not valid\r\n");
 
         // BOT 6.6.1 If CBW is not valid stall both endpoints until reset recovery
         p_msc->stage = MSC_STAGE_NEED_RESET;
@@ -412,7 +415,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
         return false;
       }
 
-      TU_LOG(MSC_DEBUG, "  SCSI Command [Lun%u]: %s\r\n", p_cbw->lun, tu_lookup_find(&_msc_scsi_cmd_table, p_cbw->command[0]));
+      TU_LOG_DRV("  SCSI Command [Lun%u]: %s\r\n", p_cbw->lun, tu_lookup_find(&_msc_scsi_cmd_table, p_cbw->command[0]));
       //TU_LOG_MEM(MSC_DEBUG, p_cbw, xferred_bytes, 2);
 
       p_csw->signature    = MSC_CSW_SIGNATURE;
@@ -457,7 +460,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
         {
           if (p_cbw->total_bytes > sizeof(_mscd_buf))
           {
-            TU_LOG(MSC_DEBUG, "  SCSI reject non READ10/WRITE10 with large data\r\n");
+            TU_LOG_DRV("  SCSI reject non READ10/WRITE10 with large data\r\n");
             fail_scsi_op(rhport, p_msc, MSC_CSW_STATUS_FAILED);
           }else
           {
@@ -479,7 +482,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
           if ( resplen < 0 )
           {
             // unsupported command
-            TU_LOG(MSC_DEBUG, "  SCSI unsupported or failed command\r\n");
+            TU_LOG_DRV("  SCSI unsupported or failed command\r\n");
             fail_scsi_op(rhport, p_msc, MSC_CSW_STATUS_FAILED);
           }
           else if (resplen == 0)
@@ -514,7 +517,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
     break;
 
     case MSC_STAGE_DATA:
-      TU_LOG(MSC_DEBUG, "  SCSI Data [Lun%u]\r\n", p_cbw->lun);
+      TU_LOG_DRV("  SCSI Data [Lun%u]\r\n", p_cbw->lun);
       //TU_LOG_MEM(MSC_DEBUG, _mscd_buf, xferred_bytes, 2);
 
       if (SCSI_CMD_READ_10 == p_cbw->command[0])
@@ -546,7 +549,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
           if ( cb_result < 0 )
           {
             // unsupported command
-            TU_LOG(MSC_DEBUG, "  SCSI unsupported command\r\n");
+            TU_LOG_DRV("  SCSI unsupported command\r\n");
             fail_scsi_op(rhport, p_msc, MSC_CSW_STATUS_FAILED);
           }else
           {
@@ -575,7 +578,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
       // Wait for the Status phase to complete
       if( (ep_addr == p_msc->ep_in) && (xferred_bytes == sizeof(msc_csw_t)) )
       {
-        TU_LOG(MSC_DEBUG, "  SCSI Status [Lun%u] = %u\r\n", p_cbw->lun, p_csw->status);
+        TU_LOG_DRV("  SCSI Status [Lun%u] = %u\r\n", p_cbw->lun, p_csw->status);
         // TU_LOG_MEM(MSC_DEBUG, p_csw, xferred_bytes, 2);
 
         // Invoke complete callback if defined
@@ -845,7 +848,7 @@ static void proc_read10_cmd(uint8_t rhport, mscd_interface_t* p_msc)
   if ( nbytes < 0 )
   {
     // negative means error -> endpoint is stalled & status in CSW set to failed
-    TU_LOG(MSC_DEBUG, "  tud_msc_read10_cb() return -1\r\n");
+    TU_LOG_DRV("  tud_msc_read10_cb() return -1\r\n");
 
     // set sense
     set_sense_medium_not_present(p_cbw->lun);
@@ -907,7 +910,7 @@ static void proc_write10_new_data(uint8_t rhport, mscd_interface_t* p_msc, uint3
   if ( nbytes < 0 )
   {
     // negative means error -> failed this scsi op
-    TU_LOG(MSC_DEBUG, "  tud_msc_write10_cb() return -1\r\n");
+    TU_LOG_DRV("  tud_msc_write10_cb() return -1\r\n");
 
     // update actual byte before failed
     p_msc->xferred_len += xferred_bytes;
diff --git a/src/device/usbd.c b/src/device/usbd.c
index 44c2530ce..9429cf664 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -43,9 +43,6 @@
   #define CFG_TUD_TASK_QUEUE_SZ   16
 #endif
 
-// Debug level of USBD
-#define USBD_DBG   2
-
 //--------------------------------------------------------------------+
 // Device Data
 //--------------------------------------------------------------------+
@@ -81,7 +78,7 @@ tu_static usbd_device_t _usbd_dev;
 //--------------------------------------------------------------------+
 // Class Driver
 //--------------------------------------------------------------------+
-#if CFG_TUSB_DEBUG >= 2
+#if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
   #define DRIVER_NAME(_name)    .name = _name,
 #else
   #define DRIVER_NAME(_name)
@@ -308,7 +305,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t event,
 //--------------------------------------------------------------------+
 // Debug
 //--------------------------------------------------------------------+
-#if CFG_TUSB_DEBUG >= 2
+#if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
 tu_static char const* const _usbd_event_str[DCD_EVENT_COUNT] =
 {
   "Invalid"        ,
@@ -330,7 +327,7 @@ void usbd_driver_print_control_complete_name(usbd_control_xfer_cb_t callback)
     usbd_class_driver_t const * driver = get_driver(i);
     if ( driver && driver->control_xfer_cb == callback )
     {
-      TU_LOG(USBD_DBG, "  %s control complete\r\n", driver->name);
+      TU_LOG_USBD("  %s control complete\r\n", driver->name);
       return;
     }
   }
@@ -396,10 +393,10 @@ bool tud_init (uint8_t rhport)
   // skip if already initialized
   if ( tud_inited() ) return true;
 
-  TU_LOG(USBD_DBG, "USBD init on controller %u\r\n", rhport);
-  TU_LOG_INT(USBD_DBG, sizeof(usbd_device_t));
-  TU_LOG_INT(USBD_DBG, sizeof(tu_fifo_t));
-  TU_LOG_INT(USBD_DBG, sizeof(tu_edpt_stream_t));
+  TU_LOG_USBD("USBD init on controller %u\r\n", rhport);
+  TU_LOG_INT(CFG_TUD_LOG_LEVEL, sizeof(usbd_device_t));
+  TU_LOG_INT(CFG_TUD_LOG_LEVEL, sizeof(tu_fifo_t));
+  TU_LOG_INT(CFG_TUD_LOG_LEVEL, sizeof(tu_edpt_stream_t));
 
   tu_varclr(&_usbd_dev);
 
@@ -424,7 +421,7 @@ bool tud_init (uint8_t rhport)
   {
     usbd_class_driver_t const * driver = get_driver(i);
     TU_ASSERT(driver);
-    TU_LOG(USBD_DBG, "%s init\r\n", driver->name);
+    TU_LOG_USBD("%s init\r\n", driver->name);
     driver->init();
   }
 
@@ -496,21 +493,21 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr)
     dcd_event_t event;
     if ( !osal_queue_receive(_usbd_q, &event, timeout_ms) ) return;
 
-#if CFG_TUSB_DEBUG >= 2
-    if (event.event_id == DCD_EVENT_SETUP_RECEIVED) TU_LOG(USBD_DBG, "\r\n"); // extra line for setup
-    TU_LOG(USBD_DBG, "USBD %s ", event.event_id < DCD_EVENT_COUNT ? _usbd_event_str[event.event_id] : "CORRUPTED");
+#if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
+    if (event.event_id == DCD_EVENT_SETUP_RECEIVED) TU_LOG_USBD("\r\n"); // extra line for setup
+    TU_LOG_USBD("USBD %s ", event.event_id < DCD_EVENT_COUNT ? _usbd_event_str[event.event_id] : "CORRUPTED");
 #endif
 
     switch ( event.event_id )
     {
       case DCD_EVENT_BUS_RESET:
-        TU_LOG(USBD_DBG, ": %s Speed\r\n", tu_str_speed[event.bus_reset.speed]);
+        TU_LOG_USBD(": %s Speed\r\n", tu_str_speed[event.bus_reset.speed]);
         usbd_reset(event.rhport);
         _usbd_dev.speed = event.bus_reset.speed;
       break;
 
       case DCD_EVENT_UNPLUGGED:
-        TU_LOG(USBD_DBG, "\r\n");
+        TU_LOG_USBD("\r\n");
         usbd_reset(event.rhport);
 
         // invoke callback
@@ -518,8 +515,8 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr)
       break;
 
       case DCD_EVENT_SETUP_RECEIVED:
-        TU_LOG_PTR(USBD_DBG, &event.setup_received);
-        TU_LOG(USBD_DBG, "\r\n");
+        TU_LOG_PTR(CFG_TUD_LOG_LEVEL, &event.setup_received);
+        TU_LOG_USBD("\r\n");
 
         // Mark as connected after receiving 1st setup packet.
         // But it is easier to set it every time instead of wasting time to check then set
@@ -534,7 +531,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr)
         // Process control request
         if ( !process_control_request(event.rhport, &event.setup_received) )
         {
-          TU_LOG(USBD_DBG, "  Stall EP0\r\n");
+          TU_LOG_USBD("  Stall EP0\r\n");
           // Failed -> stall both control endpoint IN and OUT
           dcd_edpt_stall(event.rhport, 0);
           dcd_edpt_stall(event.rhport, 0 | TUSB_DIR_IN_MASK);
@@ -548,7 +545,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr)
         uint8_t const epnum   = tu_edpt_number(ep_addr);
         uint8_t const ep_dir  = tu_edpt_dir(ep_addr);
 
-        TU_LOG(USBD_DBG, "on EP %02X with %u bytes\r\n", ep_addr, (unsigned int) event.xfer_complete.len);
+        TU_LOG_USBD("on EP %02X with %u bytes\r\n", ep_addr, (unsigned int) event.xfer_complete.len);
 
         _usbd_dev.ep_status[epnum][ep_dir].busy = 0;
         _usbd_dev.ep_status[epnum][ep_dir].claimed = 0;
@@ -563,7 +560,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr)
           usbd_class_driver_t const * driver = get_driver( _usbd_dev.ep2drv[epnum][ep_dir] );
           TU_ASSERT(driver, );
 
-          TU_LOG(USBD_DBG, "  %s xfer callback\r\n", driver->name);
+          TU_LOG_USBD("  %s xfer callback\r\n", driver->name);
           driver->xfer_cb(event.rhport, ep_addr, (xfer_result_t) event.xfer_complete.result, event.xfer_complete.len);
         }
       }
@@ -575,27 +572,27 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr)
         // e.g suspend -> resume -> unplug/plug. Skip suspend/resume if not connected
         if ( _usbd_dev.connected )
         {
-          TU_LOG(USBD_DBG, ": Remote Wakeup = %u\r\n", _usbd_dev.remote_wakeup_en);
+          TU_LOG_USBD(": Remote Wakeup = %u\r\n", _usbd_dev.remote_wakeup_en);
           if (tud_suspend_cb) tud_suspend_cb(_usbd_dev.remote_wakeup_en);
         }else
         {
-          TU_LOG(USBD_DBG, " Skipped\r\n");
+          TU_LOG_USBD(" Skipped\r\n");
         }
       break;
 
       case DCD_EVENT_RESUME:
         if ( _usbd_dev.connected )
         {
-          TU_LOG(USBD_DBG, "\r\n");
+          TU_LOG_USBD("\r\n");
           if (tud_resume_cb) tud_resume_cb();
         }else
         {
-          TU_LOG(USBD_DBG, " Skipped\r\n");
+          TU_LOG_USBD(" Skipped\r\n");
         }
       break;
 
       case USBD_EVENT_FUNC_CALL:
-        TU_LOG(USBD_DBG, "\r\n");
+        TU_LOG_USBD("\r\n");
         if ( event.func_call.func ) event.func_call.func(event.func_call.param);
       break;
 
@@ -620,7 +617,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr)
 static bool invoke_class_control(uint8_t rhport, usbd_class_driver_t const * driver, tusb_control_request_t const * request)
 {
   usbd_control_set_complete_callback(driver->control_xfer_cb);
-  TU_LOG(USBD_DBG, "  %s control request\r\n", driver->name);
+  TU_LOG_USBD("  %s control request\r\n", driver->name);
   return driver->control_xfer_cb(rhport, CONTROL_STAGE_SETUP, request);
 }
 
@@ -641,11 +638,11 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
     return tud_vendor_control_xfer_cb(rhport, CONTROL_STAGE_SETUP, p_request);
   }
 
-#if CFG_TUSB_DEBUG >= 2
+#if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
   if (TUSB_REQ_TYPE_STANDARD == p_request->bmRequestType_bit.type && p_request->bRequest <= TUSB_REQ_SYNCH_FRAME)
   {
-    TU_LOG(USBD_DBG, "  %s", tu_str_std_request[p_request->bRequest]);
-    if (TUSB_REQ_GET_DESCRIPTOR != p_request->bRequest) TU_LOG(USBD_DBG, "\r\n");
+    TU_LOG_USBD("  %s", tu_str_std_request[p_request->bRequest]);
+    if (TUSB_REQ_GET_DESCRIPTOR != p_request->bRequest) TU_LOG_USBD("\r\n");
   }
 #endif
 
@@ -701,7 +698,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
             if ( _usbd_dev.cfg_num )
             {
               // already configured: need to clear all endpoints and driver first
-              TU_LOG(USBD_DBG, "  Clear current Configuration (%u) before switching\r\n", _usbd_dev.cfg_num);
+              TU_LOG_USBD("  Clear current Configuration (%u) before switching\r\n", _usbd_dev.cfg_num);
 
               // close all non-control endpoints, cancel all pending transfers if any
               dcd_edpt_close_all(rhport);
@@ -730,7 +727,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
           // Only support remote wakeup for device feature
           TU_VERIFY(TUSB_REQ_FEATURE_REMOTE_WAKEUP == p_request->wValue);
 
-          TU_LOG(USBD_DBG, "    Enable Remote Wakeup\r\n");
+          TU_LOG_USBD("    Enable Remote Wakeup\r\n");
 
           // Host may enable remote wake up before suspending especially HID device
           _usbd_dev.remote_wakeup_en = true;
@@ -741,7 +738,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
           // Only support remote wakeup for device feature
           TU_VERIFY(TUSB_REQ_FEATURE_REMOTE_WAKEUP == p_request->wValue);
 
-          TU_LOG(USBD_DBG, "    Disable Remote Wakeup\r\n");
+          TU_LOG_USBD("    Disable Remote Wakeup\r\n");
 
           // Host may disable remote wake up after resuming
           _usbd_dev.remote_wakeup_en = false;
@@ -924,7 +921,7 @@ static bool process_set_config(uint8_t rhport, uint8_t cfg_num)
       if ( (sizeof(tusb_desc_interface_t) <= drv_len)  && (drv_len <= remaining_len) )
       {
         // Open successfully
-        TU_LOG(USBD_DBG, "  %s opened\r\n", driver->name);
+        TU_LOG_USBD("  %s opened\r\n", driver->name);
 
         // Some drivers use 2 or more interfaces but may not have IAD e.g MIDI (always) or
         // BTH (even CDC) with class in device descriptor (single interface)
@@ -983,7 +980,7 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
   {
     case TUSB_DESC_DEVICE:
     {
-      TU_LOG(USBD_DBG, " Device\r\n");
+      TU_LOG_USBD(" Device\r\n");
 
       void* desc_device = (void*) (uintptr_t) tud_descriptor_device_cb();
 
@@ -1007,7 +1004,7 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
 
     case TUSB_DESC_BOS:
     {
-      TU_LOG(USBD_DBG, " BOS\r\n");
+      TU_LOG_USBD(" BOS\r\n");
 
       // requested by host if USB > 2.0 ( i.e 2.1 or 3.x )
       if (!tud_descriptor_bos_cb) return false;
@@ -1029,12 +1026,12 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
 
       if ( desc_type == TUSB_DESC_CONFIGURATION )
       {
-        TU_LOG(USBD_DBG, " Configuration[%u]\r\n", desc_index);
+        TU_LOG_USBD(" Configuration[%u]\r\n", desc_index);
         desc_config = (uintptr_t) tud_descriptor_configuration_cb(desc_index);
       }else
       {
         // Host only request this after getting Device Qualifier descriptor
-        TU_LOG(USBD_DBG, " Other Speed Configuration\r\n");
+        TU_LOG_USBD(" Other Speed Configuration\r\n");
         TU_VERIFY( tud_descriptor_other_speed_configuration_cb );
         desc_config = (uintptr_t) tud_descriptor_other_speed_configuration_cb(desc_index);
       }
@@ -1050,7 +1047,7 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
 
     case TUSB_DESC_STRING:
     {
-      TU_LOG(USBD_DBG, " String[%u]\r\n", desc_index);
+      TU_LOG_USBD(" String[%u]\r\n", desc_index);
 
       // String Descriptor always uses the desc set from user
       uint8_t const* desc_str = (uint8_t const*) tud_descriptor_string_cb(desc_index, tu_le16toh(p_request->wIndex));
@@ -1063,7 +1060,7 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
 
     case TUSB_DESC_DEVICE_QUALIFIER:
     {
-      TU_LOG(USBD_DBG, " Device Qualifier\r\n");
+      TU_LOG_USBD(" Device Qualifier\r\n");
 
       TU_VERIFY( tud_descriptor_device_qualifier_cb );
 
@@ -1248,7 +1245,7 @@ bool usbd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
   // TODO skip ready() check for now since enumeration also use this API
   // TU_VERIFY(tud_ready());
 
-  TU_LOG(USBD_DBG, "  Queue EP %02X with %u bytes ...\r\n", ep_addr, total_bytes);
+  TU_LOG_USBD("  Queue EP %02X with %u bytes ...\r\n", ep_addr, total_bytes);
 
   // Attempt to transfer on a busy endpoint, sound like an race condition !
   TU_ASSERT(_usbd_dev.ep_status[epnum][dir].busy == 0);
@@ -1265,7 +1262,7 @@ bool usbd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
     // DCD error, mark endpoint as ready to allow next transfer
     _usbd_dev.ep_status[epnum][dir].busy = 0;
     _usbd_dev.ep_status[epnum][dir].claimed = 0;
-    TU_LOG(USBD_DBG, "FAILED\r\n");
+    TU_LOG_USBD("FAILED\r\n");
     TU_BREAKPOINT();
     return false;
   }
@@ -1282,7 +1279,7 @@ bool usbd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16
   uint8_t const epnum = tu_edpt_number(ep_addr);
   uint8_t const dir   = tu_edpt_dir(ep_addr);
 
-  TU_LOG(USBD_DBG, "  Queue ISO EP %02X with %u bytes ... ", ep_addr, total_bytes);
+  TU_LOG_USBD("  Queue ISO EP %02X with %u bytes ... ", ep_addr, total_bytes);
 
   // Attempt to transfer on a busy endpoint, sound like an race condition !
   TU_ASSERT(_usbd_dev.ep_status[epnum][dir].busy == 0);
@@ -1293,14 +1290,14 @@ bool usbd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16
 
   if (dcd_edpt_xfer_fifo(rhport, ep_addr, ff, total_bytes))
   {
-    TU_LOG(USBD_DBG, "OK\r\n");
+    TU_LOG_USBD("OK\r\n");
     return true;
   }else
   {
     // DCD error, mark endpoint as ready to allow next transfer
     _usbd_dev.ep_status[epnum][dir].busy = 0;
     _usbd_dev.ep_status[epnum][dir].claimed = 0;
-    TU_LOG(USBD_DBG, "failed\r\n");
+    TU_LOG_USBD("failed\r\n");
     TU_BREAKPOINT();
     return false;
   }
@@ -1326,7 +1323,7 @@ void usbd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
   // only stalled if currently cleared
   if ( !_usbd_dev.ep_status[epnum][dir].stalled )
   {
-    TU_LOG(USBD_DBG, "    Stall EP %02X\r\n", ep_addr);
+    TU_LOG_USBD("    Stall EP %02X\r\n", ep_addr);
     dcd_edpt_stall(rhport, ep_addr);
     _usbd_dev.ep_status[epnum][dir].stalled = 1;
     _usbd_dev.ep_status[epnum][dir].busy = 1;
@@ -1343,7 +1340,7 @@ void usbd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
   // only clear if currently stalled
   if ( _usbd_dev.ep_status[epnum][dir].stalled )
   {
-    TU_LOG(USBD_DBG, "    Clear Stall EP %02X\r\n", ep_addr);
+    TU_LOG_USBD("    Clear Stall EP %02X\r\n", ep_addr);
     dcd_edpt_clear_stall(rhport, ep_addr);
     _usbd_dev.ep_status[epnum][dir].stalled = 0;
     _usbd_dev.ep_status[epnum][dir].busy = 0;
@@ -1371,7 +1368,7 @@ void usbd_edpt_close(uint8_t rhport, uint8_t ep_addr)
   rhport = _usbd_rhport;
 
   TU_ASSERT(dcd_edpt_close, /**/);
-  TU_LOG(USBD_DBG, "  CLOSING Endpoint: 0x%02X\r\n", ep_addr);
+  TU_LOG_USBD("  CLOSING Endpoint: 0x%02X\r\n", ep_addr);
 
   uint8_t const epnum = tu_edpt_number(ep_addr);
   uint8_t const dir   = tu_edpt_dir(ep_addr);
diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c
index 2afe967b5..c580e6ecf 100644
--- a/src/device/usbd_control.c
+++ b/src/device/usbd_control.c
@@ -32,10 +32,7 @@
 #include "tusb.h"
 #include "device/usbd_pvt.h"
 
-// Debug level of USBD Control
-#define USBD_CONTROL_DEBUG   2
-
-#if CFG_TUSB_DEBUG >= USBD_CONTROL_DEBUG
+#if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
 extern void usbd_driver_print_control_complete_name(usbd_control_xfer_cb_t callback);
 #endif
 
@@ -191,7 +188,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result
   {
     TU_VERIFY(_ctrl_xfer.buffer);
     memcpy(_ctrl_xfer.buffer, _usbd_ctrl_buf, xferred_bytes);
-    TU_LOG_MEM(USBD_CONTROL_DEBUG, _usbd_ctrl_buf, xferred_bytes, 2);
+    TU_LOG_MEM(CFG_TUD_LOG_LEVEL, _usbd_ctrl_buf, xferred_bytes, 2);
   }
 
   _ctrl_xfer.total_xferred += (uint16_t) xferred_bytes;
@@ -208,7 +205,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result
     // callback can still stall control in status phase e.g out data does not make sense
     if ( _ctrl_xfer.complete_cb )
     {
-      #if CFG_TUSB_DEBUG >= USBD_CONTROL_DEBUG
+      #if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
       usbd_driver_print_control_complete_name(_ctrl_xfer.complete_cb);
       #endif
 
diff --git a/src/device/usbd_pvt.h b/src/device/usbd_pvt.h
index 8393d3469..940b2858b 100644
--- a/src/device/usbd_pvt.h
+++ b/src/device/usbd_pvt.h
@@ -33,13 +33,20 @@
  extern "C" {
 #endif
 
+// Level where CFG_TUSB_DEBUG must be at least for USBD is logged
+#ifndef CFG_TUD_LOG_LEVEL
+#define CFG_TUD_LOG_LEVEL   2
+#endif
+
+#define TU_LOG_USBD(...)   TU_LOG(CFG_TUD_LOG_LEVEL, __VA_ARGS__)
+
 //--------------------------------------------------------------------+
 // Class Driver API
 //--------------------------------------------------------------------+
 
 typedef struct
 {
-  #if CFG_TUSB_DEBUG >= 2
+  #if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
   char const* name;
   #endif
 
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 184bda23b..58129c16e 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -38,17 +38,19 @@
 //--------------------------------------------------------------------+
 
 #ifndef CFG_TUH_TASK_QUEUE_SZ
-#define CFG_TUH_TASK_QUEUE_SZ   16
+  #define CFG_TUH_TASK_QUEUE_SZ   16
 #endif
 
 #ifndef CFG_TUH_INTERFACE_MAX
-#define CFG_TUH_INTERFACE_MAX   8
+  #define CFG_TUH_INTERFACE_MAX   8
 #endif
 
-// Debug level, TUSB_CFG_DEBUG must be at least this level for debug message
-#define USBH_DEBUG   2
+// Level where CFG_TUSB_DEBUG must be at least for USBH is logged
+#ifndef CFG_TUH_LOG_LEVEL
+  #define CFG_TUH_LOG_LEVEL   2
+#endif
 
-#define TU_LOG_USBH(...)   TU_LOG(USBH_DEBUG, __VA_ARGS__)
+#define TU_LOG_USBH(...)   TU_LOG(CFG_TUH_LOG_LEVEL, __VA_ARGS__)
 
 //--------------------------------------------------------------------+
 // USBH-HCD common data structure
@@ -322,12 +324,12 @@ bool tuh_init(uint8_t controller_id)
   if ( tuh_inited() ) return true;
 
   TU_LOG_USBH("USBH init on controller %u\r\n", controller_id);
-  TU_LOG_INT(USBH_DEBUG, sizeof(usbh_device_t));
-  TU_LOG_INT(USBH_DEBUG, sizeof(hcd_event_t));
-  TU_LOG_INT(USBH_DEBUG, sizeof(_ctrl_xfer));
-  TU_LOG_INT(USBH_DEBUG, sizeof(tuh_xfer_t));
-  TU_LOG_INT(USBH_DEBUG, sizeof(tu_fifo_t));
-  TU_LOG_INT(USBH_DEBUG, sizeof(tu_edpt_stream_t));
+  TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(usbh_device_t));
+  TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(hcd_event_t));
+  TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(_ctrl_xfer));
+  TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(tuh_xfer_t));
+  TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(tu_fifo_t));
+  TU_LOG_INT(CFG_TUH_LOG_LEVEL, sizeof(tu_edpt_stream_t));
 
   // Event queue
   _usbh_q = osal_queue_create( &_usbh_qdef );
@@ -565,7 +567,7 @@ bool tuh_control_xfer (tuh_xfer_t* xfer)
   TU_LOG_USBH("[%u:%u] %s: ", rhport, daddr,
               (xfer->setup->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD && xfer->setup->bRequest <= TUSB_REQ_SYNCH_FRAME) ?
                   tu_str_std_request[xfer->setup->bRequest] : "Class Request");
-  TU_LOG_PTR(USBH_DEBUG, xfer->setup);
+  TU_LOG_PTR(CFG_TUH_LOG_LEVEL, xfer->setup);
   TU_LOG_USBH("\r\n");
 
   if (xfer->complete_cb)
@@ -671,7 +673,7 @@ static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result
         if (request->wLength)
         {
           TU_LOG_USBH("[%u:%u] Control data:\r\n", rhport, dev_addr);
-          TU_LOG_MEM(USBH_DEBUG, _ctrl_xfer.buffer, xferred_bytes, 2);
+          TU_LOG_MEM(CFG_TUH_LOG_LEVEL, _ctrl_xfer.buffer, xferred_bytes, 2);
         }
 
         _ctrl_xfer.actual_len = (uint16_t) xferred_bytes;
@@ -1186,7 +1188,7 @@ static void process_removing_device(uint8_t rhport, uint8_t hub_addr, uint8_t hu
       TU_LOG_USBH("Device unplugged address = %u\r\n", daddr);
 
       if (is_hub_addr(daddr)) {
-        TU_LOG(USBH_DEBUG, "  is a HUB device %u\r\n", daddr);
+        TU_LOG(CFG_TUH_LOG_LEVEL, "  is a HUB device %u\r\n", daddr);
 
         // Submit removed event If the device itself is a hub (un-rolled recursive)
         // TODO a better to unroll recursrive is using array of removing_hubs and mark it here
@@ -1657,7 +1659,7 @@ static bool _parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configur
 
       if( drv_id >= USBH_CLASS_DRIVER_COUNT )
       {
-        TU_LOG(USBH_DEBUG, "Interface %u: class = %u subclass = %u protocol = %u is not supported\r\n",
+        TU_LOG(CFG_TUH_LOG_LEVEL, "Interface %u: class = %u subclass = %u protocol = %u is not supported\r\n",
                desc_itf->bInterfaceNumber, desc_itf->bInterfaceClass, desc_itf->bInterfaceSubClass, desc_itf->bInterfaceProtocol);
       }
     }
@@ -1695,7 +1697,7 @@ void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num)
 
     if (is_hub_addr(dev_addr))
     {
-      TU_LOG(USBH_DEBUG, "HUB address = %u is mounted\r\n", dev_addr);
+      TU_LOG(CFG_TUH_LOG_LEVEL, "HUB address = %u is mounted\r\n", dev_addr);
     }else
     {
       // Invoke callback if available

From 954f0e948d0df2ed64d31ba23369e6c2a22ec63f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 20 Jul 2023 17:37:06 +0700
Subject: [PATCH 515/691] prefer application callback over built-in driver

---
 src/host/usbh.c | 56 ++++++++++++++++++++++---------------------------
 1 file changed, 25 insertions(+), 31 deletions(-)

diff --git a/src/host/usbh.c b/src/host/usbh.c
index 58129c16e..ecc672198 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -452,39 +452,28 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr)
         TU_LOG_USBH("on EP %02X with %u bytes: %s\r\n", ep_addr, (unsigned int) event.xfer_complete.len,
                     tu_str_xfer_result[event.xfer_complete.result]);
 
-        if (event.dev_addr == 0)
-        {
+        if (event.dev_addr == 0) {
           // device 0 only has control endpoint
           TU_ASSERT(epnum == 0, );
           usbh_control_xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result, event.xfer_complete.len);
-        }
-        else
-        {
+        } else {
           usbh_device_t* dev = get_device(event.dev_addr);
           TU_VERIFY(dev && dev->connected, );
 
           dev->ep_status[epnum][ep_dir].busy    = 0;
           dev->ep_status[epnum][ep_dir].claimed = 0;
 
-          if ( 0 == epnum )
-          {
-            usbh_control_xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result, event.xfer_complete.len);
-          }else
-          {
-            uint8_t drv_id = dev->ep2drv[epnum][ep_dir];
-            if(drv_id < USBH_CLASS_DRIVER_COUNT)
-            {
-              TU_LOG_USBH("%s xfer callback\r\n", usbh_class_drivers[drv_id].name);
-              usbh_class_drivers[drv_id].xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result, event.xfer_complete.len);
-            }
-            else
-            {
-#if CFG_TUH_API_EDPT_XFER
-              tuh_xfer_cb_t complete_cb = dev->ep_callback[epnum][ep_dir].complete_cb;
-              if ( complete_cb )
-              {
-                tuh_xfer_t xfer =
-                {
+          if ( 0 == epnum ) {
+            usbh_control_xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result,
+                                 event.xfer_complete.len);
+          }else {
+            // Prefer application callback over built-in one if available. This occurs when tuh_edpt_xfer() is used
+            // with enabled driver e.g HID endpoint
+            #if CFG_TUH_API_EDPT_XFER
+            tuh_xfer_cb_t const complete_cb = dev->ep_callback[epnum][ep_dir].complete_cb;
+            if ( complete_cb ) {
+              // re-construct xfer info
+              tuh_xfer_t xfer = {
                   .daddr       = event.dev_addr,
                   .ep_addr     = ep_addr,
                   .result      = event.xfer_complete.result,
@@ -493,16 +482,21 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr)
                   .buffer      = NULL, // not available
                   .complete_cb = complete_cb,
                   .user_data   = dev->ep_callback[epnum][ep_dir].user_data
-                };
+              };
 
-                complete_cb(&xfer);
-              }else
-#endif
-              {
+              complete_cb(&xfer);
+            }else
+            #endif
+            {
+              uint8_t const drv_id = dev->ep2drv[epnum][ep_dir];
+              if ( drv_id < USBH_CLASS_DRIVER_COUNT ) {
+                TU_LOG_USBH("%s xfer callback\r\n", usbh_class_drivers[drv_id].name);
+                usbh_class_drivers[drv_id].xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result,
+                                                   event.xfer_complete.len);
+              } else {
                 // no driver/callback responsible for this transfer
-                TU_ASSERT(false, );
+                TU_ASSERT(false,);
               }
-
             }
           }
         }

From 6ac7f19640d59f6d28054555430de2a083c78eeb Mon Sep 17 00:00:00 2001
From: jferreir <jesus.ferreira@gmail.com>
Date: Thu, 20 Jul 2023 16:51:42 +0200
Subject: [PATCH 516/691] fix compilation issues for XMC4500_RELAX

---
 hw/bsp/xmc4000/boards/xmc4500_relax/board.mk | 2 +-
 hw/bsp/xmc4000/family.c                      | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/hw/bsp/xmc4000/boards/xmc4500_relax/board.mk b/hw/bsp/xmc4000/boards/xmc4500_relax/board.mk
index 371adff91..2b8f7bc57 100644
--- a/hw/bsp/xmc4000/boards/xmc4500_relax/board.mk
+++ b/hw/bsp/xmc4000/boards/xmc4500_relax/board.mk
@@ -3,7 +3,7 @@ CFLAGS += \
   -DXMC4500_F100x1024 \
 
 # mcu driver cause following warnings
-CFLAGS += -Wno-error=stringop-overread
+CFLAGS += -Wno-stringop-overread
 
 LD_FILE = $(MCU_DIR)/CMSIS/Infineon/COMPONENT_$(MCU_VARIANT)/Source/TOOLCHAIN_GCC_ARM/XMC4500x1024.ld
 
diff --git a/hw/bsp/xmc4000/family.c b/hw/bsp/xmc4000/family.c
index 35bed0ba4..78c968468 100644
--- a/hw/bsp/xmc4000/family.c
+++ b/hw/bsp/xmc4000/family.c
@@ -84,7 +84,9 @@ void board_init(void)
 #endif
 
   // USB Power Enable
+#if(UC_SERIES != XMC45)
   XMC_SCU_CLOCK_UngatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_USB0);
+#endif  
   XMC_SCU_RESET_DeassertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_USB0);
   XMC_SCU_POWER_EnableUsb();
 }

From 34ff7af7c752032d024f5e50774694b6b7ecf403 Mon Sep 17 00:00:00 2001
From: jferreir <jesus.ferreira@gmail.com>
Date: Thu, 20 Jul 2023 18:12:36 +0200
Subject: [PATCH 517/691] Fix trailing spaces issue

---
 hw/bsp/xmc4000/family.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/bsp/xmc4000/family.c b/hw/bsp/xmc4000/family.c
index 78c968468..146bef373 100644
--- a/hw/bsp/xmc4000/family.c
+++ b/hw/bsp/xmc4000/family.c
@@ -86,7 +86,7 @@ void board_init(void)
   // USB Power Enable
 #if(UC_SERIES != XMC45)
   XMC_SCU_CLOCK_UngatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_USB0);
-#endif  
+#endif
   XMC_SCU_RESET_DeassertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_USB0);
   XMC_SCU_POWER_EnableUsb();
 }

From 1cc7c5d0309bcc7c6930fba78bc461e5822e8024 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 20 Jul 2023 11:20:12 +0700
Subject: [PATCH 518/691] add hcd_edpt_abort_xfer() API

---
 examples/dual/host_hid_to_device_cdc/only.txt |  1 +
 src/host/hcd.h                                |  3 ++
 src/host/usbh.c                               | 28 +++++++++++++------
 src/host/usbh.h                               |  7 +++--
 src/portable/ehci/ehci.c                      | 18 ++++++++++++
 5 files changed, 47 insertions(+), 10 deletions(-)

diff --git a/examples/dual/host_hid_to_device_cdc/only.txt b/examples/dual/host_hid_to_device_cdc/only.txt
index 6ee8e3fde..de5d8bed9 100644
--- a/examples/dual/host_hid_to_device_cdc/only.txt
+++ b/examples/dual/host_hid_to_device_cdc/only.txt
@@ -1,3 +1,4 @@
 board:mimxrt1060_evk
 board:mimxrt1064_evk
+board:mcb1800
 mcu:RP2040
diff --git a/src/host/hcd.h b/src/host/hcd.h
index 3355c18b2..cbfffb349 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -171,6 +171,9 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
 // Submit a transfer, when complete hcd_event_xfer_complete() must be invoked
 bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen);
 
+// Abort a queued transfer. Note: it can only abort transfer that has not been started
+bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr);
+
 // Submit a special transfer to send 8-byte Setup Packet, when complete hcd_event_xfer_complete() must be invoked
 bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]);
 
diff --git a/src/host/usbh.c b/src/host/usbh.c
index ecc672198..bbf333d5f 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -710,6 +710,19 @@ bool tuh_edpt_xfer(tuh_xfer_t* xfer)
   return true;
 }
 
+bool tuh_edpt_abort_xfer(uint8_t daddr, uint8_t ep_addr) {
+  usbh_device_t* dev = get_device(daddr);
+  TU_VERIFY(dev);
+
+  uint8_t const epnum = tu_edpt_number(ep_addr);
+  uint8_t const dir   = tu_edpt_dir(ep_addr);
+
+  // skip if not busy
+  if (!dev->ep_status[epnum][dir].busy) return true;
+
+  return hcd_edpt_abort_xfer(dev->rhport, daddr, ep_addr);
+}
+
 //--------------------------------------------------------------------+
 // USBH API For Class Driver
 //--------------------------------------------------------------------+
@@ -741,7 +754,7 @@ void usbh_int_set(bool enabled)
 // Endpoint API
 //--------------------------------------------------------------------+
 
-// TODO has some duplication code with device, refactor later
+// Claim an endpoint for transfer
 bool usbh_edpt_claim(uint8_t dev_addr, uint8_t ep_addr)
 {
   // Note: addr0 only use tuh_control_xfer
@@ -757,7 +770,7 @@ bool usbh_edpt_claim(uint8_t dev_addr, uint8_t ep_addr)
   return true;
 }
 
-// TODO has some duplication code with device, refactor later
+// Release an claimed endpoint due to failed transfer attempt
 bool usbh_edpt_release(uint8_t dev_addr, uint8_t ep_addr)
 {
   // Note: addr0 only use tuh_control_xfer
@@ -773,7 +786,7 @@ bool usbh_edpt_release(uint8_t dev_addr, uint8_t ep_addr)
   return true;
 }
 
-// TODO has some duplication code with device, refactor later
+// Submit an transfer
 bool usbh_edpt_xfer_with_callback(uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes,
                                   tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
@@ -840,14 +853,13 @@ bool tuh_edpt_open(uint8_t dev_addr, tusb_desc_endpoint_t const * desc_ep)
   return hcd_edpt_open(usbh_get_rhport(dev_addr), dev_addr, desc_ep);
 }
 
-bool usbh_edpt_busy(uint8_t dev_addr, uint8_t ep_addr)
-{
-  uint8_t const epnum = tu_edpt_number(ep_addr);
-  uint8_t const dir   = tu_edpt_dir(ep_addr);
-
+bool usbh_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) {
   usbh_device_t* dev = get_device(dev_addr);
   TU_VERIFY(dev);
 
+  uint8_t const epnum = tu_edpt_number(ep_addr);
+  uint8_t const dir   = tu_edpt_dir(ep_addr);
+
   return dev->ep_status[epnum][dir].busy;
 }
 
diff --git a/src/host/usbh.h b/src/host/usbh.h
index 0f969a46a..d765f6744 100644
--- a/src/host/usbh.h
+++ b/src/host/usbh.h
@@ -172,8 +172,11 @@ bool tuh_control_xfer(tuh_xfer_t* xfer);
 //  - sync : blocking if complete callback is NULL.
 bool tuh_edpt_xfer(tuh_xfer_t* xfer);
 
-// Open an non-control endpoint
-bool tuh_edpt_open(uint8_t dev_addr, tusb_desc_endpoint_t const * desc_ep);
+// Open a non-control endpoint
+bool tuh_edpt_open(uint8_t daddr, tusb_desc_endpoint_t const * desc_ep);
+
+// Abort a queued transfer. Note: it can only abort transfer that has not been started
+bool tuh_edpt_abort_xfer(uint8_t daddr, uint8_t ep_addr);
 
 // Set Configuration (control transfer)
 // config_num = 0 will un-configure device. Note: config_num = config_descriptor_index + 1
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 38711e382..fd33d6cfc 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -510,6 +510,24 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
   return true;
 }
 
+bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void) rhport;
+  (void) dev_addr;
+  (void) ep_addr;
+
+  return false;
+
+//  uint8_t const epnum = tu_edpt_number(ep_addr);
+//  ehci_qhd_t* qhd;
+//
+//  // TODO ISO not supported
+//  if (epnum == 0) {
+//    qhd = qhd_control(dev_addr);
+//  }else {
+//    qhd = qhd_get_from_addr(dev_addr, ep_addr);
+//  }
+}
+
 bool hcd_edpt_clear_stall(uint8_t daddr, uint8_t ep_addr)
 {
   ehci_qhd_t *qhd = qhd_get_from_addr(daddr, ep_addr);

From 0da273ea79d7a1c08e3b58301a0b7d3a49c60d13 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 21 Jul 2023 12:52:26 +0700
Subject: [PATCH 519/691] add stub hcd_edpt_abort_xfer() for all ports

---
 src/portable/mentor/musb/hcd_musb.c            | 8 ++++++++
 src/portable/nxp/khci/hcd_khci.c               | 8 ++++++++
 src/portable/ohci/ohci.c                       | 8 ++++++++
 src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 8 ++++++++
 src/portable/raspberrypi/rp2040/hcd_rp2040.c   | 8 ++++++++
 src/portable/renesas/rusb2/hcd_rusb2.c         | 8 ++++++++
 6 files changed, 48 insertions(+)

diff --git a/src/portable/mentor/musb/hcd_musb.c b/src/portable/mentor/musb/hcd_musb.c
index 9eb2e005e..5be67a186 100644
--- a/src/portable/mentor/musb/hcd_musb.c
+++ b/src/portable/mentor/musb/hcd_musb.c
@@ -822,6 +822,14 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *b
   return ret;
 }
 
+bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void) rhport;
+  (void) dev_addr;
+  (void) ep_addr;
+  // TODO not implemented yet
+  return false;
+}
+
 // clear stall, data toggle is also reset to DATA0
 bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
 {
diff --git a/src/portable/nxp/khci/hcd_khci.c b/src/portable/nxp/khci/hcd_khci.c
index f6029ee0d..6784049c5 100644
--- a/src/portable/nxp/khci/hcd_khci.c
+++ b/src/portable/nxp/khci/hcd_khci.c
@@ -562,6 +562,14 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
   return true;
 }
 
+bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void) rhport;
+  (void) dev_addr;
+  (void) ep_addr;
+  // TODO not implemented yet
+  return false;
+}
+
 bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
 {
   if (!tu_edpt_number(ep_addr)) return true;
diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index 3f702d22c..228c43df6 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -543,6 +543,14 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
   return true;
 }
 
+bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void) rhport;
+  (void) dev_addr;
+  (void) ep_addr;
+  // TODO not implemented yet
+  return false;
+}
+
 bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
 {
   ohci_ed_t * const p_ed = ed_from_addr(dev_addr, ep_addr);
diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
index 264af2e7a..fa285327c 100644
--- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
+++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
@@ -138,6 +138,14 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
   return pio_usb_host_endpoint_transfer(pio_rhport, dev_addr, ep_addr, buffer, buflen);
 }
 
+bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void) rhport;
+  (void) dev_addr;
+  (void) ep_addr;
+  // TODO not implemented yet
+  return false;
+}
+
 bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8])
 {
   uint8_t const pio_rhport = RHPORT_PIO(rhport);
diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c
index 02f9968a7..5091fa907 100644
--- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c
@@ -576,6 +576,14 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
   return true;
 }
 
+bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void) rhport;
+  (void) dev_addr;
+  (void) ep_addr;
+  // TODO not implemented yet
+  return false;
+}
+
 bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8])
 {
   (void) rhport;
diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index 65bbc656b..0a75d0b47 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -710,6 +710,14 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *b
   return r;
 }
 
+bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void) rhport;
+  (void) dev_addr;
+  (void) ep_addr;
+  // TODO not implemented yet
+  return false;
+}
+
 bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
 {
   uint16_t volatile *ctr = addr_to_pipectr(dev_addr, ep_addr);

From 14c98dd863a9cab55fc2981fb826f63eceed4b2d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 21 Jul 2023 16:39:30 +0700
Subject: [PATCH 520/691] minor ehci rename, move code around

---
 src/portable/ehci/ehci.c | 181 ++++++++++++++++++++-------------------
 1 file changed, 91 insertions(+), 90 deletions(-)

diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index fd33d6cfc..0a26986d5 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -126,53 +126,29 @@ static inline void print_intr(uint32_t intr) {
 //--------------------------------------------------------------------+
 // PROTOTYPE
 //--------------------------------------------------------------------+
-static inline ehci_link_t* get_period_head(uint8_t rhport, uint32_t interval_ms)
-{
-  (void) rhport;
-  return (ehci_link_t*) &ehci_data.period_head_arr[ tu_log2( tu_min32(FRAMELIST_SIZE, interval_ms) ) ];
-}
 
-static inline ehci_qhd_t* qhd_control(uint8_t dev_addr)
-{
-  return &ehci_data.control[dev_addr].qhd;
-}
+// weak dcache for non-cacheable MCU
+TU_ATTR_WEAK void hcd_dcache_clean(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; }
+TU_ATTR_WEAK void hcd_dcache_invalidate(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; }
+TU_ATTR_WEAK void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; }
 
-static inline ehci_qhd_t* qhd_async_head(uint8_t rhport)
-{
-  (void) rhport;
-  // control qhd of dev0 is used as async head
-  return qhd_control(0);
-}
+TU_ATTR_ALWAYS_INLINE static inline ehci_link_t* list_get_period_head(uint8_t rhport, uint32_t interval_ms);
+TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* list_get_async_head(uint8_t rhport);
 
-static inline ehci_qtd_t* qtd_control(uint8_t dev_addr)
-{
-  return &ehci_data.control[dev_addr].qtd;
-}
-
-
-static inline ehci_qhd_t* qhd_next (ehci_qhd_t const * p_qhd);
-static inline ehci_qhd_t* qhd_find_free (void);
-static inline ehci_qhd_t* qhd_get_from_addr (uint8_t dev_addr, uint8_t ep_addr);
+TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* qhd_control(uint8_t dev_addr);
+TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* qhd_next (ehci_qhd_t const * p_qhd);
+TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* qhd_find_free (void);
+static ehci_qhd_t* qhd_get_from_addr (uint8_t dev_addr, uint8_t ep_addr);
 static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);
 static void qhd_attach_qtd(ehci_qhd_t *qhd, ehci_qtd_t *qtd);
 
-static inline ehci_qtd_t* qtd_find_free (void);
+TU_ATTR_ALWAYS_INLINE static inline ehci_qtd_t* qtd_control(uint8_t dev_addr);
+TU_ATTR_ALWAYS_INLINE static inline ehci_qtd_t* qtd_find_free (void);
 static void qtd_init (ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes);
 
 static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type);
 static inline ehci_link_t* list_next (ehci_link_t const *p_link);
-
-TU_ATTR_WEAK void hcd_dcache_clean(void const* addr, uint32_t data_size) {
-  (void) addr; (void) data_size;
-}
-
-TU_ATTR_WEAK void hcd_dcache_invalidate(void const* addr, uint32_t data_size) {
-  (void) addr; (void) data_size;
-}
-
-TU_ATTR_WEAK void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
-  (void) addr; (void) data_size;
-}
+static void list_remove_qhd_by_daddr(ehci_link_t* list_head, uint8_t dev_addr);
 
 //--------------------------------------------------------------------+
 // HCD API
@@ -274,7 +250,7 @@ void hcd_device_close(uint8_t rhport, uint8_t daddr)
   }
 
   // Remove from async list
-  list_remove_qhd_by_daddr((ehci_link_t *) qhd_async_head(rhport), daddr);
+  list_remove_qhd_by_daddr((ehci_link_t *) list_get_async_head(rhport), daddr);
 
   // Remove from all interval period list
   for(uint8_t i = 0; i < TU_ARRAY_SIZE(ehci_data.period_head_arr); i++) {
@@ -286,37 +262,42 @@ void hcd_device_close(uint8_t rhport, uint8_t daddr)
 }
 
 static void init_periodic_list(uint8_t rhport) {
+  (void) rhport;
+
   // Build the polling interval tree with 1 ms, 2 ms, 4 ms and 8 ms (framesize) only
   for ( uint32_t i = 0; i < TU_ARRAY_SIZE(ehci_data.period_head_arr); i++ ) {
     ehci_data.period_head_arr[i].int_smask          = 1; // queue head in period list must have smask non-zero
     ehci_data.period_head_arr[i].qtd_overlay.halted = 1; // dummy node, always inactive
   }
 
-  ehci_link_t * const framelist  = ehci_data.period_framelist;
-  ehci_link_t * const period_1ms = get_period_head(rhport, 1u);
-
+  // TODO EHCI_FRAMELIST_SIZE with other size than 8
   // all links --> period_head_arr[0] (1ms)
   // 0, 2, 4, 6 etc --> period_head_arr[1] (2ms)
   // 1, 5 --> period_head_arr[2] (4ms)
   // 3 --> period_head_arr[3] (8ms)
 
-  // TODO EHCI_FRAMELIST_SIZE with other size than 8
+  ehci_link_t * const framelist  = ehci_data.period_framelist;
+  ehci_link_t * const head_1ms = (ehci_link_t *) &ehci_data.period_head_arr[0];
+  ehci_link_t * const head_2ms = (ehci_link_t *) &ehci_data.period_head_arr[1];
+  ehci_link_t * const head_4ms = (ehci_link_t *) &ehci_data.period_head_arr[2];
+  ehci_link_t * const head_8ms = (ehci_link_t *) &ehci_data.period_head_arr[3];
+
   for (uint32_t i = 0; i < FRAMELIST_SIZE; i++) {
-    framelist[i].address = (uint32_t) period_1ms;
+    framelist[i].address = (uint32_t) head_1ms;
     framelist[i].type = EHCI_QTYPE_QHD;
   }
 
   for (uint32_t i = 0; i < FRAMELIST_SIZE; i += 2) {
-    list_insert(framelist + i, get_period_head(rhport, 2u), EHCI_QTYPE_QHD);
+    list_insert(framelist + i, head_2ms, EHCI_QTYPE_QHD);
   }
 
   for (uint32_t i = 1; i < FRAMELIST_SIZE; i += 4) {
-    list_insert(framelist + i, get_period_head(rhport, 4u), EHCI_QTYPE_QHD);
+    list_insert(framelist + i, head_4ms, EHCI_QTYPE_QHD);
   }
 
-  list_insert(framelist + 3, get_period_head(rhport, 8u), EHCI_QTYPE_QHD);
+  list_insert(framelist + 3, head_8ms, EHCI_QTYPE_QHD);
 
-  period_1ms->terminate    = 1;
+  head_1ms->terminate = 1;
 }
 
 bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
@@ -345,7 +326,7 @@ bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
                  EHCI_INT_MASK_NXP_PERIODIC | EHCI_INT_MASK_NXP_ASYNC | EHCI_INT_MASK_FRAMELIST_ROLLOVER;
 
   //------------- Asynchronous List -------------//
-  ehci_qhd_t * const async_head = qhd_async_head(rhport);
+  ehci_qhd_t * const async_head = list_get_async_head(rhport);
   tu_memclr(async_head, sizeof(ehci_qhd_t));
 
   async_head->next.address                    = (uint32_t) async_head; // circular list, next is itself
@@ -426,11 +407,11 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
   {
     case TUSB_XFER_CONTROL:
     case TUSB_XFER_BULK:
-      list_head = (ehci_link_t*) qhd_async_head(rhport);
+      list_head = (ehci_link_t*) list_get_async_head(rhport);
     break;
 
     case TUSB_XFER_INTERRUPT:
-      list_head = get_period_head(rhport, p_qhd->interval_ms);
+      list_head = list_get_period_head(rhport, p_qhd->interval_ms);
     break;
 
     case TUSB_XFER_ISOCHRONOUS:
@@ -439,10 +420,8 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
 
     default: break;
   }
-
   TU_ASSERT(list_head);
 
-  // TODO might need to disable async/period list
   list_insert(list_head, (ehci_link_t*) p_qhd, EHCI_QTYPE_QHD);
 
   hcd_dcache_clean(p_qhd, sizeof(ehci_qhd_t));
@@ -622,8 +601,8 @@ void async_list_xfer_complete_isr(ehci_qhd_t * const async_head)
 TU_ATTR_ALWAYS_INLINE static inline
 void period_list_xfer_complete_isr(uint8_t rhport, uint32_t interval_ms)
 {
-  uint32_t const period_1ms_addr = (uint32_t) get_period_head(rhport, 1u);
-  ehci_link_t next_link = * get_period_head(rhport, interval_ms);
+  uint32_t const period_1ms_addr = (uint32_t) list_get_period_head(rhport, 1u);
+  ehci_link_t next_link = *list_get_period_head(rhport, interval_ms);
 
   while (!next_link.terminate) {
     if (interval_ms > 1 && period_1ms_addr == tu_align32(next_link.address)) {
@@ -721,7 +700,7 @@ TU_ATTR_ALWAYS_INLINE static inline
 void xfer_error_isr(uint8_t rhport)
 {
   //------------- async list -------------//
-  ehci_qhd_t * const async_head = qhd_async_head(rhport);
+  ehci_qhd_t * const async_head = list_get_async_head(rhport);
   ehci_qhd_t *p_qhd = async_head;
   do
   {
@@ -731,10 +710,10 @@ void xfer_error_isr(uint8_t rhport)
   }while(p_qhd != async_head); // async list traversal, stop if loop around
 
   //------------- TODO refractor period list -------------//
-  uint32_t const period_1ms_addr = (uint32_t) get_period_head(rhport, 1u);
+  uint32_t const period_1ms_addr = (uint32_t) list_get_period_head(rhport, 1u);
   for (uint32_t interval_ms=1; interval_ms <= FRAMELIST_SIZE; interval_ms *= 2)
   {
-    ehci_link_t next_item = * get_period_head(rhport, interval_ms);
+    ehci_link_t next_item = *list_get_period_head(rhport, interval_ms);
 
     // TODO abstract max loop guard for period
     while( !next_item.terminate &&
@@ -801,7 +780,7 @@ void hcd_int_handler(uint8_t rhport)
 
   //------------- some QTD/SITD/ITD with IOC set is completed -------------//
   if (int_status & EHCI_INT_MASK_NXP_ASYNC) {
-    async_list_xfer_complete_isr(qhd_async_head(rhport));
+    async_list_xfer_complete_isr(list_get_async_head(rhport));
     regs->status = EHCI_INT_MASK_NXP_ASYNC; // Acknowledge
   }
 
@@ -828,35 +807,62 @@ void hcd_int_handler(uint8_t rhport)
 }
 
 //--------------------------------------------------------------------+
-// HELPER
+// List Managing Helper
 //--------------------------------------------------------------------+
 
+// Get head of periodic list
+TU_ATTR_ALWAYS_INLINE static inline ehci_link_t* list_get_period_head(uint8_t rhport, uint32_t interval_ms) {
+  (void) rhport;
+  return (ehci_link_t*) &ehci_data.period_head_arr[ tu_log2( tu_min32(FRAMELIST_SIZE, interval_ms) ) ];
+}
 
-//------------- queue head helper -------------//
-static inline ehci_qhd_t* qhd_find_free (void)
+// Get head of async list
+TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* list_get_async_head(uint8_t rhport) {
+  (void) rhport;
+  return qhd_control(0); // control qhd of dev0 is used as async head
+}
+
+// insert at head
+static inline void list_insert(ehci_link_t *current, ehci_link_t *new, uint8_t new_type)
 {
-  for (uint32_t i=0; i<QHD_MAX; i++)
-  {
+  new->address = current->address;
+  current->address = ((uint32_t) new) | (new_type << 1);
+}
+
+static inline ehci_link_t* list_next(ehci_link_t const *p_link)
+{
+  return (ehci_link_t*) tu_align32(p_link->address);
+}
+
+//--------------------------------------------------------------------+
+// Queue Header helper
+//--------------------------------------------------------------------+
+
+// Get queue head for control transfer (always available)
+TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* qhd_control(uint8_t dev_addr) {
+  return &ehci_data.control[dev_addr].qhd;
+}
+
+// Find a free queue head
+TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t *qhd_find_free(void) {
+  for ( uint32_t i = 0; i < QHD_MAX; i++ ) {
     if ( !ehci_data.qhd_pool[i].used ) return &ehci_data.qhd_pool[i];
   }
-
   return NULL;
 }
 
-static inline ehci_qhd_t* qhd_next(ehci_qhd_t const * p_qhd)
-{
-  return (ehci_qhd_t*) tu_align32(p_qhd->next.address);
+// Next queue head link
+TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t *qhd_next(ehci_qhd_t const *p_qhd) {
+  return (ehci_qhd_t *) tu_align32(p_qhd->next.address);
 }
 
-static inline ehci_qhd_t* qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr)
-{
-  ehci_qhd_t* qhd_pool = ehci_data.qhd_pool;
+// Get queue head from address
+static ehci_qhd_t *qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr) {
+  ehci_qhd_t *qhd_pool = ehci_data.qhd_pool;
 
-  for(uint32_t i=0; i<QHD_MAX; i++)
-  {
+  for ( uint32_t i = 0; i < QHD_MAX; i++ ) {
     if ( (qhd_pool[i].dev_addr == dev_addr) &&
-          ep_addr == tu_edpt_addr(qhd_pool[i].ep_number, qhd_pool[i].pid) )
-    {
+         ep_addr == tu_edpt_addr(qhd_pool[i].ep_number, qhd_pool[i].pid) ) {
       return &qhd_pool[i];
     }
   }
@@ -864,6 +870,7 @@ static inline ehci_qhd_t* qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr)
   return NULL;
 }
 
+// Init queue head with endpoint descriptor
 static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc)
 {
   // address 0 is used as async head, which always on the list --> cannot be cleared (ehci halted otherwise)
@@ -938,6 +945,7 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c
   }
 }
 
+// Attach a TD to queue head
 static void qhd_attach_qtd(ehci_qhd_t *qhd, ehci_qtd_t *qtd) {
   qhd->attached_qtd = qtd;
   qhd->attached_buffer = qtd->buffer[0];
@@ -949,9 +957,16 @@ static void qhd_attach_qtd(ehci_qhd_t *qhd, ehci_qtd_t *qtd) {
   hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
 }
 
+//--------------------------------------------------------------------+
+// Queue TD helper
+//--------------------------------------------------------------------+
 
-//------------- TD helper -------------//
-static inline ehci_qtd_t *qtd_find_free(void) {
+// Get TD for control transfer (always available)
+TU_ATTR_ALWAYS_INLINE static inline ehci_qtd_t* qtd_control(uint8_t dev_addr) {
+  return &ehci_data.control[dev_addr].qtd;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline ehci_qtd_t *qtd_find_free(void) {
   for (uint32_t i = 0; i < QTD_MAX; i++) {
     if (!ehci_data.qtd_pool[i].used) return &ehci_data.qtd_pool[i];
   }
@@ -979,18 +994,4 @@ static void qtd_init(ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes)
   }
 }
 
-//------------- List Managing Helper -------------//
-
-// insert at head
-static inline void list_insert(ehci_link_t *current, ehci_link_t *new, uint8_t new_type)
-{
-  new->address = current->address;
-  current->address = ((uint32_t) new) | (new_type << 1);
-}
-
-static inline ehci_link_t* list_next(ehci_link_t const *p_link)
-{
-  return (ehci_link_t*) tu_align32(p_link->address);
-}
-
 #endif

From c122e9df73331fa60d1713c7cc4cf46251b0cd76 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 21 Jul 2023 19:06:36 +0700
Subject: [PATCH 521/691] implement hcd_edpt_abort_xfer() for EHCI, also move
 thing around a bit

---
 src/common/tusb_common.h |   2 +
 src/host/hcd.h           |   1 +
 src/host/usbh.c          |  10 +-
 src/host/usbh.h          |   1 +
 src/portable/ehci/ehci.c | 200 ++++++++++++++++++++++++---------------
 src/portable/ehci/ehci.h |  19 ++--
 6 files changed, 147 insertions(+), 86 deletions(-)

diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index 957491aa9..b3d9fc7cd 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -53,6 +53,8 @@
 #define U32_TO_U8S_LE(_u32)   TU_U32_BYTE0(_u32), TU_U32_BYTE1(_u32), TU_U32_BYTE2(_u32), TU_U32_BYTE3(_u32)
 
 #define TU_BIT(n)             (1UL << (n))
+
+// Generate a mask with bit from high (31) to low (0) set, e.g TU_GENMASK(3, 0) = 0b1111
 #define TU_GENMASK(h, l)      ( (UINT32_MAX << (l)) & (UINT32_MAX >> (31 - (h))) )
 
 //--------------------------------------------------------------------+
diff --git a/src/host/hcd.h b/src/host/hcd.h
index cbfffb349..90bfd79db 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -172,6 +172,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
 bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen);
 
 // Abort a queued transfer. Note: it can only abort transfer that has not been started
+// Return true if a queued transfer is aborted, false if there is no transfer to abort
 bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr);
 
 // Submit a special transfer to send 8-byte Setup Packet, when complete hcd_event_xfer_complete() must be invoked
diff --git a/src/host/usbh.c b/src/host/usbh.c
index bbf333d5f..15c48be47 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -718,9 +718,15 @@ bool tuh_edpt_abort_xfer(uint8_t daddr, uint8_t ep_addr) {
   uint8_t const dir   = tu_edpt_dir(ep_addr);
 
   // skip if not busy
-  if (!dev->ep_status[epnum][dir].busy) return true;
+  TU_VERIFY(dev->ep_status[epnum][dir].busy);
 
-  return hcd_edpt_abort_xfer(dev->rhport, daddr, ep_addr);
+  bool const ret = hcd_edpt_abort_xfer(dev->rhport, daddr, ep_addr);
+  if (ret) {
+    // mark as ready if transfer is aborted
+    dev->ep_status[epnum][dir].busy = false;
+  }
+
+  return ret;
 }
 
 //--------------------------------------------------------------------+
diff --git a/src/host/usbh.h b/src/host/usbh.h
index d765f6744..0d56f40c9 100644
--- a/src/host/usbh.h
+++ b/src/host/usbh.h
@@ -176,6 +176,7 @@ bool tuh_edpt_xfer(tuh_xfer_t* xfer);
 bool tuh_edpt_open(uint8_t daddr, tusb_desc_endpoint_t const * desc_ep);
 
 // Abort a queued transfer. Note: it can only abort transfer that has not been started
+// Return true if a queued transfer is aborted, false if there is no transfer to abort
 bool tuh_edpt_abort_xfer(uint8_t daddr, uint8_t ep_addr);
 
 // Set Configuration (control transfer)
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 0a26986d5..6388add08 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -48,8 +48,8 @@
 #ifdef TUP_USBIP_CHIPIDEA_HS
   // NXP Transdimension: 8 elements
   #define FRAMELIST_SIZE_BIT_VALUE      7u
-  #define FRAMELIST_SIZE_USBCMD_VALUE   (((FRAMELIST_SIZE_BIT_VALUE &  3) << EHCI_USBCMD_POS_FRAMELIST_SIZE) | \
-                                         ((FRAMELIST_SIZE_BIT_VALUE >> 2) << EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB))
+  #define FRAMELIST_SIZE_USBCMD_VALUE   (((FRAMELIST_SIZE_BIT_VALUE &  3) << EHCI_USBCMD_FRAMELIST_SIZE_SHIFT) | \
+                                         ((FRAMELIST_SIZE_BIT_VALUE >> 2) << EHCI_USBCMD_CHIPIDEA_FRAMELIST_SIZE_MSB_SHIFT))
 #else
   // STD EHCI: 256 elements
   #define FRAMELIST_SIZE_BIT_VALUE      2u
@@ -132,24 +132,46 @@ TU_ATTR_WEAK void hcd_dcache_clean(void const* addr, uint32_t data_size) { (void
 TU_ATTR_WEAK void hcd_dcache_invalidate(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; }
 TU_ATTR_WEAK void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; }
 
-TU_ATTR_ALWAYS_INLINE static inline ehci_link_t* list_get_period_head(uint8_t rhport, uint32_t interval_ms);
-TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* list_get_async_head(uint8_t rhport);
-
 TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* qhd_control(uint8_t dev_addr);
 TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* qhd_next (ehci_qhd_t const * p_qhd);
 TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* qhd_find_free (void);
 static ehci_qhd_t* qhd_get_from_addr (uint8_t dev_addr, uint8_t ep_addr);
 static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);
 static void qhd_attach_qtd(ehci_qhd_t *qhd, ehci_qtd_t *qtd);
+static void qhd_remove_qtd(ehci_qhd_t *qhd);
 
 TU_ATTR_ALWAYS_INLINE static inline ehci_qtd_t* qtd_control(uint8_t dev_addr);
 TU_ATTR_ALWAYS_INLINE static inline ehci_qtd_t* qtd_find_free (void);
 static void qtd_init (ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes);
 
-static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type);
-static inline ehci_link_t* list_next (ehci_link_t const *p_link);
+TU_ATTR_ALWAYS_INLINE static inline ehci_link_t* list_get_period_head(uint8_t rhport, uint32_t interval_ms);
+TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* list_get_async_head(uint8_t rhport);
+TU_ATTR_ALWAYS_INLINE static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type);
+TU_ATTR_ALWAYS_INLINE static inline ehci_link_t* list_next (ehci_link_t const *p_link);
 static void list_remove_qhd_by_daddr(ehci_link_t* list_head, uint8_t dev_addr);
 
+static void ehci_disable_schedule(ehci_registers_t* regs, bool is_period) {
+  // maybe have a timeout for status
+  if (is_period) {
+    regs->command_bm.periodic_enable = 0;
+    while(regs->status_bm.periodic_status) {}
+  } else {
+    regs->command_bm.async_enable = 0;
+    while(regs->status_bm.async_status) {} // should have a timeout
+  }
+}
+
+static void ehci_enable_schedule(ehci_registers_t* regs, bool is_period) {
+  // maybe have a timeout for status
+  if (is_period) {
+    regs->command_bm.periodic_enable = 1;
+    while ( 0 == regs->status_bm.periodic_status ) {}
+  } else {
+    regs->command_bm.async_enable = 1;
+    while( 0 == regs->status_bm.async_status ) {}
+  }
+}
+
 //--------------------------------------------------------------------+
 // HCD API
 //--------------------------------------------------------------------+
@@ -204,43 +226,6 @@ tusb_speed_t hcd_port_speed_get(uint8_t rhport)
   return (tusb_speed_t) ehci_data.regs->portsc_bm.nxp_port_speed; // NXP specific port speed
 }
 
-static void list_remove_qhd_by_daddr(ehci_link_t* list_head, uint8_t dev_addr) {
-  ehci_link_t* prev = list_head;
-
-  while (prev && !prev->terminate) {
-    ehci_qhd_t* qhd = (ehci_qhd_t*) (uintptr_t) list_next(prev);
-
-    // done if loop back to head
-    if ( (uintptr_t) qhd == (uintptr_t) list_head) {
-      break;
-    }
-
-    if ( qhd->dev_addr == dev_addr ) {
-      // TODO deactivate all TD, wait for QHD to inactive before removal
-      prev->address = qhd->next.address;
-
-      // EHCI 4.8.2 link the removed qhd's next to async head (which always reachable by Host Controller)
-      qhd->next.address = ((uint32_t) list_head) | (EHCI_QTYPE_QHD << 1);
-
-      if ( qhd->int_smask )
-      {
-        // period list queue element is guarantee to be free in the next frame (1 ms)
-        qhd->used = 0;
-      }else
-      {
-        // async list use async advance handshake
-        // mark as removing, will completely re-usable when async advance isr occurs
-        qhd->removing = 1;
-      }
-
-      hcd_dcache_clean(qhd, sizeof(ehci_qhd_t));
-      hcd_dcache_clean(prev, sizeof(ehci_qhd_t));
-    }else {
-      prev = list_next(prev);
-    }
-  }
-}
-
 // Close all opened endpoint belong to this device
 void hcd_device_close(uint8_t rhport, uint8_t daddr)
 {
@@ -347,8 +332,7 @@ bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
   regs->nxp_tt_control = 0;
 
   //------------- USB CMD Register -------------//
-  regs->command |= TU_BIT(EHCI_USBCMD_POS_RUN_STOP) | TU_BIT(EHCI_USBCMD_POS_ASYNC_ENABLE) |
-                   TU_BIT(EHCI_USBCMD_POS_PERIOD_ENABLE) |  // TODO enable period list only there is int/iso endpoint
+  regs->command |= EHCI_USBCMD_RUN_STOP | EHCI_USBCMD_PERIOD_SCHEDULE_ENABLE | EHCI_USBCMD_ASYNC_SCHEDULE_ENABLE |
                    FRAMELIST_SIZE_USBCMD_VALUE;
 
   //------------- ConfigFlag Register (skip) -------------//
@@ -358,7 +342,7 @@ bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
   if (ehci_data.cap_regs->hcsparams_bm.port_power_control) {
     // mask out all change bits since they are Write 1 to clear
     uint32_t portsc = (regs->portsc & ~EHCI_PORTSC_MASK_W1C);
-    portsc |= ECHI_PORTSC_MASK_PORT_POWER;
+    portsc |= EHCI_PORTSC_MASK_PORT_POWER;
 
     regs->portsc = portsc;
   }
@@ -455,20 +439,17 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
   uint8_t const epnum = tu_edpt_number(ep_addr);
   uint8_t const dir   = tu_edpt_dir(ep_addr);
 
-  ehci_qhd_t* qhd;
+  ehci_qhd_t* qhd = qhd_get_from_addr(dev_addr, ep_addr);
   ehci_qtd_t* qtd;
 
   if (epnum == 0) {
-    qhd = qhd_control(dev_addr);
     qtd = qtd_control(dev_addr);
-
     qtd_init(qtd, buffer, buflen);
 
     // first data toggle is always 1 (data & setup stage)
     qtd->data_toggle = 1;
     qtd->pid = dir ? EHCI_PID_IN : EHCI_PID_OUT;
   } else {
-    qhd = qhd_get_from_addr(dev_addr, ep_addr);
     qtd = qtd_find_free();
     TU_ASSERT(qtd);
 
@@ -491,20 +472,34 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
 
 bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
   (void) rhport;
-  (void) dev_addr;
-  (void) ep_addr;
 
-  return false;
+  // TODO ISO not supported yet
+  ehci_qhd_t* qhd = qhd_get_from_addr(dev_addr, ep_addr);
+  ehci_qtd_t * volatile qtd = qhd->attached_qtd;
+  TU_VERIFY(qtd != NULL); // no queued transfer
 
-//  uint8_t const epnum = tu_edpt_number(ep_addr);
-//  ehci_qhd_t* qhd;
-//
-//  // TODO ISO not supported
-//  if (epnum == 0) {
-//    qhd = qhd_control(dev_addr);
-//  }else {
-//    qhd = qhd_get_from_addr(dev_addr, ep_addr);
-//  }
+  hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
+  TU_VERIFY(qtd->active); // transfer is already complete
+
+  // HC is still processing, disable HC list schedule before making changes
+  bool const is_period = (qhd->interval_ms > 0);
+
+  ehci_disable_schedule(ehci_data.regs, is_period);
+
+  // check active bit again just in case HC has just processed the TD
+  bool const still_active = qtd->active;
+  if (still_active) {
+    // remove TD from QH overlay
+    qhd->qtd_overlay.next.terminate = 1;
+    hcd_dcache_clean(qhd, sizeof(ehci_qhd_t));
+
+    // remove TD from QH software list
+    qhd_remove_qtd(qhd);
+  }
+
+  ehci_enable_schedule(ehci_data.regs, is_period);
+
+  return still_active; // true if removed an active transfer
 }
 
 bool hcd_edpt_clear_stall(uint8_t daddr, uint8_t ep_addr)
@@ -554,8 +549,12 @@ void port_connect_status_change_isr(uint8_t rhport)
 TU_ATTR_ALWAYS_INLINE static inline
 void qhd_xfer_complete_isr(ehci_qhd_t * qhd) {
   // examine TD attached to queue head
-  ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) qhd->attached_qtd;
-  if (qtd == NULL) return; // no TD attached
+  ehci_qtd_t * volatile qtd = qhd->attached_qtd;
+
+  if (qtd == NULL) {
+    return; // no TD attached
+  }
+
   hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
 
   // TD is still active, no need to process
@@ -572,9 +571,7 @@ void qhd_xfer_complete_isr(ehci_qhd_t * qhd) {
   }
 
   // remove and free TD before invoking callback
-  qhd->attached_qtd = NULL;
-  qhd->attached_buffer = 0;
-  qtd->used = 0; // free QTD
+  qhd_remove_qtd(qhd);
 
   // notify usbh
   uint8_t const ep_addr = tu_edpt_addr(qhd->ep_number, dir);
@@ -677,9 +674,7 @@ void qhd_xfer_error_isr(ehci_qhd_t * qhd)
     }
 
     // remove and free TD before invoking callback
-    qhd->attached_qtd = NULL;
-    qhd->attached_buffer = 0;
-    qtd->used = 0; // free QTD
+    qhd_remove_qtd(qhd);
 
     if (0 == qhd->ep_number ) {
       // control cannot be halted
@@ -822,18 +817,55 @@ TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* list_get_async_head(uint8_t rhpo
   return qhd_control(0); // control qhd of dev0 is used as async head
 }
 
-// insert at head
-static inline void list_insert(ehci_link_t *current, ehci_link_t *new, uint8_t new_type)
+TU_ATTR_ALWAYS_INLINE static inline ehci_link_t* list_next(ehci_link_t const *p_link) {
+  return (ehci_link_t*) tu_align32(p_link->address);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void list_insert(ehci_link_t *current, ehci_link_t *new, uint8_t new_type)
 {
   new->address = current->address;
   current->address = ((uint32_t) new) | (new_type << 1);
 }
 
-static inline ehci_link_t* list_next(ehci_link_t const *p_link)
-{
-  return (ehci_link_t*) tu_align32(p_link->address);
+// Remove all queue head belong to this device address
+static void list_remove_qhd_by_daddr(ehci_link_t* list_head, uint8_t dev_addr) {
+  ehci_link_t* prev = list_head;
+
+  while (prev && !prev->terminate) {
+    ehci_qhd_t* qhd = (ehci_qhd_t*) (uintptr_t) list_next(prev);
+
+    // done if loop back to head
+    if ( (uintptr_t) qhd == (uintptr_t) list_head) {
+      break;
+    }
+
+    if ( qhd->dev_addr == dev_addr ) {
+      // TODO deactivate all TD, wait for QHD to inactive before removal
+      prev->address = qhd->next.address;
+
+      // EHCI 4.8.2 link the removed qhd's next to async head (which always reachable by Host Controller)
+      qhd->next.address = ((uint32_t) list_head) | (EHCI_QTYPE_QHD << 1);
+
+      if ( qhd->int_smask )
+      {
+        // period list queue element is guarantee to be free in the next frame (1 ms)
+        qhd->used = 0;
+      }else
+      {
+        // async list use async advance handshake
+        // mark as removing, will completely re-usable when async advance isr occurs
+        qhd->removing = 1;
+      }
+
+      hcd_dcache_clean(qhd, sizeof(ehci_qhd_t));
+      hcd_dcache_clean(prev, sizeof(ehci_qhd_t));
+    }else {
+      prev = list_next(prev);
+    }
+  }
 }
 
+
 //--------------------------------------------------------------------+
 // Queue Header helper
 //--------------------------------------------------------------------+
@@ -856,8 +888,12 @@ TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t *qhd_next(ehci_qhd_t const *p_qhd
   return (ehci_qhd_t *) tu_align32(p_qhd->next.address);
 }
 
-// Get queue head from address
+// Get queue head from device + endpoint address
 static ehci_qhd_t *qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr) {
+  if ( 0 == tu_edpt_number(ep_addr) ) {
+    return qhd_control(dev_addr);
+  }
+
   ehci_qhd_t *qhd_pool = ehci_data.qhd_pool;
 
   for ( uint32_t i = 0; i < QHD_MAX; i++ ) {
@@ -957,6 +993,16 @@ static void qhd_attach_qtd(ehci_qhd_t *qhd, ehci_qtd_t *qtd) {
   hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
 }
 
+// Remove an attached TD from queue head
+static void qhd_remove_qtd(ehci_qhd_t *qhd) {
+  ehci_qtd_t * volatile qtd = qhd->attached_qtd;
+
+  qhd->attached_qtd = NULL;
+  qhd->attached_buffer = 0;
+
+  qtd->used = 0; // free QTD
+}
+
 //--------------------------------------------------------------------+
 // Queue TD helper
 //--------------------------------------------------------------------+
diff --git a/src/portable/ehci/ehci.h b/src/portable/ehci/ehci.h
index 8338fb419..05de80539 100644
--- a/src/portable/ehci/ehci.h
+++ b/src/portable/ehci/ehci.h
@@ -289,12 +289,17 @@ enum {
 };
 
 enum {
-  EHCI_USBCMD_POS_RUN_STOP               = 0,
-  EHCI_USBCMD_POS_FRAMELIST_SIZE         = 2,
-  EHCI_USBCMD_POS_PERIOD_ENABLE          = 4,
-  EHCI_USBCMD_POS_ASYNC_ENABLE           = 5,
-  EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB = 15,
-  EHCI_USBCMD_POS_INTERRUPT_THRESHOLD    = 16
+  EHCI_USBCMD_FRAMELIST_SIZE_SHIFT              = 2, // [2..3]
+  EHCI_USBCMD_CHIPIDEA_FRAMELIST_SIZE_MSB_SHIFT = 15,
+  EHCI_USBCMD_INTERRUPT_THRESHOLD_SHIFT         = 16
+};
+
+enum {
+  EHCI_USBCMD_RUN_STOP                       = TU_BIT(0), // [0..0] 1 = Run, 0 = Stop
+  EHCI_USBCMD_HCRESET                        = TU_BIT(1), // [1..1] SW write 1 to reset HC, clear by HC when complete
+  EHCI_USBCMD_PERIOD_SCHEDULE_ENABLE         = TU_BIT(4), // [4..4] Enable periodic schedule
+  EHCI_USBCMD_ASYNC_SCHEDULE_ENABLE          = TU_BIT(5), // [5..5] Enable async schedule
+  EHCI_USBCMD_INTR_ON_ASYNC_ADVANCE_DOORBELL = TU_BIT(6), // [6..6] Tell HC to interrupt next time it advances async list. Clear by HC
 };
 
 enum {
@@ -306,7 +311,7 @@ enum {
   EHCI_PORTSC_MASK_FORCE_RESUME           = TU_BIT(6),
   EHCI_PORTSC_MASK_PORT_SUSPEND           = TU_BIT(7),
   EHCI_PORTSC_MASK_PORT_RESET             = TU_BIT(8),
-  ECHI_PORTSC_MASK_PORT_POWER             = TU_BIT(12),
+  EHCI_PORTSC_MASK_PORT_POWER             = TU_BIT(12),
 
   EHCI_PORTSC_MASK_W1C =
     EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE |

From a268e0b7a31a9b459913e29d04c7f576633f9078 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 24 Jul 2023 15:18:41 +0700
Subject: [PATCH 522/691] add lpc40 to cmake

---
 .github/workflows/cmake_arm.yml               |  2 +-
 .idea/cmake.xml                               |  1 +
 .idea/runConfigurations/lpc4088.xml           | 10 ++
 .../boards/ea4088_quickstart/board.cmake      |  9 ++
 hw/bsp/lpc40/boards/ea4088_quickstart/board.h | 39 ++++++++
 .../lpc40/boards/ea4088_quickstart/board.mk   |  8 ++
 .../boards/ea4088_quickstart}/lpc4088.ld      |  0
 .../{ea4088qs/ea4088qs.c => lpc40/family.c}   |  7 +-
 hw/bsp/lpc40/family.cmake                     | 99 +++++++++++++++++++
 hw/bsp/{ea4088qs/board.mk => lpc40/family.mk} | 24 ++---
 10 files changed, 179 insertions(+), 20 deletions(-)
 create mode 100644 .idea/runConfigurations/lpc4088.xml
 create mode 100644 hw/bsp/lpc40/boards/ea4088_quickstart/board.cmake
 create mode 100644 hw/bsp/lpc40/boards/ea4088_quickstart/board.h
 create mode 100644 hw/bsp/lpc40/boards/ea4088_quickstart/board.mk
 rename hw/bsp/{ea4088qs => lpc40/boards/ea4088_quickstart}/lpc4088.ld (100%)
 rename hw/bsp/{ea4088qs/ea4088qs.c => lpc40/family.c} (97%)
 create mode 100644 hw/bsp/lpc40/family.cmake
 rename hw/bsp/{ea4088qs/board.mk => lpc40/family.mk} (78%)

diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index 4d8cd5591..276360650 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -35,7 +35,7 @@ jobs:
           # Alphabetical order
           - 'imxrt'
           - 'kinetis_kl'
-          - 'lpc18'
+          - 'lpc18 lpc40'
           - 'lpc55'
           - 'mcx'
           - 'ra'
diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 788f70433..a4f9d7f6d 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -48,6 +48,7 @@
       <configuration PROFILE_NAME="ra6m1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m1_ek -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="ra6m5" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="rt1050 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1050_evkb -DLOG=1 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="ea4088 quickstart" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ea4088_quickstart -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/.idea/runConfigurations/lpc4088.xml b/.idea/runConfigurations/lpc4088.xml
new file mode 100644
index 000000000..89226ac30
--- /dev/null
+++ b/.idea/runConfigurations/lpc4088.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="lpc4088" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;lpc4088&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="ea4088 quickstart" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/hw/bsp/lpc40/boards/ea4088_quickstart/board.cmake b/hw/bsp/lpc40/boards/ea4088_quickstart/board.cmake
new file mode 100644
index 000000000..7f281d5f6
--- /dev/null
+++ b/hw/bsp/lpc40/boards/ea4088_quickstart/board.cmake
@@ -0,0 +1,9 @@
+set(JLINK_DEVICE LPC4088)
+set(PYOCD_TARGET LPC4088)
+set(NXPLINK_DEVICE LPC4088:LPC4088)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/lpc4088.ld)
+
+function(update_board TARGET)
+  # nothing to do
+endfunction()
diff --git a/hw/bsp/lpc40/boards/ea4088_quickstart/board.h b/hw/bsp/lpc40/boards/ea4088_quickstart/board.h
new file mode 100644
index 000000000..20e5bdf7f
--- /dev/null
+++ b/hw/bsp/lpc40/boards/ea4088_quickstart/board.h
@@ -0,0 +1,39 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef EA4088QS__BOARD_H
+#define EA4088QS__BOARD_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/hw/bsp/lpc40/boards/ea4088_quickstart/board.mk b/hw/bsp/lpc40/boards/ea4088_quickstart/board.mk
new file mode 100644
index 000000000..d0bb4fe8c
--- /dev/null
+++ b/hw/bsp/lpc40/boards/ea4088_quickstart/board.mk
@@ -0,0 +1,8 @@
+
+LD_FILE = $(BOARD_PATH)/lpc4088.ld
+
+# For flash-jlink target
+JLINK_DEVICE = LPC4088
+
+# flash using jlink
+flash: flash-jlink
diff --git a/hw/bsp/ea4088qs/lpc4088.ld b/hw/bsp/lpc40/boards/ea4088_quickstart/lpc4088.ld
similarity index 100%
rename from hw/bsp/ea4088qs/lpc4088.ld
rename to hw/bsp/lpc40/boards/ea4088_quickstart/lpc4088.ld
diff --git a/hw/bsp/ea4088qs/ea4088qs.c b/hw/bsp/lpc40/family.c
similarity index 97%
rename from hw/bsp/ea4088qs/ea4088qs.c
rename to hw/bsp/lpc40/family.c
index ace72fef0..3ea49d497 100644
--- a/hw/bsp/ea4088qs/ea4088qs.c
+++ b/hw/bsp/lpc40/family.c
@@ -25,7 +25,8 @@
  */
 
 #include "chip.h"
-#include "../board.h"
+#include "bsp/board.h"
+#include "board.h"
 
 //--------------------------------------------------------------------+
 // USB Interrupt Handler
@@ -49,6 +50,8 @@ void USB_IRQHandler(void)
 
 #define BUTTON_PORT   2
 #define BUTTON_PIN    10
+#define BUTTON_ACTIV_STATE 0
+
 
 /* System oscillator rate and RTC oscillator rate */
 const uint32_t OscRateIn = 12000000;
@@ -159,7 +162,7 @@ void board_led_write(bool state)
 uint32_t board_button_read(void)
 {
   // active low
-  return Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN) ? 0 : 1;
+  return BUTTON_ACTIV_STATE == Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN);
 }
 
 int board_uart_read(uint8_t* buf, int len)
diff --git a/hw/bsp/lpc40/family.cmake b/hw/bsp/lpc40/family.cmake
new file mode 100644
index 000000000..03caa4385
--- /dev/null
+++ b/hw/bsp/lpc40/family.cmake
@@ -0,0 +1,99 @@
+include_guard()
+
+set(SDK_DIR ${TOP}/hw/mcu/nxp/lpcopen/lpc40xx/lpc_chip_40xx)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS LPC18XX CACHE INTERNAL "")
+
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
+
+  add_library(${BOARD_TARGET} STATIC
+    ${SDK_DIR}/../gcc/cr_startup_lpc40xx.c
+    ${SDK_DIR}/src/chip_17xx_40xx.c
+    ${SDK_DIR}/src/clock_17xx_40xx.c
+    ${SDK_DIR}/src/fpu_init.c
+    ${SDK_DIR}/src/gpio_17xx_40xx.c
+    ${SDK_DIR}/src/iocon_17xx_40xx.c
+    ${SDK_DIR}/src/sysctl_17xx_40xx.c
+    ${SDK_DIR}/src/sysinit_17xx_40xx.c
+    ${SDK_DIR}/src/uart_17xx_40xx.c
+    )
+  target_compile_options(${BOARD_TARGET} PUBLIC
+    -nostdlib
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    __USE_LPCOPEN
+    CORE_M4
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${SDK_DIR}/inc
+    )
+
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      # nanolib
+      --specs=nosys.specs
+      --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_LPC40XX ${RTOS})
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_flash_jlink(${TARGET})
+  #family_flash_nxplink(${TARGET})
+endfunction()
diff --git a/hw/bsp/ea4088qs/board.mk b/hw/bsp/lpc40/family.mk
similarity index 78%
rename from hw/bsp/ea4088qs/board.mk
rename to hw/bsp/lpc40/family.mk
index e1e14b717..47d25b885 100644
--- a/hw/bsp/ea4088qs/board.mk
+++ b/hw/bsp/lpc40/family.mk
@@ -1,12 +1,11 @@
 DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
 
+MCU_DIR = hw/mcu/nxp/lpcopen/lpc40xx/lpc_chip_40xx
+include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m4
+
 CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m4 \
-  -mfloat-abi=hard \
-  -mfpu=fpv4-sp-d16 \
   -nostdlib \
   -DCORE_M4 \
   -D__USE_LPCOPEN \
@@ -17,31 +16,22 @@ CFLAGS += \
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=cast-qual
 
-MCU_DIR = hw/mcu/nxp/lpcopen/lpc40xx/lpc_chip_40xx
-
 # All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/lpc4088.ld
-
 SRC_C += \
 	src/portable/nxp/lpc17_40/dcd_lpc17_40.c \
 	$(MCU_DIR)/../gcc/cr_startup_lpc40xx.c \
 	$(MCU_DIR)/src/chip_17xx_40xx.c \
 	$(MCU_DIR)/src/clock_17xx_40xx.c \
+	$(MCU_DIR)/src/fpu_init.c \
 	$(MCU_DIR)/src/gpio_17xx_40xx.c \
 	$(MCU_DIR)/src/iocon_17xx_40xx.c \
 	$(MCU_DIR)/src/sysctl_17xx_40xx.c \
 	$(MCU_DIR)/src/sysinit_17xx_40xx.c \
 	$(MCU_DIR)/src/uart_17xx_40xx.c \
-	$(MCU_DIR)/src/fpu_init.c
 
 INC += \
-	$(TOP)/$(MCU_DIR)/inc
+	$(TOP)/$(MCU_DIR)/inc \
+	$(TOP)/$(BOARD_PATH)
 
 # For freeRTOS port source
 FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
-
-# For flash-jlink target
-JLINK_DEVICE = LPC4088
-
-# flash using jlink
-flash: flash-jlink

From ef49b93532a7360703ae87d36cf463169f86f20b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 24 Jul 2023 15:46:21 +0700
Subject: [PATCH 523/691] rename CFG_TUSB_MEM_SECTION to CFG_TUD_MEM_SECTION in
 device stack

CFG_TUD_MEM_SECTION is default to CFG_TUSB_MEM_SECTION
---
 hw/bsp/lpc40/family.cmake                     |  1 +
 hw/bsp/lpc40/family.mk                        |  3 +-
 lib/networking/rndis_reports.c                |  2 +-
 src/class/audio/audio_device.c                | 44 +++++++++----------
 src/class/bth/bth_device.c                    |  2 +-
 src/class/cdc/cdc_device.c                    |  2 +-
 src/class/dfu/dfu_device.c                    |  2 +-
 src/class/hid/hid_device.c                    |  2 +-
 src/class/midi/midi_device.c                  |  2 +-
 src/class/msc/msc_device.c                    |  4 +-
 src/class/net/ecm_rndis_device.c              | 12 ++---
 src/class/net/ncm_device.c                    |  6 +--
 src/class/usbtmc/usbtmc_device.c              |  2 +-
 src/class/vendor/vendor_device.c              |  2 +-
 src/class/video/video_device.c                |  4 +-
 src/device/usbd_control.c                     |  2 +-
 src/portable/bridgetek/ft9xx/dcd_ft9xx.c      |  2 +-
 src/portable/chipidea/ci_fs/dcd_ci_fs.c       |  2 +-
 src/portable/chipidea/ci_hs/dcd_ci_hs.c       |  2 +-
 src/portable/microchip/pic/dcd_pic.c          |  2 +-
 src/portable/microchip/samx7x/dcd_samx7x.c    |  2 +-
 .../mindmotion/mm32/dcd_mm32f327x_otg.c       |  2 +-
 src/portable/nxp/khci/dcd_khci.c              |  2 +-
 src/portable/nxp/lpc17_40/dcd_lpc17_40.c      |  2 +-
 src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c  |  6 +--
 src/tusb_option.h                             | 42 +++++-------------
 26 files changed, 68 insertions(+), 88 deletions(-)

diff --git a/hw/bsp/lpc40/family.cmake b/hw/bsp/lpc40/family.cmake
index 03caa4385..54410e1a7 100644
--- a/hw/bsp/lpc40/family.cmake
+++ b/hw/bsp/lpc40/family.cmake
@@ -38,6 +38,7 @@ function(add_board_target BOARD_TARGET)
   target_compile_definitions(${BOARD_TARGET} PUBLIC
     __USE_LPCOPEN
     CORE_M4
+    CFG_TUSB_MEM_SECTION=__attribute__\(\(section\(\".data.$RAM2\"\)\)\)
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${SDK_DIR}/inc
diff --git a/hw/bsp/lpc40/family.mk b/hw/bsp/lpc40/family.mk
index 47d25b885..0fc7095f5 100644
--- a/hw/bsp/lpc40/family.mk
+++ b/hw/bsp/lpc40/family.mk
@@ -9,8 +9,7 @@ CFLAGS += \
   -nostdlib \
   -DCORE_M4 \
   -D__USE_LPCOPEN \
-  -DCFG_TUD_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
-  -DCFG_TUH_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
+  -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
   -DCFG_TUSB_MCU=OPT_MCU_LPC40XX
 
 # mcu driver cause following warnings
diff --git a/lib/networking/rndis_reports.c b/lib/networking/rndis_reports.c
index cc14f174c..60afb8615 100644
--- a/lib/networking/rndis_reports.c
+++ b/lib/networking/rndis_reports.c
@@ -43,7 +43,7 @@ static usb_eth_stat_t usb_eth_stat = { 0, 0, 0, 0 };
 static uint32_t oid_packet_filter = 0x0000000;
 static rndis_state_t rndis_state;
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN static uint8_t ndis_report[8] = { 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
+CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN static uint8_t ndis_report[8] = { 0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
 
 static const uint32_t OIDSupportedList[] =
 {
diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index e5dbe988a..1a7ce7870 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -113,21 +113,21 @@
 // EP IN software buffers and mutexes
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && !CFG_TUD_AUDIO_ENABLE_ENCODING
   #if CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ > 0
-    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ];
+    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t ep_in_ff_mutex_wr_1; // No need for read mutex as only USB driver reads from FIFO
     #endif
   #endif // CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ > 0
 
   #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ > 0
-    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ];
+    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t ep_in_ff_mutex_wr_2; // No need for read mutex as only USB driver reads from FIFO
     #endif
   #endif // CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ > 0
 
   #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ > 0
-    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ];
+    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t ep_in_ff_mutex_wr_3; // No need for read mutex as only USB driver reads from FIFO
     #endif
@@ -139,36 +139,36 @@
 // - the software encoding is used - in this case the linear buffers serve as a target memory where logical channels are encoded into
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_ENCODING)
   #if CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX > 0
-    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX];
+    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX];
   #endif
 
   #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX > 0
-    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX];
+    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SZ_MAX];
   #endif
 
   #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX > 0
-    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX];
+    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_in_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SZ_MAX];
   #endif
 #endif // CFG_TUD_AUDIO_ENABLE_EP_IN && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_DECODING)
 
 // EP OUT software buffers and mutexes
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING
   #if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ > 0
-    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ];
+    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t ep_out_ff_mutex_rd_1; // No need for write mutex as only USB driver writes into FIFO
     #endif
   #endif // CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ > 0
 
   #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ > 0
-    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ];
+    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t ep_out_ff_mutex_rd_2; // No need for write mutex as only USB driver writes into FIFO
     #endif
   #endif // CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ > 0
 
   #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ > 0
-    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ];
+    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t ep_out_ff_mutex_rd_3; // No need for write mutex as only USB driver writes into FIFO
     #endif
@@ -180,27 +180,27 @@
 // - the software encoding is used - in this case the linear buffers serve as a target memory where logical channels are encoded into
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_DECODING)
   #if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX > 0
-    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX];
+    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SZ_MAX];
   #endif
 
   #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX > 0
-    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX];
+    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SZ_MAX];
   #endif
 
   #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX > 0
-    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX];
+    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t lin_buf_out_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SZ_MAX];
   #endif
 #endif // CFG_TUD_AUDIO_ENABLE_EP_OUT && (USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_DECODING)
 
 // Control buffers
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_1[CFG_TUD_AUDIO_FUNC_1_CTRL_BUF_SZ];
+CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_1[CFG_TUD_AUDIO_FUNC_1_CTRL_BUF_SZ];
 
 #if CFG_TUD_AUDIO > 1
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_2[CFG_TUD_AUDIO_FUNC_2_CTRL_BUF_SZ];
+CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_2[CFG_TUD_AUDIO_FUNC_2_CTRL_BUF_SZ];
 #endif
 
 #if CFG_TUD_AUDIO > 2
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_3[CFG_TUD_AUDIO_FUNC_3_CTRL_BUF_SZ];
+CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t ctrl_buf_3[CFG_TUD_AUDIO_FUNC_3_CTRL_BUF_SZ];
 #endif
 
 // Active alternate setting of interfaces
@@ -217,7 +217,7 @@ uint8_t alt_setting_3[CFG_TUD_AUDIO_FUNC_3_N_AS_INT];
 // Software encoding/decoding support FIFOs
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_ENCODING
   #if CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ > 0
-    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ];
+    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ];
     tu_fifo_t tx_supp_ff_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t tx_supp_ff_mutex_wr_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO
@@ -225,7 +225,7 @@ uint8_t alt_setting_3[CFG_TUD_AUDIO_FUNC_3_N_AS_INT];
   #endif
 
   #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ > 0
-    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ];
+    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ];
     tu_fifo_t tx_supp_ff_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t tx_supp_ff_mutex_wr_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO
@@ -233,7 +233,7 @@ uint8_t alt_setting_3[CFG_TUD_AUDIO_FUNC_3_N_AS_INT];
   #endif
 
   #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ > 0
-    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ];
+    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ];
     tu_fifo_t tx_supp_ff_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t tx_supp_ff_mutex_wr_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO
@@ -243,7 +243,7 @@ uint8_t alt_setting_3[CFG_TUD_AUDIO_FUNC_3_N_AS_INT];
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING
   #if CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ > 0
-    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ];
+    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ];
     tu_fifo_t rx_supp_ff_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t rx_supp_ff_mutex_rd_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO
@@ -251,7 +251,7 @@ uint8_t alt_setting_3[CFG_TUD_AUDIO_FUNC_3_N_AS_INT];
   #endif
 
   #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ > 0
-    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ];
+    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ];
     tu_fifo_t rx_supp_ff_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t rx_supp_ff_mutex_rd_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO
@@ -259,7 +259,7 @@ uint8_t alt_setting_3[CFG_TUD_AUDIO_FUNC_3_N_AS_INT];
   #endif
 
   #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ > 0
-    CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ];
+    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ];
     tu_fifo_t rx_supp_ff_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t rx_supp_ff_mutex_rd_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO
@@ -416,7 +416,7 @@ typedef struct
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
-CFG_TUSB_MEM_SECTION audiod_function_t _audiod_fct[CFG_TUD_AUDIO];
+CFG_TUD_MEM_SECTION audiod_function_t _audiod_fct[CFG_TUD_AUDIO];
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT
 static bool audiod_rx_done_cb(uint8_t rhport, audiod_function_t* audio, uint16_t n_bytes_received);
diff --git a/src/class/bth/bth_device.c b/src/class/bth/bth_device.c
index f96bb3552..c5c74d26a 100755
--- a/src/class/bth/bth_device.c
+++ b/src/class/bth/bth_device.c
@@ -55,7 +55,7 @@ typedef struct
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
-CFG_TUSB_MEM_SECTION btd_interface_t _btd_itf;
+CFG_TUD_MEM_SECTION btd_interface_t _btd_itf;
 
 static bool bt_tx_data(uint8_t ep, void *data, uint16_t len)
 {
diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c
index 5adce521d..f658df4d0 100644
--- a/src/class/cdc/cdc_device.c
+++ b/src/class/cdc/cdc_device.c
@@ -76,7 +76,7 @@ typedef struct
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
-CFG_TUSB_MEM_SECTION tu_static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
+CFG_TUD_MEM_SECTION tu_static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
 
 static bool _prep_out_transaction (cdcd_interface_t* p_cdc)
 {
diff --git a/src/class/dfu/dfu_device.c b/src/class/dfu/dfu_device.c
index 464c4bd6b..bffdb8376 100644
--- a/src/class/dfu/dfu_device.c
+++ b/src/class/dfu/dfu_device.c
@@ -56,7 +56,7 @@ typedef struct
 } dfu_state_ctx_t;
 
 // Only a single dfu state is allowed
-CFG_TUSB_MEM_SECTION tu_static dfu_state_ctx_t _dfu_ctx;
+CFG_TUD_MEM_SECTION tu_static dfu_state_ctx_t _dfu_ctx;
 
 static void reset_state(void)
 {
diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c
index 9240fe2ca..5637ea6b4 100644
--- a/src/class/hid/hid_device.c
+++ b/src/class/hid/hid_device.c
@@ -58,7 +58,7 @@ typedef struct
   tusb_hid_descriptor_hid_t const * hid_descriptor;
 } hidd_interface_t;
 
-CFG_TUSB_MEM_SECTION tu_static hidd_interface_t _hidd_itf[CFG_TUD_HID];
+CFG_TUD_MEM_SECTION tu_static hidd_interface_t _hidd_itf[CFG_TUD_HID];
 
 /*------------- Helpers -------------*/
 static inline uint8_t get_index_by_itfnum(uint8_t itf_num)
diff --git a/src/class/midi/midi_device.c b/src/class/midi/midi_device.c
index e3e7826da..052372a93 100644
--- a/src/class/midi/midi_device.c
+++ b/src/class/midi/midi_device.c
@@ -82,7 +82,7 @@ typedef struct
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
-CFG_TUSB_MEM_SECTION midid_interface_t _midid_itf[CFG_TUD_MIDI];
+CFG_TUD_MEM_SECTION midid_interface_t _midid_itf[CFG_TUD_MIDI];
 
 bool tud_midi_n_mounted (uint8_t itf)
 {
diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c
index a409c4e27..a602e9672 100644
--- a/src/class/msc/msc_device.c
+++ b/src/class/msc/msc_device.c
@@ -74,8 +74,8 @@ typedef struct
   uint8_t add_sense_qualifier;
 }mscd_interface_t;
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static mscd_interface_t _mscd_itf;
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static uint8_t _mscd_buf[CFG_TUD_MSC_EP_BUFSIZE];
+CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static mscd_interface_t _mscd_itf;
+CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static uint8_t _mscd_buf[CFG_TUD_MSC_EP_BUFSIZE];
 
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
diff --git a/src/class/net/ecm_rndis_device.c b/src/class/net/ecm_rndis_device.c
index 8ac7cbd01..762425732 100644
--- a/src/class/net/ecm_rndis_device.c
+++ b/src/class/net/ecm_rndis_device.c
@@ -61,10 +61,10 @@ typedef struct
 #define CFG_TUD_NET_PACKET_PREFIX_LEN sizeof(rndis_data_packet_t)
 #define CFG_TUD_NET_PACKET_SUFFIX_LEN 0
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static
+CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static
 uint8_t received[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN];
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static
+CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static
 uint8_t transmitted[CFG_TUD_NET_PACKET_PREFIX_LEN + CFG_TUD_NET_MTU + CFG_TUD_NET_PACKET_PREFIX_LEN];
 
 struct ecm_notify_struct
@@ -94,8 +94,8 @@ tu_static const struct ecm_notify_struct ecm_notify_csc =
   .uplink = 9728000,
 };
 
-// TODO remove CFG_TUSB_MEM_SECTION, control internal buffer is already in this special section
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static union
+// TODO remove CFG_TUD_MEM_SECTION, control internal buffer is already in this special section
+CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static union
 {
   uint8_t rndis_buf[120];
   struct ecm_notify_struct ecm_buf;
@@ -104,8 +104,8 @@ CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static union
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
-// TODO remove CFG_TUSB_MEM_SECTION
-CFG_TUSB_MEM_SECTION tu_static netd_interface_t _netd_itf;
+// TODO remove CFG_TUD_MEM_SECTION
+CFG_TUD_MEM_SECTION tu_static netd_interface_t _netd_itf;
 
 tu_static bool can_xmit;
 
diff --git a/src/class/net/ncm_device.c b/src/class/net/ncm_device.c
index 9e9580249..611dc3348 100644
--- a/src/class/net/ncm_device.c
+++ b/src/class/net/ncm_device.c
@@ -130,7 +130,7 @@ typedef struct
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static const ntb_parameters_t ntb_parameters = {
+CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static const ntb_parameters_t ntb_parameters = {
     .wLength                 = sizeof(ntb_parameters_t),
     .bmNtbFormatsSupported   = 0x01,
     .dwNtbInMaxSize          = CFG_TUD_NCM_IN_NTB_MAX_SIZE,
@@ -145,9 +145,9 @@ CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static const ntb_parameters_t ntb_par
     .wNtbOutMaxDatagrams     = 0
 };
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static transmit_ntb_t transmit_ntb[2];
+CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static transmit_ntb_t transmit_ntb[2];
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static uint8_t receive_ntb[CFG_TUD_NCM_OUT_NTB_MAX_SIZE];
+CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN tu_static uint8_t receive_ntb[CFG_TUD_NCM_OUT_NTB_MAX_SIZE];
 
 tu_static ncm_interface_t ncm_interface;
 
diff --git a/src/class/usbtmc/usbtmc_device.c b/src/class/usbtmc/usbtmc_device.c
index 4e320a778..573654d58 100644
--- a/src/class/usbtmc/usbtmc_device.c
+++ b/src/class/usbtmc/usbtmc_device.c
@@ -143,7 +143,7 @@ typedef struct
   usbtmc_capabilities_specific_t const * capabilities;
 } usbtmc_interface_state_t;
 
-CFG_TUSB_MEM_SECTION tu_static usbtmc_interface_state_t usbtmc_state =
+CFG_TUD_MEM_SECTION tu_static usbtmc_interface_state_t usbtmc_state =
 {
     .itf_id = 0xFF,
 };
diff --git a/src/class/vendor/vendor_device.c b/src/class/vendor/vendor_device.c
index 93596ee33..389a29696 100644
--- a/src/class/vendor/vendor_device.c
+++ b/src/class/vendor/vendor_device.c
@@ -59,7 +59,7 @@ typedef struct
   CFG_TUSB_MEM_ALIGN uint8_t epin_buf[CFG_TUD_VENDOR_EPSIZE];
 } vendord_interface_t;
 
-CFG_TUSB_MEM_SECTION tu_static vendord_interface_t _vendord_itf[CFG_TUD_VENDOR];
+CFG_TUD_MEM_SECTION tu_static vendord_interface_t _vendord_itf[CFG_TUD_VENDOR];
 
 #define ITF_MEM_RESET_SIZE   offsetof(vendord_interface_t, rx_ff)
 
diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c
index 91f452afc..e6fadf41b 100644
--- a/src/class/video/video_device.c
+++ b/src/class/video/video_device.c
@@ -130,8 +130,8 @@ typedef struct TU_ATTR_PACKED {
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
-CFG_TUSB_MEM_SECTION tu_static videod_interface_t _videod_itf[CFG_TUD_VIDEO];
-CFG_TUSB_MEM_SECTION tu_static videod_streaming_interface_t _videod_streaming_itf[CFG_TUD_VIDEO_STREAMING];
+CFG_TUD_MEM_SECTION tu_static videod_interface_t _videod_itf[CFG_TUD_VIDEO];
+CFG_TUD_MEM_SECTION tu_static videod_streaming_interface_t _videod_streaming_itf[CFG_TUD_VIDEO_STREAMING];
 
 tu_static uint8_t const _cap_get     = 0x1u; /* support for GET */
 tu_static uint8_t const _cap_get_set = 0x3u; /* support for GET and SET */
diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c
index c580e6ecf..76d062e40 100644
--- a/src/device/usbd_control.c
+++ b/src/device/usbd_control.c
@@ -55,7 +55,7 @@ typedef struct
 
 tu_static usbd_control_xfer_t _ctrl_xfer;
 
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN
+CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN
 tu_static uint8_t _usbd_ctrl_buf[CFG_TUD_ENDPOINT0_SIZE];
 
 //--------------------------------------------------------------------+
diff --git a/src/portable/bridgetek/ft9xx/dcd_ft9xx.c b/src/portable/bridgetek/ft9xx/dcd_ft9xx.c
index 95dfda49c..f02415904 100644
--- a/src/portable/bridgetek/ft9xx/dcd_ft9xx.c
+++ b/src/portable/bridgetek/ft9xx/dcd_ft9xx.c
@@ -51,7 +51,7 @@ extern int8_t board_ft9xx_vbus(void);
 extern int board_uart_write(void const *buf, int len);
 
 // Static array to store an incoming SETUP request for processing by tinyusb.
-CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN
+CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN
 static uint8_t _ft9xx_setup_packet[8];
 
 struct ft9xx_xfer_state
diff --git a/src/portable/chipidea/ci_fs/dcd_ci_fs.c b/src/portable/chipidea/ci_fs/dcd_ci_fs.c
index 37265df8b..9327e09d8 100644
--- a/src/portable/chipidea/ci_fs/dcd_ci_fs.c
+++ b/src/portable/chipidea/ci_fs/dcd_ci_fs.c
@@ -116,7 +116,7 @@ typedef struct
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
 // BDT(Buffer Descriptor Table) must be 256-byte aligned
-CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(512) static dcd_data_t _dcd;
+CFG_TUD_MEM_SECTION TU_ATTR_ALIGNED(512) static dcd_data_t _dcd;
 
 TU_VERIFY_STATIC( sizeof(_dcd.bdt) == 512, "size is not correct" );
 
diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
index f50550d33..f9ec666e5 100644
--- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
@@ -175,7 +175,7 @@ typedef struct {
   dcd_qtd_t qtd[TUP_DCD_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(32);
 }dcd_data_t;
 
-CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(2048)
+CFG_TUD_MEM_SECTION TU_ATTR_ALIGNED(2048)
 static dcd_data_t _dcd_data;
 
 //--------------------------------------------------------------------+
diff --git a/src/portable/microchip/pic/dcd_pic.c b/src/portable/microchip/pic/dcd_pic.c
index 6986c8317..ccc27c3c9 100644
--- a/src/portable/microchip/pic/dcd_pic.c
+++ b/src/portable/microchip/pic/dcd_pic.c
@@ -189,7 +189,7 @@ typedef struct
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
 // BDT(Buffer Descriptor Table) must be 256-byte aligned
-CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(512) volatile static dcd_data_t _dcd;
+CFG_TUD_MEM_SECTION TU_ATTR_ALIGNED(512) volatile static dcd_data_t _dcd;
 
 #if TU_PIC_INT_SIZE == 4
 TU_VERIFY_STATIC( sizeof(_dcd.bdt) == 512, "size is not correct" );
diff --git a/src/portable/microchip/samx7x/dcd_samx7x.c b/src/portable/microchip/samx7x/dcd_samx7x.c
index 2bbb345d6..9586df84d 100644
--- a/src/portable/microchip/samx7x/dcd_samx7x.c
+++ b/src/portable/microchip/samx7x/dcd_samx7x.c
@@ -77,7 +77,7 @@ static tusb_speed_t get_speed(void);
 static void dcd_transmit_packet(xfer_ctl_t * xfer, uint8_t ep_ix);
 
 // DMA descriptors shouldn't be placed in ITCM !
-CFG_TUSB_MEM_SECTION static dma_desc_t dma_desc[6];
+CFG_TUD_MEM_SECTION static dma_desc_t dma_desc[6];
 
 static xfer_ctl_t xfer_status[EP_MAX];
 
diff --git a/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c b/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c
index 39b09db68..c3d0c7297 100644
--- a/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c
+++ b/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c
@@ -110,7 +110,7 @@ typedef struct
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
 // BDT(Buffer Descriptor Table) must be 256-byte aligned
-CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(512) static dcd_data_t _dcd;
+CFG_TUD_MEM_SECTION TU_ATTR_ALIGNED(512) static dcd_data_t _dcd;
 
 TU_VERIFY_STATIC( sizeof(_dcd.bdt) == 512, "size is not correct" );
 
diff --git a/src/portable/nxp/khci/dcd_khci.c b/src/portable/nxp/khci/dcd_khci.c
index 52f4145f2..5c65ea33d 100644
--- a/src/portable/nxp/khci/dcd_khci.c
+++ b/src/portable/nxp/khci/dcd_khci.c
@@ -114,7 +114,7 @@ typedef struct
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
 // BDT(Buffer Descriptor Table) must be 256-byte aligned
-CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(512) static dcd_data_t _dcd;
+CFG_TUD_MEM_SECTION TU_ATTR_ALIGNED(512) static dcd_data_t _dcd;
 
 TU_VERIFY_STATIC( sizeof(_dcd.bdt) == 512, "size is not correct" );
 
diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
index 86149afd8..b880c2870 100644
--- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
+++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
@@ -92,7 +92,7 @@ typedef struct
 
 } dcd_data_t;
 
-CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(128) static dcd_data_t _dcd;
+CFG_TUD_MEM_SECTION TU_ATTR_ALIGNED(128) static dcd_data_t _dcd;
 
 
 //--------------------------------------------------------------------+
diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
index 5368ef868..7ca698a93 100644
--- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
+++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
@@ -176,11 +176,11 @@ typedef struct
 // EP list must be 256-byte aligned
 //    Some MCU controller may require this variable to be placed in specific SRAM region.
 //    For example: LPC55s69 port1 Highspeed must be USB_RAM (0x40100000)
-//    Use CFG_TUSB_MEM_SECTION to place it accordingly.
-CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(256) static dcd_data_t _dcd;
+//    Use CFG_TUD_MEM_SECTION to place it accordingly.
+CFG_TUD_MEM_SECTION TU_ATTR_ALIGNED(256) static dcd_data_t _dcd;
 
 // Dummy buffer to fix ZLPs overwriting the buffer (probably an USB/DMA controller bug)
-CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(64) static uint8_t dummy[8];
+CFG_TUD_MEM_SECTION TU_ATTR_ALIGNED(64) static uint8_t dummy[8];
 
 //--------------------------------------------------------------------+
 // Multiple Controllers
diff --git a/src/tusb_option.h b/src/tusb_option.h
index c792efe6a..7a4cfe51c 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -295,15 +295,14 @@
   #define CFG_TUSB_DEBUG 0
 #endif
 
-// TODO MEM_SECTION can be different for host and device controller
-// should use CFG_TUD_MEM_SECTION, CFG_TUH_MEM_SECTION
+// Memory section for placing buffer used for usb transferring. If MEM_SECTION is different for
+// host and device use: CFG_TUD_MEM_SECTION, CFG_TUH_MEM_SECTION instead
 #ifndef CFG_TUSB_MEM_SECTION
   #define CFG_TUSB_MEM_SECTION
 #endif
 
-// alignment requirement of buffer used for endpoint transferring
-// TODO MEM_ALIGN can be different for host and device controller
-// should use CFG_TUD_MEM_ALIGN, CFG_TUH_MEM_ALIGN
+// Alignment requirement of buffer used for usb transferring. if MEM_ALIGN is different for
+// host and device controller use: CFG_TUD_MEM_ALIGN, CFG_TUH_MEM_ALIGN instead
 #ifndef CFG_TUSB_MEM_ALIGN
   #define CFG_TUSB_MEM_ALIGN      TU_ATTR_ALIGNED(4)
 #endif
@@ -321,24 +320,14 @@
 // Device Options (Default)
 //--------------------------------------------------------------------
 
-// Attribute to place data in accessible RAM for device controller
-// default to CFG_TUSB_MEM_SECTION for backward-compatible
+// Attribute to place data in accessible RAM for device controller (default: CFG_TUSB_MEM_SECTION)
 #ifndef CFG_TUD_MEM_SECTION
-  #ifdef CFG_TUSB_MEM_SECTION
-    #define CFG_TUD_MEM_SECTION   CFG_TUSB_MEM_SECTION
-  #else
-    #define CFG_TUD_MEM_SECTION
-  #endif
+  #define CFG_TUD_MEM_SECTION     CFG_TUSB_MEM_SECTION
 #endif
 
-// Attribute to align memory for device controller
-// default to CFG_TUSB_MEM_ALIGN for backward-compatible
+// Attribute to align memory for device controller (default: CFG_TUSB_MEM_ALIGN)
 #ifndef CFG_TUD_MEM_ALIGN
-  #ifdef CFG_TUSB_MEM_ALIGN
-    #define CFG_TUD_MEM_ALIGN   CFG_TUSB_MEM_ALIGN
-  #else
-    #define CFG_TUD_MEM_ALIGN   TU_ATTR_ALIGNED(4)
-  #endif
+  #define CFG_TUD_MEM_ALIGN       CFG_TUSB_MEM_ALIGN
 #endif
 
 #ifndef CFG_TUD_ENDPOINT0_SIZE
@@ -419,23 +408,14 @@
   #endif
 #endif // CFG_TUH_ENABLED
 
-// Attribute to place data in accessible RAM for host controller
-// default to CFG_TUSB_MEM_SECTION for backward-compatible
+// Attribute to place data in accessible RAM for host controller (default: CFG_TUSB_MEM_SECTION)
 #ifndef CFG_TUH_MEM_SECTION
-  #ifdef CFG_TUSB_MEM_SECTION
-    #define CFG_TUH_MEM_SECTION   CFG_TUSB_MEM_SECTION
-  #else
-    #define CFG_TUH_MEM_SECTION
-  #endif
+  #define CFG_TUH_MEM_SECTION   CFG_TUSB_MEM_SECTION
 #endif
 
 // Attribute to align memory for host controller
 #ifndef CFG_TUH_MEM_ALIGN
-  #ifdef CFG_TUSB_MEM_ALIGN
-    #define CFG_TUH_MEM_ALIGN   CFG_TUSB_MEM_ALIGN
-  #else
-    #define CFG_TUH_MEM_ALIGN   TU_ATTR_ALIGNED(4)
-  #endif
+  #define CFG_TUH_MEM_ALIGN     CFG_TUSB_MEM_ALIGN
 #endif
 
 //------------- CLASS -------------//

From 210fc7d038f6acf07d806c1cfab077123709b6b5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 24 Jul 2023 16:19:45 +0700
Subject: [PATCH 524/691] add etm trace pinmux for 4088 quickstart

---
 hw/bsp/lpc40/boards/ea4088_quickstart/board.h |  35 +++
 .../ozone/ea4088_quickstart.jdebug            | 238 ++++++++++++++++++
 hw/bsp/lpc40/family.c                         | 112 +++------
 3 files changed, 311 insertions(+), 74 deletions(-)
 create mode 100644 hw/bsp/lpc40/boards/ea4088_quickstart/ozone/ea4088_quickstart.jdebug

diff --git a/hw/bsp/lpc40/boards/ea4088_quickstart/board.h b/hw/bsp/lpc40/boards/ea4088_quickstart/board.h
index 20e5bdf7f..d5489c154 100644
--- a/hw/bsp/lpc40/boards/ea4088_quickstart/board.h
+++ b/hw/bsp/lpc40/boards/ea4088_quickstart/board.h
@@ -31,6 +31,41 @@
 extern "C" {
 #endif
 
+#define LED_PORT      2
+#define LED_PIN       19
+
+#define BUTTON_PORT   2
+#define BUTTON_PIN    10
+#define BUTTON_ACTIV_STATE 0
+
+/* System oscillator rate and RTC oscillator rate */
+const uint32_t OscRateIn = 12000000;
+const uint32_t RTCOscRateIn = 32768;
+
+/* Pin muxing configuration */
+static const PINMUX_GRP_T pinmuxing[] = {
+    // LED
+    { 2, 19, (IOCON_FUNC0 | IOCON_MODE_INACT) },
+
+    // Button
+    { 2, 10, (IOCON_FUNC0 | IOCON_MODE_INACT | IOCON_MODE_PULLUP) },
+
+    // USB1 as Host
+    { 0, 29, (IOCON_FUNC1 | IOCON_MODE_INACT) }, // D+1
+    { 0, 30, (IOCON_FUNC1 | IOCON_MODE_INACT) }, // D-1
+    { 1, 18, (IOCON_FUNC1 | IOCON_MODE_INACT) }, // UP LED1
+    { 1, 19, (IOCON_FUNC2 | IOCON_MODE_INACT) }, // PPWR1
+//  {2, 14, (IOCON_FUNC2 | IOCON_MODE_INACT)}, // VBUS1
+//  {2, 15, (IOCON_FUNC2 | IOCON_MODE_INACT)}, // OVRCR1
+
+    // USB2 as Device
+    { 0, 31, (IOCON_FUNC1 | IOCON_MODE_INACT) }, // D+2
+    { 0, 13, (IOCON_FUNC1 | IOCON_MODE_INACT) }, // UP LED
+    { 0, 14, (IOCON_FUNC3 | IOCON_MODE_INACT) }, // CONNECT2
+
+    /* VBUS is not connected on this board, so leave the pin at default setting. */
+    /*Chip_IOCON_PinMux(LPC_IOCON, 1, 30, IOCON_MODE_INACT, IOCON_FUNC2);*/ /* USB VBUS */
+};
 
 #ifdef __cplusplus
 }
diff --git a/hw/bsp/lpc40/boards/ea4088_quickstart/ozone/ea4088_quickstart.jdebug b/hw/bsp/lpc40/boards/ea4088_quickstart/ozone/ea4088_quickstart.jdebug
new file mode 100644
index 000000000..6aaf1076d
--- /dev/null
+++ b/hw/bsp/lpc40/boards/ea4088_quickstart/ozone/ea4088_quickstart.jdebug
@@ -0,0 +1,238 @@
+
+/*********************************************************************
+*
+*       OnProjectLoad
+*
+* Function description
+*   Project load routine. Required.
+*
+**********************************************************************
+*/
+void OnProjectLoad (void) {
+  Edit.SysVar (VAR_POWER_SAMPLING_SPEED, FREQ_100_KHZ);
+  Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-M4F.svd");
+  Project.AddSvdFile ("../../../../../../../cmsis-svd/data/NXP/LPC408x_7x_v0.7.svd");
+
+  Project.SetDevice ("LPC4088");
+  Project.SetHostIF ("USB", "");
+  Project.SetTargetIF ("SWD");
+  Project.SetTIFSpeed ("50 MHz");
+  Project.SetTraceSource ("Trace Pins");
+  Project.SetTracePortWidth (4);
+
+  // User settings
+  File.Open ("../../../../../../examples/device/cdc_msc/cmake-build-ea4088-quickstart/cdc_msc.elf");
+}
+
+/*********************************************************************
+*
+*      TargetReset
+*
+* Function description
+*   Replaces the default target device reset routine. Optional.
+*
+* Notes
+*   This example demonstrates the usage when
+*   debugging a RAM program on a Cortex-M target device
+*
+**********************************************************************
+*/
+//void TargetReset (void) {
+//
+//  unsigned int SP;
+//  unsigned int PC;
+//  unsigned int VectorTableAddr;
+//
+//  Exec.Reset();
+//
+//  VectorTableAddr = Elf.GetBaseAddr();
+//
+//  if (VectorTableAddr != 0xFFFFFFFF) {
+//
+//    Util.Log("Resetting Program.");
+//
+//    SP = Target.ReadU32(VectorTableAddr);
+//    Target.SetReg("SP", SP);
+//
+//    PC = Target.ReadU32(VectorTableAddr + 4);
+//    Target.SetReg("PC", PC);
+//  }
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetReset
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetReset (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetReset
+*
+* Function description
+*   Event handler routine.
+*    - Sets the PC register to program reset value.
+*    - Sets the SP register to program reset value on Cortex-M.
+*
+**********************************************************************
+*/
+void AfterTargetReset (void) {
+  unsigned int SP;
+  unsigned int PC;
+  unsigned int VectorTableAddr;
+
+  VectorTableAddr = Elf.GetBaseAddr();
+
+  if (VectorTableAddr == 0xFFFFFFFF) {
+    Util.Log("Project file error: failed to get program base");
+  } else {
+    SP = Target.ReadU32(VectorTableAddr);
+    Target.SetReg("SP", SP);
+
+    PC = Target.ReadU32(VectorTableAddr + 4);
+    Target.SetReg("PC", PC);
+  }
+}
+
+/*********************************************************************
+*
+*       DebugStart
+*
+* Function description
+*   Replaces the default debug session startup routine. Optional.
+*
+**********************************************************************
+*/
+//void DebugStart (void) {
+//}
+
+/*********************************************************************
+*
+*       TargetConnect
+*
+* Function description
+*   Replaces the default target IF connection routine. Optional.
+*
+**********************************************************************
+*/
+//void TargetConnect (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetConnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+void BeforeTargetConnect (void) {
+}
+
+/*********************************************************************
+*
+*       AfterTargetConnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetConnect (void) {
+//}
+
+/*********************************************************************
+*
+*       TargetDownload
+*
+* Function description
+*   Replaces the default program download routine. Optional.
+*
+**********************************************************************
+*/
+//void TargetDownload (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetDownload
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetDownload (void) {
+//}
+
+/*********************************************************************
+*
+*      AfterTargetDownload
+*
+* Function description
+*   Event handler routine.
+*    - Sets the PC register to program reset value.
+*    - Sets the SP register to program reset value on Cortex-M.
+*
+**********************************************************************
+*/
+void AfterTargetDownload (void) {
+  unsigned int SP;
+  unsigned int PC;
+  unsigned int VectorTableAddr;
+
+  VectorTableAddr = Elf.GetBaseAddr();
+
+  if (VectorTableAddr == 0xFFFFFFFF) {
+    Util.Log("Project file error: failed to get program base");
+  } else {
+    SP = Target.ReadU32(VectorTableAddr);
+    Target.SetReg("SP", SP);
+
+    PC = Target.ReadU32(VectorTableAddr + 4);
+    Target.SetReg("PC", PC);
+  }
+}
+
+/*********************************************************************
+*
+*       BeforeTargetDisconnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetDisconnect (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetDisconnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetDisconnect (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetHalt
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetHalt (void) {
+//}
diff --git a/hw/bsp/lpc40/family.c b/hw/bsp/lpc40/family.c
index 3ea49d497..829df4ac7 100644
--- a/hw/bsp/lpc40/family.c
+++ b/hw/bsp/lpc40/family.c
@@ -31,86 +31,54 @@
 //--------------------------------------------------------------------+
 // USB Interrupt Handler
 //--------------------------------------------------------------------+
-void USB_IRQHandler(void)
-{
+void USB_IRQHandler(void) {
   #if CFG_TUD_ENABLED
-    tud_int_handler(0);
+  tud_int_handler(0);
   #endif
 
   #if CFG_TUH_ENABLED
-    tuh_int_handler(0);
+  tuh_int_handler(0);
   #endif
 }
 
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM DECLARATION
 //--------------------------------------------------------------------+
-#define LED_PORT      2
-#define LED_PIN       19
-
-#define BUTTON_PORT   2
-#define BUTTON_PIN    10
-#define BUTTON_ACTIV_STATE 0
-
-
-/* System oscillator rate and RTC oscillator rate */
-const uint32_t OscRateIn = 12000000;
-const uint32_t RTCOscRateIn = 32768;
-
-/* Pin muxing configuration */
-static const PINMUX_GRP_T pinmuxing[] =
-{
-  // LED
-  {2, 19, (IOCON_FUNC0 | IOCON_MODE_INACT)},
-
-  // Button
-  {2, 10, (IOCON_FUNC0 | IOCON_MODE_INACT | IOCON_MODE_PULLUP)},
-};
-
-static const PINMUX_GRP_T pin_usb_mux[] =
-{
-  // USB1 as Host
-  {0, 29, (IOCON_FUNC1 | IOCON_MODE_INACT)}, // D+1
-  {0, 30, (IOCON_FUNC1 | IOCON_MODE_INACT)}, // D-1
-  {1, 18, (IOCON_FUNC1 | IOCON_MODE_INACT)}, // UP LED1
-  {1, 19, (IOCON_FUNC2 | IOCON_MODE_INACT)}, // PPWR1
-//  {2, 14, (IOCON_FUNC2 | IOCON_MODE_INACT)}, // VBUS1
-//  {2, 15, (IOCON_FUNC2 | IOCON_MODE_INACT)}, // OVRCR1
-
-  // USB2 as Device
-  {0, 31, (IOCON_FUNC1 | IOCON_MODE_INACT)}, // D+2
-  {0, 13, (IOCON_FUNC1 | IOCON_MODE_INACT)}, // UP LED
-  {0, 14, (IOCON_FUNC3 | IOCON_MODE_INACT)}, // CONNECT2
-
-  /* VBUS is not connected on this board, so leave the pin at default setting. */
-  /*Chip_IOCON_PinMux(LPC_IOCON, 1, 30, IOCON_MODE_INACT, IOCON_FUNC2);*/ /* USB VBUS */
-};
 
 // Invoked by startup code
-void SystemInit(void)
-{
+void SystemInit(void) {
 #ifdef __USE_LPCOPEN
-	extern void (* const g_pfnVectors[])(void);
+  extern void (*const g_pfnVectors[])(void);
   unsigned int *pSCB_VTOR = (unsigned int *) 0xE000ED08;
-	*pSCB_VTOR = (unsigned int) g_pfnVectors;
+  *pSCB_VTOR = (unsigned int) g_pfnVectors;
 
-#if __FPU_USED == 1
-	fpuInit();
-#endif
+  #if __FPU_USED == 1
+  fpuInit();
+  #endif
 #endif // __USE_LPCOPEN
 
   Chip_IOCON_Init(LPC_IOCON);
   Chip_IOCON_SetPinMuxing(LPC_IOCON, pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T));
 
-	/* CPU clock source starts with IRC */
-	/* Enable PBOOST for CPU clock over 100MHz */
-	Chip_SYSCTL_EnableBoost();
+#ifdef TRACE_ETM
+  const PINMUX_GRP_T trace_pinmux[] = {
+      {2, 2, IOCON_FUNC5 | IOCON_FASTSLEW_EN },
+      {2, 3, IOCON_FUNC5 | IOCON_FASTSLEW_EN },
+      {2, 4, IOCON_FUNC5 | IOCON_FASTSLEW_EN },
+      {2, 5, IOCON_FUNC5 | IOCON_FASTSLEW_EN },
+      {2, 6, IOCON_FUNC5 | IOCON_FASTSLEW_EN },
+  };
+  Chip_IOCON_SetPinMuxing(LPC_IOCON, trace_pinmux, sizeof(trace_pinmux) / sizeof(PINMUX_GRP_T));
+#endif
+
+  /* CPU clock source starts with IRC */
+  /* Enable PBOOST for CPU clock over 100MHz */
+  Chip_SYSCTL_EnableBoost();
 
   Chip_SetupXtalClocking();
 }
 
-void board_init(void)
-{
+void board_init(void) {
   SystemCoreClockUpdate();
 
 #if CFG_TUSB_OS == OPT_OS_NONE
@@ -132,15 +100,14 @@ void board_init(void)
   // UART
 
   //------------- USB -------------//
-  Chip_IOCON_SetPinMuxing(LPC_IOCON, pin_usb_mux, sizeof(pin_usb_mux) / sizeof(PINMUX_GRP_T));
 
   // Port1 as Host, Port2: Device
   Chip_USB_Init();
 
   enum {
     USBCLK_DEVCIE = 0x12, // AHB + Device
-    USBCLK_HOST = 0x19 ,  // AHB + OTG + Host
-    USBCLK_ALL  = 0x1B    // Host + Device + OTG + AHB
+    USBCLK_HOST = 0x19,  // AHB + OTG + Host
+    USBCLK_ALL = 0x1B    // Host + Device + OTG + AHB
   };
 
   LPC_USB->OTGClkCtrl = USBCLK_ALL;
@@ -154,40 +121,37 @@ void board_init(void)
 // Board porting API
 //--------------------------------------------------------------------+
 
-void board_led_write(bool state)
-{
+void board_led_write(bool state) {
   Chip_GPIO_SetPinState(LPC_GPIO, LED_PORT, LED_PIN, state);
 }
 
-uint32_t board_button_read(void)
-{
-  // active low
+uint32_t board_button_read(void) {
   return BUTTON_ACTIV_STATE == Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN);
 }
 
-int board_uart_read(uint8_t* buf, int len)
-{
+int board_uart_read(uint8_t *buf, int len) {
   //return UART_ReceiveByte(BOARD_UART_PORT);
-  (void) buf; (void) len;
+  (void) buf;
+  (void) len;
   return 0;
 }
 
-int board_uart_write(void const * buf, int len)
-{
+int board_uart_write(void const *buf, int len) {
   //UART_Send(BOARD_UART_PORT, &c, 1, BLOCKING);
-  (void) buf; (void) len;
+  (void) buf;
+  (void) len;
   return 0;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
+
+void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void)
-{
+uint32_t board_millis(void) {
   return system_ticks;
 }
+
 #endif

From 14a7379799418c6e8ffb7231ee1703a0f95665da Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 24 Jul 2023 16:54:02 +0700
Subject: [PATCH 525/691] fix ohci warnings, and add freertosconfig for lpc4088

---
 hw/bsp/lpc40/FreeRTOSConfig/FreeRTOSConfig.h | 165 +++++++++++++++++++
 hw/bsp/lpc40/family.cmake                    |   2 +
 src/portable/ohci/ohci.c                     |  25 +--
 3 files changed, 182 insertions(+), 10 deletions(-)
 create mode 100644 hw/bsp/lpc40/FreeRTOSConfig/FreeRTOSConfig.h

diff --git a/hw/bsp/lpc40/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/lpc40/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..96611ca1c
--- /dev/null
+++ b/hw/bsp/lpc40/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,165 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "chip.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               2
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       5
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/lpc40/family.cmake b/hw/bsp/lpc40/family.cmake
index 54410e1a7..56eb37a2f 100644
--- a/hw/bsp/lpc40/family.cmake
+++ b/hw/bsp/lpc40/family.cmake
@@ -88,6 +88,8 @@ function(family_configure_example TARGET RTOS)
   family_add_tinyusb(${TARGET} OPT_MCU_LPC40XX ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
+    ${TOP}/src/portable/nxp/lpc17_40/hcd_lpc17_40.c
+    ${TOP}/src/portable/ohci/ohci.c
     )
   target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 
diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index 3f702d22c..27080836c 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -341,19 +341,24 @@ static void ed_init(ohci_ed_t *p_ed, uint8_t dev_addr, uint16_t ep_size, uint8_t
   p_ed->is_interrupt_xfer = (xfer_type == TUSB_XFER_INTERRUPT ? 1 : 0);
 }
 
-static void gtd_init(ohci_gtd_t* p_td, uint8_t* data_ptr, uint16_t total_bytes)
-{
+static void gtd_init(ohci_gtd_t *p_td, uint8_t *data_ptr, uint16_t total_bytes) {
   tu_memclr(p_td, sizeof(ohci_gtd_t));
 
-  p_td->used                   = 1;
-  p_td->expected_bytes         = total_bytes;
+  p_td->used = 1;
+  p_td->expected_bytes = total_bytes;
 
-  p_td->buffer_rounding        = 1; // less than queued length is not a error
-  p_td->delay_interrupt        = OHCI_INT_ON_COMPLETE_NO;
-  p_td->condition_code         = OHCI_CCODE_NOT_ACCESSED;
+  p_td->buffer_rounding = 1; // less than queued length is not a error
+  p_td->delay_interrupt = OHCI_INT_ON_COMPLETE_NO;
+  p_td->condition_code = OHCI_CCODE_NOT_ACCESSED;
 
-  p_td->current_buffer_pointer = _phys_addr(data_ptr);
-  p_td->buffer_end             = total_bytes ? (_phys_addr(data_ptr + total_bytes - 1)) : (uint8_t *)p_td->current_buffer_pointer;
+  uint8_t *cbp = (uint8_t *) _phys_addr(data_ptr);
+
+  p_td->current_buffer_pointer = cbp;
+  if ( total_bytes ) {
+    p_td->buffer_end = _phys_addr(data_ptr + total_bytes - 1);
+  } else {
+    p_td->buffer_end = cbp;
+  }
 }
 
 static ohci_ed_t * ed_from_addr(uint8_t dev_addr, uint8_t ep_addr)
@@ -487,7 +492,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
   ohci_ed_t* ed   = &ohci_data.control[dev_addr].ed;
   ohci_gtd_t *qtd = &ohci_data.control[dev_addr].gtd;
 
-  gtd_init(qtd, (uint8_t*) setup_packet, 8);
+  gtd_init(qtd, (uint8_t*)(uintptr_t) setup_packet, 8);
   qtd->index           = dev_addr;
   qtd->pid             = PID_SETUP;
   qtd->data_toggle     = GTD_DT_DATA0;

From d2542560470de242dd8988d0b3c10d7df0496bb0 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 24 Jul 2023 17:54:24 +0700
Subject: [PATCH 526/691] change dcache clean/invalidate return type to bool

add tu_assert() check for aligned 32byte address for imxrt
---
 src/common/tusb_common.h                  | 13 +++++++------
 src/host/hcd.h                            |  8 ++++----
 src/portable/chipidea/ci_hs/ci_hs_imxrt.h | 15 +++++++++------
 src/portable/chipidea/ci_hs/hcd_ci_hs.c   | 12 ++++++------
 src/portable/ehci/ehci.c                  |  9 ++++++---
 5 files changed, 32 insertions(+), 25 deletions(-)

diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index 957491aa9..bae583c06 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -99,10 +99,9 @@ TU_ATTR_WEAK extern void* tusb_app_phys_to_virt(void *phys_addr);
 #define tu_varclr(_var)          tu_memclr(_var, sizeof(*(_var)))
 
 // This is a backport of memset_s from c11
-TU_ATTR_ALWAYS_INLINE static inline int tu_memset_s(void *dest, size_t destsz, int ch, size_t count)
-{
+TU_ATTR_ALWAYS_INLINE static inline int tu_memset_s(void *dest, size_t destsz, int ch, size_t count) {
   // TODO may check if desst and src is not NULL
-  if (count > destsz) {
+  if ( count > destsz ) {
     return -1;
   }
   memset(dest, ch, count);
@@ -110,10 +109,9 @@ TU_ATTR_ALWAYS_INLINE static inline int tu_memset_s(void *dest, size_t destsz, i
 }
 
 // This is a backport of memcpy_s from c11
-TU_ATTR_ALWAYS_INLINE static inline int tu_memcpy_s(void *dest, size_t destsz, const void * src, size_t count )
-{
+TU_ATTR_ALWAYS_INLINE static inline int tu_memcpy_s(void *dest, size_t destsz, const void *src, size_t count) {
   // TODO may check if desst and src is not NULL
-  if (count > destsz) {
+  if ( count > destsz ) {
     return -1;
   }
   memcpy(dest, src, count);
@@ -169,6 +167,9 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align32 (uint32_t value) { retur
 TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align4k (uint32_t value) { return (value & 0xFFFFF000UL); }
 TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_offset4k(uint32_t value) { return (value & 0xFFFUL); }
 
+TU_ATTR_ALWAYS_INLINE static inline bool tu_is_aligned32(uint32_t value) { return (value & 0x1FUL) == 0; }
+TU_ATTR_ALWAYS_INLINE static inline bool tu_is_aligned64(uint64_t value) { return (value & 0x3FUL) == 0; }
+
 //------------- Mathematics -------------//
 TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_div_ceil(uint32_t v, uint32_t d) { return (v + d -1)/d; }
 
diff --git a/src/host/hcd.h b/src/host/hcd.h
index 3355c18b2..52fcc834e 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -104,21 +104,21 @@ typedef struct
   uint8_t speed;
 } hcd_devtree_info_t;
 
-//--------------------------------------------------------------------+
+//--------------------------------------------------------------
 // Memory API
 //--------------------------------------------------------------------+
 
 // clean/flush data cache: write cache -> memory.
 // Required before an DMA TX transfer to make sure data is in memory
-void hcd_dcache_clean(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
+bool hcd_dcache_clean(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
 
 // invalidate data cache: mark cache as invalid, next read will read from memory
 // Required BOTH before and after an DMA RX transfer
-void hcd_dcache_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
+bool hcd_dcache_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
 
 // clean and invalidate data cache
 // Required before an DMA transfer where memory is both read/write by DMA
-void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
+bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) TU_ATTR_WEAK;
 
 //--------------------------------------------------------------------+
 // Controller API
diff --git a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h
index 96f0ba766..c59c107ff 100644
--- a/src/portable/chipidea/ci_hs/ci_hs_imxrt.h
+++ b/src/portable/chipidea/ci_hs/ci_hs_imxrt.h
@@ -68,31 +68,34 @@ TU_ATTR_ALWAYS_INLINE static inline bool imxrt_is_cache_mem(uintptr_t addr) {
   return !(0x20000000 <= addr && addr < 0x20100000);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean(void const* addr, uint32_t data_size) {
+TU_ATTR_ALWAYS_INLINE static inline bool imxrt_dcache_clean(void const* addr, uint32_t data_size) {
   const uintptr_t addr32 = (uintptr_t) addr;
   if (imxrt_is_cache_mem(addr32)) {
+    TU_ASSERT(tu_is_aligned32(addr32));
     SCB_CleanDCache_by_Addr((uint32_t *) addr32, (int32_t) data_size);
   }
+  return true;
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_invalidate(void const* addr, uint32_t data_size) {
+TU_ATTR_ALWAYS_INLINE static inline bool imxrt_dcache_invalidate(void const* addr, uint32_t data_size) {
   const uintptr_t addr32 = (uintptr_t) addr;
   if (imxrt_is_cache_mem(addr32)) {
     // Invalidating does not push cached changes back to RAM so we need to be
     // *very* careful when we do it. If we're not aligned, then we risk resetting
     // values back to their RAM state.
-    // if (addr32 % 32 != 0) {
-    //   TU_BREAKPOINT();
-    // }
+    TU_ASSERT(tu_is_aligned32(addr32));
     SCB_InvalidateDCache_by_Addr((void*) addr32, (int32_t) data_size);
   }
+  return true;
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void imxrt_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
+TU_ATTR_ALWAYS_INLINE static inline bool imxrt_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
   const uintptr_t addr32 = (uintptr_t) addr;
   if (imxrt_is_cache_mem(addr32)) {
+    TU_ASSERT(tu_is_aligned32(addr32));
     SCB_CleanInvalidateDCache_by_Addr((uint32_t *) addr32, (int32_t) data_size);
   }
+  return true;
 }
 
 #endif
diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
index 56167b8f6..6ee91e18e 100644
--- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
@@ -41,16 +41,16 @@
 #if CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX
   #include "ci_hs_imxrt.h"
 
-  void hcd_dcache_clean(void const* addr, uint32_t data_size) {
-    imxrt_dcache_clean(addr, data_size);
+  bool hcd_dcache_clean(void const* addr, uint32_t data_size) {
+    return imxrt_dcache_clean(addr, data_size);
   }
 
-  void hcd_dcache_invalidate(void const* addr, uint32_t data_size) {
-    imxrt_dcache_invalidate(addr, data_size);
+  bool hcd_dcache_invalidate(void const* addr, uint32_t data_size) {
+    return imxrt_dcache_invalidate(addr, data_size);
   }
 
-  void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
-    imxrt_dcache_clean_invalidate(addr, data_size);
+  bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
+    return imxrt_dcache_clean_invalidate(addr, data_size);
   }
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 38711e382..6dfaab2a2 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -162,16 +162,19 @@ static void qtd_init (ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes)
 static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type);
 static inline ehci_link_t* list_next (ehci_link_t const *p_link);
 
-TU_ATTR_WEAK void hcd_dcache_clean(void const* addr, uint32_t data_size) {
+TU_ATTR_WEAK bool hcd_dcache_clean(void const* addr, uint32_t data_size) {
   (void) addr; (void) data_size;
+  return true;
 }
 
-TU_ATTR_WEAK void hcd_dcache_invalidate(void const* addr, uint32_t data_size) {
+TU_ATTR_WEAK bool hcd_dcache_invalidate(void const* addr, uint32_t data_size) {
   (void) addr; (void) data_size;
+  return true;
 }
 
-TU_ATTR_WEAK void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
+TU_ATTR_WEAK bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
   (void) addr; (void) data_size;
+  return true;
 }
 
 //--------------------------------------------------------------------+

From 25225ba792c7537b6fa25f3be5728a08bf343af8 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 24 Jul 2023 18:04:42 +0700
Subject: [PATCH 527/691] minor clean up

---
 hw/bsp/lpc40/family.mk | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/hw/bsp/lpc40/family.mk b/hw/bsp/lpc40/family.mk
index 0fc7095f5..c11325890 100644
--- a/hw/bsp/lpc40/family.mk
+++ b/hw/bsp/lpc40/family.mk
@@ -31,6 +31,3 @@ SRC_C += \
 INC += \
 	$(TOP)/$(MCU_DIR)/inc \
 	$(TOP)/$(BOARD_PATH)
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F

From fd29fd923a0a64be96fe4bdfa2a5fa9f184ea6c7 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 24 Jul 2023 20:53:44 +0700
Subject: [PATCH 528/691] clean up

---
 src/host/hcd.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/host/hcd.h b/src/host/hcd.h
index 52fcc834e..a98286053 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -104,7 +104,7 @@ typedef struct
   uint8_t speed;
 } hcd_devtree_info_t;
 
-//--------------------------------------------------------------
+//--------------------------------------------------------------------+
 // Memory API
 //--------------------------------------------------------------------+
 

From f295aaf1851eb270070af7292d1f100f7172daf4 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 24 Jul 2023 11:55:54 +0700
Subject: [PATCH 529/691] add hcd abort xfer for rp2040 pio usb

---
 hw/bsp/rp2040/board.h                          | 12 ++++++------
 src/portable/raspberrypi/pio_usb/hcd_pio_usb.c |  7 ++-----
 tools/get_deps.py                              |  2 +-
 3 files changed, 9 insertions(+), 12 deletions(-)

diff --git a/hw/bsp/rp2040/board.h b/hw/bsp/rp2040/board.h
index 934e1c7ae..063c9580e 100644
--- a/hw/bsp/rp2040/board.h
+++ b/hw/bsp/rp2040/board.h
@@ -54,19 +54,19 @@
 // default to pin on Adafruit Feather rp2040 USB Host or Tester if defined
 //--------------------------------------------------------------------+
 
-// #define USE_ADAFRUIT_RP2040_TESTER
-#ifdef USE_ADAFRUIT_RP2040_TESTER
-#define PICO_DEFAULT_PIO_USB_DP_PIN       20
-#define PICO_DEFAULT_PIO_USB_VBUSEN_PIN   22
+// #define USE_ADAFRUIT_FEATHER_RP2040_USBHOST
+#ifdef USE_ADAFRUIT_FEATHER_RP2040_USBHOST
+#define PICO_DEFAULT_PIO_USB_DP_PIN       16
+#define PICO_DEFAULT_PIO_USB_VBUSEN_PIN   18
 #endif
 
 #ifndef PICO_DEFAULT_PIO_USB_DP_PIN
-#define PICO_DEFAULT_PIO_USB_DP_PIN       16
+#define PICO_DEFAULT_PIO_USB_DP_PIN       20
 #endif
 
 // VBUS enable pin and its active state
 #ifndef PICO_DEFAULT_PIO_USB_VBUSEN_PIN
-#define PICO_DEFAULT_PIO_USB_VBUSEN_PIN   18
+#define PICO_DEFAULT_PIO_USB_VBUSEN_PIN   22
 #endif
 
 // VBUS enable state
diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
index fa285327c..bb41ad638 100644
--- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
+++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
@@ -139,11 +139,8 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
 }
 
 bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
-  (void) rhport;
-  (void) dev_addr;
-  (void) ep_addr;
-  // TODO not implemented yet
-  return false;
+  uint8_t const pio_rhport = RHPORT_PIO(rhport);
+  return pio_usb_host_endpoint_abort_transfer(pio_rhport, dev_addr, ep_addr);
 }
 
 bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8])
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 9b89c5e4c..d6505a1d9 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -54,7 +54,7 @@ deps_optional = {
                             '950819b7de9b32f92c3edf396bc5ffb8d66e7009',
                             'kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx imxrt'],
     'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git',
-                                         '58879cfa0eca5725d8db6443ec17f8896a321042',
+                                         'd00a10a8c425d0d40f81b87169102944b01f3bb3',
                                          'rp2040'],
     'hw/mcu/renesas/fsp': ['https://github.com/renesas/fsp.git',
                            '8dc14709f2a6518b43f71efad70d900b7718d9f1',

From ef69da054e4d373636818a52df4e3433152fa3bf Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 25 Jul 2023 12:03:54 +0700
Subject: [PATCH 530/691] use standard EHCI USB INT instead of chipidea
 async/period interrupt to be compatible with other EHCI implementation

---
 src/portable/ehci/ehci.c | 24 ++++++++----------------
 src/portable/ehci/ehci.h |  6 +-----
 2 files changed, 9 insertions(+), 21 deletions(-)

diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 241393a39..a9e184f22 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -307,8 +307,8 @@ bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
   regs->status = (EHCI_INT_MASK_ALL & ~EHCI_INT_MASK_PORT_CHANGE);
 
   // Enable interrupts
-  regs->inten  = EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE | EHCI_INT_MASK_ASYNC_ADVANCE |
-                 EHCI_INT_MASK_NXP_PERIODIC | EHCI_INT_MASK_NXP_ASYNC | EHCI_INT_MASK_FRAMELIST_ROLLOVER;
+  regs->inten  = EHCI_INT_MASK_USB | EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE |
+                 EHCI_INT_MASK_ASYNC_ADVANCE | EHCI_INT_MASK_FRAMELIST_ROLLOVER;
 
   //------------- Asynchronous List -------------//
   ehci_qhd_t * const async_head = list_get_async_head(rhport);
@@ -768,28 +768,20 @@ void hcd_int_handler(uint8_t rhport)
     regs->status = EHCI_INT_MASK_PORT_CHANGE; // Acknowledge
   }
 
+  // A USB transfer is completed with error
   if (int_status & EHCI_INT_MASK_ERROR) {
     xfer_error_isr(rhport);
     regs->status = EHCI_INT_MASK_ERROR; // Acknowledge
   }
 
-  //------------- some QTD/SITD/ITD with IOC set is completed -------------//
-  if (int_status & EHCI_INT_MASK_NXP_ASYNC) {
-    async_list_xfer_complete_isr(list_get_async_head(rhport));
-    regs->status = EHCI_INT_MASK_NXP_ASYNC; // Acknowledge
-  }
-
-  if (int_status & EHCI_INT_MASK_NXP_PERIODIC)
-  {
-    for (uint32_t i=1; i <= FRAMELIST_SIZE; i *= 2)
-    {
+  // A USB transfer is completed
+  if (int_status & EHCI_INT_MASK_USB) {
+    for ( uint32_t i = 1; i <= FRAMELIST_SIZE; i *= 2 ) {
       period_list_xfer_complete_isr(rhport, i);
     }
-    regs->status = EHCI_INT_MASK_NXP_PERIODIC; // Acknowledge
-  }
 
-  if (int_status & EHCI_INT_MASK_USB) {
-    // TODO standard EHCI xfer complete
+    async_list_xfer_complete_isr(list_get_async_head(rhport));
+
     regs->status = EHCI_INT_MASK_USB; // Acknowledge
   }
 
diff --git a/src/portable/ehci/ehci.h b/src/portable/ehci/ehci.h
index 05de80539..457adc1d3 100644
--- a/src/portable/ehci/ehci.h
+++ b/src/portable/ehci/ehci.h
@@ -278,14 +278,10 @@ enum {
   EHCI_INT_MASK_PERIODIC_SCHED_STATUS = TU_BIT(14),
   EHCI_INT_MASK_ASYNC_SCHED_STATUS    = TU_BIT(15),
 
-  EHCI_INT_MASK_NXP_ASYNC             = TU_BIT(18),
-  EHCI_INT_MASK_NXP_PERIODIC          = TU_BIT(19),
-
   EHCI_INT_MASK_ALL                   =
       EHCI_INT_MASK_USB | EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE |
       EHCI_INT_MASK_FRAMELIST_ROLLOVER | EHCI_INT_MASK_PCI_HOST_SYSTEM_ERROR |
-      EHCI_INT_MASK_ASYNC_ADVANCE | EHCI_INT_MASK_NXP_SOF |
-      EHCI_INT_MASK_NXP_ASYNC | EHCI_INT_MASK_NXP_PERIODIC
+      EHCI_INT_MASK_ASYNC_ADVANCE | EHCI_INT_MASK_NXP_SOF
 };
 
 enum {

From dc74e634f93962512229ba7d4e14467c16125c0d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 25 Jul 2023 12:35:40 +0700
Subject: [PATCH 531/691] fix unaligned hub status_change

---
 src/host/hub.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/host/hub.c b/src/host/hub.c
index 182bd6ce8..16dd534d2 100644
--- a/src/host/hub.c
+++ b/src/host/hub.c
@@ -45,8 +45,8 @@ typedef struct
   uint8_t itf_num;
   uint8_t ep_in;
   uint8_t port_count;
-  uint8_t status_change; // data from status change interrupt endpoint
 
+  CFG_TUH_MEM_ALIGN uint8_t status_change;
   CFG_TUH_MEM_ALIGN hub_port_status_response_t port_status;
   CFG_TUH_MEM_ALIGN hub_status_response_t hub_status;
 } hub_interface_t;

From 4deea875793ce78a24b069491bb83e59e310c476 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 25 Jul 2023 15:07:21 +0700
Subject: [PATCH 532/691] improve processing usb complete and error isr.

also merge them together
---
 hw/bsp/imxrt/family.cmake | 126 ++++++++++----------
 src/CMakeLists.txt        |   1 +
 src/portable/ehci/ehci.c  | 244 +++++++++++---------------------------
 3 files changed, 131 insertions(+), 240 deletions(-)

diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index f1c5b0ab1..96ed4b030 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -22,69 +22,71 @@ set(FAMILY_MCUS MIMXRT1XXX CACHE INTERNAL "")
 #------------------------------------
 # only need to be built ONCE for all examples
 function(add_board_target BOARD_TARGET)
-  if (NOT TARGET ${BOARD_TARGET})
-    add_library(${BOARD_TARGET} STATIC
-      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board/clock_config.c
-      #${SDK_DIR}/drivers/adc_12b1msps_sar/fsl_adc.c
-      ${SDK_DIR}/drivers/common/fsl_common.c
-      ${SDK_DIR}/drivers/igpio/fsl_gpio.c
-      ${SDK_DIR}/drivers/lpspi/fsl_lpspi.c
-      ${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
-      ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
-      ${SDK_DIR}/devices/${MCU_VARIANT}/xip/fsl_flexspi_nor_boot.c
-      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
+
+  add_library(${BOARD_TARGET} STATIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board/clock_config.c
+    #${SDK_DIR}/drivers/adc_12b1msps_sar/fsl_adc.c
+    ${SDK_DIR}/drivers/common/fsl_common.c
+    ${SDK_DIR}/drivers/igpio/fsl_gpio.c
+    ${SDK_DIR}/drivers/lpspi/fsl_lpspi.c
+    ${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/xip/fsl_flexspi_nor_boot.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    __ARMVFP__=0
+    __ARMFPV5__=0
+    XIP_EXTERNAL_FLASH=1
+    XIP_BOOT_HEADER_ENABLE=1
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board
+    ${CMSIS_DIR}/CMSIS/Core/Include
+    ${SDK_DIR}/devices/${MCU_VARIANT}
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+    #${SDK_DIR}/drivers/adc_12b1msps_sar
+    ${SDK_DIR}/drivers/common
+    ${SDK_DIR}/drivers/igpio
+    ${SDK_DIR}/drivers/lpspi
+    ${SDK_DIR}/drivers/lpuart
+    )
+
+  update_board(${BOARD_TARGET})
+
+  # LD_FILE and STARTUP_FILE can be defined in board.cmake
+  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+    set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld)
+    #set(LD_FILE_IAR ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld)
+  endif ()
+
+  if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
+    set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
+    #set(STARTUP_FILE_IAR ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
+  endif ()
+
+  target_sources(${BOARD_TARGET} PUBLIC
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      # nanolib
+      --specs=nosys.specs
+      --specs=nano.specs
+      # force linker to look for these symbols
+      -Wl,-uimage_vector_table
+      -Wl,-ug_boot_data
       )
-    target_compile_definitions(${BOARD_TARGET} PUBLIC
-      __ARMVFP__=0
-      __ARMFPV5__=0
-      XIP_EXTERNAL_FLASH=1
-      XIP_BOOT_HEADER_ENABLE=1
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
       )
-    target_include_directories(${BOARD_TARGET} PUBLIC
-      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
-      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board
-      ${CMSIS_DIR}/CMSIS/Core/Include
-      ${SDK_DIR}/devices/${MCU_VARIANT}
-      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
-      #${SDK_DIR}/drivers/adc_12b1msps_sar
-      ${SDK_DIR}/drivers/common
-      ${SDK_DIR}/drivers/igpio
-      ${SDK_DIR}/drivers/lpspi
-      ${SDK_DIR}/drivers/lpuart
-      )
-
-    update_board(${BOARD_TARGET})
-
-    # LD_FILE and STARTUP_FILE can be defined in board.cmake
-    if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
-      set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld)
-      #set(LD_FILE_IAR ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx_flexspi_nor.ld)
-    endif ()
-
-    if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
-      set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
-      #set(STARTUP_FILE_IAR ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
-    endif ()
-
-    target_sources(${BOARD_TARGET} PUBLIC
-      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
-      )
-
-    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--script=${LD_FILE_GNU}"
-        # nanolib
-        --specs=nosys.specs
-        --specs=nano.specs
-        # force linker to look for these symbols
-        -Wl,-uimage_vector_table
-        -Wl,-ug_boot_data
-        )
-    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--config=${LD_FILE_IAR}"
-        )
-    endif ()
   endif ()
 endfunction()
 
@@ -114,7 +116,7 @@ function(family_configure_example TARGET RTOS)
 
   # Add TinyUSB target and port source
   family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT1XXX ${RTOS})
-  target_sources(${TARGET}-tinyusb PUBLIC
+  target_sources(${TARGET}-tinyusb PRIVATE
     ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
     ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
     ${TOP}/src/portable/ehci/ehci.c
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 8f7f38589..076e1e1eb 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -64,6 +64,7 @@ function(add_tinyusb TARGET)
       -Wnull-dereference
       -Wuninitialized
       -Wunused
+      -Wunused-function
       -Wreturn-type
       -Wredundant-decls
       )
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index a9e184f22..b84de5191 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -314,11 +314,11 @@ bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
   ehci_qhd_t * const async_head = list_get_async_head(rhport);
   tu_memclr(async_head, sizeof(ehci_qhd_t));
 
-  async_head->next.address                    = (uint32_t) async_head; // circular list, next is itself
-  async_head->next.type                       = EHCI_QTYPE_QHD;
-  async_head->head_list_flag                  = 1;
-  async_head->qtd_overlay.halted              = 1; // inactive most of time
-  async_head->qtd_overlay.next.terminate      = 1; // TODO removed if verified
+  async_head->next.address               = (uint32_t) async_head; // circular list, next is itself
+  async_head->next.type                  = EHCI_QTYPE_QHD;
+  async_head->head_list_flag             = 1;
+  async_head->qtd_overlay.halted         = 1; // inactive most of time
+  async_head->qtd_overlay.next.terminate = 1; // TODO removed if verified
 
   regs->async_list_addr = (uint32_t) async_head;
 
@@ -533,70 +533,74 @@ void async_advance_isr(uint8_t rhport)
 }
 
 TU_ATTR_ALWAYS_INLINE static inline
-void port_connect_status_change_isr(uint8_t rhport)
-{
+void port_connect_status_change_isr(uint8_t rhport) {
   // NOTE There is an sequence plug->unplug->…..-> plug if device is powering with pre-plugged device
-  if (ehci_data.regs->portsc_bm.current_connect_status)
-  {
+  if ( ehci_data.regs->portsc_bm.current_connect_status ) {
     hcd_port_reset(rhport);
     hcd_event_device_attach(rhport, true);
-  }else // device unplugged
+  } else // device unplugged
   {
     hcd_event_device_remove(rhport, true);
   }
 }
 
+// Check queue head for potential transfer complete (successful or error)
 TU_ATTR_ALWAYS_INLINE static inline
 void qhd_xfer_complete_isr(ehci_qhd_t * qhd) {
-  // examine TD attached to queue head
-  ehci_qtd_t * volatile qtd = qhd->attached_qtd;
+  hcd_dcache_invalidate(qhd, sizeof(ehci_qhd_t)); // HC may have updated the overlay
+  volatile ehci_qtd_t *qtd_overlay = &qhd->qtd_overlay;
 
-  if (qtd == NULL) {
-    return; // no TD attached
-  }
+  // process non-active (completed) QHD with attached (scheduled) TD
+  if ( !qtd_overlay->active && qhd->attached_qtd != NULL ) {
+    xfer_result_t xfer_result;
 
-  hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
-
-  // TD is still active, no need to process
-  if (qtd->active) {
-    return;
-  }
-
-  uint8_t dir = (qtd->pid == EHCI_PID_IN) ? 1 : 0;
-  uint32_t const xferred_bytes = qtd->expected_bytes - qtd->total_bytes;
-
-  // invalidate dcache if IN transfer
-  if (dir == 1 && qhd->attached_buffer != 0 && xferred_bytes > 0) {
-    hcd_dcache_invalidate((void*) qhd->attached_buffer, xferred_bytes);
-  }
-
-  // remove and free TD before invoking callback
-  qhd_remove_qtd(qhd);
-
-  // notify usbh
-  uint8_t const ep_addr = tu_edpt_addr(qhd->ep_number, dir);
-  hcd_event_xfer_complete(qhd->dev_addr, ep_addr, xferred_bytes, XFER_RESULT_SUCCESS, true);
-}
-
-TU_ATTR_ALWAYS_INLINE static inline
-void async_list_xfer_complete_isr(ehci_qhd_t * const async_head)
-{
-  ehci_qhd_t *p_qhd = async_head;
-  do
-  {
-    hcd_dcache_invalidate(p_qhd, sizeof(ehci_qhd_t));
-
-    // halted or error is processed in error isr
-    if ( !p_qhd->qtd_overlay.halted ) {
-      qhd_xfer_complete_isr(p_qhd);
+    if ( qtd_overlay->halted ) {
+      if (qtd_overlay->xact_err || qtd_overlay->err_count == 0 || qtd_overlay->buffer_err || qtd_overlay->babble_err) {
+        // Error count = 0 often occurs when device disconnected, or other bus-related error
+        xfer_result = XFER_RESULT_FAILED;
+        TU_LOG3("  QHD xfer err count: %d\n", qtd_overlay->err_count);
+        // TU_BREAKPOINT(); // TODO skip unplugged device
+      }else {
+        // no error bits are set, endpoint is halted due to STALL
+        xfer_result = XFER_RESULT_STALLED;
+      }
+    } else {
+      xfer_result = XFER_RESULT_SUCCESS;
     }
 
-    p_qhd = qhd_next(p_qhd);
-  }while(p_qhd != async_head); // async list traversal, stop if loop around
+    ehci_qtd_t * volatile qtd = qhd->attached_qtd;
+    hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t)); // HC may have written back TD
+
+    uint8_t const dir = (qtd->pid == EHCI_PID_IN) ? 1 : 0;
+    uint32_t const xferred_bytes = qtd->expected_bytes - qtd->total_bytes;
+
+    // invalidate dcache if IN transfer with data
+    if (dir == 1 && qhd->attached_buffer != 0 && xferred_bytes > 0) {
+      hcd_dcache_invalidate((void*) qhd->attached_buffer, xferred_bytes);
+    }
+
+    // remove and free TD before invoking callback
+    qhd_remove_qtd(qhd);
+
+    // notify usbh
+    uint8_t const ep_addr = tu_edpt_addr(qhd->ep_number, dir);
+    hcd_event_xfer_complete(qhd->dev_addr, ep_addr, xferred_bytes, xfer_result, true);
+  }
 }
 
 TU_ATTR_ALWAYS_INLINE static inline
-void period_list_xfer_complete_isr(uint8_t rhport, uint32_t interval_ms)
+void proccess_async_xfer_isr(ehci_qhd_t * const list_head)
+{
+  ehci_qhd_t *qhd = list_head;
+
+  do {
+    qhd_xfer_complete_isr(qhd);
+    qhd = qhd_next(qhd);
+  } while ( qhd != list_head ); // async list traversal, stop if loop around
+}
+
+TU_ATTR_ALWAYS_INLINE static inline
+void process_period_xfer_isr(uint8_t rhport, uint32_t interval_ms)
 {
   uint32_t const period_1ms_addr = (uint32_t) list_get_period_head(rhport, 1u);
   ehci_link_t next_link = *list_get_period_head(rhport, interval_ms);
@@ -612,22 +616,13 @@ void period_list_xfer_complete_isr(uint8_t rhport, uint32_t interval_ms)
     switch (next_link.type) {
       case EHCI_QTYPE_QHD: {
         ehci_qhd_t *qhd = (ehci_qhd_t *) entry_addr;
-        hcd_dcache_invalidate(qhd, sizeof(ehci_qhd_t));
-
-        if (!qhd->qtd_overlay.halted) {
-          qhd_xfer_complete_isr(qhd);
-        }
+        qhd_xfer_complete_isr(qhd);
       }
         break;
 
+      // TODO support hs/fs ISO
       case EHCI_QTYPE_ITD:
-        // TODO support hs ISO
-        break;
-
       case EHCI_QTYPE_SITD:
-        // TODO support split ISO
-        break;
-
       case EHCI_QTYPE_FSTN:
       default:
         break;
@@ -637,106 +632,6 @@ void period_list_xfer_complete_isr(uint8_t rhport, uint32_t interval_ms)
   }
 }
 
-// TODO merge with qhd_xfer_complete_isr()
-TU_ATTR_ALWAYS_INLINE static inline
-void qhd_xfer_error_isr(ehci_qhd_t * qhd)
-{
-  volatile ehci_qtd_t *qtd_overlay = &qhd->qtd_overlay;
-
-  // TD has error
-  if (qtd_overlay->halted) {
-    xfer_result_t xfer_result;
-
-    if (qtd_overlay->xact_err || qtd_overlay->err_count == 0 || qtd_overlay->buffer_err || qtd_overlay->babble_err) {
-      // Error count = 0 often occurs when device disconnected, or other bus-related error
-      xfer_result = XFER_RESULT_FAILED;
-    }else {
-      // no error bits are set, endpoint is halted due to STALL
-      xfer_result = XFER_RESULT_STALLED;
-    }
-
-//    if (XFER_RESULT_FAILED == xfer_result ) {
-//      TU_LOG1("  QHD xfer err count: %d\n", qtd_overlay->err_count);
-//      TU_BREAKPOINT(); // TODO skip unplugged device
-//    }
-
-    ehci_qtd_t * volatile qtd = (ehci_qtd_t * volatile) qhd->attached_qtd;
-    TU_ASSERT(qtd, ); // No TD yet, probably a race condition or cache issue !?
-
-    hcd_dcache_invalidate(qtd, sizeof(ehci_qtd_t));
-
-    uint8_t dir = (qtd->pid == EHCI_PID_IN) ? 1 : 0;
-    uint32_t const xferred_bytes = qtd->expected_bytes - qtd->total_bytes;
-
-    // invalidate dcache if IN transfer
-    if (dir == 1 && qhd->attached_buffer != 0 && xferred_bytes > 0) {
-      hcd_dcache_invalidate((void*) qhd->attached_buffer, xferred_bytes);
-    }
-
-    // remove and free TD before invoking callback
-    qhd_remove_qtd(qhd);
-
-    if (0 == qhd->ep_number ) {
-      // control cannot be halted
-      qhd->qtd_overlay.next.terminate      = 1;
-      qhd->qtd_overlay.alternate.terminate = 1;
-      qhd->qtd_overlay.halted              = 0;
-
-      hcd_dcache_clean(qhd, sizeof(ehci_qhd_t));
-    }
-
-    // notify usbh
-    uint8_t const ep_addr = tu_edpt_addr(qhd->ep_number, dir);
-    hcd_event_xfer_complete(qhd->dev_addr, ep_addr, xferred_bytes, xfer_result, true);
-  }
-}
-
-TU_ATTR_ALWAYS_INLINE static inline
-void xfer_error_isr(uint8_t rhport)
-{
-  //------------- async list -------------//
-  ehci_qhd_t * const async_head = list_get_async_head(rhport);
-  ehci_qhd_t *p_qhd = async_head;
-  do
-  {
-    hcd_dcache_invalidate(p_qhd, sizeof(ehci_qhd_t));
-    qhd_xfer_error_isr( p_qhd );
-    p_qhd = qhd_next(p_qhd);
-  }while(p_qhd != async_head); // async list traversal, stop if loop around
-
-  //------------- TODO refractor period list -------------//
-  uint32_t const period_1ms_addr = (uint32_t) list_get_period_head(rhport, 1u);
-  for (uint32_t interval_ms=1; interval_ms <= FRAMELIST_SIZE; interval_ms *= 2)
-  {
-    ehci_link_t next_item = *list_get_period_head(rhport, interval_ms);
-
-    // TODO abstract max loop guard for period
-    while( !next_item.terminate &&
-           !(interval_ms > 1 && period_1ms_addr == tu_align32(next_item.address)) )
-    {
-      switch ( next_item.type )
-      {
-        case EHCI_QTYPE_QHD:
-        {
-          ehci_qhd_t *p_qhd_int = (ehci_qhd_t *) tu_align32(next_item.address);
-          hcd_dcache_invalidate(p_qhd_int, sizeof(ehci_qhd_t));
-
-          qhd_xfer_error_isr(p_qhd_int);
-        }
-        break;
-
-				// TODO support hs/fs ISO
-        case EHCI_QTYPE_ITD:
-        case EHCI_QTYPE_SITD:
-        case EHCI_QTYPE_FSTN:
-        default: break;
-      }
-
-      next_item = *list_next(&next_item);
-    }
-  }
-}
-
 //------------- Host Controller Driver's Interrupt Handler -------------//
 void hcd_int_handler(uint8_t rhport)
 {
@@ -768,21 +663,16 @@ void hcd_int_handler(uint8_t rhport)
     regs->status = EHCI_INT_MASK_PORT_CHANGE; // Acknowledge
   }
 
-  // A USB transfer is completed with error
-  if (int_status & EHCI_INT_MASK_ERROR) {
-    xfer_error_isr(rhport);
-    regs->status = EHCI_INT_MASK_ERROR; // Acknowledge
-  }
+  // A USB transfer is completed (OK or error)
+  uint32_t const usb_int = int_status & (EHCI_INT_MASK_USB | EHCI_INT_MASK_ERROR);
+  if (usb_int) {
+    proccess_async_xfer_isr(list_get_async_head(rhport));
 
-  // A USB transfer is completed
-  if (int_status & EHCI_INT_MASK_USB) {
     for ( uint32_t i = 1; i <= FRAMELIST_SIZE; i *= 2 ) {
-      period_list_xfer_complete_isr(rhport, i);
+      process_period_xfer_isr(rhport, i);
     }
 
-    async_list_xfer_complete_isr(list_get_async_head(rhport));
-
-    regs->status = EHCI_INT_MASK_USB; // Acknowledge
+    regs->status = usb_int; // Acknowledge
   }
 
   //------------- There is some removed async previously -------------//
@@ -1011,8 +901,7 @@ TU_ATTR_ALWAYS_INLINE static inline ehci_qtd_t *qtd_find_free(void) {
   return NULL;
 }
 
-static void qtd_init(ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes)
-{
+static void qtd_init(ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes) {
   tu_memclr(qtd, sizeof(ehci_qtd_t));
   qtd->used                = 1;
 
@@ -1026,8 +915,7 @@ static void qtd_init(ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes)
   qtd->expected_bytes      = total_bytes;
 
   qtd->buffer[0] = (uint32_t) buffer;
-  for(uint8_t i=1; i<5; i++)
-  {
+  for(uint8_t i=1; i<5; i++) {
     qtd->buffer[i] |= tu_align4k(qtd->buffer[i - 1] ) + 4096;
   }
 }

From fbaa148fe0f4a4b83f41efe9887a8909161710f6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 18 Jul 2023 15:22:09 +0700
Subject: [PATCH 533/691] updating hcd rusb2

- make osal_task_delay() as weak function in usbh
- implement osal_task_delay() in hcd rusb2 (may moved to other places)
---
 examples/device/cdc_msc_freertos/skip.txt     |   1 +
 .../device/hid_composite_freertos/skip.txt    |   1 +
 examples/dual/host_hid_to_device_cdc/only.txt |   1 +
 hw/bsp/ra/boards/ra6m5_ek/board.cmake         |   7 +-
 hw/bsp/ra/family.cmake                        |   2 +-
 src/host/usbh.c                               |   2 +-
 src/portable/renesas/rusb2/dcd_rusb2.c        |  12 +-
 src/portable/renesas/rusb2/hcd_rusb2.c        | 121 +++++++++---------
 src/portable/renesas/rusb2/rusb2_ra.h         |   7 -
 9 files changed, 77 insertions(+), 77 deletions(-)

diff --git a/examples/device/cdc_msc_freertos/skip.txt b/examples/device/cdc_msc_freertos/skip.txt
index 49b8ee57b..a6f96b288 100644
--- a/examples/device/cdc_msc_freertos/skip.txt
+++ b/examples/device/cdc_msc_freertos/skip.txt
@@ -8,5 +8,6 @@ mcu:RP2040
 mcu:SAMD11
 mcu:SAMX7X
 mcu:VALENTYUSB_EPTRI
+mcu:RAXXX
 family:broadcom_32bit
 family:broadcom_64bit
diff --git a/examples/device/hid_composite_freertos/skip.txt b/examples/device/hid_composite_freertos/skip.txt
index 49b8ee57b..a6f96b288 100644
--- a/examples/device/hid_composite_freertos/skip.txt
+++ b/examples/device/hid_composite_freertos/skip.txt
@@ -8,5 +8,6 @@ mcu:RP2040
 mcu:SAMD11
 mcu:SAMX7X
 mcu:VALENTYUSB_EPTRI
+mcu:RAXXX
 family:broadcom_32bit
 family:broadcom_64bit
diff --git a/examples/dual/host_hid_to_device_cdc/only.txt b/examples/dual/host_hid_to_device_cdc/only.txt
index 6ee8e3fde..d9700677f 100644
--- a/examples/dual/host_hid_to_device_cdc/only.txt
+++ b/examples/dual/host_hid_to_device_cdc/only.txt
@@ -1,3 +1,4 @@
 board:mimxrt1060_evk
 board:mimxrt1064_evk
 mcu:RP2040
+mcu:ra6m5
diff --git a/hw/bsp/ra/boards/ra6m5_ek/board.cmake b/hw/bsp/ra/boards/ra6m5_ek/board.cmake
index 5a615f9b0..c91d48a32 100644
--- a/hw/bsp/ra/boards/ra6m5_ek/board.cmake
+++ b/hw/bsp/ra/boards/ra6m5_ek/board.cmake
@@ -3,15 +3,20 @@ set(MCU_VARIANT ra6m5)
 
 set(JLINK_DEVICE R7FA6M5BH)
 
-# default to PORT1 Highspeed
+# Device port default to PORT1 Highspeed
 if (NOT DEFINED PORT)
 set(PORT 1)
 endif()
 
+# Host port will be the other port
+set(HOST_PORT $<NOT:${PORT}>)
+
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     BOARD_TUD_RHPORT=${PORT}
+    BOARD_TUH_RHPORT=${HOST_PORT}
     # port 0 is fullspeed, port 1 is highspeed
     BOARD_TUD_MAX_SPEED=$<IF:${PORT},OPT_MODE_HIGH_SPEED,OPT_MODE_FULL_SPEED>
+    BOARD_TUH_MAX_SPEED=$<IF:${HOST_PORT},OPT_MODE_HIGH_SPEED,OPT_MODE_FULL_SPEED>
     )
 endfunction()
diff --git a/hw/bsp/ra/family.cmake b/hw/bsp/ra/family.cmake
index f09e86a72..2c45b8d71 100644
--- a/hw/bsp/ra/family.cmake
+++ b/hw/bsp/ra/family.cmake
@@ -13,7 +13,7 @@ include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 
 set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
-set(FAMILY_MCUS RAXXX CACHE INTERNAL "")
+set(FAMILY_MCUS RAXXX ${MCU_VARIANT} CACHE INTERNAL "")
 
 #------------------------------------
 # BOARD_TARGET
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 184bda23b..1418cfb79 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -256,7 +256,7 @@ static bool usbh_control_xfer_cb (uint8_t daddr, uint8_t ep_addr, xfer_result_t
 
 #if CFG_TUSB_OS == OPT_OS_NONE
 // TODO rework time-related function later
-void osal_task_delay(uint32_t msec)
+TU_ATTR_WEAK void osal_task_delay(uint32_t msec)
 {
   const uint32_t start = hcd_frame_number(_usbh_controller);
   while ( ( hcd_frame_number(_usbh_controller) - start ) < msec ) {}
diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 358e5644b..6fee4edd7 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -27,12 +27,12 @@
 
 #include "tusb_option.h"
 
+#if CFG_TUD_ENABLED && defined(TUP_USBIP_RUSB2)
+
 // Since TinyUSB doesn't use SOF for now, and this interrupt too often (1ms interval)
 // We disable SOF for now until needed later on
 #define USE_SOF     0
 
-#if CFG_TUD_ENABLED && defined(TUP_USBIP_RUSB2)
-
 #include "device/dcd.h"
 #include "rusb2_type.h"
 
@@ -53,6 +53,13 @@
   #error "Unsupported MCU"
 #endif
 
+//--------------------------------------------------------------------+
+// Application API for setting IRQ number
+//--------------------------------------------------------------------+
+void tud_int_set_irqnum(uint8_t rhport, int32_t irqnum) {
+  rusb2_controller[rhport].irqnum = irqnum;
+}
+
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
@@ -681,7 +688,6 @@ static void enable_interrupt(uint32_t pswi)
 void dcd_init(uint8_t rhport)
 {
   rusb2_reg_t* rusb = RUSB2_REG(rhport);
-
   rusb2_module_start(rhport, true);
 
 #ifdef RUSB2_SUPPORT_HIGHSPEED
diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index 4e5ff0359..656051e2b 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -27,8 +27,7 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUH_ENABLED && (TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) || \
-                        TU_CHECK_MCU(OPT_MCU_RAXXX))
+#if CFG_TUH_ENABLED && defined(TUP_USBIP_RUSB2)
 
 #include "host/hcd.h"
 #include "rusb2_type.h"
@@ -41,8 +40,14 @@
 
 #if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
   #include "rusb2_rx.h"
+
 #elif TU_CHECK_MCU(OPT_MCU_RAXXX)
   #include "rusb2_ra.h"
+
+  void osal_task_delay(uint32_t msec) {
+    R_BSP_SoftwareDelay(msec, BSP_DELAY_UNITS_MILLISECONDS);
+  }
+
 #else
   #error "Unsupported MCU"
 #endif
@@ -67,19 +72,6 @@
 TU_ATTR_PACKED_BEGIN
 TU_ATTR_BIT_FIELD_ORDER_BEGIN
 
-typedef struct TU_ATTR_PACKED {
-  union {
-    struct {
-      uint16_t      : 8;
-      uint16_t TRCLR: 1;
-      uint16_t TRENB: 1;
-      uint16_t      : 0;
-    };
-    uint16_t TRE;
-  };
-  uint16_t TRN;
-} reg_pipetre_t;
-
 typedef union TU_ATTR_PACKED {
   struct {
     volatile uint16_t u8: 8;
@@ -308,8 +300,9 @@ static bool pipe_xfer_out(unsigned num)
     pipe_write_packet(buf, (volatile void*)&RUSB2->D0FIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
-  if (len < mps)
+  if (len < mps) {
     RUSB2->D0FIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
+  }
   RUSB2->D0FIFOSEL = 0;
   while (RUSB2->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
   pipe->remaining = rem - len;
@@ -488,60 +481,60 @@ static void enable_interrupt(uint32_t pswi)
 
 bool hcd_init(uint8_t rhport)
 {
-  (void)rhport;
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
+  rusb2_module_start(rhport, true);
 
-#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST)
-  RUSB2->SYSCFG_b.HSE = 1;
-  RUSB2->PHYSET_b.HSEB = 0;
-  RUSB2->PHYSET_b.DIRPD = 0;
-  R_BSP_SoftwareDelay((uint32_t) 1, BSP_DELAY_UNITS_MILLISECONDS);
-  RUSB2->PHYSET_b.PLLRESET = 0;
-  RUSB2->LPSTS_b.SUSPENDM = 1;
-  while (!RUSB2->PLLSTA_b.PLLLOCK);
-  RUSB2->SYSCFG_b.DRPD = 1;
-  RUSB2->SYSCFG_b.DCFM = 1;
-  RUSB2->SYSCFG_b.DPRPU = 0;
-  RUSB2->SYSCFG_b.CNEN = 1;
-  RUSB2->BUSWAIT |= 0x0F00U;
-  RUSB2->SOFCFG_b.INTL = 1;
-  RUSB2->DVSTCTR0_b.VBUSEN = 1;
-  RUSB2->CFIFOSEL_b.MBW = 1;
-  RUSB2->D0FIFOSEL_b.MBW = 1;
-  RUSB2->D1FIFOSEL_b.MBW = 1;
-  RUSB2->INTSTS0 = 0;
-  for (volatile int i = 0; i < 30000; ++i) ;
-  RUSB2->SYSCFG_b.USBE = 1;
-#else
-  /* HOST DEVICE Full SPEED */
-  RUSB2->SYSCFG_b.SCKE = 1;         /* USB Clock enable */
-  while (!RUSB2->SYSCFG_b.SCKE) ;
-  RUSB2->SYSCFG_b.DPRPU = 0;        /* D+ pull up enable - 0/disable in host mode */
-  RUSB2->SYSCFG_b.DRPD = 1;         /* D+/D- pull down - 1/in Host mode (pag.834)*/
-  RUSB2->SYSCFG_b.DCFM = 1;         /* HOST or Device - 1/HOST */
-
-  RUSB2->DVSTCTR0_b.VBUSEN = 1;
-
-  RUSB2->SYSCFG_b.DRPD = 1;
-  for (volatile int i = 0; i < 30000; ++i) ;
-  RUSB2->SYSCFG_b.USBE = 1;
+#ifdef RUSB2_SUPPORT_HIGHSPEED
+  if (rusb2_is_highspeed_rhport(rhport) ) {
+    rusb->SYSCFG_b.HSE = 1;
+    rusb->PHYSET_b.HSEB = 0;
+    rusb->PHYSET_b.DIRPD = 0;
+    R_BSP_SoftwareDelay((uint32_t) 1, BSP_DELAY_UNITS_MILLISECONDS);
+    rusb->PHYSET_b.PLLRESET = 0;
+    rusb->LPSTS_b.SUSPENDM = 1;
+    while ( !rusb->PLLSTA_b.PLLLOCK );
+    rusb->SYSCFG_b.DRPD = 1;
+    rusb->SYSCFG_b.DCFM = 1;
+    rusb->SYSCFG_b.DPRPU = 0;
+    rusb->SYSCFG_b.CNEN = 1;
+    rusb->BUSWAIT |= 0x0F00U;
+    rusb->SOFCFG_b.INTL = 1;
+    rusb->DVSTCTR0_b.VBUSEN = 1;
+    rusb->CFIFOSEL_b.MBW = 1;
+    rusb->D0FIFOSEL_b.MBW = 1;
+    rusb->D1FIFOSEL_b.MBW = 1;
+    rusb->INTSTS0 = 0;
+    for ( volatile int i = 0; i < 30000; ++i );
+    rusb->SYSCFG_b.USBE = 1;
+  } else
 #endif
+  {
+    rusb->SYSCFG_b.SCKE = 1;
+    while ( !rusb->SYSCFG_b.SCKE ) {}
+    rusb->SYSCFG_b.DCFM = 1;         // Host function
+    rusb->SYSCFG_b.DPRPU = 0;        // Disable D+ pull up
+    rusb->SYSCFG_b.DRPD = 1;         // Enable D+/D- pull down
 
-  // MCU specific PHY init
-  rusb2_phy_init();
+    rusb->DVSTCTR0_b.VBUSEN = 1;
+    for ( volatile int i = 0; i < 30000; ++i ) {} // FIXME do we need to wait here? how long ?
+    //R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
+    rusb->SYSCFG_b.USBE = 1;
 
-#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST)
-  RUSB2->PHYSLEW = 0x5;
-  RUSB2->DPUSR0R_FS_b.FIXPHY0 = 0u; /* Transceiver Output fixed */
-#endif
+    // MCU specific PHY init
+    rusb2_phy_init();
+
+    rusb->PHYSLEW = 0x5;
+    rusb->DPUSR0R_FS_b.FIXPHY0 = 0u; /* Transceiver Output fixed */
+  }
 
   /* Setup default control pipe */
-  RUSB2->DCPCFG  = RUSB2_PIPECFG_SHTNAK_Msk;
-  RUSB2->DCPMAXP = 64;
-  RUSB2->INTENB0 = RUSB2_INTSTS0_BRDY_Msk | RUSB2_INTSTS0_NRDY_Msk | RUSB2_INTSTS0_BEMP_Msk;
-  RUSB2->INTENB1 = RUSB2_INTSTS1_SACK_Msk | RUSB2_INTSTS1_SIGN_Msk | RUSB2_INTSTS1_ATTCH_Msk | RUSB2_INTSTS1_DTCH_Msk;
-  RUSB2->BEMPENB = 1;
-  RUSB2->NRDYENB = 1;
-  RUSB2->BRDYENB = 1;
+  rusb->DCPCFG  = RUSB2_PIPECFG_SHTNAK_Msk;
+  rusb->DCPMAXP = 64;
+  rusb->INTENB0 = RUSB2_INTSTS0_BRDY_Msk | RUSB2_INTSTS0_NRDY_Msk | RUSB2_INTSTS0_BEMP_Msk;
+  rusb->INTENB1 = RUSB2_INTSTS1_SACK_Msk | RUSB2_INTSTS1_SIGN_Msk | RUSB2_INTSTS1_ATTCH_Msk | RUSB2_INTSTS1_DTCH_Msk;
+  rusb->BEMPENB = 1;
+  rusb->NRDYENB = 1;
+  rusb->BRDYENB = 1;
 
   return true;
 }
diff --git a/src/portable/renesas/rusb2/rusb2_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h
index 28b690512..8a4d2ad36 100644
--- a/src/portable/renesas/rusb2/rusb2_ra.h
+++ b/src/portable/renesas/rusb2/rusb2_ra.h
@@ -106,13 +106,6 @@ TU_ATTR_ALWAYS_INLINE static inline void rusb2_int_disable(uint8_t rhport) {
 TU_ATTR_ALWAYS_INLINE static inline void rusb2_phy_init(void) {
 }
 
-//--------------------------------------------------------------------+
-// Application API for setting IRQ number
-//--------------------------------------------------------------------+
-void tud_int_set_irqnum(uint8_t rhport, int32_t irqnum) {
-  rusb2_controller[rhport].irqnum = irqnum;
-}
-
 #ifdef __cplusplus
 }
 #endif

From 1cb3f0e92a2e35155245452c54f599a733df9604 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 26 Jul 2023 18:56:13 +0700
Subject: [PATCH 534/691] increase stack size for 6 series to 0x1000, 4 series
 to 0x800

---
 hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h | 2 +-
 hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h | 4 ++--
 hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h | 2 +-
 hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h | 2 +-
 4 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h
index f0577b702..11d5795df 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h
+++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_cfg.h
@@ -12,7 +12,7 @@
 #define BSP_CFG_BOOT_IMAGE (1)
 #endif
 #define BSP_CFG_MCU_VCC_MV (3300)
-#define BSP_CFG_STACK_MAIN_BYTES (0x400)
+#define BSP_CFG_STACK_MAIN_BYTES (0x800)
 #define BSP_CFG_HEAP_BYTES (0x1000)
 #define BSP_CFG_PARAM_CHECKING_ENABLE (1)
 #define BSP_CFG_ASSERT (0)
diff --git a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h
index 47de7747d..862ec25b7 100644
--- a/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h
+++ b/hw/bsp/ra/boards/ra4m3_ek/fsp_cfg/bsp/bsp_cfg.h
@@ -27,8 +27,8 @@ extern "C" {
 #define BSP_CFG_BOOT_IMAGE (1)
 #endif
 #define BSP_CFG_MCU_VCC_MV (3300)
-#define BSP_CFG_STACK_MAIN_BYTES (0x400)
-#define BSP_CFG_HEAP_BYTES (0x400)
+#define BSP_CFG_STACK_MAIN_BYTES (0x800)
+#define BSP_CFG_HEAP_BYTES (0x800)
 #define BSP_CFG_PARAM_CHECKING_ENABLE (1)
 #define BSP_CFG_ASSERT (0)
 #define BSP_CFG_ERROR_LOG (0)
diff --git a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h
index b5ed53a3b..772e5e5b1 100644
--- a/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h
+++ b/hw/bsp/ra/boards/ra6m1_ek/fsp_cfg/bsp/bsp_cfg.h
@@ -31,7 +31,7 @@ extern "C" {
 #endif
 
 #define BSP_CFG_MCU_VCC_MV (3300)
-#define BSP_CFG_STACK_MAIN_BYTES (0x400)
+#define BSP_CFG_STACK_MAIN_BYTES (0x1000)
 #define BSP_CFG_HEAP_BYTES (0x1000)
 #define BSP_CFG_PARAM_CHECKING_ENABLE (1)
 #define BSP_CFG_ASSERT (0)
diff --git a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h
index a41536eda..33d381850 100644
--- a/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h
+++ b/hw/bsp/ra/boards/ra6m5_ek/fsp_cfg/bsp/bsp_cfg.h
@@ -27,7 +27,7 @@ extern "C" {
   #define BSP_CFG_BOOT_IMAGE (1)
 #endif
 #define BSP_CFG_MCU_VCC_MV (3300)
-#define BSP_CFG_STACK_MAIN_BYTES (0x400)
+#define BSP_CFG_STACK_MAIN_BYTES (0x1000)
 #define BSP_CFG_HEAP_BYTES (0x1000)
 #define BSP_CFG_PARAM_CHECKING_ENABLE (1)
 #define BSP_CFG_ASSERT (0)

From 6b6dcc6c099eeafaa6d76bf6133181874beabc0d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 26 Jul 2023 19:50:50 +0700
Subject: [PATCH 535/691] refactored multiple ports for hcd rusb2

---
 .idea/cmake.xml                              |  15 +-
 .idea/runConfigurations/ra6m5.xml            |   2 +-
 hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug |   4 +-
 src/portable/renesas/rusb2/dcd_rusb2.c       |  37 +-
 src/portable/renesas/rusb2/hcd_rusb2.c       | 498 ++++++++++---------
 5 files changed, 291 insertions(+), 265 deletions(-)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 864ff615b..519623b71 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -2,7 +2,6 @@
 <project version="4">
   <component name="CMakeSharedSettings">
     <configurations>
-      <configuration PROFILE_NAME="mcxn947" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mcxn947brk -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10056 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10095 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="esp32s2" ENABLED="false" GENERATION_OPTIONS="-DBOARD=espressif_saola_1 -DIDF_TARGET=esp32s2">
@@ -26,27 +25,27 @@
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
       <configuration PROFILE_NAME="rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico -DLOG=2" />
-      <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1010_evk" />
-      <configuration PROFILE_NAME="rt1060 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1060_evk" />
-      <configuration PROFILE_NAME="rt1064 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1064_evk" />
+      <configuration PROFILE_NAME="metro m7 1011" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1010_evk -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="rt1060 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1060_evk -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="mcb1800" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mcb1800 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="lpcxpresso18s37" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso18s37" />
+      <configuration PROFILE_NAME="ea4088 quickstart" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ea4088_quickstart -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="lpc55s69" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso55s69" />
+      <configuration PROFILE_NAME="mcxn947" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mcxn947brk -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32g0b1nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32g0b1nucleo" />
       <configuration PROFILE_NAME="stm32g474nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32g474nucleo" />
       <configuration PROFILE_NAME="b_g474e_dpow1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=b_g474e_dpow1 -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="b_g474e_dpow1 iar" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=b_g474e_dpow1 -DTOOLCHAIN=iar" />
       <configuration PROFILE_NAME="frdm_kl25z" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=frdm_kl25z -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32h743eval" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h743eval -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="metro m7" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="stm32f072disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f072disco" />
       <configuration PROFILE_NAME="stm32f103_mini_2" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f103_mini_2" />
       <configuration PROFILE_NAME="stm32f769disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f769disco -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32l476disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32l476disco" />
       <configuration PROFILE_NAME="ra4m1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra4m1_ek -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="ra6m1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m1_ek -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="ra6m5" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="ra6m5 PORT0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1 -DPORT=0" />
+      <configuration PROFILE_NAME="ra6m5" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="ra6m5 PORT0" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1 -DPORT=0" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/.idea/runConfigurations/ra6m5.xml b/.idea/runConfigurations/ra6m5.xml
index 02df11610..89f9787a0 100644
--- a/.idea/runConfigurations/ra6m5.xml
+++ b/.idea/runConfigurations/ra6m5.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="ra6m5" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA6M5BH&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="ra6m5" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="ra6m5" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA6M5BH&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc_hid" CONFIG_NAME="ra6m5" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc_hid">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug b/hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug
index aebb29162..7b8ee9c95 100644
--- a/hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug
+++ b/hw/bsp/ra/boards/ra6m5_ek/ozone/ra6m5.jdebug
@@ -20,7 +20,9 @@ void OnProjectLoad (void) {
   Project.SetTraceSource ("Trace Pins");
   Project.SetTracePortWidth (4);
 
-  File.Open ("../../../../../../examples/device/cdc_msc/cmake-build-ra6m5/cdc_msc.elf");
+  //File.Open ("../../../../../../examples/device/cdc_msc/cmake-build-ra6m5/cdc_msc.elf");
+  //File.Open ("../../../../../../examples/dual/cmake-build-ra6m5/host_hid_to_device_cdc/host_hid_to_device_cdc.elf");
+  File.Open ("../../../../../../examples/cmake-build-ra6m5/host/cdc_msc_hid/cdc_msc_hid.elf");
 }
 /*********************************************************************
 *
diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 6fee4edd7..83f0fdc4a 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -83,6 +83,18 @@ typedef struct TU_ATTR_PACKED
 TU_ATTR_PACKED_END  // End of definition of packed structs (used by the CCRX toolchain)
 TU_ATTR_BIT_FIELD_ORDER_END
 
+typedef struct
+{
+  pipe_state_t pipe[10];
+  uint8_t ep[2][16];   /* a lookup table for a pipe index from an endpoint address */
+} dcd_data_t;
+
+static dcd_data_t _dcd;
+
+//--------------------------------------------------------------------+
+// INTERNAL OBJECT & FUNCTION DECLARATION
+//--------------------------------------------------------------------+
+
 // Transfer conditions specifiable for each pipe:
 // - Pipe 0: Control transfer with 64-byte single buffer
 // - Pipes 1 and 2: Bulk isochronous transfer continuous transfer mode with programmable buffer size up
@@ -96,18 +108,6 @@ enum {
   PIPE_COUNT = 10,
 };
 
-typedef struct
-{
-  pipe_state_t pipe[10];
-  uint8_t ep[2][16];   /* a lookup table for a pipe index from an endpoint address */
-} dcd_data_t;
-
-static dcd_data_t _dcd;
-
-//--------------------------------------------------------------------+
-// INTERNAL OBJECT & FUNCTION DECLARATION
-//--------------------------------------------------------------------+
-
 static unsigned find_pipe(unsigned xfer)
 {
   switch (xfer) {
@@ -746,20 +746,17 @@ void dcd_init(uint8_t rhport)
   }
 }
 
-void dcd_int_enable(uint8_t rhport)
-{
+void dcd_int_enable(uint8_t rhport) {
   rusb2_int_enable(rhport);
 }
 
-void dcd_int_disable(uint8_t rhport)
-{
+void dcd_int_disable(uint8_t rhport) {
   rusb2_int_disable(rhport);
 }
 
-void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
-{
-  (void)rhport;
-  (void)dev_addr;
+void dcd_set_address(uint8_t rhport, uint8_t dev_addr) {
+  (void) rhport;
+  (void) dev_addr;
 }
 
 void dcd_remote_wakeup(uint8_t rhport)
diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index 656051e2b..a4b534a05 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -52,23 +52,12 @@
   #error "Unsupported MCU"
 #endif
 
-#define TU_RUSB2_HCD_DBG   0
+#define TU_RUSB2_HCD_DBG   2
 
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM DECLARATION
 //--------------------------------------------------------------------+
 
-/* LINK core registers */
-#if defined(__CCRX__)
-  #define RUSB2 ((RUSB2_REG_t __evenaccess*) RUSB2_REG_BASE)
-#elif defined(__RX__)
-  #define RUSB2 ((RUSB2_REG_t*) RUSB2_REG_BASE)
-#elif (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST)
-  #define RUSB2 ((R_USB_HS0_Type*) R_USB_HS0_BASE)
-#else
-  #define RUSB2 ((R_USB_FS0_Type*) R_USB_FS0_BASE)
-#endif
-
 TU_ATTR_PACKED_BEGIN
 TU_ATTR_BIT_FIELD_ORDER_BEGIN
 
@@ -108,79 +97,97 @@ typedef struct
 //--------------------------------------------------------------------+
 static hcd_data_t _hcd;
 
-static unsigned find_pipe(unsigned xfer)
-{
-  switch (xfer) {
-  case TUSB_XFER_ISOCHRONOUS:
-    for (int i = 1; i <= 2; ++i) {
-      if (0 == _hcd.pipe[i].ep) return  i;
-    }
-    break;
-  case TUSB_XFER_BULK:
-    for (int i = 3; i <= 5; ++i) {
-      if (0 == _hcd.pipe[i].ep) return  i;
-    }
-    for (int i = 1; i <= 2; ++i) {
-      if (0 == _hcd.pipe[i].ep) return  i;
-    }
-    break;
-  case TUSB_XFER_INTERRUPT:
-    for (int i = 6; i <= 9; ++i) {
-      if (0 == _hcd.pipe[i].ep) return  i;
-    }
-    break;
-  default:
-    /* No support for control transfer */
-    break;
+// TODO merged with DCD
+// Transfer conditions specifiable for each pipe:
+// - Pipe 0: Control transfer with 64-byte single buffer
+// - Pipes 1 and 2: Bulk isochronous transfer continuous transfer mode with programmable buffer size up
+//   to 2 KB and optional double buffer
+// - Pipes 3 to 5: Bulk transfer continuous transfer mode with programmable buffer size up to 2 KB and
+//   optional double buffer
+// - Pipes 6 to 9: Interrupt transfer with 64-byte single buffer
+enum {
+  PIPE_1ST_BULK = 3,
+  PIPE_1ST_INTERRUPT = 6,
+  PIPE_COUNT = 10,
+};
+
+static unsigned find_pipe(unsigned xfer) {
+  switch ( xfer ) {
+    case TUSB_XFER_ISOCHRONOUS:
+      for (int i = 1; i < PIPE_1ST_BULK; ++i) {
+        if ( 0 == _hcd.pipe[i].ep ) return i;
+      }
+      break;
+
+    case TUSB_XFER_BULK:
+      for (int i = PIPE_1ST_BULK; i < PIPE_1ST_INTERRUPT; ++i) {
+        if ( 0 == _hcd.pipe[i].ep ) return i;
+      }
+      for (int i = 1; i < PIPE_1ST_BULK; ++i) {
+        if ( 0 == _hcd.pipe[i].ep ) return i;
+      }
+      break;
+
+    case TUSB_XFER_INTERRUPT:
+      for (int i = PIPE_1ST_INTERRUPT; i < PIPE_COUNT; ++i) {
+        if ( 0 == _hcd.pipe[i].ep ) return i;
+      }
+      break;
+
+    default:
+      /* No support for control transfer */
+      break;
   }
   return 0;
 }
 
-static volatile uint16_t* get_pipectr(unsigned num)
+static volatile uint16_t* get_pipectr(rusb2_reg_t *rusb, unsigned num)
 {
   if (num) {
-    return (volatile uint16_t*)&(RUSB2->PIPE_CTR[num - 1]);
+    return (volatile uint16_t*)&(rusb->PIPE_CTR[num - 1]);
   } else {
-    return (volatile uint16_t*)&(RUSB2->DCPCTR);
+    return (volatile uint16_t*)&(rusb->DCPCTR);
   }
 }
 
-static volatile reg_pipetre_t* get_pipetre(unsigned num)
+static volatile reg_pipetre_t* get_pipetre(rusb2_reg_t *rusb, unsigned num)
 {
   volatile reg_pipetre_t* tre = NULL;
   if ((1 <= num) && (num <= 5)) {
-    tre = (volatile reg_pipetre_t*)&(RUSB2->PIPE_TR[num - 1].E);
+    tre = (volatile reg_pipetre_t*)&(rusb->PIPE_TR[num - 1].E);
   }
   return tre;
 }
 
-static volatile uint16_t* addr_to_pipectr(uint8_t dev_addr, unsigned ep_addr)
+static volatile uint16_t* addr_to_pipectr(uint8_t rhport, uint8_t dev_addr, unsigned ep_addr)
 {
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
   const unsigned epn = tu_edpt_number(ep_addr);
+
   if (epn) {
     const unsigned dir_in = tu_edpt_dir(ep_addr);
     const unsigned num = _hcd.ep[dev_addr][dir_in][epn - 1];
-    return get_pipectr(num);
+    return get_pipectr(rusb, num);
   } else {
-    return get_pipectr(0);
+    return get_pipectr(rusb, 0);
   }
 }
 
-static unsigned edpt0_max_packet_size(void)
+static uint16_t edpt0_max_packet_size(rusb2_reg_t* rusb)
 {
-  return RUSB2->DCPMAXP_b.MXPS;
+  return rusb->DCPMAXP_b.MXPS;
 }
 
-static unsigned edpt_max_packet_size(unsigned num)
+static uint16_t edpt_max_packet_size(rusb2_reg_t *rusb, unsigned num)
 {
-  RUSB2->PIPESEL = num;
-  return RUSB2->PIPEMAXP_b.MXPS;
+  rusb->PIPESEL = num;
+  return rusb->PIPEMAXP_b.MXPS;
 }
 
-static inline void pipe_wait_for_ready(unsigned num)
+static inline void pipe_wait_for_ready(rusb2_reg_t* rusb, unsigned num)
 {
-  while (RUSB2->D0FIFOSEL_b.CURPIPE != num) ;
-  while (!RUSB2->D0FIFOCTR_b.FRDY) ;
+  while (rusb->D0FIFOSEL_b.CURPIPE != num) ;
+  while (!rusb->D0FIFOCTR_b.FRDY) {}
 }
 
 static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
@@ -205,33 +212,33 @@ static void pipe_read_packet(void *buf, volatile void *fifo, unsigned len)
   while (len--) *p++ = *reg;
 }
 
-static bool pipe0_xfer_in(void)
+static bool pipe0_xfer_in(rusb2_reg_t* rusb)
 {
   pipe_state_t *pipe = &_hcd.pipe[0];
   const unsigned rem = pipe->remaining;
 
-  const unsigned mps = edpt0_max_packet_size();
-  const unsigned vld = RUSB2->CFIFOCTR_b.DTLN;
+  const unsigned mps = edpt0_max_packet_size(rusb);
+  const unsigned vld = rusb->CFIFOCTR_b.DTLN;
   const unsigned len = TU_MIN(TU_MIN(rem, mps), vld);
   void          *buf = pipe->buf;
   if (len) {
-    RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_NAK;
-    pipe_read_packet(buf, (volatile void*)&RUSB2->CFIFO, len);
+    rusb->DCPCTR = RUSB2_PIPE_CTR_PID_NAK;
+    pipe_read_packet(buf, (volatile void*)&rusb->CFIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
   if (len < mps) {
-    RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk;
+    rusb->CFIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk;
   }
   pipe->remaining = rem - len;
   if ((len < mps) || (rem == len)) {
     pipe->buf = NULL;
     return true;
   }
-  RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_BUF;
+  rusb->DCPCTR = RUSB2_PIPE_CTR_PID_BUF;
   return false;
 }
 
-static bool pipe0_xfer_out(void)
+static bool pipe0_xfer_out(rusb2_reg_t* rusb)
 {
   pipe_state_t *pipe = &_hcd.pipe[0];
   const unsigned rem = pipe->remaining;
@@ -239,40 +246,40 @@ static bool pipe0_xfer_out(void)
     pipe->buf = NULL;
     return true;
   }
-  const unsigned mps = edpt0_max_packet_size();
+  const unsigned mps = edpt0_max_packet_size(rusb);
   const unsigned len = TU_MIN(mps, rem);
   void          *buf = pipe->buf;
   if (len) {
-    pipe_write_packet(buf, (volatile void*)&RUSB2->CFIFO, len);
+    pipe_write_packet(buf, (volatile void*)&rusb->CFIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
   if (len < mps) {
-    RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
+    rusb->CFIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
   }
   pipe->remaining = rem - len;
   return false;
 }
 
-static bool pipe_xfer_in(unsigned num)
+static bool pipe_xfer_in(rusb2_reg_t* rusb, unsigned num)
 {
   pipe_state_t  *pipe = &_hcd.pipe[num];
   const unsigned rem  = pipe->remaining;
 
-  RUSB2->D0FIFOSEL = num | RUSB2_FIFOSEL_MBW_8BIT;
-  const unsigned mps  = edpt_max_packet_size(num);
-  pipe_wait_for_ready(num);
-  const unsigned vld  = RUSB2->D0FIFOCTR_b.DTLN;
+  rusb->D0FIFOSEL = num | RUSB2_FIFOSEL_MBW_8BIT;
+  const unsigned mps  = edpt_max_packet_size(rusb, num);
+  pipe_wait_for_ready(rusb, num);
+  const unsigned vld  = rusb->D0FIFOCTR_b.DTLN;
   const unsigned len  = TU_MIN(TU_MIN(rem, mps), vld);
   void          *buf  = pipe->buf;
   if (len) {
-    pipe_read_packet(buf, (volatile void*)&RUSB2->D0FIFO, len);
+    pipe_read_packet(buf, (volatile void*)&rusb->D0FIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
   if (len < mps) {
-    RUSB2->D0FIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk;
+    rusb->D0FIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk;
   }
-  RUSB2->D0FIFOSEL = 0;
-  while (RUSB2->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
+  rusb->D0FIFOSEL = 0;
+  while (rusb->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
   pipe->remaining = rem - len;
   if ((len < mps) || (rem == len)) {
     pipe->buf = NULL;
@@ -281,7 +288,7 @@ static bool pipe_xfer_in(unsigned num)
   return false;
 }
 
-static bool pipe_xfer_out(unsigned num)
+static bool pipe_xfer_out(rusb2_reg_t* rusb, unsigned num)
 {
   pipe_state_t  *pipe = &_hcd.pipe[num];
   const unsigned rem  = pipe->remaining;
@@ -291,37 +298,39 @@ static bool pipe_xfer_out(unsigned num)
     return true;
   }
 
-  RUSB2->D0FIFOSEL = num | RUSB2_FIFOSEL_MBW_16BIT | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? RUSB2_FIFOSEL_BIGEND : 0);
-  const unsigned mps  = edpt_max_packet_size(num);
-  pipe_wait_for_ready(num);
+  rusb->D0FIFOSEL = num | RUSB2_FIFOSEL_MBW_16BIT | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? RUSB2_FIFOSEL_BIGEND : 0);
+  const unsigned mps  = edpt_max_packet_size(rusb, num);
+  pipe_wait_for_ready(rusb, num);
   const unsigned len  = TU_MIN(rem, mps);
   void          *buf  = pipe->buf;
   if (len) {
-    pipe_write_packet(buf, (volatile void*)&RUSB2->D0FIFO, len);
+    pipe_write_packet(buf, (volatile void*)&rusb->D0FIFO, len);
     pipe->buf = (uint8_t*)buf + len;
   }
   if (len < mps) {
-    RUSB2->D0FIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
+    rusb->D0FIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
   }
-  RUSB2->D0FIFOSEL = 0;
-  while (RUSB2->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
+  rusb->D0FIFOSEL = 0;
+  while (rusb->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
   pipe->remaining = rem - len;
   return false;
 }
 
-static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, uint16_t buflen)
+static bool process_pipe0_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, void* buffer, uint16_t buflen)
 {
   (void)dev_addr;
+
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
   const unsigned dir_in = tu_edpt_dir(ep_addr);
 
   /* configure fifo direction and access unit settings */
   if (dir_in) { /* IN, a byte */
-    RUSB2->CFIFOSEL = RUSB2_FIFOSEL_MBW_8BIT;
-    while (RUSB2->CFIFOSEL & RUSB2_CFIFOSEL_ISEL_WRITE) ;
+    rusb->CFIFOSEL = RUSB2_FIFOSEL_MBW_8BIT;
+    while (rusb->CFIFOSEL & RUSB2_CFIFOSEL_ISEL_WRITE) ;
   } else { /* OUT, 2 bytes */
-    RUSB2->CFIFOSEL = RUSB2_CFIFOSEL_ISEL_WRITE | RUSB2_FIFOSEL_MBW_16BIT |
+    rusb->CFIFOSEL = RUSB2_CFIFOSEL_ISEL_WRITE | RUSB2_FIFOSEL_MBW_16BIT |
                          (TU_BYTE_ORDER == TU_BIG_ENDIAN ? RUSB2_FIFOSEL_BIGEND : 0);
-    while (!(RUSB2->CFIFOSEL & RUSB2_CFIFOSEL_ISEL_WRITE)) ;
+    while (!(rusb->CFIFOSEL & RUSB2_CFIFOSEL_ISEL_WRITE)) ;
   }
 
   pipe_state_t *pipe = &_hcd.pipe[0];
@@ -331,26 +340,28 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer,
   if (buflen) {
     pipe->buf     = buffer;
     if (!dir_in) { /* OUT */
-      TU_ASSERT(RUSB2->DCPCTR_b.BSTS && (RUSB2->USBREQ & 0x80));
-      pipe0_xfer_out();
+      TU_ASSERT(rusb->DCPCTR_b.BSTS && (rusb->USBREQ & 0x80));
+      pipe0_xfer_out(rusb);
     }
   } else { /* ZLP */
     pipe->buf        = NULL;
     if (!dir_in) { /* OUT */
-      RUSB2->CFIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
+      rusb->CFIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
     }
-    if (dir_in == RUSB2->DCPCFG_b.DIR) {
-      TU_ASSERT(RUSB2_PIPE_CTR_PID_NAK == RUSB2->DCPCTR_b.PID);
-      RUSB2->DCPCTR_b.SQSET = 1;
-      RUSB2->DCPCFG_b.DIR = dir_in ^ 1;
+    if (dir_in == rusb->DCPCFG_b.DIR) {
+      TU_ASSERT(RUSB2_PIPE_CTR_PID_NAK == rusb->DCPCTR_b.PID);
+      rusb->DCPCTR_b.SQSET = 1;
+      rusb->DCPCFG_b.DIR = dir_in ^ 1;
     }
   }
-  RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_BUF;
+  rusb->DCPCTR = RUSB2_PIPE_CTR_PID_BUF;
   return true;
 }
 
-static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void *buffer, uint16_t buflen)
+static bool process_pipe_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, void *buffer, uint16_t buflen)
 {
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
+
   const unsigned epn    = tu_edpt_number(ep_addr);
   const unsigned dir_in = tu_edpt_dir(ep_addr);
   const unsigned num    = _hcd.ep[dev_addr - 1][dir_in][epn - 1];
@@ -363,19 +374,19 @@ static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void *buffer, u
   pipe->remaining = buflen;
   if (!dir_in) { /* OUT */
     if (buflen) {
-      pipe_xfer_out(num);
+      pipe_xfer_out(rusb, num);
     } else { /* ZLP */
-      RUSB2->D0FIFOSEL = num;
-      pipe_wait_for_ready(num);
-      RUSB2->D0FIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
-      RUSB2->D0FIFOSEL = 0;
-      while (RUSB2->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
+      rusb->D0FIFOSEL = num;
+      pipe_wait_for_ready(rusb, num);
+      rusb->D0FIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
+      rusb->D0FIFOSEL = 0;
+      while (rusb->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
     }
   } else {
-    volatile uint16_t     *ctr = get_pipectr(num);
-    volatile reg_pipetre_t *pt = get_pipetre(num);
+    volatile uint16_t     *ctr = get_pipectr(rusb, num);
+    volatile reg_pipetre_t *pt = get_pipetre(rusb, num);
     if (pt) {
-      const unsigned     mps = edpt_max_packet_size(num);
+      const unsigned     mps = edpt_max_packet_size(rusb, num);
       if (*ctr & 0x3) *ctr = RUSB2_PIPE_CTR_PID_NAK;
       pt->TRE   = TU_BIT(8);
       pt->TRN   = (buflen + mps - 1) / mps;
@@ -386,20 +397,20 @@ static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void *buffer, u
   return true;
 }
 
-static bool process_edpt_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, uint16_t buflen)
+static bool process_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, void* buffer, uint16_t buflen)
 {
   const unsigned epn = tu_edpt_number(ep_addr);
   if (0 == epn) {
-    return process_pipe0_xfer(dev_addr, ep_addr, buffer, buflen);
+    return process_pipe0_xfer(rhport, dev_addr, ep_addr, buffer, buflen);
   } else {
-    return process_pipe_xfer(dev_addr, ep_addr, buffer, buflen);
+    return process_pipe_xfer(rhport, dev_addr, ep_addr, buffer, buflen);
   }
 }
 
 static void process_pipe0_bemp(uint8_t rhport)
 {
-  (void)rhport;
-  bool completed = pipe0_xfer_out();
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
+  bool completed = pipe0_xfer_out(rusb);
   if (completed) {
     pipe_state_t *pipe = &_hcd.pipe[0];
     hcd_event_xfer_complete(pipe->dev,
@@ -411,9 +422,9 @@ static void process_pipe0_bemp(uint8_t rhport)
 
 static void process_pipe_nrdy(uint8_t rhport, unsigned num)
 {
-  (void)rhport;
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
   xfer_result_t result;
-  uint16_t volatile *ctr = get_pipectr(num);
+  uint16_t volatile *ctr = get_pipectr(rusb, num);
   TU_LOG(TU_RUSB2_HCD_DBG, "NRDY %d %x\n", num, *ctr);
   switch (*ctr & RUSB2_PIPE_CTR_PID_Msk) {
     default: return;
@@ -429,19 +440,19 @@ static void process_pipe_nrdy(uint8_t rhport, unsigned num)
 
 static void process_pipe_brdy(uint8_t rhport, unsigned num)
 {
-  (void)rhport;
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
   pipe_state_t  *pipe   = &_hcd.pipe[num];
   const unsigned dir_in = tu_edpt_dir(pipe->ep);
   bool completed;
 
   if (dir_in) { /* IN */
     if (num) {
-      completed = pipe_xfer_in(num);
+      completed = pipe_xfer_in(rusb, num);
     } else {
-      completed = pipe0_xfer_in();
+      completed = pipe0_xfer_in(rusb);
     }
   } else {
-    completed = pipe_xfer_out(num);
+    completed = pipe_xfer_out(rusb, num);
   }
   if (completed) {
     hcd_event_xfer_complete(pipe->dev, pipe->ep,
@@ -539,86 +550,88 @@ bool hcd_init(uint8_t rhport)
   return true;
 }
 
-void hcd_int_enable(uint8_t rhport)
-{
+void hcd_int_enable(uint8_t rhport) {
   rusb2_int_enable(rhport);
 }
 
-void hcd_int_disable(uint8_t rhport)
-{
+void hcd_int_disable(uint8_t rhport) {
   rusb2_int_disable(rhport);
 }
 
 uint32_t hcd_frame_number(uint8_t rhport)
 {
-  (void)rhport;
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
+
   /* The device must be reset at least once after connection
    * in order to start the frame counter. */
   if (_hcd.need_reset) hcd_port_reset(rhport);
-  return RUSB2->FRMNUM_b.FRNM;
+  return rusb->FRMNUM_b.FRNM;
 }
 
 /*--------------------------------------------------------------------+
  * Port API
  *--------------------------------------------------------------------+*/
-bool hcd_port_connect_status(uint8_t rhport)
-{
-  (void)rhport;
-  return RUSB2->INTSTS1_b.ATTCH ? true : false;
+bool hcd_port_connect_status(uint8_t rhport) {
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
+  return rusb->INTSTS1_b.ATTCH ? true : false;
 }
 
-void hcd_port_reset(uint8_t rhport)
-{
-  RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_NAK;
-  while (RUSB2->DCPCTR_b.PBUSY) ;
+void hcd_port_reset(uint8_t rhport) {
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
+  rusb->DCPCTR = RUSB2_PIPE_CTR_PID_NAK;
+  while (rusb->DCPCTR_b.PBUSY) {}
+
   hcd_int_disable(rhport);
-  RUSB2->DVSTCTR0_b.UACT = 0;
-  if (RUSB2->DCPCTR_b.SUREQ) {
-    RUSB2->DCPCTR_b.SUREQCLR = 1;
+  rusb->DVSTCTR0_b.UACT = 0;
+  if (rusb->DCPCTR_b.SUREQ) {
+    rusb->DCPCTR_b.SUREQCLR = 1;
   }
   hcd_int_enable(rhport);
+
   /* Reset should be asserted 10-20ms. */
-  RUSB2->DVSTCTR0_b.USBRST = 1;
-  for (volatile int i = 0; i < 2400000; ++i) ;
-  RUSB2->DVSTCTR0_b.USBRST = 0;
-  RUSB2->DVSTCTR0_b.UACT = 1;
+  rusb->DVSTCTR0_b.USBRST = 1;
+  for (volatile int i = 0; i < 2400000; ++i) {}
+  rusb->DVSTCTR0_b.USBRST = 0;
+
+  rusb->DVSTCTR0_b.UACT = 1;
   _hcd.need_reset = false;
 }
 
-void hcd_port_reset_end(uint8_t rhport)
-{
+void hcd_port_reset_end(uint8_t rhport) {
   (void) rhport;
 }
 
-tusb_speed_t hcd_port_speed_get(uint8_t rhport)
-{
-  (void)rhport;
-  switch (RUSB2->DVSTCTR0_b.RHST) {
-    default: return TUSB_SPEED_INVALID;
+tusb_speed_t hcd_port_speed_get(uint8_t rhport) {
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
+  switch (rusb->DVSTCTR0_b.RHST) {
+    case RUSB2_DVSTCTR0_RHST_HS: return TUSB_SPEED_HIGH;
     case RUSB2_DVSTCTR0_RHST_FS: return TUSB_SPEED_FULL;
-    case RUSB2_DVSTCTR0_RHST_LS:  return TUSB_SPEED_LOW;
+    case RUSB2_DVSTCTR0_RHST_LS: return TUSB_SPEED_LOW;
+    default: return TUSB_SPEED_INVALID;
   }
 }
 
-void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
-{
-  (void)rhport;
+void hcd_device_close(uint8_t rhport, uint8_t dev_addr) {
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
   uint16_t volatile *ctr;
+
   TU_ASSERT(dev_addr < 6,); /* USBa can only handle addresses from 0 to 5. */
   if (!dev_addr) return;
+
   _hcd.ctl_mps[dev_addr] = 0;
   uint8_t *ep = &_hcd.ep[dev_addr - 1][0][0];
+
   for (int i = 0; i < 2 * 15; ++i, ++ep) {
     unsigned num = *ep;
     if (!num || (dev_addr != _hcd.pipe[num].dev)) continue;
 
-    ctr = (uint16_t volatile*)&RUSB2->PIPE_CTR[num - 1];
+    ctr = (uint16_t volatile*)&rusb->PIPE_CTR[num - 1];
     *ctr = 0;
-    RUSB2->NRDYENB &= ~TU_BIT(num);
-    RUSB2->BRDYENB &= ~TU_BIT(num);
-    RUSB2->PIPESEL = num;
-    RUSB2->PIPECFG = 0;
-    RUSB2->PIPEMAXP = 0;
+    rusb->NRDYENB &= ~TU_BIT(num);
+    rusb->BRDYENB &= ~TU_BIT(num);
+    rusb->PIPESEL = num;
+    rusb->PIPECFG = 0;
+    rusb->PIPEMAXP = 0;
 
     _hcd.pipe[num].ep  = 0;
     _hcd.pipe[num].dev = 0;
@@ -631,52 +644,54 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
  *--------------------------------------------------------------------+*/
 bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8])
 {
-  (void)rhport;
-  TU_LOG(TU_RUSB2_HCD_DBG, "S %d %x\n", dev_addr, RUSB2->DCPCTR);
-
   TU_ASSERT(dev_addr < 6); /* USBa can only handle addresses from 0 to 5. */
-  TU_ASSERT(0 == RUSB2->DCPCTR_b.SUREQ);
 
-  RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_NAK;
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
+  TU_LOG(TU_RUSB2_HCD_DBG, "S %d %x\n", dev_addr, rusb->DCPCTR);
+
+  TU_ASSERT(0 == rusb->DCPCTR_b.SUREQ);
+
+  rusb->DCPCTR = RUSB2_PIPE_CTR_PID_NAK;
 
   _hcd.pipe[0].buf       = NULL;
   _hcd.pipe[0].length    = 8;
   _hcd.pipe[0].remaining = 0;
   _hcd.pipe[0].dev       = dev_addr;
 
-  while (RUSB2->DCPCTR_b.PBUSY) ;
-  RUSB2->DCPMAXP = (dev_addr << 12) | _hcd.ctl_mps[dev_addr];
+  while (rusb->DCPCTR_b.PBUSY) ;
+  rusb->DCPMAXP = (dev_addr << 12) | _hcd.ctl_mps[dev_addr];
 
   /* Set direction in advance for DATA stage */
   uint8_t const bmRequesttype = setup_packet[0];
-  RUSB2->DCPCFG_b.DIR = tu_edpt_dir(bmRequesttype) ? 0: 1;
+  rusb->DCPCFG_b.DIR = tu_edpt_dir(bmRequesttype) ? 0: 1;
 
   uint16_t const* p = (uint16_t const*)(uintptr_t)&setup_packet[0];
-  RUSB2->USBREQ  = tu_htole16(p[0]);
-  RUSB2->USBVAL  = p[1];
-  RUSB2->USBINDX = p[2];
-  RUSB2->USBLENG = p[3];
+  rusb->USBREQ  = tu_htole16(p[0]);
+  rusb->USBVAL  = p[1];
+  rusb->USBINDX = p[2];
+  rusb->USBLENG = p[3];
 
-  RUSB2->DCPCTR_b.SUREQ = 1;
+  rusb->DCPCTR_b.SUREQ = 1;
   return true;
 }
 
 bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const *ep_desc)
 {
-  (void)rhport;
   TU_ASSERT(dev_addr < 6); /* USBa can only handle addresses from 0 to 5. */
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
 
   const unsigned ep_addr = ep_desc->bEndpointAddress;
   const unsigned epn     = tu_edpt_number(ep_addr);
   const unsigned mps     = tu_edpt_packet_size(ep_desc);
+
   if (0 == epn) {
-    RUSB2->DCPCTR = RUSB2_PIPE_CTR_PID_NAK;
+    rusb->DCPCTR = RUSB2_PIPE_CTR_PID_NAK;
     hcd_devtree_info_t devtree;
     hcd_devtree_get_info(dev_addr, &devtree);
-    uint16_t volatile *devadd = (uint16_t volatile *)(uintptr_t) &RUSB2->DEVADD[0];
+    uint16_t volatile *devadd = (uint16_t volatile *)(uintptr_t) &rusb->DEVADD[0];
     devadd += dev_addr;
-    while (RUSB2->DCPCTR_b.PBUSY) ;
-    RUSB2->DCPMAXP = (dev_addr << 12) | mps;
+    while (rusb->DCPCTR_b.PBUSY) {}
+    rusb->DCPMAXP = (dev_addr << 12) | mps;
     *devadd = (TUSB_SPEED_FULL == devtree.speed) ? RUSB2_DEVADD_USBSPD_FS : RUSB2_DEVADD_USBSPD_LS;
     _hcd.ctl_mps[dev_addr] = mps;
     return true;
@@ -690,17 +705,20 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
   }
   const unsigned num = find_pipe(xfer);
   if (!num) return false;
+
   _hcd.pipe[num].dev = dev_addr;
   _hcd.pipe[num].ep  = ep_addr;
   _hcd.ep[dev_addr - 1][dir_in][epn - 1] = num;
 
   /* setup pipe */
   hcd_int_disable(rhport);
-  RUSB2->PIPESEL = num;
-  RUSB2->PIPEMAXP = (dev_addr << 12) | mps;
-  volatile uint16_t *ctr = get_pipectr(num);
+
+  rusb->PIPESEL = num;
+  rusb->PIPEMAXP = (dev_addr << 12) | mps;
+  volatile uint16_t *ctr = get_pipectr(rusb, num);
   *ctr = RUSB2_PIPE_CTR_ACLRM_Msk | RUSB2_PIPE_CTR_SQCLR_Msk;
   *ctr = 0;
+
   unsigned cfg = ((1 ^ dir_in) << 4) | epn;
   if (xfer == TUSB_XFER_BULK) {
     cfg |= RUSB2_PIPECFG_TYPE_BULK | RUSB2_PIPECFG_SHTNAK_Msk | RUSB2_PIPECFG_DBLB_Msk;
@@ -709,13 +727,16 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
   } else {
     cfg |= RUSB2_PIPECFG_TYPE_ISO | RUSB2_PIPECFG_DBLB_Msk;
   }
-  RUSB2->PIPECFG = cfg;
-  RUSB2->BRDYSTS = 0x1FFu ^ TU_BIT(num);
-  RUSB2->NRDYENB |= TU_BIT(num);
-  RUSB2->BRDYENB |= TU_BIT(num);
+
+  rusb->PIPECFG = cfg;
+  rusb->BRDYSTS = 0x1FFu ^ TU_BIT(num);
+  rusb->NRDYENB |= TU_BIT(num);
+  rusb->BRDYENB |= TU_BIT(num);
+
   if (!dir_in) {
     *ctr = RUSB2_PIPE_CTR_PID_BUF;
   }
+
   hcd_int_enable(rhport);
 
   return true;
@@ -726,14 +747,15 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *b
   bool r;
   hcd_int_disable(rhport);
   TU_LOG(TU_RUSB2_HCD_DBG, "X %d %x %u\n", dev_addr, ep_addr, buflen);
-  r = process_edpt_xfer(dev_addr, ep_addr, buffer, buflen);
+  r = process_edpt_xfer(rhport, dev_addr, ep_addr, buffer, buflen);
   hcd_int_enable(rhport);
   return r;
 }
 
 bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
 {
-  uint16_t volatile *ctr = addr_to_pipectr(dev_addr, ep_addr);
+  uint8_t rhport = 0; // FIXME change API
+  uint16_t volatile *ctr = addr_to_pipectr(rhport, dev_addr, ep_addr);
   TU_ASSERT(ctr);
 
   const uint32_t pid = *ctr & 0x3;
@@ -756,67 +778,73 @@ bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
 //--------------------------------------------------------------------+
 void hcd_int_handler(uint8_t rhport)
 {
-  (void)rhport;
+  rusb2_reg_t* rusb = RUSB2_REG(rhport);
+  static unsigned char attach_attempt = 0;
+  unsigned is0 = rusb->INTSTS0;
+  unsigned is1 = rusb->INTSTS1;
+
+  /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */
+  rusb->INTSTS1 = ~((RUSB2_INTSTS1_SACK_Msk | RUSB2_INTSTS1_SIGN_Msk | RUSB2_INTSTS1_ATTCH_Msk | RUSB2_INTSTS1_DTCH_Msk) & is1);
+  rusb->INTSTS0 = ~((RUSB2_INTSTS0_BRDY_Msk | RUSB2_INTSTS0_NRDY_Msk | RUSB2_INTSTS0_BEMP_Msk) & is0);
+
+  TU_LOG3("IS %04x %04x\n", is0, is1);
+  is1 &= rusb->INTENB1;
+  is0 &= rusb->INTENB0;
+
+  if (is1 & RUSB2_INTSTS1_SACK_Msk) {
+    /* Set DATA1 in advance for the next transfer. */
+    rusb->DCPCTR_b.SQSET = 1;
+    attach_attempt = 0;
+    hcd_event_xfer_complete(rusb->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true);
+  }
+
+  if (is1 & RUSB2_INTSTS1_SIGN_Msk) {
+    hcd_event_xfer_complete(rusb->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true);
+    if(attach_attempt > 0) {
+      rusb->DVSTCTR0_b.UACT = 1;
+      _hcd.need_reset = true;
+      rusb->INTENB1 = (rusb->INTENB1 & ~RUSB2_INTSTS1_ATTCH_Msk) | RUSB2_INTSTS1_DTCH_Msk;
+      hcd_event_device_attach(rhport, true);
+    }
+    attach_attempt--;
+  }
+
+  if (is1 & RUSB2_INTSTS1_ATTCH_Msk) {
+    attach_attempt = 10;
+    rusb->DVSTCTR0_b.UACT = 1;
+    _hcd.need_reset = true;
+    rusb->INTENB1 = (rusb->INTENB1 & ~RUSB2_INTSTS1_ATTCH_Msk) | RUSB2_INTSTS1_DTCH_Msk;
+    hcd_event_device_attach(rhport, true);
+  }
+
+  if (is1 & RUSB2_INTSTS1_DTCH_Msk) {
+    rusb->DVSTCTR0_b.UACT = 0;
+    if (rusb->DCPCTR_b.SUREQ) {
+      rusb->DCPCTR_b.SUREQCLR = 1;
+    }
+    rusb->INTENB1 = (rusb->INTENB1 & ~RUSB2_INTSTS1_DTCH_Msk) | RUSB2_INTSTS1_ATTCH_Msk;
+    hcd_event_device_remove(rhport, true);
+  }
+
+  if (is0 & RUSB2_INTSTS0_BEMP_Msk) {
+    const unsigned s = rusb->BEMPSTS;
+    rusb->BEMPSTS = 0;
+    if (s & 1) {
+      process_pipe0_bemp(rhport);
+    }
+  }
+
 #if defined(__CCRX__)
   static const int Mod37BitPosition[] = {
     -1, 0, 1, 26, 2, 23, 27, 0, 3, 16, 24, 30, 28, 11, 0, 13, 4,
     7, 17, 0, 25, 22, 31, 15, 29, 10, 12, 6, 0, 21, 14, 9, 5,
     20, 8, 19, 18};
 #endif
-  static unsigned char attach_attempt = 0;
-  unsigned is1 = RUSB2->INTSTS1;
-  unsigned is0 = RUSB2->INTSTS0;
 
-  /* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */
-  RUSB2->INTSTS1 = ~((RUSB2_INTSTS1_SACK_Msk | RUSB2_INTSTS1_SIGN_Msk | RUSB2_INTSTS1_ATTCH_Msk | RUSB2_INTSTS1_DTCH_Msk) & is1);
-  RUSB2->INTSTS0 = ~((RUSB2_INTSTS0_BRDY_Msk | RUSB2_INTSTS0_NRDY_Msk | RUSB2_INTSTS0_BEMP_Msk) & is0);
-  TU_LOG(TU_RUSB2_HCD_DBG, "IS %04x %04x\n", is0, is1);
-  is1 &= RUSB2->INTENB1;
-  is0 &= RUSB2->INTENB0;
-
-  if (is1 & RUSB2_INTSTS1_SACK_Msk) {
-    /* Set DATA1 in advance for the next transfer. */
-    RUSB2->DCPCTR_b.SQSET = 1;
-    attach_attempt = 0;
-    hcd_event_xfer_complete(RUSB2->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true);
-  }
-  if (is1 & RUSB2_INTSTS1_SIGN_Msk) {
-    hcd_event_xfer_complete(RUSB2->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true);
-    if(attach_attempt > 0) {
-      RUSB2->DVSTCTR0_b.UACT = 1;
-      _hcd.need_reset = true;
-      RUSB2->INTENB1 = (RUSB2->INTENB1 & ~RUSB2_INTSTS1_ATTCH_Msk) | RUSB2_INTSTS1_DTCH_Msk;
-      hcd_event_device_attach(rhport, true);
-    }
-    attach_attempt--;
-  }
-  if (is1 & RUSB2_INTSTS1_ATTCH_Msk) {
-    attach_attempt = 10;
-    RUSB2->DVSTCTR0_b.UACT = 1;
-    _hcd.need_reset = true;
-    RUSB2->INTENB1 = (RUSB2->INTENB1 & ~RUSB2_INTSTS1_ATTCH_Msk) | RUSB2_INTSTS1_DTCH_Msk;
-    hcd_event_device_attach(rhport, true);
-  }
-  if (is1 & RUSB2_INTSTS1_DTCH_Msk) {
-    RUSB2->DVSTCTR0_b.UACT = 0;
-    if (RUSB2->DCPCTR_b.SUREQ) {
-      RUSB2->DCPCTR_b.SUREQCLR = 1;
-    }
-    RUSB2->INTENB1 = (RUSB2->INTENB1 & ~RUSB2_INTSTS1_DTCH_Msk) | RUSB2_INTSTS1_ATTCH_Msk;
-    hcd_event_device_remove(rhport, true);
-  }
-
-  if (is0 & RUSB2_INTSTS0_BEMP_Msk) {
-    const unsigned s = RUSB2->BEMPSTS;
-    RUSB2->BEMPSTS = 0;
-    if (s & 1) {
-      process_pipe0_bemp(rhport);
-    }
-  }
   if (is0 & RUSB2_INTSTS0_NRDY_Msk) {
-    const unsigned m = RUSB2->NRDYENB;
-    unsigned s = RUSB2->NRDYSTS & m;
-    RUSB2->NRDYSTS = ~s;
+    const unsigned m = rusb->NRDYENB;
+    unsigned s = rusb->NRDYSTS & m;
+    rusb->NRDYSTS = ~s;
     while (s) {
 #if defined(__CCRX__)
       const unsigned num = Mod37BitPosition[(-s & s) % 37];
@@ -828,10 +856,10 @@ void hcd_int_handler(uint8_t rhport)
     }
   }
   if (is0 & RUSB2_INTSTS0_BRDY_Msk) {
-    const unsigned m = RUSB2->BRDYENB;
-    unsigned s = RUSB2->BRDYSTS & m;
+    const unsigned m = rusb->BRDYENB;
+    unsigned s = rusb->BRDYSTS & m;
     /* clear active bits (don't write 0 to already cleared bits according to the HW manual) */
-    RUSB2->BRDYSTS = ~s;
+    rusb->BRDYSTS = ~s;
     while (s) {
 #if defined(__CCRX__)
       const unsigned num = Mod37BitPosition[(-s & s) % 37];

From c37a9571741cef0dcf0cd5a77e202ae741a2dd42 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 26 Jul 2023 19:56:48 +0700
Subject: [PATCH 536/691] correct hcd_edpt_clear_stall() API signature

---
 src/host/hcd.h                                 | 2 +-
 src/portable/mentor/musb/hcd_musb.c            | 4 ++--
 src/portable/nxp/khci/hcd_khci.c               | 4 ++--
 src/portable/ohci/ohci.c                       | 4 ++--
 src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 4 ++--
 src/portable/raspberrypi/rp2040/hcd_rp2040.c   | 4 ++--
 src/portable/renesas/rusb2/hcd_rusb2.c         | 4 ++--
 7 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/src/host/hcd.h b/src/host/hcd.h
index 50f1dcdcc..898e0c6a4 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -179,7 +179,7 @@ bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr);
 bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]);
 
 // clear stall, data toggle is also reset to DATA0
-bool hcd_edpt_clear_stall(uint8_t daddr, uint8_t ep_addr);
+bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t daddr, uint8_t ep_addr);
 
 //--------------------------------------------------------------------+
 // USBH implemented API
diff --git a/src/portable/mentor/musb/hcd_musb.c b/src/portable/mentor/musb/hcd_musb.c
index 5be67a186..5d1fba6d9 100644
--- a/src/portable/mentor/musb/hcd_musb.c
+++ b/src/portable/mentor/musb/hcd_musb.c
@@ -831,8 +831,8 @@ bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
 }
 
 // clear stall, data toggle is also reset to DATA0
-bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
-{
+bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void) rhport;
   unsigned const pipenum = find_pipe(dev_addr, ep_addr);
   if (!pipenum) return false;
   hw_endpoint_t volatile *regs = edpt_regs(pipenum - 1);
diff --git a/src/portable/nxp/khci/hcd_khci.c b/src/portable/nxp/khci/hcd_khci.c
index 6784049c5..928564e26 100644
--- a/src/portable/nxp/khci/hcd_khci.c
+++ b/src/portable/nxp/khci/hcd_khci.c
@@ -570,8 +570,8 @@ bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
   return false;
 }
 
-bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
-{
+bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void) rhport;
   if (!tu_edpt_number(ep_addr)) return true;
   int num = find_pipe(dev_addr, ep_addr);
   if (num < 0) return false;
diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index 9f3af4781..413e72037 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -556,8 +556,8 @@ bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
   return false;
 }
 
-bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
-{
+bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void) rhport;
   ohci_ed_t * const p_ed = ed_from_addr(dev_addr, ep_addr);
 
   p_ed->is_stalled = 0;
diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
index bb41ad638..45a3e80ef 100644
--- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
+++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
@@ -163,8 +163,8 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
 //    return busy;
 //}
 
-bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
-{
+bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void) rhport;
   (void) dev_addr;
   (void) ep_addr;
 
diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c
index 5091fa907..6db8e2a0a 100644
--- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c
@@ -625,8 +625,8 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
   return true;
 }
 
-bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
-{
+bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void) rhport;
   (void) dev_addr;
   (void) ep_addr;
 
diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index 0a75d0b47..292d40da8 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -718,8 +718,8 @@ bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
   return false;
 }
 
-bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
-{
+bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void) rhport;
   uint16_t volatile *ctr = addr_to_pipectr(dev_addr, ep_addr);
   TU_ASSERT(ctr);
 

From 10575c1b380136ce9381393c33e982cea7ef4731 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 26 Jul 2023 20:48:18 +0700
Subject: [PATCH 537/691] mising ehci

---
 src/host/hcd.h           | 2 +-
 src/portable/ehci/ehci.c | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/host/hcd.h b/src/host/hcd.h
index 898e0c6a4..d77dd6e2f 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -179,7 +179,7 @@ bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr);
 bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]);
 
 // clear stall, data toggle is also reset to DATA0
-bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t daddr, uint8_t ep_addr);
+bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr);
 
 //--------------------------------------------------------------------+
 // USBH implemented API
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 241393a39..979069cfa 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -502,8 +502,8 @@ bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
   return still_active; // true if removed an active transfer
 }
 
-bool hcd_edpt_clear_stall(uint8_t daddr, uint8_t ep_addr)
-{
+bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t daddr, uint8_t ep_addr) {
+  (void) rhport;
   ehci_qhd_t *qhd = qhd_get_from_addr(daddr, ep_addr);
   qhd->qtd_overlay.halted = 0;
   hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));

From 5a29db2787fea0ff9fe236d2631b2dcbc94aea50 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 27 Jul 2023 15:52:55 +0700
Subject: [PATCH 538/691] add check for edpt_xfer() with halted, also reset
 data toggle when clear stall

---
 src/portable/ehci/ehci.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index b84de5191..02b843667 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -443,6 +443,11 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
   ehci_qtd_t* qtd;
 
   if (epnum == 0) {
+    // Control endpoint never be stalled. Skip reset Data Toggle since it is fixed per stage
+    if (qhd->qtd_overlay.halted) {
+      qhd->qtd_overlay.halted = false;
+    }
+
     qtd = qtd_control(dev_addr);
     qtd_init(qtd, buffer, buflen);
 
@@ -450,6 +455,9 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
     qtd->data_toggle = 1;
     qtd->pid = dir ? EHCI_PID_IN : EHCI_PID_OUT;
   } else {
+    // skip if endpoint is halted
+    TU_VERIFY(!qhd->qtd_overlay.halted);
+
     qtd = qtd_find_free();
     TU_ASSERT(qtd);
 
@@ -506,8 +514,9 @@ bool hcd_edpt_clear_stall(uint8_t daddr, uint8_t ep_addr)
 {
   ehci_qhd_t *qhd = qhd_get_from_addr(daddr, ep_addr);
   qhd->qtd_overlay.halted = 0;
+  qhd->qtd_overlay.data_toggle = 0;
   hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
-  // TODO reset data toggle ?
+
   return true;
 }
 
@@ -881,8 +890,10 @@ static void qhd_remove_qtd(ehci_qhd_t *qhd) {
 
   qhd->attached_qtd = NULL;
   qhd->attached_buffer = 0;
+  hcd_dcache_clean(qhd, sizeof(ehci_qhd_t));
 
   qtd->used = 0; // free QTD
+  hcd_dcache_clean(qtd, sizeof(ehci_qtd_t));
 }
 
 //--------------------------------------------------------------------+

From 6021803d584a95efac5bc10f89ed970b2c1fa60e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 28 Jul 2023 11:33:26 +0700
Subject: [PATCH 539/691] fix ci

---
 src/portable/renesas/rusb2/dcd_rusb2.c | 13 ++++++-------
 src/portable/renesas/rusb2/rusb2_ra.h  |  9 ++++++---
 2 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 83f0fdc4a..0380f36b9 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -49,17 +49,16 @@
     #define D0FIFOCTR CFIFOCTR
     #define D0FIFOCTR_b CFIFOCTR_b
   #endif
+
+  // Application API for setting IRQ number
+  void tud_int_set_irqnum(uint8_t rhport, int32_t irqnum) {
+    rusb2_controller[rhport].irqnum = irqnum;
+  }
+
 #else
   #error "Unsupported MCU"
 #endif
 
-//--------------------------------------------------------------------+
-// Application API for setting IRQ number
-//--------------------------------------------------------------------+
-void tud_int_set_irqnum(uint8_t rhport, int32_t irqnum) {
-  rusb2_controller[rhport].irqnum = irqnum;
-}
-
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
diff --git a/src/portable/renesas/rusb2/rusb2_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h
index 8a4d2ad36..7ff272bbc 100644
--- a/src/portable/renesas/rusb2/rusb2_ra.h
+++ b/src/portable/renesas/rusb2/rusb2_ra.h
@@ -64,8 +64,14 @@ typedef struct {
 #if defined(BSP_MCU_GROUP_RA6M5) || defined(BSP_MCU_GROUP_RA6M3) || (BSP_CFG_MCU_PART_SERIES == 8)
   #define RUSB2_SUPPORT_HIGHSPEED
   #define RUSB2_CONTROLLER_COUNT 2
+
+  #define rusb2_is_highspeed_rhport(_p)  (_p == 1)
+  #define rusb2_is_highspeed_reg(_reg)   (_reg == RUSB2_REG(1))
 #else
   #define RUSB2_CONTROLLER_COUNT 1
+
+  #define rusb2_is_highspeed_rhport(_p)  (false)
+  #define rusb2_is_highspeed_reg(_reg)   (false)
 #endif
 
 // USBFS_INT_IRQn and USBHS_USB_INT_RESUME_IRQn are generated by FSP
@@ -78,9 +84,6 @@ static rusb2_controller_t rusb2_controller[] = {
 
 #define RUSB2_REG(_p)      ((rusb2_reg_t*) rusb2_controller[_p].reg_base)
 
-#define rusb2_is_highspeed_rhport(_p)  (_p == 1)
-#define rusb2_is_highspeed_reg(_reg)   (_reg == RUSB2_REG(1))
-
 //--------------------------------------------------------------------+
 // RUSB2 API
 //--------------------------------------------------------------------+

From e56d5443a8a87e932b22bc6315f30cd537fe0edf Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 28 Jul 2023 12:42:40 +0700
Subject: [PATCH 540/691] - revert usb address - more clean up

---
 src/portable/renesas/rusb2/dcd_rusb2.c |  6 +++---
 src/portable/renesas/rusb2/hcd_rusb2.c | 14 ++++----------
 2 files changed, 7 insertions(+), 13 deletions(-)

diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 0380f36b9..9383923bd 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -51,7 +51,7 @@
   #endif
 
   // Application API for setting IRQ number
-  void tud_int_set_irqnum(uint8_t rhport, int32_t irqnum) {
+  void tud_rusb2_set_irqnum(uint8_t rhport, int32_t irqnum) {
     rusb2_controller[rhport].irqnum = irqnum;
   }
 
@@ -638,7 +638,7 @@ static void process_bus_reset(uint8_t rhport)
 static void process_set_address(uint8_t rhport)
 {
   rusb2_reg_t* rusb = RUSB2_REG(rhport);
-  const uint32_t addr = rusb->USBADDR & 0xFF;
+  const uint16_t addr = rusb->USBADDR_b.USBADDR;
   if (!addr) return;
 
   const tusb_control_request_t setup_packet = {
@@ -821,7 +821,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
 
   if ( rusb2_is_highspeed_rhport(rhport) ) {
     // FIXME shouldn't be after pipe selection and config, also the BUFNMB should be changed
-    // depending on the allocation scheme
+    //       depending on the allocation scheme
     rusb->PIPEBUF = 0x7C08;
   }
 
diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index fef8bdf19..c5ed8ae55 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -32,21 +32,15 @@
 #include "host/hcd.h"
 #include "rusb2_type.h"
 
-#if !defined(CFG_TUSB_RHPORT0_MODE) && !defined(CFG_TUSB_RHPORT1_MODE)
-// fallback
-#define CFG_TUSB_RHPORT0_MODE   OPT_MODE_HOST
-#define CFG_TUSB_RHPORT1_MODE   0
-#endif
-
 #if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
   #include "rusb2_rx.h"
 
 #elif TU_CHECK_MCU(OPT_MCU_RAXXX)
   #include "rusb2_ra.h"
 
-  void osal_task_delay(uint32_t msec) {
-    R_BSP_SoftwareDelay(msec, BSP_DELAY_UNITS_MILLISECONDS);
-  }
+//  void osal_task_delay(uint32_t msec) {
+//    R_BSP_SoftwareDelay(msec, BSP_DELAY_UNITS_MILLISECONDS);
+//  }
 
 #else
   #error "Unsupported MCU"
@@ -785,7 +779,7 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
 void hcd_int_handler(uint8_t rhport)
 {
   rusb2_reg_t* rusb = RUSB2_REG(rhport);
-  static unsigned char attach_attempt = 0;
+  static unsigned char attach_attempt = 0; // TODO remove later
   unsigned is0 = rusb->INTSTS0;
   unsigned is1 = rusb->INTSTS1;
 

From 8226b046a99a25f483f99fe44c29066f3f1d7f7b Mon Sep 17 00:00:00 2001
From: 0xCCF4 <20901343+0xCCF4@users.noreply.github.com>
Date: Fri, 28 Jul 2023 11:19:08 +0200
Subject: [PATCH 541/691] Fixed typo in rp2040 hw bspw family.c

---
 hw/bsp/rp2040/family.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index 097e6fbd6..40e3f11cd 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -149,7 +149,7 @@ void board_init(void)
 #endif
 
 #ifdef UART_DEV
-  bi_decl(bi_2pins_with_func(UART_TX_PIN, UART_TX_PIN, GPIO_FUNC_UART));
+  bi_decl(bi_2pins_with_func(UART_TX_PIN, UART_RX_PIN, GPIO_FUNC_UART));
   uart_inst = uart_get_instance(UART_DEV);
   stdio_uart_init_full(uart_inst, CFG_BOARD_UART_BAUDRATE, UART_TX_PIN, UART_RX_PIN);
 #endif

From feb58ebd54e68bc3b7f21b0d168417053c525f0a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 28 Jul 2023 19:01:12 +0700
Subject: [PATCH 542/691] add uno r4 wih FLASH_IMAGE_START=0x4000, running but
 interrupt (systick) does not seems to work

---
 .idea/runConfigurations/ra4m1.xml             |  2 +-
 .idea/runConfigurations/ra6m1.xml             |  2 +-
 .idea/runConfigurations/ra6m5.xml             |  2 +-
 .../ra4m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h | 18 ++--
 hw/bsp/ra/boards/uno_r4/board.cmake           | 11 +++
 hw/bsp/ra/boards/uno_r4/board.h               | 53 +++++++++++
 hw/bsp/ra/boards/uno_r4/board.mk              |  9 ++
 hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp/bsp_cfg.h | 35 ++++++++
 .../uno_r4/fsp_cfg/bsp/bsp_mcu_device_cfg.h   |  5 ++
 .../fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h       | 11 +++
 .../uno_r4/fsp_cfg/bsp/bsp_mcu_family_cfg.h   | 87 +++++++++++++++++++
 .../ra/boards/uno_r4/fsp_cfg/bsp_clock_cfg.h  | 21 +++++
 hw/bsp/ra/boards/uno_r4/uno_r4.ld             | 25 ++++++
 hw/bsp/ra/family.mk                           |  3 +-
 src/portable/renesas/rusb2/hcd_rusb2.c        |  1 +
 15 files changed, 272 insertions(+), 13 deletions(-)
 create mode 100644 hw/bsp/ra/boards/uno_r4/board.cmake
 create mode 100644 hw/bsp/ra/boards/uno_r4/board.h
 create mode 100644 hw/bsp/ra/boards/uno_r4/board.mk
 create mode 100644 hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp/bsp_cfg.h
 create mode 100644 hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp/bsp_mcu_device_cfg.h
 create mode 100644 hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h
 create mode 100644 hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp/bsp_mcu_family_cfg.h
 create mode 100644 hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp_clock_cfg.h
 create mode 100644 hw/bsp/ra/boards/uno_r4/uno_r4.ld

diff --git a/.idea/runConfigurations/ra4m1.xml b/.idea/runConfigurations/ra4m1.xml
index 22bb61949..149a157c4 100644
--- a/.idea/runConfigurations/ra4m1.xml
+++ b/.idea/runConfigurations/ra4m1.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="ra4m1" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA4M1AB&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="ra6m5" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="ra4m1" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA4M1AB&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $PROJECT_DIR$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/ra6m1.xml b/.idea/runConfigurations/ra6m1.xml
index 438ac4063..57af9abd9 100644
--- a/.idea/runConfigurations/ra6m1.xml
+++ b/.idea/runConfigurations/ra6m1.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="ra6m1" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA6M1AD&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="ra6m5" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="ra6m1" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA6M1AD&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $PROJECT_DIR$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/ra6m5.xml b/.idea/runConfigurations/ra6m5.xml
index 89f9787a0..1a6358304 100644
--- a/.idea/runConfigurations/ra6m5.xml
+++ b/.idea/runConfigurations/ra6m5.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="ra6m5" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA6M5BH&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc_hid" CONFIG_NAME="ra6m5" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc_hid">
+  <configuration default="false" name="ra6m5" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA6M5BH&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $PROJECT_DIR$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc_hid" CONFIG_NAME="ra6m5" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc_hid">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h
index 3bde2db0d..72cdb89e6 100644
--- a/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h
+++ b/hw/bsp/ra/boards/ra4m1_ek/fsp_cfg/bsp/bsp_mcu_family_cfg.h
@@ -12,16 +12,16 @@
 #define BSP_MOCO_HZ                 (8000000)
 #define BSP_SUB_CLOCK_HZ            (32768)
 #if   BSP_CFG_HOCO_FREQUENCY == 0
-#define BSP_HOCO_HZ             (24000000)
+  #define BSP_HOCO_HZ             (24000000)
 #elif BSP_CFG_HOCO_FREQUENCY == 2
-                #define BSP_HOCO_HZ             (32000000)
-            #elif BSP_CFG_HOCO_FREQUENCY == 4
-                #define BSP_HOCO_HZ             (48000000)
-            #elif BSP_CFG_HOCO_FREQUENCY == 5
-                #define BSP_HOCO_HZ             (64000000)
-            #else
-                #error "Invalid HOCO frequency chosen (BSP_CFG_HOCO_FREQUENCY) in bsp_clock_cfg.h"
-            #endif
+  #define BSP_HOCO_HZ             (32000000)
+#elif BSP_CFG_HOCO_FREQUENCY == 4
+  #define BSP_HOCO_HZ             (48000000)
+#elif BSP_CFG_HOCO_FREQUENCY == 5
+  #define BSP_HOCO_HZ             (64000000)
+#else
+  #error "Invalid HOCO frequency chosen (BSP_CFG_HOCO_FREQUENCY) in bsp_clock_cfg.h"
+#endif
 #define BSP_CORTEX_VECTOR_TABLE_ENTRIES    (16U)
 #define BSP_VECTOR_TABLE_MAX_ENTRIES       (48U)
 
diff --git a/hw/bsp/ra/boards/uno_r4/board.cmake b/hw/bsp/ra/boards/uno_r4/board.cmake
new file mode 100644
index 000000000..34780d776
--- /dev/null
+++ b/hw/bsp/ra/boards/uno_r4/board.cmake
@@ -0,0 +1,11 @@
+set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
+set(MCU_VARIANT ra4m1)
+
+set(JLINK_DEVICE R7FA4M1AB)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+#  target_compile_definitions(${TARGET} PUBLIC)
+#  target_sources(${TARGET} PRIVATE)
+#  target_include_directories(${BOARD_TARGET} PUBLIC)
+endfunction()
diff --git a/hw/bsp/ra/boards/uno_r4/board.h b/hw/bsp/ra/boards/uno_r4/board.h
new file mode 100644
index 000000000..72abda27f
--- /dev/null
+++ b/hw/bsp/ra/boards/uno_r4/board.h
@@ -0,0 +1,53 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LED1          BSP_IO_PORT_01_PIN_11 // D13
+#define LED_STATE_ON  1
+
+#define SW1                   BSP_IO_PORT_01_PIN_10 // D12
+#define BUTTON_STATE_ACTIVE   0
+
+static const ioport_pin_cfg_t board_pin_cfg[] = {
+    {.pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT},
+    {.pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT},
+    // USB FS D+, D-, VBus
+    {.pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
+    {.pin = BSP_IO_PORT_09_PIN_14, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
+    {.pin = BSP_IO_PORT_09_PIN_15, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS},
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/hw/bsp/ra/boards/uno_r4/board.mk b/hw/bsp/ra/boards/uno_r4/board.mk
new file mode 100644
index 000000000..cbe6c782c
--- /dev/null
+++ b/hw/bsp/ra/boards/uno_r4/board.mk
@@ -0,0 +1,9 @@
+CPU_CORE = cortex-m4
+MCU_VARIANT = ra4m1
+
+LD_FILE = $(BOARD_PATH)/${BOARD}.ld
+
+# For flash-jlink target
+JLINK_DEVICE = R7FA4M1AB
+
+flash: flash-jlink
diff --git a/hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp/bsp_cfg.h
new file mode 100644
index 000000000..c1d1022cc
--- /dev/null
+++ b/hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp/bsp_cfg.h
@@ -0,0 +1,35 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_CFG_H_
+#define BSP_CFG_H_
+
+#include "bsp_clock_cfg.h"
+#include "bsp_mcu_family_cfg.h"
+#include "board_cfg.h"
+
+#undef RA_NOT_DEFINED
+#define BSP_CFG_RTOS (0)
+#if defined(_RA_BOOT_IMAGE)
+#define BSP_CFG_BOOT_IMAGE (1)
+#endif
+#define BSP_CFG_MCU_VCC_MV (3300)
+#define BSP_CFG_STACK_MAIN_BYTES (0x800)
+#define BSP_CFG_HEAP_BYTES (0x1000)
+#define BSP_CFG_PARAM_CHECKING_ENABLE (1)
+#define BSP_CFG_ASSERT (0)
+#define BSP_CFG_ERROR_LOG (0)
+
+#define BSP_CFG_PFS_PROTECT ((1))
+
+#define BSP_CFG_C_RUNTIME_INIT ((1))
+#define BSP_CFG_EARLY_INIT     ((0))
+
+#define BSP_CFG_STARTUP_CLOCK_REG_NOT_RESET ((0))
+
+#define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (0)
+
+#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE	(0)
+#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE		(0)
+#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED	(0)
+#define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000
+
+#endif /* BSP_CFG_H_ */
diff --git a/hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp/bsp_mcu_device_cfg.h b/hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp/bsp_mcu_device_cfg.h
new file mode 100644
index 000000000..444d32e56
--- /dev/null
+++ b/hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp/bsp_mcu_device_cfg.h
@@ -0,0 +1,5 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_MCU_DEVICE_CFG_H_
+#define BSP_MCU_DEVICE_CFG_H_
+#define BSP_CFG_MCU_PART_SERIES (4)
+#endif /* BSP_MCU_DEVICE_CFG_H_ */
diff --git a/hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h b/hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h
new file mode 100644
index 000000000..336918800
--- /dev/null
+++ b/hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h
@@ -0,0 +1,11 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_MCU_DEVICE_PN_CFG_H_
+#define BSP_MCU_DEVICE_PN_CFG_H_
+#define BSP_MCU_R7FA4M1AB3CNE
+#define BSP_MCU_FEATURE_SET ('A')
+#define BSP_ROM_SIZE_BYTES (262144)
+#define BSP_RAM_SIZE_BYTES (32768)
+#define BSP_DATA_FLASH_SIZE_BYTES (8192)
+#define BSP_PACKAGE_QFN
+#define BSP_PACKAGE_PINS (48)
+#endif /* BSP_MCU_DEVICE_PN_CFG_H_ */
diff --git a/hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp/bsp_mcu_family_cfg.h
new file mode 100644
index 000000000..fc604eb3b
--- /dev/null
+++ b/hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp/bsp_mcu_family_cfg.h
@@ -0,0 +1,87 @@
+/* generated configuration header file through renesas e2 studio */
+#ifndef BSP_MCU_FAMILY_CFG_H_
+#define BSP_MCU_FAMILY_CFG_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "bsp_mcu_device_pn_cfg.h"
+#include "bsp_mcu_device_cfg.h"
+#include "bsp_mcu_info.h"
+#include "bsp_clock_cfg.h"
+
+#define BSP_MCU_GROUP_RA4M1 (1)
+#define BSP_LOCO_HZ                 (32768)
+#define BSP_MOCO_HZ                 (8000000)
+#define BSP_SUB_CLOCK_HZ            (32768)
+#if   BSP_CFG_HOCO_FREQUENCY == 0
+  #define BSP_HOCO_HZ             (24000000)
+#elif BSP_CFG_HOCO_FREQUENCY == 2
+  #define BSP_HOCO_HZ             (32000000)
+#elif BSP_CFG_HOCO_FREQUENCY == 4
+  #define BSP_HOCO_HZ             (48000000)
+#elif BSP_CFG_HOCO_FREQUENCY == 5
+  #define BSP_HOCO_HZ             (64000000)
+#else
+  #error "Invalid HOCO frequency chosen (BSP_CFG_HOCO_FREQUENCY) in bsp_clock_cfg.h"
+#endif
+#define BSP_CORTEX_VECTOR_TABLE_ENTRIES    (16U)
+#define BSP_VECTOR_TABLE_MAX_ENTRIES       (48U)
+#define BSP_MCU_VBATT_SUPPORT       (1)
+
+#define OFS_SEQ1 0xA001A001 | (1 << 1) | (3 << 2)
+#define OFS_SEQ2 (15 << 4) | (3 << 8) | (3 << 10)
+#define OFS_SEQ3 (1 << 12) | (1 << 14) | (1 << 17)
+#define OFS_SEQ4 (3 << 18) |(15 << 20) | (3 << 24) | (3 << 26)
+#define OFS_SEQ5 (1 << 28) | (1 << 30)
+#define BSP_CFG_ROM_REG_OFS0 (OFS_SEQ1 | OFS_SEQ2 | OFS_SEQ3 | OFS_SEQ4 | OFS_SEQ5)
+#define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEC3 | (1 << 2) | (3 << 3) | (0 << 8))
+#define BSP_CFG_USE_LOW_VOLTAGE_MODE ((0))
+#define BSP_CFG_ROM_REG_MPU_PC0_ENABLE (1)
+#define BSP_CFG_ROM_REG_MPU_PC0_START (0x00FFFFFC)
+#define BSP_CFG_ROM_REG_MPU_PC0_END (0x00FFFFFF)
+#define BSP_CFG_ROM_REG_MPU_PC1_ENABLE (1)
+#define BSP_CFG_ROM_REG_MPU_PC1_START (0x00FFFFFC)
+#define BSP_CFG_ROM_REG_MPU_PC1_END (0x00FFFFFF)
+#define BSP_CFG_ROM_REG_MPU_REGION0_ENABLE (1)
+#define BSP_CFG_ROM_REG_MPU_REGION0_START (0x00FFFFFC)
+#define BSP_CFG_ROM_REG_MPU_REGION0_END (0x00FFFFFF)
+#define BSP_CFG_ROM_REG_MPU_REGION1_ENABLE (1)
+#define BSP_CFG_ROM_REG_MPU_REGION1_START (0x200FFFFC)
+#define BSP_CFG_ROM_REG_MPU_REGION1_END (0x200FFFFF)
+#define BSP_CFG_ROM_REG_MPU_REGION2_ENABLE (1)
+#define BSP_CFG_ROM_REG_MPU_REGION2_START (0x407FFFFC)
+#define BSP_CFG_ROM_REG_MPU_REGION2_END (0x407FFFFF)
+#define BSP_CFG_ROM_REG_MPU_REGION3_ENABLE (1)
+#define BSP_CFG_ROM_REG_MPU_REGION3_START (0x400DFFFC)
+#define BSP_CFG_ROM_REG_MPU_REGION3_END (0x400DFFFF)
+#ifndef BSP_CLOCK_CFG_MAIN_OSC_WAIT
+#define BSP_CLOCK_CFG_MAIN_OSC_WAIT (9)
+#endif
+/* Used to create IELS values for the interrupt initialization table g_interrupt_event_link_select. */
+#define BSP_PRV_IELS_ENUM(vector)    (ELC_ ## vector)
+
+/*
+ ID Code
+ Note: To permanently lock and disable the debug interface define the BSP_ID_CODE_PERMANENTLY_LOCKED in the compiler settings.
+ WARNING: This will disable debug access to the part and cannot be reversed by a debug probe.
+ */
+#if defined(BSP_ID_CODE_PERMANENTLY_LOCKED)
+            #define BSP_CFG_ID_CODE_LONG_1 (0x00000000)
+            #define BSP_CFG_ID_CODE_LONG_2 (0x00000000)
+            #define BSP_CFG_ID_CODE_LONG_3 (0x00000000)
+            #define BSP_CFG_ID_CODE_LONG_4 (0x00000000)
+            #else
+/* ID CODE: FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF */
+#define BSP_CFG_ID_CODE_LONG_1 (0xFFFFFFFF)
+#define BSP_CFG_ID_CODE_LONG_2 (0xFFFFFFFF)
+#define BSP_CFG_ID_CODE_LONG_3 (0xFFFFFFFF)
+#define BSP_CFG_ID_CODE_LONG_4 (0xffFFFFFF)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BSP_MCU_FAMILY_CFG_H_ */
diff --git a/hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp_clock_cfg.h b/hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp_clock_cfg.h
new file mode 100644
index 000000000..63618ec4b
--- /dev/null
+++ b/hw/bsp/ra/boards/uno_r4/fsp_cfg/bsp_clock_cfg.h
@@ -0,0 +1,21 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_CLOCK_CFG_H_
+#define BSP_CLOCK_CFG_H_
+#define BSP_CFG_CLOCKS_SECURE (0)
+#define BSP_CFG_CLOCKS_OVERRIDE (0)
+#define BSP_CFG_XTAL_HZ (0) /* XTAL 0Hz */
+#define BSP_CFG_PLL_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* PLL Src: XTAL */
+#define BSP_CFG_HOCO_FREQUENCY (4) /* HOCO 48MHz */
+#define BSP_CFG_PLL_DIV (BSP_CLOCKS_PLL_DIV_4) /* PLL Div /4 */
+#define BSP_CFG_PLL_MUL BSP_CLOCKS_PLL_MUL(12, 0) /* PLL Mul x12 */
+#define BSP_CFG_CLOCK_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_HOCO) /* Clock Src: HOCO */
+#define BSP_CFG_ICLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* ICLK Div /1 */
+#define BSP_CFG_PCLKA_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* PCLKA Div /1 */
+#define BSP_CFG_PCLKB_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* PCLKB Div /2 */
+#define BSP_CFG_PCLKC_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* PCLKC Div /1 */
+#define BSP_CFG_PCLKD_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* PCLKD Div /1 */
+#define BSP_CFG_FCLK_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_2) /* FCLK Div /2 */
+#define BSP_CFG_CLKOUT_SOURCE (BSP_CLOCKS_CLOCK_DISABLED) /* CLKOUT Src: SUBCLK */
+#define BSP_CFG_CLKOUT_DIV (BSP_CLOCKS_SYS_CLOCK_DIV_1) /* CLKOUT Div /1 */
+#define BSP_CFG_UCK_SOURCE (BSP_CLOCKS_SOURCE_CLOCK_HOCO) /* UCLK Src: HOCO */
+#endif /* BSP_CLOCK_CFG_H_ */
diff --git a/hw/bsp/ra/boards/uno_r4/uno_r4.ld b/hw/bsp/ra/boards/uno_r4/uno_r4.ld
new file mode 100644
index 000000000..45f11dfb1
--- /dev/null
+++ b/hw/bsp/ra/boards/uno_r4/uno_r4.ld
@@ -0,0 +1,25 @@
+RAM_START = 0x20000000;
+RAM_LENGTH = 0x8000;
+FLASH_START = 0x00000000;
+FLASH_LENGTH = 0x40000;
+DATA_FLASH_START = 0x40100000;
+DATA_FLASH_LENGTH = 0x2000;
+OPTION_SETTING_START = 0x00000000;
+OPTION_SETTING_LENGTH = 0x0;
+OPTION_SETTING_S_START = 0x80000000;
+OPTION_SETTING_S_LENGTH = 0x0;
+ID_CODE_START = 0x01010018;
+ID_CODE_LENGTH = 0x20;
+SDRAM_START = 0x80010000;
+SDRAM_LENGTH = 0x0;
+QSPI_FLASH_START = 0x60000000;
+QSPI_FLASH_LENGTH = 0x0;
+OSPI_DEVICE_0_START = 0x80020000;
+OSPI_DEVICE_0_LENGTH = 0x0;
+OSPI_DEVICE_1_START = 0x80030000;
+OSPI_DEVICE_1_LENGTH = 0x0;
+
+/* Uno R4 has bootloader */
+FLASH_IMAGE_START = 0x4000;
+
+INCLUDE fsp.ld
diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk
index f5097460a..a5325306d 100644
--- a/hw/bsp/ra/family.mk
+++ b/hw/bsp/ra/family.mk
@@ -59,9 +59,10 @@ INC += \
 
 ifndef LD_FILE
 LD_FILE = $(FAMILY_PATH)/linker/gcc/$(MCU_VARIANT).ld
-LDFLAGS += -L$(TOP)/$(FAMILY_PATH)/linker/gcc
 endif
 
+LDFLAGS += -L$(TOP)/$(FAMILY_PATH)/linker/gcc
+
 # For freeRTOS port source
 # hack to use the port provided by renesas
 FREERTOS_PORTABLE_SRC = $(FSP_RA)/src/rm_freertos_port
diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index c5ed8ae55..7f49dc8a9 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -186,6 +186,7 @@ static inline void pipe_wait_for_ready(rusb2_reg_t* rusb, unsigned num)
 
 static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
 {
+  // NOTE: unlike DCD, Highspeed 32-bit FIFO does not need to adjust the fifo address
   volatile hw_fifo_t *reg = (volatile hw_fifo_t*)fifo;
   uintptr_t addr = (uintptr_t)buf;
   while (len >= 2) {

From 0d9973ef87a55276d14c2aa45647f92a8358e9a2 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 31 Jul 2023 16:21:19 +0700
Subject: [PATCH 543/691] enable_irq since uno bootloader can disable it.
 systick triggered, however usb still not work with uno

---
 hw/bsp/ra/family.c                     | 4 ++++
 src/portable/renesas/rusb2/dcd_rusb2.c | 1 +
 2 files changed, 5 insertions(+)

diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c
index b78fdedc7..096f0d0ff 100644
--- a/hw/bsp/ra/family.c
+++ b/hw/bsp/ra/family.c
@@ -92,6 +92,10 @@ const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENT
 //--------------------------------------------------------------------+
 
 void board_init(void) {
+  // Enable global interrupts in CPSR register since board with bootloader such as Arduino Uno R4
+  // can transfer CPU control with CPSR.I bit set to 0 (disable IRQ)
+  __enable_irq();
+
   /* Configure pins. */
   R_IOPORT_Open(&port_ctrl, &family_pin_cfg);
 
diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 9383923bd..37fd93497 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -740,6 +740,7 @@ void dcd_init(uint8_t rhport)
   rusb->BEMPENB = 1;
   rusb->BRDYENB = 1;
 
+  // If VBUS (detect) pin is not used, application need to call tud_connect() manually after tud_init()
   if (rusb->INTSTS0_b.VBSTS) {
     dcd_connect(rhport);
   }

From cb47231518d8a33bb9c5ab710c819049274d443b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 31 Jul 2023 17:13:21 +0700
Subject: [PATCH 544/691] revert out of scope changes

---
 src/host/usbh.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/host/usbh.c b/src/host/usbh.c
index c8eb91be3..15c48be47 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -258,7 +258,7 @@ static bool usbh_control_xfer_cb (uint8_t daddr, uint8_t ep_addr, xfer_result_t
 
 #if CFG_TUSB_OS == OPT_OS_NONE
 // TODO rework time-related function later
-TU_ATTR_WEAK void osal_task_delay(uint32_t msec)
+void osal_task_delay(uint32_t msec)
 {
   const uint32_t start = hcd_frame_number(_usbh_controller);
   while ( ( hcd_frame_number(_usbh_controller) - start ) < msec ) {}

From 3f788a4e5a7758ce51cbcadef4ac21e427cc3c56 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 31 Jul 2023 19:09:40 +0700
Subject: [PATCH 545/691] enable USBMC for uno r4, add board_init_after_tusb()
 API

add BOARD_UPPERCASE for board detection
---
 examples/device/audio_4_channel_mic/src/main.c    | 4 ++++
 examples/device/audio_test/src/main.c             | 4 ++++
 examples/device/audio_test_multi_rate/src/main.c  | 4 ++++
 examples/device/cdc_dual_ports/src/main.c         | 4 ++++
 examples/device/cdc_msc/src/main.c                | 4 ++++
 examples/device/cdc_msc_freertos/src/main.c       | 4 ++++
 examples/device/dfu/src/main.c                    | 4 ++++
 examples/device/dfu_runtime/src/main.c            | 4 ++++
 examples/device/dynamic_configuration/src/main.c  | 4 ++++
 examples/device/hid_boot_interface/src/main.c     | 4 ++++
 examples/device/hid_composite/src/main.c          | 4 ++++
 examples/device/hid_composite_freertos/src/main.c | 4 ++++
 examples/device/hid_generic_inout/src/main.c      | 4 ++++
 examples/device/hid_multiple_interface/src/main.c | 4 ++++
 examples/device/midi_test/src/main.c              | 4 ++++
 examples/device/msc_dual_lun/src/main.c           | 4 ++++
 examples/device/net_lwip_webserver/src/main.c     | 4 ++++
 examples/device/uac2_headset/src/main.c           | 4 ++++
 examples/device/usbtmc/src/main.c                 | 4 ++++
 examples/device/video_capture/src/main.c          | 4 ++++
 examples/device/webusb_serial/src/main.c          | 4 ++++
 examples/dual/host_hid_to_device_cdc/src/main.c   | 4 ++++
 examples/host/bare_api/src/main.c                 | 4 ++++
 examples/host/cdc_msc_hid/src/main.c              | 4 ++++
 examples/host/hid_controller/src/main.c           | 4 ++++
 examples/host/msc_file_explorer/src/main.c        | 5 +++++
 examples/make.mk                                  | 2 ++
 hw/bsp/board.h                                    | 3 +++
 hw/bsp/family_support.cmake                       | 5 +++++
 hw/bsp/ra/boards/uno_r4/board.mk                  | 2 +-
 hw/bsp/ra/family.c                                | 7 +++++++
 src/portable/renesas/rusb2/dcd_rusb2.c            | 2 --
 32 files changed, 123 insertions(+), 3 deletions(-)

diff --git a/examples/device/audio_4_channel_mic/src/main.c b/examples/device/audio_4_channel_mic/src/main.c
index 2b9c5143d..f5fc884bd 100644
--- a/examples/device/audio_4_channel_mic/src/main.c
+++ b/examples/device/audio_4_channel_mic/src/main.c
@@ -84,6 +84,10 @@ int main(void)
   // init device stack on configured roothub port
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   // Init values
   sampFreq = AUDIO_SAMPLE_RATE;
   clkValid = 1;
diff --git a/examples/device/audio_test/src/main.c b/examples/device/audio_test/src/main.c
index b5ca41d36..6dc655416 100644
--- a/examples/device/audio_test/src/main.c
+++ b/examples/device/audio_test/src/main.c
@@ -85,6 +85,10 @@ int main(void)
   // init device stack on configured roothub port
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   // Init values
   sampFreq = AUDIO_SAMPLE_RATE;
   clkValid = 1;
diff --git a/examples/device/audio_test_multi_rate/src/main.c b/examples/device/audio_test_multi_rate/src/main.c
index 078e783eb..637be2d40 100644
--- a/examples/device/audio_test_multi_rate/src/main.c
+++ b/examples/device/audio_test_multi_rate/src/main.c
@@ -99,6 +99,10 @@ int main(void)
   // init device stack on configured roothub port
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   // Init values
   sampFreq = sampleRatesList[0];
   clkValid = 1;
diff --git a/examples/device/cdc_dual_ports/src/main.c b/examples/device/cdc_dual_ports/src/main.c
index 70eaea85d..7ceff73b3 100644
--- a/examples/device/cdc_dual_ports/src/main.c
+++ b/examples/device/cdc_dual_ports/src/main.c
@@ -42,6 +42,10 @@ int main(void)
   // init device stack on configured roothub port
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   while (1)
   {
     tud_task(); // tinyusb device task
diff --git a/examples/device/cdc_msc/src/main.c b/examples/device/cdc_msc/src/main.c
index 6dad73cbf..87fc33181 100644
--- a/examples/device/cdc_msc/src/main.c
+++ b/examples/device/cdc_msc/src/main.c
@@ -58,6 +58,10 @@ int main(void)
   // init device stack on configured roothub port
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   while (1)
   {
     tud_task(); // tinyusb device task
diff --git a/examples/device/cdc_msc_freertos/src/main.c b/examples/device/cdc_msc_freertos/src/main.c
index 0e8a24d02..6cfef9ef5 100644
--- a/examples/device/cdc_msc_freertos/src/main.c
+++ b/examples/device/cdc_msc_freertos/src/main.c
@@ -136,6 +136,10 @@ void usb_device_task(void* param)
   // Otherwise it could cause kernel issue since USB IRQ handler does use RTOS queue API.
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   // RTOS forever loop
   while (1)
   {
diff --git a/examples/device/dfu/src/main.c b/examples/device/dfu/src/main.c
index 5f37f25e1..bcd5b4942 100644
--- a/examples/device/dfu/src/main.c
+++ b/examples/device/dfu/src/main.c
@@ -77,6 +77,10 @@ int main(void)
   // init device stack on configured roothub port
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   while (1)
   {
     tud_task(); // tinyusb device task
diff --git a/examples/device/dfu_runtime/src/main.c b/examples/device/dfu_runtime/src/main.c
index 4ec3cb188..beef1037d 100644
--- a/examples/device/dfu_runtime/src/main.c
+++ b/examples/device/dfu_runtime/src/main.c
@@ -72,6 +72,10 @@ int main(void)
   // init device stack on configured roothub port
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   while (1)
   {
     tud_task(); // tinyusb device task
diff --git a/examples/device/dynamic_configuration/src/main.c b/examples/device/dynamic_configuration/src/main.c
index 578f01d8c..6c7789138 100644
--- a/examples/device/dynamic_configuration/src/main.c
+++ b/examples/device/dynamic_configuration/src/main.c
@@ -59,6 +59,10 @@ int main(void)
   // init device stack on configured roothub port
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   while (1)
   {
     tud_task(); // tinyusb device task
diff --git a/examples/device/hid_boot_interface/src/main.c b/examples/device/hid_boot_interface/src/main.c
index 1a155996a..47f68f8fa 100644
--- a/examples/device/hid_boot_interface/src/main.c
+++ b/examples/device/hid_boot_interface/src/main.c
@@ -59,6 +59,10 @@ int main(void)
   // init device stack on configured roothub port
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   while (1)
   {
     tud_task(); // tinyusb device task
diff --git a/examples/device/hid_composite/src/main.c b/examples/device/hid_composite/src/main.c
index 8d0e6bece..d4c5f5b3e 100644
--- a/examples/device/hid_composite/src/main.c
+++ b/examples/device/hid_composite/src/main.c
@@ -60,6 +60,10 @@ int main(void)
   // init device stack on configured roothub port
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   while (1)
   {
     tud_task(); // tinyusb device task
diff --git a/examples/device/hid_composite_freertos/src/main.c b/examples/device/hid_composite_freertos/src/main.c
index ca02af100..bdbe26b86 100644
--- a/examples/device/hid_composite_freertos/src/main.c
+++ b/examples/device/hid_composite_freertos/src/main.c
@@ -138,6 +138,10 @@ void usb_device_task(void* param)
   // Otherwise it could cause kernel issue since USB IRQ handler does use RTOS queue API.
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   // RTOS forever loop
   while (1)
   {
diff --git a/examples/device/hid_generic_inout/src/main.c b/examples/device/hid_generic_inout/src/main.c
index 5db8f5581..5b3e53b06 100644
--- a/examples/device/hid_generic_inout/src/main.c
+++ b/examples/device/hid_generic_inout/src/main.c
@@ -83,6 +83,10 @@ int main(void)
   // init device stack on configured roothub port
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   while (1)
   {
     tud_task(); // tinyusb device task
diff --git a/examples/device/hid_multiple_interface/src/main.c b/examples/device/hid_multiple_interface/src/main.c
index 72240b208..94f845a84 100644
--- a/examples/device/hid_multiple_interface/src/main.c
+++ b/examples/device/hid_multiple_interface/src/main.c
@@ -64,6 +64,10 @@ int main(void)
   // init device stack on configured roothub port
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   while (1)
   {
     tud_task(); // tinyusb device task
diff --git a/examples/device/midi_test/src/main.c b/examples/device/midi_test/src/main.c
index 2c3e9d954..c77207ca2 100644
--- a/examples/device/midi_test/src/main.c
+++ b/examples/device/midi_test/src/main.c
@@ -65,6 +65,10 @@ int main(void)
   // init device stack on configured roothub port
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   while (1)
   {
     tud_task(); // tinyusb device task
diff --git a/examples/device/msc_dual_lun/src/main.c b/examples/device/msc_dual_lun/src/main.c
index c7f6de7bf..d8abb5151 100644
--- a/examples/device/msc_dual_lun/src/main.c
+++ b/examples/device/msc_dual_lun/src/main.c
@@ -57,6 +57,10 @@ int main(void)
   // init device stack on configured roothub port
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   while (1)
   {
     tud_task(); // tinyusb device task
diff --git a/examples/device/net_lwip_webserver/src/main.c b/examples/device/net_lwip_webserver/src/main.c
index 19a0eae9d..22543880e 100644
--- a/examples/device/net_lwip_webserver/src/main.c
+++ b/examples/device/net_lwip_webserver/src/main.c
@@ -232,6 +232,10 @@ int main(void)
   // init device stack on configured roothub port
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   /* initialize lwip, dhcp-server, dns-server, and http */
   init_lwip();
   while (!netif_is_up(&netif_data));
diff --git a/examples/device/uac2_headset/src/main.c b/examples/device/uac2_headset/src/main.c
index 19a3f7bae..c502eb10d 100644
--- a/examples/device/uac2_headset/src/main.c
+++ b/examples/device/uac2_headset/src/main.c
@@ -105,6 +105,10 @@ int main(void)
   // init device stack on configured roothub port
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   TU_LOG1("Headset running\r\n");
 
   while (1)
diff --git a/examples/device/usbtmc/src/main.c b/examples/device/usbtmc/src/main.c
index 2bba336f1..fa7de7570 100644
--- a/examples/device/usbtmc/src/main.c
+++ b/examples/device/usbtmc/src/main.c
@@ -57,6 +57,10 @@ int main(void)
   // init device stack on configured roothub port
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   while (1)
   {
     tud_task(); // tinyusb device task
diff --git a/examples/device/video_capture/src/main.c b/examples/device/video_capture/src/main.c
index 5654e0b61..b942dd30e 100644
--- a/examples/device/video_capture/src/main.c
+++ b/examples/device/video_capture/src/main.c
@@ -59,6 +59,10 @@ int main(void)
   // init device stack on configured roothub port
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   while (1)
   {
     tud_task(); // tinyusb device task
diff --git a/examples/device/webusb_serial/src/main.c b/examples/device/webusb_serial/src/main.c
index eaca78c73..f63d0ccea 100644
--- a/examples/device/webusb_serial/src/main.c
+++ b/examples/device/webusb_serial/src/main.c
@@ -96,6 +96,10 @@ int main(void)
   // init device stack on configured roothub port
   tud_init(BOARD_TUD_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   while (1)
   {
     tud_task(); // tinyusb device task
diff --git a/examples/dual/host_hid_to_device_cdc/src/main.c b/examples/dual/host_hid_to_device_cdc/src/main.c
index 817c63c70..5a31b9dda 100644
--- a/examples/dual/host_hid_to_device_cdc/src/main.c
+++ b/examples/dual/host_hid_to_device_cdc/src/main.c
@@ -83,6 +83,10 @@ int main(void)
   tud_init(BOARD_TUD_RHPORT);
   tuh_init(BOARD_TUH_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   while (1)
   {
     tud_task(); // tinyusb device task
diff --git a/examples/host/bare_api/src/main.c b/examples/host/bare_api/src/main.c
index bb7fa850e..7286befe0 100644
--- a/examples/host/bare_api/src/main.c
+++ b/examples/host/bare_api/src/main.c
@@ -67,6 +67,10 @@ int main(void)
   // init host stack on configured roothub port
   tuh_init(BOARD_TUH_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   while (1)
   {
     // tinyusb host task
diff --git a/examples/host/cdc_msc_hid/src/main.c b/examples/host/cdc_msc_hid/src/main.c
index 1f4acb822..51251be5c 100644
--- a/examples/host/cdc_msc_hid/src/main.c
+++ b/examples/host/cdc_msc_hid/src/main.c
@@ -48,6 +48,10 @@ int main(void)
   // init host stack on configured roothub port
   tuh_init(BOARD_TUH_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   while (1)
   {
     // tinyusb host task
diff --git a/examples/host/hid_controller/src/main.c b/examples/host/hid_controller/src/main.c
index 4dcc92587..a4ab2f711 100644
--- a/examples/host/hid_controller/src/main.c
+++ b/examples/host/hid_controller/src/main.c
@@ -54,6 +54,10 @@ int main(void)
   // init host stack on configured roothub port
   tuh_init(BOARD_TUH_RHPORT);
 
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   while (1)
   {
     // tinyusb host task
diff --git a/examples/host/msc_file_explorer/src/main.c b/examples/host/msc_file_explorer/src/main.c
index 7b1c2ef27..fc4b4e669 100644
--- a/examples/host/msc_file_explorer/src/main.c
+++ b/examples/host/msc_file_explorer/src/main.c
@@ -80,6 +80,11 @@ int main(void)
 
   // init host stack on configured roothub port
   tuh_init(BOARD_TUH_RHPORT);
+
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
   msc_app_init();
 
   while (1)
diff --git a/examples/make.mk b/examples/make.mk
index 3c3a920cc..4001a5359 100644
--- a/examples/make.mk
+++ b/examples/make.mk
@@ -116,6 +116,8 @@ INC += \
   $(TOP)/$(FAMILY_PATH) \
   $(TOP)/src \
 
+BOARD_UPPER = $(shell echo $(BOARD) | tr a-z A-Z)
+CFLAGS += -DBOARD_$(BOARD_UPPER)
 
 # Log level is mapped to TUSB DEBUG option
 ifneq ($(LOG),)
diff --git a/hw/bsp/board.h b/hw/bsp/board.h
index 036556731..d782013bb 100644
--- a/hw/bsp/board.h
+++ b/hw/bsp/board.h
@@ -54,6 +54,9 @@
 // Initialize on-board peripherals : led, button, uart and USB
 void board_init(void);
 
+// Init board after tinyusb is initialized
+void board_init_after_tusb(void) TU_ATTR_WEAK;
+
 // Turn LED on or off
 void board_led_write(bool state);
 
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index d8298c8ad..db1ce988e 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -181,6 +181,11 @@ endfunction()
 function(family_configure_common TARGET RTOS)
   family_add_rtos(${TARGET} ${RTOS})
 
+  string(TOUPPER ${BOARD} BOARD_UPPER)
+  target_compile_definitions(${TARGET} PUBLIC
+    BOARD_${BOARD_UPPER}
+  )
+
   # run size after build
   add_custom_command(TARGET ${TARGET} POST_BUILD
     COMMAND ${CMAKE_SIZE} $<TARGET_FILE:${TARGET}>
diff --git a/hw/bsp/ra/boards/uno_r4/board.mk b/hw/bsp/ra/boards/uno_r4/board.mk
index cbe6c782c..b7075eec0 100644
--- a/hw/bsp/ra/boards/uno_r4/board.mk
+++ b/hw/bsp/ra/boards/uno_r4/board.mk
@@ -1,7 +1,7 @@
 CPU_CORE = cortex-m4
 MCU_VARIANT = ra4m1
 
-LD_FILE = $(BOARD_PATH)/${BOARD}.ld
+LD_FILE = ${BOARD_PATH}/${BOARD}.ld
 
 # For flash-jlink target
 JLINK_DEVICE = R7FA4M1AB
diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c
index 096f0d0ff..e6213061d 100644
--- a/hw/bsp/ra/family.c
+++ b/hw/bsp/ra/family.c
@@ -124,6 +124,13 @@ void board_init(void) {
   board_led_write(false);
 }
 
+void board_init_after_tusb(void) {
+  // For board that use USB LDO regulator
+#if defined(BOARD_UNO_R4)
+  R_USB_FS0->USBMC |= R_USB_FS0_USBMC_VDCEN_Msk;
+#endif
+}
+
 void board_led_write(bool state) {
   R_IOPORT_PinWrite(&port_ctrl, LED1, state ? LED_STATE_ON : !LED_STATE_ON);
 }
diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 37fd93497..9a3983f56 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -726,8 +726,6 @@ void dcd_init(uint8_t rhport)
 
     rusb->PHYSLEW = 0x5;
     rusb->DPUSR0R_FS_b.FIXPHY0 = 0u; /* USB_BASE Transceiver Output fixed */
-
-    // rusb2->USBMC = (uint16_t) (rusb2->USBMC | RUSB2_USBMC_VDCEN_Msk);
   }
 
   /* Setup default control pipe */

From 1cccbaf7ec12ecf296644e9b51603261a0d586ac Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 1 Aug 2023 11:18:00 +0700
Subject: [PATCH 546/691] fix board name with dash

---
 examples/make.mk            | 2 +-
 hw/bsp/family_support.cmake | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/examples/make.mk b/examples/make.mk
index 4001a5359..4773189df 100644
--- a/examples/make.mk
+++ b/examples/make.mk
@@ -116,7 +116,7 @@ INC += \
   $(TOP)/$(FAMILY_PATH) \
   $(TOP)/src \
 
-BOARD_UPPER = $(shell echo $(BOARD) | tr a-z A-Z)
+BOARD_UPPER = $(shell echo $(subst -,_,$(BOARD)) | tr a-z A-Z)
 CFLAGS += -DBOARD_$(BOARD_UPPER)
 
 # Log level is mapped to TUSB DEBUG option
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index db1ce988e..8cc7a1420 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -182,6 +182,7 @@ function(family_configure_common TARGET RTOS)
   family_add_rtos(${TARGET} ${RTOS})
 
   string(TOUPPER ${BOARD} BOARD_UPPER)
+  string(REPLACE "-" "_" BOARD_UPPER ${BOARD_UPPER})
   target_compile_definitions(${TARGET} PUBLIC
     BOARD_${BOARD_UPPER}
   )

From 789e478d4d47cca9bd1cf7983a49c13476c54b78 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 1 Aug 2023 13:16:37 +0700
Subject: [PATCH 547/691] add portenta c33 bsp, add flash by dfu-util

---
 examples/rules.mk                             |  15 +-
 hw/bsp/family_support.cmake                   |  12 +
 hw/bsp/ra/boards/portenta_c33/board.cmake     |  25 ++
 hw/bsp/ra/boards/portenta_c33/board.h         |  68 +++
 hw/bsp/ra/boards/portenta_c33/board.mk        |  12 +
 .../boards/portenta_c33/fsp_cfg/bsp/bsp_cfg.h |  63 +++
 .../fsp_cfg/bsp/bsp_mcu_device_cfg.h          |   5 +
 .../fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h       |  11 +
 .../fsp_cfg/bsp/bsp_mcu_family_cfg.h          | 387 ++++++++++++++++++
 .../portenta_c33/fsp_cfg/bsp_clock_cfg.h      |  37 ++
 hw/bsp/ra/boards/portenta_c33/portenta_c33.ld |  25 ++
 hw/bsp/ra/family.cmake                        |   5 +
 hw/bsp/ra/family.mk                           |   2 +
 tools/make/toolchain/arm_gcc_rules.mk         |   3 +-
 14 files changed, 665 insertions(+), 5 deletions(-)
 create mode 100644 hw/bsp/ra/boards/portenta_c33/board.cmake
 create mode 100644 hw/bsp/ra/boards/portenta_c33/board.h
 create mode 100644 hw/bsp/ra/boards/portenta_c33/board.mk
 create mode 100644 hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp/bsp_cfg.h
 create mode 100644 hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp/bsp_mcu_device_cfg.h
 create mode 100644 hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h
 create mode 100644 hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp/bsp_mcu_family_cfg.h
 create mode 100644 hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp_clock_cfg.h
 create mode 100644 hw/bsp/ra/boards/portenta_c33/portenta_c33.ld

diff --git a/examples/rules.mk b/examples/rules.mk
index 44698b019..44d6b84c8 100644
--- a/examples/rules.mk
+++ b/examples/rules.mk
@@ -88,7 +88,7 @@ linkermap: $(BUILD)/$(PROJECT).elf
 # Flash Targets
 # ---------------------------------------
 
-# Jlink binary
+# --------------- Jlink -----------------
 ifeq ($(OS),Windows_NT)
   JLINKEXE = JLink.exe
 else
@@ -110,10 +110,12 @@ $(BUILD)/$(BOARD).jlink: $(BUILD)/$(PROJECT).hex
 flash-jlink: $(BUILD)/$(BOARD).jlink
 	$(JLINKEXE) -device $(JLINK_DEVICE) -if $(JLINK_IF) -JTAGConf -1,-1 -speed auto -CommandFile $<
 
+# --------------- stm32 cube programmer -----------------
 # Flash STM32 MCU using stlink with STM32 Cube Programmer CLI
 flash-stlink: $(BUILD)/$(PROJECT).elf
 	STM32_Programmer_CLI --connect port=swd --write $< --go
 
+# --------------- xfel -----------------
 $(BUILD)/$(PROJECT)-sunxi.bin: $(BUILD)/$(PROJECT).bin
 	$(PYTHON) $(TOP)/tools/mksunxi.py $< $@
 
@@ -121,18 +123,23 @@ flash-xfel: $(BUILD)/$(PROJECT)-sunxi.bin
 	xfel spinor write 0 $<
 	xfel reset
 
-# Flash using pyocd
+# --------------- pyocd -----------------
 PYOCD_OPTION ?=
 flash-pyocd: $(BUILD)/$(PROJECT).hex
 	pyocd flash -t $(PYOCD_TARGET) $(PYOCD_OPTION) $<
 	#pyocd reset -t $(PYOCD_TARGET)
 
-# Flash using openocd
+# --------------- openocd -----------------
 OPENOCD_OPTION ?=
 flash-openocd: $(BUILD)/$(PROJECT).elf
 	openocd $(OPENOCD_OPTION) -c "program $< verify reset exit"
 
-# flash with Black Magic Probe
+# --------------- dfu-util -----------------
+DFU_UTIL_OPTION ?= -a 0
+flash-dfu-util: $(BUILD)/$(PROJECT).bin
+	dfu-util -R $(DFU_UTIL_OPTION) -D $<
+
+# --------------- Black Magic -----------------
 # This symlink is created by https://github.com/blacksphere/blackmagic/blob/master/driver/99-blackmagic.rules
 BMP ?= /dev/ttyBmpGdb
 
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 8cc7a1420..529bdb8f3 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -407,6 +407,18 @@ function(family_flash_nxplink TARGET)
 endfunction()
 
 
+function(family_flash_dfu_util TARGET OPTION)
+  if (NOT DEFINED DFU_UTIL)
+    set(DFU_UTIL dfu-util)
+  endif ()
+
+  add_custom_target(${TARGET}-dfu-util
+    DEPENDS ${TARGET}
+    COMMAND ${DFU_UTIL} -R -d ${DFU_UTIL_VID_PID} -a 0 -D $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin
+    VERBATIM
+    )
+endfunction()
+
 #----------------------------------
 # Family specific
 #----------------------------------
diff --git a/hw/bsp/ra/boards/portenta_c33/board.cmake b/hw/bsp/ra/boards/portenta_c33/board.cmake
new file mode 100644
index 000000000..1837d8450
--- /dev/null
+++ b/hw/bsp/ra/boards/portenta_c33/board.cmake
@@ -0,0 +1,25 @@
+set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
+set(MCU_VARIANT ra6m5)
+
+set(JLINK_DEVICE R7FA6M5BH)
+set(DFU_UTIL_VID_PID 2341:0368)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+# Device port default to PORT1 Highspeed
+if (NOT DEFINED PORT)
+set(PORT 1)
+endif()
+
+# Host port will be the other port
+set(HOST_PORT $<NOT:${PORT}>)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    BOARD_TUD_RHPORT=${PORT}
+    BOARD_TUH_RHPORT=${HOST_PORT}
+    # port 0 is fullspeed, port 1 is highspeed
+    BOARD_TUD_MAX_SPEED=$<IF:${PORT},OPT_MODE_HIGH_SPEED,OPT_MODE_FULL_SPEED>
+    BOARD_TUH_MAX_SPEED=$<IF:${HOST_PORT},OPT_MODE_HIGH_SPEED,OPT_MODE_FULL_SPEED>
+    )
+endfunction()
diff --git a/hw/bsp/ra/boards/portenta_c33/board.h b/hw/bsp/ra/boards/portenta_c33/board.h
new file mode 100644
index 000000000..7841ec8b8
--- /dev/null
+++ b/hw/bsp/ra/boards/portenta_c33/board.h
@@ -0,0 +1,68 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LED1                  BSP_IO_PORT_01_PIN_07 // Red LED
+#define LED_STATE_ON          1
+
+#define SW1                   BSP_IO_PORT_04_PIN_08 // D12
+#define BUTTON_STATE_ACTIVE   0
+
+static const ioport_pin_cfg_t board_pin_cfg[] = {
+    { .pin = LED1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_OUTPUT | IOPORT_CFG_PORT_OUTPUT_LOW },
+    { .pin = SW1, .pin_cfg = IOPORT_CFG_PORT_DIRECTION_INPUT },
+
+    // USB FS
+    { .pin = BSP_IO_PORT_04_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS | IOPORT_CFG_DRIVE_HIGH },
+    { .pin = BSP_IO_PORT_05_PIN_00, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS | IOPORT_CFG_DRIVE_HIGH},
+    { .pin = BSP_IO_PORT_05_PIN_01, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_FS | IOPORT_CFG_DRIVE_HIGH},
+
+    // USB HS
+    { .pin = BSP_IO_PORT_07_PIN_07, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_HS },
+    { .pin = BSP_IO_PORT_11_PIN_00, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_HS | IOPORT_CFG_DRIVE_HIGH},
+    { .pin = BSP_IO_PORT_11_PIN_01, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_USB_HS | IOPORT_CFG_DRIVE_HIGH},
+
+    // ETM Trace
+    #ifdef TRACE_ETM
+    { .pin = BSP_IO_PORT_02_PIN_08, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE | IOPORT_CFG_DRIVE_HS_HIGH },
+    { .pin = BSP_IO_PORT_02_PIN_09, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE | IOPORT_CFG_DRIVE_HS_HIGH },
+    { .pin = BSP_IO_PORT_02_PIN_10, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE | IOPORT_CFG_DRIVE_HS_HIGH },
+    { .pin = BSP_IO_PORT_02_PIN_11, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE | IOPORT_CFG_DRIVE_HS_HIGH },
+    { .pin = BSP_IO_PORT_02_PIN_14, .pin_cfg = IOPORT_CFG_PERIPHERAL_PIN | IOPORT_PERIPHERAL_TRACE | IOPORT_CFG_DRIVE_HS_HIGH },
+     #endif
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/hw/bsp/ra/boards/portenta_c33/board.mk b/hw/bsp/ra/boards/portenta_c33/board.mk
new file mode 100644
index 000000000..6a5c2ffce
--- /dev/null
+++ b/hw/bsp/ra/boards/portenta_c33/board.mk
@@ -0,0 +1,12 @@
+CPU_CORE = cortex-m33
+MCU_VARIANT = ra6m5
+
+LD_FILE = ${BOARD_PATH}/${BOARD}.ld
+
+# Port 1 is highspeed
+PORT ?= 1
+
+JLINK_DEVICE = R7FA6M5BH
+DFU_UTIL_OPTION = -d 2341:0368 -a 0
+
+flash: flash-dfu-util
diff --git a/hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp/bsp_cfg.h b/hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp/bsp_cfg.h
new file mode 100644
index 000000000..33d381850
--- /dev/null
+++ b/hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp/bsp_cfg.h
@@ -0,0 +1,63 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_CFG_H_
+#define BSP_CFG_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "bsp_clock_cfg.h"
+#include "bsp_mcu_family_cfg.h"
+#include "board_cfg.h"
+
+#define RA_NOT_DEFINED 0
+#ifndef BSP_CFG_RTOS
+#if (RA_NOT_DEFINED) != (2)
+#define BSP_CFG_RTOS (2)
+#elif (RA_NOT_DEFINED) != (RA_NOT_DEFINED)
+  #define BSP_CFG_RTOS (1)
+#else
+  #define BSP_CFG_RTOS (0)
+#endif
+#endif
+#ifndef BSP_CFG_RTC_USED
+#define BSP_CFG_RTC_USED (RA_NOT_DEFINED)
+#endif
+#undef RA_NOT_DEFINED
+#if defined(_RA_BOOT_IMAGE)
+  #define BSP_CFG_BOOT_IMAGE (1)
+#endif
+#define BSP_CFG_MCU_VCC_MV (3300)
+#define BSP_CFG_STACK_MAIN_BYTES (0x1000)
+#define BSP_CFG_HEAP_BYTES (0x1000)
+#define BSP_CFG_PARAM_CHECKING_ENABLE (1)
+#define BSP_CFG_ASSERT (0)
+#define BSP_CFG_ERROR_LOG (0)
+
+#define BSP_CFG_PFS_PROTECT ((1))
+
+#define BSP_CFG_C_RUNTIME_INIT ((1))
+#define BSP_CFG_EARLY_INIT     ((0))
+
+#define BSP_CFG_STARTUP_CLOCK_REG_NOT_RESET ((0))
+
+#ifndef BSP_CLOCK_CFG_MAIN_OSC_POPULATED
+#define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (1)
+#endif
+
+#ifndef BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE
+#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE (0)
+#endif
+#ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE
+#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (0)
+#endif
+#ifndef BSP_CLOCK_CFG_SUBCLOCK_POPULATED
+#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (1)
+#endif
+#ifndef BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS
+#define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* BSP_CFG_H_ */
diff --git a/hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp/bsp_mcu_device_cfg.h b/hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp/bsp_mcu_device_cfg.h
new file mode 100644
index 000000000..bd6a901c3
--- /dev/null
+++ b/hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp/bsp_mcu_device_cfg.h
@@ -0,0 +1,5 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_MCU_DEVICE_CFG_H_
+#define BSP_MCU_DEVICE_CFG_H_
+#define BSP_CFG_MCU_PART_SERIES (6)
+#endif /* BSP_MCU_DEVICE_CFG_H_ */
diff --git a/hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h b/hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h
new file mode 100644
index 000000000..6845183db
--- /dev/null
+++ b/hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h
@@ -0,0 +1,11 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_MCU_DEVICE_PN_CFG_H_
+#define BSP_MCU_DEVICE_PN_CFG_H_
+#define BSP_MCU_R7FA6M5BH3CFC
+#define BSP_MCU_FEATURE_SET ('B')
+#define BSP_ROM_SIZE_BYTES (2097152)
+#define BSP_RAM_SIZE_BYTES (524288)
+#define BSP_DATA_FLASH_SIZE_BYTES (8192)
+#define BSP_PACKAGE_LQFP
+#define BSP_PACKAGE_PINS (176)
+#endif /* BSP_MCU_DEVICE_PN_CFG_H_ */
diff --git a/hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp/bsp_mcu_family_cfg.h b/hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp/bsp_mcu_family_cfg.h
new file mode 100644
index 000000000..d5428540f
--- /dev/null
+++ b/hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp/bsp_mcu_family_cfg.h
@@ -0,0 +1,387 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_MCU_FAMILY_CFG_H_
+#define BSP_MCU_FAMILY_CFG_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "bsp_mcu_device_pn_cfg.h"
+#include "bsp_mcu_device_cfg.h"
+#include "../../../ra/fsp/src/bsp/mcu/ra6m5/bsp_mcu_info.h"
+#include "bsp_clock_cfg.h"
+
+#define BSP_MCU_GROUP_RA6M5 (1)
+#define BSP_LOCO_HZ                 (32768)
+#define BSP_MOCO_HZ                 (8000000)
+#define BSP_SUB_CLOCK_HZ            (32768)
+#if   BSP_CFG_HOCO_FREQUENCY == 0
+#define BSP_HOCO_HZ                 (16000000)
+#elif BSP_CFG_HOCO_FREQUENCY == 1
+  #define BSP_HOCO_HZ                 (18000000)
+#elif BSP_CFG_HOCO_FREQUENCY == 2
+  #define BSP_HOCO_HZ                 (20000000)
+#else
+  #error "Invalid HOCO frequency chosen (BSP_CFG_HOCO_FREQUENCY) in bsp_clock_cfg.h"
+#endif
+
+#define BSP_CFG_FLL_ENABLE                 (0)
+
+#define BSP_CORTEX_VECTOR_TABLE_ENTRIES    (16U)
+#define BSP_VECTOR_TABLE_MAX_ENTRIES       (112U)
+
+#if defined(_RA_TZ_SECURE)
+            #define BSP_TZ_SECURE_BUILD           (1)
+            #define BSP_TZ_NONSECURE_BUILD        (0)
+            #elif defined(_RA_TZ_NONSECURE)
+            #define BSP_TZ_SECURE_BUILD           (0)
+            #define BSP_TZ_NONSECURE_BUILD        (1)
+            #else
+#define BSP_TZ_SECURE_BUILD           (0)
+#define BSP_TZ_NONSECURE_BUILD        (0)
+#endif
+
+/* TrustZone Settings */
+#define BSP_TZ_CFG_INIT_SECURE_ONLY       (BSP_CFG_CLOCKS_SECURE || (!BSP_CFG_CLOCKS_OVERRIDE))
+#define BSP_TZ_CFG_SKIP_INIT              (BSP_TZ_NONSECURE_BUILD && BSP_TZ_CFG_INIT_SECURE_ONLY)
+#define BSP_TZ_CFG_EXCEPTION_RESPONSE     (0)
+
+/* CMSIS TrustZone Settings */
+#define SCB_CSR_AIRCR_INIT                (1)
+#define SCB_AIRCR_BFHFNMINS_VAL           (0)
+#define SCB_AIRCR_SYSRESETREQS_VAL        (1)
+#define SCB_AIRCR_PRIS_VAL                (0)
+#define TZ_FPU_NS_USAGE                   (1)
+#ifndef SCB_NSACR_CP10_11_VAL
+#define SCB_NSACR_CP10_11_VAL             (3U)
+#endif
+
+#ifndef FPU_FPCCR_TS_VAL
+#define FPU_FPCCR_TS_VAL                  (1U)
+#endif
+#define FPU_FPCCR_CLRONRETS_VAL           (1)
+
+#ifndef FPU_FPCCR_CLRONRET_VAL
+#define FPU_FPCCR_CLRONRET_VAL            (1)
+#endif
+
+/* The C-Cache line size that is configured during startup. */
+#ifndef BSP_CFG_C_CACHE_LINE_SIZE
+#define BSP_CFG_C_CACHE_LINE_SIZE   (1U)
+#endif
+
+/* Type 1 Peripheral Security Attribution */
+
+/* Peripheral Security Attribution Register (PSAR) Settings */
+#ifndef BSP_TZ_CFG_PSARB
+#define BSP_TZ_CFG_PSARB (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CAN1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* CAN0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* IIC1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9) /* IIC0 */ | \
+            (((1 > 0) ? 0U : 1U) << 11) /* USBFS */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 18) /* SPI1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 19) /* SPI0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* SCI9 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* SCI8 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* SCI7 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 25) /* SCI6 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* SCI5 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* SCI4 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 28) /* SCI3 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* SCI2 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 30) /* SCI1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCI0 */ | \
+            0x33f4f9) /* Unused */
+#endif
+#ifndef BSP_TZ_CFG_PSARC
+#define BSP_TZ_CFG_PSARC (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* CAC */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* CRC */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* CTSU */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8) /* SSIE0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* SDHI0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* DOC */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* SCE9 */ | \
+            0x7fffcef4) /* Unused */
+#endif
+#ifndef BSP_TZ_CFG_PSARD
+#define BSP_TZ_CFG_PSARD (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* AGT3 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* AGT2 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* AGT1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3) /* AGT0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 11) /* POEG3 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12) /* POEG2 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13) /* POEG1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* POEG0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* ADC1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 16) /* ADC0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 20) /* DAC */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* TSN */ | \
+            0xffae07f0) /* Unused */
+#endif
+#ifndef BSP_TZ_CFG_PSARE
+#define BSP_TZ_CFG_PSARE (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* WDT */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* IWDT */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2) /* RTC */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14) /* AGT5 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15) /* AGT4 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 22) /* GPT9 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 23) /* GPT8 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 24) /* GPT7 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 25) /* GPT6 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 26) /* GPT5 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 27) /* GPT4 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 28) /* GPT3 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 29) /* GPT2 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 30) /* GPT1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 31) /* GPT0 */ | \
+            0x3f3ff8) /* Unused */
+#endif
+#ifndef BSP_TZ_CFG_MSSAR
+#define BSP_TZ_CFG_MSSAR (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) /* ELC */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) /* DTC_DMAC */ | \
+            0xfffffffc) /* Unused */
+#endif
+
+/* Type 2 Peripheral Security Attribution */
+
+/* Security attribution for Cache registers. */
+#ifndef BSP_TZ_CFG_CSAR
+#define BSP_TZ_CFG_CSAR (0xFFFFFFFFU)
+#endif
+
+/* Security attribution for RSTSRn registers. */
+#ifndef BSP_TZ_CFG_RSTSAR
+#define BSP_TZ_CFG_RSTSAR (0xFFFFFFFFU)
+#endif
+
+/* Security attribution for registers of LVD channels. */
+#ifndef BSP_TZ_CFG_LVDSAR
+#define BSP_TZ_CFG_LVDSAR (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0) | /* LVD Channel 1 */ \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1) | /* LVD Channel 2 */ \
+            0xFFFFFFFCU)
+#endif
+
+/* Security attribution for LPM registers. */
+#ifndef BSP_TZ_CFG_LPMSAR
+#define BSP_TZ_CFG_LPMSAR ((RA_NOT_DEFINED > 0) ? 0xFFFFFCEAU : 0xFFFFFFFFU)
+#endif
+/* Deep Standby Interrupt Factor Security Attribution Register. */
+#ifndef BSP_TZ_CFG_DPFSAR
+#define BSP_TZ_CFG_DPFSAR ((RA_NOT_DEFINED > 0) ? 0xF2E00000U : 0xFFFFFFFFU)
+#endif
+
+/* Security attribution for CGC registers. */
+#ifndef BSP_TZ_CFG_CGFSAR
+#if BSP_CFG_CLOCKS_SECURE
+/* Protect all CGC registers from Non-secure write access. */
+#define BSP_TZ_CFG_CGFSAR (0xFFFCE402U)
+#else
+/* Allow Secure and Non-secure write access. */
+#define BSP_TZ_CFG_CGFSAR (0xFFFFFFFFU)
+#endif
+#endif
+
+/* Security attribution for Battery Backup registers. */
+#ifndef BSP_TZ_CFG_BBFSAR
+#define BSP_TZ_CFG_BBFSAR (0x00FFFFFF)
+#endif
+
+/* Security attribution for registers for IRQ channels. */
+#ifndef BSP_TZ_CFG_ICUSARA
+#define BSP_TZ_CFG_ICUSARA (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* External IRQ0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* External IRQ1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* External IRQ2 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* External IRQ3 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* External IRQ4 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* External IRQ5 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* External IRQ6 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* External IRQ7 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 8U) /* External IRQ8 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 9U) /* External IRQ9 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 10U) /* External IRQ10 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 11U) /* External IRQ11 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 12U) /* External IRQ12 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 13U) /* External IRQ13 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 14U) /* External IRQ14 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 15U) /* External IRQ15 */ | \
+            0xFFFF0000U)
+#endif
+
+/* Security attribution for NMI registers. */
+#ifndef BSP_TZ_CFG_ICUSARB
+#define BSP_TZ_CFG_ICUSARB (0 | 0xFFFFFFFEU) /* Should match AIRCR.BFHFNMINS. */
+#endif
+
+/* Security attribution for registers for DMAC channels */
+#ifndef BSP_TZ_CFG_ICUSARC
+#define BSP_TZ_CFG_ICUSARC (\
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 0U) /* DMAC Channel 0 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 1U) /* DMAC Channel 1 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 2U) /* DMAC Channel 2 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 3U) /* DMAC Channel 3 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 4U) /* DMAC Channel 4 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 5U) /* DMAC Channel 5 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 6U) /* DMAC Channel 6 */ | \
+            (((RA_NOT_DEFINED > 0) ? 0U : 1U) << 7U) /* DMAC Channel 7 */ | \
+            0xFFFFFF00U)
+#endif
+
+/* Security attribution registers for SELSR0. */
+#ifndef BSP_TZ_CFG_ICUSARD
+#define BSP_TZ_CFG_ICUSARD ((RA_NOT_DEFINED > 0) ? 0xFFFFFFFEU : 0xFFFFFFFFU)
+#endif
+
+/* Security attribution registers for WUPEN0. */
+#ifndef BSP_TZ_CFG_ICUSARE
+#define BSP_TZ_CFG_ICUSARE ((RA_NOT_DEFINED > 0) ? 0x04F2FFFFU : 0xFFFFFFFFU)
+#endif
+
+/* Security attribution registers for WUPEN1. */
+#ifndef BSP_TZ_CFG_ICUSARF
+#define BSP_TZ_CFG_ICUSARF ((RA_NOT_DEFINED > 0) ? 0xFFFFFFF8U : 0xFFFFFFFFU)
+#endif
+
+/* Set DTCSTSAR if the Secure program uses the DTC. */
+#if RA_NOT_DEFINED == RA_NOT_DEFINED
+#define BSP_TZ_CFG_DTC_USED (0U)
+#else
+ #define BSP_TZ_CFG_DTC_USED (1U)
+#endif
+
+/* Security attribution of FLWT and FCKMHZ registers. */
+#ifndef BSP_TZ_CFG_FSAR
+/* If the CGC registers are only accessible in Secure mode, than there is no
+ * reason for nonsecure applications to access FLWT and FCKMHZ. */
+#if BSP_CFG_CLOCKS_SECURE
+/* Protect FLWT and FCKMHZ registers from nonsecure write access. */
+#define BSP_TZ_CFG_FSAR (0xFEFEU)
+#else
+/* Allow Secure and Non-secure write access. */
+#define BSP_TZ_CFG_FSAR (0xFFFFU)
+#endif
+#endif
+
+/* Security attribution for SRAM registers. */
+#ifndef BSP_TZ_CFG_SRAMSAR
+/* If the CGC registers are only accessible in Secure mode, than there is no reason for Non Secure applications to access
+ * SRAM0WTEN and therefore there is no reason to access PRCR2. */
+#define BSP_TZ_CFG_SRAMSAR (\
+        1 | \
+        ((BSP_CFG_CLOCKS_SECURE == 0) ? (1U << 1U) : 0U) | \
+        4 | \
+        0xFFFFFFF8U)
+#endif
+
+/* Security attribution for Standby RAM registers. */
+#ifndef BSP_TZ_CFG_STBRAMSAR
+#define BSP_TZ_CFG_STBRAMSAR (0 | 0xFFFFFFF0U)
+#endif
+
+/* Security attribution for the DMAC Bus Master MPU settings. */
+#ifndef BSP_TZ_CFG_MMPUSARA
+/* The DMAC Bus Master MPU settings should align with the DMAC channel settings. */
+#define BSP_TZ_CFG_MMPUSARA (BSP_TZ_CFG_ICUSARC)
+#endif
+
+/* Security Attribution Register A for BUS Control registers. */
+#ifndef BSP_TZ_CFG_BUSSARA
+#define BSP_TZ_CFG_BUSSARA (0xFFFFFFFFU)
+#endif
+/* Security Attribution Register B for BUS Control registers. */
+#ifndef BSP_TZ_CFG_BUSSARB
+#define BSP_TZ_CFG_BUSSARB (0xFFFFFFFFU)
+#endif
+
+/* Enable Uninitialized Non-Secure Application Fallback. */
+#ifndef BSP_TZ_CFG_NON_SECURE_APPLICATION_FALLBACK
+#define BSP_TZ_CFG_NON_SECURE_APPLICATION_FALLBACK (1U)
+#endif
+
+#define OFS_SEQ1 0xA001A001 | (1 << 1) | (3 << 2)
+#define OFS_SEQ2 (15 << 4) | (3 << 8) | (3 << 10)
+#define OFS_SEQ3 (1 << 12) | (1 << 14) | (1 << 17)
+#define OFS_SEQ4 (3 << 18) |(15 << 20) | (3 << 24) | (3 << 26)
+#define OFS_SEQ5 (1 << 28) | (1 << 30)
+#define BSP_CFG_ROM_REG_OFS0 (OFS_SEQ1 | OFS_SEQ2 | OFS_SEQ3 | OFS_SEQ4 | OFS_SEQ5)
+
+/* Option Function Select Register 1 Security Attribution */
+#ifndef BSP_CFG_ROM_REG_OFS1_SEL
+#if defined(_RA_TZ_SECURE) || defined(_RA_TZ_NONSECURE)
+            #define BSP_CFG_ROM_REG_OFS1_SEL (0xFFFFF8F8U | ((BSP_CFG_CLOCKS_SECURE == 0) ? 0x700U : 0U) | ((RA_NOT_DEFINED > 0) ? 0U : 0x7U))
+#else
+#define BSP_CFG_ROM_REG_OFS1_SEL (0xFFFFF8F8U)
+#endif
+#endif
+
+#define BSP_CFG_ROM_REG_OFS1 (0xFFFFFEF8 | (1 << 2) | (3) |  (1 << 8))
+
+/* Used to create IELS values for the interrupt initialization table g_interrupt_event_link_select. */
+#define BSP_PRV_IELS_ENUM(vector)    (ELC_ ## vector)
+
+/* Dual Mode Select Register */
+#ifndef BSP_CFG_ROM_REG_DUALSEL
+#define BSP_CFG_ROM_REG_DUALSEL (0xFFFFFFF8U | (0x7U))
+#endif
+
+/* Block Protection Register 0 */
+#ifndef BSP_CFG_ROM_REG_BPS0
+#define BSP_CFG_ROM_REG_BPS0 (~( 0U))
+#endif
+/* Block Protection Register 1 */
+#ifndef BSP_CFG_ROM_REG_BPS1
+#define BSP_CFG_ROM_REG_BPS1 (~( 0U))
+#endif
+/* Block Protection Register 2 */
+#ifndef BSP_CFG_ROM_REG_BPS2
+#define BSP_CFG_ROM_REG_BPS2 (~( 0U))
+#endif
+/* Block Protection Register 3 */
+#ifndef BSP_CFG_ROM_REG_BPS3
+#define BSP_CFG_ROM_REG_BPS3 (0xFFFFFFFFU)
+#endif
+/* Permanent Block Protection Register 0 */
+#ifndef BSP_CFG_ROM_REG_PBPS0
+#define BSP_CFG_ROM_REG_PBPS0 (~( 0U))
+#endif
+/* Permanent Block Protection Register 1 */
+#ifndef BSP_CFG_ROM_REG_PBPS1
+#define BSP_CFG_ROM_REG_PBPS1 (~( 0U))
+#endif
+/* Permanent Block Protection Register 2 */
+#ifndef BSP_CFG_ROM_REG_PBPS2
+#define BSP_CFG_ROM_REG_PBPS2 (~( 0U))
+#endif
+/* Permanent Block Protection Register 3 */
+#ifndef BSP_CFG_ROM_REG_PBPS3
+#define BSP_CFG_ROM_REG_PBPS3 (0xFFFFFFFFU)
+#endif
+/* Security Attribution for Block Protection Register 0 (If any blocks are marked as protected in the secure application, then mark them as secure) */
+#ifndef BSP_CFG_ROM_REG_BPS_SEL0
+#define BSP_CFG_ROM_REG_BPS_SEL0 (BSP_CFG_ROM_REG_BPS0 & BSP_CFG_ROM_REG_PBPS0)
+#endif
+/* Security Attribution for Block Protection Register 1 (If any blocks are marked as protected in the secure application, then mark them as secure) */
+#ifndef BSP_CFG_ROM_REG_BPS_SEL1
+#define BSP_CFG_ROM_REG_BPS_SEL1 (BSP_CFG_ROM_REG_BPS1 & BSP_CFG_ROM_REG_PBPS1)
+#endif
+/* Security Attribution for Block Protection Register 2 (If any blocks are marked as protected in the secure application, then mark them as secure) */
+#ifndef BSP_CFG_ROM_REG_BPS_SEL2
+#define BSP_CFG_ROM_REG_BPS_SEL2 (BSP_CFG_ROM_REG_BPS2 & BSP_CFG_ROM_REG_PBPS2)
+#endif
+/* Security Attribution for Block Protection Register 3 (If any blocks are marked as protected in the secure application, then mark them as secure) */
+#ifndef BSP_CFG_ROM_REG_BPS_SEL3
+#define BSP_CFG_ROM_REG_BPS_SEL3 (BSP_CFG_ROM_REG_BPS3 & BSP_CFG_ROM_REG_PBPS3)
+#endif
+#ifndef BSP_CLOCK_CFG_MAIN_OSC_WAIT
+#define BSP_CLOCK_CFG_MAIN_OSC_WAIT (9)
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* BSP_MCU_FAMILY_CFG_H_ */
diff --git a/hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp_clock_cfg.h b/hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp_clock_cfg.h
new file mode 100644
index 000000000..0eb5e0516
--- /dev/null
+++ b/hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp_clock_cfg.h
@@ -0,0 +1,37 @@
+/* generated configuration header file - do not edit */
+#ifndef BSP_CLOCK_CFG_H_
+#define BSP_CLOCK_CFG_H_
+
+#define BSP_CFG_CLOCKS_SECURE   (0)
+#define BSP_CFG_CLOCKS_OVERRIDE (0)
+#define BSP_CFG_XTAL_HZ         (24000000)                         /* XTAL 24000000Hz */
+#define BSP_CFG_HOCO_FREQUENCY  (2)                                /* HOCO 20MHz */
+#define BSP_CFG_PLL_SOURCE      (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL Src: XTAL */
+#define BSP_CFG_PLL_DIV         (BSP_CLOCKS_PLL_DIV_3)             /* PLL Div /3 */
+#define BSP_CFG_PLL_MUL         (BSP_CLOCKS_PLL_MUL(25U,0U))       /* PLL Mul x25.0 */
+#define BSP_CFG_PLL2_SOURCE     (BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC) /* PLL2 Src: XTAL */
+#define BSP_CFG_PLL2_DIV        (BSP_CLOCKS_PLL_DIV_2)             /* PLL2 Div /2 */
+#define BSP_CFG_PLL2_MUL        (BSP_CLOCKS_PLL_MUL(20U,0U))       /* PLL2 Mul x20.0 */
+#define BSP_CFG_CLOCK_SOURCE    (BSP_CLOCKS_SOURCE_CLOCK_PLL)      /* Clock Src: PLL */
+#define BSP_CFG_CLKOUT_SOURCE   (BSP_CLOCKS_CLOCK_DISABLED)        /* CLKOUT Disabled */
+#define BSP_CFG_UCK_SOURCE      (BSP_CLOCKS_SOURCE_CLOCK_PLL2)     /* UCLK Src: PLL2 */
+#define BSP_CFG_U60CK_SOURCE    (BSP_CLOCKS_SOURCE_CLOCK_PLL2)     /* U60CK Src: PLL2 */
+#define BSP_CFG_OCTA_SOURCE     (BSP_CLOCKS_CLOCK_DISABLED)        /* OCTASPICLK Disabled */
+#define BSP_CFG_CANFDCLK_SOURCE (BSP_CLOCKS_CLOCK_DISABLED)        /* CANFDCLK Disabled */
+#define BSP_CFG_CECCLK_SOURCE   (BSP_CLOCKS_CLOCK_DISABLED)        /* CECCLK Disabled */
+#define BSP_CFG_ICLK_DIV        (BSP_CLOCKS_SYS_CLOCK_DIV_1)       /* ICLK Div /1 */
+#define BSP_CFG_PCLKA_DIV       (BSP_CLOCKS_SYS_CLOCK_DIV_2)       /* PCLKA Div /2 */
+#define BSP_CFG_PCLKB_DIV       (BSP_CLOCKS_SYS_CLOCK_DIV_4)       /* PCLKB Div /4 */
+#define BSP_CFG_PCLKC_DIV       (BSP_CLOCKS_SYS_CLOCK_DIV_4)       /* PCLKC Div /4 */
+#define BSP_CFG_PCLKD_DIV       (BSP_CLOCKS_SYS_CLOCK_DIV_2)       /* PCLKD Div /2 */
+#define BSP_CFG_BCLK_DIV        (BSP_CLOCKS_SYS_CLOCK_DIV_2)       /* BCLK Div /2 */
+#define BSP_CFG_BCLK_OUTPUT     (2)                                /* EBCLK Div /2 */
+#define BSP_CFG_FCLK_DIV        (BSP_CLOCKS_SYS_CLOCK_DIV_4)       /* FCLK Div /4 */
+#define BSP_CFG_CLKOUT_DIV      (BSP_CLOCKS_SYS_CLOCK_DIV_1)       /* CLKOUT Div /1 */
+#define BSP_CFG_UCK_DIV         (BSP_CLOCKS_USB_CLOCK_DIV_5)       /* UCLK Div /5 */
+#define BSP_CFG_U60CK_DIV       (BSP_CLOCKS_USB60_CLOCK_DIV_4)     /* U60CK Div /4 */
+#define BSP_CFG_OCTA_DIV        (BSP_CLOCKS_OCTA_CLOCK_DIV_1)      /* OCTASPICLK Div /1 */
+#define BSP_CFG_CANFDCLK_DIV    (BSP_CLOCKS_CANFD_CLOCK_DIV_1)     /* CANFDCLK Div /1 */
+#define BSP_CFG_CECCLK_DIV      (BSP_CLOCKS_CEC_CLOCK_DIV_1)       /* CECCLK Div /1 */
+
+#endif /* BSP_CLOCK_CFG_H_ */
diff --git a/hw/bsp/ra/boards/portenta_c33/portenta_c33.ld b/hw/bsp/ra/boards/portenta_c33/portenta_c33.ld
new file mode 100644
index 000000000..ba15588e6
--- /dev/null
+++ b/hw/bsp/ra/boards/portenta_c33/portenta_c33.ld
@@ -0,0 +1,25 @@
+RAM_START = 0x20000000;
+RAM_LENGTH = 0x80000;
+FLASH_START = 0x00000000;
+FLASH_LENGTH = 0x200000;
+DATA_FLASH_START = 0x08000000;
+DATA_FLASH_LENGTH = 0x2000;
+OPTION_SETTING_START = 0x0100A100;
+OPTION_SETTING_LENGTH = 0x100;
+OPTION_SETTING_S_START = 0x0100A200;
+OPTION_SETTING_S_LENGTH = 0x100;
+ID_CODE_START = 0x00000000;
+ID_CODE_LENGTH = 0x0;
+SDRAM_START = 0x80010000;
+SDRAM_LENGTH = 0x0;
+QSPI_FLASH_START = 0x60000000;
+QSPI_FLASH_LENGTH = 0x4000000;
+OSPI_DEVICE_0_START = 0x68000000;
+OSPI_DEVICE_0_LENGTH = 0x8000000;
+OSPI_DEVICE_1_START = 0x70000000;
+OSPI_DEVICE_1_LENGTH = 0x10000000;
+
+/* Board has bootloader */
+FLASH_IMAGE_START = 0x10000;
+
+INCLUDE fsp.ld
diff --git a/hw/bsp/ra/family.cmake b/hw/bsp/ra/family.cmake
index 2c45b8d71..307e01da8 100644
--- a/hw/bsp/ra/family.cmake
+++ b/hw/bsp/ra/family.cmake
@@ -124,4 +124,9 @@ function(family_configure_example TARGET RTOS)
 
   # Flashing
   family_flash_jlink(${TARGET})
+
+  if (DEFINED DFU_UTIL_VID_PID)
+    family_add_bin_hex(${TARGET})
+    family_flash_dfu_util(${TARGET} ${DFU_UTIL_VID_PID})
+  endif ()
 endfunction()
diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk
index a5325306d..cf8e5d9e9 100644
--- a/hw/bsp/ra/family.mk
+++ b/hw/bsp/ra/family.mk
@@ -3,6 +3,8 @@ DEPS_SUBMODULES += hw/mcu/renesas/fsp lib/CMSIS_5
 FSP_RA = hw/mcu/renesas/fsp/ra/fsp
 include $(TOP)/$(BOARD_PATH)/board.mk
 
+OBJCOPY_BIN_OPTION = --only-section .text --only-section .data --only-section .rodata --only-section .bss
+
 # Default to port 0 fullspeed, board with port 1 highspeed should override this in board.mk
 PORT ?= 0
 
diff --git a/tools/make/toolchain/arm_gcc_rules.mk b/tools/make/toolchain/arm_gcc_rules.mk
index f3482b9a8..b76d4aec3 100644
--- a/tools/make/toolchain/arm_gcc_rules.mk
+++ b/tools/make/toolchain/arm_gcc_rules.mk
@@ -65,9 +65,10 @@ $(BUILD)/obj/%_asm.o: %.S
 	@echo AS $(notdir $@)
 	@$(AS) $(ASFLAGS) -c -o $@ $<
 
+OBJCOPY_BIN_OPTION ?=
 $(BUILD)/$(PROJECT).bin: $(BUILD)/$(PROJECT).elf
 	@echo CREATE $@
-	@$(OBJCOPY) -O binary $^ $@
+	$(OBJCOPY) -O binary $(OBJCOPY_BIN_OPTION) $^ $@
 
 $(BUILD)/$(PROJECT).hex: $(BUILD)/$(PROJECT).elf
 	@echo CREATE $@

From 40833b585b2c4ea38dec034c18aacff35c6bcea6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 1 Aug 2023 15:33:15 +0700
Subject: [PATCH 548/691] enable flto for ra makefile

- remove ra from ci make build since it is already in cmake ci
---
 .github/workflows/build_arm.yml    |  1 -
 .idea/cmake.xml                    |  6 ++++--
 .idea/runConfigurations/uno_r4.xml | 10 ++++++++++
 hw/bsp/ra/family.mk                |  2 ++
 4 files changed, 16 insertions(+), 3 deletions(-)
 create mode 100644 .idea/runConfigurations/uno_r4.xml

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 72ddf164b..44a5e7363 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -39,7 +39,6 @@ jobs:
         - 'lpc51 lpc54'
         - 'mm32 msp432e4'
         - 'nrf'
-        - 'ra'
         - 'samd11 samd21'
         - 'samd51 same5x'
         - 'saml2x'
diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 519623b71..4147bba59 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -44,8 +44,10 @@
       <configuration PROFILE_NAME="stm32l476disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32l476disco" />
       <configuration PROFILE_NAME="ra4m1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra4m1_ek -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="ra6m1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m1_ek -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="ra6m5" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="ra6m5 PORT0" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1 -DPORT=0" />
+      <configuration PROFILE_NAME="ra6m5" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="ra6m5 PORT0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1 -DPORT=0" />
+      <configuration PROFILE_NAME="uno_r4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=uno_r4 -DLOG=4 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="portenta_c33" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=portenta_c33 -DLOG=3" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/.idea/runConfigurations/uno_r4.xml b/.idea/runConfigurations/uno_r4.xml
new file mode 100644
index 000000000..9982f4039
--- /dev/null
+++ b/.idea/runConfigurations/uno_r4.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="uno_r4" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA4M1AB&quot; -if swd -speed 20000 -port 25321 -nogui -singlerun -jlinkscriptfile $PROJECT_DIR$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk
index cf8e5d9e9..901808958 100644
--- a/hw/bsp/ra/family.mk
+++ b/hw/bsp/ra/family.mk
@@ -3,12 +3,14 @@ DEPS_SUBMODULES += hw/mcu/renesas/fsp lib/CMSIS_5
 FSP_RA = hw/mcu/renesas/fsp/ra/fsp
 include $(TOP)/$(BOARD_PATH)/board.mk
 
+# Don't include options setting in .bin file since it create unnecessary large file due to padding
 OBJCOPY_BIN_OPTION = --only-section .text --only-section .data --only-section .rodata --only-section .bss
 
 # Default to port 0 fullspeed, board with port 1 highspeed should override this in board.mk
 PORT ?= 0
 
 CFLAGS += \
+  -flto \
   -DCFG_TUSB_MCU=OPT_MCU_RAXXX \
   -DBOARD_TUD_RHPORT=$(PORT) \
 	-Wno-error=undef \

From 965627e81c63a76bb80d8319cbd9adf931a00595 Mon Sep 17 00:00:00 2001
From: Martino Facchin <m.facchin@arduino.cc>
Date: Tue, 1 Aug 2023 11:41:33 +0200
Subject: [PATCH 549/691] rusb2: move dynamic irq function to c file

---
 hw/bsp/ra/family.cmake                 |  5 +++--
 hw/bsp/ra/family.mk                    |  1 +
 src/portable/renesas/rusb2/dcd_rusb2.c |  5 -----
 src/portable/renesas/rusb2/rusb2_ra.c  | 16 ++++++++++++++++
 src/portable/renesas/rusb2/rusb2_ra.h  |  9 +--------
 5 files changed, 21 insertions(+), 15 deletions(-)
 create mode 100644 src/portable/renesas/rusb2/rusb2_ra.c

diff --git a/hw/bsp/ra/family.cmake b/hw/bsp/ra/family.cmake
index 307e01da8..2d079dc94 100644
--- a/hw/bsp/ra/family.cmake
+++ b/hw/bsp/ra/family.cmake
@@ -114,8 +114,9 @@ function(family_configure_example TARGET RTOS)
     # Add TinyUSB target and port source
   family_add_tinyusb(${TARGET} OPT_MCU_RAXXX ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
-    ${TOP}/src/portable/renesas/rusb2/dcd_rusb2.c
-    ${TOP}/src/portable/renesas/rusb2/hcd_rusb2.c
+  ${TOP}/src/portable/renesas/rusb2/dcd_rusb2.c
+  ${TOP}/src/portable/renesas/rusb2/hcd_rusb2.c
+  ${TOP}/src/portable/renesas/rusb2/rusb2_ra.c
     )
   target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 
diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk
index cf8e5d9e9..3394d41b4 100644
--- a/hw/bsp/ra/family.mk
+++ b/hw/bsp/ra/family.mk
@@ -32,6 +32,7 @@ endif
 SRC_C += \
 	src/portable/renesas/rusb2/dcd_rusb2.c \
 	src/portable/renesas/rusb2/hcd_rusb2.c \
+	src/portable/renesas/rusb2/rusb2_ra.c \
 	$(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Source/startup.c \
 	$(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Source/system.c \
 	$(FSP_RA)/src/bsp/mcu/all/bsp_clocks.c \
diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 9a3983f56..3ec1b70b5 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -50,11 +50,6 @@
     #define D0FIFOCTR_b CFIFOCTR_b
   #endif
 
-  // Application API for setting IRQ number
-  void tud_rusb2_set_irqnum(uint8_t rhport, int32_t irqnum) {
-    rusb2_controller[rhport].irqnum = irqnum;
-  }
-
 #else
   #error "Unsupported MCU"
 #endif
diff --git a/src/portable/renesas/rusb2/rusb2_ra.c b/src/portable/renesas/rusb2/rusb2_ra.c
new file mode 100644
index 000000000..bbffd712e
--- /dev/null
+++ b/src/portable/renesas/rusb2/rusb2_ra.c
@@ -0,0 +1,16 @@
+#include "tusb_option.h"
+#include "device/dcd.h"
+#include "rusb2_type.h"
+#include "rusb2_ra.h"
+
+rusb2_controller_t rusb2_controller[] = {
+    { .reg_base = R_USB_FS0_BASE, .irqnum = USBFS_INT_IRQn },
+    #ifdef RUSB2_SUPPORT_HIGHSPEED
+    { .reg_base = R_USB_HS0_BASE, .irqnum = USBHS_USB_INT_RESUME_IRQn },
+    #endif
+};
+
+// Application API for setting IRQ number
+void tud_rusb2_set_irqnum(uint8_t rhport, int32_t irqnum) {
+    rusb2_controller[rhport].irqnum = irqnum;
+}
\ No newline at end of file
diff --git a/src/portable/renesas/rusb2/rusb2_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h
index 7ff272bbc..4774d2e2c 100644
--- a/src/portable/renesas/rusb2/rusb2_ra.h
+++ b/src/portable/renesas/rusb2/rusb2_ra.h
@@ -74,14 +74,7 @@ typedef struct {
   #define rusb2_is_highspeed_reg(_reg)   (false)
 #endif
 
-// USBFS_INT_IRQn and USBHS_USB_INT_RESUME_IRQn are generated by FSP
-static rusb2_controller_t rusb2_controller[] = {
-    { .reg_base = R_USB_FS0_BASE, .irqnum = USBFS_INT_IRQn },
-    #ifdef RUSB2_SUPPORT_HIGHSPEED
-    { .reg_base = R_USB_HS0_BASE, .irqnum = USBHS_USB_INT_RESUME_IRQn },
-    #endif
-};
-
+extern rusb2_controller_t rusb2_controller[];
 #define RUSB2_REG(_p)      ((rusb2_reg_t*) rusb2_controller[_p].reg_base)
 
 //--------------------------------------------------------------------+

From 04f1a34c39e109002c89e464103ebed6128c2903 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 1 Aug 2023 17:03:07 +0700
Subject: [PATCH 550/691] add rusb2_common.c for dynami irq

---
 hw/bsp/ra/family.cmake                    |  1 +
 hw/bsp/ra/family.mk                       |  1 +
 src/portable/renesas/rusb2/dcd_rusb2.c    |  5 --
 src/portable/renesas/rusb2/hcd_rusb2.c    |  6 ---
 src/portable/renesas/rusb2/rusb2_common.c | 61 +++++++++++++++++++++++
 src/portable/renesas/rusb2/rusb2_ra.h     |  8 +--
 src/portable/renesas/rusb2/rusb2_type.h   |  1 +
 7 files changed, 65 insertions(+), 18 deletions(-)
 create mode 100644 src/portable/renesas/rusb2/rusb2_common.c

diff --git a/hw/bsp/ra/family.cmake b/hw/bsp/ra/family.cmake
index 307e01da8..11bc7c668 100644
--- a/hw/bsp/ra/family.cmake
+++ b/hw/bsp/ra/family.cmake
@@ -116,6 +116,7 @@ function(family_configure_example TARGET RTOS)
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/renesas/rusb2/dcd_rusb2.c
     ${TOP}/src/portable/renesas/rusb2/hcd_rusb2.c
+    ${TOP}/src/portable/renesas/rusb2/rusb2_common.c
     )
   target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 
diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk
index 901808958..9afb38e06 100644
--- a/hw/bsp/ra/family.mk
+++ b/hw/bsp/ra/family.mk
@@ -34,6 +34,7 @@ endif
 SRC_C += \
 	src/portable/renesas/rusb2/dcd_rusb2.c \
 	src/portable/renesas/rusb2/hcd_rusb2.c \
+	src/portable/renesas/rusb2/rusb2_common.c \
 	$(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Source/startup.c \
 	$(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Source/system.c \
 	$(FSP_RA)/src/bsp/mcu/all/bsp_clocks.c \
diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 9a3983f56..3ec1b70b5 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -50,11 +50,6 @@
     #define D0FIFOCTR_b CFIFOCTR_b
   #endif
 
-  // Application API for setting IRQ number
-  void tud_rusb2_set_irqnum(uint8_t rhport, int32_t irqnum) {
-    rusb2_controller[rhport].irqnum = irqnum;
-  }
-
 #else
   #error "Unsupported MCU"
 #endif
diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index 7f49dc8a9..621320095 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -34,14 +34,8 @@
 
 #if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
   #include "rusb2_rx.h"
-
 #elif TU_CHECK_MCU(OPT_MCU_RAXXX)
   #include "rusb2_ra.h"
-
-//  void osal_task_delay(uint32_t msec) {
-//    R_BSP_SoftwareDelay(msec, BSP_DELAY_UNITS_MILLISECONDS);
-//  }
-
 #else
   #error "Unsupported MCU"
 #endif
diff --git a/src/portable/renesas/rusb2/rusb2_common.c b/src/portable/renesas/rusb2/rusb2_common.c
new file mode 100644
index 000000000..850060777
--- /dev/null
+++ b/src/portable/renesas/rusb2/rusb2_common.c
@@ -0,0 +1,61 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "tusb_option.h"
+
+#if defined(TUP_USBIP_RUSB2) && (CFG_TUH_ENABLED || CFG_TUD_ENABLED)
+
+#include "rusb2_type.h"
+
+#if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
+#include "rusb2_rx.h"
+
+#elif TU_CHECK_MCU(OPT_MCU_RAXXX)
+#include "rusb2_ra.h"
+
+// USBFS_INT_IRQn and USBHS_USB_INT_RESUME_IRQn are generated by FSP
+rusb2_controller_t rusb2_controller[] = {
+    { .reg_base = R_USB_FS0_BASE, .irqnum = USBFS_INT_IRQn },
+    #ifdef RUSB2_SUPPORT_HIGHSPEED
+    { .reg_base = R_USB_HS0_BASE, .irqnum = USBHS_USB_INT_RESUME_IRQn },
+    #endif
+};
+
+// Application API for setting IRQ number. May throw warnings for missing prototypes.
+void tusb_rusb2_set_irqnum(uint8_t rhport, int32_t irqnum) {
+  rusb2_controller[rhport].irqnum = irqnum;
+}
+
+//  void osal_task_delay(uint32_t msec) {
+//    R_BSP_SoftwareDelay(msec, BSP_DELAY_UNITS_MILLISECONDS);
+//  }
+
+#else
+  #error "Unsupported MCU"
+#endif
+
+
+#endif
diff --git a/src/portable/renesas/rusb2/rusb2_ra.h b/src/portable/renesas/rusb2/rusb2_ra.h
index 7ff272bbc..259d3cbdb 100644
--- a/src/portable/renesas/rusb2/rusb2_ra.h
+++ b/src/portable/renesas/rusb2/rusb2_ra.h
@@ -74,13 +74,7 @@ typedef struct {
   #define rusb2_is_highspeed_reg(_reg)   (false)
 #endif
 
-// USBFS_INT_IRQn and USBHS_USB_INT_RESUME_IRQn are generated by FSP
-static rusb2_controller_t rusb2_controller[] = {
-    { .reg_base = R_USB_FS0_BASE, .irqnum = USBFS_INT_IRQn },
-    #ifdef RUSB2_SUPPORT_HIGHSPEED
-    { .reg_base = R_USB_HS0_BASE, .irqnum = USBHS_USB_INT_RESUME_IRQn },
-    #endif
-};
+extern rusb2_controller_t rusb2_controller[];
 
 #define RUSB2_REG(_p)      ((rusb2_reg_t*) rusb2_controller[_p].reg_base)
 
diff --git a/src/portable/renesas/rusb2/rusb2_type.h b/src/portable/renesas/rusb2/rusb2_type.h
index 005d7f2be..dd88f66a7 100644
--- a/src/portable/renesas/rusb2/rusb2_type.h
+++ b/src/portable/renesas/rusb2/rusb2_type.h
@@ -28,6 +28,7 @@
 #define _TUSB_RUSB2_TYPE_H_
 
 #include <stdint.h>
+#include <stddef.h>
 
 #ifdef __cplusplus
 extern "C" {

From 47ae883ba0f02ef268e7e8427f14aaa4fb0c29ce Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 1 Aug 2023 17:26:56 +0700
Subject: [PATCH 551/691] fix build with -flto

---
 hw/bsp/ra/family.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c
index e6213061d..73c64913d 100644
--- a/hw/bsp/ra/family.c
+++ b/hw/bsp/ra/family.c
@@ -136,7 +136,7 @@ void board_led_write(bool state) {
 }
 
 uint32_t board_button_read(void) {
-  bsp_io_level_t lvl;
+  bsp_io_level_t lvl = !BUTTON_STATE_ACTIVE;
   R_IOPORT_PinRead(&port_ctrl, SW1, &lvl);
   return lvl == BUTTON_STATE_ACTIVE;
 }

From edee46e7941f56f5024bf60d56921cfe10d1f7a5 Mon Sep 17 00:00:00 2001
From: Martino Facchin <m.facchin@arduino.cc>
Date: Tue, 1 Aug 2023 15:21:31 +0200
Subject: [PATCH 552/691] renesas: host: remove attach_attempt logic

---
 src/portable/renesas/rusb2/hcd_rusb2.c | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index 621320095..f6683529a 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -774,7 +774,6 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
 void hcd_int_handler(uint8_t rhport)
 {
   rusb2_reg_t* rusb = RUSB2_REG(rhport);
-  static unsigned char attach_attempt = 0; // TODO remove later
   unsigned is0 = rusb->INTSTS0;
   unsigned is1 = rusb->INTSTS1;
 
@@ -789,23 +788,14 @@ void hcd_int_handler(uint8_t rhport)
   if (is1 & RUSB2_INTSTS1_SACK_Msk) {
     /* Set DATA1 in advance for the next transfer. */
     rusb->DCPCTR_b.SQSET = 1;
-    attach_attempt = 0;
     hcd_event_xfer_complete(rusb->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true);
   }
 
   if (is1 & RUSB2_INTSTS1_SIGN_Msk) {
     hcd_event_xfer_complete(rusb->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true);
-    if(attach_attempt > 0) {
-      rusb->DVSTCTR0_b.UACT = 1;
-      _hcd.need_reset = true;
-      rusb->INTENB1 = (rusb->INTENB1 & ~RUSB2_INTSTS1_ATTCH_Msk) | RUSB2_INTSTS1_DTCH_Msk;
-      hcd_event_device_attach(rhport, true);
-    }
-    attach_attempt--;
   }
 
   if (is1 & RUSB2_INTSTS1_ATTCH_Msk) {
-    attach_attempt = 10;
     rusb->DVSTCTR0_b.UACT = 1;
     _hcd.need_reset = true;
     rusb->INTENB1 = (rusb->INTENB1 & ~RUSB2_INTSTS1_ATTCH_Msk) | RUSB2_INTSTS1_DTCH_Msk;

From 07822979aa31f86fd9d350652be1d450acd03963 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Tue, 1 Aug 2023 18:41:15 +0200
Subject: [PATCH 553/691] Fix STM32G0 build.

---
 hw/bsp/stm32g0/family.cmake | 2 ++
 hw/bsp/stm32g0/family.mk    | 4 +++-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake
index b787363ed..cf52a6324 100644
--- a/hw/bsp/stm32g0/family.cmake
+++ b/hw/bsp/stm32g0/family.cmake
@@ -36,12 +36,14 @@ function(add_board_target BOARD_TARGET)
       ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c
       ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
       )
     target_include_directories(${BOARD_TARGET} PUBLIC
diff --git a/hw/bsp/stm32g0/family.mk b/hw/bsp/stm32g0/family.mk
index 412c73291..6b199f21a 100644
--- a/hw/bsp/stm32g0/family.mk
+++ b/hw/bsp/stm32g0/family.mk
@@ -30,12 +30,14 @@ SRC_C += \
 	$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart_ex.c \
-	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_dma.c
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \

From 979bf32266d379ec493ad31001b815d6a597b91e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 2 Aug 2023 15:34:18 +0700
Subject: [PATCH 554/691] default class driver log level to
 CFG_TUH/TUD_LOG_LEVEL allow application to selectively disable usbd/usbh or
 driver log

---
 src/class/cdc/cdc_device.c     | 15 +++++++++++----
 src/class/cdc/cdc_host.c       |  9 ++++++---
 src/class/dfu/dfu_device.c     | 11 +++++++++--
 src/class/dfu/dfu_rt_device.c  | 13 ++++++++++---
 src/class/hid/hid_host.c       |  8 +++++---
 src/class/msc/msc_device.c     |  2 +-
 src/class/msc/msc_host.c       | 19 +++++++++++--------
 src/class/net/ncm_device.c     | 11 +++++++++--
 src/class/video/video_device.c | 23 +++++++++++++++--------
 src/host/usbh.c                |  7 -------
 src/host/usbh_classdriver.h    |  7 +++++++
 11 files changed, 84 insertions(+), 41 deletions(-)

diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c
index f658df4d0..70d9c2e24 100644
--- a/src/class/cdc/cdc_device.c
+++ b/src/class/cdc/cdc_device.c
@@ -33,6 +33,13 @@
 
 #include "cdc_device.h"
 
+// Level where CFG_TUSB_DEBUG must be at least for this driver is logged
+#ifndef CFG_TUD_CDC_LOG_LEVEL
+  #define CFG_TUD_CDC_LOG_LEVEL   CFG_TUD_LOG_LEVEL
+#endif
+
+#define TU_LOG_DRV(...)   TU_LOG(CFG_TUD_CDC_LOG_LEVEL, __VA_ARGS__)
+
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
@@ -353,7 +360,7 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
     case CDC_REQUEST_SET_LINE_CODING:
       if (stage == CONTROL_STAGE_SETUP)
       {
-        TU_LOG2("  Set Line Coding\r\n");
+        TU_LOG_DRV("  Set Line Coding\r\n");
         tud_control_xfer(rhport, request, &p_cdc->line_coding, sizeof(cdc_line_coding_t));
       }
       else if ( stage == CONTROL_STAGE_ACK)
@@ -365,7 +372,7 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
     case CDC_REQUEST_GET_LINE_CODING:
       if (stage == CONTROL_STAGE_SETUP)
       {
-        TU_LOG2("  Get Line Coding\r\n");
+        TU_LOG_DRV("  Get Line Coding\r\n");
         tud_control_xfer(rhport, request, &p_cdc->line_coding, sizeof(cdc_line_coding_t));
       }
     break;
@@ -390,7 +397,7 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
         // Disable fifo overwriting if DTR bit is set
         tu_fifo_set_overwritable(&p_cdc->tx_ff, !dtr);
 
-        TU_LOG2("  Set Control Line State: DTR = %d, RTS = %d\r\n", dtr, rts);
+        TU_LOG_DRV("  Set Control Line State: DTR = %d, RTS = %d\r\n", dtr, rts);
 
         // Invoke callback
         if ( tud_cdc_line_state_cb ) tud_cdc_line_state_cb(itf, dtr, rts);
@@ -403,7 +410,7 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
       }
       else if (stage == CONTROL_STAGE_ACK)
       {
-        TU_LOG2("  Send Break\r\n");
+        TU_LOG_DRV("  Send Break\r\n");
         if ( tud_cdc_send_break_cb ) tud_cdc_send_break_cb(itf, request->wValue);
       }
     break;
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index ce9f27c33..7f9ed18b3 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -33,9 +33,12 @@
 
 #include "cdc_host.h"
 
-// Debug level, TUSB_CFG_DEBUG must be at least this level for debug message
-#define CDCH_DEBUG   2
-#define TU_LOG_DRV(...)   TU_LOG(CDCH_DEBUG, __VA_ARGS__)
+// Level where CFG_TUSB_DEBUG must be at least for this driver is logged
+#ifndef CFG_TUH_CDC_LOG_LEVEL
+  #define CFG_TUH_CDC_LOG_LEVEL   CFG_TUH_LOG_LEVEL
+#endif
+
+#define TU_LOG_DRV(...)   TU_LOG(CFG_TUH_CDC_LOG_LEVEL, __VA_ARGS__)
 
 //--------------------------------------------------------------------+
 // Host CDC Interface
diff --git a/src/class/dfu/dfu_device.c b/src/class/dfu/dfu_device.c
index bffdb8376..3e7c13dea 100644
--- a/src/class/dfu/dfu_device.c
+++ b/src/class/dfu/dfu_device.c
@@ -37,6 +37,13 @@
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
 
+// Level where CFG_TUSB_DEBUG must be at least for this driver is logged
+#ifndef CFG_TUD_DFU_LOG_LEVEL
+  #define CFG_TUD_DFU_LOG_LEVEL   CFG_TUD_LOG_LEVEL
+#endif
+
+#define TU_LOG_DRV(...)   TU_LOG(CFG_TUD_DFU_LOG_LEVEL, __VA_ARGS__)
+
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
@@ -205,7 +212,7 @@ bool dfu_moded_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_reque
 {
   TU_VERIFY(request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_INTERFACE);
 
-  TU_LOG2("  DFU State  : %s, Status: %s\r\n", tu_lookup_find(&_dfu_state_table, _dfu_ctx.state), tu_lookup_find(&_dfu_status_table, _dfu_ctx.status));
+  TU_LOG_DRV("  DFU State  : %s, Status: %s\r\n", tu_lookup_find(&_dfu_state_table, _dfu_ctx.state), tu_lookup_find(&_dfu_status_table, _dfu_ctx.status));
 
   if ( request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD )
   {
@@ -235,7 +242,7 @@ bool dfu_moded_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_reque
   }
   else if ( request->bmRequestType_bit.type == TUSB_REQ_TYPE_CLASS )
   {
-    TU_LOG2("  DFU Request: %s\r\n", tu_lookup_find(&_dfu_request_table, request->bRequest));
+    TU_LOG_DRV("  DFU Request: %s\r\n", tu_lookup_find(&_dfu_request_table, request->bRequest));
 
     // Class request
     switch ( request->bRequest )
diff --git a/src/class/dfu/dfu_rt_device.c b/src/class/dfu/dfu_rt_device.c
index 7b77b3f8f..a940d8d62 100644
--- a/src/class/dfu/dfu_rt_device.c
+++ b/src/class/dfu/dfu_rt_device.c
@@ -37,6 +37,13 @@
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
 
+// Level where CFG_TUSB_DEBUG must be at least for this driver is logged
+#ifndef CFG_TUD_DFU_RUNTIME_LOG_LEVEL
+  #define CFG_TUD_DFU_RUNTIME_LOG_LEVEL   CFG_TUD_LOG_LEVEL
+#endif
+
+#define TU_LOG_DRV(...)   TU_LOG(CFG_TUD_DFU_RUNTIME_LOG_LEVEL, __VA_ARGS__)
+
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
@@ -99,7 +106,7 @@ bool dfu_rtd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request
   {
     case DFU_REQUEST_DETACH:
     {
-      TU_LOG2("  DFU RT Request: DETACH\r\n");
+      TU_LOG_DRV("  DFU RT Request: DETACH\r\n");
       tud_control_status(rhport, request);
       tud_dfu_runtime_reboot_to_dfu_cb();
     }
@@ -107,7 +114,7 @@ bool dfu_rtd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request
 
     case DFU_REQUEST_GETSTATUS:
     {
-      TU_LOG2("  DFU RT Request: GETSTATUS\r\n");
+      TU_LOG_DRV("  DFU RT Request: GETSTATUS\r\n");
       dfu_status_response_t resp;
       // Status = OK, Poll timeout is ignored during RT, State = APP_IDLE, IString = 0
       TU_VERIFY(tu_memset_s(&resp, sizeof(resp), 0x00, sizeof(resp))==0);
@@ -117,7 +124,7 @@ bool dfu_rtd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request
 
     default:
     {
-      TU_LOG2("  DFU RT Unexpected Request: %d\r\n", request->bRequest);
+      TU_LOG_DRV("  DFU RT Unexpected Request: %d\r\n", request->bRequest);
       return false; // stall unsupported request
     }
   }
diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c
index 6abe298e5..4253170d4 100644
--- a/src/class/hid/hid_host.c
+++ b/src/class/hid/hid_host.c
@@ -33,10 +33,12 @@
 
 #include "hid_host.h"
 
-// Debug level, TUSB_CFG_DEBUG must be at least this level for debug message
-#define HIDH_DEBUG   2
-#define TU_LOG_DRV(...)   TU_LOG(HIDH_DEBUG, __VA_ARGS__)
+// Level where CFG_TUSB_DEBUG must be at least for this driver is logged
+#ifndef CFG_TUH_HID_LOG_LEVEL
+  #define CFG_TUH_HID_LOG_LEVEL   CFG_TUH_LOG_LEVEL
+#endif
 
+#define TU_LOG_DRV(...)   TU_LOG(CFG_TUH_HID_LOG_LEVEL, __VA_ARGS__)
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c
index a602e9672..2589dcd2c 100644
--- a/src/class/msc/msc_device.c
+++ b/src/class/msc/msc_device.c
@@ -36,7 +36,7 @@
 
 // Level where CFG_TUSB_DEBUG must be at least for this driver is logged
 #ifndef CFG_TUD_MSC_LOG_LEVEL
-  #define CFG_TUD_MSC_LOG_LEVEL   2
+  #define CFG_TUD_MSC_LOG_LEVEL   CFG_TUD_LOG_LEVEL
 #endif
 
 #define TU_LOG_DRV(...)   TU_LOG(CFG_TUD_MSC_LOG_LEVEL, __VA_ARGS__)
diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c
index d32c0adb0..a65208d69 100644
--- a/src/class/msc/msc_host.c
+++ b/src/class/msc/msc_host.c
@@ -33,9 +33,12 @@
 
 #include "msc_host.h"
 
-// Debug level, TUSB_CFG_DEBUG must be at least this level for debug message
-#define MSCH_DEBUG   2
-#define TU_LOG_MSCH(...)   TU_LOG(MSCH_DEBUG, __VA_ARGS__)
+// Level where CFG_TUSB_DEBUG must be at least for this driver is logged
+#ifndef CFG_TUH_MSC_LOG_LEVEL
+  #define CFG_TUH_MSC_LOG_LEVEL   CFG_TUH_LOG_LEVEL
+#endif
+
+#define TU_LOG_DRV(...)   TU_LOG(CFG_TUH_MSC_LOG_LEVEL, __VA_ARGS__)
 
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
@@ -308,7 +311,7 @@ void msch_close(uint8_t dev_addr)
   msch_interface_t* p_msc = get_itf(dev_addr);
   TU_VERIFY(p_msc->configured, );
 
-  TU_LOG_MSCH("  MSCh close addr = %d\r\n", dev_addr);
+  TU_LOG_DRV("  MSCh close addr = %d\r\n", dev_addr);
 
   // invoke Application Callback
   if (p_msc->mounted) {
@@ -426,7 +429,7 @@ bool msch_set_config(uint8_t dev_addr, uint8_t itf_num)
   p_msc->configured = true;
 
   //------------- Get Max Lun -------------//
-  TU_LOG_MSCH("MSC Get Max Lun\r\n");
+  TU_LOG_DRV("MSC Get Max Lun\r\n");
   tusb_control_request_t const request =
   {
     .bmRequestType_bit =
@@ -465,7 +468,7 @@ static void config_get_maxlun_complete (tuh_xfer_t* xfer)
   p_msc->max_lun++; // MAX LUN is minus 1 by specs
 
   // TODO multiple LUN support
-  TU_LOG_MSCH("SCSI Test Unit Ready\r\n");
+  TU_LOG_DRV("SCSI Test Unit Ready\r\n");
   uint8_t const lun = 0;
   tuh_msc_test_unit_ready(daddr, lun, config_test_unit_ready_complete, 0);
 }
@@ -478,14 +481,14 @@ static bool config_test_unit_ready_complete(uint8_t dev_addr, tuh_msc_complete_d
   if (csw->status == 0)
   {
     // Unit is ready, read its capacity
-    TU_LOG_MSCH("SCSI Read Capacity\r\n");
+    TU_LOG_DRV("SCSI Read Capacity\r\n");
     tuh_msc_read_capacity(dev_addr, cbw->lun, (scsi_read_capacity10_resp_t*) ((void*) _msch_buffer), config_read_capacity_complete, 0);
   }else
   {
     // Note: During enumeration, some device fails Test Unit Ready and require a few retries
     // with Request Sense to start working !!
     // TODO limit number of retries
-    TU_LOG_MSCH("SCSI Request Sense\r\n");
+    TU_LOG_DRV("SCSI Request Sense\r\n");
     TU_ASSERT(tuh_msc_request_sense(dev_addr, cbw->lun, _msch_buffer, config_request_sense_complete, 0));
   }
 
diff --git a/src/class/net/ncm_device.c b/src/class/net/ncm_device.c
index 611dc3348..226c42c4e 100644
--- a/src/class/net/ncm_device.c
+++ b/src/class/net/ncm_device.c
@@ -34,6 +34,13 @@
 #include "device/usbd_pvt.h"
 #include "net_device.h"
 
+// Level where CFG_TUSB_DEBUG must be at least for this driver is logged
+#ifndef CFG_TUD_NCM_LOG_LEVEL
+  #define CFG_TUD_NCM_LOG_LEVEL   CFG_TUD_LOG_LEVEL
+#endif
+
+#define TU_LOG_DRV(...)   TU_LOG(CFG_TUD_NCM_LOG_LEVEL, __VA_ARGS__)
+
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
@@ -473,13 +480,13 @@ bool tud_network_can_xmit(uint16_t size)
   TU_VERIFY(ncm_interface.itf_data_alt == 1);
 
   if (ncm_interface.datagram_count >= ncm_interface.max_datagrams_per_ntb) {
-    TU_LOG2("NTB full [by count]\r\n");
+    TU_LOG_DRV("NTB full [by count]\r\n");
     return false;
   }
 
   size_t next_datagram_offset = ncm_interface.next_datagram_offset;
   if (next_datagram_offset + size > ncm_interface.ntb_in_size) {
-    TU_LOG2("ntb full [by size]\r\n");
+    TU_LOG_DRV("ntb full [by size]\r\n");
     return false;
   }
 
diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c
index e6fadf41b..abc43ccff 100644
--- a/src/class/video/video_device.c
+++ b/src/class/video/video_device.c
@@ -34,6 +34,13 @@
 
 #include "video_device.h"
 
+// Level where CFG_TUSB_DEBUG must be at least for this driver is logged
+#ifndef CFG_TUD_VIDEO_LOG_LEVEL
+  #define CFG_TUD_VIDEO_LOG_LEVEL   CFG_TUD_LOG_LEVEL
+#endif
+
+#define TU_LOG_DRV(...)   TU_LOG(CFG_TUD_VIDEO_LOG_LEVEL, __VA_ARGS__)
+
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
@@ -609,17 +616,17 @@ static bool _close_vc_itf(uint8_t rhport, videod_interface_t *self)
  * @param[in]     altnum   The target alternate setting number. */
 static bool _open_vc_itf(uint8_t rhport, videod_interface_t *self, uint_fast8_t altnum)
 {
-  TU_LOG2("    open VC %d\n", altnum);
+  TU_LOG_DRV("    open VC %d\n", altnum);
   uint8_t const *beg = self->beg;
   uint8_t const *end = beg + self->len;
 
   /* The first descriptor is a video control interface descriptor. */
   uint8_t const *cur = _find_desc_itf(beg, end, _desc_itfnum(beg), altnum);
-  TU_LOG2("    cur %d\n", cur - beg);
+  TU_LOG_DRV("    cur %d\n", cur - beg);
   TU_VERIFY(cur < end);
 
   tusb_desc_vc_itf_t const *vc = (tusb_desc_vc_itf_t const *)cur;
-  TU_LOG2("    bInCollection %d\n", vc->ctl.bInCollection);
+  TU_LOG_DRV("    bInCollection %d\n", vc->ctl.bInCollection);
   /* Support for up to 2 streaming interfaces only. */
   TU_ASSERT(vc->ctl.bInCollection <= CFG_TUD_VIDEO_STREAMING);
 
@@ -628,7 +635,7 @@ static bool _open_vc_itf(uint8_t rhport, videod_interface_t *self, uint_fast8_t
 
   /* Advance to the next descriptor after the class-specific VC interface header descriptor. */
   cur += vc->std.bLength + vc->ctl.bLength;
-  TU_LOG2("    bNumEndpoints %d\n", vc->std.bNumEndpoints);
+  TU_LOG_DRV("    bNumEndpoints %d\n", vc->std.bNumEndpoints);
   /* Open the notification endpoint if it exist. */
   if (vc->std.bNumEndpoints) {
     /* Support for 1 endpoint only. */
@@ -662,7 +669,7 @@ static bool _init_vs_configuration(videod_streaming_interface_t *stm)
 static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint_fast8_t altnum)
 {
   uint_fast8_t i;
-  TU_LOG2("    reopen VS %d\n", altnum);
+  TU_LOG_DRV("    reopen VS %d\n", altnum);
   uint8_t const *desc = _videod_itf[stm->index_vc].beg;
 
   /* Close endpoints of previous settings. */
@@ -672,7 +679,7 @@ static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint
     uint8_t  ep_adr = _desc_ep_addr(desc + ofs_ep);
     usbd_edpt_close(rhport, ep_adr);
     stm->desc.ep[i] = 0;
-    TU_LOG2("    close EP%02x\n", ep_adr);
+    TU_LOG_DRV("    close EP%02x\n", ep_adr);
   }
 
   /* clear transfer management information */
@@ -709,12 +716,12 @@ static bool _open_vs_itf(uint8_t rhport, videod_streaming_interface_t *stm, uint
     }
     TU_ASSERT(usbd_edpt_open(rhport, ep));
     stm->desc.ep[i] = (uint16_t) (cur - desc);
-    TU_LOG2("    open EP%02x\n", _desc_ep_addr(cur));
+    TU_LOG_DRV("    open EP%02x\n", _desc_ep_addr(cur));
   }
   if (altnum) {
     stm->state = VS_STATE_STREAMING;
   }
-  TU_LOG2("    done\n");
+  TU_LOG_DRV("    done\n");
   return true;
 }
 
diff --git a/src/host/usbh.c b/src/host/usbh.c
index c8eb91be3..49f8c78f1 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -45,13 +45,6 @@
   #define CFG_TUH_INTERFACE_MAX   8
 #endif
 
-// Level where CFG_TUSB_DEBUG must be at least for USBH is logged
-#ifndef CFG_TUH_LOG_LEVEL
-  #define CFG_TUH_LOG_LEVEL   2
-#endif
-
-#define TU_LOG_USBH(...)   TU_LOG(CFG_TUH_LOG_LEVEL, __VA_ARGS__)
-
 //--------------------------------------------------------------------+
 // USBH-HCD common data structure
 //--------------------------------------------------------------------+
diff --git a/src/host/usbh_classdriver.h b/src/host/usbh_classdriver.h
index be9811641..308b4418a 100644
--- a/src/host/usbh_classdriver.h
+++ b/src/host/usbh_classdriver.h
@@ -35,6 +35,13 @@
  extern "C" {
 #endif
 
+// Level where CFG_TUSB_DEBUG must be at least for USBH is logged
+#ifndef CFG_TUH_LOG_LEVEL
+  #define CFG_TUH_LOG_LEVEL   2
+#endif
+
+#define TU_LOG_USBH(...)   TU_LOG(CFG_TUH_LOG_LEVEL, __VA_ARGS__)
+
 enum {
   USBH_EPSIZE_BULK_MAX = (TUH_OPT_HIGH_SPEED ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS)
 };

From 868d52f3a87d4404b0e93e49781d4190589599b9 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 2 Aug 2023 15:52:06 +0700
Subject: [PATCH 555/691] move codespell folder to tools

---
 .codespellrc                                     | 4 ++--
 {.codespell => tools/codespell}/exclude-file.txt | 0
 {.codespell => tools/codespell}/ignore-words.txt | 0
 3 files changed, 2 insertions(+), 2 deletions(-)
 rename {.codespell => tools/codespell}/exclude-file.txt (100%)
 rename {.codespell => tools/codespell}/ignore-words.txt (100%)

diff --git a/.codespellrc b/.codespellrc
index dc089903c..1f06e0c5c 100644
--- a/.codespellrc
+++ b/.codespellrc
@@ -2,8 +2,8 @@
 [codespell]
 # In the event of a false positive, add the problematic word, in all lowercase, to 'ignore-words.txt' (one word per line).
 # Or copy & paste the whole problematic line to 'exclude-file.txt'
-ignore-words = .codespell/ignore-words.txt
-exclude-file = .codespell/exclude-file.txt
+ignore-words = tools/codespell/ignore-words.txt
+exclude-file = tools/codespell/exclude-file.txt
 check-filenames =
 check-hidden =
 count =
diff --git a/.codespell/exclude-file.txt b/tools/codespell/exclude-file.txt
similarity index 100%
rename from .codespell/exclude-file.txt
rename to tools/codespell/exclude-file.txt
diff --git a/.codespell/ignore-words.txt b/tools/codespell/ignore-words.txt
similarity index 100%
rename from .codespell/ignore-words.txt
rename to tools/codespell/ignore-words.txt

From 2021c6299789a3dd9bd239941d9316494205fe2f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 2 Aug 2023 17:57:28 +0700
Subject: [PATCH 556/691] fix pre-commit, also skip lto for rp2040

---
 examples/host/bare_api/CMakeLists.txt | 2 +-
 hw/bsp/family_support.cmake           | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/examples/host/bare_api/CMakeLists.txt b/examples/host/bare_api/CMakeLists.txt
index 7049fe66b..05398b079 100644
--- a/examples/host/bare_api/CMakeLists.txt
+++ b/examples/host/bare_api/CMakeLists.txt
@@ -24,4 +24,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_host_example(${PROJECT} noos)
\ No newline at end of file
+family_configure_host_example(${PROJECT} noos)
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 9959784ae..7c230957c 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -36,8 +36,8 @@ if (NOT EXISTS ${CMAKE_CURRENT_LIST_DIR}/${FAMILY}/family.cmake)
   message(FATAL_ERROR "Family '${FAMILY}' is not known/supported")
 endif()
 
-if (NOT TINYUSB_OPT_SKIP_CHECK_IPO_SUPPORTED)
-  # enable LTO if supported
+if (NOT FAMILY STREQUAL rp2040)
+  # enable LTO if supported skip rp2040
   include(CheckIPOSupported)
   check_ipo_supported(RESULT IPO_SUPPORTED)
   if (IPO_SUPPORTED)

From 9560d0813f0872a1b8dfb337922b0ab5cc4cb811 Mon Sep 17 00:00:00 2001
From: Rocky04 <rockerfaeller04@gmx.de>
Date: Wed, 2 Aug 2023 15:25:08 +0200
Subject: [PATCH 557/691] Set unmounted on configuration reset

---
 src/device/usbd.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/src/device/usbd.c b/src/device/usbd.c
index 9429cf664..b4ca63c9c 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -965,7 +965,14 @@ static bool process_set_config(uint8_t rhport, uint8_t cfg_num)
   }
 
   // invoke callback
-  if (tud_mount_cb) tud_mount_cb();
+  if (cfg_num)
+  {
+    if (tud_mount_cb) tud_mount_cb();
+  }
+  else
+  {
+    if (tud_umount_cb) tud_umount_cb();
+  }
 
   return true;
 }

From d09604d6364f4840669eda66a75f5df0926bb3e0 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 3 Aug 2023 11:07:23 +0700
Subject: [PATCH 558/691] Revert "Name queues for easier FreeRTOS debugging
 with task- and queue-aware debuggers"

This reverts commit 11fba59319d81fb9502fbf399abb4fe27cf3fa29.
---
 src/device/usbd.c        | 4 ++--
 src/host/usbh.c          | 4 ++--
 src/osal/osal_freertos.h | 5 ++---
 3 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/src/device/usbd.c b/src/device/usbd.c
index b6c679b22..44c2530ce 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -279,7 +279,7 @@ tu_static uint8_t _usbd_rhport = RHPORT_INVALID;
 
 // Event queue
 // usbd_int_set() is used as mutex in OS NONE config
-OSAL_QUEUE_DEF(usbd_int_set, usbd_events, CFG_TUD_TASK_QUEUE_SZ, dcd_event_t);
+OSAL_QUEUE_DEF(usbd_int_set, _usbd_qdef, CFG_TUD_TASK_QUEUE_SZ, dcd_event_t);
 tu_static osal_queue_t _usbd_q;
 
 // Mutex for claiming endpoint
@@ -410,7 +410,7 @@ bool tud_init (uint8_t rhport)
 #endif
 
   // Init device queue & task
-  _usbd_q = osal_queue_create(&usbd_events);
+  _usbd_q = osal_queue_create(&_usbd_qdef);
   TU_ASSERT(_usbd_q);
 
   // Get application driver if available
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 987ff7a6e..f3e9d3858 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -219,7 +219,7 @@ static usbh_device_t _usbh_devices[TOTAL_DEVICES];
 
 // Event queue
 // usbh_int_set is used as mutex in OS NONE config
-OSAL_QUEUE_DEF(usbh_int_set, usbh_events, CFG_TUH_TASK_QUEUE_SZ, hcd_event_t);
+OSAL_QUEUE_DEF(usbh_int_set, _usbh_qdef, CFG_TUH_TASK_QUEUE_SZ, hcd_event_t);
 static osal_queue_t _usbh_q;
 
 CFG_TUH_MEM_SECTION CFG_TUH_MEM_ALIGN
@@ -330,7 +330,7 @@ bool tuh_init(uint8_t controller_id)
   TU_LOG_INT(USBH_DEBUG, sizeof(tu_edpt_stream_t));
 
   // Event queue
-  _usbh_q = osal_queue_create( &usbh_events );
+  _usbh_q = osal_queue_create( &_usbh_qdef );
   TU_ASSERT(_usbh_q != NULL);
 
 #if OSAL_MUTEX_REQUIRED
diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h
index e83277eb3..0b1b11589 100644
--- a/src/osal/osal_freertos.h
+++ b/src/osal/osal_freertos.h
@@ -56,7 +56,7 @@ typedef SemaphoreHandle_t osal_mutex_t;
 // _int_set is not used with an RTOS
 #define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type) \
   static _type _name##_##buf[_depth];\
-  osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf, .pQueueName = #_name };
+  osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf };
 
 typedef struct
 {
@@ -66,7 +66,6 @@ typedef struct
 #if configSUPPORT_STATIC_ALLOCATION
   StaticQueue_t sq;
 #endif
-  const char* pQueueName;
 }osal_queue_def_t;
 
 typedef QueueHandle_t osal_queue_t;
@@ -177,7 +176,7 @@ TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_de
     q = xQueueCreate(qdef->depth, qdef->item_sz);
   #endif
   #if defined(configQUEUE_REGISTRY_SIZE) && (configQUEUE_REGISTRY_SIZE>0)
-    vQueueAddToRegistry(q, qdef->pQueueName);
+    vQueueAddToRegistry(q, "tinyUSB");
   #endif
   return q;
 }

From 473f37df958f74153f15c050c20d63f8defe89ed Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 3 Aug 2023 12:05:21 +0700
Subject: [PATCH 559/691] add osal queue name if needed

also mass change configQUEUE_REGISTRY_SIZE = 4
---
 .../src/FreeRTOSConfig/FreeRTOSConfig.h       |   2 +-
 .../src/FreeRTOSConfig/FreeRTOSConfig.h       |   2 +-
 hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h  |   2 +-
 .../FreeRTOSConfig/FreeRTOSConfig.h           |   2 +-
 hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h  |   2 +-
 hw/bsp/lpc40/FreeRTOSConfig/FreeRTOSConfig.h  |   2 +-
 hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h  |   2 +-
 hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h    |   2 +-
 hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h    |   2 +-
 hw/bsp/ra/FreeRTOSConfig/FreeRTOSConfig.h     |   2 +-
 .../stm32f0/FreeRTOSConfig/FreeRTOSConfig.h   |   2 +-
 .../stm32f1/FreeRTOSConfig/FreeRTOSConfig.h   |   2 +-
 .../stm32f7/FreeRTOSConfig/FreeRTOSConfig.h   |   2 +-
 .../stm32g0/FreeRTOSConfig/FreeRTOSConfig.h   |   2 +-
 .../stm32g4/FreeRTOSConfig/FreeRTOSConfig.h   |   2 +-
 .../stm32h7/FreeRTOSConfig/FreeRTOSConfig.h   |   2 +-
 .../stm32l4/FreeRTOSConfig/FreeRTOSConfig.h   |   2 +-
 src/osal/osal_freertos.h                      | 108 +++++++++---------
 18 files changed, 68 insertions(+), 74 deletions(-)

diff --git a/examples/device/cdc_msc_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h b/examples/device/cdc_msc_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
index 9bef9bbbf..69d638288 100644
--- a/examples/device/cdc_msc_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/examples/device/cdc_msc_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
@@ -81,7 +81,7 @@
 #define configUSE_MUTEXES                       1
 #define configUSE_RECURSIVE_MUTEXES             1
 #define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               2
+#define configQUEUE_REGISTRY_SIZE               4
 #define configUSE_QUEUE_SETS                    0
 #define configUSE_TIME_SLICING                  0
 #define configUSE_NEWLIB_REENTRANT              0
diff --git a/examples/device/hid_composite_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h b/examples/device/hid_composite_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
index 9bef9bbbf..69d638288 100644
--- a/examples/device/hid_composite_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/examples/device/hid_composite_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
@@ -81,7 +81,7 @@
 #define configUSE_MUTEXES                       1
 #define configUSE_RECURSIVE_MUTEXES             1
 #define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               2
+#define configQUEUE_REGISTRY_SIZE               4
 #define configUSE_QUEUE_SETS                    0
 #define configUSE_TIME_SLICING                  0
 #define configUSE_NEWLIB_REENTRANT              0
diff --git a/hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h
index f95927069..b65d8f1f9 100644
--- a/hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/imxrt/FreeRTOSConfig/FreeRTOSConfig.h
@@ -66,7 +66,7 @@
 #define configUSE_MUTEXES                       1
 #define configUSE_RECURSIVE_MUTEXES             1
 #define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               2
+#define configQUEUE_REGISTRY_SIZE               4
 #define configUSE_QUEUE_SETS                    0
 #define configUSE_TIME_SLICING                  0
 #define configUSE_NEWLIB_REENTRANT              0
diff --git a/hw/bsp/kinetis_kl/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/kinetis_kl/FreeRTOSConfig/FreeRTOSConfig.h
index a46af1759..2a2bce261 100644
--- a/hw/bsp/kinetis_kl/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/kinetis_kl/FreeRTOSConfig/FreeRTOSConfig.h
@@ -66,7 +66,7 @@
 #define configUSE_MUTEXES                       1
 #define configUSE_RECURSIVE_MUTEXES             1
 #define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               2
+#define configQUEUE_REGISTRY_SIZE               4
 #define configUSE_QUEUE_SETS                    0
 #define configUSE_TIME_SLICING                  0
 #define configUSE_NEWLIB_REENTRANT              0
diff --git a/hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h
index 1b3c64e0b..ea568dfc9 100644
--- a/hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h
@@ -66,7 +66,7 @@
 #define configUSE_MUTEXES                       1
 #define configUSE_RECURSIVE_MUTEXES             1
 #define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               2
+#define configQUEUE_REGISTRY_SIZE               3
 #define configUSE_QUEUE_SETS                    0
 #define configUSE_TIME_SLICING                  0
 #define configUSE_NEWLIB_REENTRANT              0
diff --git a/hw/bsp/lpc40/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/lpc40/FreeRTOSConfig/FreeRTOSConfig.h
index 96611ca1c..a48b54576 100644
--- a/hw/bsp/lpc40/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/lpc40/FreeRTOSConfig/FreeRTOSConfig.h
@@ -66,7 +66,7 @@
 #define configUSE_MUTEXES                       1
 #define configUSE_RECURSIVE_MUTEXES             1
 #define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               2
+#define configQUEUE_REGISTRY_SIZE               4
 #define configUSE_QUEUE_SETS                    0
 #define configUSE_TIME_SLICING                  0
 #define configUSE_NEWLIB_REENTRANT              0
diff --git a/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h
index b1cef793e..fc0ab1f2d 100644
--- a/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/lpc55/FreeRTOSConfig/FreeRTOSConfig.h
@@ -66,7 +66,7 @@
 #define configUSE_MUTEXES                       1
 #define configUSE_RECURSIVE_MUTEXES             1
 #define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               2
+#define configQUEUE_REGISTRY_SIZE               4
 #define configUSE_QUEUE_SETS                    0
 #define configUSE_TIME_SLICING                  0
 #define configUSE_NEWLIB_REENTRANT              0
diff --git a/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h
index b1cef793e..fc0ab1f2d 100644
--- a/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/mcx/FreeRTOSConfig/FreeRTOSConfig.h
@@ -66,7 +66,7 @@
 #define configUSE_MUTEXES                       1
 #define configUSE_RECURSIVE_MUTEXES             1
 #define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               2
+#define configQUEUE_REGISTRY_SIZE               4
 #define configUSE_QUEUE_SETS                    0
 #define configUSE_TIME_SLICING                  0
 #define configUSE_NEWLIB_REENTRANT              0
diff --git a/hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h
index a56f243ea..efd26a3a7 100644
--- a/hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h
@@ -66,7 +66,7 @@
 #define configUSE_MUTEXES                       1
 #define configUSE_RECURSIVE_MUTEXES             1
 #define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               2
+#define configQUEUE_REGISTRY_SIZE               4
 #define configUSE_QUEUE_SETS                    0
 #define configUSE_TIME_SLICING                  0
 #define configUSE_NEWLIB_REENTRANT              0
diff --git a/hw/bsp/ra/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/ra/FreeRTOSConfig/FreeRTOSConfig.h
index 8c39a2fb8..4ef5dd883 100644
--- a/hw/bsp/ra/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/ra/FreeRTOSConfig/FreeRTOSConfig.h
@@ -81,7 +81,7 @@
 #define configUSE_MUTEXES                       1
 #define configUSE_RECURSIVE_MUTEXES             1
 #define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               2
+#define configQUEUE_REGISTRY_SIZE               4
 #define configUSE_QUEUE_SETS                    0
 #define configUSE_TIME_SLICING                  0
 #define configUSE_NEWLIB_REENTRANT              0
diff --git a/hw/bsp/stm32f0/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32f0/FreeRTOSConfig/FreeRTOSConfig.h
index fc2f9fc67..33440d288 100644
--- a/hw/bsp/stm32f0/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/stm32f0/FreeRTOSConfig/FreeRTOSConfig.h
@@ -66,7 +66,7 @@
 #define configUSE_MUTEXES                       1
 #define configUSE_RECURSIVE_MUTEXES             1
 #define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               2
+#define configQUEUE_REGISTRY_SIZE               4
 #define configUSE_QUEUE_SETS                    0
 #define configUSE_TIME_SLICING                  0
 #define configUSE_NEWLIB_REENTRANT              0
diff --git a/hw/bsp/stm32f1/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32f1/FreeRTOSConfig/FreeRTOSConfig.h
index 5a6b2300b..580fe02bb 100644
--- a/hw/bsp/stm32f1/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/stm32f1/FreeRTOSConfig/FreeRTOSConfig.h
@@ -66,7 +66,7 @@
 #define configUSE_MUTEXES                       1
 #define configUSE_RECURSIVE_MUTEXES             1
 #define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               2
+#define configQUEUE_REGISTRY_SIZE               4
 #define configUSE_QUEUE_SETS                    0
 #define configUSE_TIME_SLICING                  0
 #define configUSE_NEWLIB_REENTRANT              0
diff --git a/hw/bsp/stm32f7/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32f7/FreeRTOSConfig/FreeRTOSConfig.h
index 815e567dd..4615640ed 100644
--- a/hw/bsp/stm32f7/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/stm32f7/FreeRTOSConfig/FreeRTOSConfig.h
@@ -66,7 +66,7 @@
 #define configUSE_MUTEXES                       1
 #define configUSE_RECURSIVE_MUTEXES             1
 #define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               2
+#define configQUEUE_REGISTRY_SIZE               4
 #define configUSE_QUEUE_SETS                    0
 #define configUSE_TIME_SLICING                  0
 #define configUSE_NEWLIB_REENTRANT              0
diff --git a/hw/bsp/stm32g0/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32g0/FreeRTOSConfig/FreeRTOSConfig.h
index c8736f6d1..02bfaf97a 100644
--- a/hw/bsp/stm32g0/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/stm32g0/FreeRTOSConfig/FreeRTOSConfig.h
@@ -66,7 +66,7 @@
 #define configUSE_MUTEXES                       1
 #define configUSE_RECURSIVE_MUTEXES             1
 #define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               2
+#define configQUEUE_REGISTRY_SIZE               4
 #define configUSE_QUEUE_SETS                    0
 #define configUSE_TIME_SLICING                  0
 #define configUSE_NEWLIB_REENTRANT              0
diff --git a/hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h
index 95fcbb08a..17c2a0c5c 100644
--- a/hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/stm32g4/FreeRTOSConfig/FreeRTOSConfig.h
@@ -66,7 +66,7 @@
 #define configUSE_MUTEXES                       1
 #define configUSE_RECURSIVE_MUTEXES             1
 #define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               2
+#define configQUEUE_REGISTRY_SIZE               4
 #define configUSE_QUEUE_SETS                    0
 #define configUSE_TIME_SLICING                  0
 #define configUSE_NEWLIB_REENTRANT              0
diff --git a/hw/bsp/stm32h7/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32h7/FreeRTOSConfig/FreeRTOSConfig.h
index 6881385a8..6a1f6c043 100644
--- a/hw/bsp/stm32h7/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/stm32h7/FreeRTOSConfig/FreeRTOSConfig.h
@@ -66,7 +66,7 @@
 #define configUSE_MUTEXES                       1
 #define configUSE_RECURSIVE_MUTEXES             1
 #define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               2
+#define configQUEUE_REGISTRY_SIZE               4
 #define configUSE_QUEUE_SETS                    0
 #define configUSE_TIME_SLICING                  0
 #define configUSE_NEWLIB_REENTRANT              0
diff --git a/hw/bsp/stm32l4/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32l4/FreeRTOSConfig/FreeRTOSConfig.h
index e6a735ddd..c12b0dc85 100644
--- a/hw/bsp/stm32l4/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/stm32l4/FreeRTOSConfig/FreeRTOSConfig.h
@@ -66,7 +66,7 @@
 #define configUSE_MUTEXES                       1
 #define configUSE_RECURSIVE_MUTEXES             1
 #define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               2
+#define configQUEUE_REGISTRY_SIZE               4
 #define configUSE_QUEUE_SETS                    0
 #define configUSE_TIME_SLICING                  0
 #define configUSE_NEWLIB_REENTRANT              0
diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h
index 0b1b11589..501e0bddd 100644
--- a/src/osal/osal_freertos.h
+++ b/src/osal/osal_freertos.h
@@ -52,53 +52,60 @@ extern "C" {
 
 typedef SemaphoreHandle_t osal_semaphore_t;
 typedef SemaphoreHandle_t osal_mutex_t;
-
-// _int_set is not used with an RTOS
-#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type) \
-  static _type _name##_##buf[_depth];\
-  osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf };
+typedef QueueHandle_t osal_queue_t;
 
 typedef struct
 {
   uint16_t depth;
   uint16_t item_sz;
   void*    buf;
+
+#if defined(configQUEUE_REGISTRY_SIZE) && (configQUEUE_REGISTRY_SIZE>0)
+  char const* name;
+#endif
+
 #if configSUPPORT_STATIC_ALLOCATION
   StaticQueue_t sq;
 #endif
-}osal_queue_def_t;
+} osal_queue_def_t;
 
-typedef QueueHandle_t osal_queue_t;
+#if defined(configQUEUE_REGISTRY_SIZE) && (configQUEUE_REGISTRY_SIZE>0)
+  #define _OSAL_Q_NAME(_name) .name = #_name
+#else
+  #define _OSAL_Q_NAME(_name)
+#endif
+
+// _int_set is not used with an RTOS
+#define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type) \
+  static _type _name##_##buf[_depth];\
+  osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf, _OSAL_Q_NAME(_name) };
 
 //--------------------------------------------------------------------+
 // TASK API
 //--------------------------------------------------------------------+
 
-TU_ATTR_ALWAYS_INLINE static inline uint32_t _osal_ms2tick(uint32_t msec)
-{
-  if (msec == OSAL_TIMEOUT_WAIT_FOREVER) return portMAX_DELAY;
-  if (msec == 0) return 0;
+TU_ATTR_ALWAYS_INLINE static inline uint32_t _osal_ms2tick(uint32_t msec) {
+  if ( msec == OSAL_TIMEOUT_WAIT_FOREVER ) return portMAX_DELAY;
+  if ( msec == 0 ) return 0;
 
   uint32_t ticks = pdMS_TO_TICKS(msec);
 
   // configTICK_RATE_HZ is less than 1000 and 1 tick > 1 ms
   // we still need to delay at least 1 tick
-  if (ticks == 0) ticks =1 ;
+  if ( ticks == 0 ) ticks = 1;
 
   return ticks;
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec)
-{
-  vTaskDelay( pdMS_TO_TICKS(msec) );
+TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) {
+  vTaskDelay(pdMS_TO_TICKS(msec));
 }
 
 //--------------------------------------------------------------------+
 // Semaphore API
 //--------------------------------------------------------------------+
 
-TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef)
-{
+TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t *semdef) {
 #if configSUPPORT_STATIC_ALLOCATION
   return xSemaphoreCreateBinaryStatic(semdef);
 #else
@@ -107,14 +114,10 @@ TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_
 #endif
 }
 
-TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr)
-{
-  if ( !in_isr )
-  {
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) {
+  if ( !in_isr ) {
     return xSemaphoreGive(sem_hdl) != 0;
-  }
-  else
-  {
+  } else {
     BaseType_t xHigherPriorityTaskWoken = pdFALSE;
     BaseType_t res = xSemaphoreGiveFromISR(sem_hdl, &xHigherPriorityTaskWoken);
 
@@ -129,13 +132,11 @@ TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t se
   }
 }
 
-TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec)
-{
+TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec) {
   return xSemaphoreTake(sem_hdl, _osal_ms2tick(msec));
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void osal_semaphore_reset(osal_semaphore_t const sem_hdl)
-{
+TU_ATTR_ALWAYS_INLINE static inline void osal_semaphore_reset(osal_semaphore_t const sem_hdl) {
   xQueueReset(sem_hdl);
 }
 
@@ -143,8 +144,7 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_semaphore_reset(osal_semaphore_t c
 // MUTEX API (priority inheritance)
 //--------------------------------------------------------------------+
 
-TU_ATTR_ALWAYS_INLINE static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef)
-{
+TU_ATTR_ALWAYS_INLINE static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t *mdef) {
 #if configSUPPORT_STATIC_ALLOCATION
   return xSemaphoreCreateMutexStatic(mdef);
 #else
@@ -153,13 +153,11 @@ TU_ATTR_ALWAYS_INLINE static inline osal_mutex_t osal_mutex_create(osal_mutex_de
 #endif
 }
 
-TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_lock(osal_mutex_t mutex_hdl, uint32_t msec)
-{
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_lock(osal_mutex_t mutex_hdl, uint32_t msec) {
   return osal_semaphore_wait(mutex_hdl, msec);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl)
-{
+TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl) {
   return xSemaphoreGive(mutex_hdl);
 }
 
@@ -167,38 +165,35 @@ TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hd
 // QUEUE API
 //--------------------------------------------------------------------+
 
-TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef)
-{
+TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) {
   osal_queue_t q;
-  #if configSUPPORT_STATIC_ALLOCATION
-    q = xQueueCreateStatic(qdef->depth, qdef->item_sz, (uint8_t*) qdef->buf, &qdef->sq);
-  #else
-    q = xQueueCreate(qdef->depth, qdef->item_sz);
-  #endif
-  #if defined(configQUEUE_REGISTRY_SIZE) && (configQUEUE_REGISTRY_SIZE>0)
-    vQueueAddToRegistry(q, "tinyUSB");
-  #endif
+
+#if configSUPPORT_STATIC_ALLOCATION
+  q = xQueueCreateStatic(qdef->depth, qdef->item_sz, (uint8_t*) qdef->buf, &qdef->sq);
+#else
+  q = xQueueCreate(qdef->depth, qdef->item_sz);
+#endif
+
+#if defined(configQUEUE_REGISTRY_SIZE) && (configQUEUE_REGISTRY_SIZE>0)
+  vQueueAddToRegistry(q, qdef->name);
+#endif
+
   return q;
 }
 
-TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, void* data, uint32_t msec)
-{
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, void* data, uint32_t msec) {
   return xQueueReceive(qhdl, data, _osal_ms2tick(msec));
 }
 
-TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr)
-{
-  if ( !in_isr )
-  {
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, void const *data, bool in_isr) {
+  if ( !in_isr ) {
     return xQueueSendToBack(qhdl, data, OSAL_TIMEOUT_WAIT_FOREVER) != 0;
-  }
-  else
-  {
+  } else {
     BaseType_t xHigherPriorityTaskWoken = pdFALSE;
     BaseType_t res = xQueueSendToBackFromISR(qhdl, data, &xHigherPriorityTaskWoken);
 
 #if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3
-    // not needed after https://github.com/espressif/esp-idf/commit/c5fd79547ac9b7bae06fa660e9f814d18d3390b7
+    // not needed after https://github.com/espressif/esp-idf/commit/c5fd79547ac9b7bae06fa660e9f814d18d3390b7 (IDF v5)
     if ( xHigherPriorityTaskWoken ) portYIELD_FROM_ISR();
 #else
     portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
@@ -208,13 +203,12 @@ TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, void
   }
 }
 
-TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_empty(osal_queue_t qhdl)
-{
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_empty(osal_queue_t qhdl) {
   return uxQueueMessagesWaiting(qhdl) == 0;
 }
 
 #ifdef __cplusplus
- }
+}
 #endif
 
 #endif

From 37a7f9f38287be4a6e1a02193f83c01672793a5e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 3 Aug 2023 12:07:28 +0700
Subject: [PATCH 560/691] configQUEUE_REGISTRY_SIZE=4 for lpc18

---
 hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h
index ea568dfc9..6f80413c0 100644
--- a/hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/lpc18/FreeRTOSConfig/FreeRTOSConfig.h
@@ -66,7 +66,7 @@
 #define configUSE_MUTEXES                       1
 #define configUSE_RECURSIVE_MUTEXES             1
 #define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               3
+#define configQUEUE_REGISTRY_SIZE               4
 #define configUSE_QUEUE_SETS                    0
 #define configUSE_TIME_SLICING                  0
 #define configUSE_NEWLIB_REENTRANT              0

From d89fc0772b0844703ae18912b8774df7c11d708c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 3 Aug 2023 14:55:24 +0700
Subject: [PATCH 561/691] add makefile, add cdc_uac2 to cmake example list,
 update descriptor to build with nrf and samg/7x

---
 examples/device/CMakeLists.txt                |  1 +
 examples/device/cdc_uac2/CMakeLists.txt       | 16 +++---
 examples/device/cdc_uac2/Makefile             | 16 ++++++
 examples/device/cdc_uac2/skip.txt             | 52 -------------------
 .../cdc_uac2/src/{tusb_cdc.c => cdc_app.c}    |  0
 .../cdc_uac2/src/{tusb_uac2.c => uac2_app.c}  |  0
 .../device/cdc_uac2/src/usb_descriptors.c     | 12 +++++
 7 files changed, 37 insertions(+), 60 deletions(-)
 create mode 100644 examples/device/cdc_uac2/Makefile
 delete mode 100644 examples/device/cdc_uac2/skip.txt
 rename examples/device/cdc_uac2/src/{tusb_cdc.c => cdc_app.c} (100%)
 rename examples/device/cdc_uac2/src/{tusb_uac2.c => uac2_app.c} (100%)

diff --git a/examples/device/CMakeLists.txt b/examples/device/CMakeLists.txt
index 5b077a5e1..f590fff3f 100644
--- a/examples/device/CMakeLists.txt
+++ b/examples/device/CMakeLists.txt
@@ -13,6 +13,7 @@ family_add_subdirectory(board_test)
 family_add_subdirectory(cdc_dual_ports)
 family_add_subdirectory(cdc_msc)
 family_add_subdirectory(cdc_msc_freertos)
+family_add_subdirectory(cdc_uac2)
 family_add_subdirectory(dfu)
 family_add_subdirectory(dfu_runtime)
 family_add_subdirectory(dynamic_configuration)
diff --git a/examples/device/cdc_uac2/CMakeLists.txt b/examples/device/cdc_uac2/CMakeLists.txt
index efe8c74ba..64e4374e9 100644
--- a/examples/device/cdc_uac2/CMakeLists.txt
+++ b/examples/device/cdc_uac2/CMakeLists.txt
@@ -19,20 +19,20 @@ add_executable(${PROJECT})
 
 # Example source
 target_sources(${PROJECT} PUBLIC
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/tusb_cdc.c
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/tusb_uac2.c
-        ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
-        )
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/cdc_app.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/uac2_app.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
+  )
 
 # Example include
 target_include_directories(${PROJECT} PUBLIC
-        ${CMAKE_CURRENT_SOURCE_DIR}/src
-        )
+  ${CMAKE_CURRENT_SOURCE_DIR}/src
+  )
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT})
+family_configure_device_example(${PROJECT} noos)
 
 # Uncomment me to enable UART based debugging
 # pico_enable_stdio_uart(${PROJECT} 1)
diff --git a/examples/device/cdc_uac2/Makefile b/examples/device/cdc_uac2/Makefile
new file mode 100644
index 000000000..b7a8302ce
--- /dev/null
+++ b/examples/device/cdc_uac2/Makefile
@@ -0,0 +1,16 @@
+include ../../make.mk
+
+INC += \
+	src \
+	$(TOP)/hw \
+
+# Example source
+EXAMPLE_SOURCE += \
+  src/cdc_app.c \
+  src/main.c \
+  src/uac2_app.c \
+  src/usb_descriptors.c \
+
+SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+
+include ../../rules.mk
diff --git a/examples/device/cdc_uac2/skip.txt b/examples/device/cdc_uac2/skip.txt
deleted file mode 100644
index 8e70a5278..000000000
--- a/examples/device/cdc_uac2/skip.txt
+++ /dev/null
@@ -1,52 +0,0 @@
-board:curiosity_nano
-board:frdm_kl25z
-board:stm32l052dap52
-family:broadcom_32bit
-family:broadcom_64bit
-family:ch32v307
-family:fomu
-family:gd32vf103
-family:kinetis_k32l
-family:kinetis_kl
-family:lpc11
-family:lpc13
-family:lpc15
-family:lpc17
-family:lpc51
-family:lpc54
-family:lpc55
-family:mm32
-family:msp430
-family:msp432e
-family:msp432e4
-family:nrf
-family:ra
-family:rx
-family:samd11
-family:samd21
-family:samd51
-family:same5x
-family:saml2x
-family:stm32f0
-family:stm32f1
-family:stm32f2
-family:stm32f3
-family:stm32f4
-family:stm32f7
-family:stm32g4
-family:stm32h7
-family:stm32l0
-family:stm32l4
-family:stm32u5
-family:stm32wb
-family:tm4c123
-family:xmc4000
-mcu:LPC11UXX
-mcu:LPC13XX
-mcu:MKL25ZXX
-mcu:MSP430x5xx
-mcu:NUC121
-mcu:SAMD11
-mcu:SAME5X
-mcu:SAMG
-mcu:STM32L0
diff --git a/examples/device/cdc_uac2/src/tusb_cdc.c b/examples/device/cdc_uac2/src/cdc_app.c
similarity index 100%
rename from examples/device/cdc_uac2/src/tusb_cdc.c
rename to examples/device/cdc_uac2/src/cdc_app.c
diff --git a/examples/device/cdc_uac2/src/tusb_uac2.c b/examples/device/cdc_uac2/src/uac2_app.c
similarity index 100%
rename from examples/device/cdc_uac2/src/tusb_uac2.c
rename to examples/device/cdc_uac2/src/uac2_app.c
diff --git a/examples/device/cdc_uac2/src/usb_descriptors.c b/examples/device/cdc_uac2/src/usb_descriptors.c
index 1b2766829..58b711978 100644
--- a/examples/device/cdc_uac2/src/usb_descriptors.c
+++ b/examples/device/cdc_uac2/src/usb_descriptors.c
@@ -92,18 +92,30 @@ uint8_t const * tud_descriptor_device_cb(void)
   #define EPNUM_AUDIO_IN    0x08
   #define EPNUM_AUDIO_OUT   0x08
 
+  #define EPNUM_CDC_NOTIF   0x81
+  #define EPNUM_CDC_OUT     0x02
+  #define EPNUM_CDC_IN      0x82
+
 #elif CFG_TUSB_MCU == OPT_MCU_SAMG  || CFG_TUSB_MCU ==  OPT_MCU_SAMX7X
   // SAMG & SAME70 don't support a same endpoint number with different direction IN and OUT
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_AUDIO_IN    0x01
   #define EPNUM_AUDIO_OUT   0x02
 
+  #define EPNUM_CDC_NOTIF   0x83
+  #define EPNUM_CDC_OUT     0x04
+  #define EPNUM_CDC_IN      0x85
+
 #elif CFG_TUSB_MCU == OPT_MCU_FT90X || CFG_TUSB_MCU == OPT_MCU_FT93X
   // FT9XX doesn't support a same endpoint number with different direction IN and OUT
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_AUDIO_IN    0x01
   #define EPNUM_AUDIO_OUT   0x02
 
+  #define EPNUM_CDC_NOTIF   0x83
+  #define EPNUM_CDC_OUT     0x04
+  #define EPNUM_CDC_IN      0x85
+
 #else
   #define EPNUM_AUDIO_IN    0x01
   #define EPNUM_AUDIO_OUT   0x01

From 4cb8b513af1c7b9fababba8c7b0af426e9c5e7d6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 3 Aug 2023 15:17:46 +0700
Subject: [PATCH 562/691] ide settings

---
 .idea/cmake.xml                       | 4 ++--
 .idea/runConfigurations/kl25.xml      | 2 +-
 .idea/runConfigurations/lpc1857.xml   | 2 +-
 .idea/runConfigurations/lpc4088.xml   | 2 +-
 .idea/runConfigurations/mcx947.xml    | 2 +-
 .idea/runConfigurations/nrf52840.xml  | 2 +-
 .idea/runConfigurations/nrf5340.xml   | 2 +-
 .idea/runConfigurations/rp2040.xml    | 2 +-
 .idea/runConfigurations/rt1010.xml    | 2 +-
 .idea/runConfigurations/rt1060.xml    | 2 +-
 .idea/runConfigurations/stlink.xml    | 2 +-
 .idea/runConfigurations/stm32g474.xml | 2 +-
 .idea/runConfigurations/stm32h743.xml | 2 +-
 13 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index a4f9d7f6d..15bfcd2ad 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -25,7 +25,7 @@
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
-      <configuration PROFILE_NAME="rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico -DLOG=2" />
+      <configuration PROFILE_NAME="rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico -DLOG=2 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="metro m7 1011" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1010_evk -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="rt1015 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1015_evk -DLOG=1" />
@@ -48,7 +48,7 @@
       <configuration PROFILE_NAME="ra6m1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m1_ek -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="ra6m5" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="rt1050 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1050_evkb -DLOG=1 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="ea4088 quickstart" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ea4088_quickstart -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="ea4088 quickstart" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ea4088_quickstart -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/.idea/runConfigurations/kl25.xml b/.idea/runConfigurations/kl25.xml
index 3052b440b..a08c20d44 100644
--- a/.idea/runConfigurations/kl25.xml
+++ b/.idea/runConfigurations/kl25.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="kl25" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MKL25Z128xxx4&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="kl25" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MKL25Z128xxx4&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/lpc1857.xml b/.idea/runConfigurations/lpc1857.xml
index f377d86f2..7525f51f7 100644
--- a/.idea/runConfigurations/lpc1857.xml
+++ b/.idea/runConfigurations/lpc1857.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="lpc1857" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;lpc1857&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="pca10056" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="lpc1857" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;lpc1857&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/lpc4088.xml b/.idea/runConfigurations/lpc4088.xml
index 89226ac30..7b32b2b85 100644
--- a/.idea/runConfigurations/lpc4088.xml
+++ b/.idea/runConfigurations/lpc4088.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="lpc4088" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;lpc4088&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="ea4088 quickstart" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="lpc4088" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;lpc4088&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/mcx947.xml b/.idea/runConfigurations/mcx947.xml
index 0e7e2befc..77dec59f8 100644
--- a/.idea/runConfigurations/mcx947.xml
+++ b/.idea/runConfigurations/mcx947.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="mcx947" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MCXN947_M33_0&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/mcx/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="metro m7" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="mcx947" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MCXN947_M33_0&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/mcx/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/nrf52840.xml b/.idea/runConfigurations/nrf52840.xml
index 66473cc0e..084669c39 100644
--- a/.idea/runConfigurations/nrf52840.xml
+++ b/.idea/runConfigurations/nrf52840.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="nrf52840" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;nrf52840_xxaa&quot; -if swd -speed 8000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="pca10056" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="nrf52840" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;nrf52840_xxaa&quot; -if swd -speed 8000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/nrf5340.xml b/.idea/runConfigurations/nrf5340.xml
index 403095d70..98fe39d80 100644
--- a/.idea/runConfigurations/nrf5340.xml
+++ b/.idea/runConfigurations/nrf5340.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="nrf5340" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;nrf5340_xxaa_app&quot; -if swd -speed 16000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="nrf5340" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;nrf5340_xxaa_app&quot; -if swd -speed 16000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/rp2040.xml b/.idea/runConfigurations/rp2040.xml
index 9b6111900..51ae689be 100644
--- a/.idea/runConfigurations/rp2040.xml
+++ b/.idea/runConfigurations/rp2040.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rp2040" type="com.jetbrains.cidr.embedded.openocd.conf.type" factoryName="com.jetbrains.cidr.embedded.openocd.conf.factory" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_device_examples" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_device_examples" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="rp2040" type="com.jetbrains.cidr.embedded.openocd.conf.type" factoryName="com.jetbrains.cidr.embedded.openocd.conf.factory" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <openocd version="1" gdb-port="3333" telnet-port="4444" board-config="$PROJECT_DIR$/hw/bsp/rp2040/rp2040-openocd.cfg" reset-type="INIT" download-type="UPDATED_ONLY">
       <debugger kind="GDB" isBundled="true" />
     </openocd>
diff --git a/.idea/runConfigurations/rt1010.xml b/.idea/runConfigurations/rt1010.xml
index a39f1f684..63df076b1 100644
--- a/.idea/runConfigurations/rt1010.xml
+++ b/.idea/runConfigurations/rt1010.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rt1010" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1011xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/imxrt/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="metro m7" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="rt1010" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1011xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/imxrt/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/rt1060.xml b/.idea/runConfigurations/rt1060.xml
index 218c2dfbc..147f197a2 100644
--- a/.idea/runConfigurations/rt1060.xml
+++ b/.idea/runConfigurations/rt1060.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rt1060" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1062xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" CONFIG_NAME="pca10056" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="rt1060" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1062xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/stlink.xml b/.idea/runConfigurations/stlink.xml
index c27392ca5..7e9166d90 100644
--- a/.idea/runConfigurations/stlink.xml
+++ b/.idea/runConfigurations/stlink.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="stlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-p 62847 -cp &quot;/opt/st/stm32cubeide_1.12.1/plugins/com.st.stm32cube.ide.mcu.externaltools.cubeprogrammer.linux64_2.0.600.202301161003/tools/bin&quot; --frequency 24000 --swd" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="stlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-p 62847 -cp &quot;/opt/st/stm32cubeide_1.12.1/plugins/com.st.stm32cube.ide.mcu.externaltools.cubeprogrammer.linux64_2.0.600.202301161003/tools/bin&quot; --frequency 24000 --swd" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::62847" executable="/opt/st/stm32cubeide_1.12.1/plugins/com.st.stm32cube.ide.mcu.externaltools.stlink-gdb-server.linux64_2.0.500.202301161003/tools/bin/ST-LINK_gdbserver" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/stm32g474.xml b/.idea/runConfigurations/stm32g474.xml
index 6076320b5..2e4c4b82a 100644
--- a/.idea/runConfigurations/stm32g474.xml
+++ b/.idea/runConfigurations/stm32g474.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="stm32g474" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;stm32g474re&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="stm32g474" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;stm32g474re&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/stm32h743.xml b/.idea/runConfigurations/stm32h743.xml
index 7581ddf9b..f0ab6e9e7 100644
--- a/.idea/runConfigurations/stm32h743.xml
+++ b/.idea/runConfigurations/stm32h743.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="stm32h743" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;stm32h743xi&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="stm32h743" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;stm32h743xi&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>

From 4493b838d946a5cc209c92e4e55e63ff2e8534e5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 3 Aug 2023 15:35:01 +0700
Subject: [PATCH 563/691] rename ch32v307 and tm4c123 to use underscore

---
 .../boards/{ch32v307v-r1-1v0 => ch32v307v_r1_1v0}/board.h         | 0
 .../boards/{ch32v307v-r1-1v0 => ch32v307v_r1_1v0}/board.mk        | 0
 .../boards/{ch32v307v-r1-1v0 => ch32v307v_r1_1v0}/debug_uart.c    | 0
 .../boards/{ch32v307v-r1-1v0 => ch32v307v_r1_1v0}/debug_uart.h    | 0
 hw/bsp/tm4c123/boards/{ek-tm4c123gxl => ek_tm4c123gxl}/board.h    | 0
 hw/bsp/tm4c123/boards/{ek-tm4c123gxl => ek_tm4c123gxl}/board.mk   | 0
 hw/bsp/tm4c123/boards/{ek-tm4c123gxl => ek_tm4c123gxl}/tm4c123.ld | 0
 7 files changed, 0 insertions(+), 0 deletions(-)
 rename hw/bsp/ch32v307/boards/{ch32v307v-r1-1v0 => ch32v307v_r1_1v0}/board.h (100%)
 rename hw/bsp/ch32v307/boards/{ch32v307v-r1-1v0 => ch32v307v_r1_1v0}/board.mk (100%)
 rename hw/bsp/ch32v307/boards/{ch32v307v-r1-1v0 => ch32v307v_r1_1v0}/debug_uart.c (100%)
 rename hw/bsp/ch32v307/boards/{ch32v307v-r1-1v0 => ch32v307v_r1_1v0}/debug_uart.h (100%)
 rename hw/bsp/tm4c123/boards/{ek-tm4c123gxl => ek_tm4c123gxl}/board.h (100%)
 rename hw/bsp/tm4c123/boards/{ek-tm4c123gxl => ek_tm4c123gxl}/board.mk (100%)
 rename hw/bsp/tm4c123/boards/{ek-tm4c123gxl => ek_tm4c123gxl}/tm4c123.ld (100%)

diff --git a/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/board.h b/hw/bsp/ch32v307/boards/ch32v307v_r1_1v0/board.h
similarity index 100%
rename from hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/board.h
rename to hw/bsp/ch32v307/boards/ch32v307v_r1_1v0/board.h
diff --git a/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/board.mk b/hw/bsp/ch32v307/boards/ch32v307v_r1_1v0/board.mk
similarity index 100%
rename from hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/board.mk
rename to hw/bsp/ch32v307/boards/ch32v307v_r1_1v0/board.mk
diff --git a/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/debug_uart.c b/hw/bsp/ch32v307/boards/ch32v307v_r1_1v0/debug_uart.c
similarity index 100%
rename from hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/debug_uart.c
rename to hw/bsp/ch32v307/boards/ch32v307v_r1_1v0/debug_uart.c
diff --git a/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/debug_uart.h b/hw/bsp/ch32v307/boards/ch32v307v_r1_1v0/debug_uart.h
similarity index 100%
rename from hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/debug_uart.h
rename to hw/bsp/ch32v307/boards/ch32v307v_r1_1v0/debug_uart.h
diff --git a/hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.h b/hw/bsp/tm4c123/boards/ek_tm4c123gxl/board.h
similarity index 100%
rename from hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.h
rename to hw/bsp/tm4c123/boards/ek_tm4c123gxl/board.h
diff --git a/hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.mk b/hw/bsp/tm4c123/boards/ek_tm4c123gxl/board.mk
similarity index 100%
rename from hw/bsp/tm4c123/boards/ek-tm4c123gxl/board.mk
rename to hw/bsp/tm4c123/boards/ek_tm4c123gxl/board.mk
diff --git a/hw/bsp/tm4c123/boards/ek-tm4c123gxl/tm4c123.ld b/hw/bsp/tm4c123/boards/ek_tm4c123gxl/tm4c123.ld
similarity index 100%
rename from hw/bsp/tm4c123/boards/ek-tm4c123gxl/tm4c123.ld
rename to hw/bsp/tm4c123/boards/ek_tm4c123gxl/tm4c123.ld

From cf91660cee0863291fd9412a3623df018e8bd071 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 3 Aug 2023 15:44:05 +0700
Subject: [PATCH 564/691] rename hw/bsp/board.h to board_api.h

---
 examples/device/audio_4_channel_mic/src/main.c           | 2 +-
 examples/device/audio_test/src/main.c                    | 2 +-
 examples/device/audio_test_multi_rate/src/main.c         | 2 +-
 examples/device/board_test/src/main.c                    | 2 +-
 examples/device/cdc_dual_ports/src/main.c                | 2 +-
 examples/device/cdc_msc/src/main.c                       | 2 +-
 examples/device/cdc_msc/src/msc_disk.c                   | 2 +-
 examples/device/cdc_msc_freertos/src/main.c              | 2 +-
 examples/device/cdc_msc_freertos/src/msc_disk.c          | 2 +-
 examples/device/cdc_uac2/src/cdc_app.c                   | 2 +-
 examples/device/cdc_uac2/src/main.c                      | 2 +-
 examples/device/cdc_uac2/src/uac2_app.c                  | 2 +-
 examples/device/dfu/src/main.c                           | 2 +-
 examples/device/dfu_runtime/src/main.c                   | 2 +-
 examples/device/dynamic_configuration/src/main.c         | 2 +-
 examples/device/dynamic_configuration/src/msc_disk.c     | 2 +-
 .../device/dynamic_configuration/src/usb_descriptors.c   | 2 +-
 examples/device/hid_composite/src/main.c                 | 2 +-
 examples/device/hid_composite_freertos/src/main.c        | 2 +-
 examples/device/hid_generic_inout/src/main.c             | 2 +-
 examples/device/hid_multiple_interface/src/main.c        | 2 +-
 examples/device/midi_test/src/main.c                     | 2 +-
 examples/device/msc_dual_lun/src/main.c                  | 2 +-
 examples/device/msc_dual_lun/src/msc_disk_dual.c         | 2 +-
 examples/device/net_lwip_webserver/src/main.c            | 2 +-
 examples/device/uac2_headset/src/main.c                  | 2 +-
 examples/device/usbtmc/src/main.c                        | 2 +-
 examples/device/usbtmc/src/usbtmc_app.c                  | 2 +-
 examples/device/video_capture/src/main.c                 | 2 +-
 examples/device/webusb_serial/src/main.c                 | 2 +-
 examples/dual/host_hid_to_device_cdc/src/main.c          | 2 +-
 examples/host/bare_api/src/main.c                        | 2 +-
 examples/host/cdc_msc_hid/src/cdc_app.c                  | 2 +-
 examples/host/cdc_msc_hid/src/hid_app.c                  | 2 +-
 examples/host/cdc_msc_hid/src/main.c                     | 2 +-
 examples/host/hid_controller/src/hid_app.c               | 2 +-
 examples/host/hid_controller/src/main.c                  | 2 +-
 examples/host/msc_file_explorer/src/main.c               | 2 +-
 examples/host/msc_file_explorer/src/msc_app.c            | 2 +-
 hw/bsp/board.c                                           | 2 +-
 hw/bsp/{board.h => board_api.h}                          | 9 +--------
 hw/bsp/ea4357/ea4357.c                                   | 2 +-
 hw/bsp/fomu/fomu.c                                       | 2 +-
 hw/bsp/gd32vf103/family.c                                | 2 +-
 hw/bsp/ngx4330/ngx4330.c                                 | 2 +-
 hw/bsp/rp2040/family.c                                   | 2 +-
 hw/bsp/sltb009a/sltb009a.c                               | 2 +-
 hw/bsp/stm32l4/family.c                                  | 2 +-
 48 files changed, 48 insertions(+), 55 deletions(-)
 rename hw/bsp/{board.h => board_api.h} (96%)

diff --git a/examples/device/audio_4_channel_mic/src/main.c b/examples/device/audio_4_channel_mic/src/main.c
index 2b9c5143d..0336f0ef0 100644
--- a/examples/device/audio_4_channel_mic/src/main.c
+++ b/examples/device/audio_4_channel_mic/src/main.c
@@ -35,7 +35,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/audio_test/src/main.c b/examples/device/audio_test/src/main.c
index b5ca41d36..9910b496f 100644
--- a/examples/device/audio_test/src/main.c
+++ b/examples/device/audio_test/src/main.c
@@ -35,7 +35,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/audio_test_multi_rate/src/main.c b/examples/device/audio_test_multi_rate/src/main.c
index 078e783eb..9715ff761 100644
--- a/examples/device/audio_test_multi_rate/src/main.c
+++ b/examples/device/audio_test_multi_rate/src/main.c
@@ -36,7 +36,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "usb_descriptors.h"
 
diff --git a/examples/device/board_test/src/main.c b/examples/device/board_test/src/main.c
index b11f6f2bb..0a134a2e6 100644
--- a/examples/device/board_test/src/main.c
+++ b/examples/device/board_test/src/main.c
@@ -27,7 +27,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF PROTOTYPES
diff --git a/examples/device/cdc_dual_ports/src/main.c b/examples/device/cdc_dual_ports/src/main.c
index 70eaea85d..5645a953c 100644
--- a/examples/device/cdc_dual_ports/src/main.c
+++ b/examples/device/cdc_dual_ports/src/main.c
@@ -28,7 +28,7 @@
 #include <string.h>
 #include <ctype.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 //------------- prototypes -------------//
diff --git a/examples/device/cdc_msc/src/main.c b/examples/device/cdc_msc/src/main.c
index 6dad73cbf..fa303e061 100644
--- a/examples/device/cdc_msc/src/main.c
+++ b/examples/device/cdc_msc/src/main.c
@@ -27,7 +27,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/cdc_msc/src/msc_disk.c b/examples/device/cdc_msc/src/msc_disk.c
index f8f37a577..d2f8628f1 100644
--- a/examples/device/cdc_msc/src/msc_disk.c
+++ b/examples/device/cdc_msc/src/msc_disk.c
@@ -23,7 +23,7 @@
  *
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 #if CFG_TUD_MSC
diff --git a/examples/device/cdc_msc_freertos/src/main.c b/examples/device/cdc_msc_freertos/src/main.c
index 0e8a24d02..fa26771d5 100644
--- a/examples/device/cdc_msc_freertos/src/main.c
+++ b/examples/device/cdc_msc_freertos/src/main.c
@@ -27,7 +27,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 #if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
diff --git a/examples/device/cdc_msc_freertos/src/msc_disk.c b/examples/device/cdc_msc_freertos/src/msc_disk.c
index 707c8d578..9520dfec1 100644
--- a/examples/device/cdc_msc_freertos/src/msc_disk.c
+++ b/examples/device/cdc_msc_freertos/src/msc_disk.c
@@ -23,7 +23,7 @@
  *
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 #if CFG_TUD_MSC
diff --git a/examples/device/cdc_uac2/src/cdc_app.c b/examples/device/cdc_uac2/src/cdc_app.c
index a95f638d9..2166c1d6b 100644
--- a/examples/device/cdc_uac2/src/cdc_app.c
+++ b/examples/device/cdc_uac2/src/cdc_app.c
@@ -24,7 +24,7 @@
  *
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "common.h"
 
diff --git a/examples/device/cdc_uac2/src/main.c b/examples/device/cdc_uac2/src/main.c
index 68352338e..7afa96c1a 100644
--- a/examples/device/cdc_uac2/src/main.c
+++ b/examples/device/cdc_uac2/src/main.c
@@ -28,7 +28,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "common.h"
 
diff --git a/examples/device/cdc_uac2/src/uac2_app.c b/examples/device/cdc_uac2/src/uac2_app.c
index 33dc33122..98659ea68 100644
--- a/examples/device/cdc_uac2/src/uac2_app.c
+++ b/examples/device/cdc_uac2/src/uac2_app.c
@@ -27,7 +27,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "usb_descriptors.h"
 #include "common.h"
diff --git a/examples/device/dfu/src/main.c b/examples/device/dfu/src/main.c
index 5f37f25e1..ab9697a87 100644
--- a/examples/device/dfu/src/main.c
+++ b/examples/device/dfu/src/main.c
@@ -42,7 +42,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/dfu_runtime/src/main.c b/examples/device/dfu_runtime/src/main.c
index 4ec3cb188..85b51449e 100644
--- a/examples/device/dfu_runtime/src/main.c
+++ b/examples/device/dfu_runtime/src/main.c
@@ -40,7 +40,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/dynamic_configuration/src/main.c b/examples/device/dynamic_configuration/src/main.c
index 578f01d8c..4e80ef9c4 100644
--- a/examples/device/dynamic_configuration/src/main.c
+++ b/examples/device/dynamic_configuration/src/main.c
@@ -27,7 +27,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/dynamic_configuration/src/msc_disk.c b/examples/device/dynamic_configuration/src/msc_disk.c
index 27856a1a4..10c3ac6fe 100644
--- a/examples/device/dynamic_configuration/src/msc_disk.c
+++ b/examples/device/dynamic_configuration/src/msc_disk.c
@@ -23,7 +23,7 @@
  *
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 #if CFG_TUD_MSC
diff --git a/examples/device/dynamic_configuration/src/usb_descriptors.c b/examples/device/dynamic_configuration/src/usb_descriptors.c
index 71348abef..039c7636c 100644
--- a/examples/device/dynamic_configuration/src/usb_descriptors.c
+++ b/examples/device/dynamic_configuration/src/usb_descriptors.c
@@ -24,7 +24,7 @@
  */
 
 #include "tusb.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 
 /* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
  * Same VID/PID with different interface e.g MSC (first), then CDC (later) will possibly cause system error on PC.
diff --git a/examples/device/hid_composite/src/main.c b/examples/device/hid_composite/src/main.c
index 8d0e6bece..94e43df17 100644
--- a/examples/device/hid_composite/src/main.c
+++ b/examples/device/hid_composite/src/main.c
@@ -27,7 +27,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 #include "usb_descriptors.h"
diff --git a/examples/device/hid_composite_freertos/src/main.c b/examples/device/hid_composite_freertos/src/main.c
index ca02af100..1241f8edb 100644
--- a/examples/device/hid_composite_freertos/src/main.c
+++ b/examples/device/hid_composite_freertos/src/main.c
@@ -27,7 +27,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "usb_descriptors.h"
 
diff --git a/examples/device/hid_generic_inout/src/main.c b/examples/device/hid_generic_inout/src/main.c
index 5db8f5581..55d6bbf21 100644
--- a/examples/device/hid_generic_inout/src/main.c
+++ b/examples/device/hid_generic_inout/src/main.c
@@ -27,7 +27,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 /* This example demonstrate HID Generic raw Input & Output.
diff --git a/examples/device/hid_multiple_interface/src/main.c b/examples/device/hid_multiple_interface/src/main.c
index 72240b208..dc5d3d7cc 100644
--- a/examples/device/hid_multiple_interface/src/main.c
+++ b/examples/device/hid_multiple_interface/src/main.c
@@ -27,7 +27,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/midi_test/src/main.c b/examples/device/midi_test/src/main.c
index 2c3e9d954..734a0dae4 100644
--- a/examples/device/midi_test/src/main.c
+++ b/examples/device/midi_test/src/main.c
@@ -27,7 +27,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 /* This MIDI example send sequence of note (on/off) repeatedly. To test on PC, you need to install
diff --git a/examples/device/msc_dual_lun/src/main.c b/examples/device/msc_dual_lun/src/main.c
index c7f6de7bf..38b658332 100644
--- a/examples/device/msc_dual_lun/src/main.c
+++ b/examples/device/msc_dual_lun/src/main.c
@@ -27,7 +27,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/msc_dual_lun/src/msc_disk_dual.c b/examples/device/msc_dual_lun/src/msc_disk_dual.c
index b1047acdb..4f0f6410f 100644
--- a/examples/device/msc_dual_lun/src/msc_disk_dual.c
+++ b/examples/device/msc_dual_lun/src/msc_disk_dual.c
@@ -23,7 +23,7 @@
  *
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 #if CFG_TUD_MSC
diff --git a/examples/device/net_lwip_webserver/src/main.c b/examples/device/net_lwip_webserver/src/main.c
index 19a0eae9d..2e432232e 100644
--- a/examples/device/net_lwip_webserver/src/main.c
+++ b/examples/device/net_lwip_webserver/src/main.c
@@ -43,7 +43,7 @@ The smartphone may be artificially picky about which Ethernet MAC address to rec
 try changing the first byte of tud_network_mac_address[] below from 0x02 to 0x00 (clearing bit 1).
 */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 #include "dhserver.h"
diff --git a/examples/device/uac2_headset/src/main.c b/examples/device/uac2_headset/src/main.c
index 19a3f7bae..245370bb3 100644
--- a/examples/device/uac2_headset/src/main.c
+++ b/examples/device/uac2_headset/src/main.c
@@ -26,7 +26,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "usb_descriptors.h"
 
diff --git a/examples/device/usbtmc/src/main.c b/examples/device/usbtmc/src/main.c
index 2bba336f1..71f352905 100644
--- a/examples/device/usbtmc/src/main.c
+++ b/examples/device/usbtmc/src/main.c
@@ -27,7 +27,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "usbtmc_app.h"
 //--------------------------------------------------------------------+
diff --git a/examples/device/usbtmc/src/usbtmc_app.c b/examples/device/usbtmc/src/usbtmc_app.c
index 72989b4fe..fb25982c7 100644
--- a/examples/device/usbtmc/src/usbtmc_app.c
+++ b/examples/device/usbtmc/src/usbtmc_app.c
@@ -26,7 +26,7 @@
 #include <string.h>
 #include <stdlib.h>     /* atoi */
 #include "tusb.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "main.h"
 
 #if (CFG_TUD_USBTMC_ENABLE_488)
diff --git a/examples/device/video_capture/src/main.c b/examples/device/video_capture/src/main.c
index 5654e0b61..589fc448c 100644
--- a/examples/device/video_capture/src/main.c
+++ b/examples/device/video_capture/src/main.c
@@ -27,7 +27,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "usb_descriptors.h"
 
diff --git a/examples/device/webusb_serial/src/main.c b/examples/device/webusb_serial/src/main.c
index eaca78c73..675c593dd 100644
--- a/examples/device/webusb_serial/src/main.c
+++ b/examples/device/webusb_serial/src/main.c
@@ -47,7 +47,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "usb_descriptors.h"
 
diff --git a/examples/dual/host_hid_to_device_cdc/src/main.c b/examples/dual/host_hid_to_device_cdc/src/main.c
index 817c63c70..74f0a2a41 100644
--- a/examples/dual/host_hid_to_device_cdc/src/main.c
+++ b/examples/dual/host_hid_to_device_cdc/src/main.c
@@ -30,7 +30,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 //--------------------------------------------------------------------+
diff --git a/examples/host/bare_api/src/main.c b/examples/host/bare_api/src/main.c
index bb7fa850e..a50fd33b5 100644
--- a/examples/host/bare_api/src/main.c
+++ b/examples/host/bare_api/src/main.c
@@ -32,7 +32,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 // English
diff --git a/examples/host/cdc_msc_hid/src/cdc_app.c b/examples/host/cdc_msc_hid/src/cdc_app.c
index 7769d109e..a1b26e49c 100644
--- a/examples/host/cdc_msc_hid/src/cdc_app.c
+++ b/examples/host/cdc_msc_hid/src/cdc_app.c
@@ -25,7 +25,7 @@
  */
 
 #include "tusb.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM DECLARATION
diff --git a/examples/host/cdc_msc_hid/src/hid_app.c b/examples/host/cdc_msc_hid/src/hid_app.c
index 87e110ab2..7727ee62c 100644
--- a/examples/host/cdc_msc_hid/src/hid_app.c
+++ b/examples/host/cdc_msc_hid/src/hid_app.c
@@ -23,7 +23,7 @@
  *
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 //--------------------------------------------------------------------+
diff --git a/examples/host/cdc_msc_hid/src/main.c b/examples/host/cdc_msc_hid/src/main.c
index 1f4acb822..3d2567849 100644
--- a/examples/host/cdc_msc_hid/src/main.c
+++ b/examples/host/cdc_msc_hid/src/main.c
@@ -27,7 +27,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 //--------------------------------------------------------------------+
diff --git a/examples/host/hid_controller/src/hid_app.c b/examples/host/hid_controller/src/hid_app.c
index 76de97b41..bff830ca2 100644
--- a/examples/host/hid_controller/src/hid_app.c
+++ b/examples/host/hid_controller/src/hid_app.c
@@ -23,7 +23,7 @@
  *
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 /* From https://www.kernel.org/doc/html/latest/input/gamepad.html
diff --git a/examples/host/hid_controller/src/main.c b/examples/host/hid_controller/src/main.c
index 4dcc92587..f4f6bda28 100644
--- a/examples/host/hid_controller/src/main.c
+++ b/examples/host/hid_controller/src/main.c
@@ -32,7 +32,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 //--------------------------------------------------------------------+
diff --git a/examples/host/msc_file_explorer/src/main.c b/examples/host/msc_file_explorer/src/main.c
index 7b1c2ef27..ced6e01a9 100644
--- a/examples/host/msc_file_explorer/src/main.c
+++ b/examples/host/msc_file_explorer/src/main.c
@@ -59,7 +59,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 //--------------------------------------------------------------------+
diff --git a/examples/host/msc_file_explorer/src/msc_app.c b/examples/host/msc_file_explorer/src/msc_app.c
index 003e2865b..323dfb9e7 100644
--- a/examples/host/msc_file_explorer/src/msc_app.c
+++ b/examples/host/msc_file_explorer/src/msc_app.c
@@ -25,7 +25,7 @@
 
 #include <ctype.h>
 #include "tusb.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 
 #include "ff.h"
 #include "diskio.h"
diff --git a/hw/bsp/board.c b/hw/bsp/board.c
index 7804a18e0..417630a03 100644
--- a/hw/bsp/board.c
+++ b/hw/bsp/board.c
@@ -23,7 +23,7 @@
  *
  */
 
-#include "board.h"
+#include "board_api.h"
 
 //--------------------------------------------------------------------+
 // newlib read()/write() retarget
diff --git a/hw/bsp/board.h b/hw/bsp/board_api.h
similarity index 96%
rename from hw/bsp/board.h
rename to hw/bsp/board_api.h
index 036556731..32b10d06b 100644
--- a/hw/bsp/board.h
+++ b/hw/bsp/board_api.h
@@ -24,10 +24,6 @@
  * This file is part of the TinyUSB stack.
  */
 
-/** \ingroup group_demo
- * \defgroup group_board Boards Abstraction Layer
- *  @{ */
-
 #ifndef _BSP_BOARD_H_
 #define _BSP_BOARD_H_
 
@@ -38,7 +34,6 @@
 #include <stdint.h>
 #include <stdbool.h>
 
-#include "ansi_escape.h"
 #include "tusb.h"
 
 // Define the default baudrate
@@ -139,6 +134,4 @@ int board_getchar(void);
  }
 #endif
 
-#endif /* _BSP_BOARD_H_ */
-
-/** @} */
+#endif
diff --git a/hw/bsp/ea4357/ea4357.c b/hw/bsp/ea4357/ea4357.c
index 68bcaa123..06975b8cc 100644
--- a/hw/bsp/ea4357/ea4357.c
+++ b/hw/bsp/ea4357/ea4357.c
@@ -25,7 +25,7 @@
  */
 
 #include "chip.h"
-#include "../board.h"
+#include "../board_api.h"
 #include "pca9532.h"
 
 #define UART_DEV        LPC_USART0
diff --git a/hw/bsp/fomu/fomu.c b/hw/bsp/fomu/fomu.c
index e079e7c5b..d155b743d 100644
--- a/hw/bsp/fomu/fomu.c
+++ b/hw/bsp/fomu/fomu.c
@@ -26,7 +26,7 @@
 
 #include <stdint.h>
 #include <stdbool.h>
-#include "../board.h"
+#include "../board_api.h"
 #include "csr.h"
 #include "irq.h"
 
diff --git a/hw/bsp/gd32vf103/family.c b/hw/bsp/gd32vf103/family.c
index 113c4c304..27d7e87bb 100644
--- a/hw/bsp/gd32vf103/family.c
+++ b/hw/bsp/gd32vf103/family.c
@@ -28,7 +28,7 @@
 #include "drv_usb_hw.h"
 #include "drv_usb_dev.h"
 
-#include "../board.h"
+#include "../board_api.h"
 
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
diff --git a/hw/bsp/ngx4330/ngx4330.c b/hw/bsp/ngx4330/ngx4330.c
index d61f775c7..a767d5f29 100644
--- a/hw/bsp/ngx4330/ngx4330.c
+++ b/hw/bsp/ngx4330/ngx4330.c
@@ -25,7 +25,7 @@
  */
 
 #include "chip.h"
-#include "../board.h"
+#include "../board_api.h"
 
 #define LED_PORT              1
 #define LED_PIN               12
diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index 40e3f11cd..be5e9f753 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -32,7 +32,7 @@
 #include "hardware/structs/ioqspi.h"
 #include "hardware/structs/sio.h"
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 #if CFG_TUH_RPI_PIO_USB || CFG_TUD_RPI_PIO_USB
diff --git a/hw/bsp/sltb009a/sltb009a.c b/hw/bsp/sltb009a/sltb009a.c
index 2a5d112a8..23ef6d7cd 100644
--- a/hw/bsp/sltb009a/sltb009a.c
+++ b/hw/bsp/sltb009a/sltb009a.c
@@ -25,7 +25,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "../board.h"
+#include "../board_api.h"
 
 #include "em_device.h"
 
diff --git a/hw/bsp/stm32l4/family.c b/hw/bsp/stm32l4/family.c
index d661613af..0b2c22d19 100644
--- a/hw/bsp/stm32l4/family.c
+++ b/hw/bsp/stm32l4/family.c
@@ -27,7 +27,7 @@
  */
 
 #include "stm32l4xx_hal.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 //--------------------------------------------------------------------+

From a5768f52b492f7a2ee32f3b786c12532d0876f01 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 3 Aug 2023 15:50:52 +0700
Subject: [PATCH 565/691] more board_api.h rename

---
 hw/bsp/board_api.h                            | 58 ++++++++-----------
 hw/bsp/broadcom_32bit/family.c                |  2 +-
 hw/bsp/broadcom_64bit/family.c                |  2 +-
 hw/bsp/brtmm90x/family.c                      |  2 +-
 hw/bsp/ch32v307/family.c                      |  2 +-
 hw/bsp/da14695_dk_usb/da14695_dk_usb.c        |  2 +-
 hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c        |  2 +-
 hw/bsp/espressif/boards/family.c              |  2 +-
 hw/bsp/f1c100s/f1c100s.c                      |  2 +-
 hw/bsp/imxrt/family.c                         |  2 +-
 .../boards/frdm_k32l2a4s/frdm_k32l2a4s.c      |  2 +-
 .../boards/frdm_k32l2b/frdm_k32l2b.c          |  2 +-
 hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.c     |  2 +-
 hw/bsp/kinetis_kl/family.c                    |  2 +-
 .../boards/lpcxpresso11u37/lpcxpresso11u37.c  |  2 +-
 .../boards/lpcxpresso11u68/lpcxpresso11u68.c  |  2 +-
 hw/bsp/lpc15/family.c                         |  2 +-
 hw/bsp/lpc18/family.c                         |  2 +-
 hw/bsp/lpc40/family.c                         |  2 +-
 hw/bsp/lpc54/family.c                         |  2 +-
 hw/bsp/lpc55/family.c                         |  2 +-
 hw/bsp/mcx/family.c                           |  2 +-
 hw/bsp/msp430/family.c                        |  2 +-
 hw/bsp/msp432e4/family.c                      |  2 +-
 hw/bsp/nrf/family.c                           |  2 +-
 hw/bsp/nutiny_nuc121s/nutiny_nuc121.c         |  2 +-
 hw/bsp/nutiny_nuc125s/nutiny_nuc125.c         |  2 +-
 hw/bsp/nutiny_nuc126v/nutiny_nuc126.c         |  2 +-
 hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c  |  2 +-
 hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c  |  2 +-
 hw/bsp/ra/family.c                            |  2 +-
 hw/bsp/rx/boards/gr_citrus/gr_citrus.c        |  2 +-
 hw/bsp/rx/boards/rx65n_target/rx65n_target.c  |  2 +-
 hw/bsp/samd11/family.c                        |  2 +-
 hw/bsp/samd21/family.c                        |  2 +-
 hw/bsp/samd51/family.c                        |  2 +-
 hw/bsp/same5x/boards/d5035_01/d5035_01.c      |  2 +-
 .../boards/same54_xplained/same54_xplained.c  |  2 +-
 hw/bsp/same70_qmtech/same70_qmtech.c          |  2 +-
 hw/bsp/same70_xplained/same70_xplained.c      |  2 +-
 hw/bsp/samg55xplained/samg55xplained.c        |  2 +-
 hw/bsp/saml2x/family.c                        |  2 +-
 hw/bsp/spresense/board_spresense.c            |  2 +-
 hw/bsp/stm32f0/family.c                       |  2 +-
 hw/bsp/stm32f1/family.c                       |  2 +-
 .../boards/stm32f207nucleo/stm32f207nucleo.c  |  2 +-
 hw/bsp/stm32f4/family.c                       |  2 +-
 hw/bsp/stm32f7/family.c                       |  2 +-
 hw/bsp/stm32g0/family.c                       |  2 +-
 hw/bsp/stm32g4/family.c                       |  2 +-
 hw/bsp/stm32h7/family.c                       |  2 +-
 hw/bsp/stm32l0/family.c                       |  2 +-
 hw/bsp/stm32u5/family.c                       |  2 +-
 hw/bsp/stm32wb/family.c                       |  2 +-
 hw/bsp/tm4c123/family.c                       |  2 +-
 hw/bsp/xmc4000/family.c                       |  2 +-
 56 files changed, 80 insertions(+), 88 deletions(-)

diff --git a/hw/bsp/board_api.h b/hw/bsp/board_api.h
index 32b10d06b..a7f3826d1 100644
--- a/hw/bsp/board_api.h
+++ b/hw/bsp/board_api.h
@@ -24,11 +24,11 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _BSP_BOARD_H_
-#define _BSP_BOARD_H_
+#ifndef _BOARD_API_H_
+#define _BOARD_API_H_
 
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 #include <stdint.h>
@@ -62,40 +62,36 @@ uint32_t board_button_read(void);
 
 // Get characters from UART
 // Return number of read bytes
-int board_uart_read(uint8_t* buf, int len);
+int board_uart_read(uint8_t *buf, int len);
 
 // Send characters to UART
 // Return number of sent bytes
-int board_uart_write(void const * buf, int len);
+int board_uart_write(void const *buf, int len);
 
 #if CFG_TUSB_OS == OPT_OS_NONE
-  // Get current milliseconds, must be implemented when no RTOS is used
-  uint32_t board_millis(void);
+// Get current milliseconds, must be implemented when no RTOS is used
+uint32_t board_millis(void);
 
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
-  static inline uint32_t board_millis(void)
-  {
-    return ( ( ((uint64_t) xTaskGetTickCount()) * 1000) / configTICK_RATE_HZ );
-  }
+static inline uint32_t board_millis(void) {
+  return ( ( ((uint64_t) xTaskGetTickCount()) * 1000) / configTICK_RATE_HZ );
+}
 
 #elif CFG_TUSB_OS == OPT_OS_MYNEWT
-  static inline uint32_t board_millis(void)
-  {
-    return os_time_ticks_to_ms32( os_time_get() );
-  }
+static inline uint32_t board_millis(void) {
+  return os_time_ticks_to_ms32( os_time_get() );
+}
 
 #elif CFG_TUSB_OS == OPT_OS_PICO
-  #include "pico/time.h"
-  static inline uint32_t board_millis(void)
-  {
-    return to_ms_since_boot(get_absolute_time());
-  }
+#include "pico/time.h"
+static inline uint32_t board_millis(void) {
+  return to_ms_since_boot(get_absolute_time());
+}
 
 #elif CFG_TUSB_OS == OPT_OS_RTTHREAD
-  static inline uint32_t board_millis(void)
-  {
-    return (((uint64_t)rt_tick_get()) * 1000 / RT_TICK_PER_SECOND);
-  }
+static inline uint32_t board_millis(void) {
+  return (((uint64_t)rt_tick_get()) * 1000 / RT_TICK_PER_SECOND);
+}
 
 #else
   #error "board_millis() is not implemented for this OS"
@@ -104,22 +100,18 @@ int board_uart_write(void const * buf, int len);
 //--------------------------------------------------------------------+
 // Helper functions
 //--------------------------------------------------------------------+
-static inline void board_led_on(void)
-{
+static inline void board_led_on(void) {
   board_led_write(true);
 }
 
-static inline void board_led_off(void)
-{
+static inline void board_led_off(void) {
   board_led_write(false);
 }
 
 // TODO remove
-static inline void board_delay(uint32_t ms)
-{
+static inline void board_delay(uint32_t ms) {
   uint32_t start_ms = board_millis();
-  while (board_millis() - start_ms < ms)
-  {
+  while ( board_millis() - start_ms < ms ) {
     #if CFG_TUD_ENABLED
     // take chance to run usb background
     tud_task();
@@ -131,7 +123,7 @@ static inline void board_delay(uint32_t ms)
 int board_getchar(void);
 
 #ifdef __cplusplus
- }
+}
 #endif
 
 #endif
diff --git a/hw/bsp/broadcom_32bit/family.c b/hw/bsp/broadcom_32bit/family.c
index 42ad4b666..664b4dcaf 100644
--- a/hw/bsp/broadcom_32bit/family.c
+++ b/hw/bsp/broadcom_32bit/family.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 #include "broadcom/cpu.h"
diff --git a/hw/bsp/broadcom_64bit/family.c b/hw/bsp/broadcom_64bit/family.c
index 42ad4b666..664b4dcaf 100644
--- a/hw/bsp/broadcom_64bit/family.c
+++ b/hw/bsp/broadcom_64bit/family.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 #include "broadcom/cpu.h"
diff --git a/hw/bsp/brtmm90x/family.c b/hw/bsp/brtmm90x/family.c
index f812c922f..4d81e7d52 100644
--- a/hw/bsp/brtmm90x/family.c
+++ b/hw/bsp/brtmm90x/family.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 #include <ft900.h>
diff --git a/hw/bsp/ch32v307/family.c b/hw/bsp/ch32v307/family.c
index d5602c7b4..245fa5674 100644
--- a/hw/bsp/ch32v307/family.c
+++ b/hw/bsp/ch32v307/family.c
@@ -28,7 +28,7 @@
 #include "debug_uart.h"
 #include "ch32v30x.h"
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/da14695_dk_usb/da14695_dk_usb.c b/hw/bsp/da14695_dk_usb/da14695_dk_usb.c
index 3abb488f2..667b83de3 100644
--- a/hw/bsp/da14695_dk_usb/da14695_dk_usb.c
+++ b/hw/bsp/da14695_dk_usb/da14695_dk_usb.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include <hal/hal_gpio.h>
 #include <mcu/mcu.h>
 
diff --git a/hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c b/hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c
index abe7f54cb..21bd62714 100644
--- a/hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c
+++ b/hw/bsp/da1469x_dk_pro/da1469x-dk-pro.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include <hal/hal_gpio.h>
 #include <mcu/mcu.h>
 
diff --git a/hw/bsp/espressif/boards/family.c b/hw/bsp/espressif/boards/family.c
index 8fc4a1cc8..8f857fb71 100644
--- a/hw/bsp/espressif/boards/family.c
+++ b/hw/bsp/espressif/boards/family.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 #include "esp_rom_gpio.h"
diff --git a/hw/bsp/f1c100s/f1c100s.c b/hw/bsp/f1c100s/f1c100s.c
index 5dcae33f7..272b756f2 100644
--- a/hw/bsp/f1c100s/f1c100s.c
+++ b/hw/bsp/f1c100s/f1c100s.c
@@ -28,7 +28,7 @@
 #include <malloc.h>
 #include <irqflags.h>
 #include <f1c100s-irq.h>
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 extern void sys_uart_putc(char c);
diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c
index bfab1d496..ec95a8b24 100644
--- a/hw/bsp/imxrt/family.c
+++ b/hw/bsp/imxrt/family.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 // Suppress warning caused by mcu driver
diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/frdm_k32l2a4s.c b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/frdm_k32l2a4s.c
index 80830163b..39783b7e1 100644
--- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/frdm_k32l2a4s.c
+++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/frdm_k32l2a4s.c
@@ -25,7 +25,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 #include "fsl_gpio.h"
 #include "fsl_port.h"
diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/frdm_k32l2b.c b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/frdm_k32l2b.c
index 1566b4e2e..3f99b0cbd 100644
--- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/frdm_k32l2b.c
+++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/frdm_k32l2b.c
@@ -25,7 +25,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 #include "fsl_gpio.h"
 #include "fsl_port.h"
diff --git a/hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.c b/hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.c
index f9002a6d3..b83d5c820 100644
--- a/hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.c
+++ b/hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.c
@@ -25,7 +25,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 #include "fsl_smc.h"
 #include "fsl_gpio.h"
diff --git a/hw/bsp/kinetis_kl/family.c b/hw/bsp/kinetis_kl/family.c
index 8914078d5..3e9aa83a4 100644
--- a/hw/bsp/kinetis_kl/family.c
+++ b/hw/bsp/kinetis_kl/family.c
@@ -23,7 +23,7 @@
  * THE SOFTWARE.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 #include "fsl_device_registers.h"
 #include "fsl_gpio.h"
diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u37/lpcxpresso11u37.c b/hw/bsp/lpc11/boards/lpcxpresso11u37/lpcxpresso11u37.c
index 02dc2cbf9..900c57936 100644
--- a/hw/bsp/lpc11/boards/lpcxpresso11u37/lpcxpresso11u37.c
+++ b/hw/bsp/lpc11/boards/lpcxpresso11u37/lpcxpresso11u37.c
@@ -25,7 +25,7 @@
  */
 
 #include "chip.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u68/lpcxpresso11u68.c b/hw/bsp/lpc11/boards/lpcxpresso11u68/lpcxpresso11u68.c
index 44d091511..df895804d 100644
--- a/hw/bsp/lpc11/boards/lpcxpresso11u68/lpcxpresso11u68.c
+++ b/hw/bsp/lpc11/boards/lpcxpresso11u68/lpcxpresso11u68.c
@@ -25,7 +25,7 @@
  */
 
 #include "chip.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
diff --git a/hw/bsp/lpc15/family.c b/hw/bsp/lpc15/family.c
index 30a3e51e1..cd5c9ab15 100644
--- a/hw/bsp/lpc15/family.c
+++ b/hw/bsp/lpc15/family.c
@@ -25,7 +25,7 @@
  */
 
 #include "chip.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/lpc18/family.c b/hw/bsp/lpc18/family.c
index 2fd69c84b..b11f4fe0e 100644
--- a/hw/bsp/lpc18/family.c
+++ b/hw/bsp/lpc18/family.c
@@ -25,7 +25,7 @@
  */
 
 #include "chip.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 #ifdef BOARD_TUD_RHPORT
diff --git a/hw/bsp/lpc40/family.c b/hw/bsp/lpc40/family.c
index 829df4ac7..526e3a080 100644
--- a/hw/bsp/lpc40/family.c
+++ b/hw/bsp/lpc40/family.c
@@ -25,7 +25,7 @@
  */
 
 #include "chip.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/lpc54/family.c b/hw/bsp/lpc54/family.c
index fe9cfcc47..108a7d783 100644
--- a/hw/bsp/lpc54/family.c
+++ b/hw/bsp/lpc54/family.c
@@ -30,7 +30,7 @@
 #include "fsl_iocon.h"
 #include "fsl_usart.h"
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 #ifdef BOARD_TUD_RHPORT
diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c
index 1d2c87b4f..0fd85988a 100644
--- a/hw/bsp/lpc55/family.c
+++ b/hw/bsp/lpc55/family.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 #include "fsl_device_registers.h"
 #include "fsl_gpio.h"
diff --git a/hw/bsp/mcx/family.c b/hw/bsp/mcx/family.c
index 4344ffc4e..8672ca63f 100644
--- a/hw/bsp/mcx/family.c
+++ b/hw/bsp/mcx/family.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "fsl_device_registers.h"
 #include "fsl_gpio.h"
 #include "fsl_lpuart.h"
diff --git a/hw/bsp/msp430/family.c b/hw/bsp/msp430/family.c
index 4b8ae393d..5bb3d3866 100644
--- a/hw/bsp/msp430/family.c
+++ b/hw/bsp/msp430/family.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 #include "msp430.h"
 
diff --git a/hw/bsp/msp432e4/family.c b/hw/bsp/msp432e4/family.c
index 3d2d4085e..10f3ac736 100644
--- a/hw/bsp/msp432e4/family.c
+++ b/hw/bsp/msp432e4/family.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 #include "msp.h"
 
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 6a559ada6..9ca666e36 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 // Suppress warning caused by mcu driver
diff --git a/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c b/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c
index ec66f8deb..7cb9b2e69 100644
--- a/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c
+++ b/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "NuMicro.h"
 #include "clk.h"
 #include "sys.h"
diff --git a/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c b/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c
index ec66f8deb..7cb9b2e69 100644
--- a/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c
+++ b/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "NuMicro.h"
 #include "clk.h"
 #include "sys.h"
diff --git a/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c b/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c
index 90fa2ffd8..9974127a8 100644
--- a/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c
+++ b/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "NuMicro.h"
 #include "clk.h"
 #include "sys.h"
diff --git a/hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c b/hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c
index 9e7eacb23..18a189d8c 100644
--- a/hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c
+++ b/hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "NUC100Series.h"
 #include "clk.h"
 #include "sys.h"
diff --git a/hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c b/hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c
index 1fc97e3dc..3ec0066a3 100644
--- a/hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c
+++ b/hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "NUC505Series.h"
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c
index 00b87f335..6a4e14e86 100644
--- a/hw/bsp/ra/family.c
+++ b/hw/bsp/ra/family.c
@@ -45,7 +45,7 @@
 #include "r_ioport_api.h"
 #include "renesas.h"
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 /* Key code for writing PRCR register. */
diff --git a/hw/bsp/rx/boards/gr_citrus/gr_citrus.c b/hw/bsp/rx/boards/gr_citrus/gr_citrus.c
index 4f87153ac..5078c7569 100644
--- a/hw/bsp/rx/boards/gr_citrus/gr_citrus.c
+++ b/hw/bsp/rx/boards/gr_citrus/gr_citrus.c
@@ -52,7 +52,7 @@
  * regarding downloading.
  */
 
-#include "../board.h"
+#include "bsp/board_api.h"
 #include "iodefine.h"
 #include "interrupt_handlers.h"
 
diff --git a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
index 691038fc8..513eca678 100644
--- a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
+++ b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
@@ -50,7 +50,7 @@
  * regarding downloading.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "iodefine.h"
 #include "interrupt_handlers.h"
 
diff --git a/hw/bsp/samd11/family.c b/hw/bsp/samd11/family.c
index 8d9633971..4a7331508 100644
--- a/hw/bsp/samd11/family.c
+++ b/hw/bsp/samd11/family.c
@@ -25,7 +25,7 @@
  */
 
 #include "sam.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 #include "hal/include/hal_gpio.h"
diff --git a/hw/bsp/samd21/family.c b/hw/bsp/samd21/family.c
index 308fb51b5..46297f97f 100644
--- a/hw/bsp/samd21/family.c
+++ b/hw/bsp/samd21/family.c
@@ -25,7 +25,7 @@
  */
 
 #include "sam.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 #include "hal/include/hal_gpio.h"
diff --git a/hw/bsp/samd51/family.c b/hw/bsp/samd51/family.c
index 3da89ee14..7ec208b30 100644
--- a/hw/bsp/samd51/family.c
+++ b/hw/bsp/samd51/family.c
@@ -25,7 +25,7 @@
  */
 
 #include "sam.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 #include "hal/include/hal_gpio.h"
diff --git a/hw/bsp/same5x/boards/d5035_01/d5035_01.c b/hw/bsp/same5x/boards/d5035_01/d5035_01.c
index f356851f7..eb5768d0d 100644
--- a/hw/bsp/same5x/boards/d5035_01/d5035_01.c
+++ b/hw/bsp/same5x/boards/d5035_01/d5035_01.c
@@ -24,7 +24,7 @@
  */
 
 #include <sam.h>
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 
 #include <hal/include/hal_gpio.h>
 
diff --git a/hw/bsp/same5x/boards/same54_xplained/same54_xplained.c b/hw/bsp/same5x/boards/same54_xplained/same54_xplained.c
index ba1eec38b..93adea63e 100644
--- a/hw/bsp/same5x/boards/same54_xplained/same54_xplained.c
+++ b/hw/bsp/same5x/boards/same54_xplained/same54_xplained.c
@@ -24,7 +24,7 @@
  */
 
 #include <sam.h>
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 
 #include <hal/include/hal_gpio.h>
 
diff --git a/hw/bsp/same70_qmtech/same70_qmtech.c b/hw/bsp/same70_qmtech/same70_qmtech.c
index 6e6ad0602..e5f0da198 100644
--- a/hw/bsp/same70_qmtech/same70_qmtech.c
+++ b/hw/bsp/same70_qmtech/same70_qmtech.c
@@ -24,7 +24,7 @@
  */
 
 #include "sam.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 
 #include "peripheral_clk_config.h"
 #include "hpl/usart/hpl_usart_base.h"
diff --git a/hw/bsp/same70_xplained/same70_xplained.c b/hw/bsp/same70_xplained/same70_xplained.c
index e6e7db0f3..f532c6927 100644
--- a/hw/bsp/same70_xplained/same70_xplained.c
+++ b/hw/bsp/same70_xplained/same70_xplained.c
@@ -24,7 +24,7 @@
  */
 
 #include "sam.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 
 #include "peripheral_clk_config.h"
 #include "hpl/usart/hpl_usart_base.h"
diff --git a/hw/bsp/samg55xplained/samg55xplained.c b/hw/bsp/samg55xplained/samg55xplained.c
index 6e1ed56a9..2ac0c0a29 100644
--- a/hw/bsp/samg55xplained/samg55xplained.c
+++ b/hw/bsp/samg55xplained/samg55xplained.c
@@ -24,7 +24,7 @@
  */
 
 #include "sam.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 
 #include "peripheral_clk_config.h"
 #include "hal/include/hal_init.h"
diff --git a/hw/bsp/saml2x/family.c b/hw/bsp/saml2x/family.c
index f119d23a1..438fe8bfa 100644
--- a/hw/bsp/saml2x/family.c
+++ b/hw/bsp/saml2x/family.c
@@ -25,7 +25,7 @@
  */
 
 #include "sam.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 #include "hal/include/hal_gpio.h"
diff --git a/hw/bsp/spresense/board_spresense.c b/hw/bsp/spresense/board_spresense.c
index 5f778ad70..8cd04a49d 100644
--- a/hw/bsp/spresense/board_spresense.c
+++ b/hw/bsp/spresense/board_spresense.c
@@ -29,7 +29,7 @@
 #include <arch/board/board.h>
 #include <arch/chip/pin.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 
 /*------------------------------------------------------------------*/
 /* MACRO TYPEDEF CONSTANT ENUM
diff --git a/hw/bsp/stm32f0/family.c b/hw/bsp/stm32f0/family.c
index bfa843494..fe5de84c6 100644
--- a/hw/bsp/stm32f0/family.c
+++ b/hw/bsp/stm32f0/family.c
@@ -25,7 +25,7 @@
  */
 
 #include "stm32f0xx_hal.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/stm32f1/family.c b/hw/bsp/stm32f1/family.c
index 5e112de70..49c94a890 100644
--- a/hw/bsp/stm32f1/family.c
+++ b/hw/bsp/stm32f1/family.c
@@ -25,7 +25,7 @@
  */
 
 #include "stm32f1xx_hal.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/stm32f2/boards/stm32f207nucleo/stm32f207nucleo.c b/hw/bsp/stm32f2/boards/stm32f207nucleo/stm32f207nucleo.c
index 020f21cb1..dfbe7b743 100644
--- a/hw/bsp/stm32f2/boards/stm32f207nucleo/stm32f207nucleo.c
+++ b/hw/bsp/stm32f2/boards/stm32f207nucleo/stm32f207nucleo.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 
 #include "stm32f2xx_hal.h"
 
diff --git a/hw/bsp/stm32f4/family.c b/hw/bsp/stm32f4/family.c
index a308bae05..41803e0ce 100644
--- a/hw/bsp/stm32f4/family.c
+++ b/hw/bsp/stm32f4/family.c
@@ -25,7 +25,7 @@
  */
 
 #include "stm32f4xx_hal.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/stm32f7/family.c b/hw/bsp/stm32f7/family.c
index ce7e9d1bc..0e9471f33 100644
--- a/hw/bsp/stm32f7/family.c
+++ b/hw/bsp/stm32f7/family.c
@@ -27,7 +27,7 @@
  */
 
 #include "stm32f7xx_hal.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/stm32g0/family.c b/hw/bsp/stm32g0/family.c
index 1a975915f..e001425ed 100644
--- a/hw/bsp/stm32g0/family.c
+++ b/hw/bsp/stm32g0/family.c
@@ -26,7 +26,7 @@
  */
 
 #include "stm32g0xx_hal.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c
index d77183357..a088a0062 100644
--- a/hw/bsp/stm32g4/family.c
+++ b/hw/bsp/stm32g4/family.c
@@ -27,7 +27,7 @@
 #include "stm32g4xx_hal.h"
 #include "stm32g4xx_ll_bus.h"
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c
index eb4ac841e..535d586ee 100644
--- a/hw/bsp/stm32h7/family.c
+++ b/hw/bsp/stm32h7/family.c
@@ -28,7 +28,7 @@
  */
 
 #include "stm32h7xx_hal.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/stm32l0/family.c b/hw/bsp/stm32l0/family.c
index 89749fb50..212415744 100644
--- a/hw/bsp/stm32l0/family.c
+++ b/hw/bsp/stm32l0/family.c
@@ -25,7 +25,7 @@
  */
 
 #include "stm32l0xx_hal.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/stm32u5/family.c b/hw/bsp/stm32u5/family.c
index ee8a5d7ff..a30d886aa 100644
--- a/hw/bsp/stm32u5/family.c
+++ b/hw/bsp/stm32u5/family.c
@@ -26,7 +26,7 @@
  */
 
 #include "stm32u5xx_hal.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/stm32wb/family.c b/hw/bsp/stm32wb/family.c
index e9ca59866..d483c95b7 100644
--- a/hw/bsp/stm32wb/family.c
+++ b/hw/bsp/stm32wb/family.c
@@ -25,7 +25,7 @@
  */
 
 #include "stm32wbxx_hal.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/tm4c123/family.c b/hw/bsp/tm4c123/family.c
index 3f4f43220..ad5ae505f 100644
--- a/hw/bsp/tm4c123/family.c
+++ b/hw/bsp/tm4c123/family.c
@@ -1,5 +1,5 @@
 #include "TM4C123.h"
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/xmc4000/family.c b/hw/bsp/xmc4000/family.c
index 146bef373..832b25a4c 100644
--- a/hw/bsp/xmc4000/family.c
+++ b/hw/bsp/xmc4000/family.c
@@ -28,7 +28,7 @@
 #include "xmc_scu.h"
 #include "xmc_uart.h"
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "board.h"
 
 

From a160da1f2b941741234f429417798b8df5c33294 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 3 Aug 2023 17:19:47 +0700
Subject: [PATCH 566/691] add lpc43 family

---
 .github/workflows/cmake_arm.yml               |   2 +-
 examples/device/hid_boot_interface/src/main.c |   2 +-
 examples/typec/power_delivery/src/main.c      |   2 +-
 hw/bsp/board_api.h                            |   6 +-
 hw/bsp/ea4357/board.mk                        |  48 -----
 hw/bsp/lpc43/FreeRTOSConfig/FreeRTOSConfig.h  | 165 ++++++++++++++++++
 hw/bsp/lpc43/boards/ea4357/board.cmake        |  16 ++
 hw/bsp/lpc43/boards/ea4357/board.h            |  40 +++++
 hw/bsp/lpc43/boards/ea4357/board.mk           |  11 ++
 hw/bsp/{ => lpc43/boards}/ea4357/lpc4357.ld   |   0
 hw/bsp/{ => lpc43/boards}/ea4357/pca9532.c    |   0
 hw/bsp/{ => lpc43/boards}/ea4357/pca9532.h    |   0
 hw/bsp/{ea4357/ea4357.c => lpc43/family.c}    |  15 +-
 hw/bsp/lpc43/family.cmake                     |  97 ++++++++++
 hw/bsp/lpc43/family.mk                        |  34 ++++
 src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h  |   9 +
 16 files changed, 393 insertions(+), 54 deletions(-)
 delete mode 100644 hw/bsp/ea4357/board.mk
 create mode 100644 hw/bsp/lpc43/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/lpc43/boards/ea4357/board.cmake
 create mode 100644 hw/bsp/lpc43/boards/ea4357/board.h
 create mode 100644 hw/bsp/lpc43/boards/ea4357/board.mk
 rename hw/bsp/{ => lpc43/boards}/ea4357/lpc4357.ld (100%)
 rename hw/bsp/{ => lpc43/boards}/ea4357/pca9532.c (100%)
 rename hw/bsp/{ => lpc43/boards}/ea4357/pca9532.h (100%)
 rename hw/bsp/{ea4357/ea4357.c => lpc43/family.c} (97%)
 create mode 100644 hw/bsp/lpc43/family.cmake
 create mode 100644 hw/bsp/lpc43/family.mk

diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index 276360650..5203337ec 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -35,7 +35,7 @@ jobs:
           # Alphabetical order
           - 'imxrt'
           - 'kinetis_kl'
-          - 'lpc18 lpc40'
+          - 'lpc18 lpc40 lpc43'
           - 'lpc55'
           - 'mcx'
           - 'ra'
diff --git a/examples/device/hid_boot_interface/src/main.c b/examples/device/hid_boot_interface/src/main.c
index 1a155996a..18f301ff0 100644
--- a/examples/device/hid_boot_interface/src/main.c
+++ b/examples/device/hid_boot_interface/src/main.c
@@ -27,7 +27,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "usb_descriptors.h"
 
diff --git a/examples/typec/power_delivery/src/main.c b/examples/typec/power_delivery/src/main.c
index 08590aa74..489d01aa1 100644
--- a/examples/typec/power_delivery/src/main.c
+++ b/examples/typec/power_delivery/src/main.c
@@ -27,7 +27,7 @@
 #include <stdio.h>
 #include <string.h>
 
-#include "bsp/board.h"
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/board_api.h b/hw/bsp/board_api.h
index a7f3826d1..7249f618d 100644
--- a/hw/bsp/board_api.h
+++ b/hw/bsp/board_api.h
@@ -112,10 +112,14 @@ static inline void board_led_off(void) {
 static inline void board_delay(uint32_t ms) {
   uint32_t start_ms = board_millis();
   while ( board_millis() - start_ms < ms ) {
-    #if CFG_TUD_ENABLED
     // take chance to run usb background
+    #if CFG_TUD_ENABLED
     tud_task();
     #endif
+
+    #if CFG_TUH_ENABLED
+    tuh_task();
+    #endif
   }
 }
 
diff --git a/hw/bsp/ea4357/board.mk b/hw/bsp/ea4357/board.mk
deleted file mode 100644
index 6fd229166..000000000
--- a/hw/bsp/ea4357/board.mk
+++ /dev/null
@@ -1,48 +0,0 @@
-DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
-
-CFLAGS += \
-  -flto \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m4 \
-  -mfloat-abi=hard \
-  -mfpu=fpv4-sp-d16 \
-  -nostdlib \
-  -DCORE_M4 \
-  -D__USE_LPCOPEN \
-  -DCFG_TUSB_MCU=OPT_MCU_LPC43XX
-
-# mcu driver cause following warnings
-CFLAGS += -Wno-error=unused-parameter -Wno-error=strict-prototypes  -Wno-error=cast-qual
-
-MCU_DIR = hw/mcu/nxp/lpcopen/lpc43xx/lpc_chip_43xx
-
-# All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/lpc4357.ld
-
-SRC_C += \
-	src/portable/chipidea/ci_hs/dcd_ci_hs.c \
-	src/portable/chipidea/ci_hs/hcd_ci_hs.c \
-	src/portable/ehci/ehci.c \
-	$(MCU_DIR)/../gcc/cr_startup_lpc43xx.c \
-	$(MCU_DIR)/src/chip_18xx_43xx.c \
-	$(MCU_DIR)/src/clock_18xx_43xx.c \
-	$(MCU_DIR)/src/gpio_18xx_43xx.c \
-	$(MCU_DIR)/src/sysinit_18xx_43xx.c \
-	$(MCU_DIR)/src/i2c_18xx_43xx.c \
-	$(MCU_DIR)/src/i2cm_18xx_43xx.c \
-	$(MCU_DIR)/src/uart_18xx_43xx.c \
-	$(MCU_DIR)/src/fpu_init.c
-
-INC += \
-	$(TOP)/$(MCU_DIR)/inc \
-	$(TOP)/$(MCU_DIR)/inc/config_43xx
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
-
-# For flash-jlink target
-JLINK_DEVICE = LPC4357_M4
-
-# flash using jlink
-flash: flash-jlink
diff --git a/hw/bsp/lpc43/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/lpc43/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..6f80413c0
--- /dev/null
+++ b/hw/bsp/lpc43/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,165 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "chip.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       3
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/lpc43/boards/ea4357/board.cmake b/hw/bsp/lpc43/boards/ea4357/board.cmake
new file mode 100644
index 000000000..8f4588463
--- /dev/null
+++ b/hw/bsp/lpc43/boards/ea4357/board.cmake
@@ -0,0 +1,16 @@
+set(MCU_VARIANT LPC4357)
+
+set(JLINK_DEVICE LPC4357_M4)
+set(PYOCD_TARGET LPC4357)
+set(NXPLINK_DEVICE LPC4357:LPC4357)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/lpc4357.ld)
+
+function(update_board TARGET)
+  # EA4357 use I2C GPIO expander for LED
+  target_sources(${TARGET} PRIVATE
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/pca9532.c
+    ${SDK_DIR}/src/i2c_18xx_43xx.c
+    ${SDK_DIR}/src/i2cm_18xx_43xx.c
+    )
+endfunction()
diff --git a/hw/bsp/lpc43/boards/ea4357/board.h b/hw/bsp/lpc43/boards/ea4357/board.h
new file mode 100644
index 000000000..f026324ef
--- /dev/null
+++ b/hw/bsp/lpc43/boards/ea4357/board.h
@@ -0,0 +1,40 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _BOARD_EA4357_H
+#define _BOARD_EA4357_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "pca9532.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/hw/bsp/lpc43/boards/ea4357/board.mk b/hw/bsp/lpc43/boards/ea4357/board.mk
new file mode 100644
index 000000000..d0eb08d6d
--- /dev/null
+++ b/hw/bsp/lpc43/boards/ea4357/board.mk
@@ -0,0 +1,11 @@
+# EA4357 use I2C GPIO expander for LED
+SRC_C += \
+  ${BOARD_PATH}/pca9532.c \
+	${SDK_DIR}/src/i2c_18xx_43xx.c \
+	${SDK_DIR}/src/i2cm_18xx_43xx.c \
+
+LD_FILE = ${BOARD_PATH}/lpc4357.ld
+
+JLINK_DEVICE = LPC4357_M4
+
+flash: flash-jlink
diff --git a/hw/bsp/ea4357/lpc4357.ld b/hw/bsp/lpc43/boards/ea4357/lpc4357.ld
similarity index 100%
rename from hw/bsp/ea4357/lpc4357.ld
rename to hw/bsp/lpc43/boards/ea4357/lpc4357.ld
diff --git a/hw/bsp/ea4357/pca9532.c b/hw/bsp/lpc43/boards/ea4357/pca9532.c
similarity index 100%
rename from hw/bsp/ea4357/pca9532.c
rename to hw/bsp/lpc43/boards/ea4357/pca9532.c
diff --git a/hw/bsp/ea4357/pca9532.h b/hw/bsp/lpc43/boards/ea4357/pca9532.h
similarity index 100%
rename from hw/bsp/ea4357/pca9532.h
rename to hw/bsp/lpc43/boards/ea4357/pca9532.h
diff --git a/hw/bsp/ea4357/ea4357.c b/hw/bsp/lpc43/family.c
similarity index 97%
rename from hw/bsp/ea4357/ea4357.c
rename to hw/bsp/lpc43/family.c
index 06975b8cc..ba3191d5f 100644
--- a/hw/bsp/ea4357/ea4357.c
+++ b/hw/bsp/lpc43/family.c
@@ -24,9 +24,20 @@
  * This file is part of the TinyUSB stack.
  */
 
+// Suppress warning caused by mcu driver
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wunused-parameter"
+#endif
+
 #include "chip.h"
-#include "../board_api.h"
-#include "pca9532.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
+#include "bsp/board_api.h"
+#include "board.h"
 
 #define UART_DEV        LPC_USART0
 #define UART_PORT       0x0f
diff --git a/hw/bsp/lpc43/family.cmake b/hw/bsp/lpc43/family.cmake
new file mode 100644
index 000000000..9fd78c9c2
--- /dev/null
+++ b/hw/bsp/lpc43/family.cmake
@@ -0,0 +1,97 @@
+include_guard()
+
+set(SDK_DIR ${TOP}/hw/mcu/nxp/lpcopen/lpc43xx/lpc_chip_43xx)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS LPC43XX CACHE INTERNAL "")
+
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    add_library(${BOARD_TARGET} STATIC
+      ${SDK_DIR}/../gcc/cr_startup_lpc43xx.c
+      ${SDK_DIR}/src/chip_18xx_43xx.c
+      ${SDK_DIR}/src/clock_18xx_43xx.c
+      ${SDK_DIR}/src/fpu_init.c
+      ${SDK_DIR}/src/gpio_18xx_43xx.c
+      ${SDK_DIR}/src/sysinit_18xx_43xx.c
+      ${SDK_DIR}/src/uart_18xx_43xx.c
+      )
+    target_compile_options(${BOARD_TARGET} PUBLIC
+      -nostdlib
+      )
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      __USE_LPCOPEN
+      CORE_M4
+      )
+    target_include_directories(${BOARD_TARGET} PUBLIC
+      ${SDK_DIR}/inc
+      ${SDK_DIR}/inc/config_43xx
+      )
+
+    update_board(${BOARD_TARGET})
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--script=${LD_FILE_GNU}"
+        # nanolib
+        --specs=nosys.specs
+        --specs=nano.specs
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_LPC43XX ${RTOS})
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+    ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+    ${TOP}/src/portable/ehci/ehci.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_flash_jlink(${TARGET})
+endfunction()
diff --git a/hw/bsp/lpc43/family.mk b/hw/bsp/lpc43/family.mk
new file mode 100644
index 000000000..4a1c2fb3c
--- /dev/null
+++ b/hw/bsp/lpc43/family.mk
@@ -0,0 +1,34 @@
+DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
+SDK_DIR = hw/mcu/nxp/lpcopen/lpc43xx/lpc_chip_43xx
+
+include ${TOP}/${BOARD_PATH}/board.mk
+CPU_CORE ?= cortex-m4
+
+CFLAGS += \
+  -flto \
+  -nostdlib \
+  -DCORE_M4 \
+  -D__USE_LPCOPEN \
+  -DCFG_TUSB_MCU=OPT_MCU_LPC43XX
+
+# mcu driver cause following warnings
+CFLAGS += -Wno-error=unused-parameter -Wno-error=strict-prototypes  -Wno-error=cast-qual
+
+SRC_C += \
+	src/portable/chipidea/ci_hs/dcd_ci_hs.c \
+	src/portable/chipidea/ci_hs/hcd_ci_hs.c \
+	src/portable/ehci/ehci.c \
+	${SDK_DIR}/../gcc/cr_startup_lpc43xx.c \
+	${SDK_DIR}/src/chip_18xx_43xx.c \
+	${SDK_DIR}/src/clock_18xx_43xx.c \
+	${SDK_DIR}/src/gpio_18xx_43xx.c \
+	${SDK_DIR}/src/sysinit_18xx_43xx.c \
+	${SDK_DIR}/src/i2c_18xx_43xx.c \
+	${SDK_DIR}/src/i2cm_18xx_43xx.c \
+	${SDK_DIR}/src/uart_18xx_43xx.c \
+	${SDK_DIR}/src/fpu_init.c
+
+INC += \
+  $(TOP)/$(BOARD_PATH) \
+	${TOP}/${SDK_DIR}/inc \
+	${TOP}/${SDK_DIR}/inc/config_43xx
diff --git a/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h b/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h
index 2e84c93e7..178eec419 100644
--- a/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h
+++ b/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h
@@ -27,9 +27,18 @@
 #ifndef _CI_HS_LPC18_43_H_
 #define _CI_HS_LPC18_43_H_
 
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wunused-parameter"
+#endif
+
 // LPCOpen for 18xx & 43xx
 #include "chip.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 static const ci_hs_controller_t _ci_controller[] =
 {
   { .reg_base = LPC_USB0_BASE, .irqnum = USB0_IRQn },

From 1324c2862df921d9634e90a78048f5d71a77d894 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 3 Aug 2023 17:32:15 +0700
Subject: [PATCH 567/691] more board_api rename

---
 hw/bsp/lpc13/boards/lpcxpresso1347/lpcxpresso1347.c             | 2 +-
 hw/bsp/lpc17/boards/lpcxpresso1769/lpcxpresso1769.c             | 2 +-
 hw/bsp/lpc17/boards/mbed1768/mbed1768.c                         | 2 +-
 hw/bsp/lpc51/boards/lpcxpresso51u68/lpcxpresso51u68.c           | 2 +-
 .../mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c | 2 +-
 hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c              | 2 +-
 .../mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c   | 2 +-
 hw/bsp/stm32f3/boards/stm32f303disco/stm32f303disco.c           | 2 +-
 8 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/hw/bsp/lpc13/boards/lpcxpresso1347/lpcxpresso1347.c b/hw/bsp/lpc13/boards/lpcxpresso1347/lpcxpresso1347.c
index 8ee611037..e8c85ae22 100644
--- a/hw/bsp/lpc13/boards/lpcxpresso1347/lpcxpresso1347.c
+++ b/hw/bsp/lpc13/boards/lpcxpresso1347/lpcxpresso1347.c
@@ -25,7 +25,7 @@
  */
 
 #include "chip.h"
-#include "../board.h"
+#include "bsp/board_api.h"
 
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
diff --git a/hw/bsp/lpc17/boards/lpcxpresso1769/lpcxpresso1769.c b/hw/bsp/lpc17/boards/lpcxpresso1769/lpcxpresso1769.c
index 24333ad1a..c7d655368 100644
--- a/hw/bsp/lpc17/boards/lpcxpresso1769/lpcxpresso1769.c
+++ b/hw/bsp/lpc17/boards/lpcxpresso1769/lpcxpresso1769.c
@@ -25,7 +25,7 @@
  */
 
 #include "chip.h"
-#include "../board.h"
+#include "bsp/board_api.h"
 
 //--------------------------------------------------------------------+
 // USB Interrupt Handler
diff --git a/hw/bsp/lpc17/boards/mbed1768/mbed1768.c b/hw/bsp/lpc17/boards/mbed1768/mbed1768.c
index 9f3d294d3..b2c92d640 100644
--- a/hw/bsp/lpc17/boards/mbed1768/mbed1768.c
+++ b/hw/bsp/lpc17/boards/mbed1768/mbed1768.c
@@ -25,7 +25,7 @@
  */
 
 #include "chip.h"
-#include "../board.h"
+#include "bsp/board_api.h"
 
 #define LED_PORT              1
 #define LED_PIN               18
diff --git a/hw/bsp/lpc51/boards/lpcxpresso51u68/lpcxpresso51u68.c b/hw/bsp/lpc51/boards/lpcxpresso51u68/lpcxpresso51u68.c
index c94b0d6d8..579c9c9ed 100644
--- a/hw/bsp/lpc51/boards/lpcxpresso51u68/lpcxpresso51u68.c
+++ b/hw/bsp/lpc51/boards/lpcxpresso51u68/lpcxpresso51u68.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "../board.h"
+#include "bsp/board_api.h"
 #include "fsl_device_registers.h"
 #include "fsl_gpio.h"
 #include "fsl_power.h"
diff --git a/hw/bsp/mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c
index 0a07dc749..a4bd95fab 100644
--- a/hw/bsp/mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c
+++ b/hw/bsp/mm32/boards/mm32f327x_bluepillplus/mm32f327x_bluepillplus.c
@@ -29,7 +29,7 @@
 #include "mm32_device.h"
 #include "hal_conf.h"
 #include "tusb.h"
-#include "../board.h"
+#include "bsp/board_api.h"
 
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
diff --git a/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c b/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c
index c3f5bc16d..086532179 100644
--- a/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c
+++ b/hw/bsp/mm32/boards/mm32f327x_mb39/mm32f327x_mb39.c
@@ -27,7 +27,7 @@
 #include "mm32_device.h"
 #include "hal_conf.h"
 #include "tusb.h"
-#include "../board.h"
+#include "bsp/board_api.h"
 
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
diff --git a/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c
index 381e93e11..bd2d36ae0 100644
--- a/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c
+++ b/hw/bsp/mm32/boards/mm32f327x_pitaya_lite/mm32f327x_pitaya_lite.c
@@ -29,7 +29,7 @@
 #include "mm32_device.h"
 #include "hal_conf.h"
 #include "tusb.h"
-#include "../board.h"
+#include "bsp/board_api.h"
 
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
diff --git a/hw/bsp/stm32f3/boards/stm32f303disco/stm32f303disco.c b/hw/bsp/stm32f3/boards/stm32f303disco/stm32f303disco.c
index ac9bda983..d6a39a8e2 100644
--- a/hw/bsp/stm32f3/boards/stm32f303disco/stm32f303disco.c
+++ b/hw/bsp/stm32f3/boards/stm32f303disco/stm32f303disco.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "../board.h"
+#include "bsp/board_api.h"
 #include "stm32f3xx_hal.h"
 
 //--------------------------------------------------------------------+

From 041f510f909f0ce8923389c847a8d55e0b7eeee2 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 3 Aug 2023 20:42:34 +0700
Subject: [PATCH 568/691] add board_get_unique_id() for serial number

implemented board_get_unique_id() for rp2040 and L4
---
 examples/device/cdc_msc/src/usb_descriptors.c | 54 +++++++++++-------
 hw/bsp/board_api.h                            | 40 +++++++++++--
 hw/bsp/family_support.cmake                   |  3 +-
 hw/bsp/rp2040/family.c                        | 36 +++++++-----
 hw/bsp/rp2040/family.cmake                    |  1 +
 hw/bsp/stm32l4/family.c                       | 56 +++++++++++--------
 6 files changed, 126 insertions(+), 64 deletions(-)

diff --git a/examples/device/cdc_msc/src/usb_descriptors.c b/examples/device/cdc_msc/src/usb_descriptors.c
index 44c849277..baf919f84 100644
--- a/examples/device/cdc_msc/src/usb_descriptors.c
+++ b/examples/device/cdc_msc/src/usb_descriptors.c
@@ -23,6 +23,7 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 /* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
@@ -236,6 +237,14 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
 char const* string_desc_arr [] =
 {
@@ -247,7 +256,7 @@ char const* string_desc_arr [] =
   "TinyUSB MSC",                 // 5: MSC Interface
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32+1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
@@ -255,30 +264,35 @@ uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
 {
   (void) langid;
 
-  uint8_t chr_count;
+  size_t chr_count;
 
-  if ( index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }else
-  {
-    // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
-    // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
+  switch(index) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str+1, 32);
+      break;
 
-    const char* str = string_desc_arr[index];
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > 31 ) chr_count = 31;
+      if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Convert ASCII string into UTF-16
-    for(uint8_t i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      const char* str = string_desc_arr[index];
+
+      // Cap at max char
+      chr_count = strlen(str);
+      if ( chr_count > 31 ) chr_count = 31;
+
+      // Convert ASCII string into UTF-16
+      for(size_t i=0; i<chr_count; i++) {
+        _desc_str[1+i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
diff --git a/hw/bsp/board_api.h b/hw/bsp/board_api.h
index 7249f618d..53296cd56 100644
--- a/hw/bsp/board_api.h
+++ b/hw/bsp/board_api.h
@@ -60,12 +60,13 @@ void board_led_write(bool state);
 // a '1' means active (pressed), a '0' means inactive.
 uint32_t board_button_read(void);
 
-// Get characters from UART
-// Return number of read bytes
+// Get board unique ID for USB serial number. Return number of bytes. Note max_len is typically 16
+TU_ATTR_WEAK size_t board_get_unique_id(uint8_t id[], size_t max_len);
+
+// Get characters from UART. Return number of read bytes
 int board_uart_read(uint8_t *buf, int len);
 
-// Send characters to UART
-// Return number of sent bytes
+// Send characters to UART. Return number of sent bytes
 int board_uart_write(void const *buf, int len);
 
 #if CFG_TUSB_OS == OPT_OS_NONE
@@ -108,6 +109,37 @@ static inline void board_led_off(void) {
   board_led_write(false);
 }
 
+// Get USB Serial number string from unique ID if available. Return number of character.
+// Input is string descriptor from index 1 (index 0 is type + len)
+static inline size_t board_usb_get_serial(uint16_t desc_str1[], size_t max_chars) {
+  uint8_t serial_id[16] TU_ATTR_ALIGNED(4);
+  size_t serial_len;
+
+  if ( board_get_unique_id ) {
+    serial_len = board_get_unique_id(serial_id, sizeof(serial_id));
+  }else {
+    // fixed serial string is 01234567889ABCDEF
+    *((uint32_t*)(uintptr_t) serial_id) = 0x67452301;
+    *((uint32_t*)(uintptr_t) (serial_id+4)) = 0xEFCDAB89;
+    serial_len = 8;
+  }
+
+  if ( serial_len > max_chars / 2 ) serial_len = max_chars / 2;
+
+  for ( size_t i = 0; i < serial_len; i++ ) {
+    for ( size_t j = 0; j < 2; j++ ) {
+      const char nibble_to_hex[16] = {
+          '0', '1', '2', '3', '4', '5', '6', '7',
+          '8', '9', 'A', 'B', 'C', 'D', 'E', 'F'
+      };
+      uint8_t const nibble = (serial_id[i] >> (j * 4)) & 0xf;
+      desc_str1[i * 2 + (1 - j)] = nibble_to_hex[nibble]; // UTF-16-LE
+    }
+  }
+
+  return 2*serial_len;
+}
+
 // TODO remove
 static inline void board_delay(uint32_t ms) {
   uint32_t start_ms = board_millis();
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index b2e61a824..e5571b3b5 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -289,7 +289,8 @@ function(family_add_default_example_warnings TARGET)
     -Wfatal-errors
     -Wdouble-promotion
     -Wfloat-equal
-    -Wshadow
+    # FIXME commented out because of https://github.com/raspberrypi/pico-sdk/issues/1468
+    #-Wshadow
     -Wwrite-strings
     -Wsign-compare
     -Wmissing-format-attribute
diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index be5e9f753..aa9d00c23 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -27,6 +27,7 @@
 
 #include "pico/stdlib.h"
 #include "pico/binary_info.h"
+#include "pico/unique_id.h"
 #include "hardware/gpio.h"
 #include "hardware/sync.h"
 #include "hardware/structs/ioqspi.h"
@@ -171,17 +172,15 @@ void board_init(void)
 // Board porting API
 //--------------------------------------------------------------------+
 
-void board_led_write(bool state)
-{
+void board_led_write(bool state) {
   (void) state;
 
 #ifdef LED_PIN
-  gpio_put(LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
+  gpio_put(LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON));
 #endif
 }
 
-uint32_t board_button_read(void)
-{
+uint32_t board_button_read(void) {
 #ifdef BUTTON_BOOTSEL
   return BUTTON_STATE_ACTIVE == get_bootsel_button();
 #else
@@ -189,12 +188,21 @@ uint32_t board_button_read(void)
 #endif
 }
 
-int board_uart_read(uint8_t* buf, int len)
-{
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  pico_unique_board_id_t pico_id;
+  pico_get_unique_board_id(&pico_id);
+
+  size_t len = PICO_UNIQUE_BOARD_ID_SIZE_BYTES;
+  if (len > max_len) len = max_len;
+
+  memcpy(id, pico_id.id, len);
+  return len;
+}
+
+int board_uart_read(uint8_t *buf, int len) {
 #ifdef UART_DEV
   int count = 0;
-  while ( (count < len) && uart_is_readable(uart_inst) )
-  {
+  while ( (count < len) && uart_is_readable(uart_inst) ) {
     buf[count] = uart_getc(uart_inst);
     count++;
   }
@@ -205,11 +213,10 @@ int board_uart_read(uint8_t* buf, int len)
 #endif
 }
 
-int board_uart_write(void const * buf, int len)
-{
+int board_uart_write(void const *buf, int len) {
 #ifdef UART_DEV
-  char const* bufch = (char const*) buf;
-  for(int i=0;i<len;i++) {
+  char const *bufch = (char const *) buf;
+  for ( int i = 0; i < len; i++ ) {
     uart_putc(uart_inst, bufch[i]);
   }
   return len;
@@ -219,8 +226,7 @@ int board_uart_write(void const * buf, int len)
 #endif
 }
 
-int board_getchar(void)
-{
+int board_getchar(void) {
   return getchar_timeout_us(0);
 }
 
diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index 17900dd7a..465041b12 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -112,6 +112,7 @@ target_sources(tinyusb_bsp INTERFACE
 target_include_directories(tinyusb_bsp INTERFACE
 	${TOP}/hw
 	)
+target_link_libraries(tinyusb_bsp	INTERFACE pico_unique_id)
 
 # tinyusb_additions will hold our extra settings for examples
 add_library(tinyusb_additions INTERFACE)
diff --git a/hw/bsp/stm32l4/family.c b/hw/bsp/stm32l4/family.c
index 0b2c22d19..1c6c595f1 100644
--- a/hw/bsp/stm32l4/family.c
+++ b/hw/bsp/stm32l4/family.c
@@ -48,8 +48,7 @@ void USB_IRQHandler(void)
 
 UART_HandleTypeDef UartHandle;
 
-void board_init(void)
-{
+void board_init(void) {
   board_clock_init();
 
   // Enable All GPIOs clocks
@@ -177,51 +176,60 @@ void board_init(void)
 // Board porting API
 //--------------------------------------------------------------------+
 
-void board_led_write(bool state)
-{
-  GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1-LED_STATE_ON));
+void board_led_write(bool state) {
+  GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1 - LED_STATE_ON));
   HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
 }
 
-uint32_t board_button_read(void)
-{
+uint32_t board_button_read(void) {
   return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
 }
 
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  (void) max_len;
+  volatile uint32_t * stm32_uuid = (volatile uint32_t *) UID_BASE;
+
+  uint8_t const len = 12;
+  uint32_t* id32 = (uint32_t*) (uintptr_t) id;
+
+  id32[0] = stm32_uuid[0];
+  id32[1] = stm32_uuid[1];
+  id32[2] = stm32_uuid[2];
 
-int board_uart_write(void const * buf, int len)
-{
-  HAL_UART_Transmit(&UartHandle, (uint8_t*)(uintptr_t) buf, len, 0xffff);
   return len;
 }
 
-#if CFG_TUSB_OS  == OPT_OS_NONE
+int board_uart_read(uint8_t *buf, int len) {
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+int board_uart_write(void const *buf, int len) {
+  HAL_UART_Transmit(&UartHandle, (uint8_t *) (uintptr_t) buf, len, 0xffff);
+  return len;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
+
+void SysTick_Handler(void) {
   HAL_IncTick();
   system_ticks++;
 }
 
-uint32_t board_millis(void)
-{
+uint32_t board_millis(void) {
   return system_ticks;
 }
+
 #endif
 
-void HardFault_Handler (void)
-{
+void HardFault_Handler(void) {
   __asm("BKPT #0\n");
 }
 
 // Required by __libc_init_array in startup code if we are compiling using
 // -nostdlib/-nostartfiles.
-void _init(void)
-{
+void _init(void) {
 
 }

From 9360a3bd5197792584ede8a33c50a4d3054d84e6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 4 Aug 2023 00:20:47 +0700
Subject: [PATCH 569/691] add uid for some stm32

---
 .idea/cmake.xml         |   6 +-
 hw/bsp/board_api.h      |  21 ++++---
 hw/bsp/stm32f0/family.c |  91 +++++++++++++--------------
 hw/bsp/stm32f1/family.c |  73 +++++++++++----------
 hw/bsp/stm32f7/family.c | 136 +++++++++++++++++++++-------------------
 hw/bsp/stm32g0/family.c |  58 +++++++++--------
 hw/bsp/stm32g4/family.c |  63 ++++++++++---------
 hw/bsp/stm32h7/family.c |  91 ++++++++++++++-------------
 hw/bsp/stm32l4/family.c |   3 +-
 9 files changed, 281 insertions(+), 261 deletions(-)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 15bfcd2ad..4c45c5c26 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -25,7 +25,7 @@
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
-      <configuration PROFILE_NAME="rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico -DLOG=2 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico" />
       <configuration PROFILE_NAME="metro m7 1011" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1010_evk -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="rt1015 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1015_evk -DLOG=1" />
@@ -43,12 +43,14 @@
       <configuration PROFILE_NAME="stm32f072disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f072disco" />
       <configuration PROFILE_NAME="stm32f103_mini_2" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f103_mini_2" />
       <configuration PROFILE_NAME="stm32f769disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f769disco -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="stm32l476disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32l476disco" />
+      <configuration PROFILE_NAME="stm32l476disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32l476disco -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="ra4m1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra4m1_ek -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="ra6m1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m1_ek -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="ra6m5" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="rt1050 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1050_evkb -DLOG=1 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="ea4088 quickstart" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ea4088_quickstart -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="ea4357" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ea4357 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="feather_rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pico_sdk -DPICO_BOARD=adafruit_feather_rp2040" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/hw/bsp/board_api.h b/hw/bsp/board_api.h
index 53296cd56..18c5b0a32 100644
--- a/hw/bsp/board_api.h
+++ b/hw/bsp/board_api.h
@@ -112,32 +112,33 @@ static inline void board_led_off(void) {
 // Get USB Serial number string from unique ID if available. Return number of character.
 // Input is string descriptor from index 1 (index 0 is type + len)
 static inline size_t board_usb_get_serial(uint16_t desc_str1[], size_t max_chars) {
-  uint8_t serial_id[16] TU_ATTR_ALIGNED(4);
-  size_t serial_len;
+  uint8_t uid[16] TU_ATTR_ALIGNED(4);
+  size_t uid_len;
 
   if ( board_get_unique_id ) {
-    serial_len = board_get_unique_id(serial_id, sizeof(serial_id));
+    uid_len = board_get_unique_id(uid, sizeof(uid));
   }else {
     // fixed serial string is 01234567889ABCDEF
-    *((uint32_t*)(uintptr_t) serial_id) = 0x67452301;
-    *((uint32_t*)(uintptr_t) (serial_id+4)) = 0xEFCDAB89;
-    serial_len = 8;
+    uint32_t* uid32 = (uint32_t*) (uintptr_t) uid;
+    uid32[0] = 0x67452301;
+    uid32[1] = 0xEFCDAB89;
+    uid_len = 8;
   }
 
-  if ( serial_len > max_chars / 2 ) serial_len = max_chars / 2;
+  if ( uid_len > max_chars / 2 ) uid_len = max_chars / 2;
 
-  for ( size_t i = 0; i < serial_len; i++ ) {
+  for ( size_t i = 0; i < uid_len; i++ ) {
     for ( size_t j = 0; j < 2; j++ ) {
       const char nibble_to_hex[16] = {
           '0', '1', '2', '3', '4', '5', '6', '7',
           '8', '9', 'A', 'B', 'C', 'D', 'E', 'F'
       };
-      uint8_t const nibble = (serial_id[i] >> (j * 4)) & 0xf;
+      uint8_t const nibble = (uid[i] >> (j * 4)) & 0xf;
       desc_str1[i * 2 + (1 - j)] = nibble_to_hex[nibble]; // UTF-16-LE
     }
   }
 
-  return 2*serial_len;
+  return 2 * uid_len;
 }
 
 // TODO remove
diff --git a/hw/bsp/stm32f0/family.c b/hw/bsp/stm32f0/family.c
index fe5de84c6..7ef126ae6 100644
--- a/hw/bsp/stm32f0/family.c
+++ b/hw/bsp/stm32f0/family.c
@@ -31,8 +31,7 @@
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
-void USB_IRQHandler(void)
-{
+void USB_IRQHandler(void) {
   tud_int_handler(0);
 }
 
@@ -41,8 +40,7 @@ void USB_IRQHandler(void)
 //--------------------------------------------------------------------+
 UART_HandleTypeDef UartHandle;
 
-void board_init(void)
-{
+void board_init(void) {
   board_stm32f0_clock_init();
 
   // Enable All GPIOs clocks
@@ -68,7 +66,7 @@ void board_init(void)
 #endif
 
   // LED
-  GPIO_InitTypeDef  GPIO_InitStruct;
+  GPIO_InitTypeDef GPIO_InitStruct;
   GPIO_InitStruct.Pin = LED_PIN;
   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
   GPIO_InitStruct.Pull = GPIO_PULLUP;
@@ -83,20 +81,20 @@ void board_init(void)
   HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
 
   // Uart
-  GPIO_InitStruct.Pin       = UART_TX_PIN | UART_RX_PIN;
-  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
-  GPIO_InitStruct.Pull      = GPIO_PULLUP;
-  GPIO_InitStruct.Speed     = GPIO_SPEED_FREQ_HIGH;
+  GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_PULLUP;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   GPIO_InitStruct.Alternate = UART_GPIO_AF;
   HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
 
-  UartHandle.Instance        = UART_DEV;
-  UartHandle.Init.BaudRate   = CFG_BOARD_UART_BAUDRATE;
+  UartHandle.Instance = UART_DEV;
+  UartHandle.Init.BaudRate = CFG_BOARD_UART_BAUDRATE;
   UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
-  UartHandle.Init.StopBits   = UART_STOPBITS_1;
-  UartHandle.Init.Parity     = UART_PARITY_NONE;
-  UartHandle.Init.HwFlowCtl  = UART_HWCONTROL_NONE;
-  UartHandle.Init.Mode       = UART_MODE_TX_RX;
+  UartHandle.Init.StopBits = UART_STOPBITS_1;
+  UartHandle.Init.Parity = UART_PARITY_NONE;
+  UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  UartHandle.Init.Mode = UART_MODE_TX_RX;
   UartHandle.Init.OverSampling = UART_OVERSAMPLING_16;
   HAL_UART_Init(&UartHandle);
 
@@ -116,56 +114,59 @@ void board_init(void)
 // Board porting API
 //--------------------------------------------------------------------+
 
-void board_led_write(bool state)
-{
-  GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1-LED_STATE_ON));
+void board_led_write(bool state) {
+  GPIO_PinState pin_state = (GPIO_PinState)(state ? LED_STATE_ON : (1 - LED_STATE_ON));
   HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
 }
 
-uint32_t board_button_read(void)
-{
+uint32_t board_button_read(void) {
   return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
 }
 
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  (void) max_len;
+  volatile uint32_t * stm32_uuid = (volatile uint32_t *) UID_BASE;
+  uint32_t* id32 = (uint32_t*) (uintptr_t) id;
+  uint8_t const len = 12;
+
+  id32[0] = stm32_uuid[0];
+  id32[1] = stm32_uuid[1];
+  id32[2] = stm32_uuid[2];
 
-int board_uart_write(void const * buf, int len)
-{
-  HAL_UART_Transmit(&UartHandle, (uint8_t*)(uintptr_t) buf, len, 0xffff);
   return len;
 }
 
-#if CFG_TUSB_OS  == OPT_OS_NONE
+int board_uart_read(uint8_t *buf, int len) {
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+int board_uart_write(void const *buf, int len) {
+  HAL_UART_Transmit(&UartHandle, (uint8_t * )(uintptr_t)
+  buf, len, 0xffff);
+  return len;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
+
+void SysTick_Handler(void) {
   HAL_IncTick();
   system_ticks++;
 }
 
-uint32_t board_millis(void)
-{
+uint32_t board_millis(void) {
   return system_ticks;
 }
+
 #endif
 
-void HardFault_Handler (void)
-{
-   __asm("BKPT #0\n");
+void HardFault_Handler(void) {
+  __asm("BKPT #0\n");
 }
 
 #ifdef  USE_FULL_ASSERT
-/**
-  * @brief  Reports the name of the source file and the source line number
-  *         where the assert_param error has occurred.
-  * @param  file: pointer to the source file name
-  * @param  line: assert_param error line source number
-  * @retval None
-  */
 void assert_failed(const char* file, uint32_t line)
 {
   (void) file; (void) line;
@@ -178,7 +179,5 @@ void assert_failed(const char* file, uint32_t line)
 
 // Required by __libc_init_array in startup code if we are compiling using
 // -nostdlib/-nostartfiles.
-void _init(void)
-{
-
+void _init(void) {
 }
diff --git a/hw/bsp/stm32f1/family.c b/hw/bsp/stm32f1/family.c
index 49c94a890..3b1c5796b 100644
--- a/hw/bsp/stm32f1/family.c
+++ b/hw/bsp/stm32f1/family.c
@@ -31,18 +31,15 @@
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
-void USB_HP_IRQHandler(void)
-{
+void USB_HP_IRQHandler(void) {
   tud_int_handler(0);
 }
 
-void USB_LP_IRQHandler(void)
-{
+void USB_LP_IRQHandler(void) {
   tud_int_handler(0);
 }
 
-void USBWakeUp_IRQHandler(void)
-{
+void USBWakeUp_IRQHandler(void) {
   tud_int_handler(0);
 }
 
@@ -50,8 +47,7 @@ void USBWakeUp_IRQHandler(void)
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
 
-void board_init(void)
-{
+void board_init(void) {
   board_stm32f1_clock_init();
 
   // Enable All GPIOs clocks
@@ -60,7 +56,7 @@ void board_init(void)
   __HAL_RCC_GPIOC_CLK_ENABLE();
   __HAL_RCC_GPIOD_CLK_ENABLE();
 
-#if CFG_TUSB_OS  == OPT_OS_NONE
+#if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 
@@ -72,7 +68,7 @@ void board_init(void)
 #endif
 
   // LED
-  GPIO_InitTypeDef  GPIO_InitStruct;
+  GPIO_InitTypeDef GPIO_InitStruct;
   GPIO_InitStruct.Pin = LED_PIN;
   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
   GPIO_InitStruct.Pull = LED_STATE_ON ? GPIO_PULLDOWN : GPIO_PULLUP;
@@ -102,56 +98,59 @@ void board_init(void)
 // Board porting API
 //--------------------------------------------------------------------+
 
-void board_led_write(bool state)
-{
-  GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1-LED_STATE_ON));
+void board_led_write(bool state) {
+  GPIO_PinState pin_state = (GPIO_PinState)(state ? LED_STATE_ON : (1 - LED_STATE_ON));
   HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
 }
 
-uint32_t board_button_read(void)
-{
+uint32_t board_button_read(void) {
   return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
 }
 
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  (void) max_len;
+  volatile uint32_t * stm32_uuid = (volatile uint32_t *) UID_BASE;
+  uint32_t* id32 = (uint32_t*) (uintptr_t) id;
+  uint8_t const len = 12;
+
+  id32[0] = stm32_uuid[0];
+  id32[1] = stm32_uuid[1];
+  id32[2] = stm32_uuid[2];
+
+  return len;
+}
+
+int board_uart_read(uint8_t *buf, int len) {
+  (void) buf;
+  (void) len;
   return 0;
 }
 
-int board_uart_write(void const * buf, int len)
-{
-  (void) buf; (void) len;
+int board_uart_write(void const *buf, int len) {
+  (void) buf;
+  (void) len;
   return 0;
 }
 
-#if CFG_TUSB_OS  == OPT_OS_NONE
+#if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
+
+void SysTick_Handler(void) {
   HAL_IncTick();
   system_ticks++;
 }
 
-uint32_t board_millis(void)
-{
+uint32_t board_millis(void) {
   return system_ticks;
 }
+
 #endif
 
-void HardFault_Handler (void)
-{
+void HardFault_Handler(void) {
   __asm("BKPT #0\n");
 }
 
 #ifdef  USE_FULL_ASSERT
-/**
-  * @brief  Reports the name of the source file and the source line number
-  *         where the assert_param error has occurred.
-  * @param  file: pointer to the source file name
-  * @param  line: assert_param error line source number
-  * @retval None
-  */
 void assert_failed(const char *file, uint32_t line)
 {
   /* USER CODE BEGIN 6 */
@@ -163,7 +162,5 @@ void assert_failed(const char *file, uint32_t line)
 
 // Required by __libc_init_array in startup code if we are compiling using
 // -nostdlib/-nostartfiles.
-void _init(void)
-{
-
+void _init(void) {
 }
diff --git a/hw/bsp/stm32f7/family.c b/hw/bsp/stm32f7/family.c
index 0e9471f33..b504c435a 100644
--- a/hw/bsp/stm32f7/family.c
+++ b/hw/bsp/stm32f7/family.c
@@ -33,15 +33,13 @@
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
-void OTG_FS_IRQHandler(void)
-{
+void OTG_FS_IRQHandler(void) {
   tud_int_handler(0);
 }
 
 // Despite being call USB2_OTG
 // OTG_HS is marked as RHPort1 by TinyUSB to be consistent across stm32 port
-void OTG_HS_IRQHandler(void)
-{
+void OTG_HS_IRQHandler(void) {
   tud_int_handler(1);
 }
 
@@ -51,8 +49,7 @@ void OTG_HS_IRQHandler(void)
 
 UART_HandleTypeDef UartHandle;
 
-void board_init(void)
-{
+void board_init(void) {
   board_clock_init();
 
   // Enable All GPIOs clocks
@@ -68,7 +65,7 @@ void board_init(void)
   __HAL_RCC_GPIOJ_CLK_ENABLE();
 #endif
 
-  UART_CLK_EN();
+      UART_CLK_EN();
 
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
@@ -83,7 +80,7 @@ void board_init(void)
   NVIC_SetPriority(OTG_HS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
 #endif
 
-  GPIO_InitTypeDef  GPIO_InitStruct;
+  GPIO_InitTypeDef GPIO_InitStruct;
 
   // LED
   GPIO_InitStruct.Pin = LED_PIN;
@@ -100,28 +97,28 @@ void board_init(void)
   HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
 
   // Uart TX
-  GPIO_InitStruct.Pin       = UART_TX_PIN;
-  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
-  GPIO_InitStruct.Pull      = GPIO_PULLUP;
-  GPIO_InitStruct.Speed     = GPIO_SPEED_FREQ_HIGH;
+  GPIO_InitStruct.Pin = UART_TX_PIN;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_PULLUP;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   GPIO_InitStruct.Alternate = UART_GPIO_AF;
   HAL_GPIO_Init(UART_TX_PORT, &GPIO_InitStruct);
 
   // Uart RX
-  GPIO_InitStruct.Pin       = UART_RX_PIN;
-  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
-  GPIO_InitStruct.Pull      = GPIO_PULLUP;
-  GPIO_InitStruct.Speed     = GPIO_SPEED_FREQ_HIGH;
+  GPIO_InitStruct.Pin = UART_RX_PIN;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_PULLUP;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   GPIO_InitStruct.Alternate = UART_GPIO_AF;
   HAL_GPIO_Init(UART_RX_PORT, &GPIO_InitStruct);
 
-  UartHandle.Instance          = UART_DEV;
-  UartHandle.Init.BaudRate     = CFG_BOARD_UART_BAUDRATE;
-  UartHandle.Init.WordLength   = UART_WORDLENGTH_8B;
-  UartHandle.Init.StopBits     = UART_STOPBITS_1;
-  UartHandle.Init.Parity       = UART_PARITY_NONE;
-  UartHandle.Init.HwFlowCtl    = UART_HWCONTROL_NONE;
-  UartHandle.Init.Mode         = UART_MODE_TX_RX;
+  UartHandle.Instance = UART_DEV;
+  UartHandle.Init.BaudRate = CFG_BOARD_UART_BAUDRATE;
+  UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
+  UartHandle.Init.StopBits = UART_STOPBITS_1;
+  UartHandle.Init.Parity = UART_PARITY_NONE;
+  UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  UartHandle.Init.Mode = UART_MODE_TX_RX;
   UartHandle.Init.OverSampling = UART_OVERSAMPLING_16;
   HAL_UART_Init(&UartHandle);
 
@@ -205,46 +202,46 @@ void board_init(void)
   // MUC with external ULPI PHY
 
   /* ULPI CLK */
-  GPIO_InitStruct.Pin       = GPIO_PIN_5;
-  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
-  GPIO_InitStruct.Pull      = GPIO_NOPULL;
-  GPIO_InitStruct.Speed     = GPIO_SPEED_FREQ_HIGH;
+  GPIO_InitStruct.Pin = GPIO_PIN_5;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
   /* ULPI D0 */
-  GPIO_InitStruct.Pin       = GPIO_PIN_3;
-  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
-  GPIO_InitStruct.Pull      = GPIO_NOPULL;
-  GPIO_InitStruct.Speed     = GPIO_SPEED_FREQ_HIGH;
+  GPIO_InitStruct.Pin = GPIO_PIN_3;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
   /* ULPI D1 D2 D3 D4 D5 D6 D7 */
-  GPIO_InitStruct.Pin       = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_5;
-  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
-  GPIO_InitStruct.Pull      = GPIO_NOPULL;
+  GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_5;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
   GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
   HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 
   /* ULPI STP */
-  GPIO_InitStruct.Pin       = GPIO_PIN_0 | GPIO_PIN_2;
-  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
-  GPIO_InitStruct.Pull      = GPIO_NOPULL;
+  GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_2;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
   GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
   HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 
   /* NXT */
-  GPIO_InitStruct.Pin       = GPIO_PIN_4;
-  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
-  GPIO_InitStruct.Pull      = GPIO_NOPULL;
+  GPIO_InitStruct.Pin = GPIO_PIN_4;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
   GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
   HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
 
   /* ULPI DIR */
-  GPIO_InitStruct.Pin       = GPIO_PIN_11;
-  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
-  GPIO_InitStruct.Pull      = GPIO_NOPULL;
+  GPIO_InitStruct.Pin = GPIO_PIN_11;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
   GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
   HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
   #endif // USB_HS_PHYC
@@ -276,51 +273,58 @@ void board_init(void)
 // Board porting API
 //--------------------------------------------------------------------+
 
-void board_led_write(bool state)
-{
-  GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1-LED_STATE_ON));
+void board_led_write(bool state) {
+  GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1 - LED_STATE_ON));
   HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
 }
 
-uint32_t board_button_read(void)
-{
+uint32_t board_button_read(void) {
   return HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
 }
 
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  (void) max_len;
+  volatile uint32_t * stm32_uuid = (volatile uint32_t *) UID_BASE;
+  uint32_t* id32 = (uint32_t*) (uintptr_t) id;
+  uint8_t const len = 12;
+
+  id32[0] = stm32_uuid[0];
+  id32[1] = stm32_uuid[1];
+  id32[2] = stm32_uuid[2];
 
-int board_uart_write(void const * buf, int len)
-{
-  HAL_UART_Transmit(&UartHandle, (uint8_t*)(uintptr_t) buf, len, 0xffff);
   return len;
 }
 
-#if CFG_TUSB_OS  == OPT_OS_NONE
+int board_uart_read(uint8_t *buf, int len) {
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+int board_uart_write(void const *buf, int len) {
+  HAL_UART_Transmit(&UartHandle, (uint8_t *) (uintptr_t) buf, len, 0xffff);
+  return len;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
+
+void SysTick_Handler(void) {
   HAL_IncTick();
   system_ticks++;
 }
 
-uint32_t board_millis(void)
-{
+uint32_t board_millis(void) {
   return system_ticks;
 }
+
 #endif
 
-void HardFault_Handler (void)
-{
+void HardFault_Handler(void) {
   __asm("BKPT #0\n");
 }
 
 // Required by __libc_init_array in startup code if we are compiling using
 // -nostdlib/-nostartfiles.
-void _init(void)
-{
-
+void _init(void) {
 }
diff --git a/hw/bsp/stm32g0/family.c b/hw/bsp/stm32g0/family.c
index e001425ed..3730e44aa 100644
--- a/hw/bsp/stm32g0/family.c
+++ b/hw/bsp/stm32g0/family.c
@@ -32,8 +32,7 @@
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
-void USB_UCPD1_2_IRQHandler(void)
-{
+void USB_UCPD1_2_IRQHandler(void) {
   tud_int_handler(0);
 }
 
@@ -42,8 +41,7 @@ void USB_UCPD1_2_IRQHandler(void)
 //--------------------------------------------------------------------+
 UART_HandleTypeDef UartHandle;
 
-void board_init(void)
-{
+void board_init(void) {
   HAL_Init(); // required for HAL_RCC_Osc TODO check with freeRTOS
   board_clock_init();
 
@@ -70,7 +68,7 @@ void board_init(void)
   NVIC_SetPriority(USB_UCPD1_2_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
 #endif
 
-  GPIO_InitTypeDef  GPIO_InitStruct;
+  GPIO_InitTypeDef GPIO_InitStruct;
 
   // LED
   GPIO_InitStruct.Pin = LED_PIN;
@@ -130,56 +128,66 @@ void board_init(void)
 // Board porting API
 //--------------------------------------------------------------------+
 
-void board_led_write(bool state)
-{
-  GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1-LED_STATE_ON));
+void board_led_write(bool state) {
+  GPIO_PinState pin_state = (GPIO_PinState)(state ? LED_STATE_ON : (1 - LED_STATE_ON));
   HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
 }
 
-uint32_t board_button_read(void)
-{
+uint32_t board_button_read(void) {
   return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
 }
 
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  (void) max_len;
+  volatile uint32_t * stm32_uuid = (volatile uint32_t *) UID_BASE;
+  uint32_t* id32 = (uint32_t*) (uintptr_t) id;
+  uint8_t const len = 12;
+
+  id32[0] = stm32_uuid[0];
+  id32[1] = stm32_uuid[1];
+  id32[2] = stm32_uuid[2];
+
+  return len;
+}
+
+int board_uart_read(uint8_t *buf, int len) {
+  (void) buf;
+  (void) len;
   return 0;
 }
 
-int board_uart_write(void const * buf, int len)
-{
+int board_uart_write(void const *buf, int len) {
 #ifdef UART_DEV
   HAL_UART_Transmit(&UartHandle, (uint8_t*)(uintptr_t) buf, len, 0xffff);
   return len;
 #else
-  (void) buf; (void) len; (void) UartHandle;
+  (void) buf;
+  (void) len;
+  (void) UartHandle;
   return 0;
 #endif
 }
 
-#if CFG_TUSB_OS  == OPT_OS_NONE
+#if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
+
+void SysTick_Handler(void) {
   system_ticks++;
   HAL_IncTick();
 }
 
-uint32_t board_millis(void)
-{
+uint32_t board_millis(void) {
   return system_ticks;
 }
+
 #endif
 
-void HardFault_Handler (void)
-{
+void HardFault_Handler(void) {
   __asm("BKPT #0\n");
 }
 
 // Required by __libc_init_array in startup code if we are compiling using
 // -nostdlib/-nostartfiles.
-void _init(void)
-{
+void _init(void) {
 
 }
diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c
index a088a0062..39be0249a 100644
--- a/hw/bsp/stm32g4/family.c
+++ b/hw/bsp/stm32g4/family.c
@@ -33,18 +33,15 @@
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
-void USB_HP_IRQHandler(void)
-{
+void USB_HP_IRQHandler(void) {
   tud_int_handler(0);
 }
 
-void USB_LP_IRQHandler(void)
-{
+void USB_LP_IRQHandler(void) {
   tud_int_handler(0);
 }
 
-void USBWakeUp_IRQHandler(void)
-{
+void USBWakeUp_IRQHandler(void) {
   tud_int_handler(0);
 }
 
@@ -58,8 +55,7 @@ void UCPD1_IRQHandler(void) {
 //--------------------------------------------------------------------+
 UART_HandleTypeDef UartHandle;
 
-void board_init(void)
-{
+void board_init(void) {
   HAL_Init();
   board_clock_init();
 
@@ -162,56 +158,65 @@ void board_init(void)
 // Board porting API
 //--------------------------------------------------------------------+
 
-void board_led_write(bool state)
-{
-  GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1-LED_STATE_ON));
+void board_led_write(bool state) {
+  GPIO_PinState pin_state = (GPIO_PinState)(state ? LED_STATE_ON : (1 - LED_STATE_ON));
   HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
 }
 
-uint32_t board_button_read(void)
-{
+uint32_t board_button_read(void) {
   return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
 }
 
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  (void) max_len;
+  volatile uint32_t * stm32_uuid = (volatile uint32_t *) UID_BASE;
+  uint32_t* id32 = (uint32_t*) (uintptr_t) id;
+  uint8_t const len = 12;
+
+  id32[0] = stm32_uuid[0];
+  id32[1] = stm32_uuid[1];
+  id32[2] = stm32_uuid[2];
+
+  return len;
+}
+
+int board_uart_read(uint8_t *buf, int len) {
+  (void) buf;
+  (void) len;
   return 0;
 }
 
-int board_uart_write(void const * buf, int len)
-{
+int board_uart_write(void const *buf, int len) {
 #ifdef UART_DEV
   HAL_UART_Transmit(&UartHandle, (uint8_t*)(uintptr_t) buf, len, 0xffff);
   return len;
 #else
-  (void) buf; (void) len; (void) UartHandle;
+  (void) buf;
+  (void) len;
+  (void) UartHandle;
   return 0;
 #endif
 }
 
-#if CFG_TUSB_OS  == OPT_OS_NONE
+#if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
+
+void SysTick_Handler(void) {
   HAL_IncTick();
   system_ticks++;
 }
 
-uint32_t board_millis(void)
-{
+uint32_t board_millis(void) {
   return system_ticks;
 }
+
 #endif
 
-void HardFault_Handler (void)
-{
+void HardFault_Handler(void) {
   __asm("BKPT #0\n");
 }
 
 // Required by __libc_init_array in startup code if we are compiling using
 // -nostdlib/-nostartfiles.
-void _init(void)
-{
-
+void _init(void) {
 }
diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c
index 535d586ee..309a4239e 100644
--- a/hw/bsp/stm32h7/family.c
+++ b/hw/bsp/stm32h7/family.c
@@ -37,15 +37,13 @@
 
 // Despite being call USB2_OTG
 // OTG_FS is marked as RHPort0 by TinyUSB to be consistent across stm32 port
-void OTG_FS_IRQHandler(void)
-{
+void OTG_FS_IRQHandler(void) {
   tud_int_handler(0);
 }
 
 // Despite being call USB2_OTG
 // OTG_HS is marked as RHPort1 by TinyUSB to be consistent across stm32 port
-void OTG_HS_IRQHandler(void)
-{
+void OTG_HS_IRQHandler(void) {
   tud_int_handler(1);
 }
 
@@ -80,8 +78,7 @@ void trace_etm_init(void) {
   #define trace_etm_init()
 #endif
 
-void board_init(void)
-{
+void board_init(void) {
   board_stm32h7_clock_init();
 
   // Enable All GPIOs clocks
@@ -118,37 +115,37 @@ void board_init(void)
   NVIC_SetPriority(OTG_HS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
 #endif
 
-  GPIO_InitTypeDef  GPIO_InitStruct;
+  GPIO_InitTypeDef GPIO_InitStruct;
 
   // LED
-  GPIO_InitStruct.Pin   = LED_PIN;
-  GPIO_InitStruct.Mode  = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull  = GPIO_PULLUP;
+  GPIO_InitStruct.Pin = LED_PIN;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_PULLUP;
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
 
   // Button
-  GPIO_InitStruct.Pin   = BUTTON_PIN;
-  GPIO_InitStruct.Mode  = GPIO_MODE_INPUT;
-  GPIO_InitStruct.Pull  = GPIO_NOPULL;
+  GPIO_InitStruct.Pin = BUTTON_PIN;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
 
   // Uart
-  GPIO_InitStruct.Pin       = UART_TX_PIN | UART_RX_PIN;
-  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
-  GPIO_InitStruct.Pull      = GPIO_PULLUP;
-  GPIO_InitStruct.Speed     = GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_PULLUP;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
   GPIO_InitStruct.Alternate = UART_GPIO_AF;
   HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
 
-  UartHandle.Instance        = UART_DEV;
-  UartHandle.Init.BaudRate   = CFG_BOARD_UART_BAUDRATE;
+  UartHandle.Instance = UART_DEV;
+  UartHandle.Init.BaudRate = CFG_BOARD_UART_BAUDRATE;
   UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
-  UartHandle.Init.StopBits   = UART_STOPBITS_1;
-  UartHandle.Init.Parity     = UART_PARITY_NONE;
-  UartHandle.Init.HwFlowCtl  = UART_HWCONTROL_NONE;
-  UartHandle.Init.Mode       = UART_MODE_TX_RX;
+  UartHandle.Init.StopBits = UART_STOPBITS_1;
+  UartHandle.Init.Parity = UART_PARITY_NONE;
+  UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  UartHandle.Init.Mode = UART_MODE_TX_RX;
   UartHandle.Init.OverSampling = UART_OVERSAMPLING_16;
   HAL_UART_Init(&UartHandle);
 
@@ -249,52 +246,60 @@ void board_init(void)
 // Board porting API
 //--------------------------------------------------------------------+
 
-void board_led_write(bool state)
-{
-  GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1-LED_STATE_ON));
+void board_led_write(bool state) {
+  GPIO_PinState pin_state = (GPIO_PinState)(state ? LED_STATE_ON : (1 - LED_STATE_ON));
   HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
 }
 
-uint32_t board_button_read(void)
-{
+uint32_t board_button_read(void) {
   return (BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN)) ? 1 : 0;
 }
 
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  (void) max_len;
+  volatile uint32_t * stm32_uuid = (volatile uint32_t *) UID_BASE;
+  uint32_t* id32 = (uint32_t*) (uintptr_t) id;
+  uint8_t const len = 12;
+
+  id32[0] = stm32_uuid[0];
+  id32[1] = stm32_uuid[1];
+  id32[2] = stm32_uuid[2];
+
+  return len;
+}
+
+int board_uart_read(uint8_t *buf, int len) {
+  (void) buf;
+  (void) len;
   return 0;
 }
 
-int board_uart_write(void const * buf, int len)
-{
-  HAL_UART_Transmit(&UartHandle, (uint8_t*)(uintptr_t) buf, len, 0xffff);
+int board_uart_write(void const *buf, int len) {
+  HAL_UART_Transmit(&UartHandle, (uint8_t * )(uintptr_t)
+  buf, len, 0xffff);
   return len;
 }
 
 
 #if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
-void SysTick_Handler(void)
-{
+
+void SysTick_Handler(void) {
   HAL_IncTick();
   system_ticks++;
 }
 
-uint32_t board_millis(void)
-{
+uint32_t board_millis(void) {
   return system_ticks;
 }
+
 #endif
 
-void HardFault_Handler(void)
-{
+void HardFault_Handler(void) {
   __asm("BKPT #0\n");
 }
 
 // Required by __libc_init_array in startup code if we are compiling using
 // -nostdlib/-nostartfiles.
-void _init(void)
-{
-
+void _init(void) {
 }
diff --git a/hw/bsp/stm32l4/family.c b/hw/bsp/stm32l4/family.c
index 1c6c595f1..965c4810a 100644
--- a/hw/bsp/stm32l4/family.c
+++ b/hw/bsp/stm32l4/family.c
@@ -188,9 +188,8 @@ uint32_t board_button_read(void) {
 size_t board_get_unique_id(uint8_t id[], size_t max_len) {
   (void) max_len;
   volatile uint32_t * stm32_uuid = (volatile uint32_t *) UID_BASE;
-
-  uint8_t const len = 12;
   uint32_t* id32 = (uint32_t*) (uintptr_t) id;
+  uint8_t const len = 12;
 
   id32[0] = stm32_uuid[0];
   id32[1] = stm32_uuid[1];

From 67ff3f7845e2e2c4b95ce4ff91357257faf3080f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 4 Aug 2023 00:37:01 +0700
Subject: [PATCH 570/691] more clean up

---
 .idea/cmake.xml                    | 12 ++++++------
 .idea/runConfigurations/ra4m1.xml  |  2 +-
 .idea/runConfigurations/ra6m1.xml  |  2 +-
 .idea/runConfigurations/ra6m5.xml  |  2 +-
 .idea/runConfigurations/uno_r4.xml |  2 +-
 5 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 7d1260893..b1d024b81 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -2,8 +2,6 @@
 <project version="4">
   <component name="CMakeSharedSettings">
     <configurations>
-      <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10056 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10095 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="esp32s2" ENABLED="false" GENERATION_OPTIONS="-DBOARD=espressif_saola_1 -DIDF_TARGET=esp32s2">
         <ADDITIONAL_GENERATION_ENVIRONMENT>
           <envs>
@@ -24,23 +22,27 @@
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
-      <configuration PROFILE_NAME="rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico -DLOG=2" />
+      <configuration PROFILE_NAME="rp2040" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico -DLOG=2" />
+      <configuration PROFILE_NAME="feather_rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pico_sdk -DPICO_BOARD=adafruit_feather_rp2040" />
       <configuration PROFILE_NAME="metro m7 1011" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1010_evk -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="rt1060 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1060_evk -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="mcb1800" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mcb1800 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="ea4088 quickstart" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ea4088_quickstart -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="ea4357" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ea4357 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="lpc55s69" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso55s69" />
       <configuration PROFILE_NAME="mcxn947" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mcxn947brk -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10056 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10095 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="stm32g0b1nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32g0b1nucleo" />
       <configuration PROFILE_NAME="stm32g474nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32g474nucleo" />
       <configuration PROFILE_NAME="b_g474e_dpow1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=b_g474e_dpow1 -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="b_g474e_dpow1 iar" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=b_g474e_dpow1 -DTOOLCHAIN=iar" />
       <configuration PROFILE_NAME="frdm_kl25z" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=frdm_kl25z -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="stm32h743eval" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h743eval -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="stm32f072disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f072disco" />
       <configuration PROFILE_NAME="stm32f103_mini_2" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f103_mini_2" />
       <configuration PROFILE_NAME="stm32f769disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f769disco -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="stm32h743eval" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h743eval -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="stm32l476disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32l476disco" />
       <configuration PROFILE_NAME="ra4m1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra4m1_ek -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="ra6m1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m1_ek -DLOG=3 -DLOGGER=RTT" />
@@ -48,8 +50,6 @@
       <configuration PROFILE_NAME="ra6m5 PORT0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1 -DPORT=0" />
       <configuration PROFILE_NAME="uno_r4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=uno_r4 -DLOG=4 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="portenta_c33" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=portenta_c33 -DLOG=3" />
-      <configuration PROFILE_NAME="ea4357" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ea4357 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="feather_rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pico_sdk -DPICO_BOARD=adafruit_feather_rp2040" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/.idea/runConfigurations/ra4m1.xml b/.idea/runConfigurations/ra4m1.xml
index 149a157c4..561b509a2 100644
--- a/.idea/runConfigurations/ra4m1.xml
+++ b/.idea/runConfigurations/ra4m1.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="ra4m1" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA4M1AB&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $PROJECT_DIR$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="ra4m1" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA4M1AB&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $PROJECT_DIR$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/ra6m1.xml b/.idea/runConfigurations/ra6m1.xml
index 57af9abd9..099510c60 100644
--- a/.idea/runConfigurations/ra6m1.xml
+++ b/.idea/runConfigurations/ra6m1.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="ra6m1" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA6M1AD&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $PROJECT_DIR$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="ra6m1" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA6M1AD&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $PROJECT_DIR$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/ra6m5.xml b/.idea/runConfigurations/ra6m5.xml
index 1a6358304..0cffac135 100644
--- a/.idea/runConfigurations/ra6m5.xml
+++ b/.idea/runConfigurations/ra6m5.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="ra6m5" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA6M5BH&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $PROJECT_DIR$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc_hid" CONFIG_NAME="ra6m5" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc_hid">
+  <configuration default="false" name="ra6m5" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA6M5BH&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $PROJECT_DIR$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/uno_r4.xml b/.idea/runConfigurations/uno_r4.xml
index 9982f4039..e9e1ebb8d 100644
--- a/.idea/runConfigurations/uno_r4.xml
+++ b/.idea/runConfigurations/uno_r4.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="uno_r4" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA4M1AB&quot; -if swd -speed 20000 -port 25321 -nogui -singlerun -jlinkscriptfile $PROJECT_DIR$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="cdc_msc" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="cdc_msc" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="uno_r4" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA4M1AB&quot; -if swd -speed 20000 -port 25321 -nogui -singlerun -jlinkscriptfile $PROJECT_DIR$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>

From 9697c4df4e57435781119c0d4716635f344ed8f1 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 4 Aug 2023 10:28:24 +0700
Subject: [PATCH 571/691] update all examples to use unique ID as serial if
 avaialble

---
 .../audio_4_channel_mic/src/usb_descriptors.c |  72 +++++----
 .../device/audio_test/src/usb_descriptors.c   |  68 ++++----
 .../src/usb_descriptors.c                     |  68 ++++----
 .../cdc_dual_ports/src/usb_descriptors.c      |  65 ++++----
 examples/device/cdc_msc/src/usb_descriptors.c | 145 ++++++++----------
 .../cdc_msc_freertos/src/usb_descriptors.c    |  63 +++++---
 .../device/cdc_uac2/src/usb_descriptors.c     |  64 +++++---
 examples/device/dfu/src/usb_descriptors.c     |  66 ++++----
 .../device/dfu_runtime/src/usb_descriptors.c  |  66 ++++----
 .../src/usb_descriptors.c                     |  64 ++++----
 .../hid_boot_interface/src/usb_descriptors.c  |  63 +++++---
 .../hid_composite/src/usb_descriptors.c       |  63 +++++---
 .../src/usb_descriptors.c                     |  63 +++++---
 .../hid_generic_inout/src/usb_descriptors.c   |  63 +++++---
 .../src/usb_descriptors.c                     |  63 +++++---
 .../device/midi_test/src/usb_descriptors.c    |  65 ++++----
 .../device/msc_dual_lun/src/usb_descriptors.c |  63 +++++---
 .../net_lwip_webserver/src/usb_descriptors.c  |  68 ++++----
 .../device/uac2_headset/src/usb_descriptors.c |  64 +++++---
 examples/device/usbtmc/src/usb_descriptors.c  |  66 ++++----
 .../video_capture/src/usb_descriptors.c       |  63 +++++---
 .../webusb_serial/src/usb_descriptors.c       |  63 +++++---
 .../src/usb_descriptors.c                     |  63 +++++---
 23 files changed, 917 insertions(+), 654 deletions(-)

diff --git a/examples/device/audio_4_channel_mic/src/usb_descriptors.c b/examples/device/audio_4_channel_mic/src/usb_descriptors.c
index b77da9fac..728a5f9ce 100644
--- a/examples/device/audio_4_channel_mic/src/usb_descriptors.c
+++ b/examples/device/audio_4_channel_mic/src/usb_descriptors.c
@@ -23,6 +23,7 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 /* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
@@ -116,50 +117,63 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
-// array of pointer to string descriptors
-char const* string_desc_arr [] =
-{
-    (const char[]) { 0x09, 0x04 }, 	// 0: is supported language is English (0x0409)
-    "PaniRCorp",                   	// 1: Manufacturer
-    "MicNode_4_Ch",    		// 2: Product
-    "123458",                      	// 3: Serials, should use chip ID
-    "UAC2",                 	 	// 4: Audio Interface
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
 };
 
-static uint16_t _desc_str[32];
+// array of pointer to string descriptors
+char const* string_desc_arr [] = {
+    (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
+    "PaniRCorp",                   // 1: Manufacturer
+    "MicNode_4_Ch",                // 2: Product
+    NULL,                          // 3: Serials will use unique ID if possible
+    "UAC2",                        // 4: Audio Interface
+};
+
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
+  size_t chr_count;
 
-  uint8_t chr_count;
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-  if ( index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }else
-  {
-    // Convert ASCII string into UTF-16
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    const char* str = string_desc_arr[index];
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > 31 ) chr_count = 31;
+      const char *str = string_desc_arr[index];
 
-    for(uint8_t i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/audio_test/src/usb_descriptors.c b/examples/device/audio_test/src/usb_descriptors.c
index cc364ee88..9864377f6 100644
--- a/examples/device/audio_test/src/usb_descriptors.c
+++ b/examples/device/audio_test/src/usb_descriptors.c
@@ -23,6 +23,7 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 /* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
@@ -116,50 +117,65 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
 char const* string_desc_arr [] =
 {
-    (const char[]) { 0x09, 0x04 }, 	// 0: is supported language is English (0x0409)
-    "PaniRCorp",                   	// 1: Manufacturer
-    "MicNode",              		// 2: Product
-    "123456",                      	// 3: Serials, should use chip ID
-    "UAC2",                 	 	// 4: Audio Interface
+    (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
+    "PaniRCorp",                   // 1: Manufacturer
+    "MicNode",                     // 2: Product
+    NULL,                          // 3: Serials will use unique ID if possible
+    "UAC2",                        // 4: Audio Interface
+
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
+  size_t chr_count;
 
-  uint8_t chr_count;
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-  if ( index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }else
-  {
-    // Convert ASCII string into UTF-16
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    const char* str = string_desc_arr[index];
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > 31 ) chr_count = 31;
+      const char *str = string_desc_arr[index];
 
-    for(uint8_t i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/audio_test_multi_rate/src/usb_descriptors.c b/examples/device/audio_test_multi_rate/src/usb_descriptors.c
index 2c72edb17..f50e70a25 100644
--- a/examples/device/audio_test_multi_rate/src/usb_descriptors.c
+++ b/examples/device/audio_test_multi_rate/src/usb_descriptors.c
@@ -24,6 +24,7 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "usb_descriptors.h"
 
@@ -120,50 +121,65 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
 char const* string_desc_arr [] =
 {
-    (const char[]) { 0x09, 0x04 }, 	// 0: is supported language is English (0x0409)
-    "PaniRCorp",                   	// 1: Manufacturer
-    "MicNode",              		// 2: Product
-    "123456",                      	// 3: Serials, should use chip ID
-    "UAC2",                 	 	// 4: Audio Interface
+    (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
+    "PaniRCorp",                   // 1: Manufacturer
+    "MicNode",                     // 2: Product
+    NULL,                          // 3: Serials will use unique ID if possible
+    "UAC2",                        // 4: Audio Interface
+
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
+  size_t chr_count;
 
-  uint8_t chr_count;
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-  if ( index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }else
-  {
-    // Convert ASCII string into UTF-16
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    const char* str = string_desc_arr[index];
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > 31 ) chr_count = 31;
+      const char *str = string_desc_arr[index];
 
-    for(uint8_t i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/cdc_dual_ports/src/usb_descriptors.c b/examples/device/cdc_dual_ports/src/usb_descriptors.c
index 8be404cc9..de2505c07 100644
--- a/examples/device/cdc_dual_ports/src/usb_descriptors.c
+++ b/examples/device/cdc_dual_ports/src/usb_descriptors.c
@@ -23,13 +23,14 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 /* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
  * Same VID/PID with different interface e.g MSC (first), then CDC (later) will possibly cause system error on PC.
  *
  * Auto ProductID layout's Bitmap:
- *   [MSB]       MIDI | HID | MSC | CDC          [LSB]
+ *   [MSB]         HID | MSC | CDC          [LSB]
  */
 #define _PID_MAP(itf, n)  ( (CFG_TUD_##itf) << (n) )
 #define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
@@ -213,52 +214,64 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
-char const* string_desc_arr [] =
+char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
   "TinyUSB Device",              // 2: Product
-  "123456",                      // 3: Serials, should use chip ID
+  NULL,                          // 3: Serials will use unique ID if possible
   "TinyUSB CDC",                 // 4: CDC Interface
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
+  size_t chr_count;
 
-  uint8_t chr_count;
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-  if ( index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }else
-  {
-    // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
-    // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    const char* str = string_desc_arr[index];
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > 31 ) chr_count = 31;
+      const char *str = string_desc_arr[index];
 
-    // Convert ASCII string into UTF-16
-    for(uint8_t i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/cdc_msc/src/usb_descriptors.c b/examples/device/cdc_msc/src/usb_descriptors.c
index baf919f84..2afa24903 100644
--- a/examples/device/cdc_msc/src/usb_descriptors.c
+++ b/examples/device/cdc_msc/src/usb_descriptors.c
@@ -42,35 +42,33 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
-{
-  .bLength            = sizeof(tusb_desc_device_t),
-  .bDescriptorType    = TUSB_DESC_DEVICE,
-  .bcdUSB             = USB_BCD,
+tusb_desc_device_t const desc_device = {
+    .bLength            = sizeof(tusb_desc_device_t),
+    .bDescriptorType    = TUSB_DESC_DEVICE,
+    .bcdUSB             = USB_BCD,
 
-  // Use Interface Association Descriptor (IAD) for CDC
-  // As required by USB Specs IAD's subclass must be common class (2) and protocol must be IAD (1)
-  .bDeviceClass       = TUSB_CLASS_MISC,
-  .bDeviceSubClass    = MISC_SUBCLASS_COMMON,
-  .bDeviceProtocol    = MISC_PROTOCOL_IAD,
+    // Use Interface Association Descriptor (IAD) for CDC
+    // As required by USB Specs IAD's subclass must be common class (2) and protocol must be IAD (1)
+    .bDeviceClass       = TUSB_CLASS_MISC,
+    .bDeviceSubClass    = MISC_SUBCLASS_COMMON,
+    .bDeviceProtocol    = MISC_PROTOCOL_IAD,
 
-  .bMaxPacketSize0    = CFG_TUD_ENDPOINT0_SIZE,
+    .bMaxPacketSize0    = CFG_TUD_ENDPOINT0_SIZE,
 
-  .idVendor           = USB_VID,
-  .idProduct          = USB_PID,
-  .bcdDevice          = 0x0100,
+    .idVendor           = USB_VID,
+    .idProduct          = USB_PID,
+    .bcdDevice          = 0x0100,
 
-  .iManufacturer      = 0x01,
-  .iProduct           = 0x02,
-  .iSerialNumber      = 0x03,
+    .iManufacturer      = 0x01,
+    .iProduct           = 0x02,
+    .iSerialNumber      = 0x03,
 
-  .bNumConfigurations = 0x01
+    .bNumConfigurations = 0x01
 };
 
 // Invoked when received GET DEVICE DESCRIPTOR
 // Application return pointer to descriptor
-uint8_t const * tud_descriptor_device_cb(void)
-{
+uint8_t const *tud_descriptor_device_cb(void) {
   return (uint8_t const *) &desc_device;
 }
 
@@ -78,8 +76,7 @@ uint8_t const * tud_descriptor_device_cb(void)
 // Configuration Descriptor
 //--------------------------------------------------------------------+
 
-enum
-{
+enum {
   ITF_NUM_CDC = 0,
   ITF_NUM_CDC_DATA,
   ITF_NUM_MSC,
@@ -96,7 +93,7 @@ enum
   #define EPNUM_MSC_OUT     0x05
   #define EPNUM_MSC_IN      0x85
 
-#elif CFG_TUSB_MCU == OPT_MCU_SAMG  || CFG_TUSB_MCU ==  OPT_MCU_SAMX7X
+#elif CFG_TUSB_MCU == OPT_MCU_SAMG || CFG_TUSB_MCU == OPT_MCU_SAMX7X
   // SAMG & SAME70 don't support a same endpoint number with different direction IN and OUT
   //    e.g EP1 OUT & EP1 IN cannot exist together
   #define EPNUM_CDC_NOTIF   0x81
@@ -141,67 +138,62 @@ enum
 #define CONFIG_TOTAL_LEN    (TUD_CONFIG_DESC_LEN + TUD_CDC_DESC_LEN + TUD_MSC_DESC_LEN)
 
 // full speed configuration
-uint8_t const desc_fs_configuration[] =
-{
-  // Config number, interface count, string index, total length, attribute, power in mA
-  TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
+uint8_t const desc_fs_configuration[] = {
+    // Config number, interface count, string index, total length, attribute, power in mA
+    TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
-  // Interface number, string index, EP notification address and size, EP data address (out, in) and size.
-  TUD_CDC_DESCRIPTOR(ITF_NUM_CDC, 4, EPNUM_CDC_NOTIF, 8, EPNUM_CDC_OUT, EPNUM_CDC_IN, 64),
+    // Interface number, string index, EP notification address and size, EP data address (out, in) and size.
+    TUD_CDC_DESCRIPTOR(ITF_NUM_CDC, 4, EPNUM_CDC_NOTIF, 8, EPNUM_CDC_OUT, EPNUM_CDC_IN, 64),
 
-  // Interface number, string index, EP Out & EP In address, EP size
-  TUD_MSC_DESCRIPTOR(ITF_NUM_MSC, 5, EPNUM_MSC_OUT, EPNUM_MSC_IN, 64),
+    // Interface number, string index, EP Out & EP In address, EP size
+    TUD_MSC_DESCRIPTOR(ITF_NUM_MSC, 5, EPNUM_MSC_OUT, EPNUM_MSC_IN, 64),
 };
 
 #if TUD_OPT_HIGH_SPEED
 // Per USB specs: high speed capable device must report device_qualifier and other_speed_configuration
 
 // high speed configuration
-uint8_t const desc_hs_configuration[] =
-{
-  // Config number, interface count, string index, total length, attribute, power in mA
-  TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
+uint8_t const desc_hs_configuration[] = {
+    // Config number, interface count, string index, total length, attribute, power in mA
+    TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
-  // Interface number, string index, EP notification address and size, EP data address (out, in) and size.
-  TUD_CDC_DESCRIPTOR(ITF_NUM_CDC, 4, EPNUM_CDC_NOTIF, 8, EPNUM_CDC_OUT, EPNUM_CDC_IN, 512),
+    // Interface number, string index, EP notification address and size, EP data address (out, in) and size.
+    TUD_CDC_DESCRIPTOR(ITF_NUM_CDC, 4, EPNUM_CDC_NOTIF, 8, EPNUM_CDC_OUT, EPNUM_CDC_IN, 512),
 
-  // Interface number, string index, EP Out & EP In address, EP size
-  TUD_MSC_DESCRIPTOR(ITF_NUM_MSC, 5, EPNUM_MSC_OUT, EPNUM_MSC_IN, 512),
+    // Interface number, string index, EP Out & EP In address, EP size
+    TUD_MSC_DESCRIPTOR(ITF_NUM_MSC, 5, EPNUM_MSC_OUT, EPNUM_MSC_IN, 512),
 };
 
 // other speed configuration
 uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN];
 
 // device qualifier is mostly similar to device descriptor since we don't change configuration based on speed
-tusb_desc_device_qualifier_t const desc_device_qualifier =
-{
-  .bLength            = sizeof(tusb_desc_device_qualifier_t),
-  .bDescriptorType    = TUSB_DESC_DEVICE_QUALIFIER,
-  .bcdUSB             = USB_BCD,
+tusb_desc_device_qualifier_t const desc_device_qualifier = {
+    .bLength            = sizeof(tusb_desc_device_qualifier_t),
+    .bDescriptorType    = TUSB_DESC_DEVICE_QUALIFIER,
+    .bcdUSB             = USB_BCD,
 
-  .bDeviceClass       = TUSB_CLASS_MISC,
-  .bDeviceSubClass    = MISC_SUBCLASS_COMMON,
-  .bDeviceProtocol    = MISC_PROTOCOL_IAD,
+    .bDeviceClass       = TUSB_CLASS_MISC,
+    .bDeviceSubClass    = MISC_SUBCLASS_COMMON,
+    .bDeviceProtocol    = MISC_PROTOCOL_IAD,
 
-  .bMaxPacketSize0    = CFG_TUD_ENDPOINT0_SIZE,
-  .bNumConfigurations = 0x01,
-  .bReserved          = 0x00
+    .bMaxPacketSize0    = CFG_TUD_ENDPOINT0_SIZE,
+    .bNumConfigurations = 0x01,
+    .bReserved          = 0x00
 };
 
 // Invoked when received GET DEVICE QUALIFIER DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete.
 // device_qualifier descriptor describes information about a high-speed capable device that would
 // change if the device were operating at the other speed. If not highspeed capable stall this request.
-uint8_t const* tud_descriptor_device_qualifier_cb(void)
-{
-  return (uint8_t const*) &desc_device_qualifier;
+uint8_t const *tud_descriptor_device_qualifier_cb(void) {
+  return (uint8_t const *) &desc_device_qualifier;
 }
 
 // Invoked when received GET OTHER SEED CONFIGURATION DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
 // Configuration descriptor in the other speed e.g if high speed then this is for full speed and vice versa
-uint8_t const* tud_descriptor_other_speed_configuration_cb(uint8_t index)
-{
+uint8_t const *tud_descriptor_other_speed_configuration_cb(uint8_t index) {
   (void) index; // for multiple configurations
 
   // if link speed is high return fullspeed config, and vice versa
@@ -221,13 +213,12 @@ uint8_t const* tud_descriptor_other_speed_configuration_cb(uint8_t index)
 // Invoked when received GET CONFIGURATION DESCRIPTOR
 // Application return pointer to descriptor
 // Descriptor contents must exist long enough for transfer to complete
-uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
-{
+uint8_t const *tud_descriptor_configuration_cb(uint8_t index) {
   (void) index; // for multiple configurations
 
 #if TUD_OPT_HIGH_SPEED
   // Although we are highspeed, host may be fullspeed.
-  return (tud_speed_get() == TUSB_SPEED_HIGH) ?  desc_hs_configuration : desc_fs_configuration;
+  return (tud_speed_get() == TUSB_SPEED_HIGH) ? desc_hs_configuration : desc_fs_configuration;
 #else
   return desc_fs_configuration;
 #endif
@@ -246,57 +237,55 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const* string_desc_arr [] =
-{
-  (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
-  "TinyUSB",                     // 1: Manufacturer
-  "TinyUSB Device",              // 2: Product
-  "123456789012",                // 3: Serials, should use chip ID
-  "TinyUSB CDC",                 // 4: CDC Interface
-  "TinyUSB MSC",                 // 5: MSC Interface
+char const *string_desc_arr[] = {
+    (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
+    "TinyUSB",                     // 1: Manufacturer
+    "TinyUSB Device",              // 2: Product
+    NULL,                          // 3: Serials will use unique ID if possible
+    "TinyUSB CDC",                 // 4: CDC Interface
+    "TinyUSB MSC",                 // 5: MSC Interface
 };
 
-static uint16_t _desc_str[32+1];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
-
   size_t chr_count;
 
-  switch(index) {
+  switch ( index ) {
     case STRID_LANGID:
       memcpy(&_desc_str[1], string_desc_arr[0], 2);
       chr_count = 1;
       break;
 
     case STRID_SERIAL:
-      chr_count = board_usb_get_serial(_desc_str+1, 32);
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
       break;
 
     default:
       // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
       // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-      if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-      const char* str = string_desc_arr[index];
+      const char *str = string_desc_arr[index];
 
       // Cap at max char
       chr_count = strlen(str);
-      if ( chr_count > 31 ) chr_count = 31;
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
 
       // Convert ASCII string into UTF-16
-      for(size_t i=0; i<chr_count; i++) {
-        _desc_str[1+i] = str[i];
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
       }
       break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/cdc_msc_freertos/src/usb_descriptors.c b/examples/device/cdc_msc_freertos/src/usb_descriptors.c
index 822442724..9c29701c7 100644
--- a/examples/device/cdc_msc_freertos/src/usb_descriptors.c
+++ b/examples/device/cdc_msc_freertos/src/usb_descriptors.c
@@ -23,6 +23,7 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 /* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
@@ -212,53 +213,65 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
-char const* string_desc_arr [] =
+char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
   "TinyUSB Device",              // 2: Product
-  "123456789012",                // 3: Serials, should use chip ID
+  NULL,                          // 3: Serials will use unique ID if possible
   "TinyUSB CDC",                 // 4: CDC Interface
   "TinyUSB MSC",                 // 5: MSC Interface
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
+  size_t chr_count;
 
-  uint8_t chr_count;
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-  if ( index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }else
-  {
-    // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
-    // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    const char* str = string_desc_arr[index];
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > 31 ) chr_count = 31;
+      const char *str = string_desc_arr[index];
 
-    // Convert ASCII string into UTF-16
-    for(uint8_t i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/cdc_uac2/src/usb_descriptors.c b/examples/device/cdc_uac2/src/usb_descriptors.c
index 58b711978..72a695622 100644
--- a/examples/device/cdc_uac2/src/usb_descriptors.c
+++ b/examples/device/cdc_uac2/src/usb_descriptors.c
@@ -25,6 +25,7 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "usb_descriptors.h"
 
@@ -150,53 +151,66 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
-char const* string_desc_arr [] =
+char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 },  // 0: is supported language is English (0x0409)
   "TinyUSB",                      // 1: Manufacturer
   "TinyUSB headset",              // 2: Product
-  "000001",                       // 3: Serials, should use chip ID
+  NULL,                           // 3: Serials will use unique ID if possible
   "TinyUSB Speakers",             // 4: Audio Interface
   "TinyUSB Microphone",           // 5: Audio Interface
   "TinyUSB CDC",                  // 6: Audio Interface
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
-  (void)langid;
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
+  (void) langid;
+  size_t chr_count;
 
-  uint8_t chr_count;
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-  if (index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }
-  else
-  {
-    // Convert ASCII string into UTF-16
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    if (!(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0]))) return NULL;
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    const char* str = string_desc_arr[index];
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if (chr_count > 31) chr_count = 31;
+      const char *str = string_desc_arr[index];
 
-    for (uint8_t i = 0; i < chr_count; i++)
-    {
-      _desc_str[1 + i] = str[i];
-    }
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/dfu/src/usb_descriptors.c b/examples/device/dfu/src/usb_descriptors.c
index 51a0d09f5..fd469aaf2 100644
--- a/examples/device/dfu/src/usb_descriptors.c
+++ b/examples/device/dfu/src/usb_descriptors.c
@@ -23,6 +23,7 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "class/dfu/dfu_device.h"
 
@@ -116,56 +117,65 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
-char const* string_desc_arr [] =
+char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
   "TinyUSB Device",              // 2: Product
-  "123456",                      // 3: Serials, should use chip ID
+  NULL,                          // 3: Serials will use unique ID if possible
   "FLASH",                       // 4: DFU Partition 1
   "EEPROM",                      // 5: DFU Partition 2
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
-
   size_t chr_count;
 
-  if ( index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }
-  else
-  {
-    // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
-    // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    const char* str = string_desc_arr[index];
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > 31 ) {
-      chr_count = 31;
-    }
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Convert ASCII string into UTF-16
-    for(uint8_t i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      const char *str = string_desc_arr[index];
+
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t)((((uint16_t)TUSB_DESC_STRING) << 8 ) | (2u*chr_count + 2u));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/dfu_runtime/src/usb_descriptors.c b/examples/device/dfu_runtime/src/usb_descriptors.c
index 1b0a60551..7ac53d255 100644
--- a/examples/device/dfu_runtime/src/usb_descriptors.c
+++ b/examples/device/dfu_runtime/src/usb_descriptors.c
@@ -23,6 +23,7 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "class/dfu/dfu_rt_device.h"
 
@@ -112,55 +113,64 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
-char const* string_desc_arr [] =
+char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
   "TinyUSB Device",              // 2: Product
-  "123456",                      // 3: Serials, should use chip ID
+  NULL,                          // 3: Serials will use unique ID if possible
   "TinyUSB DFU runtime",         // 4: DFU runtime
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
-
   size_t chr_count;
 
-  if ( index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }
-  else
-  {
-    // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
-    // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    const char* str = string_desc_arr[index];
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > 31 ) {
-      chr_count = 31;
-    }
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Convert ASCII string into UTF-16
-    for(uint8_t i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      const char *str = string_desc_arr[index];
+
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/dynamic_configuration/src/usb_descriptors.c b/examples/device/dynamic_configuration/src/usb_descriptors.c
index 039c7636c..7f35b4b22 100644
--- a/examples/device/dynamic_configuration/src/usb_descriptors.c
+++ b/examples/device/dynamic_configuration/src/usb_descriptors.c
@@ -23,8 +23,8 @@
  *
  */
 
-#include "tusb.h"
 #include "bsp/board_api.h"
+#include "tusb.h"
 
 /* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
  * Same VID/PID with different interface e.g MSC (first), then CDC (later) will possibly cause system error on PC.
@@ -206,51 +206,63 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
-char const* string_desc_arr [] =
+char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
   "TinyUSB Device",              // 2: Product
-  "123456",                      // 3: Serials, should use chip ID
+  NULL,                          // 3: Serials will use unique ID if possible
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
+  size_t chr_count;
 
-  uint8_t chr_count;
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-  if ( index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }else
-  {
-    // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
-    // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    const char* str = string_desc_arr[index];
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > 31 ) chr_count = 31;
+      const char *str = string_desc_arr[index];
 
-    // Convert ASCII string into UTF-16
-    for(uint8_t i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/hid_boot_interface/src/usb_descriptors.c b/examples/device/hid_boot_interface/src/usb_descriptors.c
index 10345ab41..d68ef16d9 100644
--- a/examples/device/hid_boot_interface/src/usb_descriptors.c
+++ b/examples/device/hid_boot_interface/src/usb_descriptors.c
@@ -23,6 +23,7 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "usb_descriptors.h"
 
@@ -130,51 +131,63 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
-char const* string_desc_arr [] =
+char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
   "TinyUSB Device",              // 2: Product
-  "123456",                      // 3: Serials, should use chip ID
+  NULL,                          // 3: Serials will use unique ID if possible
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
+  size_t chr_count;
 
-  uint8_t chr_count;
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-  if ( index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }else
-  {
-    // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
-    // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    const char* str = string_desc_arr[index];
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > 31 ) chr_count = 31;
+      const char *str = string_desc_arr[index];
 
-    // Convert ASCII string into UTF-16
-    for(uint8_t i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/hid_composite/src/usb_descriptors.c b/examples/device/hid_composite/src/usb_descriptors.c
index 347bbf29a..e174db46d 100644
--- a/examples/device/hid_composite/src/usb_descriptors.c
+++ b/examples/device/hid_composite/src/usb_descriptors.c
@@ -23,6 +23,7 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "usb_descriptors.h"
 
@@ -177,51 +178,63 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
-char const* string_desc_arr [] =
+char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
   "TinyUSB Device",              // 2: Product
-  "123456",                      // 3: Serials, should use chip ID
+  NULL,                          // 3: Serials will use unique ID if possible
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
+  size_t chr_count;
 
-  uint8_t chr_count;
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-  if ( index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }else
-  {
-    // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
-    // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    const char* str = string_desc_arr[index];
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > 31 ) chr_count = 31;
+      const char *str = string_desc_arr[index];
 
-    // Convert ASCII string into UTF-16
-    for(uint8_t i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/hid_composite_freertos/src/usb_descriptors.c b/examples/device/hid_composite_freertos/src/usb_descriptors.c
index 30f327d5e..85820de55 100644
--- a/examples/device/hid_composite_freertos/src/usb_descriptors.c
+++ b/examples/device/hid_composite_freertos/src/usb_descriptors.c
@@ -23,6 +23,7 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "usb_descriptors.h"
 
@@ -175,51 +176,63 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
-char const* string_desc_arr [] =
+char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
   "TinyUSB Device",              // 2: Product
-  "123456",                      // 3: Serials, should use chip ID
+  NULL,                          // 3: Serials will use unique ID if possible
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
+  size_t chr_count;
 
-  uint8_t chr_count;
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-  if ( index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }else
-  {
-    // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
-    // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    const char* str = string_desc_arr[index];
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > 31 ) chr_count = 31;
+      const char *str = string_desc_arr[index];
 
-    // Convert ASCII string into UTF-16
-    for(uint8_t i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/hid_generic_inout/src/usb_descriptors.c b/examples/device/hid_generic_inout/src/usb_descriptors.c
index 8377a0f47..64f6d17ae 100644
--- a/examples/device/hid_generic_inout/src/usb_descriptors.c
+++ b/examples/device/hid_generic_inout/src/usb_descriptors.c
@@ -23,6 +23,7 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 /* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
@@ -120,51 +121,63 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
-char const* string_desc_arr [] =
+char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
   "TinyUSB Device",              // 2: Product
-  "123456",                      // 3: Serials, should use chip ID
+  NULL,                          // 3: Serials will use unique ID if possible
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
+  size_t chr_count;
 
-  uint8_t chr_count;
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-  if ( index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }else
-  {
-    // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
-    // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    const char* str = string_desc_arr[index];
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > 31 ) chr_count = 31;
+      const char *str = string_desc_arr[index];
 
-    // Convert ASCII string into UTF-16
-    for(uint8_t i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/hid_multiple_interface/src/usb_descriptors.c b/examples/device/hid_multiple_interface/src/usb_descriptors.c
index 42471a961..86f567e8e 100644
--- a/examples/device/hid_multiple_interface/src/usb_descriptors.c
+++ b/examples/device/hid_multiple_interface/src/usb_descriptors.c
@@ -23,6 +23,7 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 /* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
@@ -136,53 +137,65 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
-char const* string_desc_arr [] =
+char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 },  // 0: is supported language is English (0x0409)
   "TinyUSB",                      // 1: Manufacturer
   "TinyUSB Device",               // 2: Product
-  "123456",                       // 3: Serials, should use chip ID
+  NULL,                           // 3: Serials will use unique ID if possible
   "Keyboard Interface",           // 4: Interface 1 String
   "Mouse Interface",              // 5: Interface 2 String
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
+  size_t chr_count;
 
-  uint8_t chr_count;
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-  if ( index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }else
-  {
-    // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
-    // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    const char* str = string_desc_arr[index];
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > 31 ) chr_count = 31;
+      const char *str = string_desc_arr[index];
 
-    // Convert ASCII string into UTF-16
-    for(uint8_t i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/midi_test/src/usb_descriptors.c b/examples/device/midi_test/src/usb_descriptors.c
index 4845dcf57..9781d3d6f 100644
--- a/examples/device/midi_test/src/usb_descriptors.c
+++ b/examples/device/midi_test/src/usb_descriptors.c
@@ -23,13 +23,14 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 /* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
  * Same VID/PID with different interface e.g MSC (first), then CDC (later) will possibly cause system error on PC.
  *
  * Auto ProductID layout's Bitmap:
- *   [MSB]       MIDI | HID | MSC | CDC          [LSB]
+ *   [MSB]         HID | MSC | CDC          [LSB]
  */
 #define _PID_MAP(itf, n)  ( (CFG_TUD_##itf) << (n) )
 #define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
@@ -133,51 +134,63 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
-char const* string_desc_arr [] =
+char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
   "TinyUSB Device",              // 2: Product
-  "123456",                      // 3: Serials, should use chip ID
+  NULL,                          // 3: Serials will use unique ID if possible
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
+  size_t chr_count;
 
-  uint8_t chr_count;
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-  if ( index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }else
-  {
-    // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
-    // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    const char* str = string_desc_arr[index];
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > 31 ) chr_count = 31;
+      const char *str = string_desc_arr[index];
 
-    // Convert ASCII string into UTF-16
-    for(uint8_t i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/msc_dual_lun/src/usb_descriptors.c b/examples/device/msc_dual_lun/src/usb_descriptors.c
index 2de81111c..c0610945f 100644
--- a/examples/device/msc_dual_lun/src/usb_descriptors.c
+++ b/examples/device/msc_dual_lun/src/usb_descriptors.c
@@ -23,6 +23,7 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 /* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
@@ -141,51 +142,63 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
-char const* string_desc_arr [] =
+char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
   "TinyUSB Device",              // 2: Product
-  "123456789012",                // 3: Serials, should use chip ID
+  NULL,                          // 3: Serials will use unique ID if possible
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
+  size_t chr_count;
 
-  uint8_t chr_count;
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-  if ( index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }else
-  {
-    // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
-    // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    const char* str = string_desc_arr[index];
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > 31 ) chr_count = 31;
+      const char *str = string_desc_arr[index];
 
-    // Convert ASCII string into UTF-16
-    for(uint8_t i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/net_lwip_webserver/src/usb_descriptors.c b/examples/device/net_lwip_webserver/src/usb_descriptors.c
index 3c0ed3db7..da628c8be 100644
--- a/examples/device/net_lwip_webserver/src/usb_descriptors.c
+++ b/examples/device/net_lwip_webserver/src/usb_descriptors.c
@@ -23,6 +23,7 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 /* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
@@ -190,55 +191,56 @@ static char const* string_desc_arr [] =
   [STRID_LANGID]       = (const char[]) { 0x09, 0x04 }, // supported language is English (0x0409)
   [STRID_MANUFACTURER] = "TinyUSB",                     // Manufacturer
   [STRID_PRODUCT]      = "TinyUSB Device",              // Product
-  [STRID_SERIAL]       = "123456",                      // Serial
+  [STRID_SERIAL]       = NULL,                          // Serials will use unique ID if possible
   [STRID_INTERFACE]    = "TinyUSB Network Interface"    // Interface Description
 
   // STRID_MAC index is handled separately
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
-
   unsigned int chr_count = 0;
 
-  if (STRID_LANGID == index)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[STRID_LANGID], 2);
-    chr_count = 1;
-  }
-  else if (STRID_MAC == index)
-  {
-    // Convert MAC address into UTF-16
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-    for (unsigned i=0; i<sizeof(tud_network_mac_address); i++)
-    {
-      _desc_str[1+chr_count++] = "0123456789ABCDEF"[(tud_network_mac_address[i] >> 4) & 0xf];
-      _desc_str[1+chr_count++] = "0123456789ABCDEF"[(tud_network_mac_address[i] >> 0) & 0xf];
-    }
-  }
-  else
-  {
-    // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
-    // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    case STRID_MAC:
+      // Convert MAC address into UTF-16
+      for (unsigned i=0; i<sizeof(tud_network_mac_address); i++) {
+        _desc_str[1+chr_count++] = "0123456789ABCDEF"[(tud_network_mac_address[i] >> 4) & 0xf];
+        _desc_str[1+chr_count++] = "0123456789ABCDEF"[(tud_network_mac_address[i] >> 0) & 0xf];
+      }
+      break;
 
-    const char* str = string_desc_arr[index];
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > (TU_ARRAY_SIZE(_desc_str) - 1)) chr_count = TU_ARRAY_SIZE(_desc_str) - 1;
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Convert ASCII string into UTF-16
-    for (unsigned int i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      const char *str = string_desc_arr[index];
+
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
diff --git a/examples/device/uac2_headset/src/usb_descriptors.c b/examples/device/uac2_headset/src/usb_descriptors.c
index 682774b72..6d1e6a23f 100644
--- a/examples/device/uac2_headset/src/usb_descriptors.c
+++ b/examples/device/uac2_headset/src/usb_descriptors.c
@@ -24,6 +24,7 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "usb_descriptors.h"
 
@@ -126,52 +127,65 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
-char const* string_desc_arr [] =
+char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 },  // 0: is supported language is English (0x0409)
   "TinyUSB",                      // 1: Manufacturer
   "TinyUSB headset",              // 2: Product
-  "000001",                       // 3: Serials, should use chip ID
+  NULL,                           // 3: Serials will use unique ID if possible
   "TinyUSB Speakers",             // 4: Audio Interface
   "TinyUSB Microphone",           // 5: Audio Interface
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
-  (void)langid;
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
+  (void) langid;
+  size_t chr_count;
 
-  uint8_t chr_count;
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-  if (index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }
-  else
-  {
-    // Convert ASCII string into UTF-16
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    if (!(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0]))) return NULL;
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    const char* str = string_desc_arr[index];
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if (chr_count > 31) chr_count = 31;
+      const char *str = string_desc_arr[index];
 
-    for (uint8_t i = 0; i < chr_count; i++)
-    {
-      _desc_str[1 + i] = str[i];
-    }
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/usbtmc/src/usb_descriptors.c b/examples/device/usbtmc/src/usb_descriptors.c
index ff682ff97..54948291e 100644
--- a/examples/device/usbtmc/src/usb_descriptors.c
+++ b/examples/device/usbtmc/src/usb_descriptors.c
@@ -23,6 +23,7 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "class/usbtmc/usbtmc.h"
 #include "class/usbtmc/usbtmc_device.h"
@@ -188,55 +189,64 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
-char const* string_desc_arr [] =
+char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
   "TinyUSB Device",              // 2: Product
-  "123456",                      // 3: Serials, should use chip ID
+  NULL,                          // 3: Serials will use unique ID if possible
   "TinyUSB USBTMC",              // 4: USBTMC
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
-
   size_t chr_count;
 
-  if ( index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }
-  else
-  {
-    // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
-    // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    const char* str = string_desc_arr[index];
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > 31 ) {
-      chr_count = 31;
-    }
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Convert ASCII string into UTF-16
-    for(uint8_t i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      const char *str = string_desc_arr[index];
+
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t)((((uint16_t)TUSB_DESC_STRING) << 8 ) | (2u*chr_count + 2u));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/video_capture/src/usb_descriptors.c b/examples/device/video_capture/src/usb_descriptors.c
index 9847cf7c5..292d86cd9 100644
--- a/examples/device/video_capture/src/usb_descriptors.c
+++ b/examples/device/video_capture/src/usb_descriptors.c
@@ -23,6 +23,7 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "usb_descriptors.h"
 
@@ -150,52 +151,64 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
-char const* string_desc_arr [] =
+char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
   "TinyUSB Device",              // 2: Product
-  "123456",                      // 3: Serials, should use chip ID
+  NULL,                          // 3: Serials will use unique ID if possible
   "TinyUSB UVC",                 // 4: UVC Interface
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
+  size_t chr_count;
 
-  uint8_t chr_count;
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-  if ( index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }else
-  {
-    // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
-    // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    const char* str = string_desc_arr[index];
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > 31 ) chr_count = 31;
+      const char *str = string_desc_arr[index];
 
-    // Convert ASCII string into UTF-16
-    for(uint8_t i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/webusb_serial/src/usb_descriptors.c b/examples/device/webusb_serial/src/usb_descriptors.c
index b2593001c..b01fae8e3 100644
--- a/examples/device/webusb_serial/src/usb_descriptors.c
+++ b/examples/device/webusb_serial/src/usb_descriptors.c
@@ -23,6 +23,7 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 #include "usb_descriptors.h"
 
@@ -207,53 +208,65 @@ TU_VERIFY_STATIC(sizeof(desc_ms_os_20) == MS_OS_20_DESC_LEN, "Incorrect size");
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
-char const* string_desc_arr [] =
+char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
   "TinyUSB Device",              // 2: Product
-  "123456",                      // 3: Serials, should use chip ID
+  NULL,                          // 3: Serials will use unique ID if possible
   "TinyUSB CDC",                 // 4: CDC Interface
   "TinyUSB WebUSB"               // 5: Vendor Interface
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
+  size_t chr_count;
 
-  uint8_t chr_count;
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-  if ( index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }else
-  {
-    // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
-    // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    const char* str = string_desc_arr[index];
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > 31 ) chr_count = 31;
+      const char *str = string_desc_arr[index];
 
-    // Convert ASCII string into UTF-16
-    for(uint8_t i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c b/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c
index 63b6bc603..293620042 100644
--- a/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c
+++ b/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c
@@ -23,6 +23,7 @@
  *
  */
 
+#include "bsp/board_api.h"
 #include "tusb.h"
 
 /* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
@@ -214,52 +215,64 @@ uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
 // String Descriptors
 //--------------------------------------------------------------------+
 
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
 // array of pointer to string descriptors
-char const* string_desc_arr [] =
+char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
   "TinyUSB Device",              // 2: Product
-  "123456789012",                // 3: Serials, should use chip ID
+  NULL,                          // 3: Serials will use unique ID if possible
   "TinyUSB CDC",                 // 4: CDC Interface
 };
 
-static uint16_t _desc_str[32];
+static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid)
-{
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
   (void) langid;
+  size_t chr_count;
 
-  uint8_t chr_count;
+  switch ( index ) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
 
-  if ( index == 0)
-  {
-    memcpy(&_desc_str[1], string_desc_arr[0], 2);
-    chr_count = 1;
-  }else
-  {
-    // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
-    // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
 
-    if ( !(index < sizeof(string_desc_arr)/sizeof(string_desc_arr[0])) ) return NULL;
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-    const char* str = string_desc_arr[index];
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
 
-    // Cap at max char
-    chr_count = (uint8_t) strlen(str);
-    if ( chr_count > 31 ) chr_count = 31;
+      const char *str = string_desc_arr[index];
 
-    // Convert ASCII string into UTF-16
-    for(uint8_t i=0; i<chr_count; i++)
-    {
-      _desc_str[1+i] = str[i];
-    }
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if ( chr_count > max_count ) chr_count = max_count;
+
+      // Convert ASCII string into UTF-16
+      for ( size_t i = 0; i < chr_count; i++ ) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }

From 25bace5e81dfba84f84ea12b7723f15fa98a039e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 4 Aug 2023 12:49:26 +0700
Subject: [PATCH 572/691] add cmake for all board in stm32f4. fix build, also
 move ci for f4 from makefile to cmake

---
 .github/workflows/build_arm.yml               |   1 -
 .github/workflows/cmake_arm.yml               |   1 +
 .idea/cmake.xml                               |   3 +-
 .../stm32f4/FreeRTOSConfig/FreeRTOSConfig.h   |   2 +-
 .../boards/feather_stm32f405/board.cmake      |  10 ++
 hw/bsp/stm32f4/boards/pyboardv11/board.cmake  |  10 ++
 .../boards/stm32f401blackpill/board.cmake     |  10 ++
 ...07VETX_FLASH.ld => STM32F407VETx_FLASH.ld} |   0
 .../boards/stm32f407blackvet/board.cmake      |   9 +-
 .../stm32f4/boards/stm32f407disco/board.cmake |  10 ++
 .../boards/stm32f411blackpill/board.cmake     |  10 ++
 .../stm32f4/boards/stm32f411disco/board.cmake |  10 ++
 .../stm32f4/boards/stm32f412disco/board.cmake |  10 ++
 .../boards/stm32f412nucleo/board.cmake        |  10 ++
 .../boards/stm32f439nucleo/board.cmake        |  10 ++
 hw/bsp/stm32f4/family.c                       |  86 ++++++-------
 hw/bsp/stm32f4/family.cmake                   | 114 ++++++++----------
 17 files changed, 188 insertions(+), 118 deletions(-)
 create mode 100644 hw/bsp/stm32f4/boards/feather_stm32f405/board.cmake
 create mode 100644 hw/bsp/stm32f4/boards/pyboardv11/board.cmake
 create mode 100644 hw/bsp/stm32f4/boards/stm32f401blackpill/board.cmake
 rename hw/bsp/stm32f4/boards/stm32f407blackvet/{STM32F407VETX_FLASH.ld => STM32F407VETx_FLASH.ld} (100%)
 create mode 100644 hw/bsp/stm32f4/boards/stm32f407disco/board.cmake
 create mode 100644 hw/bsp/stm32f4/boards/stm32f411blackpill/board.cmake
 create mode 100644 hw/bsp/stm32f4/boards/stm32f411disco/board.cmake
 create mode 100644 hw/bsp/stm32f4/boards/stm32f412disco/board.cmake
 create mode 100644 hw/bsp/stm32f4/boards/stm32f412nucleo/board.cmake
 create mode 100644 hw/bsp/stm32f4/boards/stm32f439nucleo/board.cmake

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 44a5e7363..2621e7372 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -43,7 +43,6 @@ jobs:
         - 'samd51 same5x'
         - 'saml2x'
         - 'stm32f2 stm32f3'
-        - 'stm32f4'
         - 'stm32l0 stm32u5 stm32wb'
         - 'tm4c123 xmc4000'
     steps:
diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index 5203337ec..8eeae928c 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -42,6 +42,7 @@ jobs:
           - 'rp2040'
           - 'stm32f0'
           - 'stm32f1'
+          - 'stm32f4'
           - 'stm32f7'
           - 'stm32g0'
           - 'stm32g4'
diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index b1d024b81..76143ba10 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -22,7 +22,7 @@
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
-      <configuration PROFILE_NAME="rp2040" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico -DLOG=2" />
+      <configuration PROFILE_NAME="rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico -DLOG=2" />
       <configuration PROFILE_NAME="feather_rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pico_sdk -DPICO_BOARD=adafruit_feather_rp2040" />
       <configuration PROFILE_NAME="metro m7 1011" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1010_evk -DLOG=3 -DLOGGER=RTT" />
@@ -41,6 +41,7 @@
       <configuration PROFILE_NAME="frdm_kl25z" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=frdm_kl25z -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32f072disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f072disco" />
       <configuration PROFILE_NAME="stm32f103_mini_2" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f103_mini_2" />
+      <configuration PROFILE_NAME="stm32f411disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f411disco -DLOG=2 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32f769disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32f769disco -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32h743eval" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h743eval -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="stm32l476disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32l476disco" />
diff --git a/hw/bsp/stm32f4/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32f4/FreeRTOSConfig/FreeRTOSConfig.h
index b4a9be477..ed90261d0 100644
--- a/hw/bsp/stm32f4/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/stm32f4/FreeRTOSConfig/FreeRTOSConfig.h
@@ -66,7 +66,7 @@
 #define configUSE_MUTEXES                       1
 #define configUSE_RECURSIVE_MUTEXES             1
 #define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               2
+#define configQUEUE_REGISTRY_SIZE               4
 #define configUSE_QUEUE_SETS                    0
 #define configUSE_TIME_SLICING                  0
 #define configUSE_NEWLIB_REENTRANT              0
diff --git a/hw/bsp/stm32f4/boards/feather_stm32f405/board.cmake b/hw/bsp/stm32f4/boards/feather_stm32f405/board.cmake
new file mode 100644
index 000000000..4910d3a88
--- /dev/null
+++ b/hw/bsp/stm32f4/boards/feather_stm32f405/board.cmake
@@ -0,0 +1,10 @@
+set(MCU_VARIANT stm32f405xx)
+set(JLINK_DEVICE stm32f405rg)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F405RGTx_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F405xx
+    )
+endfunction()
diff --git a/hw/bsp/stm32f4/boards/pyboardv11/board.cmake b/hw/bsp/stm32f4/boards/pyboardv11/board.cmake
new file mode 100644
index 000000000..4910d3a88
--- /dev/null
+++ b/hw/bsp/stm32f4/boards/pyboardv11/board.cmake
@@ -0,0 +1,10 @@
+set(MCU_VARIANT stm32f405xx)
+set(JLINK_DEVICE stm32f405rg)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F405RGTx_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F405xx
+    )
+endfunction()
diff --git a/hw/bsp/stm32f4/boards/stm32f401blackpill/board.cmake b/hw/bsp/stm32f4/boards/stm32f401blackpill/board.cmake
new file mode 100644
index 000000000..fab6a42d2
--- /dev/null
+++ b/hw/bsp/stm32f4/boards/stm32f401blackpill/board.cmake
@@ -0,0 +1,10 @@
+set(MCU_VARIANT stm32f401xc)
+set(JLINK_DEVICE stm32f401cc)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F401VCTx_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F405xx
+    )
+endfunction()
diff --git a/hw/bsp/stm32f4/boards/stm32f407blackvet/STM32F407VETX_FLASH.ld b/hw/bsp/stm32f4/boards/stm32f407blackvet/STM32F407VETx_FLASH.ld
similarity index 100%
rename from hw/bsp/stm32f4/boards/stm32f407blackvet/STM32F407VETX_FLASH.ld
rename to hw/bsp/stm32f4/boards/stm32f407blackvet/STM32F407VETx_FLASH.ld
diff --git a/hw/bsp/stm32f4/boards/stm32f407blackvet/board.cmake b/hw/bsp/stm32f4/boards/stm32f407blackvet/board.cmake
index 52cf95700..64626d7bd 100644
--- a/hw/bsp/stm32f4/boards/stm32f407blackvet/board.cmake
+++ b/hw/bsp/stm32f4/boards/stm32f407blackvet/board.cmake
@@ -2,17 +2,12 @@ set(MCU_VARIANT stm32f407xx)
 set(JLINK_DEVICE stm32f407ve)
 
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F407VETx_FLASH.ld)
-set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
-
-set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     STM32F407xx
     HSE_VALUE=8000000
-    CORE_CM4
-          BOARD_TUD_RHPORT=0
-          BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
+    BOARD_TUD_RHPORT=0
+    BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
     )
 endfunction()
diff --git a/hw/bsp/stm32f4/boards/stm32f407disco/board.cmake b/hw/bsp/stm32f4/boards/stm32f407disco/board.cmake
new file mode 100644
index 000000000..c8f0330ed
--- /dev/null
+++ b/hw/bsp/stm32f4/boards/stm32f407disco/board.cmake
@@ -0,0 +1,10 @@
+set(MCU_VARIANT stm32f407xx)
+set(JLINK_DEVICE stm32f407vg)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F407VGTx_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F407xx
+    )
+endfunction()
diff --git a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.cmake b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.cmake
new file mode 100644
index 000000000..d16db508f
--- /dev/null
+++ b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.cmake
@@ -0,0 +1,10 @@
+set(MCU_VARIANT stm32f411xe)
+set(JLINK_DEVICE stm32f411ce)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F411CEUx_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F411xE
+    )
+endfunction()
diff --git a/hw/bsp/stm32f4/boards/stm32f411disco/board.cmake b/hw/bsp/stm32f4/boards/stm32f411disco/board.cmake
new file mode 100644
index 000000000..d7c32c27d
--- /dev/null
+++ b/hw/bsp/stm32f4/boards/stm32f411disco/board.cmake
@@ -0,0 +1,10 @@
+set(MCU_VARIANT stm32f411xe)
+set(JLINK_DEVICE stm32f411ve)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F411VETx_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F411xE
+    )
+endfunction()
diff --git a/hw/bsp/stm32f4/boards/stm32f412disco/board.cmake b/hw/bsp/stm32f4/boards/stm32f412disco/board.cmake
new file mode 100644
index 000000000..805332db8
--- /dev/null
+++ b/hw/bsp/stm32f4/boards/stm32f412disco/board.cmake
@@ -0,0 +1,10 @@
+set(MCU_VARIANT stm32f412zx)
+set(JLINK_DEVICE stm32f412zg)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F412ZGTx_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F412Zx
+    )
+endfunction()
diff --git a/hw/bsp/stm32f4/boards/stm32f412nucleo/board.cmake b/hw/bsp/stm32f4/boards/stm32f412nucleo/board.cmake
new file mode 100644
index 000000000..805332db8
--- /dev/null
+++ b/hw/bsp/stm32f4/boards/stm32f412nucleo/board.cmake
@@ -0,0 +1,10 @@
+set(MCU_VARIANT stm32f412zx)
+set(JLINK_DEVICE stm32f412zg)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F412ZGTx_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F412Zx
+    )
+endfunction()
diff --git a/hw/bsp/stm32f4/boards/stm32f439nucleo/board.cmake b/hw/bsp/stm32f4/boards/stm32f439nucleo/board.cmake
new file mode 100644
index 000000000..31ec6f700
--- /dev/null
+++ b/hw/bsp/stm32f4/boards/stm32f439nucleo/board.cmake
@@ -0,0 +1,10 @@
+set(MCU_VARIANT stm32f439xx)
+set(JLINK_DEVICE stm32f439zi)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F439ZITX_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32F439xx
+    )
+endfunction()
diff --git a/hw/bsp/stm32f4/family.c b/hw/bsp/stm32f4/family.c
index 41803e0ce..2a599e5c4 100644
--- a/hw/bsp/stm32f4/family.c
+++ b/hw/bsp/stm32f4/family.c
@@ -31,13 +31,11 @@
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
-void OTG_FS_IRQHandler(void)
-{
+void OTG_FS_IRQHandler(void) {
   tud_int_handler(0);
 }
 
-void OTG_HS_IRQHandler(void)
-{
+void OTG_HS_IRQHandler(void) {
   tud_int_handler(1);
 }
 
@@ -46,8 +44,7 @@ void OTG_HS_IRQHandler(void)
 //--------------------------------------------------------------------+
 UART_HandleTypeDef UartHandle;
 
-void board_init(void)
-{
+void board_init(void) {
   board_clock_init();
   //SystemCoreClockUpdate();
 
@@ -62,7 +59,7 @@ void board_init(void)
   NVIC_SetPriority(OTG_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
 #endif
 
-  GPIO_InitTypeDef  GPIO_InitStruct;
+  GPIO_InitTypeDef GPIO_InitStruct;
 
   // LED
   GPIO_InitStruct.Pin = LED_PIN;
@@ -82,22 +79,22 @@ void board_init(void)
 
 #ifdef UART_DEV
   // UART
-  GPIO_InitStruct.Pin       = UART_TX_PIN | UART_RX_PIN;
-  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
-  GPIO_InitStruct.Pull      = GPIO_PULLUP;
-  GPIO_InitStruct.Speed     = GPIO_SPEED_FREQ_HIGH;
+  GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_PULLUP;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   GPIO_InitStruct.Alternate = UART_GPIO_AF;
   HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
 
-  UartHandle = (UART_HandleTypeDef){
-    .Instance        = UART_DEV,
-    .Init.BaudRate   = CFG_BOARD_UART_BAUDRATE,
-    .Init.WordLength = UART_WORDLENGTH_8B,
-    .Init.StopBits   = UART_STOPBITS_1,
-    .Init.Parity     = UART_PARITY_NONE,
-    .Init.HwFlowCtl  = UART_HWCONTROL_NONE,
-    .Init.Mode       = UART_MODE_TX_RX,
-    .Init.OverSampling = UART_OVERSAMPLING_16
+  UartHandle = (UART_HandleTypeDef) {
+      .Instance        = UART_DEV,
+      .Init.BaudRate   = CFG_BOARD_UART_BAUDRATE,
+      .Init.WordLength = UART_WORDLENGTH_8B,
+      .Init.StopBits   = UART_STOPBITS_1,
+      .Init.Parity     = UART_PARITY_NONE,
+      .Init.HwFlowCtl  = UART_HWCONTROL_NONE,
+      .Init.Mode       = UART_MODE_TX_RX,
+      .Init.OverSampling = UART_OVERSAMPLING_16
   };
   HAL_UART_Init(&UartHandle);
 #endif
@@ -148,27 +145,37 @@ void board_init(void)
 // Board porting API
 //--------------------------------------------------------------------+
 
-void board_led_write(bool state)
-{
-  GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1-LED_STATE_ON));
+void board_led_write(bool state) {
+  GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1 - LED_STATE_ON));
   HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
 }
 
-uint32_t board_button_read(void)
-{
+uint32_t board_button_read(void) {
   return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
 }
 
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  (void) max_len;
+  volatile uint32_t *stm32_uuid = (volatile uint32_t *) UID_BASE;
+  uint32_t *id32 = (uint32_t *) (uintptr_t) id;
+  uint8_t const len = 12;
+
+  id32[0] = stm32_uuid[0];
+  id32[1] = stm32_uuid[1];
+  id32[2] = stm32_uuid[2];
+
+  return len;
+}
+
+int board_uart_read(uint8_t *buf, int len) {
+  (void) buf;
+  (void) len;
   return 0;
 }
 
-int board_uart_write(void const * buf, int len)
-{
+int board_uart_write(void const *buf, int len) {
 #ifdef UART_DEV
-  HAL_UART_Transmit(&UartHandle, (uint8_t*)(uintptr_t) buf, len, 0xffff);
+  HAL_UART_Transmit(&UartHandle, (uint8_t *) (uintptr_t) buf, len, 0xffff);
   return len;
 #else
   (void) buf; (void) len; (void) UartHandle;
@@ -176,28 +183,25 @@ int board_uart_write(void const * buf, int len)
 #endif
 }
 
-#if CFG_TUSB_OS  == OPT_OS_NONE
+#if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
+
+void SysTick_Handler(void) {
   HAL_IncTick();
   system_ticks++;
 }
 
-uint32_t board_millis(void)
-{
+uint32_t board_millis(void) {
   return system_ticks;
 }
+
 #endif
 
-void HardFault_Handler (void)
-{
+void HardFault_Handler(void) {
   __asm("BKPT #0\n");
 }
 
 // Required by __libc_init_array in startup code if we are compiling using
 // -nostdlib/-nostartfiles.
-void _init(void)
-{
-
+void _init(void) {
 }
diff --git a/hw/bsp/stm32f4/family.cmake b/hw/bsp/stm32f4/family.cmake
index a2f36a9e8..cad504bac 100644
--- a/hw/bsp/stm32f4/family.cmake
+++ b/hw/bsp/stm32f4/family.cmake
@@ -20,58 +20,58 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 set(FAMILY_MCUS STM32F4 CACHE INTERNAL "")
 
-# enable LTO if supported
-include(CheckIPOSupported)
-check_ipo_supported(RESULT IPO_SUPPORTED)
-if (IPO_SUPPORTED)
-  set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
-endif ()
-
 
 #------------------------------------
 # BOARD_TARGET
 #------------------------------------
 # only need to be built ONCE for all examples
 function(add_board_target BOARD_TARGET)
-  if (NOT TARGET ${BOARD_TARGET})
-    add_library(${BOARD_TARGET} STATIC
-      ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
-      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
-      )
-    target_include_directories(${BOARD_TARGET} PUBLIC
-      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-      ${CMSIS_5}/CMSIS/Core/Include
-      ${ST_CMSIS}/Include
-      ${ST_HAL_DRIVER}/Inc
-      )
-    target_compile_options(${BOARD_TARGET} PUBLIC
-      )
-    target_compile_definitions(${BOARD_TARGET} PUBLIC
-      )
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
 
-    update_board(${BOARD_TARGET})
+  # Startup & Linker script
+  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
 
-    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--script=${LD_FILE_GNU}"
-        -nostartfiles
-        # nanolib
-        --specs=nosys.specs
-        --specs=nano.specs
-        )
-    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--config=${LD_FILE_IAR}"
-        )
-    endif ()
+  add_library(${BOARD_TARGET} STATIC
+    ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMSIS_5}/CMSIS/Core/Include
+    ${ST_CMSIS}/Include
+    ${ST_HAL_DRIVER}/Inc
+    )
+  target_compile_options(${BOARD_TARGET} PUBLIC
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    )
+
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      # nanolib
+      --specs=nosys.specs
+      --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
   endif ()
 endfunction()
 
@@ -82,7 +82,6 @@ endfunction()
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
 
-
   # Board target
   add_board_target(board_${BOARD})
 
@@ -102,15 +101,9 @@ function(family_configure_example TARGET RTOS)
 
   # Add TinyUSB target and port source
   family_add_tinyusb(${TARGET} OPT_MCU_STM32F4 ${RTOS})
-  if (MCU_VARIANT STREQUAL "stm32f407xx")
-    target_sources(${TARGET}-tinyusb PUBLIC
-            ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-            )
-  else()
-    target_sources(${TARGET}-tinyusb PUBLIC
-            ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
-            )
-  endif()
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    )
   target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 
   # Link dependencies
@@ -120,16 +113,3 @@ function(family_configure_example TARGET RTOS)
   family_flash_stlink(${TARGET})
   family_flash_jlink(${TARGET})
 endfunction()
-
-
-function(family_configure_device_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_host_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()
-
-function(family_configure_dual_usb_example TARGET)
-  family_configure_example(${TARGET})
-endfunction()

From 56e52037a8c2fe383a61587baece0ce1add33afb Mon Sep 17 00:00:00 2001
From: Aladdin Bakosh <aladdin.bakosh@emerson.com>
Date: Tue, 18 Jul 2023 14:23:41 +0200
Subject: [PATCH 573/691] clean(ra_hcd): fix typos in the hcd library

---
 src/portable/renesas/rusb2/hcd_rusb2.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index 55bf6de4d..790cd6b32 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -265,7 +265,7 @@ static bool pipe_xfer_in(rusb2_reg_t* rusb, unsigned num)
     pipe->buf = (uint8_t*)buf + len;
   }
   if (len < mps) {
-    rusb->D0FIFOCTR = RUSB2_CFIFOCTR_BCLR_Msk;
+    rusb->D0FIFOCTR = RUSB2_D0FIFOCTR_BCLR_Msk;
   }
   rusb->D0FIFOSEL = 0;
   while (rusb->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
@@ -297,7 +297,7 @@ static bool pipe_xfer_out(rusb2_reg_t* rusb, unsigned num)
     pipe->buf = (uint8_t*)buf + len;
   }
   if (len < mps) {
-    rusb->D0FIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
+    rusb->D0FIFOCTR = RUSB2_D0FIFOCTR_BVAL_Msk;
   }
   rusb->D0FIFOSEL = 0;
   while (rusb->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
@@ -367,7 +367,7 @@ static bool process_pipe_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr,
     } else { /* ZLP */
       rusb->D0FIFOSEL = num;
       pipe_wait_for_ready(rusb, num);
-      rusb->D0FIFOCTR = RUSB2_CFIFOCTR_BVAL_Msk;
+      rusb->D0FIFOCTR = RUSB2_D0FIFOCTR_BVAL_Msk;
       rusb->D0FIFOSEL = 0;
       while (rusb->D0FIFOSEL_b.CURPIPE) {} /* if CURPIPE bits changes, check written value */
     }

From 3c746e8bb0baa85a969228fd15e988425e83b00e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 4 Aug 2023 21:33:44 +0700
Subject: [PATCH 574/691] add usb serial for hw l412 test

---
 .github/workflows/build_iar.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml
index 4b170f2bd..454ad12fe 100644
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@@ -93,7 +93,7 @@ jobs:
           echo >> flash.sh 'echo r >> flash.jlink'
           echo >> flash.sh 'echo go >> flash.jlink'
           echo >> flash.sh 'echo exit >> flash.jlink'
-          echo >> flash.sh 'cmdout=$(JLinkExe -device stm32l412kb -if swd -JTAGConf -1,-1 -speed auto -NoGui 1 -ExitOnError 1 -CommandFile flash.jlink)'
+          echo >> flash.sh 'cmdout=$(JLinkExe -USB 774470029 -device stm32l412kb -if swd -JTAGConf -1,-1 -speed auto -NoGui 1 -ExitOnError 1 -CommandFile flash.jlink)'
           echo >> flash.sh 'if (( $? )) ; then echo $cmdout ; fi'
           chmod +x flash.sh
 

From 4f96eebe1bdd37787aa47815b5b9c921884e5a0b Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 6 Aug 2023 13:41:10 +0200
Subject: [PATCH 575/691] Fix LPC54 build.

---
 hw/bsp/lpc54/family.mk | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/hw/bsp/lpc54/family.mk b/hw/bsp/lpc54/family.mk
index 7d8bb86cd..b9fcab809 100644
--- a/hw/bsp/lpc54/family.mk
+++ b/hw/bsp/lpc54/family.mk
@@ -7,7 +7,8 @@ CPU_CORE ?= cortex-m4
 CFLAGS += \
   -flto \
   -DCFG_TUSB_MCU=OPT_MCU_LPC54XXX \
-  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
+  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' \
+  -DBOARD_TUD_RHPORT=$(PORT)
 
 ifeq ($(PORT), 1)
   $(info "PORT1 High Speed")
@@ -32,7 +33,8 @@ SRC_C += \
 	$(MCU_DIR)/drivers/fsl_reset.c \
 	$(SDK_DIR)/drivers/lpc_gpio/fsl_gpio.c \
 	$(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \
-	$(SDK_DIR)/drivers/flexcomm/fsl_usart.c
+	$(SDK_DIR)/drivers/flexcomm/fsl_usart.c \
+	$(SDK_DIR)/drivers/common/fsl_common_arm.c
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \

From 9dd896904c3897515a0fc0bd06bda235d049019c Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 6 Aug 2023 13:41:41 +0200
Subject: [PATCH 576/691] WIP.

---
 test/hitl/hitl_test.py | 76 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 76 insertions(+)
 create mode 100644 test/hitl/hitl_test.py

diff --git a/test/hitl/hitl_test.py b/test/hitl/hitl_test.py
new file mode 100644
index 000000000..7853c9886
--- /dev/null
+++ b/test/hitl/hitl_test.py
@@ -0,0 +1,76 @@
+#
+# The MIT License (MIT)
+#
+# Copyright (c) 2023 HiFiPhile
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+# THE SOFTWARE.
+
+import os
+import sys
+import time
+import serial
+import subprocess
+
+def flash_jlink(sn, dev, firmware):
+    script = ['halt', 'r', f'loadfile {firmware}', 'r', 'go', 'exit']
+    f = open('flash.jlink', 'w')
+    f.writelines(f'{s}\n' for s in script)
+    f.close()
+    ret = subprocess.run(f'JLinkExe -USB {sn} -device {dev} -if swd -JTAGConf -1,-1 -speed auto -NoGui 1 -ExitOnError 1 -CommandFile flash.jlink',
+                         shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+    assert ret.returncode == 0, 'Flash failed'
+
+def test_cdc_dual_ports(port1, port2):
+    # Wait device enum
+    timeout = 10
+    while timeout:
+        if os.path.exists(port1) and os.path.exists(port2):
+            break
+        time.sleep(1)
+        timeout = timeout - 1
+
+    assert os.path.exists(port1) and os.path.exists(port2), \
+        'Port not available'
+    
+    ser1 = serial.Serial(port1)
+    ser2 = serial.Serial(port2)
+
+    ser1.timeout = 1
+    ser2.timeout = 1
+
+    str1 = b"test_no1"
+    ser1.write(str1)
+    ser1.flush()
+    assert ser1.read(100) == str1.lower(), 'Port1 wrong data'
+    assert ser2.read(100) == str1.upper(), 'Port2 wrong data'
+
+    str2 = b"test_no2"
+    ser2.write(str2)
+    ser2.flush()
+    assert ser1.read(100) == str2.lower(), 'Port1 wrong data'
+    assert ser2.read(100) == str2.upper(), 'Port2 wrong data'
+
+    print('cdc_dual_ports test done')
+
+
+
+
+flash_jlink('774470029', 'stm32l412kb', 'examples/device/cdc_dual_ports/_build/stm32l412nucleo/cdc_dual_ports.elf')
+
+test_cdc_dual_ports('/dev/ttyUSB_57323020.00', '/dev/ttyUSB_57323020.02')
\ No newline at end of file

From b173c71ffcc0133779ce4e42a5e08b5ab74382a0 Mon Sep 17 00:00:00 2001
From: kkitayam <45088311+kkitayam@users.noreply.github.com>
Date: Sun, 6 Aug 2023 22:49:45 +0900
Subject: [PATCH 577/691] Change to subst to work on windows command prompt

---
 examples/make.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/examples/make.mk b/examples/make.mk
index 4773189df..a590e34f7 100644
--- a/examples/make.mk
+++ b/examples/make.mk
@@ -116,7 +116,7 @@ INC += \
   $(TOP)/$(FAMILY_PATH) \
   $(TOP)/src \
 
-BOARD_UPPER = $(shell echo $(subst -,_,$(BOARD)) | tr a-z A-Z)
+BOARD_UPPER = $(subst a,A,$(subst b,B,$(subst c,C,$(subst d,D,$(subst e,E,$(subst f,F,$(subst g,G,$(subst h,H,$(subst i,I,$(subst j,J,$(subst k,K,$(subst l,L,$(subst m,M,$(subst n,N,$(subst o,O,$(subst p,P,$(subst q,Q,$(subst r,R,$(subst s,S,$(subst t,T,$(subst u,U,$(subst v,V,$(subst w,W,$(subst x,X,$(subst y,Y,$(subst z,Z,$(subst -,_,$(BOARD))))))))))))))))))))))))))))
 CFLAGS += -DBOARD_$(BOARD_UPPER)
 
 # Log level is mapped to TUSB DEBUG option

From b9e614bd39b994a8b83ab09483635a67ae7f1d44 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 6 Aug 2023 15:59:25 +0200
Subject: [PATCH 578/691] Fix LPC54 build.

---
 hw/bsp/lpc54/boards/lpcxpresso54628/board.mk |   2 +-
 hw/bsp/lpc54/family.mk                       |   3 +-
 test/hitl/hitl_config.json                   |  28 +++++
 test/hitl/hitl_test.py                       | 121 ++++++++++++++++++-
 4 files changed, 145 insertions(+), 9 deletions(-)
 create mode 100644 test/hitl/hitl_config.json

diff --git a/hw/bsp/lpc54/boards/lpcxpresso54628/board.mk b/hw/bsp/lpc54/boards/lpcxpresso54628/board.mk
index 5f15e2bbe..e0b382aeb 100644
--- a/hw/bsp/lpc54/boards/lpcxpresso54628/board.mk
+++ b/hw/bsp/lpc54/boards/lpcxpresso54628/board.mk
@@ -1,7 +1,7 @@
 MCU_VARIANT = LPC54628
 MCU_CORE = LPC54628
 
-PORT ?= 0
+PORT ?= 1
 
 CFLAGS += -DCPU_LPC54628J512ET180
 CFLAGS += -Wno-error=double-promotion
diff --git a/hw/bsp/lpc54/family.mk b/hw/bsp/lpc54/family.mk
index b9fcab809..46a5f7930 100644
--- a/hw/bsp/lpc54/family.mk
+++ b/hw/bsp/lpc54/family.mk
@@ -8,12 +8,11 @@ CFLAGS += \
   -flto \
   -DCFG_TUSB_MCU=OPT_MCU_LPC54XXX \
   -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' \
-  -DBOARD_TUD_RHPORT=$(PORT)
 
 ifeq ($(PORT), 1)
   $(info "PORT1 High Speed")
   CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
-
+  CFLAGS += -DBOARD_TUD_RHPORT=1
   # LPC55 Highspeed Port1 can only write to USB_SRAM region
   CFLAGS += -DCFG_TUSB_MEM_SECTION='__attribute__((section("m_usb_global")))'
 else
diff --git a/test/hitl/hitl_config.json b/test/hitl/hitl_config.json
new file mode 100644
index 000000000..f57629a52
--- /dev/null
+++ b/test/hitl/hitl_config.json
@@ -0,0 +1,28 @@
+{
+    "devices": [
+        {
+            "uid": "41003B000E504E5457323020",
+            "debugger": "jlink",
+            "debugger_sn": "774470029",
+            "device": "stm32l412kb",
+            "tests": [
+                {
+                    "name": "cdc_dual_ports",
+                    "firmware": "examples/device/cdc_dual_ports/_build/stm32l412nucleo/cdc_dual_ports.elf"
+                },
+                {
+                    "name": "cdc_msc",
+                    "firmware": "examples/device/cdc_msc/_build/stm32l412nucleo/cdc_msc.elf"
+                },
+                {
+                    "name": "dfu",
+                    "firmware": "examples/device/dfu/_build/stm32l412nucleo/dfu.elf"
+                },
+                {
+                    "name": "dfu_runtime",
+                    "firmware": "examples/device/dfu_runtime/_build/stm32l412nucleo/dfu_runtime.elf"
+                }
+            ]
+        }
+    ]
+}
\ No newline at end of file
diff --git a/test/hitl/hitl_test.py b/test/hitl/hitl_test.py
index 7853c9886..d51a13ce3 100644
--- a/test/hitl/hitl_test.py
+++ b/test/hitl/hitl_test.py
@@ -21,11 +21,16 @@
 # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 # THE SOFTWARE.
 
+# udev rules :
+# SUBSYSTEM=="block", SUBSYSTEMS=="usb", MODE="0666", PROGRAM="/bin/sh -c 'echo $$ID_SERIAL_SHORT | rev | cut -c -8 | rev'", SYMLINK+="blkUSB_%c.%s{bInterfaceNumber}"
+# SUBSYSTEM=="tty", SUBSYSTEMS=="usb", MODE="0666", PROGRAM="/bin/sh -c 'echo $$ID_SERIAL_SHORT | rev | cut -c -8 | rev'", SYMLINK+="ttyUSB_%c.%s{bInterfaceNumber}"
+
 import os
 import sys
 import time
 import serial
 import subprocess
+import json
 
 def flash_jlink(sn, dev, firmware):
     script = ['halt', 'r', f'loadfile {firmware}', 'r', 'go', 'exit']
@@ -34,9 +39,12 @@ def flash_jlink(sn, dev, firmware):
     f.close()
     ret = subprocess.run(f'JLinkExe -USB {sn} -device {dev} -if swd -JTAGConf -1,-1 -speed auto -NoGui 1 -ExitOnError 1 -CommandFile flash.jlink',
                          shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+    os.remove('flash.jlink') 
     assert ret.returncode == 0, 'Flash failed'
 
-def test_cdc_dual_ports(port1, port2):
+def test_cdc_dual_ports(id):
+    port1 = f'/dev/ttyUSB_{id[-8:]}.00'
+    port2 = f'/dev/ttyUSB_{id[-8:]}.02'
     # Wait device enum
     timeout = 10
     while timeout:
@@ -46,8 +54,9 @@ def test_cdc_dual_ports(port1, port2):
         timeout = timeout - 1
 
     assert os.path.exists(port1) and os.path.exists(port2), \
-        'Port not available'
+        'Device not available'
     
+    # Echo test
     ser1 = serial.Serial(port1)
     ser2 = serial.Serial(port2)
 
@@ -68,9 +77,109 @@ def test_cdc_dual_ports(port1, port2):
 
     print('cdc_dual_ports test done')
 
+def test_cdc_msc(id):
+    port  = f'/dev/ttyUSB_{id[-8:]}.00'
+    block = f'/dev/blkUSB_{id[-8:]}.02'
+    # Wait device enum
+    timeout = 10
+    while timeout:
+        if os.path.exists(port) and os.path.exists(block):
+            break
+        time.sleep(1)
+        timeout = timeout - 1
+
+    assert os.path.exists(port) and os.path.exists(block), \
+        'Device not available'
+    
+    # Echo test
+    ser = serial.Serial(port)
+
+    ser.timeout = 1
+
+    str = b"test_str"
+    ser.write(str)
+    ser.flush()
+    assert ser.read(100) == str, 'Port wrong data'
+
+    # Block test
+    f = open(block, 'rb')
+    data = f.read()
+
+    readme = \
+    b"This is tinyusb's MassStorage Class demo.\r\n\r\n\
+If you find any bugs or get any questions, feel free to file an\r\n\
+issue at github.com/hathach/tinyusb"
+
+    assert data[0x600:0x600 + len(readme)] == readme, 'Block wrong data'
+    print('cdc_msc test done')
+
+def test_dfu(id):
+    # Wait device enum
+    timeout = 10
+    while timeout:
+        ret = subprocess.run(f'dfu-util -l',
+                         shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+        stdout = ret.stdout.decode()
+        if f'serial="{id}"' in stdout and 'Found DFU: [cafe:4000]' in stdout:
+            break
+        time.sleep(1)
+        timeout = timeout - 1
+    
+    assert timeout, 'Device not available'
+    
+    # Test upload
+    try:
+        os.remove('dfu0') 
+        os.remove('dfu1')
+    except OSError:
+        pass
+
+    ret = subprocess.run(f'dfu-util -S {id} -a 0 -U dfu0',
+                         shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+    assert ret.returncode == 0, 'Upload failed'
+
+    ret = subprocess.run(f'dfu-util -S {id} -a 1 -U dfu1',
+                         shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+    assert ret.returncode == 0, 'Upload failed'
+
+    with open('dfu0') as f:
+        assert 'Hello world from TinyUSB DFU! - Partition 0' in f.read(),  'Wrong uploaded data'
+
+    with open('dfu1') as f:
+        assert 'Hello world from TinyUSB DFU! - Partition 1' in f.read(),  'Wrong uploaded data'
+
+    os.remove('dfu0') 
+    os.remove('dfu1')
+
+    print('dfu test done')
+
+def test_dfu_runtime(id):
+     # Wait device enum
+    timeout = 10
+    while timeout:
+        ret = subprocess.run(f'dfu-util -l',
+                         shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+        stdout = ret.stdout.decode()
+        if f'serial="{id}"' in stdout and 'Found Runtime: [cafe:4000]' in stdout:
+            break
+        time.sleep(1)
+        timeout = timeout - 1
+    
+    assert timeout, 'Device not available'
+
+    print('dfu_runtime test done')
 
 
-
-flash_jlink('774470029', 'stm32l412kb', 'examples/device/cdc_dual_ports/_build/stm32l412nucleo/cdc_dual_ports.elf')
-
-test_cdc_dual_ports('/dev/ttyUSB_57323020.00', '/dev/ttyUSB_57323020.02')
\ No newline at end of file
+if __name__ == '__main__':
+    with open(f'{os.path.dirname(__file__)}/hitl_config.json') as f:
+        config = json.load(f)
+    
+    for device in config['devices']:
+        print(f"Testing device:{device['device']}")
+        for test in device['tests']:
+            if device['debugger'] == 'jlink':
+                flash_jlink(device['debugger_sn'], device['device'], test['firmware'])
+            else:
+                # ToDo
+                pass
+            locals()[f'test_{test["name"]}'](device['uid'])

From 4d1f3f4e9dbe97060d41c188573fe94057ea1428 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 6 Aug 2023 16:30:19 +0200
Subject: [PATCH 579/691] Add more MCU.

---
 test/hitl/hitl_config.json | 52 ++++++++++++++++++++++++++++++++++++--
 test/hitl/hitl_test.py     | 35 ++++++++++++-------------
 2 files changed, 68 insertions(+), 19 deletions(-)

diff --git a/test/hitl/hitl_config.json b/test/hitl/hitl_config.json
index f57629a52..297ae8b81 100644
--- a/test/hitl/hitl_config.json
+++ b/test/hitl/hitl_config.json
@@ -4,7 +4,7 @@
             "uid": "41003B000E504E5457323020",
             "debugger": "jlink",
             "debugger_sn": "774470029",
-            "device": "stm32l412kb",
+            "device": "STM32L412KB",
             "tests": [
                 {
                     "name": "cdc_dual_ports",
@@ -23,6 +23,54 @@
                     "firmware": "examples/device/dfu_runtime/_build/stm32l412nucleo/dfu_runtime.elf"
                 }
             ]
+        },
+        {
+            "uid": "210041000C51343237303334",
+            "debugger": "jlink",
+            "debugger_sn": "770935966",
+            "device": "STM32F746NG",
+            "tests": [
+                {
+                    "name": "cdc_dual_ports",
+                    "firmware": "examples/device/cdc_dual_ports/_build/stm32f746disco/cdc_dual_ports.elf"
+                },
+                {
+                    "name": "cdc_msc",
+                    "firmware": "examples/device/cdc_msc/_build/stm32f746disco/cdc_msc.elf"
+                },
+                {
+                    "name": "dfu",
+                    "firmware": "examples/device/dfu/_build/stm32f746disco/dfu.elf"
+                },
+                {
+                    "name": "dfu_runtime",
+                    "firmware": "examples/device/dfu_runtime/_build/stm32f746disco/dfu_runtime.elf"
+                }
+            ]
+        },
+        {
+            "uid": "0123456789ABCDEF",
+            "debugger": "jlink",
+            "debugger_sn": "727600775",
+            "device": "LPC54608J512",
+            "tests": [
+                {
+                    "name": "cdc_dual_ports",
+                    "firmware": "examples/device/cdc_dual_ports/_build/lpcxpresso54628/cdc_dual_ports.elf"
+                },
+                {
+                    "name": "cdc_msc",
+                    "firmware": "examples/device/cdc_msc/_build/lpcxpresso54628/cdc_msc.elf"
+                },
+                {
+                    "name": "dfu",
+                    "firmware": "examples/device/dfu/_build/lpcxpresso54628/dfu.elf"
+                },
+                {
+                    "name": "dfu_runtime",
+                    "firmware": "examples/device/dfu_runtime/_build/lpcxpresso54628/dfu_runtime.elf"
+                }
+            ]
         }
     ]
-}
\ No newline at end of file
+}
diff --git a/test/hitl/hitl_test.py b/test/hitl/hitl_test.py
index d51a13ce3..60eda57ef 100644
--- a/test/hitl/hitl_test.py
+++ b/test/hitl/hitl_test.py
@@ -39,8 +39,9 @@ def flash_jlink(sn, dev, firmware):
     f.close()
     ret = subprocess.run(f'JLinkExe -USB {sn} -device {dev} -if swd -JTAGConf -1,-1 -speed auto -NoGui 1 -ExitOnError 1 -CommandFile flash.jlink',
                          shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
-    os.remove('flash.jlink') 
-    assert ret.returncode == 0, 'Flash failed'
+    stdout = ret.stdout.decode()
+    os.remove('flash.jlink')
+    assert ret.returncode == 0, 'Flash failed\n' + stdout
 
 def test_cdc_dual_ports(id):
     port1 = f'/dev/ttyUSB_{id[-8:]}.00'
@@ -55,7 +56,7 @@ def test_cdc_dual_ports(id):
 
     assert os.path.exists(port1) and os.path.exists(port2), \
         'Device not available'
-    
+
     # Echo test
     ser1 = serial.Serial(port1)
     ser2 = serial.Serial(port2)
@@ -90,16 +91,16 @@ def test_cdc_msc(id):
 
     assert os.path.exists(port) and os.path.exists(block), \
         'Device not available'
-    
-    # Echo test
-    ser = serial.Serial(port)
 
-    ser.timeout = 1
+    # Echo test
+    ser1 = serial.Serial(port)
+
+    ser1.timeout = 1
 
     str = b"test_str"
-    ser.write(str)
-    ser.flush()
-    assert ser.read(100) == str, 'Port wrong data'
+    ser1.write(str)
+    ser1.flush()
+    assert ser1.read(100) == str, 'Port wrong data'
 
     # Block test
     f = open(block, 'rb')
@@ -124,12 +125,12 @@ def test_dfu(id):
             break
         time.sleep(1)
         timeout = timeout - 1
-    
+
     assert timeout, 'Device not available'
-    
+
     # Test upload
     try:
-        os.remove('dfu0') 
+        os.remove('dfu0')
         os.remove('dfu1')
     except OSError:
         pass
@@ -148,7 +149,7 @@ def test_dfu(id):
     with open('dfu1') as f:
         assert 'Hello world from TinyUSB DFU! - Partition 1' in f.read(),  'Wrong uploaded data'
 
-    os.remove('dfu0') 
+    os.remove('dfu0')
     os.remove('dfu1')
 
     print('dfu test done')
@@ -164,7 +165,7 @@ def test_dfu_runtime(id):
             break
         time.sleep(1)
         timeout = timeout - 1
-    
+
     assert timeout, 'Device not available'
 
     print('dfu_runtime test done')
@@ -173,11 +174,11 @@ def test_dfu_runtime(id):
 if __name__ == '__main__':
     with open(f'{os.path.dirname(__file__)}/hitl_config.json') as f:
         config = json.load(f)
-    
+
     for device in config['devices']:
         print(f"Testing device:{device['device']}")
         for test in device['tests']:
-            if device['debugger'] == 'jlink':
+            if device['debugger'].lower() == 'jlink':
                 flash_jlink(device['debugger_sn'], device['device'], test['firmware'])
             else:
                 # ToDo

From c940a2f36247fb05364e9c56fed6daf95071e8e1 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 6 Aug 2023 21:55:24 +0200
Subject: [PATCH 580/691] Fix RTT build.

---
 lib/SEGGER_RTT/RTT/SEGGER_RTT.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/lib/SEGGER_RTT/RTT/SEGGER_RTT.c b/lib/SEGGER_RTT/RTT/SEGGER_RTT.c
index 730a5cfb3..811d951fd 100644
--- a/lib/SEGGER_RTT/RTT/SEGGER_RTT.c
+++ b/lib/SEGGER_RTT/RTT/SEGGER_RTT.c
@@ -183,6 +183,11 @@ Additional information:
 *
 **********************************************************************
 */
+#ifdef __GNUC__
+#pragma GCC diagnostic ignored "-Wcast-qual"
+#pragma GCC diagnostic ignored "-Wcast-align"
+#endif
+
 #if (defined __ICCARM__) || (defined __ICCRX__)
   #define RTT_PRAGMA(P) _Pragma(#P)
 #endif

From 87150b77702d93527e2998c62371ef2d7d2b9860 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 6 Aug 2023 22:02:15 +0200
Subject: [PATCH 581/691] Add config file as argument.

---
 test/hitl/{hitl_config.json => hitl_hfp.json} | 0
 test/hitl/hitl_test.py                        | 7 ++++++-
 2 files changed, 6 insertions(+), 1 deletion(-)
 rename test/hitl/{hitl_config.json => hitl_hfp.json} (100%)

diff --git a/test/hitl/hitl_config.json b/test/hitl/hitl_hfp.json
similarity index 100%
rename from test/hitl/hitl_config.json
rename to test/hitl/hitl_hfp.json
diff --git a/test/hitl/hitl_test.py b/test/hitl/hitl_test.py
index 60eda57ef..6c8066add 100644
--- a/test/hitl/hitl_test.py
+++ b/test/hitl/hitl_test.py
@@ -172,7 +172,12 @@ def test_dfu_runtime(id):
 
 
 if __name__ == '__main__':
-    with open(f'{os.path.dirname(__file__)}/hitl_config.json') as f:
+    if len(sys.argv) != 2:
+        print('Usage:')
+        print('python hitl_test.py config.json')
+        sys.exit(-1)
+
+    with open(f'{os.path.dirname(__file__)}/{sys.argv[1]}') as f:
         config = json.load(f)
 
     for device in config['devices']:

From 45af3d6a83f89d3b048701f8d6d7de15ebfa0101 Mon Sep 17 00:00:00 2001
From: Rocky04 <rockerfaeller04@gmx.de>
Date: Mon, 7 Aug 2023 12:04:22 +0000
Subject: [PATCH 582/691] Update examples

---
 examples/device/audio_4_channel_mic/src/main.c    | 2 +-
 examples/device/audio_test/src/main.c             | 2 +-
 examples/device/audio_test_multi_rate/src/main.c  | 2 +-
 examples/device/cdc_msc/src/main.c                | 2 +-
 examples/device/cdc_msc_freertos/src/main.c       | 9 ++++++++-
 examples/device/dfu/src/main.c                    | 2 +-
 examples/device/dfu_runtime/src/main.c            | 2 +-
 examples/device/dynamic_configuration/src/main.c  | 2 +-
 examples/device/hid_boot_interface/src/main.c     | 2 +-
 examples/device/hid_composite/src/main.c          | 2 +-
 examples/device/hid_composite_freertos/src/main.c | 9 ++++++++-
 examples/device/hid_generic_inout/src/main.c      | 2 +-
 examples/device/hid_multiple_interface/src/main.c | 2 +-
 examples/device/midi_test/src/main.c              | 2 +-
 examples/device/msc_dual_lun/src/main.c           | 2 +-
 examples/device/uac2_headset/src/main.c           | 2 +-
 examples/device/usbtmc/src/main.c                 | 2 +-
 examples/device/video_capture/src/main.c          | 2 +-
 examples/device/webusb_serial/src/main.c          | 2 +-
 examples/dual/host_hid_to_device_cdc/src/main.c   | 2 +-
 20 files changed, 34 insertions(+), 20 deletions(-)

diff --git a/examples/device/audio_4_channel_mic/src/main.c b/examples/device/audio_4_channel_mic/src/main.c
index 2b9c5143d..7bd69f55c 100644
--- a/examples/device/audio_4_channel_mic/src/main.c
+++ b/examples/device/audio_4_channel_mic/src/main.c
@@ -129,7 +129,7 @@ void tud_suspend_cb(bool remote_wakeup_en)
 // Invoked when usb bus is resumed
 void tud_resume_cb(void)
 {
-  blink_interval_ms = BLINK_MOUNTED;
+  blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/audio_test/src/main.c b/examples/device/audio_test/src/main.c
index b5ca41d36..3347890ca 100644
--- a/examples/device/audio_test/src/main.c
+++ b/examples/device/audio_test/src/main.c
@@ -130,7 +130,7 @@ void tud_suspend_cb(bool remote_wakeup_en)
 // Invoked when usb bus is resumed
 void tud_resume_cb(void)
 {
-  blink_interval_ms = BLINK_MOUNTED;
+  blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/audio_test_multi_rate/src/main.c b/examples/device/audio_test_multi_rate/src/main.c
index 078e783eb..2c2320a96 100644
--- a/examples/device/audio_test_multi_rate/src/main.c
+++ b/examples/device/audio_test_multi_rate/src/main.c
@@ -142,7 +142,7 @@ void tud_suspend_cb(bool remote_wakeup_en)
 // Invoked when usb bus is resumed
 void tud_resume_cb(void)
 {
-  blink_interval_ms = BLINK_MOUNTED;
+  blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/cdc_msc/src/main.c b/examples/device/cdc_msc/src/main.c
index 6dad73cbf..711ad4df7 100644
--- a/examples/device/cdc_msc/src/main.c
+++ b/examples/device/cdc_msc/src/main.c
@@ -95,7 +95,7 @@ void tud_suspend_cb(bool remote_wakeup_en)
 // Invoked when usb bus is resumed
 void tud_resume_cb(void)
 {
-  blink_interval_ms = BLINK_MOUNTED;
+  blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
 
diff --git a/examples/device/cdc_msc_freertos/src/main.c b/examples/device/cdc_msc_freertos/src/main.c
index 0e8a24d02..457c88d70 100644
--- a/examples/device/cdc_msc_freertos/src/main.c
+++ b/examples/device/cdc_msc_freertos/src/main.c
@@ -175,7 +175,14 @@ void tud_suspend_cb(bool remote_wakeup_en)
 // Invoked when usb bus is resumed
 void tud_resume_cb(void)
 {
-  xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_MOUNTED), 0);
+  if (tud_mounted())
+  {
+    xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_MOUNTED), 0);
+  }
+  else
+  {
+    xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_NOT_MOUNTED), 0);
+  }
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/dfu/src/main.c b/examples/device/dfu/src/main.c
index 5f37f25e1..caeed89e9 100644
--- a/examples/device/dfu/src/main.c
+++ b/examples/device/dfu/src/main.c
@@ -112,7 +112,7 @@ void tud_suspend_cb(bool remote_wakeup_en)
 // Invoked when usb bus is resumed
 void tud_resume_cb(void)
 {
-  blink_interval_ms = BLINK_MOUNTED;
+  blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/dfu_runtime/src/main.c b/examples/device/dfu_runtime/src/main.c
index 4ec3cb188..57f14ef62 100644
--- a/examples/device/dfu_runtime/src/main.c
+++ b/examples/device/dfu_runtime/src/main.c
@@ -107,7 +107,7 @@ void tud_suspend_cb(bool remote_wakeup_en)
 // Invoked when usb bus is resumed
 void tud_resume_cb(void)
 {
-  blink_interval_ms = BLINK_MOUNTED;
+  blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
 // Invoked on DFU_DETACH request to reboot to the bootloader
diff --git a/examples/device/dynamic_configuration/src/main.c b/examples/device/dynamic_configuration/src/main.c
index 578f01d8c..5d523c7b1 100644
--- a/examples/device/dynamic_configuration/src/main.c
+++ b/examples/device/dynamic_configuration/src/main.c
@@ -96,7 +96,7 @@ void tud_suspend_cb(bool remote_wakeup_en)
 // Invoked when usb bus is resumed
 void tud_resume_cb(void)
 {
-  blink_interval_ms = BLINK_MOUNTED;
+  blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
 
diff --git a/examples/device/hid_boot_interface/src/main.c b/examples/device/hid_boot_interface/src/main.c
index 1a155996a..09e5fc7ee 100644
--- a/examples/device/hid_boot_interface/src/main.c
+++ b/examples/device/hid_boot_interface/src/main.c
@@ -98,7 +98,7 @@ void tud_suspend_cb(bool remote_wakeup_en)
 // Invoked when usb bus is resumed
 void tud_resume_cb(void)
 {
-  blink_interval_ms = BLINK_MOUNTED;
+  blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/hid_composite/src/main.c b/examples/device/hid_composite/src/main.c
index 8d0e6bece..00f00ae95 100644
--- a/examples/device/hid_composite/src/main.c
+++ b/examples/device/hid_composite/src/main.c
@@ -97,7 +97,7 @@ void tud_suspend_cb(bool remote_wakeup_en)
 // Invoked when usb bus is resumed
 void tud_resume_cb(void)
 {
-  blink_interval_ms = BLINK_MOUNTED;
+  blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/hid_composite_freertos/src/main.c b/examples/device/hid_composite_freertos/src/main.c
index ca02af100..4ed506f6c 100644
--- a/examples/device/hid_composite_freertos/src/main.c
+++ b/examples/device/hid_composite_freertos/src/main.c
@@ -176,7 +176,14 @@ void tud_suspend_cb(bool remote_wakeup_en)
 // Invoked when usb bus is resumed
 void tud_resume_cb(void)
 {
-  xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_MOUNTED), 0);
+  if (tud_mounted())
+  {
+    xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_MOUNTED), 0);
+  }
+  else
+  {
+    xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_SUSPENDED), 0);
+  }
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/hid_generic_inout/src/main.c b/examples/device/hid_generic_inout/src/main.c
index 5db8f5581..7afe1c896 100644
--- a/examples/device/hid_generic_inout/src/main.c
+++ b/examples/device/hid_generic_inout/src/main.c
@@ -118,7 +118,7 @@ void tud_suspend_cb(bool remote_wakeup_en)
 // Invoked when usb bus is resumed
 void tud_resume_cb(void)
 {
-  blink_interval_ms = BLINK_MOUNTED;
+  blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/hid_multiple_interface/src/main.c b/examples/device/hid_multiple_interface/src/main.c
index 72240b208..deca575a3 100644
--- a/examples/device/hid_multiple_interface/src/main.c
+++ b/examples/device/hid_multiple_interface/src/main.c
@@ -101,7 +101,7 @@ void tud_suspend_cb(bool remote_wakeup_en)
 // Invoked when usb bus is resumed
 void tud_resume_cb(void)
 {
-  blink_interval_ms = BLINK_MOUNTED;
+  blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/midi_test/src/main.c b/examples/device/midi_test/src/main.c
index 2c3e9d954..2898fbc3b 100644
--- a/examples/device/midi_test/src/main.c
+++ b/examples/device/midi_test/src/main.c
@@ -101,7 +101,7 @@ void tud_suspend_cb(bool remote_wakeup_en)
 // Invoked when usb bus is resumed
 void tud_resume_cb(void)
 {
-  blink_interval_ms = BLINK_MOUNTED;
+  blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/msc_dual_lun/src/main.c b/examples/device/msc_dual_lun/src/main.c
index c7f6de7bf..0a532788e 100644
--- a/examples/device/msc_dual_lun/src/main.c
+++ b/examples/device/msc_dual_lun/src/main.c
@@ -92,7 +92,7 @@ void tud_suspend_cb(bool remote_wakeup_en)
 // Invoked when usb bus is resumed
 void tud_resume_cb(void)
 {
-  blink_interval_ms = BLINK_MOUNTED;
+  blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/uac2_headset/src/main.c b/examples/device/uac2_headset/src/main.c
index 19a3f7bae..ff952333b 100644
--- a/examples/device/uac2_headset/src/main.c
+++ b/examples/device/uac2_headset/src/main.c
@@ -143,7 +143,7 @@ void tud_suspend_cb(bool remote_wakeup_en)
 // Invoked when usb bus is resumed
 void tud_resume_cb(void)
 {
-  blink_interval_ms = BLINK_MOUNTED;
+  blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
 // Helper for clock get requests
diff --git a/examples/device/usbtmc/src/main.c b/examples/device/usbtmc/src/main.c
index 2bba336f1..1a5c1df20 100644
--- a/examples/device/usbtmc/src/main.c
+++ b/examples/device/usbtmc/src/main.c
@@ -93,7 +93,7 @@ void tud_suspend_cb(bool remote_wakeup_en)
 // Invoked when usb bus is resumed
 void tud_resume_cb(void)
 {
-  blink_interval_ms = BLINK_MOUNTED;
+  blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/video_capture/src/main.c b/examples/device/video_capture/src/main.c
index 5654e0b61..c7bf9b936 100644
--- a/examples/device/video_capture/src/main.c
+++ b/examples/device/video_capture/src/main.c
@@ -96,7 +96,7 @@ void tud_suspend_cb(bool remote_wakeup_en)
 // Invoked when usb bus is resumed
 void tud_resume_cb(void)
 {
-  blink_interval_ms = BLINK_MOUNTED;
+  blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
 
diff --git a/examples/device/webusb_serial/src/main.c b/examples/device/webusb_serial/src/main.c
index eaca78c73..a5164cd07 100644
--- a/examples/device/webusb_serial/src/main.c
+++ b/examples/device/webusb_serial/src/main.c
@@ -156,7 +156,7 @@ void tud_suspend_cb(bool remote_wakeup_en)
 // Invoked when usb bus is resumed
 void tud_resume_cb(void)
 {
-  blink_interval_ms = BLINK_MOUNTED;
+  blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/dual/host_hid_to_device_cdc/src/main.c b/examples/dual/host_hid_to_device_cdc/src/main.c
index 817c63c70..d4172580f 100644
--- a/examples/dual/host_hid_to_device_cdc/src/main.c
+++ b/examples/dual/host_hid_to_device_cdc/src/main.c
@@ -121,7 +121,7 @@ void tud_suspend_cb(bool remote_wakeup_en)
 // Invoked when usb bus is resumed
 void tud_resume_cb(void)
 {
-  blink_interval_ms = BLINK_MOUNTED;
+  blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
 // Invoked when CDC interface received data from host

From 1f95a417f271e627ec981be3d211eed8c37cb052 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 7 Aug 2023 18:22:28 +0700
Subject: [PATCH 583/691] Add tuh_rhport_is_active() and tuh_rhport_reset_bus()

- also improve ehci bus reset
- seperate bus reset delay and contact debouncing delay in enumeration
---
 src/host/hcd.h                          |   5 +-
 src/host/hub.c                          |   2 +-
 src/host/usbh.c                         | 118 +++++++++++++-----------
 src/host/usbh.h                         |  39 ++++----
 src/portable/chipidea/ci_hs/hcd_ci_hs.c |  43 ++++-----
 src/portable/ehci/ehci.c                |  24 +++--
 6 files changed, 128 insertions(+), 103 deletions(-)

diff --git a/src/host/hcd.h b/src/host/hcd.h
index d77dd6e2f..9bcc1c6df 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -149,10 +149,11 @@ uint32_t hcd_frame_number(uint8_t rhport);
 // Get the current connect status of roothub port
 bool hcd_port_connect_status(uint8_t rhport);
 
-// Reset USB bus on the port
+// Reset USB bus on the port. Return immediately, bus reset sequence may not be complete.
+// Some port would require hcd_port_reset_end() to be invoked after 10ms to complete the reset sequence.
 void hcd_port_reset(uint8_t rhport);
 
-// TODO implement later
+// Complete bus reset sequence, may be required by some controllers
 void hcd_port_reset_end(uint8_t rhport);
 
 // Get port link speed
diff --git a/src/host/hub.c b/src/host/hub.c
index 16dd534d2..ec30eb96a 100644
--- a/src/host/hub.c
+++ b/src/host/hub.c
@@ -330,7 +330,7 @@ static void connection_port_reset_complete (tuh_xfer_t* xfer);
 bool hub_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes) {
   (void) xferred_bytes; // TODO can be more than 1 for hub with lots of ports
   (void) ep_addr;
-  TU_ASSERT(result == XFER_RESULT_SUCCESS);
+  TU_VERIFY(result == XFER_RESULT_SUCCESS);
 
   hub_interface_t* p_hub = get_itf(dev_addr);
 
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 49f8c78f1..cc7e38b45 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -181,9 +181,6 @@ static usbh_class_driver_t const usbh_class_drivers[] =
 };
 
 enum { USBH_CLASS_DRIVER_COUNT = TU_ARRAY_SIZE(usbh_class_drivers) };
-
-enum { RESET_DELAY = 500 };  // 200 USB specs say only 50ms but many devices require much longer
-
 enum { CONFIG_NUM = 1 }; // default to use configuration 1
 
 
@@ -251,40 +248,27 @@ static bool usbh_control_xfer_cb (uint8_t daddr, uint8_t ep_addr, xfer_result_t
 
 #if CFG_TUSB_OS == OPT_OS_NONE
 // TODO rework time-related function later
-TU_ATTR_WEAK void osal_task_delay(uint32_t msec)
-{
+// weak and overridable
+TU_ATTR_WEAK void osal_task_delay(uint32_t msec) {
   const uint32_t start = hcd_frame_number(_usbh_controller);
   while ( ( hcd_frame_number(_usbh_controller) - start ) < msec ) {}
 }
 #endif
 
 //--------------------------------------------------------------------+
-// PUBLIC API (Parameter Verification is required)
+// Device API
 //--------------------------------------------------------------------+
 
-bool tuh_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param)
-{
-  if (hcd_configure)
-  {
-    return hcd_configure(rhport, cfg_id, cfg_param);
-  }else
-  {
-    return false;
-  }
-}
-
-bool tuh_mounted(uint8_t dev_addr)
-{
-  usbh_device_t* dev = get_device(dev_addr);
+bool tuh_mounted(uint8_t dev_addr) {
+  usbh_device_t *dev = get_device(dev_addr);
   TU_VERIFY(dev);
   return dev->configured;
 }
 
-bool tuh_vid_pid_get(uint8_t dev_addr, uint16_t* vid, uint16_t* pid)
-{
+bool tuh_vid_pid_get(uint8_t dev_addr, uint16_t *vid, uint16_t *pid) {
   *vid = *pid = 0;
 
-  usbh_device_t const* dev = get_device(dev_addr);
+  usbh_device_t const *dev = get_device(dev_addr);
   TU_VERIFY(dev && dev->addressed && dev->vid != 0);
 
   *vid = dev->vid;
@@ -293,26 +277,48 @@ bool tuh_vid_pid_get(uint8_t dev_addr, uint16_t* vid, uint16_t* pid)
   return true;
 }
 
-tusb_speed_t tuh_speed_get (uint8_t dev_addr)
-{
-  usbh_device_t* dev = get_device(dev_addr);
+tusb_speed_t tuh_speed_get(uint8_t dev_addr) {
+  usbh_device_t *dev = get_device(dev_addr);
   return (tusb_speed_t) (dev ? get_device(dev_addr)->speed : _dev0.speed);
 }
 
-static void clear_device(usbh_device_t* dev)
-{
+bool tuh_rhport_is_active(uint8_t rhport) {
+  return _usbh_controller == rhport;
+}
+
+bool tuh_rhport_reset_bus(uint8_t rhport, bool active) {
+  TU_VERIFY(tuh_rhport_is_active(rhport));
+  if ( active ) {
+    hcd_port_reset(rhport);
+  } else {
+    hcd_port_reset_end(rhport);
+  }
+  return true;
+}
+
+//--------------------------------------------------------------------+
+// PUBLIC API (Parameter Verification is required)
+//--------------------------------------------------------------------+
+
+bool tuh_configure(uint8_t rhport, uint32_t cfg_id, const void *cfg_param) {
+  if ( hcd_configure ) {
+    return hcd_configure(rhport, cfg_id, cfg_param);
+  } else {
+    return false;
+  }
+}
+
+static void clear_device(usbh_device_t* dev) {
   tu_memclr(dev, sizeof(usbh_device_t));
   memset(dev->itf2drv, TUSB_INDEX_INVALID_8, sizeof(dev->itf2drv)); // invalid mapping
   memset(dev->ep2drv , TUSB_INDEX_INVALID_8, sizeof(dev->ep2drv )); // invalid mapping
 }
 
-bool tuh_inited(void)
-{
+bool tuh_inited(void) {
   return _usbh_controller != TUSB_INDEX_INVALID_8;
 }
 
-bool tuh_init(uint8_t controller_id)
-{
+bool tuh_init(uint8_t controller_id) {
   // skip if already initialized
   if ( tuh_inited() ) return true;
 
@@ -359,8 +365,7 @@ bool tuh_init(uint8_t controller_id)
   return true;
 }
 
-bool tuh_task_event_ready(void)
-{
+bool tuh_task_event_ready(void) {
   // Skip if stack is not initialized
   if ( !tuh_inited() ) return false;
 
@@ -385,8 +390,7 @@ bool tuh_task_event_ready(void)
     }
     @endcode
  */
-void tuh_task_ext(uint32_t timeout_ms, bool in_isr)
-{
+void tuh_task_ext(uint32_t timeout_ms, bool in_isr) {
   (void) in_isr; // not implemented yet
 
   // Skip if stack is not initialized
@@ -403,8 +407,7 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr)
       case HCD_EVENT_DEVICE_ATTACH:
         // due to the shared _usbh_ctrl_buf, we must complete enumerating
         // one device before enumerating another one.
-        if ( _dev0.enumerating )
-        {
+        if ( _dev0.enumerating ) {
           TU_LOG_USBH("[%u:] USBH Defer Attach until current enumeration complete\r\n", event.rhport);
 
           bool is_empty = osal_queue_empty(_usbh_q);
@@ -414,8 +417,7 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr)
             // Exit if this is the only event in the queue, otherwise we may loop forever
             return;
           }
-        }else
-        {
+        }else {
           TU_LOG_USBH("[%u:] USBH DEVICE ATTACH\r\n", event.rhport);
           _dev0.enumerating = 1;
           enum_new_device(&event);
@@ -428,8 +430,7 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr)
 
         #if CFG_TUH_HUB
         // TODO remove
-        if ( event.connection.hub_addr != 0)
-        {
+        if ( event.connection.hub_addr != 0) {
           // done with hub, waiting for next data on status pipe
           (void) hub_edpt_status_xfer( event.connection.hub_addr );
         }
@@ -1230,6 +1231,12 @@ static void process_removing_device(uint8_t rhport, uint8_t hub_addr, uint8_t hu
 // one device before enumerating another one.
 //--------------------------------------------------------------------+
 
+enum {
+  ENUM_RESET_DELAY = 50, // USB specs: 10 to 50ms
+  ENUM_CONTACT_DEBOUNCING_DELAY = 450, // when plug/unplug a device, physical connection can be bouncing and may
+                                       // generate a series of attach/detach event. This delay wait for stable connection
+};
+
 enum {
   ENUM_IDLE,
   ENUM_RESET_1,         // 1st reset when attached
@@ -1311,7 +1318,7 @@ static void process_enumeration(tuh_xfer_t* xfer)
     break;
 
     case ENUM_HUB_GET_STATUS_2:
-      osal_task_delay(RESET_DELAY);
+      osal_task_delay(ENUM_RESET_DELAY);
       TU_ASSERT( hub_port_get_status(_dev0.hub_addr, _dev0.hub_port, _usbh_ctrl_buf, process_enumeration, ENUM_HUB_CLEAR_RESET_2), );
     break;
 
@@ -1468,12 +1475,14 @@ static bool enum_new_device(hcd_event_t* event)
   if (_dev0.hub_addr == 0)
   {
     // connected/disconnected directly with roothub
-    // wait until device is stable TODO non blocking
     hcd_port_reset(_dev0.rhport);
-    osal_task_delay(RESET_DELAY); // TODO may not work for no-OS on MCU that require reset_end() since
-                                  // sof of controller may not running while resetting
+    osal_task_delay(ENUM_RESET_DELAY); // TODO may not work for no-OS on MCU that require reset_end() since
+                                        // sof of controller may not running while resetting
     hcd_port_reset_end( _dev0.rhport);
 
+    // wait until device connection is stable TODO non blocking
+    osal_task_delay(ENUM_CONTACT_DEBOUNCING_DELAY);
+
     // device unplugged while delaying
     if ( !hcd_port_connect_status(_dev0.rhport) ) {
       enum_full_complete();
@@ -1489,6 +1498,7 @@ static bool enum_new_device(hcd_event_t* event)
     xfer.result    = XFER_RESULT_SUCCESS;
     xfer.user_data = ENUM_ADDR0_DEVICE_DESC;
 
+
     process_enumeration(&xfer);
 
   }
@@ -1496,8 +1506,8 @@ static bool enum_new_device(hcd_event_t* event)
   else
   {
     // connected/disconnected via external hub
-    // wait until device is stable
-    osal_task_delay(RESET_DELAY);
+    // wait until device connection is stable TODO non blocking
+    osal_task_delay(ENUM_CONTACT_DEBOUNCING_DELAY);
 
     // ENUM_HUB_GET_STATUS
     //TU_ASSERT( hub_port_get_status(_dev0.hub_addr, _dev0.hub_port, _usbh_ctrl_buf, enum_hub_get_status0_complete, 0) );
@@ -1508,23 +1518,19 @@ static bool enum_new_device(hcd_event_t* event)
   return true;
 }
 
-static uint8_t get_new_address(bool is_hub)
-{
+static uint8_t get_new_address(bool is_hub) {
   uint8_t start;
   uint8_t end;
 
-  if ( is_hub )
-  {
+  if ( is_hub ) {
     start = CFG_TUH_DEVICE_MAX;
     end   = start + CFG_TUH_HUB;
-  }else
-  {
+  }else {
     start = 0;
     end   = start + CFG_TUH_DEVICE_MAX;
   }
 
-  for (uint8_t idx = start; idx < end; idx++)
-  {
+  for (uint8_t idx = start; idx < end; idx++) {
     if (!_usbh_devices[idx].connected) return (idx+1);
   }
 
diff --git a/src/host/usbh.h b/src/host/usbh.h
index 0d56f40c9..684e8240e 100644
--- a/src/host/usbh.h
+++ b/src/host/usbh.h
@@ -47,8 +47,7 @@ typedef void (*tuh_xfer_cb_t)(tuh_xfer_t* xfer);
 // it is advised to initialize it using member name
 // Note2: not all field is available/meaningful in callback,
 // some info is not saved by usbh to save SRAM
-struct tuh_xfer_s
-{
+struct tuh_xfer_s {
   uint8_t daddr;
   uint8_t ep_addr;
   uint8_t TU_RESERVED;      // reserved
@@ -56,8 +55,7 @@ struct tuh_xfer_s
 
   uint32_t actual_len;      // excluding setup packet
 
-  union
-  {
+  union {
     tusb_control_request_t const* setup; // setup packet pointer if control transfer
     uint32_t buflen;                     // expected length if not control transfer (not available in callback)
   };
@@ -70,15 +68,13 @@ struct tuh_xfer_s
 };
 
 // Subject to change
-typedef struct
-{
+typedef struct {
   uint8_t daddr;
   tusb_desc_interface_t desc;
 } tuh_itf_info_t;
 
 // ConfigID for tuh_config()
-enum
-{
+enum {
   TUH_CFGID_RPI_PIO_USB_CONFIGURATION = OPT_MCU_RP2040 << 8 // cfg_param: pio_usb_configuration_t
 };
 
@@ -105,12 +101,12 @@ TU_ATTR_WEAK void tuh_umount_cb(uint8_t daddr);
 // Should be called before tuh_init()
 // - cfg_id   : configure ID (TBD)
 // - cfg_param: configure data, structure depends on the ID
-bool tuh_configure(uint8_t controller_id, uint32_t cfg_id, const void* cfg_param);
+bool tuh_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param);
 
 // Init host stack
-bool tuh_init(uint8_t controller_id);
+bool tuh_init(uint8_t rhport);
 
-// Check if host stack is already initialized
+// Check if host stack is already initialized with any roothub ports
 bool tuh_inited(void);
 
 // Task function should be called in main/rtos loop, extended version of tuh_task()
@@ -120,8 +116,7 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr);
 
 // Task function should be called in main/rtos loop
 TU_ATTR_ALWAYS_INLINE static inline
-void tuh_task(void)
-{
+void tuh_task(void) {
   tuh_task_ext(UINT32_MAX, false);
 }
 
@@ -135,8 +130,20 @@ extern void hcd_int_handler(uint8_t rhport);
 // Interrupt handler, name alias to HCD
 #define tuh_int_handler   hcd_int_handler
 
+// Check if roothub port is initialized and active as a host
+bool tuh_rhport_is_active(uint8_t rhport);
+
+// Assert/de-assert Bus Reset signal to roothub port. USB specs: it should last 10-50ms
+bool tuh_rhport_reset_bus(uint8_t rhport, bool active);
+
+//--------------------------------------------------------------------+
+// Device API
+//--------------------------------------------------------------------+
+
+// Get VID/PID of device
 bool tuh_vid_pid_get(uint8_t daddr, uint16_t* vid, uint16_t* pid);
 
+// Get speed of device
 tusb_speed_t tuh_speed_get(uint8_t daddr);
 
 // Check if device is connected and configured
@@ -144,8 +151,7 @@ bool tuh_mounted(uint8_t daddr);
 
 // Check if device is suspended
 TU_ATTR_ALWAYS_INLINE static inline
-bool tuh_suspended(uint8_t daddr)
-{
+bool tuh_suspended(uint8_t daddr) {
   // TODO implement suspend & resume on host
   (void) daddr;
   return false;
@@ -153,8 +159,7 @@ bool tuh_suspended(uint8_t daddr)
 
 // Check if device is ready to communicate with
 TU_ATTR_ALWAYS_INLINE static inline
-bool tuh_ready(uint8_t daddr)
-{
+bool tuh_ready(uint8_t daddr) {
   return tuh_mounted(daddr) && !tuh_suspended(daddr);
 }
 
diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
index 6ee91e18e..462cbd301 100644
--- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
@@ -39,24 +39,27 @@
 #include "ci_hs_type.h"
 
 #if CFG_TUSB_MCU == OPT_MCU_MIMXRT1XXX
-  #include "ci_hs_imxrt.h"
 
-  bool hcd_dcache_clean(void const* addr, uint32_t data_size) {
-    return imxrt_dcache_clean(addr, data_size);
-  }
+#include "ci_hs_imxrt.h"
 
-  bool hcd_dcache_invalidate(void const* addr, uint32_t data_size) {
-    return imxrt_dcache_invalidate(addr, data_size);
-  }
+bool hcd_dcache_clean(void const* addr, uint32_t data_size) {
+  return imxrt_dcache_clean(addr, data_size);
+}
 
-  bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
-    return imxrt_dcache_clean_invalidate(addr, data_size);
-  }
+bool hcd_dcache_invalidate(void const* addr, uint32_t data_size) {
+  return imxrt_dcache_invalidate(addr, data_size);
+}
+
+bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
+  return imxrt_dcache_clean_invalidate(addr, data_size);
+}
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
-  #include "ci_hs_lpc18_43.h"
+
+#include "ci_hs_lpc18_43.h"
+
 #else
-  #error "Unsupported MCUs"
+#error "Unsupported MCUs"
 #endif
 
 //--------------------------------------------------------------------+
@@ -67,25 +70,25 @@
 // Controller API
 //--------------------------------------------------------------------+
 
-bool hcd_init(uint8_t rhport)
-{
-  ci_hs_regs_t* hcd_reg = CI_HS_REG(rhport);
+bool hcd_init(uint8_t rhport) {
+  ci_hs_regs_t *hcd_reg = CI_HS_REG(rhport);
 
   // Reset controller
   hcd_reg->USBCMD |= USBCMD_RESET;
-  while( hcd_reg->USBCMD & USBCMD_RESET ) {}
+  while ( hcd_reg->USBCMD & USBCMD_RESET ) {}
 
   // Set mode to device, must be set immediately after reset
 #if CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX
   // LPC18XX/43XX need to set VBUS Power Select to HIGH
   // RHPORT1 is fullspeed only (need external PHY for Highspeed)
   hcd_reg->USBMODE = USBMODE_CM_HOST | USBMODE_VBUS_POWER_SELECT;
-  if (rhport == 1) hcd_reg->PORTSC1 |= PORTSC1_FORCE_FULL_SPEED;
+  if ( rhport == 1 ) hcd_reg->PORTSC1 |= PORTSC1_FORCE_FULL_SPEED;
 #else
   hcd_reg->USBMODE = USBMODE_CM_HOST;
 #endif
 
   // FIXME force full speed, still have issue with Highspeed enumeration
+  // probably due to physical connection bouncing when plug/unplug
   // 1. Have issue when plug/unplug devices, maybe the port is not reset properly
   // 2. Also does not seems to detect disconnection
   hcd_reg->PORTSC1 |= PORTSC1_FORCE_FULL_SPEED;
@@ -93,13 +96,11 @@ bool hcd_init(uint8_t rhport)
   return ehci_init(rhport, (uint32_t) &hcd_reg->CAPLENGTH, (uint32_t) &hcd_reg->USBCMD);
 }
 
-void hcd_int_enable(uint8_t rhport)
-{
+void hcd_int_enable(uint8_t rhport) {
   CI_HCD_INT_ENABLE(rhport);
 }
 
-void hcd_int_disable(uint8_t rhport)
-{
+void hcd_int_disable(uint8_t rhport) {
   CI_HCD_INT_DISABLE(rhport);
 }
 
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 9be24c888..79811985c 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -188,6 +188,11 @@ void hcd_port_reset(uint8_t rhport)
 
   ehci_registers_t* regs = ehci_data.regs;
 
+  // skip if already in reset
+  if (regs->portsc_bm.port_reset) {
+    return;
+  }
+
   // mask out Write-1-to-Clear bits
   uint32_t portsc = regs->portsc & ~EHCI_PORTSC_MASK_W1C;
 
@@ -202,16 +207,18 @@ void hcd_port_reset(uint8_t rhport)
 void hcd_port_reset_end(uint8_t rhport)
 {
   (void) rhport;
-
-#if 0 // TODO check if this is necessary
   ehci_registers_t* regs = ehci_data.regs;
 
+  // skip if reset is already complete
+  if (!regs->portsc_bm.port_reset) {
+    return;
+  }
+
   // mask out all change bits since they are Write 1 to clear
-  uint32_t portsc = regs->portsc & ~EHCI_PORTSC_MASK_CHANGE_ALL;
-  portsc &= ~(EHCI_PORTSC_MASK_PORT_RESET);
+  uint32_t portsc = regs->portsc & ~EHCI_PORTSC_MASK_W1C;
+  portsc &= ~EHCI_PORTSC_MASK_PORT_RESET;
 
   regs->portsc = portsc;
-#endif
 }
 
 bool hcd_port_connect_status(uint8_t rhport)
@@ -426,6 +433,11 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
 
   hcd_dcache_clean(setup_packet, 8);
 
+  // Control endpoint never be stalled. Skip reset Data Toggle since it is fixed per stage
+  if (qhd->qtd_overlay.halted) {
+    qhd->qtd_overlay.halted = false;
+  }
+
   // attach TD to QHD -> start transferring
   qhd_attach_qtd(qhd, td);
 
@@ -662,7 +674,7 @@ void hcd_int_handler(uint8_t rhport)
   if (int_status & EHCI_INT_MASK_PORT_CHANGE) {
     // Including: Force port resume, over-current change, enable/disable change and connect status change.
     uint32_t const port_status = regs->portsc & EHCI_PORTSC_MASK_W1C;
-    print_portsc(regs);
+    // print_portsc(regs);
 
     if (regs->portsc_bm.connect_status_change) {
       port_connect_status_change_isr(rhport);

From 18646179d0c784660ca261fb675e21787451655b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 7 Aug 2023 18:23:16 +0700
Subject: [PATCH 584/691] fix host msc get maxlun not using aligned section
 memory

---
 src/class/msc/msc_host.c | 16 +++++++---------
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c
index a65208d69..90a58d3d0 100644
--- a/src/class/msc/msc_host.c
+++ b/src/class/msc/msc_host.c
@@ -421,8 +421,7 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *de
   return true;
 }
 
-bool msch_set_config(uint8_t dev_addr, uint8_t itf_num)
-{
+bool msch_set_config(uint8_t dev_addr, uint8_t itf_num) {
   msch_interface_t* p_msc = get_itf(dev_addr);
   TU_ASSERT(p_msc->itf_num == itf_num);
 
@@ -430,10 +429,8 @@ bool msch_set_config(uint8_t dev_addr, uint8_t itf_num)
 
   //------------- Get Max Lun -------------//
   TU_LOG_DRV("MSC Get Max Lun\r\n");
-  tusb_control_request_t const request =
-  {
-    .bmRequestType_bit =
-    {
+  tusb_control_request_t const request = {
+    .bmRequestType_bit = {
       .recipient = TUSB_REQ_RCPT_INTERFACE,
       .type      = TUSB_REQ_TYPE_CLASS,
       .direction = TUSB_DIR_IN
@@ -444,12 +441,11 @@ bool msch_set_config(uint8_t dev_addr, uint8_t itf_num)
     .wLength  = 1
   };
 
-  tuh_xfer_t xfer =
-  {
+  tuh_xfer_t xfer = {
     .daddr       = dev_addr,
     .ep_addr     = 0,
     .setup       = &request,
-    .buffer      = &p_msc->max_lun,
+    .buffer      = _msch_buffer,
     .complete_cb = config_get_maxlun_complete,
     .user_data    = 0
   };
@@ -467,6 +463,8 @@ static void config_get_maxlun_complete (tuh_xfer_t* xfer)
   p_msc->max_lun = (XFER_RESULT_SUCCESS == xfer->result) ? _msch_buffer[0] : 0;
   p_msc->max_lun++; // MAX LUN is minus 1 by specs
 
+  TU_LOG_DRV("  Max LUN = %u\r\n", p_msc->max_lun);
+
   // TODO multiple LUN support
   TU_LOG_DRV("SCSI Test Unit Ready\r\n");
   uint8_t const lun = 0;

From 4938971aad2f2a6adb71f4d8ce76e1d4b664092d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 7 Aug 2023 19:09:36 +0700
Subject: [PATCH 585/691] code format

---
 .../lpc18/boards/mcb1800/ozone/lpc1857.jdebug |  5 +-
 .../raspberrypi/pio_usb/hcd_pio_usb.c         | 73 +++++++------------
 2 files changed, 29 insertions(+), 49 deletions(-)

diff --git a/hw/bsp/lpc18/boards/mcb1800/ozone/lpc1857.jdebug b/hw/bsp/lpc18/boards/mcb1800/ozone/lpc1857.jdebug
index 6e298c62d..f94960f09 100644
--- a/hw/bsp/lpc18/boards/mcb1800/ozone/lpc1857.jdebug
+++ b/hw/bsp/lpc18/boards/mcb1800/ozone/lpc1857.jdebug
@@ -10,7 +10,7 @@
 */
 void OnProjectLoad (void) {
   Project.AddSvdFile ("Cortex-M3.svd");
-  Project.AddSvdFile ("./LPC18xx.svd");
+  Project.AddSvdFile ("../../../../../../../cmsis-svd/data/NXP/LPC18xx.svd");
 
   Project.SetDevice ("LPC1857");
   Project.SetHostIF ("USB", "");
@@ -20,7 +20,8 @@ void OnProjectLoad (void) {
   Project.SetTraceSource ("Trace Pins");
   Project.SetTracePortWidth (4);
 
-  File.Open ("../../../../../../examples/device/cdc_msc/cmake-build-mcb1800/cdc_msc.elf");
+  //File.Open ("../../../../../../examples/cmake-build-mcb1800/device/cdc_msc/cdc_msc.elf");
+  File.Open ("../../../../../../examples/cmake-build-mcb1800/host/cdc_msc_hid/cdc_msc_hid.elf");
 }
 /*********************************************************************
 *
diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
index adb83e97d..93bc1bf43 100644
--- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
+++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
@@ -48,16 +48,14 @@ static pio_usb_configuration_t pio_host_cfg = PIO_USB_DEFAULT_CONFIG;
 //--------------------------------------------------------------------+
 // HCD API
 //--------------------------------------------------------------------+
-bool hcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param)
-{
+bool hcd_configure(uint8_t rhport, uint32_t cfg_id, const void *cfg_param) {
   (void) rhport;
   TU_VERIFY(cfg_id == TUH_CFGID_RPI_PIO_USB_CONFIGURATION);
   memcpy(&pio_host_cfg, cfg_param, sizeof(pio_usb_configuration_t));
   return true;
 }
 
-bool hcd_init(uint8_t rhport)
-{
+bool hcd_init(uint8_t rhport) {
   (void) rhport;
 
   // To run USB SOF interrupt in core1, call this init in core1
@@ -66,20 +64,17 @@ bool hcd_init(uint8_t rhport)
   return true;
 }
 
-void hcd_port_reset(uint8_t rhport)
-{
+void hcd_port_reset(uint8_t rhport) {
   uint8_t const pio_rhport = RHPORT_PIO(rhport);
   pio_usb_host_port_reset_start(pio_rhport);
 }
 
-void hcd_port_reset_end(uint8_t rhport)
-{
+void hcd_port_reset_end(uint8_t rhport) {
   uint8_t const pio_rhport = RHPORT_PIO(rhport);
   pio_usb_host_port_reset_end(pio_rhport);
 }
 
-bool hcd_port_connect_status(uint8_t rhport)
-{
+bool hcd_port_connect_status(uint8_t rhport) {
   uint8_t const pio_rhport = RHPORT_PIO(rhport);
 
   root_port_t *root = PIO_USB_ROOT_PORT(pio_rhport);
@@ -88,33 +83,28 @@ bool hcd_port_connect_status(uint8_t rhport)
   return line_state != PORT_PIN_SE0;
 }
 
-tusb_speed_t hcd_port_speed_get(uint8_t rhport)
-{
+tusb_speed_t hcd_port_speed_get(uint8_t rhport) {
   // TODO determine link speed
   uint8_t const pio_rhport = RHPORT_PIO(rhport);
   return PIO_USB_ROOT_PORT(pio_rhport)->is_fullspeed ? TUSB_SPEED_FULL : TUSB_SPEED_LOW;
 }
 
 // Close all opened endpoint belong to this device
-void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
-{
+void hcd_device_close(uint8_t rhport, uint8_t dev_addr) {
   uint8_t const pio_rhport = RHPORT_PIO(rhport);
   pio_usb_host_close_device(pio_rhport, dev_addr);
 }
 
-uint32_t hcd_frame_number(uint8_t rhport)
-{
+uint32_t hcd_frame_number(uint8_t rhport) {
   (void) rhport;
   return pio_usb_host_get_frame_number();
 }
 
-void hcd_int_enable(uint8_t rhport)
-{
+void hcd_int_enable(uint8_t rhport) {
   (void) rhport;
 }
 
-void hcd_int_disable(uint8_t rhport)
-{
+void hcd_int_disable(uint8_t rhport) {
   (void) rhport;
 }
 
@@ -122,18 +112,16 @@ void hcd_int_disable(uint8_t rhport)
 // Endpoint API
 //--------------------------------------------------------------------+
 
-bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * desc_ep)
-{
+bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const *desc_ep) {
   hcd_devtree_info_t dev_tree;
   hcd_devtree_get_info(dev_addr, &dev_tree);
   bool const need_pre = (dev_tree.hub_addr && dev_tree.speed == TUSB_SPEED_LOW);
 
   uint8_t const pio_rhport = RHPORT_PIO(rhport);
-  return pio_usb_host_endpoint_open(pio_rhport, dev_addr, (uint8_t const*) desc_ep, need_pre);
+  return pio_usb_host_endpoint_open(pio_rhport, dev_addr, (uint8_t const *) desc_ep, need_pre);
 }
 
-bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen)
-{
+bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *buffer, uint16_t buflen) {
   uint8_t const pio_rhport = RHPORT_PIO(rhport);
   return pio_usb_host_endpoint_transfer(pio_rhport, dev_addr, ep_addr, buffer, buflen);
 }
@@ -143,8 +131,7 @@ bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
   return pio_usb_host_endpoint_abort_transfer(pio_rhport, dev_addr, ep_addr);
 }
 
-bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8])
-{
+bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) {
   uint8_t const pio_rhport = RHPORT_PIO(rhport);
   return pio_usb_host_send_setup(pio_rhport, dev_addr, setup_packet);
 }
@@ -171,18 +158,16 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
   return true;
 }
 
-static void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t* rport, xfer_result_t result, volatile uint32_t* ep_reg)
-{
+static void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t *rport, xfer_result_t result,
+                                                               volatile uint32_t *ep_reg) {
   (void) rport;
   const uint32_t ep_all = *ep_reg;
 
-  for(uint8_t ep_idx = 0; ep_idx < PIO_USB_EP_POOL_CNT; ep_idx++)
-  {
+  for ( uint8_t ep_idx = 0; ep_idx < PIO_USB_EP_POOL_CNT; ep_idx++ ) {
     uint32_t const mask = (1u << ep_idx);
 
-    if (ep_all & mask)
-    {
-      endpoint_t* ep = PIO_USB_ENDPOINT(ep_idx);
+    if ( ep_all & mask ) {
+      endpoint_t * ep = PIO_USB_ENDPOINT(ep_idx);
       hcd_event_xfer_complete(ep->dev_addr, ep->ep_num, ep->actual_len, result, true);
     }
   }
@@ -192,34 +177,28 @@ static void __no_inline_not_in_flash_func(handle_endpoint_irq)(root_port_t* rpor
 }
 
 // IRQ Handler
-void __no_inline_not_in_flash_func(pio_usb_host_irq_handler)(uint8_t root_id)
-{
+void __no_inline_not_in_flash_func(pio_usb_host_irq_handler)(uint8_t root_id) {
   uint8_t const tu_rhport = root_id + 1;
-  root_port_t* rport = PIO_USB_ROOT_PORT(root_id);
+  root_port_t *rport = PIO_USB_ROOT_PORT(root_id);
   uint32_t const ints = rport->ints;
 
-  if ( ints & PIO_USB_INTS_CONNECT_BITS )
-  {
+  if ( ints & PIO_USB_INTS_CONNECT_BITS ) {
     hcd_event_device_attach(tu_rhport, true);
   }
 
-  if ( ints & PIO_USB_INTS_DISCONNECT_BITS )
-  {
+  if ( ints & PIO_USB_INTS_DISCONNECT_BITS ) {
     hcd_event_device_remove(tu_rhport, true);
   }
 
-  if ( ints & PIO_USB_INTS_ENDPOINT_COMPLETE_BITS )
-  {
+  if ( ints & PIO_USB_INTS_ENDPOINT_COMPLETE_BITS ) {
     handle_endpoint_irq(rport, XFER_RESULT_SUCCESS, &rport->ep_complete);
   }
 
-  if ( ints & PIO_USB_INTS_ENDPOINT_STALLED_BITS )
-  {
+  if ( ints & PIO_USB_INTS_ENDPOINT_STALLED_BITS ) {
     handle_endpoint_irq(rport, XFER_RESULT_STALLED, &rport->ep_stalled);
   }
 
-  if ( ints & PIO_USB_INTS_ENDPOINT_ERROR_BITS )
-  {
+  if ( ints & PIO_USB_INTS_ENDPOINT_ERROR_BITS ) {
     handle_endpoint_irq(rport, XFER_RESULT_FAILED, &rport->ep_error);
   }
 

From c24f10e4f6d46c7f65136b57be0fa2063fe7c9f2 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Mon, 7 Aug 2023 20:48:54 +0200
Subject: [PATCH 586/691] Mount block device in test_cdc_msc.

---
 test/hitl/hitl_test.py | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/test/hitl/hitl_test.py b/test/hitl/hitl_test.py
index 6c8066add..f6e741646 100644
--- a/test/hitl/hitl_test.py
+++ b/test/hitl/hitl_test.py
@@ -22,8 +22,8 @@
 # THE SOFTWARE.
 
 # udev rules :
-# SUBSYSTEM=="block", SUBSYSTEMS=="usb", MODE="0666", PROGRAM="/bin/sh -c 'echo $$ID_SERIAL_SHORT | rev | cut -c -8 | rev'", SYMLINK+="blkUSB_%c.%s{bInterfaceNumber}"
-# SUBSYSTEM=="tty", SUBSYSTEMS=="usb", MODE="0666", PROGRAM="/bin/sh -c 'echo $$ID_SERIAL_SHORT | rev | cut -c -8 | rev'", SYMLINK+="ttyUSB_%c.%s{bInterfaceNumber}"
+# ACTION=="add", SUBSYSTEM=="tty", SUBSYSTEMS=="usb", MODE="0666", PROGRAM="/bin/sh -c 'echo $$ID_SERIAL_SHORT | rev | cut -c -8 | rev'", SYMLINK+="ttyUSB_%c.%s{bInterfaceNumber}"
+# ACTION=="add", SUBSYSTEM=="block", SUBSYSTEMS=="usb", ENV{ID_FS_USAGE}=="filesystem", MODE="0666", PROGRAM="/bin/sh -c 'echo $$ID_SERIAL_SHORT | rev | cut -c -8 | rev'", RUN{program}+="/usr/bin/systemd-mount --no-block --automount=yes --collect $devnode /media/blkUSB_%c.%s{bInterfaceNumber}"
 
 import os
 import sys
@@ -80,16 +80,16 @@ def test_cdc_dual_ports(id):
 
 def test_cdc_msc(id):
     port  = f'/dev/ttyUSB_{id[-8:]}.00'
-    block = f'/dev/blkUSB_{id[-8:]}.02'
+    file = f'/media/blkUSB_{id[-8:]}.02/README.TXT'
     # Wait device enum
     timeout = 10
     while timeout:
-        if os.path.exists(port) and os.path.exists(block):
+        if os.path.exists(port) and os.path.isfile(file):
             break
         time.sleep(1)
         timeout = timeout - 1
 
-    assert os.path.exists(port) and os.path.exists(block), \
+    assert os.path.exists(port) and os.path.isfile(file), \
         'Device not available'
 
     # Echo test
@@ -100,10 +100,10 @@ def test_cdc_msc(id):
     str = b"test_str"
     ser1.write(str)
     ser1.flush()
-    assert ser1.read(100) == str, 'Port wrong data'
+    assert ser1.read(100) == str, 'CDC wrong data'
 
     # Block test
-    f = open(block, 'rb')
+    f = open(file, 'rb')
     data = f.read()
 
     readme = \
@@ -111,7 +111,7 @@ def test_cdc_msc(id):
 If you find any bugs or get any questions, feel free to file an\r\n\
 issue at github.com/hathach/tinyusb"
 
-    assert data[0x600:0x600 + len(readme)] == readme, 'Block wrong data'
+    assert data == readme, 'MSC wrong data'
     print('cdc_msc test done')
 
 def test_dfu(id):

From 12ed867b5e494f7bb73e00fc953de32d78253491 Mon Sep 17 00:00:00 2001
From: Rocky04 <rockerfaeller04@gmx.de>
Date: Mon, 7 Aug 2023 20:59:08 +0200
Subject: [PATCH 587/691] Fixed typo

---
 examples/device/hid_composite_freertos/src/main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/examples/device/hid_composite_freertos/src/main.c b/examples/device/hid_composite_freertos/src/main.c
index 4ed506f6c..2ba646e7a 100644
--- a/examples/device/hid_composite_freertos/src/main.c
+++ b/examples/device/hid_composite_freertos/src/main.c
@@ -182,7 +182,7 @@ void tud_resume_cb(void)
   }
   else
   {
-    xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_SUSPENDED), 0);
+    xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_NOT_MOUNTED), 0);
   }
 }
 

From c959e65edde0b07b80c3e12f177afd938abbdcd6 Mon Sep 17 00:00:00 2001
From: Rocky04 <rockerfaeller04@gmx.de>
Date: Mon, 7 Aug 2023 21:16:41 +0200
Subject: [PATCH 588/691] Fixing wrong callback placement

---
 src/device/usbd.c | 21 ++++++++++-----------
 1 file changed, 10 insertions(+), 11 deletions(-)

diff --git a/src/device/usbd.c b/src/device/usbd.c
index b4ca63c9c..2daf91d77 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -711,7 +711,16 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
             }
 
             // switch to new configuration if not zero
-            if ( cfg_num ) TU_ASSERT( process_set_config(rhport, cfg_num) );
+            if ( cfg_num )
+            {
+              TU_ASSERT( process_set_config(rhport, cfg_num) );
+
+              if ( tud_mount_cb ) tud_mount_cb();
+            }
+            else
+            {
+              if ( tud_umount_cb ) tud_umount_cb();
+            }
           }
 
           _usbd_dev.cfg_num = cfg_num;
@@ -964,16 +973,6 @@ static bool process_set_config(uint8_t rhport, uint8_t cfg_num)
     TU_ASSERT(drv_id < TOTAL_DRIVER_COUNT);
   }
 
-  // invoke callback
-  if (cfg_num)
-  {
-    if (tud_mount_cb) tud_mount_cb();
-  }
-  else
-  {
-    if (tud_umount_cb) tud_umount_cb();
-  }
-
   return true;
 }
 

From 9602c06f8d52212b55b02533e188e91b7192c080 Mon Sep 17 00:00:00 2001
From: Rocky04 <rockerfaeller04@gmx.de>
Date: Mon, 7 Aug 2023 21:25:50 +0200
Subject: [PATCH 589/691] Correcting comments

---
 src/device/usbd.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/device/usbd.c b/src/device/usbd.c
index 2daf91d77..156b92ce1 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -710,9 +710,10 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
               _usbd_dev.speed = speed; // restore speed
             }
 
-            // switch to new configuration if not zero
+            // Handle the new configuration and execute the corresponding callback
             if ( cfg_num )
             {
+              // switch to new configuration if not zero
               TU_ASSERT( process_set_config(rhport, cfg_num) );
 
               if ( tud_mount_cb ) tud_mount_cb();

From 6d877c31705e4343d30e2a6b65cbd230a3fe2001 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 8 Aug 2023 18:50:24 +0700
Subject: [PATCH 590/691] added cmake for lpc54, update lpc55

---
 hw/bsp/lpc54/boards/lpcxpresso54608/board.h   |  59 +++++++
 hw/bsp/lpc54/boards/lpcxpresso54608/board.mk  |  18 ++
 .../lpc54/boards/lpcxpresso54628/board.cmake  |  22 +++
 hw/bsp/lpc54/family.cmake                     | 157 ++++++++++++++++++
 .../boards/double_m33_express/board.cmake     |   7 +-
 .../lpc55/boards/lpcxpresso55s28/board.cmake  |   5 +
 .../lpc55/boards/lpcxpresso55s69/board.cmake  |   7 +-
 hw/bsp/lpc55/family.cmake                     | 134 +++++++++------
 src/tusb_option.h                             |   7 +-
 9 files changed, 356 insertions(+), 60 deletions(-)
 create mode 100644 hw/bsp/lpc54/boards/lpcxpresso54608/board.h
 create mode 100644 hw/bsp/lpc54/boards/lpcxpresso54608/board.mk
 create mode 100644 hw/bsp/lpc54/boards/lpcxpresso54628/board.cmake
 create mode 100644 hw/bsp/lpc54/family.cmake

diff --git a/hw/bsp/lpc54/boards/lpcxpresso54608/board.h b/hw/bsp/lpc54/boards/lpcxpresso54608/board.h
new file mode 100644
index 000000000..8bbe18155
--- /dev/null
+++ b/hw/bsp/lpc54/boards/lpcxpresso54608/board.h
@@ -0,0 +1,59 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_LPCXPRESSO54608_H_
+#define BOARD_LPCXPRESSO54608_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_PORT              2
+#define LED_PIN               2
+#define LED_STATE_ON          0
+
+// WAKE button
+#define BUTTON_PORT           1
+#define BUTTON_PIN            1
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_DEV              USART0
+#define UART_RX_PINMUX        0, 29, IOCON_PIO_DIG_FUNC1_EN
+#define UART_TX_PINMUX        0, 30, IOCON_PIO_DIG_FUNC1_EN
+
+// USB0 VBUS
+#define USB0_VBUS_PINMUX      0, 22, IOCON_PIO_DIG_FUNC7_EN
+
+// XTAL
+//#define XTAL0_CLK_HZ          (16 * 1000 * 1000U)
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/hw/bsp/lpc54/boards/lpcxpresso54608/board.mk b/hw/bsp/lpc54/boards/lpcxpresso54608/board.mk
new file mode 100644
index 000000000..af2eaf507
--- /dev/null
+++ b/hw/bsp/lpc54/boards/lpcxpresso54608/board.mk
@@ -0,0 +1,18 @@
+MCU_VARIANT = LPC54608
+MCU_CORE = LPC54608
+
+PORT ?= 1
+
+CFLAGS += -DCPU_LPC54608J512ET180
+CFLAGS += -Wno-error=double-promotion
+
+LD_FILE = $(MCU_DIR)/gcc/LPC54608J512_flash.ld
+
+LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower_hardabi.a
+
+JLINK_DEVICE = LPC54608J512
+PYOCD_TARGET = LPC54608
+
+#flash: flash-pyocd
+
+flash: flash-jlink
diff --git a/hw/bsp/lpc54/boards/lpcxpresso54628/board.cmake b/hw/bsp/lpc54/boards/lpcxpresso54628/board.cmake
new file mode 100644
index 000000000..1dea6f353
--- /dev/null
+++ b/hw/bsp/lpc54/boards/lpcxpresso54628/board.cmake
@@ -0,0 +1,22 @@
+set(MCU_VARIANT LPC54628)
+set(MCU_CORE LPC54628)
+
+set(JLINK_DEVICE LPC54628J512)
+set(PYOCD_TARGET LPC54628)
+set(NXPLINK_DEVICE LPC54628:LPCXpresso54628)
+
+set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/LPC54628J512_flash.ld)
+
+# Device port default to PORT1 Highspeed
+if (NOT DEFINED PORT)
+  set(PORT 1)
+endif()
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_LPC54628J512ET180
+    )
+  target_link_libraries(${TARGET} PUBLIC
+    ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/libpower_hardabi.a
+    )
+endfunction()
diff --git a/hw/bsp/lpc54/family.cmake b/hw/bsp/lpc54/family.cmake
new file mode 100644
index 000000000..0512fe31f
--- /dev/null
+++ b/hw/bsp/lpc54/family.cmake
@@ -0,0 +1,157 @@
+include_guard()
+
+if (NOT BOARD)
+  message(FATAL_ERROR "BOARD not specified")
+endif ()
+
+set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
+set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS LPC54 CACHE INTERNAL "")
+
+if (NOT DEFINED PORT)
+  set(PORT 0)
+endif()
+
+# Host port will be the other port if available
+set(HOST_PORT $<NOT:${PORT}>)
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    add_library(${BOARD_TARGET} STATIC
+      # driver
+      ${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
+      ${SDK_DIR}/drivers/common/fsl_common_arm.c
+      ${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
+      ${SDK_DIR}/drivers/flexcomm/fsl_usart.c
+      # mcu
+      ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
+      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
+      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_power.c
+      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
+      )
+
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\)
+      BOARD_TUD_RHPORT=${PORT}
+      BOARD_TUH_RHPORT=${HOST_PORT}
+      )
+    # Port 0 is Fullspeed, Port 1 is Highspeed. Port1 controller can only access USB_SRAM
+    if (PORT EQUAL 1)
+      target_compile_definitions(${BOARD_TARGET} PUBLIC
+        BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+        BOARD_TUH_MAX_SPEED=OPT_MODE_FULL_SPEED
+        CFG_TUD_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
+        )
+    else ()
+      target_compile_definitions(${BOARD_TARGET} PUBLIC
+        BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
+        BOARD_TUH_MAX_SPEED=OPT_MODE_HIGH_SPEED
+        CFG_TUH_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
+        )
+    endif ()
+
+    target_include_directories(${BOARD_TARGET} PUBLIC
+      ${TOP}/lib/sct_neopixel
+      # driver
+      ${SDK_DIR}/drivers/common
+      ${SDK_DIR}/drivers/flexcomm
+      ${SDK_DIR}/drivers/lpc_iocon
+      ${SDK_DIR}/drivers/lpc_gpio
+      ${SDK_DIR}/drivers/lpuart
+      ${SDK_DIR}/drivers/sctimer
+      # mcu
+      ${CMSIS_DIR}/CMSIS/Core/Include
+      ${SDK_DIR}/devices/${MCU_VARIANT}
+      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+      )
+
+    update_board(${BOARD_TARGET})
+
+    if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+      set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
+    endif ()
+
+    if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
+      set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
+    endif ()
+
+    target_sources(${BOARD_TARGET} PUBLIC
+      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+      )
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        # linker file
+        "LINKER:--script=${LD_FILE_GNU}"
+        # nanolib
+        --specs=nosys.specs
+        --specs=nano.specs
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    # external driver
+    ${TOP}/lib/sct_neopixel/sct_neopixel.c
+    )
+
+  # https://github.com/gsteiert/sct_neopixel/pull/1
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    set_source_files_properties(${TOP}/lib/sct_neopixel/sct_neopixel.c PROPERTIES
+      COMPILE_FLAGS "-Wno-unused-parameter")
+  endif ()
+
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_LPC54 ${RTOS})
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_flash_jlink(${TARGET})
+  #family_flash_nxplink(${TARGET})
+  #family_flash_pyocd(${TARGET})
+endfunction()
diff --git a/hw/bsp/lpc55/boards/double_m33_express/board.cmake b/hw/bsp/lpc55/boards/double_m33_express/board.cmake
index f84e629c7..3324ce888 100644
--- a/hw/bsp/lpc55/boards/double_m33_express/board.cmake
+++ b/hw/bsp/lpc55/boards/double_m33_express/board.cmake
@@ -7,10 +7,13 @@ set(NXPLINK_DEVICE LPC55S69:LPCXpresso55S69)
 
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/LPC55S69_cm33_core0_uf2.ld)
 
+# Device port default to PORT1 Highspeed
+if (NOT DEFINED PORT)
+  set(PORT 1)
+endif()
+
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     CPU_LPC55S69JBD100_cm33_core0
-    # port 1 is highspeed
-    BOARD_TUD_RHPORT=1
     )
 endfunction()
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake b/hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake
index d935b70e6..b3d0c3349 100644
--- a/hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake
@@ -5,6 +5,11 @@ set(JLINK_DEVICE LPC55S28)
 set(PYOCD_TARGET LPC55S28)
 set(NXPLINK_DEVICE LPC55S28:LPCXpresso55S28)
 
+# Device port default to PORT1 Highspeed
+if (NOT DEFINED PORT)
+  set(PORT 1)
+endif()
+
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     CPU_LPC55S28JBD100
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
index fd7cb6de6..3af6034ad 100644
--- a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
@@ -5,10 +5,13 @@ set(JLINK_DEVICE LPC55S69)
 set(PYOCD_TARGET LPC55S69)
 set(NXPLINK_DEVICE LPC55S69:LPCXpresso55S69)
 
+# Device port default to PORT1 Highspeed
+if (NOT DEFINED PORT)
+  set(PORT 1)
+endif()
+
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     CPU_LPC55S69JBD100_cm33_core0
-    # port 1 is highspeed
-    # BOARD_TUD_RHPORT=1
     )
 endfunction()
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index dfd08a732..dce197b2d 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -7,79 +7,105 @@ endif ()
 set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
 set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
 
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
 # toolchain set up
 set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
 set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
-set(FAMILY_MCUS LPC55XX CACHE INTERNAL "")
+set(FAMILY_MCUS LPC55 CACHE INTERNAL "")
 
-# include board specific
-include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+if (NOT DEFINED PORT)
+  set(PORT 0)
+endif()
 
+# Host port will be the other port if available
+set(HOST_PORT $<NOT:${PORT}>)
 
 #------------------------------------
 # BOARD_TARGET
 #------------------------------------
 # only need to be built ONCE for all examples
 function(add_board_target BOARD_TARGET)
-  if (NOT TARGET ${BOARD_TARGET})
-    add_library(${BOARD_TARGET} STATIC
-      # driver
-      ${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
-      ${SDK_DIR}/drivers/common/fsl_common_arm.c
-      ${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
-      ${SDK_DIR}/drivers/flexcomm/fsl_usart.c
-      # mcu
-      ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
-      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
-      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_power.c
-      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
-      )
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
+
+  add_library(${BOARD_TARGET} STATIC
+    # driver
+    ${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
+    ${SDK_DIR}/drivers/common/fsl_common_arm.c
+    ${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
+    ${SDK_DIR}/drivers/flexcomm/fsl_usart.c
+    # mcu
+    ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_power.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
+    )
+
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\)
+    BOARD_TUD_RHPORT=${PORT}
+    BOARD_TUH_RHPORT=${HOST_PORT}
+    )
+  # Port 0 is Fullspeed, Port 1 is Highspeed. Port1 controller can only access USB_SRAM
+  if (PORT EQUAL 1)
     target_compile_definitions(${BOARD_TARGET} PUBLIC
-      CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\)
+      BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+      BOARD_TUH_MAX_SPEED=OPT_MODE_FULL_SPEED
+      CFG_TUD_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
       )
-    target_include_directories(${BOARD_TARGET} PUBLIC
-      ${TOP}/lib/sct_neopixel
-      # driver
-      ${SDK_DIR}/drivers/common
-      ${SDK_DIR}/drivers/flexcomm
-      ${SDK_DIR}/drivers/lpc_iocon
-      ${SDK_DIR}/drivers/lpc_gpio
-      ${SDK_DIR}/drivers/lpuart
-      ${SDK_DIR}/drivers/sctimer
-      # mcu
-      ${CMSIS_DIR}/CMSIS/Core/Include
-      ${SDK_DIR}/devices/${MCU_VARIANT}
-      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+  else ()
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
+      BOARD_TUH_MAX_SPEED=OPT_MODE_HIGH_SPEED
+      CFG_TUH_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
       )
+  endif ()
 
-    update_board(${BOARD_TARGET})
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${TOP}/lib/sct_neopixel
+    # driver
+    ${SDK_DIR}/drivers/common
+    ${SDK_DIR}/drivers/flexcomm
+    ${SDK_DIR}/drivers/lpc_iocon
+    ${SDK_DIR}/drivers/lpc_gpio
+    ${SDK_DIR}/drivers/lpuart
+    ${SDK_DIR}/drivers/sctimer
+    # mcu
+    ${CMSIS_DIR}/CMSIS/Core/Include
+    ${SDK_DIR}/devices/${MCU_VARIANT}
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+    )
 
-    if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
-      set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
-    endif ()
+  update_board(${BOARD_TARGET})
 
-    if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
-      set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
-    endif ()
+  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+    set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
+  endif ()
 
-    target_sources(${BOARD_TARGET} PUBLIC
-      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+  if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
+    set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
+  endif ()
+
+  target_sources(${BOARD_TARGET} PUBLIC
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      # linker file
+      "LINKER:--script=${LD_FILE_GNU}"
+      # nanolib
+      --specs=nosys.specs
+      --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
       )
-
-    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        # linker file
-        "LINKER:--script=${LD_FILE_GNU}"
-        # nanolib
-        --specs=nosys.specs
-        --specs=nano.specs
-        )
-    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--config=${LD_FILE_IAR}"
-        )
-    endif ()
   endif ()
 endfunction()
 
@@ -117,7 +143,7 @@ function(family_configure_example TARGET RTOS)
     )
 
   # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_LPC55XX ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_LPC55 ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
     )
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 7a4cfe51c..c72117850 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -51,8 +51,11 @@
 #define OPT_MCU_LPC40XX             7 ///< NXP LPC40xx
 #define OPT_MCU_LPC43XX             8 ///< NXP LPC43xx
 #define OPT_MCU_LPC51UXX            9 ///< NXP LPC51U6x
-#define OPT_MCU_LPC54XXX           10 ///< NXP LPC54xxx
-#define OPT_MCU_LPC55XX            11 ///< NXP LPC55xx
+#define OPT_MCU_LPC54              10 ///< NXP LPC54
+#define OPT_MCU_LPC55              11 ///< NXP LPC55
+// legacy naming
+#define OPT_MCU_LPC54XXX           OPT_MCU_LPC54
+#define OPT_MCU_LPC55XX            OPT_MCU_LPC55
 
 // NRF
 #define OPT_MCU_NRF5X             100 ///< Nordic nRF5x series

From 3444c4abe5d12ac2a74726cb244525f9481830ff Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Tue, 8 Aug 2023 17:34:07 +0200
Subject: [PATCH 591/691] Add dummy board_test.

---
 test/hitl/hitl_test.py | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/test/hitl/hitl_test.py b/test/hitl/hitl_test.py
index f6e741646..dc6019470 100644
--- a/test/hitl/hitl_test.py
+++ b/test/hitl/hitl_test.py
@@ -155,7 +155,7 @@ def test_dfu(id):
     print('dfu test done')
 
 def test_dfu_runtime(id):
-     # Wait device enum
+    # Wait device enum
     timeout = 10
     while timeout:
         ret = subprocess.run(f'dfu-util -l',
@@ -170,6 +170,9 @@ def test_dfu_runtime(id):
 
     print('dfu_runtime test done')
 
+def test_board_test(id):
+    # Dummy test
+    pass
 
 if __name__ == '__main__':
     if len(sys.argv) != 2:

From 56bed1e5811a97016533a25069408e45dd6f41ba Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Tue, 8 Aug 2023 17:34:45 +0200
Subject: [PATCH 592/691] Flash board_test when done, skip cdc_msc for LPC54.

---
 test/hitl/hitl_hfp.json | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/test/hitl/hitl_hfp.json b/test/hitl/hitl_hfp.json
index 297ae8b81..426123288 100644
--- a/test/hitl/hitl_hfp.json
+++ b/test/hitl/hitl_hfp.json
@@ -21,6 +21,10 @@
                 {
                     "name": "dfu_runtime",
                     "firmware": "examples/device/dfu_runtime/_build/stm32l412nucleo/dfu_runtime.elf"
+                },
+                {
+                    "name": "board_test",
+                    "firmware": "examples/device/board_test/_build/stm32l412nucleo/board_test.elf"
                 }
             ]
         },
@@ -45,6 +49,10 @@
                 {
                     "name": "dfu_runtime",
                     "firmware": "examples/device/dfu_runtime/_build/stm32f746disco/dfu_runtime.elf"
+                },
+                {
+                    "name": "board_test",
+                    "firmware": "examples/device/board_test/_build/stm32f746disco/board_test.elf"
                 }
             ]
         },
@@ -58,10 +66,6 @@
                     "name": "cdc_dual_ports",
                     "firmware": "examples/device/cdc_dual_ports/_build/lpcxpresso54628/cdc_dual_ports.elf"
                 },
-                {
-                    "name": "cdc_msc",
-                    "firmware": "examples/device/cdc_msc/_build/lpcxpresso54628/cdc_msc.elf"
-                },
                 {
                     "name": "dfu",
                     "firmware": "examples/device/dfu/_build/lpcxpresso54628/dfu.elf"
@@ -69,6 +73,10 @@
                 {
                     "name": "dfu_runtime",
                     "firmware": "examples/device/dfu_runtime/_build/lpcxpresso54628/dfu_runtime.elf"
+                },
+                {
+                    "name": "board_test",
+                    "firmware": "examples/device/board_test/_build/lpcxpresso54628/board_test.elf"
                 }
             ]
         }

From bffe321cd25681c5bab836098bde0f1aa215f5a7 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Tue, 8 Aug 2023 18:25:15 +0200
Subject: [PATCH 593/691] Update contributor.rst

---
 CONTRIBUTORS.rst | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/CONTRIBUTORS.rst b/CONTRIBUTORS.rst
index 50a33ae33..085f8082a 100644
--- a/CONTRIBUTORS.rst
+++ b/CONTRIBUTORS.rst
@@ -200,6 +200,8 @@ Notable contributors
 -  Add new DCD port for Microchip SAMx7x
 -  Add IAR compiler support
 -  Improve UAC2, CDC, DFU class driver
+-  Improve stm32_fsdev, chipidea_ci_hs, lpc_ip3511 DCD
+-  Host IAR Build CI & hardware in the loop (HITL) test
 
 
 `Full contributors list <https://github.com/hathach/tinyusb/contributors>`__

From 992e17fb4833f102e23f8241ac1d7fea0985cb4e Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Tue, 8 Aug 2023 22:08:59 +0200
Subject: [PATCH 594/691] Add simple test for hid_boot_interface.

---
 test/hitl/hitl_hfp.json |  8 ++++++++
 test/hitl/hitl_test.py  | 22 ++++++++++++++++++----
 2 files changed, 26 insertions(+), 4 deletions(-)

diff --git a/test/hitl/hitl_hfp.json b/test/hitl/hitl_hfp.json
index 426123288..866e5233f 100644
--- a/test/hitl/hitl_hfp.json
+++ b/test/hitl/hitl_hfp.json
@@ -22,6 +22,10 @@
                     "name": "dfu_runtime",
                     "firmware": "examples/device/dfu_runtime/_build/stm32l412nucleo/dfu_runtime.elf"
                 },
+                {
+                    "name": "hid_boot_interface",
+                    "firmware": "examples/device/hid_boot_interface/_build/stm32l412nucleo/hid_boot_interface.elf"
+                },
                 {
                     "name": "board_test",
                     "firmware": "examples/device/board_test/_build/stm32l412nucleo/board_test.elf"
@@ -50,6 +54,10 @@
                     "name": "dfu_runtime",
                     "firmware": "examples/device/dfu_runtime/_build/stm32f746disco/dfu_runtime.elf"
                 },
+                {
+                    "name": "hid_boot_interface",
+                    "firmware": "examples/device/hid_boot_interface/_build/stm32f746disco/hid_boot_interface.elf"
+                },
                 {
                     "name": "board_test",
                     "firmware": "examples/device/board_test/_build/stm32f746disco/board_test.elf"
diff --git a/test/hitl/hitl_test.py b/test/hitl/hitl_test.py
index dc6019470..695c6a28c 100644
--- a/test/hitl/hitl_test.py
+++ b/test/hitl/hitl_test.py
@@ -54,8 +54,7 @@ def test_cdc_dual_ports(id):
         time.sleep(1)
         timeout = timeout - 1
 
-    assert os.path.exists(port1) and os.path.exists(port2), \
-        'Device not available'
+    assert timeout, 'Device not available'
 
     # Echo test
     ser1 = serial.Serial(port1)
@@ -89,8 +88,7 @@ def test_cdc_msc(id):
         time.sleep(1)
         timeout = timeout - 1
 
-    assert os.path.exists(port) and os.path.isfile(file), \
-        'Device not available'
+    assert timeout, 'Device not available'
 
     # Echo test
     ser1 = serial.Serial(port)
@@ -170,6 +168,22 @@ def test_dfu_runtime(id):
 
     print('dfu_runtime test done')
 
+def test_hid_boot_interface(id):
+    kbd  = f'/dev/input/by-id/usb-TinyUSB_TinyUSB_Device_{id}-event-kbd'
+    mouse1  = f'/dev/input/by-id/usb-TinyUSB_TinyUSB_Device_{id}-if01-event-mouse'
+    mouse2  = f'/dev/input/by-id/usb-TinyUSB_TinyUSB_Device_{id}-if01-mouse'
+    # Wait device enum
+    timeout = 10
+    while timeout:
+        if os.path.exists(kbd) and os.path.exists(mouse1) and os.path.exists(mouse2):
+            break
+        time.sleep(1)
+        timeout = timeout - 1
+
+    assert timeout, 'Device not available'
+
+    print('hid_boot_interface test done')
+
 def test_board_test(id):
     # Dummy test
     pass

From b8b01c10758043d318716569e693912f3e02c75b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 8 Aug 2023 21:59:36 +0700
Subject: [PATCH 595/691] update to dcd ip3511 to add work-around for lpc54628
 usb hs errata USB.1 and USB.2

msc is mounted, but device couldn't work reliably and got constant reset
due to other errata probably.
---
 .idea/cmake.xml                              |   4 +-
 hw/bsp/lpc54/family.c                        |   6 +-
 hw/bsp/lpc54/family.cmake                    |   1 +
 src/common/tusb_common.h                     |   5 +-
 src/common/tusb_mcu.h                        |   8 +-
 src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c | 264 +++++++++++--------
 6 files changed, 169 insertions(+), 119 deletions(-)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 76143ba10..4a69d02cf 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -30,7 +30,8 @@
       <configuration PROFILE_NAME="mcb1800" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mcb1800 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="ea4088 quickstart" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ea4088_quickstart -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="ea4357" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ea4357 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="lpc55s69" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso55s69" />
+      <configuration PROFILE_NAME="lpc54628" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso54628 -DLOG=4 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="lpc55s69" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso55s69 -DLOG=4 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="mcxn947" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mcxn947brk -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10056 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10095 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
@@ -51,6 +52,7 @@
       <configuration PROFILE_NAME="ra6m5 PORT0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1 -DPORT=0" />
       <configuration PROFILE_NAME="uno_r4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=uno_r4 -DLOG=4 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="portenta_c33" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=portenta_c33 -DLOG=3" />
+      <configuration PROFILE_NAME="lpc54628 PORT0" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso54628 -DLOG=4 -DLOGGER=RTT -DPORT=0" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/hw/bsp/lpc54/family.c b/hw/bsp/lpc54/family.c
index 108a7d783..7411c72d4 100644
--- a/hw/bsp/lpc54/family.c
+++ b/hw/bsp/lpc54/family.c
@@ -70,13 +70,11 @@
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
-void USB0_IRQHandler(void)
-{
+void USB0_IRQHandler(void) {
   tud_int_handler(0);
 }
 
-void USB1_IRQHandler(void)
-{
+void USB1_IRQHandler(void) {
   tud_int_handler(1);
 }
 
diff --git a/hw/bsp/lpc54/family.cmake b/hw/bsp/lpc54/family.cmake
index 0512fe31f..b016441c1 100644
--- a/hw/bsp/lpc54/family.cmake
+++ b/hw/bsp/lpc54/family.cmake
@@ -59,6 +59,7 @@ function(add_board_target BOARD_TARGET)
         BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
         BOARD_TUH_MAX_SPEED=OPT_MODE_HIGH_SPEED
         CFG_TUH_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
+        #CFG_TUD_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
         )
     endif ()
 
diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index 25f85e501..c303c6eaf 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -159,11 +159,12 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_max16 (uint16_t x, uint16_t y) {
 TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_max32 (uint32_t x, uint32_t y) { return (x > y) ? x : y; }
 
 //------------- Align -------------//
-TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align(uint32_t value, uint32_t alignment)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align(uint32_t value, uint32_t alignment) {
   return value & ((uint32_t) ~(alignment-1));
 }
 
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align4  (uint32_t value) { return (value & 0xFFFFFFFCUL); }
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align8  (uint32_t value) { return (value & 0xFFFFFFF8UL); }
 TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align16 (uint32_t value) { return (value & 0xFFFFFFF0UL); }
 TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align32 (uint32_t value) { return (value & 0xFFFFFFE0UL); }
 TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align4k (uint32_t value) { return (value & 0xFFFFF000UL); }
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 89f89182e..35f94efbc 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -58,6 +58,7 @@
 // NXP
 //--------------------------------------------------------------------+
 #if   TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX)
+  #define TUP_USBIP_IP3511
   #define TUP_DCD_ENDPOINT_MAX    5
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
@@ -66,14 +67,17 @@
   #define TUP_OHCI_RHPORTS        2
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC51UXX)
+   #define TUP_USBIP_IP3511
    #define TUP_DCD_ENDPOINT_MAX   5
 
-#elif TU_CHECK_MCU(OPT_MCU_LPC54XXX)
+#elif TU_CHECK_MCU(OPT_MCU_LPC54)
   // TODO USB0 has 5, USB1 has 6
+  #define TUP_USBIP_IP3511
   #define TUP_DCD_ENDPOINT_MAX    6
 
-#elif TU_CHECK_MCU(OPT_MCU_LPC55XX)
+#elif TU_CHECK_MCU(OPT_MCU_LPC55)
   // TODO USB0 has 5, USB1 has 6
+  #define TUP_USBIP_IP3511
   #define TUP_DCD_ENDPOINT_MAX    6
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
index 7ca698a93..f4ed09d83 100644
--- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
+++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
@@ -34,18 +34,13 @@
  * - LPC54114
  * - LPC55s69
  */
-#if CFG_TUD_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_LPC11UXX || \
-                                 CFG_TUSB_MCU == OPT_MCU_LPC13XX  || \
-                                 CFG_TUSB_MCU == OPT_MCU_LPC15XX  || \
-                                 CFG_TUSB_MCU == OPT_MCU_LPC51UXX || \
-                                 CFG_TUSB_MCU == OPT_MCU_LPC54XXX || \
-                                 CFG_TUSB_MCU == OPT_MCU_LPC55XX)
+#if CFG_TUD_ENABLED && defined(TUP_USBIP_IP3511)
 
 //--------------------------------------------------------------------+
 // INCLUDE
 //--------------------------------------------------------------------+
 
-#if CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX || CFG_TUSB_MCU == OPT_MCU_LPC15XX
+#if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX)
   // LPCOpen
   #include "chip.h"
 #else
@@ -80,7 +75,7 @@ typedef struct {
 enum {
   NBYTES_ISO_FS_MAX = 1023, // FS ISO
   NBYTES_ISO_HS_MAX = 1024, // HS ISO
-  NBYTES_CBI_FS_MAX = 64, // FS control/bulk/interrupt
+  NBYTES_CBI_FS_MAX = 64,   // FS control/bulk/interrupt. TODO some FS can do burst with higher size e.g 1024. Need to test
   NBYTES_CBI_HS_MAX = 32767 // can be up to all 15-bit, but only tested with 4096
 };
 
@@ -90,26 +85,36 @@ enum {
 };
 
 enum {
-  CMDSTAT_DEVICE_ADDR_MASK    = TU_BIT(7 )-1,
-  CMDSTAT_DEVICE_ENABLE_MASK  = TU_BIT(7 ),
-  CMDSTAT_SETUP_RECEIVED_MASK = TU_BIT(8 ),
-  CMDSTAT_DEVICE_CONNECT_MASK = TU_BIT(16), // reflect the soft-connect only, does not reflect the actual attached state
-  CMDSTAT_DEVICE_SUSPEND_MASK = TU_BIT(17),
-                                            // 23-22 is link speed (only available for HighSpeed port)
-  CMDSTAT_CONNECT_CHANGE_MASK = TU_BIT(24),
-  CMDSTAT_SUSPEND_CHANGE_MASK = TU_BIT(25),
-  CMDSTAT_RESET_CHANGE_MASK   = TU_BIT(26),
-  CMDSTAT_VBUS_DEBOUNCED_MASK = TU_BIT(28),
+  DEVCMDSTAT_DEVICE_ADDR_MASK    = TU_BIT(7 )-1,
+  DEVCMDSTAT_DEVICE_ENABLE_MASK  = TU_BIT(7 ),
+  DEVCMDSTAT_SETUP_RECEIVED_MASK = TU_BIT(8 ),
+  DEVCMDSTAT_DEVICE_CONNECT_MASK = TU_BIT(16), // reflect the soft-connect only, does not reflect the actual attached state
+  DEVCMDSTAT_DEVICE_SUSPEND_MASK = TU_BIT(17),
+                                               // 23-22 is link speed (only available for HighSpeed port)
+  DEVCMDSTAT_CONNECT_CHANGE_MASK = TU_BIT(24),
+  DEVCMDSTAT_SUSPEND_CHANGE_MASK = TU_BIT(25),
+  DEVCMDSTAT_RESET_CHANGE_MASK   = TU_BIT(26),
+  DEVCMDSTAT_VBUS_DEBOUNCED_MASK = TU_BIT(28),
 };
 
 enum {
-  CMDSTAT_SPEED_SHIFT = 22
+  DEVCMDSTAT_SPEED_SHIFT = 22
 };
 
 //--------------------------------------------------------------------+
 // Endpoint Command/Status List
 //--------------------------------------------------------------------+
 
+// EP Command/Status field definition
+enum {
+  EPCS_TYPE         = TU_BIT(26),
+  EPCS_RF_TV        = TU_BIT(27),
+  EPCS_TOGGLE_RESET = TU_BIT(28),
+  EPCS_STALL        = TU_BIT(29),
+  EPCS_DISABLED     = TU_BIT(30),
+  EPCS_ACTIVE       = TU_BIT(31),
+};
+
 // Endpoint Command/Status
 typedef union TU_ATTR_PACKED
 {
@@ -133,8 +138,8 @@ typedef union TU_ATTR_PACKED
 
   volatile struct {
     uint32_t TU_RESERVED  : 26;
-    uint32_t is_iso       : 1 ;
-    uint32_t toggle_mode  : 1 ;
+    uint32_t type         : 1 ;
+    uint32_t rf_tv        : 1 ; // rate feedback or toggle value
     uint32_t toggle_reset : 1 ;
     uint32_t stall        : 1 ;
     uint32_t disable      : 1 ;
@@ -180,6 +185,7 @@ typedef struct
 CFG_TUD_MEM_SECTION TU_ATTR_ALIGNED(256) static dcd_data_t _dcd;
 
 // Dummy buffer to fix ZLPs overwriting the buffer (probably an USB/DMA controller bug)
+// TODO find way to save memory
 CFG_TUD_MEM_SECTION TU_ATTR_ALIGNED(64) static uint8_t dummy[8];
 
 //--------------------------------------------------------------------+
@@ -188,59 +194,73 @@ CFG_TUD_MEM_SECTION TU_ATTR_ALIGNED(64) static uint8_t dummy[8];
 
 typedef struct
 {
-  dcd_registers_t* regs;        // registers
-  const tusb_speed_t max_speed; // max link speed
-  const IRQn_Type irqnum;       // IRQ number
-  const uint8_t ep_pairs;       // Max bi-directional Endpoints
+  dcd_registers_t* regs;   // registers
+  const bool is_highspeed; // max link speed
+  const IRQn_Type irqnum;  // IRQ number
+  const uint8_t ep_pairs;  // Max bi-directional Endpoints
 }dcd_controller_t;
 
 #ifdef INCLUDE_FSL_DEVICE_REGISTERS
 
-static const dcd_controller_t _dcd_controller[] =
-{
-    { .regs = (dcd_registers_t*) USB0_BASE  , .max_speed = TUSB_SPEED_FULL, .irqnum = USB0_IRQn, .ep_pairs = FSL_FEATURE_USB_EP_NUM    },
+static const dcd_controller_t _dcd_controller[] = {
+    { .regs = (dcd_registers_t*) USB0_BASE  , .is_highspeed = false, .irqnum = USB0_IRQn, .ep_pairs = FSL_FEATURE_USB_EP_NUM    },
   #if defined(FSL_FEATURE_SOC_USBHSD_COUNT) && FSL_FEATURE_SOC_USBHSD_COUNT
-    { .regs = (dcd_registers_t*) USBHSD_BASE, .max_speed = TUSB_SPEED_HIGH, .irqnum = USB1_IRQn, .ep_pairs = FSL_FEATURE_USBHSD_EP_NUM }
+    { .regs = (dcd_registers_t*) USBHSD_BASE, .is_highspeed = true, .irqnum = USB1_IRQn, .ep_pairs = FSL_FEATURE_USBHSD_EP_NUM }
   #endif
 };
 
 #else
 
-static const dcd_controller_t _dcd_controller[] =
-{
-  { .regs = (dcd_registers_t*) LPC_USB0_BASE, .max_speed = TUSB_SPEED_FULL, .irqnum = USB0_IRQn, .ep_pairs = 5 },
+static const dcd_controller_t _dcd_controller[] = {
+  { .regs = (dcd_registers_t*) LPC_USB0_BASE, .is_highspeed = false, .irqnum = USB0_IRQn, .ep_pairs = 5 },
 };
 
 #endif
 
+#if defined(FSL_FEATURE_SOC_USBHSD_COUNT) && FSL_FEATURE_SOC_USBHSD_COUNT
+  #define IP3511_HAS_HIGHSPEED
+#endif
+
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
 
-static inline uint16_t get_buf_offset(void const * buffer)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint16_t get_buf_offset(void const * buffer) {
   uint32_t addr = (uint32_t) buffer;
   TU_ASSERT( (addr & 0x3f) == 0, 0 );
   return ( (addr >> 6) & 0xFFFFUL ) ;
 }
 
-static inline uint8_t ep_addr2id(uint8_t ep_addr)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint8_t ep_addr2id(uint8_t ep_addr) {
   return 2*(ep_addr & 0x0F) + ((ep_addr & TUSB_DIR_IN_MASK) ? 1 : 0);
 }
 
+TU_ATTR_ALWAYS_INLINE static inline bool ep_is_iso(ep_cmd_sts_t* ep_cs, bool is_highspeed) {
+  return is_highspeed ? (ep_cs[0].cmd_sts.type && !ep_cs[0].cmd_sts.rf_tv) : ep_cs->cmd_sts.type;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool ep_is_bulk(ep_cmd_sts_t* ep_cs) {
+  return (ep_cs[0].cmd_sts.type == 0) && (ep_cs[0].cmd_sts.rf_tv == 0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline ep_cmd_sts_t* get_ep_cs(uint8_t ep_id) {
+  return _dcd.ep[ep_id];
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool rhport_is_highspeed(uint8_t rhport) {
+  return _dcd_controller[rhport].is_highspeed;
+}
+
 //--------------------------------------------------------------------+
 // CONTROLLER API
 //--------------------------------------------------------------------+
 
-static void prepare_setup_packet(uint8_t rhport)
-{
-  if (_dcd_controller[rhport].max_speed == TUSB_SPEED_FULL )
-  {
-    _dcd.ep[0][1].buffer_fs.offset = get_buf_offset(_dcd.setup_packet);
-  }else
-  {
-    _dcd.ep[0][1].buffer_hs.offset = get_buf_offset(_dcd.setup_packet);
+static void prepare_setup_packet(uint8_t rhport) {
+  uint16_t const buf_offset = get_buf_offset(_dcd.setup_packet);
+  if ( _dcd_controller[rhport].is_highspeed ) {
+    _dcd.ep[0][1].buffer_hs.offset = buf_offset;
+  } else {
+    _dcd.ep[0][1].buffer_fs.offset = buf_offset;
   }
 }
 
@@ -268,8 +288,8 @@ void dcd_init(uint8_t rhport)
   dcd_reg->DATABUFSTART = tu_align((uint32_t) &_dcd, TU_BIT(22)); // 22-bit alignment
   dcd_reg->INTSTAT     |= dcd_reg->INTSTAT; // clear all pending interrupt
   dcd_reg->INTEN        = INT_DEVICE_STATUS_MASK;
-  dcd_reg->DEVCMDSTAT  |= CMDSTAT_DEVICE_ENABLE_MASK | CMDSTAT_DEVICE_CONNECT_MASK |
-                           CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK;
+  dcd_reg->DEVCMDSTAT  |= DEVCMDSTAT_DEVICE_ENABLE_MASK | DEVCMDSTAT_DEVICE_CONNECT_MASK |
+                           DEVCMDSTAT_RESET_CHANGE_MASK | DEVCMDSTAT_CONNECT_CHANGE_MASK | DEVCMDSTAT_SUSPEND_CHANGE_MASK;
 
   NVIC_ClearPendingIRQ(_dcd_controller[rhport].irqnum);
 }
@@ -291,7 +311,7 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
   // Response with status first before changing device address
   dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0);
 
-  dcd_reg->DEVCMDSTAT &= ~CMDSTAT_DEVICE_ADDR_MASK;
+  dcd_reg->DEVCMDSTAT &= ~DEVCMDSTAT_DEVICE_ADDR_MASK;
   dcd_reg->DEVCMDSTAT |= dev_addr;
 }
 
@@ -303,13 +323,13 @@ void dcd_remote_wakeup(uint8_t rhport)
 void dcd_connect(uint8_t rhport)
 {
   dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
-  dcd_reg->DEVCMDSTAT |= CMDSTAT_DEVICE_CONNECT_MASK;
+  dcd_reg->DEVCMDSTAT |= DEVCMDSTAT_DEVICE_CONNECT_MASK;
 }
 
 void dcd_disconnect(uint8_t rhport)
 {
   dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
-  dcd_reg->DEVCMDSTAT &= ~CMDSTAT_DEVICE_CONNECT_MASK;
+  dcd_reg->DEVCMDSTAT &= ~DEVCMDSTAT_DEVICE_CONNECT_MASK;
 }
 
 void dcd_sof_enable(uint8_t rhport, bool en)
@@ -340,19 +360,39 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
 
   _dcd.ep[ep_id][0].cmd_sts.stall        = 0;
   _dcd.ep[ep_id][0].cmd_sts.toggle_reset = 1;
-  _dcd.ep[ep_id][0].cmd_sts.toggle_mode  = 0;
+  _dcd.ep[ep_id][0].cmd_sts.rf_tv        = 0;
 }
 
 bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
 {
   //------------- Prepare Queue Head -------------//
   uint8_t ep_id = ep_addr2id(p_endpoint_desc->bEndpointAddress);
+  ep_cmd_sts_t* ep_cs = get_ep_cs(ep_id);
 
   // Check if endpoint is available
-  TU_ASSERT( _dcd.ep[ep_id][0].cmd_sts.disable && _dcd.ep[ep_id][1].cmd_sts.disable );
+  TU_ASSERT( ep_cs[0].cmd_sts.disable && ep_cs[1].cmd_sts.disable );
 
   edpt_reset(rhport, ep_id);
-  _dcd.ep[ep_id][0].cmd_sts.is_iso = (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS);
+
+  switch (p_endpoint_desc->bmAttributes.xfer) {
+    case TUSB_XFER_ISOCHRONOUS:
+      ep_cs[0].cmd_sts.type = 1;
+      break;
+
+    case TUSB_XFER_INTERRUPT:
+      // What is interrupt endpoint in rate feedback mode ?
+      if ( rhport_is_highspeed(rhport) ) {
+        ep_cs[0].cmd_sts.type = 1;
+        ep_cs[0].cmd_sts.rf_tv = 1;
+      }
+      break;
+
+    case TUSB_XFER_BULK:
+      // nothing to do both type and rf_tv are 0
+      break;
+
+    default: break;
+  }
 
   // Enable EP interrupt
   dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
@@ -379,42 +419,50 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
   _dcd.ep[ep_id][0].cmd_sts.disable = _dcd.ep[ep_id][1].cmd_sts.disable = 1;
 }
 
-static void prepare_ep_xfer(uint8_t rhport, uint8_t ep_id, uint16_t buf_offset, uint16_t total_bytes)
-{
+static void prepare_ep_xfer(uint8_t rhport, uint8_t ep_id, uint16_t buf_offset, uint16_t total_bytes) {
   uint16_t nbytes;
+  ep_cmd_sts_t* ep_cs = get_ep_cs(ep_id);
 
-  if (_dcd_controller[rhport].max_speed == TUSB_SPEED_FULL )
-  {
-    nbytes = tu_min16(total_bytes, _dcd.ep[ep_id][0].cmd_sts.is_iso ? NBYTES_ISO_FS_MAX : NBYTES_CBI_FS_MAX);
-    _dcd.ep[ep_id][0].buffer_fs.offset = buf_offset;
-    _dcd.ep[ep_id][0].buffer_fs.nbytes = nbytes;
-  }else
-  {
-    nbytes = tu_min16(total_bytes, NBYTES_CBI_HS_MAX);
-    _dcd.ep[ep_id][0].buffer_hs.offset = buf_offset;
-    _dcd.ep[ep_id][0].buffer_hs.nbytes = nbytes;
+  const bool is_iso = ep_is_iso(ep_cs, _dcd_controller[rhport].is_highspeed);
+
+  if ( rhport_is_highspeed(rhport) ) {
+    nbytes = tu_min16(total_bytes, is_iso ? NBYTES_ISO_HS_MAX : NBYTES_CBI_HS_MAX);
+    #if TU_CHECK_MCU(OPT_MCU_LPC54)
+    // LPC54 Errata USB.1: In USB high-speed device mode, the NBytes field does not decrement after BULK OUT transfer.
+    // Suggested Work-around: Program the NByte to the max packet size (512)
+    // Actual Work-around: round up NByte to multiple of 4.
+    // Note: this can cause buffer overflowed and corrupt data if host send more data than total_bytes
+    if ( (ep_id > 1) && (ep_id & 0x01) == 0 && ep_is_bulk(ep_cs) ) {
+      if ( nbytes & 0x03 ) {
+        nbytes = tu_align4(nbytes) + 4;
+      }
+    }
+    #endif
+
+    ep_cs[0].buffer_hs.offset = buf_offset;
+    ep_cs[0].buffer_hs.nbytes = nbytes;
+  }else {
+    nbytes = tu_min16(total_bytes, is_iso ? NBYTES_ISO_FS_MAX : NBYTES_CBI_FS_MAX);
+    ep_cs[0].buffer_fs.offset = buf_offset;
+    ep_cs[0].buffer_fs.nbytes = nbytes;
   }
 
   _dcd.dma[ep_id].nbytes = nbytes;
-
-  _dcd.ep[ep_id][0].cmd_sts.active = 1;
+  ep_cs[0].cmd_sts.active = 1;
 }
 
-bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes)
-{
+bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes) {
   uint8_t const ep_id = ep_addr2id(ep_addr);
 
+  if (!buffer || total_bytes == 0) {
+    // Although having no data, ZLPs can cause buffer overwritten to zeroes. Probably due to USB/DMA controller side
+    // effect/bug. Assigned buffer offset to (valid) dummy to prevent overwriting to DATABUFSTART
+    buffer = (uint8_t *) (uint32_t) dummy;
+  }
+
   tu_memclr(&_dcd.dma[ep_id], sizeof(xfer_dma_t));
   _dcd.dma[ep_id].total_bytes = total_bytes;
 
-  if (!buffer)
-  {
-    // Although having no data, ZLPs can cause buffer overwritten to zeroes.
-    // Probably due to USB/DMA controller side effect/bug.
-    // Assigned buffer offset to (valid) dummy to prevent overwriting to DATABUFSTART
-    buffer = (uint8_t*)(uint32_t)dummy;
-  }
-
   prepare_ep_xfer(rhport, ep_id, get_buf_offset(buffer), total_bytes);
 
   return true;
@@ -441,23 +489,19 @@ static void bus_reset(uint8_t rhport)
   dcd_reg->EPSKIP       = 0xFFFFFFFF;
 
   dcd_reg->INTSTAT      = dcd_reg->INTSTAT;                               // clear all pending interrupt
-  dcd_reg->DEVCMDSTAT  |= CMDSTAT_SETUP_RECEIVED_MASK;                    // clear setup received interrupt
+  dcd_reg->DEVCMDSTAT  |= DEVCMDSTAT_SETUP_RECEIVED_MASK;                    // clear setup received interrupt
   dcd_reg->INTEN        = INT_DEVICE_STATUS_MASK | TU_BIT(0) | TU_BIT(1); // enable device status & control endpoints
 }
 
-static void process_xfer_isr(uint8_t rhport, uint32_t int_status)
-{
+static void process_xfer_isr(uint8_t rhport, uint32_t int_status) {
   uint8_t const max_ep = 2*_dcd_controller[rhport].ep_pairs;
 
-  for(uint8_t ep_id = 0; ep_id < max_ep; ep_id++ )
-  {
-    if ( tu_bit_test(int_status, ep_id) )
-    {
+  for(uint8_t ep_id = 0; ep_id < max_ep; ep_id++ ) {
+    if ( tu_bit_test(int_status, ep_id) ) {
       ep_cmd_sts_t * ep_cs = &_dcd.ep[ep_id][0];
       xfer_dma_t* xfer_dma = &_dcd.dma[ep_id];
 
-      if ( ep_id == 0 || ep_id == 1)
-      {
+      if ( ep_id <= 1 ) {
         // For control endpoint, we need to manually clear Active bit
         ep_cs->cmd_sts.active = 0;
       }
@@ -465,26 +509,29 @@ static void process_xfer_isr(uint8_t rhport, uint32_t int_status)
       uint16_t buf_offset;
       uint16_t buf_nbytes;
 
-      if (_dcd_controller[rhport].max_speed == TUSB_SPEED_FULL)
-      {
-        buf_offset = ep_cs->buffer_fs.offset;
-        buf_nbytes = ep_cs->buffer_fs.nbytes;
-      }else
-      {
+      if ( rhport_is_highspeed(rhport) ) {
         buf_offset = ep_cs->buffer_hs.offset;
         buf_nbytes = ep_cs->buffer_hs.nbytes;
+
+        #if TU_CHECK_MCU(OPT_MCU_LPC54)
+        // LPC54 Errata USB.2: In USB high-speed device mode, the NBytes field is not correct after BULK IN transfer
+        // There is no work-around. For EP in transfer, the NByte value can be ignored after a packet is transmitted.
+        if ( (ep_id > 1) && (ep_id & 0x01) == 1 && ep_is_bulk(ep_cs) ) {
+          buf_nbytes = 0;
+        }
+        #endif
+      } else {
+        buf_offset = ep_cs->buffer_fs.offset;
+        buf_nbytes = ep_cs->buffer_fs.nbytes;
       }
 
       xfer_dma->xferred_bytes += xfer_dma->nbytes - buf_nbytes;
 
-      if ( (buf_nbytes == 0) && (xfer_dma->total_bytes > xfer_dma->xferred_bytes) )
-      {
+      if ( (buf_nbytes == 0) && (xfer_dma->total_bytes > xfer_dma->xferred_bytes) ) {
         // There is more data to transfer
         // buff_offset has been already increased by hw to correct value for next transfer
         prepare_ep_xfer(rhport, ep_id, buf_offset, xfer_dma->total_bytes - xfer_dma->xferred_bytes);
-      }
-      else
-      {
+      } else {
         // for detecting ZLP
         xfer_dma->total_bytes = xfer_dma->xferred_bytes;
 
@@ -511,19 +558,16 @@ void dcd_int_handler(uint8_t rhport)
   //------------- Device Status -------------//
   if ( int_status & INT_DEVICE_STATUS_MASK )
   {
-    dcd_reg->DEVCMDSTAT |= CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK;
+    dcd_reg->DEVCMDSTAT |= DEVCMDSTAT_RESET_CHANGE_MASK | DEVCMDSTAT_CONNECT_CHANGE_MASK | DEVCMDSTAT_SUSPEND_CHANGE_MASK;
 
-    if ( cmd_stat & CMDSTAT_RESET_CHANGE_MASK) // bus reset
+    if ( cmd_stat & DEVCMDSTAT_RESET_CHANGE_MASK) // bus reset
     {
       bus_reset(rhport);
 
       tusb_speed_t speed = TUSB_SPEED_FULL;
-
-      if (_dcd_controller[rhport].max_speed == TUSB_SPEED_HIGH)
-      {
+      if ( _dcd_controller[rhport].is_highspeed ) {
         // 0 : reserved, 1 : full, 2 : high, 3: super
-        if ( 2 == ((cmd_stat >> CMDSTAT_SPEED_SHIFT) & 0x3UL) )
-        {
+        if ( 2 == ((cmd_stat >> DEVCMDSTAT_SPEED_SHIFT) & 0x3UL) ) {
           speed= TUSB_SPEED_HIGH;
         }
       }
@@ -531,35 +575,35 @@ void dcd_int_handler(uint8_t rhport)
       dcd_event_bus_reset(rhport, speed, true);
     }
 
-    if (cmd_stat & CMDSTAT_CONNECT_CHANGE_MASK)
+    if (cmd_stat & DEVCMDSTAT_CONNECT_CHANGE_MASK)
     {
       // device disconnect
-      if (cmd_stat & CMDSTAT_DEVICE_ADDR_MASK)
+      if (cmd_stat & DEVCMDSTAT_DEVICE_ADDR_MASK)
       {
         // debouncing as this can be set when device is powering
         dcd_event_bus_signal(rhport, DCD_EVENT_UNPLUGGED, true);
       }
     }
 
-    if (cmd_stat & CMDSTAT_SUSPEND_CHANGE_MASK)
+    if (cmd_stat & DEVCMDSTAT_SUSPEND_CHANGE_MASK)
     {
       // suspend signal, bus idle for more than 3ms
       // Note: Host may delay more than 3 ms before and/or after bus reset before doing enumeration.
-      if (cmd_stat & CMDSTAT_DEVICE_ADDR_MASK)
+      if (cmd_stat & DEVCMDSTAT_DEVICE_ADDR_MASK)
       {
-        dcd_event_bus_signal(rhport, (cmd_stat & CMDSTAT_DEVICE_SUSPEND_MASK) ? DCD_EVENT_SUSPEND : DCD_EVENT_RESUME, true);
+        dcd_event_bus_signal(rhport, (cmd_stat & DEVCMDSTAT_DEVICE_SUSPEND_MASK) ? DCD_EVENT_SUSPEND : DCD_EVENT_RESUME, true);
       }
     }
   }
 
   // Setup Receive
-  if ( tu_bit_test(int_status, 0) && (cmd_stat & CMDSTAT_SETUP_RECEIVED_MASK) )
+  if ( tu_bit_test(int_status, 0) && (cmd_stat & DEVCMDSTAT_SETUP_RECEIVED_MASK) )
   {
     // Follow UM flowchart to clear Active & Stall on both Control IN/OUT endpoints
     _dcd.ep[0][0].cmd_sts.active = _dcd.ep[1][0].cmd_sts.active = 0;
     _dcd.ep[0][0].cmd_sts.stall = _dcd.ep[1][0].cmd_sts.stall = 0;
 
-    dcd_reg->DEVCMDSTAT |= CMDSTAT_SETUP_RECEIVED_MASK;
+    dcd_reg->DEVCMDSTAT |= DEVCMDSTAT_SETUP_RECEIVED_MASK;
 
     dcd_event_setup_received(rhport, _dcd.setup_packet, true);
 

From 1268d1a0937a1a7c9d7b20b17581a82f233d066d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 9 Aug 2023 18:46:23 +0700
Subject: [PATCH 596/691] update hil test and json (remove troublesome
 lpc54608), run hil test on ci with IAR build

---
 .github/workflows/build_iar.yml               | 149 +++++++++---------
 .idea/cmake.xml                               |   1 -
 examples/device/CMakeLists.txt                |   1 +
 .../lpc55/boards/lpcxpresso55s69/board.cmake  |   2 +-
 test/hitl/hitl_hfp.json                       |  84 +---------
 test/hitl/hitl_test.py                        |  84 +++++++---
 6 files changed, 146 insertions(+), 175 deletions(-)

diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml
index 454ad12fe..a62e62b79 100644
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@@ -32,7 +32,7 @@ jobs:
           # Alphabetical order
           # Note: bundle multiple families into a matrix since there is only one self-hosted instance can
           # run IAR build. Too many matrix can hurt due to setup/teardown overhead.
-          - 'stm32f0 stm32f1 stm32f7 stm32g0 stm32g4 stm32h7 stm32l4'
+          - 'stm32f0 stm32f1 stm32f4 stm32f7 stm32g0 stm32g4 stm32h7 stm32l4'
     steps:
       - name: Clean workspace
         run: |
@@ -49,82 +49,85 @@ jobs:
       - name: Build
         run: python3 tools/build_cmake.py ${{ matrix.family }} -DTOOLCHAIN=iar -DCMAKE_BUILD_TYPE=MinSizeRel
 
-      # Upload binaries for hardware test with self-hosted
-      - name: Prepare stm32l412nucleo Artifacts
-        if: contains(matrix.family, 'stm32l4')
-        working-directory: ${{github.workspace}}/cmake-build/cmake-build-stm32l412nucleo
+      - name: Test on actual hardware (hardware in the loop)
         run: |
-          find device/ -name "*.elf" -exec mv {} ../../ \;
+          python3 tools/hitl_test.py hitl_hfp.json
 
-      - name: Upload Artifacts for stm32l412nucleo
-        if: contains(matrix.family, 'stm32l4') && github.repository_owner == 'hathach'
-        uses: actions/upload-artifact@v3
-        with:
-          name: stm32l4
-          path: |
-            *.elf
+#      # Upload binaries for hardware test with self-hosted
+#      - name: Prepare stm32l412nucleo Artifacts
+#        if: contains(matrix.family, 'stm32l4')
+#        working-directory: ${{github.workspace}}/cmake-build/cmake-build-stm32l412nucleo
+#        run: |
+#          find device/ -name "*.elf" -exec mv {} ../../ \;
+#
+#      - name: Upload Artifacts for stm32l412nucleo
+#        if: contains(matrix.family, 'stm32l4') && github.repository_owner == 'hathach'
+#        uses: actions/upload-artifact@v3
+#        with:
+#          name: stm32l4
+#          path: |
+#            *.elf
 
   # ---------------------------------------
   # Hardware in the loop (HIL)
   # Current self-hosted instance is running on an EPYC 7232 server hosted by HiFiPhile user
-  # - STM32L412 Nucleo with on-board jlink as ttyACM0
   # ---------------------------------------
-  hw-stm32l412nucleo-test:
-    needs: cmake
-    runs-on: [self-hosted, Linux, X64, hifiphile]
-
-    steps:
-      - name: Clean workspace
-        run: |
-          echo "Cleaning up previous run"
-          rm -rf "${{ github.workspace }}"
-          mkdir -p "${{ github.workspace }}"
-
-      - name: Download stm32l4 Artifacts
-        uses: actions/download-artifact@v3
-        with:
-          name: stm32l4
-
-      - name: Create flash.sh
-        run: |
-          echo > flash.sh 'echo halt > flash.jlink'
-          echo >> flash.sh 'echo r >> flash.jlink'
-          echo >> flash.sh 'echo loadfile $1 >> flash.jlink'
-          echo >> flash.sh 'echo r >> flash.jlink'
-          echo >> flash.sh 'echo go >> flash.jlink'
-          echo >> flash.sh 'echo exit >> flash.jlink'
-          echo >> flash.sh 'cmdout=$(JLinkExe -USB 774470029 -device stm32l412kb -if swd -JTAGConf -1,-1 -speed auto -NoGui 1 -ExitOnError 1 -CommandFile flash.jlink)'
-          echo >> flash.sh 'if (( $? )) ; then echo $cmdout ; fi'
-          chmod +x flash.sh
-
-      - name: Test cdc_dual_ports
-        run: |
-          ./flash.sh cdc_dual_ports.elf
-          while (! ([ -e /dev/ttyACM1 ] && [ -e /dev/ttyACM2 ])) && [ $SECONDS -le 10 ]; do :; done
-          test -e /dev/ttyACM1 && echo "ttyACM1 exists"
-          test -e /dev/ttyACM2 && echo "ttyACM2 exists"
-
-        # Debian does not auto mount usb drive. skip this test for now
-      - name: Test cdc_msc
-        if: false
-        run: |
-          ./flash.sh cdc_msc.elf
-          readme='/media/pi/TinyUSB MSC/README.TXT'
-          while (! ([ -e /dev/ttyACM1 ] && [ -f "$readme" ])) && [ $SECONDS -le 10 ]; do :; done
-          test -e /dev/ttyACM1 && echo "ttyACM1 exists"
-          test -f "$readme" && echo "$readme exists"
-          cat "$readme"
-
-      - name: Test dfu
-        run: |
-          ./flash.sh dfu.elf
-          while (! (dfu-util -l | grep "Found DFU")) && [ $SECONDS -le 10 ]; do :; done
-          dfu-util -d cafe -a 0 -U dfu0
-          dfu-util -d cafe -a 1 -U dfu1
-          grep "TinyUSB DFU! - Partition 0" dfu0
-          grep "TinyUSB DFU! - Partition 1" dfu1
-
-      - name: Test dfu_runtime
-        run: |
-          ./flash.sh dfu_runtime.elf
-          while (! (dfu-util -l | grep "Found Runtime")) && [ $SECONDS -le 10 ]; do :; done
+#  hw-stm32l412nucleo-test:
+#    needs: cmake
+#    runs-on: [self-hosted, Linux, X64, hifiphile]
+#
+#    steps:
+#      - name: Clean workspace
+#        run: |
+#          echo "Cleaning up previous run"
+#          rm -rf "${{ github.workspace }}"
+#          mkdir -p "${{ github.workspace }}"
+#
+#      - name: Download stm32l4 Artifacts
+#        uses: actions/download-artifact@v3
+#        with:
+#          name: stm32l4
+#
+#      - name: Create flash.sh
+#        run: |
+#          echo > flash.sh 'echo halt > flash.jlink'
+#          echo >> flash.sh 'echo r >> flash.jlink'
+#          echo >> flash.sh 'echo loadfile $1 >> flash.jlink'
+#          echo >> flash.sh 'echo r >> flash.jlink'
+#          echo >> flash.sh 'echo go >> flash.jlink'
+#          echo >> flash.sh 'echo exit >> flash.jlink'
+#          echo >> flash.sh 'cmdout=$(JLinkExe -USB 774470029 -device stm32l412kb -if swd -JTAGConf -1,-1 -speed auto -NoGui 1 -ExitOnError 1 -CommandFile flash.jlink)'
+#          echo >> flash.sh 'if (( $? )) ; then echo $cmdout ; fi'
+#          chmod +x flash.sh
+#
+#      - name: Test cdc_dual_ports
+#        run: |
+#          ./flash.sh cdc_dual_ports.elf
+#          while (! ([ -e /dev/ttyACM1 ] && [ -e /dev/ttyACM2 ])) && [ $SECONDS -le 10 ]; do :; done
+#          test -e /dev/ttyACM1 && echo "ttyACM1 exists"
+#          test -e /dev/ttyACM2 && echo "ttyACM2 exists"
+#
+#        # Debian does not auto mount usb drive. skip this test for now
+#      - name: Test cdc_msc
+#        if: false
+#        run: |
+#          ./flash.sh cdc_msc.elf
+#          readme='/media/pi/TinyUSB MSC/README.TXT'
+#          while (! ([ -e /dev/ttyACM1 ] && [ -f "$readme" ])) && [ $SECONDS -le 10 ]; do :; done
+#          test -e /dev/ttyACM1 && echo "ttyACM1 exists"
+#          test -f "$readme" && echo "$readme exists"
+#          cat "$readme"
+#
+#      - name: Test dfu
+#        run: |
+#          ./flash.sh dfu.elf
+#          while (! (dfu-util -l | grep "Found DFU")) && [ $SECONDS -le 10 ]; do :; done
+#          dfu-util -d cafe -a 0 -U dfu0
+#          dfu-util -d cafe -a 1 -U dfu1
+#          grep "TinyUSB DFU! - Partition 0" dfu0
+#          grep "TinyUSB DFU! - Partition 1" dfu1
+#
+#      - name: Test dfu_runtime
+#        run: |
+#          ./flash.sh dfu_runtime.elf
+#          while (! (dfu-util -l | grep "Found Runtime")) && [ $SECONDS -le 10 ]; do :; done
diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 4a69d02cf..8ee7f09a0 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -52,7 +52,6 @@
       <configuration PROFILE_NAME="ra6m5 PORT0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1 -DPORT=0" />
       <configuration PROFILE_NAME="uno_r4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=uno_r4 -DLOG=4 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="portenta_c33" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=portenta_c33 -DLOG=3" />
-      <configuration PROFILE_NAME="lpc54628 PORT0" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso54628 -DLOG=4 -DLOGGER=RTT -DPORT=0" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/examples/device/CMakeLists.txt b/examples/device/CMakeLists.txt
index f590fff3f..0a2e49ef0 100644
--- a/examples/device/CMakeLists.txt
+++ b/examples/device/CMakeLists.txt
@@ -17,6 +17,7 @@ family_add_subdirectory(cdc_uac2)
 family_add_subdirectory(dfu)
 family_add_subdirectory(dfu_runtime)
 family_add_subdirectory(dynamic_configuration)
+family_add_subdirectory(hid_boot_interface)
 family_add_subdirectory(hid_composite)
 family_add_subdirectory(hid_composite_freertos)
 family_add_subdirectory(hid_generic_inout)
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
index 3af6034ad..b52ec2f9d 100644
--- a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
@@ -1,7 +1,7 @@
 set(MCU_VARIANT LPC55S69)
 set(MCU_CORE LPC55S69_cm33_core0)
 
-set(JLINK_DEVICE LPC55S69)
+set(JLINK_DEVICE LPC55S69_M33_0)
 set(PYOCD_TARGET LPC55S69)
 set(NXPLINK_DEVICE LPC55S69:LPCXpresso55S69)
 
diff --git a/test/hitl/hitl_hfp.json b/test/hitl/hitl_hfp.json
index 866e5233f..7912af245 100644
--- a/test/hitl/hitl_hfp.json
+++ b/test/hitl/hitl_hfp.json
@@ -1,92 +1,18 @@
 {
-    "devices": [
+    "boards": [
         {
+            "name": "stm32l412nucleo",
             "uid": "41003B000E504E5457323020",
             "debugger": "jlink",
             "debugger_sn": "774470029",
-            "device": "STM32L412KB",
-            "tests": [
-                {
-                    "name": "cdc_dual_ports",
-                    "firmware": "examples/device/cdc_dual_ports/_build/stm32l412nucleo/cdc_dual_ports.elf"
-                },
-                {
-                    "name": "cdc_msc",
-                    "firmware": "examples/device/cdc_msc/_build/stm32l412nucleo/cdc_msc.elf"
-                },
-                {
-                    "name": "dfu",
-                    "firmware": "examples/device/dfu/_build/stm32l412nucleo/dfu.elf"
-                },
-                {
-                    "name": "dfu_runtime",
-                    "firmware": "examples/device/dfu_runtime/_build/stm32l412nucleo/dfu_runtime.elf"
-                },
-                {
-                    "name": "hid_boot_interface",
-                    "firmware": "examples/device/hid_boot_interface/_build/stm32l412nucleo/hid_boot_interface.elf"
-                },
-                {
-                    "name": "board_test",
-                    "firmware": "examples/device/board_test/_build/stm32l412nucleo/board_test.elf"
-                }
-            ]
+            "cpu": "STM32L412KB"
         },
         {
+            "name": "stm32f746disco",
             "uid": "210041000C51343237303334",
             "debugger": "jlink",
             "debugger_sn": "770935966",
-            "device": "STM32F746NG",
-            "tests": [
-                {
-                    "name": "cdc_dual_ports",
-                    "firmware": "examples/device/cdc_dual_ports/_build/stm32f746disco/cdc_dual_ports.elf"
-                },
-                {
-                    "name": "cdc_msc",
-                    "firmware": "examples/device/cdc_msc/_build/stm32f746disco/cdc_msc.elf"
-                },
-                {
-                    "name": "dfu",
-                    "firmware": "examples/device/dfu/_build/stm32f746disco/dfu.elf"
-                },
-                {
-                    "name": "dfu_runtime",
-                    "firmware": "examples/device/dfu_runtime/_build/stm32f746disco/dfu_runtime.elf"
-                },
-                {
-                    "name": "hid_boot_interface",
-                    "firmware": "examples/device/hid_boot_interface/_build/stm32f746disco/hid_boot_interface.elf"
-                },
-                {
-                    "name": "board_test",
-                    "firmware": "examples/device/board_test/_build/stm32f746disco/board_test.elf"
-                }
-            ]
-        },
-        {
-            "uid": "0123456789ABCDEF",
-            "debugger": "jlink",
-            "debugger_sn": "727600775",
-            "device": "LPC54608J512",
-            "tests": [
-                {
-                    "name": "cdc_dual_ports",
-                    "firmware": "examples/device/cdc_dual_ports/_build/lpcxpresso54628/cdc_dual_ports.elf"
-                },
-                {
-                    "name": "dfu",
-                    "firmware": "examples/device/dfu/_build/lpcxpresso54628/dfu.elf"
-                },
-                {
-                    "name": "dfu_runtime",
-                    "firmware": "examples/device/dfu_runtime/_build/lpcxpresso54628/dfu_runtime.elf"
-                },
-                {
-                    "name": "board_test",
-                    "firmware": "examples/device/board_test/_build/lpcxpresso54628/board_test.elf"
-                }
-            ]
+            "cpu": "STM32F746NG"
         }
     ]
 }
diff --git a/test/hitl/hitl_test.py b/test/hitl/hitl_test.py
index 695c6a28c..6bcde36c6 100644
--- a/test/hitl/hitl_test.py
+++ b/test/hitl/hitl_test.py
@@ -32,6 +32,21 @@ import serial
 import subprocess
 import json
 
+
+def get_serial_dev(id, product, ifnum):
+    # get usb serial by id
+    return f'/dev/serial/by-id/usb-TinyUSB_{product}_{id}-if{ifnum:02d}'
+
+
+def get_disk_dev(id, lun):
+    # get usb disk by id
+    return f'/dev/disk/by-id/usb-TinyUSB_Mass_Storage_{id}-0:{lun}'
+
+
+def get_hid_dev(id, product, event):
+    return f'/dev/input/by-id/usb-TinyUSB_{product}_{id}-{event}'
+
+
 def flash_jlink(sn, dev, firmware):
     script = ['halt', 'r', f'loadfile {firmware}', 'r', 'go', 'exit']
     f = open('flash.jlink', 'w')
@@ -43,9 +58,15 @@ def flash_jlink(sn, dev, firmware):
     os.remove('flash.jlink')
     assert ret.returncode == 0, 'Flash failed\n' + stdout
 
+
+def test_board_test(id):
+    # Dummy test
+    pass
+
 def test_cdc_dual_ports(id):
-    port1 = f'/dev/ttyUSB_{id[-8:]}.00'
-    port2 = f'/dev/ttyUSB_{id[-8:]}.02'
+    port1 = get_serial_dev(id, "TinyUSB_Device", 0)
+    port2 = get_serial_dev(id, "TinyUSB_Device", 2)
+
     # Wait device enum
     timeout = 10
     while timeout:
@@ -75,10 +96,9 @@ def test_cdc_dual_ports(id):
     assert ser1.read(100) == str2.lower(), 'Port1 wrong data'
     assert ser2.read(100) == str2.upper(), 'Port2 wrong data'
 
-    print('cdc_dual_ports test done')
 
 def test_cdc_msc(id):
-    port  = f'/dev/ttyUSB_{id[-8:]}.00'
+    port = get_serial_dev(id, "TinyUSB_Device", 0)
     file = f'/media/blkUSB_{id[-8:]}.02/README.TXT'
     # Wait device enum
     timeout = 10
@@ -110,7 +130,6 @@ If you find any bugs or get any questions, feel free to file an\r\n\
 issue at github.com/hathach/tinyusb"
 
     assert data == readme, 'MSC wrong data'
-    print('cdc_msc test done')
 
 def test_dfu(id):
     # Wait device enum
@@ -150,7 +169,6 @@ def test_dfu(id):
     os.remove('dfu0')
     os.remove('dfu1')
 
-    print('dfu test done')
 
 def test_dfu_runtime(id):
     # Wait device enum
@@ -166,12 +184,11 @@ def test_dfu_runtime(id):
 
     assert timeout, 'Device not available'
 
-    print('dfu_runtime test done')
 
 def test_hid_boot_interface(id):
-    kbd  = f'/dev/input/by-id/usb-TinyUSB_TinyUSB_Device_{id}-event-kbd'
-    mouse1  = f'/dev/input/by-id/usb-TinyUSB_TinyUSB_Device_{id}-if01-event-mouse'
-    mouse2  = f'/dev/input/by-id/usb-TinyUSB_TinyUSB_Device_{id}-if01-mouse'
+    kbd = get_hid_dev(id, 'TinyUSB_Device', 'event-kbd')
+    mouse1 = get_hid_dev(id, 'TinyUSB_Device', 'if01-event-mouse')
+    mouse2 = get_hid_dev(id, 'TinyUSB_Device', 'if01-mouse')
     # Wait device enum
     timeout = 10
     while timeout:
@@ -182,11 +199,6 @@ def test_hid_boot_interface(id):
 
     assert timeout, 'Device not available'
 
-    print('hid_boot_interface test done')
-
-def test_board_test(id):
-    # Dummy test
-    pass
 
 if __name__ == '__main__':
     if len(sys.argv) != 2:
@@ -197,12 +209,42 @@ if __name__ == '__main__':
     with open(f'{os.path.dirname(__file__)}/{sys.argv[1]}') as f:
         config = json.load(f)
 
-    for device in config['devices']:
-        print(f"Testing device:{device['device']}")
-        for test in device['tests']:
-            if device['debugger'].lower() == 'jlink':
-                flash_jlink(device['debugger_sn'], device['device'], test['firmware'])
+    # all possible tests, board_test is last to disable board's usb
+    all_tests = [
+        'cdc_dual_ports', 'cdc_msc', 'dfu', 'dfu_runtime', 'hid_boot_interface', 'board_test'
+    ]
+
+    for board in config['boards']:
+        print(f'Testing board:{board["name"]}')
+
+        # default to all tests
+        if 'tests' in board:
+            test_list = board['tests']
+        else:
+            test_list = all_tests
+
+        # remove skip_tests
+        if 'tests_skip' in board:
+            for skip in board['tests_skip']:
+                if skip in test_list:
+                    test_list.remove(skip)
+
+        for test in test_list:
+            mk_elf = f'examples/device/{test}/_build/{board["name"]}/{test}.elf'
+            cmake_elf = f'cmake-build/cmake-build-{board["name"]}/device/{test}/{test}.elf'
+            if os.path.isfile(cmake_elf):
+                elf = cmake_elf
+            elif os.path.isfile(mk_elf):
+                elf = mk_elf
+            else:
+                print(f'Cannot find firmware file for {test}')
+                sys.exit(-1)
+
+            if board['debugger'].lower() == 'jlink':
+                flash_jlink(board['debugger_sn'], board['cpu'], elf)
             else:
                 # ToDo
                 pass
-            locals()[f'test_{test["name"]}'](device['uid'])
+            print(f'  {test} ...', end='')
+            locals()[f'test_{test}'](board['uid'])
+            print('OK')

From 8e690df1da3b542988b9ec093f3ce03c8cfd9248 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 9 Aug 2023 19:03:56 +0700
Subject: [PATCH 597/691] rename hitl to hil

---
 .github/workflows/build_iar.yml               | 2 +-
 test/{hitl/hitl_hfp.json => hil/hil_hfp.json} | 0
 test/{hitl/hitl_test.py => hil/hil_test.py}   | 0
 3 files changed, 1 insertion(+), 1 deletion(-)
 rename test/{hitl/hitl_hfp.json => hil/hil_hfp.json} (100%)
 rename test/{hitl/hitl_test.py => hil/hil_test.py} (100%)

diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml
index a62e62b79..48fdd6a8a 100644
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@@ -51,7 +51,7 @@ jobs:
 
       - name: Test on actual hardware (hardware in the loop)
         run: |
-          python3 tools/hitl_test.py hitl_hfp.json
+          python3 test/hil/hil_test.py hil_hfp.json
 
 #      # Upload binaries for hardware test with self-hosted
 #      - name: Prepare stm32l412nucleo Artifacts
diff --git a/test/hitl/hitl_hfp.json b/test/hil/hil_hfp.json
similarity index 100%
rename from test/hitl/hitl_hfp.json
rename to test/hil/hil_hfp.json
diff --git a/test/hitl/hitl_test.py b/test/hil/hil_test.py
similarity index 100%
rename from test/hitl/hitl_test.py
rename to test/hil/hil_test.py

From 202b945f88f104fda48104f40cad2525079ff5b1 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 14 Aug 2023 16:38:51 +0700
Subject: [PATCH 598/691] add lpcxpresso43s67

---
 hw/bsp/lpc18/boards/lpcxpresso18s37/board.h   |   1 +
 hw/bsp/lpc43/boards/ea4357/board.h            |  45 ++
 .../lpc43/boards/lpcxpresso43s67/board.cmake  |  11 +
 hw/bsp/lpc43/boards/lpcxpresso43s67/board.h   |  73 ++++
 hw/bsp/lpc43/boards/lpcxpresso43s67/board.mk  |   6 +
 .../lpc43/boards/lpcxpresso43s67/lpc4367.ld   | 402 ++++++++++++++++++
 hw/bsp/lpc43/family.c                         | 118 ++---
 7 files changed, 573 insertions(+), 83 deletions(-)
 create mode 100644 hw/bsp/lpc43/boards/lpcxpresso43s67/board.cmake
 create mode 100644 hw/bsp/lpc43/boards/lpcxpresso43s67/board.h
 create mode 100644 hw/bsp/lpc43/boards/lpcxpresso43s67/board.mk
 create mode 100644 hw/bsp/lpc43/boards/lpcxpresso43s67/lpc4367.ld

diff --git a/hw/bsp/lpc18/boards/lpcxpresso18s37/board.h b/hw/bsp/lpc18/boards/lpcxpresso18s37/board.h
index b3a7bc44f..f4c85ddc9 100644
--- a/hw/bsp/lpc18/boards/lpcxpresso18s37/board.h
+++ b/hw/bsp/lpc18/boards/lpcxpresso18s37/board.h
@@ -62,6 +62,7 @@ static inline void board_lpc18_pinmux(void)
     // USB0
     //{ 0x6, 3, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC1 },		                // P6_3 USB0_PWR_EN, USB0 VBus function
 
+    // USB1
     //{ 0x9, 5, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC2 },			              // P9_5 USB1_VBUS_EN, USB1 VBus function
     //{ 0x2, 5, SCU_MODE_INACT  | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC2 }, // P2_5 USB1_VBUS, MUST CONFIGURE THIS SIGNAL FOR USB1 NORMAL OPERATION
     {0x2, 5, SCU_MODE_INBUFF_EN | SCU_MODE_PULLUP | SCU_MODE_FUNC4 },
diff --git a/hw/bsp/lpc43/boards/ea4357/board.h b/hw/bsp/lpc43/boards/ea4357/board.h
index f026324ef..fb52e32a7 100644
--- a/hw/bsp/lpc43/boards/ea4357/board.h
+++ b/hw/bsp/lpc43/boards/ea4357/board.h
@@ -33,6 +33,51 @@ extern "C" {
 
 #include "pca9532.h"
 
+// P9_1 joystick down
+#define BUTTON_PORT     4
+#define BUTTON_PIN      13
+#define BUTTON_STATE_ACTIVE   0
+
+#define UART_DEV        LPC_USART0
+#define UART_PORT       0x0f
+#define UART_PIN_TX     10
+#define UART_PIN_RX     11
+
+//static const struct {
+//  uint8_t mux_port;
+//  uint8_t mux_pin;
+//
+//  uint8_t gpio_port;
+//  uint8_t gpio_pin;
+//}buttons[] =
+//{
+//    {0x0a, 3, 4, 10 }, // Joystick up
+//    {0x09, 1, 4, 13 }, // Joystick down
+//    {0x0a, 2, 4, 9  }, // Joystick left
+//    {0x09, 0, 4, 12 }, // Joystick right
+//    {0x0a, 1, 4, 8  }, // Joystick press
+//    {0x02, 7, 0, 7  }, // SW6
+//};
+
+static const PINMUX_GRP_T pinmuxing[] = {
+    // Button ( Joystick down )
+    { 0x9, 1, SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC0 | SCU_MODE_PULLUP },
+
+    // UART
+    { UART_PORT, UART_PIN_TX, SCU_MODE_PULLDOWN | SCU_MODE_FUNC1 },
+    { UART_PORT, UART_PIN_RX, SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC1 },
+
+    // USB
+};
+
+/* Pin clock mux values, re-used structure, value in first index is meaningless */
+//static const PINMUX_GRP_T pinclockmuxing[] = {
+//    { 0, 0, SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0 },
+//    { 0, 1, SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0 },
+//    { 0, 2, SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0 },
+//    { 0, 3, SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0 },
+//};
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/lpc43/boards/lpcxpresso43s67/board.cmake b/hw/bsp/lpc43/boards/lpcxpresso43s67/board.cmake
new file mode 100644
index 000000000..0858a97d5
--- /dev/null
+++ b/hw/bsp/lpc43/boards/lpcxpresso43s67/board.cmake
@@ -0,0 +1,11 @@
+set(MCU_VARIANT LPC43S67_M4)
+
+set(JLINK_DEVICE LPC43S67_M4)
+set(PYOCD_TARGET LPC43S67)
+set(NXPLINK_DEVICE LPC43S67:LPCXPRESSO43S67)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/lpc4367.ld)
+
+function(update_board TARGET)
+  # nothing to do
+endfunction()
diff --git a/hw/bsp/lpc43/boards/lpcxpresso43s67/board.h b/hw/bsp/lpc43/boards/lpcxpresso43s67/board.h
new file mode 100644
index 000000000..4dd90fe29
--- /dev/null
+++ b/hw/bsp/lpc43/boards/lpcxpresso43s67/board.h
@@ -0,0 +1,73 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _BOARD_LPCXPRESSO43S67_H_
+#define _BOARD_LPCXPRESSO43S67_H_
+
+// Note: For USB Host demo, install JP4
+// WARNING: don't install JP4 when running as device
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED Red
+#define LED_PORT      3
+#define LED_PIN       7
+#define LED_STATE_ON  0
+
+// ISP Button (SW2)
+#define BUTTON_PORT   0
+#define BUTTON_PIN    7
+#define BUTTON_STATE_ACTIVE   0
+
+#define UART_DEV      LPC_USART0
+
+static const PINMUX_GRP_T pinmuxing[] = {
+    // LEDs P6_11 as GPIO3[7]
+    { 0x6, 11, SCU_MODE_INBUFF_EN | SCU_MODE_PULLUP | SCU_MODE_FUNC0 },
+
+    // Button P2_7 as GPIO0[7]
+    { 0x2, 7, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC0 },
+
+    // UART
+    { 0x06, 4, SCU_MODE_PULLDOWN | SCU_MODE_FUNC2 },
+    { 0x02, 1, SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC1 },
+
+    // USB0
+    //{ 0x6, 3, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC1 },		                // P6_3 USB0_PWR_EN, USB0 VBus function
+
+    // USB 1
+    //{ 0x9, 5, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC2 },			              // P9_5 USB1_VBUS_EN, USB1 VBus function
+    //{ 0x2, 5, SCU_MODE_INACT  | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC2 }, // P2_5 USB1_VBUS, MUST CONFIGURE THIS SIGNAL FOR USB1 NORMAL OPERATION
+    {0x2, 5, SCU_MODE_INBUFF_EN | SCU_MODE_PULLUP | SCU_MODE_FUNC4 },
+};
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/hw/bsp/lpc43/boards/lpcxpresso43s67/board.mk b/hw/bsp/lpc43/boards/lpcxpresso43s67/board.mk
new file mode 100644
index 000000000..eeb02e311
--- /dev/null
+++ b/hw/bsp/lpc43/boards/lpcxpresso43s67/board.mk
@@ -0,0 +1,6 @@
+LD_FILE = $(BOARD_PATH)/lpc4367.ld
+
+# For flash-jlink target
+JLINK_DEVICE = LPC43S67_M4
+
+flash: flash-jlink
diff --git a/hw/bsp/lpc43/boards/lpcxpresso43s67/lpc4367.ld b/hw/bsp/lpc43/boards/lpcxpresso43s67/lpc4367.ld
new file mode 100644
index 000000000..c03149b8b
--- /dev/null
+++ b/hw/bsp/lpc43/boards/lpcxpresso43s67/lpc4367.ld
@@ -0,0 +1,402 @@
+/*
+ * GENERATED FILE - DO NOT EDIT
+ * Copyright (c) 2008-2013 Code Red Technologies Ltd,
+ * Copyright 2015, 2018-2019 NXP
+ * (c) NXP Semiconductors 2013-2023
+ * Generated linker script file for LPC4337
+ * Created from linkscript.ldt by FMCreateLinkLibraries
+ * Using Freemarker v2.3.30
+ * MCUXpresso IDE v11.7.1 [Build 9221] [2023-03-28] on Aug 14, 2023, 3:36:29 PM
+ */
+
+MEMORY
+{
+  /* Define each memory region */
+  MFlashA512 (rx) : ORIGIN = 0x1a000000, LENGTH = 0x80000 /* 512K bytes (alias Flash) */
+  MFlashB512 (rx) : ORIGIN = 0x1b000000, LENGTH = 0x80000 /* 512K bytes (alias Flash2) */
+  RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32K bytes (alias RAM) */
+  RamLoc40 (rwx) : ORIGIN = 0x10080000, LENGTH = 0xa000 /* 40K bytes (alias RAM2) */
+  RamAHB32 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000 /* 32K bytes (alias RAM3) */
+  RamAHB16 (rwx) : ORIGIN = 0x20008000, LENGTH = 0x4000 /* 16K bytes (alias RAM4) */
+  RamAHB_ETB16 (rwx) : ORIGIN = 0x2000c000, LENGTH = 0x4000 /* 16K bytes (alias RAM5) */
+}
+
+  /* Define a symbol for the top of each memory region */
+  __base_MFlashA512 = 0x1a000000  ; /* MFlashA512 */
+  __base_Flash = 0x1a000000 ; /* Flash */
+  __top_MFlashA512 = 0x1a000000 + 0x80000 ; /* 512K bytes */
+  __top_Flash = 0x1a000000 + 0x80000 ; /* 512K bytes */
+  __base_MFlashB512 = 0x1b000000  ; /* MFlashB512 */
+  __base_Flash2 = 0x1b000000 ; /* Flash2 */
+  __top_MFlashB512 = 0x1b000000 + 0x80000 ; /* 512K bytes */
+  __top_Flash2 = 0x1b000000 + 0x80000 ; /* 512K bytes */
+  __base_RamLoc32 = 0x10000000  ; /* RamLoc32 */
+  __base_RAM = 0x10000000 ; /* RAM */
+  __top_RamLoc32 = 0x10000000 + 0x8000 ; /* 32K bytes */
+  __top_RAM = 0x10000000 + 0x8000 ; /* 32K bytes */
+  __base_RamLoc40 = 0x10080000  ; /* RamLoc40 */
+  __base_RAM2 = 0x10080000 ; /* RAM2 */
+  __top_RamLoc40 = 0x10080000 + 0xa000 ; /* 40K bytes */
+  __top_RAM2 = 0x10080000 + 0xa000 ; /* 40K bytes */
+  __base_RamAHB32 = 0x20000000  ; /* RamAHB32 */
+  __base_RAM3 = 0x20000000 ; /* RAM3 */
+  __top_RamAHB32 = 0x20000000 + 0x8000 ; /* 32K bytes */
+  __top_RAM3 = 0x20000000 + 0x8000 ; /* 32K bytes */
+  __base_RamAHB16 = 0x20008000  ; /* RamAHB16 */
+  __base_RAM4 = 0x20008000 ; /* RAM4 */
+  __top_RamAHB16 = 0x20008000 + 0x4000 ; /* 16K bytes */
+  __top_RAM4 = 0x20008000 + 0x4000 ; /* 16K bytes */
+  __base_RamAHB_ETB16 = 0x2000c000  ; /* RamAHB_ETB16 */
+  __base_RAM5 = 0x2000c000 ; /* RAM5 */
+  __top_RamAHB_ETB16 = 0x2000c000 + 0x4000 ; /* 16K bytes */
+  __top_RAM5 = 0x2000c000 + 0x4000 ; /* 16K bytes */
+
+ENTRY(ResetISR)
+
+SECTIONS
+{
+     .text_Flash2 : ALIGN(4)
+    {
+       FILL(0xff)
+        *(.text_Flash2) /* for compatibility with previous releases */
+        *(.text_MFlashB512) /* for compatibility with previous releases */
+        *(.text.$Flash2)
+        *(.text.$MFlashB512)
+        *(.text_Flash2.*) /* for compatibility with previous releases */
+        *(.text_MFlashB512.*) /* for compatibility with previous releases */
+        *(.text.$Flash2.*)
+        *(.text.$MFlashB512.*)
+        *(.rodata.$Flash2)
+        *(.rodata.$MFlashB512)
+        *(.rodata.$Flash2.*)
+        *(.rodata.$MFlashB512.*)            } > MFlashB512
+
+    /* MAIN TEXT SECTION */
+    .text : ALIGN(4)
+    {
+        FILL(0xff)
+        __vectors_start__ = ABSOLUTE(.) ;
+        KEEP(*(.isr_vector))
+        /* Global Section Table */
+        . = ALIGN(4) ;
+        __section_table_start = .;
+        __data_section_table = .;
+        LONG(LOADADDR(.data));
+        LONG(    ADDR(.data));
+        LONG(  SIZEOF(.data));
+        LONG(LOADADDR(.data_RAM2));
+        LONG(    ADDR(.data_RAM2));
+        LONG(  SIZEOF(.data_RAM2));
+        LONG(LOADADDR(.data_RAM3));
+        LONG(    ADDR(.data_RAM3));
+        LONG(  SIZEOF(.data_RAM3));
+        LONG(LOADADDR(.data_RAM4));
+        LONG(    ADDR(.data_RAM4));
+        LONG(  SIZEOF(.data_RAM4));
+        LONG(LOADADDR(.data_RAM5));
+        LONG(    ADDR(.data_RAM5));
+        LONG(  SIZEOF(.data_RAM5));
+        __data_section_table_end = .;
+        __bss_section_table = .;
+        LONG(    ADDR(.bss));
+        LONG(  SIZEOF(.bss));
+        LONG(    ADDR(.bss_RAM2));
+        LONG(  SIZEOF(.bss_RAM2));
+        LONG(    ADDR(.bss_RAM3));
+        LONG(  SIZEOF(.bss_RAM3));
+        LONG(    ADDR(.bss_RAM4));
+        LONG(  SIZEOF(.bss_RAM4));
+        LONG(    ADDR(.bss_RAM5));
+        LONG(  SIZEOF(.bss_RAM5));
+        __bss_section_table_end = .;
+        __section_table_end = . ;
+        /* End of Global Section Table */
+
+        *(.after_vectors*)
+
+       *(.text*)
+       *(.rodata .rodata.* .constdata .constdata.*)
+       . = ALIGN(4);
+    } > MFlashA512
+    /*
+     * for exception handling/unwind - some Newlib functions (in common
+     * with C++ and STDC++) use this.
+     */
+    .ARM.extab : ALIGN(4)
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > MFlashA512
+
+    .ARM.exidx : ALIGN(4)
+    {
+        __exidx_start = .;
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+        __exidx_end = .;
+    } > MFlashA512
+
+    _etext = .;
+
+    /* DATA section for RamLoc40 */
+
+    .data_RAM2 : ALIGN(4)
+    {
+        FILL(0xff)
+        PROVIDE(__start_data_RAM2 = .) ;
+        PROVIDE(__start_data_RamLoc40 = .) ;
+        *(.ramfunc.$RAM2)
+        *(.ramfunc.$RamLoc40)
+        *(.data.$RAM2)
+        *(.data.$RamLoc40)
+        *(.data.$RAM2.*)
+        *(.data.$RamLoc40.*)
+        . = ALIGN(4) ;
+        PROVIDE(__end_data_RAM2 = .) ;
+        PROVIDE(__end_data_RamLoc40 = .) ;
+     } > RamLoc40 AT>MFlashA512
+
+    /* DATA section for RamAHB32 */
+
+    .data_RAM3 : ALIGN(4)
+    {
+        FILL(0xff)
+        PROVIDE(__start_data_RAM3 = .) ;
+        PROVIDE(__start_data_RamAHB32 = .) ;
+        *(.ramfunc.$RAM3)
+        *(.ramfunc.$RamAHB32)
+        *(.data.$RAM3)
+        *(.data.$RamAHB32)
+        *(.data.$RAM3.*)
+        *(.data.$RamAHB32.*)
+        . = ALIGN(4) ;
+        PROVIDE(__end_data_RAM3 = .) ;
+        PROVIDE(__end_data_RamAHB32 = .) ;
+     } > RamAHB32 AT>MFlashA512
+
+    /* DATA section for RamAHB16 */
+
+    .data_RAM4 : ALIGN(4)
+    {
+        FILL(0xff)
+        PROVIDE(__start_data_RAM4 = .) ;
+        PROVIDE(__start_data_RamAHB16 = .) ;
+        *(.ramfunc.$RAM4)
+        *(.ramfunc.$RamAHB16)
+        *(.data.$RAM4)
+        *(.data.$RamAHB16)
+        *(.data.$RAM4.*)
+        *(.data.$RamAHB16.*)
+        . = ALIGN(4) ;
+        PROVIDE(__end_data_RAM4 = .) ;
+        PROVIDE(__end_data_RamAHB16 = .) ;
+     } > RamAHB16 AT>MFlashA512
+
+    /* DATA section for RamAHB_ETB16 */
+
+    .data_RAM5 : ALIGN(4)
+    {
+        FILL(0xff)
+        PROVIDE(__start_data_RAM5 = .) ;
+        PROVIDE(__start_data_RamAHB_ETB16 = .) ;
+        *(.ramfunc.$RAM5)
+        *(.ramfunc.$RamAHB_ETB16)
+        *(.data.$RAM5)
+        *(.data.$RamAHB_ETB16)
+        *(.data.$RAM5.*)
+        *(.data.$RamAHB_ETB16.*)
+        . = ALIGN(4) ;
+        PROVIDE(__end_data_RAM5 = .) ;
+        PROVIDE(__end_data_RamAHB_ETB16 = .) ;
+     } > RamAHB_ETB16 AT>MFlashA512
+
+    /* MAIN DATA SECTION */
+    .uninit_RESERVED (NOLOAD) : ALIGN(4)
+    {
+        _start_uninit_RESERVED = .;
+        KEEP(*(.bss.$RESERVED*))
+       . = ALIGN(4) ;
+        _end_uninit_RESERVED = .;
+    } > RamLoc32 AT> RamLoc32
+
+    /* Main DATA section (RamLoc32) */
+    .data : ALIGN(4)
+    {
+       FILL(0xff)
+       _data = . ;
+       PROVIDE(__start_data_RAM = .) ;
+       PROVIDE(__start_data_RamLoc32 = .) ;
+       *(vtable)
+       *(.ramfunc*)
+       KEEP(*(CodeQuickAccess))
+       KEEP(*(DataQuickAccess))
+       *(RamFunction)
+       *(.data*)
+       . = ALIGN(4) ;
+       _edata = . ;
+       PROVIDE(__end_data_RAM = .) ;
+       PROVIDE(__end_data_RamLoc32 = .) ;
+    } > RamLoc32 AT>MFlashA512
+
+    /* BSS section for RamLoc40 */
+    .bss_RAM2 : ALIGN(4)
+    {
+       PROVIDE(__start_bss_RAM2 = .) ;
+       PROVIDE(__start_bss_RamLoc40 = .) ;
+       *(.bss.$RAM2)
+       *(.bss.$RamLoc40)
+       *(.bss.$RAM2.*)
+       *(.bss.$RamLoc40.*)
+       . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
+       PROVIDE(__end_bss_RAM2 = .) ;
+       PROVIDE(__end_bss_RamLoc40 = .) ;
+    } > RamLoc40 AT> RamLoc40
+
+    /* BSS section for RamAHB32 */
+    .bss_RAM3 : ALIGN(4)
+    {
+       PROVIDE(__start_bss_RAM3 = .) ;
+       PROVIDE(__start_bss_RamAHB32 = .) ;
+       *(.bss.$RAM3)
+       *(.bss.$RamAHB32)
+       *(.bss.$RAM3.*)
+       *(.bss.$RamAHB32.*)
+       . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
+       PROVIDE(__end_bss_RAM3 = .) ;
+       PROVIDE(__end_bss_RamAHB32 = .) ;
+    } > RamAHB32 AT> RamAHB32
+
+    /* BSS section for RamAHB16 */
+    .bss_RAM4 : ALIGN(4)
+    {
+       PROVIDE(__start_bss_RAM4 = .) ;
+       PROVIDE(__start_bss_RamAHB16 = .) ;
+       *(.bss.$RAM4)
+       *(.bss.$RamAHB16)
+       *(.bss.$RAM4.*)
+       *(.bss.$RamAHB16.*)
+       . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
+       PROVIDE(__end_bss_RAM4 = .) ;
+       PROVIDE(__end_bss_RamAHB16 = .) ;
+    } > RamAHB16 AT> RamAHB16
+
+    /* BSS section for RamAHB_ETB16 */
+    .bss_RAM5 : ALIGN(4)
+    {
+       PROVIDE(__start_bss_RAM5 = .) ;
+       PROVIDE(__start_bss_RamAHB_ETB16 = .) ;
+       *(.bss.$RAM5)
+       *(.bss.$RamAHB_ETB16)
+       *(.bss.$RAM5.*)
+       *(.bss.$RamAHB_ETB16.*)
+       . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
+       PROVIDE(__end_bss_RAM5 = .) ;
+       PROVIDE(__end_bss_RamAHB_ETB16 = .) ;
+    } > RamAHB_ETB16 AT> RamAHB_ETB16
+
+    /* MAIN BSS SECTION */
+    .bss : ALIGN(4)
+    {
+        _bss = .;
+        PROVIDE(__start_bss_RAM = .) ;
+        PROVIDE(__start_bss_RamLoc32 = .) ;
+        *(.bss*)
+        *(COMMON)
+        . = ALIGN(4) ;
+        _ebss = .;
+        PROVIDE(__end_bss_RAM = .) ;
+        PROVIDE(__end_bss_RamLoc32 = .) ;
+        PROVIDE(end = .);
+    } > RamLoc32 AT> RamLoc32
+
+    /* NOINIT section for RamLoc40 */
+    .noinit_RAM2 (NOLOAD) : ALIGN(4)
+    {
+       PROVIDE(__start_noinit_RAM2 = .) ;
+       PROVIDE(__start_noinit_RamLoc40 = .) ;
+       *(.noinit.$RAM2)
+       *(.noinit.$RamLoc40)
+       *(.noinit.$RAM2.*)
+       *(.noinit.$RamLoc40.*)
+       . = ALIGN(4) ;
+       PROVIDE(__end_noinit_RAM2 = .) ;
+       PROVIDE(__end_noinit_RamLoc40 = .) ;
+    } > RamLoc40 AT> RamLoc40
+
+    /* NOINIT section for RamAHB32 */
+    .noinit_RAM3 (NOLOAD) : ALIGN(4)
+    {
+       PROVIDE(__start_noinit_RAM3 = .) ;
+       PROVIDE(__start_noinit_RamAHB32 = .) ;
+       *(.noinit.$RAM3)
+       *(.noinit.$RamAHB32)
+       *(.noinit.$RAM3.*)
+       *(.noinit.$RamAHB32.*)
+       . = ALIGN(4) ;
+       PROVIDE(__end_noinit_RAM3 = .) ;
+       PROVIDE(__end_noinit_RamAHB32 = .) ;
+    } > RamAHB32 AT> RamAHB32
+
+    /* NOINIT section for RamAHB16 */
+    .noinit_RAM4 (NOLOAD) : ALIGN(4)
+    {
+       PROVIDE(__start_noinit_RAM4 = .) ;
+       PROVIDE(__start_noinit_RamAHB16 = .) ;
+       *(.noinit.$RAM4)
+       *(.noinit.$RamAHB16)
+       *(.noinit.$RAM4.*)
+       *(.noinit.$RamAHB16.*)
+       . = ALIGN(4) ;
+       PROVIDE(__end_noinit_RAM4 = .) ;
+       PROVIDE(__end_noinit_RamAHB16 = .) ;
+    } > RamAHB16 AT> RamAHB16
+
+    /* NOINIT section for RamAHB_ETB16 */
+    .noinit_RAM5 (NOLOAD) : ALIGN(4)
+    {
+       PROVIDE(__start_noinit_RAM5 = .) ;
+       PROVIDE(__start_noinit_RamAHB_ETB16 = .) ;
+       *(.noinit.$RAM5)
+       *(.noinit.$RamAHB_ETB16)
+       *(.noinit.$RAM5.*)
+       *(.noinit.$RamAHB_ETB16.*)
+       . = ALIGN(4) ;
+       PROVIDE(__end_noinit_RAM5 = .) ;
+       PROVIDE(__end_noinit_RamAHB_ETB16 = .) ;
+    } > RamAHB_ETB16 AT> RamAHB_ETB16
+
+    /* DEFAULT NOINIT SECTION */
+    .noinit (NOLOAD): ALIGN(4)
+    {
+        _noinit = .;
+        PROVIDE(__start_noinit_RAM = .) ;
+        PROVIDE(__start_noinit_RamLoc32 = .) ;
+        *(.noinit*)
+         . = ALIGN(4) ;
+        _end_noinit = .;
+       PROVIDE(__end_noinit_RAM = .) ;
+       PROVIDE(__end_noinit_RamLoc32 = .) ;
+    } > RamLoc32 AT> RamLoc32
+
+    PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
+
+    PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);
+
+    /* ## Create checksum value (used in startup) ## */
+    PROVIDE(__valid_user_code_checksum = 0 -
+                                         (_vStackTop
+                                         + (ResetISR + 1)
+                                         + (NMI_Handler + 1)
+                                         + (HardFault_Handler + 1)
+                                         + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)   /* MemManage_Handler may not be defined */
+                                         + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)     /* BusFault_Handler may not be defined */
+                                         + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
+                                         ) );
+
+    /* Provide basic symbols giving location and size of main text
+     * block, including initial values of RW data sections. Note that
+     * these will need extending to give a complete picture with
+     * complex images (e.g multiple Flash banks).
+     */
+    _image_start = LOADADDR(.text);
+    _image_end = LOADADDR(.data) + SIZEOF(.data);
+    _image_size = _image_end - _image_start;
+}
diff --git a/hw/bsp/lpc43/family.c b/hw/bsp/lpc43/family.c
index ba3191d5f..1c79ba7cf 100644
--- a/hw/bsp/lpc43/family.c
+++ b/hw/bsp/lpc43/family.c
@@ -39,31 +39,6 @@
 #include "bsp/board_api.h"
 #include "board.h"
 
-#define UART_DEV        LPC_USART0
-#define UART_PORT       0x0f
-#define UART_PIN_TX     10
-#define UART_PIN_RX     11
-
-// P9_1 joystick down
-#define BUTTON_PORT     4
-#define BUTTON_PIN      13
-
-//static const struct {
-//  uint8_t mux_port;
-//  uint8_t mux_pin;
-//
-//  uint8_t gpio_port;
-//  uint8_t gpio_pin;
-//}buttons[] =
-//{
-//    {0x0a, 3, 4, 10 }, // Joystick up
-//    {0x09, 1, 4, 13 }, // Joystick down
-//    {0x0a, 2, 4, 9  }, // Joystick left
-//    {0x09, 0, 4, 12 }, // Joystick right
-//    {0x0a, 1, 4, 8  }, // Joystick press
-//    {0x02, 7, 0, 7  }, // SW6
-//};
-
 #ifdef BOARD_TUD_RHPORT
   #define PORT_SUPPORT_DEVICE(_n)  (BOARD_TUD_RHPORT == _n)
 #else
@@ -76,34 +51,13 @@
   #define PORT_SUPPORT_HOST(_n)    0
 #endif
 
-/*------------------------------------------------------------------*/
-/* BOARD API
- *------------------------------------------------------------------*/
-
 /* System configuration variables used by chip driver */
 const uint32_t OscRateIn = 12000000;
 const uint32_t ExtRateIn = 0;
 
-static const PINMUX_GRP_T pinmuxing[] =
-{
-  // Button ( Joystick down )
-  {0x9, 1,  (SCU_MODE_INBUFF_EN | SCU_MODE_INACT | SCU_MODE_FUNC0 | SCU_MODE_PULLUP)},
-
-  // UART
-  {UART_PORT, UART_PIN_TX, SCU_MODE_PULLDOWN | SCU_MODE_FUNC1},
-  {UART_PORT, UART_PIN_RX, SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_FUNC1},
-
-  // USB
-};
-
-/* Pin clock mux values, re-used structure, value in first index is meaningless */
-static const PINMUX_GRP_T pinclockmuxing[] =
-{
-  {0, 0,  (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0)},
-  {0, 1,  (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0)},
-  {0, 2,  (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0)},
-  {0, 3,  (SCU_MODE_INACT | SCU_MODE_INBUFF_EN | SCU_MODE_ZIF_DIS | SCU_MODE_HIGHSPEEDSLEW_EN | SCU_MODE_FUNC0)},
-};
+/*------------------------------------------------------------------*/
+/* BOARD API
+ *------------------------------------------------------------------*/
 
 // Invoked by startup code
 void SystemInit(void)
@@ -113,19 +67,18 @@ void SystemInit(void)
   unsigned int *pSCB_VTOR = (unsigned int *) 0xE000ED08;
 	*pSCB_VTOR = (unsigned int) g_pfnVectors;
 
-#if __FPU_USED == 1
+  #if __FPU_USED == 1
 	fpuInit();
+  #endif
 #endif
-#endif // __USE_LPCOPEN
 
-	/* Setup system level pin muxing */
-	Chip_SCU_SetPinMuxing(pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T));
+  /* Setup system level pin muxing */
+  Chip_SCU_SetPinMuxing(pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T));
 
-	/* Clock pins only, group field not used */
-	for (int i = 0; i <(int)  (sizeof(pinclockmuxing) / sizeof(pinclockmuxing[0])); i++)
-	{
-		Chip_SCU_ClockPinMuxSet(pinclockmuxing[i].pinnum, pinclockmuxing[i].modefunc);
-	}
+//  /* Clock pins only, group field not used */
+//  for ( int i = 0; i < (int) (sizeof(pinclockmuxing) / sizeof(pinclockmuxing[0])); i++ ) {
+//    Chip_SCU_ClockPinMuxSet(pinclockmuxing[i].pinnum, pinclockmuxing[i].modefunc);
+//  }
 
   Chip_SetupXtalClocking();
 }
@@ -144,13 +97,16 @@ void board_init(void)
 
   Chip_GPIO_Init(LPC_GPIO_PORT);
 
+#ifdef __PCA9532C_H
   // LED via pca9532 I2C
   Chip_SCU_I2C0PinConfig(I2C0_STANDARD_FAST_MODE);
   Chip_I2C_Init(I2C0);
   Chip_I2C_SetClockRate(I2C0, 100000);
   Chip_I2C_SetMasterEventHandler(I2C0, Chip_I2C_EventHandlerPolling);
-
   pca9532_init();
+#else
+  Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, LED_PORT, LED_PIN);
+#endif
 
   // Button
   Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN);
@@ -264,34 +220,30 @@ void USB1_IRQHandler(void)
 // Board porting API
 //--------------------------------------------------------------------+
 
-void board_led_write(bool state)
-{
-  if (state)
-  {
-    pca9532_setLeds( LED1, 0 );
-  }else
-  {
-    pca9532_setLeds( 0, LED1);
+void board_led_write(bool state) {
+  #ifdef __PCA9532C_H
+  if ( state ) {
+    pca9532_setLeds(LED1, 0);
+  } else {
+    pca9532_setLeds(0, LED1);
   }
+  #else
+  Chip_GPIO_SetPinState(LPC_GPIO_PORT, LED_PORT, LED_PIN, state ? LED_STATE_ON : !LED_STATE_ON);
+  #endif
 }
 
-uint32_t board_button_read(void)
-{
-  // active low
-  return Chip_GPIO_GetPinState(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN) ? 0 : 1;
+uint32_t board_button_read(void) {
+  return BUTTON_STATE_ACTIVE == Chip_GPIO_GetPinState(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN);
 }
 
-int board_uart_read(uint8_t* buf, int len)
-{
+int board_uart_read(uint8_t *buf, int len) {
   return Chip_UART_Read(UART_DEV, buf, len);
 }
 
-int board_uart_write(void const * buf, int len)
-{
-  uint8_t const* buf8 = (uint8_t const*) buf;
-  for(int i=0; i<len; i++)
-  {
-    while ((Chip_UART_ReadLineStatus(UART_DEV) & UART_LSR_THRE) == 0) {}
+int board_uart_write(void const *buf, int len) {
+  uint8_t const *buf8 = (uint8_t const *) buf;
+  for ( int i = 0; i < len; i++ ) {
+    while ( (Chip_UART_ReadLineStatus(UART_DEV) & UART_LSR_THRE) == 0 ) {}
     Chip_UART_SendByte(UART_DEV, buf8[i]);
   }
 
@@ -300,13 +252,13 @@ int board_uart_write(void const * buf, int len)
 
 #if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
+
+void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void)
-{
+uint32_t board_millis(void) {
   return system_ticks;
 }
+
 #endif

From 78e5b2c6a4d58701dbb9c0ff69ba6cc02f5cc8e1 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 14 Aug 2023 16:52:16 +0700
Subject: [PATCH 599/691] add board_get_unique_id() for lpc43

---
 hw/bsp/lpc43/family.c     |  7 +++++++
 hw/bsp/lpc43/family.cmake |  1 +
 hw/bsp/lpc43/family.mk    | 11 +++++++----
 3 files changed, 15 insertions(+), 4 deletions(-)

diff --git a/hw/bsp/lpc43/family.c b/hw/bsp/lpc43/family.c
index 1c79ba7cf..8d80bf951 100644
--- a/hw/bsp/lpc43/family.c
+++ b/hw/bsp/lpc43/family.c
@@ -236,6 +236,13 @@ uint32_t board_button_read(void) {
   return BUTTON_STATE_ACTIVE == Chip_GPIO_GetPinState(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN);
 }
 
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  if ( max_len < 16 ) return 0;
+  uint32_t* id32 = (uint32_t*) (uintptr_t) id;
+  Chip_IAP_ReadUID(id32);
+  return 16;
+}
+
 int board_uart_read(uint8_t *buf, int len) {
   return Chip_UART_Read(UART_DEV, buf, len);
 }
diff --git a/hw/bsp/lpc43/family.cmake b/hw/bsp/lpc43/family.cmake
index 9fd78c9c2..e79004686 100644
--- a/hw/bsp/lpc43/family.cmake
+++ b/hw/bsp/lpc43/family.cmake
@@ -24,6 +24,7 @@ function(add_board_target BOARD_TARGET)
       ${SDK_DIR}/src/clock_18xx_43xx.c
       ${SDK_DIR}/src/fpu_init.c
       ${SDK_DIR}/src/gpio_18xx_43xx.c
+      ${SDK_DIR}/src/iap_18xx_43xx.c
       ${SDK_DIR}/src/sysinit_18xx_43xx.c
       ${SDK_DIR}/src/uart_18xx_43xx.c
       )
diff --git a/hw/bsp/lpc43/family.mk b/hw/bsp/lpc43/family.mk
index 4a1c2fb3c..55d86e955 100644
--- a/hw/bsp/lpc43/family.mk
+++ b/hw/bsp/lpc43/family.mk
@@ -12,7 +12,11 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_LPC43XX
 
 # mcu driver cause following warnings
-CFLAGS += -Wno-error=unused-parameter -Wno-error=strict-prototypes  -Wno-error=cast-qual
+CFLAGS += \
+  -Wno-error=unused-parameter \
+  -Wno-error=strict-prototypes \
+  -Wno-error=cast-qual \
+  -Wno-error=incompatible-pointer-types \
 
 SRC_C += \
 	src/portable/chipidea/ci_hs/dcd_ci_hs.c \
@@ -21,12 +25,11 @@ SRC_C += \
 	${SDK_DIR}/../gcc/cr_startup_lpc43xx.c \
 	${SDK_DIR}/src/chip_18xx_43xx.c \
 	${SDK_DIR}/src/clock_18xx_43xx.c \
+	${SDK_DIR}/src/fpu_init.c \
 	${SDK_DIR}/src/gpio_18xx_43xx.c \
+	${SDK_DIR}/src/iap_18xx_43xx.c \
 	${SDK_DIR}/src/sysinit_18xx_43xx.c \
-	${SDK_DIR}/src/i2c_18xx_43xx.c \
-	${SDK_DIR}/src/i2cm_18xx_43xx.c \
 	${SDK_DIR}/src/uart_18xx_43xx.c \
-	${SDK_DIR}/src/fpu_init.c
 
 INC += \
   $(TOP)/$(BOARD_PATH) \

From bd51afb091f29cdab6520479a1a504409d95aac8 Mon Sep 17 00:00:00 2001
From: tswan-quasi <tucker.swan@10xar.com>
Date: Mon, 14 Aug 2023 08:49:52 -0400
Subject: [PATCH 600/691] min on cdc r/w

---
 src/class/cdc/cdc_device.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c
index 70d9c2e24..2c1fda4ff 100644
--- a/src/class/cdc/cdc_device.c
+++ b/src/class/cdc/cdc_device.c
@@ -150,7 +150,7 @@ uint32_t tud_cdc_n_available(uint8_t itf)
 uint32_t tud_cdc_n_read(uint8_t itf, void* buffer, uint32_t bufsize)
 {
   cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
-  uint32_t num_read = tu_fifo_read_n(&p_cdc->rx_ff, buffer, (uint16_t) bufsize);
+  uint32_t num_read = tu_fifo_read_n(&p_cdc->rx_ff, buffer, (uint16_t) TU_MIN(bufsize, 65535));
   _prep_out_transaction(p_cdc);
   return num_read;
 }
@@ -173,7 +173,7 @@ void tud_cdc_n_read_flush (uint8_t itf)
 uint32_t tud_cdc_n_write(uint8_t itf, void const* buffer, uint32_t bufsize)
 {
   cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
-  uint16_t ret = tu_fifo_write_n(&p_cdc->tx_ff, buffer, (uint16_t) bufsize);
+  uint16_t ret = tu_fifo_write_n(&p_cdc->tx_ff, buffer, (uint16_t) TU_MIN(bufsize, 65535));
 
   // flush if queue more than packet size
   // may need to suppress -Wunreachable-code since most of the time CFG_TUD_CDC_TX_BUFSIZE < BULK_PACKET_SIZE

From b5ba12119dccb123aa6e8798dc86d639af6703b9 Mon Sep 17 00:00:00 2001
From: tswan-quasi <tucker.swan@10xar.com>
Date: Mon, 14 Aug 2023 09:01:30 -0400
Subject: [PATCH 601/691] UINT16_MAX stdint macro usage

---
 src/class/cdc/cdc_device.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c
index 2c1fda4ff..c26264e60 100644
--- a/src/class/cdc/cdc_device.c
+++ b/src/class/cdc/cdc_device.c
@@ -150,7 +150,7 @@ uint32_t tud_cdc_n_available(uint8_t itf)
 uint32_t tud_cdc_n_read(uint8_t itf, void* buffer, uint32_t bufsize)
 {
   cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
-  uint32_t num_read = tu_fifo_read_n(&p_cdc->rx_ff, buffer, (uint16_t) TU_MIN(bufsize, 65535));
+  uint32_t num_read = tu_fifo_read_n(&p_cdc->rx_ff, buffer, (uint16_t) TU_MIN(bufsize, UINT16_MAX));
   _prep_out_transaction(p_cdc);
   return num_read;
 }
@@ -173,7 +173,7 @@ void tud_cdc_n_read_flush (uint8_t itf)
 uint32_t tud_cdc_n_write(uint8_t itf, void const* buffer, uint32_t bufsize)
 {
   cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
-  uint16_t ret = tu_fifo_write_n(&p_cdc->tx_ff, buffer, (uint16_t) TU_MIN(bufsize, 65535));
+  uint16_t ret = tu_fifo_write_n(&p_cdc->tx_ff, buffer, (uint16_t) TU_MIN(bufsize, UINT16_MAX));
 
   // flush if queue more than packet size
   // may need to suppress -Wunreachable-code since most of the time CFG_TUD_CDC_TX_BUFSIZE < BULK_PACKET_SIZE

From 088180e3d86cc51472dcd06ae42c613b534bf71c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 14 Aug 2023 20:58:00 +0700
Subject: [PATCH 602/691] add iar support for lpc43, add lpcxpresso43s67 to hil
 farm

---
 .github/workflows/build_iar.yml               | 81 +------------------
 .../host/msc_file_explorer/CMakeLists.txt     | 12 +--
 hw/bsp/lpc43/family.c                         | 20 ++++-
 hw/bsp/lpc43/family.cmake                     | 75 +++++++++--------
 test/hil/hil_hfp.json                         |  7 ++
 tools/get_deps.py                             |  2 +-
 6 files changed, 72 insertions(+), 125 deletions(-)

diff --git a/.github/workflows/build_iar.yml b/.github/workflows/build_iar.yml
index 48fdd6a8a..1eacf90c9 100644
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@@ -32,7 +32,7 @@ jobs:
           # Alphabetical order
           # Note: bundle multiple families into a matrix since there is only one self-hosted instance can
           # run IAR build. Too many matrix can hurt due to setup/teardown overhead.
-          - 'stm32f0 stm32f1 stm32f4 stm32f7 stm32g0 stm32g4 stm32h7 stm32l4'
+          - 'lpc43 stm32f0 stm32f1 stm32f4 stm32f7 stm32g0 stm32g4 stm32h7 stm32l4'
     steps:
       - name: Clean workspace
         run: |
@@ -52,82 +52,3 @@ jobs:
       - name: Test on actual hardware (hardware in the loop)
         run: |
           python3 test/hil/hil_test.py hil_hfp.json
-
-#      # Upload binaries for hardware test with self-hosted
-#      - name: Prepare stm32l412nucleo Artifacts
-#        if: contains(matrix.family, 'stm32l4')
-#        working-directory: ${{github.workspace}}/cmake-build/cmake-build-stm32l412nucleo
-#        run: |
-#          find device/ -name "*.elf" -exec mv {} ../../ \;
-#
-#      - name: Upload Artifacts for stm32l412nucleo
-#        if: contains(matrix.family, 'stm32l4') && github.repository_owner == 'hathach'
-#        uses: actions/upload-artifact@v3
-#        with:
-#          name: stm32l4
-#          path: |
-#            *.elf
-
-  # ---------------------------------------
-  # Hardware in the loop (HIL)
-  # Current self-hosted instance is running on an EPYC 7232 server hosted by HiFiPhile user
-  # ---------------------------------------
-#  hw-stm32l412nucleo-test:
-#    needs: cmake
-#    runs-on: [self-hosted, Linux, X64, hifiphile]
-#
-#    steps:
-#      - name: Clean workspace
-#        run: |
-#          echo "Cleaning up previous run"
-#          rm -rf "${{ github.workspace }}"
-#          mkdir -p "${{ github.workspace }}"
-#
-#      - name: Download stm32l4 Artifacts
-#        uses: actions/download-artifact@v3
-#        with:
-#          name: stm32l4
-#
-#      - name: Create flash.sh
-#        run: |
-#          echo > flash.sh 'echo halt > flash.jlink'
-#          echo >> flash.sh 'echo r >> flash.jlink'
-#          echo >> flash.sh 'echo loadfile $1 >> flash.jlink'
-#          echo >> flash.sh 'echo r >> flash.jlink'
-#          echo >> flash.sh 'echo go >> flash.jlink'
-#          echo >> flash.sh 'echo exit >> flash.jlink'
-#          echo >> flash.sh 'cmdout=$(JLinkExe -USB 774470029 -device stm32l412kb -if swd -JTAGConf -1,-1 -speed auto -NoGui 1 -ExitOnError 1 -CommandFile flash.jlink)'
-#          echo >> flash.sh 'if (( $? )) ; then echo $cmdout ; fi'
-#          chmod +x flash.sh
-#
-#      - name: Test cdc_dual_ports
-#        run: |
-#          ./flash.sh cdc_dual_ports.elf
-#          while (! ([ -e /dev/ttyACM1 ] && [ -e /dev/ttyACM2 ])) && [ $SECONDS -le 10 ]; do :; done
-#          test -e /dev/ttyACM1 && echo "ttyACM1 exists"
-#          test -e /dev/ttyACM2 && echo "ttyACM2 exists"
-#
-#        # Debian does not auto mount usb drive. skip this test for now
-#      - name: Test cdc_msc
-#        if: false
-#        run: |
-#          ./flash.sh cdc_msc.elf
-#          readme='/media/pi/TinyUSB MSC/README.TXT'
-#          while (! ([ -e /dev/ttyACM1 ] && [ -f "$readme" ])) && [ $SECONDS -le 10 ]; do :; done
-#          test -e /dev/ttyACM1 && echo "ttyACM1 exists"
-#          test -f "$readme" && echo "$readme exists"
-#          cat "$readme"
-#
-#      - name: Test dfu
-#        run: |
-#          ./flash.sh dfu.elf
-#          while (! (dfu-util -l | grep "Found DFU")) && [ $SECONDS -le 10 ]; do :; done
-#          dfu-util -d cafe -a 0 -U dfu0
-#          dfu-util -d cafe -a 1 -U dfu1
-#          grep "TinyUSB DFU! - Partition 0" dfu0
-#          grep "TinyUSB DFU! - Partition 1" dfu1
-#
-#      - name: Test dfu_runtime
-#        run: |
-#          ./flash.sh dfu_runtime.elf
-#          while (! (dfu-util -l | grep "Found Runtime")) && [ $SECONDS -le 10 ]; do :; done
diff --git a/examples/host/msc_file_explorer/CMakeLists.txt b/examples/host/msc_file_explorer/CMakeLists.txt
index a35a7f0fb..1868b632e 100644
--- a/examples/host/msc_file_explorer/CMakeLists.txt
+++ b/examples/host/msc_file_explorer/CMakeLists.txt
@@ -22,11 +22,13 @@ target_sources(${PROJECT} PUBLIC
   )
 
 # Suppress warnings on fatfs
-set_source_files_properties(
-  ${TOP}/lib/fatfs/source/ff.c
-  PROPERTIES
-  COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual"
-)
+if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+  set_source_files_properties(
+    ${TOP}/lib/fatfs/source/ff.c
+    PROPERTIES
+    COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual"
+    )
+endif ()
 
 # Example include
 target_include_directories(${PROJECT} PUBLIC
diff --git a/hw/bsp/lpc43/family.c b/hw/bsp/lpc43/family.c
index 8d80bf951..d52c1a071 100644
--- a/hw/bsp/lpc43/family.c
+++ b/hw/bsp/lpc43/family.c
@@ -63,13 +63,25 @@ const uint32_t ExtRateIn = 0;
 void SystemInit(void)
 {
 #ifdef __USE_LPCOPEN
-	extern void (* const g_pfnVectors[])(void);
   unsigned int *pSCB_VTOR = (unsigned int *) 0xE000ED08;
-	*pSCB_VTOR = (unsigned int) g_pfnVectors;
 
-  #if __FPU_USED == 1
+#ifdef __ICCARM__
+  extern void *__vector_table;
+  *pSCB_VTOR = (unsigned int) &__vector_table;
+
+#elif defined(__ARMCC_VERSION)
+  extern void *__Vectors;
+	*pSCB_VTOR = (unsigned int) &__Vectors;
+
+#else // other compoiler using cr_startup_lpc43xx.c
+	extern void (* const g_pfnVectors[])(void);
+	*pSCB_VTOR = (unsigned int) g_pfnVectors;
+#endif
+
+#if __FPU_USED == 1
 	fpuInit();
-  #endif
+#endif
+
 #endif
 
   /* Setup system level pin muxing */
diff --git a/hw/bsp/lpc43/family.cmake b/hw/bsp/lpc43/family.cmake
index e79004686..608fc4ca3 100644
--- a/hw/bsp/lpc43/family.cmake
+++ b/hw/bsp/lpc43/family.cmake
@@ -17,43 +17,48 @@ set(FAMILY_MCUS LPC43XX CACHE INTERNAL "")
 #------------------------------------
 # only need to be built ONCE for all examples
 function(add_board_target BOARD_TARGET)
-  if (NOT TARGET ${BOARD_TARGET})
-    add_library(${BOARD_TARGET} STATIC
-      ${SDK_DIR}/../gcc/cr_startup_lpc43xx.c
-      ${SDK_DIR}/src/chip_18xx_43xx.c
-      ${SDK_DIR}/src/clock_18xx_43xx.c
-      ${SDK_DIR}/src/fpu_init.c
-      ${SDK_DIR}/src/gpio_18xx_43xx.c
-      ${SDK_DIR}/src/iap_18xx_43xx.c
-      ${SDK_DIR}/src/sysinit_18xx_43xx.c
-      ${SDK_DIR}/src/uart_18xx_43xx.c
-      )
-    target_compile_options(${BOARD_TARGET} PUBLIC
-      -nostdlib
-      )
-    target_compile_definitions(${BOARD_TARGET} PUBLIC
-      __USE_LPCOPEN
-      CORE_M4
-      )
-    target_include_directories(${BOARD_TARGET} PUBLIC
-      ${SDK_DIR}/inc
-      ${SDK_DIR}/inc/config_43xx
-      )
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
 
-    update_board(${BOARD_TARGET})
+  # Startup & Linker script
+  set(STARTUP_FILE_GNU ${SDK_DIR}/../gcc/cr_startup_lpc43xx.c)
+  set(STARTUP_FILE_IAR ${SDK_DIR}/../iar/iar_startup_lpc18xx43xx.s)
+  set(LD_FILE_IAR ${SDK_DIR}/../iar/linker/lpc18xx_43xx_ldscript_iflash.icf)
 
-    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--script=${LD_FILE_GNU}"
-        # nanolib
-        --specs=nosys.specs
-        --specs=nano.specs
-        )
-    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--config=${LD_FILE_IAR}"
-        )
-    endif ()
+  add_library(${BOARD_TARGET} STATIC
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    ${SDK_DIR}/src/chip_18xx_43xx.c
+    ${SDK_DIR}/src/clock_18xx_43xx.c
+    ${SDK_DIR}/src/fpu_init.c
+    ${SDK_DIR}/src/gpio_18xx_43xx.c
+    ${SDK_DIR}/src/iap_18xx_43xx.c
+    ${SDK_DIR}/src/sysinit_18xx_43xx.c
+    ${SDK_DIR}/src/uart_18xx_43xx.c
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    __USE_LPCOPEN
+    CORE_M4
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${SDK_DIR}/inc
+    ${SDK_DIR}/inc/config_43xx
+    )
+
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_compile_options(${BOARD_TARGET} PUBLIC -nostdlib)
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      # nanolib
+      --specs=nosys.specs
+      --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
   endif ()
 endfunction()
 
diff --git a/test/hil/hil_hfp.json b/test/hil/hil_hfp.json
index 7912af245..58f550901 100644
--- a/test/hil/hil_hfp.json
+++ b/test/hil/hil_hfp.json
@@ -13,6 +13,13 @@
             "debugger": "jlink",
             "debugger_sn": "770935966",
             "cpu": "STM32F746NG"
+        },
+        {
+            "name": "lpcxpresso43s67",
+            "uid": "08F000044528BAAA8D858F58C50700F5",
+            "debugger": "jlink",
+            "debugger_sn": "728973776",
+            "cpu": "LPC43S67_M4"
         }
     ]
 }
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 82f756f64..1fac291a3 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -48,7 +48,7 @@ deps_optional = {
                        '2204191ec76283371419fbcec207da02e1bc22fa',
                        'nuc'],
     'hw/mcu/nxp/lpcopen': ['https://github.com/hathach/nxp_lpcopen.git',
-                           '43c45c85405a5dd114fff0ea95cca62837740c13',
+                           '84e0bd3e43910aaf71eefd62075cf57495418312',
                            'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43'],
     'hw/mcu/nxp/mcux-sdk': ['https://github.com/hathach/mcux-sdk.git',
                             '950819b7de9b32f92c3edf396bc5ffb8d66e7009',

From f2f005cbdf33dd0e10617535bcf7c0b24d6762b0 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 14 Aug 2023 22:01:30 +0700
Subject: [PATCH 603/691] fix build iar with lpc43

---
 examples/host/cdc_msc_hid/src/hid_app.c       | 2 ++
 examples/host/msc_file_explorer/src/msc_app.c | 3 +++
 2 files changed, 5 insertions(+)

diff --git a/examples/host/cdc_msc_hid/src/hid_app.c b/examples/host/cdc_msc_hid/src/hid_app.c
index 7727ee62c..f0d42a08f 100644
--- a/examples/host/cdc_msc_hid/src/hid_app.c
+++ b/examples/host/cdc_msc_hid/src/hid_app.c
@@ -160,7 +160,9 @@ static void process_kbd_report(hid_keyboard_report_t const *report)
         putchar(ch);
         if ( ch == '\r' ) putchar('\n'); // added new line for enter key
 
+        #ifndef __ICCARM__ // TODO IAR doesn't support stream control ?
         fflush(stdout); // flush right away, else nanolib will wait for newline
+        #endif
       }
     }
     // TODO example skips key released
diff --git a/examples/host/msc_file_explorer/src/msc_app.c b/examples/host/msc_file_explorer/src/msc_app.c
index 323dfb9e7..ecea614a2 100644
--- a/examples/host/msc_file_explorer/src/msc_app.c
+++ b/examples/host/msc_file_explorer/src/msc_app.c
@@ -66,7 +66,10 @@ bool msc_app_init(void)
   for(size_t i=0; i<CFG_TUH_DEVICE_MAX; i++) _disk_busy[i] = false;
 
   // disable stdout buffered for echoing typing command
+  #ifndef __ICCARM__ // TODO IAR doesn't support stream control ?
   setbuf(stdout, NULL);
+  #endif
+
   cli_init();
 
   return true;

From 9d942967414d7b95f3a132c284ef83f386a0c467 Mon Sep 17 00:00:00 2001
From: rppicomidi <rppicomidi@gmail.com>
Date: Mon, 14 Aug 2023 15:38:48 -0700
Subject: [PATCH 604/691] fix issue 2188: support usbh_app_driver_get_cb()

---
 README.rst                  |  2 +
 src/host/usbh.c             | 86 ++++++++++++++++++++++++++-----------
 src/host/usbh_classdriver.h |  8 ++++
 3 files changed, 72 insertions(+), 24 deletions(-)

diff --git a/README.rst b/README.rst
index 78e8d87b0..d72cdb149 100644
--- a/README.rst
+++ b/README.rst
@@ -89,6 +89,8 @@ Host Stack
 - Mass Storage Class (MSC)
 - Hub with multiple-level support
 
+Similar to the Device Stack, if you have a special requirement, `usbh_app_driver_get_cb()` can be used to write your own class driver without modifying the stack.
+
 TypeC PD Stack
 ==============
 
diff --git a/src/host/usbh.c b/src/host/usbh.c
index cc7e38b45..af8142be3 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -180,7 +180,7 @@ static usbh_class_driver_t const usbh_class_drivers[] =
   #endif
 };
 
-enum { USBH_CLASS_DRIVER_COUNT = TU_ARRAY_SIZE(usbh_class_drivers) };
+enum { USBH_BUILTIN_DRIVER_COUNT = TU_ARRAY_SIZE(usbh_class_drivers) };
 enum { CONFIG_NUM = 1 }; // default to use configuration 1
 
 
@@ -246,6 +246,21 @@ static void process_removing_device(uint8_t rhport, uint8_t hub_addr, uint8_t hu
 static bool usbh_edpt_control_open(uint8_t dev_addr, uint8_t max_packet_size);
 static bool usbh_control_xfer_cb (uint8_t daddr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
 
+// Additional class drivers implemented by application
+tu_static usbh_class_driver_t const * _app_driver = NULL;
+tu_static uint8_t _app_driver_count = 0;
+tu_static uint8_t _total_driver_count = USBH_BUILTIN_DRIVER_COUNT;
+
+static usbh_class_driver_t const * usbh_get_driver(uint8_t drv_id)
+{
+  usbh_class_driver_t const * driver = NULL;
+  if ( drv_id < _app_driver_count )
+    driver = &_app_driver[drv_id];
+  else if ( drv_id < _total_driver_count )
+    driver = &usbh_class_drivers[drv_id - _app_driver_count];
+  return driver;
+}
+
 #if CFG_TUSB_OS == OPT_OS_NONE
 // TODO rework time-related function later
 // weak and overridable
@@ -339,6 +354,12 @@ bool tuh_init(uint8_t controller_id) {
   _usbh_mutex = osal_mutex_create(&_usbh_mutexdef);
   TU_ASSERT(_usbh_mutex);
 #endif
+  // Get application driver if available
+  if ( usbh_app_driver_get_cb )
+  {
+    _app_driver = usbh_app_driver_get_cb(&_app_driver_count);
+    _total_driver_count = USBH_BUILTIN_DRIVER_COUNT + _app_driver_count;
+  }
 
   // Device
   tu_memclr(&_dev0, sizeof(_dev0));
@@ -351,10 +372,14 @@ bool tuh_init(uint8_t controller_id) {
   }
 
   // Class drivers
-  for (uint8_t drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++)
+  for (uint8_t drv_id = 0; drv_id < _total_driver_count; drv_id++)
   {
-    TU_LOG_USBH("%s init\r\n", usbh_class_drivers[drv_id].name);
-    usbh_class_drivers[drv_id].init();
+    usbh_class_driver_t const * driver = usbh_get_driver(drv_id);
+    if ( driver )
+    {
+      TU_LOG_USBH("%s init\r\n", driver->name);
+      driver->init();
+    }
   }
 
   _usbh_controller = controller_id;;
@@ -482,12 +507,16 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) {
             }else
             #endif
             {
-              uint8_t const drv_id = dev->ep2drv[epnum][ep_dir];
-              if ( drv_id < USBH_CLASS_DRIVER_COUNT ) {
-                TU_LOG_USBH("%s xfer callback\r\n", usbh_class_drivers[drv_id].name);
-                usbh_class_drivers[drv_id].xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result,
+              uint8_t drv_id = dev->ep2drv[epnum][ep_dir];
+              usbh_class_driver_t const * driver = usbh_get_driver(drv_id);
+              if ( driver )
+              {
+                TU_LOG_USBH("%s xfer callback\r\n", driver->name);
+                driver->xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result,
                                                    event.xfer_complete.len);
-              } else {
+              }
+              else
+              {
                 // no driver/callback responsible for this transfer
                 TU_ASSERT(false,);
               }
@@ -1183,17 +1212,20 @@ static void process_removing_device(uint8_t rhport, uint8_t hub_addr, uint8_t hu
   uint8_t nop_count = 0;
 #endif
 
-  for (uint8_t dev_id = 0; dev_id < TOTAL_DEVICES; dev_id++) {
+  for (uint8_t dev_id = 0; dev_id < TOTAL_DEVICES; dev_id++)
+  {
     usbh_device_t *dev = &_usbh_devices[dev_id];
     uint8_t const daddr = dev_id + 1;
 
     // hub_addr = 0 means roothub, hub_port = 0 means all devices of downstream hub
     if (dev->rhport == rhport && dev->connected &&
         (hub_addr == 0 || dev->hub_addr == hub_addr) &&
-        (hub_port == 0 || dev->hub_port == hub_port)) {
+        (hub_port == 0 || dev->hub_port == hub_port))
+    {
       TU_LOG_USBH("Device unplugged address = %u\r\n", daddr);
 
-      if (is_hub_addr(daddr)) {
+      if (is_hub_addr(daddr))
+      {
         TU_LOG(CFG_TUH_LOG_LEVEL, "  is a HUB device %u\r\n", daddr);
 
         // Submit removed event If the device itself is a hub (un-rolled recursive)
@@ -1211,10 +1243,14 @@ static void process_removing_device(uint8_t rhport, uint8_t hub_addr, uint8_t hu
       }
 
       // Close class driver
-      for (uint8_t drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++) {
-        usbh_class_drivers[drv_id].close(daddr);
+      for (uint8_t drv_id = 0; drv_id < _total_driver_count; drv_id++)
+      {
+        usbh_class_driver_t const * driver = usbh_get_driver(drv_id);
+        if ( driver )
+        {
+          driver->close(daddr);
+        }
       }
-
       hcd_device_close(rhport, daddr);
       clear_device(dev);
       // abort on-going control xfer if any
@@ -1643,11 +1679,12 @@ static bool _parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configur
     TU_ASSERT(drv_len >= sizeof(tusb_desc_interface_t));
 
     // Find driver for this interface
-    for (uint8_t drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++)
+    uint8_t drv_id = 0;
+    for (; drv_id < _total_driver_count; drv_id++)
     {
-      usbh_class_driver_t const * driver = &usbh_class_drivers[drv_id];
+      usbh_class_driver_t const * driver = usbh_get_driver(drv_id);
 
-      if ( driver->open(dev->rhport, dev_addr, desc_itf, drv_len) )
+      if (driver && driver->open(dev->rhport, dev_addr, desc_itf, drv_len) )
       {
         // open successfully
         TU_LOG_USBH("  %s opened\r\n", driver->name);
@@ -1668,11 +1705,12 @@ static bool _parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configur
         break; // exit driver find loop
       }
 
-      if( drv_id >= USBH_CLASS_DRIVER_COUNT )
-      {
-        TU_LOG(CFG_TUH_LOG_LEVEL, "Interface %u: class = %u subclass = %u protocol = %u is not supported\r\n",
-               desc_itf->bInterfaceNumber, desc_itf->bInterfaceClass, desc_itf->bInterfaceSubClass, desc_itf->bInterfaceProtocol);
-      }
+    }
+
+    if( drv_id >= _total_driver_count )
+    {
+      TU_LOG(CFG_TUH_LOG_LEVEL, "Interface %u: class = %u subclass = %u protocol = %u is not supported\r\n",
+            desc_itf->bInterfaceNumber, desc_itf->bInterfaceClass, desc_itf->bInterfaceSubClass, desc_itf->bInterfaceProtocol);
     }
 
     // next Interface or IAD descriptor
@@ -1694,7 +1732,7 @@ void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num)
     uint8_t const drv_id = dev->itf2drv[itf_num];
     if (drv_id != TUSB_INDEX_INVALID_8)
     {
-      usbh_class_driver_t const * driver = &usbh_class_drivers[drv_id];
+      usbh_class_driver_t const * driver = usbh_get_driver(drv_id);
       TU_LOG_USBH("%s set config: itf = %u\r\n", driver->name, itf_num);
       driver->set_config(dev_addr, itf_num);
       break;
diff --git a/src/host/usbh_classdriver.h b/src/host/usbh_classdriver.h
index 308b4418a..7443b2d90 100644
--- a/src/host/usbh_classdriver.h
+++ b/src/host/usbh_classdriver.h
@@ -96,6 +96,14 @@ bool usbh_edpt_release(uint8_t dev_addr, uint8_t ep_addr);
 // Check if endpoint transferring is complete
 bool usbh_edpt_busy(uint8_t dev_addr, uint8_t ep_addr);
 
+//--------------------------------------------------------------------+
+// USBH application additional driver API
+//--------------------------------------------------------------------+
+// Invoked when initializing host stack to get additional class drivers.
+// Can optionally implemented by application to extend/overwrite class driver support.
+// Note: The drivers array must be accessible at all time when stack is active
+usbh_class_driver_t const* usbh_app_driver_get_cb(uint8_t* driver_count) TU_ATTR_WEAK;
+
 #ifdef __cplusplus
  }
 #endif

From 1b33a315365184a74a8b5bbce5fdbdfc4dfe6f69 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 15 Aug 2023 22:51:21 +0700
Subject: [PATCH 605/691] more minor clean up

- also rename usbh_classdriver.h to usbh_pvt.h to consitent with usbd
---
 src/class/cdc/cdc_host.c                    |  2 +-
 src/class/hid/hid_host.c                    |  2 +-
 src/class/msc/msc_host.c                    |  2 +-
 src/device/usbd.c                           | 31 +++-----
 src/device/usbd_pvt.h                       |  2 +-
 src/host/hub.c                              |  2 +-
 src/host/usbh.c                             | 84 ++++++++++-----------
 src/host/{usbh_classdriver.h => usbh_pvt.h} | 13 ++--
 src/tusb.c                                  |  2 +-
 9 files changed, 61 insertions(+), 79 deletions(-)
 rename src/host/{usbh_classdriver.h => usbh_pvt.h} (93%)

diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index 40ebd331d..53e15710e 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -29,7 +29,7 @@
 #if (CFG_TUH_ENABLED && CFG_TUH_CDC)
 
 #include "host/usbh.h"
-#include "host/usbh_classdriver.h"
+#include "host/usbh_pvt.h"
 
 #include "cdc_host.h"
 
diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c
index 4253170d4..a3551c85a 100644
--- a/src/class/hid/hid_host.c
+++ b/src/class/hid/hid_host.c
@@ -29,7 +29,7 @@
 #if (CFG_TUH_ENABLED && CFG_TUH_HID)
 
 #include "host/usbh.h"
-#include "host/usbh_classdriver.h"
+#include "host/usbh_pvt.h"
 
 #include "hid_host.h"
 
diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c
index 90a58d3d0..da264142c 100644
--- a/src/class/msc/msc_host.c
+++ b/src/class/msc/msc_host.c
@@ -29,7 +29,7 @@
 #if CFG_TUH_ENABLED && CFG_TUH_MSC
 
 #include "host/usbh.h"
-#include "host/usbh_classdriver.h"
+#include "host/usbh_pvt.h"
 
 #include "msc_host.h"
 
diff --git a/src/device/usbd.c b/src/device/usbd.c
index 156b92ce1..f0d9fba52 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -238,34 +238,25 @@ enum { BUILTIN_DRIVER_COUNT = TU_ARRAY_SIZE(_usbd_driver) };
 tu_static usbd_class_driver_t const * _app_driver = NULL;
 tu_static uint8_t _app_driver_count = 0;
 
+#define TOTAL_DRIVER_COUNT    (_app_driver_count + BUILTIN_DRIVER_COUNT)
+
 // virtually joins built-in and application drivers together.
 // Application is positioned first to allow overwriting built-in ones.
 static inline usbd_class_driver_t const * get_driver(uint8_t drvid)
 {
-  // Application drivers
-  if ( usbd_app_driver_get_cb )
-  {
-    if ( drvid < _app_driver_count ) return &_app_driver[drvid];
-    drvid -= _app_driver_count;
+  usbd_class_driver_t const * driver = NULL;
+
+  if ( drvid < _app_driver_count ) {
+    // Application drivers
+    driver = &_app_driver[drvid];
+  } else if ( drvid < TOTAL_DRIVER_COUNT && BUILTIN_DRIVER_COUNT > 0 ){
+    driver = &_usbd_driver[drvid - _app_driver_count];
   }
 
-  // when there is no built-in drivers BUILTIN_DRIVER_COUNT = 0 will cause -Wtype-limits warning
-#ifdef __GNUC__
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Wtype-limits"
-#endif
-
-  // Built-in drivers
-  if (drvid < BUILTIN_DRIVER_COUNT) return &_usbd_driver[drvid];
-
-#ifdef __GNUC__
-#pragma GCC diagnostic pop
-#endif
-
-  return NULL;
+  return driver;
 }
 
-#define TOTAL_DRIVER_COUNT    (_app_driver_count + BUILTIN_DRIVER_COUNT)
+
 
 //--------------------------------------------------------------------+
 // DCD Event
diff --git a/src/device/usbd_pvt.h b/src/device/usbd_pvt.h
index 940b2858b..16585167f 100644
--- a/src/device/usbd_pvt.h
+++ b/src/device/usbd_pvt.h
@@ -59,7 +59,7 @@ typedef struct
 } usbd_class_driver_t;
 
 // Invoked when initializing device stack to get additional class drivers.
-// Can optionally implemented by application to extend/overwrite class driver support.
+// Can be implemented by application to extend/overwrite class driver support.
 // Note: The drivers array must be accessible at all time when stack is active
 usbd_class_driver_t const* usbd_app_driver_get_cb(uint8_t* driver_count) TU_ATTR_WEAK;
 
diff --git a/src/host/hub.c b/src/host/hub.c
index ec30eb96a..32f5e0ac7 100644
--- a/src/host/hub.c
+++ b/src/host/hub.c
@@ -30,7 +30,7 @@
 
 #include "hcd.h"
 #include "usbh.h"
-#include "usbh_classdriver.h"
+#include "usbh_pvt.h"
 #include "hub.h"
 
 // Debug level, TUSB_CFG_DEBUG must be at least this level for debug message
diff --git a/src/host/usbh.c b/src/host/usbh.c
index af8142be3..739157b56 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -30,7 +30,7 @@
 
 #include "host/hcd.h"
 #include "tusb.h"
-#include "host/usbh_classdriver.h"
+#include "host/usbh_pvt.h"
 #include "hub.h"
 
 //--------------------------------------------------------------------+
@@ -183,6 +183,23 @@ static usbh_class_driver_t const usbh_class_drivers[] =
 enum { USBH_BUILTIN_DRIVER_COUNT = TU_ARRAY_SIZE(usbh_class_drivers) };
 enum { CONFIG_NUM = 1 }; // default to use configuration 1
 
+// Additional class drivers implemented by application
+tu_static usbh_class_driver_t const * _app_driver = NULL;
+tu_static uint8_t _app_driver_count = 0;
+
+#define TOTAL_DRIVER_COUNT    (_app_driver_count + USBH_BUILTIN_DRIVER_COUNT)
+
+static inline usbh_class_driver_t const *get_driver(uint8_t drv_id) {
+  usbh_class_driver_t const *driver = NULL;
+
+  if ( drv_id < _app_driver_count ) {
+    driver = &_app_driver[drv_id];
+  } else if ( drv_id < TOTAL_DRIVER_COUNT && USBH_BUILTIN_DRIVER_COUNT > 0) {
+    driver = &usbh_class_drivers[drv_id - _app_driver_count];
+  }
+
+  return driver;
+}
 
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
@@ -246,21 +263,6 @@ static void process_removing_device(uint8_t rhport, uint8_t hub_addr, uint8_t hu
 static bool usbh_edpt_control_open(uint8_t dev_addr, uint8_t max_packet_size);
 static bool usbh_control_xfer_cb (uint8_t daddr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
 
-// Additional class drivers implemented by application
-tu_static usbh_class_driver_t const * _app_driver = NULL;
-tu_static uint8_t _app_driver_count = 0;
-tu_static uint8_t _total_driver_count = USBH_BUILTIN_DRIVER_COUNT;
-
-static usbh_class_driver_t const * usbh_get_driver(uint8_t drv_id)
-{
-  usbh_class_driver_t const * driver = NULL;
-  if ( drv_id < _app_driver_count )
-    driver = &_app_driver[drv_id];
-  else if ( drv_id < _total_driver_count )
-    driver = &usbh_class_drivers[drv_id - _app_driver_count];
-  return driver;
-}
-
 #if CFG_TUSB_OS == OPT_OS_NONE
 // TODO rework time-related function later
 // weak and overridable
@@ -354,11 +356,10 @@ bool tuh_init(uint8_t controller_id) {
   _usbh_mutex = osal_mutex_create(&_usbh_mutexdef);
   TU_ASSERT(_usbh_mutex);
 #endif
+
   // Get application driver if available
-  if ( usbh_app_driver_get_cb )
-  {
+  if ( usbh_app_driver_get_cb ) {
     _app_driver = usbh_app_driver_get_cb(&_app_driver_count);
-    _total_driver_count = USBH_BUILTIN_DRIVER_COUNT + _app_driver_count;
   }
 
   // Device
@@ -372,9 +373,9 @@ bool tuh_init(uint8_t controller_id) {
   }
 
   // Class drivers
-  for (uint8_t drv_id = 0; drv_id < _total_driver_count; drv_id++)
+  for (uint8_t drv_id = 0; drv_id < TOTAL_DRIVER_COUNT; drv_id++)
   {
-    usbh_class_driver_t const * driver = usbh_get_driver(drv_id);
+    usbh_class_driver_t const * driver = get_driver(drv_id);
     if ( driver )
     {
       TU_LOG_USBH("%s init\r\n", driver->name);
@@ -508,12 +509,12 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) {
             #endif
             {
               uint8_t drv_id = dev->ep2drv[epnum][ep_dir];
-              usbh_class_driver_t const * driver = usbh_get_driver(drv_id);
+              usbh_class_driver_t const * driver = get_driver(drv_id);
               if ( driver )
               {
                 TU_LOG_USBH("%s xfer callback\r\n", driver->name);
                 driver->xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result,
-                                                   event.xfer_complete.len);
+                                event.xfer_complete.len);
               }
               else
               {
@@ -1220,12 +1221,10 @@ static void process_removing_device(uint8_t rhport, uint8_t hub_addr, uint8_t hu
     // hub_addr = 0 means roothub, hub_port = 0 means all devices of downstream hub
     if (dev->rhport == rhport && dev->connected &&
         (hub_addr == 0 || dev->hub_addr == hub_addr) &&
-        (hub_port == 0 || dev->hub_port == hub_port))
-    {
+        (hub_port == 0 || dev->hub_port == hub_port)) {
       TU_LOG_USBH("Device unplugged address = %u\r\n", daddr);
 
-      if (is_hub_addr(daddr))
-      {
+      if (is_hub_addr(daddr)) {
         TU_LOG(CFG_TUH_LOG_LEVEL, "  is a HUB device %u\r\n", daddr);
 
         // Submit removed event If the device itself is a hub (un-rolled recursive)
@@ -1243,14 +1242,11 @@ static void process_removing_device(uint8_t rhport, uint8_t hub_addr, uint8_t hu
       }
 
       // Close class driver
-      for (uint8_t drv_id = 0; drv_id < _total_driver_count; drv_id++)
-      {
-        usbh_class_driver_t const * driver = usbh_get_driver(drv_id);
-        if ( driver )
-        {
-          driver->close(daddr);
-        }
+      for (uint8_t drv_id = 0; drv_id < TOTAL_DRIVER_COUNT; drv_id++) {
+        usbh_class_driver_t const * driver = get_driver(drv_id);
+        if ( driver ) driver->close(daddr);
       }
+
       hcd_device_close(rhport, daddr);
       clear_device(dev);
       // abort on-going control xfer if any
@@ -1679,10 +1675,9 @@ static bool _parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configur
     TU_ASSERT(drv_len >= sizeof(tusb_desc_interface_t));
 
     // Find driver for this interface
-    uint8_t drv_id = 0;
-    for (; drv_id < _total_driver_count; drv_id++)
+    for (uint8_t drv_id = 0; drv_id < TOTAL_DRIVER_COUNT; drv_id++)
     {
-      usbh_class_driver_t const * driver = usbh_get_driver(drv_id);
+      usbh_class_driver_t const * driver = get_driver(drv_id);
 
       if (driver && driver->open(dev->rhport, dev_addr, desc_itf, drv_len) )
       {
@@ -1705,12 +1700,11 @@ static bool _parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configur
         break; // exit driver find loop
       }
 
-    }
-
-    if( drv_id >= _total_driver_count )
-    {
-      TU_LOG(CFG_TUH_LOG_LEVEL, "Interface %u: class = %u subclass = %u protocol = %u is not supported\r\n",
-            desc_itf->bInterfaceNumber, desc_itf->bInterfaceClass, desc_itf->bInterfaceSubClass, desc_itf->bInterfaceProtocol);
+      if ( drv_id == TOTAL_DRIVER_COUNT - 1 )
+      {
+        TU_LOG(CFG_TUH_LOG_LEVEL, "[%u:%u] Interface %u: class = %u subclass = %u protocol = %u is not supported\r\n",
+               dev->rhport, dev_addr, desc_itf->bInterfaceNumber, desc_itf->bInterfaceClass, desc_itf->bInterfaceSubClass, desc_itf->bInterfaceProtocol);
+      }
     }
 
     // next Interface or IAD descriptor
@@ -1730,9 +1724,9 @@ void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num)
     // IAD binding interface such as CDCs should return itf_num + 1 when complete
     // with usbh_driver_set_config_complete()
     uint8_t const drv_id = dev->itf2drv[itf_num];
-    if (drv_id != TUSB_INDEX_INVALID_8)
+    usbh_class_driver_t const * driver = get_driver(drv_id);
+    if (driver)
     {
-      usbh_class_driver_t const * driver = usbh_get_driver(drv_id);
       TU_LOG_USBH("%s set config: itf = %u\r\n", driver->name, itf_num);
       driver->set_config(dev_addr, itf_num);
       break;
diff --git a/src/host/usbh_classdriver.h b/src/host/usbh_pvt.h
similarity index 93%
rename from src/host/usbh_classdriver.h
rename to src/host/usbh_pvt.h
index 7443b2d90..0b58a91bc 100644
--- a/src/host/usbh_classdriver.h
+++ b/src/host/usbh_pvt.h
@@ -62,6 +62,11 @@ typedef struct {
   void (* const close      )(uint8_t dev_addr);
 } usbh_class_driver_t;
 
+// Invoked when initializing host stack to get additional class drivers.
+// Can be implemented by application to extend/overwrite class driver support.
+// Note: The drivers array must be accessible at all time when stack is active
+usbh_class_driver_t const* usbh_app_driver_get_cb(uint8_t* driver_count) TU_ATTR_WEAK;
+
 // Call by class driver to tell USBH that it has complete the enumeration
 void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num);
 
@@ -96,14 +101,6 @@ bool usbh_edpt_release(uint8_t dev_addr, uint8_t ep_addr);
 // Check if endpoint transferring is complete
 bool usbh_edpt_busy(uint8_t dev_addr, uint8_t ep_addr);
 
-//--------------------------------------------------------------------+
-// USBH application additional driver API
-//--------------------------------------------------------------------+
-// Invoked when initializing host stack to get additional class drivers.
-// Can optionally implemented by application to extend/overwrite class driver support.
-// Note: The drivers array must be accessible at all time when stack is active
-usbh_class_driver_t const* usbh_app_driver_get_cb(uint8_t* driver_count) TU_ATTR_WEAK;
-
 #ifdef __cplusplus
  }
 #endif
diff --git a/src/tusb.c b/src/tusb.c
index 465b608b0..7b0a669a0 100644
--- a/src/tusb.c
+++ b/src/tusb.c
@@ -36,7 +36,7 @@
 #endif
 
 #if CFG_TUH_ENABLED
-#include "host/usbh_classdriver.h"
+#include "host/usbh_pvt.h"
 #endif
 
 //--------------------------------------------------------------------+

From 67a374d932cbe14bf1651bdd6fea82c2e2ecfa10 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 15 Aug 2023 22:57:05 +0700
Subject: [PATCH 606/691] more rename

---
 src/host/usbh.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/host/usbh.c b/src/host/usbh.c
index 739157b56..7cdcbda5e 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -180,21 +180,21 @@ static usbh_class_driver_t const usbh_class_drivers[] =
   #endif
 };
 
-enum { USBH_BUILTIN_DRIVER_COUNT = TU_ARRAY_SIZE(usbh_class_drivers) };
+enum { BUILTIN_DRIVER_COUNT = TU_ARRAY_SIZE(usbh_class_drivers) };
 enum { CONFIG_NUM = 1 }; // default to use configuration 1
 
 // Additional class drivers implemented by application
 tu_static usbh_class_driver_t const * _app_driver = NULL;
 tu_static uint8_t _app_driver_count = 0;
 
-#define TOTAL_DRIVER_COUNT    (_app_driver_count + USBH_BUILTIN_DRIVER_COUNT)
+#define TOTAL_DRIVER_COUNT    (_app_driver_count + BUILTIN_DRIVER_COUNT)
 
 static inline usbh_class_driver_t const *get_driver(uint8_t drv_id) {
   usbh_class_driver_t const *driver = NULL;
 
   if ( drv_id < _app_driver_count ) {
     driver = &_app_driver[drv_id];
-  } else if ( drv_id < TOTAL_DRIVER_COUNT && USBH_BUILTIN_DRIVER_COUNT > 0) {
+  } else if ( drv_id < TOTAL_DRIVER_COUNT && BUILTIN_DRIVER_COUNT > 0) {
     driver = &usbh_class_drivers[drv_id - _app_driver_count];
   }
 

From b3c7fe1023d14d1e07eb21ca9a61438bff49a788 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 15 Aug 2023 00:09:31 +0700
Subject: [PATCH 607/691] clear qhd halted bit if not caused by STALL protocol,
 allow for next transfer

---
 src/portable/ehci/ehci.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 79811985c..c5036b5a3 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -579,6 +579,7 @@ void qhd_xfer_complete_isr(ehci_qhd_t * qhd) {
       if (qtd_overlay->xact_err || qtd_overlay->err_count == 0 || qtd_overlay->buffer_err || qtd_overlay->babble_err) {
         // Error count = 0 often occurs when device disconnected, or other bus-related error
         xfer_result = XFER_RESULT_FAILED;
+        qtd_overlay->halted = false; // clear halted bit if it is not caused by STALL
         TU_LOG3("  QHD xfer err count: %d\n", qtd_overlay->err_count);
         // TU_BREAKPOINT(); // TODO skip unplugged device
       }else {

From 0109ffbdcb22a358ecbc1476fbfb4e370e5bb4cc Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 16 Aug 2023 14:31:14 +0700
Subject: [PATCH 608/691] fix abort transfer does not release endpoint, also
 reset state if it is control transfer

---
 src/host/usbh.c | 22 +++++++++++++++-------
 1 file changed, 15 insertions(+), 7 deletions(-)

diff --git a/src/host/usbh.c b/src/host/usbh.c
index 7cdcbda5e..5423df669 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -738,19 +738,27 @@ bool tuh_edpt_abort_xfer(uint8_t daddr, uint8_t ep_addr) {
   usbh_device_t* dev = get_device(daddr);
   TU_VERIFY(dev);
 
+  TU_LOG_USBH("[%u] Aborted transfer on EP %02X\r\n", daddr, ep_addr);
+
   uint8_t const epnum = tu_edpt_number(ep_addr);
   uint8_t const dir   = tu_edpt_dir(ep_addr);
 
-  // skip if not busy
-  TU_VERIFY(dev->ep_status[epnum][dir].busy);
-
-  bool const ret = hcd_edpt_abort_xfer(dev->rhport, daddr, ep_addr);
-  if (ret) {
-    // mark as ready if transfer is aborted
+  if ( epnum == 0 ) {
+    // control transfer: only 1 control at a time, check if we are aborting the current one
+    TU_VERIFY(daddr == _ctrl_xfer.daddr && _ctrl_xfer.stage != CONTROL_STAGE_IDLE);
+    TU_VERIFY(hcd_edpt_abort_xfer(dev->rhport, daddr, ep_addr));
+    // reset control transfer state to idle
+    _set_control_xfer_stage(CONTROL_STAGE_IDLE);
+  } else {
+    // non-control skip if not busy
+    TU_VERIFY(dev->ep_status[epnum][dir].busy);
+    TU_VERIFY(hcd_edpt_abort_xfer(dev->rhport, daddr, ep_addr));
+    // mark as ready and release endpoint if transfer is aborted
     dev->ep_status[epnum][dir].busy = false;
+    usbh_edpt_release(daddr, ep_addr);
   }
 
-  return ret;
+  return true;
 }
 
 //--------------------------------------------------------------------+

From f4845e4e6cc2faca4e60cd83959850f27d3f3076 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 16 Aug 2023 14:43:58 +0700
Subject: [PATCH 609/691] minor comment

---
 src/portable/ehci/ehci.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index c5036b5a3..c93c33fc0 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -578,8 +578,9 @@ void qhd_xfer_complete_isr(ehci_qhd_t * qhd) {
     if ( qtd_overlay->halted ) {
       if (qtd_overlay->xact_err || qtd_overlay->err_count == 0 || qtd_overlay->buffer_err || qtd_overlay->babble_err) {
         // Error count = 0 often occurs when device disconnected, or other bus-related error
+        // clear halted bit if not caused by STALL to allow more transfer
         xfer_result = XFER_RESULT_FAILED;
-        qtd_overlay->halted = false; // clear halted bit if it is not caused by STALL
+        qtd_overlay->halted = false;
         TU_LOG3("  QHD xfer err count: %d\n", qtd_overlay->err_count);
         // TU_BREAKPOINT(); // TODO skip unplugged device
       }else {

From 9257a0f562a1cb939a902e7c41de5032b0f7de19 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 18 Aug 2023 12:48:12 +0700
Subject: [PATCH 610/691] - update nrf52 bsp for cmake - add empty
 tuh_int_handler/tud_int_handler if corresponidng stack not enabled - add
 hcd_template.c

---
 hw/bsp/nrf/boards/adafruit_clue/board.cmake   |   5 +
 .../nrf/boards/arduino_nano33_ble/board.cmake |   5 +
 .../circuitplayground_bluefruit/board.cmake   |   5 +
 .../feather_nrf52840_express/board.cmake      |   6 +
 .../boards/feather_nrf52840_sense/board.cmake |   5 +
 .../nrf/boards/itsybitsy_nrf52840/board.cmake |   5 +
 .../boards/nrf52840_mdk_dongle/board.cmake    |   5 +
 hw/bsp/nrf/boards/pca10056/board.cmake        |   3 -
 hw/bsp/nrf/boards/pca10059/board.cmake        |   5 +
 hw/bsp/nrf/boards/pca10095/board.cmake        |   4 -
 hw/bsp/nrf/boards/pca10100/board.cmake        |   5 +
 .../nrf/boards/raytac_mdbt50q_rx/board.cmake  |   5 +
 hw/bsp/nrf/family.cmake                       |  14 +-
 src/device/usbd.h                             |   6 +-
 src/host/hcd.h                                |  12 +-
 src/portable/template/dcd_template.c          |   4 +-
 src/portable/template/hcd_template.c          | 162 ++++++++++++++++++
 src/tusb.h                                    |   9 +-
 18 files changed, 241 insertions(+), 24 deletions(-)
 create mode 100644 hw/bsp/nrf/boards/adafruit_clue/board.cmake
 create mode 100644 hw/bsp/nrf/boards/arduino_nano33_ble/board.cmake
 create mode 100644 hw/bsp/nrf/boards/circuitplayground_bluefruit/board.cmake
 create mode 100644 hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake
 create mode 100644 hw/bsp/nrf/boards/feather_nrf52840_sense/board.cmake
 create mode 100644 hw/bsp/nrf/boards/itsybitsy_nrf52840/board.cmake
 create mode 100644 hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.cmake
 create mode 100644 hw/bsp/nrf/boards/pca10059/board.cmake
 create mode 100644 hw/bsp/nrf/boards/pca10100/board.cmake
 create mode 100644 hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.cmake
 create mode 100644 src/portable/template/hcd_template.c

diff --git a/hw/bsp/nrf/boards/adafruit_clue/board.cmake b/hw/bsp/nrf/boards/adafruit_clue/board.cmake
new file mode 100644
index 000000000..eb97e5c55
--- /dev/null
+++ b/hw/bsp/nrf/boards/adafruit_clue/board.cmake
@@ -0,0 +1,5 @@
+set(MCU_VARIANT nrf52840)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/nrf52840_s140_v6.ld)
+
+function(update_board TARGET)
+endfunction()
diff --git a/hw/bsp/nrf/boards/arduino_nano33_ble/board.cmake b/hw/bsp/nrf/boards/arduino_nano33_ble/board.cmake
new file mode 100644
index 000000000..93647063a
--- /dev/null
+++ b/hw/bsp/nrf/boards/arduino_nano33_ble/board.cmake
@@ -0,0 +1,5 @@
+set(MCU_VARIANT nrf52840)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/arduino_nano33_ble.ld)
+
+function(update_board TARGET)
+endfunction()
diff --git a/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.cmake b/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.cmake
new file mode 100644
index 000000000..eb97e5c55
--- /dev/null
+++ b/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.cmake
@@ -0,0 +1,5 @@
+set(MCU_VARIANT nrf52840)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/nrf52840_s140_v6.ld)
+
+function(update_board TARGET)
+endfunction()
diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake b/hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake
new file mode 100644
index 000000000..0acbecf7a
--- /dev/null
+++ b/hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake
@@ -0,0 +1,6 @@
+set(MCU_VARIANT nrf52840)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/nrf52840_s140_v6.ld)
+# set(LD_FILE_GNU ${NRFX_DIR}/mdk/nrf52840_xxaa.ld)
+
+function(update_board TARGET)
+endfunction()
diff --git a/hw/bsp/nrf/boards/feather_nrf52840_sense/board.cmake b/hw/bsp/nrf/boards/feather_nrf52840_sense/board.cmake
new file mode 100644
index 000000000..eb97e5c55
--- /dev/null
+++ b/hw/bsp/nrf/boards/feather_nrf52840_sense/board.cmake
@@ -0,0 +1,5 @@
+set(MCU_VARIANT nrf52840)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/nrf52840_s140_v6.ld)
+
+function(update_board TARGET)
+endfunction()
diff --git a/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.cmake b/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.cmake
new file mode 100644
index 000000000..eb97e5c55
--- /dev/null
+++ b/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.cmake
@@ -0,0 +1,5 @@
+set(MCU_VARIANT nrf52840)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/nrf52840_s140_v6.ld)
+
+function(update_board TARGET)
+endfunction()
diff --git a/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.cmake b/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.cmake
new file mode 100644
index 000000000..ffa5932c1
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf52840_mdk_dongle/board.cmake
@@ -0,0 +1,5 @@
+set(MCU_VARIANT nrf52840)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/nrf52840_mdk_dongle.ld)
+
+function(update_board TARGET)
+endfunction()
diff --git a/hw/bsp/nrf/boards/pca10056/board.cmake b/hw/bsp/nrf/boards/pca10056/board.cmake
index b4fe39fc0..693d7beed 100644
--- a/hw/bsp/nrf/boards/pca10056/board.cmake
+++ b/hw/bsp/nrf/boards/pca10056/board.cmake
@@ -2,7 +2,4 @@ set(MCU_VARIANT nrf52840)
 set(LD_FILE_GNU ${NRFX_DIR}/mdk/nrf52840_xxaa.ld)
 
 function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    NRF52840_XXAA
-    )
 endfunction()
diff --git a/hw/bsp/nrf/boards/pca10059/board.cmake b/hw/bsp/nrf/boards/pca10059/board.cmake
new file mode 100644
index 000000000..c79eb5964
--- /dev/null
+++ b/hw/bsp/nrf/boards/pca10059/board.cmake
@@ -0,0 +1,5 @@
+set(MCU_VARIANT nrf52840)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/pca10059.ld)
+
+function(update_board TARGET)
+endfunction()
diff --git a/hw/bsp/nrf/boards/pca10095/board.cmake b/hw/bsp/nrf/boards/pca10095/board.cmake
index 1e72243c9..ca5399a3a 100644
--- a/hw/bsp/nrf/boards/pca10095/board.cmake
+++ b/hw/bsp/nrf/boards/pca10095/board.cmake
@@ -2,10 +2,6 @@ set(MCU_VARIANT nrf5340_application)
 set(LD_FILE_GNU ${NRFX_DIR}/mdk/nrf5340_xxaa_application.ld)
 
 function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    NRF5340_XXAA
-    NRF5340_XXAA_APPLICATION
-    )
   target_sources(${TARGET} PRIVATE
     ${NRFX_DIR}/drivers/src/nrfx_usbreg.c
     )
diff --git a/hw/bsp/nrf/boards/pca10100/board.cmake b/hw/bsp/nrf/boards/pca10100/board.cmake
new file mode 100644
index 000000000..c30026815
--- /dev/null
+++ b/hw/bsp/nrf/boards/pca10100/board.cmake
@@ -0,0 +1,5 @@
+set(MCU_VARIANT nrf52833)
+set(LD_FILE_GNU ${NRFX_DIR}/mdk/nrf52833_xxaa.ld)
+
+function(update_board TARGET)
+endfunction()
diff --git a/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.cmake b/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.cmake
new file mode 100644
index 000000000..693d7beed
--- /dev/null
+++ b/hw/bsp/nrf/boards/raytac_mdbt50q_rx/board.cmake
@@ -0,0 +1,5 @@
+set(MCU_VARIANT nrf52840)
+set(LD_FILE_GNU ${NRFX_DIR}/mdk/nrf52840_xxaa.ld)
+
+function(update_board TARGET)
+endfunction()
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 2b13249f4..6c24d3658 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -33,13 +33,20 @@ function(add_board_target BOARD_TARGET)
     add_library(${BOARD_TARGET} STATIC
       # driver
       ${NRFX_DIR}/drivers/src/nrfx_power.c
+      ${NRFX_DIR}/drivers/src/nrfx_spim.c
       ${NRFX_DIR}/drivers/src/nrfx_uarte.c
       # mcu
       ${NRFX_DIR}/mdk/system_${MCU_VARIANT}.c
       )
-    target_compile_definitions(${BOARD_TARGET} PUBLIC
-      CONFIG_GPIO_AS_PINRESET
-      )
+    target_compile_definitions(${BOARD_TARGET} PUBLIC CONFIG_GPIO_AS_PINRESET)
+
+    if (MCU_VARIANT STREQUAL "nrf52840")
+      target_compile_definitions(${BOARD_TARGET} PUBLIC NRF52840_XXAA)
+    elseif (MCU_VARIANT STREQUAL "nrf52833")
+      target_compile_definitions(${BOARD_TARGET} PUBLIC NRF52833_XXAA)
+    elseif (MCU_VARIANT STREQUAL "nrf5340_application")
+      target_compile_definitions(${BOARD_TARGET} PUBLIC NRF5340_XXAA NRF5340_XXAA_APPLICATION)
+    endif ()
 
     if (TRACE_ETM STREQUAL "1")
       # ENABLE_TRACE will cause system_nrf5x.c to set up ETM trace
@@ -115,6 +122,7 @@ function(family_configure_example TARGET RTOS)
   family_add_tinyusb(${TARGET} OPT_MCU_NRF5X ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/nordic/nrf5x/dcd_nrf5x.c
+    #${TOP}/src/portable/analog/max3421e/hcd_max3421e.c
     )
   target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 
diff --git a/src/device/usbd.h b/src/device/usbd.h
index b11c1a09d..782f538fd 100644
--- a/src/device/usbd.h
+++ b/src/device/usbd.h
@@ -50,8 +50,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr);
 
 // Task function should be called in main/rtos loop
 TU_ATTR_ALWAYS_INLINE static inline
-void tud_task (void)
-{
+void tud_task (void) {
   tud_task_ext(UINT32_MAX, false);
 }
 
@@ -80,8 +79,7 @@ bool tud_suspended(void);
 
 // Check if device is ready to transfer
 TU_ATTR_ALWAYS_INLINE static inline
-bool tud_ready(void)
-{
+bool tud_ready(void) {
   return tud_mounted() && !tud_suspended();
 }
 
diff --git a/src/host/hcd.h b/src/host/hcd.h
index 9bcc1c6df..1b5038ef4 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -198,8 +198,7 @@ extern void hcd_event_handler(hcd_event_t const* event, bool in_isr);
 
 // Helper to send device attach event
 TU_ATTR_ALWAYS_INLINE static inline
-void hcd_event_device_attach(uint8_t rhport, bool in_isr)
-{
+void hcd_event_device_attach(uint8_t rhport, bool in_isr) {
   hcd_event_t event;
   event.rhport              = rhport;
   event.event_id            = HCD_EVENT_DEVICE_ATTACH;
@@ -211,8 +210,7 @@ void hcd_event_device_attach(uint8_t rhport, bool in_isr)
 
 // Helper to send device removal event
 TU_ATTR_ALWAYS_INLINE static inline
-void hcd_event_device_remove(uint8_t rhport, bool in_isr)
-{
+void hcd_event_device_remove(uint8_t rhport, bool in_isr) {
   hcd_event_t event;
   event.rhport              = rhport;
   event.event_id            = HCD_EVENT_DEVICE_REMOVE;
@@ -224,10 +222,8 @@ void hcd_event_device_remove(uint8_t rhport, bool in_isr)
 
 // Helper to send USB transfer event
 TU_ATTR_ALWAYS_INLINE static inline
-void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, uint32_t xferred_bytes, xfer_result_t result, bool in_isr)
-{
-  hcd_event_t event =
-  {
+void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, uint32_t xferred_bytes, xfer_result_t result, bool in_isr) {
+  hcd_event_t event = {
     .rhport   = 0, // TODO correct rhport
     .event_id = HCD_EVENT_XFER_COMPLETE,
     .dev_addr = dev_addr,
diff --git a/src/portable/template/dcd_template.c b/src/portable/template/dcd_template.c
index 590dd9fcf..12d610bd6 100644
--- a/src/portable/template/dcd_template.c
+++ b/src/portable/template/dcd_template.c
@@ -26,7 +26,7 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUSB_MCU == OPT_MCU_NONE
+#if CFG_TUD_ENABLED && CFG_TUSB_MCU == OPT_MCU_NONE
 
 #include "device/dcd.h"
 
@@ -141,4 +141,6 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
   (void) ep_addr;
 }
 
+
+
 #endif
diff --git a/src/portable/template/hcd_template.c b/src/portable/template/hcd_template.c
new file mode 100644
index 000000000..3e3b91558
--- /dev/null
+++ b/src/portable/template/hcd_template.c
@@ -0,0 +1,162 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "tusb_option.h"
+
+#if CFG_TUH_ENABLED && CFG_TUSB_MCU == OPT_MCU_NONE
+
+#include "host/hcd.h"
+
+//--------------------------------------------------------------------+
+// Controller API
+//--------------------------------------------------------------------+
+
+// optional hcd configuration, called by tuh_configure()
+bool hcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) {
+  (void) rhport;
+  (void) cfg_id;
+  (void) cfg_param;
+
+  return false;
+}
+
+// Initialize controller to host mode
+bool hcd_init(uint8_t rhport) {
+  (void) rhport;
+
+  return false;
+}
+
+// Interrupt Handler
+void hcd_int_handler(uint8_t rhport) {
+  (void) rhport;
+}
+
+// Enable USB interrupt
+void hcd_int_enable (uint8_t rhport) {
+  (void) rhport;
+}
+
+// Disable USB interrupt
+void hcd_int_disable(uint8_t rhport) {
+  (void) rhport;
+}
+
+// Get frame number (1ms)
+uint32_t hcd_frame_number(uint8_t rhport) {
+  (void) rhport;
+
+  return 0;
+}
+
+//--------------------------------------------------------------------+
+// Port API
+//--------------------------------------------------------------------+
+
+// Get the current connect status of roothub port
+bool hcd_port_connect_status(uint8_t rhport) {
+  (void) rhport;
+
+  return false;
+}
+
+// Reset USB bus on the port. Return immediately, bus reset sequence may not be complete.
+// Some port would require hcd_port_reset_end() to be invoked after 10ms to complete the reset sequence.
+void hcd_port_reset(uint8_t rhport) {
+  (void) rhport;
+}
+
+// Complete bus reset sequence, may be required by some controllers
+void hcd_port_reset_end(uint8_t rhport) {
+  (void) rhport;
+}
+
+// Get port link speed
+tusb_speed_t hcd_port_speed_get(uint8_t rhport) {
+  (void) rhport;
+
+  return TUSB_SPEED_FULL;
+}
+
+// HCD closes all opened endpoints belong to this device
+void hcd_device_close(uint8_t rhport, uint8_t dev_addr) {
+  (void) rhport;
+  (void) dev_addr;
+}
+
+//--------------------------------------------------------------------+
+// Endpoints API
+//--------------------------------------------------------------------+
+
+// Open an endpoint
+bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) {
+  (void) rhport;
+  (void) dev_addr;
+  (void) ep_desc;
+
+  return false;
+}
+
+// Submit a transfer, when complete hcd_event_xfer_complete() must be invoked
+bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) {
+  (void) rhport;
+  (void) dev_addr;
+  (void) ep_addr;
+  (void) buffer;
+  (void) buflen;
+
+  return false;
+}
+
+// Abort a queued transfer. Note: it can only abort transfer that has not been started
+// Return true if a queued transfer is aborted, false if there is no transfer to abort
+bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void) rhport;
+  (void) dev_addr;
+  (void) ep_addr;
+
+  return false;
+}
+
+// Submit a special transfer to send 8-byte Setup Packet, when complete hcd_event_xfer_complete() must be invoked
+bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) {
+  (void) rhport;
+  (void) dev_addr;
+  (void) setup_packet;
+
+  return false;
+}
+
+// clear stall, data toggle is also reset to DATA0
+bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void) rhport;
+  (void) dev_addr;
+  (void) ep_addr;
+
+  return false;
+}
+
+#endif
diff --git a/src/tusb.h b/src/tusb.h
index 37a521fa8..d6534ca28 100644
--- a/src/tusb.h
+++ b/src/tusb.h
@@ -64,7 +64,10 @@
   #if CFG_TUH_VENDOR
     #include "class/vendor/vendor_host.h"
   #endif
-
+#else
+  #ifndef tuh_int_handler
+  #define tuh_int_handler(_x)
+  #endif
 #endif
 
 //------------- DEVICE -------------//
@@ -118,6 +121,10 @@
   #if CFG_TUD_BTH
     #include "class/bth/bth_device.h"
   #endif
+#else
+  #ifndef tud_int_handler
+  #define tud_int_handler(_x)
+  #endif
 #endif
 
 

From 824e585e2b1f62d1ed03f480439e62e5410636b6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 18 Aug 2023 14:06:57 +0700
Subject: [PATCH 611/691] ground works for hcd max3421e

---
 .../feather_nrf52840_express/board.cmake      |   4 +-
 .../boards/feather_nrf52840_express/board.h   |   7 +
 hw/bsp/nrf/family.c                           |  80 +++--
 hw/bsp/nrf/family.cmake                       |   2 +-
 hw/bsp/nrf/nrfx_config.h                      |   5 +-
 src/portable/analog/max3421e/hcd_max3421e.c   | 302 ++++++++++++++++++
 6 files changed, 369 insertions(+), 31 deletions(-)
 create mode 100644 src/portable/analog/max3421e/hcd_max3421e.c

diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake b/hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake
index 0acbecf7a..78ed98225 100644
--- a/hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake
+++ b/hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake
@@ -1,6 +1,6 @@
 set(MCU_VARIANT nrf52840)
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/nrf52840_s140_v6.ld)
-# set(LD_FILE_GNU ${NRFX_DIR}/mdk/nrf52840_xxaa.ld)
+#set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/nrf52840_s140_v6.ld)
+set(LD_FILE_GNU ${NRFX_DIR}/mdk/nrf52840_xxaa.ld)
 
 function(update_board TARGET)
 endfunction()
diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/board.h b/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
index 8e6ce3230..e19f88a3c 100644
--- a/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
+++ b/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
@@ -45,6 +45,13 @@
 #define UART_RX_PIN     24
 #define UART_TX_PIN     25
 
+// SPI for USB host shield
+#define SPI_SCK_PIN      14
+#define SPI_MOSI_PIN     13
+#define SPI_MISO_PIN     15
+#define SPI_CS_PIN       27
+#define MAX3241E_INT_PIN 26
+
 #ifdef __cplusplus
  }
 #endif
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 9ca666e36..b6ed15122 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -40,6 +40,7 @@
 #include "hal/nrf_gpio.h"
 #include "drivers/include/nrfx_power.h"
 #include "drivers/include/nrfx_uarte.h"
+#include "drivers/include/nrfx_spim.h"
 
 #ifdef SOFTDEVICE_PRESENT
 #include "nrf_sdm.h"
@@ -54,8 +55,7 @@
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
-void USBD_IRQHandler(void)
-{
+void USBD_IRQHandler(void) {
   tud_int_handler(0);
 }
 
@@ -81,6 +81,7 @@ enum {
 #endif
 
 static nrfx_uarte_t _uart_id = NRFX_UARTE_INSTANCE(0);
+static nrfx_spim_t _spi = NRFX_SPIM_INSTANCE(0);
 
 // tinyusb function that handles power event (detected, ready, removed)
 // We must call it within SD's SOC event handler, or set it as power event handler if SD is not enabled.
@@ -88,13 +89,11 @@ extern void tusb_hal_nrf_power_event(uint32_t event);
 
 
 // nrf power callback, could be unused if SD is enabled or usb is disabled (board_test example)
-TU_ATTR_UNUSED static void power_event_handler(nrfx_power_usb_evt_t event)
-{
+TU_ATTR_UNUSED static void power_event_handler(nrfx_power_usb_evt_t event) {
   tusb_hal_nrf_power_event((uint32_t) event);
 }
 
-void board_init(void)
-{
+void board_init(void) {
   // stop LF clock just in case we jump from application without reset
   NRF_CLOCK->TASKS_LFCLKSTOP = 1UL;
 
@@ -113,8 +112,7 @@ void board_init(void)
   SysTick_Config(SystemCoreClock/1000);
 
   // UART
-  nrfx_uarte_config_t uart_cfg =
-  {
+  nrfx_uarte_config_t uart_cfg = {
     .pseltxd   = UART_TX_PIN,
     .pselrxd   = UART_RX_PIN,
     .pselcts   = NRF_UARTE_PSEL_DISCONNECTED,
@@ -175,45 +173,78 @@ void board_init(void)
   if ( usb_reg & VBUSDETECT_Msk ) tusb_hal_nrf_power_event(USB_EVT_DETECTED);
   if ( usb_reg & OUTPUTRDY_Msk  ) tusb_hal_nrf_power_event(USB_EVT_READY);
 #endif
+
+  (void) _spi;
+#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421E) && CFG_TUH_MAX3421E
+  // USB host using max3421e usb controller via SPI
+  nrfx_spim_config_t cfg = {
+      .sck_pin        = SPI_SCK_PIN,
+      .mosi_pin       = SPI_MOSI_PIN,
+      .miso_pin       = SPI_MISO_PIN,
+      .ss_pin         = SPI_CS_PIN,
+      .ss_active_high = false,
+      .irq_priority   = 3,
+      .orc            = 0xFF,
+      // default setting 4 Mhz, Mode 0, MSB first
+      .frequency      = NRF_SPIM_FREQ_4M,
+      .mode           = NRF_SPIM_MODE_0,
+      .bit_order      = NRF_SPIM_BIT_ORDER_MSB_FIRST,
+  };
+
+  // no handler --> blocking
+  nrfx_spim_init(&_spi, &cfg, NULL, NULL);
+#endif
+
 }
 
 //--------------------------------------------------------------------+
 // Board porting API
 //--------------------------------------------------------------------+
 
-void board_led_write(bool state)
-{
-  nrf_gpio_pin_write(LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
+void board_led_write(bool state) {
+  nrf_gpio_pin_write(LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON));
 }
 
-uint32_t board_button_read(void)
-{
+uint32_t board_button_read(void) {
   return BUTTON_STATE_ACTIVE == nrf_gpio_pin_read(BUTTON_PIN);
 }
 
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
+int board_uart_read(uint8_t *buf, int len) {
+  (void) buf;
+  (void) len;
   return 0;
 //  return NRFX_SUCCESS == nrfx_uart_rx(&_uart_id, buf, (size_t) len) ? len : 0;
 }
 
-int board_uart_write(void const * buf, int len)
-{
-  return (NRFX_SUCCESS == nrfx_uarte_tx(&_uart_id, (uint8_t const*) buf, (size_t) len)) ? len : 0;
+int board_uart_write(void const *buf, int len) {
+  return (NRFX_SUCCESS == nrfx_uarte_tx(&_uart_id, (uint8_t const *) buf, (size_t) len)) ? len : 0;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
+
+void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void)
-{
+uint32_t board_millis(void) {
   return system_ticks;
 }
+
+#endif
+
+#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421E) && CFG_TUH_MAX3421E
+// API: SPI transfer with MAX3421E, must be implemented by application
+bool tuh_max3421e_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_len, uint8_t * rx_buf, size_t rx_len) {
+  (void) rhport;
+  nrfx_spim_xfer_desc_t xfer = {
+      .p_tx_buffer = tx_buf,
+      .tx_length   = tx_len,
+      .p_rx_buffer = rx_buf,
+      .rx_length   = rx_len,
+  };
+  return nrfx_spim_xfer(&_spi, &xfer, 0) == NRFX_SUCCESS;
+}
 #endif
 
 #ifdef SOFTDEVICE_PRESENT
@@ -251,8 +282,7 @@ void SD_EVT_IRQHandler(void)
   }
 }
 
-void nrf_error_cb(uint32_t id, uint32_t pc, uint32_t info)
-{
+void nrf_error_cb(uint32_t id, uint32_t pc, uint32_t info) {
   (void) id;
   (void) pc;
   (void) info;
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 6c24d3658..527251e71 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -122,7 +122,7 @@ function(family_configure_example TARGET RTOS)
   family_add_tinyusb(${TARGET} OPT_MCU_NRF5X ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/nordic/nrf5x/dcd_nrf5x.c
-    #${TOP}/src/portable/analog/max3421e/hcd_max3421e.c
+    ${TOP}/src/portable/analog/max3421e/hcd_max3421e.c
     )
   target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 
diff --git a/hw/bsp/nrf/nrfx_config.h b/hw/bsp/nrf/nrfx_config.h
index 696a3fb04..d0f718c6c 100644
--- a/hw/bsp/nrf/nrfx_config.h
+++ b/hw/bsp/nrf/nrfx_config.h
@@ -9,9 +9,8 @@
 #define NRFX_UARTE_ENABLED   1
 #define NRFX_UARTE0_ENABLED  1
 
-#define NRFX_UARTE1_ENABLED  0
-#define NRFX_UARTE2_ENABLED  0
-#define NRFX_UARTE3_ENABLED  0
+#define NRFX_SPIM_ENABLED    1
+#define NRFX_SPIM0_ENABLED   1
 
 #define NRFX_PRS_ENABLED     0
 #define NRFX_USBREG_ENABLED  1
diff --git a/src/portable/analog/max3421e/hcd_max3421e.c b/src/portable/analog/max3421e/hcd_max3421e.c
new file mode 100644
index 000000000..7b9d73e4e
--- /dev/null
+++ b/src/portable/analog/max3421e/hcd_max3421e.c
@@ -0,0 +1,302 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "tusb_option.h"
+
+#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421E) && CFG_TUH_MAX3421E
+
+#include "host/hcd.h"
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+// Command format is
+// Reg [7:3] | 0 [2] | Dir [1] | Ack [0]
+
+enum {
+  CMDBYTE_WRITE = 0x02,
+};
+
+enum {
+  RCVVFIFO_ADDR = 1u  << 3, // 0x08
+  SNDFIFO_ADDR  = 2u  << 3, // 0x10
+  SUDFIFO_ADDR  = 4u  << 3, // 0x20
+  RCVBC_ADDR    = 6u  << 3, // 0x30
+  SNDBC_ADDR    = 7u  << 3, // 0x38
+  USBIRQ_ADDR   = 13u << 3, // 0x68
+  USBIEN_ADDR   = 14u << 3, // 0x70
+  USBCTL_ADDR   = 15u << 3, // 0x78
+  CPUCTL_ADDR   = 16u << 3, // 0x80
+  PINCTL_ADDR   = 17u << 3, // 0x88
+  REVISION_ADDR = 18u << 3, // 0x90
+  HIRQ_ADDR     = 25u << 3, // 0xC8
+  HIEN_ADDR     = 26u << 3, // 0xD0
+  MODE_ADDR     = 27u << 3, // 0xD8
+  PERADDR_ADDR  = 28u << 3, // 0xE0
+  HCTL_ADDR     = 29u << 3, // 0xE8
+  HXFR_ADDR     = 30u << 3, // 0xF0
+  HRSL_ADDR     = 31u << 3, // 0xF8
+};
+
+enum {
+  USBIRQ_OSCOK_IRQ  = 1u << 0,
+  USBIRQ_NOVBUS_IRQ = 1u << 5,
+  USBIRQ_VBUS_IRQ   = 1u << 6,
+};
+
+enum {
+  USBCTL_PWRDOWN = 1u << 4,
+  USBCTL_CHIPRES = 1u << 5,
+};
+
+enum {
+  CPUCTL_IE        = 1u << 0,
+  CPUCTL_PULSEWID0 = 1u << 6,
+  CPUCTL_PULSEWID1 = 1u << 7,
+};
+
+enum {
+  PINCTL_GPXA     = 1u << 0,
+  PINCTL_GPXB     = 1u << 1,
+  PINCTL_POSINT   = 1u << 2,
+  PINCTL_INTLEVEL = 1u << 3,
+  PINCTL_FDUPSPI  = 1u << 4,
+};
+
+enum {
+  HIRQ_BUSEVENT_IRQ = 1u << 0,
+  HIRQ_RWU_IRQ      = 1u << 1,
+  HIRQ_RCVDAV_IRQ   = 1u << 2,
+  HIRQ_SNDBAV_IRQ   = 1u << 3,
+  HIRQ_SUSDN_IRQ    = 1u << 4,
+  HIRQ_CONDET_IRQ   = 1u << 5,
+  HIRQ_FRAME_IRQ    = 1u << 6,
+  HIRQ_HXFRDN_IRQ   = 1u << 7,
+};
+
+enum {
+  MODE_HOST      = 1u << 0,
+  MODE_LOWSPEED  = 1u << 1,
+  MODE_HUBPRE    = 1u << 2,
+  MODE_SOFKAENAB = 1u << 3,
+  MODE_SEPIRQ    = 1u << 4,
+  MODE_DELAYISO  = 1u << 5,
+  MODE_DMPULLDN  = 1u << 6,
+  MODE_DPPULLDN  = 1u << 7,
+};
+
+enum {
+  HCTL_BUSRST    = 1u << 1,
+  HCTL_FRMRST    = 1u << 2,
+  HCTL_SAMPLEBUS = 1u << 3,
+  HCTL_SIGRSM    = 1u << 4,
+  HCTL_RCVTOG0   = 1u << 5,
+  HCTL_RCVTOG1   = 1u << 6,
+  HCTL_SNDTOG0   = 1u << 7,
+  HCTL_SNDTOG1   = 1u << 8,
+};
+
+enum {
+  HXFR_EPNUM_MASK = 0x0f,
+  HXFR_SETUP      = 1u << 4,
+  HXFR_OUT_NIN    = 1u << 5,
+  HXFR_ISO        = 1u << 6,
+  HXFR_HS         = 1u << 7,
+};
+
+enum {
+  HRSL_RESULT_MASK = 0x0f,
+  HRSL_RCVTOGRD    = 1u << 4,
+  HRSL_SNDTOGRD    = 1u << 5,
+  HRSL_KSTATUS     = 1u << 6,
+  HRSL_JSTATUS     = 1u << 7,
+};
+
+// API: SPI transfer with MAX3421E, must be implemented by application
+bool tuh_max3421e_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_len, uint8_t * rx_buf, size_t rx_len);
+
+// return HIRQ register since we are in full-duplex mode
+static uint8_t reg_write(uint8_t reg, uint8_t data) {
+  uint8_t tx_buf[2] = {reg | CMDBYTE_WRITE, data};
+  uint8_t rx_buf[2] = {0, 0};
+  tuh_max3421e_spi_xfer_api(0, tx_buf, 2, rx_buf, 2);
+  return rx_buf[0];
+}
+
+static uint8_t reg_read(uint8_t reg) {
+  uint8_t tx_buf[2] = {reg, 0};
+  uint8_t rx_buf[2] = {0, 0};
+  return tuh_max3421e_spi_xfer_api(0, tx_buf, 2, rx_buf, 2) ? rx_buf[1] : 0;
+}
+
+
+//--------------------------------------------------------------------+
+// Controller API
+//--------------------------------------------------------------------+
+
+// optional hcd configuration, called by tuh_configure()
+bool hcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) {
+  (void) rhport;
+  (void) cfg_id;
+  (void) cfg_param;
+
+  return false;
+}
+
+// Initialize controller to host mode
+bool hcd_init(uint8_t rhport) {
+  (void) rhport;
+
+  // full duplex, interrupt level (should be configurable)
+  reg_write(PINCTL_ADDR, PINCTL_FDUPSPI | PINCTL_INTLEVEL);
+
+  // reset
+  reg_write(USBCTL_ADDR, USBCTL_CHIPRES);
+  reg_write(USBCTL_ADDR, 0);
+  while( !(reg_read(USBIRQ_ADDR) & USBIRQ_OSCOK_IRQ) ) {
+    // wait for oscillator to stabilize
+  }
+
+  // Mode: Host and DP/DM pull down
+  reg_write(MODE_ADDR, MODE_DPPULLDN | MODE_DMPULLDN | MODE_HOST);
+
+  // Connection detection
+  reg_write(HIEN_ADDR, HIRQ_CONDET_IRQ /*| HIRQ_FRAME_IRQ */);
+
+  return false;
+}
+
+// Interrupt Handler
+void hcd_int_handler(uint8_t rhport) {
+  (void) rhport;
+}
+
+// Enable USB interrupt
+void hcd_int_enable (uint8_t rhport) {
+  (void) rhport;
+}
+
+// Disable USB interrupt
+void hcd_int_disable(uint8_t rhport) {
+  (void) rhport;
+}
+
+// Get frame number (1ms)
+uint32_t hcd_frame_number(uint8_t rhport) {
+  (void) rhport;
+
+  return 0;
+}
+
+//--------------------------------------------------------------------+
+// Port API
+//--------------------------------------------------------------------+
+
+// Get the current connect status of roothub port
+bool hcd_port_connect_status(uint8_t rhport) {
+  (void) rhport;
+
+  return false;
+}
+
+// Reset USB bus on the port. Return immediately, bus reset sequence may not be complete.
+// Some port would require hcd_port_reset_end() to be invoked after 10ms to complete the reset sequence.
+void hcd_port_reset(uint8_t rhport) {
+  (void) rhport;
+}
+
+// Complete bus reset sequence, may be required by some controllers
+void hcd_port_reset_end(uint8_t rhport) {
+  (void) rhport;
+}
+
+// Get port link speed
+tusb_speed_t hcd_port_speed_get(uint8_t rhport) {
+  (void) rhport;
+
+  return TUSB_SPEED_FULL;
+}
+
+// HCD closes all opened endpoints belong to this device
+void hcd_device_close(uint8_t rhport, uint8_t dev_addr) {
+  (void) rhport;
+  (void) dev_addr;
+}
+
+//--------------------------------------------------------------------+
+// Endpoints API
+//--------------------------------------------------------------------+
+
+// Open an endpoint
+bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) {
+  (void) rhport;
+  (void) dev_addr;
+  (void) ep_desc;
+
+  return false;
+}
+
+// Submit a transfer, when complete hcd_event_xfer_complete() must be invoked
+bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) {
+  (void) rhport;
+  (void) dev_addr;
+  (void) ep_addr;
+  (void) buffer;
+  (void) buflen;
+
+  return false;
+}
+
+// Abort a queued transfer. Note: it can only abort transfer that has not been started
+// Return true if a queued transfer is aborted, false if there is no transfer to abort
+bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void) rhport;
+  (void) dev_addr;
+  (void) ep_addr;
+
+  return false;
+}
+
+// Submit a special transfer to send 8-byte Setup Packet, when complete hcd_event_xfer_complete() must be invoked
+bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) {
+  (void) rhport;
+  (void) dev_addr;
+  (void) setup_packet;
+
+  return false;
+}
+
+// clear stall, data toggle is also reset to DATA0
+bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void) rhport;
+  (void) dev_addr;
+  (void) ep_addr;
+
+  return false;
+}
+
+#endif

From cacc96b25dc04865389357467b7a6d92d040ef36 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 18 Aug 2023 17:39:10 +0700
Subject: [PATCH 612/691] adding connection event handling, add nrf gpio
 interrupt for max2341e interrupt pin

---
 .../boards/feather_nrf52840_express/board.h   |  2 +-
 hw/bsp/nrf/family.c                           | 55 +++++++++-----
 hw/bsp/nrf/family.cmake                       |  2 +
 hw/bsp/nrf/nrfx_config.h                      |  2 +-
 hw/bsp/nrf/nrfx_glue.h                        | 69 +++++++++++++++++
 src/portable/analog/max3421e/hcd_max3421e.c   | 76 ++++++++++++++++++-
 6 files changed, 184 insertions(+), 22 deletions(-)

diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/board.h b/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
index e19f88a3c..7f042142e 100644
--- a/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
+++ b/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
@@ -50,7 +50,7 @@
 #define SPI_MOSI_PIN     13
 #define SPI_MISO_PIN     15
 #define SPI_CS_PIN       27
-#define MAX3241E_INT_PIN 26
+#define MAX3241E_INTR_PIN 26
 
 #ifdef __cplusplus
  }
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index b6ed15122..e58ee845b 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -38,6 +38,7 @@
 
 #include "nrfx.h"
 #include "hal/nrf_gpio.h"
+#include "drivers/include/nrfx_gpiote.h"
 #include "drivers/include/nrfx_power.h"
 #include "drivers/include/nrfx_uarte.h"
 #include "drivers/include/nrfx_spim.h"
@@ -81,18 +82,45 @@ enum {
 #endif
 
 static nrfx_uarte_t _uart_id = NRFX_UARTE_INSTANCE(0);
-static nrfx_spim_t _spi = NRFX_SPIM_INSTANCE(0);
 
 // tinyusb function that handles power event (detected, ready, removed)
 // We must call it within SD's SOC event handler, or set it as power event handler if SD is not enabled.
 extern void tusb_hal_nrf_power_event(uint32_t event);
 
-
 // nrf power callback, could be unused if SD is enabled or usb is disabled (board_test example)
 TU_ATTR_UNUSED static void power_event_handler(nrfx_power_usb_evt_t event) {
   tusb_hal_nrf_power_event((uint32_t) event);
 }
 
+//------------- Host using MAX2341E -------------//
+#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421E) && CFG_TUH_MAX3421E
+static nrfx_spim_t _spi = NRFX_SPIM_INSTANCE(0);
+
+void max2342e_int_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) {
+  if ( !(pin == MAX3241E_INTR_PIN && action == NRF_GPIOTE_POLARITY_HITOLO) ) return;
+
+  tuh_int_handler(1);
+}
+
+// API: SPI transfer with MAX3421E, must be implemented by application
+bool tuh_max3421e_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_len, uint8_t * rx_buf, size_t rx_len) {
+  (void) rhport;
+  nrfx_spim_xfer_desc_t xfer = {
+      .p_tx_buffer = tx_buf,
+      .tx_length   = tx_len,
+      .p_rx_buffer = rx_buf,
+      .rx_length   = rx_len,
+  };
+  return nrfx_spim_xfer(&_spi, &xfer, 0) == NRFX_SUCCESS;
+}
+
+#endif
+
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
 void board_init(void) {
   // stop LF clock just in case we jump from application without reset
   NRF_CLOCK->TASKS_LFCLKSTOP = 1UL;
@@ -174,7 +202,6 @@ void board_init(void) {
   if ( usb_reg & OUTPUTRDY_Msk  ) tusb_hal_nrf_power_event(USB_EVT_READY);
 #endif
 
-  (void) _spi;
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421E) && CFG_TUH_MAX3421E
   // USB host using max3421e usb controller via SPI
   nrfx_spim_config_t cfg = {
@@ -193,6 +220,14 @@ void board_init(void) {
 
   // no handler --> blocking
   nrfx_spim_init(&_spi, &cfg, NULL, NULL);
+
+  // max3421e interrupt pin
+  nrfx_gpiote_init(1);
+  nrfx_gpiote_in_config_t in_config = NRFX_GPIOTE_CONFIG_IN_SENSE_HITOLO(true);
+  in_config.pull = NRF_GPIO_PIN_PULLUP;
+
+  nrfx_gpiote_in_init(MAX3241E_INTR_PIN, &in_config, max2342e_int_handler);
+  nrfx_gpiote_in_event_enable(MAX3241E_INTR_PIN, true);
 #endif
 
 }
@@ -233,20 +268,6 @@ uint32_t board_millis(void) {
 
 #endif
 
-#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421E) && CFG_TUH_MAX3421E
-// API: SPI transfer with MAX3421E, must be implemented by application
-bool tuh_max3421e_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_len, uint8_t * rx_buf, size_t rx_len) {
-  (void) rhport;
-  nrfx_spim_xfer_desc_t xfer = {
-      .p_tx_buffer = tx_buf,
-      .tx_length   = tx_len,
-      .p_rx_buffer = rx_buf,
-      .rx_length   = rx_len,
-  };
-  return nrfx_spim_xfer(&_spi, &xfer, 0) == NRFX_SUCCESS;
-}
-#endif
-
 #ifdef SOFTDEVICE_PRESENT
 // process SOC event from SD
 uint32_t proc_soc(void)
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 527251e71..8bf7bcb52 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -32,6 +32,8 @@ function(add_board_target BOARD_TARGET)
   if (NOT TARGET ${BOARD_TARGET})
     add_library(${BOARD_TARGET} STATIC
       # driver
+      ${NRFX_DIR}/helpers/nrfx_flag32_allocator.c
+      ${NRFX_DIR}/drivers/src/nrfx_gpiote.c
       ${NRFX_DIR}/drivers/src/nrfx_power.c
       ${NRFX_DIR}/drivers/src/nrfx_spim.c
       ${NRFX_DIR}/drivers/src/nrfx_uarte.c
diff --git a/hw/bsp/nrf/nrfx_config.h b/hw/bsp/nrf/nrfx_config.h
index d0f718c6c..e3d0ea91b 100644
--- a/hw/bsp/nrf/nrfx_config.h
+++ b/hw/bsp/nrf/nrfx_config.h
@@ -5,6 +5,7 @@
 #define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY  7
 
 #define NRFX_CLOCK_ENABLED   0
+#define NRFX_GPIOTE_ENABLED  1
 
 #define NRFX_UARTE_ENABLED   1
 #define NRFX_UARTE0_ENABLED  1
@@ -41,5 +42,4 @@
     #error "Unknown device."
 #endif
 
-
 #endif // NRFX_CONFIG_H__
diff --git a/hw/bsp/nrf/nrfx_glue.h b/hw/bsp/nrf/nrfx_glue.h
index cdf49b4ab..ef756c670 100644
--- a/hw/bsp/nrf/nrfx_glue.h
+++ b/hw/bsp/nrf/nrfx_glue.h
@@ -220,6 +220,75 @@ static inline bool _NRFX_IRQ_IS_PENDING(IRQn_Type irq_number)
 
 /** @} */
 
+//------------------------------------------------------------------------------
+
+#include <soc/nrfx_atomic.h>
+
+/**
+ * @brief Atomic 32 bit unsigned type.
+ */
+#define nrfx_atomic_t               nrfx_atomic_u32_t
+
+/**
+ * @brief Stores value to an atomic object and returns previously stored value.
+ *
+ * @param[in] p_data  Atomic memory pointer.
+ * @param[in] value   Value to store.
+ *
+ * @return Old value stored into atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_STORE(p_data, value) nrfx_atomic_u32_fetch_store(p_data, value)
+
+/**
+ * @brief Performs logical OR operation on an atomic object and returns previously stored value.
+ *
+ * @param[in] p_data  Atomic memory pointer.
+ * @param[in] value   Value of second operand of OR operation.
+ *
+ * @return Old value stored into atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_OR(p_data, value)   nrfx_atomic_u32_fetch_or(p_data, value)
+
+/**
+ * @brief Performs logical AND operation on an atomic object and returns previously stored value.
+ *
+ * @param[in] p_data  Atomic memory pointer.
+ * @param[in] value   Value of second operand of AND operation.
+ *
+ * @return Old value stored into atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_AND(p_data, value)   nrfx_atomic_u32_fetch_and(p_data, value)
+
+/**
+ * @brief Performs logical XOR operation on an atomic object and returns previously stored value.
+ *
+ * @param[in] p_data  Atomic memory pointer.
+ * @param[in] value   Value of second operand of XOR operation.
+ *
+ * @return Old value stored into atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_XOR(p_data, value)   nrfx_atomic_u32_fetch_xor(p_data, value)
+
+/**
+ * @brief Performs logical ADD operation on an atomic object and returns previously stored value.
+ *
+ * @param[in] p_data  Atomic memory pointer.
+ * @param[in] value   Value of second operand of ADD operation.
+ *
+ * @return Old value stored into atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_ADD(p_data, value)   nrfx_atomic_u32_fetch_add(p_data, value)
+
+/**
+ * @brief Performs logical SUB operation on an atomic object and returns previously stored value.
+ *
+ * @param[in] p_data  Atomic memory pointer.
+ * @param[in] value   Value of second operand of SUB operation.
+ *
+ * @return Old value stored into atomic object.
+ */
+#define NRFX_ATOMIC_FETCH_SUB(p_data, value)   nrfx_atomic_u32_fetch_sub(p_data, value)
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/src/portable/analog/max3421e/hcd_max3421e.c b/src/portable/analog/max3421e/hcd_max3421e.c
index 7b9d73e4e..a89581b9c 100644
--- a/src/portable/analog/max3421e/hcd_max3421e.c
+++ b/src/portable/analog/max3421e/hcd_max3421e.c
@@ -136,6 +136,20 @@ enum {
   HRSL_JSTATUS     = 1u << 7,
 };
 
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+//typedef struct {
+//  uint8_t mode
+//} max2341e_data_t;
+//
+//max2341e_data_t max2341e_data;
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
 // API: SPI transfer with MAX3421E, must be implemented by application
 bool tuh_max3421e_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_len, uint8_t * rx_buf, size_t rx_len);
 
@@ -144,6 +158,7 @@ static uint8_t reg_write(uint8_t reg, uint8_t data) {
   uint8_t tx_buf[2] = {reg | CMDBYTE_WRITE, data};
   uint8_t rx_buf[2] = {0, 0};
   tuh_max3421e_spi_xfer_api(0, tx_buf, 2, rx_buf, 2);
+  TU_LOG2("HIRQ: %02X\r\n", rx_buf[0]);
   return rx_buf[0];
 }
 
@@ -167,6 +182,48 @@ bool hcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) {
   return false;
 }
 
+tusb_speed_t handle_connect_irq(uint8_t rhport) {
+  (void) rhport;
+
+  uint8_t const hrsl = reg_read(HRSL_ADDR);
+  uint8_t const jk = hrsl & (HRSL_JSTATUS | HRSL_KSTATUS);
+
+  tusb_speed_t speed;
+  uint8_t new_mode = MODE_DPPULLDN | MODE_DMPULLDN | MODE_HOST;
+
+  switch(jk) {
+    case 0x00:
+      // SEO is disconnected
+      speed = TUSB_SPEED_INVALID;
+      break;
+
+    case (HRSL_JSTATUS | HRSL_KSTATUS):
+      // SE1 is illegal
+      speed = TUSB_SPEED_INVALID;
+      break;
+
+    default: {
+      // Low speed if (LS = 1 and J-state) or (LS = 0 and K-State)
+      uint8_t const mode = reg_read(MODE_ADDR);
+      uint8_t const ls_bit = mode & MODE_LOWSPEED;
+
+      if ( (ls_bit && (jk == HRSL_JSTATUS)) || (!ls_bit && (jk == HRSL_KSTATUS)) ) {
+        speed = TUSB_SPEED_LOW;
+        new_mode |= MODE_LOWSPEED;
+      } else {
+        speed =  TUSB_SPEED_FULL;
+      }
+
+      new_mode |= MODE_SOFKAENAB; // enable SOF since there is new device
+
+      break;
+    }
+  }
+
+  reg_write(MODE_ADDR, new_mode);
+  return speed;
+}
+
 // Initialize controller to host mode
 bool hcd_init(uint8_t rhport) {
   (void) rhport;
@@ -184,15 +241,28 @@ bool hcd_init(uint8_t rhport) {
   // Mode: Host and DP/DM pull down
   reg_write(MODE_ADDR, MODE_DPPULLDN | MODE_DMPULLDN | MODE_HOST);
 
-  // Connection detection
-  reg_write(HIEN_ADDR, HIRQ_CONDET_IRQ /*| HIRQ_FRAME_IRQ */);
+  // Enable Connection IRQ
+  reg_write(HIEN_ADDR, HIRQ_CONDET_IRQ);
 
-  return false;
+  // Note: if device is already connected, CONDET IRQ may not be triggered. We need to detect it by sampling bus signal
+  reg_write(HCTL_ADDR, HCTL_SAMPLEBUS);
+  while( !(reg_read(HCTL_ADDR) & HCTL_SAMPLEBUS) ) {}
+
+  handle_connect_irq(rhport);
+  reg_write(HIRQ_ADDR, HIRQ_CONDET_IRQ);
+
+  // Enable Interrupt pin
+  reg_write(CPUCTL_ADDR, CPUCTL_IE);
+
+  return true;
 }
 
 // Interrupt Handler
 void hcd_int_handler(uint8_t rhport) {
   (void) rhport;
+
+  uint8_t hirq = reg_read(HIRQ_ADDR);
+  TU_LOG3_INT(hirq);
 }
 
 // Enable USB interrupt

From b4134394166c1f77463b5cb62f28cff465fde174 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 22 Aug 2023 19:57:59 +0700
Subject: [PATCH 613/691] able to detect new device and start enumerating

---
 src/portable/analog/max3421e/hcd_max3421e.c | 70 +++++++++++++++------
 1 file changed, 51 insertions(+), 19 deletions(-)

diff --git a/src/portable/analog/max3421e/hcd_max3421e.c b/src/portable/analog/max3421e/hcd_max3421e.c
index a89581b9c..870c616a9 100644
--- a/src/portable/analog/max3421e/hcd_max3421e.c
+++ b/src/portable/analog/max3421e/hcd_max3421e.c
@@ -140,11 +140,13 @@ enum {
 //
 //--------------------------------------------------------------------+
 
-//typedef struct {
-//  uint8_t mode
-//} max2341e_data_t;
-//
-//max2341e_data_t max2341e_data;
+typedef struct {
+  uint8_t mode;
+
+  volatile uint16_t frame_count;
+} max2341e_data_t;
+
+static max2341e_data_t _hcd_data;
 
 //--------------------------------------------------------------------+
 //
@@ -168,6 +170,11 @@ static uint8_t reg_read(uint8_t reg) {
   return tuh_max3421e_spi_xfer_api(0, tx_buf, 2, rx_buf, 2) ? rx_buf[1] : 0;
 }
 
+static inline uint8_t mode_write(uint8_t data) {
+  _hcd_data.mode = data;
+  return reg_write(MODE_ADDR, data);
+}
+
 
 //--------------------------------------------------------------------+
 // Controller API
@@ -220,7 +227,8 @@ tusb_speed_t handle_connect_irq(uint8_t rhport) {
     }
   }
 
-  reg_write(MODE_ADDR, new_mode);
+  mode_write(new_mode);
+  TU_LOG2_INT(speed);
   return speed;
 }
 
@@ -228,6 +236,8 @@ tusb_speed_t handle_connect_irq(uint8_t rhport) {
 bool hcd_init(uint8_t rhport) {
   (void) rhport;
 
+  tu_memclr(&_hcd_data, sizeof(_hcd_data));
+
   // full duplex, interrupt level (should be configurable)
   reg_write(PINCTL_ADDR, PINCTL_FDUPSPI | PINCTL_INTLEVEL);
 
@@ -239,17 +249,21 @@ bool hcd_init(uint8_t rhport) {
   }
 
   // Mode: Host and DP/DM pull down
-  reg_write(MODE_ADDR, MODE_DPPULLDN | MODE_DMPULLDN | MODE_HOST);
+  mode_write(MODE_DPPULLDN | MODE_DMPULLDN | MODE_HOST);
 
   // Enable Connection IRQ
-  reg_write(HIEN_ADDR, HIRQ_CONDET_IRQ);
+  reg_write(HIEN_ADDR, HIRQ_CONDET_IRQ | HIRQ_FRAME_IRQ);
 
-  // Note: if device is already connected, CONDET IRQ may not be triggered. We need to detect it by sampling bus signal
+  #if 0
+  // Note: if device is already connected, CONDET IRQ may not be triggered.
+  // We need to detect it by sampling bus signal. FIXME not working
   reg_write(HCTL_ADDR, HCTL_SAMPLEBUS);
-  while( !(reg_read(HCTL_ADDR) & HCTL_SAMPLEBUS) ) {}
+  while ( reg_read(HCTL_ADDR) & HCTL_SAMPLEBUS ) {}
 
-  handle_connect_irq(rhport);
-  reg_write(HIRQ_ADDR, HIRQ_CONDET_IRQ);
+  if ( TUSB_SPEED_INVALID != handle_connect_irq(rhport) ) {
+    reg_write(HIRQ_ADDR, HIRQ_CONDET_IRQ); // clear connect irq
+  }
+  #endif
 
   // Enable Interrupt pin
   reg_write(CPUCTL_ADDR, CPUCTL_IE);
@@ -262,7 +276,26 @@ void hcd_int_handler(uint8_t rhport) {
   (void) rhport;
 
   uint8_t hirq = reg_read(HIRQ_ADDR);
-  TU_LOG3_INT(hirq);
+  TU_LOG3_HEX(hirq);
+
+  if (hirq & HIRQ_CONDET_IRQ) {
+    tusb_speed_t speed = handle_connect_irq(rhport);
+
+    if (speed == TUSB_SPEED_INVALID) {
+      hcd_event_device_remove(rhport, true);
+    }else {
+      hcd_event_device_attach(rhport, true);
+    }
+  }
+
+  if (hirq & HIRQ_FRAME_IRQ) {
+    _hcd_data.frame_count++;
+  }
+
+  // clear all interrupt
+  if ( hirq ) {
+    reg_write(HIRQ_ADDR, hirq);
+  }
 }
 
 // Enable USB interrupt
@@ -278,8 +311,7 @@ void hcd_int_disable(uint8_t rhport) {
 // Get frame number (1ms)
 uint32_t hcd_frame_number(uint8_t rhport) {
   (void) rhport;
-
-  return 0;
+  return (uint32_t ) _hcd_data.frame_count;
 }
 
 //--------------------------------------------------------------------+
@@ -289,26 +321,26 @@ uint32_t hcd_frame_number(uint8_t rhport) {
 // Get the current connect status of roothub port
 bool hcd_port_connect_status(uint8_t rhport) {
   (void) rhport;
-
-  return false;
+  return (_hcd_data.mode & MODE_SOFKAENAB) ? true : false;
 }
 
 // Reset USB bus on the port. Return immediately, bus reset sequence may not be complete.
 // Some port would require hcd_port_reset_end() to be invoked after 10ms to complete the reset sequence.
 void hcd_port_reset(uint8_t rhport) {
   (void) rhport;
+  reg_write(HCTL_ADDR, HCTL_BUSRST);
 }
 
 // Complete bus reset sequence, may be required by some controllers
 void hcd_port_reset_end(uint8_t rhport) {
   (void) rhport;
+  reg_write(HCTL_ADDR, 0);
 }
 
 // Get port link speed
 tusb_speed_t hcd_port_speed_get(uint8_t rhport) {
   (void) rhport;
-
-  return TUSB_SPEED_FULL;
+  return (_hcd_data.mode & MODE_LOWSPEED) ? TUSB_SPEED_LOW : TUSB_SPEED_FULL;
 }
 
 // HCD closes all opened endpoints belong to this device

From 274578ff46c31b231b3553dc9a20895646313130 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 22 Aug 2023 23:17:12 +0700
Subject: [PATCH 614/691] able to send setup packet

---
 .../boards/feather_nrf52840_express/board.h   |   8 +-
 hw/bsp/nrf/family.c                           |  36 +++-
 src/host/hcd.h                                |   2 +-
 src/host/usbh.c                               |  32 +---
 src/portable/analog/max3421e/hcd_max3421e.c   | 173 ++++++++++++++----
 5 files changed, 179 insertions(+), 72 deletions(-)

diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/board.h b/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
index 7f042142e..e6e7590ac 100644
--- a/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
+++ b/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
@@ -46,10 +46,10 @@
 #define UART_TX_PIN     25
 
 // SPI for USB host shield
-#define SPI_SCK_PIN      14
-#define SPI_MOSI_PIN     13
-#define SPI_MISO_PIN     15
-#define SPI_CS_PIN       27
+#define MAX3421E_SCK_PIN  14
+#define MAX3421E_MOSI_PIN 13
+#define MAX3421E_MISO_PIN 15
+#define MAX3421E_CS_PIN   27
 #define MAX3241E_INTR_PIN 26
 
 #ifdef __cplusplus
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index e58ee845b..862f67bc7 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -96,22 +96,38 @@ TU_ATTR_UNUSED static void power_event_handler(nrfx_power_usb_evt_t event) {
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421E) && CFG_TUH_MAX3421E
 static nrfx_spim_t _spi = NRFX_SPIM_INSTANCE(0);
 
-void max2342e_int_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) {
+void max3421e_int_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) {
   if ( !(pin == MAX3241E_INTR_PIN && action == NRF_GPIOTE_POLARITY_HITOLO) ) return;
 
   tuh_int_handler(1);
 }
 
+static inline void max3421e_cs_assert(bool active) {
+  nrf_gpio_pin_write(MAX3421E_CS_PIN, active ? 0 : 1);
+}
+
+//--------------------------------------------------------------------+
 // API: SPI transfer with MAX3421E, must be implemented by application
-bool tuh_max3421e_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_len, uint8_t * rx_buf, size_t rx_len) {
+//--------------------------------------------------------------------+
+
+bool tuh_max3421e_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_len,
+                               uint8_t * rx_buf, size_t rx_len, bool keep_cs) {
   (void) rhport;
+
+  max3421e_cs_assert(true);
+
   nrfx_spim_xfer_desc_t xfer = {
       .p_tx_buffer = tx_buf,
       .tx_length   = tx_len,
       .p_rx_buffer = rx_buf,
       .rx_length   = rx_len,
   };
-  return nrfx_spim_xfer(&_spi, &xfer, 0) == NRFX_SUCCESS;
+
+  bool ret = (nrfx_spim_xfer(&_spi, &xfer, 0) == NRFX_SUCCESS);
+
+  if ( !keep_cs ) max3421e_cs_assert(false);
+
+  return ret;
 }
 
 #endif
@@ -203,12 +219,16 @@ void board_init(void) {
 #endif
 
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421E) && CFG_TUH_MAX3421E
+  // manually manage CS
+  nrf_gpio_cfg_output(MAX3421E_CS_PIN);
+  max3421e_cs_assert(false);
+
   // USB host using max3421e usb controller via SPI
   nrfx_spim_config_t cfg = {
-      .sck_pin        = SPI_SCK_PIN,
-      .mosi_pin       = SPI_MOSI_PIN,
-      .miso_pin       = SPI_MISO_PIN,
-      .ss_pin         = SPI_CS_PIN,
+      .sck_pin        = MAX3421E_SCK_PIN,
+      .mosi_pin       = MAX3421E_MOSI_PIN,
+      .miso_pin       = MAX3421E_MISO_PIN,
+      .ss_pin         = NRFX_SPIM_PIN_NOT_USED,
       .ss_active_high = false,
       .irq_priority   = 3,
       .orc            = 0xFF,
@@ -226,7 +246,7 @@ void board_init(void) {
   nrfx_gpiote_in_config_t in_config = NRFX_GPIOTE_CONFIG_IN_SENSE_HITOLO(true);
   in_config.pull = NRF_GPIO_PIN_PULLUP;
 
-  nrfx_gpiote_in_init(MAX3241E_INTR_PIN, &in_config, max2342e_int_handler);
+  nrfx_gpiote_in_init(MAX3241E_INTR_PIN, &in_config, max3421e_int_handler);
   nrfx_gpiote_in_event_enable(MAX3241E_INTR_PIN, true);
 #endif
 
diff --git a/src/host/hcd.h b/src/host/hcd.h
index 1b5038ef4..079877b79 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -177,7 +177,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
 bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr);
 
 // Submit a special transfer to send 8-byte Setup Packet, when complete hcd_event_xfer_complete() must be invoked
-bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]);
+bool hcd_setup_send(uint8_t rhport, uint8_t daddr, uint8_t const setup_packet[8]);
 
 // clear stall, data toggle is also reset to DATA0
 bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr);
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 5423df669..7a09f5b6e 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -552,8 +552,7 @@ static void _control_blocking_complete_cb(tuh_xfer_t* xfer)
 }
 
 // TODO timeout_ms is not supported yet
-bool tuh_control_xfer (tuh_xfer_t* xfer)
-{
+bool tuh_control_xfer (tuh_xfer_t* xfer) {
   // EP0 with setup packet
   TU_VERIFY(xfer->ep_addr == 0 && xfer->setup);
 
@@ -565,8 +564,7 @@ bool tuh_control_xfer (tuh_xfer_t* xfer)
   (void) osal_mutex_lock(_usbh_mutex, OSAL_TIMEOUT_WAIT_FOREVER);
 
   bool const is_idle = (_ctrl_xfer.stage == CONTROL_STAGE_IDLE);
-  if (is_idle)
-  {
+  if (is_idle) {
     _ctrl_xfer.stage       = CONTROL_STAGE_SETUP;
     _ctrl_xfer.daddr       = daddr;
     _ctrl_xfer.actual_len  = 0;
@@ -588,11 +586,9 @@ bool tuh_control_xfer (tuh_xfer_t* xfer)
   TU_LOG_PTR(CFG_TUH_LOG_LEVEL, xfer->setup);
   TU_LOG_USBH("\r\n");
 
-  if (xfer->complete_cb)
-  {
+  if (xfer->complete_cb) {
     TU_ASSERT( hcd_setup_send(rhport, daddr, (uint8_t const*) &_ctrl_xfer.request) );
-  }else
-  {
+  }else {
     // blocking if complete callback is not provided
     // change callback to internal blocking, and result as user argument
     volatile xfer_result_t result = XFER_RESULT_INVALID;
@@ -656,15 +652,13 @@ static void _xfer_complete(uint8_t daddr, xfer_result_t result)
   }
 }
 
-static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes)
-{
+static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes) {
   (void) ep_addr;
 
   const uint8_t rhport = usbh_get_rhport(dev_addr);
   tusb_control_request_t const * request = &_ctrl_xfer.request;
 
-  if (XFER_RESULT_SUCCESS != result)
-  {
+  if (XFER_RESULT_SUCCESS != result) {
     TU_LOG1("[%u:%u] Control %s, xferred_bytes = %lu\r\n", rhport, dev_addr, result == XFER_RESULT_STALLED ? "STALLED" : "FAILED", xferred_bytes);
     #if CFG_TUSB_DEBUG == 1
     TU_LOG1_PTR(request);
@@ -673,13 +667,10 @@ static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result
 
     // terminate transfer if any stage failed
     _xfer_complete(dev_addr, result);
-  }else
-  {
-    switch(_ctrl_xfer.stage)
-    {
+  }else {
+    switch(_ctrl_xfer.stage) {
       case CONTROL_STAGE_SETUP:
-        if (request->wLength)
-        {
+        if (request->wLength) {
           // DATA stage: initial data toggle is always 1
           _set_control_xfer_stage(CONTROL_STAGE_DATA);
           TU_ASSERT( hcd_edpt_xfer(rhport, dev_addr, tu_edpt_addr(0, request->bmRequestType_bit.direction), _ctrl_xfer.buffer, request->wLength) );
@@ -688,8 +679,7 @@ static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result
         TU_ATTR_FALLTHROUGH;
 
       case CONTROL_STAGE_DATA:
-        if (request->wLength)
-        {
+        if (request->wLength) {
           TU_LOG_USBH("[%u:%u] Control data:\r\n", rhport, dev_addr);
           TU_LOG_MEM(CFG_TUH_LOG_LEVEL, _ctrl_xfer.buffer, xferred_bytes, 2);
         }
@@ -1538,9 +1528,7 @@ static bool enum_new_device(hcd_event_t* event)
     xfer.result    = XFER_RESULT_SUCCESS;
     xfer.user_data = ENUM_ADDR0_DEVICE_DESC;
 
-
     process_enumeration(&xfer);
-
   }
 #if CFG_TUH_HUB
   else
diff --git a/src/portable/analog/max3421e/hcd_max3421e.c b/src/portable/analog/max3421e/hcd_max3421e.c
index 870c616a9..c9596f695 100644
--- a/src/portable/analog/max3421e/hcd_max3421e.c
+++ b/src/portable/analog/max3421e/hcd_max3421e.c
@@ -136,30 +136,64 @@ enum {
   HRSL_JSTATUS     = 1u << 7,
 };
 
+enum {
+  HRSL_SUCCESS = 0,
+  HRSL_BUSY,
+  HRSL_BAD_REQ,
+  HRSL_UNDEF,
+  HRSL_NAK,
+  HRSL_STALL,
+  HRSL_TOG_ERR,
+  HRSL_WRONG_PID,
+  HRSL_BAD_BYTECOUNT,
+  HRSL_PID_ERR,
+  HRSL_PKT_ERR,
+  HRSL_CRC_ERR,
+  HRSL_K_ERR,
+  HRSL_J_ERR,
+  HRSL_TIMEOUT,
+  HRSL_BABBLE,
+};
+
+
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
 
 typedef struct {
+  // cached register
   uint8_t mode;
+  uint8_t peraddr;
+  uint8_t hxfr;
 
   volatile uint16_t frame_count;
+
+  struct {
+    uint16_t packet_size;
+    uint16_t total_len;
+    uint8_t xfer_type;
+  }ep[8][2];
 } max2341e_data_t;
 
 static max2341e_data_t _hcd_data;
 
 //--------------------------------------------------------------------+
-//
+// API: SPI transfer with MAX3421E, must be implemented by application
 //--------------------------------------------------------------------+
 
-// API: SPI transfer with MAX3421E, must be implemented by application
-bool tuh_max3421e_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_len, uint8_t * rx_buf, size_t rx_len);
+bool tuh_max3421e_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_len,
+                               uint8_t * rx_buf, size_t rx_len, bool keep_cs);
+//void tuh_max3421e_int_enable(uint8_t rhport, bool enabled);
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
 
 // return HIRQ register since we are in full-duplex mode
 static uint8_t reg_write(uint8_t reg, uint8_t data) {
   uint8_t tx_buf[2] = {reg | CMDBYTE_WRITE, data};
   uint8_t rx_buf[2] = {0, 0};
-  tuh_max3421e_spi_xfer_api(0, tx_buf, 2, rx_buf, 2);
+  tuh_max3421e_spi_xfer_api(0, tx_buf, 2, rx_buf, 2, false);
   TU_LOG2("HIRQ: %02X\r\n", rx_buf[0]);
   return rx_buf[0];
 }
@@ -167,7 +201,7 @@ static uint8_t reg_write(uint8_t reg, uint8_t data) {
 static uint8_t reg_read(uint8_t reg) {
   uint8_t tx_buf[2] = {reg, 0};
   uint8_t rx_buf[2] = {0, 0};
-  return tuh_max3421e_spi_xfer_api(0, tx_buf, 2, rx_buf, 2) ? rx_buf[1] : 0;
+  return tuh_max3421e_spi_xfer_api(0, tx_buf, 2, rx_buf, 2, false) ? rx_buf[1] : 0;
 }
 
 static inline uint8_t mode_write(uint8_t data) {
@@ -175,6 +209,24 @@ static inline uint8_t mode_write(uint8_t data) {
   return reg_write(MODE_ADDR, data);
 }
 
+static inline uint8_t peraddr_write(uint8_t data) {
+  if ( _hcd_data.peraddr == data ) return 0; // no need to change address
+
+  _hcd_data.peraddr = data;
+  return reg_write(PERADDR_ADDR, data);
+}
+
+static inline uint8_t hxfr_write(uint8_t data) {
+  _hcd_data.hxfr = data;
+  return reg_write(HXFR_ADDR, data);
+}
+
+static void fifo_write(uint8_t reg, uint8_t const * buffer, uint16_t len) {
+  uint8_t tx_buf[1] = {reg | CMDBYTE_WRITE};
+  tuh_max3421e_spi_xfer_api(0, tx_buf, 1, NULL, 0, true);
+  tuh_max3421e_spi_xfer_api(0, buffer, len, NULL, 0, false);
+}
+
 
 //--------------------------------------------------------------------+
 // Controller API
@@ -252,7 +304,7 @@ bool hcd_init(uint8_t rhport) {
   mode_write(MODE_DPPULLDN | MODE_DMPULLDN | MODE_HOST);
 
   // Enable Connection IRQ
-  reg_write(HIEN_ADDR, HIRQ_CONDET_IRQ | HIRQ_FRAME_IRQ);
+  reg_write(HIEN_ADDR, HIRQ_CONDET_IRQ | HIRQ_FRAME_IRQ | HIRQ_HXFRDN_IRQ);
 
   #if 0
   // Note: if device is already connected, CONDET IRQ may not be triggered.
@@ -271,33 +323,6 @@ bool hcd_init(uint8_t rhport) {
   return true;
 }
 
-// Interrupt Handler
-void hcd_int_handler(uint8_t rhport) {
-  (void) rhport;
-
-  uint8_t hirq = reg_read(HIRQ_ADDR);
-  TU_LOG3_HEX(hirq);
-
-  if (hirq & HIRQ_CONDET_IRQ) {
-    tusb_speed_t speed = handle_connect_irq(rhport);
-
-    if (speed == TUSB_SPEED_INVALID) {
-      hcd_event_device_remove(rhport, true);
-    }else {
-      hcd_event_device_attach(rhport, true);
-    }
-  }
-
-  if (hirq & HIRQ_FRAME_IRQ) {
-    _hcd_data.frame_count++;
-  }
-
-  // clear all interrupt
-  if ( hirq ) {
-    reg_write(HIRQ_ADDR, hirq);
-  }
-}
-
 // Enable USB interrupt
 void hcd_int_enable (uint8_t rhport) {
   (void) rhport;
@@ -359,7 +384,12 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
   (void) dev_addr;
   (void) ep_desc;
 
-  return false;
+  uint8_t ep_num = tu_edpt_number(ep_desc->bEndpointAddress);
+  uint8_t ep_dir = tu_edpt_dir(ep_desc->bEndpointAddress);
+
+  _hcd_data.ep[ep_num][ep_dir].packet_size = tu_edpt_packet_size(ep_desc);
+
+  return true;
 }
 
 // Submit a transfer, when complete hcd_event_xfer_complete() must be invoked
@@ -384,12 +414,18 @@ bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
 }
 
 // Submit a special transfer to send 8-byte Setup Packet, when complete hcd_event_xfer_complete() must be invoked
-bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) {
+bool hcd_setup_send(uint8_t rhport, uint8_t daddr, uint8_t const setup_packet[8]) {
   (void) rhport;
-  (void) dev_addr;
+  (void) daddr;
   (void) setup_packet;
 
-  return false;
+  _hcd_data.ep[0][0].total_len = 8;
+
+  peraddr_write(daddr);
+  fifo_write(SUDFIFO_ADDR, setup_packet, 8);
+  hxfr_write(HXFR_SETUP);
+
+  return true;
 }
 
 // clear stall, data toggle is also reset to DATA0
@@ -401,4 +437,67 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
   return false;
 }
 
+// Interrupt Handler
+void hcd_int_handler(uint8_t rhport) {
+  uint8_t hirq = reg_read(HIRQ_ADDR);
+  TU_LOG3_HEX(hirq);
+
+  if (hirq & HIRQ_CONDET_IRQ) {
+    tusb_speed_t speed = handle_connect_irq(rhport);
+
+    if (speed == TUSB_SPEED_INVALID) {
+      hcd_event_device_remove(rhport, true);
+    }else {
+      hcd_event_device_attach(rhport, true);
+    }
+  }
+
+  if (hirq & HIRQ_FRAME_IRQ) {
+    _hcd_data.frame_count++;
+  }
+
+  if (hirq & HIRQ_HXFRDN_IRQ) {
+    uint8_t const hrsl = reg_read(HRSL_ADDR);
+    uint8_t const result = hrsl & HRSL_RESULT_MASK;
+    uint8_t xfer_result;
+
+    TU_LOG3("HRSL: %02X\r\n", hrsl);
+    switch(result) {
+      case HRSL_SUCCESS:
+        xfer_result = XFER_RESULT_SUCCESS;
+        break;
+
+      case HRSL_STALL:
+        xfer_result = XFER_RESULT_STALLED;
+        break;
+
+      default:
+        xfer_result = XFER_RESULT_FAILED;
+        break;
+    }
+
+    uint8_t ep_dir = 0;
+    uint8_t ep_num = _hcd_data.hxfr & HXFR_EPNUM_MASK;
+    uint8_t const xfer_type = _hcd_data.hxfr & 0xf0;
+
+    if ( xfer_type & HXFR_SETUP ) {
+      // SETUP transfer
+      ep_dir = 0;
+    }else if ( !(xfer_type & HXFR_OUT_NIN) ) {
+      // IN transfer
+      ep_dir = 1;
+    }
+
+    uint8_t const ep_addr = tu_edpt_addr(ep_num, ep_dir);
+    uint16_t xferred_len = _hcd_data.ep[ep_num][ep_dir].total_len;
+
+    hcd_event_xfer_complete(_hcd_data.peraddr, ep_addr, xferred_len, xfer_result, true);
+  }
+
+  // clear all interrupt
+  if ( hirq ) {
+    reg_write(HIRQ_ADDR, hirq);
+  }
+}
+
 #endif

From e3f3179924f7c84c4bb3e69234720f9afc178727 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 23 Aug 2023 15:08:12 +0700
Subject: [PATCH 615/691] able to get 8 byte descriptor, but read(RCVBC) always
 return 0

- rename max3421e to max3421
- fix incorrect bitmask for HCTL, fix initial device connect
- fix bus reset cause connect IRQ
---
 hw/bsp/nrf/family.c                           |  24 +-
 hw/bsp/nrf/family.cmake                       |   2 +-
 src/host/hcd.h                                |   2 +-
 .../hcd_max3421e.c => max3421/hcd_max3421.c}  | 284 ++++++++++++------
 4 files changed, 208 insertions(+), 104 deletions(-)
 rename src/portable/analog/{max3421e/hcd_max3421e.c => max3421/hcd_max3421.c} (67%)

diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 862f67bc7..45a5166a7 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -93,7 +93,7 @@ TU_ATTR_UNUSED static void power_event_handler(nrfx_power_usb_evt_t event) {
 }
 
 //------------- Host using MAX2341E -------------//
-#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421E) && CFG_TUH_MAX3421E
+#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
 static nrfx_spim_t _spi = NRFX_SPIM_INSTANCE(0);
 
 void max3421e_int_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) {
@@ -102,19 +102,17 @@ void max3421e_int_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) {
   tuh_int_handler(1);
 }
 
-static inline void max3421e_cs_assert(bool active) {
-  nrf_gpio_pin_write(MAX3421E_CS_PIN, active ? 0 : 1);
-}
-
 //--------------------------------------------------------------------+
 // API: SPI transfer with MAX3421E, must be implemented by application
 //--------------------------------------------------------------------+
 
-bool tuh_max3421e_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_len,
-                               uint8_t * rx_buf, size_t rx_len, bool keep_cs) {
+void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
   (void) rhport;
+  nrf_gpio_pin_write(MAX3421E_CS_PIN, active ? 0 : 1);
+}
 
-  max3421e_cs_assert(true);
+bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_len, uint8_t * rx_buf, size_t rx_len) {
+  (void) rhport;
 
   nrfx_spim_xfer_desc_t xfer = {
       .p_tx_buffer = tx_buf,
@@ -123,11 +121,7 @@ bool tuh_max3421e_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx
       .rx_length   = rx_len,
   };
 
-  bool ret = (nrfx_spim_xfer(&_spi, &xfer, 0) == NRFX_SUCCESS);
-
-  if ( !keep_cs ) max3421e_cs_assert(false);
-
-  return ret;
+  return (nrfx_spim_xfer(&_spi, &xfer, 0) == NRFX_SUCCESS);
 }
 
 #endif
@@ -218,10 +212,10 @@ void board_init(void) {
   if ( usb_reg & OUTPUTRDY_Msk  ) tusb_hal_nrf_power_event(USB_EVT_READY);
 #endif
 
-#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421E) && CFG_TUH_MAX3421E
+#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
   // manually manage CS
   nrf_gpio_cfg_output(MAX3421E_CS_PIN);
-  max3421e_cs_assert(false);
+  tuh_max3421_spi_cs_api(0, false);
 
   // USB host using max3421e usb controller via SPI
   nrfx_spim_config_t cfg = {
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 8bf7bcb52..ff6b882ce 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -124,7 +124,7 @@ function(family_configure_example TARGET RTOS)
   family_add_tinyusb(${TARGET} OPT_MCU_NRF5X ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/nordic/nrf5x/dcd_nrf5x.c
-    ${TOP}/src/portable/analog/max3421e/hcd_max3421e.c
+    ${TOP}/src/portable/analog/max3421/hcd_max3421.c
     )
   target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 
diff --git a/src/host/hcd.h b/src/host/hcd.h
index 079877b79..1f01a1a2f 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -170,7 +170,7 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr);
 bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);
 
 // Submit a transfer, when complete hcd_event_xfer_complete() must be invoked
-bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen);
+bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen);
 
 // Abort a queued transfer. Note: it can only abort transfer that has not been started
 // Return true if a queued transfer is aborted, false if there is no transfer to abort
diff --git a/src/portable/analog/max3421e/hcd_max3421e.c b/src/portable/analog/max3421/hcd_max3421.c
similarity index 67%
rename from src/portable/analog/max3421e/hcd_max3421e.c
rename to src/portable/analog/max3421/hcd_max3421.c
index c9596f695..edcb6ca6f 100644
--- a/src/portable/analog/max3421e/hcd_max3421e.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -26,7 +26,7 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421E) && CFG_TUH_MAX3421E
+#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
 
 #include "host/hcd.h"
 
@@ -110,14 +110,14 @@ enum {
 };
 
 enum {
-  HCTL_BUSRST    = 1u << 1,
-  HCTL_FRMRST    = 1u << 2,
-  HCTL_SAMPLEBUS = 1u << 3,
-  HCTL_SIGRSM    = 1u << 4,
-  HCTL_RCVTOG0   = 1u << 5,
-  HCTL_RCVTOG1   = 1u << 6,
-  HCTL_SNDTOG0   = 1u << 7,
-  HCTL_SNDTOG1   = 1u << 8,
+  HCTL_BUSRST    = 1u << 0,
+  HCTL_FRMRST    = 1u << 1,
+  HCTL_SAMPLEBUS = 1u << 2,
+  HCTL_SIGRSM    = 1u << 3,
+  HCTL_RCVTOG0   = 1u << 4,
+  HCTL_RCVTOG1   = 1u << 5,
+  HCTL_SNDTOG0   = 1u << 6,
+  HCTL_SNDTOG1   = 1u << 7,
 };
 
 enum {
@@ -155,45 +155,73 @@ enum {
   HRSL_BABBLE,
 };
 
+enum {
+  DEFAULT_HIEN = HIRQ_CONDET_IRQ | HIRQ_FRAME_IRQ | HIRQ_HXFRDN_IRQ
+};
 
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
 
 typedef struct {
+  uint8_t xfer_type;
+  uint8_t data_toggle;
+  uint16_t packet_size;
+
+  uint16_t total_len;
+  uint16_t xferred_len;
+  uint8_t* buf;
+} hcd_ep_t;
+
+typedef struct {
+  bool inited;
+
   // cached register
+  uint8_t sndbc;
   uint8_t mode;
   uint8_t peraddr;
   uint8_t hxfr;
 
   volatile uint16_t frame_count;
 
-  struct {
-    uint16_t packet_size;
-    uint16_t total_len;
-    uint8_t xfer_type;
-  }ep[8][2];
-} max2341e_data_t;
+  hcd_ep_t ep[8][2];
+} max2341_data_t;
 
-static max2341e_data_t _hcd_data;
+static max2341_data_t _hcd_data;
 
 //--------------------------------------------------------------------+
 // API: SPI transfer with MAX3421E, must be implemented by application
 //--------------------------------------------------------------------+
 
-bool tuh_max3421e_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_len,
-                               uint8_t * rx_buf, size_t rx_len, bool keep_cs);
+void tuh_max3421_spi_cs_api(uint8_t rhport, bool active);
+bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_len, uint8_t * rx_buf, size_t rx_len);
+
 //void tuh_max3421e_int_enable(uint8_t rhport, bool enabled);
 
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
 
+static void fifo_write(uint8_t reg, uint8_t const * buffer, uint16_t len) {
+  reg |= CMDBYTE_WRITE;
+
+  tuh_max3421_spi_cs_api(0, true);
+
+  tuh_max3421_spi_xfer_api(0, &reg, 1, NULL, 0);
+  tuh_max3421_spi_xfer_api(0, buffer, len, NULL, 0);
+
+  tuh_max3421_spi_cs_api(0, false);
+}
+
 // return HIRQ register since we are in full-duplex mode
 static uint8_t reg_write(uint8_t reg, uint8_t data) {
   uint8_t tx_buf[2] = {reg | CMDBYTE_WRITE, data};
   uint8_t rx_buf[2] = {0, 0};
-  tuh_max3421e_spi_xfer_api(0, tx_buf, 2, rx_buf, 2, false);
+
+  tuh_max3421_spi_cs_api(0, true);
+  tuh_max3421_spi_xfer_api(0, tx_buf, 2, rx_buf, 2);
+  tuh_max3421_spi_cs_api(0, false);
+
   TU_LOG2("HIRQ: %02X\r\n", rx_buf[0]);
   return rx_buf[0];
 }
@@ -201,7 +229,12 @@ static uint8_t reg_write(uint8_t reg, uint8_t data) {
 static uint8_t reg_read(uint8_t reg) {
   uint8_t tx_buf[2] = {reg, 0};
   uint8_t rx_buf[2] = {0, 0};
-  return tuh_max3421e_spi_xfer_api(0, tx_buf, 2, rx_buf, 2, false) ? rx_buf[1] : 0;
+
+  tuh_max3421_spi_cs_api(0, true);
+  bool ret = tuh_max3421_spi_xfer_api(0, tx_buf, 2, rx_buf, 2);
+  tuh_max3421_spi_cs_api(0, false);
+
+  return ret ? rx_buf[1] : 0;
 }
 
 static inline uint8_t mode_write(uint8_t data) {
@@ -221,10 +254,9 @@ static inline uint8_t hxfr_write(uint8_t data) {
   return reg_write(HXFR_ADDR, data);
 }
 
-static void fifo_write(uint8_t reg, uint8_t const * buffer, uint16_t len) {
-  uint8_t tx_buf[1] = {reg | CMDBYTE_WRITE};
-  tuh_max3421e_spi_xfer_api(0, tx_buf, 1, NULL, 0, true);
-  tuh_max3421e_spi_xfer_api(0, buffer, len, NULL, 0, false);
+static inline uint8_t sndbc_write(uint8_t data) {
+  _hcd_data.sndbc = data;
+  return reg_write(SNDBC_ADDR, data);
 }
 
 
@@ -290,8 +322,8 @@ bool hcd_init(uint8_t rhport) {
 
   tu_memclr(&_hcd_data, sizeof(_hcd_data));
 
-  // full duplex, interrupt level (should be configurable)
-  reg_write(PINCTL_ADDR, PINCTL_FDUPSPI | PINCTL_INTLEVEL);
+  // full duplex, interrupt negative edge
+  reg_write(PINCTL_ADDR, PINCTL_FDUPSPI);
 
   // reset
   reg_write(USBCTL_ADDR, USBCTL_CHIPRES);
@@ -303,19 +335,16 @@ bool hcd_init(uint8_t rhport) {
   // Mode: Host and DP/DM pull down
   mode_write(MODE_DPPULLDN | MODE_DMPULLDN | MODE_HOST);
 
+  // bus reset, this will trigger CONDET IRQ if device is already connected
+  reg_write(HCTL_ADDR, HCTL_BUSRST);
+
+  // clear all previously pending IRQ
+  reg_write(HIRQ_ADDR, 0xff);
+
+  _hcd_data.inited = true;
+
   // Enable Connection IRQ
-  reg_write(HIEN_ADDR, HIRQ_CONDET_IRQ | HIRQ_FRAME_IRQ | HIRQ_HXFRDN_IRQ);
-
-  #if 0
-  // Note: if device is already connected, CONDET IRQ may not be triggered.
-  // We need to detect it by sampling bus signal. FIXME not working
-  reg_write(HCTL_ADDR, HCTL_SAMPLEBUS);
-  while ( reg_read(HCTL_ADDR) & HCTL_SAMPLEBUS ) {}
-
-  if ( TUSB_SPEED_INVALID != handle_connect_irq(rhport) ) {
-    reg_write(HIRQ_ADDR, HIRQ_CONDET_IRQ); // clear connect irq
-  }
-  #endif
+  reg_write(HIEN_ADDR, DEFAULT_HIEN);
 
   // Enable Interrupt pin
   reg_write(CPUCTL_ADDR, CPUCTL_IE);
@@ -353,6 +382,10 @@ bool hcd_port_connect_status(uint8_t rhport) {
 // Some port would require hcd_port_reset_end() to be invoked after 10ms to complete the reset sequence.
 void hcd_port_reset(uint8_t rhport) {
   (void) rhport;
+  // Bus reset will also trigger CONDET IRQ, disable it
+  uint8_t hien = DEFAULT_HIEN & ~HIRQ_CONDET_IRQ;
+  reg_write(HIEN_ADDR, hien);
+
   reg_write(HCTL_ADDR, HCTL_BUSRST);
 }
 
@@ -360,6 +393,10 @@ void hcd_port_reset(uint8_t rhport) {
 void hcd_port_reset_end(uint8_t rhport) {
   (void) rhport;
   reg_write(HCTL_ADDR, 0);
+
+  // Bus reset will also trigger CONDET IRQ, clear and re-enable it after reset
+  reg_write(HIRQ_ADDR, HIRQ_CONDET_IRQ);
+  reg_write(HIEN_ADDR, DEFAULT_HIEN);
 }
 
 // Get port link speed
@@ -393,14 +430,51 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
 }
 
 // Submit a transfer, when complete hcd_event_xfer_complete() must be invoked
-bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) {
+bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) {
   (void) rhport;
-  (void) dev_addr;
-  (void) ep_addr;
-  (void) buffer;
-  (void) buflen;
 
-  return false;
+  uint8_t const ep_num = tu_edpt_number(ep_addr);
+  uint8_t const ep_dir = tu_edpt_dir(ep_addr);
+
+  hcd_ep_t* ep = &_hcd_data.ep[ep_num][ep_dir];
+
+  ep->buf = buffer;
+  ep->total_len = buflen;
+  ep->xferred_len = 0;
+
+  uint8_t hirq = peraddr_write(daddr);
+
+  uint8_t hctl = 0;
+  uint8_t hxfr = ep_num;
+  if ( ep_num == 0 ) {
+    ep->data_toggle = 1;
+    if ( buffer == NULL || buflen == 0 ) {
+      // ZLP for ACK stage
+      hxfr |= HXFR_HS;
+    }
+  } else if ( ep->xfer_type == TUSB_XFER_ISOCHRONOUS ) {
+    hxfr |= HXFR_ISO;
+  }
+
+  if ( 0 == ep_dir ) {
+    // Page 12: Programming BULK-OUT Transfers
+    TU_ASSERT(hirq & HIRQ_RCVDAV_IRQ);
+
+    uint8_t const xact_len = (uint8_t) tu_min16(buflen, ep->packet_size);
+    fifo_write(SNDFIFO_ADDR, buffer, xact_len);
+    reg_write(SNDBC_ADDR, xact_len);
+
+    hctl = (ep->data_toggle ? HCTL_SNDTOG1 : HCTL_SNDTOG0);
+    hxfr |= HXFR_OUT_NIN;
+  } else {
+    // Page 13: Programming BULK-IN Transfers
+    hctl = (ep->data_toggle ? HCTL_RCVTOG1 : HCTL_RCVTOG0);
+  }
+
+  reg_write(HCTL_ADDR, hctl);
+  hxfr_write(hxfr);
+
+  return true;
 }
 
 // Abort a queued transfer. Note: it can only abort transfer that has not been started
@@ -416,10 +490,10 @@ bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
 // Submit a special transfer to send 8-byte Setup Packet, when complete hcd_event_xfer_complete() must be invoked
 bool hcd_setup_send(uint8_t rhport, uint8_t daddr, uint8_t const setup_packet[8]) {
   (void) rhport;
-  (void) daddr;
-  (void) setup_packet;
 
-  _hcd_data.ep[0][0].total_len = 8;
+  hcd_ep_t* ep = &_hcd_data.ep[0][0];
+  ep->total_len  = 8;
+  ep->xferred_len = 0;
 
   peraddr_write(daddr);
   fifo_write(SUDFIFO_ADDR, setup_packet, 8);
@@ -437,11 +511,79 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
   return false;
 }
 
+static void handle_xfer_done(uint8_t rhport) {
+  (void) rhport;
+
+  uint8_t const hrsl = reg_read(HRSL_ADDR);
+  uint8_t const result = hrsl & HRSL_RESULT_MASK;
+  uint8_t xfer_result;
+
+  TU_LOG3("HRSL: %02X\r\n", hrsl);
+  switch(result) {
+    case HRSL_SUCCESS:
+      xfer_result = XFER_RESULT_SUCCESS;
+      break;
+
+    case HRSL_STALL:
+      xfer_result = XFER_RESULT_STALLED;
+      break;
+
+    case HRSL_BAD_REQ:
+      // occurred when initialized without any pending transfer. Skip for now
+      return;
+
+    default:
+      xfer_result = XFER_RESULT_FAILED;
+      break;
+  }
+
+  uint8_t ep_dir = 0;
+  uint8_t ep_num = _hcd_data.hxfr & HXFR_EPNUM_MASK;
+  uint8_t const xfer_type = _hcd_data.hxfr & 0xf0;
+
+  hcd_ep_t * ep;
+
+  if ( (xfer_type & HXFR_SETUP) || (xfer_type & HXFR_OUT_NIN) ) {
+    // SETUP or OUT transfer
+    ep_dir = 0;
+    ep = &_hcd_data.ep[ep_num][ep_dir];
+
+    uint8_t const xact_len = (xfer_type & HXFR_SETUP) ? 8 : _hcd_data.sndbc;
+    ep->xferred_len += xact_len;
+
+    if ( xact_len < ep->packet_size || ep->xferred_len >= ep->total_len ) {
+      hcd_event_xfer_complete(_hcd_data.peraddr, ep_num, ep->xferred_len, xfer_result, true);
+    }else {
+      // more to transfer
+    }
+  } else {
+    // IN transfer
+    ep_dir = 1;
+    ep = &_hcd_data.ep[ep_num][ep_dir];
+    uint8_t const xact_len = reg_read(RCVBC_ADDR);
+    ep->xferred_len += xact_len;
+
+    // short packet or all bytes transferred
+    if ( xact_len < ep->packet_size || ep->xferred_len >= ep->total_len ) {
+      hcd_event_xfer_complete(_hcd_data.peraddr, TUSB_DIR_IN_MASK | ep_num, ep->xferred_len, xfer_result, true);
+    }else {
+      // more to transfer
+    }
+  }
+}
+
 // Interrupt Handler
 void hcd_int_handler(uint8_t rhport) {
+  // not initialized, do nothing
+  if ( !_hcd_data.inited ) return;
+
   uint8_t hirq = reg_read(HIRQ_ADDR);
   TU_LOG3_HEX(hirq);
 
+  if (hirq & HIRQ_FRAME_IRQ) {
+    _hcd_data.frame_count++;
+  }
+
   if (hirq & HIRQ_CONDET_IRQ) {
     tusb_speed_t speed = handle_connect_irq(rhport);
 
@@ -452,49 +594,17 @@ void hcd_int_handler(uint8_t rhport) {
     }
   }
 
-  if (hirq & HIRQ_FRAME_IRQ) {
-    _hcd_data.frame_count++;
-  }
-
   if (hirq & HIRQ_HXFRDN_IRQ) {
-    uint8_t const hrsl = reg_read(HRSL_ADDR);
-    uint8_t const result = hrsl & HRSL_RESULT_MASK;
-    uint8_t xfer_result;
-
-    TU_LOG3("HRSL: %02X\r\n", hrsl);
-    switch(result) {
-      case HRSL_SUCCESS:
-        xfer_result = XFER_RESULT_SUCCESS;
-        break;
-
-      case HRSL_STALL:
-        xfer_result = XFER_RESULT_STALLED;
-        break;
-
-      default:
-        xfer_result = XFER_RESULT_FAILED;
-        break;
-    }
-
-    uint8_t ep_dir = 0;
-    uint8_t ep_num = _hcd_data.hxfr & HXFR_EPNUM_MASK;
-    uint8_t const xfer_type = _hcd_data.hxfr & 0xf0;
-
-    if ( xfer_type & HXFR_SETUP ) {
-      // SETUP transfer
-      ep_dir = 0;
-    }else if ( !(xfer_type & HXFR_OUT_NIN) ) {
-      // IN transfer
-      ep_dir = 1;
-    }
-
-    uint8_t const ep_addr = tu_edpt_addr(ep_num, ep_dir);
-    uint16_t xferred_len = _hcd_data.ep[ep_num][ep_dir].total_len;
-
-    hcd_event_xfer_complete(_hcd_data.peraddr, ep_addr, xferred_len, xfer_result, true);
+    handle_xfer_done(rhport);
   }
 
-  // clear all interrupt
+  if ( hirq & HIRQ_RCVDAV_IRQ ) {
+    TU_LOG3("RCVDAV\r\n");
+    TU_LOG3_INT(reg_read(RCVBC_ADDR));
+  }
+
+  // clear all interrupt execept SNDBAV_IRQ
+  hirq &= ~HIRQ_SNDBAV_IRQ;
   if ( hirq ) {
     reg_write(HIRQ_ADDR, hirq);
   }

From 2c237b1ae4b3ffd38fc74df29da63b01348afd1d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 23 Aug 2023 17:49:28 +0700
Subject: [PATCH 616/691] able to complete 1st get device descriptor and set
 address

---
 src/portable/analog/max3421/hcd_max3421.c | 182 +++++++++++++++-------
 1 file changed, 127 insertions(+), 55 deletions(-)

diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index edcb6ca6f..467d7410a 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -156,7 +156,7 @@ enum {
 };
 
 enum {
-  DEFAULT_HIEN = HIRQ_CONDET_IRQ | HIRQ_FRAME_IRQ | HIRQ_HXFRDN_IRQ
+  DEFAULT_HIEN = HIRQ_CONDET_IRQ | HIRQ_FRAME_IRQ | HIRQ_HXFRDN_IRQ | HIRQ_RCVDAV_IRQ
 };
 
 //--------------------------------------------------------------------+
@@ -178,6 +178,8 @@ typedef struct {
 
   // cached register
   uint8_t sndbc;
+  uint8_t hirq;
+  uint8_t hien;
   uint8_t mode;
   uint8_t peraddr;
   uint8_t hxfr;
@@ -203,60 +205,86 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_
 //--------------------------------------------------------------------+
 
 static void fifo_write(uint8_t reg, uint8_t const * buffer, uint16_t len) {
+  uint8_t const rhport = 0;
+  uint8_t hirq;
   reg |= CMDBYTE_WRITE;
 
-  tuh_max3421_spi_cs_api(0, true);
+  tuh_max3421_spi_cs_api(rhport, true);
 
-  tuh_max3421_spi_xfer_api(0, &reg, 1, NULL, 0);
-  tuh_max3421_spi_xfer_api(0, buffer, len, NULL, 0);
+  tuh_max3421_spi_xfer_api(rhport, &reg, 1, &hirq, 1);
+  _hcd_data.hirq = hirq;
+  tuh_max3421_spi_xfer_api(rhport, buffer, len, NULL, 0);
+
+  tuh_max3421_spi_cs_api(rhport, false);
 
-  tuh_max3421_spi_cs_api(0, false);
 }
 
-// return HIRQ register since we are in full-duplex mode
-static uint8_t reg_write(uint8_t reg, uint8_t data) {
+static void fifo_read(uint8_t * buffer, uint16_t len) {
+  uint8_t const rhport = 0;
+  uint8_t hirq;
+  uint8_t const reg = RCVVFIFO_ADDR;
+
+  tuh_max3421_spi_cs_api(rhport, true);
+
+  tuh_max3421_spi_xfer_api(rhport, &reg, 1, &hirq, 0);
+  _hcd_data.hirq = hirq;
+  tuh_max3421_spi_xfer_api(rhport, NULL, 0, buffer, len);
+
+  tuh_max3421_spi_cs_api(rhport, false);
+}
+
+static void reg_write(uint8_t reg, uint8_t data) {
+  uint8_t const rhport = 0;
   uint8_t tx_buf[2] = {reg | CMDBYTE_WRITE, data};
   uint8_t rx_buf[2] = {0, 0};
 
-  tuh_max3421_spi_cs_api(0, true);
-  tuh_max3421_spi_xfer_api(0, tx_buf, 2, rx_buf, 2);
-  tuh_max3421_spi_cs_api(0, false);
+  tuh_max3421_spi_cs_api(rhport, true);
+  tuh_max3421_spi_xfer_api(rhport, tx_buf, 2, rx_buf, 2);
+  tuh_max3421_spi_cs_api(rhport, false);
 
-  TU_LOG2("HIRQ: %02X\r\n", rx_buf[0]);
-  return rx_buf[0];
+  // HIRQ register since we are in full-duplex mode
+  _hcd_data.hirq = rx_buf[0];
+  TU_LOG3_HEX(_hcd_data.hirq);
 }
 
 static uint8_t reg_read(uint8_t reg) {
+  uint8_t const rhport = 0;
   uint8_t tx_buf[2] = {reg, 0};
   uint8_t rx_buf[2] = {0, 0};
 
-  tuh_max3421_spi_cs_api(0, true);
-  bool ret = tuh_max3421_spi_xfer_api(0, tx_buf, 2, rx_buf, 2);
-  tuh_max3421_spi_cs_api(0, false);
+  tuh_max3421_spi_cs_api(rhport, true);
+  bool ret = tuh_max3421_spi_xfer_api(rhport, tx_buf, 2, rx_buf, 2);
+  tuh_max3421_spi_cs_api(rhport, false);
 
+  _hcd_data.hirq = rx_buf[0];
   return ret ? rx_buf[1] : 0;
 }
 
-static inline uint8_t mode_write(uint8_t data) {
-  _hcd_data.mode = data;
-  return reg_write(MODE_ADDR, data);
+static inline void hien_write(uint8_t data) {
+  _hcd_data.hien = data;
+  reg_write(HIEN_ADDR, data);
 }
 
-static inline uint8_t peraddr_write(uint8_t data) {
-  if ( _hcd_data.peraddr == data ) return 0; // no need to change address
+static inline void mode_write(uint8_t data) {
+  _hcd_data.mode = data;
+  reg_write(MODE_ADDR, data);
+}
+
+static inline void peraddr_write(uint8_t data) {
+  if ( _hcd_data.peraddr == data ) return; // no need to change address
 
   _hcd_data.peraddr = data;
-  return reg_write(PERADDR_ADDR, data);
+  reg_write(PERADDR_ADDR, data);
 }
 
-static inline uint8_t hxfr_write(uint8_t data) {
+static inline void hxfr_write(uint8_t data) {
   _hcd_data.hxfr = data;
-  return reg_write(HXFR_ADDR, data);
+  reg_write(HXFR_ADDR, data);
 }
 
-static inline uint8_t sndbc_write(uint8_t data) {
+static inline void sndbc_write(uint8_t data) {
   _hcd_data.sndbc = data;
-  return reg_write(SNDBC_ADDR, data);
+  reg_write(SNDBC_ADDR, data);
 }
 
 
@@ -335,16 +363,16 @@ bool hcd_init(uint8_t rhport) {
   // Mode: Host and DP/DM pull down
   mode_write(MODE_DPPULLDN | MODE_DMPULLDN | MODE_HOST);
 
-  // bus reset, this will trigger CONDET IRQ if device is already connected
-  reg_write(HCTL_ADDR, HCTL_BUSRST);
+  // frame reset & bus reset, this will trigger CONDET IRQ if device is already connected
+  reg_write(HCTL_ADDR, HCTL_BUSRST | HCTL_FRMRST);
 
   // clear all previously pending IRQ
   reg_write(HIRQ_ADDR, 0xff);
 
   _hcd_data.inited = true;
 
-  // Enable Connection IRQ
-  reg_write(HIEN_ADDR, DEFAULT_HIEN);
+  // Enable IRQ
+  hien_write(DEFAULT_HIEN);
 
   // Enable Interrupt pin
   reg_write(CPUCTL_ADDR, CPUCTL_IE);
@@ -383,8 +411,8 @@ bool hcd_port_connect_status(uint8_t rhport) {
 void hcd_port_reset(uint8_t rhport) {
   (void) rhport;
   // Bus reset will also trigger CONDET IRQ, disable it
-  uint8_t hien = DEFAULT_HIEN & ~HIRQ_CONDET_IRQ;
-  reg_write(HIEN_ADDR, hien);
+  uint8_t const hien = DEFAULT_HIEN & ~HIRQ_CONDET_IRQ;
+  hien_write(hien);
 
   reg_write(HCTL_ADDR, HCTL_BUSRST);
 }
@@ -396,7 +424,7 @@ void hcd_port_reset_end(uint8_t rhport) {
 
   // Bus reset will also trigger CONDET IRQ, clear and re-enable it after reset
   reg_write(HIRQ_ADDR, HIRQ_CONDET_IRQ);
-  reg_write(HIEN_ADDR, DEFAULT_HIEN);
+  hien_write(DEFAULT_HIEN);
 }
 
 // Get port link speed
@@ -426,6 +454,10 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
 
   _hcd_data.ep[ep_num][ep_dir].packet_size = tu_edpt_packet_size(ep_desc);
 
+  if (ep_desc->bEndpointAddress == 0) {
+    _hcd_data.ep[ep_num][1].packet_size = tu_edpt_packet_size(ep_desc);
+  }
+
   return true;
 }
 
@@ -442,15 +474,18 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
   ep->total_len = buflen;
   ep->xferred_len = 0;
 
-  uint8_t hirq = peraddr_write(daddr);
+  peraddr_write(daddr);
 
   uint8_t hctl = 0;
   uint8_t hxfr = ep_num;
   if ( ep_num == 0 ) {
     ep->data_toggle = 1;
     if ( buffer == NULL || buflen == 0 ) {
-      // ZLP for ACK stage
+      // ZLP for ACK stage, use HS
       hxfr |= HXFR_HS;
+      hxfr |= (ep_dir ? 0 : HXFR_OUT_NIN);
+      hxfr_write(hxfr);
+      return true;
     }
   } else if ( ep->xfer_type == TUSB_XFER_ISOCHRONOUS ) {
     hxfr |= HXFR_ISO;
@@ -458,7 +493,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
 
   if ( 0 == ep_dir ) {
     // Page 12: Programming BULK-OUT Transfers
-    TU_ASSERT(hirq & HIRQ_RCVDAV_IRQ);
+    TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ);
 
     uint8_t const xact_len = (uint8_t) tu_min16(buflen, ep->packet_size);
     fifo_write(SNDFIFO_ADDR, buffer, xact_len);
@@ -516,7 +551,7 @@ static void handle_xfer_done(uint8_t rhport) {
 
   uint8_t const hrsl = reg_read(HRSL_ADDR);
   uint8_t const result = hrsl & HRSL_RESULT_MASK;
-  uint8_t xfer_result;
+  xfer_result_t xfer_result;
 
   TU_LOG3("HRSL: %02X\r\n", hrsl);
   switch(result) {
@@ -537,18 +572,21 @@ static void handle_xfer_done(uint8_t rhport) {
       break;
   }
 
-  uint8_t ep_dir = 0;
   uint8_t ep_num = _hcd_data.hxfr & HXFR_EPNUM_MASK;
   uint8_t const xfer_type = _hcd_data.hxfr & 0xf0;
 
-  hcd_ep_t * ep;
-
   if ( (xfer_type & HXFR_SETUP) || (xfer_type & HXFR_OUT_NIN) ) {
     // SETUP or OUT transfer
-    ep_dir = 0;
-    ep = &_hcd_data.ep[ep_num][ep_dir];
+    hcd_ep_t *ep = &_hcd_data.ep[ep_num][0];
+    uint8_t xact_len;
+    if (xfer_type & HXFR_SETUP) {
+      xact_len = 8;
+    } else if ( xfer_type & HXFR_HS ) {
+      xact_len = 0;
+    } else {
+      xact_len = _hcd_data.sndbc;
+    }
 
-    uint8_t const xact_len = (xfer_type & HXFR_SETUP) ? 8 : _hcd_data.sndbc;
     ep->xferred_len += xact_len;
 
     if ( xact_len < ep->packet_size || ep->xferred_len >= ep->total_len ) {
@@ -558,10 +596,27 @@ static void handle_xfer_done(uint8_t rhport) {
     }
   } else {
     // IN transfer
-    ep_dir = 1;
-    ep = &_hcd_data.ep[ep_num][ep_dir];
-    uint8_t const xact_len = reg_read(RCVBC_ADDR);
-    ep->xferred_len += xact_len;
+    hcd_ep_t *ep = &_hcd_data.ep[ep_num][1];
+    uint8_t xact_len;
+
+    if ( xfer_type & HXFR_HS ) {
+      xact_len = 0;
+    } else {
+      // RCVDAV_IRQ can trigger 2 times (dual buffered)
+      while ( _hcd_data.hirq & HIRQ_RCVDAV_IRQ ) {
+        uint8_t rcvbc = reg_read(RCVBC_ADDR);
+        xact_len = (uint8_t) tu_min16(rcvbc, ep->total_len - ep->xferred_len);
+        if ( xact_len ) {
+          fifo_read(ep->buf, xact_len);
+          ep->buf += xact_len;
+          ep->xferred_len += xact_len;
+        }
+
+        // ack RCVDVAV IRQ
+        reg_write(HIRQ_ADDR, HIRQ_RCVDAV_IRQ);
+        _hcd_data.hirq = reg_read(HIRQ_ADDR);
+      }
+    }
 
     // short packet or all bytes transferred
     if ( xact_len < ep->packet_size || ep->xferred_len >= ep->total_len ) {
@@ -572,13 +627,35 @@ static void handle_xfer_done(uint8_t rhport) {
   }
 }
 
+#if CFG_TUSB_DEBUG >= 3
+void print_hirq(uint8_t hirq) {
+  TU_LOG3_HEX(hirq);
+
+  if (hirq & HIRQ_HXFRDN_IRQ) TU_LOG3(" HXFRDN");
+  if (hirq & HIRQ_FRAME_IRQ)  TU_LOG3(" FRAME");
+  if (hirq & HIRQ_CONDET_IRQ) TU_LOG3(" CONDET");
+  if (hirq & HIRQ_SUSDN_IRQ)  TU_LOG3(" SUSDN");
+  if (hirq & HIRQ_SNDBAV_IRQ) TU_LOG3(" SNDBAV");
+  if (hirq & HIRQ_RCVDAV_IRQ) TU_LOG3(" RCVDAV");
+  if (hirq & HIRQ_RWU_IRQ)    TU_LOG3(" RWU");
+  if (hirq & HIRQ_BUSEVENT_IRQ) TU_LOG3(" BUSEVENT");
+
+  TU_LOG3("\r\n");
+}
+
+#else
+  #define print_hirq(hirq)
+#endif
+
 // Interrupt Handler
 void hcd_int_handler(uint8_t rhport) {
   // not initialized, do nothing
   if ( !_hcd_data.inited ) return;
 
-  uint8_t hirq = reg_read(HIRQ_ADDR);
-  TU_LOG3_HEX(hirq);
+  uint8_t hirq = reg_read(HIRQ_ADDR) & _hcd_data.hien;
+  if (!hirq) return;
+
+  print_hirq(hirq);
 
   if (hirq & HIRQ_FRAME_IRQ) {
     _hcd_data.frame_count++;
@@ -598,13 +675,8 @@ void hcd_int_handler(uint8_t rhport) {
     handle_xfer_done(rhport);
   }
 
-  if ( hirq & HIRQ_RCVDAV_IRQ ) {
-    TU_LOG3("RCVDAV\r\n");
-    TU_LOG3_INT(reg_read(RCVBC_ADDR));
-  }
-
-  // clear all interrupt execept SNDBAV_IRQ
-  hirq &= ~HIRQ_SNDBAV_IRQ;
+  // clear all interrupt except SNDBAV_IRQ and RCVDAV_IRQ must be clear after pulling data from FIFO
+  hirq &= ~ (HIRQ_SNDBAV_IRQ | HIRQ_RCVDAV_IRQ);
   if ( hirq ) {
     reg_write(HIRQ_ADDR, hirq);
   }

From 3ed5d6c3724cfa9699d403a76a00f1b04672e2b5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 24 Aug 2023 16:27:12 +0700
Subject: [PATCH 617/691] complete enumeration

---
 hw/bsp/nrf/family.c                       |  5 +-
 src/portable/analog/max3421/hcd_max3421.c | 68 ++++++++++++++---------
 2 files changed, 47 insertions(+), 26 deletions(-)

diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 45a5166a7..368763b84 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -105,6 +105,10 @@ void max3421e_int_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) {
 //--------------------------------------------------------------------+
 // API: SPI transfer with MAX3421E, must be implemented by application
 //--------------------------------------------------------------------+
+void tuh_max3421e_int_api(uint8_t rhport, bool enabled) {
+  (void) rhport;
+  nrfx_gpiote_trigger_enable(MAX3241E_INTR_PIN, enabled);
+}
 
 void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
   (void) rhport;
@@ -241,7 +245,6 @@ void board_init(void) {
   in_config.pull = NRF_GPIO_PIN_PULLUP;
 
   nrfx_gpiote_in_init(MAX3241E_INTR_PIN, &in_config, max3421e_int_handler);
-  nrfx_gpiote_in_event_enable(MAX3241E_INTR_PIN, true);
 #endif
 
 }
diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index 467d7410a..514cf34b7 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -166,6 +166,7 @@ enum {
 typedef struct {
   uint8_t xfer_type;
   uint8_t data_toggle;
+  uint8_t xfer_complete;
   uint16_t packet_size;
 
   uint16_t total_len;
@@ -244,7 +245,6 @@ static void reg_write(uint8_t reg, uint8_t data) {
 
   // HIRQ register since we are in full-duplex mode
   _hcd_data.hirq = rx_buf[0];
-  TU_LOG3_HEX(_hcd_data.hirq);
 }
 
 static uint8_t reg_read(uint8_t reg) {
@@ -473,6 +473,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
   ep->buf = buffer;
   ep->total_len = buflen;
   ep->xferred_len = 0;
+  ep->xfer_complete = 0;
 
   peraddr_write(daddr);
 
@@ -595,34 +596,19 @@ static void handle_xfer_done(uint8_t rhport) {
       // more to transfer
     }
   } else {
-    // IN transfer
+    // IN transfer: fifo data is already received in RCVDAV IRQ
     hcd_ep_t *ep = &_hcd_data.ep[ep_num][1];
-    uint8_t xact_len;
 
     if ( xfer_type & HXFR_HS ) {
-      xact_len = 0;
-    } else {
-      // RCVDAV_IRQ can trigger 2 times (dual buffered)
-      while ( _hcd_data.hirq & HIRQ_RCVDAV_IRQ ) {
-        uint8_t rcvbc = reg_read(RCVBC_ADDR);
-        xact_len = (uint8_t) tu_min16(rcvbc, ep->total_len - ep->xferred_len);
-        if ( xact_len ) {
-          fifo_read(ep->buf, xact_len);
-          ep->buf += xact_len;
-          ep->xferred_len += xact_len;
-        }
-
-        // ack RCVDVAV IRQ
-        reg_write(HIRQ_ADDR, HIRQ_RCVDAV_IRQ);
-        _hcd_data.hirq = reg_read(HIRQ_ADDR);
-      }
+      ep->xfer_complete = 1;
     }
 
     // short packet or all bytes transferred
-    if ( xact_len < ep->packet_size || ep->xferred_len >= ep->total_len ) {
+    if ( ep->xfer_complete ) {
       hcd_event_xfer_complete(_hcd_data.peraddr, TUSB_DIR_IN_MASK | ep_num, ep->xferred_len, xfer_result, true);
     }else {
       // more to transfer
+      hxfr_write(_hcd_data.hxfr);
     }
   }
 }
@@ -655,7 +641,7 @@ void hcd_int_handler(uint8_t rhport) {
   uint8_t hirq = reg_read(HIRQ_ADDR) & _hcd_data.hien;
   if (!hirq) return;
 
-  print_hirq(hirq);
+//  print_hirq(hirq);
 
   if (hirq & HIRQ_FRAME_IRQ) {
     _hcd_data.frame_count++;
@@ -671,12 +657,44 @@ void hcd_int_handler(uint8_t rhport) {
     }
   }
 
-  if (hirq & HIRQ_HXFRDN_IRQ) {
-    handle_xfer_done(rhport);
+  // queue more transfer in handle_xfer_done() can cause hirq to be set again while external IRQ may not catch and/or
+  // not call this handler again. So we need to loop until all IRQ are cleared
+  while ( hirq & (HIRQ_RCVDAV_IRQ | HIRQ_HXFRDN_IRQ) ) {
+    if ( hirq & HIRQ_RCVDAV_IRQ ) {
+      uint8_t ep_num = _hcd_data.hxfr & HXFR_EPNUM_MASK;
+      hcd_ep_t *ep = &_hcd_data.ep[ep_num][1];
+      uint8_t xact_len;
+
+      // RCVDAV_IRQ can trigger 2 times (dual buffered)
+      while ( hirq & HIRQ_RCVDAV_IRQ ) {
+        uint8_t rcvbc = reg_read(RCVBC_ADDR);
+        xact_len = (uint8_t) tu_min16(rcvbc, ep->total_len - ep->xferred_len);
+        if ( xact_len ) {
+          fifo_read(ep->buf, xact_len);
+          ep->buf += xact_len;
+          ep->xferred_len += xact_len;
+        }
+
+        // ack RCVDVAV IRQ
+        reg_write(HIRQ_ADDR, HIRQ_RCVDAV_IRQ);
+        hirq = reg_read(HIRQ_ADDR);
+      }
+
+      if ( xact_len < ep->packet_size || ep->xferred_len >= ep->total_len ) {
+        ep->xfer_complete = 1;
+      }
+    }
+
+    if ( hirq & HIRQ_HXFRDN_IRQ ) {
+      reg_write(HIRQ_ADDR, HIRQ_HXFRDN_IRQ);
+      handle_xfer_done(rhport);
+    }
+
+    hirq = reg_read(HIRQ_ADDR);
   }
 
-  // clear all interrupt except SNDBAV_IRQ and RCVDAV_IRQ must be clear after pulling data from FIFO
-  hirq &= ~ (HIRQ_SNDBAV_IRQ | HIRQ_RCVDAV_IRQ);
+  // clear all interrupt except SNDBAV_IRQ (never clear by us). Note RCVDAV_IRQ, HXFRDN_IRQ already clear while processing
+  hirq &= ~HIRQ_SNDBAV_IRQ;
   if ( hirq ) {
     reg_write(HIRQ_ADDR, hirq);
   }

From 344932d27e1f65932ce922b639370ecc4fff2153 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 24 Aug 2023 16:27:32 +0700
Subject: [PATCH 618/691] add tuh_max3421e_int_api(), retry control if received
 NAK

---
 src/portable/analog/max3421/hcd_max3421.c | 60 +++++++++++++++--------
 1 file changed, 40 insertions(+), 20 deletions(-)

diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index 514cf34b7..b4f75e392 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -28,6 +28,7 @@
 
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
 
+#include <stdatomic.h>
 #include "host/hcd.h"
 
 //--------------------------------------------------------------------+
@@ -164,11 +165,15 @@ enum {
 //--------------------------------------------------------------------+
 
 typedef struct {
-  uint8_t xfer_type;
-  uint8_t data_toggle;
-  uint8_t xfer_complete;
   uint16_t packet_size;
 
+  struct TU_ATTR_PACKED {
+    uint8_t is_iso        : 1;
+    uint8_t data_toggle   : 1;
+    uint8_t xfer_queued   : 1;
+    uint8_t xfer_complete : 1;
+  };
+
   uint16_t total_len;
   uint16_t xferred_len;
   uint8_t* buf;
@@ -176,6 +181,7 @@ typedef struct {
 
 typedef struct {
   bool inited;
+  atomic_bool busy; // busy transferring
 
   // cached register
   uint8_t sndbc;
@@ -198,8 +204,7 @@ static max2341_data_t _hcd_data;
 
 void tuh_max3421_spi_cs_api(uint8_t rhport, bool active);
 bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_len, uint8_t * rx_buf, size_t rx_len);
-
-//void tuh_max3421e_int_enable(uint8_t rhport, bool enabled);
+void tuh_max3421e_int_api(uint8_t rhport, bool enabled);
 
 //--------------------------------------------------------------------+
 //
@@ -348,6 +353,9 @@ tusb_speed_t handle_connect_irq(uint8_t rhport) {
 bool hcd_init(uint8_t rhport) {
   (void) rhport;
 
+  TU_LOG2_INT(sizeof(hcd_ep_t));
+  TU_LOG2_INT(sizeof(max2341_data_t));
+
   tu_memclr(&_hcd_data, sizeof(_hcd_data));
 
   // full duplex, interrupt negative edge
@@ -382,12 +390,12 @@ bool hcd_init(uint8_t rhport) {
 
 // Enable USB interrupt
 void hcd_int_enable (uint8_t rhport) {
-  (void) rhport;
+  tuh_max3421e_int_api(rhport, true);
 }
 
 // Disable USB interrupt
 void hcd_int_disable(uint8_t rhport) {
-  (void) rhport;
+  tuh_max3421e_int_api(rhport, false);
 }
 
 // Get frame number (1ms)
@@ -447,17 +455,20 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr) {
 bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) {
   (void) rhport;
   (void) dev_addr;
-  (void) ep_desc;
 
   uint8_t ep_num = tu_edpt_number(ep_desc->bEndpointAddress);
   uint8_t ep_dir = tu_edpt_dir(ep_desc->bEndpointAddress);
 
-  _hcd_data.ep[ep_num][ep_dir].packet_size = tu_edpt_packet_size(ep_desc);
+  hcd_ep_t * ep = &_hcd_data.ep[ep_num][ep_dir];
+
+  ep->packet_size = tu_edpt_packet_size(ep_desc);
 
   if (ep_desc->bEndpointAddress == 0) {
-    _hcd_data.ep[ep_num][1].packet_size = tu_edpt_packet_size(ep_desc);
+    _hcd_data.ep[0][1].packet_size = ep->packet_size;
   }
 
+  ep->is_iso = (TUSB_XFER_ISOCHRONOUS == ep_desc->bmAttributes.xfer) ? 1 : 0;
+
   return true;
 }
 
@@ -474,11 +485,13 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
   ep->total_len = buflen;
   ep->xferred_len = 0;
   ep->xfer_complete = 0;
+  ep->xfer_queued = 1;
 
   peraddr_write(daddr);
 
   uint8_t hctl = 0;
   uint8_t hxfr = ep_num;
+
   if ( ep_num == 0 ) {
     ep->data_toggle = 1;
     if ( buffer == NULL || buflen == 0 ) {
@@ -488,7 +501,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
       hxfr_write(hxfr);
       return true;
     }
-  } else if ( ep->xfer_type == TUSB_XFER_ISOCHRONOUS ) {
+  } else if ( ep->is_iso ) {
     hxfr |= HXFR_ISO;
   }
 
@@ -551,11 +564,13 @@ static void handle_xfer_done(uint8_t rhport) {
   (void) rhport;
 
   uint8_t const hrsl = reg_read(HRSL_ADDR);
-  uint8_t const result = hrsl & HRSL_RESULT_MASK;
+  uint8_t const hresult = hrsl & HRSL_RESULT_MASK;
+  uint8_t ep_num = _hcd_data.hxfr & HXFR_EPNUM_MASK;
+
   xfer_result_t xfer_result;
 
-  TU_LOG3("HRSL: %02X\r\n", hrsl);
-  switch(result) {
+  //TU_LOG3("HRSL: %02X\r\n", hrsl);
+  switch(hresult) {
     case HRSL_SUCCESS:
       xfer_result = XFER_RESULT_SUCCESS;
       break;
@@ -568,21 +583,26 @@ static void handle_xfer_done(uint8_t rhport) {
       // occurred when initialized without any pending transfer. Skip for now
       return;
 
+    case HRSL_NAK:
+      // NAK on control, retry immediately
+      if (ep_num == 0) hxfr_write(_hcd_data.hxfr);
+      return;
+
     default:
       xfer_result = XFER_RESULT_FAILED;
       break;
   }
 
-  uint8_t ep_num = _hcd_data.hxfr & HXFR_EPNUM_MASK;
-  uint8_t const xfer_type = _hcd_data.hxfr & 0xf0;
+  uint8_t const hxfr_type = _hcd_data.hxfr & 0xf0;
 
-  if ( (xfer_type & HXFR_SETUP) || (xfer_type & HXFR_OUT_NIN) ) {
+  if ( (hxfr_type & HXFR_SETUP) || (hxfr_type & HXFR_OUT_NIN) ) {
     // SETUP or OUT transfer
     hcd_ep_t *ep = &_hcd_data.ep[ep_num][0];
     uint8_t xact_len;
-    if (xfer_type & HXFR_SETUP) {
+
+    if ( hxfr_type & HXFR_SETUP) {
       xact_len = 8;
-    } else if ( xfer_type & HXFR_HS ) {
+    } else if ( hxfr_type & HXFR_HS ) {
       xact_len = 0;
     } else {
       xact_len = _hcd_data.sndbc;
@@ -599,7 +619,7 @@ static void handle_xfer_done(uint8_t rhport) {
     // IN transfer: fifo data is already received in RCVDAV IRQ
     hcd_ep_t *ep = &_hcd_data.ep[ep_num][1];
 
-    if ( xfer_type & HXFR_HS ) {
+    if ( hxfr_type & HXFR_HS ) {
       ep->xfer_complete = 1;
     }
 

From e6cf125e537125fc7303afc7d0703a3de6b8b334 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 24 Aug 2023 16:46:20 +0700
Subject: [PATCH 619/691] save data toggle, always retry NAK. work with msc
 device

---
 src/portable/analog/max3421/hcd_max3421.c | 24 ++++++++++++++++++-----
 1 file changed, 19 insertions(+), 5 deletions(-)

diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index b4f75e392..9579409c5 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -492,7 +492,9 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
   uint8_t hctl = 0;
   uint8_t hxfr = ep_num;
 
-  if ( ep_num == 0 ) {
+  if ( ep->is_iso ) {
+    hxfr |= HXFR_ISO;
+  } else if ( ep_num == 0 ) {
     ep->data_toggle = 1;
     if ( buffer == NULL || buflen == 0 ) {
       // ZLP for ACK stage, use HS
@@ -501,8 +503,6 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
       hxfr_write(hxfr);
       return true;
     }
-  } else if ( ep->is_iso ) {
-    hxfr |= HXFR_ISO;
   }
 
   if ( 0 == ep_dir ) {
@@ -511,7 +511,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
 
     uint8_t const xact_len = (uint8_t) tu_min16(buflen, ep->packet_size);
     fifo_write(SNDFIFO_ADDR, buffer, xact_len);
-    reg_write(SNDBC_ADDR, xact_len);
+    sndbc_write(xact_len);
 
     hctl = (ep->data_toggle ? HCTL_SNDTOG1 : HCTL_SNDTOG0);
     hxfr |= HXFR_OUT_NIN;
@@ -585,7 +585,10 @@ static void handle_xfer_done(uint8_t rhport) {
 
     case HRSL_NAK:
       // NAK on control, retry immediately
-      if (ep_num == 0) hxfr_write(_hcd_data.hxfr);
+      //if (ep_num == 0)
+      {
+        hxfr_write(_hcd_data.hxfr);
+      }
       return;
 
     default:
@@ -609,8 +612,14 @@ static void handle_xfer_done(uint8_t rhport) {
     }
 
     ep->xferred_len += xact_len;
+    ep->buf += xact_len;
 
     if ( xact_len < ep->packet_size || ep->xferred_len >= ep->total_len ) {
+      if ( ep_num ) {
+        // save data toggle for non-control
+        ep->data_toggle = (hrsl & HRSL_SNDTOGRD) ? 1 : 0;
+      }
+
       hcd_event_xfer_complete(_hcd_data.peraddr, ep_num, ep->xferred_len, xfer_result, true);
     }else {
       // more to transfer
@@ -625,6 +634,11 @@ static void handle_xfer_done(uint8_t rhport) {
 
     // short packet or all bytes transferred
     if ( ep->xfer_complete ) {
+      if ( ep_num ) {
+        // save data toggle for non-control
+        ep->data_toggle = (hrsl & HRSL_RCVTOGRD) ? 1 : 0;
+      }
+
       hcd_event_xfer_complete(_hcd_data.peraddr, TUSB_DIR_IN_MASK | ep_num, ep->xferred_len, xfer_result, true);
     }else {
       // more to transfer

From f5ebc1700f4bde1cc166bf5f3d8eb69d8832722a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 25 Aug 2023 12:12:44 +0700
Subject: [PATCH 620/691] add spi lock with interrupt enable/disable

---
 src/portable/analog/max3421/hcd_max3421.c | 176 +++++++++++-----------
 1 file changed, 91 insertions(+), 85 deletions(-)

diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index 9579409c5..0144deca6 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -180,7 +180,6 @@ typedef struct {
 } hcd_ep_t;
 
 typedef struct {
-  bool inited;
   atomic_bool busy; // busy transferring
 
   // cached register
@@ -194,6 +193,8 @@ typedef struct {
   volatile uint16_t frame_count;
 
   hcd_ep_t ep[8][2];
+
+  OSAL_MUTEX_DEF(spi_mutex);
 } max2341_data_t;
 
 static max2341_data_t _hcd_data;
@@ -210,86 +211,106 @@ void tuh_max3421e_int_api(uint8_t rhport, bool enabled);
 //
 //--------------------------------------------------------------------+
 
-static void fifo_write(uint8_t reg, uint8_t const * buffer, uint16_t len) {
-  uint8_t const rhport = 0;
+static void max3421_spi_lock(uint8_t rhport, bool in_isr) {
+  // disable interrupt and mutex lock (for pre-emptive RTOS) if not in_isr
+  if (!in_isr) {
+    tuh_max3421e_int_api(rhport, false);
+  }
+
+  // assert CS
+  tuh_max3421_spi_cs_api(rhport, true);
+}
+
+static void max3421_spi_unlock(uint8_t rhport, bool in_isr) {
+  // de-assert CS
+  tuh_max3421_spi_cs_api(rhport, false);
+
+  // mutex unlock and re-enable interrupt
+  if (!in_isr) {
+    tuh_max3421e_int_api(rhport, true);
+  }
+}
+
+static void fifo_write(uint8_t rhport, uint8_t reg, uint8_t const * buffer, uint16_t len, bool in_isr) {
   uint8_t hirq;
   reg |= CMDBYTE_WRITE;
 
-  tuh_max3421_spi_cs_api(rhport, true);
+  max3421_spi_lock(rhport, in_isr);
 
   tuh_max3421_spi_xfer_api(rhport, &reg, 1, &hirq, 1);
   _hcd_data.hirq = hirq;
   tuh_max3421_spi_xfer_api(rhport, buffer, len, NULL, 0);
 
-  tuh_max3421_spi_cs_api(rhport, false);
+  max3421_spi_unlock(rhport, in_isr);
 
 }
 
-static void fifo_read(uint8_t * buffer, uint16_t len) {
-  uint8_t const rhport = 0;
+static void fifo_read(uint8_t rhport, uint8_t * buffer, uint16_t len, bool in_isr) {
   uint8_t hirq;
   uint8_t const reg = RCVVFIFO_ADDR;
 
-  tuh_max3421_spi_cs_api(rhport, true);
+  max3421_spi_lock(rhport, in_isr);
 
   tuh_max3421_spi_xfer_api(rhport, &reg, 1, &hirq, 0);
   _hcd_data.hirq = hirq;
   tuh_max3421_spi_xfer_api(rhport, NULL, 0, buffer, len);
 
-  tuh_max3421_spi_cs_api(rhport, false);
+  max3421_spi_unlock(rhport, in_isr);
 }
 
-static void reg_write(uint8_t reg, uint8_t data) {
-  uint8_t const rhport = 0;
+static void reg_write(uint8_t rhport, uint8_t reg, uint8_t data, bool in_isr) {
   uint8_t tx_buf[2] = {reg | CMDBYTE_WRITE, data};
   uint8_t rx_buf[2] = {0, 0};
 
-  tuh_max3421_spi_cs_api(rhport, true);
+  max3421_spi_lock(rhport, in_isr);
+
   tuh_max3421_spi_xfer_api(rhport, tx_buf, 2, rx_buf, 2);
-  tuh_max3421_spi_cs_api(rhport, false);
+
+  max3421_spi_unlock(rhport, in_isr);
 
   // HIRQ register since we are in full-duplex mode
   _hcd_data.hirq = rx_buf[0];
 }
 
-static uint8_t reg_read(uint8_t reg) {
-  uint8_t const rhport = 0;
+static uint8_t reg_read(uint8_t rhport, uint8_t reg, bool in_isr) {
   uint8_t tx_buf[2] = {reg, 0};
   uint8_t rx_buf[2] = {0, 0};
 
-  tuh_max3421_spi_cs_api(rhport, true);
+  max3421_spi_lock(rhport, in_isr);
+
   bool ret = tuh_max3421_spi_xfer_api(rhport, tx_buf, 2, rx_buf, 2);
-  tuh_max3421_spi_cs_api(rhport, false);
+
+  max3421_spi_unlock(rhport, in_isr);
 
   _hcd_data.hirq = rx_buf[0];
   return ret ? rx_buf[1] : 0;
 }
 
-static inline void hien_write(uint8_t data) {
+static inline void hien_write(uint8_t rhport, uint8_t data, bool in_isr) {
   _hcd_data.hien = data;
-  reg_write(HIEN_ADDR, data);
+  reg_write(rhport, HIEN_ADDR, data, in_isr);
 }
 
-static inline void mode_write(uint8_t data) {
+static inline void mode_write(uint8_t rhport, uint8_t data, bool in_isr) {
   _hcd_data.mode = data;
-  reg_write(MODE_ADDR, data);
+  reg_write(rhport, MODE_ADDR, data, in_isr);
 }
 
-static inline void peraddr_write(uint8_t data) {
+static inline void peraddr_write(uint8_t rhport, uint8_t data, bool in_isr) {
   if ( _hcd_data.peraddr == data ) return; // no need to change address
 
   _hcd_data.peraddr = data;
-  reg_write(PERADDR_ADDR, data);
+  reg_write(rhport, PERADDR_ADDR, data, in_isr);
 }
 
-static inline void hxfr_write(uint8_t data) {
+static inline void hxfr_write(uint8_t rhport, uint8_t data, bool in_isr) {
   _hcd_data.hxfr = data;
-  reg_write(HXFR_ADDR, data);
+  reg_write(rhport, HXFR_ADDR, data, in_isr);
 }
 
-static inline void sndbc_write(uint8_t data) {
+static inline void sndbc_write(uint8_t rhport, uint8_t data, bool in_isr) {
   _hcd_data.sndbc = data;
-  reg_write(SNDBC_ADDR, data);
+  reg_write(rhport, SNDBC_ADDR, data, in_isr);
 }
 
 
@@ -307,9 +328,7 @@ bool hcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) {
 }
 
 tusb_speed_t handle_connect_irq(uint8_t rhport) {
-  (void) rhport;
-
-  uint8_t const hrsl = reg_read(HRSL_ADDR);
+  uint8_t const hrsl = reg_read(rhport, HRSL_ADDR, true);
   uint8_t const jk = hrsl & (HRSL_JSTATUS | HRSL_KSTATUS);
 
   tusb_speed_t speed;
@@ -328,7 +347,7 @@ tusb_speed_t handle_connect_irq(uint8_t rhport) {
 
     default: {
       // Low speed if (LS = 1 and J-state) or (LS = 0 and K-State)
-      uint8_t const mode = reg_read(MODE_ADDR);
+      uint8_t const mode = reg_read(rhport, MODE_ADDR, true);
       uint8_t const ls_bit = mode & MODE_LOWSPEED;
 
       if ( (ls_bit && (jk == HRSL_JSTATUS)) || (!ls_bit && (jk == HRSL_KSTATUS)) ) {
@@ -344,7 +363,7 @@ tusb_speed_t handle_connect_irq(uint8_t rhport) {
     }
   }
 
-  mode_write(new_mode);
+  mode_write(rhport, new_mode, true);
   TU_LOG2_INT(speed);
   return speed;
 }
@@ -358,32 +377,32 @@ bool hcd_init(uint8_t rhport) {
 
   tu_memclr(&_hcd_data, sizeof(_hcd_data));
 
+  hcd_int_disable(rhport);
+
   // full duplex, interrupt negative edge
-  reg_write(PINCTL_ADDR, PINCTL_FDUPSPI);
+  reg_write(rhport, PINCTL_ADDR, PINCTL_FDUPSPI, false);
 
   // reset
-  reg_write(USBCTL_ADDR, USBCTL_CHIPRES);
-  reg_write(USBCTL_ADDR, 0);
-  while( !(reg_read(USBIRQ_ADDR) & USBIRQ_OSCOK_IRQ) ) {
+  reg_write(rhport, USBCTL_ADDR, USBCTL_CHIPRES, false);
+  reg_write(rhport, USBCTL_ADDR, 0, false);
+  while( !(reg_read(rhport, USBIRQ_ADDR, false) & USBIRQ_OSCOK_IRQ) ) {
     // wait for oscillator to stabilize
   }
 
   // Mode: Host and DP/DM pull down
-  mode_write(MODE_DPPULLDN | MODE_DMPULLDN | MODE_HOST);
+  mode_write(rhport, MODE_DPPULLDN | MODE_DMPULLDN | MODE_HOST, false);
 
   // frame reset & bus reset, this will trigger CONDET IRQ if device is already connected
-  reg_write(HCTL_ADDR, HCTL_BUSRST | HCTL_FRMRST);
+  reg_write(rhport, HCTL_ADDR, HCTL_BUSRST | HCTL_FRMRST, false);
 
   // clear all previously pending IRQ
-  reg_write(HIRQ_ADDR, 0xff);
-
-  _hcd_data.inited = true;
+  reg_write(rhport, HIRQ_ADDR, 0xff, false);
 
   // Enable IRQ
-  hien_write(DEFAULT_HIEN);
+  hien_write(rhport, DEFAULT_HIEN, false);
 
   // Enable Interrupt pin
-  reg_write(CPUCTL_ADDR, CPUCTL_IE);
+  reg_write(rhport, CPUCTL_ADDR, CPUCTL_IE, false);
 
   return true;
 }
@@ -417,22 +436,20 @@ bool hcd_port_connect_status(uint8_t rhport) {
 // Reset USB bus on the port. Return immediately, bus reset sequence may not be complete.
 // Some port would require hcd_port_reset_end() to be invoked after 10ms to complete the reset sequence.
 void hcd_port_reset(uint8_t rhport) {
-  (void) rhport;
   // Bus reset will also trigger CONDET IRQ, disable it
   uint8_t const hien = DEFAULT_HIEN & ~HIRQ_CONDET_IRQ;
-  hien_write(hien);
+  hien_write(rhport, hien, false);
 
-  reg_write(HCTL_ADDR, HCTL_BUSRST);
+  reg_write(rhport, HCTL_ADDR, HCTL_BUSRST, false);
 }
 
 // Complete bus reset sequence, may be required by some controllers
 void hcd_port_reset_end(uint8_t rhport) {
-  (void) rhport;
-  reg_write(HCTL_ADDR, 0);
+  reg_write(rhport, HCTL_ADDR, 0, false);
 
   // Bus reset will also trigger CONDET IRQ, clear and re-enable it after reset
-  reg_write(HIRQ_ADDR, HIRQ_CONDET_IRQ);
-  hien_write(DEFAULT_HIEN);
+  reg_write(rhport, HIRQ_ADDR, HIRQ_CONDET_IRQ, false);
+  hien_write(rhport, DEFAULT_HIEN, false);
 }
 
 // Get port link speed
@@ -487,7 +504,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
   ep->xfer_complete = 0;
   ep->xfer_queued = 1;
 
-  peraddr_write(daddr);
+  peraddr_write(rhport, daddr, false);
 
   uint8_t hctl = 0;
   uint8_t hxfr = ep_num;
@@ -500,7 +517,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
       // ZLP for ACK stage, use HS
       hxfr |= HXFR_HS;
       hxfr |= (ep_dir ? 0 : HXFR_OUT_NIN);
-      hxfr_write(hxfr);
+      hxfr_write(rhport, hxfr, false);
       return true;
     }
   }
@@ -510,8 +527,8 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
     TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ);
 
     uint8_t const xact_len = (uint8_t) tu_min16(buflen, ep->packet_size);
-    fifo_write(SNDFIFO_ADDR, buffer, xact_len);
-    sndbc_write(xact_len);
+    fifo_write(rhport, SNDFIFO_ADDR, buffer, xact_len, false);
+    sndbc_write(rhport, xact_len, false);
 
     hctl = (ep->data_toggle ? HCTL_SNDTOG1 : HCTL_SNDTOG0);
     hxfr |= HXFR_OUT_NIN;
@@ -520,8 +537,8 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
     hctl = (ep->data_toggle ? HCTL_RCVTOG1 : HCTL_RCVTOG0);
   }
 
-  reg_write(HCTL_ADDR, hctl);
-  hxfr_write(hxfr);
+  reg_write(rhport, HCTL_ADDR, hctl, false);
+  hxfr_write(rhport, hxfr, false);
 
   return true;
 }
@@ -544,9 +561,9 @@ bool hcd_setup_send(uint8_t rhport, uint8_t daddr, uint8_t const setup_packet[8]
   ep->total_len  = 8;
   ep->xferred_len = 0;
 
-  peraddr_write(daddr);
-  fifo_write(SUDFIFO_ADDR, setup_packet, 8);
-  hxfr_write(HXFR_SETUP);
+  peraddr_write(rhport, daddr, false);
+  fifo_write(rhport, SUDFIFO_ADDR, setup_packet, 8, false);
+  hxfr_write(rhport, HXFR_SETUP, false);
 
   return true;
 }
@@ -561,9 +578,7 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
 }
 
 static void handle_xfer_done(uint8_t rhport) {
-  (void) rhport;
-
-  uint8_t const hrsl = reg_read(HRSL_ADDR);
+  uint8_t const hrsl = reg_read(rhport, HRSL_ADDR, true);
   uint8_t const hresult = hrsl & HRSL_RESULT_MASK;
   uint8_t ep_num = _hcd_data.hxfr & HXFR_EPNUM_MASK;
 
@@ -587,7 +602,7 @@ static void handle_xfer_done(uint8_t rhport) {
       // NAK on control, retry immediately
       //if (ep_num == 0)
       {
-        hxfr_write(_hcd_data.hxfr);
+        hxfr_write(rhport, _hcd_data.hxfr, true);
       }
       return;
 
@@ -615,11 +630,8 @@ static void handle_xfer_done(uint8_t rhport) {
     ep->buf += xact_len;
 
     if ( xact_len < ep->packet_size || ep->xferred_len >= ep->total_len ) {
-      if ( ep_num ) {
-        // save data toggle for non-control
-        ep->data_toggle = (hrsl & HRSL_SNDTOGRD) ? 1 : 0;
-      }
-
+      // save data toggle
+      ep->data_toggle = (hrsl & HRSL_SNDTOGRD) ? 1 : 0;
       hcd_event_xfer_complete(_hcd_data.peraddr, ep_num, ep->xferred_len, xfer_result, true);
     }else {
       // more to transfer
@@ -634,15 +646,12 @@ static void handle_xfer_done(uint8_t rhport) {
 
     // short packet or all bytes transferred
     if ( ep->xfer_complete ) {
-      if ( ep_num ) {
-        // save data toggle for non-control
-        ep->data_toggle = (hrsl & HRSL_RCVTOGRD) ? 1 : 0;
-      }
-
+      // save data toggle
+      ep->data_toggle = (hrsl & HRSL_RCVTOGRD) ? 1 : 0;
       hcd_event_xfer_complete(_hcd_data.peraddr, TUSB_DIR_IN_MASK | ep_num, ep->xferred_len, xfer_result, true);
     }else {
       // more to transfer
-      hxfr_write(_hcd_data.hxfr);
+      hxfr_write(rhport, _hcd_data.hxfr, true);
     }
   }
 }
@@ -669,10 +678,7 @@ void print_hirq(uint8_t hirq) {
 
 // Interrupt Handler
 void hcd_int_handler(uint8_t rhport) {
-  // not initialized, do nothing
-  if ( !_hcd_data.inited ) return;
-
-  uint8_t hirq = reg_read(HIRQ_ADDR) & _hcd_data.hien;
+  uint8_t hirq = reg_read(rhport, HIRQ_ADDR, true) & _hcd_data.hien;
   if (!hirq) return;
 
 //  print_hirq(hirq);
@@ -701,17 +707,17 @@ void hcd_int_handler(uint8_t rhport) {
 
       // RCVDAV_IRQ can trigger 2 times (dual buffered)
       while ( hirq & HIRQ_RCVDAV_IRQ ) {
-        uint8_t rcvbc = reg_read(RCVBC_ADDR);
+        uint8_t rcvbc = reg_read(rhport, RCVBC_ADDR, true);
         xact_len = (uint8_t) tu_min16(rcvbc, ep->total_len - ep->xferred_len);
         if ( xact_len ) {
-          fifo_read(ep->buf, xact_len);
+          fifo_read(rhport, ep->buf, xact_len, true);
           ep->buf += xact_len;
           ep->xferred_len += xact_len;
         }
 
         // ack RCVDVAV IRQ
-        reg_write(HIRQ_ADDR, HIRQ_RCVDAV_IRQ);
-        hirq = reg_read(HIRQ_ADDR);
+        reg_write(rhport, HIRQ_ADDR, HIRQ_RCVDAV_IRQ, true);
+        hirq = reg_read(rhport, HIRQ_ADDR, true);
       }
 
       if ( xact_len < ep->packet_size || ep->xferred_len >= ep->total_len ) {
@@ -720,17 +726,17 @@ void hcd_int_handler(uint8_t rhport) {
     }
 
     if ( hirq & HIRQ_HXFRDN_IRQ ) {
-      reg_write(HIRQ_ADDR, HIRQ_HXFRDN_IRQ);
+      reg_write(rhport, HIRQ_ADDR, HIRQ_HXFRDN_IRQ, true);
       handle_xfer_done(rhport);
     }
 
-    hirq = reg_read(HIRQ_ADDR);
+    hirq = reg_read(rhport, HIRQ_ADDR, true);
   }
 
   // clear all interrupt except SNDBAV_IRQ (never clear by us). Note RCVDAV_IRQ, HXFRDN_IRQ already clear while processing
   hirq &= ~HIRQ_SNDBAV_IRQ;
   if ( hirq ) {
-    reg_write(HIRQ_ADDR, hirq);
+    reg_write(rhport, HIRQ_ADDR, hirq, true);
   }
 }
 

From 09ceaa6cf37d29e605495716fc2497ed5228a37f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 25 Aug 2023 13:18:47 +0700
Subject: [PATCH 621/691] add osal mutex for spi

---
 src/portable/analog/max3421/hcd_max3421.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index 0144deca6..09845ffe4 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -194,7 +194,10 @@ typedef struct {
 
   hcd_ep_t ep[8][2];
 
-  OSAL_MUTEX_DEF(spi_mutex);
+  OSAL_MUTEX_DEF(spi_mutexdef);
+#if OSAL_MUTEX_REQUIRED
+  osal_mutex_t spi_mutex;
+#endif
 } max2341_data_t;
 
 static max2341_data_t _hcd_data;
@@ -215,6 +218,7 @@ static void max3421_spi_lock(uint8_t rhport, bool in_isr) {
   // disable interrupt and mutex lock (for pre-emptive RTOS) if not in_isr
   if (!in_isr) {
     tuh_max3421e_int_api(rhport, false);
+    (void) osal_mutex_lock(_hcd_data.spi_mutex, OSAL_TIMEOUT_WAIT_FOREVER);
   }
 
   // assert CS
@@ -228,6 +232,7 @@ static void max3421_spi_unlock(uint8_t rhport, bool in_isr) {
   // mutex unlock and re-enable interrupt
   if (!in_isr) {
     tuh_max3421e_int_api(rhport, true);
+    (void) osal_mutex_unlock(_hcd_data.spi_mutex);
   }
 }
 
@@ -372,12 +377,16 @@ tusb_speed_t handle_connect_irq(uint8_t rhport) {
 bool hcd_init(uint8_t rhport) {
   (void) rhport;
 
+  hcd_int_disable(rhport);
+
   TU_LOG2_INT(sizeof(hcd_ep_t));
   TU_LOG2_INT(sizeof(max2341_data_t));
 
   tu_memclr(&_hcd_data, sizeof(_hcd_data));
 
-  hcd_int_disable(rhport);
+#if OSAL_MUTEX_REQUIRED
+  _hcd_data.spi_mutex = osal_mutex_create(&_hcd_data.spi_mutexdef);
+#endif
 
   // full duplex, interrupt negative edge
   reg_write(rhport, PINCTL_ADDR, PINCTL_FDUPSPI, false);

From ecf2f910424b53fecc3ca82ae410f054518cc752 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 25 Aug 2023 16:36:28 +0700
Subject: [PATCH 622/691] use endpoint pool for more flexible multiple devices
 support

---
 src/portable/analog/max3421/hcd_max3421.c | 180 +++++++++++++++-------
 1 file changed, 122 insertions(+), 58 deletions(-)

diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index 09845ffe4..b0325f240 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -165,22 +165,26 @@ enum {
 //--------------------------------------------------------------------+
 
 typedef struct {
-  uint16_t packet_size;
-
   struct TU_ATTR_PACKED {
+    uint8_t ep_dir        : 1;
     uint8_t is_iso        : 1;
     uint8_t data_toggle   : 1;
-    uint8_t xfer_queued   : 1;
+    uint8_t xfer_pending  : 1;
     uint8_t xfer_complete : 1;
   };
+  struct TU_ATTR_PACKED {
+    uint8_t daddr : 4;
+    uint8_t ep_num : 4;
+  };
 
+  uint16_t packet_size;
   uint16_t total_len;
   uint16_t xferred_len;
   uint8_t* buf;
-} hcd_ep_t;
+} max3421_ep_t;
 
 typedef struct {
-  atomic_bool busy; // busy transferring
+  atomic_flag busy; // busy transferring
 
   // cached register
   uint8_t sndbc;
@@ -192,15 +196,16 @@ typedef struct {
 
   volatile uint16_t frame_count;
 
-  hcd_ep_t ep[8][2];
+  max3421_ep_t ep0_addr0; // control endpoint for addr0
+  max3421_ep_t ep[CFG_TUH_MAX3421_ENDPOINT_TOTAL];
 
   OSAL_MUTEX_DEF(spi_mutexdef);
 #if OSAL_MUTEX_REQUIRED
   osal_mutex_t spi_mutex;
 #endif
-} max2341_data_t;
+} max3421_data_t;
 
-static max2341_data_t _hcd_data;
+static max3421_data_t _hcd_data;
 
 //--------------------------------------------------------------------+
 // API: SPI transfer with MAX3421E, must be implemented by application
@@ -211,7 +216,7 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_
 void tuh_max3421e_int_api(uint8_t rhport, bool enabled);
 
 //--------------------------------------------------------------------+
-//
+// SPI Helper
 //--------------------------------------------------------------------+
 
 static void max3421_spi_lock(uint8_t rhport, bool in_isr) {
@@ -318,6 +323,44 @@ static inline void sndbc_write(uint8_t rhport, uint8_t data, bool in_isr) {
   reg_write(rhport, SNDBC_ADDR, data, in_isr);
 }
 
+//--------------------------------------------------------------------+
+// Endpoint helper
+//--------------------------------------------------------------------+
+
+static max3421_ep_t* find_ep_not_addr0(uint8_t daddr, uint8_t ep_num, uint8_t ep_dir) {
+  for(size_t i=0; i<CFG_TUH_MAX3421_ENDPOINT_TOTAL; i++) {
+    max3421_ep_t* ep = &_hcd_data.ep[i];
+    // for control endpoint, skip direction check
+    if ( daddr == ep->daddr && ep_num == ep->ep_num && (ep_dir == ep->ep_dir || ep_num == 0) ) {
+      return ep;
+    }
+  }
+
+  return NULL;
+}
+
+// daddr = 0 and ep_num = 0 means find a free (allocate) endpoint
+TU_ATTR_ALWAYS_INLINE static inline max3421_ep_t * allocate_ep(void) {
+  return find_ep_not_addr0(0, 0, 0);
+}
+
+// free all endpoints belong to device address
+static void free_ep(uint8_t daddr) {
+  for (size_t i=0; i<CFG_TUH_MAX3421_ENDPOINT_TOTAL; i++) {
+    max3421_ep_t* ep = &_hcd_data.ep[i];
+    if (ep->daddr == daddr) {
+      tu_memclr(ep, sizeof(max3421_ep_t));
+    }
+  }
+}
+
+TU_ATTR_ALWAYS_INLINE static inline max3421_ep_t * find_opened_ep(uint8_t daddr, uint8_t ep_num, uint8_t ep_dir) {
+  if (daddr == 0 && ep_num == 0) {
+    return &_hcd_data.ep0_addr0;
+  }else{
+    return find_ep_not_addr0(daddr, ep_num, ep_dir);
+  }
+}
 
 //--------------------------------------------------------------------+
 // Controller API
@@ -379,8 +422,8 @@ bool hcd_init(uint8_t rhport) {
 
   hcd_int_disable(rhport);
 
-  TU_LOG2_INT(sizeof(hcd_ep_t));
-  TU_LOG2_INT(sizeof(max2341_data_t));
+  TU_LOG2_INT(sizeof(max3421_ep_t));
+  TU_LOG2_INT(sizeof(max3421_data_t));
 
   tu_memclr(&_hcd_data, sizeof(_hcd_data));
 
@@ -478,22 +521,29 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr) {
 //--------------------------------------------------------------------+
 
 // Open an endpoint
-bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) {
+bool hcd_edpt_open(uint8_t rhport, uint8_t daddr, tusb_desc_endpoint_t const * ep_desc) {
   (void) rhport;
-  (void) dev_addr;
+  (void) daddr;
 
   uint8_t ep_num = tu_edpt_number(ep_desc->bEndpointAddress);
   uint8_t ep_dir = tu_edpt_dir(ep_desc->bEndpointAddress);
 
-  hcd_ep_t * ep = &_hcd_data.ep[ep_num][ep_dir];
-
-  ep->packet_size = tu_edpt_packet_size(ep_desc);
-
-  if (ep_desc->bEndpointAddress == 0) {
-    _hcd_data.ep[0][1].packet_size = ep->packet_size;
+  max3421_ep_t * ep;
+  if (daddr == 0 && ep_num == 0) {
+    ep = &_hcd_data.ep0_addr0;
+  }else {
+    ep = allocate_ep();
+    TU_ASSERT(ep);
+    ep->daddr = daddr;
+    ep->ep_num = ep_num;
+    ep->ep_dir = ep_dir;
   }
 
-  ep->is_iso = (TUSB_XFER_ISOCHRONOUS == ep_desc->bmAttributes.xfer) ? 1 : 0;
+  if ( TUSB_XFER_ISOCHRONOUS == ep_desc->bmAttributes.xfer ) {
+    ep->is_iso = 1;
+  }
+
+  ep->packet_size = tu_edpt_packet_size(ep_desc);
 
   return true;
 }
@@ -505,50 +555,55 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
   uint8_t const ep_num = tu_edpt_number(ep_addr);
   uint8_t const ep_dir = tu_edpt_dir(ep_addr);
 
-  hcd_ep_t* ep = &_hcd_data.ep[ep_num][ep_dir];
+  max3421_ep_t* ep = find_opened_ep(daddr, ep_num, ep_dir);
+  TU_ASSERT(ep);
 
   ep->buf = buffer;
   ep->total_len = buflen;
   ep->xferred_len = 0;
   ep->xfer_complete = 0;
-  ep->xfer_queued = 1;
+  ep->xfer_pending = 1;
 
-  peraddr_write(rhport, daddr, false);
+  // carry out transfer if not busy
+//  if ( atomic_flag_test_and_set(&_hcd_data.busy) )
+  {
+    peraddr_write(rhport, daddr, false);
 
-  uint8_t hctl = 0;
-  uint8_t hxfr = ep_num;
+    uint8_t hctl = 0;
+    uint8_t hxfr = ep_num;
 
-  if ( ep->is_iso ) {
-    hxfr |= HXFR_ISO;
-  } else if ( ep_num == 0 ) {
-    ep->data_toggle = 1;
-    if ( buffer == NULL || buflen == 0 ) {
-      // ZLP for ACK stage, use HS
-      hxfr |= HXFR_HS;
-      hxfr |= (ep_dir ? 0 : HXFR_OUT_NIN);
-      hxfr_write(rhport, hxfr, false);
-      return true;
+    if ( ep->is_iso ) {
+      hxfr |= HXFR_ISO;
+    } else if ( ep_num == 0 ) {
+      ep->data_toggle = 1;
+      if ( buffer == NULL || buflen == 0 ) {
+        // ZLP for ACK stage, use HS
+        hxfr |= HXFR_HS;
+        hxfr |= (ep_dir ? 0 : HXFR_OUT_NIN);
+        hxfr_write(rhport, hxfr, false);
+        return true;
+      }
     }
+
+    if ( 0 == ep_dir ) {
+      // Page 12: Programming BULK-OUT Transfers
+      TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ);
+
+      uint8_t const xact_len = (uint8_t) tu_min16(buflen, ep->packet_size);
+      fifo_write(rhport, SNDFIFO_ADDR, buffer, xact_len, false);
+      sndbc_write(rhport, xact_len, false);
+
+      hctl = (ep->data_toggle ? HCTL_SNDTOG1 : HCTL_SNDTOG0);
+      hxfr |= HXFR_OUT_NIN;
+    } else {
+      // Page 13: Programming BULK-IN Transfers
+      hctl = (ep->data_toggle ? HCTL_RCVTOG1 : HCTL_RCVTOG0);
+    }
+
+    reg_write(rhport, HCTL_ADDR, hctl, false);
+    hxfr_write(rhport, hxfr, false);
   }
 
-  if ( 0 == ep_dir ) {
-    // Page 12: Programming BULK-OUT Transfers
-    TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ);
-
-    uint8_t const xact_len = (uint8_t) tu_min16(buflen, ep->packet_size);
-    fifo_write(rhport, SNDFIFO_ADDR, buffer, xact_len, false);
-    sndbc_write(rhport, xact_len, false);
-
-    hctl = (ep->data_toggle ? HCTL_SNDTOG1 : HCTL_SNDTOG0);
-    hxfr |= HXFR_OUT_NIN;
-  } else {
-    // Page 13: Programming BULK-IN Transfers
-    hctl = (ep->data_toggle ? HCTL_RCVTOG1 : HCTL_RCVTOG0);
-  }
-
-  reg_write(rhport, HCTL_ADDR, hctl, false);
-  hxfr_write(rhport, hxfr, false);
-
   return true;
 }
 
@@ -566,7 +621,7 @@ bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
 bool hcd_setup_send(uint8_t rhport, uint8_t daddr, uint8_t const setup_packet[8]) {
   (void) rhport;
 
-  hcd_ep_t* ep = &_hcd_data.ep[0][0];
+  max3421_ep_t* ep = find_opened_ep(daddr, 0, 0);
   ep->total_len  = 8;
   ep->xferred_len = 0;
 
@@ -624,7 +679,7 @@ static void handle_xfer_done(uint8_t rhport) {
 
   if ( (hxfr_type & HXFR_SETUP) || (hxfr_type & HXFR_OUT_NIN) ) {
     // SETUP or OUT transfer
-    hcd_ep_t *ep = &_hcd_data.ep[ep_num][0];
+    max3421_ep_t *ep = find_opened_ep(_hcd_data.peraddr, ep_num, 0);
     uint8_t xact_len;
 
     if ( hxfr_type & HXFR_SETUP) {
@@ -644,10 +699,15 @@ static void handle_xfer_done(uint8_t rhport) {
       hcd_event_xfer_complete(_hcd_data.peraddr, ep_num, ep->xferred_len, xfer_result, true);
     }else {
       // more to transfer
+      xact_len = (uint8_t) tu_min16(ep->total_len - ep->xferred_len, ep->packet_size);
+      fifo_write(rhport, SNDFIFO_ADDR, ep->buf, xact_len, true);
+      sndbc_write(rhport, xact_len, true);
+
+      hxfr_write(rhport, _hcd_data.hxfr, true);
     }
   } else {
     // IN transfer: fifo data is already received in RCVDAV IRQ
-    hcd_ep_t *ep = &_hcd_data.ep[ep_num][1];
+    max3421_ep_t *ep = find_opened_ep(_hcd_data.peraddr, ep_num, 1);
 
     if ( hxfr_type & HXFR_HS ) {
       ep->xfer_complete = 1;
@@ -702,6 +762,10 @@ void hcd_int_handler(uint8_t rhport) {
     if (speed == TUSB_SPEED_INVALID) {
       hcd_event_device_remove(rhport, true);
     }else {
+      // FIXME multiple MAX3421 rootdevice address is not 1
+      uint8_t const daddr = 1;
+      free_ep(daddr);
+
       hcd_event_device_attach(rhport, true);
     }
   }
@@ -710,8 +774,8 @@ void hcd_int_handler(uint8_t rhport) {
   // not call this handler again. So we need to loop until all IRQ are cleared
   while ( hirq & (HIRQ_RCVDAV_IRQ | HIRQ_HXFRDN_IRQ) ) {
     if ( hirq & HIRQ_RCVDAV_IRQ ) {
-      uint8_t ep_num = _hcd_data.hxfr & HXFR_EPNUM_MASK;
-      hcd_ep_t *ep = &_hcd_data.ep[ep_num][1];
+      uint8_t const ep_num = _hcd_data.hxfr & HXFR_EPNUM_MASK;
+      max3421_ep_t *ep = find_opened_ep(_hcd_data.peraddr, ep_num, 1);
       uint8_t xact_len;
 
       // RCVDAV_IRQ can trigger 2 times (dual buffered)

From ac00b9147298184ca0bd1eadac3a02e7e867085d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 25 Aug 2023 17:26:57 +0700
Subject: [PATCH 623/691] add xact_out(), xact_in() to manage transfer

---
 src/portable/analog/max3421/hcd_max3421.c | 149 +++++++++++++---------
 1 file changed, 92 insertions(+), 57 deletions(-)

diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index b0325f240..00b36201c 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -331,7 +331,7 @@ static max3421_ep_t* find_ep_not_addr0(uint8_t daddr, uint8_t ep_num, uint8_t ep
   for(size_t i=0; i<CFG_TUH_MAX3421_ENDPOINT_TOTAL; i++) {
     max3421_ep_t* ep = &_hcd_data.ep[i];
     // for control endpoint, skip direction check
-    if ( daddr == ep->daddr && ep_num == ep->ep_num && (ep_dir == ep->ep_dir || ep_num == 0) ) {
+    if (daddr == ep->daddr && ep_num == ep->ep_num && (ep_dir == ep->ep_dir || ep_num == 0)) {
       return ep;
     }
   }
@@ -362,6 +362,28 @@ TU_ATTR_ALWAYS_INLINE static inline max3421_ep_t * find_opened_ep(uint8_t daddr,
   }
 }
 
+//static max3421_ep_t * find_next_pending_ep(max3421_ep_t * cur_ep) {
+//  size_t idx = cur_ep - _hcd_data.ep;
+//
+//  // starting from next endpoint
+//  for (size_t i = idx + 1; i < CFG_TUH_MAX3421_ENDPOINT_TOTAL; i++) {
+//    max3421_ep_t* ep = &_hcd_data.ep[i];
+//    if (ep->xfer_pending) {
+//      return ep;
+//    }
+//  }
+//
+//  // wrap around including current endpoint
+//  for (size_t i = 0; i <= idx; i++) {
+//    max3421_ep_t* ep = &_hcd_data.ep[i];
+//    if (ep->xfer_pending) {
+//      return ep;
+//    }
+//  }
+//
+//  return NULL;
+//}
+
 //--------------------------------------------------------------------+
 // Controller API
 //--------------------------------------------------------------------+
@@ -548,6 +570,37 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t daddr, tusb_desc_endpoint_t const * e
   return true;
 }
 
+void xact_out(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
+  // Page 12: Programming BULK-OUT Transfers
+  // TODO double buffered
+  if (switch_ep) {
+    peraddr_write(rhport, ep->daddr, in_isr);
+
+    uint8_t const hctl = (ep->data_toggle ? HCTL_SNDTOG1 : HCTL_SNDTOG0);
+    reg_write(rhport, HCTL_ADDR, hctl, in_isr);
+  }
+
+  uint8_t const xact_len = (uint8_t) tu_min16(ep->total_len - ep->xferred_len, ep->packet_size);
+  fifo_write(rhport, SNDFIFO_ADDR, ep->buf, xact_len, in_isr);
+  sndbc_write(rhport, xact_len, in_isr);
+
+  uint8_t const hxfr = ep->ep_num | HXFR_OUT_NIN | (ep->is_iso ? HXFR_ISO : 0);
+  hxfr_write(rhport, hxfr, in_isr);
+}
+
+void xact_in(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
+  // Page 13: Programming BULK-IN Transfers
+  if (switch_ep) {
+    peraddr_write(rhport, ep->daddr, in_isr);
+
+    uint8_t const hctl = (ep->data_toggle ? HCTL_RCVTOG1 : HCTL_RCVTOG0);
+    reg_write(rhport, HCTL_ADDR, hctl, in_isr);
+  }
+
+  uint8_t const hxfr = ep->ep_num | (ep->is_iso ? HXFR_ISO : 0);
+  hxfr_write(rhport, hxfr, in_isr);
+}
+
 // Submit a transfer, when complete hcd_event_xfer_complete() must be invoked
 bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) {
   (void) rhport;
@@ -567,17 +620,14 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
   // carry out transfer if not busy
 //  if ( atomic_flag_test_and_set(&_hcd_data.busy) )
   {
-    peraddr_write(rhport, daddr, false);
-
-    uint8_t hctl = 0;
     uint8_t hxfr = ep_num;
 
-    if ( ep->is_iso ) {
-      hxfr |= HXFR_ISO;
-    } else if ( ep_num == 0 ) {
+    if ( ep_num == 0 ) {
       ep->data_toggle = 1;
       if ( buffer == NULL || buflen == 0 ) {
         // ZLP for ACK stage, use HS
+        peraddr_write(rhport, daddr, false);
+
         hxfr |= HXFR_HS;
         hxfr |= (ep_dir ? 0 : HXFR_OUT_NIN);
         hxfr_write(rhport, hxfr, false);
@@ -586,22 +636,11 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
     }
 
     if ( 0 == ep_dir ) {
-      // Page 12: Programming BULK-OUT Transfers
       TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ);
-
-      uint8_t const xact_len = (uint8_t) tu_min16(buflen, ep->packet_size);
-      fifo_write(rhport, SNDFIFO_ADDR, buffer, xact_len, false);
-      sndbc_write(rhport, xact_len, false);
-
-      hctl = (ep->data_toggle ? HCTL_SNDTOG1 : HCTL_SNDTOG0);
-      hxfr |= HXFR_OUT_NIN;
+      xact_out(rhport, ep, true, false);
     } else {
-      // Page 13: Programming BULK-IN Transfers
-      hctl = (ep->data_toggle ? HCTL_RCVTOG1 : HCTL_RCVTOG0);
+      xact_in(rhport, ep, true, false);
     }
-
-    reg_write(rhport, HCTL_ADDR, hctl, false);
-    hxfr_write(rhport, hxfr, false);
   }
 
   return true;
@@ -644,7 +683,12 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
 static void handle_xfer_done(uint8_t rhport) {
   uint8_t const hrsl = reg_read(rhport, HRSL_ADDR, true);
   uint8_t const hresult = hrsl & HRSL_RESULT_MASK;
-  uint8_t ep_num = _hcd_data.hxfr & HXFR_EPNUM_MASK;
+
+  uint8_t const ep_num = _hcd_data.hxfr & HXFR_EPNUM_MASK;
+  uint8_t const hxfr_type = _hcd_data.hxfr & 0xf0;
+  uint8_t const ep_dir = ((hxfr_type & HXFR_SETUP) || (hxfr_type & HXFR_OUT_NIN)) ? 0 : 1;
+
+  max3421_ep_t *ep = find_opened_ep(_hcd_data.peraddr, ep_num, ep_dir);
 
   xfer_result_t xfer_result;
 
@@ -663,10 +707,11 @@ static void handle_xfer_done(uint8_t rhport) {
       return;
 
     case HRSL_NAK:
-      // NAK on control, retry immediately
-      //if (ep_num == 0)
-      {
+      if (ep_num == 0) {
+        // NAK on control, retry immediately
         hxfr_write(rhport, _hcd_data.hxfr, true);
+      }else {
+        // NAK on non-control, find next pending to switch
       }
       return;
 
@@ -675,40 +720,8 @@ static void handle_xfer_done(uint8_t rhport) {
       break;
   }
 
-  uint8_t const hxfr_type = _hcd_data.hxfr & 0xf0;
-
-  if ( (hxfr_type & HXFR_SETUP) || (hxfr_type & HXFR_OUT_NIN) ) {
-    // SETUP or OUT transfer
-    max3421_ep_t *ep = find_opened_ep(_hcd_data.peraddr, ep_num, 0);
-    uint8_t xact_len;
-
-    if ( hxfr_type & HXFR_SETUP) {
-      xact_len = 8;
-    } else if ( hxfr_type & HXFR_HS ) {
-      xact_len = 0;
-    } else {
-      xact_len = _hcd_data.sndbc;
-    }
-
-    ep->xferred_len += xact_len;
-    ep->buf += xact_len;
-
-    if ( xact_len < ep->packet_size || ep->xferred_len >= ep->total_len ) {
-      // save data toggle
-      ep->data_toggle = (hrsl & HRSL_SNDTOGRD) ? 1 : 0;
-      hcd_event_xfer_complete(_hcd_data.peraddr, ep_num, ep->xferred_len, xfer_result, true);
-    }else {
-      // more to transfer
-      xact_len = (uint8_t) tu_min16(ep->total_len - ep->xferred_len, ep->packet_size);
-      fifo_write(rhport, SNDFIFO_ADDR, ep->buf, xact_len, true);
-      sndbc_write(rhport, xact_len, true);
-
-      hxfr_write(rhport, _hcd_data.hxfr, true);
-    }
-  } else {
+  if (ep_dir) {
     // IN transfer: fifo data is already received in RCVDAV IRQ
-    max3421_ep_t *ep = find_opened_ep(_hcd_data.peraddr, ep_num, 1);
-
     if ( hxfr_type & HXFR_HS ) {
       ep->xfer_complete = 1;
     }
@@ -722,6 +735,28 @@ static void handle_xfer_done(uint8_t rhport) {
       // more to transfer
       hxfr_write(rhport, _hcd_data.hxfr, true);
     }
+  } else {
+    // SETUP or OUT transfer
+    uint8_t xact_len;
+
+    if (hxfr_type & HXFR_SETUP) {
+      xact_len = 8;
+    } else if (hxfr_type & HXFR_HS) {
+      xact_len = 0;
+    } else {
+      xact_len = _hcd_data.sndbc;
+    }
+
+    ep->xferred_len += xact_len;
+    ep->buf += xact_len;
+
+    if (xact_len < ep->packet_size || ep->xferred_len >= ep->total_len) {
+      // save data toggle
+      ep->data_toggle = (hrsl & HRSL_SNDTOGRD) ? 1 : 0;
+      hcd_event_xfer_complete(_hcd_data.peraddr, ep_num, ep->xferred_len, xfer_result, true);
+    } else {
+      xact_out(rhport, ep, false, true);
+    }
   }
 }
 

From cd7464a8847db5efa14f568bdf8746d898fc7eb4 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 25 Aug 2023 17:37:09 +0700
Subject: [PATCH 624/691] try next endpoint when received NAK

---
 src/portable/analog/max3421/hcd_max3421.c | 58 +++++++++++++++--------
 1 file changed, 37 insertions(+), 21 deletions(-)

diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index 00b36201c..e546f99ce 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -362,27 +362,27 @@ TU_ATTR_ALWAYS_INLINE static inline max3421_ep_t * find_opened_ep(uint8_t daddr,
   }
 }
 
-//static max3421_ep_t * find_next_pending_ep(max3421_ep_t * cur_ep) {
-//  size_t idx = cur_ep - _hcd_data.ep;
-//
-//  // starting from next endpoint
-//  for (size_t i = idx + 1; i < CFG_TUH_MAX3421_ENDPOINT_TOTAL; i++) {
-//    max3421_ep_t* ep = &_hcd_data.ep[i];
-//    if (ep->xfer_pending) {
-//      return ep;
-//    }
-//  }
-//
-//  // wrap around including current endpoint
-//  for (size_t i = 0; i <= idx; i++) {
-//    max3421_ep_t* ep = &_hcd_data.ep[i];
-//    if (ep->xfer_pending) {
-//      return ep;
-//    }
-//  }
-//
-//  return NULL;
-//}
+static max3421_ep_t * find_next_pending_ep(max3421_ep_t * cur_ep) {
+  size_t idx = cur_ep - _hcd_data.ep;
+
+  // starting from next endpoint
+  for (size_t i = idx + 1; i < CFG_TUH_MAX3421_ENDPOINT_TOTAL; i++) {
+    max3421_ep_t* ep = &_hcd_data.ep[i];
+    if (ep->xfer_pending) {
+      return ep;
+    }
+  }
+
+  // wrap around including current endpoint
+  for (size_t i = 0; i <= idx; i++) {
+    max3421_ep_t* ep = &_hcd_data.ep[i];
+    if (ep->xfer_pending) {
+      return ep;
+    }
+  }
+
+  return NULL;
+}
 
 //--------------------------------------------------------------------+
 // Controller API
@@ -443,6 +443,7 @@ bool hcd_init(uint8_t rhport) {
   (void) rhport;
 
   hcd_int_disable(rhport);
+  tuh_max3421_spi_cs_api(rhport, false);
 
   TU_LOG2_INT(sizeof(max3421_ep_t));
   TU_LOG2_INT(sizeof(max3421_data_t));
@@ -689,6 +690,7 @@ static void handle_xfer_done(uint8_t rhport) {
   uint8_t const ep_dir = ((hxfr_type & HXFR_SETUP) || (hxfr_type & HXFR_OUT_NIN)) ? 0 : 1;
 
   max3421_ep_t *ep = find_opened_ep(_hcd_data.peraddr, ep_num, ep_dir);
+  TU_ASSERT(ep, );
 
   xfer_result_t xfer_result;
 
@@ -712,6 +714,20 @@ static void handle_xfer_done(uint8_t rhport) {
         hxfr_write(rhport, _hcd_data.hxfr, true);
       }else {
         // NAK on non-control, find next pending to switch
+        max3421_ep_t *next_ep = find_next_pending_ep(ep);
+        TU_ASSERT(next_ep, );
+
+        if (ep == next_ep) {
+          // only one pending, retry immediately
+          hxfr_write(rhport, _hcd_data.hxfr, true);
+        }else {
+          // switch to next pending TODO could have issue with double buffered if not clear previously out data
+          if ( ep_dir ) {
+            xact_in(rhport, next_ep, true, true);
+          } else {
+            xact_out(rhport, next_ep, true, true);
+          }
+        }
       }
       return;
 

From 502b1bdda62f0f207d9a51daf134574e455f3aa2 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 27 Aug 2023 23:45:34 +0700
Subject: [PATCH 625/691] more update to transaction

---
 examples/host/cdc_msc_hid/src/tusb_config.h   |  9 ++--
 .../host/msc_file_explorer/src/tusb_config.h  | 10 ++--
 src/common/tusb_mcu.h                         | 12 +++++
 src/host/hcd.h                                |  4 +-
 src/host/usbh.c                               |  1 +
 src/portable/analog/max3421/hcd_max3421.c     | 51 ++++++++++++-------
 6 files changed, 62 insertions(+), 25 deletions(-)

diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h
index abb75f068..7d621d466 100644
--- a/examples/host/cdc_msc_hid/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid/src/tusb_config.h
@@ -35,9 +35,12 @@
 //--------------------------------------------------------------------+
 
 #if CFG_TUSB_MCU == OPT_MCU_RP2040
-// change to 1 if using pico-pio-usb as host controller for raspberry rp2040
-#define CFG_TUH_RPI_PIO_USB   0
-#define BOARD_TUH_RHPORT      CFG_TUH_RPI_PIO_USB
+  // change to 1 if using pico-pio-usb as host controller for raspberry rp2040
+  #define CFG_TUH_RPI_PIO_USB   0
+  #define BOARD_TUH_RHPORT      CFG_TUH_RPI_PIO_USB
+#elif CFG_TUSB_MCU == OPT_MCU_NRF5X
+  // Use external USB controller (via SPI) MAX3421E (aka usb host shield)
+  #define CFG_TUH_MAX3421      1
 #endif
 
 // RHPort number used for host can be defined by board.mk, default to port 0
diff --git a/examples/host/msc_file_explorer/src/tusb_config.h b/examples/host/msc_file_explorer/src/tusb_config.h
index 1e0d067bf..bb2fd4cf5 100644
--- a/examples/host/msc_file_explorer/src/tusb_config.h
+++ b/examples/host/msc_file_explorer/src/tusb_config.h
@@ -35,11 +35,15 @@
 //--------------------------------------------------------------------+
 
 #if CFG_TUSB_MCU == OPT_MCU_RP2040
-// change to 1 if using pico-pio-usb as host controller for raspberry rp2040
-#define CFG_TUH_RPI_PIO_USB   0
-#define BOARD_TUH_RHPORT      CFG_TUH_RPI_PIO_USB
+  // change to 1 if using pico-pio-usb as host controller for raspberry rp2040
+  #define CFG_TUH_RPI_PIO_USB   0
+  #define BOARD_TUH_RHPORT      CFG_TUH_RPI_PIO_US
+#elif CFG_TUSB_MCU == OPT_MCU_NRF5X
+  // Use external USB controller (via SPI) MAX3421E (aka usb host shield)
+  #define CFG_TUH_MAX3421      1
 #endif
 
+
 // RHPort number used for host can be defined by board.mk, default to port 0
 #ifndef BOARD_TUH_RHPORT
 #define BOARD_TUH_RHPORT      0
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 35f94efbc..21939df7c 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -385,6 +385,18 @@
   #define TUP_RHPORT_HIGHSPEED    1
 #endif
 
+
+//--------------------------------------------------------------------+
+// External USB controller
+//--------------------------------------------------------------------+
+
+#if defined(CFG_TUH_MAX3421) & CFG_TUH_MAX3421
+  #ifndef CFG_TUH_MAX3421_ENDPOINT_TOTAL
+    #define CFG_TUH_MAX3421_ENDPOINT_TOTAL  (8 + 4*(CFG_TUH_DEVICE_MAX-1))
+  #endif
+#endif
+
+
 //--------------------------------------------------------------------+
 // Default Values
 //--------------------------------------------------------------------+
diff --git a/src/host/hcd.h b/src/host/hcd.h
index 1f01a1a2f..e25b20ea3 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -39,7 +39,7 @@
 // Configuration
 //--------------------------------------------------------------------+
 
-// Max number of endpoints per device
+// Max number of endpoints pair per device
 // TODO optimize memory usage
 #ifndef CFG_TUH_ENDPOINT_MAX
   #define CFG_TUH_ENDPOINT_MAX   16
@@ -167,7 +167,7 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr);
 //--------------------------------------------------------------------+
 
 // Open an endpoint
-bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);
+bool hcd_edpt_open(uint8_t rhport, uint8_t daddr, tusb_desc_endpoint_t const * ep_desc);
 
 // Submit a transfer, when complete hcd_event_xfer_complete() must be invoked
 bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen);
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 7a09f5b6e..12a7f5839 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -919,6 +919,7 @@ TU_ATTR_FAST_FUNC void hcd_event_handler(hcd_event_t const* event, bool in_isr)
   switch (event->event_id)
   {
 //    case HCD_EVENT_DEVICE_REMOVE:
+//      // FIXME device remove from a hub need an HCD API for hcd to free up endpoint
 //      // mark device as removing to prevent further xfer before the event is processed in usbh task
 //      break;
 
diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index e546f99ce..574cca788 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -582,6 +582,7 @@ void xact_out(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
   }
 
   uint8_t const xact_len = (uint8_t) tu_min16(ep->total_len - ep->xferred_len, ep->packet_size);
+  TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ, );
   fifo_write(rhport, SNDFIFO_ADDR, ep->buf, xact_len, in_isr);
   sndbc_write(rhport, xact_len, in_isr);
 
@@ -602,6 +603,28 @@ void xact_in(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
   hxfr_write(rhport, hxfr, in_isr);
 }
 
+TU_ATTR_ALWAYS_INLINE static inline void xact_inout(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
+  if (ep->ep_dir) {
+    xact_in(rhport, ep, switch_ep, in_isr);
+  }else {
+    xact_out(rhport, ep, switch_ep, in_isr);
+  }
+}
+
+void xfer_complete_isr(uint8_t rhport, max3421_ep_t *ep, xfer_result_t result, uint8_t data_toggle) {
+  (void) rhport;
+  (void) result;
+  ep->xfer_pending = 0;
+  ep->data_toggle = data_toggle;
+  //uint8_t const ep_addr = tu_edpt_addr(ep->ep_num, ep->ep_dir);
+  //hcd_event_xfer_complete(rhport, ep_addr, ep->xferred_len, result, true);
+
+//  max3421_ep_t *next_ep = find_next_pending_ep(ep);
+//  if (next_ep) {
+//    xact_inout(rhport, next_ep, true, true);
+//  }
+}
+
 // Submit a transfer, when complete hcd_event_xfer_complete() must be invoked
 bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) {
   (void) rhport;
@@ -612,6 +635,9 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
   max3421_ep_t* ep = find_opened_ep(daddr, ep_num, ep_dir);
   TU_ASSERT(ep);
 
+  // control transfer can switch direction
+  ep->ep_dir = ep_dir;
+
   ep->buf = buffer;
   ep->total_len = buflen;
   ep->xferred_len = 0;
@@ -636,12 +662,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
       }
     }
 
-    if ( 0 == ep_dir ) {
-      TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ);
-      xact_out(rhport, ep, true, false);
-    } else {
-      xact_in(rhport, ep, true, false);
-    }
+    xact_inout(rhport, ep, true, false);
   }
 
   return true;
@@ -662,6 +683,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t daddr, uint8_t const setup_packet[8]
   (void) rhport;
 
   max3421_ep_t* ep = find_opened_ep(daddr, 0, 0);
+  ep->ep_dir = 0;
   ep->total_len  = 8;
   ep->xferred_len = 0;
 
@@ -715,18 +737,13 @@ static void handle_xfer_done(uint8_t rhport) {
       }else {
         // NAK on non-control, find next pending to switch
         max3421_ep_t *next_ep = find_next_pending_ep(ep);
-        TU_ASSERT(next_ep, );
 
         if (ep == next_ep) {
           // only one pending, retry immediately
           hxfr_write(rhport, _hcd_data.hxfr, true);
-        }else {
+        }else if (next_ep) {
           // switch to next pending TODO could have issue with double buffered if not clear previously out data
-          if ( ep_dir ) {
-            xact_in(rhport, next_ep, true, true);
-          } else {
-            xact_out(rhport, next_ep, true, true);
-          }
+          xact_inout(rhport, next_ep, true, true);
         }
       }
       return;
@@ -744,8 +761,8 @@ static void handle_xfer_done(uint8_t rhport) {
 
     // short packet or all bytes transferred
     if ( ep->xfer_complete ) {
-      // save data toggle
-      ep->data_toggle = (hrsl & HRSL_RCVTOGRD) ? 1 : 0;
+      uint8_t const dt = (hrsl & HRSL_RCVTOGRD) ? 1 : 0; // save data toggle
+      xfer_complete_isr(rhport, ep, xfer_result, dt);
       hcd_event_xfer_complete(_hcd_data.peraddr, TUSB_DIR_IN_MASK | ep_num, ep->xferred_len, xfer_result, true);
     }else {
       // more to transfer
@@ -767,8 +784,8 @@ static void handle_xfer_done(uint8_t rhport) {
     ep->buf += xact_len;
 
     if (xact_len < ep->packet_size || ep->xferred_len >= ep->total_len) {
-      // save data toggle
-      ep->data_toggle = (hrsl & HRSL_SNDTOGRD) ? 1 : 0;
+      uint8_t const dt = (hrsl & HRSL_SNDTOGRD) ? 1 : 0; // save data toggle
+      xfer_complete_isr(rhport, ep, xfer_result, dt);
       hcd_event_xfer_complete(_hcd_data.peraddr, ep_num, ep->xferred_len, xfer_result, true);
     } else {
       xact_out(rhport, ep, false, true);

From 84df3b04db47d34b53ef002b056b6b324394de52 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 27 Aug 2023 23:54:24 +0700
Subject: [PATCH 626/691] minor update

---
 .idea/cmake.xml                                   | 5 +++--
 .idea/runConfigurations/nrf52840.xml              | 2 +-
 examples/host/cdc_msc_hid/src/tusb_config.h       | 6 +++---
 examples/host/msc_file_explorer/src/tusb_config.h | 6 +++---
 4 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 8ee7f09a0..86e7c6606 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -30,9 +30,10 @@
       <configuration PROFILE_NAME="mcb1800" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mcb1800 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="ea4088 quickstart" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ea4088_quickstart -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="ea4357" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ea4357 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="lpc54628" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso54628 -DLOG=4 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="lpc55s69" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso55s69 -DLOG=4 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="lpc54628" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso54628 -DLOG=4 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="lpc55s69" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso55s69 -DLOG=4 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="mcxn947" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mcxn947brk -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="feather_nrf52840_express" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_nrf52840_express -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10056 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10095 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="stm32g0b1nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32g0b1nucleo" />
diff --git a/.idea/runConfigurations/nrf52840.xml b/.idea/runConfigurations/nrf52840.xml
index 084669c39..2f3f1876a 100644
--- a/.idea/runConfigurations/nrf52840.xml
+++ b/.idea/runConfigurations/nrf52840.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="nrf52840" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;nrf52840_xxaa&quot; -if swd -speed 8000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="nrf52840" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;nrf52840_xxaa&quot; -if swd -speed 8000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="msc_file_explorer" TARGET_NAME="msc_file_explorer" CONFIG_NAME="feather_nrf52840_express" version="1" RUN_TARGET_PROJECT_NAME="msc_file_explorer" RUN_TARGET_NAME="msc_file_explorer">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h
index 7d621d466..8d3ef8891 100644
--- a/examples/host/cdc_msc_hid/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid/src/tusb_config.h
@@ -38,9 +38,9 @@
   // change to 1 if using pico-pio-usb as host controller for raspberry rp2040
   #define CFG_TUH_RPI_PIO_USB   0
   #define BOARD_TUH_RHPORT      CFG_TUH_RPI_PIO_USB
-#elif CFG_TUSB_MCU == OPT_MCU_NRF5X
-  // Use external USB controller (via SPI) MAX3421E (aka usb host shield)
-  #define CFG_TUH_MAX3421      1
+//#elif CFG_TUSB_MCU == OPT_MCU_NRF5X
+//  // Use external USB controller (via SPI) MAX3421E (aka usb host shield)
+//  #define CFG_TUH_MAX3421      1
 #endif
 
 // RHPort number used for host can be defined by board.mk, default to port 0
diff --git a/examples/host/msc_file_explorer/src/tusb_config.h b/examples/host/msc_file_explorer/src/tusb_config.h
index bb2fd4cf5..28e130c0e 100644
--- a/examples/host/msc_file_explorer/src/tusb_config.h
+++ b/examples/host/msc_file_explorer/src/tusb_config.h
@@ -38,9 +38,9 @@
   // change to 1 if using pico-pio-usb as host controller for raspberry rp2040
   #define CFG_TUH_RPI_PIO_USB   0
   #define BOARD_TUH_RHPORT      CFG_TUH_RPI_PIO_US
-#elif CFG_TUSB_MCU == OPT_MCU_NRF5X
-  // Use external USB controller (via SPI) MAX3421E (aka usb host shield)
-  #define CFG_TUH_MAX3421      1
+//#elif CFG_TUSB_MCU == OPT_MCU_NRF5X
+//  // Use external USB controller (via SPI) MAX3421E (aka usb host shield)
+//  #define CFG_TUH_MAX3421      1
 #endif
 
 

From b31924e13edff0f29829056152348a9255e72169 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 28 Aug 2023 12:41:44 +0700
Subject: [PATCH 627/691] - add xfer_complete_isr() - merge addr0 ep to pool -
 add control status to xact in/out - use atomic flag busy to ensure only 1
 transfer is active at any time - execute pending transfer after one is
 complete (or clear busy flag) - change rtt mode to block if full

---
 hw/bsp/family_support.cmake               |   1 +
 src/portable/analog/max3421/hcd_max3421.c | 118 +++++++++++-----------
 2 files changed, 62 insertions(+), 57 deletions(-)

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 7c89427c0..1cbcfb2a7 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -216,6 +216,7 @@ function(family_configure_common TARGET RTOS)
       if (NOT TARGET segger_rtt)
         add_library(segger_rtt STATIC ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c)
         target_include_directories(segger_rtt PUBLIC ${TOP}/lib/SEGGER_RTT/RTT)
+        target_compile_definitions(segger_rtt PUBLIC SEGGER_RTT_MODE_DEFAULT=SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL)
       endif()
       target_link_libraries(${TARGET} PUBLIC segger_rtt)
     endif ()
diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index 574cca788..262dbca0f 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -195,9 +195,7 @@ typedef struct {
   uint8_t hxfr;
 
   volatile uint16_t frame_count;
-
-  max3421_ep_t ep0_addr0; // control endpoint for addr0
-  max3421_ep_t ep[CFG_TUH_MAX3421_ENDPOINT_TOTAL];
+  max3421_ep_t ep[CFG_TUH_MAX3421_ENDPOINT_TOTAL]; // [0] is reserved for addr0
 
   OSAL_MUTEX_DEF(spi_mutexdef);
 #if OSAL_MUTEX_REQUIRED
@@ -328,7 +326,7 @@ static inline void sndbc_write(uint8_t rhport, uint8_t data, bool in_isr) {
 //--------------------------------------------------------------------+
 
 static max3421_ep_t* find_ep_not_addr0(uint8_t daddr, uint8_t ep_num, uint8_t ep_dir) {
-  for(size_t i=0; i<CFG_TUH_MAX3421_ENDPOINT_TOTAL; i++) {
+  for(size_t i=1; i<CFG_TUH_MAX3421_ENDPOINT_TOTAL; i++) {
     max3421_ep_t* ep = &_hcd_data.ep[i];
     // for control endpoint, skip direction check
     if (daddr == ep->daddr && ep_num == ep->ep_num && (ep_dir == ep->ep_dir || ep_num == 0)) {
@@ -344,9 +342,17 @@ TU_ATTR_ALWAYS_INLINE static inline max3421_ep_t * allocate_ep(void) {
   return find_ep_not_addr0(0, 0, 0);
 }
 
+TU_ATTR_ALWAYS_INLINE static inline max3421_ep_t * find_opened_ep(uint8_t daddr, uint8_t ep_num, uint8_t ep_dir) {
+  if (daddr == 0 && ep_num == 0) {
+    return &_hcd_data.ep[0];
+  }else{
+    return find_ep_not_addr0(daddr, ep_num, ep_dir);
+  }
+}
+
 // free all endpoints belong to device address
 static void free_ep(uint8_t daddr) {
-  for (size_t i=0; i<CFG_TUH_MAX3421_ENDPOINT_TOTAL; i++) {
+  for (size_t i=1; i<CFG_TUH_MAX3421_ENDPOINT_TOTAL; i++) {
     max3421_ep_t* ep = &_hcd_data.ep[i];
     if (ep->daddr == daddr) {
       tu_memclr(ep, sizeof(max3421_ep_t));
@@ -354,16 +360,8 @@ static void free_ep(uint8_t daddr) {
   }
 }
 
-TU_ATTR_ALWAYS_INLINE static inline max3421_ep_t * find_opened_ep(uint8_t daddr, uint8_t ep_num, uint8_t ep_dir) {
-  if (daddr == 0 && ep_num == 0) {
-    return &_hcd_data.ep0_addr0;
-  }else{
-    return find_ep_not_addr0(daddr, ep_num, ep_dir);
-  }
-}
-
 static max3421_ep_t * find_next_pending_ep(max3421_ep_t * cur_ep) {
-  size_t idx = cur_ep - _hcd_data.ep;
+  size_t const idx = cur_ep - _hcd_data.ep;
 
   // starting from next endpoint
   for (size_t i = idx + 1; i < CFG_TUH_MAX3421_ENDPOINT_TOTAL; i++) {
@@ -553,7 +551,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t daddr, tusb_desc_endpoint_t const * e
 
   max3421_ep_t * ep;
   if (daddr == 0 && ep_num == 0) {
-    ep = &_hcd_data.ep0_addr0;
+    ep = &_hcd_data.ep[0];
   }else {
     ep = allocate_ep();
     TU_ASSERT(ep);
@@ -581,12 +579,20 @@ void xact_out(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
     reg_write(rhport, HCTL_ADDR, hctl, in_isr);
   }
 
-  uint8_t const xact_len = (uint8_t) tu_min16(ep->total_len - ep->xferred_len, ep->packet_size);
-  TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ, );
-  fifo_write(rhport, SNDFIFO_ADDR, ep->buf, xact_len, in_isr);
-  sndbc_write(rhport, xact_len, in_isr);
+  uint8_t hxfr = ep->ep_num | HXFR_OUT_NIN | (ep->is_iso ? HXFR_ISO : 0);
+
+  if (ep->ep_num == 0 && (ep->buf == NULL || ep->total_len == 0)) {
+    // Control ZLP status use HS
+    hxfr |= HXFR_HS;
+  } else {
+    uint8_t const xact_len = (uint8_t) tu_min16(ep->total_len - ep->xferred_len, ep->packet_size);
+    TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ,);
+    if (xact_len) {
+      fifo_write(rhport, SNDFIFO_ADDR, ep->buf, xact_len, in_isr);
+    }
+    sndbc_write(rhport, xact_len, in_isr);
+  }
 
-  uint8_t const hxfr = ep->ep_num | HXFR_OUT_NIN | (ep->is_iso ? HXFR_ISO : 0);
   hxfr_write(rhport, hxfr, in_isr);
 }
 
@@ -599,7 +605,12 @@ void xact_in(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
     reg_write(rhport, HCTL_ADDR, hctl, in_isr);
   }
 
-  uint8_t const hxfr = ep->ep_num | (ep->is_iso ? HXFR_ISO : 0);
+  uint8_t hxfr = ep->ep_num | (ep->is_iso ? HXFR_ISO : 0);
+  if (ep->ep_num == 0 && (ep->buf == NULL || ep->total_len == 0)) {
+    // Control ZLP status use HS
+    hxfr |= HXFR_HS;
+  }
+
   hxfr_write(rhport, hxfr, in_isr);
 }
 
@@ -611,24 +622,8 @@ TU_ATTR_ALWAYS_INLINE static inline void xact_inout(uint8_t rhport, max3421_ep_t
   }
 }
 
-void xfer_complete_isr(uint8_t rhport, max3421_ep_t *ep, xfer_result_t result, uint8_t data_toggle) {
-  (void) rhport;
-  (void) result;
-  ep->xfer_pending = 0;
-  ep->data_toggle = data_toggle;
-  //uint8_t const ep_addr = tu_edpt_addr(ep->ep_num, ep->ep_dir);
-  //hcd_event_xfer_complete(rhport, ep_addr, ep->xferred_len, result, true);
-
-//  max3421_ep_t *next_ep = find_next_pending_ep(ep);
-//  if (next_ep) {
-//    xact_inout(rhport, next_ep, true, true);
-//  }
-}
-
 // Submit a transfer, when complete hcd_event_xfer_complete() must be invoked
 bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) {
-  (void) rhport;
-
   uint8_t const ep_num = tu_edpt_number(ep_addr);
   uint8_t const ep_dir = tu_edpt_dir(ep_addr);
 
@@ -644,24 +639,12 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
   ep->xfer_complete = 0;
   ep->xfer_pending = 1;
 
+  if ( ep_num == 0 ) {
+    ep->data_toggle = 1;
+  }
+
   // carry out transfer if not busy
-//  if ( atomic_flag_test_and_set(&_hcd_data.busy) )
-  {
-    uint8_t hxfr = ep_num;
-
-    if ( ep_num == 0 ) {
-      ep->data_toggle = 1;
-      if ( buffer == NULL || buflen == 0 ) {
-        // ZLP for ACK stage, use HS
-        peraddr_write(rhport, daddr, false);
-
-        hxfr |= HXFR_HS;
-        hxfr |= (ep_dir ? 0 : HXFR_OUT_NIN);
-        hxfr_write(rhport, hxfr, false);
-        return true;
-      }
-    }
-
+  if ( !atomic_flag_test_and_set(&_hcd_data.busy) ) {
     xact_inout(rhport, ep, true, false);
   }
 
@@ -683,6 +666,8 @@ bool hcd_setup_send(uint8_t rhport, uint8_t daddr, uint8_t const setup_packet[8]
   (void) rhport;
 
   max3421_ep_t* ep = find_opened_ep(daddr, 0, 0);
+  TU_ASSERT(ep);
+
   ep->ep_dir = 0;
   ep->total_len  = 8;
   ep->xferred_len = 0;
@@ -703,6 +688,26 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
   return false;
 }
 
+//--------------------------------------------------------------------+
+// Interrupt Handler
+//--------------------------------------------------------------------+
+
+static void xfer_complete_isr(uint8_t rhport, max3421_ep_t *ep, xfer_result_t result, uint8_t data_toggle) {
+  uint8_t const ep_addr = tu_edpt_addr(ep->ep_num, ep->ep_dir);
+  ep->data_toggle = data_toggle;
+  ep->xfer_pending = 0;
+  hcd_event_xfer_complete(ep->daddr, ep_addr, ep->xferred_len, result, true);
+
+  // Find next pending endpoint
+  max3421_ep_t *next_ep = find_next_pending_ep(ep);
+  if (next_ep) {
+    xact_inout(rhport, next_ep, true, true);
+  }else {
+    // no more pending
+    atomic_flag_clear(&_hcd_data.busy);
+  }
+}
+
 static void handle_xfer_done(uint8_t rhport) {
   uint8_t const hrsl = reg_read(rhport, HRSL_ADDR, true);
   uint8_t const hresult = hrsl & HRSL_RESULT_MASK;
@@ -739,7 +744,7 @@ static void handle_xfer_done(uint8_t rhport) {
         max3421_ep_t *next_ep = find_next_pending_ep(ep);
 
         if (ep == next_ep) {
-          // only one pending, retry immediately
+          // this endpoint is only one pending, retry immediately
           hxfr_write(rhport, _hcd_data.hxfr, true);
         }else if (next_ep) {
           // switch to next pending TODO could have issue with double buffered if not clear previously out data
@@ -763,7 +768,6 @@ static void handle_xfer_done(uint8_t rhport) {
     if ( ep->xfer_complete ) {
       uint8_t const dt = (hrsl & HRSL_RCVTOGRD) ? 1 : 0; // save data toggle
       xfer_complete_isr(rhport, ep, xfer_result, dt);
-      hcd_event_xfer_complete(_hcd_data.peraddr, TUSB_DIR_IN_MASK | ep_num, ep->xferred_len, xfer_result, true);
     }else {
       // more to transfer
       hxfr_write(rhport, _hcd_data.hxfr, true);
@@ -786,8 +790,8 @@ static void handle_xfer_done(uint8_t rhport) {
     if (xact_len < ep->packet_size || ep->xferred_len >= ep->total_len) {
       uint8_t const dt = (hrsl & HRSL_SNDTOGRD) ? 1 : 0; // save data toggle
       xfer_complete_isr(rhport, ep, xfer_result, dt);
-      hcd_event_xfer_complete(_hcd_data.peraddr, ep_num, ep->xferred_len, xfer_result, true);
     } else {
+      // more to transfer
       xact_out(rhport, ep, false, true);
     }
   }

From c35061603836353e2e13c7bceafdafced1785dde Mon Sep 17 00:00:00 2001
From: yuxiaojun <yuxiaojun1011@outlook.com>
Date: Mon, 28 Aug 2023 15:24:14 +0800
Subject: [PATCH 628/691] fix:Resource leak: fp

Signed-off-by: yuxiaojun <yuxiaojun1011@outlook.com>
---
 hw/mcu/sony/cxd56/mkspk/mkspk.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/hw/mcu/sony/cxd56/mkspk/mkspk.c b/hw/mcu/sony/cxd56/mkspk/mkspk.c
index c447ad7da..3feb235f6 100644
--- a/hw/mcu/sony/cxd56/mkspk/mkspk.c
+++ b/hw/mcu/sony/cxd56/mkspk/mkspk.c
@@ -172,6 +172,7 @@ static struct elf_file *load_elf(const char *filename)
   ef = (struct elf_file *)malloc(sizeof(*ef));
   if (!ef)
     {
+      fclose(fp);
       return NULL;
     }
 
@@ -182,6 +183,7 @@ static struct elf_file *load_elf(const char *filename)
   buf = (char *)malloc(fsize);
   if (!buf)
     {
+      fclose(fp);
       return NULL;
     }
 

From 3740a3287ad5965df34639e90bfa890b36c0fd60 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 29 Aug 2023 18:22:21 +0700
Subject: [PATCH 629/691] - correct tuh_max3421e_int_api() for nrf52 -
 hcd_int_disable/enable is software only to reduce interrupt lag

---
 hw/bsp/nrf/boards/pca10056/board.h        |  9 +++
 hw/bsp/nrf/family.c                       | 20 +++++-
 src/portable/analog/max3421/hcd_max3421.c | 86 ++++++++++++++++-------
 3 files changed, 87 insertions(+), 28 deletions(-)

diff --git a/hw/bsp/nrf/boards/pca10056/board.h b/hw/bsp/nrf/boards/pca10056/board.h
index f4368f830..16d31addb 100644
--- a/hw/bsp/nrf/boards/pca10056/board.h
+++ b/hw/bsp/nrf/boards/pca10056/board.h
@@ -31,6 +31,8 @@
  extern "C" {
 #endif
 
+#define _PINNUM(port, pin)    ((port)*32 + (pin))
+
 // LED
 #define LED_PIN               13
 #define LED_STATE_ON          0
@@ -43,6 +45,13 @@
 #define UART_RX_PIN           8
 #define UART_TX_PIN           6
 
+// SPI for USB host shield
+#define MAX3421E_SCK_PIN  _PINNUM(1, 15)
+#define MAX3421E_MOSI_PIN _PINNUM(1, 13)
+#define MAX3421E_MISO_PIN _PINNUM(1, 14)
+#define MAX3421E_CS_PIN   _PINNUM(1, 12)
+#define MAX3241E_INTR_PIN _PINNUM(1, 11)
+
 #ifdef __cplusplus
  }
 #endif
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 368763b84..083efc235 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -107,7 +107,12 @@ void max3421e_int_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) {
 //--------------------------------------------------------------------+
 void tuh_max3421e_int_api(uint8_t rhport, bool enabled) {
   (void) rhport;
-  nrfx_gpiote_trigger_enable(MAX3241E_INTR_PIN, enabled);
+
+  if (enabled) {
+    nrfx_gpiote_trigger_enable(MAX3241E_INTR_PIN, true);
+  }else {
+    nrfx_gpiote_trigger_disable(MAX3241E_INTR_PIN);
+  }
 }
 
 void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
@@ -217,6 +222,19 @@ void board_init(void) {
 #endif
 
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
+  // MAX3421 need 3.3v signal
+  if ((NRF_UICR->REGOUT0 & UICR_REGOUT0_VOUT_Msk) != UICR_REGOUT0_VOUT_3V3) {
+    NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
+    while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+
+    NRF_UICR->REGOUT0 = (NRF_UICR->REGOUT0 & ~UICR_REGOUT0_VOUT_Msk) | UICR_REGOUT0_VOUT_3V3;
+
+    NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
+    while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+
+    NVIC_SystemReset();
+  }
+
   // manually manage CS
   nrf_gpio_cfg_output(MAX3421E_CS_PIN);
   tuh_max3421_spi_cs_api(0, false);
diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index 262dbca0f..cb7911992 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -184,8 +184,6 @@ typedef struct {
 } max3421_ep_t;
 
 typedef struct {
-  atomic_flag busy; // busy transferring
-
   // cached register
   uint8_t sndbc;
   uint8_t hirq;
@@ -194,7 +192,10 @@ typedef struct {
   uint8_t peraddr;
   uint8_t hxfr;
 
+  atomic_flag busy; // busy transferring
+  volatile uint8_t intr_disable_count;
   volatile uint16_t frame_count;
+
   max3421_ep_t ep[CFG_TUH_MAX3421_ENDPOINT_TOTAL]; // [0] is reserved for addr0
 
   OSAL_MUTEX_DEF(spi_mutexdef);
@@ -220,8 +221,8 @@ void tuh_max3421e_int_api(uint8_t rhport, bool enabled);
 static void max3421_spi_lock(uint8_t rhport, bool in_isr) {
   // disable interrupt and mutex lock (for pre-emptive RTOS) if not in_isr
   if (!in_isr) {
-    tuh_max3421e_int_api(rhport, false);
     (void) osal_mutex_lock(_hcd_data.spi_mutex, OSAL_TIMEOUT_WAIT_FOREVER);
+    tuh_max3421e_int_api(rhport, false);
   }
 
   // assert CS
@@ -294,6 +295,12 @@ static uint8_t reg_read(uint8_t rhport, uint8_t reg, bool in_isr) {
   return ret ? rx_buf[1] : 0;
 }
 
+static inline void hirq_write(uint8_t rhport, uint8_t data, bool in_isr) {
+  reg_write(rhport, HIRQ_ADDR, data, in_isr);
+  // HIRQ write 1 is clear
+  _hcd_data.hirq &= ~data;
+}
+
 static inline void hien_write(uint8_t rhport, uint8_t data, bool in_isr) {
   _hcd_data.hien = data;
   reg_write(rhport, HIEN_ADDR, data, in_isr);
@@ -440,13 +447,14 @@ tusb_speed_t handle_connect_irq(uint8_t rhport) {
 bool hcd_init(uint8_t rhport) {
   (void) rhport;
 
-  hcd_int_disable(rhport);
+  tuh_max3421e_int_api(rhport, false);
   tuh_max3421_spi_cs_api(rhport, false);
 
   TU_LOG2_INT(sizeof(max3421_ep_t));
   TU_LOG2_INT(sizeof(max3421_data_t));
 
   tu_memclr(&_hcd_data, sizeof(_hcd_data));
+  _hcd_data.peraddr = 0xff; // invalid
 
 #if OSAL_MUTEX_REQUIRED
   _hcd_data.spi_mutex = osal_mutex_create(&_hcd_data.spi_mutexdef);
@@ -469,11 +477,13 @@ bool hcd_init(uint8_t rhport) {
   reg_write(rhport, HCTL_ADDR, HCTL_BUSRST | HCTL_FRMRST, false);
 
   // clear all previously pending IRQ
-  reg_write(rhport, HIRQ_ADDR, 0xff, false);
+  hirq_write(rhport, 0xff, false);
 
   // Enable IRQ
   hien_write(rhport, DEFAULT_HIEN, false);
 
+  tuh_max3421e_int_api(rhport, true);
+
   // Enable Interrupt pin
   reg_write(rhport, CPUCTL_ADDR, CPUCTL_IE, false);
 
@@ -481,13 +491,21 @@ bool hcd_init(uint8_t rhport) {
 }
 
 // Enable USB interrupt
+// Not actually enable GPIO interrupt, just set variable to prevent handler to process
 void hcd_int_enable (uint8_t rhport) {
-  tuh_max3421e_int_api(rhport, true);
+  (void) rhport;
+  // tuh_max3421e_int_api(rhport, true);
+  if (_hcd_data.intr_disable_count) {
+    _hcd_data.intr_disable_count--;
+  }
 }
 
 // Disable USB interrupt
+// Not actually disable GPIO interrupt, just set variable to prevent handler to process
 void hcd_int_disable(uint8_t rhport) {
-  tuh_max3421e_int_api(rhport, false);
+  (void) rhport;
+  //tuh_max3421e_int_api(rhport, false);
+  _hcd_data.intr_disable_count++;
 }
 
 // Get frame number (1ms)
@@ -521,7 +539,7 @@ void hcd_port_reset_end(uint8_t rhport) {
   reg_write(rhport, HCTL_ADDR, 0, false);
 
   // Bus reset will also trigger CONDET IRQ, clear and re-enable it after reset
-  reg_write(rhport, HIRQ_ADDR, HIRQ_CONDET_IRQ, false);
+  hirq_write(rhport, HIRQ_CONDET_IRQ, false);
   hien_write(rhport, DEFAULT_HIEN, false);
 }
 
@@ -572,19 +590,23 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t daddr, tusb_desc_endpoint_t const * e
 void xact_out(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
   // Page 12: Programming BULK-OUT Transfers
   // TODO double buffered
-  if (switch_ep) {
-    peraddr_write(rhport, ep->daddr, in_isr);
-
-    uint8_t const hctl = (ep->data_toggle ? HCTL_SNDTOG1 : HCTL_SNDTOG0);
-    reg_write(rhport, HCTL_ADDR, hctl, in_isr);
-  }
 
   uint8_t hxfr = ep->ep_num | HXFR_OUT_NIN | (ep->is_iso ? HXFR_ISO : 0);
-
   if (ep->ep_num == 0 && (ep->buf == NULL || ep->total_len == 0)) {
     // Control ZLP status use HS
     hxfr |= HXFR_HS;
-  } else {
+  }
+
+  if (switch_ep) {
+    peraddr_write(rhport, ep->daddr, in_isr);
+
+    if ( 0 == (hxfr & HXFR_HS) ) {
+      uint8_t const hctl = (ep->data_toggle ? HCTL_SNDTOG1 : HCTL_SNDTOG0);
+      reg_write(rhport, HCTL_ADDR, hctl, in_isr);
+    }
+  }
+
+  if ( 0 == (hxfr & HXFR_HS) ) {
     uint8_t const xact_len = (uint8_t) tu_min16(ep->total_len - ep->xferred_len, ep->packet_size);
     TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ,);
     if (xact_len) {
@@ -598,12 +620,6 @@ void xact_out(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
 
 void xact_in(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
   // Page 13: Programming BULK-IN Transfers
-  if (switch_ep) {
-    peraddr_write(rhport, ep->daddr, in_isr);
-
-    uint8_t const hctl = (ep->data_toggle ? HCTL_RCVTOG1 : HCTL_RCVTOG0);
-    reg_write(rhport, HCTL_ADDR, hctl, in_isr);
-  }
 
   uint8_t hxfr = ep->ep_num | (ep->is_iso ? HXFR_ISO : 0);
   if (ep->ep_num == 0 && (ep->buf == NULL || ep->total_len == 0)) {
@@ -611,6 +627,15 @@ void xact_in(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
     hxfr |= HXFR_HS;
   }
 
+  if (switch_ep) {
+    peraddr_write(rhport, ep->daddr, in_isr);
+
+    if ( 0 == (hxfr & HXFR_HS) ) {
+      uint8_t const hctl = (ep->data_toggle ? HCTL_RCVTOG1 : HCTL_RCVTOG0);
+      reg_write(rhport, HCTL_ADDR, hctl, in_isr);
+    }
+  }
+
   hxfr_write(rhport, hxfr, in_isr);
 }
 
@@ -721,7 +746,7 @@ static void handle_xfer_done(uint8_t rhport) {
 
   xfer_result_t xfer_result;
 
-  //TU_LOG3("HRSL: %02X\r\n", hrsl);
+//  TU_LOG3("HRSL: %02X\r\n", hrsl);
   switch(hresult) {
     case HRSL_SUCCESS:
       xfer_result = XFER_RESULT_SUCCESS;
@@ -821,13 +846,20 @@ void print_hirq(uint8_t hirq) {
 void hcd_int_handler(uint8_t rhport) {
   uint8_t hirq = reg_read(rhport, HIRQ_ADDR, true) & _hcd_data.hien;
   if (!hirq) return;
-
 //  print_hirq(hirq);
 
   if (hirq & HIRQ_FRAME_IRQ) {
     _hcd_data.frame_count++;
   }
 
+  // interrupt is disabled, only ack FRAME IRQ and skip the rest
+  if (_hcd_data.intr_disable_count) {
+    if (hirq & HIRQ_FRAME_IRQ) {
+      hirq_write(rhport, HIRQ_FRAME_IRQ, true);
+    }
+    return;
+  }
+
   if (hirq & HIRQ_CONDET_IRQ) {
     tusb_speed_t speed = handle_connect_irq(rhport);
 
@@ -861,7 +893,7 @@ void hcd_int_handler(uint8_t rhport) {
         }
 
         // ack RCVDVAV IRQ
-        reg_write(rhport, HIRQ_ADDR, HIRQ_RCVDAV_IRQ, true);
+        hirq_write(rhport, HIRQ_RCVDAV_IRQ, true);
         hirq = reg_read(rhport, HIRQ_ADDR, true);
       }
 
@@ -871,7 +903,7 @@ void hcd_int_handler(uint8_t rhport) {
     }
 
     if ( hirq & HIRQ_HXFRDN_IRQ ) {
-      reg_write(rhport, HIRQ_ADDR, HIRQ_HXFRDN_IRQ, true);
+      hirq_write(rhport, HIRQ_HXFRDN_IRQ, true);
       handle_xfer_done(rhport);
     }
 
@@ -881,7 +913,7 @@ void hcd_int_handler(uint8_t rhport) {
   // clear all interrupt except SNDBAV_IRQ (never clear by us). Note RCVDAV_IRQ, HXFRDN_IRQ already clear while processing
   hirq &= ~HIRQ_SNDBAV_IRQ;
   if ( hirq ) {
-    reg_write(rhport, HIRQ_ADDR, hirq, true);
+    hirq_write(rhport, hirq, true);
   }
 }
 

From 2a814a99af32bf084cbb730d97e3c9cb31a3fa85 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 29 Aug 2023 20:27:37 +0700
Subject: [PATCH 630/691] - hcd_setup_send() also check for busy flag -
 xact_inout() to support send setup

---
 src/portable/analog/max3421/hcd_max3421.c | 71 +++++++++++++----------
 1 file changed, 39 insertions(+), 32 deletions(-)

diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index cb7911992..461e02593 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -168,6 +168,7 @@ typedef struct {
   struct TU_ATTR_PACKED {
     uint8_t ep_dir        : 1;
     uint8_t is_iso        : 1;
+    uint8_t is_setup      : 1;
     uint8_t data_toggle   : 1;
     uint8_t xfer_pending  : 1;
     uint8_t xfer_complete : 1;
@@ -590,56 +591,55 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t daddr, tusb_desc_endpoint_t const * e
 void xact_out(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
   // Page 12: Programming BULK-OUT Transfers
   // TODO double buffered
-
-  uint8_t hxfr = ep->ep_num | HXFR_OUT_NIN | (ep->is_iso ? HXFR_ISO : 0);
-  if (ep->ep_num == 0 && (ep->buf == NULL || ep->total_len == 0)) {
-    // Control ZLP status use HS
-    hxfr |= HXFR_HS;
-  }
-
   if (switch_ep) {
     peraddr_write(rhport, ep->daddr, in_isr);
 
-    if ( 0 == (hxfr & HXFR_HS) ) {
-      uint8_t const hctl = (ep->data_toggle ? HCTL_SNDTOG1 : HCTL_SNDTOG0);
-      reg_write(rhport, HCTL_ADDR, hctl, in_isr);
-    }
+    uint8_t const hctl = (ep->data_toggle ? HCTL_SNDTOG1 : HCTL_SNDTOG0);
+    reg_write(rhport, HCTL_ADDR, hctl, in_isr);
   }
 
-  if ( 0 == (hxfr & HXFR_HS) ) {
-    uint8_t const xact_len = (uint8_t) tu_min16(ep->total_len - ep->xferred_len, ep->packet_size);
-    TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ,);
-    if (xact_len) {
-      fifo_write(rhport, SNDFIFO_ADDR, ep->buf, xact_len, in_isr);
-    }
-    sndbc_write(rhport, xact_len, in_isr);
+  uint8_t const xact_len = (uint8_t) tu_min16(ep->total_len - ep->xferred_len, ep->packet_size);
+  TU_ASSERT(_hcd_data.hirq & HIRQ_SNDBAV_IRQ,);
+  if (xact_len) {
+    fifo_write(rhport, SNDFIFO_ADDR, ep->buf, xact_len, in_isr);
   }
+  sndbc_write(rhport, xact_len, in_isr);
 
+  uint8_t hxfr = ep->ep_num | HXFR_OUT_NIN | (ep->is_iso ? HXFR_ISO : 0);
   hxfr_write(rhport, hxfr, in_isr);
 }
 
 void xact_in(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
   // Page 13: Programming BULK-IN Transfers
-
-  uint8_t hxfr = ep->ep_num | (ep->is_iso ? HXFR_ISO : 0);
-  if (ep->ep_num == 0 && (ep->buf == NULL || ep->total_len == 0)) {
-    // Control ZLP status use HS
-    hxfr |= HXFR_HS;
-  }
-
   if (switch_ep) {
     peraddr_write(rhport, ep->daddr, in_isr);
 
-    if ( 0 == (hxfr & HXFR_HS) ) {
-      uint8_t const hctl = (ep->data_toggle ? HCTL_RCVTOG1 : HCTL_RCVTOG0);
-      reg_write(rhport, HCTL_ADDR, hctl, in_isr);
-    }
+    uint8_t const hctl = (ep->data_toggle ? HCTL_RCVTOG1 : HCTL_RCVTOG0);
+    reg_write(rhport, HCTL_ADDR, hctl, in_isr);
   }
 
+  uint8_t hxfr = ep->ep_num | (ep->is_iso ? HXFR_ISO : 0);
   hxfr_write(rhport, hxfr, in_isr);
 }
 
 TU_ATTR_ALWAYS_INLINE static inline void xact_inout(uint8_t rhport, max3421_ep_t *ep, bool switch_ep, bool in_isr) {
+  if (ep->ep_num == 0 ) {
+    // setup
+    if (ep->is_setup) {
+      peraddr_write(rhport, ep->daddr, in_isr);
+      hxfr_write(rhport, HXFR_SETUP, in_isr);
+      return;
+    }
+
+    // status
+    if (ep->buf == NULL || ep->total_len == 0) {
+      uint8_t const hxfr = HXFR_HS | (ep->ep_dir ? 0 : HXFR_OUT_NIN);
+      peraddr_write(rhport, ep->daddr, in_isr);
+      hxfr_write(rhport, hxfr, in_isr);
+      return;
+    }
+  }
+
   if (ep->ep_dir) {
     xact_in(rhport, ep, switch_ep, in_isr);
   }else {
@@ -665,12 +665,15 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
   ep->xfer_pending = 1;
 
   if ( ep_num == 0 ) {
+    ep->is_setup = 0;
     ep->data_toggle = 1;
   }
 
   // carry out transfer if not busy
   if ( !atomic_flag_test_and_set(&_hcd_data.busy) ) {
     xact_inout(rhport, ep, true, false);
+  } else {
+    return true;
   }
 
   return true;
@@ -694,12 +697,16 @@ bool hcd_setup_send(uint8_t rhport, uint8_t daddr, uint8_t const setup_packet[8]
   TU_ASSERT(ep);
 
   ep->ep_dir = 0;
-  ep->total_len  = 8;
+  ep->total_len = 8;
   ep->xferred_len = 0;
+  ep->is_setup = 1;
 
-  peraddr_write(rhport, daddr, false);
   fifo_write(rhport, SUDFIFO_ADDR, setup_packet, 8, false);
-  hxfr_write(rhport, HXFR_SETUP, false);
+
+  // carry out transfer if not busy
+  if ( !atomic_flag_test_and_set(&_hcd_data.busy) ) {
+    xact_inout(rhport, ep, true, false);
+  }
 
   return true;
 }

From 1ab488eb06ef4cb8ad9c0cff91e6b0caf76f73c4 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 30 Aug 2023 16:04:18 +0700
Subject: [PATCH 631/691] call xfer_complete_isr() when result is not
 successful (stalled or failed)

---
 hw/bsp/nrf/boards/pca10095/board.h        |  9 +++++
 hw/bsp/nrf/family.c                       |  7 ++--
 hw/bsp/nrf/nrfx_config.h                  |  2 +-
 src/common/tusb_mcu.h                     |  2 +-
 src/portable/analog/max3421/hcd_max3421.c | 43 ++++++++++++++++-------
 5 files changed, 47 insertions(+), 16 deletions(-)

diff --git a/hw/bsp/nrf/boards/pca10095/board.h b/hw/bsp/nrf/boards/pca10095/board.h
index fd3c63d6a..b9d3a19dc 100644
--- a/hw/bsp/nrf/boards/pca10095/board.h
+++ b/hw/bsp/nrf/boards/pca10095/board.h
@@ -31,6 +31,8 @@
  extern "C" {
 #endif
 
+#define _PINNUM(port, pin)    ((port)*32 + (pin))
+
 // LED
 #define LED_PIN               28
 #define LED_STATE_ON          0
@@ -43,6 +45,13 @@
 #define UART_RX_PIN           32
 #define UART_TX_PIN           33
 
+// SPI for USB host shield
+#define MAX3421E_SCK_PIN  _PINNUM(1, 15)
+#define MAX3421E_MOSI_PIN _PINNUM(1, 13)
+#define MAX3421E_MISO_PIN _PINNUM(1, 14)
+#define MAX3421E_CS_PIN   _PINNUM(1, 12)
+#define MAX3241E_INTR_PIN _PINNUM(1, 11)
+
 #ifdef __cplusplus
  }
 #endif
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 083efc235..2b4260083 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -34,6 +34,7 @@
 #pragma GCC diagnostic ignored "-Wcast-align"
 #pragma GCC diagnostic ignored "-Wunused-parameter"
 #pragma GCC diagnostic ignored "-Wundef"
+#pragma GCC diagnostic ignored "-Wredundant-decls"
 #endif
 
 #include "nrfx.h"
@@ -94,7 +95,7 @@ TU_ATTR_UNUSED static void power_event_handler(nrfx_power_usb_evt_t event) {
 
 //------------- Host using MAX2341E -------------//
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
-static nrfx_spim_t _spi = NRFX_SPIM_INSTANCE(0);
+static nrfx_spim_t _spi = NRFX_SPIM_INSTANCE(1);
 
 void max3421e_int_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) {
   if ( !(pin == MAX3241E_INTR_PIN && action == NRF_GPIOTE_POLARITY_HITOLO) ) return;
@@ -222,7 +223,8 @@ void board_init(void) {
 #endif
 
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
-  // MAX3421 need 3.3v signal
+  // MAX3421 need 3.3v signal (may not be needed)
+  #if defined(UICR_REGOUT0_VOUT_Msk) && 0
   if ((NRF_UICR->REGOUT0 & UICR_REGOUT0_VOUT_Msk) != UICR_REGOUT0_VOUT_3V3) {
     NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
     while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
@@ -234,6 +236,7 @@ void board_init(void) {
 
     NVIC_SystemReset();
   }
+  #endif
 
   // manually manage CS
   nrf_gpio_cfg_output(MAX3421E_CS_PIN);
diff --git a/hw/bsp/nrf/nrfx_config.h b/hw/bsp/nrf/nrfx_config.h
index e3d0ea91b..95ef33ce4 100644
--- a/hw/bsp/nrf/nrfx_config.h
+++ b/hw/bsp/nrf/nrfx_config.h
@@ -11,7 +11,7 @@
 #define NRFX_UARTE0_ENABLED  1
 
 #define NRFX_SPIM_ENABLED    1
-#define NRFX_SPIM0_ENABLED   1
+#define NRFX_SPIM1_ENABLED   1 // use SPI1 since nrf5340 share uart with spi
 
 #define NRFX_PRS_ENABLED     0
 #define NRFX_USBREG_ENABLED  1
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 21939df7c..8807ff8aa 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -390,7 +390,7 @@
 // External USB controller
 //--------------------------------------------------------------------+
 
-#if defined(CFG_TUH_MAX3421) & CFG_TUH_MAX3421
+#if defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
   #ifndef CFG_TUH_MAX3421_ENDPOINT_TOTAL
     #define CFG_TUH_MAX3421_ENDPOINT_TOTAL  (8 + 4*(CFG_TUH_DEVICE_MAX-1))
   #endif
diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index 461e02593..705bb5bfd 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -374,7 +374,8 @@ static max3421_ep_t * find_next_pending_ep(max3421_ep_t * cur_ep) {
   // starting from next endpoint
   for (size_t i = idx + 1; i < CFG_TUH_MAX3421_ENDPOINT_TOTAL; i++) {
     max3421_ep_t* ep = &_hcd_data.ep[i];
-    if (ep->xfer_pending) {
+    if (ep->xfer_pending && ep->packet_size) {
+//      TU_LOG3("next pending i = %u\n", i);
       return ep;
     }
   }
@@ -382,7 +383,8 @@ static max3421_ep_t * find_next_pending_ep(max3421_ep_t * cur_ep) {
   // wrap around including current endpoint
   for (size_t i = 0; i <= idx; i++) {
     max3421_ep_t* ep = &_hcd_data.ep[i];
-    if (ep->xfer_pending) {
+    if (ep->xfer_pending && ep->packet_size) {
+//      TU_LOG3("next pending i = %u\n", i);
       return ep;
     }
   }
@@ -464,6 +466,10 @@ bool hcd_init(uint8_t rhport) {
   // full duplex, interrupt negative edge
   reg_write(rhport, PINCTL_ADDR, PINCTL_FDUPSPI, false);
 
+  // V1 is 0x01, V2 is 0x12, V3 is 0x13
+  // uint8_t const revision = reg_read(rhport, REVISION_ADDR, false);
+  // TU_LOG2_HEX(revision);
+
   // reset
   reg_write(rhport, USBCTL_ADDR, USBCTL_CHIPRES, false);
   reg_write(rhport, USBCTL_ADDR, 0, false);
@@ -699,6 +705,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t daddr, uint8_t const setup_packet[8]
   ep->ep_dir = 0;
   ep->total_len = 8;
   ep->xferred_len = 0;
+  ep->xfer_pending = 1;
   ep->is_setup = 1;
 
   fifo_write(rhport, SUDFIFO_ADDR, setup_packet, 8, false);
@@ -724,9 +731,16 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
 // Interrupt Handler
 //--------------------------------------------------------------------+
 
-static void xfer_complete_isr(uint8_t rhport, max3421_ep_t *ep, xfer_result_t result, uint8_t data_toggle) {
+static void xfer_complete_isr(uint8_t rhport, max3421_ep_t *ep, xfer_result_t result, uint8_t hrsl) {
   uint8_t const ep_addr = tu_edpt_addr(ep->ep_num, ep->ep_dir);
-  ep->data_toggle = data_toggle;
+
+  // save data toggle
+  if (ep->ep_dir) {
+    ep->data_toggle = (hrsl & HRSL_RCVTOGRD) ? 1 : 0;
+  }else {
+    ep->data_toggle = (hrsl & HRSL_SNDTOGRD) ? 1 : 0;
+  }
+
   ep->xfer_pending = 0;
   hcd_event_xfer_complete(ep->daddr, ep_addr, ep->xferred_len, result, true);
 
@@ -763,10 +777,6 @@ static void handle_xfer_done(uint8_t rhport) {
       xfer_result = XFER_RESULT_STALLED;
       break;
 
-    case HRSL_BAD_REQ:
-      // occurred when initialized without any pending transfer. Skip for now
-      return;
-
     case HRSL_NAK:
       if (ep_num == 0) {
         // NAK on control, retry immediately
@@ -781,15 +791,26 @@ static void handle_xfer_done(uint8_t rhport) {
         }else if (next_ep) {
           // switch to next pending TODO could have issue with double buffered if not clear previously out data
           xact_inout(rhport, next_ep, true, true);
+        }else {
+          TU_ASSERT(false,);
         }
       }
       return;
 
+    case HRSL_BAD_REQ:
+      // occurred when initialized without any pending transfer. Skip for now
+      return;
+
     default:
       xfer_result = XFER_RESULT_FAILED;
       break;
   }
 
+  if (xfer_result != XFER_RESULT_SUCCESS) {
+    xfer_complete_isr(rhport, ep, xfer_result, hrsl);
+    return;
+  }
+
   if (ep_dir) {
     // IN transfer: fifo data is already received in RCVDAV IRQ
     if ( hxfr_type & HXFR_HS ) {
@@ -798,8 +819,7 @@ static void handle_xfer_done(uint8_t rhport) {
 
     // short packet or all bytes transferred
     if ( ep->xfer_complete ) {
-      uint8_t const dt = (hrsl & HRSL_RCVTOGRD) ? 1 : 0; // save data toggle
-      xfer_complete_isr(rhport, ep, xfer_result, dt);
+      xfer_complete_isr(rhport, ep, xfer_result, hrsl);
     }else {
       // more to transfer
       hxfr_write(rhport, _hcd_data.hxfr, true);
@@ -820,8 +840,7 @@ static void handle_xfer_done(uint8_t rhport) {
     ep->buf += xact_len;
 
     if (xact_len < ep->packet_size || ep->xferred_len >= ep->total_len) {
-      uint8_t const dt = (hrsl & HRSL_SNDTOGRD) ? 1 : 0; // save data toggle
-      xfer_complete_isr(rhport, ep, xfer_result, dt);
+      xfer_complete_isr(rhport, ep, xfer_result, hrsl);
     } else {
       // more to transfer
       xact_out(rhport, ep, false, true);

From 41493426b38c8ce44b1f7720b907538bc5402f98 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 30 Aug 2023 16:21:43 +0700
Subject: [PATCH 632/691] use ep buf to keep setup packet, work well with hid
 device

---
 examples/host/msc_file_explorer/src/tusb_config.h | 2 +-
 src/portable/analog/max3421/hcd_max3421.c         | 7 ++++---
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/examples/host/msc_file_explorer/src/tusb_config.h b/examples/host/msc_file_explorer/src/tusb_config.h
index 28e130c0e..e6186ba46 100644
--- a/examples/host/msc_file_explorer/src/tusb_config.h
+++ b/examples/host/msc_file_explorer/src/tusb_config.h
@@ -37,7 +37,7 @@
 #if CFG_TUSB_MCU == OPT_MCU_RP2040
   // change to 1 if using pico-pio-usb as host controller for raspberry rp2040
   #define CFG_TUH_RPI_PIO_USB   0
-  #define BOARD_TUH_RHPORT      CFG_TUH_RPI_PIO_US
+  #define BOARD_TUH_RHPORT      CFG_TUH_RPI_PIO_USB
 //#elif CFG_TUSB_MCU == OPT_MCU_NRF5X
 //  // Use external USB controller (via SPI) MAX3421E (aka usb host shield)
 //  #define CFG_TUH_MAX3421      1
diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index 705bb5bfd..d644390da 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -633,6 +633,7 @@ TU_ATTR_ALWAYS_INLINE static inline void xact_inout(uint8_t rhport, max3421_ep_t
     // setup
     if (ep->is_setup) {
       peraddr_write(rhport, ep->daddr, in_isr);
+      fifo_write(rhport, SUDFIFO_ADDR, ep->buf, 8, in_isr);
       hxfr_write(rhport, HXFR_SETUP, in_isr);
       return;
     }
@@ -703,12 +704,12 @@ bool hcd_setup_send(uint8_t rhport, uint8_t daddr, uint8_t const setup_packet[8]
   TU_ASSERT(ep);
 
   ep->ep_dir = 0;
+  ep->is_setup = 1;
+  ep->buf = (uint8_t*)(uintptr_t) setup_packet;
   ep->total_len = 8;
   ep->xferred_len = 0;
+  ep->xfer_complete = 0;
   ep->xfer_pending = 1;
-  ep->is_setup = 1;
-
-  fifo_write(rhport, SUDFIFO_ADDR, setup_packet, 8, false);
 
   // carry out transfer if not busy
   if ( !atomic_flag_test_and_set(&_hcd_data.busy) ) {

From 3b7d5aa0421f3d3a7ac199de0138dc40141fbddd Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 31 Aug 2023 16:52:09 +0700
Subject: [PATCH 633/691] improve connection & disconnection detection. But
 there is still issue when CONDETIRQ occurs but we are disabled interrupt (for
 osal queue access).

---
 hw/bsp/board.c                            | 26 +++----
 hw/bsp/nrf/family.c                       | 49 ++++++-------
 src/host/usbh.c                           |  2 +-
 src/portable/analog/max3421/hcd_max3421.c | 89 +++++++++++------------
 4 files changed, 74 insertions(+), 92 deletions(-)

diff --git a/hw/bsp/board.c b/hw/bsp/board.c
index 417630a03..562792625 100644
--- a/hw/bsp/board.c
+++ b/hw/bsp/board.c
@@ -44,17 +44,16 @@
 
 // If using SES IDE, use the Syscalls/SEGGER_RTT_Syscalls_SES.c instead
 #if !(defined __SES_ARM) && !(defined __SES_RISCV) && !(defined __CROSSWORKS_ARM)
+
 #include "SEGGER_RTT.h"
 
-TU_ATTR_USED int sys_write (int fhdl, const void *buf, size_t count)
-{
+TU_ATTR_USED int sys_write(int fhdl, const void *buf, size_t count) {
   (void) fhdl;
-  SEGGER_RTT_Write(0, (const char*) buf, (int) count);
+  SEGGER_RTT_Write(0, (const char *) buf, (int) count);
   return count;
 }
 
-TU_ATTR_USED int sys_read (int fhdl, char *buf, size_t count)
-{
+TU_ATTR_USED int sys_read(int fhdl, char *buf, size_t count) {
   (void) fhdl;
   int rd = (int) SEGGER_RTT_Read(0, buf, count);
   return (rd > 0) ? rd : -1;
@@ -67,8 +66,7 @@ TU_ATTR_USED int sys_read (int fhdl, char *buf, size_t count)
 
 #include "board_mcu.h"
 
-TU_ATTR_USED int sys_write (int fhdl, const void *buf, size_t count)
-{
+TU_ATTR_USED int sys_write (int fhdl, const void *buf, size_t count) {
   (void) fhdl;
   uint8_t const* buf8 = (uint8_t const*) buf;
 
@@ -79,8 +77,7 @@ TU_ATTR_USED int sys_write (int fhdl, const void *buf, size_t count)
   return (int) count;
 }
 
-TU_ATTR_USED int sys_read (int fhdl, char *buf, size_t count)
-{
+TU_ATTR_USED int sys_read (int fhdl, char *buf, size_t count) {
   (void) fhdl;
   (void) buf;
   (void) count;
@@ -90,14 +87,12 @@ TU_ATTR_USED int sys_read (int fhdl, char *buf, size_t count)
 #else
 
 // Default logging with on-board UART
-TU_ATTR_USED int sys_write (int fhdl, const void *buf, size_t count)
-{
+TU_ATTR_USED int sys_write (int fhdl, const void *buf, size_t count) {
   (void) fhdl;
   return board_uart_write(buf, (int) count);
 }
 
-TU_ATTR_USED int sys_read (int fhdl, char *buf, size_t count)
-{
+TU_ATTR_USED int sys_read (int fhdl, char *buf, size_t count) {
   (void) fhdl;
   int rd = board_uart_read((uint8_t*) buf, (int) count);
   return (rd > 0) ? rd : -1;
@@ -105,8 +100,7 @@ TU_ATTR_USED int sys_read (int fhdl, char *buf, size_t count)
 
 #endif
 
-int board_getchar(void)
-{
+int board_getchar(void) {
   char c;
-  return ( sys_read(0, &c, 1) > 0 ) ? (int) c : (-1);
+  return (sys_read(0, &c, 1) > 0) ? (int) c : (-1);
 }
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 2b4260083..7358458ce 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -98,7 +98,7 @@ TU_ATTR_UNUSED static void power_event_handler(nrfx_power_usb_evt_t event) {
 static nrfx_spim_t _spi = NRFX_SPIM_INSTANCE(1);
 
 void max3421e_int_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) {
-  if ( !(pin == MAX3241E_INTR_PIN && action == NRF_GPIOTE_POLARITY_HITOLO) ) return;
+  if (!(pin == MAX3241E_INTR_PIN && action == NRF_GPIOTE_POLARITY_HITOLO)) return;
 
   tuh_int_handler(1);
 }
@@ -111,7 +111,7 @@ void tuh_max3421e_int_api(uint8_t rhport, bool enabled) {
 
   if (enabled) {
     nrfx_gpiote_trigger_enable(MAX3241E_INTR_PIN, true);
-  }else {
+  } else {
     nrfx_gpiote_trigger_disable(MAX3241E_INTR_PIN);
   }
 }
@@ -121,7 +121,7 @@ void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
   nrf_gpio_pin_write(MAX3421E_CS_PIN, active ? 0 : 1);
 }
 
-bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_len, uint8_t * rx_buf, size_t rx_len) {
+bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_len, uint8_t *rx_buf, size_t rx_len) {
   (void) rhport;
 
   nrfx_spim_xfer_desc_t xfer = {
@@ -157,21 +157,21 @@ void board_init(void) {
   nrf_gpio_cfg_input(BUTTON_PIN, NRF_GPIO_PIN_PULLUP);
 
   // 1ms tick timer
-  SysTick_Config(SystemCoreClock/1000);
+  SysTick_Config(SystemCoreClock / 1000);
 
   // UART
   nrfx_uarte_config_t uart_cfg = {
-    .pseltxd   = UART_TX_PIN,
-    .pselrxd   = UART_RX_PIN,
-    .pselcts   = NRF_UARTE_PSEL_DISCONNECTED,
-    .pselrts   = NRF_UARTE_PSEL_DISCONNECTED,
-    .p_context = NULL,
-    .baudrate  = NRF_UARTE_BAUDRATE_115200, // CFG_BOARD_UART_BAUDRATE
-    .interrupt_priority = 7,
-    .hal_cfg = {
-      .hwfc      = NRF_UARTE_HWFC_DISABLED,
-      .parity    = NRF_UARTE_PARITY_EXCLUDED,
-    }
+      .pseltxd   = UART_TX_PIN,
+      .pselrxd   = UART_RX_PIN,
+      .pselcts   = NRF_UARTE_PSEL_DISCONNECTED,
+      .pselrts   = NRF_UARTE_PSEL_DISCONNECTED,
+      .p_context = NULL,
+      .baudrate  = NRF_UARTE_BAUDRATE_115200, // CFG_BOARD_UART_BAUDRATE
+      .interrupt_priority = 7,
+      .hal_cfg = {
+          .hwfc      = NRF_UARTE_HWFC_DISABLED,
+          .parity    = NRF_UARTE_PARITY_EXCLUDED,
+      }
   };
 
   nrfx_uarte_init(&_uart_id, &uart_cfg, NULL); //uart_handler);
@@ -211,11 +211,11 @@ void board_init(void) {
 
     // USB power may already be ready at this time -> no event generated
     // We need to invoke the handler based on the status initially
-    #ifdef NRF5340_XXAA
+#ifdef NRF5340_XXAA
     usb_reg = NRF_USBREGULATOR->USBREGSTATUS;
-    #else
+#else
     usb_reg = NRF_POWER->USBREGSTATUS;
-    #endif
+#endif
   }
 
   if ( usb_reg & VBUSDETECT_Msk ) tusb_hal_nrf_power_event(USB_EVT_DETECTED);
@@ -308,8 +308,7 @@ uint32_t board_millis(void) {
 
 #ifdef SOFTDEVICE_PRESENT
 // process SOC event from SD
-uint32_t proc_soc(void)
-{
+uint32_t proc_soc(void) {
   uint32_t soc_evt;
   uint32_t err = sd_evt_get(&soc_evt);
 
@@ -326,18 +325,14 @@ uint32_t proc_soc(void)
   return err;
 }
 
-uint32_t proc_ble(void)
-{
+uint32_t proc_ble(void) {
   // do nothing with ble
   return NRF_ERROR_NOT_FOUND;
 }
 
-void SD_EVT_IRQHandler(void)
-{
+void SD_EVT_IRQHandler(void) {
   // process BLE and SOC until there is no more events
-  while( (NRF_ERROR_NOT_FOUND != proc_ble()) || (NRF_ERROR_NOT_FOUND != proc_soc()) )
-  {
-
+  while( (NRF_ERROR_NOT_FOUND != proc_ble()) || (NRF_ERROR_NOT_FOUND != proc_soc()) ) {
   }
 }
 
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 12a7f5839..bacb3a719 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -852,7 +852,7 @@ bool usbh_edpt_xfer_with_callback(uint8_t dev_addr, uint8_t ep_addr, uint8_t * b
     ep_state->busy    = 0;
     ep_state->claimed = 0;
     TU_LOG1("Failed\r\n");
-    TU_BREAKPOINT();
+//    TU_BREAKPOINT();
     return false;
   }
 }
diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index d644390da..56d3aea45 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -405,45 +405,46 @@ bool hcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) {
   return false;
 }
 
-tusb_speed_t handle_connect_irq(uint8_t rhport) {
+static void handle_connect_irq(uint8_t rhport) {
   uint8_t const hrsl = reg_read(rhport, HRSL_ADDR, true);
   uint8_t const jk = hrsl & (HRSL_JSTATUS | HRSL_KSTATUS);
 
-  tusb_speed_t speed;
   uint8_t new_mode = MODE_DPPULLDN | MODE_DMPULLDN | MODE_HOST;
+  TU_LOG2_HEX(jk);
 
   switch(jk) {
-    case 0x00:
-      // SEO is disconnected
-      speed = TUSB_SPEED_INVALID;
-      break;
-
-    case (HRSL_JSTATUS | HRSL_KSTATUS):
-      // SE1 is illegal
-      speed = TUSB_SPEED_INVALID;
+    case 0x00:                          // SEO is disconnected
+    case (HRSL_JSTATUS | HRSL_KSTATUS): // SE1 is illegal
+      mode_write(rhport, new_mode, true);
+      hcd_event_device_remove(rhport, true);
       break;
 
     default: {
-      // Low speed if (LS = 1 and J-state) or (LS = 0 and K-State)
-      uint8_t const mode = reg_read(rhport, MODE_ADDR, true);
-      uint8_t const ls_bit = mode & MODE_LOWSPEED;
-
-      if ( (ls_bit && (jk == HRSL_JSTATUS)) || (!ls_bit && (jk == HRSL_KSTATUS)) ) {
-        speed = TUSB_SPEED_LOW;
-        new_mode |= MODE_LOWSPEED;
-      } else {
-        speed =  TUSB_SPEED_FULL;
+      // Bus Reset also cause CONDET IRQ, skip if we are already connected and doing bus reset
+      if ((_hcd_data.hirq & HIRQ_BUSEVENT_IRQ) && (_hcd_data.mode & MODE_SOFKAENAB)) {
+        break;
       }
 
-      new_mode |= MODE_SOFKAENAB; // enable SOF since there is new device
+      // Low speed if (LS = 1 and J-state) or (LS = 0 and K-State)
+      // However, since we are always in full speed mode, we can just check J-state
+      if (jk == HRSL_KSTATUS) {
+        new_mode |= MODE_LOWSPEED;
+        TU_LOG3("Low speed\n");
+      }else {
+        TU_LOG3("Full speed\n");
+      }
+      new_mode |= MODE_SOFKAENAB;
+      mode_write(rhport, new_mode, true);
+
+      // FIXME multiple MAX3421 rootdevice address is not 1
+      uint8_t const daddr = 1;
+      free_ep(daddr);
+
+      hcd_event_device_attach(rhport, true);
 
       break;
     }
   }
-
-  mode_write(rhport, new_mode, true);
-  TU_LOG2_INT(speed);
-  return speed;
 }
 
 // Initialize controller to host mode
@@ -500,8 +501,9 @@ bool hcd_init(uint8_t rhport) {
 // Enable USB interrupt
 // Not actually enable GPIO interrupt, just set variable to prevent handler to process
 void hcd_int_enable (uint8_t rhport) {
+//  tuh_max3421e_int_api(rhport, true);
+
   (void) rhport;
-  // tuh_max3421e_int_api(rhport, true);
   if (_hcd_data.intr_disable_count) {
     _hcd_data.intr_disable_count--;
   }
@@ -510,8 +512,8 @@ void hcd_int_enable (uint8_t rhport) {
 // Disable USB interrupt
 // Not actually disable GPIO interrupt, just set variable to prevent handler to process
 void hcd_int_disable(uint8_t rhport) {
-  (void) rhport;
   //tuh_max3421e_int_api(rhport, false);
+  (void) rhport;
   _hcd_data.intr_disable_count++;
 }
 
@@ -534,20 +536,12 @@ bool hcd_port_connect_status(uint8_t rhport) {
 // Reset USB bus on the port. Return immediately, bus reset sequence may not be complete.
 // Some port would require hcd_port_reset_end() to be invoked after 10ms to complete the reset sequence.
 void hcd_port_reset(uint8_t rhport) {
-  // Bus reset will also trigger CONDET IRQ, disable it
-  uint8_t const hien = DEFAULT_HIEN & ~HIRQ_CONDET_IRQ;
-  hien_write(rhport, hien, false);
-
   reg_write(rhport, HCTL_ADDR, HCTL_BUSRST, false);
 }
 
 // Complete bus reset sequence, may be required by some controllers
 void hcd_port_reset_end(uint8_t rhport) {
   reg_write(rhport, HCTL_ADDR, 0, false);
-
-  // Bus reset will also trigger CONDET IRQ, clear and re-enable it after reset
-  hirq_write(rhport, HIRQ_CONDET_IRQ, false);
-  hien_write(rhport, DEFAULT_HIEN, false);
 }
 
 // Get port link speed
@@ -660,7 +654,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t daddr, uint8_t ep_addr, uint8_t * buf
   uint8_t const ep_dir = tu_edpt_dir(ep_addr);
 
   max3421_ep_t* ep = find_opened_ep(daddr, ep_num, ep_dir);
-  TU_ASSERT(ep);
+  TU_VERIFY(ep);
 
   // control transfer can switch direction
   ep->ep_dir = ep_dir;
@@ -767,8 +761,6 @@ static void handle_xfer_done(uint8_t rhport) {
   TU_ASSERT(ep, );
 
   xfer_result_t xfer_result;
-
-//  TU_LOG3("HRSL: %02X\r\n", hrsl);
   switch(hresult) {
     case HRSL_SUCCESS:
       xfer_result = XFER_RESULT_SUCCESS;
@@ -803,6 +795,7 @@ static void handle_xfer_done(uint8_t rhport) {
       return;
 
     default:
+      TU_LOG3("HRSL: %02X\r\n", hrsl);
       xfer_result = XFER_RESULT_FAILED;
       break;
   }
@@ -875,30 +868,30 @@ void hcd_int_handler(uint8_t rhport) {
   if (!hirq) return;
 //  print_hirq(hirq);
 
+//  uint8_t hirq = reg_read(rhport, HIRQ_ADDR, true);
+
   if (hirq & HIRQ_FRAME_IRQ) {
     _hcd_data.frame_count++;
   }
 
+  #if 1
   // interrupt is disabled, only ack FRAME IRQ and skip the rest
   if (_hcd_data.intr_disable_count) {
     if (hirq & HIRQ_FRAME_IRQ) {
       hirq_write(rhport, HIRQ_FRAME_IRQ, true);
     }
+
+    if ((hirq & HIRQ_CONDET_IRQ) && !(_hcd_data.mode & MODE_SOFKAENAB)) {
+      // connection when interrupt is disabled
+      TU_LOG3_INT(_hcd_data.intr_disable_count);
+      return;
+    }
     return;
   }
+  #endif
 
   if (hirq & HIRQ_CONDET_IRQ) {
-    tusb_speed_t speed = handle_connect_irq(rhport);
-
-    if (speed == TUSB_SPEED_INVALID) {
-      hcd_event_device_remove(rhport, true);
-    }else {
-      // FIXME multiple MAX3421 rootdevice address is not 1
-      uint8_t const daddr = 1;
-      free_ep(daddr);
-
-      hcd_event_device_attach(rhport, true);
-    }
+    handle_connect_irq(rhport);
   }
 
   // queue more transfer in handle_xfer_done() can cause hirq to be set again while external IRQ may not catch and/or

From ed0a233d4830baa8a767fcc20dcbfedbb09b7b41 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 31 Aug 2023 21:28:27 +0700
Subject: [PATCH 634/691] vastly improve attach/detach device, still have issue
 where thing is still hanged occasionally.

---
 src/portable/analog/max3421/hcd_max3421.c | 126 ++++++++++++----------
 1 file changed, 70 insertions(+), 56 deletions(-)

diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index 56d3aea45..c61389cb9 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -215,6 +215,9 @@ void tuh_max3421_spi_cs_api(uint8_t rhport, bool active);
 bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_len, uint8_t * rx_buf, size_t rx_len);
 void tuh_max3421e_int_api(uint8_t rhport, bool enabled);
 
+static void handle_connect_irq(uint8_t rhport, bool in_isr);
+static inline void hirq_write(uint8_t rhport, uint8_t data, bool in_isr);
+
 //--------------------------------------------------------------------+
 // SPI Helper
 //--------------------------------------------------------------------+
@@ -238,6 +241,14 @@ static void max3421_spi_unlock(uint8_t rhport, bool in_isr) {
   if (!in_isr) {
     tuh_max3421e_int_api(rhport, true);
     (void) osal_mutex_unlock(_hcd_data.spi_mutex);
+
+    // when re-enable interrupt, we may miss INTR edge (usually via GPIO detection interrupt).
+    // It would be ok if we are operating since SOF will re-trigger interrupt.
+    // However, for CONDET_IRQ i.e host not operating therefore we need to manually handle it here.
+    if (_hcd_data.hirq & HIRQ_CONDET_IRQ) {
+      handle_connect_irq(rhport, false);
+      hirq_write(rhport, HIRQ_CONDET_IRQ, false);
+    }
   }
 }
 
@@ -405,48 +416,6 @@ bool hcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) {
   return false;
 }
 
-static void handle_connect_irq(uint8_t rhport) {
-  uint8_t const hrsl = reg_read(rhport, HRSL_ADDR, true);
-  uint8_t const jk = hrsl & (HRSL_JSTATUS | HRSL_KSTATUS);
-
-  uint8_t new_mode = MODE_DPPULLDN | MODE_DMPULLDN | MODE_HOST;
-  TU_LOG2_HEX(jk);
-
-  switch(jk) {
-    case 0x00:                          // SEO is disconnected
-    case (HRSL_JSTATUS | HRSL_KSTATUS): // SE1 is illegal
-      mode_write(rhport, new_mode, true);
-      hcd_event_device_remove(rhport, true);
-      break;
-
-    default: {
-      // Bus Reset also cause CONDET IRQ, skip if we are already connected and doing bus reset
-      if ((_hcd_data.hirq & HIRQ_BUSEVENT_IRQ) && (_hcd_data.mode & MODE_SOFKAENAB)) {
-        break;
-      }
-
-      // Low speed if (LS = 1 and J-state) or (LS = 0 and K-State)
-      // However, since we are always in full speed mode, we can just check J-state
-      if (jk == HRSL_KSTATUS) {
-        new_mode |= MODE_LOWSPEED;
-        TU_LOG3("Low speed\n");
-      }else {
-        TU_LOG3("Full speed\n");
-      }
-      new_mode |= MODE_SOFKAENAB;
-      mode_write(rhport, new_mode, true);
-
-      // FIXME multiple MAX3421 rootdevice address is not 1
-      uint8_t const daddr = 1;
-      free_ep(daddr);
-
-      hcd_event_device_attach(rhport, true);
-
-      break;
-    }
-  }
-}
-
 // Initialize controller to host mode
 bool hcd_init(uint8_t rhport) {
   (void) rhport;
@@ -507,6 +476,14 @@ void hcd_int_enable (uint8_t rhport) {
   if (_hcd_data.intr_disable_count) {
     _hcd_data.intr_disable_count--;
   }
+
+  // when re-enable interrupt, we may miss INTR edge (usually via GPIO detection interrupt).
+  // It would be ok if we are operating since SOF will re-trigger interrupt.
+  // However, for CONDET_IRQ i.e host not operating therefore we need to manually handle it here.
+//  if (_hcd_data.hirq & HIRQ_CONDET_IRQ) {
+//    handle_connect_irq(rhport, false);
+//    hirq_write(rhport, HIRQ_CONDET_IRQ, false);
+//  }
 }
 
 // Disable USB interrupt
@@ -726,6 +703,54 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
 // Interrupt Handler
 //--------------------------------------------------------------------+
 
+static void handle_connect_irq(uint8_t rhport, bool in_isr) {
+  uint8_t const hrsl = reg_read(rhport, HRSL_ADDR, in_isr);
+  uint8_t const jk = hrsl & (HRSL_JSTATUS | HRSL_KSTATUS);
+
+  uint8_t new_mode = MODE_DPPULLDN | MODE_DMPULLDN | MODE_HOST;
+  TU_LOG2_HEX(jk);
+
+  switch(jk) {
+    case 0x00:                          // SEO is disconnected
+    case (HRSL_JSTATUS | HRSL_KSTATUS): // SE1 is illegal
+      mode_write(rhport, new_mode, in_isr);
+
+      // port reset anyway, this will help to stable bus signal for next connection
+      reg_write(rhport, HCTL_ADDR, HCTL_BUSRST, in_isr);
+
+      hcd_event_device_remove(rhport, in_isr);
+
+      reg_write(rhport, HCTL_ADDR, 0, in_isr);
+      break;
+
+    default: {
+      // Bus Reset also cause CONDET IRQ, skip if we are already connected and doing bus reset
+      if ((_hcd_data.hirq & HIRQ_BUSEVENT_IRQ) && (_hcd_data.mode & MODE_SOFKAENAB)) {
+        break;
+      }
+
+      // Low speed if (LS = 1 and J-state) or (LS = 0 and K-State)
+      // However, since we are always in full speed mode, we can just check J-state
+      if (jk == HRSL_KSTATUS) {
+        new_mode |= MODE_LOWSPEED;
+        TU_LOG3("Low speed\n");
+      }else {
+        TU_LOG3("Full speed\n");
+      }
+      new_mode |= MODE_SOFKAENAB;
+      mode_write(rhport, new_mode, in_isr);
+
+      // FIXME multiple MAX3421 rootdevice address is not 1
+      uint8_t const daddr = 1;
+      free_ep(daddr);
+
+      hcd_event_device_attach(rhport, in_isr);
+
+      break;
+    }
+  }
+}
+
 static void xfer_complete_isr(uint8_t rhport, max3421_ep_t *ep, xfer_result_t result, uint8_t hrsl) {
   uint8_t const ep_addr = tu_edpt_addr(ep->ep_num, ep->ep_dir);
 
@@ -758,7 +783,7 @@ static void handle_xfer_done(uint8_t rhport) {
   uint8_t const ep_dir = ((hxfr_type & HXFR_SETUP) || (hxfr_type & HXFR_OUT_NIN)) ? 0 : 1;
 
   max3421_ep_t *ep = find_opened_ep(_hcd_data.peraddr, ep_num, ep_dir);
-  TU_ASSERT(ep, );
+  TU_VERIFY(ep, );
 
   xfer_result_t xfer_result;
   switch(hresult) {
@@ -857,7 +882,6 @@ void print_hirq(uint8_t hirq) {
 
   TU_LOG3("\r\n");
 }
-
 #else
   #define print_hirq(hirq)
 #endif
@@ -868,30 +892,20 @@ void hcd_int_handler(uint8_t rhport) {
   if (!hirq) return;
 //  print_hirq(hirq);
 
-//  uint8_t hirq = reg_read(rhport, HIRQ_ADDR, true);
-
   if (hirq & HIRQ_FRAME_IRQ) {
     _hcd_data.frame_count++;
   }
 
-  #if 1
-  // interrupt is disabled, only ack FRAME IRQ and skip the rest
+  // interrupt is disabled by usbh task: only ack FRAME IRQ and skip the rest
   if (_hcd_data.intr_disable_count) {
     if (hirq & HIRQ_FRAME_IRQ) {
       hirq_write(rhport, HIRQ_FRAME_IRQ, true);
     }
-
-    if ((hirq & HIRQ_CONDET_IRQ) && !(_hcd_data.mode & MODE_SOFKAENAB)) {
-      // connection when interrupt is disabled
-      TU_LOG3_INT(_hcd_data.intr_disable_count);
-      return;
-    }
     return;
   }
-  #endif
 
   if (hirq & HIRQ_CONDET_IRQ) {
-    handle_connect_irq(rhport);
+    handle_connect_irq(rhport, true);
   }
 
   // queue more transfer in handle_xfer_done() can cause hirq to be set again while external IRQ may not catch and/or

From 4fb15f6bb7afb105635db8370917af977d8a918a Mon Sep 17 00:00:00 2001
From: Gabriel Chouinard <gabriel.chouinard@sparkmicro.com>
Date: Tue, 7 Feb 2023 19:31:35 -0500
Subject: [PATCH 635/691] Add stm32u575-nucleo support

---
 .../stm32u575nucleo/STM32U575ZITXQ_FLASH.ld   | 167 ++++++++++++++++++
 hw/bsp/stm32u5/boards/stm32u575nucleo/board.h | 111 ++++++++++++
 .../stm32u5/boards/stm32u575nucleo/board.mk   |  10 ++
 3 files changed, 288 insertions(+)
 create mode 100644 hw/bsp/stm32u5/boards/stm32u575nucleo/STM32U575ZITXQ_FLASH.ld
 create mode 100644 hw/bsp/stm32u5/boards/stm32u575nucleo/board.h
 create mode 100644 hw/bsp/stm32u5/boards/stm32u575nucleo/board.mk

diff --git a/hw/bsp/stm32u5/boards/stm32u575nucleo/STM32U575ZITXQ_FLASH.ld b/hw/bsp/stm32u5/boards/stm32u575nucleo/STM32U575ZITXQ_FLASH.ld
new file mode 100644
index 000000000..03c022bc2
--- /dev/null
+++ b/hw/bsp/stm32u5/boards/stm32u575nucleo/STM32U575ZITXQ_FLASH.ld
@@ -0,0 +1,167 @@
+/*
+******************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Author      : STM32CubeIDE
+**
+**  Abstract    : Linker script for STM32U575xI Device from STM32U5 series
+**                      2048Kbytes FLASH
+**                      784Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** Copyright (c) 2022 STMicroelectronics.
+** All rights reserved.
+**
+** This software is licensed under terms that can be found in the LICENSE file
+** in the root directory of this software component.
+** If no LICENSE file comes with this software, it is provided AS-IS.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200 ;	/* required amount of heap  */
+_Min_Stack_Size = 0x400 ;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM	(xrw)	: ORIGIN = 0x20000000,	LENGTH = 768K
+  SRAM4	(xrw)	: ORIGIN = 0x28000000,	LENGTH = 16K
+  FLASH	(rx)	: ORIGIN = 0x08000000,	LENGTH = 2048K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    KEEP(*(.isr_vector)) /* Startup code */
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+  } >FLASH
+
+  .ARM.extab :
+  {
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+  } >FLASH
+
+  .ARM :
+  {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } >FLASH
+
+  .preinit_array :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >FLASH
+
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >FLASH
+
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data :
+  {
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+    *(.RamFunc)        /* .RamFunc sections */
+    *(.RamFunc*)       /* .RamFunc* sections */
+
+    _edata = .;        /* define a global symbol at data end */
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/hw/bsp/stm32u5/boards/stm32u575nucleo/board.h b/hw/bsp/stm32u5/boards/stm32u575nucleo/board.h
new file mode 100644
index 000000000..75e8a0d6a
--- /dev/null
+++ b/hw/bsp/stm32u5/boards/stm32u575nucleo/board.h
@@ -0,0 +1,111 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2023, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+// LED GREEN
+#define LED_PORT GPIOC
+#define LED_PIN GPIO_PIN_7
+#define LED_STATE_ON 1
+
+// BUTTON
+#define BUTTON_PORT GPIOA
+#define BUTTON_PIN GPIO_PIN_0
+#define BUTTON_STATE_ACTIVE 1
+
+// UART Enable for STLink VCOM
+#define UART_DEV LPUART1
+#define UART_CLK_EN __HAL_RCC_LPUART1_CLK_ENABLE
+#define UART_GPIO_PORT GPIOG
+#define UART_GPIO_AF GPIO_AF8_LPUART1
+#define UART_TX_PIN GPIO_PIN_7
+#define UART_RX_PIN GPIO_PIN_8
+
+//--------------------------------------------------------------------+
+// RCC Clock
+//--------------------------------------------------------------------+
+
+static inline void board_clock_init(void)
+{
+
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+
+  /* Enable Power Clock*/
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /** Configure the main internal regulator output voltage
+   */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLMBOOST = RCC_PLLMBOOST_DIV1;
+  RCC_OscInitStruct.PLL.PLLM = 1;
+  RCC_OscInitStruct.PLL.PLLN = 10;
+  RCC_OscInitStruct.PLL.PLLP = 2;
+  RCC_OscInitStruct.PLL.PLLQ = 2;
+  RCC_OscInitStruct.PLL.PLLR = 1;
+  RCC_OscInitStruct.PLL.PLLRGE = RCC_PLLVCIRANGE_1;
+  RCC_OscInitStruct.PLL.PLLFRACN = 0;
+  HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
+  PeriphClkInit.IclkClockSelection = RCC_CLK48CLKSOURCE_HSI48;
+
+  HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
+
+  /** Initializes the CPU, AHB and APB buses clocks
+   */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK3;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
+
+  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
+}
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/stm32u5/boards/stm32u575nucleo/board.mk b/hw/bsp/stm32u5/boards/stm32u575nucleo/board.mk
new file mode 100644
index 000000000..0c7948860
--- /dev/null
+++ b/hw/bsp/stm32u5/boards/stm32u575nucleo/board.mk
@@ -0,0 +1,10 @@
+CFLAGS += \
+  -DSTM32U575xx \
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/STM32U575ZITXQ_FLASH.ld
+
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32u575xx.s
+
+# For flash-jlink target
+JLINK_DEVICE = stm32u575

From c4566c4d2ba5219e6c2ea821912b888d0270ff07 Mon Sep 17 00:00:00 2001
From: Gabriel Chouinard <gabriel.chouinard@sparkmicro.com>
Date: Tue, 5 Sep 2023 21:28:13 -0400
Subject: [PATCH 636/691] Enable instruction cache for stm32u5 boards

---
 hw/bsp/stm32u5/boards/stm32u575nucleo/board.h | 2 +-
 hw/bsp/stm32u5/family.c                       | 3 +++
 hw/bsp/stm32u5/family.mk                      | 1 +
 3 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/hw/bsp/stm32u5/boards/stm32u575nucleo/board.h b/hw/bsp/stm32u5/boards/stm32u575nucleo/board.h
index 75e8a0d6a..54a6d4cd7 100644
--- a/hw/bsp/stm32u5/boards/stm32u575nucleo/board.h
+++ b/hw/bsp/stm32u5/boards/stm32u575nucleo/board.h
@@ -61,7 +61,7 @@ static inline void board_clock_init(void)
   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
   RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 
-  /* Enable Power Clock*/
+  /* Enable Power Clock */
   __HAL_RCC_PWR_CLK_ENABLE();
 
   /** Configure the main internal regulator output voltage
diff --git a/hw/bsp/stm32u5/family.c b/hw/bsp/stm32u5/family.c
index a30d886aa..c1fe3f412 100644
--- a/hw/bsp/stm32u5/family.c
+++ b/hw/bsp/stm32u5/family.c
@@ -60,6 +60,9 @@ void board_init(void)
 
   UART_CLK_EN();
 
+  /* Enable Instruction cache */
+  HAL_ICACHE_Enable();
+
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
diff --git a/hw/bsp/stm32u5/family.mk b/hw/bsp/stm32u5/family.mk
index 9174fe96a..dace63a51 100644
--- a/hw/bsp/stm32u5/family.mk
+++ b/hw/bsp/stm32u5/family.mk
@@ -20,6 +20,7 @@ SRC_C += \
 	$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_icache.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr.c \

From 1b9108ea0dc237835e801d26cc7eef052acad987 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 6 Sep 2023 17:11:35 +0700
Subject: [PATCH 637/691] minor debug clean up

---
 src/common/tusb_common.h |  6 ++----
 src/common/tusb_debug.h  | 37 ++++++++++++++-----------------------
 src/device/usbd.c        |  2 +-
 src/device/usbd_pvt.h    | 15 ++++++---------
 src/host/usbh.c          |  6 ++----
 5 files changed, 25 insertions(+), 41 deletions(-)

diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index c303c6eaf..6fffed11c 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -122,13 +122,11 @@ TU_ATTR_ALWAYS_INLINE static inline int tu_memcpy_s(void *dest, size_t destsz, c
 
 
 //------------- Bytes -------------//
-TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_u32(uint8_t b3, uint8_t b2, uint8_t b1, uint8_t b0)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_u32(uint8_t b3, uint8_t b2, uint8_t b1, uint8_t b0) {
   return ( ((uint32_t) b3) << 24) | ( ((uint32_t) b2) << 16) | ( ((uint32_t) b1) << 8) | b0;
 }
 
-TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_u16(uint8_t high, uint8_t low)
-{
+TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_u16(uint8_t high, uint8_t low) {
   return (uint16_t) ((((uint16_t) high) << 8) | low);
 }
 
diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h
index 36507041f..99176c02a 100644
--- a/src/common/tusb_debug.h
+++ b/src/common/tusb_debug.h
@@ -58,16 +58,14 @@ void tu_print_mem(void const *buf, uint32_t count, uint8_t indent);
   #define tu_printf    printf
 #endif
 
-static inline void tu_print_arr(uint8_t const* buf, uint32_t bufsize)
-{
+static inline void tu_print_buf(uint8_t const* buf, uint32_t bufsize) {
   for(uint32_t i=0; i<bufsize; i++) tu_printf("%02X ", buf[i]);
 }
 
 // Log with Level
 #define TU_LOG(n, ...)        TU_XSTRCAT(TU_LOG, n)(__VA_ARGS__)
 #define TU_LOG_MEM(n, ...)    TU_XSTRCAT3(TU_LOG, n, _MEM)(__VA_ARGS__)
-#define TU_LOG_ARR(n, ...)    TU_XSTRCAT3(TU_LOG, n, _ARR)(__VA_ARGS__)
-#define TU_LOG_PTR(n, ...)    TU_XSTRCAT3(TU_LOG, n, _PTR)(__VA_ARGS__)
+#define TU_LOG_BUF(n, ...)    TU_XSTRCAT3(TU_LOG, n, _BUF)(__VA_ARGS__)
 #define TU_LOG_INT(n, ...)    TU_XSTRCAT3(TU_LOG, n, _INT)(__VA_ARGS__)
 #define TU_LOG_HEX(n, ...)    TU_XSTRCAT3(TU_LOG, n, _HEX)(__VA_ARGS__)
 #define TU_LOG_LOCATION()     tu_printf("%s: %d:\r\n", __PRETTY_FUNCTION__, __LINE__)
@@ -76,8 +74,7 @@ static inline void tu_print_arr(uint8_t const* buf, uint32_t bufsize)
 // Log Level 1: Error
 #define TU_LOG1               tu_printf
 #define TU_LOG1_MEM           tu_print_mem
-#define TU_LOG1_ARR(_x, _n)   tu_print_arr((uint8_t const*)(_x), _n)
-#define TU_LOG1_PTR(_x)       tu_print_arr((uint8_t const*)(_x), sizeof(*(_x)))
+#define TU_LOG1_BUF(_x, _n)   tu_print_buf((uint8_t const*)(_x), _n)
 #define TU_LOG1_INT(_x)       tu_printf(#_x " = %ld\r\n", (unsigned long) (_x) )
 #define TU_LOG1_HEX(_x)       tu_printf(#_x " = %lX\r\n", (unsigned long) (_x) )
 
@@ -85,8 +82,7 @@ static inline void tu_print_arr(uint8_t const* buf, uint32_t bufsize)
 #if CFG_TUSB_DEBUG >= 2
   #define TU_LOG2             TU_LOG1
   #define TU_LOG2_MEM         TU_LOG1_MEM
-  #define TU_LOG2_ARR         TU_LOG1_ARR
-  #define TU_LOG2_PTR         TU_LOG1_PTR
+  #define TU_LOG2_BUF         TU_LOG1_BUF
   #define TU_LOG2_INT         TU_LOG1_INT
   #define TU_LOG2_HEX         TU_LOG1_HEX
 #endif
@@ -95,30 +91,25 @@ static inline void tu_print_arr(uint8_t const* buf, uint32_t bufsize)
 #if CFG_TUSB_DEBUG >= 3
   #define TU_LOG3             TU_LOG1
   #define TU_LOG3_MEM         TU_LOG1_MEM
-  #define TU_LOG3_ARR         TU_LOG1_ARR
-  #define TU_LOG3_PTR         TU_LOG1_PTR
+  #define TU_LOG3_BUF         TU_LOG1_BUF
   #define TU_LOG3_INT         TU_LOG1_INT
   #define TU_LOG3_HEX         TU_LOG1_HEX
 #endif
 
-typedef struct
-{
+typedef struct {
   uint32_t key;
   const char* data;
 } tu_lookup_entry_t;
 
-typedef struct
-{
+typedef struct {
   uint16_t count;
   tu_lookup_entry_t const* items;
 } tu_lookup_table_t;
 
-static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint32_t key)
-{
+static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint32_t key) {
   tu_static char not_found[11];
 
-  for(uint16_t i=0; i<p_table->count; i++)
-  {
+  for(uint16_t i=0; i<p_table->count; i++) {
     if (p_table->items[i].key == key) return p_table->items[i].data;
   }
 
@@ -133,7 +124,7 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3
 #ifndef TU_LOG
   #define TU_LOG(n, ...)
   #define TU_LOG_MEM(n, ...)
-  #define TU_LOG_PTR(n, ...)
+  #define TU_LOG_BUF(n, ...)
   #define TU_LOG_INT(n, ...)
   #define TU_LOG_HEX(n, ...)
   #define TU_LOG_LOCATION()
@@ -144,14 +135,14 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3
 
 #define TU_LOG0(...)
 #define TU_LOG0_MEM(...)
-#define TU_LOG0_PTR(...)
+#define TU_LOG0_BUF(...)
 #define TU_LOG0_INT(...)
 #define TU_LOG0_HEX(...)
 
 #ifndef TU_LOG1
   #define TU_LOG1(...)
   #define TU_LOG1_MEM(...)
-  #define TU_LOG1_PTR(...)
+  #define TU_LOG1_BUF(...)
   #define TU_LOG1_INT(...)
   #define TU_LOG1_HEX(...)
 #endif
@@ -159,7 +150,7 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3
 #ifndef TU_LOG2
   #define TU_LOG2(...)
   #define TU_LOG2_MEM(...)
-  #define TU_LOG2_PTR(...)
+  #define TU_LOG2_BUF(...)
   #define TU_LOG2_INT(...)
   #define TU_LOG2_HEX(...)
 #endif
@@ -167,7 +158,7 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3
 #ifndef TU_LOG3
   #define TU_LOG3(...)
   #define TU_LOG3_MEM(...)
-  #define TU_LOG3_PTR(...)
+  #define TU_LOG3_BUF(...)
   #define TU_LOG3_INT(...)
   #define TU_LOG3_HEX(...)
 #endif
diff --git a/src/device/usbd.c b/src/device/usbd.c
index f0d9fba52..50941c46f 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -506,7 +506,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr)
       break;
 
       case DCD_EVENT_SETUP_RECEIVED:
-        TU_LOG_PTR(CFG_TUD_LOG_LEVEL, &event.setup_received);
+        TU_LOG_BUF(CFG_TUD_LOG_LEVEL, &event.setup_received, 8);
         TU_LOG_USBD("\r\n");
 
         // Mark as connected after receiving 1st setup packet.
diff --git a/src/device/usbd_pvt.h b/src/device/usbd_pvt.h
index 16585167f..153be7cee 100644
--- a/src/device/usbd_pvt.h
+++ b/src/device/usbd_pvt.h
@@ -23,8 +23,8 @@
  *
  * This file is part of the TinyUSB stack.
  */
-#ifndef USBD_PVT_H_
-#define USBD_PVT_H_
+#ifndef _TUSB_USBD_PVT_H_
+#define _TUSB_USBD_PVT_H_
 
 #include "osal/osal.h"
 #include "common/tusb_fifo.h"
@@ -44,8 +44,7 @@
 // Class Driver API
 //--------------------------------------------------------------------+
 
-typedef struct
-{
+typedef struct {
   #if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
   char const* name;
   #endif
@@ -111,8 +110,7 @@ bool usbd_edpt_iso_activate(uint8_t rhport,  tusb_desc_endpoint_t const * p_endp
 
 // Check if endpoint is ready (not busy and not stalled)
 TU_ATTR_ALWAYS_INLINE static inline
-bool usbd_edpt_ready(uint8_t rhport, uint8_t ep_addr)
-{
+bool usbd_edpt_ready(uint8_t rhport, uint8_t ep_addr) {
   return !usbd_edpt_busy(rhport, ep_addr) && !usbd_edpt_stalled(rhport, ep_addr);
 }
 
@@ -124,11 +122,10 @@ void usbd_sof_enable(uint8_t rhport, bool en);
  *------------------------------------------------------------------*/
 
 bool usbd_open_edpt_pair(uint8_t rhport, uint8_t const* p_desc, uint8_t ep_count, uint8_t xfer_type, uint8_t* ep_out, uint8_t* ep_in);
-void usbd_defer_func( osal_task_func_t func, void* param, bool in_isr );
-
+void usbd_defer_func(osal_task_func_t func, void *param, bool in_isr);
 
 #ifdef __cplusplus
  }
 #endif
 
-#endif /* USBD_PVT_H_ */
+#endif
diff --git a/src/host/usbh.c b/src/host/usbh.c
index bacb3a719..e60e680c2 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -583,7 +583,7 @@ bool tuh_control_xfer (tuh_xfer_t* xfer) {
   TU_LOG_USBH("[%u:%u] %s: ", rhport, daddr,
               (xfer->setup->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD && xfer->setup->bRequest <= TUSB_REQ_SYNCH_FRAME) ?
                   tu_str_std_request[xfer->setup->bRequest] : "Class Request");
-  TU_LOG_PTR(CFG_TUH_LOG_LEVEL, xfer->setup);
+  TU_LOG_BUF(CFG_TUH_LOG_LEVEL, xfer->setup, 8);
   TU_LOG_USBH("\r\n");
 
   if (xfer->complete_cb) {
@@ -660,10 +660,8 @@ static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result
 
   if (XFER_RESULT_SUCCESS != result) {
     TU_LOG1("[%u:%u] Control %s, xferred_bytes = %lu\r\n", rhport, dev_addr, result == XFER_RESULT_STALLED ? "STALLED" : "FAILED", xferred_bytes);
-    #if CFG_TUSB_DEBUG == 1
-    TU_LOG1_PTR(request);
+    TU_LOG1_BUF(request, 8);
     TU_LOG1("\r\n");
-    #endif
 
     // terminate transfer if any stage failed
     _xfer_complete(dev_addr, result);

From 21ab40bab2e2fee28fa595f648a17944696c3d65 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 7 Sep 2023 12:38:18 +0700
Subject: [PATCH 638/691] - wrap up hcd max3421, work well with nrf52840 - also
 add usbh_defer_func()

---
 hw/bsp/nrf/family.c                       |  7 +++--
 src/host/usbh.c                           | 26 +++++++++-------
 src/host/usbh_pvt.h                       | 10 +++----
 src/portable/analog/max3421/hcd_max3421.c | 36 ++---------------------
 4 files changed, 27 insertions(+), 52 deletions(-)

diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 7358458ce..39ce179e8 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -109,10 +109,12 @@ void max3421e_int_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) {
 void tuh_max3421e_int_api(uint8_t rhport, bool enabled) {
   (void) rhport;
 
+  // use NVIC_Enable/Disable instead since nrfx_gpiote_trigger_enable/disable clear pending and can miss interrupt
+  // when disabled
   if (enabled) {
-    nrfx_gpiote_trigger_enable(MAX3241E_INTR_PIN, true);
+    NVIC_EnableIRQ(GPIOTE_IRQn);
   } else {
-    nrfx_gpiote_trigger_disable(MAX3241E_INTR_PIN);
+    NVIC_DisableIRQ(GPIOTE_IRQn);
   }
 }
 
@@ -266,6 +268,7 @@ void board_init(void) {
   in_config.pull = NRF_GPIO_PIN_PULLUP;
 
   nrfx_gpiote_in_init(MAX3241E_INTR_PIN, &in_config, max3421e_int_handler);
+  nrfx_gpiote_trigger_enable(MAX3241E_INTR_PIN, true);
 #endif
 
 }
diff --git a/src/host/usbh.c b/src/host/usbh.c
index e60e680c2..e332f35cc 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -753,29 +753,33 @@ bool tuh_edpt_abort_xfer(uint8_t daddr, uint8_t ep_addr) {
 // USBH API For Class Driver
 //--------------------------------------------------------------------+
 
-uint8_t usbh_get_rhport(uint8_t dev_addr)
-{
-  usbh_device_t* dev = get_device(dev_addr);
+uint8_t usbh_get_rhport(uint8_t dev_addr) {
+  usbh_device_t *dev = get_device(dev_addr);
   return dev ? dev->rhport : _dev0.rhport;
 }
 
-uint8_t* usbh_get_enum_buf(void)
-{
+uint8_t *usbh_get_enum_buf(void) {
   return _usbh_ctrl_buf;
 }
 
-void usbh_int_set(bool enabled)
-{
+void usbh_int_set(bool enabled) {
   // TODO all host controller if multiple are used since they shared the same event queue
-  if (enabled)
-  {
+  if (enabled) {
     hcd_int_enable(_usbh_controller);
-  }else
-  {
+  } else {
     hcd_int_disable(_usbh_controller);
   }
 }
 
+void usbh_defer_func(osal_task_func_t func, void *param, bool in_isr) {
+  hcd_event_t event = { 0 };
+  event.event_id = USBH_EVENT_FUNC_CALL;
+  event.func_call.func = func;
+  event.func_call.param = param;
+
+  osal_queue_send(_usbh_q, &event, in_isr);
+}
+
 //--------------------------------------------------------------------+
 // Endpoint API
 //--------------------------------------------------------------------+
diff --git a/src/host/usbh_pvt.h b/src/host/usbh_pvt.h
index 0b58a91bc..2b61a77db 100644
--- a/src/host/usbh_pvt.h
+++ b/src/host/usbh_pvt.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_USBH_CLASSDRIVER_H_
-#define _TUSB_USBH_CLASSDRIVER_H_
+#ifndef _TUSB_USBH_PVT_H_
+#define _TUSB_USBH_PVT_H_
 
 #include "osal/osal.h"
 #include "common/tusb_fifo.h"
@@ -76,6 +76,8 @@ uint8_t* usbh_get_enum_buf(void);
 
 void usbh_int_set(bool enabled);
 
+void usbh_defer_func(osal_task_func_t func, void *param, bool in_isr);
+
 //--------------------------------------------------------------------+
 // USBH Endpoint API
 //--------------------------------------------------------------------+
@@ -85,12 +87,10 @@ bool usbh_edpt_xfer_with_callback(uint8_t dev_addr, uint8_t ep_addr, uint8_t * b
                                   tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 
 TU_ATTR_ALWAYS_INLINE
-static inline bool usbh_edpt_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
-{
+static inline bool usbh_edpt_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) {
   return usbh_edpt_xfer_with_callback(dev_addr, ep_addr, buffer, total_bytes, NULL, 0);
 }
 
-
 // Claim an endpoint before submitting a transfer.
 // If caller does not make any transfer, it must release endpoint for others.
 bool usbh_edpt_claim(uint8_t dev_addr, uint8_t ep_addr);
diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index c61389cb9..95cf5516e 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -194,7 +194,6 @@ typedef struct {
   uint8_t hxfr;
 
   atomic_flag busy; // busy transferring
-  volatile uint8_t intr_disable_count;
   volatile uint16_t frame_count;
 
   max3421_ep_t ep[CFG_TUH_MAX3421_ENDPOINT_TOTAL]; // [0] is reserved for addr0
@@ -241,14 +240,6 @@ static void max3421_spi_unlock(uint8_t rhport, bool in_isr) {
   if (!in_isr) {
     tuh_max3421e_int_api(rhport, true);
     (void) osal_mutex_unlock(_hcd_data.spi_mutex);
-
-    // when re-enable interrupt, we may miss INTR edge (usually via GPIO detection interrupt).
-    // It would be ok if we are operating since SOF will re-trigger interrupt.
-    // However, for CONDET_IRQ i.e host not operating therefore we need to manually handle it here.
-    if (_hcd_data.hirq & HIRQ_CONDET_IRQ) {
-      handle_connect_irq(rhport, false);
-      hirq_write(rhport, HIRQ_CONDET_IRQ, false);
-    }
   }
 }
 
@@ -470,28 +461,13 @@ bool hcd_init(uint8_t rhport) {
 // Enable USB interrupt
 // Not actually enable GPIO interrupt, just set variable to prevent handler to process
 void hcd_int_enable (uint8_t rhport) {
-//  tuh_max3421e_int_api(rhport, true);
-
-  (void) rhport;
-  if (_hcd_data.intr_disable_count) {
-    _hcd_data.intr_disable_count--;
-  }
-
-  // when re-enable interrupt, we may miss INTR edge (usually via GPIO detection interrupt).
-  // It would be ok if we are operating since SOF will re-trigger interrupt.
-  // However, for CONDET_IRQ i.e host not operating therefore we need to manually handle it here.
-//  if (_hcd_data.hirq & HIRQ_CONDET_IRQ) {
-//    handle_connect_irq(rhport, false);
-//    hirq_write(rhport, HIRQ_CONDET_IRQ, false);
-//  }
+  tuh_max3421e_int_api(rhport, true);
 }
 
 // Disable USB interrupt
 // Not actually disable GPIO interrupt, just set variable to prevent handler to process
 void hcd_int_disable(uint8_t rhport) {
-  //tuh_max3421e_int_api(rhport, false);
-  (void) rhport;
-  _hcd_data.intr_disable_count++;
+  tuh_max3421e_int_api(rhport, false);
 }
 
 // Get frame number (1ms)
@@ -896,14 +872,6 @@ void hcd_int_handler(uint8_t rhport) {
     _hcd_data.frame_count++;
   }
 
-  // interrupt is disabled by usbh task: only ack FRAME IRQ and skip the rest
-  if (_hcd_data.intr_disable_count) {
-    if (hirq & HIRQ_FRAME_IRQ) {
-      hirq_write(rhport, HIRQ_FRAME_IRQ, true);
-    }
-    return;
-  }
-
   if (hirq & HIRQ_CONDET_IRQ) {
     handle_connect_irq(rhport, true);
   }

From bb5d43e9c5c909a1becc1224c768d3aa1a09b051 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 7 Sep 2023 15:31:43 +0700
Subject: [PATCH 639/691] add samd51 to cmake

---
 .github/workflows/build_arm.yml               |   2 +-
 .github/workflows/cmake_arm.yml               |   1 +
 .idea/cmake.xml                               |   5 +-
 hw/bsp/samd51/FreeRTOSConfig/FreeRTOSConfig.h | 165 ++++++++++++++++++
 .../boards/feather_m4_express/board.cmake     |   8 +
 hw/bsp/samd51/boards/itsybitsy_m4/board.cmake |   8 +
 .../boards/metro_m4_express/board.cmake       |   8 +
 hw/bsp/samd51/boards/pybadge/board.cmake      |   8 +
 hw/bsp/samd51/boards/pyportal/board.cmake     |   8 +
 hw/bsp/samd51/family.c                        |  11 ++
 hw/bsp/samd51/family.cmake                    | 104 +++++++++++
 11 files changed, 325 insertions(+), 3 deletions(-)
 create mode 100644 hw/bsp/samd51/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/samd51/boards/feather_m4_express/board.cmake
 create mode 100644 hw/bsp/samd51/boards/itsybitsy_m4/board.cmake
 create mode 100644 hw/bsp/samd51/boards/metro_m4_express/board.cmake
 create mode 100644 hw/bsp/samd51/boards/pybadge/board.cmake
 create mode 100644 hw/bsp/samd51/boards/pyportal/board.cmake
 create mode 100644 hw/bsp/samd51/family.cmake

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 2621e7372..377fc44d9 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -40,7 +40,7 @@ jobs:
         - 'mm32 msp432e4'
         - 'nrf'
         - 'samd11 samd21'
-        - 'samd51 same5x'
+        - 'same5x'
         - 'saml2x'
         - 'stm32f2 stm32f3'
         - 'stm32l0 stm32u5 stm32wb'
diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index 8eeae928c..6f7d024bd 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -40,6 +40,7 @@ jobs:
           - 'mcx'
           - 'ra'
           - 'rp2040'
+          - 'samd51'
           - 'stm32f0'
           - 'stm32f1'
           - 'stm32f4'
diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 8ee7f09a0..a060f18eb 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -30,8 +30,8 @@
       <configuration PROFILE_NAME="mcb1800" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mcb1800 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="ea4088 quickstart" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ea4088_quickstart -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="ea4357" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ea4357 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
-      <configuration PROFILE_NAME="lpc54628" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso54628 -DLOG=4 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="lpc55s69" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso55s69 -DLOG=4 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="lpc54628" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso54628 -DLOG=4 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="lpc55s69" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso55s69 -DLOG=4 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="mcxn947" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mcxn947brk -DLOG=3 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10056 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10095 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
@@ -52,6 +52,7 @@
       <configuration PROFILE_NAME="ra6m5 PORT0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1 -DPORT=0" />
       <configuration PROFILE_NAME="uno_r4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=uno_r4 -DLOG=4 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="portenta_c33" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=portenta_c33 -DLOG=3" />
+      <configuration PROFILE_NAME="metro_m4_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m4_express -DLOG=3 -DLOGGER=RTT" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/hw/bsp/samd51/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/samd51/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..e3ee529cf
--- /dev/null
+++ b/hw/bsp/samd51/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,165 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "sam.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       3
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/samd51/boards/feather_m4_express/board.cmake b/hw/bsp/samd51/boards/feather_m4_express/board.cmake
new file mode 100644
index 000000000..d83211d9e
--- /dev/null
+++ b/hw/bsp/samd51/boards/feather_m4_express/board.cmake
@@ -0,0 +1,8 @@
+set(JLINK_DEVICE ATSAMD51J19)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD51J19A__
+    )
+endfunction()
diff --git a/hw/bsp/samd51/boards/itsybitsy_m4/board.cmake b/hw/bsp/samd51/boards/itsybitsy_m4/board.cmake
new file mode 100644
index 000000000..d83211d9e
--- /dev/null
+++ b/hw/bsp/samd51/boards/itsybitsy_m4/board.cmake
@@ -0,0 +1,8 @@
+set(JLINK_DEVICE ATSAMD51J19)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD51J19A__
+    )
+endfunction()
diff --git a/hw/bsp/samd51/boards/metro_m4_express/board.cmake b/hw/bsp/samd51/boards/metro_m4_express/board.cmake
new file mode 100644
index 000000000..d83211d9e
--- /dev/null
+++ b/hw/bsp/samd51/boards/metro_m4_express/board.cmake
@@ -0,0 +1,8 @@
+set(JLINK_DEVICE ATSAMD51J19)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD51J19A__
+    )
+endfunction()
diff --git a/hw/bsp/samd51/boards/pybadge/board.cmake b/hw/bsp/samd51/boards/pybadge/board.cmake
new file mode 100644
index 000000000..d83211d9e
--- /dev/null
+++ b/hw/bsp/samd51/boards/pybadge/board.cmake
@@ -0,0 +1,8 @@
+set(JLINK_DEVICE ATSAMD51J19)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD51J19A__
+    )
+endfunction()
diff --git a/hw/bsp/samd51/boards/pyportal/board.cmake b/hw/bsp/samd51/boards/pyportal/board.cmake
new file mode 100644
index 000000000..d83211d9e
--- /dev/null
+++ b/hw/bsp/samd51/boards/pyportal/board.cmake
@@ -0,0 +1,8 @@
+set(JLINK_DEVICE ATSAMD51J19)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD51J19A__
+    )
+endfunction()
diff --git a/hw/bsp/samd51/family.c b/hw/bsp/samd51/family.c
index 7ec208b30..2df9cbafb 100644
--- a/hw/bsp/samd51/family.c
+++ b/hw/bsp/samd51/family.c
@@ -28,11 +28,22 @@
 #include "bsp/board_api.h"
 #include "board.h"
 
+// Suppress warning caused by mcu driver
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wcast-qual"
+#endif
+
 #include "hal/include/hal_gpio.h"
 #include "hal/include/hal_init.h"
 #include "hpl/gclk/hpl_gclk_base.h"
 #include "hpl_mclk_config.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/samd51/family.cmake b/hw/bsp/samd51/family.cmake
new file mode 100644
index 000000000..fa9586066
--- /dev/null
+++ b/hw/bsp/samd51/family.cmake
@@ -0,0 +1,104 @@
+include_guard()
+
+set(SDK_DIR ${TOP}/hw/mcu/microchip/samd51)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS SAMD51 CACHE INTERNAL "")
+
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    add_library(${BOARD_TARGET} STATIC
+      ${SDK_DIR}/gcc/system_samd51.c
+      ${SDK_DIR}/hpl/gclk/hpl_gclk.c
+      ${SDK_DIR}/hpl/mclk/hpl_mclk.c
+      ${SDK_DIR}/hpl/osc32kctrl/hpl_osc32kctrl.c
+      ${SDK_DIR}/hpl/oscctrl/hpl_oscctrl.c
+      ${SDK_DIR}/hal/src/hal_atomic.c
+      )
+    target_include_directories(${BOARD_TARGET} PUBLIC
+      ${SDK_DIR}/
+      ${SDK_DIR}/config
+      ${SDK_DIR}/include
+      ${SDK_DIR}/hal/include
+      ${SDK_DIR}/hal/utils/include
+      ${SDK_DIR}/hpl/port
+      ${SDK_DIR}/hri
+      ${SDK_DIR}/CMSIS/Include
+      )
+
+    update_board(${BOARD_TARGET})
+
+    if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+      message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
+    endif ()
+
+    if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
+      set(STARTUP_FILE_GNU ${SDK_DIR}/gcc/gcc/startup_samd51.c)
+    endif ()
+
+    target_sources(${BOARD_TARGET} PRIVATE
+      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+      )
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--script=${LD_FILE_GNU}"
+        -nostartfiles
+        --specs=nosys.specs --specs=nano.specs
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_SAMD51 ${RTOS})
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/microchip/samd/dcd_samd.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_flash_jlink(${TARGET})
+endfunction()

From 2dea4ce6a22061df59a8589286f78213b7e99c5e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 7 Sep 2023 16:58:40 +0700
Subject: [PATCH 640/691] add cmake support for samd21. update ci cmake

---
 .github/workflows/build_arm.yml               |   4 +-
 .github/workflows/cmake_arm.yml               |   1 +
 .idea/cmake.xml                               |   3 +-
 hw/bsp/samd21/FreeRTOSConfig/FreeRTOSConfig.h | 165 ++++++++++++++++++
 .../samd21/boards/atsamd21_xpro/board.cmake   |   9 +
 .../circuitplayground_express/board.cmake     |   9 +
 .../samd21/boards/curiosity_nano/board.cmake  |  10 ++
 hw/bsp/samd21/boards/cynthion_d21/board.cmake |  12 ++
 .../boards/feather_m0_express/board.cmake     |   9 +
 hw/bsp/samd21/boards/itsybitsy_m0/board.cmake |   9 +
 .../boards/metro_m0_express/board.cmake       |   9 +
 hw/bsp/samd21/boards/qtpy/board.cmake         |   9 +
 .../samd21/boards/seeeduino_xiao/board.cmake  |   9 +
 hw/bsp/samd21/boards/trinket_m0/board.cmake   |   9 +
 hw/bsp/samd21/family.c                        |  10 ++
 hw/bsp/samd21/family.cmake                    | 105 +++++++++++
 16 files changed, 378 insertions(+), 4 deletions(-)
 create mode 100644 hw/bsp/samd21/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/samd21/boards/atsamd21_xpro/board.cmake
 create mode 100644 hw/bsp/samd21/boards/circuitplayground_express/board.cmake
 create mode 100644 hw/bsp/samd21/boards/curiosity_nano/board.cmake
 create mode 100644 hw/bsp/samd21/boards/cynthion_d21/board.cmake
 create mode 100644 hw/bsp/samd21/boards/feather_m0_express/board.cmake
 create mode 100644 hw/bsp/samd21/boards/itsybitsy_m0/board.cmake
 create mode 100644 hw/bsp/samd21/boards/metro_m0_express/board.cmake
 create mode 100644 hw/bsp/samd21/boards/qtpy/board.cmake
 create mode 100644 hw/bsp/samd21/boards/seeeduino_xiao/board.cmake
 create mode 100644 hw/bsp/samd21/boards/trinket_m0/board.cmake
 create mode 100644 hw/bsp/samd21/family.cmake

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 377fc44d9..70385bc1b 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -39,9 +39,7 @@ jobs:
         - 'lpc51 lpc54'
         - 'mm32 msp432e4'
         - 'nrf'
-        - 'samd11 samd21'
-        - 'same5x'
-        - 'saml2x'
+        - 'samd11 same5x saml2x'
         - 'stm32f2 stm32f3'
         - 'stm32l0 stm32u5 stm32wb'
         - 'tm4c123 xmc4000'
diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index 6f7d024bd..e3a00f9c5 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -40,6 +40,7 @@ jobs:
           - 'mcx'
           - 'ra'
           - 'rp2040'
+          - 'samd21'
           - 'samd51'
           - 'stm32f0'
           - 'stm32f1'
diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index a060f18eb..15dd85f93 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -52,7 +52,8 @@
       <configuration PROFILE_NAME="ra6m5 PORT0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1 -DPORT=0" />
       <configuration PROFILE_NAME="uno_r4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=uno_r4 -DLOG=4 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="portenta_c33" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=portenta_c33 -DLOG=3" />
-      <configuration PROFILE_NAME="metro_m4_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m4_express -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="metro_m4_express" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m4_express -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="metro_m0_express" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m0_express -DLOG=3 -DLOGGER=RTT" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/hw/bsp/samd21/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/samd21/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..02e868741
--- /dev/null
+++ b/hw/bsp/samd21/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,165 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "sam.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       2
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/samd21/boards/atsamd21_xpro/board.cmake b/hw/bsp/samd21/boards/atsamd21_xpro/board.cmake
new file mode 100644
index 000000000..46a3880ed
--- /dev/null
+++ b/hw/bsp/samd21/boards/atsamd21_xpro/board.cmake
@@ -0,0 +1,9 @@
+set(JLINK_DEVICE ATSAMD21J18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/samd21j18a_flash.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21J18A__
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/samd21/boards/circuitplayground_express/board.cmake b/hw/bsp/samd21/boards/circuitplayground_express/board.cmake
new file mode 100644
index 000000000..c1a612936
--- /dev/null
+++ b/hw/bsp/samd21/boards/circuitplayground_express/board.cmake
@@ -0,0 +1,9 @@
+set(JLINK_DEVICE ATSAMD21G18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21G18A__
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/samd21/boards/curiosity_nano/board.cmake b/hw/bsp/samd21/boards/curiosity_nano/board.cmake
new file mode 100644
index 000000000..ff779c0fd
--- /dev/null
+++ b/hw/bsp/samd21/boards/curiosity_nano/board.cmake
@@ -0,0 +1,10 @@
+set(JLINK_DEVICE atsamd21g17a)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/samd21g17a_flash.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21G17A__
+    CFG_EXAMPLE_MSC_READONLY
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/samd21/boards/cynthion_d21/board.cmake b/hw/bsp/samd21/boards/cynthion_d21/board.cmake
new file mode 100644
index 000000000..67aef67ad
--- /dev/null
+++ b/hw/bsp/samd21/boards/cynthion_d21/board.cmake
@@ -0,0 +1,12 @@
+set(JLINK_DEVICE ATSAMD21G18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21G18A__
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+  target_link_options(${TARGET} PUBLIC
+    --defsym=BOOTLOADER_SIZE=0x800
+    )
+endfunction()
diff --git a/hw/bsp/samd21/boards/feather_m0_express/board.cmake b/hw/bsp/samd21/boards/feather_m0_express/board.cmake
new file mode 100644
index 000000000..c1a612936
--- /dev/null
+++ b/hw/bsp/samd21/boards/feather_m0_express/board.cmake
@@ -0,0 +1,9 @@
+set(JLINK_DEVICE ATSAMD21G18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21G18A__
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/samd21/boards/itsybitsy_m0/board.cmake b/hw/bsp/samd21/boards/itsybitsy_m0/board.cmake
new file mode 100644
index 000000000..c1a612936
--- /dev/null
+++ b/hw/bsp/samd21/boards/itsybitsy_m0/board.cmake
@@ -0,0 +1,9 @@
+set(JLINK_DEVICE ATSAMD21G18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21G18A__
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/samd21/boards/metro_m0_express/board.cmake b/hw/bsp/samd21/boards/metro_m0_express/board.cmake
new file mode 100644
index 000000000..c1a612936
--- /dev/null
+++ b/hw/bsp/samd21/boards/metro_m0_express/board.cmake
@@ -0,0 +1,9 @@
+set(JLINK_DEVICE ATSAMD21G18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21G18A__
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/samd21/boards/qtpy/board.cmake b/hw/bsp/samd21/boards/qtpy/board.cmake
new file mode 100644
index 000000000..f6cd446dd
--- /dev/null
+++ b/hw/bsp/samd21/boards/qtpy/board.cmake
@@ -0,0 +1,9 @@
+set(JLINK_DEVICE ATSAMD21E18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21E18A__
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/samd21/boards/seeeduino_xiao/board.cmake b/hw/bsp/samd21/boards/seeeduino_xiao/board.cmake
new file mode 100644
index 000000000..c1a612936
--- /dev/null
+++ b/hw/bsp/samd21/boards/seeeduino_xiao/board.cmake
@@ -0,0 +1,9 @@
+set(JLINK_DEVICE ATSAMD21G18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21G18A__
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/samd21/boards/trinket_m0/board.cmake b/hw/bsp/samd21/boards/trinket_m0/board.cmake
new file mode 100644
index 000000000..f6cd446dd
--- /dev/null
+++ b/hw/bsp/samd21/boards/trinket_m0/board.cmake
@@ -0,0 +1,9 @@
+set(JLINK_DEVICE ATSAMD21E18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21E18A__
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/samd21/family.c b/hw/bsp/samd21/family.c
index 46297f97f..2121e028a 100644
--- a/hw/bsp/samd21/family.c
+++ b/hw/bsp/samd21/family.c
@@ -28,6 +28,12 @@
 #include "bsp/board_api.h"
 #include "board.h"
 
+// Suppress warning caused by mcu driver
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wcast-qual"
+#endif
+
 #include "hal/include/hal_gpio.h"
 #include "hal/include/hal_init.h"
 #include "hri/hri_nvmctrl_d21.h"
@@ -36,6 +42,10 @@
 #include "hpl_pm_config.h"
 #include "hpl/pm/hpl_pm_base.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/samd21/family.cmake b/hw/bsp/samd21/family.cmake
new file mode 100644
index 000000000..07186934a
--- /dev/null
+++ b/hw/bsp/samd21/family.cmake
@@ -0,0 +1,105 @@
+include_guard()
+
+set(SDK_DIR ${TOP}/hw/mcu/microchip/samd21)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m0plus CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS SAMD21 CACHE INTERNAL "")
+
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    add_library(${BOARD_TARGET} STATIC
+      ${SDK_DIR}/gcc/system_samd21.c
+      ${SDK_DIR}/hpl/gclk/hpl_gclk.c
+      ${SDK_DIR}/hpl/pm/hpl_pm.c
+      ${SDK_DIR}/hpl/sysctrl/hpl_sysctrl.c
+      ${SDK_DIR}/hal/src/hal_atomic.c
+      )
+    target_include_directories(${BOARD_TARGET} PUBLIC
+      ${SDK_DIR}
+      ${SDK_DIR}/config
+      ${SDK_DIR}/include
+      ${SDK_DIR}/hal/include
+      ${SDK_DIR}/hal/utils/include
+      ${SDK_DIR}/hpl/pm
+      ${SDK_DIR}/hpl/port
+      ${SDK_DIR}/hri
+      ${SDK_DIR}/CMSIS/Include
+      )
+    target_compile_definitions(${BOARD_TARGET} PUBLIC CONF_DFLL_OVERWRITE_CALIBRATION=0)
+
+    update_board(${BOARD_TARGET})
+
+    if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+      message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
+    endif ()
+
+    if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
+      set(STARTUP_FILE_GNU ${SDK_DIR}/gcc/gcc/startup_samd21.c)
+    endif ()
+
+    target_sources(${BOARD_TARGET} PRIVATE
+      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+      )
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--script=${LD_FILE_GNU}"
+        -nostartfiles
+        --specs=nosys.specs --specs=nano.specs
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_SAMD21 ${RTOS})
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/microchip/samd/dcd_samd.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_flash_jlink(${TARGET})
+endfunction()

From e8558458c41e65a3a5968524020f1dd9498599db Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 7 Sep 2023 17:09:25 +0700
Subject: [PATCH 641/691] fix ci

---
 .idea/cmake.xml                               | 4 ++--
 hw/bsp/samd21/boards/cynthion_d21/board.cmake | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 15dd85f93..2a7babf3f 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -52,8 +52,8 @@
       <configuration PROFILE_NAME="ra6m5 PORT0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1 -DPORT=0" />
       <configuration PROFILE_NAME="uno_r4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=uno_r4 -DLOG=4 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="portenta_c33" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=portenta_c33 -DLOG=3" />
-      <configuration PROFILE_NAME="metro_m4_express" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m4_express -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="metro_m0_express" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m0_express -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="metro_m4_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m4_express -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="metro_m0_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m0_express -DLOG=3 -DLOGGER=RTT" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/hw/bsp/samd21/boards/cynthion_d21/board.cmake b/hw/bsp/samd21/boards/cynthion_d21/board.cmake
index 67aef67ad..89e821edd 100644
--- a/hw/bsp/samd21/boards/cynthion_d21/board.cmake
+++ b/hw/bsp/samd21/boards/cynthion_d21/board.cmake
@@ -7,6 +7,6 @@ function(update_board TARGET)
     CFG_EXAMPLE_VIDEO_READONLY
     )
   target_link_options(${TARGET} PUBLIC
-    --defsym=BOOTLOADER_SIZE=0x800
+    "LINKER:--defsym=BOOTLOADER_SIZE=0x800"
     )
 endfunction()

From d3c08ecc3ab53b5e1b4fbcb18eb2aab78a5b840e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 7 Sep 2023 17:20:07 +0700
Subject: [PATCH 642/691] more ci fix

---
 hw/bsp/samd21/boards/cynthion_d21/board.cmake | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/bsp/samd21/boards/cynthion_d21/board.cmake b/hw/bsp/samd21/boards/cynthion_d21/board.cmake
index 89e821edd..fb54b7561 100644
--- a/hw/bsp/samd21/boards/cynthion_d21/board.cmake
+++ b/hw/bsp/samd21/boards/cynthion_d21/board.cmake
@@ -1,5 +1,5 @@
 set(JLINK_DEVICE ATSAMD21G18)
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/samd21g18a_flash.ld)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC

From 7ce4cfa638a86bfabd7ce8147ea5468d69c1af21 Mon Sep 17 00:00:00 2001
From: maidnl <d.aimo@arduino.cc>
Date: Fri, 8 Sep 2023 10:12:03 +0200
Subject: [PATCH 643/691] renesas: added wait function for IN transaction

This fixes a problem found on MSD class where data read from from disks were sometimes partially overwritten by the status MSD message ("USBS...").
The function introduced wait for the hw fifo pipe to be empty, that prevent that new writing in the fife overwrite data which are not yet be transmitted by hw.
---
 src/portable/renesas/rusb2/dcd_rusb2.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 3ec1b70b5..68ef5890f 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -266,6 +266,13 @@ static void pipe_read_packet_ff(rusb2_reg_t * rusb, tu_fifo_t *f, volatile void
   tu_fifo_advance_write_pointer(f, count);
 }
 
+
+static void wait_pipe_fifo_empty(rusb2_reg_t* rusb, uint8_t num) {
+  TU_ASSERT(num);
+  while( (rusb->PIPE_CTR[num-1] & RUSB2_PIPE_CTR_INBUFM_Msk) > 0 ) {}
+}
+
+
 //--------------------------------------------------------------------+
 // Pipe Transfer
 //--------------------------------------------------------------------+
@@ -339,6 +346,7 @@ static bool pipe_xfer_in(rusb2_reg_t* rusb, unsigned num)
   const unsigned rem  = pipe->remaining;
 
   if (!rem) {
+    wait_pipe_fifo_empty(rusb, num);
     pipe->buf = NULL;
     return true;
   }

From bcc77a60e047837a82b0719ffa95a4d6f688468d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 8 Sep 2023 17:40:00 +0700
Subject: [PATCH 644/691] get spi working for metro m4 express

---
 hw/bsp/nrf/family.c                           |  73 +++---
 hw/bsp/samd51/boards/metro_m4_express/board.h |   9 +
 hw/bsp/samd51/family.c                        | 231 ++++++++++++++----
 hw/bsp/samd51/family.cmake                    |   1 +
 4 files changed, 238 insertions(+), 76 deletions(-)

diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 39ce179e8..47c765a96 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -102,40 +102,6 @@ void max3421e_int_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) {
 
   tuh_int_handler(1);
 }
-
-//--------------------------------------------------------------------+
-// API: SPI transfer with MAX3421E, must be implemented by application
-//--------------------------------------------------------------------+
-void tuh_max3421e_int_api(uint8_t rhport, bool enabled) {
-  (void) rhport;
-
-  // use NVIC_Enable/Disable instead since nrfx_gpiote_trigger_enable/disable clear pending and can miss interrupt
-  // when disabled
-  if (enabled) {
-    NVIC_EnableIRQ(GPIOTE_IRQn);
-  } else {
-    NVIC_DisableIRQ(GPIOTE_IRQn);
-  }
-}
-
-void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
-  (void) rhport;
-  nrf_gpio_pin_write(MAX3421E_CS_PIN, active ? 0 : 1);
-}
-
-bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_len, uint8_t *rx_buf, size_t rx_len) {
-  (void) rhport;
-
-  nrfx_spim_xfer_desc_t xfer = {
-      .p_tx_buffer = tx_buf,
-      .tx_length   = tx_len,
-      .p_rx_buffer = rx_buf,
-      .rx_length   = rx_len,
-  };
-
-  return (nrfx_spim_xfer(&_spi, &xfer, 0) == NRFX_SUCCESS);
-}
-
 #endif
 
 
@@ -242,7 +208,7 @@ void board_init(void) {
 
   // manually manage CS
   nrf_gpio_cfg_output(MAX3421E_CS_PIN);
-  tuh_max3421_spi_cs_api(0, false);
+  nrf_gpio_pin_write(MAX3421E_CS_PIN, 1);
 
   // USB host using max3421e usb controller via SPI
   nrfx_spim_config_t cfg = {
@@ -345,3 +311,40 @@ void nrf_error_cb(uint32_t id, uint32_t pc, uint32_t info) {
   (void) info;
 }
 #endif
+
+//--------------------------------------------------------------------+
+// API: SPI transfer with MAX3421E, must be implemented by application
+//--------------------------------------------------------------------+
+#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
+
+void tuh_max3421e_int_api(uint8_t rhport, bool enabled) {
+  (void) rhport;
+
+  // use NVIC_Enable/Disable instead since nrfx_gpiote_trigger_enable/disable clear pending and can miss interrupt
+  // when disabled and re-enabled.
+  if (enabled) {
+    NVIC_EnableIRQ(GPIOTE_IRQn);
+  } else {
+    NVIC_DisableIRQ(GPIOTE_IRQn);
+  }
+}
+
+void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
+  (void) rhport;
+  nrf_gpio_pin_write(MAX3421E_CS_PIN, active ? 0 : 1);
+}
+
+bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_len, uint8_t *rx_buf, size_t rx_len) {
+  (void) rhport;
+
+  nrfx_spim_xfer_desc_t xfer = {
+      .p_tx_buffer = tx_buf,
+      .tx_length   = tx_len,
+      .p_rx_buffer = rx_buf,
+      .rx_length   = rx_len,
+  };
+
+  return (nrfx_spim_xfer(&_spi, &xfer, 0) == NRFX_SUCCESS);
+}
+
+#endif
diff --git a/hw/bsp/samd51/boards/metro_m4_express/board.h b/hw/bsp/samd51/boards/metro_m4_express/board.h
index 5d7734576..3441d03e9 100644
--- a/hw/bsp/samd51/boards/metro_m4_express/board.h
+++ b/hw/bsp/samd51/boards/metro_m4_express/board.h
@@ -43,6 +43,15 @@
 #define UART_TX_PIN           23
 #define UART_RX_PIN           22
 
+// SPI for USB host shield
+#define MAX3421E_SERCOM   SERCOM2
+#define MAX3421E_SCK_PIN  13
+#define MAX3421E_MOSI_PIN 12
+#define MAX3421E_MISO_PIN 14
+#define MAX3421E_CS_PIN   18 // D10
+#define MAX3241E_INTR_PIN 20 // D9
+
+
 #ifdef __cplusplus
  }
 #endif
diff --git a/hw/bsp/samd51/family.c b/hw/bsp/samd51/family.c
index 2df9cbafb..45a9aa5e0 100644
--- a/hw/bsp/samd51/family.c
+++ b/hw/bsp/samd51/family.c
@@ -43,30 +43,6 @@
 #pragma GCC diagnostic pop
 #endif
 
-
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-void USB_0_Handler (void)
-{
-  tud_int_handler(0);
-}
-
-void USB_1_Handler (void)
-{
-  tud_int_handler(0);
-}
-
-void USB_2_Handler (void)
-{
-  tud_int_handler(0);
-}
-
-void USB_3_Handler (void)
-{
-  tud_int_handler(0);
-}
-
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM DECLARATION
 //--------------------------------------------------------------------+
@@ -77,8 +53,81 @@ void USB_3_Handler (void)
 /* Not referenced GCLKs, initialized last */
 #define _GCLK_INIT_LAST (~_GCLK_INIT_1ST)
 
-void board_init(void)
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void USB_0_Handler(void) {
+  tud_int_handler(0);
+}
+
+void USB_1_Handler(void) {
+  tud_int_handler(0);
+}
+
+void USB_2_Handler(void) {
+  tud_int_handler(0);
+}
+
+void USB_3_Handler(void) {
+  tud_int_handler(0);
+}
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
+void max3421_init(void)
 {
+  //------------- SPI Init -------------//
+
+  // Enable the APB clock for SERCOM2
+  MCLK->APBBMASK.reg |= MCLK_APBBMASK_SERCOM2;
+
+  // Configure GCLK for SERCOM2, initClockNVIC()
+  GCLK->PCHCTRL[SERCOM2_GCLK_ID_CORE].reg = GCLK_PCHCTRL_GEN_GCLK0_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
+  GCLK->PCHCTRL[SERCOM2_GCLK_ID_SLOW].reg = GCLK_PCHCTRL_GEN_GCLK3_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
+
+  // Disable the SPI module
+  SERCOM2->SPI.CTRLA.bit.ENABLE = 0;
+
+  // Reset the SPI module
+  SERCOM2->SPI.CTRLA.bit.SWRST = 1;
+  while (SERCOM2->SPI.SYNCBUSY.bit.SWRST);
+
+  // Set up SPI in master mode, MSB first, SPI mode 0
+  uint8_t const mosi_pad = 0;
+  uint8_t const miso_pad = 2;
+  SERCOM2->SPI.CTRLA.reg = SERCOM_SPI_CTRLA_MODE(3) | SERCOM_SPI_CTRLA_DOPO(mosi_pad) | SERCOM_SPI_CTRLA_DIPO(miso_pad);
+
+  SERCOM2->SPI.CTRLB.reg = SERCOM_SPI_CTRLB_CHSIZE(0) | SERCOM_SPI_CTRLB_RXEN;
+  while( SERCOM2->SPI.SYNCBUSY.bit.CTRLB == 1 );
+
+  // Set the baud rate
+  uint32_t baudrate = 4000000u;
+  SERCOM2->SPI.BAUD.reg = (uint8_t)(SystemCoreClock / (2 * baudrate) - 1); // Replace 1000000 with your desired baud rate
+
+  // Configure PA12 as MOSI (PAD0), PA13 as SCK (PAD1), PA14 as MISO (PAD2)
+  // 2 function C: PIO_SERCOM
+  gpio_set_pin_direction(MAX3421E_SCK_PIN, GPIO_DIRECTION_OUT);
+  gpio_set_pin_pull_mode(MAX3421E_SCK_PIN, GPIO_PULL_OFF);
+  gpio_set_pin_function(MAX3421E_SCK_PIN, 2);
+
+  gpio_set_pin_direction(MAX3421E_MOSI_PIN, GPIO_DIRECTION_OUT);
+  gpio_set_pin_pull_mode(MAX3421E_MOSI_PIN, GPIO_PULL_OFF);
+  gpio_set_pin_function(MAX3421E_MOSI_PIN, 2);
+
+  gpio_set_pin_direction(MAX3421E_MISO_PIN, GPIO_DIRECTION_IN);
+  gpio_set_pin_pull_mode(MAX3421E_MISO_PIN, GPIO_PULL_OFF);
+  gpio_set_pin_function(MAX3421E_MISO_PIN, 2);
+
+  // Enable the SPI module
+  SERCOM2->SPI.CTRLA.bit.ENABLE = 1;
+  while (SERCOM2->SPI.SYNCBUSY.bit.ENABLE);
+}
+#endif
+
+void board_init(void) {
   // Clock init ( follow hpl_init.c )
   hri_nvmctrl_set_CTRLA_RWS_bf(NVMCTRL, 0);
 
@@ -104,7 +153,7 @@ void board_init(void)
   gpio_set_pin_direction(BUTTON_PIN, GPIO_DIRECTION_IN);
   gpio_set_pin_pull_mode(BUTTON_PIN, GPIO_PULL_UP);
 
-#if CFG_TUSB_OS  == OPT_OS_FREERTOS
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
   NVIC_SetPriority(USB_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
@@ -129,45 +178,145 @@ void board_init(void)
 
   gpio_set_pin_function(PIN_PA24, PINMUX_PA24H_USB_DM);
   gpio_set_pin_function(PIN_PA25, PINMUX_PA25H_USB_DP);
+
+#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
+  // CS pin
+  gpio_set_pin_direction(MAX3421E_CS_PIN, GPIO_DIRECTION_OUT);
+  gpio_set_pin_level(MAX3421E_CS_PIN, 1);
+
+  // SPI
+  max3421_init();
+
+  // INT pin with external interrupt
+  gpio_set_pin_direction(MAX3241E_INTR_PIN, GPIO_DIRECTION_IN);
+  gpio_set_pin_pull_mode(MAX3241E_INTR_PIN, GPIO_PULL_UP);
+
+  // Enable the APB clock for EIC (External Interrupt Controller)
+  MCLK->APBAMASK.reg |= MCLK_APBAMASK_EIC;
+
+  // Configure GCLK for EIC
+  GCLK->PCHCTRL[EIC_GCLK_ID].reg = GCLK_PCHCTRL_GEN_GCLK0_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
+
+  // Configure PA20 as an input
+  PORT->Group[0].DIRCLR.reg = PORT_PA20;
+  PORT->Group[0].PINCFG[20].reg = PORT_PINCFG_INEN | PORT_PINCFG_PULLEN;
+  PORT->Group[0].OUTSET.reg = PORT_PA20;  // Enable pull-up
+
+  // Configure PA20 to use EIC
+  PORT->Group[0].PMUX[10].bit.PMUXE = MUX_PA20A_EIC_EXTINT4;
+  PORT->Group[0].PINCFG[20].bit.PMUXEN = 1;
+
+  // Disable EIC
+  EIC->CTRLA.bit.ENABLE = 0;
+  while (EIC->SYNCBUSY.bit.ENABLE);
+
+  // Configure EXTINT4 (PA20) to trigger on falling edge
+  EIC->CONFIG[0].reg |= EIC_CONFIG_SENSE4_FALL;
+
+  // Enable EXTINT4
+  EIC->INTENSET.reg = EIC_INTENSET_EXTINT(1 << 4);
+
+  // Enable EIC
+  EIC->CTRLA.bit.ENABLE = 1;
+  while (EIC->SYNCBUSY.bit.ENABLE);
+
+#endif
 }
 
 //--------------------------------------------------------------------+
 // Board porting API
 //--------------------------------------------------------------------+
 
-void board_led_write(bool state)
-{
+void board_led_write(bool state) {
   gpio_set_pin_level(LED_PIN, state);
 }
 
-uint32_t board_button_read(void)
-{
+uint32_t board_button_read(void) {
   // button is active low
   return gpio_get_pin_level(BUTTON_PIN) ? 0 : 1;
 }
 
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
+int board_uart_read(uint8_t *buf, int len) {
+  (void) buf;
+  (void) len;
   return 0;
 }
 
-int board_uart_write(void const * buf, int len)
-{
-  (void) buf; (void) len;
+int board_uart_write(void const *buf, int len) {
+  (void) buf;
+  (void) len;
   return 0;
 }
 
-#if CFG_TUSB_OS  == OPT_OS_NONE
+#if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
 
-void SysTick_Handler (void)
-{
+void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void)
-{
+uint32_t board_millis(void) {
   return system_ticks;
 }
+
+//--------------------------------------------------------------------+
+// API: SPI transfer with MAX3421E, must be implemented by application
+//--------------------------------------------------------------------+
+#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
+
+void EIC_4_Handler(void)
+{
+  // Clear the interrupt flag
+  EIC->INTFLAG.reg = EIC_INTFLAG_EXTINT(1 << 4);
+
+  // Call the TinyUSB interrupt handler
+  tuh_int_handler(1);
+}
+
+void tuh_max3421e_int_api(uint8_t rhport, bool enabled) {
+  (void) rhport;
+
+  if (enabled) {
+    NVIC_EnableIRQ(EIC_4_IRQn);
+  } else {
+    NVIC_DisableIRQ(EIC_4_IRQn);
+  }
+}
+
+void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
+  (void) rhport;
+  gpio_set_pin_level(MAX3421E_CS_PIN, active ? 0 : 1);
+}
+
+bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_len, uint8_t *rx_buf, size_t rx_len) {
+  (void) rhport;
+
+  size_t count = 0;
+  while (count < tx_len || count < rx_len) {
+    // Wait for the transmit buffer to be empty
+//    while (!SERCOM2->SPI.INTFLAG.bit.DRE);
+
+    // Write data to be transmitted
+    uint8_t data = 0x00;
+    if (count < tx_len) {
+       data = tx_buf[count];
+    }
+
+    SERCOM2->SPI.DATA.bit.DATA = data;
+
+    // Wait for the receive buffer to be filled
+    while (!SERCOM2->SPI.INTFLAG.bit.RXC);
+
+    // Read received data
+    if (rx_buf) {
+      rx_buf[count] = SERCOM2->SPI.DATA.bit.DATA;
+    }
+
+    count++;
+  }
+
+  return true;
+}
+#endif
+
 #endif
diff --git a/hw/bsp/samd51/family.cmake b/hw/bsp/samd51/family.cmake
index fa9586066..1dce483fd 100644
--- a/hw/bsp/samd51/family.cmake
+++ b/hw/bsp/samd51/family.cmake
@@ -93,6 +93,7 @@ function(family_configure_example TARGET RTOS)
   family_add_tinyusb(${TARGET} OPT_MCU_SAMD51 ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/microchip/samd/dcd_samd.c
+    ${TOP}/src/portable/analog/max3421/hcd_max3421.c
     )
   target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 

From 1d68f2a3280cdc76912ec7e89238640e950e542c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 8 Sep 2023 18:39:09 +0700
Subject: [PATCH 645/691] metro m4 working with max3421e

---
 hw/bsp/samd51/family.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/hw/bsp/samd51/family.c b/hw/bsp/samd51/family.c
index 45a9aa5e0..51cfd19ba 100644
--- a/hw/bsp/samd51/family.c
+++ b/hw/bsp/samd51/family.c
@@ -294,7 +294,7 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_l
   size_t count = 0;
   while (count < tx_len || count < rx_len) {
     // Wait for the transmit buffer to be empty
-//    while (!SERCOM2->SPI.INTFLAG.bit.DRE);
+    while (!SERCOM2->SPI.INTFLAG.bit.DRE);
 
     // Write data to be transmitted
     uint8_t data = 0x00;
@@ -302,19 +302,24 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_l
        data = tx_buf[count];
     }
 
-    SERCOM2->SPI.DATA.bit.DATA = data;
+    SERCOM2->SPI.DATA.reg = (uint32_t) data;
 
     // Wait for the receive buffer to be filled
     while (!SERCOM2->SPI.INTFLAG.bit.RXC);
 
     // Read received data
-    if (rx_buf) {
-      rx_buf[count] = SERCOM2->SPI.DATA.bit.DATA;
+    data = (uint8_t) SERCOM2->SPI.DATA.reg;
+    if (count < rx_len) {
+      rx_buf[count] = data;
     }
 
     count++;
   }
 
+  // wait for bus idle and clear flags
+  while (!(SERCOM2->SPI.INTFLAG.reg & (SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_DRE)));
+  SERCOM2->SPI.INTFLAG.reg = SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_DRE;
+
   return true;
 }
 #endif

From 228acbeac2642534753beffd866db2a7eab45e31 Mon Sep 17 00:00:00 2001
From: maidnl <d.aimo@arduino.cc>
Date: Fri, 8 Sep 2023 15:48:05 +0200
Subject: [PATCH 646/691] wait_pipe_fifo_empty() now returns bool (as expected
 using TU_ASSERT macro)

---
 src/portable/renesas/rusb2/dcd_rusb2.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 68ef5890f..24edc30e7 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -267,9 +267,10 @@ static void pipe_read_packet_ff(rusb2_reg_t * rusb, tu_fifo_t *f, volatile void
 }
 
 
-static void wait_pipe_fifo_empty(rusb2_reg_t* rusb, uint8_t num) {
+static bool wait_pipe_fifo_empty(rusb2_reg_t* rusb, uint8_t num) {
   TU_ASSERT(num);
   while( (rusb->PIPE_CTR[num-1] & RUSB2_PIPE_CTR_INBUFM_Msk) > 0 ) {}
+  return true;
 }
 
 

From c074488f75522c7c29dc7853aa2d8597b4858f89 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 9 Sep 2023 12:20:16 +0700
Subject: [PATCH 647/691] minor rename

---
 .../boards/feather_nrf52840_express/board.h   |  10 +-
 hw/bsp/nrf/boards/pca10056/board.h            |  10 +-
 hw/bsp/nrf/boards/pca10095/board.h            |  10 +-
 hw/bsp/nrf/family.c                           |  22 +--
 hw/bsp/samd51/boards/metro_m4_express/board.h |  12 +-
 hw/bsp/samd51/family.c                        | 183 +++++++++---------
 src/portable/analog/max3421/hcd_max3421.c     |  14 +-
 7 files changed, 131 insertions(+), 130 deletions(-)

diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/board.h b/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
index e6e7590ac..76100a14a 100644
--- a/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
+++ b/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
@@ -46,11 +46,11 @@
 #define UART_TX_PIN     25
 
 // SPI for USB host shield
-#define MAX3421E_SCK_PIN  14
-#define MAX3421E_MOSI_PIN 13
-#define MAX3421E_MISO_PIN 15
-#define MAX3421E_CS_PIN   27
-#define MAX3241E_INTR_PIN 26
+#define MAX3421_SCK_PIN  14
+#define MAX3421_MOSI_PIN 13
+#define MAX3421_MISO_PIN 15
+#define MAX3421_CS_PIN   27
+#define MAX3421_INTR_PIN 26
 
 #ifdef __cplusplus
  }
diff --git a/hw/bsp/nrf/boards/pca10056/board.h b/hw/bsp/nrf/boards/pca10056/board.h
index 16d31addb..9459e7911 100644
--- a/hw/bsp/nrf/boards/pca10056/board.h
+++ b/hw/bsp/nrf/boards/pca10056/board.h
@@ -46,11 +46,11 @@
 #define UART_TX_PIN           6
 
 // SPI for USB host shield
-#define MAX3421E_SCK_PIN  _PINNUM(1, 15)
-#define MAX3421E_MOSI_PIN _PINNUM(1, 13)
-#define MAX3421E_MISO_PIN _PINNUM(1, 14)
-#define MAX3421E_CS_PIN   _PINNUM(1, 12)
-#define MAX3241E_INTR_PIN _PINNUM(1, 11)
+#define MAX3421_SCK_PIN  _PINNUM(1, 15)
+#define MAX3421_MOSI_PIN _PINNUM(1, 13)
+#define MAX3421_MISO_PIN _PINNUM(1, 14)
+#define MAX3421_CS_PIN   _PINNUM(1, 12)
+#define MAX3421_INTR_PIN _PINNUM(1, 11)
 
 #ifdef __cplusplus
  }
diff --git a/hw/bsp/nrf/boards/pca10095/board.h b/hw/bsp/nrf/boards/pca10095/board.h
index b9d3a19dc..ad3379bf6 100644
--- a/hw/bsp/nrf/boards/pca10095/board.h
+++ b/hw/bsp/nrf/boards/pca10095/board.h
@@ -46,11 +46,11 @@
 #define UART_TX_PIN           33
 
 // SPI for USB host shield
-#define MAX3421E_SCK_PIN  _PINNUM(1, 15)
-#define MAX3421E_MOSI_PIN _PINNUM(1, 13)
-#define MAX3421E_MISO_PIN _PINNUM(1, 14)
-#define MAX3421E_CS_PIN   _PINNUM(1, 12)
-#define MAX3241E_INTR_PIN _PINNUM(1, 11)
+#define MAX3421_SCK_PIN  _PINNUM(1, 15)
+#define MAX3421_MOSI_PIN _PINNUM(1, 13)
+#define MAX3421_MISO_PIN _PINNUM(1, 14)
+#define MAX3421_CS_PIN   _PINNUM(1, 12)
+#define MAX3421_INTR_PIN _PINNUM(1, 11)
 
 #ifdef __cplusplus
  }
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 47c765a96..6fcfd9476 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -97,8 +97,8 @@ TU_ATTR_UNUSED static void power_event_handler(nrfx_power_usb_evt_t event) {
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
 static nrfx_spim_t _spi = NRFX_SPIM_INSTANCE(1);
 
-void max3421e_int_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) {
-  if (!(pin == MAX3241E_INTR_PIN && action == NRF_GPIOTE_POLARITY_HITOLO)) return;
+void max3421_int_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) {
+  if (!(pin == MAX3421_INTR_PIN && action == NRF_GPIOTE_POLARITY_HITOLO)) return;
 
   tuh_int_handler(1);
 }
@@ -207,14 +207,14 @@ void board_init(void) {
   #endif
 
   // manually manage CS
-  nrf_gpio_cfg_output(MAX3421E_CS_PIN);
-  nrf_gpio_pin_write(MAX3421E_CS_PIN, 1);
+  nrf_gpio_cfg_output(MAX3421_CS_PIN);
+  nrf_gpio_pin_write(MAX3421_CS_PIN, 1);
 
   // USB host using max3421e usb controller via SPI
   nrfx_spim_config_t cfg = {
-      .sck_pin        = MAX3421E_SCK_PIN,
-      .mosi_pin       = MAX3421E_MOSI_PIN,
-      .miso_pin       = MAX3421E_MISO_PIN,
+      .sck_pin        = MAX3421_SCK_PIN,
+      .mosi_pin       = MAX3421_MOSI_PIN,
+      .miso_pin       = MAX3421_MISO_PIN,
       .ss_pin         = NRFX_SPIM_PIN_NOT_USED,
       .ss_active_high = false,
       .irq_priority   = 3,
@@ -233,8 +233,8 @@ void board_init(void) {
   nrfx_gpiote_in_config_t in_config = NRFX_GPIOTE_CONFIG_IN_SENSE_HITOLO(true);
   in_config.pull = NRF_GPIO_PIN_PULLUP;
 
-  nrfx_gpiote_in_init(MAX3241E_INTR_PIN, &in_config, max3421e_int_handler);
-  nrfx_gpiote_trigger_enable(MAX3241E_INTR_PIN, true);
+  nrfx_gpiote_in_init(MAX3421_INTR_PIN, &in_config, max3421_int_handler);
+  nrfx_gpiote_trigger_enable(MAX3421_INTR_PIN, true);
 #endif
 
 }
@@ -317,7 +317,7 @@ void nrf_error_cb(uint32_t id, uint32_t pc, uint32_t info) {
 //--------------------------------------------------------------------+
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
 
-void tuh_max3421e_int_api(uint8_t rhport, bool enabled) {
+void tuh_max3421_int_api(uint8_t rhport, bool enabled) {
   (void) rhport;
 
   // use NVIC_Enable/Disable instead since nrfx_gpiote_trigger_enable/disable clear pending and can miss interrupt
@@ -331,7 +331,7 @@ void tuh_max3421e_int_api(uint8_t rhport, bool enabled) {
 
 void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
   (void) rhport;
-  nrf_gpio_pin_write(MAX3421E_CS_PIN, active ? 0 : 1);
+  nrf_gpio_pin_write(MAX3421_CS_PIN, active ? 0 : 1);
 }
 
 bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_len, uint8_t *rx_buf, size_t rx_len) {
diff --git a/hw/bsp/samd51/boards/metro_m4_express/board.h b/hw/bsp/samd51/boards/metro_m4_express/board.h
index 3441d03e9..fe2a867a4 100644
--- a/hw/bsp/samd51/boards/metro_m4_express/board.h
+++ b/hw/bsp/samd51/boards/metro_m4_express/board.h
@@ -44,12 +44,12 @@
 #define UART_RX_PIN           22
 
 // SPI for USB host shield
-#define MAX3421E_SERCOM   SERCOM2
-#define MAX3421E_SCK_PIN  13
-#define MAX3421E_MOSI_PIN 12
-#define MAX3421E_MISO_PIN 14
-#define MAX3421E_CS_PIN   18 // D10
-#define MAX3241E_INTR_PIN 20 // D9
+#define MAX3421_SERCOM   2  // SERCOM2
+#define MAX3421_SCK_PIN  13
+#define MAX3421_MOSI_PIN 12
+#define MAX3421_MISO_PIN 14
+#define MAX3421_CS_PIN   18 // D10
+#define MAX3421_INTR_PIN 20 // D9
 
 
 #ifdef __cplusplus
diff --git a/hw/bsp/samd51/family.c b/hw/bsp/samd51/family.c
index 51cfd19ba..34dd93cef 100644
--- a/hw/bsp/samd51/family.c
+++ b/hw/bsp/samd51/family.c
@@ -73,58 +73,14 @@ void USB_3_Handler(void) {
 }
 
 //--------------------------------------------------------------------+
-//
+// Implementation
 //--------------------------------------------------------------------+
 
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
-void max3421_init(void)
-{
-  //------------- SPI Init -------------//
+static void max3421_init(void);
 
-  // Enable the APB clock for SERCOM2
-  MCLK->APBBMASK.reg |= MCLK_APBBMASK_SERCOM2;
+//#define
 
-  // Configure GCLK for SERCOM2, initClockNVIC()
-  GCLK->PCHCTRL[SERCOM2_GCLK_ID_CORE].reg = GCLK_PCHCTRL_GEN_GCLK0_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
-  GCLK->PCHCTRL[SERCOM2_GCLK_ID_SLOW].reg = GCLK_PCHCTRL_GEN_GCLK3_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
-
-  // Disable the SPI module
-  SERCOM2->SPI.CTRLA.bit.ENABLE = 0;
-
-  // Reset the SPI module
-  SERCOM2->SPI.CTRLA.bit.SWRST = 1;
-  while (SERCOM2->SPI.SYNCBUSY.bit.SWRST);
-
-  // Set up SPI in master mode, MSB first, SPI mode 0
-  uint8_t const mosi_pad = 0;
-  uint8_t const miso_pad = 2;
-  SERCOM2->SPI.CTRLA.reg = SERCOM_SPI_CTRLA_MODE(3) | SERCOM_SPI_CTRLA_DOPO(mosi_pad) | SERCOM_SPI_CTRLA_DIPO(miso_pad);
-
-  SERCOM2->SPI.CTRLB.reg = SERCOM_SPI_CTRLB_CHSIZE(0) | SERCOM_SPI_CTRLB_RXEN;
-  while( SERCOM2->SPI.SYNCBUSY.bit.CTRLB == 1 );
-
-  // Set the baud rate
-  uint32_t baudrate = 4000000u;
-  SERCOM2->SPI.BAUD.reg = (uint8_t)(SystemCoreClock / (2 * baudrate) - 1); // Replace 1000000 with your desired baud rate
-
-  // Configure PA12 as MOSI (PAD0), PA13 as SCK (PAD1), PA14 as MISO (PAD2)
-  // 2 function C: PIO_SERCOM
-  gpio_set_pin_direction(MAX3421E_SCK_PIN, GPIO_DIRECTION_OUT);
-  gpio_set_pin_pull_mode(MAX3421E_SCK_PIN, GPIO_PULL_OFF);
-  gpio_set_pin_function(MAX3421E_SCK_PIN, 2);
-
-  gpio_set_pin_direction(MAX3421E_MOSI_PIN, GPIO_DIRECTION_OUT);
-  gpio_set_pin_pull_mode(MAX3421E_MOSI_PIN, GPIO_PULL_OFF);
-  gpio_set_pin_function(MAX3421E_MOSI_PIN, 2);
-
-  gpio_set_pin_direction(MAX3421E_MISO_PIN, GPIO_DIRECTION_IN);
-  gpio_set_pin_pull_mode(MAX3421E_MISO_PIN, GPIO_PULL_OFF);
-  gpio_set_pin_function(MAX3421E_MISO_PIN, 2);
-
-  // Enable the SPI module
-  SERCOM2->SPI.CTRLA.bit.ENABLE = 1;
-  while (SERCOM2->SPI.SYNCBUSY.bit.ENABLE);
-}
 #endif
 
 void board_init(void) {
@@ -180,46 +136,7 @@ void board_init(void) {
   gpio_set_pin_function(PIN_PA25, PINMUX_PA25H_USB_DP);
 
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
-  // CS pin
-  gpio_set_pin_direction(MAX3421E_CS_PIN, GPIO_DIRECTION_OUT);
-  gpio_set_pin_level(MAX3421E_CS_PIN, 1);
-
-  // SPI
   max3421_init();
-
-  // INT pin with external interrupt
-  gpio_set_pin_direction(MAX3241E_INTR_PIN, GPIO_DIRECTION_IN);
-  gpio_set_pin_pull_mode(MAX3241E_INTR_PIN, GPIO_PULL_UP);
-
-  // Enable the APB clock for EIC (External Interrupt Controller)
-  MCLK->APBAMASK.reg |= MCLK_APBAMASK_EIC;
-
-  // Configure GCLK for EIC
-  GCLK->PCHCTRL[EIC_GCLK_ID].reg = GCLK_PCHCTRL_GEN_GCLK0_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
-
-  // Configure PA20 as an input
-  PORT->Group[0].DIRCLR.reg = PORT_PA20;
-  PORT->Group[0].PINCFG[20].reg = PORT_PINCFG_INEN | PORT_PINCFG_PULLEN;
-  PORT->Group[0].OUTSET.reg = PORT_PA20;  // Enable pull-up
-
-  // Configure PA20 to use EIC
-  PORT->Group[0].PMUX[10].bit.PMUXE = MUX_PA20A_EIC_EXTINT4;
-  PORT->Group[0].PINCFG[20].bit.PMUXEN = 1;
-
-  // Disable EIC
-  EIC->CTRLA.bit.ENABLE = 0;
-  while (EIC->SYNCBUSY.bit.ENABLE);
-
-  // Configure EXTINT4 (PA20) to trigger on falling edge
-  EIC->CONFIG[0].reg |= EIC_CONFIG_SENSE4_FALL;
-
-  // Enable EXTINT4
-  EIC->INTENSET.reg = EIC_INTENSET_EXTINT(1 << 4);
-
-  // Enable EIC
-  EIC->CTRLA.bit.ENABLE = 1;
-  while (EIC->SYNCBUSY.bit.ENABLE);
-
 #endif
 }
 
@@ -264,8 +181,91 @@ uint32_t board_millis(void) {
 //--------------------------------------------------------------------+
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
 
-void EIC_4_Handler(void)
-{
+static void max3421_init(void) {
+  // CS pin
+  gpio_set_pin_direction(MAX3421_CS_PIN, GPIO_DIRECTION_OUT);
+  gpio_set_pin_level(MAX3421_CS_PIN, 1);
+
+  //------------- SPI Init -------------//
+
+  // Enable the APB clock for SERCOM2
+  MCLK->APBBMASK.reg |= MCLK_APBBMASK_SERCOM2;
+
+  // Configure GCLK for SERCOM2, initClockNVIC()
+  GCLK->PCHCTRL[SERCOM2_GCLK_ID_CORE].reg = GCLK_PCHCTRL_GEN_GCLK0_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
+  GCLK->PCHCTRL[SERCOM2_GCLK_ID_SLOW].reg = GCLK_PCHCTRL_GEN_GCLK3_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
+
+  // Disable the SPI module
+  SERCOM2->SPI.CTRLA.bit.ENABLE = 0;
+
+  // Reset the SPI module
+  SERCOM2->SPI.CTRLA.bit.SWRST = 1;
+  while (SERCOM2->SPI.SYNCBUSY.bit.SWRST);
+
+  // Set up SPI in master mode, MSB first, SPI mode 0
+  uint8_t const mosi_pad = 0;
+  uint8_t const miso_pad = 2;
+  SERCOM2->SPI.CTRLA.reg = SERCOM_SPI_CTRLA_MODE(3) | SERCOM_SPI_CTRLA_DOPO(mosi_pad) | SERCOM_SPI_CTRLA_DIPO(miso_pad);
+
+  SERCOM2->SPI.CTRLB.reg = SERCOM_SPI_CTRLB_CHSIZE(0) | SERCOM_SPI_CTRLB_RXEN;
+  while (SERCOM2->SPI.SYNCBUSY.bit.CTRLB == 1);
+
+  // Set the baud rate
+  uint32_t baudrate = 4000000u;
+  SERCOM2->SPI.BAUD.reg = (uint8_t) (SystemCoreClock / (2 * baudrate) -
+                                     1); // Replace 1000000 with your desired baud rate
+
+  // Configure PA12 as MOSI (PAD0), PA13 as SCK (PAD1), PA14 as MISO (PAD2)
+  // 2 function C: PIO_SERCOM
+  gpio_set_pin_direction(MAX3421_SCK_PIN, GPIO_DIRECTION_OUT);
+  gpio_set_pin_pull_mode(MAX3421_SCK_PIN, GPIO_PULL_OFF);
+  gpio_set_pin_function(MAX3421_SCK_PIN, 2);
+
+  gpio_set_pin_direction(MAX3421_MOSI_PIN, GPIO_DIRECTION_OUT);
+  gpio_set_pin_pull_mode(MAX3421_MOSI_PIN, GPIO_PULL_OFF);
+  gpio_set_pin_function(MAX3421_MOSI_PIN, 2);
+
+  gpio_set_pin_direction(MAX3421_MISO_PIN, GPIO_DIRECTION_IN);
+  gpio_set_pin_pull_mode(MAX3421_MISO_PIN, GPIO_PULL_OFF);
+  gpio_set_pin_function(MAX3421_MISO_PIN, 2);
+
+  // Enable the SPI module
+  SERCOM2->SPI.CTRLA.bit.ENABLE = 1;
+  while (SERCOM2->SPI.SYNCBUSY.bit.ENABLE);
+
+  //------------- External Interrupt -------------//
+
+  // INT pin with external interrupt
+  gpio_set_pin_direction(MAX3421_INTR_PIN, GPIO_DIRECTION_IN);
+  gpio_set_pin_pull_mode(MAX3421_INTR_PIN, GPIO_PULL_UP);
+
+  // Enable the APB clock for EIC (External Interrupt Controller)
+  MCLK->APBAMASK.reg |= MCLK_APBAMASK_EIC;
+
+  // Configure GCLK for EIC
+  GCLK->PCHCTRL[EIC_GCLK_ID].reg = GCLK_PCHCTRL_GEN_GCLK0_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
+
+  // Configure PA20 as an input with function A (external interrupt)
+  gpio_set_pin_direction(MAX3421_INTR_PIN, GPIO_DIRECTION_IN);
+  gpio_set_pin_pull_mode(MAX3421_INTR_PIN, GPIO_PULL_UP);
+  gpio_set_pin_function(MAX3421_INTR_PIN, 0);
+
+  // Disable EIC
+  EIC->CTRLA.bit.ENABLE = 0;
+  while (EIC->SYNCBUSY.bit.ENABLE);
+
+  // Configure EXTINT4 (PA20) to trigger on falling edge
+  EIC->CONFIG[0].reg |= EIC_CONFIG_SENSE4_FALL;
+
+  // Enable EXTINT4
+  EIC->INTENSET.reg = EIC_INTENSET_EXTINT(1 << 4);
+
+  // Enable EIC
+  EIC->CTRLA.bit.ENABLE = 1;
+  while (EIC->SYNCBUSY.bit.ENABLE);
+}
+
+void EIC_4_Handler(void) {
   // Clear the interrupt flag
   EIC->INTFLAG.reg = EIC_INTFLAG_EXTINT(1 << 4);
 
@@ -273,7 +273,7 @@ void EIC_4_Handler(void)
   tuh_int_handler(1);
 }
 
-void tuh_max3421e_int_api(uint8_t rhport, bool enabled) {
+void tuh_max3421_int_api(uint8_t rhport, bool enabled) {
   (void) rhport;
 
   if (enabled) {
@@ -285,7 +285,7 @@ void tuh_max3421e_int_api(uint8_t rhport, bool enabled) {
 
 void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
   (void) rhport;
-  gpio_set_pin_level(MAX3421E_CS_PIN, active ? 0 : 1);
+  gpio_set_pin_level(MAX3421_CS_PIN, active ? 0 : 1);
 }
 
 bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_len, uint8_t *rx_buf, size_t rx_len) {
@@ -299,7 +299,7 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_l
     // Write data to be transmitted
     uint8_t data = 0x00;
     if (count < tx_len) {
-       data = tx_buf[count];
+      data = tx_buf[count];
     }
 
     SERCOM2->SPI.DATA.reg = (uint32_t) data;
@@ -322,6 +322,7 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_l
 
   return true;
 }
+
 #endif
 
 #endif
diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index 95cf5516e..238b518a0 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -212,7 +212,7 @@ static max3421_data_t _hcd_data;
 
 void tuh_max3421_spi_cs_api(uint8_t rhport, bool active);
 bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_len, uint8_t * rx_buf, size_t rx_len);
-void tuh_max3421e_int_api(uint8_t rhport, bool enabled);
+void tuh_max3421_int_api(uint8_t rhport, bool enabled);
 
 static void handle_connect_irq(uint8_t rhport, bool in_isr);
 static inline void hirq_write(uint8_t rhport, uint8_t data, bool in_isr);
@@ -225,7 +225,7 @@ static void max3421_spi_lock(uint8_t rhport, bool in_isr) {
   // disable interrupt and mutex lock (for pre-emptive RTOS) if not in_isr
   if (!in_isr) {
     (void) osal_mutex_lock(_hcd_data.spi_mutex, OSAL_TIMEOUT_WAIT_FOREVER);
-    tuh_max3421e_int_api(rhport, false);
+    tuh_max3421_int_api(rhport, false);
   }
 
   // assert CS
@@ -238,7 +238,7 @@ static void max3421_spi_unlock(uint8_t rhport, bool in_isr) {
 
   // mutex unlock and re-enable interrupt
   if (!in_isr) {
-    tuh_max3421e_int_api(rhport, true);
+    tuh_max3421_int_api(rhport, true);
     (void) osal_mutex_unlock(_hcd_data.spi_mutex);
   }
 }
@@ -411,7 +411,7 @@ bool hcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) {
 bool hcd_init(uint8_t rhport) {
   (void) rhport;
 
-  tuh_max3421e_int_api(rhport, false);
+  tuh_max3421_int_api(rhport, false);
   tuh_max3421_spi_cs_api(rhport, false);
 
   TU_LOG2_INT(sizeof(max3421_ep_t));
@@ -450,7 +450,7 @@ bool hcd_init(uint8_t rhport) {
   // Enable IRQ
   hien_write(rhport, DEFAULT_HIEN, false);
 
-  tuh_max3421e_int_api(rhport, true);
+  tuh_max3421_int_api(rhport, true);
 
   // Enable Interrupt pin
   reg_write(rhport, CPUCTL_ADDR, CPUCTL_IE, false);
@@ -461,13 +461,13 @@ bool hcd_init(uint8_t rhport) {
 // Enable USB interrupt
 // Not actually enable GPIO interrupt, just set variable to prevent handler to process
 void hcd_int_enable (uint8_t rhport) {
-  tuh_max3421e_int_api(rhport, true);
+  tuh_max3421_int_api(rhport, true);
 }
 
 // Disable USB interrupt
 // Not actually disable GPIO interrupt, just set variable to prevent handler to process
 void hcd_int_disable(uint8_t rhport) {
-  tuh_max3421e_int_api(rhport, false);
+  tuh_max3421_int_api(rhport, false);
 }
 
 // Get frame number (1ms)

From 605ad73ec02033aa6b66e6899e232537ca2354bb Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 9 Sep 2023 13:04:36 +0700
Subject: [PATCH 648/691] refactor max3421_init() for samd51 to be generic for
 sercom and eic

---
 hw/bsp/samd51/boards/metro_m4_express/board.h |  15 ++-
 hw/bsp/samd51/family.c                        | 108 +++++++++++-------
 2 files changed, 77 insertions(+), 46 deletions(-)

diff --git a/hw/bsp/samd51/boards/metro_m4_express/board.h b/hw/bsp/samd51/boards/metro_m4_express/board.h
index fe2a867a4..aa6bdd0c8 100644
--- a/hw/bsp/samd51/boards/metro_m4_express/board.h
+++ b/hw/bsp/samd51/boards/metro_m4_express/board.h
@@ -44,13 +44,16 @@
 #define UART_RX_PIN           22
 
 // SPI for USB host shield
-#define MAX3421_SERCOM   2  // SERCOM2
-#define MAX3421_SCK_PIN  13
-#define MAX3421_MOSI_PIN 12
-#define MAX3421_MISO_PIN 14
-#define MAX3421_CS_PIN   18 // D10
-#define MAX3421_INTR_PIN 20 // D9
+#define MAX3421_SERCOM_ID 2  // SERCOM2
+#define MAX3421_SCK_PIN   13
+#define MAX3421_MOSI_PIN  12
+#define MAX3421_MOSI_PAD  0
+#define MAX3421_MISO_PIN  14
+#define MAX3421_MISO_PAD  2
+#define MAX3421_CS_PIN    18 // D10
 
+#define MAX3421_INTR_PIN  20 // D9
+#define MAX3421_INTR_EIC_ID 4 // EIC4
 
 #ifdef __cplusplus
  }
diff --git a/hw/bsp/samd51/family.c b/hw/bsp/samd51/family.c
index 34dd93cef..f9e1718d0 100644
--- a/hw/bsp/samd51/family.c
+++ b/hw/bsp/samd51/family.c
@@ -79,7 +79,8 @@ void USB_3_Handler(void) {
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
 static void max3421_init(void);
 
-//#define
+#define MAX3421_SERCOM TU_XSTRCAT(SERCOM, MAX3421_SERCOM_ID)
+#define MAX3421_EIC_Handler TU_XSTRCAT3(EIC_, MAX3421_INTR_EIC_ID, _Handler)
 
 #endif
 
@@ -182,41 +183,55 @@ uint32_t board_millis(void) {
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
 
 static void max3421_init(void) {
-  // CS pin
-  gpio_set_pin_direction(MAX3421_CS_PIN, GPIO_DIRECTION_OUT);
-  gpio_set_pin_level(MAX3421_CS_PIN, 1);
-
   //------------- SPI Init -------------//
+  uint32_t const baudrate = 4000000u;
 
-  // Enable the APB clock for SERCOM2
-  MCLK->APBBMASK.reg |= MCLK_APBBMASK_SERCOM2;
+  struct {
+    volatile uint32_t *mck_apb;
+    uint32_t mask;
+    uint8_t gclk_id_core;
+    uint8_t gclk_id_slow;
+  } const sercom_clock[] = {
+      { &MCLK->APBAMASK.reg, MCLK_APBAMASK_SERCOM0, SERCOM0_GCLK_ID_CORE, SERCOM0_GCLK_ID_SLOW },
+      { &MCLK->APBAMASK.reg, MCLK_APBAMASK_SERCOM1, SERCOM1_GCLK_ID_CORE, SERCOM1_GCLK_ID_SLOW },
+      { &MCLK->APBBMASK.reg, MCLK_APBBMASK_SERCOM2, SERCOM2_GCLK_ID_CORE, SERCOM2_GCLK_ID_SLOW },
+      { &MCLK->APBBMASK.reg, MCLK_APBBMASK_SERCOM3, SERCOM3_GCLK_ID_CORE, SERCOM3_GCLK_ID_SLOW },
+      { &MCLK->APBDMASK.reg, MCLK_APBDMASK_SERCOM4, SERCOM4_GCLK_ID_CORE, SERCOM4_GCLK_ID_SLOW },
+      { &MCLK->APBDMASK.reg, MCLK_APBDMASK_SERCOM5, SERCOM5_GCLK_ID_CORE, SERCOM5_GCLK_ID_SLOW },
+      #ifdef SERCOM6_GCLK_ID_CORE
+      { &MCLK->APBDMASK.reg, MCLK_APBDMASK_SERCOM6, SERCOM6_GCLK_ID_CORE, SERCOM6_GCLK_ID_SLOW },
+      #endif
+      #ifdef SERCOM7_GCLK_ID_CORE
+      { &MCLK->APBDMASK.reg, MCLK_APBDMASK_SERCOM7, SERCOM7_GCLK_ID_CORE, SERCOM7_GCLK_ID_SLOW },
+      #endif
+  };
 
-  // Configure GCLK for SERCOM2, initClockNVIC()
-  GCLK->PCHCTRL[SERCOM2_GCLK_ID_CORE].reg = GCLK_PCHCTRL_GEN_GCLK0_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
-  GCLK->PCHCTRL[SERCOM2_GCLK_ID_SLOW].reg = GCLK_PCHCTRL_GEN_GCLK3_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
+  Sercom* sercom = MAX3421_SERCOM;
+
+  // Enable the APB clock for SERCOM
+  *sercom_clock[MAX3421_SERCOM_ID].mck_apb |= sercom_clock[MAX3421_SERCOM_ID].mask;
+
+  // Configure GCLK for SERCOM
+  GCLK->PCHCTRL[sercom_clock[MAX3421_SERCOM_ID].gclk_id_core].reg = GCLK_PCHCTRL_GEN_GCLK0_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
+  GCLK->PCHCTRL[sercom_clock[MAX3421_SERCOM_ID].gclk_id_slow].reg = GCLK_PCHCTRL_GEN_GCLK3_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
 
   // Disable the SPI module
-  SERCOM2->SPI.CTRLA.bit.ENABLE = 0;
+  sercom->SPI.CTRLA.bit.ENABLE = 0;
 
   // Reset the SPI module
-  SERCOM2->SPI.CTRLA.bit.SWRST = 1;
-  while (SERCOM2->SPI.SYNCBUSY.bit.SWRST);
+  sercom->SPI.CTRLA.bit.SWRST = 1;
+  while (sercom->SPI.SYNCBUSY.bit.SWRST);
 
   // Set up SPI in master mode, MSB first, SPI mode 0
-  uint8_t const mosi_pad = 0;
-  uint8_t const miso_pad = 2;
-  SERCOM2->SPI.CTRLA.reg = SERCOM_SPI_CTRLA_MODE(3) | SERCOM_SPI_CTRLA_DOPO(mosi_pad) | SERCOM_SPI_CTRLA_DIPO(miso_pad);
+  sercom->SPI.CTRLA.reg = SERCOM_SPI_CTRLA_MODE(3) | SERCOM_SPI_CTRLA_DOPO(MAX3421_MOSI_PAD) | SERCOM_SPI_CTRLA_DIPO(MAX3421_MISO_PAD);
 
-  SERCOM2->SPI.CTRLB.reg = SERCOM_SPI_CTRLB_CHSIZE(0) | SERCOM_SPI_CTRLB_RXEN;
-  while (SERCOM2->SPI.SYNCBUSY.bit.CTRLB == 1);
+  sercom->SPI.CTRLB.reg = SERCOM_SPI_CTRLB_CHSIZE(0) | SERCOM_SPI_CTRLB_RXEN;
+  while (sercom->SPI.SYNCBUSY.bit.CTRLB == 1);
 
   // Set the baud rate
-  uint32_t baudrate = 4000000u;
-  SERCOM2->SPI.BAUD.reg = (uint8_t) (SystemCoreClock / (2 * baudrate) -
-                                     1); // Replace 1000000 with your desired baud rate
+  sercom->SPI.BAUD.reg = (uint8_t) (SystemCoreClock / (2 * baudrate) - 1);
 
-  // Configure PA12 as MOSI (PAD0), PA13 as SCK (PAD1), PA14 as MISO (PAD2)
-  // 2 function C: PIO_SERCOM
+  // Configure PA12 as MOSI (PAD0), PA13 as SCK (PAD1), PA14 as MISO (PAD2), function C (sercom)
   gpio_set_pin_direction(MAX3421_SCK_PIN, GPIO_DIRECTION_OUT);
   gpio_set_pin_pull_mode(MAX3421_SCK_PIN, GPIO_PULL_OFF);
   gpio_set_pin_function(MAX3421_SCK_PIN, 2);
@@ -229,16 +244,16 @@ static void max3421_init(void) {
   gpio_set_pin_pull_mode(MAX3421_MISO_PIN, GPIO_PULL_OFF);
   gpio_set_pin_function(MAX3421_MISO_PIN, 2);
 
+  // CS pin
+  gpio_set_pin_direction(MAX3421_CS_PIN, GPIO_DIRECTION_OUT);
+  gpio_set_pin_level(MAX3421_CS_PIN, 1);
+
   // Enable the SPI module
-  SERCOM2->SPI.CTRLA.bit.ENABLE = 1;
-  while (SERCOM2->SPI.SYNCBUSY.bit.ENABLE);
+  sercom->SPI.CTRLA.bit.ENABLE = 1;
+  while (sercom->SPI.SYNCBUSY.bit.ENABLE);
 
   //------------- External Interrupt -------------//
 
-  // INT pin with external interrupt
-  gpio_set_pin_direction(MAX3421_INTR_PIN, GPIO_DIRECTION_IN);
-  gpio_set_pin_pull_mode(MAX3421_INTR_PIN, GPIO_PULL_UP);
-
   // Enable the APB clock for EIC (External Interrupt Controller)
   MCLK->APBAMASK.reg |= MCLK_APBAMASK_EIC;
 
@@ -255,19 +270,30 @@ static void max3421_init(void) {
   while (EIC->SYNCBUSY.bit.ENABLE);
 
   // Configure EXTINT4 (PA20) to trigger on falling edge
-  EIC->CONFIG[0].reg |= EIC_CONFIG_SENSE4_FALL;
+  volatile uint32_t * eic_config;
+  uint8_t sense_shift;
+  if ( MAX3421_INTR_EIC_ID < 8 ) {
+    eic_config = &EIC->CONFIG[0].reg;
+    sense_shift = MAX3421_INTR_EIC_ID * 4;
+  } else {
+    eic_config = &EIC->CONFIG[1].reg;
+    sense_shift = (MAX3421_INTR_EIC_ID - 8) * 4;
+  }
 
-  // Enable EXTINT4
-  EIC->INTENSET.reg = EIC_INTENSET_EXTINT(1 << 4);
+  *eic_config &= ~(7 << sense_shift);
+  *eic_config |= 2 << sense_shift;
+
+  // Enable External Interrupt
+  EIC->INTENSET.reg = EIC_INTENSET_EXTINT(1 << MAX3421_INTR_EIC_ID);
 
   // Enable EIC
   EIC->CTRLA.bit.ENABLE = 1;
   while (EIC->SYNCBUSY.bit.ENABLE);
 }
 
-void EIC_4_Handler(void) {
+void MAX3421_EIC_Handler(void) {
   // Clear the interrupt flag
-  EIC->INTFLAG.reg = EIC_INTFLAG_EXTINT(1 << 4);
+  EIC->INTFLAG.reg = EIC_INTFLAG_EXTINT(1 << MAX3421_INTR_EIC_ID);
 
   // Call the TinyUSB interrupt handler
   tuh_int_handler(1);
@@ -291,10 +317,12 @@ void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
 bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_len, uint8_t *rx_buf, size_t rx_len) {
   (void) rhport;
 
+  Sercom* sercom = MAX3421_SERCOM;
+
   size_t count = 0;
   while (count < tx_len || count < rx_len) {
     // Wait for the transmit buffer to be empty
-    while (!SERCOM2->SPI.INTFLAG.bit.DRE);
+    while (!sercom->SPI.INTFLAG.bit.DRE);
 
     // Write data to be transmitted
     uint8_t data = 0x00;
@@ -302,13 +330,13 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_l
       data = tx_buf[count];
     }
 
-    SERCOM2->SPI.DATA.reg = (uint32_t) data;
+    sercom->SPI.DATA.reg = (uint32_t) data;
 
     // Wait for the receive buffer to be filled
-    while (!SERCOM2->SPI.INTFLAG.bit.RXC);
+    while (!sercom->SPI.INTFLAG.bit.RXC);
 
     // Read received data
-    data = (uint8_t) SERCOM2->SPI.DATA.reg;
+    data = (uint8_t) sercom->SPI.DATA.reg;
     if (count < rx_len) {
       rx_buf[count] = data;
     }
@@ -317,8 +345,8 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_l
   }
 
   // wait for bus idle and clear flags
-  while (!(SERCOM2->SPI.INTFLAG.reg & (SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_DRE)));
-  SERCOM2->SPI.INTFLAG.reg = SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_DRE;
+  while (!(sercom->SPI.INTFLAG.reg & (SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_DRE)));
+  sercom->SPI.INTFLAG.reg = SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_DRE;
 
   return true;
 }

From e32c1e08bd701b5dda7d081b10ba3262e2061326 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 9 Sep 2023 16:50:16 +0700
Subject: [PATCH 649/691] both samd21/d51 works perfectly with max3421e

---
 hw/bsp/samd21/boards/metro_m0_express/board.h |  16 ++
 hw/bsp/samd21/family.c                        | 230 +++++++++++++++---
 hw/bsp/samd21/family.cmake                    |   1 +
 hw/bsp/samd51/boards/metro_m4_express/board.h |  22 +-
 hw/bsp/samd51/family.c                        |  19 +-
 5 files changed, 234 insertions(+), 54 deletions(-)

diff --git a/hw/bsp/samd21/boards/metro_m0_express/board.h b/hw/bsp/samd21/boards/metro_m0_express/board.h
index d26aae53c..6dd53e901 100644
--- a/hw/bsp/samd21/boards/metro_m0_express/board.h
+++ b/hw/bsp/samd21/boards/metro_m0_express/board.h
@@ -43,6 +43,22 @@
 #define UART_RX_PIN           4
 #define UART_TX_PIN           5
 
+// SPI for USB host shield
+#define MAX3421_SERCOM_ID       4       // SERCOM4
+#define MAX3421_SERCOM_FUNCTION 3       // function D (Sercom Alt)
+
+#define MAX3421_SCK_PIN         (32+11)
+#define MAX3421_MOSI_PIN        (32+10)
+#define MAX3421_MISO_PIN        12
+#define MAX3421_TX_PAD          1 // MOSI = PAD_2, SCK = PAD_3
+#define MAX3421_RX_PAD          0 // MISO = PAD_2
+
+#define MAX3421_CS_PIN          18      // D10
+
+#define MAX3421_INTR_PIN        7       // D9
+#define MAX3421_INTR_EIC_ID     7       // EIC7
+
+
 #ifdef __cplusplus
  }
 #endif
diff --git a/hw/bsp/samd21/family.c b/hw/bsp/samd21/family.c
index 2121e028a..cfe66b8dc 100644
--- a/hw/bsp/samd21/family.c
+++ b/hw/bsp/samd21/family.c
@@ -46,19 +46,6 @@
 #pragma GCC diagnostic pop
 #endif
 
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-void USB_Handler(void)
-{
-  tud_int_handler(0);
-}
-
-//--------------------------------------------------------------------+
-// UART support
-//--------------------------------------------------------------------+
-static void uart_init(void);
-
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM DECLARATION
 //--------------------------------------------------------------------+
@@ -69,8 +56,25 @@ static void uart_init(void);
 /* Not referenced GCLKs, initialized last */
 #define _GCLK_INIT_LAST (~_GCLK_INIT_1ST)
 
-void board_init(void)
-{
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void USB_Handler(void) {
+  tud_int_handler(0);
+}
+
+//--------------------------------------------------------------------+
+// Implementation
+//--------------------------------------------------------------------+
+static void uart_init(void);
+
+#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
+#define MAX3421_SERCOM TU_XSTRCAT(SERCOM, MAX3421_SERCOM_ID)
+
+static void max3421_init(void);
+#endif
+
+void board_init(void) {
   // Clock init ( follow hpl_init.c )
   hri_nvmctrl_set_CTRLB_RWS_bf(NVMCTRL, 2);
 
@@ -85,7 +89,7 @@ void board_init(void)
   // Update SystemCoreClock since it is hard coded with asf4 and not correct
   // Init 1ms tick timer (samd SystemCoreClock may not correct)
   SystemCoreClock = CONF_CPU_FREQUENCY;
-#if CFG_TUSB_OS  == OPT_OS_NONE
+#if CFG_TUSB_OS == OPT_OS_NONE
   SysTick_Config(CONF_CPU_FREQUENCY / 1000);
 #endif
 
@@ -103,7 +107,7 @@ void board_init(void)
 
   uart_init();
 
-#if CFG_TUSB_OS  == OPT_OS_FREERTOS
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
 #endif
@@ -134,22 +138,24 @@ void board_init(void)
 
   gpio_set_pin_function(PIN_PA19, PINMUX_PA19F_TCC0_WO3);
   _gclk_enable_channel(TCC0_GCLK_ID, GCLK_CLKCTRL_GEN_GCLK0_Val);
+
+#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
+  max3421_init();
+#endif
 }
 
 //--------------------------------------------------------------------+
 // Board porting API
 //--------------------------------------------------------------------+
 
-void board_led_write(bool state)
-{
-  (void)state;
+void board_led_write(bool state) {
+  (void) state;
 #ifdef LED_PIN
-  gpio_set_pin_level(LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
+  gpio_set_pin_level(LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON));
 #endif
 }
 
-uint32_t board_button_read(void)
-{
+uint32_t board_button_read(void) {
 #ifdef BUTTON_PIN
   return BUTTON_STATE_ACTIVE == gpio_get_pin_level(BUTTON_PIN);
 #else
@@ -227,33 +233,185 @@ int board_uart_write(void const * buf, int len)
 }
 
 #else // ! defined(UART_SERCOM)
-static void uart_init(void)
-{
 
+static void uart_init(void) {
 }
 
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
+int board_uart_read(uint8_t *buf, int len) {
+  (void) buf;
+  (void) len;
   return 0;
 }
 
-int board_uart_write(void const * buf, int len)
-{
-  (void) buf; (void) len;
+int board_uart_write(void const *buf, int len) {
+  (void) buf;
+  (void) len;
   return 0;
 }
+
 #endif
 
-#if CFG_TUSB_OS  == OPT_OS_NONE
+#if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
+
+void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void)
-{
+uint32_t board_millis(void) {
   return system_ticks;
 }
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
+
+static void max3421_init(void) {
+  //------------- SPI Init -------------//
+  uint32_t const baudrate = 4000000u;
+
+  // Enable the APB clock for SERCOM
+  PM->APBCMASK.reg |= 1u << (PM_APBCMASK_SERCOM0_Pos + MAX3421_SERCOM_ID);
+
+  // Configure GCLK for SERCOM
+//  GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID_SERCOM4_CORE | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN;
+  GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(GCLK_CLKCTRL_ID_SERCOM0_CORE_Val+MAX3421_SERCOM_ID) |
+      GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN;
+  while (GCLK->STATUS.bit.SYNCBUSY);
+
+  Sercom* sercom = MAX3421_SERCOM;
+
+  // Disable the SPI module
+  sercom->SPI.CTRLA.bit.ENABLE = 0;
+
+  // Reset the SPI module
+  sercom->SPI.CTRLA.bit.SWRST = 1;
+  while (sercom->SPI.SYNCBUSY.bit.SWRST);
+
+  // Set up SPI in master mode, MSB first, SPI mode 0
+  sercom->SPI.CTRLA.reg = SERCOM_SPI_CTRLA_DOPO(MAX3421_TX_PAD) | SERCOM_SPI_CTRLA_DIPO(MAX3421_RX_PAD) |
+      SERCOM_SPI_CTRLA_MODE(3);
+
+  sercom->SPI.CTRLB.reg = SERCOM_SPI_CTRLB_CHSIZE(0) | SERCOM_SPI_CTRLB_RXEN;
+  while (sercom->SPI.SYNCBUSY.bit.CTRLB == 1);
+
+  // Set the baud rate
+  sercom->SPI.BAUD.reg = (uint8_t) (SystemCoreClock / (2 * baudrate) - 1);
+
+  // Configure PA12 as MOSI (PAD0), PA13 as SCK (PAD1), PA14 as MISO (PAD2), function C (sercom)
+  gpio_set_pin_direction(MAX3421_SCK_PIN, GPIO_DIRECTION_OUT);
+  gpio_set_pin_pull_mode(MAX3421_SCK_PIN, GPIO_PULL_OFF);
+  gpio_set_pin_function(MAX3421_SCK_PIN, MAX3421_SERCOM_FUNCTION);
+
+  gpio_set_pin_direction(MAX3421_MOSI_PIN, GPIO_DIRECTION_OUT);
+  gpio_set_pin_pull_mode(MAX3421_MOSI_PIN, GPIO_PULL_OFF);
+  gpio_set_pin_function(MAX3421_MOSI_PIN, MAX3421_SERCOM_FUNCTION);
+
+  gpio_set_pin_direction(MAX3421_MISO_PIN, GPIO_DIRECTION_IN);
+  gpio_set_pin_pull_mode(MAX3421_MISO_PIN, GPIO_PULL_OFF);
+  gpio_set_pin_function(MAX3421_MISO_PIN, MAX3421_SERCOM_FUNCTION);
+
+  // CS pin
+  gpio_set_pin_direction(MAX3421_CS_PIN, GPIO_DIRECTION_OUT);
+  gpio_set_pin_level(MAX3421_CS_PIN, 1);
+
+  // Enable the SPI module
+  sercom->SPI.CTRLA.bit.ENABLE = 1;
+  while (sercom->SPI.SYNCBUSY.bit.ENABLE);
+
+  //------------- External Interrupt -------------//
+
+  // Enable the APB clock for EIC (External Interrupt Controller)
+  PM->APBAMASK.reg |= PM_APBAMASK_EIC;
+
+  // Configure GCLK for EIC
+  GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID_EIC | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN;
+  while (GCLK->STATUS.bit.SYNCBUSY);
+
+  // Configure PA20 as an input with function A (external interrupt)
+  gpio_set_pin_direction(MAX3421_INTR_PIN, GPIO_DIRECTION_IN);
+  gpio_set_pin_pull_mode(MAX3421_INTR_PIN, GPIO_PULL_UP);
+  gpio_set_pin_function(MAX3421_INTR_PIN, 0);
+
+  // Disable EIC
+  EIC->CTRL.bit.ENABLE = 0;
+  while (EIC->STATUS.bit.SYNCBUSY);
+
+  // Configure EIC to trigger on falling edge
+  uint8_t const sense_shift = MAX3421_INTR_EIC_ID * 4;
+  EIC->CONFIG[0].reg &= ~(7 << sense_shift);
+  EIC->CONFIG[0].reg |= 2 << sense_shift;
+
+  // Enable External Interrupt
+  EIC->INTENSET.reg = EIC_INTENSET_EXTINT(1 << MAX3421_INTR_EIC_ID);
+
+  // Enable EIC
+  EIC->CTRL.bit.ENABLE = 1;
+  while (EIC->STATUS.bit.SYNCBUSY);
+}
+
+void EIC_Handler(void) {
+  // Clear the interrupt flag
+  EIC->INTFLAG.reg = EIC_INTFLAG_EXTINT(1 << MAX3421_INTR_EIC_ID);
+
+  // Call the TinyUSB interrupt handler
+  tuh_int_handler(1);
+}
+
+void tuh_max3421_int_api(uint8_t rhport, bool enabled) {
+  (void) rhport;
+
+  if (enabled) {
+    NVIC_EnableIRQ(EIC_IRQn);
+  } else {
+    NVIC_DisableIRQ(EIC_IRQn);
+  }
+}
+
+void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
+  (void) rhport;
+  gpio_set_pin_level(MAX3421_CS_PIN, active ? 0 : 1);
+}
+
+bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_len, uint8_t *rx_buf, size_t rx_len) {
+  (void) rhport;
+
+  Sercom* sercom = MAX3421_SERCOM;
+
+  size_t count = 0;
+  while (count < tx_len || count < rx_len) {
+    // Wait for the transmit buffer to be empty
+    while (!sercom->SPI.INTFLAG.bit.DRE);
+
+    // Write data to be transmitted
+    uint8_t data = 0x00;
+    if (count < tx_len) {
+      data = tx_buf[count];
+    }
+
+    sercom->SPI.DATA.reg = (uint32_t) data;
+
+    // Wait for the receive buffer to be filled
+    while (!sercom->SPI.INTFLAG.bit.RXC);
+
+    // Read received data
+    data = (uint8_t) sercom->SPI.DATA.reg;
+    if (count < rx_len) {
+      rx_buf[count] = data;
+    }
+
+    count++;
+  }
+
+  // wait for bus idle and clear flags
+  while (!(sercom->SPI.INTFLAG.reg & (SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_DRE)));
+  sercom->SPI.INTFLAG.reg = SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_DRE;
+
+  return true;
+}
+
+#endif
+
+
 #endif
diff --git a/hw/bsp/samd21/family.cmake b/hw/bsp/samd21/family.cmake
index 07186934a..ffbf687a1 100644
--- a/hw/bsp/samd21/family.cmake
+++ b/hw/bsp/samd21/family.cmake
@@ -94,6 +94,7 @@ function(family_configure_example TARGET RTOS)
   family_add_tinyusb(${TARGET} OPT_MCU_SAMD21 ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/microchip/samd/dcd_samd.c
+    ${TOP}/src/portable/analog/max3421/hcd_max3421.c
     )
   target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 
diff --git a/hw/bsp/samd51/boards/metro_m4_express/board.h b/hw/bsp/samd51/boards/metro_m4_express/board.h
index aa6bdd0c8..b3b80db89 100644
--- a/hw/bsp/samd51/boards/metro_m4_express/board.h
+++ b/hw/bsp/samd51/boards/metro_m4_express/board.h
@@ -44,16 +44,20 @@
 #define UART_RX_PIN           22
 
 // SPI for USB host shield
-#define MAX3421_SERCOM_ID 2  // SERCOM2
-#define MAX3421_SCK_PIN   13
-#define MAX3421_MOSI_PIN  12
-#define MAX3421_MOSI_PAD  0
-#define MAX3421_MISO_PIN  14
-#define MAX3421_MISO_PAD  2
-#define MAX3421_CS_PIN    18 // D10
+#define MAX3421_SERCOM_ID       2  // SERCOM2
+#define MAX3421_SERCOM_FUNCTION 2  // function C
+
+#define MAX3421_SCK_PIN         13
+#define MAX3421_MOSI_PIN        12
+#define MAX3421_MISO_PIN        14
+#define MAX3421_TX_PAD          0 // MOSI = PAD_0, SCK = PAD_1
+#define MAX3421_RX_PAD          2 // MISO = PAD_2
+
+#define MAX3421_CS_PIN          18 // D10
+
+#define MAX3421_INTR_PIN        20 // D9
+#define MAX3421_INTR_EIC_ID     4  // EIC4
 
-#define MAX3421_INTR_PIN  20 // D9
-#define MAX3421_INTR_EIC_ID 4 // EIC4
 
 #ifdef __cplusplus
  }
diff --git a/hw/bsp/samd51/family.c b/hw/bsp/samd51/family.c
index f9e1718d0..2cf00c7af 100644
--- a/hw/bsp/samd51/family.c
+++ b/hw/bsp/samd51/family.c
@@ -77,11 +77,10 @@ void USB_3_Handler(void) {
 //--------------------------------------------------------------------+
 
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
-static void max3421_init(void);
-
 #define MAX3421_SERCOM TU_XSTRCAT(SERCOM, MAX3421_SERCOM_ID)
 #define MAX3421_EIC_Handler TU_XSTRCAT3(EIC_, MAX3421_INTR_EIC_ID, _Handler)
 
+static void max3421_init(void);
 #endif
 
 void board_init(void) {
@@ -223,7 +222,8 @@ static void max3421_init(void) {
   while (sercom->SPI.SYNCBUSY.bit.SWRST);
 
   // Set up SPI in master mode, MSB first, SPI mode 0
-  sercom->SPI.CTRLA.reg = SERCOM_SPI_CTRLA_MODE(3) | SERCOM_SPI_CTRLA_DOPO(MAX3421_MOSI_PAD) | SERCOM_SPI_CTRLA_DIPO(MAX3421_MISO_PAD);
+  sercom->SPI.CTRLA.reg = SERCOM_SPI_CTRLA_DOPO(MAX3421_TX_PAD) | SERCOM_SPI_CTRLA_DIPO(MAX3421_RX_PAD) |
+      SERCOM_SPI_CTRLA_MODE(3);
 
   sercom->SPI.CTRLB.reg = SERCOM_SPI_CTRLB_CHSIZE(0) | SERCOM_SPI_CTRLB_RXEN;
   while (sercom->SPI.SYNCBUSY.bit.CTRLB == 1);
@@ -234,15 +234,15 @@ static void max3421_init(void) {
   // Configure PA12 as MOSI (PAD0), PA13 as SCK (PAD1), PA14 as MISO (PAD2), function C (sercom)
   gpio_set_pin_direction(MAX3421_SCK_PIN, GPIO_DIRECTION_OUT);
   gpio_set_pin_pull_mode(MAX3421_SCK_PIN, GPIO_PULL_OFF);
-  gpio_set_pin_function(MAX3421_SCK_PIN, 2);
+  gpio_set_pin_function(MAX3421_SCK_PIN, MAX3421_SERCOM_FUNCTION);
 
   gpio_set_pin_direction(MAX3421_MOSI_PIN, GPIO_DIRECTION_OUT);
   gpio_set_pin_pull_mode(MAX3421_MOSI_PIN, GPIO_PULL_OFF);
-  gpio_set_pin_function(MAX3421_MOSI_PIN, 2);
+  gpio_set_pin_function(MAX3421_MOSI_PIN, MAX3421_SERCOM_FUNCTION);
 
   gpio_set_pin_direction(MAX3421_MISO_PIN, GPIO_DIRECTION_IN);
   gpio_set_pin_pull_mode(MAX3421_MISO_PIN, GPIO_PULL_OFF);
-  gpio_set_pin_function(MAX3421_MISO_PIN, 2);
+  gpio_set_pin_function(MAX3421_MISO_PIN, MAX3421_SERCOM_FUNCTION);
 
   // CS pin
   gpio_set_pin_direction(MAX3421_CS_PIN, GPIO_DIRECTION_OUT);
@@ -269,7 +269,7 @@ static void max3421_init(void) {
   EIC->CTRLA.bit.ENABLE = 0;
   while (EIC->SYNCBUSY.bit.ENABLE);
 
-  // Configure EXTINT4 (PA20) to trigger on falling edge
+  // Configure EIC to trigger on falling edge
   volatile uint32_t * eic_config;
   uint8_t sense_shift;
   if ( MAX3421_INTR_EIC_ID < 8 ) {
@@ -302,10 +302,11 @@ void MAX3421_EIC_Handler(void) {
 void tuh_max3421_int_api(uint8_t rhport, bool enabled) {
   (void) rhport;
 
+  const IRQn_Type irq = EIC_0_IRQn + MAX3421_INTR_EIC_ID;
   if (enabled) {
-    NVIC_EnableIRQ(EIC_4_IRQn);
+    NVIC_EnableIRQ(irq);
   } else {
-    NVIC_DisableIRQ(EIC_4_IRQn);
+    NVIC_DisableIRQ(irq);
   }
 }
 

From ab9585401b9964407cbf2bc7bffdf762353817f9 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 11 Sep 2023 11:35:51 +0700
Subject: [PATCH 650/691] wrap up build cmake & make support for max3421, to
 enable the Host driver, 'MAX3421_HOST=1' must be added as part of make/cmake
 command

---
 .idea/cmake.xml                               |  6 ++--
 .idea/runConfigurations/kl25.xml              |  2 +-
 .idea/runConfigurations/lpc1857.xml           |  2 +-
 .idea/runConfigurations/lpc4088.xml           |  2 +-
 .idea/runConfigurations/lpc54628.xml          | 10 ++++++
 .idea/runConfigurations/lpc55s69.xml          | 10 ++++++
 .idea/runConfigurations/mcx947.xml            |  2 +-
 .idea/runConfigurations/nrf52840.xml          |  2 +-
 .idea/runConfigurations/nrf5340.xml           |  2 +-
 .idea/runConfigurations/ra4m1.xml             |  2 +-
 .idea/runConfigurations/ra6m1.xml             |  2 +-
 .idea/runConfigurations/ra6m5.xml             |  2 +-
 .idea/runConfigurations/rt1010.xml            |  2 +-
 .idea/runConfigurations/rt1060.xml            |  2 +-
 .idea/runConfigurations/samd21g18.xml         | 10 ++++++
 .idea/runConfigurations/samd51j19.xml         | 10 ++++++
 .idea/runConfigurations/stlink.xml            |  2 +-
 .idea/runConfigurations/stm32g474.xml         |  2 +-
 .idea/runConfigurations/stm32h743.xml         |  2 +-
 .idea/runConfigurations/uno_r4.xml            |  2 +-
 examples/dual/host_hid_to_device_cdc/only.txt |  1 +
 examples/host/bare_api/only.txt               |  1 +
 examples/host/cdc_msc_hid/only.txt            |  1 +
 examples/host/cdc_msc_hid/src/tusb_config.h   |  3 --
 examples/host/hid_controller/only.txt         |  1 +
 examples/host/msc_file_explorer/only.txt      |  1 +
 .../host/msc_file_explorer/src/tusb_config.h  |  3 --
 examples/make.mk                              | 13 ++++----
 examples/rules.mk                             |  2 +-
 hw/bsp/family_support.cmake                   | 14 ++++++++
 hw/bsp/nrf/family.cmake                       |  1 -
 hw/bsp/samd21/family.cmake                    |  1 -
 hw/bsp/samd21/family.mk                       | 32 +++++++++----------
 hw/bsp/samd51/family.cmake                    |  1 -
 34 files changed, 101 insertions(+), 50 deletions(-)
 create mode 100644 .idea/runConfigurations/lpc54628.xml
 create mode 100644 .idea/runConfigurations/lpc55s69.xml
 create mode 100644 .idea/runConfigurations/samd21g18.xml
 create mode 100644 .idea/runConfigurations/samd51j19.xml

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 8d19b7624..89ec1066c 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -33,7 +33,7 @@
       <configuration PROFILE_NAME="lpc54628" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso54628 -DLOG=4 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="lpc55s69" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso55s69 -DLOG=4 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="mcxn947" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mcxn947brk -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="feather_nrf52840_express" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_nrf52840_express -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="feather_nrf52840_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_nrf52840_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
       <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10056 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10095 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="stm32g0b1nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32g0b1nucleo" />
@@ -53,8 +53,8 @@
       <configuration PROFILE_NAME="ra6m5 PORT0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1 -DPORT=0" />
       <configuration PROFILE_NAME="uno_r4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=uno_r4 -DLOG=4 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="portenta_c33" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=portenta_c33 -DLOG=3" />
-      <configuration PROFILE_NAME="metro_m4_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m4_express -DLOG=3 -DLOGGER=RTT" />
-      <configuration PROFILE_NAME="metro_m0_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m0_express -DLOG=3 -DLOGGER=RTT" />
+      <configuration PROFILE_NAME="metro_m4_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m4_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
+      <configuration PROFILE_NAME="metro_m0_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m0_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/.idea/runConfigurations/kl25.xml b/.idea/runConfigurations/kl25.xml
index a08c20d44..66f8ea684 100644
--- a/.idea/runConfigurations/kl25.xml
+++ b/.idea/runConfigurations/kl25.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="kl25" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MKL25Z128xxx4&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="kl25" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MKL25Z128xxx4&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="feather_nrf52840_express" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/lpc1857.xml b/.idea/runConfigurations/lpc1857.xml
index 7525f51f7..f7d4ba402 100644
--- a/.idea/runConfigurations/lpc1857.xml
+++ b/.idea/runConfigurations/lpc1857.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="lpc1857" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;lpc1857&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="lpc1857" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;lpc1857&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="feather_nrf52840_express" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/lpc4088.xml b/.idea/runConfigurations/lpc4088.xml
index 7b32b2b85..911876903 100644
--- a/.idea/runConfigurations/lpc4088.xml
+++ b/.idea/runConfigurations/lpc4088.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="lpc4088" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;lpc4088&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="lpc4088" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;lpc4088&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="feather_nrf52840_express" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/lpc54628.xml b/.idea/runConfigurations/lpc54628.xml
new file mode 100644
index 000000000..e0047f187
--- /dev/null
+++ b/.idea/runConfigurations/lpc54628.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="lpc54628" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;LPC54628J512&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="feather_nrf52840_express" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/lpc55s69.xml b/.idea/runConfigurations/lpc55s69.xml
new file mode 100644
index 000000000..d5e9b117a
--- /dev/null
+++ b/.idea/runConfigurations/lpc55s69.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="lpc55s69" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;lpc55s69&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="feather_nrf52840_express" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/mcx947.xml b/.idea/runConfigurations/mcx947.xml
index 77dec59f8..31e5c27dd 100644
--- a/.idea/runConfigurations/mcx947.xml
+++ b/.idea/runConfigurations/mcx947.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="mcx947" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MCXN947_M33_0&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/mcx/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="mcx947" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MCXN947_M33_0&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/mcx/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="feather_nrf52840_express" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/nrf52840.xml b/.idea/runConfigurations/nrf52840.xml
index 2f3f1876a..3ffa16385 100644
--- a/.idea/runConfigurations/nrf52840.xml
+++ b/.idea/runConfigurations/nrf52840.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="nrf52840" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;nrf52840_xxaa&quot; -if swd -speed 8000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="msc_file_explorer" TARGET_NAME="msc_file_explorer" CONFIG_NAME="feather_nrf52840_express" version="1" RUN_TARGET_PROJECT_NAME="msc_file_explorer" RUN_TARGET_NAME="msc_file_explorer">
+  <configuration default="false" name="nrf52840" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-select usb=752001685 -device &quot;nrf52840_xxaa&quot; -if swd -speed 8000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="feather_nrf52840_express" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/nrf5340.xml b/.idea/runConfigurations/nrf5340.xml
index 98fe39d80..2f8009444 100644
--- a/.idea/runConfigurations/nrf5340.xml
+++ b/.idea/runConfigurations/nrf5340.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="nrf5340" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;nrf5340_xxaa_app&quot; -if swd -speed 16000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="nrf5340" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-select usb=752001685 -device &quot;nrf5340_xxaa_app&quot; -if swd -speed 16000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="feather_nrf52840_express" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/ra4m1.xml b/.idea/runConfigurations/ra4m1.xml
index 561b509a2..6135e5cf3 100644
--- a/.idea/runConfigurations/ra4m1.xml
+++ b/.idea/runConfigurations/ra4m1.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="ra4m1" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA4M1AB&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $PROJECT_DIR$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="ra4m1" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA4M1AB&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $PROJECT_DIR$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="feather_nrf52840_express" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/ra6m1.xml b/.idea/runConfigurations/ra6m1.xml
index 099510c60..0833d43b3 100644
--- a/.idea/runConfigurations/ra6m1.xml
+++ b/.idea/runConfigurations/ra6m1.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="ra6m1" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA6M1AD&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $PROJECT_DIR$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="ra6m1" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA6M1AD&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $PROJECT_DIR$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/ra6m5.xml b/.idea/runConfigurations/ra6m5.xml
index 0cffac135..606e04e52 100644
--- a/.idea/runConfigurations/ra6m5.xml
+++ b/.idea/runConfigurations/ra6m5.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="ra6m5" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA6M5BH&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $PROJECT_DIR$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="ra6m5" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA6M5BH&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $PROJECT_DIR$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/rt1010.xml b/.idea/runConfigurations/rt1010.xml
index 63df076b1..f4f48181c 100644
--- a/.idea/runConfigurations/rt1010.xml
+++ b/.idea/runConfigurations/rt1010.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rt1010" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1011xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/imxrt/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="rt1010" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1011xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun -jlinkscriptfile $ProjectFileDir$/hw/bsp/imxrt/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="feather_nrf52840_express" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="ALWAYS" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/rt1060.xml b/.idea/runConfigurations/rt1060.xml
index 147f197a2..3d740edeb 100644
--- a/.idea/runConfigurations/rt1060.xml
+++ b/.idea/runConfigurations/rt1060.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="rt1060" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1062xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="rt1060" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;MIMXRT1062xxx5A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="feather_nrf52840_express" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/samd21g18.xml b/.idea/runConfigurations/samd21g18.xml
new file mode 100644
index 000000000..9a1e65563
--- /dev/null
+++ b/.idea/runConfigurations/samd21g18.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="samd21g18" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;ATSAMD21G18&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="feather_nrf52840_express" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/samd51j19.xml b/.idea/runConfigurations/samd51j19.xml
new file mode 100644
index 000000000..74d0e3649
--- /dev/null
+++ b/.idea/runConfigurations/samd51j19.xml
@@ -0,0 +1,10 @@
+<component name="ProjectRunConfigurationManager">
+  <configuration default="false" name="samd51j19" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;ATSAMD51J19A&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="feather_nrf52840_express" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
+    <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
+      <debugger kind="GDB" isBundled="true" />
+    </custom-gdb-server>
+    <method v="2">
+      <option name="CLION.COMPOUND.BUILD" enabled="true" />
+    </method>
+  </configuration>
+</component>
\ No newline at end of file
diff --git a/.idea/runConfigurations/stlink.xml b/.idea/runConfigurations/stlink.xml
index 7e9166d90..b29b63f1a 100644
--- a/.idea/runConfigurations/stlink.xml
+++ b/.idea/runConfigurations/stlink.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="stlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-p 62847 -cp &quot;/opt/st/stm32cubeide_1.12.1/plugins/com.st.stm32cube.ide.mcu.externaltools.cubeprogrammer.linux64_2.0.600.202301161003/tools/bin&quot; --frequency 24000 --swd" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="stlink" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-p 62847 -cp &quot;/opt/st/stm32cubeide_1.12.1/plugins/com.st.stm32cube.ide.mcu.externaltools.cubeprogrammer.linux64_2.0.600.202301161003/tools/bin&quot; --frequency 24000 --swd" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="feather_nrf52840_express" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::62847" executable="/opt/st/stm32cubeide_1.12.1/plugins/com.st.stm32cube.ide.mcu.externaltools.stlink-gdb-server.linux64_2.0.500.202301161003/tools/bin/ST-LINK_gdbserver" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/stm32g474.xml b/.idea/runConfigurations/stm32g474.xml
index 2e4c4b82a..a7267fe90 100644
--- a/.idea/runConfigurations/stm32g474.xml
+++ b/.idea/runConfigurations/stm32g474.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="stm32g474" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;stm32g474re&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="stm32g474" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;stm32g474re&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="feather_nrf52840_express" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/stm32h743.xml b/.idea/runConfigurations/stm32h743.xml
index f0ab6e9e7..9cd142de0 100644
--- a/.idea/runConfigurations/stm32h743.xml
+++ b/.idea/runConfigurations/stm32h743.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="stm32h743" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;stm32h743xi&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="stm32h743" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;stm32h743xi&quot; -if swd -speed 50000 -port 25321 -nogui -singlerun" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="feather_nrf52840_express" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/.idea/runConfigurations/uno_r4.xml b/.idea/runConfigurations/uno_r4.xml
index e9e1ebb8d..75eb3df4d 100644
--- a/.idea/runConfigurations/uno_r4.xml
+++ b/.idea/runConfigurations/uno_r4.xml
@@ -1,5 +1,5 @@
 <component name="ProjectRunConfigurationManager">
-  <configuration default="false" name="uno_r4" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA4M1AB&quot; -if swd -speed 20000 -port 25321 -nogui -singlerun -jlinkscriptfile $PROJECT_DIR$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="rp2040" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
+  <configuration default="false" name="uno_r4" type="com.jetbrains.cidr.embedded.customgdbserver.type" factoryName="com.jetbrains.cidr.embedded.customgdbserver.factory" PROGRAM_PARAMS="-device &quot;R7FA4M1AB&quot; -if swd -speed 20000 -port 25321 -nogui -singlerun -jlinkscriptfile $PROJECT_DIR$/hw/bsp/ra/debug.jlinkscript" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" EMULATE_TERMINAL="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="tinyusb_examples" TARGET_NAME="cdc_msc" CONFIG_NAME="feather_nrf52840_express" version="1" RUN_TARGET_PROJECT_NAME="tinyusb_examples" RUN_TARGET_NAME="cdc_msc">
     <custom-gdb-server version="1" gdb-connect="tcp::25321" executable="/usr/bin/JLinkGDBServer" warmup-ms="0" download-type="UPDATED_ONLY" reset-cmd="monitor reset" reset-type="AFTER_DOWNLOAD">
       <debugger kind="GDB" isBundled="true" />
     </custom-gdb-server>
diff --git a/examples/dual/host_hid_to_device_cdc/only.txt b/examples/dual/host_hid_to_device_cdc/only.txt
index a3b567f9a..cfc87eb4e 100644
--- a/examples/dual/host_hid_to_device_cdc/only.txt
+++ b/examples/dual/host_hid_to_device_cdc/only.txt
@@ -3,3 +3,4 @@ board:mimxrt1064_evk
 board:mcb1800
 mcu:RP2040
 mcu:ra6m5
+mcu:MAX3421
diff --git a/examples/host/bare_api/only.txt b/examples/host/bare_api/only.txt
index f8aa2186f..3837ac8a2 100644
--- a/examples/host/bare_api/only.txt
+++ b/examples/host/bare_api/only.txt
@@ -10,3 +10,4 @@ mcu:RP2040
 mcu:MSP432E4
 mcu:RX65X
 mcu:RAXXX
+mcu:MAX3421
diff --git a/examples/host/cdc_msc_hid/only.txt b/examples/host/cdc_msc_hid/only.txt
index f8aa2186f..3837ac8a2 100644
--- a/examples/host/cdc_msc_hid/only.txt
+++ b/examples/host/cdc_msc_hid/only.txt
@@ -10,3 +10,4 @@ mcu:RP2040
 mcu:MSP432E4
 mcu:RX65X
 mcu:RAXXX
+mcu:MAX3421
diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h
index 8d3ef8891..c8e9138e3 100644
--- a/examples/host/cdc_msc_hid/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid/src/tusb_config.h
@@ -38,9 +38,6 @@
   // change to 1 if using pico-pio-usb as host controller for raspberry rp2040
   #define CFG_TUH_RPI_PIO_USB   0
   #define BOARD_TUH_RHPORT      CFG_TUH_RPI_PIO_USB
-//#elif CFG_TUSB_MCU == OPT_MCU_NRF5X
-//  // Use external USB controller (via SPI) MAX3421E (aka usb host shield)
-//  #define CFG_TUH_MAX3421      1
 #endif
 
 // RHPort number used for host can be defined by board.mk, default to port 0
diff --git a/examples/host/hid_controller/only.txt b/examples/host/hid_controller/only.txt
index f8aa2186f..3837ac8a2 100644
--- a/examples/host/hid_controller/only.txt
+++ b/examples/host/hid_controller/only.txt
@@ -10,3 +10,4 @@ mcu:RP2040
 mcu:MSP432E4
 mcu:RX65X
 mcu:RAXXX
+mcu:MAX3421
diff --git a/examples/host/msc_file_explorer/only.txt b/examples/host/msc_file_explorer/only.txt
index f8aa2186f..3837ac8a2 100644
--- a/examples/host/msc_file_explorer/only.txt
+++ b/examples/host/msc_file_explorer/only.txt
@@ -10,3 +10,4 @@ mcu:RP2040
 mcu:MSP432E4
 mcu:RX65X
 mcu:RAXXX
+mcu:MAX3421
diff --git a/examples/host/msc_file_explorer/src/tusb_config.h b/examples/host/msc_file_explorer/src/tusb_config.h
index e6186ba46..b4ccd8223 100644
--- a/examples/host/msc_file_explorer/src/tusb_config.h
+++ b/examples/host/msc_file_explorer/src/tusb_config.h
@@ -38,9 +38,6 @@
   // change to 1 if using pico-pio-usb as host controller for raspberry rp2040
   #define CFG_TUH_RPI_PIO_USB   0
   #define BOARD_TUH_RHPORT      CFG_TUH_RPI_PIO_USB
-//#elif CFG_TUSB_MCU == OPT_MCU_NRF5X
-//  // Use external USB controller (via SPI) MAX3421E (aka usb host shield)
-//  #define CFG_TUH_MAX3421      1
 #endif
 
 
diff --git a/examples/make.mk b/examples/make.mk
index a590e34f7..8fe4a3486 100644
--- a/examples/make.mk
+++ b/examples/make.mk
@@ -73,7 +73,6 @@ ifeq ($(FAMILY),)
 else
   # Include Family and Board specific defs
   include $(TOP)/$(FAMILY_PATH)/family.mk
-
   SRC_C += $(subst $(TOP)/,,$(wildcard $(TOP)/$(FAMILY_PATH)/*.c))
 endif
 
@@ -84,9 +83,6 @@ CROSS_COMPILE ?= arm-none-eabi-
 
 ifeq ($(TOOLCHAIN),iar)
 CC := iccarm
-endif
-
-ifeq ($(CC),iccarm)
 USE_IAR = 1
 endif
 
@@ -105,13 +101,12 @@ endif
 #-------------- Source files and compiler flags --------------
 # tinyusb makefile
 include $(TOP)/src/tinyusb.mk
+SRC_C += $(TINYUSB_SRC_C)
 
 # Include all source C in family & board folder
 SRC_C += hw/bsp/board.c
 SRC_C += $(subst $(TOP)/,,$(wildcard $(TOP)/$(BOARD_PATH)/*.c))
 
-SRC_C += $(TINYUSB_SRC_C)
-
 INC += \
   $(TOP)/$(FAMILY_PATH) \
   $(TOP)/src \
@@ -119,6 +114,12 @@ INC += \
 BOARD_UPPER = $(subst a,A,$(subst b,B,$(subst c,C,$(subst d,D,$(subst e,E,$(subst f,F,$(subst g,G,$(subst h,H,$(subst i,I,$(subst j,J,$(subst k,K,$(subst l,L,$(subst m,M,$(subst n,N,$(subst o,O,$(subst p,P,$(subst q,Q,$(subst r,R,$(subst s,S,$(subst t,T,$(subst u,U,$(subst v,V,$(subst w,W,$(subst x,X,$(subst y,Y,$(subst z,Z,$(subst -,_,$(BOARD))))))))))))))))))))))))))))
 CFLAGS += -DBOARD_$(BOARD_UPPER)
 
+# use max3421 as host controller
+ifeq (${MAX3421_HOST},1)
+  SRC_C += src/portable/analog/max3421/hcd_max3421.c
+  CFLAGS += -DCFG_TUH_MAX3421=1
+endif
+
 # Log level is mapped to TUSB DEBUG option
 ifneq ($(LOG),)
   CMAKE_DEFSYM +=	-DLOG=$(LOG)
diff --git a/examples/rules.mk b/examples/rules.mk
index 44d6b84c8..227849a18 100644
--- a/examples/rules.mk
+++ b/examples/rules.mk
@@ -72,7 +72,7 @@ endif
 # get depenecies
 .PHONY: get-deps
 get-deps:
-	$(PYTHON) $(TOP)/tools/get_deps.py $(DEPS_SUBMODULES)
+	$(PYTHON) $(TOP)/tools/get_deps.py ${FAMILY}
 
 .PHONY: size
 size: $(BUILD)/$(PROJECT).elf
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 1cbcfb2a7..642282b0e 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -253,6 +253,15 @@ function(family_add_tinyusb TARGET OPT_MCU RTOS)
     # link tinyusb with freeRTOS kernel
     target_link_libraries(${TARGET}-tinyusb PUBLIC freertos_kernel)
   endif ()
+
+  # use max3421 as host controller
+  if (MAX3421_HOST STREQUAL "1")
+    target_compile_definitions(${TARGET}-tinyusb_config INTERFACE CFG_TUH_MAX3421=1)
+    target_sources(${TARGET}-tinyusb PUBLIC
+      ${TOP}/src/portable/analog/max3421/hcd_max3421.c
+      )
+  endif ()
+
 endfunction()
 
 
@@ -438,5 +447,10 @@ if (NOT FAMILY_MCUS)
   set(FAMILY_MCUS ${FAMILY})
 endif()
 
+# if use max3421 as host controller, expand FAMILY_MCUS to include max3421
+if (MAX3421_HOST STREQUAL "1")
+  set(FAMILY_MCUS ${FAMILY_MCUS} MAX3421)
+endif ()
+
 # save it in case of re-inclusion
 set(FAMILY_MCUS ${FAMILY_MCUS} CACHE INTERNAL "")
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index ff6b882ce..99d9ac6dd 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -124,7 +124,6 @@ function(family_configure_example TARGET RTOS)
   family_add_tinyusb(${TARGET} OPT_MCU_NRF5X ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/nordic/nrf5x/dcd_nrf5x.c
-    ${TOP}/src/portable/analog/max3421/hcd_max3421.c
     )
   target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 
diff --git a/hw/bsp/samd21/family.cmake b/hw/bsp/samd21/family.cmake
index ffbf687a1..07186934a 100644
--- a/hw/bsp/samd21/family.cmake
+++ b/hw/bsp/samd21/family.cmake
@@ -94,7 +94,6 @@ function(family_configure_example TARGET RTOS)
   family_add_tinyusb(${TARGET} OPT_MCU_SAMD21 ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/microchip/samd/dcd_samd.c
-    ${TOP}/src/portable/analog/max3421/hcd_max3421.c
     )
   target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 
diff --git a/hw/bsp/samd21/family.mk b/hw/bsp/samd21/family.mk
index 49a1a781a..79c63812d 100644
--- a/hw/bsp/samd21/family.mk
+++ b/hw/bsp/samd21/family.mk
@@ -1,5 +1,5 @@
 UF2_FAMILY_ID = 0x68ed2b88
-DEPS_SUBMODULES += hw/mcu/microchip
+SDK_DIR = hw/mcu/microchip/samd21
 
 include $(TOP)/$(BOARD_PATH)/board.mk
 CPU_CORE ?= cortex-m0plus
@@ -18,24 +18,24 @@ CFLAGS_SKIP += -Wcast-qual
 
 SRC_C += \
 	src/portable/microchip/samd/dcd_samd.c \
-	hw/mcu/microchip/samd21/gcc/gcc/startup_samd21.c \
-	hw/mcu/microchip/samd21/gcc/system_samd21.c \
-	hw/mcu/microchip/samd21/hpl/gclk/hpl_gclk.c \
-	hw/mcu/microchip/samd21/hpl/pm/hpl_pm.c \
-	hw/mcu/microchip/samd21/hpl/sysctrl/hpl_sysctrl.c \
-	hw/mcu/microchip/samd21/hal/src/hal_atomic.c
+	${SDK_DIR}/gcc/gcc/startup_samd21.c \
+	${SDK_DIR}/gcc/system_samd21.c \
+	${SDK_DIR}/hpl/gclk/hpl_gclk.c \
+	${SDK_DIR}/hpl/pm/hpl_pm.c \
+	${SDK_DIR}/hpl/sysctrl/hpl_sysctrl.c \
+	${SDK_DIR}/hal/src/hal_atomic.c
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
-	$(TOP)/hw/mcu/microchip/samd21/ \
-	$(TOP)/hw/mcu/microchip/samd21/config \
-	$(TOP)/hw/mcu/microchip/samd21/include \
-	$(TOP)/hw/mcu/microchip/samd21/hal/include \
-	$(TOP)/hw/mcu/microchip/samd21/hal/utils/include \
-	$(TOP)/hw/mcu/microchip/samd21/hpl/pm/ \
-	$(TOP)/hw/mcu/microchip/samd21/hpl/port \
-	$(TOP)/hw/mcu/microchip/samd21/hri \
-	$(TOP)/hw/mcu/microchip/samd21/CMSIS/Include
+	$(TOP)/${SDK_DIR}/ \
+	$(TOP)/${SDK_DIR}/config \
+	$(TOP)/${SDK_DIR}/include \
+	$(TOP)/${SDK_DIR}/hal/include \
+	$(TOP)/${SDK_DIR}/hal/utils/include \
+	$(TOP)/${SDK_DIR}/hpl/pm/ \
+	$(TOP)/${SDK_DIR}/hpl/port \
+	$(TOP)/${SDK_DIR}/hri \
+	$(TOP)/${SDK_DIR}/CMSIS/Include
 
 # flash using bossac at least version 1.8
 # can be found in arduino15/packages/arduino/tools/bossac/
diff --git a/hw/bsp/samd51/family.cmake b/hw/bsp/samd51/family.cmake
index 1dce483fd..fa9586066 100644
--- a/hw/bsp/samd51/family.cmake
+++ b/hw/bsp/samd51/family.cmake
@@ -93,7 +93,6 @@ function(family_configure_example TARGET RTOS)
   family_add_tinyusb(${TARGET} OPT_MCU_SAMD51 ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/microchip/samd/dcd_samd.c
-    ${TOP}/src/portable/analog/max3421/hcd_max3421.c
     )
   target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
 

From 1eb0cb0c65077607944665013d4c60f8c8512ec5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 11 Sep 2023 15:45:26 +0700
Subject: [PATCH 651/691] update readme to include max3421 support

---
 .github/workflows/build_arm.yml                        | 1 -
 .github/workflows/cmake_arm.yml                        | 1 +
 README.rst                                             | 8 ++++++--
 hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake | 3 +++
 hw/bsp/nrf/boards/feather_nrf52840_express/board.mk    | 3 +++
 5 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 70385bc1b..975f351a0 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -38,7 +38,6 @@ jobs:
         - 'lpc11 lpc13 lpc15 lpc17'
         - 'lpc51 lpc54'
         - 'mm32 msp432e4'
-        - 'nrf'
         - 'samd11 same5x saml2x'
         - 'stm32f2 stm32f3'
         - 'stm32l0 stm32u5 stm32wb'
diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index e3a00f9c5..4b788a213 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -38,6 +38,7 @@ jobs:
           - 'lpc18 lpc40 lpc43'
           - 'lpc55'
           - 'mcx'
+          - 'nrf'
           - 'ra'
           - 'rp2040'
           - 'samd21'
diff --git a/README.rst b/README.rst
index d72cdb149..aef310b98 100644
--- a/README.rst
+++ b/README.rst
@@ -33,6 +33,7 @@ Supported MCUs
 The stack supports the following MCUs:
 
 - **Allwinner:** F1C100s/F1C200s
+- **Analog:** MAX3421e (aka Arduino usb host shield)
 - **Broadcom:** BCM2837, BCM2711
 - **Dialog:** DA1469x
 - **Espressif:** ESP32-S2, ESP32-S3
@@ -46,12 +47,13 @@ The stack supports the following MCUs:
   - iMX RT Series: RT10xx, RT11xx
   - Kinetis: KL25, K32L2
   - LPC Series: 11u, 13, 15, 17, 18, 40, 43, 51u, 54, 55
+  - MCX: N9x
 
 - **Raspberry Pi:** RP2040
 - **Renesas:**
 
-  - RX Series: 63N, 65N, 72N
-  - RA Series: RA4M1, RA4M3
+  - RX Series: 63n, 65n, 72n
+  - RA Series: 4m1, 4m3, 6m1, 6m5
 
 - **Silabs:** EFM32GG
 - **Sony:** CXD56
@@ -87,6 +89,8 @@ Host Stack
 
 - Human Interface Device (HID): Keyboard, Mouse, Generic
 - Mass Storage Class (MSC)
+- Communication Device Class: CDC-ACM
+- Vendor serial over USB: FTDI, CP210x
 - Hub with multiple-level support
 
 Similar to the Device Stack, if you have a special requirement, `usbh_app_driver_get_cb()` can be used to write your own class driver without modifying the stack.
diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake b/hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake
index 78ed98225..ce6da8b43 100644
--- a/hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake
+++ b/hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake
@@ -2,5 +2,8 @@ set(MCU_VARIANT nrf52840)
 #set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/nrf52840_s140_v6.ld)
 set(LD_FILE_GNU ${NRFX_DIR}/mdk/nrf52840_xxaa.ld)
 
+# enable max3421 host driver for this board
+set(MAX3421_HOST 1)
+
 function(update_board TARGET)
 endfunction()
diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/board.mk b/hw/bsp/nrf/boards/feather_nrf52840_express/board.mk
index b80807963..1f3772caf 100644
--- a/hw/bsp/nrf/boards/feather_nrf52840_express/board.mk
+++ b/hw/bsp/nrf/boards/feather_nrf52840_express/board.mk
@@ -1,6 +1,9 @@
 MCU_VARIANT = nrf52840
 CFLAGS += -DNRF52840_XXAA
 
+# enable max3421 host driver for this board
+#MAX3421_HOST = 1
+
 # All source paths should be relative to the top level.
 LD_FILE = hw/bsp/nrf/linker/nrf52840_s140_v6.ld
 

From f55052b61f548f0f28ec8c1b9b706f34424c58d1 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 11 Sep 2023 16:44:06 +0700
Subject: [PATCH 652/691] enable max3421 host for feather nrf52840 with
 makefile

---
 .../boards/feather_nrf52840_express/board.mk  |  2 +-
 hw/bsp/nrf/family.mk                          | 26 +++++++++++--------
 2 files changed, 16 insertions(+), 12 deletions(-)

diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/board.mk b/hw/bsp/nrf/boards/feather_nrf52840_express/board.mk
index 1f3772caf..488f07b82 100644
--- a/hw/bsp/nrf/boards/feather_nrf52840_express/board.mk
+++ b/hw/bsp/nrf/boards/feather_nrf52840_express/board.mk
@@ -2,7 +2,7 @@ MCU_VARIANT = nrf52840
 CFLAGS += -DNRF52840_XXAA
 
 # enable max3421 host driver for this board
-#MAX3421_HOST = 1
+MAX3421_HOST = 1
 
 # All source paths should be relative to the top level.
 LD_FILE = hw/bsp/nrf/linker/nrf52840_s140_v6.ld
diff --git a/hw/bsp/nrf/family.mk b/hw/bsp/nrf/family.mk
index cdcfe39bd..4b53b9a4f 100644
--- a/hw/bsp/nrf/family.mk
+++ b/hw/bsp/nrf/family.mk
@@ -1,5 +1,6 @@
 UF2_FAMILY_ID = 0xADA52840
-DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/nordic/nrfx
+
+NRFX_DIR = hw/mcu/nordic/nrfx
 
 include $(TOP)/$(BOARD_PATH)/board.mk
 
@@ -14,24 +15,27 @@ CFLAGS += \
 # suppress warning caused by vendor mcu driver
 CFLAGS += -Wno-error=undef -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=cast-qual -Wno-error=redundant-decls
 
-LDFLAGS += -L$(TOP)/hw/mcu/nordic/nrfx/mdk
+LDFLAGS += -L$(TOP)/${NRFX_DIR}/mdk
 
 SRC_C += \
   src/portable/nordic/nrf5x/dcd_nrf5x.c \
-  hw/mcu/nordic/nrfx/drivers/src/nrfx_power.c \
-  hw/mcu/nordic/nrfx/drivers/src/nrfx_uarte.c \
-  hw/mcu/nordic/nrfx/mdk/system_$(MCU_VARIANT).c
+	${NRFX_DIR}/helpers/nrfx_flag32_allocator.c \
+	${NRFX_DIR}/drivers/src/nrfx_gpiote.c \
+  ${NRFX_DIR}/drivers/src/nrfx_power.c \
+  ${NRFX_DIR}/drivers/src/nrfx_spim.c \
+  ${NRFX_DIR}/drivers/src/nrfx_uarte.c \
+  ${NRFX_DIR}/mdk/system_$(MCU_VARIANT).c
 
 INC += \
   $(TOP)/$(BOARD_PATH) \
   $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
-  $(TOP)/hw/mcu/nordic/nrfx \
-  $(TOP)/hw/mcu/nordic/nrfx/mdk \
-  $(TOP)/hw/mcu/nordic/nrfx/hal \
-  $(TOP)/hw/mcu/nordic/nrfx/drivers/include \
-  $(TOP)/hw/mcu/nordic/nrfx/drivers/src \
+  $(TOP)/${NRFX_DIR} \
+  $(TOP)/${NRFX_DIR}/mdk \
+  $(TOP)/${NRFX_DIR}/hal \
+  $(TOP)/${NRFX_DIR}/drivers/include \
+  $(TOP)/${NRFX_DIR}/drivers/src \
 
-SRC_S += hw/mcu/nordic/nrfx/mdk/gcc_startup_$(MCU_VARIANT).S
+SRC_S += ${NRFX_DIR}/mdk/gcc_startup_$(MCU_VARIANT).S
 
 ASFLAGS += -D__HEAP_SIZE=0
 

From 81cd9951080181234f20d81c831ca0595d499577 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 18 Sep 2023 22:15:31 +0700
Subject: [PATCH 653/691] add default CFG_TUH_MAX3421 = 0, default spi speed
 for samd21/samd51 to 12Mhz

---
 hw/bsp/samd21/family.c                    |  3 ++-
 hw/bsp/samd51/family.c                    | 11 +++++++++--
 src/portable/analog/max3421/hcd_max3421.c |  2 +-
 src/tusb_option.h                         | 22 +++++++++++++---------
 4 files changed, 25 insertions(+), 13 deletions(-)

diff --git a/hw/bsp/samd21/family.c b/hw/bsp/samd21/family.c
index cfe66b8dc..395155548 100644
--- a/hw/bsp/samd21/family.c
+++ b/hw/bsp/samd21/family.c
@@ -269,7 +269,8 @@ uint32_t board_millis(void) {
 
 static void max3421_init(void) {
   //------------- SPI Init -------------//
-  uint32_t const baudrate = 4000000u;
+  // MAX3421E max SPI clock is 26MHz however SAMD can only work reliably at 12 Mhz
+  uint32_t const baudrate = 12000000u;
 
   // Enable the APB clock for SERCOM
   PM->APBCMASK.reg |= 1u << (PM_APBCMASK_SERCOM0_Pos + MAX3421_SERCOM_ID);
diff --git a/hw/bsp/samd51/family.c b/hw/bsp/samd51/family.c
index 2cf00c7af..c1b914a02 100644
--- a/hw/bsp/samd51/family.c
+++ b/hw/bsp/samd51/family.c
@@ -183,7 +183,9 @@ uint32_t board_millis(void) {
 
 static void max3421_init(void) {
   //------------- SPI Init -------------//
-  uint32_t const baudrate = 4000000u;
+
+  // MAX3421E max SPI clock is 26MHz however SAMD can only work reliably at 12 Mhz
+  uint32_t const baudrate = 12000000u;
 
   struct {
     volatile uint32_t *mck_apb;
@@ -229,7 +231,12 @@ static void max3421_init(void) {
   while (sercom->SPI.SYNCBUSY.bit.CTRLB == 1);
 
   // Set the baud rate
-  sercom->SPI.BAUD.reg = (uint8_t) (SystemCoreClock / (2 * baudrate) - 1);
+  uint8_t baud_reg = (uint8_t) (SystemCoreClock / (2 * baudrate));
+  if (baud_reg) {
+    baud_reg--;
+  }
+
+  sercom->SPI.BAUD.reg = baud_reg;
 
   // Configure PA12 as MOSI (PAD0), PA13 as SCK (PAD1), PA14 as MISO (PAD2), function C (sercom)
   gpio_set_pin_direction(MAX3421_SCK_PIN, GPIO_DIRECTION_OUT);
diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index 238b518a0..f3f76fd58 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -263,7 +263,7 @@ static void fifo_read(uint8_t rhport, uint8_t * buffer, uint16_t len, bool in_is
 
   max3421_spi_lock(rhport, in_isr);
 
-  tuh_max3421_spi_xfer_api(rhport, &reg, 1, &hirq, 0);
+  tuh_max3421_spi_xfer_api(rhport, &reg, 1, &hirq, 1);
   _hcd_data.hirq = hirq;
   tuh_max3421_spi_xfer_api(rhport, NULL, 0, buffer, len);
 
diff --git a/src/tusb_option.h b/src/tusb_option.h
index c72117850..a41f5a07e 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -424,11 +424,11 @@
 //------------- CLASS -------------//
 
 #ifndef CFG_TUH_HUB
-#define CFG_TUH_HUB    0
+  #define CFG_TUH_HUB    0
 #endif
 
 #ifndef CFG_TUH_CDC
-#define CFG_TUH_CDC    0
+  #define CFG_TUH_CDC    0
 #endif
 
 #ifndef CFG_TUH_CDC_FTDI
@@ -442,34 +442,38 @@
 #endif
 
 #ifndef CFG_TUH_HID
-#define CFG_TUH_HID    0
+  #define CFG_TUH_HID    0
 #endif
 
 #ifndef CFG_TUH_MIDI
-#define CFG_TUH_MIDI   0
+  #define CFG_TUH_MIDI   0
 #endif
 
 #ifndef CFG_TUH_MSC
-#define CFG_TUH_MSC    0
+  #define CFG_TUH_MSC    0
 #endif
 
 #ifndef CFG_TUH_VENDOR
-#define CFG_TUH_VENDOR 0
+  #define CFG_TUH_VENDOR 0
 #endif
 
 #ifndef CFG_TUH_API_EDPT_XFER
-#define CFG_TUH_API_EDPT_XFER 0
+  #define CFG_TUH_API_EDPT_XFER 0
 #endif
 
 // Enable PIO-USB software host controller
 #ifndef CFG_TUH_RPI_PIO_USB
-#define CFG_TUH_RPI_PIO_USB 0
+  #define CFG_TUH_RPI_PIO_USB 0
 #endif
 
 #ifndef CFG_TUD_RPI_PIO_USB
-#define CFG_TUD_RPI_PIO_USB 0
+  #define CFG_TUD_RPI_PIO_USB 0
 #endif
 
+// MAX3421 Host controller option
+#ifndef CFG_TUH_MAX3421
+  #define CFG_TUH_MAX3421  0
+#endif
 
 //--------------------------------------------------------------------+
 // TypeC Options (Default)

From 71a2e8a36d7c98169359e6320e39bfdf3b84793f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 19 Sep 2023 17:59:38 +0700
Subject: [PATCH 654/691] addding cmake support for u5

---
 .idea/cmake.xml                               |   1 +
 hw/bsp/stm32g4/family.cmake                   |  10 +-
 .../stm32u5/boards/stm32u575eval/board.cmake  |  10 +
 hw/bsp/stm32u5/boards/stm32u575eval/board.mk  |   2 +-
 hw/bsp/stm32u5/family.c                       |  11 +
 hw/bsp/stm32u5/family.cmake                   | 216 ++++++++++++++++++
 hw/bsp/stm32u5/family.mk                      |   6 +-
 7 files changed, 244 insertions(+), 12 deletions(-)
 create mode 100644 hw/bsp/stm32u5/boards/stm32u575eval/board.cmake
 create mode 100644 hw/bsp/stm32u5/family.cmake

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 89ec1066c..112449335 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -55,6 +55,7 @@
       <configuration PROFILE_NAME="portenta_c33" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=portenta_c33 -DLOG=3" />
       <configuration PROFILE_NAME="metro_m4_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m4_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
       <configuration PROFILE_NAME="metro_m0_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m0_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
+      <configuration PROFILE_NAME="stm32u5" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32u575eval" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake
index 675a96c74..fa7badc02 100644
--- a/hw/bsp/stm32g4/family.cmake
+++ b/hw/bsp/stm32g4/family.cmake
@@ -36,10 +36,10 @@ function(add_board_target BOARD_TARGET)
       ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
       ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
@@ -50,11 +50,6 @@ function(add_board_target BOARD_TARGET)
       ${ST_CMSIS}/Include
       ${ST_HAL_DRIVER}/Inc
       )
-    target_compile_options(${BOARD_TARGET} PUBLIC
-      )
-    target_compile_definitions(${BOARD_TARGET} PUBLIC
-      )
-
     update_board(${BOARD_TARGET})
 
     if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
@@ -62,8 +57,7 @@ function(add_board_target BOARD_TARGET)
         "LINKER:--script=${LD_FILE_GNU}"
         -nostartfiles
         # nanolib
-        --specs=nosys.specs
-        --specs=nano.specs
+        --specs=nosys.specs --specs=nano.specs
         )
     elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
       target_link_options(${BOARD_TARGET} PUBLIC
diff --git a/hw/bsp/stm32u5/boards/stm32u575eval/board.cmake b/hw/bsp/stm32u5/boards/stm32u575eval/board.cmake
new file mode 100644
index 000000000..57ba85c71
--- /dev/null
+++ b/hw/bsp/stm32u5/boards/stm32u575eval/board.cmake
@@ -0,0 +1,10 @@
+set(MCU_VARIANT stm32u575xx)
+set(JLINK_DEVICE stm32u575ai)
+
+set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/STM32U575xx_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32U575xx
+    )
+endfunction()
diff --git a/hw/bsp/stm32u5/boards/stm32u575eval/board.mk b/hw/bsp/stm32u5/boards/stm32u575eval/board.mk
index 19cd2a5b0..a75b2af78 100644
--- a/hw/bsp/stm32u5/boards/stm32u575eval/board.mk
+++ b/hw/bsp/stm32u5/boards/stm32u575eval/board.mk
@@ -7,4 +7,4 @@ LD_FILE = $(BOARD_PATH)/STM32U575AIIXQ_FLASH.ld
 SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32u575xx.s
 
 # For flash-jlink target
-JLINK_DEVICE = stm32u575
+JLINK_DEVICE = stm32u575ai
diff --git a/hw/bsp/stm32u5/family.c b/hw/bsp/stm32u5/family.c
index a30d886aa..1e1b9011e 100644
--- a/hw/bsp/stm32u5/family.c
+++ b/hw/bsp/stm32u5/family.c
@@ -25,7 +25,18 @@
  * This file is part of the TinyUSB stack.
  */
 
+// Suppress warning caused by mcu driver
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wundef"
+#endif
+
 #include "stm32u5xx_hal.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 #include "bsp/board_api.h"
 #include "board.h"
 
diff --git a/hw/bsp/stm32u5/family.cmake b/hw/bsp/stm32u5/family.cmake
new file mode 100644
index 000000000..2aa7d392b
--- /dev/null
+++ b/hw/bsp/stm32u5/family.cmake
@@ -0,0 +1,216 @@
+include_guard()
+
+if (NOT BOARD)
+  message(FATAL_ERROR "BOARD not specified")
+endif ()
+
+set(ST_FAMILY u5)
+set(ST_PREFIX stm32${ST_FAMILY}xx)
+
+set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver)
+set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY})
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS STM32U5 CACHE INTERNAL "")
+
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    # Startup & Linker script
+    set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+    set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+
+    add_library(${BOARD_TARGET} STATIC
+      ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
+      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+      )
+    target_include_directories(${BOARD_TARGET} PUBLIC
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+      ${CMSIS_5}/CMSIS/Core/Include
+      ${ST_CMSIS}/Include
+      ${ST_HAL_DRIVER}/Inc
+      )
+    update_board(${BOARD_TARGET})
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--script=${LD_FILE_GNU}"
+        -nostartfiles
+        # nanolib
+        --specs=nosys.specs --specs=nano.specs
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32G4 ${RTOS})
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    #${TOP}/src/portable/st/typec/typec_stm32.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_flash_stlink(${TARGET})
+  family_flash_jlink(${TARGET})
+endfunction()
+include_guard()
+
+if (NOT BOARD)
+  message(FATAL_ERROR "BOARD not specified")
+endif ()
+
+set(ST_FAMILY u5)
+set(ST_PREFIX stm32${ST_FAMILY}xx)
+
+set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver)
+set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY})
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS STM32U5 CACHE INTERNAL "")
+
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (NOT TARGET ${BOARD_TARGET})
+    # Startup & Linker script
+    set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+    set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+
+    add_library(${BOARD_TARGET} STATIC
+      ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
+      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+      )
+    target_include_directories(${BOARD_TARGET} PUBLIC
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+      ${CMSIS_5}/CMSIS/Core/Include
+      ${ST_CMSIS}/Include
+      ${ST_HAL_DRIVER}/Inc
+      )
+    update_board(${BOARD_TARGET})
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--script=${LD_FILE_GNU}"
+        -nostartfiles
+        # nanolib
+        --specs=nosys.specs --specs=nano.specs
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${BOARD_TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32G4 ${RTOS})
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    #${TOP}/src/portable/st/typec/typec_stm32.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_flash_stlink(${TARGET})
+  family_flash_jlink(${TARGET})
+endfunction()
diff --git a/hw/bsp/stm32u5/family.mk b/hw/bsp/stm32u5/family.mk
index 9174fe96a..902290b90 100644
--- a/hw/bsp/stm32u5/family.mk
+++ b/hw/bsp/stm32u5/family.mk
@@ -20,11 +20,11 @@ SRC_C += \
 	$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
-	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
-	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c \
-	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c
 
 INC += \

From 8cdcd0fa9d1530c88637e01924a4218f8106fc3a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 19 Sep 2023 18:33:59 +0700
Subject: [PATCH 655/691] fix build and add u5 to ci

---
 .github/workflows/build_arm.yml               |   2 +-
 .github/workflows/cmake_arm.yml               |   1 +
 .../stm32u5/FreeRTOSConfig/FreeRTOSConfig.h   | 165 ++++++++++++++++++
 hw/bsp/stm32u5/family.c                       |  46 ++---
 hw/bsp/stm32u5/family.cmake                   | 110 +-----------
 5 files changed, 187 insertions(+), 137 deletions(-)
 create mode 100644 hw/bsp/stm32u5/FreeRTOSConfig/FreeRTOSConfig.h

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 975f351a0..997fb7da9 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -40,7 +40,7 @@ jobs:
         - 'mm32 msp432e4'
         - 'samd11 same5x saml2x'
         - 'stm32f2 stm32f3'
-        - 'stm32l0 stm32u5 stm32wb'
+        - 'stm32l0 stm32wb'
         - 'tm4c123 xmc4000'
     steps:
     - name: Setup Python
diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index 4b788a213..192bf957a 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -51,6 +51,7 @@ jobs:
           - 'stm32g4'
           - 'stm32h7'
           - 'stm32l4'
+          - 'stm32u5'
     steps:
     - name: Setup Python
       uses: actions/setup-python@v4
diff --git a/hw/bsp/stm32u5/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32u5/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..138fc6ba6
--- /dev/null
+++ b/hw/bsp/stm32u5/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,165 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "stm32u5xx.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       4
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/stm32u5/family.c b/hw/bsp/stm32u5/family.c
index 1e1b9011e..5e4379f9c 100644
--- a/hw/bsp/stm32u5/family.c
+++ b/hw/bsp/stm32u5/family.c
@@ -43,8 +43,7 @@
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
-void OTG_FS_IRQHandler(void)
-{
+void OTG_FS_IRQHandler(void) {
   tud_int_handler(0);
 }
 
@@ -54,8 +53,7 @@ void OTG_FS_IRQHandler(void)
 
 UART_HandleTypeDef UartHandle;
 
-void board_init(void)
-{
+void board_init(void) {
 
   board_clock_init();
 
@@ -69,7 +67,7 @@ void board_init(void)
   __HAL_RCC_GPIOG_CLK_ENABLE();
   __HAL_RCC_GPIOH_CLK_ENABLE();
 
-  UART_CLK_EN();
+      UART_CLK_EN();
 
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
@@ -134,8 +132,8 @@ void board_init(void)
   GPIO_InitStruct.Alternate = GPIO_AF10_USB;
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
-#if OTG_FS_VBUS_SENSE
-  // Configure VBUS Pin
+#if defined(OTG_FS_VBUS_SENSE) && OTG_FS_VBUS_SENSE
+  // Configure VBUS Pin OTG_FS_VBUS_SENSE
   GPIO_InitStruct.Pin = GPIO_PIN_9;
   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
   GPIO_InitStruct.Pull = GPIO_NOPULL;
@@ -156,57 +154,51 @@ void board_init(void)
   HAL_PWREx_EnableVddUSB();
 
   /* USB_OTG_FS clock enable */
-  __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
+      __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
 }
 
 //--------------------------------------------------------------------+
 // Board porting API
 //--------------------------------------------------------------------+
 
-void board_led_write(bool state)
-{
+void board_led_write(bool state) {
   HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON));
 }
 
-uint32_t board_button_read(void)
-{
+uint32_t board_button_read(void) {
   return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
 }
 
-int board_uart_read(uint8_t *buf, int len)
-{
-  (void)buf;
-  (void)len;
+int board_uart_read(uint8_t *buf, int len) {
+  (void) buf;
+  (void) len;
   return 0;
 }
 
-int board_uart_write(void const *buf, int len)
-{
-  HAL_UART_Transmit(&UartHandle, (uint8_t *)(uintptr_t)buf, len, 0xffff);
+int board_uart_write(void const *buf, int len) {
+  HAL_UART_Transmit(&UartHandle, (uint8_t *) (uintptr_t) buf, len, 0xffff);
   return len;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
-void SysTick_Handler(void)
-{
+
+void SysTick_Handler(void) {
   HAL_IncTick();
   system_ticks++;
 }
 
-uint32_t board_millis(void)
-{
+uint32_t board_millis(void) {
   return system_ticks;
 }
+
 #endif
 
-void HardFault_Handler(void)
-{
+void HardFault_Handler(void) {
   asm("bkpt");
 }
 
 // Required by __libc_init_array in startup code if we are compiling using
 // -nostdlib/-nostartfiles.
-void _init(void)
-{
+void _init(void) {
 }
diff --git a/hw/bsp/stm32u5/family.cmake b/hw/bsp/stm32u5/family.cmake
index 2aa7d392b..8f9ac1109 100644
--- a/hw/bsp/stm32u5/family.cmake
+++ b/hw/bsp/stm32u5/family.cmake
@@ -92,115 +92,7 @@ function(family_configure_example TARGET RTOS)
     )
 
   # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32G4 ${RTOS})
-  target_sources(${TARGET}-tinyusb PUBLIC
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    #${TOP}/src/portable/st/typec/typec_stm32.c
-    )
-  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
-
-  # Link dependencies
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
-
-  # Flashing
-  family_flash_stlink(${TARGET})
-  family_flash_jlink(${TARGET})
-endfunction()
-include_guard()
-
-if (NOT BOARD)
-  message(FATAL_ERROR "BOARD not specified")
-endif ()
-
-set(ST_FAMILY u5)
-set(ST_PREFIX stm32${ST_FAMILY}xx)
-
-set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver)
-set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY})
-set(CMSIS_5 ${TOP}/lib/CMSIS_5)
-
-# include board specific
-include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
-
-# toolchain set up
-set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
-set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
-
-set(FAMILY_MCUS STM32U5 CACHE INTERNAL "")
-
-
-#------------------------------------
-# BOARD_TARGET
-#------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (NOT TARGET ${BOARD_TARGET})
-    # Startup & Linker script
-    set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-    set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
-
-    add_library(${BOARD_TARGET} STATIC
-      ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
-      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
-      )
-    target_include_directories(${BOARD_TARGET} PUBLIC
-      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-      ${CMSIS_5}/CMSIS/Core/Include
-      ${ST_CMSIS}/Include
-      ${ST_HAL_DRIVER}/Inc
-      )
-    update_board(${BOARD_TARGET})
-
-    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--script=${LD_FILE_GNU}"
-        -nostartfiles
-        # nanolib
-        --specs=nosys.specs --specs=nano.specs
-        )
-    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--config=${LD_FILE_IAR}"
-        )
-    endif ()
-  endif ()
-endfunction()
-
-
-#------------------------------------
-# Functions
-#------------------------------------
-function(family_configure_example TARGET RTOS)
-  family_configure_common(${TARGET} ${RTOS})
-
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
-  target_sources(${TARGET} PUBLIC
-    # BSP
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
-    )
-  target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
-    )
-
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32G4 ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32U5 ${RTOS})
   target_sources(${TARGET}-tinyusb PUBLIC
     ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
     #${TOP}/src/portable/st/typec/typec_stm32.c

From b73262be3af8d9716470ae505c1319e7b9169d6b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 19 Sep 2023 18:38:47 +0700
Subject: [PATCH 656/691] minor indent

---
 hw/bsp/stm32u5/family.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/bsp/stm32u5/family.c b/hw/bsp/stm32u5/family.c
index 5e4379f9c..d8e58d293 100644
--- a/hw/bsp/stm32u5/family.c
+++ b/hw/bsp/stm32u5/family.c
@@ -67,7 +67,7 @@ void board_init(void) {
   __HAL_RCC_GPIOG_CLK_ENABLE();
   __HAL_RCC_GPIOH_CLK_ENABLE();
 
-      UART_CLK_EN();
+  UART_CLK_EN();
 
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
@@ -154,7 +154,7 @@ void board_init(void) {
   HAL_PWREx_EnableVddUSB();
 
   /* USB_OTG_FS clock enable */
-      __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
+  __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
 }
 
 //--------------------------------------------------------------------+

From 9d0251f7a6751a0d998da4fad81a35a043608275 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Tue, 19 Sep 2023 15:42:52 +0200
Subject: [PATCH 657/691] Fix UAC interleaved copy.

---
 src/class/audio/audio_device.c | 113 +++++++++++++++------------------
 1 file changed, 51 insertions(+), 62 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 1a7ce7870..0e4220f4f 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -631,68 +631,59 @@ static bool audiod_rx_done_cb(uint8_t rhport, audiod_function_t* audio, uint16_t
 // Decoding according to 2.3.1.5 Audio Streams
 
 // Helper function
-static inline uint8_t * audiod_interleaved_copy_bytes_fast_decode(uint16_t const nBytesToCopy, void * dst, uint8_t * dst_end, uint8_t * src, uint8_t const n_ff_used)
+static inline uint8_t * audiod_interleaved_copy_bytes_fast_decode(uint16_t const nBytesToCopy, uint8_t * dst, uint8_t * dst_end, uint8_t * src, uint8_t const n_ff_used)
 {
 
-  // This function is an optimized version of
-  //  while((uint8_t *)dst < dst_end)
-  //  {
-  //    memcpy(dst, src, nBytesToCopy);
-  //    dst = (uint8_t *)dst + nBytesToCopy;
-  //    src += nBytesToCopy * n_ff_used;
-  //  }
-
-  // Optimize for fast half word copies
-  typedef struct{
-    uint16_t val;
-  } __attribute((__packed__)) unaligned_uint16_t;
-
-  // Optimize for fast word copies
-  typedef struct{
-    uint32_t val;
-  } __attribute((__packed__)) unaligned_uint32_t;
+  // Due to one FIFO contains 2 channels, data always aligned to (nBytesToCopy * 2)
 
   switch (nBytesToCopy)
   {
     case 1:
       while((uint8_t *)dst < dst_end)
       {
-        *(uint8_t *)dst++ = *src;
-        src += n_ff_used;
+        *(uint16_t*)dst = *(uint16_t*)src;
+        src += 2;
+        dst += 2;
+        src += 2 * (n_ff_used - 1);
       }
       break;
 
     case 2:
       while((uint8_t *)dst < dst_end)
       {
-        *(unaligned_uint16_t*)dst = *(unaligned_uint16_t*)src;
-        dst += 2;
-        src += 2 * n_ff_used;
+        *(uint32_t*)dst = *(uint32_t*)src;
+        src += 4;
+        dst += 4;
+        src += 4 * (n_ff_used - 1);
       }
       break;
 
     case 3:
       while((uint8_t *)dst < dst_end)
       {
-        //        memcpy(dst, src, 3);
-        //        dst = (uint8_t *)dst + 3;
-        //        src += 3 * n_ff_used;
-
-        // TODO: Is there a faster way to copy 3 bytes?
-        *(uint8_t *)dst++ = *src++;
-        *(uint8_t *)dst++ = *src++;
-        *(uint8_t *)dst++ = *src++;
-
-        src += 3 * (n_ff_used - 1);
+        *(uint16_t*)dst = *(uint16_t*)src;
+        src += 2;
+        dst += 2;
+        *(uint16_t*)dst = *(uint16_t*)src;
+        src += 2;
+        dst += 2;
+        *(uint16_t*)dst = *(uint16_t*)src;
+        src += 2;
+        dst += 2;
+        src += 6 * (n_ff_used - 1);
       }
       break;
 
     case 4:
       while((uint8_t *)dst < dst_end)
       {
-        *(unaligned_uint32_t*)dst = *(unaligned_uint32_t*)src;
+        *(uint32_t*)dst++ = *(uint32_t*)src++;
+        src += 4;
         dst += 4;
-        src += 4 * n_ff_used;
+        *(uint32_t*)dst++ = *(uint32_t*)src++;
+        src += 4;
+        dst += 4;
+        src += 8 * (n_ff_used - 1);
       }
       break;
   }
@@ -946,57 +937,55 @@ range [-1, +1)
 // Helper function
 static inline uint8_t * audiod_interleaved_copy_bytes_fast_encode(uint16_t const nBytesToCopy, uint8_t * src, uint8_t * src_end, uint8_t * dst, uint8_t const n_ff_used)
 {
-  // Optimize for fast half word copies
-  typedef struct{
-    uint16_t val;
-  } __attribute((__packed__)) unaligned_uint16_t;
-
-  // Optimize for fast word copies
-  typedef struct{
-    uint32_t val;
-  } __attribute((__packed__)) unaligned_uint32_t;
-
+  // Due to one FIFO contains 2 channels, data always aligned to (nBytesToCopy * 2)
   switch (nBytesToCopy)
   {
     case 1:
       while(src < src_end)
       {
-        *dst = *src++;
-        dst += n_ff_used;
+        *(uint16_t*)dst = *(uint16_t*)src;
+        src += 2;
+        dst += 2;
+        dst += 2 * (n_ff_used - 1);
       }
       break;
 
     case 2:
       while(src < src_end)
       {
-        *(unaligned_uint16_t*)dst = *(unaligned_uint16_t*)src;
-        src += 2;
-        dst += 2 * n_ff_used;
+        *(uint32_t*)dst = *(uint32_t*)src;
+        src += 4;
+        dst += 4;
+        dst += 4 * (n_ff_used - 1);
       }
       break;
 
     case 3:
       while(src < src_end)
       {
-        //        memcpy(dst, src, 3);
-        //        src = (uint8_t *)src + 3;
-        //        dst += 3 * n_ff_used;
-
-        // TODO: Is there a faster way to copy 3 bytes?
-        *dst++ = *src++;
-        *dst++ = *src++;
-        *dst++ = *src++;
-
-        dst += 3 * (n_ff_used - 1);
+        *(uint16_t*)dst = *(uint16_t*)src;
+        src += 2;
+        dst += 2;
+        *(uint16_t*)dst = *(uint16_t*)src;
+        src += 2;
+        dst += 2;
+        *(uint16_t*)dst = *(uint16_t*)src;
+        src += 2;
+        dst += 2;
+        dst += 6 * (n_ff_used - 1);
       }
       break;
 
     case 4:
       while(src < src_end)
       {
-        *(unaligned_uint32_t*)dst = *(unaligned_uint32_t*)src;
+        *(uint32_t*)dst++ = *(uint32_t*)src++;
         src += 4;
-        dst += 4 * n_ff_used;
+        dst += 4;
+        *(uint32_t*)dst++ = *(uint32_t*)src++;
+        src += 4;
+        dst += 4;
+        dst += 8 * (n_ff_used - 1);
       }
       break;
   }

From 6be7f354c26e09a87d1b856b0e237ff82be5963f Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Tue, 19 Sep 2023 16:32:49 +0200
Subject: [PATCH 658/691] Fix cast-align.

---
 src/class/audio/audio_device.c | 194 +++++++++++++++------------------
 1 file changed, 89 insertions(+), 105 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 0e4220f4f..46fd6dfa9 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -631,64 +631,55 @@ static bool audiod_rx_done_cb(uint8_t rhport, audiod_function_t* audio, uint16_t
 // Decoding according to 2.3.1.5 Audio Streams
 
 // Helper function
-static inline uint8_t * audiod_interleaved_copy_bytes_fast_decode(uint16_t const nBytesToCopy, uint8_t * dst, uint8_t * dst_end, uint8_t * src, uint8_t const n_ff_used)
+static inline void * audiod_interleaved_copy_bytes_fast_decode(uint16_t const nBytesToCopy, void * dst, const void * dst_end, void * src, uint8_t const n_ff_used)
 {
-
   // Due to one FIFO contains 2 channels, data always aligned to (nBytesToCopy * 2)
+  uint16_t * dst16 = dst;
+  uint16_t * src16 = src;
+  const uint16_t * dst_end16 = dst_end;
+  uint32_t * dst32 = dst;
+  uint32_t * src32 = src;
+  const uint32_t * dst_end32 = dst_end;
 
-  switch (nBytesToCopy)
+  if (nBytesToCopy == 1)
   {
-    case 1:
-      while((uint8_t *)dst < dst_end)
-      {
-        *(uint16_t*)dst = *(uint16_t*)src;
-        src += 2;
-        dst += 2;
-        src += 2 * (n_ff_used - 1);
-      }
-      break;
-
-    case 2:
-      while((uint8_t *)dst < dst_end)
-      {
-        *(uint32_t*)dst = *(uint32_t*)src;
-        src += 4;
-        dst += 4;
-        src += 4 * (n_ff_used - 1);
-      }
-      break;
-
-    case 3:
-      while((uint8_t *)dst < dst_end)
-      {
-        *(uint16_t*)dst = *(uint16_t*)src;
-        src += 2;
-        dst += 2;
-        *(uint16_t*)dst = *(uint16_t*)src;
-        src += 2;
-        dst += 2;
-        *(uint16_t*)dst = *(uint16_t*)src;
-        src += 2;
-        dst += 2;
-        src += 6 * (n_ff_used - 1);
-      }
-      break;
-
-    case 4:
-      while((uint8_t *)dst < dst_end)
-      {
-        *(uint32_t*)dst++ = *(uint32_t*)src++;
-        src += 4;
-        dst += 4;
-        *(uint32_t*)dst++ = *(uint32_t*)src++;
-        src += 4;
-        dst += 4;
-        src += 8 * (n_ff_used - 1);
-      }
-      break;
+    while(dst16 < dst_end16)
+    {
+      *dst16++ = *src16++;
+      src16 += n_ff_used - 1;
+    }
+    return src16;
+  }
+  else if (nBytesToCopy == 2)
+  {
+    while(dst32 < dst_end32)
+    {
+      *dst32++ = *src32++;
+      src32 += n_ff_used - 1;
+    }
+    return src32;
+  }
+  else if (nBytesToCopy == 3)
+  {
+    while(dst16 < dst_end16)
+    {
+      *dst16++ = *src16++;
+      *dst16++ = *src16++;
+      *dst16++ = *src16++;
+      src16 += 3 * (n_ff_used - 1);
+    }
+    return src16;
+  }
+  else // nBytesToCopy == 4
+  {
+    while(dst32 < dst_end32)
+    {
+      *dst32++ = *src32++;
+      *dst32++ = *src32++;
+      src32 += 2 * (n_ff_used - 1);
+    }
+    return src32;
   }
-
-  return src;
 }
 
 static bool audiod_decode_type_I_pcm(uint8_t rhport, audiod_function_t* audio, uint16_t n_bytes_received)
@@ -935,62 +926,55 @@ range [-1, +1)
  * */
 
 // Helper function
-static inline uint8_t * audiod_interleaved_copy_bytes_fast_encode(uint16_t const nBytesToCopy, uint8_t * src, uint8_t * src_end, uint8_t * dst, uint8_t const n_ff_used)
+static inline void * audiod_interleaved_copy_bytes_fast_encode(uint16_t const nBytesToCopy, void * src, const void * src_end, void * dst, uint8_t const n_ff_used)
 {
   // Due to one FIFO contains 2 channels, data always aligned to (nBytesToCopy * 2)
-  switch (nBytesToCopy)
+  uint16_t * dst16 = dst;
+  uint16_t * src16 = src;
+  const uint16_t * src_end16 = src_end;
+  uint32_t * dst32 = dst;
+  uint32_t * src32 = src;
+  const uint32_t * src_end32 = src_end;
+
+  if (nBytesToCopy == 1)
   {
-    case 1:
-      while(src < src_end)
-      {
-        *(uint16_t*)dst = *(uint16_t*)src;
-        src += 2;
-        dst += 2;
-        dst += 2 * (n_ff_used - 1);
-      }
-      break;
-
-    case 2:
-      while(src < src_end)
-      {
-        *(uint32_t*)dst = *(uint32_t*)src;
-        src += 4;
-        dst += 4;
-        dst += 4 * (n_ff_used - 1);
-      }
-      break;
-
-    case 3:
-      while(src < src_end)
-      {
-        *(uint16_t*)dst = *(uint16_t*)src;
-        src += 2;
-        dst += 2;
-        *(uint16_t*)dst = *(uint16_t*)src;
-        src += 2;
-        dst += 2;
-        *(uint16_t*)dst = *(uint16_t*)src;
-        src += 2;
-        dst += 2;
-        dst += 6 * (n_ff_used - 1);
-      }
-      break;
-
-    case 4:
-      while(src < src_end)
-      {
-        *(uint32_t*)dst++ = *(uint32_t*)src++;
-        src += 4;
-        dst += 4;
-        *(uint32_t*)dst++ = *(uint32_t*)src++;
-        src += 4;
-        dst += 4;
-        dst += 8 * (n_ff_used - 1);
-      }
-      break;
+    while(src16 < src_end16)
+    {
+      *dst16++ = *src16++;
+      dst16 += n_ff_used - 1;
+    }
+    return dst16;
+  }
+  else if (nBytesToCopy == 2)
+  {
+    while(src32 < src_end32)
+    {
+      *dst32++ = *src32++;
+      dst32 += n_ff_used - 1;
+    }
+    return dst32;
+  }
+  else if (nBytesToCopy == 3)
+  {
+    while(src16 < src_end16)
+    {
+      *dst16++ = *src16++;
+      *dst16++ = *src16++;
+      *dst16++ = *src16++;
+      dst16 += 3 * (n_ff_used - 1);
+    }
+    return dst16;
+  }
+  else // nBytesToCopy == 4
+  {
+    while(src32 < src_end32)
+    {
+      *dst32++ = *src32++;
+      *dst32++ = *src32++;
+      dst32 += 2 * (n_ff_used - 1);
+    }
+    return dst32;
   }
-
-  return dst;
 }
 
 static uint16_t audiod_encode_type_I_pcm(uint8_t rhport, audiod_function_t* audio)

From a7c136c03f0c4a057f8b49c10ed9cddcecf52879 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 25 Sep 2023 16:53:11 +0700
Subject: [PATCH 659/691] adding host/cdc_msc_hid_freertos example

---
 .idea/cmake.xml                               |  19 +-
 examples/device/cdc_msc_freertos/Makefile     |   2 +-
 examples/device/cdc_msc_freertos/src/main.c   |  70 +++-----
 examples/host/bare_api/CMakeLists.txt         |   5 +
 examples/host/cdc_msc_hid/CMakeLists.txt      |   5 +
 .../host/cdc_msc_hid_freertos/CMakeLists.txt  |  36 ++++
 .../cdc_msc_hid_freertos/src/CMakeLists.txt   |   4 +
 examples/host/cdc_msc_hid_freertos/src/main.c | 170 ++++++++++++++++++
 .../cdc_msc_hid_freertos/src/tusb_config.h    | 133 ++++++++++++++
 examples/host/hid_controller/CMakeLists.txt   |   5 +
 .../host/msc_file_explorer/CMakeLists.txt     |   5 +
 examples/make.mk                              |   3 -
 .../boards/adafruit_metro_esp32s2/board.h     |   8 +
 .../boards/espressif_kaluga_1/board.h         |   8 +
 .../boards/espressif_s2_devkitc/board.cmake   |   2 +
 .../boards/espressif_s2_devkitc/board.h       |  45 +++++
 hw/bsp/espressif/boards/family.c              | 130 +++++++++++---
 .../components/tinyusb_src/CMakeLists.txt     |  81 +++++----
 src/host/usbh.c                               |   2 +-
 src/portable/analog/max3421/hcd_max3421.c     |   2 +-
 20 files changed, 623 insertions(+), 112 deletions(-)
 create mode 100644 examples/host/cdc_msc_hid_freertos/CMakeLists.txt
 create mode 100644 examples/host/cdc_msc_hid_freertos/src/CMakeLists.txt
 create mode 100644 examples/host/cdc_msc_hid_freertos/src/main.c
 create mode 100644 examples/host/cdc_msc_hid_freertos/src/tusb_config.h
 create mode 100644 hw/bsp/espressif/boards/espressif_s2_devkitc/board.cmake
 create mode 100644 hw/bsp/espressif/boards/espressif_s2_devkitc/board.h

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 89ec1066c..747f0fb58 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -2,23 +2,24 @@
 <project version="4">
   <component name="CMakeSharedSettings">
     <configurations>
-      <configuration PROFILE_NAME="esp32s2" ENABLED="false" GENERATION_OPTIONS="-DBOARD=espressif_saola_1 -DIDF_TARGET=esp32s2">
+      <configuration PROFILE_NAME="esp32s2" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=espressif_saola_1">
         <ADDITIONAL_GENERATION_ENVIRONMENT>
           <envs>
             <env name="ESPBAUD" value="1500000" />
-            <env name="ESPPORT" value="/dev/ttyUSB0" />
-            <env name="IDF_PATH" value="$PROJECT_DIR$/../esp-idf" />
-            <env name="PATH" value="$PROJECT_DIR$/../esp-idf/components/esptool_py/esptool:/home/hathach/code/esp-idf/components/espcoredump:/home/hathach/code/esp-idf/components/partition_table:/home/hathach/code/esp-idf/components/app_update:/home/hathach/.espressif/tools/xtensa-esp-elf-gdb/11.2_20220823/xtensa-esp-elf-gdb/bin:/home/hathach/.espressif/tools/riscv32-esp-elf-gdb/11.2_20220823/riscv32-esp-elf-gdb/bin:/home/hathach/.espressif/tools/xtensa-esp32-elf/esp-2021r2-patch5-8.4.0/xtensa-esp32-elf/bin:/home/hathach/.espressif/tools/xtensa-esp32s2-elf/esp-2021r2-patch5-8.4.0/xtensa-esp32s2-elf/bin:/home/hathach/.espressif/tools/xtensa-esp32s3-elf/esp-2021r2-patch5-8.4.0/xtensa-esp32s3-elf/bin:/home/hathach/.espressif/tools/riscv32-esp-elf/esp-2021r2-patch5-8.4.0/riscv32-esp-elf/bin:/home/hathach/.espressif/tools/esp32ulp-elf/2.35_20220830/esp32ulp-elf/bin:/home/hathach/.espressif/tools/openocd-esp32/v0.11.0-esp32-20221026/openocd-esp32/bin:/home/hathach/.espressif/python_env/idf4.4_py3.10_env/bin:/home/hathach/code/esp-idf/tools:/home/hathach/app/riscv-openocd-wch/src:/home/hathach/app/arm-gnu-toolchain-12.2.rel1-x86_64-arm-none-eabi/bin:/home/hathach/.local/bin:/home/hathach/bin:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games:/snap/bin:/snap/bin:/opt/SEGGER/JLink:/home/hathach/app/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf/bin:/home/hathach/.local/xPacks/@xpack-dev-tools/riscv-none-embed-gcc/10.2.0-1.2.1/.content/bin:/home/hathach/.local/xPacks/@xpack-dev-tools/openocd/*/.content/bin:/home/hathach/ti/msp430-gcc/bin:/home/hathach/ti/MSPFlasher_1.3.20:/home/hathach/ti/uniflash_7.0.0:/home/hathach/app/gcc_8.3.0.202102_gnurx-elf/bin:/home/hathach/app/RFP_CLI_Linux_V31101_x64/linux-x64:/home/hathach/app/fomu-toolchain-linux_x86_64-v1.5.5/bin:/home/hathach/app/nuclei_riscv_newlibc_prebuilt_linux64_2020.08/gcc/bin:/home/hathach/app/riscv32-embecosm-ubuntu2004-gcc11.1.0/bin:/home/hathach/app/cov-analysis-linux64-2019.03/bin:/opt/iarsystems/bxarm/arm/bin:/home/hathach/.local/bin" />
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
-      <configuration PROFILE_NAME="esp32s3" ENABLED="false" GENERATION_OPTIONS="-DBOARD=espressif_s3_devkitm -DIDF_TARGET=esp32s3">
+      <configuration PROFILE_NAME="kaluga" ENABLED="true" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=espressif_kaluga_1 -DMAX3421_HOST=1 -DLOG=2">
+        <ADDITIONAL_GENERATION_ENVIRONMENT>
+          <envs>
+            <env name="ESPBAUD" value="1500000" />
+          </envs>
+        </ADDITIONAL_GENERATION_ENVIRONMENT>
+      </configuration>
+      <configuration PROFILE_NAME="esp32s3" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=espressif_s3_devkitm">
         <ADDITIONAL_GENERATION_ENVIRONMENT>
           <envs>
             <env name="ESPBAUD" value="1500000" />
-            <env name="ESPPORT" value="/dev/ttyUSB0" />
-            <env name="IDF_PATH" value="$PROJECT_DIR$/../esp-idf" />
-            <env name="PATH" value="$PROJECT_DIR$/../esp-idf/components/esptool_py/esptool:/home/hathach/code/esp-idf/components/espcoredump:/home/hathach/code/esp-idf/components/partition_table:/home/hathach/code/esp-idf/components/app_update:/home/hathach/.espressif/tools/xtensa-esp-elf-gdb/11.2_20220823/xtensa-esp-elf-gdb/bin:/home/hathach/.espressif/tools/riscv32-esp-elf-gdb/11.2_20220823/riscv32-esp-elf-gdb/bin:/home/hathach/.espressif/tools/xtensa-esp32-elf/esp-2021r2-patch5-8.4.0/xtensa-esp32-elf/bin:/home/hathach/.espressif/tools/xtensa-esp32s2-elf/esp-2021r2-patch5-8.4.0/xtensa-esp32s2-elf/bin:/home/hathach/.espressif/tools/xtensa-esp32s3-elf/esp-2021r2-patch5-8.4.0/xtensa-esp32s3-elf/bin:/home/hathach/.espressif/tools/riscv32-esp-elf/esp-2021r2-patch5-8.4.0/riscv32-esp-elf/bin:/home/hathach/.espressif/tools/esp32ulp-elf/2.35_20220830/esp32ulp-elf/bin:/home/hathach/.espressif/tools/openocd-esp32/v0.11.0-esp32-20221026/openocd-esp32/bin:/home/hathach/.espressif/python_env/idf4.4_py3.10_env/bin:/home/hathach/code/esp-idf/tools:/home/hathach/app/riscv-openocd-wch/src:/home/hathach/app/arm-gnu-toolchain-12.2.rel1-x86_64-arm-none-eabi/bin:/home/hathach/.local/bin:/home/hathach/bin:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games:/snap/bin:/snap/bin:/opt/SEGGER/JLink:/home/hathach/app/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf/bin:/home/hathach/.local/xPacks/@xpack-dev-tools/riscv-none-embed-gcc/10.2.0-1.2.1/.content/bin:/home/hathach/.local/xPacks/@xpack-dev-tools/openocd/*/.content/bin:/home/hathach/ti/msp430-gcc/bin:/home/hathach/ti/MSPFlasher_1.3.20:/home/hathach/ti/uniflash_7.0.0:/home/hathach/app/gcc_8.3.0.202102_gnurx-elf/bin:/home/hathach/app/RFP_CLI_Linux_V31101_x64/linux-x64:/home/hathach/app/fomu-toolchain-linux_x86_64-v1.5.5/bin:/home/hathach/app/nuclei_riscv_newlibc_prebuilt_linux64_2020.08/gcc/bin:/home/hathach/app/riscv32-embecosm-ubuntu2004-gcc11.1.0/bin:/home/hathach/app/cov-analysis-linux64-2019.03/bin:/opt/iarsystems/bxarm/arm/bin:/home/hathach/.local/bin" />
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
@@ -53,7 +54,7 @@
       <configuration PROFILE_NAME="ra6m5 PORT0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1 -DPORT=0" />
       <configuration PROFILE_NAME="uno_r4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=uno_r4 -DLOG=4 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="portenta_c33" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=portenta_c33 -DLOG=3" />
-      <configuration PROFILE_NAME="metro_m4_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m4_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
+      <configuration PROFILE_NAME="metro_m4_express" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m4_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
       <configuration PROFILE_NAME="metro_m0_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m0_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
     </configurations>
   </component>
diff --git a/examples/device/cdc_msc_freertos/Makefile b/examples/device/cdc_msc_freertos/Makefile
index 0bee668b7..3ac62a79c 100644
--- a/examples/device/cdc_msc_freertos/Makefile
+++ b/examples/device/cdc_msc_freertos/Makefile
@@ -10,7 +10,7 @@ INC += \
 	src/FreeRTOSConfig \
 	$(TOP)/hw \
 	$(TOP)/$(FREERTOS_SRC)/include \
-	$(TOP)/$(FREERTOS_PORTABLE_SRC)
+	$(TOP)/$(FREERTOS_PORTABLE_SRC) \
 
 # Example source
 EXAMPLE_SOURCE = \
diff --git a/examples/device/cdc_msc_freertos/src/main.c b/examples/device/cdc_msc_freertos/src/main.c
index 0b115a595..1dadc4513 100644
--- a/examples/device/cdc_msc_freertos/src/main.c
+++ b/examples/device/cdc_msc_freertos/src/main.c
@@ -41,6 +41,7 @@
 
   #define USBD_STACK_SIZE     4096
 #else
+
   #include "FreeRTOS.h"
   #include "semphr.h"
   #include "queue.h"
@@ -54,7 +55,7 @@
 #define CDC_STACK_SZIE      configMINIMAL_STACK_SIZE
 
 //--------------------------------------------------------------------+
-// MACRO CONSTANT TYPEDEF PROTYPES
+// MACRO CONSTANT TYPEDEF PROTOTYPES
 //--------------------------------------------------------------------+
 
 /* Blink pattern
@@ -62,7 +63,7 @@
  * - 1000 ms : device mounted
  * - 2500 ms : device is suspended
  */
-enum  {
+enum {
   BLINK_NOT_MOUNTED = 250,
   BLINK_MOUNTED = 1000,
   BLINK_SUSPENDED = 2500,
@@ -81,16 +82,15 @@ StaticTask_t cdc_taskdef;
 
 TimerHandle_t blinky_tm;
 
-void led_blinky_cb(TimerHandle_t xTimer);
-void usb_device_task(void* param);
-void cdc_task(void* params);
+static void led_blinky_cb(TimerHandle_t xTimer);
+static void usb_device_task(void *param);
+void cdc_task(void *params);
 
 //--------------------------------------------------------------------+
 // Main
 //--------------------------------------------------------------------+
 
-int main(void)
-{
+int main(void) {
   board_init();
 
 #if configSUPPORT_STATIC_ALLOCATION
@@ -104,8 +104,8 @@ int main(void)
   xTaskCreateStatic(cdc_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, cdc_stack, &cdc_taskdef);
 #else
   blinky_tm = xTimerCreate(NULL, pdMS_TO_TICKS(BLINK_NOT_MOUNTED), true, NULL, led_blinky_cb);
-  xTaskCreate( usb_device_task, "usbd", USBD_STACK_SIZE, NULL, configMAX_PRIORITIES-1, NULL);
-  xTaskCreate( cdc_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, NULL);
+  xTaskCreate(usb_device_task, "usbd", USBD_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL);
+  xTaskCreate(cdc_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES - 2, NULL);
 #endif
 
   xTimerStart(blinky_tm, 0);
@@ -119,16 +119,14 @@ int main(void)
 }
 
 #if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
-void app_main(void)
-{
+void app_main(void) {
   main();
 }
 #endif
 
 // USB Device Driver task
 // This top level thread process all usb events and invoke callbacks
-void usb_device_task(void* param)
-{
+static void usb_device_task(void *param) {
   (void) param;
 
   // init device stack on configured roothub port
@@ -141,8 +139,7 @@ void usb_device_task(void* param)
   }
 
   // RTOS forever loop
-  while (1)
-  {
+  while (1) {
     // put this thread to waiting state until there is new events
     tud_task();
 
@@ -156,35 +153,28 @@ void usb_device_task(void* param)
 //--------------------------------------------------------------------+
 
 // Invoked when device is mounted
-void tud_mount_cb(void)
-{
+void tud_mount_cb(void) {
   xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_MOUNTED), 0);
 }
 
 // Invoked when device is unmounted
-void tud_umount_cb(void)
-{
+void tud_umount_cb(void) {
   xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_NOT_MOUNTED), 0);
 }
 
 // Invoked when usb bus is suspended
 // remote_wakeup_en : if host allow us  to perform remote wakeup
 // Within 7ms, device must draw an average of current less than 2.5 mA from bus
-void tud_suspend_cb(bool remote_wakeup_en)
-{
+void tud_suspend_cb(bool remote_wakeup_en) {
   (void) remote_wakeup_en;
   xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_SUSPENDED), 0);
 }
 
 // Invoked when usb bus is resumed
-void tud_resume_cb(void)
-{
-  if (tud_mounted())
-  {
+void tud_resume_cb(void) {
+  if (tud_mounted()) {
     xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_MOUNTED), 0);
-  }
-  else
-  {
+  } else {
     xTimerChangePeriod(blinky_tm, pdMS_TO_TICKS(BLINK_NOT_MOUNTED), 0);
   }
 }
@@ -192,20 +182,17 @@ void tud_resume_cb(void)
 //--------------------------------------------------------------------+
 // USB CDC
 //--------------------------------------------------------------------+
-void cdc_task(void* params)
-{
+void cdc_task(void *params) {
   (void) params;
 
   // RTOS forever loop
-  while ( 1 )
-  {
+  while (1) {
     // connected() check for DTR bit
     // Most but not all terminal client set this when making connection
     // if ( tud_cdc_connected() )
     {
       // There are data available
-      while ( tud_cdc_available() )
-      {
+      while (tud_cdc_available()) {
         uint8_t buf[64];
 
         // read and echo back
@@ -228,32 +215,27 @@ void cdc_task(void* params)
 }
 
 // Invoked when cdc when line state changed e.g connected/disconnected
-void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts)
-{
+void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts) {
   (void) itf;
   (void) rts;
 
   // TODO set some indicator
-  if ( dtr )
-  {
+  if (dtr) {
     // Terminal connected
-  }else
-  {
+  } else {
     // Terminal disconnected
   }
 }
 
 // Invoked when CDC interface received data from host
-void tud_cdc_rx_cb(uint8_t itf)
-{
+void tud_cdc_rx_cb(uint8_t itf) {
   (void) itf;
 }
 
 //--------------------------------------------------------------------+
 // BLINKING TASK
 //--------------------------------------------------------------------+
-void led_blinky_cb(TimerHandle_t xTimer)
-{
+static void led_blinky_cb(TimerHandle_t xTimer) {
   (void) xTimer;
   static bool led_state = false;
 
diff --git a/examples/host/bare_api/CMakeLists.txt b/examples/host/bare_api/CMakeLists.txt
index 05398b079..76182d6fa 100644
--- a/examples/host/bare_api/CMakeLists.txt
+++ b/examples/host/bare_api/CMakeLists.txt
@@ -10,6 +10,11 @@ project(${PROJECT} C CXX ASM)
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
 add_executable(${PROJECT})
 
 # Example source
diff --git a/examples/host/cdc_msc_hid/CMakeLists.txt b/examples/host/cdc_msc_hid/CMakeLists.txt
index ad5751705..a7c372a34 100644
--- a/examples/host/cdc_msc_hid/CMakeLists.txt
+++ b/examples/host/cdc_msc_hid/CMakeLists.txt
@@ -10,6 +10,11 @@ project(${PROJECT} C CXX ASM)
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
 add_executable(${PROJECT})
 
 # Example source
diff --git a/examples/host/cdc_msc_hid_freertos/CMakeLists.txt b/examples/host/cdc_msc_hid_freertos/CMakeLists.txt
new file mode 100644
index 000000000..2e95a18e0
--- /dev/null
+++ b/examples/host/cdc_msc_hid_freertos/CMakeLists.txt
@@ -0,0 +1,36 @@
+cmake_minimum_required(VERSION 3.17)
+
+include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
+
+# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
+family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
+
+project(${PROJECT} C CXX ASM)
+
+# Checks this example is valid for the family and initializes the project
+family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
+add_executable(${PROJECT})
+
+# Example source
+target_sources(${PROJECT} PUBLIC
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/cdc_app.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/freertos_hook.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/hid_app.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_app.c
+  )
+
+# Example include
+target_include_directories(${PROJECT} PUBLIC
+  ${CMAKE_CURRENT_SOURCE_DIR}/src
+  )
+
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_host_example(${PROJECT} freertos)
diff --git a/examples/host/cdc_msc_hid_freertos/src/CMakeLists.txt b/examples/host/cdc_msc_hid_freertos/src/CMakeLists.txt
new file mode 100644
index 000000000..dd7ec8e58
--- /dev/null
+++ b/examples/host/cdc_msc_hid_freertos/src/CMakeLists.txt
@@ -0,0 +1,4 @@
+# This file is for ESP-IDF only
+idf_component_register(SRCS "hid_app.c" "main.c"
+                    INCLUDE_DIRS "."
+                    REQUIRES boards tinyusb_src)
diff --git a/examples/host/cdc_msc_hid_freertos/src/main.c b/examples/host/cdc_msc_hid_freertos/src/main.c
new file mode 100644
index 000000000..e2ddd52eb
--- /dev/null
+++ b/examples/host/cdc_msc_hid_freertos/src/main.c
@@ -0,0 +1,170 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+
+#include "bsp/board_api.h"
+#include "tusb.h"
+
+#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
+  // ESP-IDF need "freertos/" prefix in include path.
+  // CFG_TUSB_OS_INC_PATH should be defined accordingly.
+  #include "freertos/FreeRTOS.h"
+  #include "freertos/semphr.h"
+  #include "freertos/queue.h"
+  #include "freertos/task.h"
+  #include "freertos/timers.h"
+
+  #define USBH_STACK_SIZE     4096
+#else
+  #include "FreeRTOS.h"
+  #include "semphr.h"
+  #include "queue.h"
+  #include "task.h"
+  #include "timers.h"
+
+  // Increase stack size when debug log is enabled
+  #define USBH_STACK_SIZE    (3*configMINIMAL_STACK_SIZE/2) * (CFG_TUSB_DEBUG ? 2 : 1)
+#endif
+
+//--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF PROTOTYPES
+//--------------------------------------------------------------------+
+/* Blink pattern
+ * - 250 ms  : device not mounted
+ * - 1000 ms : device mounted
+ * - 2500 ms : device is suspended
+ */
+enum  {
+  BLINK_NOT_MOUNTED = 250,
+  BLINK_MOUNTED = 1000,
+  BLINK_SUSPENDED = 2500,
+};
+
+// static timer & task
+#if configSUPPORT_STATIC_ALLOCATION
+StaticTimer_t blinky_tmdef;
+
+StackType_t  usb_host_stack[USBH_STACK_SIZE];
+StaticTask_t usb_host_taskdef;
+
+//StackType_t  cdc_stack[CDC_STACK_SZIE];
+//StaticTask_t cdc_taskdef;
+#endif
+
+
+TimerHandle_t blinky_tm;
+
+static void led_blinky_cb(TimerHandle_t xTimer);
+static void usb_host_task(void* param);
+
+extern void cdc_app_task(void);
+extern void hid_app_task(void);
+
+/*------------- MAIN -------------*/
+int main(void) {
+  board_init();
+
+  printf("TinyUSB Host CDC MSC HID with FreeRTOS Example\r\n");
+
+#if configSUPPORT_STATIC_ALLOCATION
+  // soft timer for blinky
+  blinky_tm = xTimerCreateStatic(NULL, pdMS_TO_TICKS(BLINK_MOUNTED), true, NULL, led_blinky_cb, &blinky_tmdef);
+
+  // Create a task for tinyusb device stack
+  xTaskCreateStatic(usb_host_task, "usbh", USBH_STACK_SIZE, NULL, configMAX_PRIORITIES-1, usb_host_stack, &usb_host_taskdef);
+
+  // Create CDC task
+  //xTaskCreateStatic(cdc_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, cdc_stack, &cdc_taskdef);
+#else
+  blinky_tm = xTimerCreate(NULL, pdMS_TO_TICKS(BLINK_NOT_MOUNTED), true, NULL, led_blinky_cb);
+  xTaskCreate( usb_device_task, "usbd", USBH_STACK_SIZE, NULL, configMAX_PRIORITIES-1, NULL);
+  //xTaskCreate( cdc_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, NULL);
+#endif
+
+  xTimerStart(blinky_tm, 0);
+
+  // skip starting scheduler (and return) for ESP32-S2 or ESP32-S3
+#if !TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
+  vTaskStartScheduler();
+#endif
+
+  return 0;
+}
+
+#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
+void app_main(void) {
+  main();
+}
+#endif
+
+// USB Host task
+// This top level thread process all usb events and invoke callbacks
+static void usb_host_task(void *param) {
+  (void) param;
+
+  // init host stack on configured roothub port
+  tuh_init(BOARD_TUH_RHPORT);
+
+  if (board_init_after_tusb) {
+    board_init_after_tusb();
+  }
+
+  // RTOS forever loop
+  while (1) {
+    // put this thread to waiting state until there is new events
+    tuh_task();
+
+    // following code only run if tuh_task() process at least 1 event
+  }
+}
+
+//--------------------------------------------------------------------+
+// TinyUSB Callbacks
+//--------------------------------------------------------------------+
+
+void tuh_mount_cb(uint8_t dev_addr) {
+  // application set-up
+  printf("A device with address %d is mounted\r\n", dev_addr);
+}
+
+void tuh_umount_cb(uint8_t dev_addr) {
+  // application tear-down
+  printf("A device with address %d is unmounted \r\n", dev_addr);
+}
+
+
+//--------------------------------------------------------------------+
+// BLINKING TASK
+//--------------------------------------------------------------------+
+static void led_blinky_cb(TimerHandle_t xTimer) {
+  (void) xTimer;
+  static bool led_state = false;
+
+  board_led_write(led_state);
+  led_state = 1 - led_state; // toggle
+}
diff --git a/examples/host/cdc_msc_hid_freertos/src/tusb_config.h b/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
new file mode 100644
index 000000000..1bed9a9b3
--- /dev/null
+++ b/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
@@ -0,0 +1,133 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#ifndef _TUSB_CONFIG_H_
+#define _TUSB_CONFIG_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Board Specific Configuration
+//--------------------------------------------------------------------+
+
+#if CFG_TUSB_MCU == OPT_MCU_RP2040
+  // change to 1 if using pico-pio-usb as host controller for raspberry rp2040
+  #define CFG_TUH_RPI_PIO_USB   0
+  #define BOARD_TUH_RHPORT      CFG_TUH_RPI_PIO_USB
+#endif
+
+// RHPort number used for host can be defined by board.mk, default to port 0
+#ifndef BOARD_TUH_RHPORT
+#define BOARD_TUH_RHPORT      0
+#endif
+
+// RHPort max operational speed can defined by board.mk
+#ifndef BOARD_TUH_MAX_SPEED
+#define BOARD_TUH_MAX_SPEED   OPT_MODE_DEFAULT_SPEED
+#endif
+
+//--------------------------------------------------------------------
+// COMMON CONFIGURATION
+//--------------------------------------------------------------------
+
+// defined by compiler flags for flexibility
+#ifndef CFG_TUSB_MCU
+#error CFG_TUSB_MCU must be defined
+#endif
+
+#ifndef CFG_TUSB_OS
+#define CFG_TUSB_OS           OPT_OS_FREERTOS
+#endif
+
+// Espressif IDF requires "freertos/" prefix in include path
+#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
+#define CFG_TUSB_OS_INC_PATH  freertos/
+#endif
+
+#ifndef CFG_TUSB_DEBUG
+#define CFG_TUSB_DEBUG        0
+#endif
+
+// Enable Host stack
+#define CFG_TUH_ENABLED       1
+
+// Default is max speed that hardware controller could support with on-chip PHY
+#define CFG_TUH_MAX_SPEED     BOARD_TUH_MAX_SPEED
+
+/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
+ * Tinyusb use follows macros to declare transferring memory so that they can be put
+ * into those specific section.
+ * e.g
+ * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") ))
+ * - CFG_TUSB_MEM_ALIGN   : __attribute__ ((aligned(4)))
+ */
+#ifndef CFG_TUH_MEM_SECTION
+#define CFG_TUH_MEM_SECTION
+#endif
+
+#ifndef CFG_TUH_MEM_ALIGN
+#define CFG_TUH_MEM_ALIGN        __attribute__ ((aligned(4)))
+#endif
+
+//--------------------------------------------------------------------
+// CONFIGURATION
+//--------------------------------------------------------------------
+
+// Size of buffer to hold descriptors and other data used for enumeration
+#define CFG_TUH_ENUMERATION_BUFSIZE 256
+
+#define CFG_TUH_HUB                 1 // number of supported hubs
+#define CFG_TUH_CDC                 1 // CDC ACM
+#define CFG_TUH_CDC_FTDI            1 // FTDI Serial.  FTDI is not part of CDC class, only to re-use CDC driver API
+#define CFG_TUH_CDC_CP210X          1 // CP210x Serial. CP210X is not part of CDC class, only to re-use CDC driver API
+#define CFG_TUH_HID                 (3*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces
+#define CFG_TUH_MSC                 1
+#define CFG_TUH_VENDOR              0
+
+// max device support (excluding hub device): 1 hub typically has 4 ports
+#define CFG_TUH_DEVICE_MAX          (3*CFG_TUH_HUB + 1)
+
+//------------- HID -------------//
+#define CFG_TUH_HID_EPIN_BUFSIZE    64
+#define CFG_TUH_HID_EPOUT_BUFSIZE   64
+
+//------------- CDC -------------//
+
+// Set Line Control state on enumeration/mounted:
+// DTR ( bit 0), RTS (bit 1)
+#define CFG_TUH_CDC_LINE_CONTROL_ON_ENUM    0x03
+
+// Set Line Coding on enumeration/mounted, value for cdc_line_coding_t
+// bit rate = 115200, 1 stop bit, no parity, 8 bit data width
+#define CFG_TUH_CDC_LINE_CODING_ON_ENUM   { 115200, CDC_LINE_CONDING_STOP_BITS_1, CDC_LINE_CODING_PARITY_NONE, 8 }
+
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_CONFIG_H_ */
diff --git a/examples/host/hid_controller/CMakeLists.txt b/examples/host/hid_controller/CMakeLists.txt
index 3fb630aaa..c1b500dd8 100644
--- a/examples/host/hid_controller/CMakeLists.txt
+++ b/examples/host/hid_controller/CMakeLists.txt
@@ -10,6 +10,11 @@ project(${PROJECT} C CXX ASM)
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
 add_executable(${PROJECT})
 
 # Example source
diff --git a/examples/host/msc_file_explorer/CMakeLists.txt b/examples/host/msc_file_explorer/CMakeLists.txt
index 1868b632e..1a57c7466 100644
--- a/examples/host/msc_file_explorer/CMakeLists.txt
+++ b/examples/host/msc_file_explorer/CMakeLists.txt
@@ -10,6 +10,11 @@ project(${PROJECT} C CXX ASM)
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
 add_executable(${PROJECT})
 
 # Example source
diff --git a/examples/make.mk b/examples/make.mk
index 8fe4a3486..448d7883d 100644
--- a/examples/make.mk
+++ b/examples/make.mk
@@ -26,9 +26,6 @@ ifeq '$(findstring ;,$(PATH))' ';'
 CMDEXE := 1
 
 # makefile shell commands should use syntax for DOS CMD, not unix sh
-# Unfortunately, SHELL may point to sh or bash, which can't accept DOS syntax.
-# We can't just use sh, because while sh and/or bash shell may be available,
-# many Windows environments won't have utilities like realpath used below, so...
 # Force DOS command shell on Windows.
 SHELL := cmd.exe
 endif
diff --git a/hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.h b/hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.h
index 2ec80ef47..44ff11aa0 100644
--- a/hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.h
+++ b/hw/bsp/espressif/boards/adafruit_metro_esp32s2/board.h
@@ -36,6 +36,14 @@
 #define BUTTON_PIN            0
 #define BUTTON_STATE_ACTIVE   0
 
+// SPI for USB host shield
+#define MAX3421_SPI_HOST  SPI2_HOST
+#define MAX3421_SCK_PIN  36
+#define MAX3421_MOSI_PIN 35
+#define MAX3421_MISO_PIN 37
+#define MAX3421_CS_PIN   15
+#define MAX3421_INTR_PIN 14
+
 #ifdef __cplusplus
  }
 #endif
diff --git a/hw/bsp/espressif/boards/espressif_kaluga_1/board.h b/hw/bsp/espressif/boards/espressif_kaluga_1/board.h
index 0acb9c439..613e6ae0c 100644
--- a/hw/bsp/espressif/boards/espressif_kaluga_1/board.h
+++ b/hw/bsp/espressif/boards/espressif_kaluga_1/board.h
@@ -37,6 +37,14 @@
 #define BUTTON_PIN            0
 #define BUTTON_STATE_ACTIVE   0
 
+// SPI for USB host shield
+#define MAX3421_SPI_HOST  SPI2_HOST
+#define MAX3421_SCK_PIN  36
+#define MAX3421_MOSI_PIN 35
+#define MAX3421_MISO_PIN 37
+#define MAX3421_CS_PIN   15
+#define MAX3421_INTR_PIN 14
+
 #ifdef __cplusplus
  }
 #endif
diff --git a/hw/bsp/espressif/boards/espressif_s2_devkitc/board.cmake b/hw/bsp/espressif/boards/espressif_s2_devkitc/board.cmake
new file mode 100644
index 000000000..abbdf7abc
--- /dev/null
+++ b/hw/bsp/espressif/boards/espressif_s2_devkitc/board.cmake
@@ -0,0 +1,2 @@
+# Apply board specific content here
+set(IDF_TARGET "esp32s2")
diff --git a/hw/bsp/espressif/boards/espressif_s2_devkitc/board.h b/hw/bsp/espressif/boards/espressif_s2_devkitc/board.h
new file mode 100644
index 000000000..e068efef9
--- /dev/null
+++ b/hw/bsp/espressif/boards/espressif_s2_devkitc/board.h
@@ -0,0 +1,45 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// Note: On the production version (v1.2) WS2812 is connected to GPIO 18,
+// however earlier revision v1.1 WS2812 is connected to GPIO 17
+#define NEOPIXEL_PIN          18
+
+#define BUTTON_PIN            0
+#define BUTTON_STATE_ACTIVE   0
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/espressif/boards/family.c b/hw/bsp/espressif/boards/family.c
index 8f857fb71..250b7001e 100644
--- a/hw/bsp/espressif/boards/family.c
+++ b/hw/bsp/espressif/boards/family.c
@@ -45,16 +45,19 @@
 static led_strip_t *strip;
 #endif
 
-//--------------------------------------------------------------------+
-// MACRO TYPEDEF CONSTANT ENUM DECLARATION
-//--------------------------------------------------------------------+
+#if CFG_TUH_ENABLED && CFG_TUH_MAX3421
+#include "driver/spi_master.h"
+static void max3421_init(void);
+#endif
 
 static void configure_pins(usb_hal_context_t *usb);
 
-// Initialize on-board peripherals : led, button, uart and USB
-void board_init(void)
-{
+//--------------------------------------------------------------------+
+// Implementation
+//--------------------------------------------------------------------+
 
+// Initialize on-board peripherals : led, button, uart and USB
+void board_init(void) {
 #ifdef NEOPIXEL_PIN
   #ifdef NEOPIXEL_POWER_PIN
   gpio_reset_pin(NEOPIXEL_POWER_PIN);
@@ -79,23 +82,27 @@ void board_init(void)
   gpio_set_direction(BUTTON_PIN, GPIO_MODE_INPUT);
   gpio_set_pull_mode(BUTTON_PIN, BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN_ONLY : GPIO_PULLUP_ONLY);
 
+#if CFG_TUD_ENABLED
   // USB Controller Hal init
   periph_module_reset(PERIPH_USB_MODULE);
   periph_module_enable(PERIPH_USB_MODULE);
 
   usb_hal_context_t hal = {
-    .use_external_phy = false // use built-in PHY
+      .use_external_phy = false // use built-in PHY
   };
   usb_hal_init(&hal);
   configure_pins(&hal);
+#endif
+
+#if CFG_TUH_ENABLED && CFG_TUH_MAX3421
+  max3421_init();
+#endif
 }
 
-static void configure_pins(usb_hal_context_t *usb)
-{
+static void configure_pins(usb_hal_context_t *usb) {
   /* usb_periph_iopins currently configures USB_OTG as USB Device.
    * Introduce additional parameters in usb_hal_context_t when adding support
-   * for USB Host.
-   */
+   * for USB Host. */
   for (const usb_iopin_dsc_t *iopin = usb_periph_iopins; iopin->pin != -1; ++iopin) {
     if ((usb->use_external_phy) || (iopin->ext_phy_only == 0)) {
       esp_rom_gpio_pad_select_gpio(iopin->pin);
@@ -115,6 +122,7 @@ static void configure_pins(usb_hal_context_t *usb)
       esp_rom_gpio_pad_unhold(iopin->pin);
     }
   }
+
   if (!usb->use_external_phy) {
     gpio_set_drive_capability(USBPHY_DM_NUM, GPIO_DRIVE_CAP_3);
     gpio_set_drive_capability(USBPHY_DP_NUM, GPIO_DRIVE_CAP_3);
@@ -122,8 +130,7 @@ static void configure_pins(usb_hal_context_t *usb)
 }
 
 // Turn LED on or off
-void board_led_write(bool state)
-{
+void board_led_write(bool state) {
 #ifdef NEOPIXEL_PIN
   strip->set_pixel(strip, 0, (state ? 0x88 : 0x00), 0x00, 0x00);
   strip->refresh(strip, 100);
@@ -132,21 +139,102 @@ void board_led_write(bool state)
 
 // Get the current state of button
 // a '1' means active (pressed), a '0' means inactive.
-uint32_t board_button_read(void)
-{
+uint32_t board_button_read(void) {
   return gpio_get_level(BUTTON_PIN) == BUTTON_STATE_ACTIVE;
 }
 
 // Get characters from UART
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
+int board_uart_read(uint8_t *buf, int len) {
+  (void) buf;
+  (void) len;
   return 0;
 }
 
 // Send characters to UART
-int board_uart_write(void const * buf, int len)
-{
-  (void) buf; (void) len;
+int board_uart_write(void const *buf, int len) {
+  (void) buf;
+  (void) len;
   return 0;
 }
+
+//--------------------------------------------------------------------+
+// API: SPI transfer with MAX3421E, must be implemented by application
+//--------------------------------------------------------------------+
+#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
+
+static spi_device_handle_t max3421_spi;
+
+static void IRAM_ATTR max3421_isr_handler(void* arg)
+{
+  (void) arg;
+  //uint32_t gpio_num = (uint32_t) arg;
+  //xQueueSendFromISR(gpio_evt_queue, &gpio_num, NULL);
+  tuh_int_handler(1);
+}
+
+static void max3421_init(void) {
+  // CS pin
+  gpio_set_direction(MAX3421_CS_PIN, GPIO_MODE_OUTPUT);
+  gpio_set_level(MAX3421_CS_PIN, 1);
+
+  // SPI
+  spi_bus_config_t buscfg={
+      .miso_io_num = MAX3421_MISO_PIN,
+      .mosi_io_num = MAX3421_MOSI_PIN,
+      .sclk_io_num = MAX3421_SCK_PIN,
+      .quadwp_io_num = -1,
+      .quadhd_io_num = -1,
+      .data4_io_num = -1,
+      .data5_io_num = -1,
+      .data6_io_num = -1,
+      .data7_io_num = -1,
+      .max_transfer_sz = 128
+  };
+  ESP_ERROR_CHECK( spi_bus_initialize(MAX3421_SPI_HOST, &buscfg, SPI_DMA_CH_AUTO) );
+
+  spi_device_interface_config_t max3421_cfg = {
+      .command_bits = 8,
+      .mode = 0,
+      .clock_speed_hz = 4000000, // 26000000
+      .spics_io_num = -1, // manual control CS
+      .queue_size = 1
+  };
+  ESP_ERROR_CHECK( spi_bus_add_device(MAX3421_SPI_HOST, &max3421_cfg, &max3421_spi) );
+
+  // Interrupt pin
+//  gpio_set_direction(MAX3421_INTR_PIN, GPIO_MODE_INPUT);
+//  gpio_set_intr_type(MAX3421_INTR_PIN, GPIO_INTR_NEGEDGE);
+//
+//  gpio_install_isr_service(ESP_INTR_FLAG_EDGE);
+//  gpio_isr_handler_add(MAX3421_INTR_PIN, max3421_isr_handler, NULL);
+}
+
+void tuh_max3421_int_api(uint8_t rhport, bool enabled) {
+  (void) rhport;
+  if (enabled) {
+    gpio_intr_enable(MAX3421_INTR_PIN);
+  } else {
+    gpio_intr_disable(MAX3421_INTR_PIN);
+  }
+}
+
+void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
+  (void) rhport;
+  gpio_set_level(MAX3421_CS_PIN, active ? 0 : 1);
+}
+
+bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_len, uint8_t *rx_buf, size_t rx_len) {
+  (void) rhport;
+
+  spi_transaction_t xact = {
+      .length = tx_len,
+      .rxlength = rx_len,
+      .tx_buffer = tx_buf,
+      .rx_buffer = rx_buf
+  };
+
+  ESP_ERROR_CHECK(spi_device_transmit(max3421_spi, &xact));
+  return true;
+}
+
+#endif
diff --git a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
index bf8e45be2..2a154a8ff 100644
--- a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
+++ b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
@@ -16,40 +16,57 @@ else()
   return()
 endif()
 
-list(APPEND compile_options
-    "-DCFG_TUSB_MCU=${tusb_mcu}"
-    "-DCFG_TUSB_OS=OPT_OS_FREERTOS"
-    #"-DCFG_TUSB_DEBUG=1"
-    )
-
-idf_component_get_property(freertos_component_dir freertos COMPONENT_DIR)
-
-list(APPEND includes_public
-    "${tusb_src}"
-    # The FreeRTOS API include convention in tinyusb is different from esp-idf
-    #"${freertos_component_dir}/include/freertos"
-    )
+list(APPEND compile_definitions
+  CFG_TUSB_MCU=${tusb_mcu}
+  CFG_TUSB_OS=OPT_OS_FREERTOS
+  )
 
 list(APPEND srcs
-    "${tusb_src}/tusb.c"
-    "${tusb_src}/common/tusb_fifo.c"
-    "${tusb_src}/device/usbd.c"
-    "${tusb_src}/device/usbd_control.c"
-    "${tusb_src}/class/cdc/cdc_device.c"
-    "${tusb_src}/class/dfu/dfu_rt_device.c"
-    "${tusb_src}/class/hid/hid_device.c"
-    "${tusb_src}/class/midi/midi_device.c"
-    "${tusb_src}/class/msc/msc_device.c"
-    "${tusb_src}/class/net/ecm_rndis_device.c"
-    "${tusb_src}/class/net/ncm_device.c"
-    "${tusb_src}/class/usbtmc/usbtmc_device.c"
-    "${tusb_src}/class/vendor/vendor_device.c"
-    "${tusb_src}/portable/synopsys/dwc2/dcd_dwc2.c"
-    )
+  # common
+  ${tusb_src}/tusb.c
+  ${tusb_src}/common/tusb_fifo.c
+  # device
+  ${tusb_src}/device/usbd.c
+  ${tusb_src}/device/usbd_control.c
+  ${tusb_src}/class/audio/audio_device.c
+  ${tusb_src}/class/cdc/cdc_device.c
+  ${tusb_src}/class/dfu/dfu_device.c
+  ${tusb_src}/class/dfu/dfu_rt_device.c
+  ${tusb_src}/class/hid/hid_device.c
+  ${tusb_src}/class/midi/midi_device.c
+  ${tusb_src}/class/msc/msc_device.c
+  ${tusb_src}/class/net/ecm_rndis_device.c
+  ${tusb_src}/class/net/ncm_device.c
+  ${tusb_src}/class/usbtmc/usbtmc_device.c
+  ${tusb_src}/class/vendor/vendor_device.c
+  ${tusb_src}/class/video/video_device.c
+  ${tusb_src}/portable/synopsys/dwc2/dcd_dwc2.c
+  # host
+  ${tusb_src}/host/usbh.c
+  ${tusb_src}/host/hub.c
+  ${tusb_src}/class/cdc/cdc_host.c
+  ${tusb_src}/class/hid/hid_host.c
+  ${tusb_src}/class/msc/msc_host.c
+  ${tusb_src}/class/vendor/vendor_host.c
+  )
+
+# use max3421 as host controller
+if (MAX3421_HOST STREQUAL "1")
+  list(APPEND srcs ${tusb_src}/portable/analog/max3421/hcd_max3421.c)
+  list(APPEND compile_definitions CFG_TUH_MAX3421=1)
+endif ()
+
+if (DEFINED LOG)
+  list(APPEND compile_definitions CFG_TUSB_DEBUG=${LOG})
+  if (LOG STREQUAL "4")
+    # no inline for debug level 4
+    list(APPEND compile_definitions TU_ATTR_ALWAYS_INLINE=)
+  endif ()
+endif()
 
 idf_component_register(SRCS ${srcs}
-    INCLUDE_DIRS ${includes_public}
-    REQUIRES src
-    )
+  INCLUDE_DIRS ${tusb_src}
+  REQUIRES src
+  )
 
-target_compile_options(${COMPONENT_LIB} PUBLIC ${compile_options})
+target_compile_definitions(${COMPONENT_LIB} PUBLIC ${compile_definitions})
diff --git a/src/host/usbh.c b/src/host/usbh.c
index e332f35cc..dc2831da3 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -659,7 +659,7 @@ static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result
   tusb_control_request_t const * request = &_ctrl_xfer.request;
 
   if (XFER_RESULT_SUCCESS != result) {
-    TU_LOG1("[%u:%u] Control %s, xferred_bytes = %lu\r\n", rhport, dev_addr, result == XFER_RESULT_STALLED ? "STALLED" : "FAILED", xferred_bytes);
+    TU_LOG1("[%u:%u] Control %s, xferred_bytes = %u\r\n", rhport, dev_addr, result == XFER_RESULT_STALLED ? "STALLED" : "FAILED", xferred_bytes);
     TU_LOG1_BUF(request, 8);
     TU_LOG1("\r\n");
 
diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index f3f76fd58..3f6747404 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -882,7 +882,7 @@ void hcd_int_handler(uint8_t rhport) {
     if ( hirq & HIRQ_RCVDAV_IRQ ) {
       uint8_t const ep_num = _hcd_data.hxfr & HXFR_EPNUM_MASK;
       max3421_ep_t *ep = find_opened_ep(_hcd_data.peraddr, ep_num, 1);
-      uint8_t xact_len;
+      uint8_t xact_len = 0;
 
       // RCVDAV_IRQ can trigger 2 times (dual buffered)
       while ( hirq & HIRQ_RCVDAV_IRQ ) {

From f6ca86c3ddeaec18f52b15f1065a5c9eea210c00 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 26 Sep 2023 19:09:36 +0700
Subject: [PATCH 660/691] tested cdc_msc_hid_freertos with samd51

add -Wno-error=format for espressif
wrap up cdc_msc_hid_freertos
---
 examples/host/cdc_msc_hid_freertos/Makefile   |  32 +++
 examples/host/cdc_msc_hid_freertos/only.txt   |  13 +
 .../cdc_msc_hid_freertos/src/CMakeLists.txt   |   4 +-
 .../host/cdc_msc_hid_freertos/src/cdc_app.c   | 109 ++++++++
 .../cdc_msc_hid_freertos/src/freertos_hook.c  | 111 ++++++++
 .../host/cdc_msc_hid_freertos/src/hid_app.c   | 263 ++++++++++++++++++
 examples/host/cdc_msc_hid_freertos/src/main.c |  22 +-
 .../host/cdc_msc_hid_freertos/src/msc_app.c   |  67 +++++
 hw/bsp/espressif/boards/CMakeLists.txt        |   2 +
 hw/bsp/espressif/boards/family.c              |  39 +--
 .../components/tinyusb_src/CMakeLists.txt     |   1 +
 hw/bsp/nrf/family.c                           | 106 +++----
 hw/bsp/samd21/family.c                        |   9 +-
 hw/bsp/samd51/FreeRTOSConfig/FreeRTOSConfig.h |   2 +-
 hw/bsp/samd51/family.c                        |   8 +-
 src/host/usbh.c                               |   2 +-
 16 files changed, 703 insertions(+), 87 deletions(-)
 create mode 100644 examples/host/cdc_msc_hid_freertos/Makefile
 create mode 100644 examples/host/cdc_msc_hid_freertos/only.txt
 create mode 100644 examples/host/cdc_msc_hid_freertos/src/cdc_app.c
 create mode 100644 examples/host/cdc_msc_hid_freertos/src/freertos_hook.c
 create mode 100644 examples/host/cdc_msc_hid_freertos/src/hid_app.c
 create mode 100644 examples/host/cdc_msc_hid_freertos/src/msc_app.c

diff --git a/examples/host/cdc_msc_hid_freertos/Makefile b/examples/host/cdc_msc_hid_freertos/Makefile
new file mode 100644
index 000000000..67bb6da55
--- /dev/null
+++ b/examples/host/cdc_msc_hid_freertos/Makefile
@@ -0,0 +1,32 @@
+include ../../make.mk
+
+FREERTOS_SRC = lib/FreeRTOS-Kernel
+FREERTOS_PORTABLE_PATH= $(FREERTOS_SRC)/portable/$(if $(USE_IAR),IAR,GCC)
+
+INC += \
+	src \
+	$(TOP)/hw \
+	$(TOP)/$(FREERTOS_SRC)/include \
+	$(TOP)/$(FREERTOS_PORTABLE_SRC) \
+
+# Example source
+EXAMPLE_SOURCE = \
+  src/cdc_app.c \
+  src/freertos_hook.c \
+  src/hid_app.c \
+  src/main.c \
+  src/msc_app.c \
+
+SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+
+# TinyUSB Host Stack source
+SRC_C += \
+	src/class/cdc/cdc_host.c \
+	src/class/hid/hid_host.c \
+	src/class/msc/msc_host.c \
+	src/host/hub.c \
+	src/host/usbh.c \
+	src/portable/ohci/ohci.c \
+	src/portable/nxp/lpc17_40/hcd_lpc17_40.c
+
+include ../../rules.mk
diff --git a/examples/host/cdc_msc_hid_freertos/only.txt b/examples/host/cdc_msc_hid_freertos/only.txt
new file mode 100644
index 000000000..3837ac8a2
--- /dev/null
+++ b/examples/host/cdc_msc_hid_freertos/only.txt
@@ -0,0 +1,13 @@
+mcu:LPC175X_6X
+mcu:LPC177X_8X
+mcu:LPC18XX
+mcu:LPC40XX
+mcu:LPC43XX
+mcu:MIMXRT1XXX
+mcu:MIMXRT10XX
+mcu:MIMXRT11XX
+mcu:RP2040
+mcu:MSP432E4
+mcu:RX65X
+mcu:RAXXX
+mcu:MAX3421
diff --git a/examples/host/cdc_msc_hid_freertos/src/CMakeLists.txt b/examples/host/cdc_msc_hid_freertos/src/CMakeLists.txt
index dd7ec8e58..6f057c106 100644
--- a/examples/host/cdc_msc_hid_freertos/src/CMakeLists.txt
+++ b/examples/host/cdc_msc_hid_freertos/src/CMakeLists.txt
@@ -1,4 +1,6 @@
 # This file is for ESP-IDF only
-idf_component_register(SRCS "hid_app.c" "main.c"
+idf_component_register(SRCS "cdc_app.c" "hid_app.c" "main.c" "msc_app.c"
                     INCLUDE_DIRS "."
                     REQUIRES boards tinyusb_src)
+
+target_compile_options(${COMPONENT_LIB} PRIVATE -Wno-error=format)
diff --git a/examples/host/cdc_msc_hid_freertos/src/cdc_app.c b/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
new file mode 100644
index 000000000..fc2b1228d
--- /dev/null
+++ b/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
@@ -0,0 +1,109 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2022, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "tusb.h"
+#include "bsp/board_api.h"
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM DECLARATION
+//--------------------------------------------------------------------+
+
+
+//------------- IMPLEMENTATION -------------//
+
+size_t get_console_inputs(uint8_t *buf, size_t bufsize) {
+  size_t count = 0;
+  while (count < bufsize) {
+    int ch = board_getchar();
+    if (ch <= 0) break;
+
+    buf[count] = (uint8_t) ch;
+    count++;
+  }
+
+  return count;
+}
+
+void cdc_app_task(void* param) {
+  (void) param;
+
+  uint8_t buf[64 + 1]; // +1 for extra null character
+  uint32_t const bufsize = sizeof(buf) - 1;
+
+  while (1) {
+    uint32_t count = get_console_inputs(buf, bufsize);
+    buf[count] = 0;
+
+    if (count) {
+      // loop over all mounted interfaces
+      for (uint8_t idx = 0; idx < CFG_TUH_CDC; idx++) {
+        if (tuh_cdc_mounted(idx)) {
+          // console --> cdc interfaces
+          tuh_cdc_write(idx, buf, count);
+          tuh_cdc_write_flush(idx);
+        }
+      }
+    }
+
+    taskYIELD();
+  }
+}
+
+// Invoked when received new data
+void tuh_cdc_rx_cb(uint8_t idx) {
+  uint8_t buf[64 + 1]; // +1 for extra null character
+  uint32_t const bufsize = sizeof(buf) - 1;
+
+  // forward cdc interfaces -> console
+  uint32_t count = tuh_cdc_read(idx, buf, bufsize);
+  buf[count] = 0;
+
+  printf((char *) buf);
+}
+
+void tuh_cdc_mount_cb(uint8_t idx) {
+  tuh_itf_info_t itf_info = { 0 };
+  tuh_cdc_itf_get_info(idx, &itf_info);
+
+  printf("CDC Interface is mounted: address = %u, itf_num = %u\r\n", itf_info.daddr, itf_info.desc.bInterfaceNumber);
+
+#ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
+  // CFG_TUH_CDC_LINE_CODING_ON_ENUM must be defined for line coding is set by tinyusb in enumeration
+  // otherwise you need to call tuh_cdc_set_line_coding() first
+  cdc_line_coding_t line_coding = { 0 };
+  if (tuh_cdc_get_local_line_coding(idx, &line_coding)) {
+    printf("  Baudrate: %lu, Stop Bits : %u\r\n", line_coding.bit_rate, line_coding.stop_bits);
+    printf("  Parity  : %u, Data Width: %u\r\n", line_coding.parity, line_coding.data_bits);
+  }
+#endif
+}
+
+void tuh_cdc_umount_cb(uint8_t idx) {
+  tuh_itf_info_t itf_info = { 0 };
+  tuh_cdc_itf_get_info(idx, &itf_info);
+
+  printf("CDC Interface is unmounted: address = %u, itf_num = %u\r\n", itf_info.daddr, itf_info.desc.bInterfaceNumber);
+}
diff --git a/examples/host/cdc_msc_hid_freertos/src/freertos_hook.c b/examples/host/cdc_msc_hid_freertos/src/freertos_hook.c
new file mode 100644
index 000000000..07d159fd5
--- /dev/null
+++ b/examples/host/cdc_msc_hid_freertos/src/freertos_hook.c
@@ -0,0 +1,111 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+//--------------------------------------------------------------------+
+// INCLUDE
+//--------------------------------------------------------------------+
+#include "FreeRTOS.h"
+#include "task.h"
+#include "common/tusb_common.h"
+
+void vApplicationMallocFailedHook(void) {
+  taskDISABLE_INTERRUPTS();
+  TU_ASSERT(false,);
+}
+
+void vApplicationStackOverflowHook(xTaskHandle pxTask, char *pcTaskName) {
+  (void) pxTask;
+  (void) pcTaskName;
+
+  taskDISABLE_INTERRUPTS();
+  TU_ASSERT(false,);
+}
+
+/* configSUPPORT_STATIC_ALLOCATION is set to 1, so the application must provide an
+ * implementation of vApplicationGetIdleTaskMemory() to provide the memory that is
+ * used by the Idle task. */
+void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer,
+                                   uint32_t *pulIdleTaskStackSize) {
+  /* If the buffers to be provided to the Idle task are declared inside this
+   * function then they must be declared static - otherwise they will be allocated on
+   * the stack and so not exists after this function exits. */
+  static StaticTask_t xIdleTaskTCB;
+  static StackType_t uxIdleTaskStack[configMINIMAL_STACK_SIZE];
+
+  /* Pass out a pointer to the StaticTask_t structure in which the Idle task's
+    state will be stored. */
+  *ppxIdleTaskTCBBuffer = &xIdleTaskTCB;
+
+  /* Pass out the array that will be used as the Idle task's stack. */
+  *ppxIdleTaskStackBuffer = uxIdleTaskStack;
+
+  /* Pass out the size of the array pointed to by *ppxIdleTaskStackBuffer.
+    Note that, as the array is necessarily of type StackType_t,
+    configMINIMAL_STACK_SIZE is specified in words, not bytes. */
+  *pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
+}
+
+/* configSUPPORT_STATIC_ALLOCATION and configUSE_TIMERS are both set to 1, so the
+ * application must provide an implementation of vApplicationGetTimerTaskMemory()
+ * to provide the memory that is used by the Timer service task. */
+void vApplicationGetTimerTaskMemory(StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer,
+                                    uint32_t *pulTimerTaskStackSize) {
+  /* If the buffers to be provided to the Timer task are declared inside this
+   * function then they must be declared static - otherwise they will be allocated on
+   * the stack and so not exists after this function exits. */
+  static StaticTask_t xTimerTaskTCB;
+  static StackType_t uxTimerTaskStack[configTIMER_TASK_STACK_DEPTH];
+
+  /* Pass out a pointer to the StaticTask_t structure in which the Timer
+    task's state will be stored. */
+  *ppxTimerTaskTCBBuffer = &xTimerTaskTCB;
+
+  /* Pass out the array that will be used as the Timer task's stack. */
+  *ppxTimerTaskStackBuffer = uxTimerTaskStack;
+
+  /* Pass out the size of the array pointed to by *ppxTimerTaskStackBuffer.
+    Note that, as the array is necessarily of type StackType_t,
+    configTIMER_TASK_STACK_DEPTH is specified in words, not bytes. */
+  *pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH;
+}
+
+#if CFG_TUSB_MCU == OPT_MCU_RX63X | CFG_TUSB_MCU == OPT_MCU_RX65X
+#include "iodefine.h"
+void vApplicationSetupTimerInterrupt(void)
+{
+  /* Enable CMT0 */
+  SYSTEM.PRCR.WORD = (0xA5u<<8) | TU_BIT(1);
+  MSTP(CMT0)       = 0;
+  SYSTEM.PRCR.WORD = (0xA5u<<8);
+
+  CMT0.CMCNT      = 0;
+  CMT0.CMCOR      = (unsigned short)(((configPERIPHERAL_CLOCK_HZ/configTICK_RATE_HZ)-1)/128);
+  CMT0.CMCR.WORD  = TU_BIT(6) | 2;
+  IR(CMT0, CMI0)  = 0;
+  IPR(CMT0, CMI0) = configKERNEL_INTERRUPT_PRIORITY;
+  IEN(CMT0, CMI0) = 1;
+  CMT.CMSTR0.BIT.STR0 = 1;
+}
+#endif
diff --git a/examples/host/cdc_msc_hid_freertos/src/hid_app.c b/examples/host/cdc_msc_hid_freertos/src/hid_app.c
new file mode 100644
index 000000000..a2df3b909
--- /dev/null
+++ b/examples/host/cdc_msc_hid_freertos/src/hid_app.c
@@ -0,0 +1,263 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#include "bsp/board_api.h"
+#include "tusb.h"
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM DECLARATION
+//--------------------------------------------------------------------+
+
+// If your host terminal support ansi escape code such as TeraTerm
+// it can be use to simulate mouse cursor movement within terminal
+#define USE_ANSI_ESCAPE   0
+
+#define MAX_REPORT  4
+
+static uint8_t const keycode2ascii[128][2] = { HID_KEYCODE_TO_ASCII };
+
+// Each HID instance can has multiple reports
+static struct {
+  uint8_t report_count;
+  tuh_hid_report_info_t report_info[MAX_REPORT];
+} hid_info[CFG_TUH_HID];
+
+static void process_kbd_report(hid_keyboard_report_t const *report);
+static void process_mouse_report(hid_mouse_report_t const *report);
+static void process_generic_report(uint8_t dev_addr, uint8_t instance, uint8_t const *report, uint16_t len);
+
+//--------------------------------------------------------------------+
+// TinyUSB Callbacks
+//--------------------------------------------------------------------+
+
+// Invoked when device with hid interface is mounted
+// Report descriptor is also available for use. tuh_hid_parse_report_descriptor()
+// can be used to parse common/simple enough descriptor.
+// Note: if report descriptor length > CFG_TUH_ENUMERATION_BUFSIZE, it will be skipped
+// therefore report_desc = NULL, desc_len = 0
+void tuh_hid_mount_cb(uint8_t dev_addr, uint8_t instance, uint8_t const *desc_report, uint16_t desc_len) {
+  printf("HID device address = %d, instance = %d is mounted\r\n", dev_addr, instance);
+
+  // Interface protocol (hid_interface_protocol_enum_t)
+  const char *protocol_str[] = { "None", "Keyboard", "Mouse" };
+  uint8_t const itf_protocol = tuh_hid_interface_protocol(dev_addr, instance);
+
+  printf("HID Interface Protocol = %s\r\n", protocol_str[itf_protocol]);
+
+  // By default host stack will use activate boot protocol on supported interface.
+  // Therefore for this simple example, we only need to parse generic report descriptor (with built-in parser)
+  if (itf_protocol == HID_ITF_PROTOCOL_NONE) {
+    hid_info[instance].report_count = tuh_hid_parse_report_descriptor(hid_info[instance].report_info, MAX_REPORT,
+                                                                      desc_report, desc_len);
+    printf("HID has %u reports \r\n", hid_info[instance].report_count);
+  }
+
+  // request to receive report
+  // tuh_hid_report_received_cb() will be invoked when report is available
+  if (!tuh_hid_receive_report(dev_addr, instance)) {
+    printf("Error: cannot request to receive report\r\n");
+  }
+}
+
+// Invoked when device with hid interface is un-mounted
+void tuh_hid_umount_cb(uint8_t dev_addr, uint8_t instance) {
+  printf("HID device address = %d, instance = %d is unmounted\r\n", dev_addr, instance);
+}
+
+// Invoked when received report from device via interrupt endpoint
+void tuh_hid_report_received_cb(uint8_t dev_addr, uint8_t instance, uint8_t const *report, uint16_t len) {
+  uint8_t const itf_protocol = tuh_hid_interface_protocol(dev_addr, instance);
+
+  switch (itf_protocol) {
+    case HID_ITF_PROTOCOL_KEYBOARD:
+      TU_LOG2("HID receive boot keyboard report\r\n");
+      process_kbd_report((hid_keyboard_report_t const *) report);
+      break;
+
+    case HID_ITF_PROTOCOL_MOUSE:
+      TU_LOG2("HID receive boot mouse report\r\n");
+      process_mouse_report((hid_mouse_report_t const *) report);
+      break;
+
+    default:
+      // Generic report requires matching ReportID and contents with previous parsed report info
+      process_generic_report(dev_addr, instance, report, len);
+      break;
+  }
+
+  // continue to request to receive report
+  if (!tuh_hid_receive_report(dev_addr, instance)) {
+    printf("Error: cannot request to receive report\r\n");
+  }
+}
+
+//--------------------------------------------------------------------+
+// Keyboard
+//--------------------------------------------------------------------+
+
+// look up new key in previous keys
+static inline bool find_key_in_report(hid_keyboard_report_t const *report, uint8_t keycode) {
+  for (uint8_t i = 0; i < 6; i++) {
+    if (report->keycode[i] == keycode) return true;
+  }
+
+  return false;
+}
+
+static void process_kbd_report(hid_keyboard_report_t const *report) {
+  static hid_keyboard_report_t prev_report = { 0, 0, { 0 } }; // previous report to check key released
+
+  //------------- example code ignore control (non-printable) key affects -------------//
+  for (uint8_t i = 0; i < 6; i++) {
+    if (report->keycode[i]) {
+      if (find_key_in_report(&prev_report, report->keycode[i])) {
+        // exist in previous report means the current key is holding
+      } else {
+        // not existed in previous report means the current key is pressed
+        bool const is_shift = report->modifier & (KEYBOARD_MODIFIER_LEFTSHIFT | KEYBOARD_MODIFIER_RIGHTSHIFT);
+        uint8_t ch = keycode2ascii[report->keycode[i]][is_shift ? 1 : 0];
+        putchar(ch);
+        if (ch == '\r') putchar('\n'); // added new line for enter key
+
+        #ifndef __ICCARM__ // TODO IAR doesn't support stream control ?
+        fflush(stdout); // flush right away, else nanolib will wait for newline
+        #endif
+      }
+    }
+    // TODO example skips key released
+  }
+
+  prev_report = *report;
+}
+
+//--------------------------------------------------------------------+
+// Mouse
+//--------------------------------------------------------------------+
+
+void cursor_movement(int8_t x, int8_t y, int8_t wheel) {
+#if USE_ANSI_ESCAPE
+  // Move X using ansi escape
+  if ( x < 0) {
+    printf(ANSI_CURSOR_BACKWARD(%d), (-x)); // move left
+  }else if ( x > 0) {
+    printf(ANSI_CURSOR_FORWARD(%d), x); // move right
+  }
+
+  // Move Y using ansi escape
+  if ( y < 0) {
+    printf(ANSI_CURSOR_UP(%d), (-y)); // move up
+  }else if ( y > 0) {
+    printf(ANSI_CURSOR_DOWN(%d), y); // move down
+  }
+
+  // Scroll using ansi escape
+  if (wheel < 0) {
+    printf(ANSI_SCROLL_UP(%d), (-wheel)); // scroll up
+  }else if (wheel > 0) {
+    printf(ANSI_SCROLL_DOWN(%d), wheel); // scroll down
+  }
+
+  printf("\r\n");
+#else
+  printf("(%d %d %d)\r\n", x, y, wheel);
+#endif
+}
+
+static void process_mouse_report(hid_mouse_report_t const *report) {
+  static hid_mouse_report_t prev_report = { 0 };
+
+  //------------- button state  -------------//
+  uint8_t button_changed_mask = report->buttons ^ prev_report.buttons;
+  if (button_changed_mask & report->buttons) {
+    printf(" %c%c%c ",
+           report->buttons & MOUSE_BUTTON_LEFT ? 'L' : '-',
+           report->buttons & MOUSE_BUTTON_MIDDLE ? 'M' : '-',
+           report->buttons & MOUSE_BUTTON_RIGHT ? 'R' : '-');
+  }
+
+  //------------- cursor movement -------------//
+  cursor_movement(report->x, report->y, report->wheel);
+}
+
+//--------------------------------------------------------------------+
+// Generic Report
+//--------------------------------------------------------------------+
+static void process_generic_report(uint8_t dev_addr, uint8_t instance, uint8_t const *report, uint16_t len) {
+  (void) dev_addr;
+
+  uint8_t const rpt_count = hid_info[instance].report_count;
+  tuh_hid_report_info_t *rpt_info_arr = hid_info[instance].report_info;
+  tuh_hid_report_info_t *rpt_info = NULL;
+
+  if (rpt_count == 1 && rpt_info_arr[0].report_id == 0) {
+    // Simple report without report ID as 1st byte
+    rpt_info = &rpt_info_arr[0];
+  } else {
+    // Composite report, 1st byte is report ID, data starts from 2nd byte
+    uint8_t const rpt_id = report[0];
+
+    // Find report id in the array
+    for (uint8_t i = 0; i < rpt_count; i++) {
+      if (rpt_id == rpt_info_arr[i].report_id) {
+        rpt_info = &rpt_info_arr[i];
+        break;
+      }
+    }
+
+    report++;
+    len--;
+  }
+
+  if (!rpt_info) {
+    printf("Couldn't find report info !\r\n");
+    return;
+  }
+
+  // For complete list of Usage Page & Usage checkout src/class/hid/hid.h. For examples:
+  // - Keyboard                     : Desktop, Keyboard
+  // - Mouse                        : Desktop, Mouse
+  // - Gamepad                      : Desktop, Gamepad
+  // - Consumer Control (Media Key) : Consumer, Consumer Control
+  // - System Control (Power key)   : Desktop, System Control
+  // - Generic (vendor)             : 0xFFxx, xx
+  if (rpt_info->usage_page == HID_USAGE_PAGE_DESKTOP) {
+    switch (rpt_info->usage) {
+      case HID_USAGE_DESKTOP_KEYBOARD:
+        TU_LOG1("HID receive keyboard report\r\n");
+        // Assume keyboard follow boot report layout
+        process_kbd_report((hid_keyboard_report_t const *) report);
+        break;
+
+      case HID_USAGE_DESKTOP_MOUSE:
+        TU_LOG1("HID receive mouse report\r\n");
+        // Assume mouse follow boot report layout
+        process_mouse_report((hid_mouse_report_t const *) report);
+        break;
+
+      default:
+        break;
+    }
+  }
+}
diff --git a/examples/host/cdc_msc_hid_freertos/src/main.c b/examples/host/cdc_msc_hid_freertos/src/main.c
index e2ddd52eb..d5574789f 100644
--- a/examples/host/cdc_msc_hid_freertos/src/main.c
+++ b/examples/host/cdc_msc_hid_freertos/src/main.c
@@ -51,6 +51,8 @@
   #define USBH_STACK_SIZE    (3*configMINIMAL_STACK_SIZE/2) * (CFG_TUSB_DEBUG ? 2 : 1)
 #endif
 
+#define CDC_STACK_SZIE      (3*configMINIMAL_STACK_SIZE/2)
+
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF PROTOTYPES
 //--------------------------------------------------------------------+
@@ -72,18 +74,16 @@ StaticTimer_t blinky_tmdef;
 StackType_t  usb_host_stack[USBH_STACK_SIZE];
 StaticTask_t usb_host_taskdef;
 
-//StackType_t  cdc_stack[CDC_STACK_SZIE];
-//StaticTask_t cdc_taskdef;
+StackType_t  cdc_stack[CDC_STACK_SZIE];
+StaticTask_t cdc_taskdef;
 #endif
 
-
 TimerHandle_t blinky_tm;
 
 static void led_blinky_cb(TimerHandle_t xTimer);
 static void usb_host_task(void* param);
 
-extern void cdc_app_task(void);
-extern void hid_app_task(void);
+extern void cdc_app_task(void* param);
 
 /*------------- MAIN -------------*/
 int main(void) {
@@ -91,19 +91,15 @@ int main(void) {
 
   printf("TinyUSB Host CDC MSC HID with FreeRTOS Example\r\n");
 
+  // Create soft timer for blinky, task for tinyusb stack and CDC
 #if configSUPPORT_STATIC_ALLOCATION
-  // soft timer for blinky
   blinky_tm = xTimerCreateStatic(NULL, pdMS_TO_TICKS(BLINK_MOUNTED), true, NULL, led_blinky_cb, &blinky_tmdef);
-
-  // Create a task for tinyusb device stack
   xTaskCreateStatic(usb_host_task, "usbh", USBH_STACK_SIZE, NULL, configMAX_PRIORITIES-1, usb_host_stack, &usb_host_taskdef);
-
-  // Create CDC task
-  //xTaskCreateStatic(cdc_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, cdc_stack, &cdc_taskdef);
+  xTaskCreateStatic(cdc_app_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, cdc_stack, &cdc_taskdef);
 #else
   blinky_tm = xTimerCreate(NULL, pdMS_TO_TICKS(BLINK_NOT_MOUNTED), true, NULL, led_blinky_cb);
-  xTaskCreate( usb_device_task, "usbd", USBH_STACK_SIZE, NULL, configMAX_PRIORITIES-1, NULL);
-  //xTaskCreate( cdc_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, NULL);
+  xTaskCreate(usb_host_task, "usbd", USBH_STACK_SIZE, NULL, configMAX_PRIORITIES-1, NULL);
+  xTaskCreate(cdc_app_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, NULL);
 #endif
 
   xTimerStart(blinky_tm, 0);
diff --git a/examples/host/cdc_msc_hid_freertos/src/msc_app.c b/examples/host/cdc_msc_hid_freertos/src/msc_app.c
new file mode 100644
index 000000000..a8d6fbfaa
--- /dev/null
+++ b/examples/host/cdc_msc_hid_freertos/src/msc_app.c
@@ -0,0 +1,67 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#include "tusb.h"
+
+#if CFG_TUH_MSC
+
+static scsi_inquiry_resp_t inquiry_resp;
+
+bool inquiry_complete_cb(uint8_t dev_addr, tuh_msc_complete_data_t const *cb_data) {
+  msc_cbw_t const *cbw = cb_data->cbw;
+  msc_csw_t const *csw = cb_data->csw;
+
+  if (csw->status != 0) {
+    printf("Inquiry failed\r\n");
+    return false;
+  }
+
+  // Print out Vendor ID, Product ID and Rev
+  printf("%.8s %.16s rev %.4s\r\n", inquiry_resp.vendor_id, inquiry_resp.product_id, inquiry_resp.product_rev);
+
+  // Get capacity of device
+  uint32_t const block_count = tuh_msc_get_block_count(dev_addr, cbw->lun);
+  uint32_t const block_size = tuh_msc_get_block_size(dev_addr, cbw->lun);
+
+  printf("Disk Size: %lu MB\r\n", block_count / ((1024 * 1024) / block_size));
+  printf("Block Count = %lu, Block Size: %lu\r\n", block_count, block_size);
+
+  return true;
+}
+
+//------------- IMPLEMENTATION -------------//
+void tuh_msc_mount_cb(uint8_t dev_addr) {
+  printf("A MassStorage device is mounted\r\n");
+
+  uint8_t const lun = 0;
+  tuh_msc_inquiry(dev_addr, lun, &inquiry_resp, inquiry_complete_cb, 0);
+}
+
+void tuh_msc_umount_cb(uint8_t dev_addr) {
+  (void) dev_addr;
+  printf("A MassStorage device is unmounted\r\n");
+}
+
+#endif
diff --git a/hw/bsp/espressif/boards/CMakeLists.txt b/hw/bsp/espressif/boards/CMakeLists.txt
index 325263c1d..8209e8747 100644
--- a/hw/bsp/espressif/boards/CMakeLists.txt
+++ b/hw/bsp/espressif/boards/CMakeLists.txt
@@ -4,3 +4,5 @@ idf_component_register(SRCS family.c
                     INCLUDE_DIRS "." ${BOARD} ${hw_dir}
                     PRIV_REQUIRES "driver"
                     REQUIRES led_strip src tinyusb_src)
+
+target_compile_options(${COMPONENT_LIB} PRIVATE -Wno-error=format)
diff --git a/hw/bsp/espressif/boards/family.c b/hw/bsp/espressif/boards/family.c
index 250b7001e..d96d86670 100644
--- a/hw/bsp/espressif/boards/family.c
+++ b/hw/bsp/espressif/boards/family.c
@@ -33,6 +33,7 @@
 #include "soc/usb_periph.h"
 
 #include "driver/rmt.h"
+#include "driver/uart.h"
 
 #if ESP_IDF_VERSION_MAJOR > 4
   #include "esp_private/periph_ctrl.h"
@@ -145,9 +146,7 @@ uint32_t board_button_read(void) {
 
 // Get characters from UART
 int board_uart_read(uint8_t *buf, int len) {
-  (void) buf;
-  (void) len;
-  return 0;
+  return uart_read_bytes(UART_NUM_0, buf, len, 0);
 }
 
 // Send characters to UART
@@ -157,6 +156,11 @@ int board_uart_write(void const *buf, int len) {
   return 0;
 }
 
+int board_getchar(void) {
+  char c;
+  return (uart_read_bytes(UART_NUM_0, &c, 1, 0) > 0) ? (int) c : (-1);
+}
+
 //--------------------------------------------------------------------+
 // API: SPI transfer with MAX3421E, must be implemented by application
 //--------------------------------------------------------------------+
@@ -164,12 +168,12 @@ int board_uart_write(void const *buf, int len) {
 
 static spi_device_handle_t max3421_spi;
 
-static void IRAM_ATTR max3421_isr_handler(void* arg)
-{
-  (void) arg;
-  //uint32_t gpio_num = (uint32_t) arg;
+static void IRAM_ATTR max3421_isr_handler(void* arg) {
+  (void) arg; // arg is gpio num
   //xQueueSendFromISR(gpio_evt_queue, &gpio_num, NULL);
+  gpio_set_level(13, 1);
   tuh_int_handler(1);
+  gpio_set_level(13, 0);
 }
 
 static void max3421_init(void) {
@@ -188,12 +192,11 @@ static void max3421_init(void) {
       .data5_io_num = -1,
       .data6_io_num = -1,
       .data7_io_num = -1,
-      .max_transfer_sz = 128
+      .max_transfer_sz = 1024
   };
   ESP_ERROR_CHECK( spi_bus_initialize(MAX3421_SPI_HOST, &buscfg, SPI_DMA_CH_AUTO) );
 
   spi_device_interface_config_t max3421_cfg = {
-      .command_bits = 8,
       .mode = 0,
       .clock_speed_hz = 4000000, // 26000000
       .spics_io_num = -1, // manual control CS
@@ -201,12 +204,16 @@ static void max3421_init(void) {
   };
   ESP_ERROR_CHECK( spi_bus_add_device(MAX3421_SPI_HOST, &max3421_cfg, &max3421_spi) );
 
+  // debug
+  gpio_set_direction(13, GPIO_MODE_OUTPUT);
+  gpio_set_level(13, 0);
+
   // Interrupt pin
-//  gpio_set_direction(MAX3421_INTR_PIN, GPIO_MODE_INPUT);
-//  gpio_set_intr_type(MAX3421_INTR_PIN, GPIO_INTR_NEGEDGE);
-//
-//  gpio_install_isr_service(ESP_INTR_FLAG_EDGE);
-//  gpio_isr_handler_add(MAX3421_INTR_PIN, max3421_isr_handler, NULL);
+  gpio_set_direction(MAX3421_INTR_PIN, GPIO_MODE_INPUT);
+  gpio_set_intr_type(MAX3421_INTR_PIN, GPIO_INTR_NEGEDGE);
+
+  gpio_install_isr_service(0);
+  gpio_isr_handler_add(MAX3421_INTR_PIN, max3421_isr_handler, NULL);
 }
 
 void tuh_max3421_int_api(uint8_t rhport, bool enabled) {
@@ -227,8 +234,8 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_l
   (void) rhport;
 
   spi_transaction_t xact = {
-      .length = tx_len,
-      .rxlength = rx_len,
+      .length = tx_len << 3, // length in bits
+      .rxlength = rx_len << 3, // length in bits
       .tx_buffer = tx_buf,
       .rx_buffer = rx_buf
   };
diff --git a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
index 2a154a8ff..abe276910 100644
--- a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
+++ b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
@@ -70,3 +70,4 @@ idf_component_register(SRCS ${srcs}
   )
 
 target_compile_definitions(${COMPONENT_LIB} PUBLIC ${compile_definitions})
+target_compile_options(${COMPONENT_LIB} PRIVATE -Wno-error=format)
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 6fcfd9476..3620bc8cc 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -95,13 +95,8 @@ TU_ATTR_UNUSED static void power_event_handler(nrfx_power_usb_evt_t event) {
 
 //------------- Host using MAX2341E -------------//
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
+static void max3421_init(void);
 static nrfx_spim_t _spi = NRFX_SPIM_INSTANCE(1);
-
-void max3421_int_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) {
-  if (!(pin == MAX3421_INTR_PIN && action == NRF_GPIOTE_POLARITY_HITOLO)) return;
-
-  tuh_int_handler(1);
-}
 #endif
 
 
@@ -191,50 +186,7 @@ void board_init(void) {
 #endif
 
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
-  // MAX3421 need 3.3v signal (may not be needed)
-  #if defined(UICR_REGOUT0_VOUT_Msk) && 0
-  if ((NRF_UICR->REGOUT0 & UICR_REGOUT0_VOUT_Msk) != UICR_REGOUT0_VOUT_3V3) {
-    NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
-    while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
-
-    NRF_UICR->REGOUT0 = (NRF_UICR->REGOUT0 & ~UICR_REGOUT0_VOUT_Msk) | UICR_REGOUT0_VOUT_3V3;
-
-    NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
-    while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
-
-    NVIC_SystemReset();
-  }
-  #endif
-
-  // manually manage CS
-  nrf_gpio_cfg_output(MAX3421_CS_PIN);
-  nrf_gpio_pin_write(MAX3421_CS_PIN, 1);
-
-  // USB host using max3421e usb controller via SPI
-  nrfx_spim_config_t cfg = {
-      .sck_pin        = MAX3421_SCK_PIN,
-      .mosi_pin       = MAX3421_MOSI_PIN,
-      .miso_pin       = MAX3421_MISO_PIN,
-      .ss_pin         = NRFX_SPIM_PIN_NOT_USED,
-      .ss_active_high = false,
-      .irq_priority   = 3,
-      .orc            = 0xFF,
-      // default setting 4 Mhz, Mode 0, MSB first
-      .frequency      = NRF_SPIM_FREQ_4M,
-      .mode           = NRF_SPIM_MODE_0,
-      .bit_order      = NRF_SPIM_BIT_ORDER_MSB_FIRST,
-  };
-
-  // no handler --> blocking
-  nrfx_spim_init(&_spi, &cfg, NULL, NULL);
-
-  // max3421e interrupt pin
-  nrfx_gpiote_init(1);
-  nrfx_gpiote_in_config_t in_config = NRFX_GPIOTE_CONFIG_IN_SENSE_HITOLO(true);
-  in_config.pull = NRF_GPIO_PIN_PULLUP;
-
-  nrfx_gpiote_in_init(MAX3421_INTR_PIN, &in_config, max3421_int_handler);
-  nrfx_gpiote_trigger_enable(MAX3421_INTR_PIN, true);
+  max3421_init();
 #endif
 
 }
@@ -317,6 +269,60 @@ void nrf_error_cb(uint32_t id, uint32_t pc, uint32_t info) {
 //--------------------------------------------------------------------+
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
 
+void max3421_int_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) {
+  if (!(pin == MAX3421_INTR_PIN && action == NRF_GPIOTE_POLARITY_HITOLO)) return;
+  tuh_int_handler(1);
+}
+
+static void max3421_init(void) {
+  // MAX3421 need 3.3v signal (may not be needed)
+//  #if defined(UICR_REGOUT0_VOUT_Msk)
+//  if ((NRF_UICR->REGOUT0 & UICR_REGOUT0_VOUT_Msk) != UICR_REGOUT0_VOUT_3V3) {
+//    NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
+//    while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+//
+//    NRF_UICR->REGOUT0 = (NRF_UICR->REGOUT0 & ~UICR_REGOUT0_VOUT_Msk) | UICR_REGOUT0_VOUT_3V3;
+//
+//    NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
+//    while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+//
+//    NVIC_SystemReset();
+//  }
+//  #endif
+
+  // manually manage CS
+  nrf_gpio_cfg_output(MAX3421_CS_PIN);
+  nrf_gpio_pin_write(MAX3421_CS_PIN, 1);
+
+  // USB host using max3421e usb controller via SPI
+  nrfx_spim_config_t cfg = {
+      .sck_pin        = MAX3421_SCK_PIN,
+      .mosi_pin       = MAX3421_MOSI_PIN,
+      .miso_pin       = MAX3421_MISO_PIN,
+      .ss_pin         = NRFX_SPIM_PIN_NOT_USED,
+      .ss_active_high = false,
+      .irq_priority   = 3,
+      .orc            = 0xFF,
+      // default setting 4 Mhz, Mode 0, MSB first
+      .frequency      = NRF_SPIM_FREQ_4M,
+      .mode           = NRF_SPIM_MODE_0,
+      .bit_order      = NRF_SPIM_BIT_ORDER_MSB_FIRST,
+  };
+
+  // no handler --> blocking
+  nrfx_spim_init(&_spi, &cfg, NULL, NULL);
+
+  // max3421e interrupt pin
+  nrfx_gpiote_init(1);
+  nrfx_gpiote_in_config_t in_config = NRFX_GPIOTE_CONFIG_IN_SENSE_HITOLO(true);
+  in_config.pull = NRF_GPIO_PIN_PULLUP;
+
+  NVIC_SetPriority(GPIOTE_IRQn, 2);
+
+  nrfx_gpiote_in_init(MAX3421_INTR_PIN, &in_config, max3421_int_handler);
+  nrfx_gpiote_trigger_enable(MAX3421_INTR_PIN, true);
+}
+
 void tuh_max3421_int_api(uint8_t rhport, bool enabled) {
   (void) rhport;
 
diff --git a/hw/bsp/samd21/family.c b/hw/bsp/samd21/family.c
index 395155548..335039e2f 100644
--- a/hw/bsp/samd21/family.c
+++ b/hw/bsp/samd21/family.c
@@ -261,6 +261,7 @@ void SysTick_Handler(void) {
 uint32_t board_millis(void) {
   return system_ticks;
 }
+#endif
 
 //--------------------------------------------------------------------+
 //
@@ -344,6 +345,11 @@ static void max3421_init(void) {
   EIC->CONFIG[0].reg &= ~(7 << sense_shift);
   EIC->CONFIG[0].reg |= 2 << sense_shift;
 
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(EIC_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+#endif
+
   // Enable External Interrupt
   EIC->INTENSET.reg = EIC_INTENSET_EXTINT(1 << MAX3421_INTR_EIC_ID);
 
@@ -413,6 +419,3 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_l
 }
 
 #endif
-
-
-#endif
diff --git a/hw/bsp/samd51/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/samd51/FreeRTOSConfig/FreeRTOSConfig.h
index e3ee529cf..32db4ad95 100644
--- a/hw/bsp/samd51/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/samd51/FreeRTOSConfig/FreeRTOSConfig.h
@@ -59,7 +59,7 @@
 #define configTICK_RATE_HZ                      ( 1000 )
 #define configMAX_PRIORITIES                    ( 5 )
 #define configMINIMAL_STACK_SIZE                ( 128 )
-#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*6*1024 )
 #define configMAX_TASK_NAME_LEN                 16
 #define configUSE_16_BIT_TICKS                  0
 #define configIDLE_SHOULD_YIELD                 1
diff --git a/hw/bsp/samd51/family.c b/hw/bsp/samd51/family.c
index c1b914a02..7b9de35c9 100644
--- a/hw/bsp/samd51/family.c
+++ b/hw/bsp/samd51/family.c
@@ -175,6 +175,7 @@ void SysTick_Handler(void) {
 uint32_t board_millis(void) {
   return system_ticks;
 }
+#endif
 
 //--------------------------------------------------------------------+
 // API: SPI transfer with MAX3421E, must be implemented by application
@@ -290,6 +291,11 @@ static void max3421_init(void) {
   *eic_config &= ~(7 << sense_shift);
   *eic_config |= 2 << sense_shift;
 
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(EIC_0_IRQn + MAX3421_INTR_EIC_ID, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+#endif
+
   // Enable External Interrupt
   EIC->INTENSET.reg = EIC_INTENSET_EXTINT(1 << MAX3421_INTR_EIC_ID);
 
@@ -360,5 +366,3 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_l
 }
 
 #endif
-
-#endif
diff --git a/src/host/usbh.c b/src/host/usbh.c
index dc2831da3..e332f35cc 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -659,7 +659,7 @@ static bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result
   tusb_control_request_t const * request = &_ctrl_xfer.request;
 
   if (XFER_RESULT_SUCCESS != result) {
-    TU_LOG1("[%u:%u] Control %s, xferred_bytes = %u\r\n", rhport, dev_addr, result == XFER_RESULT_STALLED ? "STALLED" : "FAILED", xferred_bytes);
+    TU_LOG1("[%u:%u] Control %s, xferred_bytes = %lu\r\n", rhport, dev_addr, result == XFER_RESULT_STALLED ? "STALLED" : "FAILED", xferred_bytes);
     TU_LOG1_BUF(request, 8);
     TU_LOG1("\r\n");
 

From 1168e4e16343cc0a6d958899460f1b841624974f Mon Sep 17 00:00:00 2001
From: bac <ben.cowperthwaite@sonardyne.com>
Date: Tue, 26 Sep 2023 15:27:17 +0100
Subject: [PATCH 661/691] Added support for USB2 HS peripheral (with integrated
 HS PHY) on STM32U59x chips

---
 src/portable/synopsys/dwc2/dwc2_stm32.h | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h
index cb455bd90..aa77511fa 100644
--- a/src/portable/synopsys/dwc2/dwc2_stm32.h
+++ b/src/portable/synopsys/dwc2/dwc2_stm32.h
@@ -84,7 +84,17 @@
 
 #elif CFG_TUSB_MCU == OPT_MCU_STM32U5
   #include "stm32u5xx.h"
-  #define USB_OTG_FS_PERIPH_BASE       USB_OTG_FS_BASE
+  // NOTE: STM595/5A5/599/5A9 only have 1 USB port (with integrated HS PHY)
+  // USB_OTG_FS_BASE and OTG_FS_IRQn not defined
+  #if (! defined USB_OTG_FS)
+    #define USB_OTG_HS_PERIPH_BASE    USB_OTG_HS_BASE
+    #define EP_MAX_HS                 9
+    #define EP_FIFO_SIZE_HS           4096
+    #define USB_OTG_FS_PERIPH_BASE    USB_OTG_HS_BASE
+    #define OTG_FS_IRQn               OTG_HS_IRQn
+  #else
+    #define USB_OTG_FS_PERIPH_BASE    USB_OTG_FS_BASE
+  #endif
   #define EP_MAX_FS       6
   #define EP_FIFO_SIZE_FS 1280
 

From 2f6592de7f94851cfcca411242398c5da7b792de Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 27 Sep 2023 11:30:18 +0700
Subject: [PATCH 662/691] update max3421 to have hcd_int_handler_ext()

---
 hw/bsp/espressif/boards/family.c          | 22 +++++++-
 src/host/hcd.h                            |  3 ++
 src/portable/analog/max3421/hcd_max3421.c | 62 ++++++++++++-----------
 3 files changed, 55 insertions(+), 32 deletions(-)

diff --git a/hw/bsp/espressif/boards/family.c b/hw/bsp/espressif/boards/family.c
index d96d86670..a04e1e7c5 100644
--- a/hw/bsp/espressif/boards/family.c
+++ b/hw/bsp/espressif/boards/family.c
@@ -167,15 +167,30 @@ int board_getchar(void) {
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
 
 static spi_device_handle_t max3421_spi;
+SemaphoreHandle_t max3421_intr_sem;
 
 static void IRAM_ATTR max3421_isr_handler(void* arg) {
   (void) arg; // arg is gpio num
-  //xQueueSendFromISR(gpio_evt_queue, &gpio_num, NULL);
   gpio_set_level(13, 1);
-  tuh_int_handler(1);
+
+  BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+  xSemaphoreGiveFromISR(max3421_intr_sem, &xHigherPriorityTaskWoken);
+  if (xHigherPriorityTaskWoken) {
+    portYIELD_FROM_ISR();
+  }
+
   gpio_set_level(13, 0);
 }
 
+static void max3421_intr_task(void* param) {
+  (void) param;
+
+  while (1) {
+    xSemaphoreTake(max3421_intr_sem, portMAX_DELAY);
+    tuh_int_handler(BOARD_TUH_RHPORT);
+  }
+}
+
 static void max3421_init(void) {
   // CS pin
   gpio_set_direction(MAX3421_CS_PIN, GPIO_MODE_OUTPUT);
@@ -209,6 +224,9 @@ static void max3421_init(void) {
   gpio_set_level(13, 0);
 
   // Interrupt pin
+  max3421_intr_sem = xSemaphoreCreateBinary();
+  xTaskCreate(max3421_intr_task, "max3421 intr", 2048, NULL, configMAX_PRIORITIES-1, NULL);
+
   gpio_set_direction(MAX3421_INTR_PIN, GPIO_MODE_INPUT);
   gpio_set_intr_type(MAX3421_INTR_PIN, GPIO_INTR_NEGEDGE);
 
diff --git a/src/host/hcd.h b/src/host/hcd.h
index e25b20ea3..a2d4da85d 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -133,6 +133,9 @@ bool hcd_init(uint8_t rhport);
 // Interrupt Handler
 void hcd_int_handler(uint8_t rhport);
 
+// Interrupt Hanndler (extended version)
+void hcd_int_handler_ext(uint8_t rhport, bool in_isr);
+
 // Enable USB interrupt
 void hcd_int_enable (uint8_t rhport);
 
diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index 3f6747404..652a971ee 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -428,8 +428,8 @@ bool hcd_init(uint8_t rhport) {
   reg_write(rhport, PINCTL_ADDR, PINCTL_FDUPSPI, false);
 
   // V1 is 0x01, V2 is 0x12, V3 is 0x13
-  // uint8_t const revision = reg_read(rhport, REVISION_ADDR, false);
-  // TU_LOG2_HEX(revision);
+  uint8_t const revision = reg_read(rhport, REVISION_ADDR, false);
+  TU_LOG2_HEX(revision);
 
   // reset
   reg_write(rhport, USBCTL_ADDR, USBCTL_CHIPRES, false);
@@ -693,9 +693,7 @@ static void handle_connect_irq(uint8_t rhport, bool in_isr) {
 
       // port reset anyway, this will help to stable bus signal for next connection
       reg_write(rhport, HCTL_ADDR, HCTL_BUSRST, in_isr);
-
       hcd_event_device_remove(rhport, in_isr);
-
       reg_write(rhport, HCTL_ADDR, 0, in_isr);
       break;
 
@@ -721,13 +719,12 @@ static void handle_connect_irq(uint8_t rhport, bool in_isr) {
       free_ep(daddr);
 
       hcd_event_device_attach(rhport, in_isr);
-
       break;
     }
   }
 }
 
-static void xfer_complete_isr(uint8_t rhport, max3421_ep_t *ep, xfer_result_t result, uint8_t hrsl) {
+static void xfer_complete_isr(uint8_t rhport, max3421_ep_t *ep, xfer_result_t result, uint8_t hrsl, bool in_isr) {
   uint8_t const ep_addr = tu_edpt_addr(ep->ep_num, ep->ep_dir);
 
   // save data toggle
@@ -738,20 +735,20 @@ static void xfer_complete_isr(uint8_t rhport, max3421_ep_t *ep, xfer_result_t re
   }
 
   ep->xfer_pending = 0;
-  hcd_event_xfer_complete(ep->daddr, ep_addr, ep->xferred_len, result, true);
+  hcd_event_xfer_complete(ep->daddr, ep_addr, ep->xferred_len, result, in_isr);
 
   // Find next pending endpoint
   max3421_ep_t *next_ep = find_next_pending_ep(ep);
   if (next_ep) {
-    xact_inout(rhport, next_ep, true, true);
+    xact_inout(rhport, next_ep, true, in_isr);
   }else {
     // no more pending
     atomic_flag_clear(&_hcd_data.busy);
   }
 }
 
-static void handle_xfer_done(uint8_t rhport) {
-  uint8_t const hrsl = reg_read(rhport, HRSL_ADDR, true);
+static void handle_xfer_done(uint8_t rhport, bool in_isr) {
+  uint8_t const hrsl = reg_read(rhport, HRSL_ADDR, in_isr);
   uint8_t const hresult = hrsl & HRSL_RESULT_MASK;
 
   uint8_t const ep_num = _hcd_data.hxfr & HXFR_EPNUM_MASK;
@@ -774,17 +771,17 @@ static void handle_xfer_done(uint8_t rhport) {
     case HRSL_NAK:
       if (ep_num == 0) {
         // NAK on control, retry immediately
-        hxfr_write(rhport, _hcd_data.hxfr, true);
+        hxfr_write(rhport, _hcd_data.hxfr, in_isr);
       }else {
         // NAK on non-control, find next pending to switch
         max3421_ep_t *next_ep = find_next_pending_ep(ep);
 
         if (ep == next_ep) {
           // this endpoint is only one pending, retry immediately
-          hxfr_write(rhport, _hcd_data.hxfr, true);
+          hxfr_write(rhport, _hcd_data.hxfr, in_isr);
         }else if (next_ep) {
           // switch to next pending TODO could have issue with double buffered if not clear previously out data
-          xact_inout(rhport, next_ep, true, true);
+          xact_inout(rhport, next_ep, true, in_isr);
         }else {
           TU_ASSERT(false,);
         }
@@ -802,7 +799,7 @@ static void handle_xfer_done(uint8_t rhport) {
   }
 
   if (xfer_result != XFER_RESULT_SUCCESS) {
-    xfer_complete_isr(rhport, ep, xfer_result, hrsl);
+    xfer_complete_isr(rhport, ep, xfer_result, hrsl, in_isr);
     return;
   }
 
@@ -814,10 +811,10 @@ static void handle_xfer_done(uint8_t rhport) {
 
     // short packet or all bytes transferred
     if ( ep->xfer_complete ) {
-      xfer_complete_isr(rhport, ep, xfer_result, hrsl);
+      xfer_complete_isr(rhport, ep, xfer_result, hrsl, in_isr);
     }else {
       // more to transfer
-      hxfr_write(rhport, _hcd_data.hxfr, true);
+      hxfr_write(rhport, _hcd_data.hxfr, in_isr);
     }
   } else {
     // SETUP or OUT transfer
@@ -835,10 +832,10 @@ static void handle_xfer_done(uint8_t rhport) {
     ep->buf += xact_len;
 
     if (xact_len < ep->packet_size || ep->xferred_len >= ep->total_len) {
-      xfer_complete_isr(rhport, ep, xfer_result, hrsl);
+      xfer_complete_isr(rhport, ep, xfer_result, hrsl, in_isr);
     } else {
       // more to transfer
-      xact_out(rhport, ep, false, true);
+      xact_out(rhport, ep, false, in_isr);
     }
   }
 }
@@ -862,9 +859,9 @@ void print_hirq(uint8_t hirq) {
   #define print_hirq(hirq)
 #endif
 
-// Interrupt Handler
-void hcd_int_handler(uint8_t rhport) {
-  uint8_t hirq = reg_read(rhport, HIRQ_ADDR, true) & _hcd_data.hien;
+// Interrupt handler (extended)
+void hcd_int_handler_ext(uint8_t rhport, bool in_isr) {
+  uint8_t hirq = reg_read(rhport, HIRQ_ADDR, in_isr) & _hcd_data.hien;
   if (!hirq) return;
 //  print_hirq(hirq);
 
@@ -873,7 +870,7 @@ void hcd_int_handler(uint8_t rhport) {
   }
 
   if (hirq & HIRQ_CONDET_IRQ) {
-    handle_connect_irq(rhport, true);
+    handle_connect_irq(rhport, in_isr);
   }
 
   // queue more transfer in handle_xfer_done() can cause hirq to be set again while external IRQ may not catch and/or
@@ -886,17 +883,17 @@ void hcd_int_handler(uint8_t rhport) {
 
       // RCVDAV_IRQ can trigger 2 times (dual buffered)
       while ( hirq & HIRQ_RCVDAV_IRQ ) {
-        uint8_t rcvbc = reg_read(rhport, RCVBC_ADDR, true);
+        uint8_t rcvbc = reg_read(rhport, RCVBC_ADDR, in_isr);
         xact_len = (uint8_t) tu_min16(rcvbc, ep->total_len - ep->xferred_len);
         if ( xact_len ) {
-          fifo_read(rhport, ep->buf, xact_len, true);
+          fifo_read(rhport, ep->buf, xact_len, in_isr);
           ep->buf += xact_len;
           ep->xferred_len += xact_len;
         }
 
         // ack RCVDVAV IRQ
-        hirq_write(rhport, HIRQ_RCVDAV_IRQ, true);
-        hirq = reg_read(rhport, HIRQ_ADDR, true);
+        hirq_write(rhport, HIRQ_RCVDAV_IRQ, in_isr);
+        hirq = reg_read(rhport, HIRQ_ADDR, in_isr);
       }
 
       if ( xact_len < ep->packet_size || ep->xferred_len >= ep->total_len ) {
@@ -905,18 +902,23 @@ void hcd_int_handler(uint8_t rhport) {
     }
 
     if ( hirq & HIRQ_HXFRDN_IRQ ) {
-      hirq_write(rhport, HIRQ_HXFRDN_IRQ, true);
-      handle_xfer_done(rhport);
+      hirq_write(rhport, HIRQ_HXFRDN_IRQ, in_isr);
+      handle_xfer_done(rhport, in_isr);
     }
 
-    hirq = reg_read(rhport, HIRQ_ADDR, true);
+    hirq = reg_read(rhport, HIRQ_ADDR, in_isr);
   }
 
   // clear all interrupt except SNDBAV_IRQ (never clear by us). Note RCVDAV_IRQ, HXFRDN_IRQ already clear while processing
   hirq &= ~HIRQ_SNDBAV_IRQ;
   if ( hirq ) {
-    hirq_write(rhport, hirq, true);
+    hirq_write(rhport, hirq, in_isr);
   }
 }
 
+// Interrupt Handler
+void hcd_int_handler(uint8_t rhport) {
+  hcd_int_handler_ext(rhport, true);
+}
+
 #endif

From 6dc64eaa28ab905063233895345ba3c1186b836d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 27 Sep 2023 12:33:36 +0700
Subject: [PATCH 663/691] max3421 communication work with esp32 up to
 enumeration, seems still have a bit of issue

---
 .idea/cmake.xml                                  |  7 +++++++
 examples/host/cdc_msc_hid_freertos/src/cdc_app.c |  2 +-
 examples/host/cdc_msc_hid_freertos/src/main.c    |  3 ++-
 hw/bsp/espressif/boards/family.c                 | 15 ++++++++++-----
 4 files changed, 20 insertions(+), 7 deletions(-)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 747f0fb58..ddeeb69fd 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -56,6 +56,13 @@
       <configuration PROFILE_NAME="portenta_c33" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=portenta_c33 -DLOG=3" />
       <configuration PROFILE_NAME="metro_m4_express" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m4_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
       <configuration PROFILE_NAME="metro_m0_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m0_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
+      <configuration PROFILE_NAME="metro esp32s2" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=adafruit_metro_esp32s2 -DMAX3421_HOST=1 -DLOG=2">
+        <ADDITIONAL_GENERATION_ENVIRONMENT>
+          <envs>
+            <env name="ESPBAUD" value="1500000" />
+          </envs>
+        </ADDITIONAL_GENERATION_ENVIRONMENT>
+      </configuration>
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/examples/host/cdc_msc_hid_freertos/src/cdc_app.c b/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
index fc2b1228d..943e534d8 100644
--- a/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
+++ b/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
@@ -68,7 +68,7 @@ void cdc_app_task(void* param) {
       }
     }
 
-    taskYIELD();
+    vTaskDelay(1);
   }
 }
 
diff --git a/examples/host/cdc_msc_hid_freertos/src/main.c b/examples/host/cdc_msc_hid_freertos/src/main.c
index d5574789f..88e742ee2 100644
--- a/examples/host/cdc_msc_hid_freertos/src/main.c
+++ b/examples/host/cdc_msc_hid_freertos/src/main.c
@@ -40,6 +40,7 @@
   #include "freertos/timers.h"
 
   #define USBH_STACK_SIZE     4096
+  #define CDC_STACK_SZIE      2048
 #else
   #include "FreeRTOS.h"
   #include "semphr.h"
@@ -49,9 +50,9 @@
 
   // Increase stack size when debug log is enabled
   #define USBH_STACK_SIZE    (3*configMINIMAL_STACK_SIZE/2) * (CFG_TUSB_DEBUG ? 2 : 1)
+  #define CDC_STACK_SZIE     (3*configMINIMAL_STACK_SIZE/2)
 #endif
 
-#define CDC_STACK_SZIE      (3*configMINIMAL_STACK_SIZE/2)
 
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF PROTOTYPES
diff --git a/hw/bsp/espressif/boards/family.c b/hw/bsp/espressif/boards/family.c
index a04e1e7c5..5226f7e61 100644
--- a/hw/bsp/espressif/boards/family.c
+++ b/hw/bsp/espressif/boards/family.c
@@ -83,7 +83,6 @@ void board_init(void) {
   gpio_set_direction(BUTTON_PIN, GPIO_MODE_INPUT);
   gpio_set_pull_mode(BUTTON_PIN, BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN_ONLY : GPIO_PULLUP_ONLY);
 
-#if CFG_TUD_ENABLED
   // USB Controller Hal init
   periph_module_reset(PERIPH_USB_MODULE);
   periph_module_enable(PERIPH_USB_MODULE);
@@ -93,7 +92,6 @@ void board_init(void) {
   };
   usb_hal_init(&hal);
   configure_pins(&hal);
-#endif
 
 #if CFG_TUH_ENABLED && CFG_TUH_MAX3421
   max3421_init();
@@ -157,8 +155,9 @@ int board_uart_write(void const *buf, int len) {
 }
 
 int board_getchar(void) {
-  char c;
-  return (uart_read_bytes(UART_NUM_0, &c, 1, 0) > 0) ? (int) c : (-1);
+//  char c;
+//  return (uart_read_bytes(UART_NUM_0, &c, 1, 0) > 0) ? (int) c : (-1);
+  return -1;
 }
 
 //--------------------------------------------------------------------+
@@ -187,7 +186,7 @@ static void max3421_intr_task(void* param) {
 
   while (1) {
     xSemaphoreTake(max3421_intr_sem, portMAX_DELAY);
-    tuh_int_handler(BOARD_TUH_RHPORT);
+    hcd_int_handler_ext(BOARD_TUH_RHPORT, false);
   }
 }
 
@@ -251,6 +250,12 @@ void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
 bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_len, uint8_t *rx_buf, size_t rx_len) {
   (void) rhport;
 
+  if (tx_len == 0) {
+    // fifo read, transmit rx_buf as dummy
+    tx_buf = rx_buf;
+    tx_len = rx_len;
+  }
+
   spi_transaction_t xact = {
       .length = tx_len << 3, // length in bits
       .rxlength = rx_len << 3, // length in bits

From 3b0ffd0f488671f1bafa4bcd9e22dd51f8bb6dee Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 27 Sep 2023 15:51:03 +0700
Subject: [PATCH 664/691] change hcd_int_handler(rhport, in_isr) signature: add
 in_isr

change tuh_int_handler() to take in_isr as optional parameter (default =
true)
---
 examples/host/bare_api/only.txt               |  1 +
 examples/host/cdc_msc_hid/only.txt            |  1 +
 examples/host/hid_controller/only.txt         |  1 +
 examples/host/msc_file_explorer/only.txt      |  1 +
 hw/bsp/imxrt/family.c                         |  4 +-
 hw/bsp/kinetis_kl/family.c                    |  2 +-
 hw/bsp/kinetis_kl/family.cmake                | 75 +++++++++--------
 .../boards/lpcxpresso1769/lpcxpresso1769.c    |  2 +-
 hw/bsp/lpc17/boards/mbed1768/mbed1768.c       |  2 +-
 hw/bsp/lpc18/family.c                         | 55 ++++++-------
 hw/bsp/lpc40/family.c                         |  2 +-
 hw/bsp/lpc43/family.c                         |  4 +-
 hw/bsp/msp432e4/family.c                      |  2 +-
 hw/bsp/ngx4330/ngx4330.c                      |  4 +-
 hw/bsp/nrf/family.c                           |  2 +-
 hw/bsp/ra/family.c                            |  6 +-
 hw/bsp/rx/boards/rx65n_target/rx65n_target.c  |  2 +-
 hw/bsp/samd21/family.c                        |  2 +-
 hw/bsp/samd51/family.c                        |  2 +-
 hw/bsp/stm32g4/family.cmake                   | 79 +++++++++---------
 hw/bsp/tm4c123/family.c                       |  2 +-
 src/common/tusb_common.h                      |  2 -
 src/common/tusb_timeout.h                     | 80 -------------------
 src/common/tusb_verify.h                      | 52 ++++--------
 src/host/hcd.h                                |  2 +-
 src/host/usbh.h                               | 11 ++-
 src/portable/analog/max3421/hcd_max3421.c     |  3 +-
 src/portable/ehci/ehci.c                      |  4 +-
 src/portable/mentor/musb/hcd_musb.c           |  4 +-
 src/portable/nxp/khci/hcd_khci.c              |  7 +-
 src/portable/ohci/ohci.c                      |  5 +-
 src/portable/raspberrypi/rp2040/hcd_rp2040.c  |  4 +-
 src/portable/renesas/rusb2/hcd_rusb2.c        |  5 +-
 src/portable/template/hcd_template.c          |  3 +-
 src/tusb.h                                    |  4 +-
 35 files changed, 171 insertions(+), 266 deletions(-)
 delete mode 100644 src/common/tusb_timeout.h

diff --git a/examples/host/bare_api/only.txt b/examples/host/bare_api/only.txt
index 3837ac8a2..fee10f9e2 100644
--- a/examples/host/bare_api/only.txt
+++ b/examples/host/bare_api/only.txt
@@ -1,3 +1,4 @@
+mcu:KINETIS_KL
 mcu:LPC175X_6X
 mcu:LPC177X_8X
 mcu:LPC18XX
diff --git a/examples/host/cdc_msc_hid/only.txt b/examples/host/cdc_msc_hid/only.txt
index 3837ac8a2..fee10f9e2 100644
--- a/examples/host/cdc_msc_hid/only.txt
+++ b/examples/host/cdc_msc_hid/only.txt
@@ -1,3 +1,4 @@
+mcu:KINETIS_KL
 mcu:LPC175X_6X
 mcu:LPC177X_8X
 mcu:LPC18XX
diff --git a/examples/host/hid_controller/only.txt b/examples/host/hid_controller/only.txt
index 3837ac8a2..fee10f9e2 100644
--- a/examples/host/hid_controller/only.txt
+++ b/examples/host/hid_controller/only.txt
@@ -1,3 +1,4 @@
+mcu:KINETIS_KL
 mcu:LPC175X_6X
 mcu:LPC177X_8X
 mcu:LPC18XX
diff --git a/examples/host/msc_file_explorer/only.txt b/examples/host/msc_file_explorer/only.txt
index 3837ac8a2..fee10f9e2 100644
--- a/examples/host/msc_file_explorer/only.txt
+++ b/examples/host/msc_file_explorer/only.txt
@@ -1,3 +1,4 @@
+mcu:KINETIS_KL
 mcu:LPC175X_6X
 mcu:LPC177X_8X
 mcu:LPC18XX
diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c
index ec95a8b24..32d89f794 100644
--- a/hw/bsp/imxrt/family.c
+++ b/hw/bsp/imxrt/family.c
@@ -188,7 +188,7 @@ void USB_OTG1_IRQHandler(void)
   #endif
 
   #if PORT_SUPPORT_HOST(0)
-    tuh_int_handler(0);
+    tuh_int_handler(0, true);
   #endif
 }
 
@@ -199,7 +199,7 @@ void USB_OTG2_IRQHandler(void)
   #endif
 
   #if PORT_SUPPORT_HOST(1)
-    tuh_int_handler(1);
+    tuh_int_handler(1, true);
   #endif
 }
 
diff --git a/hw/bsp/kinetis_kl/family.c b/hw/bsp/kinetis_kl/family.c
index 3e9aa83a4..c436be3e6 100644
--- a/hw/bsp/kinetis_kl/family.c
+++ b/hw/bsp/kinetis_kl/family.c
@@ -39,7 +39,7 @@
 void USB0_IRQHandler(void)
 {
 #if CFG_TUH_ENABLED
-  tuh_int_handler(0);
+  tuh_int_handler(0, true);
 #endif
 #if CFG_TUD_ENABLED
   tud_int_handler(0);
diff --git a/hw/bsp/kinetis_kl/family.cmake b/hw/bsp/kinetis_kl/family.cmake
index 793ef1783..4151979a0 100644
--- a/hw/bsp/kinetis_kl/family.cmake
+++ b/hw/bsp/kinetis_kl/family.cmake
@@ -22,48 +22,47 @@ set(FAMILY_MCUS KINETIS_KL CACHE INTERNAL "")
 #------------------------------------
 # only need to be built ONCE for all examples
 function(add_board_target BOARD_TARGET)
-  if (NOT TARGET ${BOARD_TARGET})
-    add_library(${BOARD_TARGET} STATIC
-      ${SDK_DIR}/drivers/gpio/fsl_gpio.c
-      ${SDK_DIR}/drivers/lpsci/fsl_lpsci.c
-      ${SDK_DIR}/drivers/uart/fsl_uart.c
-      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
-      ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
-      )
-    target_compile_definitions(${BOARD_TARGET} PUBLIC
-      )
-    target_include_directories(${BOARD_TARGET} PUBLIC
-      ${CMSIS_DIR}/CMSIS/Core/Include
-      ${SDK_DIR}/devices/${MCU_VARIANT}
-      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
-      ${SDK_DIR}/drivers/common
-      ${SDK_DIR}/drivers/gpio
-      ${SDK_DIR}/drivers/lpsci
-      ${SDK_DIR}/drivers/port
-      ${SDK_DIR}/drivers/smc
-      ${SDK_DIR}/drivers/uart
-      )
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
 
-    update_board(${BOARD_TARGET})
+  add_library(${BOARD_TARGET} STATIC
+    ${SDK_DIR}/drivers/gpio/fsl_gpio.c
+    ${SDK_DIR}/drivers/lpsci/fsl_lpsci.c
+    ${SDK_DIR}/drivers/uart/fsl_uart.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMSIS_DIR}/CMSIS/Core/Include
+    ${SDK_DIR}/devices/${MCU_VARIANT}
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+    ${SDK_DIR}/drivers/common
+    ${SDK_DIR}/drivers/gpio
+    ${SDK_DIR}/drivers/lpsci
+    ${SDK_DIR}/drivers/port
+    ${SDK_DIR}/drivers/smc
+    ${SDK_DIR}/drivers/uart
+    )
+  update_board(${BOARD_TARGET})
 
-    # LD_FILE and STARTUP_FILE can be defined in board.cmake
+  # LD_FILE and STARTUP_FILE can be defined in board.cmake
+  target_sources(${BOARD_TARGET} PUBLIC
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
 
-    target_sources(${BOARD_TARGET} PUBLIC
-      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      # nanolib
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
       )
-
-    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--script=${LD_FILE_GNU}"
-        # nanolib
-        --specs=nosys.specs
-        --specs=nano.specs
-        )
-    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--config=${LD_FILE_IAR}"
-        )
-    endif ()
   endif ()
 endfunction()
 
diff --git a/hw/bsp/lpc17/boards/lpcxpresso1769/lpcxpresso1769.c b/hw/bsp/lpc17/boards/lpcxpresso1769/lpcxpresso1769.c
index c7d655368..8c26b906f 100644
--- a/hw/bsp/lpc17/boards/lpcxpresso1769/lpcxpresso1769.c
+++ b/hw/bsp/lpc17/boards/lpcxpresso1769/lpcxpresso1769.c
@@ -37,7 +37,7 @@ void USB_IRQHandler(void)
   #endif
 
   #if CFG_TUH_ENABLED
-    tuh_int_handler(0);
+    tuh_int_handler(0, true);
   #endif
 }
 
diff --git a/hw/bsp/lpc17/boards/mbed1768/mbed1768.c b/hw/bsp/lpc17/boards/mbed1768/mbed1768.c
index b2c92d640..613dcb570 100644
--- a/hw/bsp/lpc17/boards/mbed1768/mbed1768.c
+++ b/hw/bsp/lpc17/boards/mbed1768/mbed1768.c
@@ -151,7 +151,7 @@ void USB_IRQHandler(void)
   #endif
 
   #if CFG_TUH_ENABLED
-    tuh_int_handler(0);
+    tuh_int_handler(0, true);
   #endif
 }
 
diff --git a/hw/bsp/lpc18/family.c b/hw/bsp/lpc18/family.c
index b11f4fe0e..e6abecb4b 100644
--- a/hw/bsp/lpc18/family.c
+++ b/hw/bsp/lpc18/family.c
@@ -43,25 +43,23 @@
 //--------------------------------------------------------------------+
 // USB Interrupt Handler
 //--------------------------------------------------------------------+
-void USB0_IRQHandler(void)
-{
+void USB0_IRQHandler(void) {
   #if PORT_SUPPORT_DEVICE(0)
-    tud_int_handler(0);
+  tud_int_handler(0);
   #endif
 
   #if PORT_SUPPORT_HOST(0)
-    tuh_int_handler(0);
+  tuh_int_handler(0, true);
   #endif
 }
 
-void USB1_IRQHandler(void)
-{
+void USB1_IRQHandler(void) {
   #if PORT_SUPPORT_DEVICE(1)
-    tud_int_handler(1);
+  tud_int_handler(1);
   #endif
 
   #if PORT_SUPPORT_HOST(1)
-    tuh_int_handler(1);
+  tuh_int_handler(1, true);
   #endif
 }
 
@@ -74,28 +72,26 @@ const uint32_t OscRateIn = 12000000;
 const uint32_t ExtRateIn = 0;
 
 // Invoked by startup code
-void SystemInit(void)
-{
+void SystemInit(void) {
 #ifdef __USE_LPCOPEN
-	extern void (* const g_pfnVectors[])(void);
+  extern void (*const g_pfnVectors[])(void);
   unsigned int *pSCB_VTOR = (unsigned int *) 0xE000ED08;
-	*pSCB_VTOR = (unsigned int) g_pfnVectors;
+  *pSCB_VTOR = (unsigned int) g_pfnVectors;
 #endif
 
   board_lpc18_pinmux();
 
-  #ifdef TRACE_ETM
+#ifdef TRACE_ETM
   // Trace clock is limited to 60MHz, limit CPU clock to 120MHz
   Chip_SetupCoreClock(CLKIN_CRYSTAL, 120000000UL, true);
-  #else
+#else
   // CPU clock max to 180 Mhz
   Chip_SetupCoreClock(CLKIN_CRYSTAL, MAX_CLOCK_FREQ, true);
-  #endif
+#endif
 
 }
 
-void board_init(void)
-{
+void board_init(void) {
   SystemCoreClockUpdate();
 
 #if CFG_TUSB_OS == OPT_OS_NONE
@@ -135,27 +131,22 @@ void board_init(void)
 // Board porting API
 //--------------------------------------------------------------------+
 
-void board_led_write(bool state)
-{
+void board_led_write(bool state) {
   Chip_GPIO_SetPinState(LPC_GPIO_PORT, LED_PORT, LED_PIN, state);
 }
 
-uint32_t board_button_read(void)
-{
+uint32_t board_button_read(void) {
   // active low
   return Chip_GPIO_GetPinState(LPC_GPIO_PORT, BUTTON_PORT, BUTTON_PIN) ? 0 : 1;
 }
 
-int board_uart_read(uint8_t* buf, int len)
-{
+int board_uart_read(uint8_t *buf, int len) {
   return Chip_UART_Read(UART_DEV, buf, len);
 }
 
-int board_uart_write(void const * buf, int len)
-{
-  uint8_t const* buf8 = (uint8_t const*) buf;
-  for(int i=0; i<len; i++)
-  {
+int board_uart_write(void const *buf, int len) {
+  uint8_t const *buf8 = (uint8_t const *) buf;
+  for (int i = 0; i < len; i++) {
     while ((Chip_UART_ReadLineStatus(UART_DEV) & UART_LSR_THRE) == 0) {}
     Chip_UART_SendByte(UART_DEV, buf8[i]);
   }
@@ -165,13 +156,13 @@ int board_uart_write(void const * buf, int len)
 
 #if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
+
+void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void)
-{
+uint32_t board_millis(void) {
   return system_ticks;
 }
+
 #endif
diff --git a/hw/bsp/lpc40/family.c b/hw/bsp/lpc40/family.c
index 526e3a080..d6c8ef32a 100644
--- a/hw/bsp/lpc40/family.c
+++ b/hw/bsp/lpc40/family.c
@@ -37,7 +37,7 @@ void USB_IRQHandler(void) {
   #endif
 
   #if CFG_TUH_ENABLED
-  tuh_int_handler(0);
+  tuh_int_handler(0, true);
   #endif
 }
 
diff --git a/hw/bsp/lpc43/family.c b/hw/bsp/lpc43/family.c
index d52c1a071..8be729f7d 100644
--- a/hw/bsp/lpc43/family.c
+++ b/hw/bsp/lpc43/family.c
@@ -213,7 +213,7 @@ void USB0_IRQHandler(void)
   #endif
 
   #if PORT_SUPPORT_HOST(0)
-    tuh_int_handler(0);
+    tuh_int_handler(0, true);
   #endif
 }
 
@@ -224,7 +224,7 @@ void USB1_IRQHandler(void)
   #endif
 
   #if PORT_SUPPORT_HOST(1)
-    tuh_int_handler(1);
+    tuh_int_handler(1, true);
   #endif
 }
 
diff --git a/hw/bsp/msp432e4/family.c b/hw/bsp/msp432e4/family.c
index 10f3ac736..d5ef7f930 100644
--- a/hw/bsp/msp432e4/family.c
+++ b/hw/bsp/msp432e4/family.c
@@ -34,7 +34,7 @@
 void USB0_IRQHandler(void)
 {
 #if CFG_TUH_ENABLED
-  tuh_int_handler(0);
+  tuh_int_handler(0, true);
 #endif
 #if CFG_TUD_ENABLED
   tud_int_handler(0);
diff --git a/hw/bsp/ngx4330/ngx4330.c b/hw/bsp/ngx4330/ngx4330.c
index a767d5f29..bd84e449b 100644
--- a/hw/bsp/ngx4330/ngx4330.c
+++ b/hw/bsp/ngx4330/ngx4330.c
@@ -214,7 +214,7 @@ void USB0_IRQHandler(void)
   #endif
 
   #if PORT_SUPPORT_HOST(0)
-    tuh_int_handler(0);
+    tuh_int_handler(0, true);
   #endif
 }
 
@@ -225,7 +225,7 @@ void USB1_IRQHandler(void)
   #endif
 
   #if PORT_SUPPORT_HOST(1)
-    tuh_int_handler(1);
+    tuh_int_handler(1, true);
   #endif
 }
 
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 6fcfd9476..fc755f512 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -100,7 +100,7 @@ static nrfx_spim_t _spi = NRFX_SPIM_INSTANCE(1);
 void max3421_int_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) {
   if (!(pin == MAX3421_INTR_PIN && action == NRF_GPIOTE_POLARITY_HITOLO)) return;
 
-  tuh_int_handler(1);
+  tuh_int_handler(1, true);
 }
 #endif
 
diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c
index 0aa58d86d..fdf4c8666 100644
--- a/hw/bsp/ra/family.c
+++ b/hw/bsp/ra/family.c
@@ -188,7 +188,7 @@ void usbfs_interrupt_handler(void) {
   R_BSP_IrqStatusClear(irq);
 
   #if PORT_SUPPORT_HOST(0)
-  tuh_int_handler(0);
+  tuh_int_handler(0, true);
   #endif
 
   #if PORT_SUPPORT_DEVICE(0)
@@ -201,7 +201,7 @@ void usbfs_resume_handler(void) {
   R_BSP_IrqStatusClear(irq);
 
   #if PORT_SUPPORT_HOST(0)
-  tuh_int_handler(0);
+  tuh_int_handler(0, true);
   #endif
 
   #if PORT_SUPPORT_DEVICE(0)
@@ -229,7 +229,7 @@ void usbhs_interrupt_handler(void) {
   R_BSP_IrqStatusClear(irq);
 
   #if PORT_SUPPORT_HOST(1)
-  tuh_int_handler(1);
+  tuh_int_handler(1, true);
   #endif
 
   #if PORT_SUPPORT_DEVICE(1)
diff --git a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
index 513eca678..032dac810 100644
--- a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
+++ b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
@@ -177,7 +177,7 @@ void INT_Excep_SCI5_RXI5(void)
 void INT_Excep_USB0_USBI0(void)
 {
 #if CFG_TUH_ENABLED
-  tuh_int_handler(0);
+  tuh_int_handler(0, true);
 #endif
 #if CFG_TUD_ENABLED
   tud_int_handler(0);
diff --git a/hw/bsp/samd21/family.c b/hw/bsp/samd21/family.c
index cfe66b8dc..0ea729055 100644
--- a/hw/bsp/samd21/family.c
+++ b/hw/bsp/samd21/family.c
@@ -356,7 +356,7 @@ void EIC_Handler(void) {
   EIC->INTFLAG.reg = EIC_INTFLAG_EXTINT(1 << MAX3421_INTR_EIC_ID);
 
   // Call the TinyUSB interrupt handler
-  tuh_int_handler(1);
+  tuh_int_handler(1, true);
 }
 
 void tuh_max3421_int_api(uint8_t rhport, bool enabled) {
diff --git a/hw/bsp/samd51/family.c b/hw/bsp/samd51/family.c
index 2cf00c7af..268d60e48 100644
--- a/hw/bsp/samd51/family.c
+++ b/hw/bsp/samd51/family.c
@@ -296,7 +296,7 @@ void MAX3421_EIC_Handler(void) {
   EIC->INTFLAG.reg = EIC_INTFLAG_EXTINT(1 << MAX3421_INTR_EIC_ID);
 
   // Call the TinyUSB interrupt handler
-  tuh_int_handler(1);
+  tuh_int_handler(1, true);
 }
 
 void tuh_max3421_int_api(uint8_t rhport, bool enabled) {
diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake
index 675a96c74..f8cabcbe5 100644
--- a/hw/bsp/stm32g4/family.cmake
+++ b/hw/bsp/stm32g4/family.cmake
@@ -26,50 +26,47 @@ set(FAMILY_MCUS STM32G4 CACHE INTERNAL "")
 #------------------------------------
 # only need to be built ONCE for all examples
 function(add_board_target BOARD_TARGET)
-  if (NOT TARGET ${BOARD_TARGET})
-    # Startup & Linker script
-    set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-    set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
 
-    add_library(${BOARD_TARGET} STATIC
-      ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
-      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
-      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
-      )
-    target_include_directories(${BOARD_TARGET} PUBLIC
-      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-      ${CMSIS_5}/CMSIS/Core/Include
-      ${ST_CMSIS}/Include
-      ${ST_HAL_DRIVER}/Inc
-      )
-    target_compile_options(${BOARD_TARGET} PUBLIC
-      )
-    target_compile_definitions(${BOARD_TARGET} PUBLIC
-      )
+  # Startup & Linker script
+  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
 
-    update_board(${BOARD_TARGET})
+  add_library(${BOARD_TARGET} STATIC
+    ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMSIS_5}/CMSIS/Core/Include
+    ${ST_CMSIS}/Include
+    ${ST_HAL_DRIVER}/Inc
+    )
+  update_board(${BOARD_TARGET})
 
-    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--script=${LD_FILE_GNU}"
-        -nostartfiles
-        # nanolib
-        --specs=nosys.specs
-        --specs=nano.specs
-        )
-    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--config=${LD_FILE_IAR}"
-        )
-    endif ()
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      # nanolib
+      --specs=nosys.specs
+      --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
   endif ()
 endfunction()
 
diff --git a/hw/bsp/tm4c123/family.c b/hw/bsp/tm4c123/family.c
index ad5ae505f..738bc3fa0 100644
--- a/hw/bsp/tm4c123/family.c
+++ b/hw/bsp/tm4c123/family.c
@@ -8,7 +8,7 @@
 void USB0_Handler(void)
 {
 #if CFG_TUH_ENABLED
-  tuh_int_handler(0);
+  tuh_int_handler(0, true);
 #endif
 
 #if CFG_TUD_ENABLED
diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index 6fffed11c..caeb5f2ef 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -75,8 +75,6 @@
 #include "tusb_types.h"
 #include "tusb_debug.h"
 
-#include "tusb_timeout.h" // TODO remove
-
 //--------------------------------------------------------------------+
 // Optional API implemented by application if needed
 // TODO move to a more ovious place/file
diff --git a/src/common/tusb_timeout.h b/src/common/tusb_timeout.h
deleted file mode 100644
index 533e67ab8..000000000
--- a/src/common/tusb_timeout.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2019 Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/** \ingroup Group_Common Common Files
- *  \defgroup Group_TimeoutTimer timeout timer
- *  @{ */
-
-#ifndef _TUSB_TIMEOUT_H_
-#define _TUSB_TIMEOUT_H_
-
-#include <stdbool.h>
-#include <stdint.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef struct {
-  uint32_t start;
-  uint32_t interval;
-}tu_timeout_t;
-
-#if 0
-
-extern uint32_t tusb_hal_millis(void);
-
-static inline void tu_timeout_set(tu_timeout_t* tt, uint32_t msec)
-{
-  tt->interval = msec;
-  tt->start    = tusb_hal_millis();
-}
-
-static inline bool tu_timeout_expired(tu_timeout_t* tt)
-{
-  return ( tusb_hal_millis() - tt->start ) >= tt->interval;
-}
-
-// For used with periodic event to prevent drift
-static inline void tu_timeout_reset(tu_timeout_t* tt)
-{
-  tt->start += tt->interval;
-}
-
-static inline void tu_timeout_restart(tu_timeout_t* tt)
-{
-  tt->start = tusb_hal_millis();
-}
-
-#endif
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* _TUSB_TIMEOUT_H_ */
-
-/** @} */
diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h
index 12355e8be..1b5f53dfc 100644
--- a/src/common/tusb_verify.h
+++ b/src/common/tusb_verify.h
@@ -56,12 +56,8 @@
  *   #define TU_VERIFY(cond)                  if(cond) return false;
  *   #define TU_VERIFY(cond,ret)              if(cond) return ret;
  *
- *   #define TU_VERIFY_HDLR(cond,handler)     if(cond) {handler; return false;}
- *   #define TU_VERIFY_HDLR(cond,ret,handler) if(cond) {handler; return ret;}
- *
  *   #define TU_ASSERT(cond)                  if(cond) {_MESS_FAILED(); TU_BREAKPOINT(), return false;}
  *   #define TU_ASSERT(cond,ret)              if(cond) {_MESS_FAILED(); TU_BREAKPOINT(), return ret;}
- *
  *------------------------------------------------------------------*/
 
 #ifdef __cplusplus
@@ -97,40 +93,23 @@
   #define TU_BREAKPOINT() do {} while (0)
 #endif
 
-/*------------------------------------------------------------------*/
-/* Macro Generator
- *------------------------------------------------------------------*/
-
 // Helper to implement optional parameter for TU_VERIFY Macro family
 #define _GET_3RD_ARG(arg1, arg2, arg3, ...)        arg3
-#define _GET_4TH_ARG(arg1, arg2, arg3, arg4, ...)  arg4
-
-/*------------- Generator for TU_VERIFY and TU_VERIFY_HDLR -------------*/
-#define TU_VERIFY_DEFINE(_cond, _handler, _ret)  do            \
-{                                                              \
-  if ( !(_cond) ) { _handler; return _ret;  }                  \
-} while(0)
 
 /*------------------------------------------------------------------*/
 /* TU_VERIFY
  * - TU_VERIFY_1ARGS : return false if failed
  * - TU_VERIFY_2ARGS : return provided value if failed
  *------------------------------------------------------------------*/
-#define TU_VERIFY_1ARGS(_cond)                         TU_VERIFY_DEFINE(_cond, , false)
-#define TU_VERIFY_2ARGS(_cond, _ret)                   TU_VERIFY_DEFINE(_cond, , _ret)
+#define TU_VERIFY_DEFINE(_cond, _ret)    \
+  do {                                   \
+    if ( !(_cond) ) { return _ret; }     \
+  } while(0)
 
-#define TU_VERIFY(...)                   _GET_3RD_ARG(__VA_ARGS__, TU_VERIFY_2ARGS, TU_VERIFY_1ARGS, UNUSED)(__VA_ARGS__)
+#define TU_VERIFY_1ARGS(_cond)         TU_VERIFY_DEFINE(_cond, false)
+#define TU_VERIFY_2ARGS(_cond, _ret)   TU_VERIFY_DEFINE(_cond, _ret)
 
-
-/*------------------------------------------------------------------*/
-/* TU_VERIFY WITH HANDLER
- * - TU_VERIFY_HDLR_2ARGS : execute handler, return false if failed
- * - TU_VERIFY_HDLR_3ARGS : execute handler, return provided error if failed
- *------------------------------------------------------------------*/
-#define TU_VERIFY_HDLR_2ARGS(_cond, _handler)           TU_VERIFY_DEFINE(_cond, _handler, false)
-#define TU_VERIFY_HDLR_3ARGS(_cond, _handler, _ret)     TU_VERIFY_DEFINE(_cond, _handler, _ret)
-
-#define TU_VERIFY_HDLR(...)              _GET_4TH_ARG(__VA_ARGS__, TU_VERIFY_HDLR_3ARGS, TU_VERIFY_HDLR_2ARGS,UNUSED)(__VA_ARGS__)
+#define TU_VERIFY(...)                 _GET_3RD_ARG(__VA_ARGS__, TU_VERIFY_2ARGS, TU_VERIFY_1ARGS, _dummy)(__VA_ARGS__)
 
 /*------------------------------------------------------------------*/
 /* ASSERT
@@ -138,19 +117,20 @@
  * - 1 arg : return false if failed
  * - 2 arg : return error if failed
  *------------------------------------------------------------------*/
-#define ASSERT_1ARGS(_cond)            TU_VERIFY_DEFINE(_cond, _MESS_FAILED(); TU_BREAKPOINT(), false)
-#define ASSERT_2ARGS(_cond, _ret)      TU_VERIFY_DEFINE(_cond, _MESS_FAILED(); TU_BREAKPOINT(), _ret)
+#define TU_ASSERT_DEFINE(_cond, _ret)                                 \
+  do {                                                                \
+    if ( !(_cond) ) { _MESS_FAILED(); TU_BREAKPOINT(); return _ret; } \
+  } while(0)
+
+#define TU_ASSERT_1ARGS(_cond)         TU_ASSERT_DEFINE(_cond, false)
+#define TU_ASSERT_2ARGS(_cond, _ret)   TU_ASSERT_DEFINE(_cond, _ret)
 
 #ifndef TU_ASSERT
-#define TU_ASSERT(...)             _GET_3RD_ARG(__VA_ARGS__, ASSERT_2ARGS, ASSERT_1ARGS,UNUSED)(__VA_ARGS__)
+#define TU_ASSERT(...)                 _GET_3RD_ARG(__VA_ARGS__, TU_ASSERT_2ARGS, TU_ASSERT_1ARGS, _dummy)(__VA_ARGS__)
 #endif
 
-/*------------------------------------------------------------------*/
-/* ASSERT HDLR
- *------------------------------------------------------------------*/
-
 #ifdef __cplusplus
  }
 #endif
 
-#endif /* TUSB_VERIFY_H_ */
+#endif
diff --git a/src/host/hcd.h b/src/host/hcd.h
index e25b20ea3..2bde289df 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -131,7 +131,7 @@ bool hcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) TU_AT
 bool hcd_init(uint8_t rhport);
 
 // Interrupt Handler
-void hcd_int_handler(uint8_t rhport);
+void hcd_int_handler(uint8_t rhport, bool in_isr);
 
 // Enable USB interrupt
 void hcd_int_enable (uint8_t rhport);
diff --git a/src/host/usbh.h b/src/host/usbh.h
index 684e8240e..770d70dfe 100644
--- a/src/host/usbh.h
+++ b/src/host/usbh.h
@@ -124,11 +124,16 @@ void tuh_task(void) {
 bool tuh_task_event_ready(void);
 
 #ifndef _TUSB_HCD_H_
-extern void hcd_int_handler(uint8_t rhport);
+extern void hcd_int_handler(uint8_t rhport, bool in_isr);
 #endif
 
-// Interrupt handler, name alias to HCD
-#define tuh_int_handler   hcd_int_handler
+// Interrupt handler alias to HCD with in_isr as optional parameter
+// - tuh_int_handler(rhport) --> hcd_int_handler(rhport, true)
+// - tuh_int_handler(rhport, in_isr) --> hcd_int_handler(rhport, in_isr)
+// Note: this is similar to TU_VERIFY(), _GET_3RD_ARG() is defined in tusb_verify.h
+#define _tuh_int_handler_1arg(_rhport)            hcd_int_handler(_rhport, true)
+#define _tuh_int_hanlder_2arg(_rhport, _in_isr)   hcd_int_handler(_rhport, _in_isr)
+#define tuh_int_handler(...)   _GET_3RD_ARG(__VA_ARGS__, _tuh_int_hanlder_2arg, _tuh_int_handler_1arg, _dummy)(__VA_ARGS__)
 
 // Check if roothub port is initialized and active as a host
 bool tuh_rhport_is_active(uint8_t rhport);
diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index 238b518a0..d013d6179 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -863,7 +863,8 @@ void print_hirq(uint8_t hirq) {
 #endif
 
 // Interrupt Handler
-void hcd_int_handler(uint8_t rhport) {
+void hcd_int_handler(uint8_t rhport, bool in_isr) {
+  (void) in_isr;
   uint8_t hirq = reg_read(rhport, HIRQ_ADDR, true) & _hcd_data.hien;
   if (!hirq) return;
 //  print_hirq(hirq);
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index c93c33fc0..572b9826c 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -656,8 +656,8 @@ void process_period_xfer_isr(uint8_t rhport, uint32_t interval_ms)
 }
 
 //------------- Host Controller Driver's Interrupt Handler -------------//
-void hcd_int_handler(uint8_t rhport)
-{
+void hcd_int_handler(uint8_t rhport, bool in_isr) {
+  (void) in_isr;
   ehci_registers_t* regs = ehci_data.regs;
   uint32_t const int_status = regs->status;
 
diff --git a/src/portable/mentor/musb/hcd_musb.c b/src/portable/mentor/musb/hcd_musb.c
index 02090df85..5312c2812 100644
--- a/src/portable/mentor/musb/hcd_musb.c
+++ b/src/portable/mentor/musb/hcd_musb.c
@@ -847,8 +847,10 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
 /*-------------------------------------------------------------------
  * ISR
  *-------------------------------------------------------------------*/
-void hcd_int_handler(uint8_t rhport)
+void hcd_int_handler(uint8_t rhport, bool in_isr)
 {
+  (void) in_isr;
+
   uint_fast8_t is, txis, rxis;
 
   is   = USB0->IS;   /* read and clear interrupt status */
diff --git a/src/portable/nxp/khci/hcd_khci.c b/src/portable/nxp/khci/hcd_khci.c
index 55327e02d..57684b259 100644
--- a/src/portable/nxp/khci/hcd_khci.c
+++ b/src/portable/nxp/khci/hcd_khci.c
@@ -447,6 +447,10 @@ void hcd_port_reset(uint8_t rhport)
   _hcd.need_reset = false;
 }
 
+void hcd_port_reset_end(uint8_t rhport) {
+  (void) rhport;
+}
+
 tusb_speed_t hcd_port_speed_get(uint8_t rhport)
 {
   (void)rhport;
@@ -583,8 +587,9 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
 /*--------------------------------------------------------------------+
  * ISR
  *--------------------------------------------------------------------+*/
-void hcd_int_handler(uint8_t rhport)
+void hcd_int_handler(uint8_t rhport, bool in_isr)
 {
+  (void) in_isr;
   uint32_t is  = KHCI->ISTAT;
   uint32_t msk = KHCI->INTEN;
 
diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index 413e72037..f978b0965 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -667,8 +667,9 @@ static void done_queue_isr(uint8_t hostid)
   }
 }
 
-void hcd_int_handler(uint8_t hostid)
-{
+void hcd_int_handler(uint8_t hostid, bool in_isr) {
+  (void) in_isr;
+
   uint32_t const int_en     = OHCI_REG->interrupt_enable;
   uint32_t const int_status = OHCI_REG->interrupt_status & int_en;
 
diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c
index 21dc3f67d..4ed6d36bb 100644
--- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c
@@ -252,9 +252,9 @@ static void __tusb_irq_path_func(hcd_rp2040_irq)(void)
   }
 }
 
-void __tusb_irq_path_func(hcd_int_handler)(uint8_t rhport)
-{
+void __tusb_irq_path_func(hcd_int_handler)(uint8_t rhport, bool in_isr) {
   (void) rhport;
+  (void) in_isr;
   hcd_rp2040_irq();
 }
 
diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index 790cd6b32..bf95be707 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -771,8 +771,9 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
 //--------------------------------------------------------------------+
 // ISR
 //--------------------------------------------------------------------+
-void hcd_int_handler(uint8_t rhport)
-{
+void hcd_int_handler(uint8_t rhport, bool in_isr) {
+  (void) in_isr;
+
   rusb2_reg_t* rusb = RUSB2_REG(rhport);
   unsigned is0 = rusb->INTSTS0;
   unsigned is1 = rusb->INTSTS1;
diff --git a/src/portable/template/hcd_template.c b/src/portable/template/hcd_template.c
index 3e3b91558..b073d6057 100644
--- a/src/portable/template/hcd_template.c
+++ b/src/portable/template/hcd_template.c
@@ -51,8 +51,9 @@ bool hcd_init(uint8_t rhport) {
 }
 
 // Interrupt Handler
-void hcd_int_handler(uint8_t rhport) {
+void hcd_int_handler(uint8_t rhport, bool in_isr) {
   (void) rhport;
+  (void) in_isr;
 }
 
 // Enable USB interrupt
diff --git a/src/tusb.h b/src/tusb.h
index d6534ca28..c9d56d3c3 100644
--- a/src/tusb.h
+++ b/src/tusb.h
@@ -66,7 +66,7 @@
   #endif
 #else
   #ifndef tuh_int_handler
-  #define tuh_int_handler(_x)
+  #define tuh_int_handler(...)
   #endif
 #endif
 
@@ -123,7 +123,7 @@
   #endif
 #else
   #ifndef tud_int_handler
-  #define tud_int_handler(_x)
+  #define tud_int_handler(...)
   #endif
 #endif
 

From 0a4fb6963de9a62be613cab5ab33f70c2e836b3d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 27 Sep 2023 16:19:39 +0700
Subject: [PATCH 665/691] fix build with lpc54

---
 .github/workflows/build_arm.yml               |   2 +-
 .github/workflows/cmake_arm.yml               |   2 +-
 hw/bsp/family_support.cmake                   |   1 +
 hw/bsp/lpc54/FreeRTOSConfig/FreeRTOSConfig.h  | 165 ++++++++++++++++++
 .../lpc54/boards/lpcxpresso54114/board.cmake  |  21 +++
 .../lpc54/boards/lpcxpresso54608/board.cmake  |  22 +++
 hw/bsp/lpc54/family.cmake                     | 138 +++++++--------
 7 files changed, 281 insertions(+), 70 deletions(-)
 create mode 100644 hw/bsp/lpc54/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/lpc54/boards/lpcxpresso54114/board.cmake
 create mode 100644 hw/bsp/lpc54/boards/lpcxpresso54608/board.cmake

diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 975f351a0..c7462f0d7 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -36,7 +36,7 @@ jobs:
         - 'broadcom_32bit'
         - 'kinetis_k32l2'
         - 'lpc11 lpc13 lpc15 lpc17'
-        - 'lpc51 lpc54'
+        - 'lpc51'
         - 'mm32 msp432e4'
         - 'samd11 same5x saml2x'
         - 'stm32f2 stm32f3'
diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index 4b788a213..5dc36ee2c 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -36,7 +36,7 @@ jobs:
           - 'imxrt'
           - 'kinetis_kl'
           - 'lpc18 lpc40 lpc43'
-          - 'lpc55'
+          - 'lpc54 lpc55'
           - 'mcx'
           - 'nrf'
           - 'ra'
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 642282b0e..9c625b58e 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -40,6 +40,7 @@ if (NOT FAMILY STREQUAL rp2040)
   # enable LTO if supported skip rp2040
   include(CheckIPOSupported)
   check_ipo_supported(RESULT IPO_SUPPORTED)
+  cmake_print_variables(IPO_SUPPORTED)
   if (IPO_SUPPORTED)
     set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
   endif()
diff --git a/hw/bsp/lpc54/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/lpc54/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..fc0ab1f2d
--- /dev/null
+++ b/hw/bsp/lpc54/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,165 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "fsl_device_registers.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         0
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       3
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/lpc54/boards/lpcxpresso54114/board.cmake b/hw/bsp/lpc54/boards/lpcxpresso54114/board.cmake
new file mode 100644
index 000000000..c0bbeecd5
--- /dev/null
+++ b/hw/bsp/lpc54/boards/lpcxpresso54114/board.cmake
@@ -0,0 +1,21 @@
+set(MCU_VARIANT LPC54114)
+set(MCU_CORE LPC54114_cm4)
+
+set(JLINK_DEVICE LPC54114J256_M4)
+set(PYOCD_TARGET LPC54114)
+
+set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/LPC54114J256_cm4_flash.ld)
+
+# Device port default to PORT1 Highspeed
+if (NOT DEFINED PORT)
+  set(PORT 1)
+endif()
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_LPC54114J256BD64_cm4
+    )
+  target_link_libraries(${TARGET} PUBLIC
+    ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/libpower_cm4_hardabi.a
+    )
+endfunction()
diff --git a/hw/bsp/lpc54/boards/lpcxpresso54608/board.cmake b/hw/bsp/lpc54/boards/lpcxpresso54608/board.cmake
new file mode 100644
index 000000000..f0715fa12
--- /dev/null
+++ b/hw/bsp/lpc54/boards/lpcxpresso54608/board.cmake
@@ -0,0 +1,22 @@
+set(MCU_VARIANT LPC54608)
+set(MCU_CORE LPC54608)
+
+set(JLINK_DEVICE LPC54608J512)
+set(PYOCD_TARGET LPC54608)
+set(NXPLINK_DEVICE LPC54608:LPCXpresso54608)
+
+set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/LPC54608J512_flash.ld)
+
+# Device port default to PORT1 Highspeed
+if (NOT DEFINED PORT)
+  set(PORT 1)
+endif()
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_LPC54608J512ET180
+    )
+  target_link_libraries(${TARGET} PUBLIC
+    ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/libpower_hardabi.a
+    )
+endfunction()
diff --git a/hw/bsp/lpc54/family.cmake b/hw/bsp/lpc54/family.cmake
index b016441c1..a1f876844 100644
--- a/hw/bsp/lpc54/family.cmake
+++ b/hw/bsp/lpc54/family.cmake
@@ -28,83 +28,85 @@ set(HOST_PORT $<NOT:${PORT}>)
 #------------------------------------
 # only need to be built ONCE for all examples
 function(add_board_target BOARD_TARGET)
-  if (NOT TARGET ${BOARD_TARGET})
-    add_library(${BOARD_TARGET} STATIC
-      # driver
-      ${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
-      ${SDK_DIR}/drivers/common/fsl_common_arm.c
-      ${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
-      ${SDK_DIR}/drivers/flexcomm/fsl_usart.c
-      # mcu
-      ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
-      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
-      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_power.c
-      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
-      )
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif()
 
+  add_library(${BOARD_TARGET} STATIC
+    # driver
+    ${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
+    ${SDK_DIR}/drivers/common/fsl_common_arm.c
+    ${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
+    ${SDK_DIR}/drivers/flexcomm/fsl_usart.c
+    # mcu
+    ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_power.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
+    )
+
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\)
+    BOARD_TUD_RHPORT=${PORT}
+    BOARD_TUH_RHPORT=${HOST_PORT}
+    )
+  # Port 0 is Fullspeed, Port 1 is Highspeed. Port1 controller can only access USB_SRAM
+  if (PORT EQUAL 1)
     target_compile_definitions(${BOARD_TARGET} PUBLIC
-      CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\)
-      BOARD_TUD_RHPORT=${PORT}
-      BOARD_TUH_RHPORT=${HOST_PORT}
+      BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+      BOARD_TUH_MAX_SPEED=OPT_MODE_FULL_SPEED
+      CFG_TUD_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
       )
-    # Port 0 is Fullspeed, Port 1 is Highspeed. Port1 controller can only access USB_SRAM
-    if (PORT EQUAL 1)
-      target_compile_definitions(${BOARD_TARGET} PUBLIC
-        BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
-        BOARD_TUH_MAX_SPEED=OPT_MODE_FULL_SPEED
-        CFG_TUD_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
-        )
-    else ()
-      target_compile_definitions(${BOARD_TARGET} PUBLIC
-        BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
-        BOARD_TUH_MAX_SPEED=OPT_MODE_HIGH_SPEED
-        CFG_TUH_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
-        #CFG_TUD_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
-        )
-    endif ()
-
-    target_include_directories(${BOARD_TARGET} PUBLIC
-      ${TOP}/lib/sct_neopixel
-      # driver
-      ${SDK_DIR}/drivers/common
-      ${SDK_DIR}/drivers/flexcomm
-      ${SDK_DIR}/drivers/lpc_iocon
-      ${SDK_DIR}/drivers/lpc_gpio
-      ${SDK_DIR}/drivers/lpuart
-      ${SDK_DIR}/drivers/sctimer
-      # mcu
-      ${CMSIS_DIR}/CMSIS/Core/Include
-      ${SDK_DIR}/devices/${MCU_VARIANT}
-      ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+  else ()
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
+      BOARD_TUH_MAX_SPEED=OPT_MODE_HIGH_SPEED
+      CFG_TUH_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
+      #CFG_TUD_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
       )
+  endif ()
 
-    update_board(${BOARD_TARGET})
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${TOP}/lib/sct_neopixel
+    # driver
+    ${SDK_DIR}/drivers/common
+    ${SDK_DIR}/drivers/flexcomm
+    ${SDK_DIR}/drivers/lpc_iocon
+    ${SDK_DIR}/drivers/lpc_gpio
+    ${SDK_DIR}/drivers/lpuart
+    ${SDK_DIR}/drivers/sctimer
+    # mcu
+    ${CMSIS_DIR}/CMSIS/Core/Include
+    ${SDK_DIR}/devices/${MCU_VARIANT}
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+    )
 
-    if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
-      set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
-    endif ()
+  update_board(${BOARD_TARGET})
 
-    if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
-      set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
-    endif ()
+  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+    set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
+  endif ()
 
-    target_sources(${BOARD_TARGET} PUBLIC
-      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+  if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
+    set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
+  endif ()
+
+  target_sources(${BOARD_TARGET} PUBLIC
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      # linker file
+      "LINKER:--script=${LD_FILE_GNU}"
+      # nanolib
+      --specs=nosys.specs
+      --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
       )
-
-    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        # linker file
-        "LINKER:--script=${LD_FILE_GNU}"
-        # nanolib
-        --specs=nosys.specs
-        --specs=nano.specs
-        )
-    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--config=${LD_FILE_IAR}"
-        )
-    endif ()
   endif ()
 endfunction()
 

From 58c49cea5b94dcf45b0b2117afc3fc8ce646732c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 27 Sep 2023 16:31:46 +0700
Subject: [PATCH 666/691] remove sct_neopixel from lpc54 (due to warnings and
 not used)

---
 hw/bsp/lpc54/family.cmake | 2 --
 1 file changed, 2 deletions(-)

diff --git a/hw/bsp/lpc54/family.cmake b/hw/bsp/lpc54/family.cmake
index a1f876844..cdd513fe4 100644
--- a/hw/bsp/lpc54/family.cmake
+++ b/hw/bsp/lpc54/family.cmake
@@ -126,8 +126,6 @@ function(family_configure_example TARGET RTOS)
     # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
-    # external driver
-    ${TOP}/lib/sct_neopixel/sct_neopixel.c
     )
 
   # https://github.com/gsteiert/sct_neopixel/pull/1

From b35621fc63defdd3191d569c8248dae52997ce8f Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Wed, 27 Sep 2023 11:37:16 +0200
Subject: [PATCH 667/691] Update IAR template.

---
 tools/iar_gen.py        | 123 ++++++++++------
 tools/iar_template.ipcf | 316 +++++++++++++++++++++-------------------
 2 files changed, 241 insertions(+), 198 deletions(-)

diff --git a/tools/iar_gen.py b/tools/iar_gen.py
index 73c8b29fc..646a581f4 100644
--- a/tools/iar_gen.py
+++ b/tools/iar_gen.py
@@ -1,51 +1,84 @@
 #!/usr/bin/python3
 
 import os
+import sys
 import xml.dom.minidom as XML
+import glob
 
-# Read base configuration
-base = ""
-with open("iar_template.ipcf") as f:
-    base = f.read()
+def Main():
+    # Read base configuration
+    base = ""
+    with open("iar_template.ipcf") as f:
+        base = f.read()
 
-# Enumerate all device/host examples
-dir_1 = os.listdir("../examples")
-for dir_2 in dir_1:
-    if os.path.isdir("../examples/{}".format(dir_2)):
-        print(dir_2)
-        examples = os.listdir("../examples/{}".format(dir_2))
-        for example in examples:
-            if os.path.isdir("../examples/{}/{}".format(dir_2, example)):
-                print("../examples/{}/{}".format(dir_2, example))
-                conf = XML.parseString(base)
-                files = conf.getElementsByTagName("files")[0]
-                inc   = conf.getElementsByTagName("includePath")[0]
-                # Add bsp inc
-                path = conf.createElement('path')
-                path_txt = conf.createTextNode("$TUSB_DIR$/hw")
-                path.appendChild(path_txt)
-                inc.appendChild(path)
-                # Add board.c/.h
-                grp = conf.createElement('group')
-                grp.setAttribute("name", "bsp")
-                path = conf.createElement('path')
-                path_txt = conf.createTextNode("$TUSB_DIR$/hw/bsp/board.c")
-                path.appendChild(path_txt)
-                grp.appendChild(path)
-                files.appendChild(grp)
-                # Add example's .c/.h
-                grp = conf.createElement('group')
-                grp.setAttribute("name", "example")
-                for file in os.listdir("../examples/{}/{}/src".format(dir_2, example)):
-                    if file.endswith(".c") or file.endswith(".h"):
-                        path = conf.createElement('path')
-                        path.setAttribute("copyTo", "$PROJ_DIR$/{}".format(file))
-                        path_txt = conf.createTextNode("$TUSB_DIR$/examples/{0}/{1}/src/{2}".format(dir_2, example, file))
-                        path.appendChild(path_txt)
-                        grp.appendChild(path)
-                files.appendChild(grp)
-                cfg_str = conf.toprettyxml()
-                cfg_str = '\n'.join([s for s in cfg_str.splitlines() if s.strip()])
-                #print(cfg_str)
-                with open("../examples/{0}/{1}/iar_{1}.ipcf".format(dir_2, example), 'w') as f:
-                    f.write(cfg_str)
+    # Enumerate all device/host examples
+    dir_1 = os.listdir("../examples")
+    for dir_2 in dir_1:
+        if os.path.isdir("../examples/{}".format(dir_2)):
+            print(dir_2)
+            examples = os.listdir("../examples/{}".format(dir_2))
+            for example in examples:
+                if os.path.isdir("../examples/{}/{}".format(dir_2, example)):
+                    print("../examples/{}/{}".format(dir_2, example))
+                    conf = XML.parseString(base)
+                    files = conf.getElementsByTagName("files")[0]
+                    inc   = conf.getElementsByTagName("includePath")[0]
+                    # Add bsp inc
+                    path = conf.createElement('path')
+                    path_txt = conf.createTextNode("$TUSB_DIR$/hw")
+                    path.appendChild(path_txt)
+                    inc.appendChild(path)
+                    # Add board.c/.h
+                    grp = conf.createElement('group')
+                    grp.setAttribute("name", "bsp")
+                    path = conf.createElement('path')
+                    path_txt = conf.createTextNode("$TUSB_DIR$/hw/bsp/board.c")
+                    path.appendChild(path_txt)
+                    grp.appendChild(path)
+                    files.appendChild(grp)
+                    # Add example's .c/.h
+                    grp = conf.createElement('group')
+                    grp.setAttribute("name", "example")
+                    for file in os.listdir("../examples/{}/{}/src".format(dir_2, example)):
+                        if file.endswith(".c") or file.endswith(".h"):
+                            path = conf.createElement('path')
+                            path.setAttribute("copyTo", "$PROJ_DIR$/{}".format(file))
+                            path_txt = conf.createTextNode("$TUSB_DIR$/examples/{0}/{1}/src/{2}".format(dir_2, example, file))
+                            path.appendChild(path_txt)
+                            grp.appendChild(path)
+                    files.appendChild(grp)
+                    cfg_str = conf.toprettyxml()
+                    cfg_str = '\n'.join([s for s in cfg_str.splitlines() if s.strip()])
+                    #print(cfg_str)
+                    with open("../examples/{0}/{1}/iar_{1}.ipcf".format(dir_2, example), 'w') as f:
+                        f.write(cfg_str)
+
+def ListPath(path, blacklist=[]):
+    # Get all .c files
+    files = glob.glob(f'../{path}/**/*.c', recursive=True)
+    # Filter
+    files = [x for x in files if all(y not in x for y in blacklist)]
+    # Get common dir list
+    dirs = []
+    for file in files:
+        dir = os.path.dirname(file)
+        if dir not in dirs:
+            dirs.append(dir)
+    # Print .c groupped by dir
+    for dir in dirs:
+        print('<group name="' + dir.replace('../', '').replace('\\','/') + '">')
+        for file in files:
+            if os.path.dirname(file) == dir:
+                print('    <path>$TUSB_DIR$/' + file.replace('../','').replace('\\','/')+'</path>')
+        print('</group>')
+    
+def List():
+    ListPath('src', [ 'template.c', 'dcd_synopsys.c', 'dcd_esp32sx.c' ])
+    ListPath('lib/SEGGER_RTT')
+    
+if __name__ == "__main__":
+    if (len(sys.argv) > 1):
+        if (sys.argv[1] == 'l'):
+            List()
+    else:
+        Main()
diff --git a/tools/iar_template.ipcf b/tools/iar_template.ipcf
index 6ea1d576d..4919fe7b4 100644
--- a/tools/iar_template.ipcf
+++ b/tools/iar_template.ipcf
@@ -4,166 +4,176 @@
 	<includePath>
 		<path>$TUSB_DIR$/src</path>
         <path>$TUSB_DIR$/lib/SEGGER_RTT/RTT</path>
+        <path>$TUSB_DIR$/lib/SEGGER_RTT/Config</path>
         <path>$PROJ_DIR$</path>
 	</includePath>
 	<files>
-		<group name="src/device">
-			<path>$TUSB_DIR$/src/device/usbd.c</path>
-			<path>$TUSB_DIR$/src/device/usbd_control.c</path>
-		</group>
-		<group name="src/common">
-			<path>$TUSB_DIR$/src/common/tusb_fifo.c</path>
-		</group>
-		<group name="src/class/audio">
-			<path>$TUSB_DIR$/src/class/audio/audio_device.c</path>
-		</group>
-		<group name="src/class/bth">
-			<path>$TUSB_DIR$/src/class/bth/bth_device.c</path>
-		</group>
-		<group name="src/class/cdc">
-			<path>$TUSB_DIR$/src/class/cdc/cdc_device.c</path>
-			<path>$TUSB_DIR$/src/class/cdc/cdc_host.c</path>
-			<path>$TUSB_DIR$/src/class/cdc/cdc_rndis_host.c</path>
-		</group>
-		<group name="src/class/dfu">
-			<path>$TUSB_DIR$/src/class/dfu/dfu_device.c</path>
-			<path>$TUSB_DIR$/src/class/dfu/dfu_rt_device.c</path>
-		</group>
-		<group name="src/class/hid">
-			<path>$TUSB_DIR$/src/class/hid/hid_device.c</path>
-			<path>$TUSB_DIR$/src/class/hid/hid_host.c</path>
-		</group>
-		<group name="src/class/midi">
-			<path>$TUSB_DIR$/src/class/midi/midi_device.c</path>
-		</group>
-		<group name="src/class/msc">
-			<path>$TUSB_DIR$/src/class/msc/msc_device.c</path>
-			<path>$TUSB_DIR$/src/class/msc/msc_host.c</path>
-		</group>
-		<group name="src/class/net">
-			<path>$TUSB_DIR$/src/class/net/ecm_rndis_device.c</path>
-			<path>$TUSB_DIR$/src/class/net/ncm_device.c</path>
-		</group>
-		<group name="src/class/usbtmc">
-			<path>$TUSB_DIR$/src/class/usbtmc/usbtmc_device.c</path>
-		</group>
-		<group name="src/class/vendor">
-			<path>$TUSB_DIR$/src/class/vendor/vendor_device.c</path>
-			<path>$TUSB_DIR$/src/class/vendor/vendor_host.c</path>
-		</group>
         <group name="src">
             <path>$TUSB_DIR$/src/tusb.c</path>
         </group>
-		<group name="src/host">
-			<path>$TUSB_DIR$/src/host/hub.c</path>
-			<path>$TUSB_DIR$/src/host/usbh.c</path>
-		</group>
-		<group name="src/portable/bridgetek/ft9xx">
-			<path>$TUSB_DIR$/src/portable/bridgetek/ft9xx/dcd_ft9xx.c</path>
-		</group>
-		<group name="src/portable/chipidea/ci_hs">
-			<path>$TUSB_DIR$/src/portable/chipidea/ci_hs/dcd_ci_hs.c</path>
-			<path>$TUSB_DIR$/src/portable/chipidea/ci_hs/hcd_ci_hs.c</path>
-		</group>
-		<group name="src/portable/synopsys/dwc2">
-			<path>$TUSB_DIR$/src/portable/synopsys/dwc2/dcd_dwc2.c</path>
-		</group>
-		<group name="src/portable/dialog/da146xx">
-			<path>$TUSB_DIR$/src/portable/dialog/da146xx/dcd_da146xx.c</path>
-		</group>
-		<group name="src/portable/ehci">
-			<path>$TUSB_DIR$/src/portable/ehci/ehci.c</path>
-		</group>
-		<group name="src/portable/espressif/esp32sx">
-			<path>$TUSB_DIR$/src/portable/espressif/esp32sx/dcd_esp32sx.c</path>
-		</group>
-		<group name="src/portable/mentor/musb">
-			<path>$TUSB_DIR$/src/portable/mentor/musb/dcd_musb.c</path>
-			<path>$TUSB_DIR$/src/portable/mentor/musb/hcd_musb.c</path>
-		</group>
-		<group name="src/portable/microchip/samd">
-			<path>$TUSB_DIR$/src/portable/microchip/samd/dcd_samd.c</path>
-		</group>
-		<group name="src/portable/microchip/samg">
-			<path>$TUSB_DIR$/src/portable/microchip/samg/dcd_samg.c</path>
-		</group>
-		<group name="src/portable/microchip/samx7x">
-			<path>$TUSB_DIR$/src/portable/microchip/samx7x/dcd_samx7x.c</path>
-		</group>
-		<group name="src/portable/microchip/pic">
-			<path>$TUSB_DIR$/src/portable/microchip/pic/dcd_pic.c</path>
-		</group>
-		<group name="src/portable/microchip/pic32mz">
-			<path>$TUSB_DIR$/src/portable/microchip/pic32mz/dcd_pic32mz.c</path>
-		</group>
-		<group name="src/portable/mindmotion/mm32">
-			<path>$TUSB_DIR$/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c</path>
-		</group>
-		<group name="src/portable/nordic/nrf5x">
-			<path>$TUSB_DIR$/src/portable/nordic/nrf5x/dcd_nrf5x.c</path>
-		</group>
-		<group name="src/portable/nuvoton/nuc120">
-			<path>$TUSB_DIR$/src/portable/nuvoton/nuc120/dcd_nuc120.c</path>
-		</group>
-		<group name="src/portable/nuvoton/nuc121">
-			<path>$TUSB_DIR$/src/portable/nuvoton/nuc121/dcd_nuc121.c</path>
-		</group>
-		<group name="src/portable/nuvoton/nuc505">
-			<path>$TUSB_DIR$/src/portable/nuvoton/nuc505/dcd_nuc505.c</path>
-		</group>
-		<group name="src/portable/nxp/khci">
-			<path>$TUSB_DIR$/src/portable/nxp/khci/dcd_khci.c</path>
-			<path>$TUSB_DIR$/src/portable/nxp/khci/hcd_khci.c</path>
-		</group>
-		<group name="src/portable/nxp/lpc17_40">
-			<path>$TUSB_DIR$/src/portable/nxp/lpc17_40/dcd_lpc17_40.c</path>
-			<path>$TUSB_DIR$/src/portable/nxp/lpc17_40/hcd_lpc17_40.c</path>
-		</group>
-		<group name="src/portable/nxp/lpc_ip3511">
-			<path>$TUSB_DIR$/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c</path>
-		</group>
-		<group name="src/portable/nxp/transdimension">
-			<path>$TUSB_DIR$/src/portable/nxp/transdimension/dcd_transdimension.c</path>
-			<path>$TUSB_DIR$/src/portable/nxp/transdimension/hcd_transdimension.c</path>
-		</group>
-		<group name="src/portable/ohci">
-			<path>$TUSB_DIR$/src/portable/ohci/ohci.c</path>
-		</group>
-		<group name="src/portable/raspberrypi/pio_usb">
-			<path>$TUSB_DIR$/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c</path>
-			<path>$TUSB_DIR$/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c</path>
-		</group>
-		<group name="src/portable/raspberrypi/rp2040">
-			<path>$TUSB_DIR$/src/portable/raspberrypi/rp2040/dcd_rp2040.c</path>
-			<path>$TUSB_DIR$/src/portable/raspberrypi/rp2040/hcd_rp2040.c</path>
-		</group>
-		<group name="src/portable/renesas/rusb2">
-			<path>$TUSB_DIR$/src/portable/renesas/rusb2/dcd_rusb2.c</path>
-			<path>$TUSB_DIR$/src/portable/renesas/rusb2/hcd_rusb2.c</path>
-		</group>
-		<group name="src/portable/sony/cxd56">
-			<path>$TUSB_DIR$/src/portable/sony/cxd56/dcd_cxd56.c</path>
-		</group>
-		<group name="src/portable/st/stm32_fsdev">
-			<path>$TUSB_DIR$/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c</path>
-		</group>
-		<group name="src/portable/sunxi">
-			<path>$TUSB_DIR$/src/portable/sunxi/dcd_sunxi_musb.c</path>
-		</group>
-		<group name="src/portable/ti/msp430x5xx">
-			<path>$TUSB_DIR$/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c</path>
-		</group>
-		<group name="src/portable/valentyusb/eptri">
-			<path>$TUSB_DIR$/src/portable/valentyusb/eptri/dcd_eptri.c</path>
-		</group>
-		<group name="src/portable/wch/ch32v307">
-			<path>$TUSB_DIR$/src/portable/wch/ch32v307/dcd_usbhs.c</path>
-		</group>
-        <group name="lib/SEGGER_RTT">
-			<path>$TUSB_DIR$/lib/SEGGER_RTT/RTT/SEGGER_RTT.c</path>
+        <group name="src/class/audio">
+            <path>$TUSB_DIR$/src/class/audio/audio_device.c</path>
+        </group>
+        <group name="src/class/bth">
+            <path>$TUSB_DIR$/src/class/bth/bth_device.c</path>
+        </group>
+        <group name="src/class/cdc">
+            <path>$TUSB_DIR$/src/class/cdc/cdc_device.c</path>
+            <path>$TUSB_DIR$/src/class/cdc/cdc_host.c</path>
+            <path>$TUSB_DIR$/src/class/cdc/cdc_rndis_host.c</path>
+        </group>
+        <group name="src/class/dfu">
+            <path>$TUSB_DIR$/src/class/dfu/dfu_device.c</path>
+            <path>$TUSB_DIR$/src/class/dfu/dfu_rt_device.c</path>
+        </group>
+        <group name="src/class/hid">
+            <path>$TUSB_DIR$/src/class/hid/hid_device.c</path>
+            <path>$TUSB_DIR$/src/class/hid/hid_host.c</path>
+        </group>
+        <group name="src/class/midi">
+            <path>$TUSB_DIR$/src/class/midi/midi_device.c</path>
+        </group>
+        <group name="src/class/msc">
+            <path>$TUSB_DIR$/src/class/msc/msc_device.c</path>
+            <path>$TUSB_DIR$/src/class/msc/msc_host.c</path>
+        </group>
+        <group name="src/class/net">
+            <path>$TUSB_DIR$/src/class/net/ecm_rndis_device.c</path>
+            <path>$TUSB_DIR$/src/class/net/ncm_device.c</path>
+        </group>
+        <group name="src/class/usbtmc">
+            <path>$TUSB_DIR$/src/class/usbtmc/usbtmc_device.c</path>
+        </group>
+        <group name="src/class/vendor">
+            <path>$TUSB_DIR$/src/class/vendor/vendor_device.c</path>
+            <path>$TUSB_DIR$/src/class/vendor/vendor_host.c</path>
+        </group>
+        <group name="src/class/video">
+            <path>$TUSB_DIR$/src/class/video/video_device.c</path>
+        </group>
+        <group name="src/common">
+            <path>$TUSB_DIR$/src/common/tusb_fifo.c</path>
+        </group>
+        <group name="src/device">
+            <path>$TUSB_DIR$/src/device/usbd.c</path>
+            <path>$TUSB_DIR$/src/device/usbd_control.c</path>
+        </group>
+        <group name="src/host">
+            <path>$TUSB_DIR$/src/host/hub.c</path>
+            <path>$TUSB_DIR$/src/host/usbh.c</path>
+        </group>
+        <group name="src/portable/analog/max3421">
+            <path>$TUSB_DIR$/src/portable/analog/max3421/hcd_max3421.c</path>
+        </group>
+        <group name="src/portable/bridgetek/ft9xx">
+            <path>$TUSB_DIR$/src/portable/bridgetek/ft9xx/dcd_ft9xx.c</path>
+        </group>
+        <group name="src/portable/chipidea/ci_fs">
+            <path>$TUSB_DIR$/src/portable/chipidea/ci_fs/dcd_ci_fs.c</path>
+        </group>
+        <group name="src/portable/chipidea/ci_hs">
+            <path>$TUSB_DIR$/src/portable/chipidea/ci_hs/dcd_ci_hs.c</path>
+            <path>$TUSB_DIR$/src/portable/chipidea/ci_hs/hcd_ci_hs.c</path>
+        </group>
+        <group name="src/portable/dialog/da146xx">
+            <path>$TUSB_DIR$/src/portable/dialog/da146xx/dcd_da146xx.c</path>
+        </group>
+        <group name="src/portable/ehci">
+            <path>$TUSB_DIR$/src/portable/ehci/ehci.c</path>
+        </group>
+        <group name="src/portable/mentor/musb">
+            <path>$TUSB_DIR$/src/portable/mentor/musb/dcd_musb.c</path>
+            <path>$TUSB_DIR$/src/portable/mentor/musb/hcd_musb.c</path>
+        </group>
+        <group name="src/portable/microchip/pic">
+            <path>$TUSB_DIR$/src/portable/microchip/pic/dcd_pic.c</path>
+        </group>
+        <group name="src/portable/microchip/pic32mz">
+            <path>$TUSB_DIR$/src/portable/microchip/pic32mz/dcd_pic32mz.c</path>
+        </group>
+        <group name="src/portable/microchip/samd">
+            <path>$TUSB_DIR$/src/portable/microchip/samd/dcd_samd.c</path>
+        </group>
+        <group name="src/portable/microchip/samg">
+            <path>$TUSB_DIR$/src/portable/microchip/samg/dcd_samg.c</path>
+        </group>
+        <group name="src/portable/microchip/samx7x">
+            <path>$TUSB_DIR$/src/portable/microchip/samx7x/dcd_samx7x.c</path>
+        </group>
+        <group name="src/portable/mindmotion/mm32">
+            <path>$TUSB_DIR$/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c</path>
+        </group>
+        <group name="src/portable/nordic/nrf5x">
+            <path>$TUSB_DIR$/src/portable/nordic/nrf5x/dcd_nrf5x.c</path>
+        </group>
+        <group name="src/portable/nuvoton/nuc120">
+            <path>$TUSB_DIR$/src/portable/nuvoton/nuc120/dcd_nuc120.c</path>
+        </group>
+        <group name="src/portable/nuvoton/nuc121">
+            <path>$TUSB_DIR$/src/portable/nuvoton/nuc121/dcd_nuc121.c</path>
+        </group>
+        <group name="src/portable/nuvoton/nuc505">
+            <path>$TUSB_DIR$/src/portable/nuvoton/nuc505/dcd_nuc505.c</path>
+        </group>
+        <group name="src/portable/nxp/khci">
+            <path>$TUSB_DIR$/src/portable/nxp/khci/dcd_khci.c</path>
+            <path>$TUSB_DIR$/src/portable/nxp/khci/hcd_khci.c</path>
+        </group>
+        <group name="src/portable/nxp/lpc17_40">
+            <path>$TUSB_DIR$/src/portable/nxp/lpc17_40/dcd_lpc17_40.c</path>
+            <path>$TUSB_DIR$/src/portable/nxp/lpc17_40/hcd_lpc17_40.c</path>
+        </group>
+        <group name="src/portable/nxp/lpc_ip3511">
+            <path>$TUSB_DIR$/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c</path>
+        </group>
+        <group name="src/portable/ohci">
+            <path>$TUSB_DIR$/src/portable/ohci/ohci.c</path>
+        </group>
+        <group name="src/portable/raspberrypi/pio_usb">
+            <path>$TUSB_DIR$/src/portable/raspberrypi/pio_usb/dcd_pio_usb.c</path>
+            <path>$TUSB_DIR$/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c</path>
+        </group>
+        <group name="src/portable/raspberrypi/rp2040">
+            <path>$TUSB_DIR$/src/portable/raspberrypi/rp2040/dcd_rp2040.c</path>
+            <path>$TUSB_DIR$/src/portable/raspberrypi/rp2040/hcd_rp2040.c</path>
+            <path>$TUSB_DIR$/src/portable/raspberrypi/rp2040/rp2040_usb.c</path>
+        </group>
+        <group name="src/portable/renesas/rusb2">
+            <path>$TUSB_DIR$/src/portable/renesas/rusb2/dcd_rusb2.c</path>
+            <path>$TUSB_DIR$/src/portable/renesas/rusb2/hcd_rusb2.c</path>
+            <path>$TUSB_DIR$/src/portable/renesas/rusb2/rusb2_common.c</path>
+        </group>
+        <group name="src/portable/sony/cxd56">
+            <path>$TUSB_DIR$/src/portable/sony/cxd56/dcd_cxd56.c</path>
+        </group>
+        <group name="src/portable/st/stm32_fsdev">
+            <path>$TUSB_DIR$/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c</path>
+        </group>
+        <group name="src/portable/st/typec">
+            <path>$TUSB_DIR$/src/portable/st/typec/typec_stm32.c</path>
+        </group>
+        <group name="src/portable/sunxi">
+            <path>$TUSB_DIR$/src/portable/sunxi/dcd_sunxi_musb.c</path>
+        </group>
+        <group name="src/portable/synopsys/dwc2">
+            <path>$TUSB_DIR$/src/portable/synopsys/dwc2/dcd_dwc2.c</path>
+        </group>
+        <group name="src/portable/ti/msp430x5xx">
+            <path>$TUSB_DIR$/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c</path>
+        </group>
+        <group name="src/portable/valentyusb/eptri">
+            <path>$TUSB_DIR$/src/portable/valentyusb/eptri/dcd_eptri.c</path>
+        </group>
+        <group name="src/portable/wch/ch32v307">
+            <path>$TUSB_DIR$/src/portable/wch/ch32v307/dcd_usbhs.c</path>
+        </group>
+        <group name="src/typec">
+            <path>$TUSB_DIR$/src/typec/usbc.c</path>
+        </group>
+        <group name="lib/SEGGER_RTT/RTT">
+            <path>$TUSB_DIR$/lib/SEGGER_RTT/RTT/SEGGER_RTT.c</path>
             <path>$TUSB_DIR$/lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c</path>
-            <path>$TUSB_DIR$/lib/SEGGER_RTT/Syscalls/SEGGER_RTT_Syscalls_IAR.c</path>
-		</group>
+        </group>
     </files>
 
 </iarProjectConnection>

From 42eb4e0da0f5218d43ef81631bbbe2f369cc13fa Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Wed, 27 Sep 2023 11:46:52 +0200
Subject: [PATCH 668/691] Fix CI.

---
 tools/iar_gen.py | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/iar_gen.py b/tools/iar_gen.py
index 646a581f4..264dd9a58 100644
--- a/tools/iar_gen.py
+++ b/tools/iar_gen.py
@@ -64,18 +64,18 @@ def ListPath(path, blacklist=[]):
         dir = os.path.dirname(file)
         if dir not in dirs:
             dirs.append(dir)
-    # Print .c groupped by dir
+    # Print .c grouped by dir
     for dir in dirs:
         print('<group name="' + dir.replace('../', '').replace('\\','/') + '">')
         for file in files:
             if os.path.dirname(file) == dir:
                 print('    <path>$TUSB_DIR$/' + file.replace('../','').replace('\\','/')+'</path>')
         print('</group>')
-    
+
 def List():
     ListPath('src', [ 'template.c', 'dcd_synopsys.c', 'dcd_esp32sx.c' ])
     ListPath('lib/SEGGER_RTT')
-    
+
 if __name__ == "__main__":
     if (len(sys.argv) > 1):
         if (sys.argv[1] == 'l'):

From 3a10b6a3d55e76020d0fdb6adb937f98df5638e1 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 27 Sep 2023 18:09:19 +0700
Subject: [PATCH 669/691] fix esp32 build

---
 hw/bsp/espressif/boards/family.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/bsp/espressif/boards/family.c b/hw/bsp/espressif/boards/family.c
index 5226f7e61..e4c2c3414 100644
--- a/hw/bsp/espressif/boards/family.c
+++ b/hw/bsp/espressif/boards/family.c
@@ -186,7 +186,7 @@ static void max3421_intr_task(void* param) {
 
   while (1) {
     xSemaphoreTake(max3421_intr_sem, portMAX_DELAY);
-    hcd_int_handler_ext(BOARD_TUH_RHPORT, false);
+    tuh_int_handler(BOARD_TUH_RHPORT, false);
   }
 }
 

From 10abece264e3d5a4551be750f3c726890598a40b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 27 Sep 2023 18:15:20 +0700
Subject: [PATCH 670/691] esp32 hid device work well

---
 hw/bsp/espressif/boards/family.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/bsp/espressif/boards/family.c b/hw/bsp/espressif/boards/family.c
index e4c2c3414..4d2cab9e8 100644
--- a/hw/bsp/espressif/boards/family.c
+++ b/hw/bsp/espressif/boards/family.c
@@ -224,7 +224,7 @@ static void max3421_init(void) {
 
   // Interrupt pin
   max3421_intr_sem = xSemaphoreCreateBinary();
-  xTaskCreate(max3421_intr_task, "max3421 intr", 2048, NULL, configMAX_PRIORITIES-1, NULL);
+  xTaskCreate(max3421_intr_task, "max3421 intr", 2048, NULL, configMAX_PRIORITIES-2, NULL);
 
   gpio_set_direction(MAX3421_INTR_PIN, GPIO_MODE_INPUT);
   gpio_set_intr_type(MAX3421_INTR_PIN, GPIO_INTR_NEGEDGE);

From 277852afc1798f2acdb61917984e76b4bafa699e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 28 Sep 2023 10:56:38 +0700
Subject: [PATCH 671/691] fix esp32 msc example

---
 .../host/cdc_msc_hid_freertos/src/cdc_app.c   |   8 +-
 .../host/cdc_msc_hid_freertos/src/hid_app.c   |   4 +
 examples/host/cdc_msc_hid_freertos/src/main.c |  12 +-
 .../host/cdc_msc_hid_freertos/src/msc_app.c   |   8 +-
 src/class/msc/msc_host.c                      | 265 ++++++++----------
 src/class/msc/msc_host.h                      |   8 +-
 src/host/usbh.c                               |  22 +-
 7 files changed, 151 insertions(+), 176 deletions(-)

diff --git a/examples/host/cdc_msc_hid_freertos/src/cdc_app.c b/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
index 943e534d8..91dcc2e1a 100644
--- a/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
+++ b/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
@@ -31,9 +31,7 @@
 // MACRO TYPEDEF CONSTANT ENUM DECLARATION
 //--------------------------------------------------------------------+
 
-
-//------------- IMPLEMENTATION -------------//
-
+// helper
 size_t get_console_inputs(uint8_t *buf, size_t bufsize) {
   size_t count = 0;
   while (count < bufsize) {
@@ -47,6 +45,10 @@ size_t get_console_inputs(uint8_t *buf, size_t bufsize) {
   return count;
 }
 
+void cdc_app_init(void) {
+  // nothing to do
+}
+
 void cdc_app_task(void* param) {
   (void) param;
 
diff --git a/examples/host/cdc_msc_hid_freertos/src/hid_app.c b/examples/host/cdc_msc_hid_freertos/src/hid_app.c
index a2df3b909..9ea5c1be0 100644
--- a/examples/host/cdc_msc_hid_freertos/src/hid_app.c
+++ b/examples/host/cdc_msc_hid_freertos/src/hid_app.c
@@ -48,6 +48,10 @@ static void process_kbd_report(hid_keyboard_report_t const *report);
 static void process_mouse_report(hid_mouse_report_t const *report);
 static void process_generic_report(uint8_t dev_addr, uint8_t instance, uint8_t const *report, uint16_t len);
 
+void hid_app_init(void) {
+  // nothing to do
+}
+
 //--------------------------------------------------------------------+
 // TinyUSB Callbacks
 //--------------------------------------------------------------------+
diff --git a/examples/host/cdc_msc_hid_freertos/src/main.c b/examples/host/cdc_msc_hid_freertos/src/main.c
index 88e742ee2..b60be015b 100644
--- a/examples/host/cdc_msc_hid_freertos/src/main.c
+++ b/examples/host/cdc_msc_hid_freertos/src/main.c
@@ -82,10 +82,15 @@ StaticTask_t cdc_taskdef;
 TimerHandle_t blinky_tm;
 
 static void led_blinky_cb(TimerHandle_t xTimer);
-static void usb_host_task(void* param);
+extern void cdc_app_init(void);
+extern void hid_app_init(void);
+extern void msc_app_init(void);
 
+static void usb_host_task(void* param);
 extern void cdc_app_task(void* param);
 
+
+
 /*------------- MAIN -------------*/
 int main(void) {
   board_init();
@@ -131,6 +136,10 @@ static void usb_host_task(void *param) {
     board_init_after_tusb();
   }
 
+  cdc_app_init();
+  hid_app_init();
+  msc_app_init();
+
   // RTOS forever loop
   while (1) {
     // put this thread to waiting state until there is new events
@@ -154,7 +163,6 @@ void tuh_umount_cb(uint8_t dev_addr) {
   printf("A device with address %d is unmounted \r\n", dev_addr);
 }
 
-
 //--------------------------------------------------------------------+
 // BLINKING TASK
 //--------------------------------------------------------------------+
diff --git a/examples/host/cdc_msc_hid_freertos/src/msc_app.c b/examples/host/cdc_msc_hid_freertos/src/msc_app.c
index a8d6fbfaa..ee02ba917 100644
--- a/examples/host/cdc_msc_hid_freertos/src/msc_app.c
+++ b/examples/host/cdc_msc_hid_freertos/src/msc_app.c
@@ -25,10 +25,12 @@
 
 #include "tusb.h"
 
-#if CFG_TUH_MSC
-
 static scsi_inquiry_resp_t inquiry_resp;
 
+void msc_app_init(void) {
+  // nothing to do
+}
+
 bool inquiry_complete_cb(uint8_t dev_addr, tuh_msc_complete_data_t const *cb_data) {
   msc_cbw_t const *cbw = cb_data->cbw;
   msc_csw_t const *csw = cb_data->csw;
@@ -63,5 +65,3 @@ void tuh_msc_umount_cb(uint8_t dev_addr) {
   (void) dev_addr;
   printf("A MassStorage device is unmounted\r\n");
 }
-
-#endif
diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c
index da264142c..39f2d9f1c 100644
--- a/src/class/msc/msc_host.c
+++ b/src/class/msc/msc_host.c
@@ -43,16 +43,14 @@
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
-enum
-{
+enum {
   MSC_STAGE_IDLE = 0,
   MSC_STAGE_CMD,
   MSC_STAGE_DATA,
   MSC_STAGE_STATUS,
 };
 
-typedef struct
-{
+typedef struct {
   uint8_t itf_num;
   uint8_t ep_in;
   uint8_t ep_out;
@@ -69,13 +67,13 @@ typedef struct
 
   //------------- SCSI -------------//
   uint8_t stage;
-  void*   buffer;
+  void* buffer;
   tuh_msc_complete_cb_t complete_cb;
   uintptr_t complete_arg;
 
   CFG_TUH_MEM_ALIGN msc_cbw_t cbw;
   CFG_TUH_MEM_ALIGN msc_csw_t csw;
-}msch_interface_t;
+} msch_interface_t;
 
 CFG_TUH_MEM_SECTION static msch_interface_t _msch_itf[CFG_TUH_DEVICE_MAX];
 
@@ -86,40 +84,34 @@ static uint8_t _msch_buffer[sizeof(scsi_inquiry_resp_t)];
 
 // FIXME potential nul reference
 TU_ATTR_ALWAYS_INLINE
-static inline msch_interface_t* get_itf(uint8_t dev_addr)
-{
-  return &_msch_itf[dev_addr-1];
+static inline msch_interface_t* get_itf(uint8_t dev_addr) {
+  return &_msch_itf[dev_addr - 1];
 }
 
 //--------------------------------------------------------------------+
 // PUBLIC API
 //--------------------------------------------------------------------+
-uint8_t tuh_msc_get_maxlun(uint8_t dev_addr)
-{
+uint8_t tuh_msc_get_maxlun(uint8_t dev_addr) {
   msch_interface_t* p_msc = get_itf(dev_addr);
   return p_msc->max_lun;
 }
 
-uint32_t tuh_msc_get_block_count(uint8_t dev_addr, uint8_t lun)
-{
+uint32_t tuh_msc_get_block_count(uint8_t dev_addr, uint8_t lun) {
   msch_interface_t* p_msc = get_itf(dev_addr);
   return p_msc->capacity[lun].block_count;
 }
 
-uint32_t tuh_msc_get_block_size(uint8_t dev_addr, uint8_t lun)
-{
+uint32_t tuh_msc_get_block_size(uint8_t dev_addr, uint8_t lun) {
   msch_interface_t* p_msc = get_itf(dev_addr);
   return p_msc->capacity[lun].block_size;
 }
 
-bool tuh_msc_mounted(uint8_t dev_addr)
-{
+bool tuh_msc_mounted(uint8_t dev_addr) {
   msch_interface_t* p_msc = get_itf(dev_addr);
   return p_msc->mounted;
 }
 
-bool tuh_msc_ready(uint8_t dev_addr)
-{
+bool tuh_msc_ready(uint8_t dev_addr) {
   msch_interface_t* p_msc = get_itf(dev_addr);
   return p_msc->mounted && !usbh_edpt_busy(dev_addr, p_msc->ep_in) && !usbh_edpt_busy(dev_addr, p_msc->ep_out);
 }
@@ -127,20 +119,20 @@ bool tuh_msc_ready(uint8_t dev_addr)
 //--------------------------------------------------------------------+
 // PUBLIC API: SCSI COMMAND
 //--------------------------------------------------------------------+
-static inline void cbw_init(msc_cbw_t *cbw, uint8_t lun)
-{
+static inline void cbw_init(msc_cbw_t* cbw, uint8_t lun) {
   tu_memclr(cbw, sizeof(msc_cbw_t));
   cbw->signature = MSC_CBW_SIGNATURE;
   cbw->tag       = 0x54555342; // TUSB
   cbw->lun       = lun;
 }
 
-bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tuh_msc_complete_cb_t complete_cb, uintptr_t arg)
-{
-  msch_interface_t* p_msc = get_itf(dev_addr);
+bool tuh_msc_scsi_command(uint8_t daddr, msc_cbw_t const* cbw, void* data,
+                          tuh_msc_complete_cb_t complete_cb, uintptr_t arg) {
+  msch_interface_t* p_msc = get_itf(daddr);
   TU_VERIFY(p_msc->configured);
 
-  // TODO claim endpoint
+  // claim endpoint
+  TU_VERIFY(usbh_edpt_claim(daddr, p_msc->ep_out));
 
   p_msc->cbw = *cbw;
   p_msc->stage = MSC_STAGE_CMD;
@@ -148,15 +140,18 @@ bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tu
   p_msc->complete_cb = complete_cb;
   p_msc->complete_arg = arg;
 
-  TU_ASSERT(usbh_edpt_xfer(dev_addr, p_msc->ep_out, (uint8_t*) &p_msc->cbw, sizeof(msc_cbw_t)));
+  if (!usbh_edpt_xfer(daddr, p_msc->ep_out, (uint8_t*) &p_msc->cbw, sizeof(msc_cbw_t))) {
+    usbh_edpt_release(daddr, p_msc->ep_out);
+    return false;
+  }
 
   return true;
 }
 
-bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb, uintptr_t arg)
-{
-   msch_interface_t* p_msc = get_itf(dev_addr);
-   TU_VERIFY(p_msc->configured);
+bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response,
+                           tuh_msc_complete_cb_t complete_cb, uintptr_t arg) {
+  msch_interface_t* p_msc = get_itf(dev_addr);
+  TU_VERIFY(p_msc->configured);
 
   msc_cbw_t cbw;
   cbw_init(&cbw, lun);
@@ -169,8 +164,8 @@ bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_r
   return tuh_msc_scsi_command(dev_addr, &cbw, response, complete_cb, arg);
 }
 
-bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb, uintptr_t arg)
-{
+bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response,
+                     tuh_msc_complete_cb_t complete_cb, uintptr_t arg) {
   msch_interface_t* p_msc = get_itf(dev_addr);
   TU_VERIFY(p_msc->mounted);
 
@@ -181,18 +176,16 @@ bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* respons
   cbw.dir         = TUSB_DIR_IN_MASK;
   cbw.cmd_len     = sizeof(scsi_inquiry_t);
 
-  scsi_inquiry_t const cmd_inquiry =
-  {
-    .cmd_code     = SCSI_CMD_INQUIRY,
-    .alloc_length = sizeof(scsi_inquiry_resp_t)
+  scsi_inquiry_t const cmd_inquiry = {
+      .cmd_code     = SCSI_CMD_INQUIRY,
+      .alloc_length = sizeof(scsi_inquiry_resp_t)
   };
   memcpy(cbw.command, &cmd_inquiry, cbw.cmd_len);
 
   return tuh_msc_scsi_command(dev_addr, &cbw, response, complete_cb, arg);
 }
 
-bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_t complete_cb, uintptr_t arg)
-{
+bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_t complete_cb, uintptr_t arg) {
   msch_interface_t* p_msc = get_itf(dev_addr);
   TU_VERIFY(p_msc->configured);
 
@@ -200,16 +193,16 @@ bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_
   cbw_init(&cbw, lun);
 
   cbw.total_bytes = 0;
-  cbw.dir         = TUSB_DIR_OUT;
-  cbw.cmd_len     = sizeof(scsi_test_unit_ready_t);
-  cbw.command[0]  = SCSI_CMD_TEST_UNIT_READY;
-  cbw.command[1]  = lun; // according to wiki TODO need verification
+  cbw.dir        = TUSB_DIR_OUT;
+  cbw.cmd_len    = sizeof(scsi_test_unit_ready_t);
+  cbw.command[0] = SCSI_CMD_TEST_UNIT_READY;
+  cbw.command[1] = lun; // according to wiki TODO need verification
 
   return tuh_msc_scsi_command(dev_addr, &cbw, NULL, complete_cb, arg);
 }
 
-bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *response, tuh_msc_complete_cb_t complete_cb, uintptr_t arg)
-{
+bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void* response,
+                           tuh_msc_complete_cb_t complete_cb, uintptr_t arg) {
   msc_cbw_t cbw;
   cbw_init(&cbw, lun);
 
@@ -217,73 +210,64 @@ bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *response, tuh_ms
   cbw.dir         = TUSB_DIR_IN_MASK;
   cbw.cmd_len     = sizeof(scsi_request_sense_t);
 
-  scsi_request_sense_t const cmd_request_sense =
-  {
-    .cmd_code     = SCSI_CMD_REQUEST_SENSE,
-    .alloc_length = 18
+  scsi_request_sense_t const cmd_request_sense = {
+      .cmd_code     = SCSI_CMD_REQUEST_SENSE,
+      .alloc_length = 18
   };
-
   memcpy(cbw.command, &cmd_request_sense, cbw.cmd_len);
 
   return tuh_msc_scsi_command(dev_addr, &cbw, response, complete_cb, arg);
 }
 
-bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb, uintptr_t arg)
-{
+bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void* buffer, uint32_t lba, uint16_t block_count,
+                    tuh_msc_complete_cb_t complete_cb, uintptr_t arg) {
   msch_interface_t* p_msc = get_itf(dev_addr);
   TU_VERIFY(p_msc->mounted);
 
   msc_cbw_t cbw;
   cbw_init(&cbw, lun);
 
-  cbw.total_bytes = block_count*p_msc->capacity[lun].block_size;
-  cbw.dir         = TUSB_DIR_IN_MASK;
-  cbw.cmd_len     = sizeof(scsi_read10_t);
+  cbw.total_bytes = block_count * p_msc->capacity[lun].block_size;
+  cbw.dir = TUSB_DIR_IN_MASK;
+  cbw.cmd_len = sizeof(scsi_read10_t);
 
-  scsi_read10_t const cmd_read10 =
-  {
-    .cmd_code    = SCSI_CMD_READ_10,
-    .lba         = tu_htonl(lba),
-    .block_count = tu_htons(block_count)
+  scsi_read10_t const cmd_read10 = {
+      .cmd_code    = SCSI_CMD_READ_10,
+      .lba         = tu_htonl(lba),
+      .block_count = tu_htons(block_count)
   };
-
   memcpy(cbw.command, &cmd_read10, cbw.cmd_len);
 
   return tuh_msc_scsi_command(dev_addr, &cbw, buffer, complete_cb, arg);
 }
 
-bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb, uintptr_t arg)
-{
+bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const* buffer, uint32_t lba, uint16_t block_count,
+                     tuh_msc_complete_cb_t complete_cb, uintptr_t arg) {
   msch_interface_t* p_msc = get_itf(dev_addr);
   TU_VERIFY(p_msc->mounted);
 
   msc_cbw_t cbw;
   cbw_init(&cbw, lun);
 
-  cbw.total_bytes = block_count*p_msc->capacity[lun].block_size;
+  cbw.total_bytes = block_count * p_msc->capacity[lun].block_size;
   cbw.dir         = TUSB_DIR_OUT;
   cbw.cmd_len     = sizeof(scsi_write10_t);
 
-  scsi_write10_t const cmd_write10 =
-  {
-    .cmd_code    = SCSI_CMD_WRITE_10,
-    .lba         = tu_htonl(lba),
-    .block_count = tu_htons(block_count)
+  scsi_write10_t const cmd_write10 = {
+      .cmd_code    = SCSI_CMD_WRITE_10,
+      .lba         = tu_htonl(lba),
+      .block_count = tu_htons(block_count)
   };
-
   memcpy(cbw.command, &cmd_write10, cbw.cmd_len);
 
-  return tuh_msc_scsi_command(dev_addr, &cbw, (void*)(uintptr_t) buffer, complete_cb, arg);
+  return tuh_msc_scsi_command(dev_addr, &cbw, (void*) (uintptr_t) buffer, complete_cb, arg);
 }
 
 #if 0
 // MSC interface Reset (not used now)
-bool tuh_msc_reset(uint8_t dev_addr)
-{
-  tusb_control_request_t const new_request =
-  {
-    .bmRequestType_bit =
-    {
+bool tuh_msc_reset(uint8_t dev_addr) {
+  tusb_control_request_t const new_request = {
+    .bmRequestType_bit = {
       .recipient = TUSB_REQ_RCPT_INTERFACE,
       .type      = TUSB_REQ_TYPE_CLASS,
       .direction = TUSB_DIR_OUT
@@ -300,79 +284,71 @@ bool tuh_msc_reset(uint8_t dev_addr)
 //--------------------------------------------------------------------+
 // CLASS-USBH API
 //--------------------------------------------------------------------+
-void msch_init(void)
-{
+void msch_init(void) {
   tu_memclr(_msch_itf, sizeof(_msch_itf));
 }
 
-void msch_close(uint8_t dev_addr)
-{
-  TU_VERIFY(dev_addr <= CFG_TUH_DEVICE_MAX, );
+void msch_close(uint8_t dev_addr) {
+  TU_VERIFY(dev_addr <= CFG_TUH_DEVICE_MAX,);
   msch_interface_t* p_msc = get_itf(dev_addr);
-  TU_VERIFY(p_msc->configured, );
+  TU_VERIFY(p_msc->configured,);
 
   TU_LOG_DRV("  MSCh close addr = %d\r\n", dev_addr);
 
   // invoke Application Callback
   if (p_msc->mounted) {
-    if(tuh_msc_umount_cb) tuh_msc_umount_cb(dev_addr);
+    if (tuh_msc_umount_cb) tuh_msc_umount_cb(dev_addr);
   }
 
   tu_memclr(p_msc, sizeof(msch_interface_t));
 }
 
-bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes)
-{
+bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes) {
   msch_interface_t* p_msc = get_itf(dev_addr);
   msc_cbw_t const * cbw = &p_msc->cbw;
   msc_csw_t       * csw = &p_msc->csw;
 
-  switch (p_msc->stage)
-  {
+  switch (p_msc->stage) {
     case MSC_STAGE_CMD:
       // Must be Command Block
-      TU_ASSERT(ep_addr == p_msc->ep_out &&  event == XFER_RESULT_SUCCESS && xferred_bytes == sizeof(msc_cbw_t));
+      TU_ASSERT(ep_addr == p_msc->ep_out && event == XFER_RESULT_SUCCESS && xferred_bytes == sizeof(msc_cbw_t));
 
-      if ( cbw->total_bytes && p_msc->buffer )
-      {
+      if (cbw->total_bytes && p_msc->buffer) {
         // Data stage if any
         p_msc->stage = MSC_STAGE_DATA;
-
         uint8_t const ep_data = (cbw->dir & TUSB_DIR_IN_MASK) ? p_msc->ep_in : p_msc->ep_out;
         TU_ASSERT(usbh_edpt_xfer(dev_addr, ep_data, p_msc->buffer, (uint16_t) cbw->total_bytes));
-      }else
-      {
+      } else {
         // Status stage
         p_msc->stage = MSC_STAGE_STATUS;
         TU_ASSERT(usbh_edpt_xfer(dev_addr, p_msc->ep_in, (uint8_t*) &p_msc->csw, (uint16_t) sizeof(msc_csw_t)));
       }
-    break;
+      break;
 
     case MSC_STAGE_DATA:
       // Status stage
       p_msc->stage = MSC_STAGE_STATUS;
       TU_ASSERT(usbh_edpt_xfer(dev_addr, p_msc->ep_in, (uint8_t*) &p_msc->csw, (uint16_t) sizeof(msc_csw_t)));
-    break;
+      break;
 
     case MSC_STAGE_STATUS:
       // SCSI op is complete
       p_msc->stage = MSC_STAGE_IDLE;
 
-      if (p_msc->complete_cb)
-      {
-        tuh_msc_complete_data_t const cb_data =
-        {
-          .cbw = cbw,
-          .csw = csw,
-          .scsi_data = p_msc->buffer,
-          .user_arg = p_msc->complete_arg
+      if (p_msc->complete_cb) {
+        tuh_msc_complete_data_t const cb_data = {
+            .cbw = cbw,
+            .csw = csw,
+            .scsi_data = p_msc->buffer,
+            .user_arg = p_msc->complete_arg
         };
         p_msc->complete_cb(dev_addr, &cb_data);
       }
-    break;
+      break;
 
-    // unknown state
-    default: break;
+      // unknown state
+    default:
+      break;
   }
 
   return true;
@@ -381,39 +357,35 @@ bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32
 //--------------------------------------------------------------------+
 // MSC Enumeration
 //--------------------------------------------------------------------+
-
-static void config_get_maxlun_complete (tuh_xfer_t* xfer);
-static bool config_test_unit_ready_complete(uint8_t dev_addr, tuh_msc_complete_data_t const * cb_data);
+static void config_get_maxlun_complete(tuh_xfer_t* xfer);
+static bool config_test_unit_ready_complete(uint8_t dev_addr, tuh_msc_complete_data_t const* cb_data);
 static bool config_request_sense_complete(uint8_t dev_addr, tuh_msc_complete_data_t const* cb_data);
 static bool config_read_capacity_complete(uint8_t dev_addr, tuh_msc_complete_data_t const* cb_data);
 
-bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *desc_itf, uint16_t max_len)
-{
+bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const* desc_itf, uint16_t max_len) {
   (void) rhport;
   TU_VERIFY (MSC_SUBCLASS_SCSI == desc_itf->bInterfaceSubClass &&
-             MSC_PROTOCOL_BOT  == desc_itf->bInterfaceProtocol);
+             MSC_PROTOCOL_BOT == desc_itf->bInterfaceProtocol);
 
   // msc driver length is fixed
-  uint16_t const drv_len = (uint16_t) (sizeof(tusb_desc_interface_t) + desc_itf->bNumEndpoints * sizeof(tusb_desc_endpoint_t));
+  uint16_t const drv_len = (uint16_t) (sizeof(tusb_desc_interface_t) +
+                                       desc_itf->bNumEndpoints * sizeof(tusb_desc_endpoint_t));
   TU_ASSERT(drv_len <= max_len);
 
   msch_interface_t* p_msc = get_itf(dev_addr);
-  tusb_desc_endpoint_t const * ep_desc = (tusb_desc_endpoint_t const *) tu_desc_next(desc_itf);
+  tusb_desc_endpoint_t const* ep_desc = (tusb_desc_endpoint_t const*) tu_desc_next(desc_itf);
 
-  for(uint32_t i=0; i<2; i++)
-  {
+  for (uint32_t i = 0; i < 2; i++) {
     TU_ASSERT(TUSB_DESC_ENDPOINT == ep_desc->bDescriptorType && TUSB_XFER_BULK == ep_desc->bmAttributes.xfer);
     TU_ASSERT(tuh_edpt_open(dev_addr, ep_desc));
 
-    if ( tu_edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN )
-    {
+    if (TUSB_DIR_IN == tu_edpt_dir(ep_desc->bEndpointAddress)) {
       p_msc->ep_in = ep_desc->bEndpointAddress;
-    }else
-    {
+    } else {
       p_msc->ep_out = ep_desc->bEndpointAddress;
     }
 
-    ep_desc = (tusb_desc_endpoint_t const *) tu_desc_next(ep_desc);
+    ep_desc = (tusb_desc_endpoint_t const*) tu_desc_next(ep_desc);
   }
 
   p_msc->itf_num = desc_itf->bInterfaceNumber;
@@ -430,32 +402,31 @@ bool msch_set_config(uint8_t dev_addr, uint8_t itf_num) {
   //------------- Get Max Lun -------------//
   TU_LOG_DRV("MSC Get Max Lun\r\n");
   tusb_control_request_t const request = {
-    .bmRequestType_bit = {
-      .recipient = TUSB_REQ_RCPT_INTERFACE,
-      .type      = TUSB_REQ_TYPE_CLASS,
-      .direction = TUSB_DIR_IN
-    },
-    .bRequest = MSC_REQ_GET_MAX_LUN,
-    .wValue   = 0,
-    .wIndex   = itf_num,
-    .wLength  = 1
+      .bmRequestType_bit = {
+          .recipient = TUSB_REQ_RCPT_INTERFACE,
+          .type      = TUSB_REQ_TYPE_CLASS,
+          .direction = TUSB_DIR_IN
+      },
+      .bRequest = MSC_REQ_GET_MAX_LUN,
+      .wValue   = 0,
+      .wIndex   = itf_num,
+      .wLength  = 1
   };
 
   tuh_xfer_t xfer = {
-    .daddr       = dev_addr,
-    .ep_addr     = 0,
-    .setup       = &request,
-    .buffer      = _msch_buffer,
-    .complete_cb = config_get_maxlun_complete,
-    .user_data    = 0
+      .daddr       = dev_addr,
+      .ep_addr     = 0,
+      .setup       = &request,
+      .buffer      = _msch_buffer,
+      .complete_cb = config_get_maxlun_complete,
+      .user_data    = 0
   };
   TU_ASSERT(tuh_control_xfer(&xfer));
 
   return true;
 }
 
-static void config_get_maxlun_complete (tuh_xfer_t* xfer)
-{
+static void config_get_maxlun_complete(tuh_xfer_t* xfer) {
   uint8_t const daddr = xfer->daddr;
   msch_interface_t* p_msc = get_itf(daddr);
 
@@ -471,18 +442,16 @@ static void config_get_maxlun_complete (tuh_xfer_t* xfer)
   tuh_msc_test_unit_ready(daddr, lun, config_test_unit_ready_complete, 0);
 }
 
-static bool config_test_unit_ready_complete(uint8_t dev_addr, tuh_msc_complete_data_t const * cb_data)
-{
+static bool config_test_unit_ready_complete(uint8_t dev_addr, tuh_msc_complete_data_t const* cb_data) {
   msc_cbw_t const* cbw = cb_data->cbw;
   msc_csw_t const* csw = cb_data->csw;
 
-  if (csw->status == 0)
-  {
+  if (csw->status == 0) {
     // Unit is ready, read its capacity
     TU_LOG_DRV("SCSI Read Capacity\r\n");
-    tuh_msc_read_capacity(dev_addr, cbw->lun, (scsi_read_capacity10_resp_t*) ((void*) _msch_buffer), config_read_capacity_complete, 0);
-  }else
-  {
+    tuh_msc_read_capacity(dev_addr, cbw->lun, (scsi_read_capacity10_resp_t*) ((void*) _msch_buffer),
+                          config_read_capacity_complete, 0);
+  } else {
     // Note: During enumeration, some device fails Test Unit Ready and require a few retries
     // with Request Sense to start working !!
     // TODO limit number of retries
@@ -493,8 +462,7 @@ static bool config_test_unit_ready_complete(uint8_t dev_addr, tuh_msc_complete_d
   return true;
 }
 
-static bool config_request_sense_complete(uint8_t dev_addr, tuh_msc_complete_data_t const * cb_data)
-{
+static bool config_request_sense_complete(uint8_t dev_addr, tuh_msc_complete_data_t const* cb_data) {
   msc_cbw_t const* cbw = cb_data->cbw;
   msc_csw_t const* csw = cb_data->csw;
 
@@ -503,8 +471,7 @@ static bool config_request_sense_complete(uint8_t dev_addr, tuh_msc_complete_dat
   return true;
 }
 
-static bool config_read_capacity_complete(uint8_t dev_addr, tuh_msc_complete_data_t const * cb_data)
-{
+static bool config_read_capacity_complete(uint8_t dev_addr, tuh_msc_complete_data_t const* cb_data) {
   msc_cbw_t const* cbw = cb_data->cbw;
   msc_csw_t const* csw = cb_data->csw;
 
diff --git a/src/class/msc/msc_host.h b/src/class/msc/msc_host.h
index 6c0e5c9dd..9ca1b4703 100644
--- a/src/class/msc/msc_host.h
+++ b/src/class/msc/msc_host.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_MSC_HOST_H_
-#define _TUSB_MSC_HOST_H_
+#ifndef TUSB_MSC_HOST_H_
+#define TUSB_MSC_HOST_H_
 
 #include "msc.h"
 
@@ -73,7 +73,7 @@ uint32_t tuh_msc_get_block_size(uint8_t dev_addr, uint8_t lun);
 // Perform a full SCSI command (cbw, data, csw) in non-blocking manner.
 // Complete callback is invoked when SCSI op is complete.
 // return true if success, false if there is already pending operation.
-bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tuh_msc_complete_cb_t complete_cb, uintptr_t arg);
+bool tuh_msc_scsi_command(uint8_t daddr, msc_cbw_t const* cbw, void* data, tuh_msc_complete_cb_t complete_cb, uintptr_t arg);
 
 // Perform SCSI Inquiry command
 // Complete callback is invoked when SCSI op is complete.
@@ -123,4 +123,4 @@ bool msch_xfer_cb    (uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, ui
  }
 #endif
 
-#endif /* _TUSB_MSC_HOST_H_ */
+#endif
diff --git a/src/host/usbh.c b/src/host/usbh.c
index e332f35cc..8d75c9726 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -817,6 +817,7 @@ bool usbh_edpt_release(uint8_t dev_addr, uint8_t ep_addr)
 }
 
 // Submit an transfer
+// TODO call usbh_edpt_release if failed
 bool usbh_edpt_xfer_with_callback(uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes,
                                   tuh_xfer_cb_t complete_cb, uintptr_t user_data)
 {
@@ -1713,19 +1714,16 @@ static bool _parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configur
   return true;
 }
 
-void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num)
-{
+void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num) {
   usbh_device_t* dev = get_device(dev_addr);
 
-  for(itf_num++; itf_num < CFG_TUH_INTERFACE_MAX; itf_num++)
-  {
+  for(itf_num++; itf_num < CFG_TUH_INTERFACE_MAX; itf_num++) {
     // continue with next valid interface
     // IAD binding interface such as CDCs should return itf_num + 1 when complete
     // with usbh_driver_set_config_complete()
     uint8_t const drv_id = dev->itf2drv[itf_num];
     usbh_class_driver_t const * driver = get_driver(drv_id);
-    if (driver)
-    {
+    if (driver) {
       TU_LOG_USBH("%s set config: itf = %u\r\n", driver->name, itf_num);
       driver->set_config(dev_addr, itf_num);
       break;
@@ -1733,23 +1731,19 @@ void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num)
   }
 
   // all interface are configured
-  if (itf_num == CFG_TUH_INTERFACE_MAX)
-  {
+  if (itf_num == CFG_TUH_INTERFACE_MAX) {
     enum_full_complete();
 
-    if (is_hub_addr(dev_addr))
-    {
+    if (is_hub_addr(dev_addr)) {
       TU_LOG(CFG_TUH_LOG_LEVEL, "HUB address = %u is mounted\r\n", dev_addr);
-    }else
-    {
+    }else {
       // Invoke callback if available
       if (tuh_mount_cb) tuh_mount_cb(dev_addr);
     }
   }
 }
 
-static void enum_full_complete(void)
-{
+static void enum_full_complete(void) {
   // mark enumeration as complete
   _dev0.enumerating = 0;
 

From 7dc1a66f917408992cf672009a307f7200a3fd32 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 28 Sep 2023 11:12:22 +0700
Subject: [PATCH 672/691] esp32 cdc host with max3421 work well

---
 .../host/cdc_msc_hid_freertos/src/cdc_app.c   | 44 ++++++++++++++++---
 examples/host/cdc_msc_hid_freertos/src/main.c | 16 ++-----
 hw/bsp/espressif/boards/family.c              | 20 +++++++--
 3 files changed, 58 insertions(+), 22 deletions(-)

diff --git a/examples/host/cdc_msc_hid_freertos/src/cdc_app.c b/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
index 91dcc2e1a..6ff513be1 100644
--- a/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
+++ b/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
@@ -27,9 +27,43 @@
 #include "tusb.h"
 #include "bsp/board_api.h"
 
+#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
+// ESP-IDF need "freertos/" prefix in include path.
+// CFG_TUSB_OS_INC_PATH should be defined accordingly.
+  #include "freertos/FreeRTOS.h"
+  #include "freertos/semphr.h"
+  #include "freertos/queue.h"
+  #include "freertos/task.h"
+  #include "freertos/timers.h"
+
+  #define CDC_STACK_SZIE      2048
+#else
+  #include "FreeRTOS.h"
+  #include "semphr.h"
+  #include "queue.h"
+  #include "task.h"
+  #include "timers.h"
+
+  #define CDC_STACK_SZIE     (3*configMINIMAL_STACK_SIZE/2)
+#endif
+
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM DECLARATION
 //--------------------------------------------------------------------+
+#if configSUPPORT_STATIC_ALLOCATION
+StackType_t  cdc_stack[CDC_STACK_SZIE];
+StaticTask_t cdc_taskdef;
+#endif
+
+static void cdc_app_task(void* param);
+
+void cdc_app_init(void) {
+  #if configSUPPORT_STATIC_ALLOCATION
+  xTaskCreateStatic(cdc_app_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, cdc_stack, &cdc_taskdef);
+  #else
+  xTaskCreate(cdc_app_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, NULL);
+  #endif
+}
 
 // helper
 size_t get_console_inputs(uint8_t *buf, size_t bufsize) {
@@ -45,11 +79,7 @@ size_t get_console_inputs(uint8_t *buf, size_t bufsize) {
   return count;
 }
 
-void cdc_app_init(void) {
-  // nothing to do
-}
-
-void cdc_app_task(void* param) {
+static void cdc_app_task(void* param) {
   (void) param;
 
   uint8_t buf[64 + 1]; // +1 for extra null character
@@ -74,6 +104,10 @@ void cdc_app_task(void* param) {
   }
 }
 
+//--------------------------------------------------------------------+
+// TinyUSB Callbacks
+//--------------------------------------------------------------------+
+
 // Invoked when received new data
 void tuh_cdc_rx_cb(uint8_t idx) {
   uint8_t buf[64 + 1]; // +1 for extra null character
diff --git a/examples/host/cdc_msc_hid_freertos/src/main.c b/examples/host/cdc_msc_hid_freertos/src/main.c
index b60be015b..691ff3e29 100644
--- a/examples/host/cdc_msc_hid_freertos/src/main.c
+++ b/examples/host/cdc_msc_hid_freertos/src/main.c
@@ -40,7 +40,6 @@
   #include "freertos/timers.h"
 
   #define USBH_STACK_SIZE     4096
-  #define CDC_STACK_SZIE      2048
 #else
   #include "FreeRTOS.h"
   #include "semphr.h"
@@ -50,7 +49,6 @@
 
   // Increase stack size when debug log is enabled
   #define USBH_STACK_SIZE    (3*configMINIMAL_STACK_SIZE/2) * (CFG_TUSB_DEBUG ? 2 : 1)
-  #define CDC_STACK_SZIE     (3*configMINIMAL_STACK_SIZE/2)
 #endif
 
 
@@ -74,38 +72,30 @@ StaticTimer_t blinky_tmdef;
 
 StackType_t  usb_host_stack[USBH_STACK_SIZE];
 StaticTask_t usb_host_taskdef;
-
-StackType_t  cdc_stack[CDC_STACK_SZIE];
-StaticTask_t cdc_taskdef;
 #endif
 
 TimerHandle_t blinky_tm;
 
 static void led_blinky_cb(TimerHandle_t xTimer);
+static void usb_host_task(void* param);
+
 extern void cdc_app_init(void);
 extern void hid_app_init(void);
 extern void msc_app_init(void);
 
-static void usb_host_task(void* param);
-extern void cdc_app_task(void* param);
-
-
-
 /*------------- MAIN -------------*/
 int main(void) {
   board_init();
 
   printf("TinyUSB Host CDC MSC HID with FreeRTOS Example\r\n");
 
-  // Create soft timer for blinky, task for tinyusb stack and CDC
+  // Create soft timer for blinky, task for tinyusb stack
 #if configSUPPORT_STATIC_ALLOCATION
   blinky_tm = xTimerCreateStatic(NULL, pdMS_TO_TICKS(BLINK_MOUNTED), true, NULL, led_blinky_cb, &blinky_tmdef);
   xTaskCreateStatic(usb_host_task, "usbh", USBH_STACK_SIZE, NULL, configMAX_PRIORITIES-1, usb_host_stack, &usb_host_taskdef);
-  xTaskCreateStatic(cdc_app_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, cdc_stack, &cdc_taskdef);
 #else
   blinky_tm = xTimerCreate(NULL, pdMS_TO_TICKS(BLINK_NOT_MOUNTED), true, NULL, led_blinky_cb);
   xTaskCreate(usb_host_task, "usbd", USBH_STACK_SIZE, NULL, configMAX_PRIORITIES-1, NULL);
-  xTaskCreate(cdc_app_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, NULL);
 #endif
 
   xTimerStart(blinky_tm, 0);
diff --git a/hw/bsp/espressif/boards/family.c b/hw/bsp/espressif/boards/family.c
index 4d2cab9e8..e45765fd1 100644
--- a/hw/bsp/espressif/boards/family.c
+++ b/hw/bsp/espressif/boards/family.c
@@ -41,6 +41,8 @@
   #include "driver/periph_ctrl.h"
 #endif
 
+#define UART_ID  UART_NUM_0
+
 #ifdef NEOPIXEL_PIN
 #include "led_strip.h"
 static led_strip_t *strip;
@@ -59,6 +61,17 @@ static void configure_pins(usb_hal_context_t *usb);
 
 // Initialize on-board peripherals : led, button, uart and USB
 void board_init(void) {
+  // uart init
+  uart_config_t uart_config = {
+      .baud_rate = 115200,
+      .data_bits = UART_DATA_8_BITS,
+      .parity = UART_PARITY_DISABLE,
+      .stop_bits = UART_STOP_BITS_1,
+      .flow_ctrl = UART_HW_FLOWCTRL_DISABLE
+  };
+  uart_driver_install(UART_ID, 1024, 0, 0, NULL, 0);
+  uart_param_config(UART_ID, &uart_config);
+
 #ifdef NEOPIXEL_PIN
   #ifdef NEOPIXEL_POWER_PIN
   gpio_reset_pin(NEOPIXEL_POWER_PIN);
@@ -144,7 +157,7 @@ uint32_t board_button_read(void) {
 
 // Get characters from UART
 int board_uart_read(uint8_t *buf, int len) {
-  return uart_read_bytes(UART_NUM_0, buf, len, 0);
+  return uart_read_bytes(UART_ID, buf, len, 0);
 }
 
 // Send characters to UART
@@ -155,9 +168,8 @@ int board_uart_write(void const *buf, int len) {
 }
 
 int board_getchar(void) {
-//  char c;
-//  return (uart_read_bytes(UART_NUM_0, &c, 1, 0) > 0) ? (int) c : (-1);
-  return -1;
+  char c;
+  return (uart_read_bytes(UART_ID, &c, 1, 0) > 0) ? (int) c : (-1);
 }
 
 //--------------------------------------------------------------------+

From 6b8933cfe838b369c58d4fc9ced8aa5c9382a6d6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 28 Sep 2023 12:55:59 +0700
Subject: [PATCH 673/691] fix build with new freertos host example

---
 examples/device/cdc_msc_freertos/Makefile     |   2 -
 examples/host/bare_api/Makefile               |  10 -
 examples/host/cdc_msc_hid/Makefile            |  10 -
 examples/host/cdc_msc_hid_freertos/Makefile   |  18 +-
 .../src/FreeRTOSConfig/FreeRTOSConfig.h       | 215 ++++++++++++++++++
 examples/host/hid_controller/Makefile         |  10 -
 examples/host/msc_file_explorer/Makefile      |  10 -
 hw/bsp/lpc17/family.mk                        |   4 +-
 src/portable/analog/max3421/hcd_max3421.c     |   4 +-
 src/tinyusb.mk                                |   7 +
 10 files changed, 237 insertions(+), 53 deletions(-)
 create mode 100644 examples/host/cdc_msc_hid_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h

diff --git a/examples/device/cdc_msc_freertos/Makefile b/examples/device/cdc_msc_freertos/Makefile
index 3ac62a79c..84c833fb5 100644
--- a/examples/device/cdc_msc_freertos/Makefile
+++ b/examples/device/cdc_msc_freertos/Makefile
@@ -1,5 +1,3 @@
-DEPS_SUBMODULES += lib/FreeRTOS-Kernel
-
 include ../../make.mk
 
 FREERTOS_SRC = lib/FreeRTOS-Kernel
diff --git a/examples/host/bare_api/Makefile b/examples/host/bare_api/Makefile
index 058307c40..161f8c774 100644
--- a/examples/host/bare_api/Makefile
+++ b/examples/host/bare_api/Makefile
@@ -10,14 +10,4 @@ EXAMPLE_SOURCE += \
 
 SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
 
-# TinyUSB Host Stack source
-SRC_C += \
-	src/class/cdc/cdc_host.c \
-	src/class/hid/hid_host.c \
-	src/class/msc/msc_host.c \
-	src/host/hub.c \
-	src/host/usbh.c \
-	src/portable/ohci/ohci.c \
-	src/portable/nxp/lpc17_40/hcd_lpc17_40.c
-
 include ../../rules.mk
diff --git a/examples/host/cdc_msc_hid/Makefile b/examples/host/cdc_msc_hid/Makefile
index 7c16b39d3..15b8a5b31 100644
--- a/examples/host/cdc_msc_hid/Makefile
+++ b/examples/host/cdc_msc_hid/Makefile
@@ -13,14 +13,4 @@ EXAMPLE_SOURCE = \
 
 SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
 
-# TinyUSB Host Stack source
-SRC_C += \
-	src/class/cdc/cdc_host.c \
-	src/class/hid/hid_host.c \
-	src/class/msc/msc_host.c \
-	src/host/hub.c \
-	src/host/usbh.c \
-	src/portable/ohci/ohci.c \
-	src/portable/nxp/lpc17_40/hcd_lpc17_40.c
-
 include ../../rules.mk
diff --git a/examples/host/cdc_msc_hid_freertos/Makefile b/examples/host/cdc_msc_hid_freertos/Makefile
index 67bb6da55..a9670b4f2 100644
--- a/examples/host/cdc_msc_hid_freertos/Makefile
+++ b/examples/host/cdc_msc_hid_freertos/Makefile
@@ -5,6 +5,7 @@ FREERTOS_PORTABLE_PATH= $(FREERTOS_SRC)/portable/$(if $(USE_IAR),IAR,GCC)
 
 INC += \
 	src \
+	src/FreeRTOSConfig \
 	$(TOP)/hw \
 	$(TOP)/$(FREERTOS_SRC)/include \
 	$(TOP)/$(FREERTOS_PORTABLE_SRC) \
@@ -19,14 +20,15 @@ EXAMPLE_SOURCE = \
 
 SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
 
-# TinyUSB Host Stack source
+# FreeRTOS source, all files in port folder
 SRC_C += \
-	src/class/cdc/cdc_host.c \
-	src/class/hid/hid_host.c \
-	src/class/msc/msc_host.c \
-	src/host/hub.c \
-	src/host/usbh.c \
-	src/portable/ohci/ohci.c \
-	src/portable/nxp/lpc17_40/hcd_lpc17_40.c
+	$(FREERTOS_SRC)/list.c \
+	$(FREERTOS_SRC)/queue.c \
+	$(FREERTOS_SRC)/tasks.c \
+	$(FREERTOS_SRC)/timers.c \
+	$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORTABLE_SRC)/*.c))
+
+SRC_S += \
+	$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORTABLE_SRC)/*.s))
 
 include ../../rules.mk
diff --git a/examples/host/cdc_msc_hid_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h b/examples/host/cdc_msc_hid_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..a1fc8bb09
--- /dev/null
+++ b/examples/host/cdc_msc_hid_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,215 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+
+// Include MCU header
+#include "bsp/board_mcu.h"
+
+#if CFG_TUSB_MCU == OPT_MCU_ESP32S2 || CFG_TUSB_MCU == OPT_MCU_ESP32S3
+  #error "ESP32-Sx should use IDF's FreeRTOSConfig.h"
+#endif
+
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wredundant-decls"
+#endif
+
+// TODO fix later
+// FIXME cause redundant-decls warnings
+#if CFG_TUSB_MCU == OPT_MCU_MM32F327X
+  extern u32 SystemCoreClock;
+#else
+  extern uint32_t SystemCoreClock;
+#endif
+
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU								        0
+#define configENABLE_FPU								        1
+#define configENABLE_TRUSTZONE					        0
+#define configMINIMAL_SECURE_STACK_SIZE					( 1024 )
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      0
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+#ifdef __RX__
+/* Renesas RX series */
+#define vSoftwareInterruptISR					        INT_Excep_ICU_SWINT
+#define vTickISR								              INT_Excep_CMT0_CMI0
+#define configPERIPHERAL_CLOCK_HZ				      (configCPU_CLOCK_HZ/2)
+#define configKERNEL_INTERRUPT_PRIORITY			  1
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY	4
+
+#else
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+#if defined(__NVIC_PRIO_BITS)
+  // For Cortex-M specific: __NVIC_PRIO_BITS is defined in core_cmx.h
+	#define configPRIO_BITS       __NVIC_PRIO_BITS
+
+#elif defined(__ECLIC_INTCTLBITS)
+  // RISC-V Bumblebee core from nuclei
+  #define configPRIO_BITS       __ECLIC_INTCTLBITS
+
+#elif defined(__IASMARM__)
+  // FIXME: IAR Assembler cannot include mcu header directly to get __NVIC_PRIO_BITS.
+  // Therefore we will hard coded it to minimum value of 2 to get pass ci build.
+  // IAR user must update this to correct value of the target MCU
+  #message "configPRIO_BITS is hard coded to 2 to pass IAR build only. User should update it per MCU"
+  #define configPRIO_BITS       2
+
+#else
+  #error "FreeRTOS configPRIO_BITS to be defined"
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
+
+#endif /* __FREERTOS_CONFIG__H */
diff --git a/examples/host/hid_controller/Makefile b/examples/host/hid_controller/Makefile
index cda2977bc..e7f603f25 100644
--- a/examples/host/hid_controller/Makefile
+++ b/examples/host/hid_controller/Makefile
@@ -11,14 +11,4 @@ EXAMPLE_SOURCE += \
 
 SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
 
-# TinyUSB Host Stack source
-SRC_C += \
-	src/class/cdc/cdc_host.c \
-	src/class/hid/hid_host.c \
-	src/class/msc/msc_host.c \
-	src/host/hub.c \
-	src/host/usbh.c \
-	src/portable/ohci/ohci.c \
-	src/portable/nxp/lpc17_40/hcd_lpc17_40.c
-
 include ../../rules.mk
diff --git a/examples/host/msc_file_explorer/Makefile b/examples/host/msc_file_explorer/Makefile
index 1fda72b18..8319d3c2b 100644
--- a/examples/host/msc_file_explorer/Makefile
+++ b/examples/host/msc_file_explorer/Makefile
@@ -24,14 +24,4 @@ SRC_C += \
 # suppress warning caused by fatfs
 CFLAGS += -Wno-error=cast-qual
 
-# TinyUSB Host Stack source
-SRC_C += \
-	src/class/cdc/cdc_host.c \
-	src/class/hid/hid_host.c \
-	src/class/msc/msc_host.c \
-	src/host/hub.c \
-	src/host/usbh.c \
-	src/portable/ohci/ohci.c \
-	src/portable/nxp/lpc17_40/hcd_lpc17_40.c
-
 include ../../rules.mk
diff --git a/hw/bsp/lpc17/family.mk b/hw/bsp/lpc17/family.mk
index abf6abe13..44b406d90 100644
--- a/hw/bsp/lpc17/family.mk
+++ b/hw/bsp/lpc17/family.mk
@@ -22,6 +22,8 @@ MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x
 
 SRC_C += \
 	src/portable/nxp/lpc17_40/dcd_lpc17_40.c \
+	src/portable/ohci/ohci.c \
+	src/portable/nxp/lpc17_40/hcd_lpc17_40.c \
 	$(MCU_DIR)/../gcc/cr_startup_lpc175x_6x.c \
 	$(MCU_DIR)/src/chip_17xx_40xx.c \
 	$(MCU_DIR)/src/clock_17xx_40xx.c \
@@ -29,7 +31,7 @@ SRC_C += \
 	$(MCU_DIR)/src/iocon_17xx_40xx.c \
 	$(MCU_DIR)/src/sysctl_17xx_40xx.c \
 	$(MCU_DIR)/src/sysinit_17xx_40xx.c \
-	$(MCU_DIR)/src/uart_17xx_40xx.c
+	$(MCU_DIR)/src/uart_17xx_40xx.c \
 
 INC += \
 	$(TOP)/$(MCU_DIR)/inc
diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index 6613956de..77912a4c9 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -428,8 +428,8 @@ bool hcd_init(uint8_t rhport) {
   reg_write(rhport, PINCTL_ADDR, PINCTL_FDUPSPI, false);
 
   // V1 is 0x01, V2 is 0x12, V3 is 0x13
-  uint8_t const revision = reg_read(rhport, REVISION_ADDR, false);
-  TU_LOG2_HEX(revision);
+//  uint8_t const revision = reg_read(rhport, REVISION_ADDR, false);
+//  TU_LOG2_HEX(revision);
 
   // reset
   reg_write(rhport, USBCTL_ADDR, USBCTL_CHIPRES, false);
diff --git a/src/tinyusb.mk b/src/tinyusb.mk
index 85052f90f..89ea0212c 100644
--- a/src/tinyusb.mk
+++ b/src/tinyusb.mk
@@ -17,3 +17,10 @@ TINYUSB_SRC_C += \
 	src/class/usbtmc/usbtmc_device.c \
 	src/class/video/video_device.c \
 	src/class/vendor/vendor_device.c \
+  src/host/usbh.c \
+  src/host/hub.c \
+  src/class/cdc/cdc_host.c \
+  src/class/hid/hid_host.c \
+  src/class/msc/msc_host.c \
+  src/class/vendor/vendor_host.c \
+  src/typec/usbc.c \

From 8348631bf538e2aa0a433ed6e7df9e42bb39bdd5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 28 Sep 2023 16:15:31 +0700
Subject: [PATCH 674/691] improve esp32 ci, build esp32 with -DDMAX3421_HOST=1
 for max3421 testing revert change in hcd.h

---
 .github/workflows/build_esp.yml               | 21 +------
 .../boards/espressif_s3_devkitm/board.h       |  8 +++
 src/host/hcd.h                                |  3 -
 tools/build_esp32.py                          | 61 +++++++++++--------
 4 files changed, 44 insertions(+), 49 deletions(-)

diff --git a/.github/workflows/build_esp.yml b/.github/workflows/build_esp.yml
index 29585cb36..897616f09 100644
--- a/.github/workflows/build_esp.yml
+++ b/.github/workflows/build_esp.yml
@@ -29,12 +29,10 @@ jobs:
       fail-fast: false
       matrix:
         board:
-        # Alphabetical order
         # ESP32-S2
-        - 'espressif_saola_1'
+        - 'espressif_kaluga_1'
         # ESP32-S3
-        #- 'espressif_s3_devkitm'
-        # S3 compile error with "dangerous relocation: call8: call target out of range: memcpy"
+        - 'espressif_s3_devkitm'
 
     steps:
     - name: Setup Python
@@ -48,20 +46,5 @@ jobs:
     - name: Checkout TinyUSB
       uses: actions/checkout@v3
 
-    - name: Checkout hathach/linkermap
-      uses: actions/checkout@v3
-      with:
-         repository: hathach/linkermap
-         path: linkermap
-
     - name: Build
       run: docker run --rm -v $PWD:/project -w /project espressif/idf:latest python3 tools/build_esp32.py ${{ matrix.board }}
-
-    - name: Linker Map
-      run: |
-        pip install linkermap/
-        # find -quit to only print linkermap of 1 board per example
-        for ex in `ls -d examples/device/*/`
-        do
-          find ${ex} -maxdepth 3 -name *.map -print -quit | xargs -I % sh -c 'echo "::group::%"; linkermap -v %; echo "::endgroup::"'
-        done
diff --git a/hw/bsp/espressif/boards/espressif_s3_devkitm/board.h b/hw/bsp/espressif/boards/espressif_s3_devkitm/board.h
index fe33b5c43..4b4151e72 100644
--- a/hw/bsp/espressif/boards/espressif_s3_devkitm/board.h
+++ b/hw/bsp/espressif/boards/espressif_s3_devkitm/board.h
@@ -36,6 +36,14 @@
 #define BUTTON_PIN            0
 #define BUTTON_STATE_ACTIVE   0
 
+// SPI for USB host shield
+#define MAX3421_SPI_HOST  SPI2_HOST
+#define MAX3421_SCK_PIN  36
+#define MAX3421_MOSI_PIN 35
+#define MAX3421_MISO_PIN 37
+#define MAX3421_CS_PIN   15
+#define MAX3421_INTR_PIN 14
+
 #ifdef __cplusplus
  }
 #endif
diff --git a/src/host/hcd.h b/src/host/hcd.h
index edffb34cb..2bde289df 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -133,9 +133,6 @@ bool hcd_init(uint8_t rhport);
 // Interrupt Handler
 void hcd_int_handler(uint8_t rhport, bool in_isr);
 
-// Interrupt Hanndler (extended version)
-void hcd_int_handler_ext(uint8_t rhport, bool in_isr);
-
 // Enable USB interrupt
 void hcd_int_enable (uint8_t rhport);
 
diff --git a/tools/build_esp32.py b/tools/build_esp32.py
index 00783bf58..1f73d3b22 100644
--- a/tools/build_esp32.py
+++ b/tools/build_esp32.py
@@ -17,8 +17,8 @@ exit_status = 0
 
 total_time = time.monotonic()
 
-build_format = '| {:23} | {:30} | {:18} | {:7} | {:6} | {:6} |'
-build_separator = '-' * 100
+build_format = '| {:30} | {:30} | {:18} | {:7} | {:6} | {:6} |'
+build_separator = '-' * 107
 
 def filter_with_input(mylist):
     if len(sys.argv) > 1:
@@ -26,12 +26,9 @@ def filter_with_input(mylist):
         if len(input_args) > 0:
             mylist[:] = input_args
 
+
 # Build all examples if not specified
-all_examples = []
-for entry in os.scandir("examples/device"):
-    # Only includes example with CMakeLists.txt for esp32s, and skip board_test to speed up ci
-    if entry.is_dir() and os.path.exists(entry.path + "/sdkconfig.defaults") and entry.name != 'board_test':
-        all_examples.append(entry.name)
+all_examples = [entry.replace('examples/', '') for entry in glob.glob("examples/*/*_freertos")]
 filter_with_input(all_examples)
 all_examples.sort()
 
@@ -46,32 +43,41 @@ all_boards.sort()
 def build_board(example, board):
     global success_count, fail_count, skip_count, exit_status
     start_time = time.monotonic()
+
+    # Check if board is skipped
+    build_dir = f"cmake-build/cmake-build-{board}/{example}"
+
+    # Generate and build
+    r = subprocess.run(f"cmake examples/{example} -B {build_dir} -G \"Ninja\" -DBOARD={board} -DMAX3421_HOST=1",
+                       shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+    if r.returncode == 0:
+        r = subprocess.run(f"cmake --build {build_dir}", shell=True, stdout=subprocess.PIPE,
+                           stderr=subprocess.STDOUT)
+    build_duration = time.monotonic() - start_time
     flash_size = "-"
     sram_size = "-"
 
-    # Check if board is skipped
-    if build_utils.skip_example(example, board):
-        success = SKIPPED
-        skip_count += 1
-        print(build_format.format(example, board, success, '-', flash_size, sram_size))
+    if r.returncode == 0:
+        success = SUCCEEDED
+        success_count += 1
+        #(flash_size, sram_size) = build_size(example, board)
     else:
-        subprocess.run("make -C examples/device/{} BOARD={} clean".format(example, board), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
-        build_result = subprocess.run("make -j -C examples/device/{} BOARD={} all".format(example, board), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+        exit_status = r.returncode
+        success = FAILED
+        fail_count += 1
 
-        if build_result.returncode == 0:
-            success = SUCCEEDED
-            success_count += 1
-            (flash_size, sram_size) = build_size(example, board)
-        else:
-            exit_status = build_result.returncode
-            success = FAILED
-            fail_count += 1
+    title = build_format.format(example, board, success, "{:.2f}s".format(build_duration), flash_size, sram_size)
+    if os.getenv('CI'):
+        # always print build output if in CI
+        print(f"::group::{title}")
+        print(r.stdout.decode("utf-8"))
+        print(f"::endgroup::")
+    else:
+        # print build output if failed
+        print(title)
+        if r.returncode != 0:
+            print(r.stdout.decode("utf-8"))
 
-        build_duration = time.monotonic() - start_time
-        print(build_format.format(example, board, success, "{:.2f}s".format(build_duration), flash_size, sram_size))
-
-        if build_result.returncode != 0:
-            print(build_result.stdout.decode("utf-8"))
 
 def build_size(example, board):
     #elf_file = 'examples/device/{}/_build/{}/{}-firmware.elf'.format(example, board, board)
@@ -82,6 +88,7 @@ def build_size(example, board):
     sram_size = int(size_list[1]) + int(size_list[2])
     return (flash_size, sram_size)
 
+
 print(build_separator)
 print(build_format.format('Example', 'Board', '\033[39mResult\033[0m', 'Time', 'Flash', 'SRAM'))
 print(build_separator)

From f36e0b7b923f632fbcc65373d77e0e127f03aace Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 3 Oct 2023 16:27:35 +0700
Subject: [PATCH 675/691] esp32 comment out uart, increase max3421 spi speed to
 26mhz

---
 .idea/cmake.xml                  | 18 +++++++++---------
 hw/bsp/espressif/boards/family.c | 14 +++++++++++---
 2 files changed, 20 insertions(+), 12 deletions(-)

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index c6ebf2a46..9721af5ea 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -9,7 +9,7 @@
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
-      <configuration PROFILE_NAME="kaluga" ENABLED="true" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=espressif_kaluga_1 -DMAX3421_HOST=1 -DLOG=2">
+      <configuration PROFILE_NAME="kaluga" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=espressif_kaluga_1 -DMAX3421_HOST=1 -DLOG=2">
         <ADDITIONAL_GENERATION_ENVIRONMENT>
           <envs>
             <env name="ESPBAUD" value="1500000" />
@@ -54,16 +54,16 @@
       <configuration PROFILE_NAME="ra6m5 PORT0" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=ra6m5_ek -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1 -DPORT=0" />
       <configuration PROFILE_NAME="uno_r4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=uno_r4 -DLOG=4 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="portenta_c33" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=portenta_c33 -DLOG=3" />
-      <configuration PROFILE_NAME="metro_m4_express" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m4_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
+      <configuration PROFILE_NAME="metro_m4_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m4_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
       <configuration PROFILE_NAME="metro_m0_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m0_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
-      <configuration PROFILE_NAME="stm32u5" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32u575eval" />
+      <configuration PROFILE_NAME="stm32u5" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32u575eval" />
       <configuration PROFILE_NAME="metro esp32s2" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=adafruit_metro_esp32s2 -DMAX3421_HOST=1 -DLOG=2">
-            <ADDITIONAL_GENERATION_ENVIRONMENT>
-                <envs>
-                    <env name="ESPBAUD" value="1500000" />
-                </envs>
-            </ADDITIONAL_GENERATION_ENVIRONMENT>
-        </configuration>
+        <ADDITIONAL_GENERATION_ENVIRONMENT>
+          <envs>
+            <env name="ESPBAUD" value="1500000" />
+          </envs>
+        </ADDITIONAL_GENERATION_ENVIRONMENT>
+      </configuration>
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/hw/bsp/espressif/boards/family.c b/hw/bsp/espressif/boards/family.c
index e45765fd1..c6a592627 100644
--- a/hw/bsp/espressif/boards/family.c
+++ b/hw/bsp/espressif/boards/family.c
@@ -41,6 +41,8 @@
   #include "driver/periph_ctrl.h"
 #endif
 
+// Note; current code use UART0 can cause device to reset while monitoring
+#define USE_UART  0
 #define UART_ID  UART_NUM_0
 
 #ifdef NEOPIXEL_PIN
@@ -61,6 +63,7 @@ static void configure_pins(usb_hal_context_t *usb);
 
 // Initialize on-board peripherals : led, button, uart and USB
 void board_init(void) {
+#if USE_UART
   // uart init
   uart_config_t uart_config = {
       .baud_rate = 115200,
@@ -71,6 +74,7 @@ void board_init(void) {
   };
   uart_driver_install(UART_ID, 1024, 0, 0, NULL, 0);
   uart_param_config(UART_ID, &uart_config);
+#endif
 
 #ifdef NEOPIXEL_PIN
   #ifdef NEOPIXEL_POWER_PIN
@@ -157,7 +161,11 @@ uint32_t board_button_read(void) {
 
 // Get characters from UART
 int board_uart_read(uint8_t *buf, int len) {
+#if USE_UART
   return uart_read_bytes(UART_ID, buf, len, 0);
+#else
+  return -1;
+#endif
 }
 
 // Send characters to UART
@@ -168,8 +176,8 @@ int board_uart_write(void const *buf, int len) {
 }
 
 int board_getchar(void) {
-  char c;
-  return (uart_read_bytes(UART_ID, &c, 1, 0) > 0) ? (int) c : (-1);
+  uint8_t c = 0;
+  return board_uart_read(&c, 1) > 0 ? (int) c : (-1);
 }
 
 //--------------------------------------------------------------------+
@@ -224,7 +232,7 @@ static void max3421_init(void) {
 
   spi_device_interface_config_t max3421_cfg = {
       .mode = 0,
-      .clock_speed_hz = 4000000, // 26000000
+      .clock_speed_hz = 26000000,
       .spics_io_num = -1, // manual control CS
       .queue_size = 1
   };

From 67e34267a68c81f62ff315ac990f07a60f4dc93c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 4 Oct 2023 18:00:32 +0700
Subject: [PATCH 676/691] change tuh_max3421_spi_xfer_api() signature

tested working with sam d21 and d51, not tested with nrf52, seem not
working with esp32
---
 hw/bsp/espressif/boards/family.c          | 39 ++++++++++++++---------
 hw/bsp/nrf/family.c                       | 20 ++++++++----
 hw/bsp/samd21/family.c                    | 27 +++++++++-------
 hw/bsp/samd51/family.c                    | 35 +++++++++++---------
 src/portable/analog/max3421/hcd_max3421.c | 27 +++++++++-------
 5 files changed, 88 insertions(+), 60 deletions(-)

diff --git a/hw/bsp/espressif/boards/family.c b/hw/bsp/espressif/boards/family.c
index c6a592627..912ca5f35 100644
--- a/hw/bsp/espressif/boards/family.c
+++ b/hw/bsp/espressif/boards/family.c
@@ -38,7 +38,9 @@
 #if ESP_IDF_VERSION_MAJOR > 4
   #include "esp_private/periph_ctrl.h"
 #else
+
   #include "driver/periph_ctrl.h"
+
 #endif
 
 // Note; current code use UART0 can cause device to reset while monitoring
@@ -46,16 +48,21 @@
 #define UART_ID  UART_NUM_0
 
 #ifdef NEOPIXEL_PIN
+
 #include "led_strip.h"
-static led_strip_t *strip;
+
+static led_strip_t* strip;
 #endif
 
 #if CFG_TUH_ENABLED && CFG_TUH_MAX3421
+
 #include "driver/spi_master.h"
+
 static void max3421_init(void);
+
 #endif
 
-static void configure_pins(usb_hal_context_t *usb);
+static void configure_pins(usb_hal_context_t* usb);
 
 //--------------------------------------------------------------------+
 // Implementation
@@ -115,11 +122,11 @@ void board_init(void) {
 #endif
 }
 
-static void configure_pins(usb_hal_context_t *usb) {
+static void configure_pins(usb_hal_context_t* usb) {
   /* usb_periph_iopins currently configures USB_OTG as USB Device.
    * Introduce additional parameters in usb_hal_context_t when adding support
    * for USB Host. */
-  for (const usb_iopin_dsc_t *iopin = usb_periph_iopins; iopin->pin != -1; ++iopin) {
+  for (const usb_iopin_dsc_t* iopin = usb_periph_iopins; iopin->pin != -1; ++iopin) {
     if ((usb->use_external_phy) || (iopin->ext_phy_only == 0)) {
       esp_rom_gpio_pad_select_gpio(iopin->pin);
       if (iopin->is_output) {
@@ -160,7 +167,7 @@ uint32_t board_button_read(void) {
 }
 
 // Get characters from UART
-int board_uart_read(uint8_t *buf, int len) {
+int board_uart_read(uint8_t* buf, int len) {
 #if USE_UART
   return uart_read_bytes(UART_ID, buf, len, 0);
 #else
@@ -169,7 +176,7 @@ int board_uart_read(uint8_t *buf, int len) {
 }
 
 // Send characters to UART
-int board_uart_write(void const *buf, int len) {
+int board_uart_write(void const* buf, int len) {
   (void) buf;
   (void) len;
   return 0;
@@ -216,7 +223,7 @@ static void max3421_init(void) {
   gpio_set_level(MAX3421_CS_PIN, 1);
 
   // SPI
-  spi_bus_config_t buscfg={
+  spi_bus_config_t buscfg = {
       .miso_io_num = MAX3421_MISO_PIN,
       .mosi_io_num = MAX3421_MOSI_PIN,
       .sclk_io_num = MAX3421_SCK_PIN,
@@ -228,7 +235,7 @@ static void max3421_init(void) {
       .data7_io_num = -1,
       .max_transfer_sz = 1024
   };
-  ESP_ERROR_CHECK( spi_bus_initialize(MAX3421_SPI_HOST, &buscfg, SPI_DMA_CH_AUTO) );
+  ESP_ERROR_CHECK(spi_bus_initialize(MAX3421_SPI_HOST, &buscfg, SPI_DMA_CH_AUTO));
 
   spi_device_interface_config_t max3421_cfg = {
       .mode = 0,
@@ -236,7 +243,7 @@ static void max3421_init(void) {
       .spics_io_num = -1, // manual control CS
       .queue_size = 1
   };
-  ESP_ERROR_CHECK( spi_bus_add_device(MAX3421_SPI_HOST, &max3421_cfg, &max3421_spi) );
+  ESP_ERROR_CHECK(spi_bus_add_device(MAX3421_SPI_HOST, &max3421_cfg, &max3421_spi));
 
   // debug
   gpio_set_direction(13, GPIO_MODE_OUTPUT);
@@ -244,7 +251,7 @@ static void max3421_init(void) {
 
   // Interrupt pin
   max3421_intr_sem = xSemaphoreCreateBinary();
-  xTaskCreate(max3421_intr_task, "max3421 intr", 2048, NULL, configMAX_PRIORITIES-2, NULL);
+  xTaskCreate(max3421_intr_task, "max3421 intr", 2048, NULL, configMAX_PRIORITIES - 2, NULL);
 
   gpio_set_direction(MAX3421_INTR_PIN, GPIO_MODE_INPUT);
   gpio_set_intr_type(MAX3421_INTR_PIN, GPIO_INTR_NEGEDGE);
@@ -267,18 +274,20 @@ void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
   gpio_set_level(MAX3421_CS_PIN, active ? 0 : 1);
 }
 
-bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_len, uint8_t *rx_buf, size_t rx_len) {
+bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const* tx_buf, uint8_t* rx_buf, size_t xfer_bytes) {
   (void) rhport;
 
-  if (tx_len == 0) {
+  if (tx_buf == NULL) {
     // fifo read, transmit rx_buf as dummy
     tx_buf = rx_buf;
-    tx_len = rx_len;
   }
 
+  // length in bits
+  size_t const len_bits = xfer_bytes << 3;
+
   spi_transaction_t xact = {
-      .length = tx_len << 3, // length in bits
-      .rxlength = rx_len << 3, // length in bits
+      .length = len_bits,
+      .rxlength = rx_buf ? len_bits : 0,
       .tx_buffer = tx_buf,
       .rx_buffer = rx_buf
   };
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 631f53fcd..c431389f3 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -95,7 +95,9 @@ TU_ATTR_UNUSED static void power_event_handler(nrfx_power_usb_evt_t event) {
 
 //------------- Host using MAX2341E -------------//
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
+
 static void max3421_init(void);
+
 static nrfx_spim_t _spi = NRFX_SPIM_INSTANCE(1);
 #endif
 
@@ -203,15 +205,15 @@ uint32_t board_button_read(void) {
   return BUTTON_STATE_ACTIVE == nrf_gpio_pin_read(BUTTON_PIN);
 }
 
-int board_uart_read(uint8_t *buf, int len) {
+int board_uart_read(uint8_t* buf, int len) {
   (void) buf;
   (void) len;
   return 0;
 //  return NRFX_SUCCESS == nrfx_uart_rx(&_uart_id, buf, (size_t) len) ? len : 0;
 }
 
-int board_uart_write(void const *buf, int len) {
-  return (NRFX_SUCCESS == nrfx_uarte_tx(&_uart_id, (uint8_t const *) buf, (size_t) len)) ? len : 0;
+int board_uart_write(void const* buf, int len) {
+  return (NRFX_SUCCESS == nrfx_uarte_tx(&_uart_id, (uint8_t const*) buf, (size_t) len)) ? len : 0;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
@@ -323,6 +325,7 @@ static void max3421_init(void) {
   nrfx_gpiote_trigger_enable(MAX3421_INTR_PIN, true);
 }
 
+// API to enable/disable MAX3421 INTR pin interrupt
 void tuh_max3421_int_api(uint8_t rhport, bool enabled) {
   (void) rhport;
 
@@ -335,22 +338,25 @@ void tuh_max3421_int_api(uint8_t rhport, bool enabled) {
   }
 }
 
+// API to control MAX3421 SPI CS
 void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
   (void) rhport;
   nrf_gpio_pin_write(MAX3421_CS_PIN, active ? 0 : 1);
 }
 
-bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_len, uint8_t *rx_buf, size_t rx_len) {
+// API to transfer data with MAX3421 SPI
+// Either tx_buf or rx_buf can be NULL, which means transfer is write or read only
+bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const* tx_buf, uint8_t* rx_buf, size_t xfer_bytes) {
   (void) rhport;
 
   nrfx_spim_xfer_desc_t xfer = {
       .p_tx_buffer = tx_buf,
-      .tx_length   = tx_len,
+      .tx_length   = tx_buf ? xfer_bytes : 0,
       .p_rx_buffer = rx_buf,
-      .rx_length   = rx_len,
+      .rx_length   = rx_buf ? xfer_bytes : 0,
   };
 
-  return (nrfx_spim_xfer(&_spi, &xfer, 0) == NRFX_SUCCESS);
+  return nrfx_spim_xfer(&_spi, &xfer, 0) == NRFX_SUCCESS;
 }
 
 #endif
diff --git a/hw/bsp/samd21/family.c b/hw/bsp/samd21/family.c
index b9365fc3f..ccb2c99b1 100644
--- a/hw/bsp/samd21/family.c
+++ b/hw/bsp/samd21/family.c
@@ -72,6 +72,7 @@ static void uart_init(void);
 #define MAX3421_SERCOM TU_XSTRCAT(SERCOM, MAX3421_SERCOM_ID)
 
 static void max3421_init(void);
+
 #endif
 
 void board_init(void) {
@@ -237,13 +238,13 @@ int board_uart_write(void const * buf, int len)
 static void uart_init(void) {
 }
 
-int board_uart_read(uint8_t *buf, int len) {
+int board_uart_read(uint8_t* buf, int len) {
   (void) buf;
   (void) len;
   return 0;
 }
 
-int board_uart_write(void const *buf, int len) {
+int board_uart_write(void const* buf, int len) {
   (void) buf;
   (void) len;
   return 0;
@@ -261,6 +262,7 @@ void SysTick_Handler(void) {
 uint32_t board_millis(void) {
   return system_ticks;
 }
+
 #endif
 
 //--------------------------------------------------------------------+
@@ -278,8 +280,8 @@ static void max3421_init(void) {
 
   // Configure GCLK for SERCOM
 //  GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID_SERCOM4_CORE | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN;
-  GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(GCLK_CLKCTRL_ID_SERCOM0_CORE_Val+MAX3421_SERCOM_ID) |
-      GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN;
+  GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(GCLK_CLKCTRL_ID_SERCOM0_CORE_Val + MAX3421_SERCOM_ID) |
+                      GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN;
   while (GCLK->STATUS.bit.SYNCBUSY);
 
   Sercom* sercom = MAX3421_SERCOM;
@@ -293,7 +295,7 @@ static void max3421_init(void) {
 
   // Set up SPI in master mode, MSB first, SPI mode 0
   sercom->SPI.CTRLA.reg = SERCOM_SPI_CTRLA_DOPO(MAX3421_TX_PAD) | SERCOM_SPI_CTRLA_DIPO(MAX3421_RX_PAD) |
-      SERCOM_SPI_CTRLA_MODE(3);
+                          SERCOM_SPI_CTRLA_MODE(3);
 
   sercom->SPI.CTRLB.reg = SERCOM_SPI_CTRLB_CHSIZE(0) | SERCOM_SPI_CTRLB_RXEN;
   while (sercom->SPI.SYNCBUSY.bit.CTRLB == 1);
@@ -366,6 +368,7 @@ void EIC_Handler(void) {
   tuh_int_handler(1, true);
 }
 
+// API to enable/disable MAX3421 INTR pin interrupt
 void tuh_max3421_int_api(uint8_t rhport, bool enabled) {
   (void) rhport;
 
@@ -376,24 +379,26 @@ void tuh_max3421_int_api(uint8_t rhport, bool enabled) {
   }
 }
 
+// API to control MAX3421 SPI CS
 void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
   (void) rhport;
   gpio_set_pin_level(MAX3421_CS_PIN, active ? 0 : 1);
 }
 
-bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_len, uint8_t *rx_buf, size_t rx_len) {
+// API to transfer data with MAX3421 SPI
+// Either tx_buf or rx_buf can be NULL, which means transfer is write or read only
+bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const* tx_buf, uint8_t* rx_buf, size_t xfer_bytes) {
   (void) rhport;
 
   Sercom* sercom = MAX3421_SERCOM;
 
-  size_t count = 0;
-  while (count < tx_len || count < rx_len) {
+  for (size_t count = 0; count < xfer_bytes; count++) {
     // Wait for the transmit buffer to be empty
     while (!sercom->SPI.INTFLAG.bit.DRE);
 
     // Write data to be transmitted
     uint8_t data = 0x00;
-    if (count < tx_len) {
+    if (tx_buf) {
       data = tx_buf[count];
     }
 
@@ -404,11 +409,9 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_l
 
     // Read received data
     data = (uint8_t) sercom->SPI.DATA.reg;
-    if (count < rx_len) {
+    if (rx_buf) {
       rx_buf[count] = data;
     }
-
-    count++;
   }
 
   // wait for bus idle and clear flags
diff --git a/hw/bsp/samd51/family.c b/hw/bsp/samd51/family.c
index 4d43c7745..bca18e1a2 100644
--- a/hw/bsp/samd51/family.c
+++ b/hw/bsp/samd51/family.c
@@ -81,6 +81,7 @@ void USB_3_Handler(void) {
 #define MAX3421_EIC_Handler TU_XSTRCAT3(EIC_, MAX3421_INTR_EIC_ID, _Handler)
 
 static void max3421_init(void);
+
 #endif
 
 void board_init(void) {
@@ -153,13 +154,13 @@ uint32_t board_button_read(void) {
   return gpio_get_pin_level(BUTTON_PIN) ? 0 : 1;
 }
 
-int board_uart_read(uint8_t *buf, int len) {
+int board_uart_read(uint8_t* buf, int len) {
   (void) buf;
   (void) len;
   return 0;
 }
 
-int board_uart_write(void const *buf, int len) {
+int board_uart_write(void const* buf, int len) {
   (void) buf;
   (void) len;
   return 0;
@@ -175,6 +176,7 @@ void SysTick_Handler(void) {
 uint32_t board_millis(void) {
   return system_ticks;
 }
+
 #endif
 
 //--------------------------------------------------------------------+
@@ -189,7 +191,7 @@ static void max3421_init(void) {
   uint32_t const baudrate = 12000000u;
 
   struct {
-    volatile uint32_t *mck_apb;
+    volatile uint32_t* mck_apb;
     uint32_t mask;
     uint8_t gclk_id_core;
     uint8_t gclk_id_slow;
@@ -214,8 +216,10 @@ static void max3421_init(void) {
   *sercom_clock[MAX3421_SERCOM_ID].mck_apb |= sercom_clock[MAX3421_SERCOM_ID].mask;
 
   // Configure GCLK for SERCOM
-  GCLK->PCHCTRL[sercom_clock[MAX3421_SERCOM_ID].gclk_id_core].reg = GCLK_PCHCTRL_GEN_GCLK0_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
-  GCLK->PCHCTRL[sercom_clock[MAX3421_SERCOM_ID].gclk_id_slow].reg = GCLK_PCHCTRL_GEN_GCLK3_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
+  GCLK->PCHCTRL[sercom_clock[MAX3421_SERCOM_ID].gclk_id_core].reg =
+      GCLK_PCHCTRL_GEN_GCLK0_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
+  GCLK->PCHCTRL[sercom_clock[MAX3421_SERCOM_ID].gclk_id_slow].reg =
+      GCLK_PCHCTRL_GEN_GCLK3_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
 
   // Disable the SPI module
   sercom->SPI.CTRLA.bit.ENABLE = 0;
@@ -226,7 +230,7 @@ static void max3421_init(void) {
 
   // Set up SPI in master mode, MSB first, SPI mode 0
   sercom->SPI.CTRLA.reg = SERCOM_SPI_CTRLA_DOPO(MAX3421_TX_PAD) | SERCOM_SPI_CTRLA_DIPO(MAX3421_RX_PAD) |
-      SERCOM_SPI_CTRLA_MODE(3);
+                          SERCOM_SPI_CTRLA_MODE(3);
 
   sercom->SPI.CTRLB.reg = SERCOM_SPI_CTRLB_CHSIZE(0) | SERCOM_SPI_CTRLB_RXEN;
   while (sercom->SPI.SYNCBUSY.bit.CTRLB == 1);
@@ -278,9 +282,9 @@ static void max3421_init(void) {
   while (EIC->SYNCBUSY.bit.ENABLE);
 
   // Configure EIC to trigger on falling edge
-  volatile uint32_t * eic_config;
+  volatile uint32_t* eic_config;
   uint8_t sense_shift;
-  if ( MAX3421_INTR_EIC_ID < 8 ) {
+  if (MAX3421_INTR_EIC_ID < 8) {
     eic_config = &EIC->CONFIG[0].reg;
     sense_shift = MAX3421_INTR_EIC_ID * 4;
   } else {
@@ -312,6 +316,7 @@ void MAX3421_EIC_Handler(void) {
   tuh_int_handler(1, true);
 }
 
+// API to enable/disable MAX3421 INTR pin interrupt
 void tuh_max3421_int_api(uint8_t rhport, bool enabled) {
   (void) rhport;
 
@@ -323,24 +328,26 @@ void tuh_max3421_int_api(uint8_t rhport, bool enabled) {
   }
 }
 
+// API to control MAX3421 SPI CS
 void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
   (void) rhport;
   gpio_set_pin_level(MAX3421_CS_PIN, active ? 0 : 1);
 }
 
-bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_len, uint8_t *rx_buf, size_t rx_len) {
+// API to transfer data with MAX3421 SPI
+// Either tx_buf or rx_buf can be NULL, which means transfer is write or read only
+bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const* tx_buf, uint8_t* rx_buf, size_t xfer_bytes) {
   (void) rhport;
 
   Sercom* sercom = MAX3421_SERCOM;
 
-  size_t count = 0;
-  while (count < tx_len || count < rx_len) {
+  for (size_t count = 0; count < xfer_bytes; count++) {
     // Wait for the transmit buffer to be empty
     while (!sercom->SPI.INTFLAG.bit.DRE);
 
     // Write data to be transmitted
     uint8_t data = 0x00;
-    if (count < tx_len) {
+    if (tx_buf) {
       data = tx_buf[count];
     }
 
@@ -351,11 +358,9 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_l
 
     // Read received data
     data = (uint8_t) sercom->SPI.DATA.reg;
-    if (count < rx_len) {
+    if (rx_buf) {
       rx_buf[count] = data;
     }
-
-    count++;
   }
 
   // wait for bus idle and clear flags
diff --git a/src/portable/analog/max3421/hcd_max3421.c b/src/portable/analog/max3421/hcd_max3421.c
index 77912a4c9..787c1e511 100644
--- a/src/portable/analog/max3421/hcd_max3421.c
+++ b/src/portable/analog/max3421/hcd_max3421.c
@@ -210,16 +210,21 @@ static max3421_data_t _hcd_data;
 // API: SPI transfer with MAX3421E, must be implemented by application
 //--------------------------------------------------------------------+
 
-void tuh_max3421_spi_cs_api(uint8_t rhport, bool active);
-bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const * tx_buf, size_t tx_len, uint8_t * rx_buf, size_t rx_len);
-void tuh_max3421_int_api(uint8_t rhport, bool enabled);
+// API to control MAX3421 SPI CS
+extern void tuh_max3421_spi_cs_api(uint8_t rhport, bool active);
 
-static void handle_connect_irq(uint8_t rhport, bool in_isr);
-static inline void hirq_write(uint8_t rhport, uint8_t data, bool in_isr);
+// API to transfer data with MAX3421 SPI
+// Either tx_buf or rx_buf can be NULL, which means transfer is write or read only
+extern bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const* tx_buf, uint8_t* rx_buf, size_t xfer_bytes);
+
+// API to enable/disable MAX3421 INTR pin interrupt
+extern void tuh_max3421_int_api(uint8_t rhport, bool enabled);
 
 //--------------------------------------------------------------------+
 // SPI Helper
 //--------------------------------------------------------------------+
+static void handle_connect_irq(uint8_t rhport, bool in_isr);
+static inline void hirq_write(uint8_t rhport, uint8_t data, bool in_isr);
 
 static void max3421_spi_lock(uint8_t rhport, bool in_isr) {
   // disable interrupt and mutex lock (for pre-emptive RTOS) if not in_isr
@@ -249,9 +254,9 @@ static void fifo_write(uint8_t rhport, uint8_t reg, uint8_t const * buffer, uint
 
   max3421_spi_lock(rhport, in_isr);
 
-  tuh_max3421_spi_xfer_api(rhport, &reg, 1, &hirq, 1);
+  tuh_max3421_spi_xfer_api(rhport, &reg, &hirq, 1);
   _hcd_data.hirq = hirq;
-  tuh_max3421_spi_xfer_api(rhport, buffer, len, NULL, 0);
+  tuh_max3421_spi_xfer_api(rhport, buffer, NULL, len);
 
   max3421_spi_unlock(rhport, in_isr);
 
@@ -263,9 +268,9 @@ static void fifo_read(uint8_t rhport, uint8_t * buffer, uint16_t len, bool in_is
 
   max3421_spi_lock(rhport, in_isr);
 
-  tuh_max3421_spi_xfer_api(rhport, &reg, 1, &hirq, 1);
+  tuh_max3421_spi_xfer_api(rhport, &reg, &hirq, 1);
   _hcd_data.hirq = hirq;
-  tuh_max3421_spi_xfer_api(rhport, NULL, 0, buffer, len);
+  tuh_max3421_spi_xfer_api(rhport, NULL, buffer, len);
 
   max3421_spi_unlock(rhport, in_isr);
 }
@@ -276,7 +281,7 @@ static void reg_write(uint8_t rhport, uint8_t reg, uint8_t data, bool in_isr) {
 
   max3421_spi_lock(rhport, in_isr);
 
-  tuh_max3421_spi_xfer_api(rhport, tx_buf, 2, rx_buf, 2);
+  tuh_max3421_spi_xfer_api(rhport, tx_buf, rx_buf, 2);
 
   max3421_spi_unlock(rhport, in_isr);
 
@@ -290,7 +295,7 @@ static uint8_t reg_read(uint8_t rhport, uint8_t reg, bool in_isr) {
 
   max3421_spi_lock(rhport, in_isr);
 
-  bool ret = tuh_max3421_spi_xfer_api(rhport, tx_buf, 2, rx_buf, 2);
+  bool ret = tuh_max3421_spi_xfer_api(rhport, tx_buf, rx_buf, 2);
 
   max3421_spi_unlock(rhport, in_isr);
 

From cfb683f48178966a7386538c1082e5aa6ebf53f4 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 5 Oct 2023 17:01:41 +0700
Subject: [PATCH 677/691] tested with nrf52840 and esp32s2

---
 hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake | 4 ++--
 hw/bsp/nrf/boards/feather_nrf52840_express/board.h     | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake b/hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake
index ce6da8b43..726438d05 100644
--- a/hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake
+++ b/hw/bsp/nrf/boards/feather_nrf52840_express/board.cmake
@@ -1,6 +1,6 @@
 set(MCU_VARIANT nrf52840)
-#set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/nrf52840_s140_v6.ld)
-set(LD_FILE_GNU ${NRFX_DIR}/mdk/nrf52840_xxaa.ld)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/nrf52840_s140_v6.ld)
+#set(LD_FILE_GNU ${NRFX_DIR}/mdk/nrf52840_xxaa.ld)
 
 # enable max3421 host driver for this board
 set(MAX3421_HOST 1)
diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/board.h b/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
index 76100a14a..3d59516d8 100644
--- a/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
+++ b/hw/bsp/nrf/boards/feather_nrf52840_express/board.h
@@ -49,8 +49,8 @@
 #define MAX3421_SCK_PIN  14
 #define MAX3421_MOSI_PIN 13
 #define MAX3421_MISO_PIN 15
-#define MAX3421_CS_PIN   27
-#define MAX3421_INTR_PIN 26
+#define MAX3421_CS_PIN   27 // D10
+#define MAX3421_INTR_PIN 26 // D9
 
 #ifdef __cplusplus
  }

From 8b2cb63da88c0f790fee8d514971153569993b05 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Tue, 10 Oct 2023 18:22:20 +0200
Subject: [PATCH 678/691] Fix naming nBytesPerSample.

---
 src/class/audio/audio_device.c | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 46fd6dfa9..5d3772a9d 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -631,9 +631,9 @@ static bool audiod_rx_done_cb(uint8_t rhport, audiod_function_t* audio, uint16_t
 // Decoding according to 2.3.1.5 Audio Streams
 
 // Helper function
-static inline void * audiod_interleaved_copy_bytes_fast_decode(uint16_t const nBytesToCopy, void * dst, const void * dst_end, void * src, uint8_t const n_ff_used)
+static inline void * audiod_interleaved_copy_bytes_fast_decode(uint16_t const nBytesPerSample, void * dst, const void * dst_end, void * src, uint8_t const n_ff_used)
 {
-  // Due to one FIFO contains 2 channels, data always aligned to (nBytesToCopy * 2)
+  // Due to one FIFO contains 2 channels, data always aligned to (nBytesPerSample * 2)
   uint16_t * dst16 = dst;
   uint16_t * src16 = src;
   const uint16_t * dst_end16 = dst_end;
@@ -641,7 +641,7 @@ static inline void * audiod_interleaved_copy_bytes_fast_decode(uint16_t const nB
   uint32_t * src32 = src;
   const uint32_t * dst_end32 = dst_end;
 
-  if (nBytesToCopy == 1)
+  if (nBytesPerSample == 1)
   {
     while(dst16 < dst_end16)
     {
@@ -650,7 +650,7 @@ static inline void * audiod_interleaved_copy_bytes_fast_decode(uint16_t const nB
     }
     return src16;
   }
-  else if (nBytesToCopy == 2)
+  else if (nBytesPerSample == 2)
   {
     while(dst32 < dst_end32)
     {
@@ -659,7 +659,7 @@ static inline void * audiod_interleaved_copy_bytes_fast_decode(uint16_t const nB
     }
     return src32;
   }
-  else if (nBytesToCopy == 3)
+  else if (nBytesPerSample == 3)
   {
     while(dst16 < dst_end16)
     {
@@ -670,7 +670,7 @@ static inline void * audiod_interleaved_copy_bytes_fast_decode(uint16_t const nB
     }
     return src16;
   }
-  else // nBytesToCopy == 4
+  else // nBytesPerSample == 4
   {
     while(dst32 < dst_end32)
     {
@@ -926,9 +926,9 @@ range [-1, +1)
  * */
 
 // Helper function
-static inline void * audiod_interleaved_copy_bytes_fast_encode(uint16_t const nBytesToCopy, void * src, const void * src_end, void * dst, uint8_t const n_ff_used)
+static inline void * audiod_interleaved_copy_bytes_fast_encode(uint16_t const nBytesPerSample, void * src, const void * src_end, void * dst, uint8_t const n_ff_used)
 {
-  // Due to one FIFO contains 2 channels, data always aligned to (nBytesToCopy * 2)
+  // Due to one FIFO contains 2 channels, data always aligned to (nBytesPerSample * 2)
   uint16_t * dst16 = dst;
   uint16_t * src16 = src;
   const uint16_t * src_end16 = src_end;
@@ -936,7 +936,7 @@ static inline void * audiod_interleaved_copy_bytes_fast_encode(uint16_t const nB
   uint32_t * src32 = src;
   const uint32_t * src_end32 = src_end;
 
-  if (nBytesToCopy == 1)
+  if (nBytesPerSample == 1)
   {
     while(src16 < src_end16)
     {
@@ -945,7 +945,7 @@ static inline void * audiod_interleaved_copy_bytes_fast_encode(uint16_t const nB
     }
     return dst16;
   }
-  else if (nBytesToCopy == 2)
+  else if (nBytesPerSample == 2)
   {
     while(src32 < src_end32)
     {
@@ -954,7 +954,7 @@ static inline void * audiod_interleaved_copy_bytes_fast_encode(uint16_t const nB
     }
     return dst32;
   }
-  else if (nBytesToCopy == 3)
+  else if (nBytesPerSample == 3)
   {
     while(src16 < src_end16)
     {
@@ -965,7 +965,7 @@ static inline void * audiod_interleaved_copy_bytes_fast_encode(uint16_t const nB
     }
     return dst16;
   }
-  else // nBytesToCopy == 4
+  else // nBytesPerSample == 4
   {
     while(src32 < src_end32)
     {

From 2ba760a1c16dc096da9f96f20cf2443e3a1d8416 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Tue, 10 Oct 2023 18:24:47 +0200
Subject: [PATCH 679/691] Enhance audio_4_channel_mic example, plot 4 different
 waves for each channel.

---
 .../device/audio_4_channel_mic/src/main.c     | 43 +++++++++++--------
 .../audio_4_channel_mic/src/tusb_config.h     |  3 +-
 2 files changed, 26 insertions(+), 20 deletions(-)

diff --git a/examples/device/audio_4_channel_mic/src/main.c b/examples/device/audio_4_channel_mic/src/main.c
index 94ac86d84..3b21b4ac6 100644
--- a/examples/device/audio_4_channel_mic/src/main.c
+++ b/examples/device/audio_4_channel_mic/src/main.c
@@ -34,17 +34,16 @@
 #include <stdlib.h>
 #include <stdio.h>
 #include <string.h>
+#include "arm_math.h"
 
 #include "bsp/board_api.h"
 #include "tusb.h"
+#include "tusb_config.h"
 
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF PROTYPES
 //--------------------------------------------------------------------+
-
-#ifndef AUDIO_SAMPLE_RATE
-#define AUDIO_SAMPLE_RATE   48000
-#endif
+#define AUDIO_SAMPLE_RATE   CFG_TUD_AUDIO_FUNC_1_SAMPLE_RATE
 
 /* Blink pattern
  * - 250 ms  : device not mounted
@@ -70,7 +69,7 @@ uint8_t clkValid;
 audio_control_range_2_n_t(1) volumeRng[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX+1]; 			// Volume range state
 audio_control_range_4_n_t(1) sampleFreqRng; 						// Sample frequency range state
 
-// Audio test data
+// Audio test data, each buffer contains 2 channels, buffer[0] for CH0-1, buffer[1] for CH1-2
 uint16_t i2s_dummy_buffer[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ/2];   // Ensure half word aligned
 
 void led_blinking_task(void);
@@ -400,7 +399,8 @@ bool tud_audio_tx_done_pre_load_cb(uint8_t rhport, uint8_t itf, uint8_t ep_in, u
   (void) ep_in;
   (void) cur_alt_setting;
 
-  for (uint8_t cnt=0; cnt < CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO; cnt++)
+  // Write buffer[0] (CH0-1) and buffer[1] (CH1-2) into FIFO
+  for (uint8_t cnt=0; cnt < 2; cnt++)
   {
     tud_audio_write_support_ff(cnt, i2s_dummy_buffer[cnt], AUDIO_SAMPLE_RATE/1000 * CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX * CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_TX);
   }
@@ -416,22 +416,27 @@ bool tud_audio_tx_done_post_load_cb(uint8_t rhport, uint16_t n_bytes_copied, uin
   (void) ep_in;
   (void) cur_alt_setting;
 
-  uint16_t dataVal;
-
   // Generate dummy data
-  for (uint16_t cnt = 0; cnt < CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO; cnt++)
+  uint16_t * p_buff = i2s_dummy_buffer[0];
+  uint16_t dataVal = 1;
+  for (uint16_t cnt = 0; cnt < AUDIO_SAMPLE_RATE/1000; cnt++)
   {
-    uint16_t * p_buff = i2s_dummy_buffer[cnt];              // 2 bytes per sample
-    dataVal = 1;
-    for (uint16_t cnt2 = 0; cnt2 < AUDIO_SAMPLE_RATE/1000; cnt2++)
-    {
-      for (uint8_t cnt3 = 0; cnt3 < CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_TX; cnt3++)
-      {
-        *p_buff++ = dataVal;
-      }
-      dataVal++;
-    }
+    // CH0 saw wave
+    *p_buff++ = dataVal;
+    // CH1 inverted saw wave
+    *p_buff++ = 60 + AUDIO_SAMPLE_RATE/1000 - dataVal;
+    dataVal++;
   }
+  p_buff = i2s_dummy_buffer[1];
+  for (uint16_t cnt = 0; cnt < AUDIO_SAMPLE_RATE/1000; cnt++)
+  {
+    // CH3 square wave
+    *p_buff++ = cnt < (AUDIO_SAMPLE_RATE/1000/2) ? 120:170;
+    // CH4 sinus wave
+    q15_t t = 0x7FFF * cnt / (AUDIO_SAMPLE_RATE/1000);
+    *p_buff++ = arm_sin_q15(t) / 1300 + 200;
+  }
+
   return true;
 }
 
diff --git a/examples/device/audio_4_channel_mic/src/tusb_config.h b/examples/device/audio_4_channel_mic/src/tusb_config.h
index 5cf6d07c3..291ac4f79 100644
--- a/examples/device/audio_4_channel_mic/src/tusb_config.h
+++ b/examples/device/audio_4_channel_mic/src/tusb_config.h
@@ -103,6 +103,7 @@ extern "C" {
 //--------------------------------------------------------------------
 
 // Have a look into audio_device.h for all configurations
+#define CFG_TUD_AUDIO_FUNC_1_SAMPLE_RATE              48000
 
 #define CFG_TUD_AUDIO_FUNC_1_DESC_LEN                 TUD_AUDIO_MIC_FOUR_CH_DESC_LEN
 
@@ -112,7 +113,7 @@ extern "C" {
 #define CFG_TUD_AUDIO_ENABLE_EP_IN                    1
 #define CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX    2         // This value is not required by the driver, it parses this information from the descriptor once the alternate interface is set by the host - we use it for the setup
 #define CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX            4         // This value is not required by the driver, it parses this information from the descriptor once the alternate interface is set by the host - we use it for the setup
-#define CFG_TUD_AUDIO_EP_SZ_IN                        (48 + 1) * CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX * CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX      // 48 Samples (48 kHz) x 2 Bytes/Sample x CFG_TUD_AUDIO_N_CHANNELS_TX Channels - the Windows driver always needs an extra sample per channel of space more, otherwise it complains... found by trial and error
+#define CFG_TUD_AUDIO_EP_SZ_IN                        TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX)
 #define CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX             CFG_TUD_AUDIO_EP_SZ_IN
 #define CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ          CFG_TUD_AUDIO_EP_SZ_IN
 

From 20699e30dd7847a7177d91dc76791248a788f3dc Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Tue, 10 Oct 2023 18:25:14 +0200
Subject: [PATCH 680/691] Enhance plot script.

---
 .../device/audio_4_channel_mic/src/plot_audio_samples.py   | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/examples/device/audio_4_channel_mic/src/plot_audio_samples.py b/examples/device/audio_4_channel_mic/src/plot_audio_samples.py
index 8312b4e28..a3a2b2fd4 100644
--- a/examples/device/audio_4_channel_mic/src/plot_audio_samples.py
+++ b/examples/device/audio_4_channel_mic/src/plot_audio_samples.py
@@ -10,7 +10,7 @@ if __name__ == '__main__':
     # print(sd.query_devices())
 
     fs = 48000  		# Sample rate
-    duration = 100e-3   # Duration of recording
+    duration = 20e-3   # Duration of recording
 
     if platform.system() == 'Windows':
         # WDM-KS is needed since there are more than one MicNode device APIs (at least in Windows)
@@ -25,9 +25,14 @@ if __name__ == '__main__':
     sd.wait()  # Wait until recording is finished
     print('Done!')
 
+
     time = np.arange(0, duration, 1 / fs)  # time vector
+    # strip starting zero
+    myrecording = myrecording[100:]
+    time = time[100:]
     plt.plot(time, myrecording)
     plt.xlabel('Time [s]')
     plt.ylabel('Amplitude')
     plt.title('MicNode 4 Channel')
+    plt.legend(['CH-1', 'CH-2', 'CH-3','CH-4'])
     plt.show()

From 504d29cf7ae9f40a56c73a2e666564b9b4ab9efd Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Tue, 10 Oct 2023 18:25:42 +0200
Subject: [PATCH 681/691] Update make & cmake file.

---
 examples/device/audio_4_channel_mic/CMakeLists.txt |  7 +++++++
 examples/device/audio_4_channel_mic/Makefile       | 11 ++++++++++-
 2 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/examples/device/audio_4_channel_mic/CMakeLists.txt b/examples/device/audio_4_channel_mic/CMakeLists.txt
index f61e1b640..ae6bf0142 100644
--- a/examples/device/audio_4_channel_mic/CMakeLists.txt
+++ b/examples/device/audio_4_channel_mic/CMakeLists.txt
@@ -23,9 +23,16 @@ target_sources(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
   )
 
+# CMSIS sources
+target_sources(${PROJECT} PUBLIC
+  ${TOP}/lib/CMSIS_5/CMSIS/DSP/Source/CommonTables/arm_common_tables.c
+  ${TOP}/lib/CMSIS_5/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c
+  )
+
 # Example include
 target_include_directories(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
+  ${TOP}/lib/CMSIS_5/CMSIS/DSP/Include
   )
 
 # Configure compilation flags and libraries for the example without RTOS.
diff --git a/examples/device/audio_4_channel_mic/Makefile b/examples/device/audio_4_channel_mic/Makefile
index 2a3d854fb..97e4118c0 100644
--- a/examples/device/audio_4_channel_mic/Makefile
+++ b/examples/device/audio_4_channel_mic/Makefile
@@ -3,9 +3,18 @@ include ../../make.mk
 INC += \
   src \
   $(TOP)/hw \
+  $(TOP)/lib/CMSIS_5/CMSIS/DSP/Include \
 
 # Example source
-EXAMPLE_SOURCE += $(wildcard src/*.c)
+EXAMPLE_SOURCE += \
+  src/main.c \
+  src/usb_descriptors.c \
+
+# CMSIS sources
+SRC_C += \
+  lib/CMSIS_5/CMSIS/DSP/Source/CommonTables/arm_common_tables.c \
+  lib/CMSIS_5/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c \
+
 SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
 
 include ../../rules.mk

From e2852da668ae5f8e2398ac0a4c2a93d5f50f2618 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Tue, 10 Oct 2023 18:35:24 +0200
Subject: [PATCH 682/691] Update deps.

---
 tools/get_deps.py | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/tools/get_deps.py b/tools/get_deps.py
index 1fac291a3..8eea3e6de 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -166,8 +166,9 @@ deps_optional = {
                             'ch32v307'],
     'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git',
                     '20285262657d1b482d132d20d755c8c330d55c1f',
-                    'imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x'
-                    'stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 '
+                    'imxrt kinetis_k32l2 kinetis_kl lpc11 lpc13 lpc15 lpc17 lpc18 lpc40'
+                    'lpc43 lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x rp2040'
+                    'stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4'
                     'stm32h7 stm32l0 stm32l1 stm32l4 stm32l5 stm32u5 stm32wb'],
     'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git',
                          'e73e04ca63495672d955f9268e003cffe168fcd8',

From c8430f5f85d587a996bc0301a47be12cc70cedb7 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Tue, 10 Oct 2023 19:08:25 +0200
Subject: [PATCH 683/691] Refactor to get rid of CMSIS DSP lib.

---
 .../device/audio_4_channel_mic/CMakeLists.txt | 12 ++--
 examples/device/audio_4_channel_mic/Makefile  |  6 --
 examples/device/audio_4_channel_mic/skip.txt  |  1 +
 .../device/audio_4_channel_mic/src/main.c     | 55 +++++++++++--------
 tools/get_deps.py                             |  5 +-
 5 files changed, 40 insertions(+), 39 deletions(-)

diff --git a/examples/device/audio_4_channel_mic/CMakeLists.txt b/examples/device/audio_4_channel_mic/CMakeLists.txt
index ae6bf0142..0f5d36193 100644
--- a/examples/device/audio_4_channel_mic/CMakeLists.txt
+++ b/examples/device/audio_4_channel_mic/CMakeLists.txt
@@ -23,18 +23,16 @@ target_sources(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
   )
 
-# CMSIS sources
-target_sources(${PROJECT} PUBLIC
-  ${TOP}/lib/CMSIS_5/CMSIS/DSP/Source/CommonTables/arm_common_tables.c
-  ${TOP}/lib/CMSIS_5/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c
-  )
-
 # Example include
 target_include_directories(${PROJECT} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
-  ${TOP}/lib/CMSIS_5/CMSIS/DSP/Include
   )
 
+# Add libm for GCC
+if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+  target_link_libraries(${PROJECT} PUBLIC m)
+endif()
+
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
 family_configure_device_example(${PROJECT} noos)
diff --git a/examples/device/audio_4_channel_mic/Makefile b/examples/device/audio_4_channel_mic/Makefile
index 97e4118c0..8ee6a01ec 100644
--- a/examples/device/audio_4_channel_mic/Makefile
+++ b/examples/device/audio_4_channel_mic/Makefile
@@ -3,18 +3,12 @@ include ../../make.mk
 INC += \
   src \
   $(TOP)/hw \
-  $(TOP)/lib/CMSIS_5/CMSIS/DSP/Include \
 
 # Example source
 EXAMPLE_SOURCE += \
   src/main.c \
   src/usb_descriptors.c \
 
-# CMSIS sources
-SRC_C += \
-  lib/CMSIS_5/CMSIS/DSP/Source/CommonTables/arm_common_tables.c \
-  lib/CMSIS_5/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c \
-
 SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
 
 include ../../rules.mk
diff --git a/examples/device/audio_4_channel_mic/skip.txt b/examples/device/audio_4_channel_mic/skip.txt
index 1ee86a485..3c42a96d9 100644
--- a/examples/device/audio_4_channel_mic/skip.txt
+++ b/examples/device/audio_4_channel_mic/skip.txt
@@ -1,3 +1,4 @@
 mcu:SAMD11
 mcu:SAME5X
 mcu:SAMG
+family:broadcom_64bit
diff --git a/examples/device/audio_4_channel_mic/src/main.c b/examples/device/audio_4_channel_mic/src/main.c
index 3b21b4ac6..4bcbdb692 100644
--- a/examples/device/audio_4_channel_mic/src/main.c
+++ b/examples/device/audio_4_channel_mic/src/main.c
@@ -34,7 +34,7 @@
 #include <stdlib.h>
 #include <stdio.h>
 #include <string.h>
-#include "arm_math.h"
+#include <math.h>
 
 #include "bsp/board_api.h"
 #include "tusb.h"
@@ -96,6 +96,27 @@ int main(void)
   sampleFreqRng.subrange[0].bMax = AUDIO_SAMPLE_RATE;
   sampleFreqRng.subrange[0].bRes = 0;
 
+  // Generate dummy data
+  uint16_t * p_buff = i2s_dummy_buffer[0];
+  uint16_t dataVal = 1;
+  for (uint16_t cnt = 0; cnt < AUDIO_SAMPLE_RATE/1000; cnt++)
+  {
+    // CH0 saw wave
+    *p_buff++ = dataVal;
+    // CH1 inverted saw wave
+    *p_buff++ = 60 + AUDIO_SAMPLE_RATE/1000 - dataVal;
+    dataVal++;
+  }
+  p_buff = i2s_dummy_buffer[1];
+  for (uint16_t cnt = 0; cnt < AUDIO_SAMPLE_RATE/1000; cnt++)
+  {
+    // CH3 square wave
+    *p_buff++ = cnt < (AUDIO_SAMPLE_RATE/1000/2) ? 120:170;
+    // CH4 sinus wave
+    float t = 2*3.1415f * cnt / (AUDIO_SAMPLE_RATE/1000);
+    *p_buff++ = (uint16_t)(sinf(t) * 25) + 200;
+  }
+
   while (1)
   {
     tud_task(); // tinyusb device task
@@ -399,7 +420,16 @@ bool tud_audio_tx_done_pre_load_cb(uint8_t rhport, uint8_t itf, uint8_t ep_in, u
   (void) ep_in;
   (void) cur_alt_setting;
 
-  // Write buffer[0] (CH0-1) and buffer[1] (CH1-2) into FIFO
+
+  // In read world application data flow is driven by I2S clock,
+  // both tud_audio_tx_done_pre_load_cb() & tud_audio_tx_done_post_load_cb() are hardly used.
+  // For example in your I2S receive callback:
+  // void I2S_Rx_Callback(int channel, const void* data, uint16_t samples)
+  // {
+  //    tud_audio_write_support_ff(channel, data, samples * N_BYTES_PER_SAMPLE * N_CHANNEL_PER_FIFO);
+  // }
+
+  // Write I2S buffer into FIFO
   for (uint8_t cnt=0; cnt < 2; cnt++)
   {
     tud_audio_write_support_ff(cnt, i2s_dummy_buffer[cnt], AUDIO_SAMPLE_RATE/1000 * CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX * CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_TX);
@@ -416,27 +446,6 @@ bool tud_audio_tx_done_post_load_cb(uint8_t rhport, uint16_t n_bytes_copied, uin
   (void) ep_in;
   (void) cur_alt_setting;
 
-  // Generate dummy data
-  uint16_t * p_buff = i2s_dummy_buffer[0];
-  uint16_t dataVal = 1;
-  for (uint16_t cnt = 0; cnt < AUDIO_SAMPLE_RATE/1000; cnt++)
-  {
-    // CH0 saw wave
-    *p_buff++ = dataVal;
-    // CH1 inverted saw wave
-    *p_buff++ = 60 + AUDIO_SAMPLE_RATE/1000 - dataVal;
-    dataVal++;
-  }
-  p_buff = i2s_dummy_buffer[1];
-  for (uint16_t cnt = 0; cnt < AUDIO_SAMPLE_RATE/1000; cnt++)
-  {
-    // CH3 square wave
-    *p_buff++ = cnt < (AUDIO_SAMPLE_RATE/1000/2) ? 120:170;
-    // CH4 sinus wave
-    q15_t t = 0x7FFF * cnt / (AUDIO_SAMPLE_RATE/1000);
-    *p_buff++ = arm_sin_q15(t) / 1300 + 200;
-  }
-
   return true;
 }
 
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 8eea3e6de..1fac291a3 100644
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -166,9 +166,8 @@ deps_optional = {
                             'ch32v307'],
     'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git',
                     '20285262657d1b482d132d20d755c8c330d55c1f',
-                    'imxrt kinetis_k32l2 kinetis_kl lpc11 lpc13 lpc15 lpc17 lpc18 lpc40'
-                    'lpc43 lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x rp2040'
-                    'stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4'
+                    'imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x'
+                    'stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 '
                     'stm32h7 stm32l0 stm32l1 stm32l4 stm32l5 stm32u5 stm32wb'],
     'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git',
                          'e73e04ca63495672d955f9268e003cffe168fcd8',

From 656e1e416aa9dbd7ba4c18e777f7294a101f0667 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Tue, 17 Oct 2023 09:46:01 +0200
Subject: [PATCH 684/691] Add flow control for IN transfer.

---
 .../device/audio_4_channel_mic/src/main.c     |  30 +++-
 .../src/plot_audio_samples.py                 |   7 +-
 .../audio_4_channel_mic/src/tusb_config.h     |  15 +-
 src/class/audio/audio_device.c                | 140 ++++++++++++++++--
 src/class/audio/audio_device.h                |  16 ++
 5 files changed, 187 insertions(+), 21 deletions(-)

diff --git a/examples/device/audio_4_channel_mic/src/main.c b/examples/device/audio_4_channel_mic/src/main.c
index 4bcbdb692..52e6d71f7 100644
--- a/examples/device/audio_4_channel_mic/src/main.c
+++ b/examples/device/audio_4_channel_mic/src/main.c
@@ -69,8 +69,13 @@ uint8_t clkValid;
 audio_control_range_2_n_t(1) volumeRng[CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX+1]; 			// Volume range state
 audio_control_range_4_n_t(1) sampleFreqRng; 						// Sample frequency range state
 
+#if CFG_TUD_AUDIO_ENABLE_ENCODING
 // Audio test data, each buffer contains 2 channels, buffer[0] for CH0-1, buffer[1] for CH1-2
 uint16_t i2s_dummy_buffer[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ/2];   // Ensure half word aligned
+#else
+// Audio test data, 4 channels muxed together, buffer[0] for CH0, buffer[1] for CH1, buffer[2] for CH2, buffer[3] for CH3
+uint16_t i2s_dummy_buffer[CFG_TUD_AUDIO_EP_SZ_IN];   // Ensure half word aligned
+#endif
 
 void led_blinking_task(void);
 void audio_task(void);
@@ -97,6 +102,7 @@ int main(void)
   sampleFreqRng.subrange[0].bRes = 0;
 
   // Generate dummy data
+#if CFG_TUD_AUDIO_ENABLE_ENCODING
   uint16_t * p_buff = i2s_dummy_buffer[0];
   uint16_t dataVal = 1;
   for (uint16_t cnt = 0; cnt < AUDIO_SAMPLE_RATE/1000; cnt++)
@@ -116,6 +122,23 @@ int main(void)
     float t = 2*3.1415f * cnt / (AUDIO_SAMPLE_RATE/1000);
     *p_buff++ = (uint16_t)(sinf(t) * 25) + 200;
   }
+#else
+  uint16_t * p_buff = i2s_dummy_buffer;
+  uint16_t dataVal = 1;
+  for (uint16_t cnt = 0; cnt < AUDIO_SAMPLE_RATE/1000; cnt++)
+  {
+    // CH0 saw wave
+    *p_buff++ = dataVal;
+    // CH1 inverted saw wave
+    *p_buff++ = 60 + AUDIO_SAMPLE_RATE/1000 - dataVal;
+    dataVal++;
+    // CH3 square wave
+    *p_buff++ = cnt < (AUDIO_SAMPLE_RATE/1000/2) ? 120:170;
+    // CH4 sinus wave
+    float t = 2*3.1415f * cnt / (AUDIO_SAMPLE_RATE/1000);
+    *p_buff++ = (uint16_t)(sinf(t) * 25) + 200;
+  }
+#endif
 
   while (1)
   {
@@ -384,6 +407,8 @@ bool tud_audio_get_req_entity_cb(uint8_t rhport, tusb_control_request_t const *
         {
           case AUDIO_CS_REQ_CUR:
             TU_LOG2("    Get Sample Freq.\r\n");
+            // Set sample rate for flow control
+            tud_audio_set_tx_flow_control(sampFreq);
             return tud_control_xfer(rhport, p_request, &sampFreq, sizeof(sampFreq));
 
           case AUDIO_CS_REQ_RANGE:
@@ -429,12 +454,15 @@ bool tud_audio_tx_done_pre_load_cb(uint8_t rhport, uint8_t itf, uint8_t ep_in, u
   //    tud_audio_write_support_ff(channel, data, samples * N_BYTES_PER_SAMPLE * N_CHANNEL_PER_FIFO);
   // }
 
+#if CFG_TUD_AUDIO_ENABLE_ENCODING
   // Write I2S buffer into FIFO
   for (uint8_t cnt=0; cnt < 2; cnt++)
   {
     tud_audio_write_support_ff(cnt, i2s_dummy_buffer[cnt], AUDIO_SAMPLE_RATE/1000 * CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX * CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_TX);
   }
-
+#else
+  tud_audio_write(i2s_dummy_buffer, AUDIO_SAMPLE_RATE/1000 * CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX * CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX);
+#endif
   return true;
 }
 
diff --git a/examples/device/audio_4_channel_mic/src/plot_audio_samples.py b/examples/device/audio_4_channel_mic/src/plot_audio_samples.py
index a3a2b2fd4..d17a908b6 100644
--- a/examples/device/audio_4_channel_mic/src/plot_audio_samples.py
+++ b/examples/device/audio_4_channel_mic/src/plot_audio_samples.py
@@ -10,11 +10,11 @@ if __name__ == '__main__':
     # print(sd.query_devices())
 
     fs = 48000  		# Sample rate
-    duration = 20e-3   # Duration of recording
+    duration = 1   # Duration of recording
 
     if platform.system() == 'Windows':
         # WDM-KS is needed since there are more than one MicNode device APIs (at least in Windows)
-        device = 'Microphone (MicNode_4_Ch), Windows WDM-KS'
+        device = 'Microphone (MicNode_4_Ch), Windows WASAPI'
     elif platform.system() == 'Darwin':
         device = 'MicNode_4_Ch'
     else:
@@ -28,8 +28,7 @@ if __name__ == '__main__':
 
     time = np.arange(0, duration, 1 / fs)  # time vector
     # strip starting zero
-    myrecording = myrecording[100:]
-    time = time[100:]
+
     plt.plot(time, myrecording)
     plt.xlabel('Time [s]')
     plt.ylabel('Amplitude')
diff --git a/examples/device/audio_4_channel_mic/src/tusb_config.h b/examples/device/audio_4_channel_mic/src/tusb_config.h
index 291ac4f79..d1e19c5a1 100644
--- a/examples/device/audio_4_channel_mic/src/tusb_config.h
+++ b/examples/device/audio_4_channel_mic/src/tusb_config.h
@@ -114,14 +114,25 @@ extern "C" {
 #define CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX    2         // This value is not required by the driver, it parses this information from the descriptor once the alternate interface is set by the host - we use it for the setup
 #define CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX            4         // This value is not required by the driver, it parses this information from the descriptor once the alternate interface is set by the host - we use it for the setup
 #define CFG_TUD_AUDIO_EP_SZ_IN                        TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX)
+
+#define CFG_TUD_AUDIO_ENABLE_ENCODING                 0
+
+#if CFG_TUD_AUDIO_ENABLE_ENCODING
+
 #define CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX             CFG_TUD_AUDIO_EP_SZ_IN
 #define CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ          CFG_TUD_AUDIO_EP_SZ_IN
 
-#define CFG_TUD_AUDIO_ENABLE_ENCODING                 1
 #define CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING          1
 #define CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_TX      2         // One I2S stream contains two channels, each stream is saved within one support FIFO - this value is currently fixed, the driver does not support a changing value
 #define CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO        (CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX / CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_TX)
-#define CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ       (CFG_TUD_AUDIO_EP_SZ_IN / CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO)
+#define CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ       4 * (CFG_TUD_AUDIO_EP_SZ_IN / CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO)
+
+#else
+
+#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX             4 * CFG_TUD_AUDIO_EP_SZ_IN
+#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ          4 * CFG_TUD_AUDIO_EP_SZ_IN
+
+#endif
 
 #ifdef __cplusplus
 }
diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 5d3772a9d..9299440c9 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -364,14 +364,21 @@ typedef struct
 #endif
 #endif
 
+#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
+  uint32_t sample_rate_tx;
+  uint16_t packet_sz_tx[3];
+  uint8_t bclock_id_tx;
+  uint8_t interval_tx;
+#endif
+
   // Encoding parameters - parameters are set when alternate AS interface is set by host
-#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_ENCODING
+#if CFG_TUD_AUDIO_ENABLE_EP_IN && (CFG_TUD_AUDIO_ENABLE_ENCODING || CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL)
   audio_format_type_t format_type_tx;
   uint8_t n_channels_tx;
+  uint8_t n_bytes_per_sampe_tx;
 
 #if CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING
   audio_data_format_type_I_t format_type_I_tx;
-  uint8_t n_bytes_per_sampe_tx;
   uint8_t n_channels_per_ff_tx;
   uint8_t n_ff_used_tx;
 #endif
@@ -444,7 +451,7 @@ static bool audiod_verify_itf_exists(uint8_t itf, uint8_t *func_id);
 static bool audiod_verify_ep_exists(uint8_t ep, uint8_t *func_id);
 static uint8_t audiod_get_audio_fct_idx(audiod_function_t * audio);
 
-#if CFG_TUD_AUDIO_ENABLE_ENCODING || CFG_TUD_AUDIO_ENABLE_DECODING
+#if (CFG_TUD_AUDIO_ENABLE_EP_IN && (CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL || CFG_TUD_AUDIO_ENABLE_ENCODING)) || (CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING)
 static void audiod_parse_for_AS_params(audiod_function_t* audio, uint8_t const * p_desc, uint8_t const * p_desc_end, uint8_t const as_itf);
 
 static inline uint8_t tu_desc_subtype(void const* desc)
@@ -453,6 +460,10 @@ static inline uint8_t tu_desc_subtype(void const* desc)
 }
 #endif
 
+#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
+static bool audiod_tx_calc_packet_size(const uint16_t* norminal_size, uint16_t data_size, uint16_t fifo_size, uint16_t* packet_size);
+#endif
+
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
 static bool set_fb_params_freq(audiod_function_t* audio, uint32_t sample_freq, uint32_t mclk_freq);
 #endif
@@ -821,6 +832,57 @@ uint16_t tud_audio_int_ctr_n_write(uint8_t func_id, uint8_t const* buffer, uint1
 
 #endif
 
+#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
+
+bool tud_audio_n_set_tx_flow_control(uint8_t func_id, uint32_t sample_rate)
+{
+  TU_VERIFY(func_id < CFG_TUD_AUDIO && _audiod_fct[func_id].p_desc != NULL);
+  audiod_function_t* audio = &_audiod_fct[func_id];
+
+  TU_VERIFY(audio->format_type_tx == AUDIO_FORMAT_TYPE_I);
+  TU_VERIFY(audio->n_channels_tx);
+  TU_VERIFY(audio->n_bytes_per_sampe_tx);
+  TU_VERIFY(audio->interval_tx);
+
+  if (sample_rate == 0)
+  {
+    audio->packet_sz_tx[0] = 0;
+    audio->packet_sz_tx[1] = 0;
+    audio->packet_sz_tx[2] = 0;
+    return false;
+  }
+
+  const uint8_t interval = (tud_speed_get() == TUSB_SPEED_FULL) ? audio->interval_tx : 1 << (audio->interval_tx - 1);
+
+  const uint32_t sample_normimal = sample_rate * interval / ((tud_speed_get() == TUSB_SPEED_FULL) ? 1000 : 8000);
+  const uint32_t sample_reminder = sample_rate * interval % ((tud_speed_get() == TUSB_SPEED_FULL) ? 1000 : 8000);
+
+  const uint16_t packet_sz_tx_min = (sample_normimal - 1) * audio->n_channels_tx * audio->n_bytes_per_sampe_tx;
+  const uint16_t packet_sz_tx_norm = sample_normimal * audio->n_channels_tx * audio->n_bytes_per_sampe_tx;
+  const uint16_t packet_sz_tx_max = (sample_normimal + 1) * audio->n_channels_tx * audio->n_bytes_per_sampe_tx;
+
+  TU_ASSERT(packet_sz_tx_max <= audio->ep_in_sz);
+
+  // Frmt20.pdf 2.3.1.1 USB Packets
+  if (sample_reminder)
+  {
+    // All virtual frame packets must either contain INT(nav) audio slots (small VFP) or INT(nav)+1 (large VFP) audio slots
+    audio->packet_sz_tx[0] = packet_sz_tx_norm;
+    audio->packet_sz_tx[1] = packet_sz_tx_norm;
+    audio->packet_sz_tx[2] = packet_sz_tx_max;
+  } else
+  {
+    // In the case where nav = INT(nav), ni may vary between INT(nav)-1 (small VFP), INT(nav)
+    // (medium VFP) and INT(nav)+1 (large VFP).
+    audio->packet_sz_tx[0] = packet_sz_tx_min;
+    audio->packet_sz_tx[1] = packet_sz_tx_norm;
+    audio->packet_sz_tx[2] = packet_sz_tx_max;
+  }
+
+  return true;
+}
+
+#endif
 
 // This function is called once a transmit of an audio packet was successfully completed. Here, we encode samples and place it in IN EP's buffer for next transmission.
 // If you prefer your own (more efficient) implementation suiting your purpose set CFG_TUD_AUDIO_ENABLE_ENCODING = 0 and use tud_audio_n_write.
@@ -886,9 +948,16 @@ static bool audiod_tx_done_cb(uint8_t rhport, audiod_function_t * audio)
 
 #else
   // No support FIFOs, if no linear buffer required schedule transmit, else put data into linear buffer and schedule
-
+#if CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
+  uint16_t tgt_packet_sz;
+  // packet_sz_tx is based on total packet size, here we want size for each support buffer.
+  if (audiod_tx_calc_packet_size(audio->packet_sz_tx, tu_fifo_count(&audio->ep_in_ff), audio->ep_in_ff.depth, &tgt_packet_sz))
+    n_bytes_tx = tgt_packet_sz;
+  else
+    n_bytes_tx = tu_min16(tu_fifo_count(&audio->ep_in_ff), audio->ep_in_sz);
+#else
   n_bytes_tx = tu_min16(tu_fifo_count(&audio->ep_in_ff), audio->ep_in_sz);      // Limit up to max packet size, more can not be done for ISO
-
+#endif
 #if USE_LINEAR_BUFFER_TX
   tu_fifo_read_n(&audio->ep_in_ff, audio->lin_buf_in, n_bytes_tx);
   TU_VERIFY(usbd_edpt_xfer(rhport, audio->ep_in, audio->lin_buf_in, n_bytes_tx));
@@ -987,7 +1056,6 @@ static uint16_t audiod_encode_type_I_pcm(uint8_t rhport, audiod_function_t* audi
 
   // Determine amount of samples
   uint8_t const n_ff_used               = audio->n_ff_used_tx;
-  uint16_t const nBytesToCopy           = audio->n_channels_per_ff_tx * audio->n_bytes_per_sampe_tx;
   uint16_t const capPerFF               = audio->ep_in_sz / n_ff_used;                                        // Sample capacity per FIFO in bytes
   uint16_t nBytesPerFFToSend            = tu_fifo_count(&audio->tx_supp_ff[0]);
   uint8_t cnt_ff;
@@ -1001,14 +1069,24 @@ static uint16_t audiod_encode_type_I_pcm(uint8_t rhport, audiod_function_t* audi
     }
   }
 
-  // Check if there is enough
+#if CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
+  uint16_t tgt_packet_sz;
+  // packet_sz_tx is based on total packet size, here we want size for each support buffer.
+  if (audiod_tx_calc_packet_size(audio->packet_sz_tx, nBytesPerFFToSend * n_ff_used, audio->tx_supp_ff[0].depth * n_ff_used, &tgt_packet_sz))
+    nBytesPerFFToSend = tgt_packet_sz / n_ff_used;
+#endif
+
+  // Check if there is enough data
   if (nBytesPerFFToSend == 0)    return 0;
 
   // Limit to maximum sample number - THIS IS A POSSIBLE ERROR SOURCE IF TOO MANY SAMPLE WOULD NEED TO BE SENT BUT CAN NOT!
   nBytesPerFFToSend = tu_min16(nBytesPerFFToSend, capPerFF);
 
+#if !CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
   // Round to full number of samples (flooring)
-  nBytesPerFFToSend = (nBytesPerFFToSend / nBytesToCopy) * nBytesToCopy;
+  uint16_t const nSlotSize = audio->n_channels_per_ff_tx * audio->n_bytes_per_sampe_tx;
+  nBytesPerFFToSend = (nBytesPerFFToSend / nSlotSize) * nSlotSize;
+#endif
 
   // Encode
   uint8_t * dst;
@@ -1489,6 +1567,9 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
   #if CFG_TUD_AUDIO_ENABLE_EP_IN
                 ep_in = desc_ep->bEndpointAddress;
                 ep_in_size = TU_MAX(tu_edpt_packet_size(desc_ep), ep_in_size);
+    #if CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
+                _audiod_fct[i].interval_tx = desc_ep->bInterval;
+    #endif
   #endif
               } else
               {
@@ -1607,6 +1688,11 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
 
     audio->ep_in = 0;                           // Necessary?
 
+  #if CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
+    audio->packet_sz_tx[0] = 0;
+    audio->packet_sz_tx[1] = 0;
+    audio->packet_sz_tx[2] = 0;
+  #endif
   }
 #endif // CFG_TUD_AUDIO_ENABLE_EP_IN
 
@@ -1657,7 +1743,7 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
     // Find correct interface
     if (tu_desc_type(p_desc) == TUSB_DESC_INTERFACE && ((tusb_desc_interface_t const * )p_desc)->bInterfaceNumber == itf && ((tusb_desc_interface_t const * )p_desc)->bAlternateSetting == alt)
     {
-#if CFG_TUD_AUDIO_ENABLE_ENCODING || CFG_TUD_AUDIO_ENABLE_DECODING
+#if CFG_TUD_AUDIO_ENABLE_ENCODING || CFG_TUD_AUDIO_ENABLE_DECODING || CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
       uint8_t const * p_desc_parse_for_params = p_desc;
 #endif
       // From this point forward follow the EP descriptors associated to the current alternate setting interface - Open EPs if necessary
@@ -1686,12 +1772,13 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
             audio->ep_in_sz = tu_edpt_packet_size(desc_ep);
 
             // If software encoding is enabled, parse for the corresponding parameters - doing this here means only AS interfaces with EPs get scanned for parameters
-  #if CFG_TUD_AUDIO_ENABLE_ENCODING
+  #if CFG_TUD_AUDIO_ENABLE_ENCODING || CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
             audiod_parse_for_AS_params(audio, p_desc_parse_for_params, p_desc_end, itf);
 
             // Reconfigure size of support FIFOs - this is necessary to avoid samples to get split in case of a wrap
-    #if CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING
-            const uint16_t active_fifo_depth = (uint16_t) ((audio->tx_supp_ff_sz_max / audio->n_bytes_per_sampe_tx) * audio->n_bytes_per_sampe_tx);
+    #if CFG_TUD_AUDIO_ENABLE_ENCODING && CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING
+            const uint16_t active_fifo_depth = (uint16_t) ((audio->tx_supp_ff_sz_max / (audio->n_channels_per_ff_tx * audio->n_bytes_per_sampe_tx))
+               * (audio->n_channels_per_ff_tx * audio->n_bytes_per_sampe_tx));
             for (uint8_t cnt = 0; cnt < audio->n_tx_supp_ff; cnt++)
             {
               tu_fifo_config(&audio->tx_supp_ff[cnt], audio->tx_supp_ff[cnt].buffer, active_fifo_depth, 1, true);
@@ -2404,7 +2491,7 @@ static bool audiod_verify_ep_exists(uint8_t ep, uint8_t *func_id)
   return false;
 }
 
-#if CFG_TUD_AUDIO_ENABLE_ENCODING || CFG_TUD_AUDIO_ENABLE_DECODING
+#if (CFG_TUD_AUDIO_ENABLE_EP_IN && (CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL || CFG_TUD_AUDIO_ENABLE_ENCODING)) || (CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING)
 // p_desc points to the AS interface of alternate setting zero
 // itf is the interface number of the corresponding interface - we check if the interface belongs to EP in or EP out to see if it is a TX or RX parameter
 // Currently, only AS interfaces with an EP (in or out) are supposed to be parsed for!
@@ -2455,7 +2542,7 @@ static void audiod_parse_for_AS_params(audiod_function_t* audio, uint8_t const *
     }
 
     // Look for a Type I Format Type Descriptor(2.3.1.6 - Audio Formats)
-#if CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING || CFG_TUD_AUDIO_ENABLE_TYPE_I_DECODING
+#if CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING || CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL || CFG_TUD_AUDIO_ENABLE_TYPE_I_DECODING
     if (tu_desc_type(p_desc) == TUSB_DESC_CS_INTERFACE && tu_desc_subtype(p_desc) == AUDIO_CS_AS_INTERFACE_FORMAT_TYPE && ((audio_desc_type_I_format_t const * )p_desc)->bFormatType == AUDIO_FORMAT_TYPE_I)
     {
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_EP_OUT
@@ -2491,6 +2578,31 @@ static void audiod_parse_for_AS_params(audiod_function_t* audio, uint8_t const *
 }
 #endif
 
+#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
+static bool audiod_tx_calc_packet_size(const uint16_t* norminal_size, uint16_t data_size, uint16_t fifo_size, uint16_t* packet_size)
+{
+  TU_VERIFY(norminal_size[1]);
+
+  // This flow control method need a FIFO size of 4*Navg
+  TU_VERIFY(norminal_size[1] <= fifo_size * 4);
+
+  if (data_size < norminal_size[0])
+    *packet_size = 0;
+  else
+  {
+    uint16_t slot_size = norminal_size[2] - norminal_size[1];
+    if (data_size < fifo_size / 2 - slot_size)
+      *packet_size = norminal_size[0];
+    else if (data_size > fifo_size / 2 + slot_size)
+      *packet_size = norminal_size[2];
+    else
+      *packet_size = norminal_size[1];
+  }
+
+  return true;
+}
+#endif
+
 #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
 
 bool tud_audio_n_fb_set(uint8_t func_id, uint32_t feedback)
diff --git a/src/class/audio/audio_device.h b/src/class/audio/audio_device.h
index 7c88b99fc..4cb3ca84c 100644
--- a/src/class/audio/audio_device.h
+++ b/src/class/audio/audio_device.h
@@ -181,6 +181,11 @@
 #endif
 #endif
 
+// (For TYPE-I format only) Flow control is necessary to allow IN ep send correct amount of data, unless it's a virtual device where data is perfectly synchronized to USB clock.
+#ifndef CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
+#define CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL  1
+#endif
+
 // Enable/disable feedback EP (required for asynchronous RX applications)
 #ifndef CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
 #define CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP                    0                             // Feedback - 0 or 1
@@ -392,6 +397,10 @@ tu_fifo_t* tud_audio_n_get_tx_support_ff          (uint8_t func_id, uint8_t ff_i
 uint16_t    tud_audio_int_ctr_n_write             (uint8_t func_id, uint8_t const* buffer, uint16_t len);
 #endif
 
+#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
+bool tud_audio_n_set_tx_flow_control       (uint8_t func_id, uint32_t sample_rate);
+#endif
+
 //--------------------------------------------------------------------+
 // Application API (Interface0)
 //--------------------------------------------------------------------+
@@ -670,6 +679,13 @@ static inline uint16_t tud_audio_int_ctr_write(uint8_t const* buffer, uint16_t l
 }
 #endif
 
+#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
+static inline bool tud_audio_set_tx_flow_control(uint32_t sample_rate)
+{
+  return tud_audio_n_set_tx_flow_control(0, sample_rate);
+}
+#endif
+
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
 
 static inline bool tud_audio_fb_set(uint32_t feedback)

From 0a1d6cf4d028bce2248da01b8cc13aa4673e61b5 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Tue, 17 Oct 2023 13:06:55 +0200
Subject: [PATCH 685/691] Read sample rate directly from control transfer to
 eliminate callback.

---
 .../device/audio_4_channel_mic/src/main.c     |   5 +-
 src/class/audio/audio_device.c                | 343 ++++++++++--------
 src/class/audio/audio_device.h                |  10 -
 3 files changed, 194 insertions(+), 164 deletions(-)

diff --git a/examples/device/audio_4_channel_mic/src/main.c b/examples/device/audio_4_channel_mic/src/main.c
index 52e6d71f7..9c37315c8 100644
--- a/examples/device/audio_4_channel_mic/src/main.c
+++ b/examples/device/audio_4_channel_mic/src/main.c
@@ -407,9 +407,8 @@ bool tud_audio_get_req_entity_cb(uint8_t rhport, tusb_control_request_t const *
         {
           case AUDIO_CS_REQ_CUR:
             TU_LOG2("    Get Sample Freq.\r\n");
-            // Set sample rate for flow control
-            tud_audio_set_tx_flow_control(sampFreq);
-            return tud_control_xfer(rhport, p_request, &sampFreq, sizeof(sampFreq));
+            // Buffered control transfer is needed for IN flow control to work
+            return tud_audio_buffer_and_schedule_control_xfer(rhport, p_request, &sampFreq, sizeof(sampFreq));
 
           case AUDIO_CS_REQ_RANGE:
             TU_LOG2("    Get Sample Freq. range\r\n");
diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 9299440c9..e246281be 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -461,7 +461,8 @@ static inline uint8_t tu_desc_subtype(void const* desc)
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
-static bool audiod_tx_calc_packet_size(const uint16_t* norminal_size, uint16_t data_size, uint16_t fifo_size, uint16_t* packet_size);
+static bool audiod_calc_tx_packet_sz(audiod_function_t* audio);
+static uint16_t audiod_tx_packet_size(const uint16_t* norminal_size, uint16_t data_count, uint16_t fifo_depth, uint16_t max_size);
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
@@ -832,58 +833,6 @@ uint16_t tud_audio_int_ctr_n_write(uint8_t func_id, uint8_t const* buffer, uint1
 
 #endif
 
-#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
-
-bool tud_audio_n_set_tx_flow_control(uint8_t func_id, uint32_t sample_rate)
-{
-  TU_VERIFY(func_id < CFG_TUD_AUDIO && _audiod_fct[func_id].p_desc != NULL);
-  audiod_function_t* audio = &_audiod_fct[func_id];
-
-  TU_VERIFY(audio->format_type_tx == AUDIO_FORMAT_TYPE_I);
-  TU_VERIFY(audio->n_channels_tx);
-  TU_VERIFY(audio->n_bytes_per_sampe_tx);
-  TU_VERIFY(audio->interval_tx);
-
-  if (sample_rate == 0)
-  {
-    audio->packet_sz_tx[0] = 0;
-    audio->packet_sz_tx[1] = 0;
-    audio->packet_sz_tx[2] = 0;
-    return false;
-  }
-
-  const uint8_t interval = (tud_speed_get() == TUSB_SPEED_FULL) ? audio->interval_tx : 1 << (audio->interval_tx - 1);
-
-  const uint32_t sample_normimal = sample_rate * interval / ((tud_speed_get() == TUSB_SPEED_FULL) ? 1000 : 8000);
-  const uint32_t sample_reminder = sample_rate * interval % ((tud_speed_get() == TUSB_SPEED_FULL) ? 1000 : 8000);
-
-  const uint16_t packet_sz_tx_min = (sample_normimal - 1) * audio->n_channels_tx * audio->n_bytes_per_sampe_tx;
-  const uint16_t packet_sz_tx_norm = sample_normimal * audio->n_channels_tx * audio->n_bytes_per_sampe_tx;
-  const uint16_t packet_sz_tx_max = (sample_normimal + 1) * audio->n_channels_tx * audio->n_bytes_per_sampe_tx;
-
-  TU_ASSERT(packet_sz_tx_max <= audio->ep_in_sz);
-
-  // Frmt20.pdf 2.3.1.1 USB Packets
-  if (sample_reminder)
-  {
-    // All virtual frame packets must either contain INT(nav) audio slots (small VFP) or INT(nav)+1 (large VFP) audio slots
-    audio->packet_sz_tx[0] = packet_sz_tx_norm;
-    audio->packet_sz_tx[1] = packet_sz_tx_norm;
-    audio->packet_sz_tx[2] = packet_sz_tx_max;
-  } else
-  {
-    // In the case where nav = INT(nav), ni may vary between INT(nav)-1 (small VFP), INT(nav)
-    // (medium VFP) and INT(nav)+1 (large VFP).
-    audio->packet_sz_tx[0] = packet_sz_tx_min;
-    audio->packet_sz_tx[1] = packet_sz_tx_norm;
-    audio->packet_sz_tx[2] = packet_sz_tx_max;
-  }
-
-  return true;
-}
-
-#endif
-
 // This function is called once a transmit of an audio packet was successfully completed. Here, we encode samples and place it in IN EP's buffer for next transmission.
 // If you prefer your own (more efficient) implementation suiting your purpose set CFG_TUD_AUDIO_ENABLE_ENCODING = 0 and use tud_audio_n_write.
 
@@ -949,12 +898,8 @@ static bool audiod_tx_done_cb(uint8_t rhport, audiod_function_t * audio)
 #else
   // No support FIFOs, if no linear buffer required schedule transmit, else put data into linear buffer and schedule
 #if CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
-  uint16_t tgt_packet_sz;
   // packet_sz_tx is based on total packet size, here we want size for each support buffer.
-  if (audiod_tx_calc_packet_size(audio->packet_sz_tx, tu_fifo_count(&audio->ep_in_ff), audio->ep_in_ff.depth, &tgt_packet_sz))
-    n_bytes_tx = tgt_packet_sz;
-  else
-    n_bytes_tx = tu_min16(tu_fifo_count(&audio->ep_in_ff), audio->ep_in_sz);
+  n_bytes_tx = audiod_tx_packet_size(audio->packet_sz_tx, tu_fifo_count(&audio->ep_in_ff), audio->ep_in_ff.depth, audio->ep_in_sz);
 #else
   n_bytes_tx = tu_min16(tu_fifo_count(&audio->ep_in_ff), audio->ep_in_sz);      // Limit up to max packet size, more can not be done for ISO
 #endif
@@ -1056,7 +1001,6 @@ static uint16_t audiod_encode_type_I_pcm(uint8_t rhport, audiod_function_t* audi
 
   // Determine amount of samples
   uint8_t const n_ff_used               = audio->n_ff_used_tx;
-  uint16_t const capPerFF               = audio->ep_in_sz / n_ff_used;                                        // Sample capacity per FIFO in bytes
   uint16_t nBytesPerFFToSend            = tu_fifo_count(&audio->tx_supp_ff[0]);
   uint8_t cnt_ff;
 
@@ -1070,19 +1014,18 @@ static uint16_t audiod_encode_type_I_pcm(uint8_t rhport, audiod_function_t* audi
   }
 
 #if CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
-  uint16_t tgt_packet_sz;
+  const uint16_t norm_packet_sz_tx[3] = {audio->packet_sz_tx[0] / n_ff_used,
+                                         audio->packet_sz_tx[1] / n_ff_used,
+                                         audio->packet_sz_tx[2] / n_ff_used};
   // packet_sz_tx is based on total packet size, here we want size for each support buffer.
-  if (audiod_tx_calc_packet_size(audio->packet_sz_tx, nBytesPerFFToSend * n_ff_used, audio->tx_supp_ff[0].depth * n_ff_used, &tgt_packet_sz))
-    nBytesPerFFToSend = tgt_packet_sz / n_ff_used;
-#endif
-
+  nBytesPerFFToSend = audiod_tx_packet_size(norm_packet_sz_tx, nBytesPerFFToSend, audio->tx_supp_ff[0].depth, audio->ep_in_sz / n_ff_used);
+  // Check if there is enough data
+  if (nBytesPerFFToSend == 0)    return 0;
+#else
   // Check if there is enough data
   if (nBytesPerFFToSend == 0)    return 0;
-
   // Limit to maximum sample number - THIS IS A POSSIBLE ERROR SOURCE IF TOO MANY SAMPLE WOULD NEED TO BE SENT BUT CAN NOT!
-  nBytesPerFFToSend = tu_min16(nBytesPerFFToSend, capPerFF);
-
-#if !CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
+  nBytesPerFFToSend = tu_min16(nBytesPerFFToSend, audio->ep_in_sz / n_ff_used);
   // Round to full number of samples (flooring)
   uint16_t const nSlotSize = audio->n_channels_per_ff_tx * audio->n_bytes_per_sampe_tx;
   nBytesPerFFToSend = (nBytesPerFFToSend / nSlotSize) * nSlotSize;
@@ -1349,7 +1292,7 @@ void audiod_init(void)
 #endif // CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_ENCODING
 
     // Set encoding parameters for Type_I formats
-#if CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING
+#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING
     switch (i)
     {
 #if CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ > 0
@@ -1529,84 +1472,114 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uin
       }
 
 #if USE_ISO_EP_ALLOCATION
-  #if CFG_TUD_AUDIO_ENABLE_EP_IN
-      uint8_t  ep_in = 0;
-      uint16_t ep_in_size = 0;
-  #endif
-
-  #if CFG_TUD_AUDIO_ENABLE_EP_OUT
-      uint8_t  ep_out = 0;
-      uint16_t ep_out_size = 0;
-  #endif
-
-  #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
-      uint8_t ep_fb = 0;
-  #endif
-
-      uint8_t const *p_desc = _audiod_fct[i].p_desc;
-      uint8_t const *p_desc_end = p_desc + _audiod_fct[i].desc_length - TUD_AUDIO_DESC_IAD_LEN;
-      while (p_desc < p_desc_end)
       {
-        if (tu_desc_type(p_desc) == TUSB_DESC_ENDPOINT)
-        {
-          tusb_desc_endpoint_t const *desc_ep = (tusb_desc_endpoint_t const *) p_desc;
-          if (desc_ep->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS)
-          {
-  #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
-            // Explicit feedback EP
-            if (desc_ep->bmAttributes.usage == 1)
-            {
-              ep_fb = desc_ep->bEndpointAddress;
-            }
-  #endif
-            // Data EP
-            if (desc_ep->bmAttributes.usage == 0)
-            {
-              if (tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN)
-              {
   #if CFG_TUD_AUDIO_ENABLE_EP_IN
-                ep_in = desc_ep->bEndpointAddress;
-                ep_in_size = TU_MAX(tu_edpt_packet_size(desc_ep), ep_in_size);
-    #if CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
-                _audiod_fct[i].interval_tx = desc_ep->bInterval;
-    #endif
+        uint8_t  ep_in = 0;
+        uint16_t ep_in_size = 0;
   #endif
-              } else
-              {
+
   #if CFG_TUD_AUDIO_ENABLE_EP_OUT
-                ep_out = desc_ep->bEndpointAddress;
-                ep_out_size = TU_MAX(tu_edpt_packet_size(desc_ep), ep_out_size);
+        uint8_t  ep_out = 0;
+        uint16_t ep_out_size = 0;
   #endif
+
+  #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+        uint8_t ep_fb = 0;
+  #endif
+        uint8_t const *p_desc = _audiod_fct[i].p_desc;
+        uint8_t const *p_desc_end = p_desc + _audiod_fct[i].desc_length - TUD_AUDIO_DESC_IAD_LEN;
+        while (p_desc < p_desc_end)
+        {
+          if (tu_desc_type(p_desc) == TUSB_DESC_ENDPOINT)
+          {
+            tusb_desc_endpoint_t const *desc_ep = (tusb_desc_endpoint_t const *) p_desc;
+            if (desc_ep->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS)
+            {
+  #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+              // Explicit feedback EP
+              if (desc_ep->bmAttributes.usage == 1)
+              {
+                ep_fb = desc_ep->bEndpointAddress;
+              }
+  #endif
+              // Data EP
+              if (desc_ep->bmAttributes.usage == 0)
+              {
+                if (tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN)
+                {
+  #if CFG_TUD_AUDIO_ENABLE_EP_IN
+                  ep_in = desc_ep->bEndpointAddress;
+                  ep_in_size = TU_MAX(tu_edpt_packet_size(desc_ep), ep_in_size);
+  #endif
+                } else
+                {
+  #if CFG_TUD_AUDIO_ENABLE_EP_OUT
+                  ep_out = desc_ep->bEndpointAddress;
+                  ep_out_size = TU_MAX(tu_edpt_packet_size(desc_ep), ep_out_size);
+  #endif
+                }
+              }
+
+            }
+          }
+
+          p_desc = tu_desc_next(p_desc);
+        }
+
+  #if CFG_TUD_AUDIO_ENABLE_EP_IN
+        if (ep_in)
+        {
+          usbd_edpt_iso_alloc(rhport, ep_in, ep_in_size);
+        }
+  #endif
+
+  #if CFG_TUD_AUDIO_ENABLE_EP_OUT
+        if (ep_out)
+        {
+          usbd_edpt_iso_alloc(rhport, ep_out, ep_out_size);
+        }
+  #endif
+
+  #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
+        if (ep_fb)
+        {
+          usbd_edpt_iso_alloc(rhport, ep_fb, 4);
+        }
+  #endif
+      }
+#endif // USE_ISO_EP_ALLOCATION
+
+#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
+      {
+        uint8_t const *p_desc = _audiod_fct[i].p_desc;
+        uint8_t const *p_desc_end = p_desc + _audiod_fct[i].desc_length - TUD_AUDIO_DESC_IAD_LEN;
+        while (p_desc < p_desc_end)
+        {
+          if (tu_desc_type(p_desc) == TUSB_DESC_ENDPOINT)
+          {
+            tusb_desc_endpoint_t const *desc_ep = (tusb_desc_endpoint_t const *) p_desc;
+            if (desc_ep->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS)
+            {
+              if (desc_ep->bmAttributes.usage == 0)
+              {
+                if (tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN)
+                {
+                  _audiod_fct[i].interval_tx = desc_ep->bInterval;
+                }
               }
             }
-
+          } else
+          if (tu_desc_type(p_desc) == TUSB_DESC_CS_INTERFACE && tu_desc_subtype(p_desc) == AUDIO_CS_AC_INTERFACE_OUTPUT_TERMINAL)
+          {
+            if(tu_unaligned_read16(p_desc + 4) == AUDIO_TERM_TYPE_USB_STREAMING)
+            {
+               _audiod_fct[i].bclock_id_tx = p_desc[8];
+            }
           }
+          p_desc = tu_desc_next(p_desc);
         }
-        p_desc = tu_desc_next(p_desc);
       }
-
-  #if CFG_TUD_AUDIO_ENABLE_EP_IN
-      if (ep_in)
-      {
-        usbd_edpt_iso_alloc(rhport, ep_in, ep_in_size);
-      }
-  #endif
-
-  #if CFG_TUD_AUDIO_ENABLE_EP_OUT
-      if (ep_out)
-      {
-        usbd_edpt_iso_alloc(rhport, ep_out, ep_out_size);
-      }
-  #endif
-
-  #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
-      if (ep_fb)
-      {
-        usbd_edpt_iso_alloc(rhport, ep_fb, 4);
-      }
-  #endif
-
-#endif // USE_ISO_EP_ALLOCATION
+#endif // CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
 
       break;
     }
@@ -1910,6 +1883,10 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *
   if (disable) usbd_sof_enable(rhport, false);
 #endif
 
+#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
+  audiod_calc_tx_packet_sz(audio);
+#endif
+
   tud_control_status(rhport, p_request);
 
   return true;
@@ -2352,6 +2329,19 @@ bool tud_audio_buffer_and_schedule_control_xfer(uint8_t rhport, tusb_control_req
   // Copy into buffer
   TU_VERIFY(0 == tu_memcpy_s(_audiod_fct[func_id].ctrl_buf, _audiod_fct[func_id].ctrl_buf_sz, data, (size_t)len));
 
+#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
+  // Find data for sampling_frequency_control
+  if (p_request->bmRequestType_bit.type == TUSB_REQ_TYPE_CLASS && p_request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_INTERFACE)
+  {
+    uint8_t entityID = TU_U16_HIGH(p_request->wIndex);
+    uint8_t ctrlSel = TU_U16_HIGH(p_request->wValue);
+    if (_audiod_fct[func_id].bclock_id_tx == entityID && ctrlSel == AUDIO_CS_CTRL_SAM_FREQ && p_request->bRequest == AUDIO_CS_REQ_CUR)
+    {
+      _audiod_fct[func_id].sample_rate_tx = tu_unaligned_read32(_audiod_fct[func_id].ctrl_buf);
+    }
+  }
+#endif
+
   // Schedule transmit
   return tud_control_xfer(rhport, p_request, (void*)_audiod_fct[func_id].ctrl_buf, len);
 }
@@ -2579,28 +2569,79 @@ static void audiod_parse_for_AS_params(audiod_function_t* audio, uint8_t const *
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
-static bool audiod_tx_calc_packet_size(const uint16_t* norminal_size, uint16_t data_size, uint16_t fifo_size, uint16_t* packet_size)
+
+static bool audiod_calc_tx_packet_sz(audiod_function_t* audio)
 {
-  TU_VERIFY(norminal_size[1]);
+  TU_VERIFY(audio->format_type_tx == AUDIO_FORMAT_TYPE_I);
+  TU_VERIFY(audio->n_channels_tx);
+  TU_VERIFY(audio->n_bytes_per_sampe_tx);
+  TU_VERIFY(audio->interval_tx);
+  TU_VERIFY(audio->sample_rate_tx);
 
-  // This flow control method need a FIFO size of 4*Navg
-  TU_VERIFY(norminal_size[1] <= fifo_size * 4);
+  const uint8_t interval = (tud_speed_get() == TUSB_SPEED_FULL) ? audio->interval_tx : 1 << (audio->interval_tx - 1);
 
-  if (data_size < norminal_size[0])
-    *packet_size = 0;
-  else
+  const uint32_t sample_normimal = audio->sample_rate_tx * interval / ((tud_speed_get() == TUSB_SPEED_FULL) ? 1000 : 8000);
+  const uint32_t sample_reminder = audio->sample_rate_tx * interval % ((tud_speed_get() == TUSB_SPEED_FULL) ? 1000 : 8000);
+
+  const uint16_t packet_sz_tx_min = (sample_normimal - 1) * audio->n_channels_tx * audio->n_bytes_per_sampe_tx;
+  const uint16_t packet_sz_tx_norm = sample_normimal * audio->n_channels_tx * audio->n_bytes_per_sampe_tx;
+  const uint16_t packet_sz_tx_max = (sample_normimal + 1) * audio->n_channels_tx * audio->n_bytes_per_sampe_tx;
+
+  // Endpoint size must larger than packet size
+  TU_ASSERT(packet_sz_tx_max <= audio->ep_in_sz);
+
+  // Frmt20.pdf 2.3.1.1 USB Packets
+  if (sample_reminder)
   {
-    uint16_t slot_size = norminal_size[2] - norminal_size[1];
-    if (data_size < fifo_size / 2 - slot_size)
-      *packet_size = norminal_size[0];
-    else if (data_size > fifo_size / 2 + slot_size)
-      *packet_size = norminal_size[2];
-    else
-      *packet_size = norminal_size[1];
+    // All virtual frame packets must either contain INT(nav) audio slots (small VFP) or INT(nav)+1 (large VFP) audio slots
+    audio->packet_sz_tx[0] = packet_sz_tx_norm;
+    audio->packet_sz_tx[1] = packet_sz_tx_norm;
+    audio->packet_sz_tx[2] = packet_sz_tx_max;
+  } else
+  {
+    // In the case where nav = INT(nav), ni may vary between INT(nav)-1 (small VFP), INT(nav)
+    // (medium VFP) and INT(nav)+1 (large VFP).
+    audio->packet_sz_tx[0] = packet_sz_tx_min;
+    audio->packet_sz_tx[1] = packet_sz_tx_norm;
+    audio->packet_sz_tx[2] = packet_sz_tx_max;
   }
 
   return true;
 }
+
+static uint16_t audiod_tx_packet_size(const uint16_t* norminal_size, uint16_t data_count, uint16_t fifo_depth, uint16_t max_depth)
+{
+  // Flow control need a FIFO size of at least 4*Navg
+  if(norminal_size[1] && norminal_size[1] <= fifo_depth * 4)
+  {
+    uint16_t packet_size;
+    uint16_t slot_size = norminal_size[2] - norminal_size[1];
+    if (data_count < fifo_depth / 2 - slot_size)
+    {
+      if (data_count < norminal_size[0])
+      {
+        // If you get here frequently, then your I2S clock deviation is too big !
+        packet_size = 0;
+      } else
+      {
+        packet_size = norminal_size[0];
+      }
+    }
+    else if (data_count > fifo_depth / 2 + slot_size)
+    {
+      packet_size = norminal_size[2];
+    } else
+    {
+      packet_size = norminal_size[1];
+    }
+    // Normally this cap is not necessary
+    return tu_min16(packet_size, max_depth);
+  } else
+  {
+    return tu_min16(data_count, max_depth);
+  }
+}
+
 #endif
 
 #if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
diff --git a/src/class/audio/audio_device.h b/src/class/audio/audio_device.h
index 4cb3ca84c..ef3e12a06 100644
--- a/src/class/audio/audio_device.h
+++ b/src/class/audio/audio_device.h
@@ -397,9 +397,6 @@ tu_fifo_t* tud_audio_n_get_tx_support_ff          (uint8_t func_id, uint8_t ff_i
 uint16_t    tud_audio_int_ctr_n_write             (uint8_t func_id, uint8_t const* buffer, uint16_t len);
 #endif
 
-#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
-bool tud_audio_n_set_tx_flow_control       (uint8_t func_id, uint32_t sample_rate);
-#endif
 
 //--------------------------------------------------------------------+
 // Application API (Interface0)
@@ -679,13 +676,6 @@ static inline uint16_t tud_audio_int_ctr_write(uint8_t const* buffer, uint16_t l
 }
 #endif
 
-#if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL
-static inline bool tud_audio_set_tx_flow_control(uint32_t sample_rate)
-{
-  return tud_audio_n_set_tx_flow_control(0, sample_rate);
-}
-#endif
-
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
 
 static inline bool tud_audio_fb_set(uint32_t feedback)

From d83a2107883c8a6224ab99f248a59b216a8d2a82 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Tue, 17 Oct 2023 15:18:05 +0200
Subject: [PATCH 686/691] Add blackout time.

---
 src/class/audio/audio_device.c | 32 +++++++++++++++++++++++---------
 1 file changed, 23 insertions(+), 9 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index e246281be..d32ed56b2 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -2614,25 +2614,39 @@ static uint16_t audiod_tx_packet_size(const uint16_t* norminal_size, uint16_t da
   // Flow control need a FIFO size of at least 4*Navg
   if(norminal_size[1] && norminal_size[1] <= fifo_depth * 4)
   {
+    // Use blackout to prioritize normal size packet
+    static int ctrl_blackout = 0;
     uint16_t packet_size;
     uint16_t slot_size = norminal_size[2] - norminal_size[1];
-    if (data_count < fifo_depth / 2 - slot_size)
+    if (data_count < norminal_size[0])
     {
-      if (data_count < norminal_size[0])
-      {
         // If you get here frequently, then your I2S clock deviation is too big !
         packet_size = 0;
-      } else
-      {
-        packet_size = norminal_size[0];
-      }
-    }
-    else if (data_count > fifo_depth / 2 + slot_size)
+    } else
+    if (data_count < fifo_depth / 2 - slot_size && !ctrl_blackout)
+    {
+      packet_size = norminal_size[0];
+      ctrl_blackout = 10;
+    } else
+    if (data_count > fifo_depth / 2 + slot_size && !ctrl_blackout)
     {
       packet_size = norminal_size[2];
+      if(norminal_size[0] == norminal_size[1])
+      {
+        // nav = INT(nav) + 1
+        ctrl_blackout = 2;
+      } else
+      {
+        // nav = INT(nav)
+        ctrl_blackout = 10;
+      }
     } else
     {
       packet_size = norminal_size[1];
+      if (ctrl_blackout)
+      {
+        ctrl_blackout--;
+      }
     }
     // Normally this cap is not necessary
     return tu_min16(packet_size, max_depth);

From 22aefd6aba9cbba0faca803fb9f331ae6b0fae56 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 17 Oct 2023 22:48:54 +0700
Subject: [PATCH 687/691] add cmake support for u575 nucleo

---
 .idea/cmake.xml                               |   3 +-
 .../stm32u575eval/STM32U575AIIXQ_FLASH.ld     | 167 ------------------
 hw/bsp/stm32u5/boards/stm32u575eval/board.mk  |   2 +-
 .../stm32u575nucleo/STM32U575ZITXQ_FLASH.ld   | 167 ------------------
 .../stm32u5/boards/stm32u575nucleo/board.mk   |   4 +-
 hw/bsp/stm32u5/family.cmake                   |   1 +
 6 files changed, 6 insertions(+), 338 deletions(-)
 delete mode 100644 hw/bsp/stm32u5/boards/stm32u575eval/STM32U575AIIXQ_FLASH.ld
 delete mode 100644 hw/bsp/stm32u5/boards/stm32u575nucleo/STM32U575ZITXQ_FLASH.ld

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 9721af5ea..88e0e27ad 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -56,7 +56,6 @@
       <configuration PROFILE_NAME="portenta_c33" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=portenta_c33 -DLOG=3" />
       <configuration PROFILE_NAME="metro_m4_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m4_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
       <configuration PROFILE_NAME="metro_m0_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m0_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
-      <configuration PROFILE_NAME="stm32u5" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32u575eval" />
       <configuration PROFILE_NAME="metro esp32s2" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=adafruit_metro_esp32s2 -DMAX3421_HOST=1 -DLOG=2">
         <ADDITIONAL_GENERATION_ENVIRONMENT>
           <envs>
@@ -64,6 +63,8 @@
           </envs>
         </ADDITIONAL_GENERATION_ENVIRONMENT>
       </configuration>
+      <configuration PROFILE_NAME="stm32u575eval" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32u575eval" />
+      <configuration PROFILE_NAME="stm32u575nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32u575nucleo -DLOG=3" />
     </configurations>
   </component>
 </project>
\ No newline at end of file
diff --git a/hw/bsp/stm32u5/boards/stm32u575eval/STM32U575AIIXQ_FLASH.ld b/hw/bsp/stm32u5/boards/stm32u575eval/STM32U575AIIXQ_FLASH.ld
deleted file mode 100644
index 03c022bc2..000000000
--- a/hw/bsp/stm32u5/boards/stm32u575eval/STM32U575AIIXQ_FLASH.ld
+++ /dev/null
@@ -1,167 +0,0 @@
-/*
-******************************************************************************
-**
-**  File        : LinkerScript.ld
-**
-**  Author      : STM32CubeIDE
-**
-**  Abstract    : Linker script for STM32U575xI Device from STM32U5 series
-**                      2048Kbytes FLASH
-**                      784Kbytes RAM
-**
-**                Set heap size, stack size and stack location according
-**                to application requirements.
-**
-**                Set memory bank area and size if external memory is used.
-**
-**  Target      : STMicroelectronics STM32
-**
-**  Distribution: The file is distributed as is without any warranty
-**                of any kind.
-**
-*****************************************************************************
-** @attention
-**
-** Copyright (c) 2022 STMicroelectronics.
-** All rights reserved.
-**
-** This software is licensed under terms that can be found in the LICENSE file
-** in the root directory of this software component.
-** If no LICENSE file comes with this software, it is provided AS-IS.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
-
-_Min_Heap_Size = 0x200 ;	/* required amount of heap  */
-_Min_Stack_Size = 0x400 ;	/* required amount of stack */
-
-/* Memories definition */
-MEMORY
-{
-  RAM	(xrw)	: ORIGIN = 0x20000000,	LENGTH = 768K
-  SRAM4	(xrw)	: ORIGIN = 0x28000000,	LENGTH = 16K
-  FLASH	(rx)	: ORIGIN = 0x08000000,	LENGTH = 2048K
-}
-
-/* Sections */
-SECTIONS
-{
-  /* The startup code into "FLASH" Rom type memory */
-  .isr_vector :
-  {
-    KEEP(*(.isr_vector)) /* Startup code */
-  } >FLASH
-
-  /* The program code and other data into "FLASH" Rom type memory */
-  .text :
-  {
-    *(.text)           /* .text sections (code) */
-    *(.text*)          /* .text* sections (code) */
-    *(.glue_7)         /* glue arm to thumb code */
-    *(.glue_7t)        /* glue thumb to arm code */
-    *(.eh_frame)
-
-    KEEP (*(.init))
-    KEEP (*(.fini))
-
-    _etext = .;        /* define a global symbols at end of code */
-  } >FLASH
-
-  /* Constant data into "FLASH" Rom type memory */
-  .rodata :
-  {
-    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
-    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
-  } >FLASH
-
-  .ARM.extab :
-  {
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-  } >FLASH
-
-  .ARM :
-  {
-    __exidx_start = .;
-    *(.ARM.exidx*)
-    __exidx_end = .;
-  } >FLASH
-
-  .preinit_array :
-  {
-    PROVIDE_HIDDEN (__preinit_array_start = .);
-    KEEP (*(.preinit_array*))
-    PROVIDE_HIDDEN (__preinit_array_end = .);
-  } >FLASH
-
-  .init_array :
-  {
-    PROVIDE_HIDDEN (__init_array_start = .);
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array*))
-    PROVIDE_HIDDEN (__init_array_end = .);
-  } >FLASH
-
-  .fini_array :
-  {
-    PROVIDE_HIDDEN (__fini_array_start = .);
-    KEEP (*(SORT(.fini_array.*)))
-    KEEP (*(.fini_array*))
-    PROVIDE_HIDDEN (__fini_array_end = .);
-  } >FLASH
-
-  /* Used by the startup to initialize data */
-  _sidata = LOADADDR(.data);
-
-  /* Initialized data sections into "RAM" Ram type memory */
-  .data :
-  {
-    _sdata = .;        /* create a global symbol at data start */
-    *(.data)           /* .data sections */
-    *(.data*)          /* .data* sections */
-    *(.RamFunc)        /* .RamFunc sections */
-    *(.RamFunc*)       /* .RamFunc* sections */
-
-    _edata = .;        /* define a global symbol at data end */
-  } >RAM AT> FLASH
-
-  /* Uninitialized data section into "RAM" Ram type memory */
-  .bss :
-  {
-    /* This is used by the startup in order to initialize the .bss section */
-    _sbss = .;         /* define a global symbol at bss start */
-    __bss_start__ = _sbss;
-    *(.bss)
-    *(.bss*)
-    *(COMMON)
-
-    _ebss = .;         /* define a global symbol at bss end */
-    __bss_end__ = _ebss;
-  } >RAM
-
-  /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
-  ._user_heap_stack :
-  {
-    . = ALIGN(8);
-    PROVIDE ( end = . );
-    PROVIDE ( _end = . );
-    . = . + _Min_Heap_Size;
-    . = . + _Min_Stack_Size;
-    . = ALIGN(8);
-  } >RAM
-
-  /* Remove information from the compiler libraries */
-  /DISCARD/ :
-  {
-    libc.a ( * )
-    libm.a ( * )
-    libgcc.a ( * )
-  }
-
-  .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/hw/bsp/stm32u5/boards/stm32u575eval/board.mk b/hw/bsp/stm32u5/boards/stm32u575eval/board.mk
index a75b2af78..37d59023f 100644
--- a/hw/bsp/stm32u5/boards/stm32u575eval/board.mk
+++ b/hw/bsp/stm32u5/boards/stm32u575eval/board.mk
@@ -2,7 +2,7 @@ CFLAGS += \
   -DSTM32U575xx \
 
 # All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/STM32U575AIIXQ_FLASH.ld
+LD_FILE = ${ST_CMSIS}/Source/Templates/gcc/linker/STM32U575xx_FLASH.ld
 
 SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32u575xx.s
 
diff --git a/hw/bsp/stm32u5/boards/stm32u575nucleo/STM32U575ZITXQ_FLASH.ld b/hw/bsp/stm32u5/boards/stm32u575nucleo/STM32U575ZITXQ_FLASH.ld
deleted file mode 100644
index 03c022bc2..000000000
--- a/hw/bsp/stm32u5/boards/stm32u575nucleo/STM32U575ZITXQ_FLASH.ld
+++ /dev/null
@@ -1,167 +0,0 @@
-/*
-******************************************************************************
-**
-**  File        : LinkerScript.ld
-**
-**  Author      : STM32CubeIDE
-**
-**  Abstract    : Linker script for STM32U575xI Device from STM32U5 series
-**                      2048Kbytes FLASH
-**                      784Kbytes RAM
-**
-**                Set heap size, stack size and stack location according
-**                to application requirements.
-**
-**                Set memory bank area and size if external memory is used.
-**
-**  Target      : STMicroelectronics STM32
-**
-**  Distribution: The file is distributed as is without any warranty
-**                of any kind.
-**
-*****************************************************************************
-** @attention
-**
-** Copyright (c) 2022 STMicroelectronics.
-** All rights reserved.
-**
-** This software is licensed under terms that can be found in the LICENSE file
-** in the root directory of this software component.
-** If no LICENSE file comes with this software, it is provided AS-IS.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
-
-_Min_Heap_Size = 0x200 ;	/* required amount of heap  */
-_Min_Stack_Size = 0x400 ;	/* required amount of stack */
-
-/* Memories definition */
-MEMORY
-{
-  RAM	(xrw)	: ORIGIN = 0x20000000,	LENGTH = 768K
-  SRAM4	(xrw)	: ORIGIN = 0x28000000,	LENGTH = 16K
-  FLASH	(rx)	: ORIGIN = 0x08000000,	LENGTH = 2048K
-}
-
-/* Sections */
-SECTIONS
-{
-  /* The startup code into "FLASH" Rom type memory */
-  .isr_vector :
-  {
-    KEEP(*(.isr_vector)) /* Startup code */
-  } >FLASH
-
-  /* The program code and other data into "FLASH" Rom type memory */
-  .text :
-  {
-    *(.text)           /* .text sections (code) */
-    *(.text*)          /* .text* sections (code) */
-    *(.glue_7)         /* glue arm to thumb code */
-    *(.glue_7t)        /* glue thumb to arm code */
-    *(.eh_frame)
-
-    KEEP (*(.init))
-    KEEP (*(.fini))
-
-    _etext = .;        /* define a global symbols at end of code */
-  } >FLASH
-
-  /* Constant data into "FLASH" Rom type memory */
-  .rodata :
-  {
-    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
-    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
-  } >FLASH
-
-  .ARM.extab :
-  {
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-  } >FLASH
-
-  .ARM :
-  {
-    __exidx_start = .;
-    *(.ARM.exidx*)
-    __exidx_end = .;
-  } >FLASH
-
-  .preinit_array :
-  {
-    PROVIDE_HIDDEN (__preinit_array_start = .);
-    KEEP (*(.preinit_array*))
-    PROVIDE_HIDDEN (__preinit_array_end = .);
-  } >FLASH
-
-  .init_array :
-  {
-    PROVIDE_HIDDEN (__init_array_start = .);
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array*))
-    PROVIDE_HIDDEN (__init_array_end = .);
-  } >FLASH
-
-  .fini_array :
-  {
-    PROVIDE_HIDDEN (__fini_array_start = .);
-    KEEP (*(SORT(.fini_array.*)))
-    KEEP (*(.fini_array*))
-    PROVIDE_HIDDEN (__fini_array_end = .);
-  } >FLASH
-
-  /* Used by the startup to initialize data */
-  _sidata = LOADADDR(.data);
-
-  /* Initialized data sections into "RAM" Ram type memory */
-  .data :
-  {
-    _sdata = .;        /* create a global symbol at data start */
-    *(.data)           /* .data sections */
-    *(.data*)          /* .data* sections */
-    *(.RamFunc)        /* .RamFunc sections */
-    *(.RamFunc*)       /* .RamFunc* sections */
-
-    _edata = .;        /* define a global symbol at data end */
-  } >RAM AT> FLASH
-
-  /* Uninitialized data section into "RAM" Ram type memory */
-  .bss :
-  {
-    /* This is used by the startup in order to initialize the .bss section */
-    _sbss = .;         /* define a global symbol at bss start */
-    __bss_start__ = _sbss;
-    *(.bss)
-    *(.bss*)
-    *(COMMON)
-
-    _ebss = .;         /* define a global symbol at bss end */
-    __bss_end__ = _ebss;
-  } >RAM
-
-  /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
-  ._user_heap_stack :
-  {
-    . = ALIGN(8);
-    PROVIDE ( end = . );
-    PROVIDE ( _end = . );
-    . = . + _Min_Heap_Size;
-    . = . + _Min_Stack_Size;
-    . = ALIGN(8);
-  } >RAM
-
-  /* Remove information from the compiler libraries */
-  /DISCARD/ :
-  {
-    libc.a ( * )
-    libm.a ( * )
-    libgcc.a ( * )
-  }
-
-  .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/hw/bsp/stm32u5/boards/stm32u575nucleo/board.mk b/hw/bsp/stm32u5/boards/stm32u575nucleo/board.mk
index 0c7948860..f07157801 100644
--- a/hw/bsp/stm32u5/boards/stm32u575nucleo/board.mk
+++ b/hw/bsp/stm32u5/boards/stm32u575nucleo/board.mk
@@ -2,9 +2,9 @@ CFLAGS += \
   -DSTM32U575xx \
 
 # All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/STM32U575ZITXQ_FLASH.ld
+LD_FILE = ${ST_CMSIS}/Source/Templates/gcc/linker/STM32U575xx_FLASH.ld
 
 SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32u575xx.s
 
 # For flash-jlink target
-JLINK_DEVICE = stm32u575
+JLINK_DEVICE = stm32u575zi
diff --git a/hw/bsp/stm32u5/family.cmake b/hw/bsp/stm32u5/family.cmake
index 8f9ac1109..2e4ed7d50 100644
--- a/hw/bsp/stm32u5/family.cmake
+++ b/hw/bsp/stm32u5/family.cmake
@@ -37,6 +37,7 @@ function(add_board_target BOARD_TARGET)
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
+      ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_icache.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
       ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c

From a5a77af11ea2ec37f74ecd81eb1799cc38c6fbf1 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 17 Oct 2023 23:53:09 +0700
Subject: [PATCH 688/691] add board.mk for u575 nucleo

---
 hw/bsp/stm32u5/boards/stm32u575nucleo/board.cmake | 10 ++++++++++
 1 file changed, 10 insertions(+)
 create mode 100644 hw/bsp/stm32u5/boards/stm32u575nucleo/board.cmake

diff --git a/hw/bsp/stm32u5/boards/stm32u575nucleo/board.cmake b/hw/bsp/stm32u5/boards/stm32u575nucleo/board.cmake
new file mode 100644
index 000000000..73bd10033
--- /dev/null
+++ b/hw/bsp/stm32u5/boards/stm32u575nucleo/board.cmake
@@ -0,0 +1,10 @@
+set(MCU_VARIANT stm32u575xx)
+set(JLINK_DEVICE stm32u575zi)
+
+set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/STM32U575xx_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32U575xx
+    )
+endfunction()

From e9d894fe6620d623bc393698a971d08d43516e01 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Tue, 17 Oct 2023 15:23:05 +0200
Subject: [PATCH 689/691] Fix compile.

---
 .../audio_4_channel_mic/src/tusb_config.h     |  5 ++--
 src/class/audio/audio_device.c                | 26 +++++++++----------
 2 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/examples/device/audio_4_channel_mic/src/tusb_config.h b/examples/device/audio_4_channel_mic/src/tusb_config.h
index d1e19c5a1..f86b63528 100644
--- a/examples/device/audio_4_channel_mic/src/tusb_config.h
+++ b/examples/device/audio_4_channel_mic/src/tusb_config.h
@@ -115,7 +115,8 @@ extern "C" {
 #define CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX            4         // This value is not required by the driver, it parses this information from the descriptor once the alternate interface is set by the host - we use it for the setup
 #define CFG_TUD_AUDIO_EP_SZ_IN                        TUD_AUDIO_EP_SIZE(CFG_TUD_AUDIO_FUNC_1_SAMPLE_RATE, CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX, CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX)
 
-#define CFG_TUD_AUDIO_ENABLE_ENCODING                 0
+#define CFG_TUD_AUDIO_ENABLE_ENCODING                 1
+#define CFG_TUD_AUDIO_EP_IN_FLOW_CONTROL              1
 
 #if CFG_TUD_AUDIO_ENABLE_ENCODING
 
@@ -129,7 +130,7 @@ extern "C" {
 
 #else
 
-#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX             4 * CFG_TUD_AUDIO_EP_SZ_IN
+#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX             CFG_TUD_AUDIO_EP_SZ_IN
 #define CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ          4 * CFG_TUD_AUDIO_EP_SZ_IN
 
 #endif
diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index d32ed56b2..220771aec 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -217,7 +217,7 @@ uint8_t alt_setting_3[CFG_TUD_AUDIO_FUNC_3_N_AS_INT];
 // Software encoding/decoding support FIFOs
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && CFG_TUD_AUDIO_ENABLE_ENCODING
   #if CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ > 0
-    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ];
+    CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ];
     tu_fifo_t tx_supp_ff_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t tx_supp_ff_mutex_wr_1[CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO
@@ -225,7 +225,7 @@ uint8_t alt_setting_3[CFG_TUD_AUDIO_FUNC_3_N_AS_INT];
   #endif
 
   #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ > 0
-    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ];
+    CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_TX_SUPP_SW_FIFO_SZ];
     tu_fifo_t tx_supp_ff_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t tx_supp_ff_mutex_wr_2[CFG_TUD_AUDIO_FUNC_2_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO
@@ -233,7 +233,7 @@ uint8_t alt_setting_3[CFG_TUD_AUDIO_FUNC_3_N_AS_INT];
   #endif
 
   #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ > 0
-    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ];
+    CFG_TUSB_MEM_ALIGN uint8_t tx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_TX_SUPP_SW_FIFO_SZ];
     tu_fifo_t tx_supp_ff_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t tx_supp_ff_mutex_wr_3[CFG_TUD_AUDIO_FUNC_3_N_TX_SUPP_SW_FIFO]; // No need for read mutex as only USB driver reads from FIFO
@@ -243,7 +243,7 @@ uint8_t alt_setting_3[CFG_TUD_AUDIO_FUNC_3_N_AS_INT];
 
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING
   #if CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ > 0
-    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ];
+    CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_1_RX_SUPP_SW_FIFO_SZ];
     tu_fifo_t rx_supp_ff_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t rx_supp_ff_mutex_rd_1[CFG_TUD_AUDIO_FUNC_1_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO
@@ -251,7 +251,7 @@ uint8_t alt_setting_3[CFG_TUD_AUDIO_FUNC_3_N_AS_INT];
   #endif
 
   #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ > 0
-    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ];
+    CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_2_RX_SUPP_SW_FIFO_SZ];
     tu_fifo_t rx_supp_ff_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t rx_supp_ff_mutex_rd_2[CFG_TUD_AUDIO_FUNC_2_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO
@@ -259,7 +259,7 @@ uint8_t alt_setting_3[CFG_TUD_AUDIO_FUNC_3_N_AS_INT];
   #endif
 
   #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ > 0
-    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ];
+    CFG_TUSB_MEM_ALIGN uint8_t rx_supp_ff_buf_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO][CFG_TUD_AUDIO_FUNC_3_RX_SUPP_SW_FIFO_SZ];
     tu_fifo_t rx_supp_ff_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t rx_supp_ff_mutex_rd_3[CFG_TUD_AUDIO_FUNC_3_N_RX_SUPP_SW_FIFO]; // No need for write mutex as only USB driver writes into FIFO
@@ -2519,7 +2519,7 @@ static void audiod_parse_for_AS_params(audiod_function_t* audio, uint8_t const *
       }
 #endif
 
-#if CFG_TUD_AUDIO_ENABLE_EP_OUT
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING
       if (as_itf == audio->ep_out_as_intf_num)
       {
         audio->n_channels_rx = ((audio_desc_cs_as_interface_t const * )p_desc)->bNrChannels;
@@ -2552,7 +2552,7 @@ static void audiod_parse_for_AS_params(audiod_function_t* audio, uint8_t const *
       }
 #endif
 
-#if CFG_TUD_AUDIO_ENABLE_EP_OUT
+#if CFG_TUD_AUDIO_ENABLE_EP_OUT && CFG_TUD_AUDIO_ENABLE_DECODING
       if (as_itf == audio->ep_out_as_intf_num)
       {
         audio->n_bytes_per_sampe_rx = ((audio_desc_type_I_format_t const * )p_desc)->bSubslotSize;
@@ -2580,12 +2580,12 @@ static bool audiod_calc_tx_packet_sz(audiod_function_t* audio)
 
   const uint8_t interval = (tud_speed_get() == TUSB_SPEED_FULL) ? audio->interval_tx : 1 << (audio->interval_tx - 1);
 
-  const uint32_t sample_normimal = audio->sample_rate_tx * interval / ((tud_speed_get() == TUSB_SPEED_FULL) ? 1000 : 8000);
-  const uint32_t sample_reminder = audio->sample_rate_tx * interval % ((tud_speed_get() == TUSB_SPEED_FULL) ? 1000 : 8000);
+  const uint16_t sample_normimal = (uint16_t)(audio->sample_rate_tx * interval / ((tud_speed_get() == TUSB_SPEED_FULL) ? 1000 : 8000));
+  const uint16_t sample_reminder = (uint16_t)(audio->sample_rate_tx * interval % ((tud_speed_get() == TUSB_SPEED_FULL) ? 1000 : 8000));
 
-  const uint16_t packet_sz_tx_min = (sample_normimal - 1) * audio->n_channels_tx * audio->n_bytes_per_sampe_tx;
-  const uint16_t packet_sz_tx_norm = sample_normimal * audio->n_channels_tx * audio->n_bytes_per_sampe_tx;
-  const uint16_t packet_sz_tx_max = (sample_normimal + 1) * audio->n_channels_tx * audio->n_bytes_per_sampe_tx;
+  const uint16_t packet_sz_tx_min = (uint16_t)((sample_normimal - 1) * audio->n_channels_tx * audio->n_bytes_per_sampe_tx);
+  const uint16_t packet_sz_tx_norm = (uint16_t)(sample_normimal * audio->n_channels_tx * audio->n_bytes_per_sampe_tx);
+  const uint16_t packet_sz_tx_max = (uint16_t)((sample_normimal + 1) * audio->n_channels_tx * audio->n_bytes_per_sampe_tx);
 
   // Endpoint size must larger than packet size
   TU_ASSERT(packet_sz_tx_max <= audio->ep_in_sz);

From ade8a19aefa91e4aba0bbb0ddeafbcd041c6a4c3 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Tue, 17 Oct 2023 21:21:52 +0200
Subject: [PATCH 690/691] Put sw_buf in USB section only if necessary.

---
 src/class/audio/audio_device.c | 24 ++++++++++++++++++------
 1 file changed, 18 insertions(+), 6 deletions(-)

diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 220771aec..9712afde9 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -110,24 +110,36 @@
 #error Maximum number of audio functions restricted to three!
 #endif
 
+// Put sw_buf in USB section only if necessary
+#if USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_ENCODING
+#define IN_SW_BUF_MEM_SECTION
+#else
+#define IN_SW_BUF_MEM_SECTION CFG_TUD_MEM_SECTION
+#endif
+#if USE_LINEAR_BUFFER || CFG_TUD_AUDIO_ENABLE_DECODING
+#define OUT_SW_BUF_MEM_SECTION
+#else
+#define OUT_SW_BUF_MEM_SECTION CFG_TUD_MEM_SECTION
+#endif
+
 // EP IN software buffers and mutexes
 #if CFG_TUD_AUDIO_ENABLE_EP_IN && !CFG_TUD_AUDIO_ENABLE_ENCODING
   #if CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ > 0
-    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ];
+    IN_SW_BUF_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t ep_in_ff_mutex_wr_1; // No need for read mutex as only USB driver reads from FIFO
     #endif
   #endif // CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ > 0
 
   #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ > 0
-    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ];
+    IN_SW_BUF_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t ep_in_ff_mutex_wr_2; // No need for read mutex as only USB driver reads from FIFO
     #endif
   #endif // CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_IN_SW_BUF_SZ > 0
 
   #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ > 0
-    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ];
+    IN_SW_BUF_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_in_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_IN_SW_BUF_SZ];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t ep_in_ff_mutex_wr_3; // No need for read mutex as only USB driver reads from FIFO
     #endif
@@ -154,21 +166,21 @@
 // EP OUT software buffers and mutexes
 #if CFG_TUD_AUDIO_ENABLE_EP_OUT && !CFG_TUD_AUDIO_ENABLE_DECODING
   #if CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ > 0
-    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ];
+    OUT_SW_BUF_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_1[CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t ep_out_ff_mutex_rd_1; // No need for write mutex as only USB driver writes into FIFO
     #endif
   #endif // CFG_TUD_AUDIO_FUNC_1_EP_OUT_SW_BUF_SZ > 0
 
   #if CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ > 0
-    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ];
+    OUT_SW_BUF_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_2[CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t ep_out_ff_mutex_rd_2; // No need for write mutex as only USB driver writes into FIFO
     #endif
   #endif // CFG_TUD_AUDIO > 1 && CFG_TUD_AUDIO_FUNC_2_EP_OUT_SW_BUF_SZ > 0
 
   #if CFG_TUD_AUDIO > 2 && CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ > 0
-    CFG_TUD_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ];
+    OUT_SW_BUF_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t audio_ep_out_sw_buf_3[CFG_TUD_AUDIO_FUNC_3_EP_OUT_SW_BUF_SZ];
     #if CFG_FIFO_MUTEX
     osal_mutex_def_t ep_out_ff_mutex_rd_3; // No need for write mutex as only USB driver writes into FIFO
     #endif

From d3fa3cdf487be5929240bc23f9d109c5e3e947bc Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Wed, 18 Oct 2023 17:05:35 +0200
Subject: [PATCH 691/691] Adjsut blackout time.

---
 examples/device/audio_4_channel_mic/src/tusb_config.h | 4 ++--
 src/class/audio/audio_device.c                        | 6 +++---
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/examples/device/audio_4_channel_mic/src/tusb_config.h b/examples/device/audio_4_channel_mic/src/tusb_config.h
index f86b63528..cf44918e2 100644
--- a/examples/device/audio_4_channel_mic/src/tusb_config.h
+++ b/examples/device/audio_4_channel_mic/src/tusb_config.h
@@ -126,12 +126,12 @@ extern "C" {
 #define CFG_TUD_AUDIO_ENABLE_TYPE_I_ENCODING          1
 #define CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_TX      2         // One I2S stream contains two channels, each stream is saved within one support FIFO - this value is currently fixed, the driver does not support a changing value
 #define CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO        (CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX / CFG_TUD_AUDIO_FUNC_1_CHANNEL_PER_FIFO_TX)
-#define CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ       4 * (CFG_TUD_AUDIO_EP_SZ_IN / CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO)
+#define CFG_TUD_AUDIO_FUNC_1_TX_SUPP_SW_FIFO_SZ       4 * (CFG_TUD_AUDIO_EP_SZ_IN / CFG_TUD_AUDIO_FUNC_1_N_TX_SUPP_SW_FIFO) // Minimum 4*EP size is needed for flow control
 
 #else
 
 #define CFG_TUD_AUDIO_FUNC_1_EP_IN_SZ_MAX             CFG_TUD_AUDIO_EP_SZ_IN
-#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ          4 * CFG_TUD_AUDIO_EP_SZ_IN
+#define CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ          4 * CFG_TUD_AUDIO_EP_SZ_IN    // Minimum 4*EP size is needed for flow control
 
 #endif
 
diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 9712afde9..9af999992 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -2645,11 +2645,11 @@ static uint16_t audiod_tx_packet_size(const uint16_t* norminal_size, uint16_t da
       packet_size = norminal_size[2];
       if(norminal_size[0] == norminal_size[1])
       {
-        // nav = INT(nav) + 1
-        ctrl_blackout = 2;
+        // nav > INT(nav), eg. 44.1k, 88.2k
+        ctrl_blackout = 0;
       } else
       {
-        // nav = INT(nav)
+        // nav = INT(nav), eg. 48k, 96k
         ctrl_blackout = 10;
       }
     } else